ARM GAS  /tmp/ccDszoGN.s 			page 1


   1              		.cpu cortex-m4
   2              		.eabi_attribute 27, 1
   3              		.eabi_attribute 28, 1
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"FastMathFunctions.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.arm_cos_f32,"ax",%progbits
  16              		.align	1
  17              		.p2align 2,,3
  18              		.global	arm_cos_f32
  19              		.syntax unified
  20              		.thumb
  21              		.thumb_func
  22              		.fpu fpv4-sp-d16
  24              	arm_cos_f32:
  25              	.LFB148:
  26              		.file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Title:        arm_cos_f32.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Description:  Fast cosine calculation for floating-point values
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** /**
ARM GAS  /tmp/ccDszoGN.s 			page 2


  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @defgroup cos Cosine
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   Computes the trigonometric cosine function using a combination of table lookup
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   and linear interpolation.  There are separate functions for
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   Q15, Q31, and floating-point data types.
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   The input to the floating-point version is in radians while the
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   fixed-point Q15 and Q31 have a scaled input with the range
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   value of 2*pi wraps around to 0.
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   The implementation is based on table lookup using 256 values together with linear interpolation.
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   The steps used are:
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****    -# Calculation of the nearest integer table index
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****    -# Compute the fractional portion (fract) of the table index.
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****    -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   where
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   <pre>
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****      a = Table[index];
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****      b = Table[index+1];
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   </pre>
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  */
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** /**
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @addtogroup cos
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @{
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  */
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** /**
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @brief         Fast approximation to the trigonometric cosine function for floating-point data.
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @param[in]     x  input value in radians
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   @return        cos(x)
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****  */
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** float32_t arm_cos_f32(
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   float32_t x)
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** {
  27              		.loc 1 72 0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 0
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31              		@ link register save eliminated.
  32              	.LVL0:
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   float32_t cosVal, fract, in;                   /* Temporary input, output variables */
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   uint16_t index;                                /* Index variable */
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   float32_t a, b;                                /* Two nearest output values */
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   int32_t n;
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   float32_t findex;
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* input x is in radians */
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine 
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   in = x * 0.159154943092f + 0.25f;
  33              		.loc 1 81 0
  34 0000 DFED237A 		vldr.32	s15, .L9
ARM GAS  /tmp/ccDszoGN.s 			page 3


  35 0004 20EE270A 		vmul.f32	s0, s0, s15
  36              	.LVL1:
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Calculation of floor value of input */
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   n = (int32_t) in;
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Make negative values towards -infinity */
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   if (in < 0.0f)
  37              		.loc 1 87 0
  38 0008 FDEE006A 		vmov.f32	s13, #-2.5e-1
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  39              		.loc 1 81 0
  40 000c F5EE007A 		vmov.f32	s15, #2.5e-1
  41 0010 70EE277A 		vadd.f32	s15, s0, s15
  42              	.LVL2:
  43              		.loc 1 87 0
  44 0014 B4EEE60A 		vcmpe.f32	s0, s13
  45 0018 F1EE10FA 		vmrs	APSR_nzcv, FPSCR
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  46              		.loc 1 84 0
  47 001c BDEEE77A 		vcvt.s32.f32	s14, s15
  48              	.LVL3:
  49              		.loc 1 87 0
  50 0020 04D5     		bpl	.L2
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   {
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****     n--;
  51              		.loc 1 89 0
  52 0022 17EE103A 		vmov	r3, s14	@ int
  53 0026 013B     		subs	r3, r3, #1
  54 0028 07EE103A 		vmov	s14, r3	@ int
  55              	.LVL4:
  56              	.L2:
  90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   }
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Map input value to [0 1] */
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   in = in - (float32_t) n;
  57              		.loc 1 93 0
  58 002c B8EEC77A 		vcvt.f32.s32	s14, s14
  59              	.LVL5:
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Calculation of index of the table */
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
  60              		.loc 1 96 0
  61 0030 DFED186A 		vldr.32	s13, .L9+4
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  62              		.loc 1 93 0
  63 0034 77EEC77A 		vsub.f32	s15, s15, s14
  64              	.LVL6:
  65              		.loc 1 96 0
  66 0038 67EEA67A 		vmul.f32	s15, s15, s13
  67              	.LVL7:
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   index = (uint16_t)findex;
  68              		.loc 1 97 0
  69 003c BCEEE77A 		vcvt.u32.f32	s14, s15
  70 0040 17EE103A 		vmov	r3, s14	@ int
  71 0044 9BB2     		uxth	r3, r3
  72              	.LVL8:
ARM GAS  /tmp/ccDszoGN.s 			page 4


  98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* when "in" is exactly 1, we need to rotate the index down to 0 */
 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   if (index >= FAST_MATH_TABLE_SIZE) {
  73              		.loc 1 100 0
  74 0046 B3F5007F 		cmp	r3, #512
  75 004a 19D3     		bcc	.L8
  76              	.LVL9:
 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****     index = 0;
 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****     findex -= (float32_t)FAST_MATH_TABLE_SIZE;
  77              		.loc 1 102 0
  78 004c 77EEE67A 		vsub.f32	s15, s15, s13
  79              	.LVL10:
  80 0050 9FED117A 		vldr.32	s14, .L9+8
  81 0054 0122     		movs	r2, #1
  82 0056 0021     		movs	r1, #0
  83              	.LVL11:
  84              	.L5:
 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   }
 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* fractional value calculation */
 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   fract = findex - (float32_t) index;
 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Read two nearest values of input value from the cos table */
 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   a = sinTable_f32[index];
 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   b = sinTable_f32[index+1];
  85              		.loc 1 110 0
  86 0058 104B     		ldr	r3, .L9+12
  87 005a 03EB8202 		add	r2, r3, r2, lsl #2
 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
  88              		.loc 1 106 0
  89 005e 77EEC77A 		vsub.f32	s15, s15, s14
  90              	.LVL12:
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Linear interpolation process */
 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   cosVal = (1.0f - fract) * a + fract * b;
  91              		.loc 1 113 0
  92 0062 92ED000A 		vldr.32	s0, [r2]
 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   b = sinTable_f32[index+1];
  93              		.loc 1 109 0
  94 0066 03EB8103 		add	r3, r3, r1, lsl #2
  95              	.LVL13:
  96              		.loc 1 113 0
  97 006a B7EE007A 		vmov.f32	s14, #1.0e+0
  98 006e 27EE800A 		vmul.f32	s0, s15, s0
  99 0072 77EE677A 		vsub.f32	s15, s14, s15
 100              	.LVL14:
 101 0076 93ED007A 		vldr.32	s14, [r3]
 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** 
 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   /* Return output value */
 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c ****   return (cosVal);
 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c **** }
 102              		.loc 1 117 0
 103 007a A7EE870A 		vfma.f32	s0, s15, s14
 104 007e 7047     		bx	lr
 105              	.LVL15:
 106              	.L8:
 107 0080 07EE103A 		vmov	s14, r3	@ int
ARM GAS  /tmp/ccDszoGN.s 			page 5


 108 0084 1946     		mov	r1, r3
 109 0086 5A1C     		adds	r2, r3, #1
 110 0088 B8EE477A 		vcvt.f32.u32	s14, s14
 111 008c E4E7     		b	.L5
 112              	.L10:
 113 008e 00BF     		.align	2
 114              	.L9:
 115 0090 83F9223E 		.word	1042479491
 116 0094 00000044 		.word	1140850688
 117 0098 00000000 		.word	0
 118 009c 00000000 		.word	sinTable_f32
 119              		.cfi_endproc
 120              	.LFE148:
 122              		.section	.text.arm_cos_q15,"ax",%progbits
 123              		.align	1
 124              		.p2align 2,,3
 125              		.global	arm_cos_q15
 126              		.syntax unified
 127              		.thumb
 128              		.thumb_func
 129              		.fpu fpv4-sp-d16
 131              	arm_cos_q15:
 132              	.LFB149:
 133              		.file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Title:        arm_cos_q15.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Description:  Fast cosine calculation for Q15 values
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   @ingroup groupFastMath
ARM GAS  /tmp/ccDszoGN.s 			page 6


  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   @addtogroup cos
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   @{
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  */
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** /**
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   @brief         Fast approximation to the trigonometric cosine function for Q15 data.
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   @param[in]     x  Scaled input value in radians
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   @return        cos(x)
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****  */
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** q15_t arm_cos_q15(
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   q15_t x)
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** {
 134              		.loc 2 51 0
 135              		.cfi_startproc
 136              		@ args = 0, pretend = 0, frame = 0
 137              		@ frame_needed = 0, uses_anonymous_args = 0
 138              		@ link register save eliminated.
 139              	.LVL16:
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   q15_t cosVal;                                  /* Temporary input, output variables */
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   int32_t index;                                 /* Index variable */
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   q15_t a, b;                                    /* Two nearest output values */
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   q15_t fract;                                   /* Temporary values for fractional values */
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   /* add 0.25 (pi/2) to read sine table */
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   x = (uint16_t)x + 0x2000;
 140              		.loc 2 58 0
 141 0000 80B2     		uxth	r0, r0
 142 0002 00F50053 		add	r3, r0, #8192
 143 0006 1BB2     		sxth	r3, r3
 144              	.LVL17:
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   if (x < 0)
 145              		.loc 2 59 0
 146 0008 002B     		cmp	r3, #0
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   { /* convert negative numbers to corresponding positive ones */
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****     x = (uint16_t)x + 0x8000;
 147              		.loc 2 61 0
 148 000a BCBF     		itt	lt
 149 000c A0F5C040 		sublt	r0, r0, #24576
 150 0010 03B2     		sxthlt	r3, r0
 151              	.LVL18:
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   }
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   /* Calculate the nearest index */
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
 152              		.loc 2 65 0
 153 0012 9A09     		lsrs	r2, r3, #6
 154              	.LVL19:
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   /* Calculation of fractional value */
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
 155              		.loc 2 68 0
ARM GAS  /tmp/ccDszoGN.s 			page 7


 156 0014 A3EB8213 		sub	r3, r3, r2, lsl #6
 157              	.LVL20:
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   /* Read two nearest values of input value from the sin table */
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   a = sinTable_q15[index];
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   b = sinTable_q15[index+1];
 158              		.loc 2 72 0
 159 0018 0B49     		ldr	r1, .L14
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
 160              		.loc 2 68 0
 161 001a 5B02     		lsls	r3, r3, #9
 162 001c 1BB2     		sxth	r3, r3
 163              	.LVL21:
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   /* Linear interpolation process */
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   cosVal = (q31_t) (0x8000 - fract) * a >> 16;
 164              		.loc 2 75 0
 165 001e 31F91200 		ldrsh	r0, [r1, r2, lsl #1]
 166              	.LVL22:
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   q15_t cosVal;                                  /* Temporary input, output variables */
 167              		.loc 2 51 0
 168 0022 10B4     		push	{r4}
 169              	.LCFI0:
 170              		.cfi_def_cfa_offset 4
 171              		.cfi_offset 4, -4
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
 172              		.loc 2 72 0
 173 0024 0132     		adds	r2, r2, #1
 174              	.LVL23:
 175              		.loc 2 75 0
 176 0026 C3F50044 		rsb	r4, r3, #32768
 177 002a 00FB04F0 		mul	r0, r0, r4
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
 178              		.loc 2 76 0
 179 002e 000C     		lsrs	r0, r0, #16
 180 0030 31F81220 		ldrh	r2, [r1, r2, lsl #1]
 181              	.LVL24:
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** 
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   /* Return output value */
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   return (cosVal << 1);
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** }
 182              		.loc 2 80 0
 183 0034 5DF8044B 		ldr	r4, [sp], #4
 184              	.LCFI1:
 185              		.cfi_restore 4
 186              		.cfi_def_cfa_offset 0
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c ****   cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
 187              		.loc 2 76 0
 188 0038 0004     		lsls	r0, r0, #16
 189 003a 13FB0203 		smlabb	r3, r3, r2, r0
 190              	.LVL25:
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c **** }
 191              		.loc 2 79 0
 192 003e 43F3CF30 		sbfx	r0, r3, #15, #16
 193              		.loc 2 80 0
 194 0042 20F00100 		bic	r0, r0, #1
 195 0046 7047     		bx	lr
ARM GAS  /tmp/ccDszoGN.s 			page 8


 196              	.L15:
 197              		.align	2
 198              	.L14:
 199 0048 00000000 		.word	sinTable_q15
 200              		.cfi_endproc
 201              	.LFE149:
 203              		.section	.text.arm_cos_q31,"ax",%progbits
 204              		.align	1
 205              		.p2align 2,,3
 206              		.global	arm_cos_q31
 207              		.syntax unified
 208              		.thumb
 209              		.thumb_func
 210              		.fpu fpv4-sp-d16
 212              	arm_cos_q31:
 213              	.LFB150:
 214              		.file 3 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Title:        arm_cos_q31.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Description:  Fast cosine calculation for Q31 values
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   @addtogroup cos
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   @{
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  */
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
ARM GAS  /tmp/ccDszoGN.s 			page 9


  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** /**
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   @brief         Fast approximation to the trigonometric cosine function for Q31 data.
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   @param[in]     x  Scaled input value in radians
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   @return        cos(x)
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****  */
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** q31_t arm_cos_q31(
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   q31_t x)
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** {
 215              		.loc 3 51 0
 216              		.cfi_startproc
 217              		@ args = 0, pretend = 0, frame = 0
 218              		@ frame_needed = 0, uses_anonymous_args = 0
 219              		@ link register save eliminated.
 220              	.LVL26:
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   q31_t cosVal;                                  /* Temporary input, output variables */
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   int32_t index;                                 /* Index variable */
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   q31_t a, b;                                    /* Two nearest output values */
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   q31_t fract;                                   /* Temporary values for fractional values */
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   /* add 0.25 (pi/2) to read sine table */
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   x = (uint32_t)x + 0x20000000;
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   if (x < 0)
 221              		.loc 3 59 0
 222 0000 10F10053 		adds	r3, r0, #536870912
 223              	.LVL27:
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   { /* convert negative numbers to corresponding positive ones */
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****     x = (uint32_t)x + 0x80000000;
 224              		.loc 3 61 0
 225 0004 48BF     		it	mi
 226 0006 00F12043 		addmi	r3, r0, #-1610612736
 227              	.LVL28:
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   q31_t cosVal;                                  /* Temporary input, output variables */
 228              		.loc 3 51 0
 229 000a 2DE9F008 		push	{r4, r5, r6, r7, fp}
 230              	.LCFI2:
 231              		.cfi_def_cfa_offset 20
 232              		.cfi_offset 4, -20
 233              		.cfi_offset 5, -16
 234              		.cfi_offset 6, -12
 235              		.cfi_offset 7, -8
 236              		.cfi_offset 11, -4
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   }
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   /* Calculate the nearest index */
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
 237              		.loc 3 65 0
 238 000e 9A0D     		lsrs	r2, r3, #22
 239              	.LVL29:
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   /* Calculation of fractional value */
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   /* Read two nearest values of input value from the sin table */
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   a = sinTable_q31[index];
ARM GAS  /tmp/ccDszoGN.s 			page 10


  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   b = sinTable_q31[index+1];
 240              		.loc 3 72 0
 241 0010 0B4F     		ldr	r7, .L19
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
 242              		.loc 3 68 0
 243 0012 A3EB8253 		sub	r3, r3, r2, lsl #22
 244              	.LVL30:
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   /* Linear interpolation process */
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   cosVal = (q63_t) (0x80000000 - fract) * a >> 32;
 245              		.loc 3 75 0
 246 0016 57F82240 		ldr	r4, [r7, r2, lsl #2]
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
 247              		.loc 3 68 0
 248 001a 5B02     		lsls	r3, r3, #9
 249              	.LVL31:
 250              		.loc 3 75 0
 251 001c C3F10046 		rsb	r6, r3, #-2147483648
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
 252              		.loc 3 72 0
 253 0020 0132     		adds	r2, r2, #1
 254              	.LVL32:
 255              		.loc 3 75 0
 256 0022 A6FB04BC 		umull	fp, ip, r6, r4
 257 0026 E517     		asrs	r5, r4, #31
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
 258              		.loc 3 76 0
 259 0028 57F82220 		ldr	r2, [r7, r2, lsl #2]
 260              	.LVL33:
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
 261              		.loc 3 75 0
 262 002c 06FB05CC 		mla	ip, r6, r5, ip
 263              		.loc 3 76 0
 264 0030 0020     		movs	r0, #0
 265              	.LVL34:
 266 0032 6146     		mov	r1, ip
 267 0034 C2FB0301 		smlal	r0, r1, r2, r3
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** 
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   /* Return output value */
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c ****   return (cosVal << 1);
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c **** }
 268              		.loc 3 80 0
 269 0038 4800     		lsls	r0, r1, #1
 270 003a BDE8F008 		pop	{r4, r5, r6, r7, fp}
 271              	.LCFI3:
 272              		.cfi_restore 11
 273              		.cfi_restore 7
 274              		.cfi_restore 6
 275              		.cfi_restore 5
 276              		.cfi_restore 4
 277              		.cfi_def_cfa_offset 0
 278 003e 7047     		bx	lr
 279              	.L20:
 280              		.align	2
 281              	.L19:
 282 0040 00000000 		.word	sinTable_q31
 283              		.cfi_endproc
ARM GAS  /tmp/ccDszoGN.s 			page 11


 284              	.LFE150:
 286              		.section	.text.arm_sin_f32,"ax",%progbits
 287              		.align	1
 288              		.p2align 2,,3
 289              		.global	arm_sin_f32
 290              		.syntax unified
 291              		.thumb
 292              		.thumb_func
 293              		.fpu fpv4-sp-d16
 295              	arm_sin_f32:
 296              	.LFB151:
 297              		.file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Title:        arm_sin_f32.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Description:  Fast sine calculation for floating-point values
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @defgroup sin Sine
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   Computes the trigonometric sine function using a combination of table lookup
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   and linear interpolation.  There are separate functions for
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   Q15, Q31, and floating-point data types.
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   The input to the floating-point version is in radians while the
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   fixed-point Q15 and Q31 have a scaled input with the range
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   value of 2*pi wraps around to 0.
ARM GAS  /tmp/ccDszoGN.s 			page 12


  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   The implementation is based on table lookup using 256 values together with linear interpolation.
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   The steps used are:
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****    -# Calculation of the nearest integer table index
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****    -# Compute the fractional portion (fract) of the table index.
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****    -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   where
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   <pre>
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****      b = Table[index];
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****      c = Table[index+1];
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   </pre>
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  */
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** /**
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @addtogroup sin
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @{
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  */
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** /**
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @brief         Fast approximation to the trigonometric sine function for floating-point data.
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @param[in]     x  input value in radians.
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   @return        sin(x)
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****  */
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** float32_t arm_sin_f32(
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   float32_t x)
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** {
 298              		.loc 4 73 0
 299              		.cfi_startproc
 300              		@ args = 0, pretend = 0, frame = 0
 301              		@ frame_needed = 0, uses_anonymous_args = 0
 302              		@ link register save eliminated.
 303              	.LVL35:
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   float32_t sinVal, fract, in;                   /* Temporary input, output variables */
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   uint16_t index;                                /* Index variable */
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   float32_t a, b;                                /* Two nearest output values */
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   int32_t n;
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   float32_t findex;
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* input x is in radians */
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   in = x * 0.159154943092f;
 304              		.loc 4 82 0
 305 0000 DFED207A 		vldr.32	s15, .L28
 306 0004 20EE270A 		vmul.f32	s0, s0, s15
 307              	.LVL36:
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Calculation of floor value of input */
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   n = (int32_t) in;
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Make negative values towards -infinity */
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   if (in < 0.0f)
 308              		.loc 4 88 0
 309 0008 B5EEC00A 		vcmpe.f32	s0, #0
 310 000c F1EE10FA 		vmrs	APSR_nzcv, FPSCR
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
ARM GAS  /tmp/ccDszoGN.s 			page 13


 311              		.loc 4 85 0
 312 0010 FDEEC07A 		vcvt.s32.f32	s15, s0
 313              	.LVL37:
 314              		.loc 4 88 0
 315 0014 04D5     		bpl	.L22
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   {
  90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****     n--;
 316              		.loc 4 90 0
 317 0016 17EE903A 		vmov	r3, s15	@ int
 318 001a 013B     		subs	r3, r3, #1
 319 001c 07EE903A 		vmov	s15, r3	@ int
 320              	.LVL38:
 321              	.L22:
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   }
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Map input value to [0 1] */
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   in = in - (float32_t) n;
 322              		.loc 4 94 0
 323 0020 F8EEE77A 		vcvt.f32.s32	s15, s15
 324              	.LVL39:
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Calculation of index of the table */
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
 325              		.loc 4 97 0
 326 0024 9FED187A 		vldr.32	s14, .L28+4
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
 327              		.loc 4 94 0
 328 0028 30EE670A 		vsub.f32	s0, s0, s15
 329              	.LVL40:
 330              		.loc 4 97 0
 331 002c 20EE070A 		vmul.f32	s0, s0, s14
 332              	.LVL41:
  98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   index = (uint16_t)findex;
 333              		.loc 4 98 0
 334 0030 FCEEC07A 		vcvt.u32.f32	s15, s0
 335 0034 17EE903A 		vmov	r3, s15	@ int
 336 0038 9BB2     		uxth	r3, r3
 337              	.LVL42:
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* when "in" is exactly 1, we need to rotate the index down to 0 */
 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   if (index >= FAST_MATH_TABLE_SIZE) {
 338              		.loc 4 101 0
 339 003a B3F5007F 		cmp	r3, #512
 340 003e 19D3     		bcc	.L27
 341              	.LVL43:
 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****     index = 0;
 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****     findex -= (float32_t)FAST_MATH_TABLE_SIZE;
 342              		.loc 4 103 0
 343 0040 30EE470A 		vsub.f32	s0, s0, s14
 344              	.LVL44:
 345 0044 DFED117A 		vldr.32	s15, .L28+8
 346 0048 0122     		movs	r2, #1
 347 004a 0021     		movs	r1, #0
 348              	.LVL45:
 349              	.L25:
 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   }
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
ARM GAS  /tmp/ccDszoGN.s 			page 14


 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* fractional value calculation */
 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   fract = findex - (float32_t) index;
 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Read two nearest values of input value from the sin table */
 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   a = sinTable_f32[index];
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   b = sinTable_f32[index+1];
 350              		.loc 4 111 0
 351 004c 104B     		ldr	r3, .L28+12
 352 004e 03EB8202 		add	r2, r3, r2, lsl #2
 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
 353              		.loc 4 107 0
 354 0052 70EE677A 		vsub.f32	s15, s0, s15
 355              	.LVL46:
 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Linear interpolation process */
 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   sinVal = (1.0f - fract) * a + fract * b;
 356              		.loc 4 114 0
 357 0056 92ED000A 		vldr.32	s0, [r2]
 358              	.LVL47:
 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   b = sinTable_f32[index+1];
 359              		.loc 4 110 0
 360 005a 03EB8103 		add	r3, r3, r1, lsl #2
 361              	.LVL48:
 362              		.loc 4 114 0
 363 005e B7EE007A 		vmov.f32	s14, #1.0e+0
 364 0062 27EE800A 		vmul.f32	s0, s15, s0
 365 0066 77EE677A 		vsub.f32	s15, s14, s15
 366              	.LVL49:
 367 006a 93ED007A 		vldr.32	s14, [r3]
 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** 
 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   /* Return output value */
 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c ****   return (sinVal);
 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c **** }
 368              		.loc 4 118 0
 369 006e A7EE870A 		vfma.f32	s0, s15, s14
 370 0072 7047     		bx	lr
 371              	.LVL50:
 372              	.L27:
 373 0074 07EE903A 		vmov	s15, r3	@ int
 374 0078 1946     		mov	r1, r3
 375 007a 5A1C     		adds	r2, r3, #1
 376 007c F8EE677A 		vcvt.f32.u32	s15, s15
 377 0080 E4E7     		b	.L25
 378              	.L29:
 379 0082 00BF     		.align	2
 380              	.L28:
 381 0084 83F9223E 		.word	1042479491
 382 0088 00000044 		.word	1140850688
 383 008c 00000000 		.word	0
 384 0090 00000000 		.word	sinTable_f32
 385              		.cfi_endproc
 386              	.LFE151:
 388              		.section	.text.arm_sin_q15,"ax",%progbits
 389              		.align	1
 390              		.p2align 2,,3
 391              		.global	arm_sin_q15
 392              		.syntax unified
ARM GAS  /tmp/ccDszoGN.s 			page 15


 393              		.thumb
 394              		.thumb_func
 395              		.fpu fpv4-sp-d16
 397              	arm_sin_q15:
 398              	.LFB152:
 399              		.file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Title:        arm_sin_q15.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Description:  Fast sine calculation for Q15 values
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   @addtogroup sin
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   @{
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  */
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** /**
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   @brief         Fast approximation to the trigonometric sine function for Q15 data.
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   @param[in]     x  Scaled input value in radians
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   @return        sin(x)
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****  */
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** q15_t arm_sin_q15(
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   q15_t x)
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** {
ARM GAS  /tmp/ccDszoGN.s 			page 16


 400              		.loc 5 51 0
 401              		.cfi_startproc
 402              		@ args = 0, pretend = 0, frame = 0
 403              		@ frame_needed = 0, uses_anonymous_args = 0
 404              		@ link register save eliminated.
 405              	.LVL51:
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   q15_t sinVal;                                  /* Temporary input, output variables */
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   int32_t index;                                 /* Index variable */
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   q15_t a, b;                                    /* Two nearest output values */
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   q15_t fract;                                   /* Temporary values for fractional values */
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   if (x < 0)
 406              		.loc 5 58 0
 407 0000 0028     		cmp	r0, #0
 408              	.LVL52:
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   { /* convert negative numbers to corresponding positive ones */
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****     x = (uint16_t)x + 0x8000;
 409              		.loc 5 60 0
 410 0002 BCBF     		itt	lt
 411 0004 A0F50040 		sublt	r0, r0, #32768
 412 0008 00B2     		sxthlt	r0, r0
 413              	.LVL53:
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   }
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   /* Calculate the nearest index */
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
 414              		.loc 5 64 0
 415 000a 8209     		lsrs	r2, r0, #6
 416              	.LVL54:
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   /* Calculation of fractional value */
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
 417              		.loc 5 67 0
 418 000c A0EB8210 		sub	r0, r0, r2, lsl #6
 419              	.LVL55:
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   /* Read two nearest values of input value from the sin table */
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   a = sinTable_q15[index];
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   b = sinTable_q15[index+1];
 420              		.loc 5 71 0
 421 0010 0B49     		ldr	r1, .L33
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
 422              		.loc 5 67 0
 423 0012 4002     		lsls	r0, r0, #9
 424 0014 00B2     		sxth	r0, r0
 425              	.LVL56:
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   /* Linear interpolation process */
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   sinVal = (q31_t) (0x8000 - fract) * a >> 16;
 426              		.loc 5 74 0
 427 0016 31F91230 		ldrsh	r3, [r1, r2, lsl #1]
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   q15_t sinVal;                                  /* Temporary input, output variables */
 428              		.loc 5 51 0
 429 001a 10B4     		push	{r4}
 430              	.LCFI4:
 431              		.cfi_def_cfa_offset 4
ARM GAS  /tmp/ccDszoGN.s 			page 17


 432              		.cfi_offset 4, -4
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
 433              		.loc 5 71 0
 434 001c 0132     		adds	r2, r2, #1
 435              	.LVL57:
 436              		.loc 5 74 0
 437 001e C0F50044 		rsb	r4, r0, #32768
 438 0022 03FB04F3 		mul	r3, r3, r4
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
 439              		.loc 5 75 0
 440 0026 1B0C     		lsrs	r3, r3, #16
 441 0028 31F81220 		ldrh	r2, [r1, r2, lsl #1]
 442              	.LVL58:
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** 
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   /* Return output value */
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   return (sinVal << 1);
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** }
 443              		.loc 5 79 0
 444 002c 5DF8044B 		ldr	r4, [sp], #4
 445              	.LCFI5:
 446              		.cfi_restore 4
 447              		.cfi_def_cfa_offset 0
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c ****   sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
 448              		.loc 5 75 0
 449 0030 1B04     		lsls	r3, r3, #16
 450 0032 10FB0230 		smlabb	r0, r0, r2, r3
 451              	.LVL59:
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c **** }
 452              		.loc 5 78 0
 453 0036 40F3CF30 		sbfx	r0, r0, #15, #16
 454              		.loc 5 79 0
 455 003a 20F00100 		bic	r0, r0, #1
 456 003e 7047     		bx	lr
 457              	.L34:
 458              		.align	2
 459              	.L33:
 460 0040 00000000 		.word	sinTable_q15
 461              		.cfi_endproc
 462              	.LFE152:
 464              		.section	.text.arm_sin_q31,"ax",%progbits
 465              		.align	1
 466              		.p2align 2,,3
 467              		.global	arm_sin_q31
 468              		.syntax unified
 469              		.thumb
 470              		.thumb_func
 471              		.fpu fpv4-sp-d16
 473              	arm_sin_q31:
 474              	.LFB153:
 475              		.file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Title:        arm_sin_q31.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Description:  Fast sine calculation for Q31 values
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * $Revision:    V1.6.0
ARM GAS  /tmp/ccDszoGN.s 			page 18


   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   @addtogroup sin
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   @{
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  */
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** /**
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   @brief         Fast approximation to the trigonometric sine function for Q31 data.
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   @param[in]     x  Scaled input value in radians
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   @return        sin(x)
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****  */
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** q31_t arm_sin_q31(
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   q31_t x)
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** {
 476              		.loc 6 51 0
 477              		.cfi_startproc
 478              		@ args = 0, pretend = 0, frame = 0
 479              		@ frame_needed = 0, uses_anonymous_args = 0
 480              		@ link register save eliminated.
 481              	.LVL60:
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   q31_t sinVal;                                  /* Temporary variables for input, output */
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   int32_t index;                                 /* Index variable */
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   q31_t a, b;                                    /* Two nearest output values */
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   q31_t fract;                                   /* Temporary values for fractional values */
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   if (x < 0)
 482              		.loc 6 57 0
ARM GAS  /tmp/ccDszoGN.s 			page 19


 483 0000 0028     		cmp	r0, #0
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   { /* convert negative numbers to corresponding positive ones */
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****     x = (uint32_t)x + 0x80000000;
 484              		.loc 6 59 0
 485 0002 B6BF     		itet	lt
 486 0004 00F10043 		addlt	r3, r0, #-2147483648
 487 0008 0346     		movge	r3, r0
 488 000a 1846     		movlt	r0, r3
 489              	.LVL61:
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   }
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   /* Calculate the nearest index */
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   /* Calculation of fractional value */
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   /* Read two nearest values of input value from the sin table */
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   a = sinTable_q31[index];
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   b = sinTable_q31[index+1];
 490              		.loc 6 70 0
 491 000c 0D49     		ldr	r1, .L39
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
 492              		.loc 6 63 0
 493 000e 9B0D     		lsrs	r3, r3, #22
 494              	.LVL62:
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
 495              		.loc 6 66 0
 496 0010 A0EB8350 		sub	r0, r0, r3, lsl #22
 497              	.LVL63:
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   q31_t sinVal;                                  /* Temporary variables for input, output */
 498              		.loc 6 51 0
 499 0014 2DE9F008 		push	{r4, r5, r6, r7, fp}
 500              	.LCFI6:
 501              		.cfi_def_cfa_offset 20
 502              		.cfi_offset 4, -20
 503              		.cfi_offset 5, -16
 504              		.cfi_offset 6, -12
 505              		.cfi_offset 7, -8
 506              		.cfi_offset 11, -4
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
 507              		.loc 6 66 0
 508 0018 4002     		lsls	r0, r0, #9
 509              	.LVL64:
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   /* Linear interpolation process */
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
 510              		.loc 6 73 0
 511 001a 51F82360 		ldr	r6, [r1, r3, lsl #2]
 512 001e C0F10042 		rsb	r2, r0, #-2147483648
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
 513              		.loc 6 70 0
 514 0022 0133     		adds	r3, r3, #1
 515              	.LVL65:
 516              		.loc 6 73 0
 517 0024 A2FB06BC 		umull	fp, ip, r2, r6
 518 0028 F717     		asrs	r7, r6, #31
ARM GAS  /tmp/ccDszoGN.s 			page 20


 519 002a 02FB07CC 		mla	ip, r2, r7, ip
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
 520              		.loc 6 74 0
 521 002e 51F82330 		ldr	r3, [r1, r3, lsl #2]
 522              	.LVL66:
 523 0032 0024     		movs	r4, #0
 524 0034 6546     		mov	r5, ip
 525 0036 C3FB0045 		smlal	r4, r5, r3, r0
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** 
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   /* Return output value */
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c ****   return (sinVal << 1);
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c **** }
 526              		.loc 6 78 0
 527 003a 6800     		lsls	r0, r5, #1
 528              	.LVL67:
 529 003c BDE8F008 		pop	{r4, r5, r6, r7, fp}
 530              	.LCFI7:
 531              		.cfi_restore 11
 532              		.cfi_restore 7
 533              		.cfi_restore 6
 534              		.cfi_restore 5
 535              		.cfi_restore 4
 536              		.cfi_def_cfa_offset 0
 537 0040 7047     		bx	lr
 538              	.L40:
 539 0042 00BF     		.align	2
 540              	.L39:
 541 0044 00000000 		.word	sinTable_q31
 542              		.cfi_endproc
 543              	.LFE153:
 545              		.section	.text.arm_sqrt_q15,"ax",%progbits
 546              		.align	1
 547              		.p2align 2,,3
 548              		.global	arm_sqrt_q15
 549              		.syntax unified
 550              		.thumb
 551              		.thumb_func
 552              		.fpu fpv4-sp-d16
 554              	arm_sqrt_q15:
 555              	.LFB154:
 556              		.file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Title:        arm_sqrt_q15.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Description:  Q15 square root function
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
ARM GAS  /tmp/ccDszoGN.s 			page 21


  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @addtogroup SQRT
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @{
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  */
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** /**
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @brief         Q15 square root function.
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @param[out]    pOut  points to square root of input value
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   @return        execution status
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                    - \ref ARM_MATH_SUCCESS        : input value is positive
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                    - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****  */
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** arm_status arm_sqrt_q15(
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   q15_t in,
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   q15_t * pOut)
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** {
 557              		.loc 7 53 0
 558              		.cfi_startproc
 559              		@ args = 0, pretend = 0, frame = 0
 560              		@ frame_needed = 0, uses_anonymous_args = 0
 561              		@ link register save eliminated.
 562              	.LVL68:
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   q31_t bits_val1;
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   q15_t number, temp1, var1, signBits1, half;
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   float32_t temp_float1;
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   union
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   {
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     q31_t fracval;
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     float32_t floatval;
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   } tempconv;
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   number = in;
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   /* If the input is a positive number then compute the signBits. */
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   if (number > 0)
 563              		.loc 7 66 0
ARM GAS  /tmp/ccDszoGN.s 			page 22


 564 0000 0028     		cmp	r0, #0
 565              	.LVL69:
 566 0002 5EDD     		ble	.L42
 567              	.LVL70:
 568              	.LBB6:
 569              	.LBB7:
 570              		.file 8 "Drivers/CMSIS/Include/cmsis_gcc.h"
   1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
   2:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @file     cmsis_gcc.h
   3:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @brief    CMSIS compiler GCC header file
   4:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @version  V5.2.0
   5:Drivers/CMSIS/Include/cmsis_gcc.h ****  * @date     08. May 2019
   6:Drivers/CMSIS/Include/cmsis_gcc.h ****  ******************************************************************************/
   7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
   8:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
   9:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  10:Drivers/CMSIS/Include/cmsis_gcc.h ****  * SPDX-License-Identifier: Apache-2.0
  11:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  12:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  13:Drivers/CMSIS/Include/cmsis_gcc.h ****  * not use this file except in compliance with the License.
  14:Drivers/CMSIS/Include/cmsis_gcc.h ****  * You may obtain a copy of the License at
  15:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  16:Drivers/CMSIS/Include/cmsis_gcc.h ****  * www.apache.org/licenses/LICENSE-2.0
  17:Drivers/CMSIS/Include/cmsis_gcc.h ****  *
  18:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Unless required by applicable law or agreed to in writing, software
  19:Drivers/CMSIS/Include/cmsis_gcc.h ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  20:Drivers/CMSIS/Include/cmsis_gcc.h ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  21:Drivers/CMSIS/Include/cmsis_gcc.h ****  * See the License for the specific language governing permissions and
  22:Drivers/CMSIS/Include/cmsis_gcc.h ****  * limitations under the License.
  23:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
  24:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
  26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
  27:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
  29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
  30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
  31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
  32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
  33:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
  35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
  36:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __has_builtin(x) (0)
  37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  38:Drivers/CMSIS/Include/cmsis_gcc.h **** 
  39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
  40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ASM
  41:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ASM                                  __asm
  42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __INLINE
  44:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __INLINE                               inline
  45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_INLINE
  47:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_INLINE                        static inline
  48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __STATIC_FORCEINLINE                 
  50:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
ARM GAS  /tmp/ccDszoGN.s 			page 23


  51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif                                           
  52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __NO_RETURN
  53:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __NO_RETURN                            __attribute__((__noreturn__))
  54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __USED
  56:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __USED                                 __attribute__((used))
  57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __WEAK
  59:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __WEAK                                 __attribute__((weak))
  60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED
  62:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED                               __attribute__((packed, aligned(1)))
  63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_STRUCT
  65:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
  66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __PACKED_UNION
  68:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
  69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32        /* deprecated */
  71:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  72:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  73:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  74:Drivers/CMSIS/Include/cmsis_gcc.h ****   struct __attribute__((packed)) T_UINT32 { uint32_t v; };
  75:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  76:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
  77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_WRITE
  79:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  80:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  81:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  82:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
  83:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  84:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
  85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT16_READ
  87:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  88:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  89:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  90:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
  91:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
  92:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(add
  93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
  94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_WRITE
  95:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
  96:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
  97:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
  98:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
  99:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
 100:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __UNALIGNED_UINT32_READ
 103:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic push
 104:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wpacked"
 105:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic ignored "-Wattributes"
 106:Drivers/CMSIS/Include/cmsis_gcc.h ****   __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
 107:Drivers/CMSIS/Include/cmsis_gcc.h ****   #pragma GCC diagnostic pop
ARM GAS  /tmp/ccDszoGN.s 			page 24


 108:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(add
 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __ALIGNED
 111:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __ALIGNED(x)                           __attribute__((aligned(x)))
 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __RESTRICT
 114:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __RESTRICT                             __restrict
 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef   __COMPILER_BARRIER
 117:Drivers/CMSIS/Include/cmsis_gcc.h ****   #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* #########################  Startup and Lowlevel Init  ######################## */
 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 125:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Initializes data and bss sections
 126:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details This default implementations initialized all data and additional bss
 127:Drivers/CMSIS/Include/cmsis_gcc.h ****            sections relying on .copy.table and .zero.table specified properly
 128:Drivers/CMSIS/Include/cmsis_gcc.h ****            in the used linker script.
 129:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 130:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
 132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 133:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern void _start(void) __NO_RETURN;
 134:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 135:Drivers/CMSIS/Include/cmsis_gcc.h ****   typedef struct {
 136:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t const* src;
 137:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t* dest;
 138:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t  wlen;
 139:Drivers/CMSIS/Include/cmsis_gcc.h ****   } __copy_table_t;
 140:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 141:Drivers/CMSIS/Include/cmsis_gcc.h ****   typedef struct {
 142:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t* dest;
 143:Drivers/CMSIS/Include/cmsis_gcc.h ****     uint32_t  wlen;
 144:Drivers/CMSIS/Include/cmsis_gcc.h ****   } __zero_table_t;
 145:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 146:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_start__;
 147:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __copy_table_t __copy_table_end__;
 148:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_start__;
 149:Drivers/CMSIS/Include/cmsis_gcc.h ****   extern const __zero_table_t __zero_table_end__;
 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 151:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
 152:Drivers/CMSIS/Include/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 153:Drivers/CMSIS/Include/cmsis_gcc.h ****       pTable->dest[i] = pTable->src[i];
 154:Drivers/CMSIS/Include/cmsis_gcc.h ****     }
 155:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 156:Drivers/CMSIS/Include/cmsis_gcc.h ****  
 157:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
 158:Drivers/CMSIS/Include/cmsis_gcc.h ****     for(uint32_t i=0u; i<pTable->wlen; ++i) {
 159:Drivers/CMSIS/Include/cmsis_gcc.h ****       pTable->dest[i] = 0u;
 160:Drivers/CMSIS/Include/cmsis_gcc.h ****     }
 161:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
 162:Drivers/CMSIS/Include/cmsis_gcc.h ****  
 163:Drivers/CMSIS/Include/cmsis_gcc.h ****   _start();
 164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS  /tmp/ccDszoGN.s 			page 25


 165:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START           __cmsis_start
 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP              __StackTop
 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT             __StackLimit
 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE            __Vectors
 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ###########################  Core Function Access  ########################### */
 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup  CMSIS_Core_FunctionInterface
 187:Drivers/CMSIS/Include/cmsis_gcc.h ****     \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
 188:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 189:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 192:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable IRQ Interrupts
 193:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
 194:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 195:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
 197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 198:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie i" : : : "memory");
 199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 203:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable IRQ Interrupts
 204:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
 205:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 206:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
 208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 209:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid i" : : : "memory");
 210:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 214:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Control Register
 215:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the Control Register.
 216:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Control Register value
 217:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 219:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 220:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/ccDszoGN.s 			page 26


 222:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control" : "=r" (result) );
 223:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 224:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 229:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Control Register (non-secure)
 230:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the non-secure Control Register when in secure mode.
 231:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               non-secure Control Register value
 232:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
 234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 235:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 237:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
 238:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 244:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Control Register
 245:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the Control Register.
 246:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
 247:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
 249:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 250:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
 251:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 256:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Control Register (non-secure)
 257:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Writes the given value to the non-secure Control Register when in secure state.
 258:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    control  Control Register value to set
 259:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
 261:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 262:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
 263:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 268:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get IPSR Register
 269:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the IPSR Register.
 270:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               IPSR Register value
 271:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
 273:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 274:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 276:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
 277:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 278:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS  /tmp/ccDszoGN.s 			page 27


 279:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 282:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get APSR Register
 283:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the APSR Register.
 284:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               APSR Register value
 285:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
 287:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 288:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 290:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, apsr" : "=r" (result) );
 291:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 296:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get xPSR Register
 297:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the content of the xPSR Register.
 298:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               xPSR Register value
 299:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
 301:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 302:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 304:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
 305:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 306:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 310:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer
 311:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer (PSP).
 312:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSP Register value
 313:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
 315:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 316:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 318:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp"  : "=r" (result) );
 319:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 320:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 325:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer (non-secure)
 326:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
 327:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSP Register value
 328:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
 330:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 331:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 333:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
 334:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 335:Drivers/CMSIS/Include/cmsis_gcc.h **** }
ARM GAS  /tmp/ccDszoGN.s 			page 28


 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 340:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer
 341:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer (PSP).
 342:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
 343:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
 345:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 346:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
 347:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 352:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
 353:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
 354:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfProcStack  Process Stack Pointer value to set
 355:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
 357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 358:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
 359:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 364:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer
 365:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer (MSP).
 366:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSP Register value
 367:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
 369:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 370:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 372:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp" : "=r" (result) );
 373:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 374:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 379:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer (non-secure)
 380:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
 381:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSP Register value
 382:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
 384:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 385:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 387:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
 388:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 389:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/ccDszoGN.s 			page 29


 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 394:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer
 395:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer (MSP).
 396:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
 397:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
 399:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 400:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
 401:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 406:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer (non-secure)
 407:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
 408:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfMainStack  Main Stack Pointer value to set
 409:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
 411:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 412:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
 413:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 419:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Stack Pointer (non-secure)
 420:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
 421:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               SP Register value
 422:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
 424:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 425:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 427:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
 428:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 429:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 433:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Stack Pointer (non-secure)
 434:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
 435:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    topOfStack  Stack Pointer value to set
 436:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
 438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 439:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
 440:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 445:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Priority Mask
 446:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current state of the priority mask bit from the Priority Mask Register.
 447:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Priority Mask value
 448:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
ARM GAS  /tmp/ccDszoGN.s 			page 30


 450:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 451:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 453:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
 454:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 455:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 460:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Priority Mask (non-secure)
 461:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
 462:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Priority Mask value
 463:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
 465:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 466:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 468:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
 469:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 470:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 475:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask
 476:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Priority Mask Register.
 477:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
 478:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
 480:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 481:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
 482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 487:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Priority Mask (non-secure)
 488:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
 489:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    priMask  Priority Mask
 490:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
 492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 493:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
 494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 499:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 500:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 502:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Enable FIQ
 503:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
 504:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 505:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
ARM GAS  /tmp/ccDszoGN.s 			page 31


 507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 508:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsie f" : : : "memory");
 509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 513:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Disable FIQ
 514:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Disables FIQ interrupts by setting the F-bit in the CPSR.
 515:Drivers/CMSIS/Include/cmsis_gcc.h ****            Can only be executed in Privileged modes.
 516:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
 518:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 519:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("cpsid f" : : : "memory");
 520:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 524:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Base Priority
 525:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Base Priority register.
 526:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Base Priority register value
 527:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
 529:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 530:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 532:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, basepri" : "=r" (result) );
 533:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 534:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 539:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Base Priority (non-secure)
 540:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Base Priority register when in secure state.
 541:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Base Priority register value
 542:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
 544:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 545:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 547:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
 548:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 549:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 554:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority
 555:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Base Priority register.
 556:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    basePri  Base Priority value to set
 557:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
 559:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 560:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
 561:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/ccDszoGN.s 			page 32


 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 566:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority (non-secure)
 567:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Base Priority register when in secure state.
 568:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    basePri  Base Priority value to set
 569:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
 571:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 572:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
 573:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 578:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Base Priority with condition
 579:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
 580:Drivers/CMSIS/Include/cmsis_gcc.h ****            or the new value increases the BASEPRI priority level.
 581:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    basePri  Base Priority value to set
 582:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
 584:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 585:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
 586:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 590:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Fault Mask
 591:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Fault Mask register.
 592:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Fault Mask register value
 593:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
 595:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 596:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 598:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
 599:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 600:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 605:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Fault Mask (non-secure)
 606:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Fault Mask register when in secure state.
 607:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Fault Mask register value
 608:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
 610:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 611:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 613:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
 614:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 615:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 620:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Fault Mask
ARM GAS  /tmp/ccDszoGN.s 			page 33


 621:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Fault Mask register.
 622:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    faultMask  Fault Mask value to set
 623:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
 625:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 626:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
 627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 632:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Fault Mask (non-secure)
 633:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Fault Mask register when in secure state.
 634:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    faultMask  Fault Mask value to set
 635:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
 637:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 638:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
 639:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
 643:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
 644:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 648:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 651:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer Limit
 652:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 653:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always in non-secure
 654:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 655:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 656:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
 657:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSPLIM Register value
 658:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
 660:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 662:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 663:Drivers/CMSIS/Include/cmsis_gcc.h ****     // without main extensions, the non-secure PSPLIM is RAZ/WI
 664:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 666:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 667:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
 668:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 670:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 674:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Process Stack Pointer Limit (non-secure)
 675:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 676:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always.
 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 
ARM GAS  /tmp/ccDszoGN.s 			page 34


 678:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
 679:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               PSPLIM Register value
 680:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
 682:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 684:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
 685:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 687:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 688:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
 689:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 691:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 696:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer Limit
 697:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 698:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored in non-secure
 699:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 700:Drivers/CMSIS/Include/cmsis_gcc.h ****   
 701:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
 702:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
 703:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
 705:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 707:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 708:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
 709:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)ProcStackPtrLimit;
 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 711:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 713:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 718:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Process Stack Pointer (non-secure)
 719:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 720:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored.
 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 722:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
 723:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
 724:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
 726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 728:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure PSPLIM is RAZ/WI
 729:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)ProcStackPtrLimit;
 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 731:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS  /tmp/ccDszoGN.s 			page 35


 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 738:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer Limit
 739:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 740:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always in non-secure
 741:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 743:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
 744:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSPLIM Register value
 745:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
 747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 749:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 750:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 751:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 753:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 754:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msplim" : "=r" (result) );
 755:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 762:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get Main Stack Pointer Limit (non-secure)
 763:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 764:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence zero is returned always.
 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 766:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
 767:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               MSPLIM Register value
 768:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
 770:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 772:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 773:Drivers/CMSIS/Include/cmsis_gcc.h ****   return 0U;
 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 775:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 776:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
 777:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 779:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 784:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer Limit
 785:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 786:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored in non-secure
 787:Drivers/CMSIS/Include/cmsis_gcc.h ****   mode.
 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 789:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
 790:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
 791:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
ARM GAS  /tmp/ccDszoGN.s 			page 36


 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
 793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
 795:Drivers/CMSIS/Include/cmsis_gcc.h ****     (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
 796:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 797:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)MainStackPtrLimit;
 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 799:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 801:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 806:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set Main Stack Pointer Limit (non-secure)
 807:Drivers/CMSIS/Include/cmsis_gcc.h ****   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
 808:Drivers/CMSIS/Include/cmsis_gcc.h ****   Stack Pointer Limit register hence the write is silently ignored.
 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 810:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
 811:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
 812:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
 814:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
 816:Drivers/CMSIS/Include/cmsis_gcc.h ****   // without main extensions, the non-secure MSPLIM is RAZ/WI
 817:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)MainStackPtrLimit;
 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 819:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
 825:Drivers/CMSIS/Include/cmsis_gcc.h ****            (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 829:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Get FPSCR
 830:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Returns the current value of the Floating Point Status/Control register.
 831:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Floating Point Status/Control register value
 832:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
 834:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
 836:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 
 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
 840:Drivers/CMSIS/Include/cmsis_gcc.h ****   /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
 841:Drivers/CMSIS/Include/cmsis_gcc.h ****   return __builtin_arm_get_fpscr();
 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 843:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 845:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
 846:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(result);
 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
ARM GAS  /tmp/ccDszoGN.s 			page 37


 849:Drivers/CMSIS/Include/cmsis_gcc.h ****   return(0U);
 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 851:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 855:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Set FPSCR
 856:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Assigns the given value to the Floating Point Status/Control register.
 857:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    fpscr  Floating Point Status/Control value to set
 858:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
 860:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
 862:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
 866:Drivers/CMSIS/Include/cmsis_gcc.h ****   /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
 867:Drivers/CMSIS/Include/cmsis_gcc.h ****   __builtin_arm_set_fpscr(fpscr);
 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 869:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 872:Drivers/CMSIS/Include/cmsis_gcc.h ****   (void)fpscr;
 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 874:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ##########################  Core Instruction Access  ######################### */
 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
 882:Drivers/CMSIS/Include/cmsis_gcc.h ****   Access to dedicated instructions
 883:Drivers/CMSIS/Include/cmsis_gcc.h ****   @{
 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */
 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
 887:Drivers/CMSIS/Include/cmsis_gcc.h ****  * For thumb1, use low register (r0-r7), specified by constraint "l"
 888:Drivers/CMSIS/Include/cmsis_gcc.h ****  * Otherwise, use general registers, specified by constraint "r" */
 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 900:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   No Operation
 901:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details No Operation does nothing. This instruction can be used for code alignment purposes.
 902:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP()                             __ASM volatile ("nop")
 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
ARM GAS  /tmp/ccDszoGN.s 			page 38


 906:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Wait For Interrupt
 907:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
 908:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI()                             __ASM volatile ("wfi")
 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 913:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Wait For Event
 914:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Wait For Event is a hint instruction that permits the processor to enter
 915:Drivers/CMSIS/Include/cmsis_gcc.h ****            a low-power state until one of a number of events occurs.
 916:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE()                             __ASM volatile ("wfe")
 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 921:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Send Event
 922:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
 923:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV()                             __ASM volatile ("sev")
 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 928:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Instruction Synchronization Barrier
 929:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Instruction Synchronization Barrier flushes the pipeline in the processor,
 930:Drivers/CMSIS/Include/cmsis_gcc.h ****            so that all instructions following the ISB are fetched from cache or memory,
 931:Drivers/CMSIS/Include/cmsis_gcc.h ****            after the instruction has been completed.
 932:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
 934:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 935:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("isb 0xF":::"memory");
 936:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 940:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Data Synchronization Barrier
 941:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Acts as a special kind of Data Memory Barrier.
 942:Drivers/CMSIS/Include/cmsis_gcc.h ****            It completes when all explicit memory accesses before this instruction complete.
 943:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
 945:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 946:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("dsb 0xF":::"memory");
 947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 951:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Data Memory Barrier
 952:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Ensures the apparent order of the explicit memory operations before
 953:Drivers/CMSIS/Include/cmsis_gcc.h ****            and after the instruction, without ensuring their completion.
 954:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
 956:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 957:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("dmb 0xF":::"memory");
 958:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 962:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse byte order (32 bit)
ARM GAS  /tmp/ccDszoGN.s 			page 39


 963:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
 964:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 965:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
 966:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
 968:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
 970:Drivers/CMSIS/Include/cmsis_gcc.h ****   return __builtin_bswap32(value);
 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
 972:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 974:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 975:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
 977:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 981:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 982:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 
 983:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 984:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
 985:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
 987:Drivers/CMSIS/Include/cmsis_gcc.h **** {
 988:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 990:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
 991:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
 992:Drivers/CMSIS/Include/cmsis_gcc.h **** }
 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 
 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
 996:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse byte order (16 bit)
 997:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
 998:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
 999:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
1000:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
1004:Drivers/CMSIS/Include/cmsis_gcc.h ****   return (int16_t)__builtin_bswap16(value);
1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1006:Drivers/CMSIS/Include/cmsis_gcc.h ****   int16_t result;
1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1008:Drivers/CMSIS/Include/cmsis_gcc.h ****   __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
1009:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1015:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Rotate Right in unsigned value (32 bit)
1016:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
1017:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    op1  Value to rotate
1018:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    op2  Number of Bits to rotate
1019:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Rotated value
ARM GAS  /tmp/ccDszoGN.s 			page 40


1020:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
1022:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1023:Drivers/CMSIS/Include/cmsis_gcc.h ****   op2 %= 32U;
1024:Drivers/CMSIS/Include/cmsis_gcc.h ****   if (op2 == 0U)
1025:Drivers/CMSIS/Include/cmsis_gcc.h ****   {
1026:Drivers/CMSIS/Include/cmsis_gcc.h ****     return op1;
1027:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
1028:Drivers/CMSIS/Include/cmsis_gcc.h ****   return (op1 >> op2) | (op1 << (32U - op2));
1029:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1033:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Breakpoint
1034:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Causes the processor to enter Debug state.
1035:Drivers/CMSIS/Include/cmsis_gcc.h ****            Debug tools can use this to investigate system state when the instruction at a particula
1036:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  is ignored by the processor.
1037:Drivers/CMSIS/Include/cmsis_gcc.h ****                  If required, a debugger can use it to store additional information about the break
1038:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value)                       __ASM volatile ("bkpt "#value)
1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1043:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Reverse bit order of value
1044:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Reverses the bit order of the given value.
1045:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]    value  Value to reverse
1046:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return               Reversed value
1047:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
1049:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1050:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t result;
1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
1053:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
1054:Drivers/CMSIS/Include/cmsis_gcc.h ****      (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
1055:Drivers/CMSIS/Include/cmsis_gcc.h ****    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
1057:Drivers/CMSIS/Include/cmsis_gcc.h ****   uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1059:Drivers/CMSIS/Include/cmsis_gcc.h ****   result = value;                      /* r will be reversed bits of v; first get LSB of v */
1060:Drivers/CMSIS/Include/cmsis_gcc.h ****   for (value >>= 1U; value != 0U; value >>= 1U)
1061:Drivers/CMSIS/Include/cmsis_gcc.h ****   {
1062:Drivers/CMSIS/Include/cmsis_gcc.h ****     result <<= 1U;
1063:Drivers/CMSIS/Include/cmsis_gcc.h ****     result |= value & 1U;
1064:Drivers/CMSIS/Include/cmsis_gcc.h ****     s--;
1065:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
1066:Drivers/CMSIS/Include/cmsis_gcc.h ****   result <<= s;                        /* shift when v's highest bits are zero */
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1068:Drivers/CMSIS/Include/cmsis_gcc.h ****   return result;
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1073:Drivers/CMSIS/Include/cmsis_gcc.h ****   \brief   Count leading zeros
1074:Drivers/CMSIS/Include/cmsis_gcc.h ****   \details Counts the number of leading zeros of a data value.
1075:Drivers/CMSIS/Include/cmsis_gcc.h ****   \param [in]  value  Value to count the leading zeros
1076:Drivers/CMSIS/Include/cmsis_gcc.h ****   \return             number of leading zeros in value
ARM GAS  /tmp/ccDszoGN.s 			page 41


1077:Drivers/CMSIS/Include/cmsis_gcc.h ****  */
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1080:Drivers/CMSIS/Include/cmsis_gcc.h ****   /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
1081:Drivers/CMSIS/Include/cmsis_gcc.h ****      __builtin_clz(0) is undefined behaviour, so handle this case specially.
1082:Drivers/CMSIS/Include/cmsis_gcc.h ****      This guarantees ARM-compatible results if happening to compile on a non-ARM
1083:Drivers/CMSIS/Include/cmsis_gcc.h ****      target, and ensures the compiler doesn't decide to activate any
1084:Drivers/CMSIS/Include/cmsis_gcc.h ****      optimisations using the logic "value was passed to __builtin_clz, so it
1085:Drivers/CMSIS/Include/cmsis_gcc.h ****      is non-zero".
1086:Drivers/CMSIS/Include/cmsis_gcc.h ****      ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
1087:Drivers/CMSIS/Include/cmsis_gcc.h ****      single CLZ instruction.
1088:Drivers/CMSIS/Include/cmsis_gcc.h ****    */
1089:Drivers/CMSIS/Include/cmsis_gcc.h ****   if (value == 0U)
1090:Drivers/CMSIS/Include/cmsis_gcc.h ****   {
1091:Drivers/CMSIS/Include/cmsis_gcc.h ****     return 32U;
1092:Drivers/CMSIS/Include/cmsis_gcc.h ****   }
1093:Drivers/CMSIS/Include/cmsis_gcc.h ****   return __builtin_clz(value);
 571              		.loc 8 1093 0
 572 0004 B0FA80F2 		clz	r2, r0
 573              	.LVL71:
 574              	.LBE7:
 575              	.LBE6:
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   {
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     signBits1 = __CLZ(number) - 17;
 576              		.loc 7 68 0
 577 0008 113A     		subs	r2, r2, #17
 578 000a 92B2     		uxth	r2, r2
 579              	.LVL72:
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   q31_t bits_val1;
 580              		.loc 7 53 0
 581 000c 70B4     		push	{r4, r5, r6}
 582              	.LCFI8:
 583              		.cfi_def_cfa_offset 12
 584              		.cfi_offset 4, -12
 585              		.cfi_offset 5, -8
 586              		.cfi_offset 6, -4
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Shift by the number of signBits1 */
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     if ((signBits1 % 2) == 0)
 587              		.loc 7 71 0
 588 000e 12F00104 		ands	r4, r2, #1
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     {
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****       number = number << signBits1;
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     }
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     else
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     {
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****       number = number << (signBits1 - 1);
 589              		.loc 7 77 0
 590 0012 1ABF     		itte	ne
 591 0014 02F1FF33 		addne	r3, r2, #-1
 592 0018 9840     		lslne	r0, r0, r3
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     }
 593              		.loc 7 73 0
 594 001a 9040     		lsleq	r0, r0, r2
 595              		.loc 7 77 0
 596 001c 00B2     		sxth	r0, r0
 597              	.LVL73:
ARM GAS  /tmp/ccDszoGN.s 			page 42


  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     }
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Calculate half value of the number */
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     half = number >> 1;
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Store the number for later use */
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     temp1 = number;
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Convert to float */
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     temp_float1 = number * 3.051757812500000e-005f;
 598              		.loc 7 86 0
 599 001e 07EE900A 		vmov	s15, r0	@ int
 600 0022 FAEEE87A 		vcvt.f32.s32	s15, s15, #15
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Store as integer */
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     tempconv.floatval = temp_float1;
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     bits_val1 = tempconv.fracval;
  90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Subtract the shifted value from the magic number to give intial guess */
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
 601              		.loc 7 91 0
 602 0026 294B     		ldr	r3, .L53
 603 0028 17EE905A 		vmov	r5, s15	@ int
 604 002c A3EB6503 		sub	r3, r3, r5, asr #1
 605 0030 07EE903A 		vmov	s15, r3	@ int
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Store as float */
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     tempconv.fracval = bits_val1;
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     temp_float1 = tempconv.floatval;
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Convert to integer format */
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     var1 = (q31_t) (temp_float1 * 16384);
 606              		.loc 7 96 0
 607 0034 FEEEC97A 		vcvt.s32.f32	s15, s15, #14
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Store the number for later use */
 608              		.loc 7 81 0
 609 0038 4610     		asrs	r6, r0, #1
 610              	.LVL74:
 611              		.loc 7 96 0
 612 003a 17EE903A 		vmov	r3, s15	@ int
 613              	.LVL75:
 614 003e 1BB2     		sxth	r3, r3
 615              	.LVL76:
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
  98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* 1st iteration */
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                       ((((q15_t)
 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                          (((q31_t) var1 * var1) >> 15)) *
 616              		.loc 7 102 0
 617 0040 03FB03F5 		mul	r5, r3, r3
 618              	.LVL77:
 619 0044 ED13     		asrs	r5, r5, #15
 620 0046 15FB06F5 		smulbb	r5, r5, r6
 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                         (q31_t) half) >> 15))) >> 15)) << 2;
 621              		.loc 7 103 0
 622 004a ED13     		asrs	r5, r5, #15
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 623              		.loc 7 99 0
 624 004c C5F54055 		rsb	r5, r5, #12288
 625 0050 03FB05F3 		mul	r3, r3, r5
 626              	.LVL78:
ARM GAS  /tmp/ccDszoGN.s 			page 43


 627              		.loc 7 103 0
 628 0054 43F34F33 		sbfx	r3, r3, #13, #16
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 629              		.loc 7 99 0
 630 0058 23F00303 		bic	r3, r3, #3
 631              	.LVL79:
 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* 2nd iteration */
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                       ((((q15_t)
 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                          (((q31_t) var1 * var1) >> 15)) *
 632              		.loc 7 108 0
 633 005c 03FB03F5 		mul	r5, r3, r3
 634 0060 ED13     		asrs	r5, r5, #15
 635 0062 15FB06F5 		smulbb	r5, r5, r6
 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                         (q31_t) half) >> 15))) >> 15)) << 2;
 636              		.loc 7 109 0
 637 0066 ED13     		asrs	r5, r5, #15
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 638              		.loc 7 105 0
 639 0068 C5F54055 		rsb	r5, r5, #12288
 640 006c 03FB05F3 		mul	r3, r3, r5
 641              	.LVL80:
 642              		.loc 7 109 0
 643 0070 43F34F33 		sbfx	r3, r3, #13, #16
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 644              		.loc 7 105 0
 645 0074 23F00303 		bic	r3, r3, #3
 646              	.LVL81:
 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* 3rd iteration */
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                       ((((q15_t)
 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                          (((q31_t) var1 * var1) >> 15)) *
 647              		.loc 7 114 0
 648 0078 03FB03F5 		mul	r5, r3, r3
 649 007c ED13     		asrs	r5, r5, #15
 650 007e 15FB06F5 		smulbb	r5, r5, r6
 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                         (q31_t) half) >> 15))) >> 15)) << 2;
 651              		.loc 7 115 0
 652 0082 ED13     		asrs	r5, r5, #15
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****                                      ((q15_t)
 653              		.loc 7 111 0
 654 0084 C5F54055 		rsb	r5, r5, #12288
 655 0088 03FB05F3 		mul	r3, r3, r5
 656              	.LVL82:
 657              		.loc 7 115 0
 658 008c DB13     		asrs	r3, r3, #15
 659 008e 9B00     		lsls	r3, r3, #2
 660              	.LVL83:
 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Multiply the inverse square root with the original value */
 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1;
 661              		.loc 7 118 0
 662 0090 13FB00F3 		smulbb	r3, r3, r0
 663              	.LVL84:
 664 0094 43F38F33 		sbfx	r3, r3, #14, #16
ARM GAS  /tmp/ccDszoGN.s 			page 44


 665              	.LVL85:
 666 0098 23F00103 		bic	r3, r3, #1
 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     /* Shift the output down accordingly */
 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     if ((signBits1 % 2) == 0)
 667              		.loc 7 121 0
 668 009c 4CB1     		cbz	r4, .L52
 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     {
 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****       var1 = var1 >> (signBits1 / 2);
 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     }
 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     else
 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     {
 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****       var1 = var1 >> ((signBits1 - 1) / 2);
 669              		.loc 7 127 0
 670 009e 013A     		subs	r2, r2, #1
 671              	.LVL86:
 672 00a0 02EBD272 		add	r2, r2, r2, lsr #31
 673              	.LVL87:
 674 00a4 5210     		asrs	r2, r2, #1
 675 00a6 1341     		asrs	r3, r3, r2
 676 00a8 1BB2     		sxth	r3, r3
 677              	.LVL88:
 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     }
 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     *pOut = var1;
 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     return (ARM_MATH_SUCCESS);
 678              		.loc 7 131 0
 679 00aa 0020     		movs	r0, #0
 680              	.LVL89:
 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 681              		.loc 7 129 0
 682 00ac 0B80     		strh	r3, [r1]	@ movhi
 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   }
 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   /* If the number is a negative number then store zero as its square root value */
 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   else
 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   {
 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     *pOut = 0;
 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     return (ARM_MATH_ARGUMENT_ERROR);
 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   }
 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** }
 683              		.loc 7 140 0
 684 00ae 70BC     		pop	{r4, r5, r6}
 685              	.LCFI9:
 686              		.cfi_remember_state
 687              		.cfi_restore 6
 688              		.cfi_restore 5
 689              		.cfi_restore 4
 690              		.cfi_def_cfa_offset 0
 691              	.LVL90:
 692 00b0 7047     		bx	lr
 693              	.LVL91:
 694              	.L52:
 695              	.LCFI10:
 696              		.cfi_restore_state
 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****     }
 697              		.loc 7 123 0
ARM GAS  /tmp/ccDszoGN.s 			page 45


 698 00b2 42F34E02 		sbfx	r2, r2, #1, #15
 699              	.LVL92:
 700 00b6 1341     		asrs	r3, r3, r2
 701 00b8 1BB2     		sxth	r3, r3
 702              	.LVL93:
 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   }
 703              		.loc 7 131 0
 704 00ba 0020     		movs	r0, #0
 705              	.LVL94:
 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 706              		.loc 7 129 0
 707 00bc 0B80     		strh	r3, [r1]	@ movhi
 708              		.loc 7 140 0
 709 00be 70BC     		pop	{r4, r5, r6}
 710              	.LCFI11:
 711              		.cfi_restore 6
 712              		.cfi_restore 5
 713              		.cfi_restore 4
 714              		.cfi_def_cfa_offset 0
 715              	.LVL95:
 716 00c0 7047     		bx	lr
 717              	.LVL96:
 718              	.L42:
 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c **** 
 719              		.loc 7 136 0
 720 00c2 0023     		movs	r3, #0
 721 00c4 0B80     		strh	r3, [r1]	@ movhi
 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c ****   }
 722              		.loc 7 138 0
 723 00c6 4FF0FF30 		mov	r0, #-1
 724              		.loc 7 140 0
 725 00ca 7047     		bx	lr
 726              	.L54:
 727              		.align	2
 728              	.L53:
 729 00cc DF59375F 		.word	1597463007
 730              		.cfi_endproc
 731              	.LFE154:
 733              		.section	.text.arm_sqrt_q31,"ax",%progbits
 734              		.align	1
 735              		.p2align 2,,3
 736              		.global	arm_sqrt_q31
 737              		.syntax unified
 738              		.thumb
 739              		.thumb_func
 740              		.fpu fpv4-sp-d16
 742              	arm_sqrt_q31:
 743              	.LFB155:
 744              		.file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Title:        arm_sqrt_q31.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Description:  Q31 square root function
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * $Date:        18. March 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  *
ARM GAS  /tmp/ccDszoGN.s 			page 46


   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** /**
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @ingroup groupFastMath
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  */
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** /**
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @addtogroup SQRT
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @{
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  */
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** /**
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @brief         Q31 square root function.
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFF
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @param[out]    pOut  points to square root of input value
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   @return        execution status
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                    - \ref ARM_MATH_SUCCESS        : input value is positive
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                    - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****  */
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** arm_status arm_sqrt_q31(
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   q31_t in,
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   q31_t * pOut)
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** {
 745              		.loc 9 53 0
 746              		.cfi_startproc
 747              		@ args = 0, pretend = 0, frame = 0
 748              		@ frame_needed = 0, uses_anonymous_args = 0
 749              	.LVL97:
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   q31_t bits_val1;
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   q31_t number, temp1, var1, signBits1, half;
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   float32_t temp_float1;
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   union
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   {
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     q31_t fracval;
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     float32_t floatval;
ARM GAS  /tmp/ccDszoGN.s 			page 47


  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   } tempconv;
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   number = in;
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   /* If the input is a positive number then compute the signBits. */
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   if (number > 0)
 750              		.loc 9 66 0
 751 0000 0028     		cmp	r0, #0
 752 0002 6DDD     		ble	.L56
 753              	.LVL98:
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   q31_t bits_val1;
 754              		.loc 9 53 0
 755 0004 2DE9F043 		push	{r4, r5, r6, r7, r8, r9, lr}
 756              	.LCFI12:
 757              		.cfi_def_cfa_offset 28
 758              		.cfi_offset 4, -28
 759              		.cfi_offset 5, -24
 760              		.cfi_offset 6, -20
 761              		.cfi_offset 7, -16
 762              		.cfi_offset 8, -12
 763              		.cfi_offset 9, -8
 764              		.cfi_offset 14, -4
 765              	.LBB8:
 766              	.LBB9:
 767              		.loc 8 1093 0
 768 0008 B0FA80F6 		clz	r6, r0
 769              	.LVL99:
 770              	.LBE9:
 771              	.LBE8:
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   {
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     signBits1 = __CLZ(number) - 1;
 772              		.loc 9 68 0
 773 000c 771E     		subs	r7, r6, #1
 774              	.LVL100:
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Shift by the number of signBits1 */
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     if ((signBits1 % 2) == 0)
 775              		.loc 9 71 0
 776 000e 17F0010E 		ands	lr, r7, #1
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     {
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****       number = number << signBits1;
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     }
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     else
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     {
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****       number = number << (signBits1 - 1);
 777              		.loc 9 77 0
 778 0012 1ABF     		itte	ne
 779 0014 B31E     		subne	r3, r6, #2
 780 0016 9840     		lslne	r0, r0, r3
 781              	.LVL101:
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     }
 782              		.loc 9 73 0
 783 0018 B840     		lsleq	r0, r0, r7
 784              	.LVL102:
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     }
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Calculate half value of the number */
ARM GAS  /tmp/ccDszoGN.s 			page 48


  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     half = number >> 1;
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Store the number for later use */
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     temp1 = number;
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Convert to float */
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     temp_float1 = number * 4.6566128731e-010f;
 785              		.loc 9 86 0
 786 001a 07EE900A 		vmov	s15, r0	@ int
 787 001e FAEEE07A 		vcvt.f32.s32	s15, s15, #31
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Store as integer */
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     tempconv.floatval = temp_float1;
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     bits_val1 = tempconv.fracval;
  90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Subtract the shifted value from the magic number to give intial guess */
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
 788              		.loc 9 91 0
 789 0022 324B     		ldr	r3, .L67
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Store as integer */
 790              		.loc 9 86 0
 791 0024 17EE904A 		vmov	r4, s15
 792              		.loc 9 91 0
 793 0028 A3EB6404 		sub	r4, r3, r4, asr #1
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Store as float */
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     tempconv.fracval = bits_val1;
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     temp_float1 = tempconv.floatval;
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Convert to integer format */
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     var1 = (q31_t) (temp_float1 * 1073741824);
 794              		.loc 9 96 0
 795 002c 07EE904A 		vmov	s15, r4
 796 0030 FEEEC17A 		vcvt.s32.f32	s15, s15, #30
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Store the number for later use */
 797              		.loc 9 81 0
 798 0034 4FEA600C 		asr	ip, r0, #1
 799              	.LVL103:
 800              		.loc 9 96 0
 801 0038 17EE904A 		vmov	r4, s15	@ int
 802              	.LVL104:
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
  98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* 1st iteration */
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                       ((((q31_t)
 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                          (((q63_t) var1 * var1) >> 31)) *
 803              		.loc 9 102 0
 804 003c 84FB0489 		smull	r8, r9, r4, r4
 805 0040 4FEAD872 		lsr	r2, r8, #31
 806 0044 42EA4902 		orr	r2, r2, r9, lsl #1
 807 0048 8CFB0289 		smull	r8, r9, ip, r2
 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                         (q63_t) half) >> 31))) >> 31)) << 2;
 808              		.loc 9 103 0
 809 004c 4FEAD872 		lsr	r2, r8, #31
 810 0050 42EA4902 		orr	r2, r2, r9, lsl #1
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 811              		.loc 9 99 0
 812 0054 C2F14052 		rsb	r2, r2, #805306368
 813 0058 82FB0445 		smull	r4, r5, r2, r4
 814              	.LVL105:
 815              		.loc 9 103 0
ARM GAS  /tmp/ccDszoGN.s 			page 49


 816 005c E20F     		lsrs	r2, r4, #31
 817 005e 42EA4502 		orr	r2, r2, r5, lsl #1
  99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 818              		.loc 9 99 0
 819 0062 9300     		lsls	r3, r2, #2
 820              	.LVL106:
 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* 2nd iteration */
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                       ((((q31_t)
 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                          (((q63_t) var1 * var1) >> 31)) *
 821              		.loc 9 108 0
 822 0064 83FB0389 		smull	r8, r9, r3, r3
 823 0068 4FEAD874 		lsr	r4, r8, #31
 824 006c 44EA4904 		orr	r4, r4, r9, lsl #1
 825 0070 8CFB0445 		smull	r4, r5, ip, r4
 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                         (q63_t) half) >> 31))) >> 31)) << 2;
 826              		.loc 9 109 0
 827 0074 E20F     		lsrs	r2, r4, #31
 828 0076 42EA4502 		orr	r2, r2, r5, lsl #1
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 829              		.loc 9 105 0
 830 007a C2F14052 		rsb	r2, r2, #805306368
 831 007e 82FB0334 		smull	r3, r4, r2, r3
 832              	.LVL107:
 833              		.loc 9 109 0
 834 0082 DA0F     		lsrs	r2, r3, #31
 835 0084 42EA4402 		orr	r2, r2, r4, lsl #1
 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 836              		.loc 9 105 0
 837 0088 4FEA8208 		lsl	r8, r2, #2
 838              	.LVL108:
 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* 3rd iteration */
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                       ((((q31_t)
 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                          (((q63_t) var1 * var1) >> 31)) *
 839              		.loc 9 114 0
 840 008c 88FB0823 		smull	r2, r3, r8, r8
 841 0090 D40F     		lsrs	r4, r2, #31
 842 0092 44EA4304 		orr	r4, r4, r3, lsl #1
 843 0096 8CFB0445 		smull	r4, r5, ip, r4
 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                         (q63_t) half) >> 31))) >> 31)) << 2;
 844              		.loc 9 115 0
 845 009a E20F     		lsrs	r2, r4, #31
 846 009c 42EA4502 		orr	r2, r2, r5, lsl #1
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 847              		.loc 9 111 0
 848 00a0 C2F14052 		rsb	r2, r2, #805306368
 849 00a4 82FB0834 		smull	r3, r4, r2, r8
 850              		.loc 9 115 0
 851 00a8 DA0F     		lsrs	r2, r3, #31
 852 00aa 42EA4402 		orr	r2, r2, r4, lsl #1
 853              	.LVL109:
 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****                                      ((q31_t)
 854              		.loc 9 111 0
 855 00ae 9200     		lsls	r2, r2, #2
ARM GAS  /tmp/ccDszoGN.s 			page 50


 856              	.LVL110:
 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Multiply the inverse square root with the original value */
 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1;
 857              		.loc 9 118 0
 858 00b0 82FB0034 		smull	r3, r4, r2, r0
 859 00b4 DA0F     		lsrs	r2, r3, #31
 860              	.LVL111:
 861 00b6 42EA4402 		orr	r2, r2, r4, lsl #1
 862 00ba 5200     		lsls	r2, r2, #1
 863              	.LVL112:
 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     /* Shift the output down accordingly */
 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     if ((signBits1 % 2) == 0)
 864              		.loc 9 121 0
 865 00bc BEF1000F 		cmp	lr, #0
 866 00c0 08D0     		beq	.L66
 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     {
 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****       var1 = var1 >> (signBits1 / 2);
 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     }
 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     else
 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     {
 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****       var1 = var1 >> ((signBits1 - 1) / 2);
 867              		.loc 9 127 0
 868 00c2 023E     		subs	r6, r6, #2
 869 00c4 06EBD676 		add	r6, r6, r6, lsr #31
 870 00c8 7610     		asrs	r6, r6, #1
 871 00ca 3241     		asrs	r2, r2, r6
 872              	.LVL113:
 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     }
 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     *pOut = var1;
 873              		.loc 9 129 0
 874 00cc 0A60     		str	r2, [r1]
 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     return (ARM_MATH_SUCCESS);
 875              		.loc 9 131 0
 876 00ce 0020     		movs	r0, #0
 877              	.LVL114:
 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   }
 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   /* If the number is a negative number then store zero as its square root value */
 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   else
 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   {
 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     *pOut = 0;
 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     return (ARM_MATH_ARGUMENT_ERROR);
 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   }
 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** }
 878              		.loc 9 140 0
 879 00d0 BDE8F083 		pop	{r4, r5, r6, r7, r8, r9, pc}
 880              	.LVL115:
 881              	.L66:
 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****     }
 882              		.loc 9 123 0
 883 00d4 7F10     		asrs	r7, r7, #1
 884              	.LVL116:
 885 00d6 3A41     		asrs	r2, r2, r7
 886              	.LVL117:
ARM GAS  /tmp/ccDszoGN.s 			page 51


 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
 887              		.loc 9 129 0
 888 00d8 0A60     		str	r2, [r1]
 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   }
 889              		.loc 9 131 0
 890 00da 0020     		movs	r0, #0
 891              	.LVL118:
 892              		.loc 9 140 0
 893 00dc BDE8F083 		pop	{r4, r5, r6, r7, r8, r9, pc}
 894              	.LVL119:
 895              	.L56:
 896              	.LCFI13:
 897              		.cfi_def_cfa_offset 0
 898              		.cfi_restore 4
 899              		.cfi_restore 5
 900              		.cfi_restore 6
 901              		.cfi_restore 7
 902              		.cfi_restore 8
 903              		.cfi_restore 9
 904              		.cfi_restore 14
 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c **** 
 905              		.loc 9 136 0
 906 00e0 0023     		movs	r3, #0
 907 00e2 0B60     		str	r3, [r1]
 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c ****   }
 908              		.loc 9 138 0
 909 00e4 4FF0FF30 		mov	r0, #-1
 910              	.LVL120:
 911              		.loc 9 140 0
 912 00e8 7047     		bx	lr
 913              	.L68:
 914 00ea 00BF     		.align	2
 915              	.L67:
 916 00ec DF59375F 		.word	1597463007
 917              		.cfi_endproc
 918              	.LFE155:
 920              		.section	.text.arm_vexp_f32,"ax",%progbits
 921              		.align	1
 922              		.p2align 2,,3
 923              		.global	arm_vexp_f32
 924              		.syntax unified
 925              		.thumb
 926              		.thumb_func
 927              		.fpu fpv4-sp-d16
 929              	arm_vexp_f32:
 930              	.LFB156:
 931              		.file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Title:        arm_vlog_f32.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Description:  Fast vectorized log
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * $Date:        15. Octoboer 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * -------------------------------------------------------------------- */
ARM GAS  /tmp/ccDszoGN.s 			page 52


  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM) || defined(ARM_MATH_NEON) || defined(ARM_MA
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #include "arm_vec_math.h"
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #endif
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** void arm_vexp_f32(
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****   const float32_t * pSrc,
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****         float32_t * pDst,
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****         uint32_t blockSize)
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** {
 932              		.loc 10 40 0
 933              		.cfi_startproc
 934              		@ args = 0, pretend = 0, frame = 0
 935              		@ frame_needed = 0, uses_anonymous_args = 0
 936              	.LVL121:
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    uint32_t blkCnt; 
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    f32x4_t src;
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    f32x4_t dst;
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    blkCnt = blockSize >> 2;
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    while (blkCnt > 0U)
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    {
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       src = vld1q(pSrc);
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       dst = vexpq_f32(src);
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       vst1q(pDst, dst);
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       pSrc += 4;
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       pDst += 4;
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       /* Decrement loop counter */
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       blkCnt--;
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    }
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    blkCnt = blockSize & 3;
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #else
ARM GAS  /tmp/ccDszoGN.s 			page 53


  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTOR
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    f32x4_t src;
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    f32x4_t dst;
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    blkCnt = blockSize >> 2;
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    while (blkCnt > 0U)
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    {
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       src = vld1q_f32(pSrc);
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       dst = vexpq_f32(src);
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       vst1q_f32(pDst, dst);
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       pSrc += 4;
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       pDst += 4;
  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       /* Decrement loop counter */
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       blkCnt--;
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    }
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    blkCnt = blockSize & 3;
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #else
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    blkCnt = blockSize;
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #endif
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** #endif
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** 
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    while (blkCnt > 0U)
 937              		.loc 10 87 0
 938 0000 62B1     		cbz	r2, .L77
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    uint32_t blkCnt; 
 939              		.loc 10 40 0
 940 0002 70B5     		push	{r4, r5, r6, lr}
 941              	.LCFI14:
 942              		.cfi_def_cfa_offset 16
 943              		.cfi_offset 4, -16
 944              		.cfi_offset 5, -12
 945              		.cfi_offset 6, -8
 946              		.cfi_offset 14, -4
 947 0004 0646     		mov	r6, r0
 948 0006 0D46     		mov	r5, r1
 949 0008 1446     		mov	r4, r2
 950              	.LVL122:
 951              	.L71:
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    {
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       /* C = log(A) */
  90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****   
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       /* Calculate log and store result in destination buffer. */
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       *pDst++ = expf(*pSrc++);
 952              		.loc 10 92 0
 953 000a B6EC010A 		vldmia.32	r6!, {s0}
 954              	.LVL123:
 955 000e FFF7FEFF 		bl	expf
 956              	.LVL124:
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    {
 957              		.loc 10 87 0
 958 0012 013C     		subs	r4, r4, #1
 959              	.LVL125:
 960              		.loc 10 92 0
 961 0014 A5EC010A 		vstmia.32	r5!, {s0}
ARM GAS  /tmp/ccDszoGN.s 			page 54


 962              	.LVL126:
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    {
 963              		.loc 10 87 0
 964 0018 F7D1     		bne	.L71
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****   
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       /* Decrement loop counter */
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****       blkCnt--;
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c ****    }
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c **** }
 965              		.loc 10 97 0
 966 001a 70BD     		pop	{r4, r5, r6, pc}
 967              	.LVL127:
 968              	.L77:
 969              	.LCFI15:
 970              		.cfi_def_cfa_offset 0
 971              		.cfi_restore 4
 972              		.cfi_restore 5
 973              		.cfi_restore 6
 974              		.cfi_restore 14
 975 001c 7047     		bx	lr
 976              		.cfi_endproc
 977              	.LFE156:
 979 001e 00BF     		.section	.text.arm_vlog_f32,"ax",%progbits
 980              		.align	1
 981              		.p2align 2,,3
 982              		.global	arm_vlog_f32
 983              		.syntax unified
 984              		.thumb
 985              		.thumb_func
 986              		.fpu fpv4-sp-d16
 988              	arm_vlog_f32:
 989              	.LFB157:
 990              		.file 11 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c"
   1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** /* ----------------------------------------------------------------------
   2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Project:      CMSIS DSP Library
   3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Title:        arm_vlog_f32.c
   4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Description:  Fast vectorized log
   5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  *
   6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * $Date:        15. Octoboer 2019
   7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * $Revision:    V1.6.0
   8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  *
   9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Target Processor: Cortex-M cores
  10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * -------------------------------------------------------------------- */
  11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** /*
  12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
  13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  *
  14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * SPDX-License-Identifier: Apache-2.0
  15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  *
  16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Licensed under the Apache License, Version 2.0 (the License); you may
  17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * not use this file except in compliance with the License.
  18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * You may obtain a copy of the License at
  19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  *
  20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * www.apache.org/licenses/LICENSE-2.0
  21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  *
  22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * Unless required by applicable law or agreed to in writing, software
  23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ARM GAS  /tmp/ccDszoGN.s 			page 55


  25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * See the License for the specific language governing permissions and
  26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  * limitations under the License.
  27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****  */
  28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #include "arm_math.h"
  30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #include "arm_common_tables.h"
  31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM) || defined(ARM_MATH_NEON) || defined(ARM_MA
  33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #include "arm_vec_math.h"
  34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #endif
  35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** void arm_vlog_f32(
  37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****   const float32_t * pSrc,
  38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****         float32_t * pDst,
  39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****         uint32_t blockSize)
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** {
 991              		.loc 11 40 0
 992              		.cfi_startproc
 993              		@ args = 0, pretend = 0, frame = 0
 994              		@ frame_needed = 0, uses_anonymous_args = 0
 995              	.LVL128:
  41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    uint32_t blkCnt; 
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    f32x4_t src;
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    f32x4_t dst;
  46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    blkCnt = blockSize >> 2;
  48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    while (blkCnt > 0U)
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    {
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       src = vld1q(pSrc);
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       dst = vlogq_f32(src);
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       vst1q(pDst, dst);
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       pSrc += 4;
  56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       pDst += 4;
  57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       /* Decrement loop counter */
  58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       blkCnt--;
  59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    }
  60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    blkCnt = blockSize & 3;
  62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #else
  63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTOR
  64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    f32x4_t src;
  65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    f32x4_t dst;
  66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    blkCnt = blockSize >> 2;
  68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    while (blkCnt > 0U)
  70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    {
  71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       src = vld1q_f32(pSrc);
  72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       dst = vlogq_f32(src);
  73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       vst1q_f32(pDst, dst);
  74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       pSrc += 4;
  76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       pDst += 4;
ARM GAS  /tmp/ccDszoGN.s 			page 56


  77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       /* Decrement loop counter */
  78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       blkCnt--;
  79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    }
  80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    blkCnt = blockSize & 3;
  82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #else
  83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    blkCnt = blockSize;
  84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #endif
  85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** #endif
  86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** 
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    while (blkCnt > 0U)
 996              		.loc 11 87 0
 997 0000 62B1     		cbz	r2, .L88
  40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    uint32_t blkCnt; 
 998              		.loc 11 40 0
 999 0002 70B5     		push	{r4, r5, r6, lr}
 1000              	.LCFI16:
 1001              		.cfi_def_cfa_offset 16
 1002              		.cfi_offset 4, -16
 1003              		.cfi_offset 5, -12
 1004              		.cfi_offset 6, -8
 1005              		.cfi_offset 14, -4
 1006 0004 0646     		mov	r6, r0
 1007 0006 0D46     		mov	r5, r1
 1008 0008 1446     		mov	r4, r2
 1009              	.LVL129:
 1010              	.L82:
  88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    {
  89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       /* C = log(A) */
  90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****   
  91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       /* Calculate log and store result in destination buffer. */
  92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       *pDst++ = logf(*pSrc++);
 1011              		.loc 11 92 0
 1012 000a B6EC010A 		vldmia.32	r6!, {s0}
 1013              	.LVL130:
 1014 000e FFF7FEFF 		bl	logf
 1015              	.LVL131:
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    {
 1016              		.loc 11 87 0
 1017 0012 013C     		subs	r4, r4, #1
 1018              	.LVL132:
 1019              		.loc 11 92 0
 1020 0014 A5EC010A 		vstmia.32	r5!, {s0}
 1021              	.LVL133:
  87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    {
 1022              		.loc 11 87 0
 1023 0018 F7D1     		bne	.L82
  93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****   
  94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       /* Decrement loop counter */
  95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****       blkCnt--;
  96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c ****    }
  97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c **** }
 1024              		.loc 11 97 0
 1025 001a 70BD     		pop	{r4, r5, r6, pc}
 1026              	.LVL134:
 1027              	.L88:
 1028              	.LCFI17:
ARM GAS  /tmp/ccDszoGN.s 			page 57


 1029              		.cfi_def_cfa_offset 0
 1030              		.cfi_restore 4
 1031              		.cfi_restore 5
 1032              		.cfi_restore 6
 1033              		.cfi_restore 14
 1034 001c 7047     		bx	lr
 1035              		.cfi_endproc
 1036              	.LFE157:
 1038 001e 00BF     		.text
 1039              	.Letext0:
 1040              		.file 12 "/usr/include/newlib/machine/_default_types.h"
 1041              		.file 13 "/usr/include/newlib/sys/_stdint.h"
 1042              		.file 14 "/usr/include/newlib/sys/lock.h"
 1043              		.file 15 "/usr/include/newlib/sys/_types.h"
 1044              		.file 16 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h"
 1045              		.file 17 "/usr/include/newlib/sys/reent.h"
 1046              		.file 18 "/usr/include/newlib/math.h"
 1047              		.file 19 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h"
 1048              		.file 20 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h"
ARM GAS  /tmp/ccDszoGN.s 			page 58


DEFINED SYMBOLS
                            *ABS*:0000000000000000 FastMathFunctions.c
     /tmp/ccDszoGN.s:16     .text.arm_cos_f32:0000000000000000 $t
     /tmp/ccDszoGN.s:24     .text.arm_cos_f32:0000000000000000 arm_cos_f32
     /tmp/ccDszoGN.s:115    .text.arm_cos_f32:0000000000000090 $d
     /tmp/ccDszoGN.s:123    .text.arm_cos_q15:0000000000000000 $t
     /tmp/ccDszoGN.s:131    .text.arm_cos_q15:0000000000000000 arm_cos_q15
     /tmp/ccDszoGN.s:199    .text.arm_cos_q15:0000000000000048 $d
     /tmp/ccDszoGN.s:204    .text.arm_cos_q31:0000000000000000 $t
     /tmp/ccDszoGN.s:212    .text.arm_cos_q31:0000000000000000 arm_cos_q31
     /tmp/ccDszoGN.s:282    .text.arm_cos_q31:0000000000000040 $d
     /tmp/ccDszoGN.s:287    .text.arm_sin_f32:0000000000000000 $t
     /tmp/ccDszoGN.s:295    .text.arm_sin_f32:0000000000000000 arm_sin_f32
     /tmp/ccDszoGN.s:381    .text.arm_sin_f32:0000000000000084 $d
     /tmp/ccDszoGN.s:389    .text.arm_sin_q15:0000000000000000 $t
     /tmp/ccDszoGN.s:397    .text.arm_sin_q15:0000000000000000 arm_sin_q15
     /tmp/ccDszoGN.s:460    .text.arm_sin_q15:0000000000000040 $d
     /tmp/ccDszoGN.s:465    .text.arm_sin_q31:0000000000000000 $t
     /tmp/ccDszoGN.s:473    .text.arm_sin_q31:0000000000000000 arm_sin_q31
     /tmp/ccDszoGN.s:541    .text.arm_sin_q31:0000000000000044 $d
     /tmp/ccDszoGN.s:546    .text.arm_sqrt_q15:0000000000000000 $t
     /tmp/ccDszoGN.s:554    .text.arm_sqrt_q15:0000000000000000 arm_sqrt_q15
     /tmp/ccDszoGN.s:729    .text.arm_sqrt_q15:00000000000000cc $d
     /tmp/ccDszoGN.s:734    .text.arm_sqrt_q31:0000000000000000 $t
     /tmp/ccDszoGN.s:742    .text.arm_sqrt_q31:0000000000000000 arm_sqrt_q31
     /tmp/ccDszoGN.s:916    .text.arm_sqrt_q31:00000000000000ec $d
     /tmp/ccDszoGN.s:921    .text.arm_vexp_f32:0000000000000000 $t
     /tmp/ccDszoGN.s:929    .text.arm_vexp_f32:0000000000000000 arm_vexp_f32
     /tmp/ccDszoGN.s:980    .text.arm_vlog_f32:0000000000000000 $t
     /tmp/ccDszoGN.s:988    .text.arm_vlog_f32:0000000000000000 arm_vlog_f32

UNDEFINED SYMBOLS
sinTable_f32
sinTable_q15
sinTable_q31
expf
logf
