ARM GAS  /tmp/ccG6yNTx.s 			page 1


   1              		.cpu cortex-m4
   2              		.eabi_attribute 27, 1
   3              		.eabi_attribute 28, 1
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32g4xx_hal_msp.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.HAL_MspInit,"ax",%progbits
  16              		.align	1
  17              		.p2align 2,,3
  18              		.global	HAL_MspInit
  19              		.syntax unified
  20              		.thumb
  21              		.thumb_func
  22              		.fpu fpv4-sp-d16
  24              	HAL_MspInit:
  25              	.LFB329:
  26              		.file 1 "Core/Src/stm32g4xx_hal_msp.c"
   1:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Header */
   2:Core/Src/stm32g4xx_hal_msp.c **** /**
   3:Core/Src/stm32g4xx_hal_msp.c ****   ******************************************************************************
   4:Core/Src/stm32g4xx_hal_msp.c ****   * @file         stm32g4xx_hal_msp.c
   5:Core/Src/stm32g4xx_hal_msp.c ****   * @brief        This file provides code for the MSP Initialization
   6:Core/Src/stm32g4xx_hal_msp.c ****   *               and de-Initialization codes.
   7:Core/Src/stm32g4xx_hal_msp.c ****   ******************************************************************************
   8:Core/Src/stm32g4xx_hal_msp.c ****   * @attention
   9:Core/Src/stm32g4xx_hal_msp.c ****   *
  10:Core/Src/stm32g4xx_hal_msp.c ****   * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
  11:Core/Src/stm32g4xx_hal_msp.c ****   * All rights reserved.</center></h2>
  12:Core/Src/stm32g4xx_hal_msp.c ****   *
  13:Core/Src/stm32g4xx_hal_msp.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  14:Core/Src/stm32g4xx_hal_msp.c ****   * the "License"; You may not use this file except in compliance with the
  15:Core/Src/stm32g4xx_hal_msp.c ****   * License. You may obtain a copy of the License at:
  16:Core/Src/stm32g4xx_hal_msp.c ****   *                        opensource.org/licenses/BSD-3-Clause
  17:Core/Src/stm32g4xx_hal_msp.c ****   *
  18:Core/Src/stm32g4xx_hal_msp.c ****   ******************************************************************************
  19:Core/Src/stm32g4xx_hal_msp.c ****   */
  20:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Header */
  21:Core/Src/stm32g4xx_hal_msp.c **** 
  22:Core/Src/stm32g4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
  23:Core/Src/stm32g4xx_hal_msp.c **** #include "main.h"
  24:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
  25:Core/Src/stm32g4xx_hal_msp.c **** 
  26:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Includes */
  27:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc1;
  28:Core/Src/stm32g4xx_hal_msp.c **** 
  29:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_dac1_ch1;
  30:Core/Src/stm32g4xx_hal_msp.c **** 
  31:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_dac1_ch2;
  32:Core/Src/stm32g4xx_hal_msp.c **** 
ARM GAS  /tmp/ccG6yNTx.s 			page 2


  33:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
  34:Core/Src/stm32g4xx_hal_msp.c **** 
  35:Core/Src/stm32g4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
  36:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TD */
  37:Core/Src/stm32g4xx_hal_msp.c **** 
  38:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TD */
  39:Core/Src/stm32g4xx_hal_msp.c **** 
  40:Core/Src/stm32g4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
  41:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Define */
  42:Core/Src/stm32g4xx_hal_msp.c **** 
  43:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Define */
  44:Core/Src/stm32g4xx_hal_msp.c **** 
  45:Core/Src/stm32g4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
  46:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
  47:Core/Src/stm32g4xx_hal_msp.c **** 
  48:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Macro */
  49:Core/Src/stm32g4xx_hal_msp.c **** 
  50:Core/Src/stm32g4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
  51:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PV */
  52:Core/Src/stm32g4xx_hal_msp.c **** 
  53:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END PV */
  54:Core/Src/stm32g4xx_hal_msp.c **** 
  55:Core/Src/stm32g4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
  56:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
  57:Core/Src/stm32g4xx_hal_msp.c **** 
  58:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END PFP */
  59:Core/Src/stm32g4xx_hal_msp.c **** 
  60:Core/Src/stm32g4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
  61:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
  62:Core/Src/stm32g4xx_hal_msp.c **** 
  63:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
  64:Core/Src/stm32g4xx_hal_msp.c **** 
  65:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
  66:Core/Src/stm32g4xx_hal_msp.c **** 
  67:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END 0 */
  68:Core/Src/stm32g4xx_hal_msp.c **** /**
  69:Core/Src/stm32g4xx_hal_msp.c ****   * Initializes the Global MSP.
  70:Core/Src/stm32g4xx_hal_msp.c ****   */
  71:Core/Src/stm32g4xx_hal_msp.c **** void HAL_MspInit(void)
  72:Core/Src/stm32g4xx_hal_msp.c **** {
  27              		.loc 1 72 0
  28              		.cfi_startproc
  29              		@ args = 0, pretend = 0, frame = 8
  30              		@ frame_needed = 0, uses_anonymous_args = 0
  31              		@ link register save eliminated.
  32              	.LBB2:
  73:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 0 */
  74:Core/Src/stm32g4xx_hal_msp.c **** 
  75:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END MspInit 0 */
  76:Core/Src/stm32g4xx_hal_msp.c **** 
  77:Core/Src/stm32g4xx_hal_msp.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
  33              		.loc 1 77 0
  34 0000 0B4B     		ldr	r3, .L4
  35 0002 1A6E     		ldr	r2, [r3, #96]
  36 0004 42F00102 		orr	r2, r2, #1
  37 0008 1A66     		str	r2, [r3, #96]
  38 000a 1A6E     		ldr	r2, [r3, #96]
ARM GAS  /tmp/ccG6yNTx.s 			page 3


  39              	.LBE2:
  72:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 0 */
  40              		.loc 1 72 0
  41 000c 82B0     		sub	sp, sp, #8
  42              	.LCFI0:
  43              		.cfi_def_cfa_offset 8
  44              	.LBB3:
  45              		.loc 1 77 0
  46 000e 02F00102 		and	r2, r2, #1
  47 0012 0092     		str	r2, [sp]
  48 0014 009A     		ldr	r2, [sp]
  49              	.LBE3:
  50              	.LBB4:
  78:Core/Src/stm32g4xx_hal_msp.c ****   __HAL_RCC_PWR_CLK_ENABLE();
  51              		.loc 1 78 0
  52 0016 9A6D     		ldr	r2, [r3, #88]
  53 0018 42F08052 		orr	r2, r2, #268435456
  54 001c 9A65     		str	r2, [r3, #88]
  55 001e 9B6D     		ldr	r3, [r3, #88]
  56 0020 03F08053 		and	r3, r3, #268435456
  57 0024 0193     		str	r3, [sp, #4]
  58 0026 019B     		ldr	r3, [sp, #4]
  59              	.LBE4:
  79:Core/Src/stm32g4xx_hal_msp.c **** 
  80:Core/Src/stm32g4xx_hal_msp.c ****   /* System interrupt init*/
  81:Core/Src/stm32g4xx_hal_msp.c **** 
  82:Core/Src/stm32g4xx_hal_msp.c ****   /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
  83:Core/Src/stm32g4xx_hal_msp.c ****   */
  84:Core/Src/stm32g4xx_hal_msp.c ****   HAL_PWREx_DisableUCPDDeadBattery();
  85:Core/Src/stm32g4xx_hal_msp.c **** 
  86:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 1 */
  87:Core/Src/stm32g4xx_hal_msp.c **** 
  88:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END MspInit 1 */
  89:Core/Src/stm32g4xx_hal_msp.c **** }
  60              		.loc 1 89 0
  61 0028 02B0     		add	sp, sp, #8
  62              	.LCFI1:
  63              		.cfi_def_cfa_offset 0
  64              		@ sp needed
  84:Core/Src/stm32g4xx_hal_msp.c **** 
  65              		.loc 1 84 0
  66 002a FFF7FEBF 		b	HAL_PWREx_DisableUCPDDeadBattery
  67              	.LVL0:
  68              	.L5:
  69 002e 00BF     		.align	2
  70              	.L4:
  71 0030 00100240 		.word	1073876992
  72              		.cfi_endproc
  73              	.LFE329:
  75              		.section	.text.HAL_ADC_MspInit,"ax",%progbits
  76              		.align	1
  77              		.p2align 2,,3
  78              		.global	HAL_ADC_MspInit
  79              		.syntax unified
  80              		.thumb
  81              		.thumb_func
  82              		.fpu fpv4-sp-d16
ARM GAS  /tmp/ccG6yNTx.s 			page 4


  84              	HAL_ADC_MspInit:
  85              	.LFB330:
  90:Core/Src/stm32g4xx_hal_msp.c **** 
  91:Core/Src/stm32g4xx_hal_msp.c **** /**
  92:Core/Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP Initialization
  93:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
  94:Core/Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer
  95:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
  96:Core/Src/stm32g4xx_hal_msp.c **** */
  97:Core/Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  98:Core/Src/stm32g4xx_hal_msp.c **** {
  86              		.loc 1 98 0
  87              		.cfi_startproc
  88              		@ args = 0, pretend = 0, frame = 8
  89              		@ frame_needed = 0, uses_anonymous_args = 0
  90              	.LVL1:
  99:Core/Src/stm32g4xx_hal_msp.c ****   if(hadc->Instance==ADC1)
  91              		.loc 1 99 0
  92 0000 0368     		ldr	r3, [r0]
  93 0002 B3F1A04F 		cmp	r3, #1342177280
  94 0006 00D0     		beq	.L15
  95 0008 7047     		bx	lr
  96              	.L15:
  97              	.LBB5:
 100:Core/Src/stm32g4xx_hal_msp.c ****   {
 101:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspInit 0 */
 102:Core/Src/stm32g4xx_hal_msp.c **** 
 103:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END ADC1_MspInit 0 */
 104:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 105:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_ADC12_CLK_ENABLE();
  98              		.loc 1 105 0
  99 000a 03F17043 		add	r3, r3, #-268435456
 100 000e 03F50433 		add	r3, r3, #135168
 101              	.LBE5:
  98:Core/Src/stm32g4xx_hal_msp.c ****   if(hadc->Instance==ADC1)
 102              		.loc 1 98 0
 103 0012 70B5     		push	{r4, r5, r6, lr}
 104              	.LCFI2:
 105              		.cfi_def_cfa_offset 16
 106              		.cfi_offset 4, -16
 107              		.cfi_offset 5, -12
 108              		.cfi_offset 6, -8
 109              		.cfi_offset 14, -4
 110              	.LBB6:
 111              		.loc 1 105 0
 112 0014 DA6C     		ldr	r2, [r3, #76]
 113              	.LBE6:
 106:Core/Src/stm32g4xx_hal_msp.c **** 
 107:Core/Src/stm32g4xx_hal_msp.c ****     /* ADC1 DMA Init */
 108:Core/Src/stm32g4xx_hal_msp.c ****     /* ADC1 Init */
 109:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Instance = DMA1_Channel1;
 114              		.loc 1 109 0
 115 0016 184C     		ldr	r4, .L17
 116 0018 1849     		ldr	r1, .L17+4
 117              	.LBB7:
 105:Core/Src/stm32g4xx_hal_msp.c **** 
 118              		.loc 1 105 0
ARM GAS  /tmp/ccG6yNTx.s 			page 5


 119 001a 42F40052 		orr	r2, r2, #8192
 120 001e DA64     		str	r2, [r3, #76]
 121 0020 DB6C     		ldr	r3, [r3, #76]
 122              	.LBE7:
 123              		.loc 1 109 0
 124 0022 2160     		str	r1, [r4]
  98:Core/Src/stm32g4xx_hal_msp.c ****   if(hadc->Instance==ADC1)
 125              		.loc 1 98 0
 126 0024 82B0     		sub	sp, sp, #8
 127              	.LCFI3:
 128              		.cfi_def_cfa_offset 24
 129              	.LBB8:
 105:Core/Src/stm32g4xx_hal_msp.c **** 
 130              		.loc 1 105 0
 131 0026 03F40053 		and	r3, r3, #8192
 132 002a 0193     		str	r3, [sp, #4]
 133              	.LBE8:
 110:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
 134              		.loc 1 110 0
 135 002c 0522     		movs	r2, #5
 111:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 112:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 113:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 114:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
 136              		.loc 1 114 0
 137 002e 4FF48073 		mov	r3, #256
 138 0032 0546     		mov	r5, r0
 113:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
 139              		.loc 1 113 0
 140 0034 8020     		movs	r0, #128
 141              	.LVL2:
 115:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
 142              		.loc 1 115 0
 143 0036 4FF48061 		mov	r1, #1024
 110:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
 144              		.loc 1 110 0
 145 003a 6260     		str	r2, [r4, #4]
 113:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
 146              		.loc 1 113 0
 147 003c 2061     		str	r0, [r4, #16]
 116:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Mode = DMA_CIRCULAR;
 148              		.loc 1 116 0
 149 003e 2022     		movs	r2, #32
 114:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
 150              		.loc 1 114 0
 151 0040 6361     		str	r3, [r4, #20]
 117:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 118:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
 152              		.loc 1 118 0
 153 0042 2046     		mov	r0, r4
 111:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
 154              		.loc 1 111 0
 155 0044 0023     		movs	r3, #0
 156              	.LBB9:
 105:Core/Src/stm32g4xx_hal_msp.c **** 
 157              		.loc 1 105 0
 158 0046 019E     		ldr	r6, [sp, #4]
ARM GAS  /tmp/ccG6yNTx.s 			page 6


 159              	.LBE9:
 117:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 160              		.loc 1 117 0
 161 0048 2362     		str	r3, [r4, #32]
 116:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
 162              		.loc 1 116 0
 163 004a C4E90612 		strd	r1, r2, [r4, #24]
 112:Core/Src/stm32g4xx_hal_msp.c ****     hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
 164              		.loc 1 112 0
 165 004e C4E90233 		strd	r3, r3, [r4, #8]
 166              		.loc 1 118 0
 167 0052 FFF7FEFF 		bl	HAL_DMA_Init
 168              	.LVL3:
 169 0056 60B9     		cbnz	r0, .L16
 170              	.L8:
 119:Core/Src/stm32g4xx_hal_msp.c ****     {
 120:Core/Src/stm32g4xx_hal_msp.c ****       Error_Handler();
 121:Core/Src/stm32g4xx_hal_msp.c ****     }
 122:Core/Src/stm32g4xx_hal_msp.c **** 
 123:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
 124:Core/Src/stm32g4xx_hal_msp.c **** 
 125:Core/Src/stm32g4xx_hal_msp.c ****     /* ADC1 interrupt Init */
 126:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
 171              		.loc 1 126 0
 172 0058 0022     		movs	r2, #0
 123:Core/Src/stm32g4xx_hal_msp.c **** 
 173              		.loc 1 123 0
 174 005a 6C65     		str	r4, [r5, #84]
 175              		.loc 1 126 0
 176 005c 1146     		mov	r1, r2
 177 005e 1220     		movs	r0, #18
 123:Core/Src/stm32g4xx_hal_msp.c **** 
 178              		.loc 1 123 0
 179 0060 A562     		str	r5, [r4, #40]
 180              		.loc 1 126 0
 181 0062 FFF7FEFF 		bl	HAL_NVIC_SetPriority
 182              	.LVL4:
 127:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
 183              		.loc 1 127 0
 184 0066 1220     		movs	r0, #18
 128:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspInit 1 */
 129:Core/Src/stm32g4xx_hal_msp.c **** 
 130:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END ADC1_MspInit 1 */
 131:Core/Src/stm32g4xx_hal_msp.c ****   }
 132:Core/Src/stm32g4xx_hal_msp.c **** 
 133:Core/Src/stm32g4xx_hal_msp.c **** }
 185              		.loc 1 133 0
 186 0068 02B0     		add	sp, sp, #8
 187              	.LCFI4:
 188              		.cfi_remember_state
 189              		.cfi_def_cfa_offset 16
 190              		@ sp needed
 191 006a BDE87040 		pop	{r4, r5, r6, lr}
 192              	.LCFI5:
 193              		.cfi_restore 14
 194              		.cfi_restore 6
 195              		.cfi_restore 5
ARM GAS  /tmp/ccG6yNTx.s 			page 7


 196              		.cfi_restore 4
 197              		.cfi_def_cfa_offset 0
 198              	.LVL5:
 127:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
 199              		.loc 1 127 0
 200 006e FFF7FEBF 		b	HAL_NVIC_EnableIRQ
 201              	.LVL6:
 202              	.L16:
 203              	.LCFI6:
 204              		.cfi_restore_state
 120:Core/Src/stm32g4xx_hal_msp.c ****     }
 205              		.loc 1 120 0
 206 0072 FFF7FEFF 		bl	Error_Handler
 207              	.LVL7:
 208 0076 EFE7     		b	.L8
 209              	.L18:
 210              		.align	2
 211              	.L17:
 212 0078 00000000 		.word	hdma_adc1
 213 007c 08000240 		.word	1073872904
 214              		.cfi_endproc
 215              	.LFE330:
 217              		.section	.text.HAL_ADC_MspDeInit,"ax",%progbits
 218              		.align	1
 219              		.p2align 2,,3
 220              		.global	HAL_ADC_MspDeInit
 221              		.syntax unified
 222              		.thumb
 223              		.thumb_func
 224              		.fpu fpv4-sp-d16
 226              	HAL_ADC_MspDeInit:
 227              	.LFB331:
 134:Core/Src/stm32g4xx_hal_msp.c **** 
 135:Core/Src/stm32g4xx_hal_msp.c **** /**
 136:Core/Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP De-Initialization
 137:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 138:Core/Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer
 139:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 140:Core/Src/stm32g4xx_hal_msp.c **** */
 141:Core/Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
 142:Core/Src/stm32g4xx_hal_msp.c **** {
 228              		.loc 1 142 0
 229              		.cfi_startproc
 230              		@ args = 0, pretend = 0, frame = 0
 231              		@ frame_needed = 0, uses_anonymous_args = 0
 232              	.LVL8:
 233 0000 08B5     		push	{r3, lr}
 234              	.LCFI7:
 235              		.cfi_def_cfa_offset 8
 236              		.cfi_offset 3, -8
 237              		.cfi_offset 14, -4
 143:Core/Src/stm32g4xx_hal_msp.c ****   if(hadc->Instance==ADC1)
 238              		.loc 1 143 0
 239 0002 0368     		ldr	r3, [r0]
 240 0004 B3F1A04F 		cmp	r3, #1342177280
 241 0008 00D0     		beq	.L22
 144:Core/Src/stm32g4xx_hal_msp.c ****   {
ARM GAS  /tmp/ccG6yNTx.s 			page 8


 145:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspDeInit 0 */
 146:Core/Src/stm32g4xx_hal_msp.c **** 
 147:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END ADC1_MspDeInit 0 */
 148:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 149:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_ADC12_CLK_DISABLE();
 150:Core/Src/stm32g4xx_hal_msp.c **** 
 151:Core/Src/stm32g4xx_hal_msp.c ****     /* ADC1 DMA DeInit */
 152:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(hadc->DMA_Handle);
 153:Core/Src/stm32g4xx_hal_msp.c **** 
 154:Core/Src/stm32g4xx_hal_msp.c ****     /* ADC1 interrupt DeInit */
 155:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
 156:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspDeInit 1 */
 157:Core/Src/stm32g4xx_hal_msp.c **** 
 158:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END ADC1_MspDeInit 1 */
 159:Core/Src/stm32g4xx_hal_msp.c ****   }
 160:Core/Src/stm32g4xx_hal_msp.c **** 
 161:Core/Src/stm32g4xx_hal_msp.c **** }
 242              		.loc 1 161 0
 243 000a 08BD     		pop	{r3, pc}
 244              	.L22:
 149:Core/Src/stm32g4xx_hal_msp.c **** 
 245              		.loc 1 149 0
 246 000c 064A     		ldr	r2, .L23
 152:Core/Src/stm32g4xx_hal_msp.c **** 
 247              		.loc 1 152 0
 248 000e 406D     		ldr	r0, [r0, #84]
 249              	.LVL9:
 149:Core/Src/stm32g4xx_hal_msp.c **** 
 250              		.loc 1 149 0
 251 0010 D36C     		ldr	r3, [r2, #76]
 252 0012 23F40053 		bic	r3, r3, #8192
 253 0016 D364     		str	r3, [r2, #76]
 152:Core/Src/stm32g4xx_hal_msp.c **** 
 254              		.loc 1 152 0
 255 0018 FFF7FEFF 		bl	HAL_DMA_DeInit
 256              	.LVL10:
 155:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspDeInit 1 */
 257              		.loc 1 155 0
 258 001c 1220     		movs	r0, #18
 259              		.loc 1 161 0
 260 001e BDE80840 		pop	{r3, lr}
 261              	.LCFI8:
 262              		.cfi_restore 14
 263              		.cfi_restore 3
 264              		.cfi_def_cfa_offset 0
 155:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN ADC1_MspDeInit 1 */
 265              		.loc 1 155 0
 266 0022 FFF7FEBF 		b	HAL_NVIC_DisableIRQ
 267              	.LVL11:
 268              	.L24:
 269 0026 00BF     		.align	2
 270              	.L23:
 271 0028 00100240 		.word	1073876992
 272              		.cfi_endproc
 273              	.LFE331:
 275              		.section	.text.HAL_CORDIC_MspInit,"ax",%progbits
 276              		.align	1
ARM GAS  /tmp/ccG6yNTx.s 			page 9


 277              		.p2align 2,,3
 278              		.global	HAL_CORDIC_MspInit
 279              		.syntax unified
 280              		.thumb
 281              		.thumb_func
 282              		.fpu fpv4-sp-d16
 284              	HAL_CORDIC_MspInit:
 285              	.LFB332:
 162:Core/Src/stm32g4xx_hal_msp.c **** 
 163:Core/Src/stm32g4xx_hal_msp.c **** /**
 164:Core/Src/stm32g4xx_hal_msp.c **** * @brief CORDIC MSP Initialization
 165:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 166:Core/Src/stm32g4xx_hal_msp.c **** * @param hcordic: CORDIC handle pointer
 167:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 168:Core/Src/stm32g4xx_hal_msp.c **** */
 169:Core/Src/stm32g4xx_hal_msp.c **** void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
 170:Core/Src/stm32g4xx_hal_msp.c **** {
 286              		.loc 1 170 0
 287              		.cfi_startproc
 288              		@ args = 0, pretend = 0, frame = 8
 289              		@ frame_needed = 0, uses_anonymous_args = 0
 290              		@ link register save eliminated.
 291              	.LVL12:
 171:Core/Src/stm32g4xx_hal_msp.c ****   if(hcordic->Instance==CORDIC)
 292              		.loc 1 171 0
 293 0000 0268     		ldr	r2, [r0]
 294 0002 0A4B     		ldr	r3, .L32
 295 0004 9A42     		cmp	r2, r3
 296 0006 00D0     		beq	.L31
 297 0008 7047     		bx	lr
 298              	.L31:
 299              	.LBB10:
 172:Core/Src/stm32g4xx_hal_msp.c ****   {
 173:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN CORDIC_MspInit 0 */
 174:Core/Src/stm32g4xx_hal_msp.c **** 
 175:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END CORDIC_MspInit 0 */
 176:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 177:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_CORDIC_CLK_ENABLE();
 300              		.loc 1 177 0
 301 000a D3F84824 		ldr	r2, [r3, #1096]
 302 000e 42F00802 		orr	r2, r2, #8
 303 0012 C3F84824 		str	r2, [r3, #1096]
 304 0016 03F58063 		add	r3, r3, #1024
 305              	.LBE10:
 170:Core/Src/stm32g4xx_hal_msp.c ****   if(hcordic->Instance==CORDIC)
 306              		.loc 1 170 0
 307 001a 82B0     		sub	sp, sp, #8
 308              	.LCFI9:
 309              		.cfi_def_cfa_offset 8
 310              	.LBB11:
 311              		.loc 1 177 0
 312 001c 9B6C     		ldr	r3, [r3, #72]
 313 001e 03F00803 		and	r3, r3, #8
 314 0022 0193     		str	r3, [sp, #4]
 315 0024 019B     		ldr	r3, [sp, #4]
 316              	.LBE11:
 178:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN CORDIC_MspInit 1 */
ARM GAS  /tmp/ccG6yNTx.s 			page 10


 179:Core/Src/stm32g4xx_hal_msp.c **** 
 180:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END CORDIC_MspInit 1 */
 181:Core/Src/stm32g4xx_hal_msp.c ****   }
 182:Core/Src/stm32g4xx_hal_msp.c **** 
 183:Core/Src/stm32g4xx_hal_msp.c **** }
 317              		.loc 1 183 0
 318 0026 02B0     		add	sp, sp, #8
 319              	.LCFI10:
 320              		.cfi_def_cfa_offset 0
 321              		@ sp needed
 322 0028 7047     		bx	lr
 323              	.L33:
 324 002a 00BF     		.align	2
 325              	.L32:
 326 002c 000C0240 		.word	1073875968
 327              		.cfi_endproc
 328              	.LFE332:
 330              		.section	.text.HAL_CORDIC_MspDeInit,"ax",%progbits
 331              		.align	1
 332              		.p2align 2,,3
 333              		.global	HAL_CORDIC_MspDeInit
 334              		.syntax unified
 335              		.thumb
 336              		.thumb_func
 337              		.fpu fpv4-sp-d16
 339              	HAL_CORDIC_MspDeInit:
 340              	.LFB333:
 184:Core/Src/stm32g4xx_hal_msp.c **** 
 185:Core/Src/stm32g4xx_hal_msp.c **** /**
 186:Core/Src/stm32g4xx_hal_msp.c **** * @brief CORDIC MSP De-Initialization
 187:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 188:Core/Src/stm32g4xx_hal_msp.c **** * @param hcordic: CORDIC handle pointer
 189:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 190:Core/Src/stm32g4xx_hal_msp.c **** */
 191:Core/Src/stm32g4xx_hal_msp.c **** void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
 192:Core/Src/stm32g4xx_hal_msp.c **** {
 341              		.loc 1 192 0
 342              		.cfi_startproc
 343              		@ args = 0, pretend = 0, frame = 0
 344              		@ frame_needed = 0, uses_anonymous_args = 0
 345              		@ link register save eliminated.
 346              	.LVL13:
 193:Core/Src/stm32g4xx_hal_msp.c ****   if(hcordic->Instance==CORDIC)
 347              		.loc 1 193 0
 348 0000 0268     		ldr	r2, [r0]
 349 0002 044B     		ldr	r3, .L36
 350 0004 9A42     		cmp	r2, r3
 351 0006 04D1     		bne	.L34
 194:Core/Src/stm32g4xx_hal_msp.c ****   {
 195:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN CORDIC_MspDeInit 0 */
 196:Core/Src/stm32g4xx_hal_msp.c **** 
 197:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END CORDIC_MspDeInit 0 */
 198:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 199:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_CORDIC_CLK_DISABLE();
 352              		.loc 1 199 0
 353 0008 034A     		ldr	r2, .L36+4
 354 000a 936C     		ldr	r3, [r2, #72]
ARM GAS  /tmp/ccG6yNTx.s 			page 11


 355 000c 23F00803 		bic	r3, r3, #8
 356 0010 9364     		str	r3, [r2, #72]
 357              	.L34:
 200:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN CORDIC_MspDeInit 1 */
 201:Core/Src/stm32g4xx_hal_msp.c **** 
 202:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END CORDIC_MspDeInit 1 */
 203:Core/Src/stm32g4xx_hal_msp.c ****   }
 204:Core/Src/stm32g4xx_hal_msp.c **** 
 205:Core/Src/stm32g4xx_hal_msp.c **** }
 358              		.loc 1 205 0
 359 0012 7047     		bx	lr
 360              	.L37:
 361              		.align	2
 362              	.L36:
 363 0014 000C0240 		.word	1073875968
 364 0018 00100240 		.word	1073876992
 365              		.cfi_endproc
 366              	.LFE333:
 368              		.section	.text.HAL_DAC_MspInit,"ax",%progbits
 369              		.align	1
 370              		.p2align 2,,3
 371              		.global	HAL_DAC_MspInit
 372              		.syntax unified
 373              		.thumb
 374              		.thumb_func
 375              		.fpu fpv4-sp-d16
 377              	HAL_DAC_MspInit:
 378              	.LFB334:
 206:Core/Src/stm32g4xx_hal_msp.c **** 
 207:Core/Src/stm32g4xx_hal_msp.c **** /**
 208:Core/Src/stm32g4xx_hal_msp.c **** * @brief DAC MSP Initialization
 209:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 210:Core/Src/stm32g4xx_hal_msp.c **** * @param hdac: DAC handle pointer
 211:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 212:Core/Src/stm32g4xx_hal_msp.c **** */
 213:Core/Src/stm32g4xx_hal_msp.c **** void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
 214:Core/Src/stm32g4xx_hal_msp.c **** {
 379              		.loc 1 214 0
 380              		.cfi_startproc
 381              		@ args = 0, pretend = 0, frame = 32
 382              		@ frame_needed = 0, uses_anonymous_args = 0
 383              	.LVL14:
 384 0000 70B5     		push	{r4, r5, r6, lr}
 385              	.LCFI11:
 386              		.cfi_def_cfa_offset 16
 387              		.cfi_offset 4, -16
 388              		.cfi_offset 5, -12
 389              		.cfi_offset 6, -8
 390              		.cfi_offset 14, -4
 215:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 216:Core/Src/stm32g4xx_hal_msp.c ****   if(hdac->Instance==DAC1)
 391              		.loc 1 216 0
 392 0002 0268     		ldr	r2, [r0]
 393 0004 334B     		ldr	r3, .L52
 214:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 394              		.loc 1 214 0
 395 0006 88B0     		sub	sp, sp, #32
ARM GAS  /tmp/ccG6yNTx.s 			page 12


 396              	.LCFI12:
 397              		.cfi_def_cfa_offset 48
 215:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 398              		.loc 1 215 0
 399 0008 0024     		movs	r4, #0
 400              		.loc 1 216 0
 401 000a 9A42     		cmp	r2, r3
 215:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 402              		.loc 1 215 0
 403 000c CDE90344 		strd	r4, r4, [sp, #12]
 404 0010 CDE90544 		strd	r4, r4, [sp, #20]
 405 0014 0794     		str	r4, [sp, #28]
 406              		.loc 1 216 0
 407 0016 01D0     		beq	.L49
 217:Core/Src/stm32g4xx_hal_msp.c ****   {
 218:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN DAC1_MspInit 0 */
 219:Core/Src/stm32g4xx_hal_msp.c **** 
 220:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END DAC1_MspInit 0 */
 221:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 222:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_DAC1_CLK_ENABLE();
 223:Core/Src/stm32g4xx_hal_msp.c **** 
 224:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 225:Core/Src/stm32g4xx_hal_msp.c ****     /**DAC1 GPIO Configuration
 226:Core/Src/stm32g4xx_hal_msp.c ****     PA4     ------> DAC1_OUT1
 227:Core/Src/stm32g4xx_hal_msp.c ****     PA5     ------> DAC1_OUT2
 228:Core/Src/stm32g4xx_hal_msp.c ****     */
 229:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
 230:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 231:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 232:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 233:Core/Src/stm32g4xx_hal_msp.c **** 
 234:Core/Src/stm32g4xx_hal_msp.c ****     /* DAC1 DMA Init */
 235:Core/Src/stm32g4xx_hal_msp.c ****     /* DAC1_CH1 Init */
 236:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Instance = DMA1_Channel2;
 237:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
 238:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
 239:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
 240:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
 241:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 242:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 243:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
 244:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
 245:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
 246:Core/Src/stm32g4xx_hal_msp.c ****     {
 247:Core/Src/stm32g4xx_hal_msp.c ****       Error_Handler();
 248:Core/Src/stm32g4xx_hal_msp.c ****     }
 249:Core/Src/stm32g4xx_hal_msp.c **** 
 250:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_LINKDMA(hdac,DMA_Handle1,hdma_dac1_ch1);
 251:Core/Src/stm32g4xx_hal_msp.c **** 
 252:Core/Src/stm32g4xx_hal_msp.c ****     /* DAC1_CH2 Init */
 253:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Instance = DMA1_Channel4;
 254:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Request = DMA_REQUEST_DAC1_CHANNEL2;
 255:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
 256:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
 257:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
 258:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 259:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
ARM GAS  /tmp/ccG6yNTx.s 			page 13


 260:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Mode = DMA_CIRCULAR;
 261:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
 262:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_dac1_ch2) != HAL_OK)
 263:Core/Src/stm32g4xx_hal_msp.c ****     {
 264:Core/Src/stm32g4xx_hal_msp.c ****       Error_Handler();
 265:Core/Src/stm32g4xx_hal_msp.c ****     }
 266:Core/Src/stm32g4xx_hal_msp.c **** 
 267:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_LINKDMA(hdac,DMA_Handle2,hdma_dac1_ch2);
 268:Core/Src/stm32g4xx_hal_msp.c **** 
 269:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN DAC1_MspInit 1 */
 270:Core/Src/stm32g4xx_hal_msp.c **** 
 271:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END DAC1_MspInit 1 */
 272:Core/Src/stm32g4xx_hal_msp.c ****   }
 273:Core/Src/stm32g4xx_hal_msp.c **** 
 274:Core/Src/stm32g4xx_hal_msp.c **** }
 408              		.loc 1 274 0
 409 0018 08B0     		add	sp, sp, #32
 410              	.LCFI13:
 411              		.cfi_remember_state
 412              		.cfi_def_cfa_offset 16
 413              		@ sp needed
 414 001a 70BD     		pop	{r4, r5, r6, pc}
 415              	.L49:
 416              	.LCFI14:
 417              		.cfi_restore_state
 418              	.LBB12:
 222:Core/Src/stm32g4xx_hal_msp.c **** 
 419              		.loc 1 222 0
 420 001c 03F17043 		add	r3, r3, #-268435456
 421 0020 03F50233 		add	r3, r3, #133120
 422              	.LBE12:
 236:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
 423              		.loc 1 236 0
 424 0024 2C4D     		ldr	r5, .L52+4
 425              	.LBB13:
 222:Core/Src/stm32g4xx_hal_msp.c **** 
 426              		.loc 1 222 0
 427 0026 DA6C     		ldr	r2, [r3, #76]
 428 0028 42F48032 		orr	r2, r2, #65536
 429 002c DA64     		str	r2, [r3, #76]
 430 002e DA6C     		ldr	r2, [r3, #76]
 431 0030 02F48032 		and	r2, r2, #65536
 432 0034 0192     		str	r2, [sp, #4]
 433 0036 019A     		ldr	r2, [sp, #4]
 434              	.LBE13:
 435              	.LBB14:
 224:Core/Src/stm32g4xx_hal_msp.c ****     /**DAC1 GPIO Configuration
 436              		.loc 1 224 0
 437 0038 DA6C     		ldr	r2, [r3, #76]
 438 003a 42F00102 		orr	r2, r2, #1
 439 003e DA64     		str	r2, [r3, #76]
 440 0040 DB6C     		ldr	r3, [r3, #76]
 441 0042 03F00103 		and	r3, r3, #1
 442 0046 0293     		str	r3, [sp, #8]
 443              	.LBE14:
 229:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 444              		.loc 1 229 0
ARM GAS  /tmp/ccG6yNTx.s 			page 14


 445 0048 3022     		movs	r2, #48
 230:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 446              		.loc 1 230 0
 447 004a 0323     		movs	r3, #3
 232:Core/Src/stm32g4xx_hal_msp.c **** 
 448              		.loc 1 232 0
 449 004c 03A9     		add	r1, sp, #12
 450 004e 0646     		mov	r6, r0
 451              	.LBB15:
 224:Core/Src/stm32g4xx_hal_msp.c ****     /**DAC1 GPIO Configuration
 452              		.loc 1 224 0
 453 0050 0298     		ldr	r0, [sp, #8]
 454              	.LVL15:
 455              	.LBE15:
 229:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 456              		.loc 1 229 0
 457 0052 0392     		str	r2, [sp, #12]
 232:Core/Src/stm32g4xx_hal_msp.c **** 
 458              		.loc 1 232 0
 459 0054 4FF09040 		mov	r0, #1207959552
 230:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 460              		.loc 1 230 0
 461 0058 0493     		str	r3, [sp, #16]
 232:Core/Src/stm32g4xx_hal_msp.c **** 
 462              		.loc 1 232 0
 463 005a FFF7FEFF 		bl	HAL_GPIO_Init
 464              	.LVL16:
 236:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
 465              		.loc 1 236 0
 466 005e 1F49     		ldr	r1, .L52+8
 467 0060 2960     		str	r1, [r5]
 237:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
 468              		.loc 1 237 0
 469 0062 0622     		movs	r2, #6
 238:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
 470              		.loc 1 238 0
 471 0064 1023     		movs	r3, #16
 240:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 472              		.loc 1 240 0
 473 0066 8020     		movs	r0, #128
 241:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 474              		.loc 1 241 0
 475 0068 4FF40071 		mov	r1, #512
 237:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
 476              		.loc 1 237 0
 477 006c 6A60     		str	r2, [r5, #4]
 238:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
 478              		.loc 1 238 0
 479 006e AB60     		str	r3, [r5, #8]
 242:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
 480              		.loc 1 242 0
 481 0070 4FF40062 		mov	r2, #2048
 243:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
 482              		.loc 1 243 0
 483 0074 2023     		movs	r3, #32
 240:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 484              		.loc 1 240 0
ARM GAS  /tmp/ccG6yNTx.s 			page 15


 485 0076 2861     		str	r0, [r5, #16]
 245:Core/Src/stm32g4xx_hal_msp.c ****     {
 486              		.loc 1 245 0
 487 0078 2846     		mov	r0, r5
 239:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
 488              		.loc 1 239 0
 489 007a EC60     		str	r4, [r5, #12]
 244:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
 490              		.loc 1 244 0
 491 007c 2C62     		str	r4, [r5, #32]
 242:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
 492              		.loc 1 242 0
 493 007e C5E90512 		strd	r1, r2, [r5, #20]
 243:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
 494              		.loc 1 243 0
 495 0082 EB61     		str	r3, [r5, #28]
 245:Core/Src/stm32g4xx_hal_msp.c ****     {
 496              		.loc 1 245 0
 497 0084 FFF7FEFF 		bl	HAL_DMA_Init
 498              	.LVL17:
 499 0088 E8B9     		cbnz	r0, .L50
 500              	.L40:
 253:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Request = DMA_REQUEST_DAC1_CHANNEL2;
 501              		.loc 1 253 0
 502 008a 154C     		ldr	r4, .L52+12
 503 008c 154B     		ldr	r3, .L52+16
 504 008e 2360     		str	r3, [r4]
 254:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
 505              		.loc 1 254 0
 506 0090 0721     		movs	r1, #7
 255:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
 507              		.loc 1 255 0
 508 0092 1022     		movs	r2, #16
 257:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 509              		.loc 1 257 0
 510 0094 8020     		movs	r0, #128
 258:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 511              		.loc 1 258 0
 512 0096 4FF40073 		mov	r3, #512
 250:Core/Src/stm32g4xx_hal_msp.c **** 
 513              		.loc 1 250 0
 514 009a B560     		str	r5, [r6, #8]
 254:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
 515              		.loc 1 254 0
 516 009c 6160     		str	r1, [r4, #4]
 255:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
 517              		.loc 1 255 0
 518 009e A260     		str	r2, [r4, #8]
 259:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Mode = DMA_CIRCULAR;
 519              		.loc 1 259 0
 520 00a0 4FF40061 		mov	r1, #2048
 260:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
 521              		.loc 1 260 0
 522 00a4 2022     		movs	r2, #32
 257:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
 523              		.loc 1 257 0
 524 00a6 2061     		str	r0, [r4, #16]
ARM GAS  /tmp/ccG6yNTx.s 			page 16


 258:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
 525              		.loc 1 258 0
 526 00a8 6361     		str	r3, [r4, #20]
 262:Core/Src/stm32g4xx_hal_msp.c ****     {
 527              		.loc 1 262 0
 528 00aa 2046     		mov	r0, r4
 256:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
 529              		.loc 1 256 0
 530 00ac 0023     		movs	r3, #0
 250:Core/Src/stm32g4xx_hal_msp.c **** 
 531              		.loc 1 250 0
 532 00ae AE62     		str	r6, [r5, #40]
 260:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
 533              		.loc 1 260 0
 534 00b0 C4E90612 		strd	r1, r2, [r4, #24]
 256:Core/Src/stm32g4xx_hal_msp.c ****     hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
 535              		.loc 1 256 0
 536 00b4 E360     		str	r3, [r4, #12]
 261:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_dac1_ch2) != HAL_OK)
 537              		.loc 1 261 0
 538 00b6 2362     		str	r3, [r4, #32]
 262:Core/Src/stm32g4xx_hal_msp.c ****     {
 539              		.loc 1 262 0
 540 00b8 FFF7FEFF 		bl	HAL_DMA_Init
 541              	.LVL18:
 542 00bc 30B9     		cbnz	r0, .L51
 543              	.L41:
 267:Core/Src/stm32g4xx_hal_msp.c **** 
 544              		.loc 1 267 0
 545 00be F460     		str	r4, [r6, #12]
 546 00c0 A662     		str	r6, [r4, #40]
 547              		.loc 1 274 0
 548 00c2 08B0     		add	sp, sp, #32
 549              	.LCFI15:
 550              		.cfi_remember_state
 551              		.cfi_def_cfa_offset 16
 552              		@ sp needed
 553 00c4 70BD     		pop	{r4, r5, r6, pc}
 554              	.LVL19:
 555              	.L50:
 556              	.LCFI16:
 557              		.cfi_restore_state
 247:Core/Src/stm32g4xx_hal_msp.c ****     }
 558              		.loc 1 247 0
 559 00c6 FFF7FEFF 		bl	Error_Handler
 560              	.LVL20:
 561 00ca DEE7     		b	.L40
 562              	.L51:
 264:Core/Src/stm32g4xx_hal_msp.c ****     }
 563              		.loc 1 264 0
 564 00cc FFF7FEFF 		bl	Error_Handler
 565              	.LVL21:
 566 00d0 F5E7     		b	.L41
 567              	.L53:
 568 00d2 00BF     		.align	2
 569              	.L52:
 570 00d4 00080050 		.word	1342179328
ARM GAS  /tmp/ccG6yNTx.s 			page 17


 571 00d8 00000000 		.word	hdma_dac1_ch1
 572 00dc 1C000240 		.word	1073872924
 573 00e0 00000000 		.word	hdma_dac1_ch2
 574 00e4 44000240 		.word	1073872964
 575              		.cfi_endproc
 576              	.LFE334:
 578              		.section	.text.HAL_DAC_MspDeInit,"ax",%progbits
 579              		.align	1
 580              		.p2align 2,,3
 581              		.global	HAL_DAC_MspDeInit
 582              		.syntax unified
 583              		.thumb
 584              		.thumb_func
 585              		.fpu fpv4-sp-d16
 587              	HAL_DAC_MspDeInit:
 588              	.LFB335:
 275:Core/Src/stm32g4xx_hal_msp.c **** 
 276:Core/Src/stm32g4xx_hal_msp.c **** /**
 277:Core/Src/stm32g4xx_hal_msp.c **** * @brief DAC MSP De-Initialization
 278:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 279:Core/Src/stm32g4xx_hal_msp.c **** * @param hdac: DAC handle pointer
 280:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 281:Core/Src/stm32g4xx_hal_msp.c **** */
 282:Core/Src/stm32g4xx_hal_msp.c **** void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
 283:Core/Src/stm32g4xx_hal_msp.c **** {
 589              		.loc 1 283 0
 590              		.cfi_startproc
 591              		@ args = 0, pretend = 0, frame = 0
 592              		@ frame_needed = 0, uses_anonymous_args = 0
 593              	.LVL22:
 284:Core/Src/stm32g4xx_hal_msp.c ****   if(hdac->Instance==DAC1)
 594              		.loc 1 284 0
 595 0000 0C4B     		ldr	r3, .L60
 596 0002 0268     		ldr	r2, [r0]
 597 0004 9A42     		cmp	r2, r3
 598 0006 00D0     		beq	.L59
 599 0008 7047     		bx	lr
 600              	.L59:
 285:Core/Src/stm32g4xx_hal_msp.c ****   {
 286:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN DAC1_MspDeInit 0 */
 287:Core/Src/stm32g4xx_hal_msp.c **** 
 288:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END DAC1_MspDeInit 0 */
 289:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 290:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_DAC1_CLK_DISABLE();
 601              		.loc 1 290 0
 602 000a 0B4A     		ldr	r2, .L60+4
 283:Core/Src/stm32g4xx_hal_msp.c ****   if(hdac->Instance==DAC1)
 603              		.loc 1 283 0
 604 000c 10B5     		push	{r4, lr}
 605              	.LCFI17:
 606              		.cfi_def_cfa_offset 8
 607              		.cfi_offset 4, -8
 608              		.cfi_offset 14, -4
 609              		.loc 1 290 0
 610 000e D36C     		ldr	r3, [r2, #76]
 611 0010 0446     		mov	r4, r0
 612 0012 23F48033 		bic	r3, r3, #65536
ARM GAS  /tmp/ccG6yNTx.s 			page 18


 613 0016 D364     		str	r3, [r2, #76]
 291:Core/Src/stm32g4xx_hal_msp.c **** 
 292:Core/Src/stm32g4xx_hal_msp.c ****     /**DAC1 GPIO Configuration
 293:Core/Src/stm32g4xx_hal_msp.c ****     PA4     ------> DAC1_OUT1
 294:Core/Src/stm32g4xx_hal_msp.c ****     PA5     ------> DAC1_OUT2
 295:Core/Src/stm32g4xx_hal_msp.c ****     */
 296:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5);
 614              		.loc 1 296 0
 615 0018 3021     		movs	r1, #48
 616 001a 4FF09040 		mov	r0, #1207959552
 617              	.LVL23:
 618 001e FFF7FEFF 		bl	HAL_GPIO_DeInit
 619              	.LVL24:
 297:Core/Src/stm32g4xx_hal_msp.c **** 
 298:Core/Src/stm32g4xx_hal_msp.c ****     /* DAC1 DMA DeInit */
 299:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(hdac->DMA_Handle1);
 620              		.loc 1 299 0
 621 0022 A068     		ldr	r0, [r4, #8]
 622 0024 FFF7FEFF 		bl	HAL_DMA_DeInit
 623              	.LVL25:
 300:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(hdac->DMA_Handle2);
 624              		.loc 1 300 0
 625 0028 E068     		ldr	r0, [r4, #12]
 301:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN DAC1_MspDeInit 1 */
 302:Core/Src/stm32g4xx_hal_msp.c **** 
 303:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END DAC1_MspDeInit 1 */
 304:Core/Src/stm32g4xx_hal_msp.c ****   }
 305:Core/Src/stm32g4xx_hal_msp.c **** 
 306:Core/Src/stm32g4xx_hal_msp.c **** }
 626              		.loc 1 306 0
 627 002a BDE81040 		pop	{r4, lr}
 628              	.LCFI18:
 629              		.cfi_restore 14
 630              		.cfi_restore 4
 631              		.cfi_def_cfa_offset 0
 632              	.LVL26:
 300:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(hdac->DMA_Handle2);
 633              		.loc 1 300 0
 634 002e FFF7FEBF 		b	HAL_DMA_DeInit
 635              	.LVL27:
 636              	.L61:
 637 0032 00BF     		.align	2
 638              	.L60:
 639 0034 00080050 		.word	1342179328
 640 0038 00100240 		.word	1073876992
 641              		.cfi_endproc
 642              	.LFE335:
 644              		.section	.text.HAL_OPAMP_MspInit,"ax",%progbits
 645              		.align	1
 646              		.p2align 2,,3
 647              		.global	HAL_OPAMP_MspInit
 648              		.syntax unified
 649              		.thumb
 650              		.thumb_func
 651              		.fpu fpv4-sp-d16
 653              	HAL_OPAMP_MspInit:
 654              	.LFB336:
ARM GAS  /tmp/ccG6yNTx.s 			page 19


 307:Core/Src/stm32g4xx_hal_msp.c **** 
 308:Core/Src/stm32g4xx_hal_msp.c **** /**
 309:Core/Src/stm32g4xx_hal_msp.c **** * @brief OPAMP MSP Initialization
 310:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 311:Core/Src/stm32g4xx_hal_msp.c **** * @param hopamp: OPAMP handle pointer
 312:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 313:Core/Src/stm32g4xx_hal_msp.c **** */
 314:Core/Src/stm32g4xx_hal_msp.c **** void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
 315:Core/Src/stm32g4xx_hal_msp.c **** {
 655              		.loc 1 315 0
 656              		.cfi_startproc
 657              		@ args = 0, pretend = 0, frame = 24
 658              		@ frame_needed = 0, uses_anonymous_args = 0
 659              	.LVL28:
 660 0000 10B5     		push	{r4, lr}
 661              	.LCFI19:
 662              		.cfi_def_cfa_offset 8
 663              		.cfi_offset 4, -8
 664              		.cfi_offset 14, -4
 316:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 317:Core/Src/stm32g4xx_hal_msp.c ****   if(hopamp->Instance==OPAMP1)
 665              		.loc 1 317 0
 666 0002 0168     		ldr	r1, [r0]
 667 0004 114A     		ldr	r2, .L66
 315:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 668              		.loc 1 315 0
 669 0006 86B0     		sub	sp, sp, #24
 670              	.LCFI20:
 671              		.cfi_def_cfa_offset 32
 316:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 672              		.loc 1 316 0
 673 0008 0023     		movs	r3, #0
 674              		.loc 1 317 0
 675 000a 9142     		cmp	r1, r2
 316:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 676              		.loc 1 316 0
 677 000c CDE90133 		strd	r3, r3, [sp, #4]
 678 0010 CDE90333 		strd	r3, r3, [sp, #12]
 679 0014 0593     		str	r3, [sp, #20]
 680              		.loc 1 317 0
 681 0016 01D0     		beq	.L65
 318:Core/Src/stm32g4xx_hal_msp.c ****   {
 319:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN OPAMP1_MspInit 0 */
 320:Core/Src/stm32g4xx_hal_msp.c **** 
 321:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END OPAMP1_MspInit 0 */
 322:Core/Src/stm32g4xx_hal_msp.c **** 
 323:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 324:Core/Src/stm32g4xx_hal_msp.c ****     /**OPAMP1 GPIO Configuration
 325:Core/Src/stm32g4xx_hal_msp.c ****     PA1     ------> OPAMP1_VINP
 326:Core/Src/stm32g4xx_hal_msp.c ****     PA3     ------> OPAMP1_VINM0
 327:Core/Src/stm32g4xx_hal_msp.c ****     */
 328:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_3;
 329:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 330:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 331:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 332:Core/Src/stm32g4xx_hal_msp.c **** 
 333:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN OPAMP1_MspInit 1 */
ARM GAS  /tmp/ccG6yNTx.s 			page 20


 334:Core/Src/stm32g4xx_hal_msp.c **** 
 335:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END OPAMP1_MspInit 1 */
 336:Core/Src/stm32g4xx_hal_msp.c ****   }
 337:Core/Src/stm32g4xx_hal_msp.c **** 
 338:Core/Src/stm32g4xx_hal_msp.c **** }
 682              		.loc 1 338 0
 683 0018 06B0     		add	sp, sp, #24
 684              	.LCFI21:
 685              		.cfi_remember_state
 686              		.cfi_def_cfa_offset 8
 687              		@ sp needed
 688 001a 10BD     		pop	{r4, pc}
 689              	.L65:
 690              	.LCFI22:
 691              		.cfi_restore_state
 692              	.LBB16:
 323:Core/Src/stm32g4xx_hal_msp.c ****     /**OPAMP1 GPIO Configuration
 693              		.loc 1 323 0
 694 001c 03F18043 		add	r3, r3, #1073741824
 695 0020 03F50433 		add	r3, r3, #135168
 696              	.LBE16:
 331:Core/Src/stm32g4xx_hal_msp.c **** 
 697              		.loc 1 331 0
 698 0024 01A9     		add	r1, sp, #4
 699              	.LBB17:
 323:Core/Src/stm32g4xx_hal_msp.c ****     /**OPAMP1 GPIO Configuration
 700              		.loc 1 323 0
 701 0026 DA6C     		ldr	r2, [r3, #76]
 702 0028 42F00102 		orr	r2, r2, #1
 703 002c DA64     		str	r2, [r3, #76]
 704 002e DB6C     		ldr	r3, [r3, #76]
 705 0030 03F00103 		and	r3, r3, #1
 706 0034 0093     		str	r3, [sp]
 707              	.LBE17:
 328:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
 708              		.loc 1 328 0
 709 0036 0A22     		movs	r2, #10
 329:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 710              		.loc 1 329 0
 711 0038 0323     		movs	r3, #3
 331:Core/Src/stm32g4xx_hal_msp.c **** 
 712              		.loc 1 331 0
 713 003a 4FF09040 		mov	r0, #1207959552
 714              	.LVL29:
 715              	.LBB18:
 323:Core/Src/stm32g4xx_hal_msp.c ****     /**OPAMP1 GPIO Configuration
 716              		.loc 1 323 0
 717 003e 009C     		ldr	r4, [sp]
 718              	.LBE18:
 329:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 719              		.loc 1 329 0
 720 0040 CDE90123 		strd	r2, r3, [sp, #4]
 331:Core/Src/stm32g4xx_hal_msp.c **** 
 721              		.loc 1 331 0
 722 0044 FFF7FEFF 		bl	HAL_GPIO_Init
 723              	.LVL30:
 724              		.loc 1 338 0
ARM GAS  /tmp/ccG6yNTx.s 			page 21


 725 0048 06B0     		add	sp, sp, #24
 726              	.LCFI23:
 727              		.cfi_def_cfa_offset 8
 728              		@ sp needed
 729 004a 10BD     		pop	{r4, pc}
 730              	.L67:
 731              		.align	2
 732              	.L66:
 733 004c 00030140 		.word	1073808128
 734              		.cfi_endproc
 735              	.LFE336:
 737              		.section	.text.HAL_OPAMP_MspDeInit,"ax",%progbits
 738              		.align	1
 739              		.p2align 2,,3
 740              		.global	HAL_OPAMP_MspDeInit
 741              		.syntax unified
 742              		.thumb
 743              		.thumb_func
 744              		.fpu fpv4-sp-d16
 746              	HAL_OPAMP_MspDeInit:
 747              	.LFB337:
 339:Core/Src/stm32g4xx_hal_msp.c **** 
 340:Core/Src/stm32g4xx_hal_msp.c **** /**
 341:Core/Src/stm32g4xx_hal_msp.c **** * @brief OPAMP MSP De-Initialization
 342:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 343:Core/Src/stm32g4xx_hal_msp.c **** * @param hopamp: OPAMP handle pointer
 344:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 345:Core/Src/stm32g4xx_hal_msp.c **** */
 346:Core/Src/stm32g4xx_hal_msp.c **** void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
 347:Core/Src/stm32g4xx_hal_msp.c **** {
 748              		.loc 1 347 0
 749              		.cfi_startproc
 750              		@ args = 0, pretend = 0, frame = 0
 751              		@ frame_needed = 0, uses_anonymous_args = 0
 752              		@ link register save eliminated.
 753              	.LVL31:
 348:Core/Src/stm32g4xx_hal_msp.c ****   if(hopamp->Instance==OPAMP1)
 754              		.loc 1 348 0
 755 0000 0268     		ldr	r2, [r0]
 756 0002 044B     		ldr	r3, .L71
 757 0004 9A42     		cmp	r2, r3
 758 0006 00D0     		beq	.L70
 349:Core/Src/stm32g4xx_hal_msp.c ****   {
 350:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN OPAMP1_MspDeInit 0 */
 351:Core/Src/stm32g4xx_hal_msp.c **** 
 352:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END OPAMP1_MspDeInit 0 */
 353:Core/Src/stm32g4xx_hal_msp.c **** 
 354:Core/Src/stm32g4xx_hal_msp.c ****     /**OPAMP1 GPIO Configuration
 355:Core/Src/stm32g4xx_hal_msp.c ****     PA1     ------> OPAMP1_VINP
 356:Core/Src/stm32g4xx_hal_msp.c ****     PA3     ------> OPAMP1_VINM0
 357:Core/Src/stm32g4xx_hal_msp.c ****     */
 358:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_3);
 359:Core/Src/stm32g4xx_hal_msp.c **** 
 360:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN OPAMP1_MspDeInit 1 */
 361:Core/Src/stm32g4xx_hal_msp.c **** 
 362:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END OPAMP1_MspDeInit 1 */
 363:Core/Src/stm32g4xx_hal_msp.c ****   }
ARM GAS  /tmp/ccG6yNTx.s 			page 22


 364:Core/Src/stm32g4xx_hal_msp.c **** 
 365:Core/Src/stm32g4xx_hal_msp.c **** }
 759              		.loc 1 365 0
 760 0008 7047     		bx	lr
 761              	.L70:
 358:Core/Src/stm32g4xx_hal_msp.c **** 
 762              		.loc 1 358 0
 763 000a 0A21     		movs	r1, #10
 764 000c 4FF09040 		mov	r0, #1207959552
 765              	.LVL32:
 766 0010 FFF7FEBF 		b	HAL_GPIO_DeInit
 767              	.LVL33:
 768              	.L72:
 769              		.align	2
 770              	.L71:
 771 0014 00030140 		.word	1073808128
 772              		.cfi_endproc
 773              	.LFE337:
 775              		.section	.text.HAL_TIM_Base_MspInit,"ax",%progbits
 776              		.align	1
 777              		.p2align 2,,3
 778              		.global	HAL_TIM_Base_MspInit
 779              		.syntax unified
 780              		.thumb
 781              		.thumb_func
 782              		.fpu fpv4-sp-d16
 784              	HAL_TIM_Base_MspInit:
 785              	.LFB338:
 366:Core/Src/stm32g4xx_hal_msp.c **** 
 367:Core/Src/stm32g4xx_hal_msp.c **** /**
 368:Core/Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
 369:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 370:Core/Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
 371:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 372:Core/Src/stm32g4xx_hal_msp.c **** */
 373:Core/Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
 374:Core/Src/stm32g4xx_hal_msp.c **** {
 786              		.loc 1 374 0
 787              		.cfi_startproc
 788              		@ args = 0, pretend = 0, frame = 16
 789              		@ frame_needed = 0, uses_anonymous_args = 0
 790              	.LVL34:
 791 0000 00B5     		push	{lr}
 792              	.LCFI24:
 793              		.cfi_def_cfa_offset 4
 794              		.cfi_offset 14, -4
 375:Core/Src/stm32g4xx_hal_msp.c ****   if(htim_base->Instance==TIM6)
 795              		.loc 1 375 0
 796 0002 0368     		ldr	r3, [r0]
 797 0004 1D4A     		ldr	r2, .L81
 798 0006 9342     		cmp	r3, r2
 374:Core/Src/stm32g4xx_hal_msp.c ****   if(htim_base->Instance==TIM6)
 799              		.loc 1 374 0
 800 0008 85B0     		sub	sp, sp, #20
 801              	.LCFI25:
 802              		.cfi_def_cfa_offset 24
 803              		.loc 1 375 0
ARM GAS  /tmp/ccG6yNTx.s 			page 23


 804 000a 15D0     		beq	.L78
 376:Core/Src/stm32g4xx_hal_msp.c ****   {
 377:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM6_MspInit 0 */
 378:Core/Src/stm32g4xx_hal_msp.c **** 
 379:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM6_MspInit 0 */
 380:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 381:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM6_CLK_ENABLE();
 382:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM6_MspInit 1 */
 383:Core/Src/stm32g4xx_hal_msp.c **** 
 384:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM6_MspInit 1 */
 385:Core/Src/stm32g4xx_hal_msp.c ****   }
 386:Core/Src/stm32g4xx_hal_msp.c ****   else if(htim_base->Instance==TIM7)
 805              		.loc 1 386 0
 806 000c 1C4A     		ldr	r2, .L81+4
 807 000e 9342     		cmp	r3, r2
 808 0010 1FD0     		beq	.L79
 387:Core/Src/stm32g4xx_hal_msp.c ****   {
 388:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspInit 0 */
 389:Core/Src/stm32g4xx_hal_msp.c **** 
 390:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspInit 0 */
 391:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 392:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM7_CLK_ENABLE();
 393:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt Init */
 394:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
 395:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM7_IRQn);
 396:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspInit 1 */
 397:Core/Src/stm32g4xx_hal_msp.c **** 
 398:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspInit 1 */
 399:Core/Src/stm32g4xx_hal_msp.c ****   }
 400:Core/Src/stm32g4xx_hal_msp.c ****   else if(htim_base->Instance==TIM8)
 809              		.loc 1 400 0
 810 0012 1C4A     		ldr	r2, .L81+8
 811 0014 9342     		cmp	r3, r2
 812 0016 02D0     		beq	.L80
 401:Core/Src/stm32g4xx_hal_msp.c ****   {
 402:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM8_MspInit 0 */
 403:Core/Src/stm32g4xx_hal_msp.c **** 
 404:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM8_MspInit 0 */
 405:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 406:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM8_CLK_ENABLE();
 407:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM8_MspInit 1 */
 408:Core/Src/stm32g4xx_hal_msp.c **** 
 409:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM8_MspInit 1 */
 410:Core/Src/stm32g4xx_hal_msp.c ****   }
 411:Core/Src/stm32g4xx_hal_msp.c **** 
 412:Core/Src/stm32g4xx_hal_msp.c **** }
 813              		.loc 1 412 0
 814 0018 05B0     		add	sp, sp, #20
 815              	.LCFI26:
 816              		.cfi_remember_state
 817              		.cfi_def_cfa_offset 4
 818              		@ sp needed
 819 001a 5DF804FB 		ldr	pc, [sp], #4
 820              	.L80:
 821              	.LCFI27:
 822              		.cfi_restore_state
 823              	.LBB19:
ARM GAS  /tmp/ccG6yNTx.s 			page 24


 406:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM8_MspInit 1 */
 824              		.loc 1 406 0
 825 001e 1A4B     		ldr	r3, .L81+12
 826 0020 1A6E     		ldr	r2, [r3, #96]
 827 0022 42F40052 		orr	r2, r2, #8192
 828 0026 1A66     		str	r2, [r3, #96]
 829 0028 1B6E     		ldr	r3, [r3, #96]
 830 002a 03F40053 		and	r3, r3, #8192
 831 002e 0393     		str	r3, [sp, #12]
 832 0030 039B     		ldr	r3, [sp, #12]
 833              	.LBE19:
 834              		.loc 1 412 0
 835 0032 05B0     		add	sp, sp, #20
 836              	.LCFI28:
 837              		.cfi_remember_state
 838              		.cfi_def_cfa_offset 4
 839              		@ sp needed
 840 0034 5DF804FB 		ldr	pc, [sp], #4
 841              	.L78:
 842              	.LCFI29:
 843              		.cfi_restore_state
 844              	.LBB20:
 381:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM6_MspInit 1 */
 845              		.loc 1 381 0
 846 0038 134B     		ldr	r3, .L81+12
 847 003a 9A6D     		ldr	r2, [r3, #88]
 848 003c 42F01002 		orr	r2, r2, #16
 849 0040 9A65     		str	r2, [r3, #88]
 850 0042 9B6D     		ldr	r3, [r3, #88]
 851 0044 03F01003 		and	r3, r3, #16
 852 0048 0193     		str	r3, [sp, #4]
 853 004a 019B     		ldr	r3, [sp, #4]
 854              	.LBE20:
 855              		.loc 1 412 0
 856 004c 05B0     		add	sp, sp, #20
 857              	.LCFI30:
 858              		.cfi_remember_state
 859              		.cfi_def_cfa_offset 4
 860              		@ sp needed
 861 004e 5DF804FB 		ldr	pc, [sp], #4
 862              	.L79:
 863              	.LCFI31:
 864              		.cfi_restore_state
 865              	.LBB21:
 392:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt Init */
 866              		.loc 1 392 0
 867 0052 0D4B     		ldr	r3, .L81+12
 868 0054 9A6D     		ldr	r2, [r3, #88]
 869 0056 42F02002 		orr	r2, r2, #32
 870 005a 9A65     		str	r2, [r3, #88]
 871 005c 9B6D     		ldr	r3, [r3, #88]
 872              	.LBE21:
 394:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM7_IRQn);
 873              		.loc 1 394 0
 874 005e 0022     		movs	r2, #0
 875              	.LBB22:
 392:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt Init */
ARM GAS  /tmp/ccG6yNTx.s 			page 25


 876              		.loc 1 392 0
 877 0060 03F02003 		and	r3, r3, #32
 878 0064 0293     		str	r3, [sp, #8]
 879              	.LBE22:
 394:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM7_IRQn);
 880              		.loc 1 394 0
 881 0066 1146     		mov	r1, r2
 882 0068 3720     		movs	r0, #55
 883              	.LVL35:
 884              	.LBB23:
 392:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt Init */
 885              		.loc 1 392 0
 886 006a 029B     		ldr	r3, [sp, #8]
 887              	.LBE23:
 394:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(TIM7_IRQn);
 888              		.loc 1 394 0
 889 006c FFF7FEFF 		bl	HAL_NVIC_SetPriority
 890              	.LVL36:
 395:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspInit 1 */
 891              		.loc 1 395 0
 892 0070 3720     		movs	r0, #55
 893              		.loc 1 412 0
 894 0072 05B0     		add	sp, sp, #20
 895              	.LCFI32:
 896              		.cfi_def_cfa_offset 4
 897              		@ sp needed
 898 0074 5DF804EB 		ldr	lr, [sp], #4
 899              	.LCFI33:
 900              		.cfi_restore 14
 901              		.cfi_def_cfa_offset 0
 395:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspInit 1 */
 902              		.loc 1 395 0
 903 0078 FFF7FEBF 		b	HAL_NVIC_EnableIRQ
 904              	.LVL37:
 905              	.L82:
 906              		.align	2
 907              	.L81:
 908 007c 00100040 		.word	1073745920
 909 0080 00140040 		.word	1073746944
 910 0084 00340140 		.word	1073820672
 911 0088 00100240 		.word	1073876992
 912              		.cfi_endproc
 913              	.LFE338:
 915              		.section	.text.HAL_TIM_Base_MspDeInit,"ax",%progbits
 916              		.align	1
 917              		.p2align 2,,3
 918              		.global	HAL_TIM_Base_MspDeInit
 919              		.syntax unified
 920              		.thumb
 921              		.thumb_func
 922              		.fpu fpv4-sp-d16
 924              	HAL_TIM_Base_MspDeInit:
 925              	.LFB339:
 413:Core/Src/stm32g4xx_hal_msp.c **** 
 414:Core/Src/stm32g4xx_hal_msp.c **** /**
 415:Core/Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
 416:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
ARM GAS  /tmp/ccG6yNTx.s 			page 26


 417:Core/Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
 418:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 419:Core/Src/stm32g4xx_hal_msp.c **** */
 420:Core/Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
 421:Core/Src/stm32g4xx_hal_msp.c **** {
 926              		.loc 1 421 0
 927              		.cfi_startproc
 928              		@ args = 0, pretend = 0, frame = 0
 929              		@ frame_needed = 0, uses_anonymous_args = 0
 930              		@ link register save eliminated.
 931              	.LVL38:
 422:Core/Src/stm32g4xx_hal_msp.c ****   if(htim_base->Instance==TIM6)
 932              		.loc 1 422 0
 933 0000 0368     		ldr	r3, [r0]
 934 0002 104A     		ldr	r2, .L90
 935 0004 9342     		cmp	r3, r2
 936 0006 0DD0     		beq	.L87
 423:Core/Src/stm32g4xx_hal_msp.c ****   {
 424:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM6_MspDeInit 0 */
 425:Core/Src/stm32g4xx_hal_msp.c **** 
 426:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM6_MspDeInit 0 */
 427:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 428:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM6_CLK_DISABLE();
 429:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM6_MspDeInit 1 */
 430:Core/Src/stm32g4xx_hal_msp.c **** 
 431:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM6_MspDeInit 1 */
 432:Core/Src/stm32g4xx_hal_msp.c ****   }
 433:Core/Src/stm32g4xx_hal_msp.c ****   else if(htim_base->Instance==TIM7)
 937              		.loc 1 433 0
 938 0008 0F4A     		ldr	r2, .L90+4
 939 000a 9342     		cmp	r3, r2
 940 000c 11D0     		beq	.L88
 434:Core/Src/stm32g4xx_hal_msp.c ****   {
 435:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 0 */
 436:Core/Src/stm32g4xx_hal_msp.c **** 
 437:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspDeInit 0 */
 438:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 439:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM7_CLK_DISABLE();
 440:Core/Src/stm32g4xx_hal_msp.c **** 
 441:Core/Src/stm32g4xx_hal_msp.c ****     /* TIM7 interrupt DeInit */
 442:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(TIM7_IRQn);
 443:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 1 */
 444:Core/Src/stm32g4xx_hal_msp.c **** 
 445:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM7_MspDeInit 1 */
 446:Core/Src/stm32g4xx_hal_msp.c ****   }
 447:Core/Src/stm32g4xx_hal_msp.c ****   else if(htim_base->Instance==TIM8)
 941              		.loc 1 447 0
 942 000e 0F4A     		ldr	r2, .L90+8
 943 0010 9342     		cmp	r3, r2
 944 0012 00D0     		beq	.L89
 448:Core/Src/stm32g4xx_hal_msp.c ****   {
 449:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM8_MspDeInit 0 */
 450:Core/Src/stm32g4xx_hal_msp.c **** 
 451:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM8_MspDeInit 0 */
 452:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
 453:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_TIM8_CLK_DISABLE();
 454:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM8_MspDeInit 1 */
ARM GAS  /tmp/ccG6yNTx.s 			page 27


 455:Core/Src/stm32g4xx_hal_msp.c **** 
 456:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END TIM8_MspDeInit 1 */
 457:Core/Src/stm32g4xx_hal_msp.c ****   }
 458:Core/Src/stm32g4xx_hal_msp.c **** 
 459:Core/Src/stm32g4xx_hal_msp.c **** }
 945              		.loc 1 459 0
 946 0014 7047     		bx	lr
 947              	.L89:
 453:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM8_MspDeInit 1 */
 948              		.loc 1 453 0
 949 0016 02F55C42 		add	r2, r2, #56320
 950 001a 136E     		ldr	r3, [r2, #96]
 951 001c 23F40053 		bic	r3, r3, #8192
 952 0020 1366     		str	r3, [r2, #96]
 953              		.loc 1 459 0
 954 0022 7047     		bx	lr
 955              	.L87:
 428:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM6_MspDeInit 1 */
 956              		.loc 1 428 0
 957 0024 02F50032 		add	r2, r2, #131072
 958 0028 936D     		ldr	r3, [r2, #88]
 959 002a 23F01003 		bic	r3, r3, #16
 960 002e 9365     		str	r3, [r2, #88]
 961 0030 7047     		bx	lr
 962              	.L88:
 439:Core/Src/stm32g4xx_hal_msp.c **** 
 963              		.loc 1 439 0
 964 0032 02F5FE32 		add	r2, r2, #130048
 442:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 1 */
 965              		.loc 1 442 0
 966 0036 3720     		movs	r0, #55
 967              	.LVL39:
 439:Core/Src/stm32g4xx_hal_msp.c **** 
 968              		.loc 1 439 0
 969 0038 936D     		ldr	r3, [r2, #88]
 970 003a 23F02003 		bic	r3, r3, #32
 971 003e 9365     		str	r3, [r2, #88]
 442:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN TIM7_MspDeInit 1 */
 972              		.loc 1 442 0
 973 0040 FFF7FEBF 		b	HAL_NVIC_DisableIRQ
 974              	.LVL40:
 975              	.L91:
 976              		.align	2
 977              	.L90:
 978 0044 00100040 		.word	1073745920
 979 0048 00140040 		.word	1073746944
 980 004c 00340140 		.word	1073820672
 981              		.cfi_endproc
 982              	.LFE339:
 984              		.section	.text.HAL_UART_MspInit,"ax",%progbits
 985              		.align	1
 986              		.p2align 2,,3
 987              		.global	HAL_UART_MspInit
 988              		.syntax unified
 989              		.thumb
 990              		.thumb_func
 991              		.fpu fpv4-sp-d16
ARM GAS  /tmp/ccG6yNTx.s 			page 28


 993              	HAL_UART_MspInit:
 994              	.LFB340:
 460:Core/Src/stm32g4xx_hal_msp.c **** 
 461:Core/Src/stm32g4xx_hal_msp.c **** /**
 462:Core/Src/stm32g4xx_hal_msp.c **** * @brief UART MSP Initialization
 463:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
 464:Core/Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
 465:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 466:Core/Src/stm32g4xx_hal_msp.c **** */
 467:Core/Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
 468:Core/Src/stm32g4xx_hal_msp.c **** {
 995              		.loc 1 468 0
 996              		.cfi_startproc
 997              		@ args = 0, pretend = 0, frame = 32
 998              		@ frame_needed = 0, uses_anonymous_args = 0
 999              	.LVL41:
 1000 0000 70B5     		push	{r4, r5, r6, lr}
 1001              	.LCFI34:
 1002              		.cfi_def_cfa_offset 16
 1003              		.cfi_offset 4, -16
 1004              		.cfi_offset 5, -12
 1005              		.cfi_offset 6, -8
 1006              		.cfi_offset 14, -4
 469:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 470:Core/Src/stm32g4xx_hal_msp.c ****   if(huart->Instance==USART1)
 1007              		.loc 1 470 0
 1008 0002 0268     		ldr	r2, [r0]
 1009 0004 264B     		ldr	r3, .L101
 468:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 1010              		.loc 1 468 0
 1011 0006 88B0     		sub	sp, sp, #32
 1012              	.LCFI35:
 1013              		.cfi_def_cfa_offset 48
 469:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 1014              		.loc 1 469 0
 1015 0008 0024     		movs	r4, #0
 1016              		.loc 1 470 0
 1017 000a 9A42     		cmp	r2, r3
 469:Core/Src/stm32g4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
 1018              		.loc 1 469 0
 1019 000c CDE90344 		strd	r4, r4, [sp, #12]
 1020 0010 CDE90544 		strd	r4, r4, [sp, #20]
 1021 0014 0794     		str	r4, [sp, #28]
 1022              		.loc 1 470 0
 1023 0016 01D0     		beq	.L99
 471:Core/Src/stm32g4xx_hal_msp.c ****   {
 472:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 0 */
 473:Core/Src/stm32g4xx_hal_msp.c **** 
 474:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspInit 0 */
 475:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock enable */
 476:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_USART1_CLK_ENABLE();
 477:Core/Src/stm32g4xx_hal_msp.c **** 
 478:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
 479:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 480:Core/Src/stm32g4xx_hal_msp.c ****     PA9     ------> USART1_TX
 481:Core/Src/stm32g4xx_hal_msp.c ****     PA10     ------> USART1_RX
 482:Core/Src/stm32g4xx_hal_msp.c ****     */
ARM GAS  /tmp/ccG6yNTx.s 			page 29


 483:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
 484:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 485:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 486:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
 487:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
 488:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 489:Core/Src/stm32g4xx_hal_msp.c **** 
 490:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 DMA Init */
 491:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1_TX Init */
 492:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Instance = DMA1_Channel5;
 493:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
 494:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 495:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 496:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 497:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 498:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
 499:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Mode = DMA_NORMAL;
 500:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
 501:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 502:Core/Src/stm32g4xx_hal_msp.c ****     {
 503:Core/Src/stm32g4xx_hal_msp.c ****       Error_Handler();
 504:Core/Src/stm32g4xx_hal_msp.c ****     }
 505:Core/Src/stm32g4xx_hal_msp.c **** 
 506:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
 507:Core/Src/stm32g4xx_hal_msp.c **** 
 508:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 interrupt Init */
 509:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
 510:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 511:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 1 */
 512:Core/Src/stm32g4xx_hal_msp.c **** 
 513:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspInit 1 */
 514:Core/Src/stm32g4xx_hal_msp.c ****   }
 515:Core/Src/stm32g4xx_hal_msp.c **** 
 516:Core/Src/stm32g4xx_hal_msp.c **** }
 1024              		.loc 1 516 0
 1025 0018 08B0     		add	sp, sp, #32
 1026              	.LCFI36:
 1027              		.cfi_remember_state
 1028              		.cfi_def_cfa_offset 16
 1029              		@ sp needed
 1030 001a 70BD     		pop	{r4, r5, r6, pc}
 1031              	.L99:
 1032              	.LCFI37:
 1033              		.cfi_restore_state
 1034              	.LBB24:
 476:Core/Src/stm32g4xx_hal_msp.c **** 
 1035              		.loc 1 476 0
 1036 001c 03F55843 		add	r3, r3, #55296
 1037              	.LBE24:
 492:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
 1038              		.loc 1 492 0
 1039 0020 204D     		ldr	r5, .L101+4
 1040              	.LBB25:
 476:Core/Src/stm32g4xx_hal_msp.c **** 
 1041              		.loc 1 476 0
 1042 0022 1A6E     		ldr	r2, [r3, #96]
 1043 0024 42F48042 		orr	r2, r2, #16384
ARM GAS  /tmp/ccG6yNTx.s 			page 30


 1044 0028 1A66     		str	r2, [r3, #96]
 1045 002a 1A6E     		ldr	r2, [r3, #96]
 1046 002c 02F48042 		and	r2, r2, #16384
 1047 0030 0192     		str	r2, [sp, #4]
 1048 0032 019A     		ldr	r2, [sp, #4]
 1049              	.LBE25:
 1050              	.LBB26:
 478:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 1051              		.loc 1 478 0
 1052 0034 DA6C     		ldr	r2, [r3, #76]
 1053 0036 42F00102 		orr	r2, r2, #1
 1054 003a DA64     		str	r2, [r3, #76]
 1055 003c DB6C     		ldr	r3, [r3, #76]
 1056 003e 03F00103 		and	r3, r3, #1
 1057 0042 0293     		str	r3, [sp, #8]
 1058              	.LBE26:
 483:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 1059              		.loc 1 483 0
 1060 0044 4FF4C063 		mov	r3, #1536
 484:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 1061              		.loc 1 484 0
 1062 0048 0222     		movs	r2, #2
 488:Core/Src/stm32g4xx_hal_msp.c **** 
 1063              		.loc 1 488 0
 1064 004a 03A9     		add	r1, sp, #12
 483:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
 1065              		.loc 1 483 0
 1066 004c 0393     		str	r3, [sp, #12]
 1067 004e 0646     		mov	r6, r0
 487:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 1068              		.loc 1 487 0
 1069 0050 0723     		movs	r3, #7
 1070              	.LBB27:
 478:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 1071              		.loc 1 478 0
 1072 0052 0298     		ldr	r0, [sp, #8]
 1073              	.LVL42:
 1074              	.LBE27:
 484:Core/Src/stm32g4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
 1075              		.loc 1 484 0
 1076 0054 0492     		str	r2, [sp, #16]
 488:Core/Src/stm32g4xx_hal_msp.c **** 
 1077              		.loc 1 488 0
 1078 0056 4FF09040 		mov	r0, #1207959552
 487:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 1079              		.loc 1 487 0
 1080 005a 0793     		str	r3, [sp, #28]
 488:Core/Src/stm32g4xx_hal_msp.c **** 
 1081              		.loc 1 488 0
 1082 005c FFF7FEFF 		bl	HAL_GPIO_Init
 1083              	.LVL43:
 492:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
 1084              		.loc 1 492 0
 1085 0060 1148     		ldr	r0, .L101+8
 1086 0062 2860     		str	r0, [r5]
 493:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
 1087              		.loc 1 493 0
ARM GAS  /tmp/ccG6yNTx.s 			page 31


 1088 0064 1921     		movs	r1, #25
 494:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 1089              		.loc 1 494 0
 1090 0066 1022     		movs	r2, #16
 496:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 1091              		.loc 1 496 0
 1092 0068 8023     		movs	r3, #128
 501:Core/Src/stm32g4xx_hal_msp.c ****     {
 1093              		.loc 1 501 0
 1094 006a 2846     		mov	r0, r5
 495:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
 1095              		.loc 1 495 0
 1096 006c EC60     		str	r4, [r5, #12]
 498:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.Mode = DMA_NORMAL;
 1097              		.loc 1 498 0
 1098 006e C5E90544 		strd	r4, r4, [r5, #20]
 500:Core/Src/stm32g4xx_hal_msp.c ****     if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
 1099              		.loc 1 500 0
 1100 0072 C5E90744 		strd	r4, r4, [r5, #28]
 494:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
 1101              		.loc 1 494 0
 1102 0076 C5E90112 		strd	r1, r2, [r5, #4]
 496:Core/Src/stm32g4xx_hal_msp.c ****     hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
 1103              		.loc 1 496 0
 1104 007a 2B61     		str	r3, [r5, #16]
 501:Core/Src/stm32g4xx_hal_msp.c ****     {
 1105              		.loc 1 501 0
 1106 007c FFF7FEFF 		bl	HAL_DMA_Init
 1107              	.LVL44:
 1108 0080 58B9     		cbnz	r0, .L100
 1109              	.L94:
 509:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 1110              		.loc 1 509 0
 1111 0082 0022     		movs	r2, #0
 1112 0084 1146     		mov	r1, r2
 506:Core/Src/stm32g4xx_hal_msp.c **** 
 1113              		.loc 1 506 0
 1114 0086 B567     		str	r5, [r6, #120]
 509:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 1115              		.loc 1 509 0
 1116 0088 2520     		movs	r0, #37
 506:Core/Src/stm32g4xx_hal_msp.c **** 
 1117              		.loc 1 506 0
 1118 008a AE62     		str	r6, [r5, #40]
 509:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_EnableIRQ(USART1_IRQn);
 1119              		.loc 1 509 0
 1120 008c FFF7FEFF 		bl	HAL_NVIC_SetPriority
 1121              	.LVL45:
 510:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspInit 1 */
 1122              		.loc 1 510 0
 1123 0090 2520     		movs	r0, #37
 1124 0092 FFF7FEFF 		bl	HAL_NVIC_EnableIRQ
 1125              	.LVL46:
 1126              		.loc 1 516 0
 1127 0096 08B0     		add	sp, sp, #32
 1128              	.LCFI38:
 1129              		.cfi_remember_state
ARM GAS  /tmp/ccG6yNTx.s 			page 32


 1130              		.cfi_def_cfa_offset 16
 1131              		@ sp needed
 1132 0098 70BD     		pop	{r4, r5, r6, pc}
 1133              	.LVL47:
 1134              	.L100:
 1135              	.LCFI39:
 1136              		.cfi_restore_state
 503:Core/Src/stm32g4xx_hal_msp.c ****     }
 1137              		.loc 1 503 0
 1138 009a FFF7FEFF 		bl	Error_Handler
 1139              	.LVL48:
 1140 009e F0E7     		b	.L94
 1141              	.L102:
 1142              		.align	2
 1143              	.L101:
 1144 00a0 00380140 		.word	1073821696
 1145 00a4 00000000 		.word	hdma_usart1_tx
 1146 00a8 58000240 		.word	1073872984
 1147              		.cfi_endproc
 1148              	.LFE340:
 1150              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
 1151              		.align	1
 1152              		.p2align 2,,3
 1153              		.global	HAL_UART_MspDeInit
 1154              		.syntax unified
 1155              		.thumb
 1156              		.thumb_func
 1157              		.fpu fpv4-sp-d16
 1159              	HAL_UART_MspDeInit:
 1160              	.LFB341:
 517:Core/Src/stm32g4xx_hal_msp.c **** 
 518:Core/Src/stm32g4xx_hal_msp.c **** /**
 519:Core/Src/stm32g4xx_hal_msp.c **** * @brief UART MSP De-Initialization
 520:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
 521:Core/Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
 522:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
 523:Core/Src/stm32g4xx_hal_msp.c **** */
 524:Core/Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
 525:Core/Src/stm32g4xx_hal_msp.c **** {
 1161              		.loc 1 525 0
 1162              		.cfi_startproc
 1163              		@ args = 0, pretend = 0, frame = 0
 1164              		@ frame_needed = 0, uses_anonymous_args = 0
 1165              	.LVL49:
 526:Core/Src/stm32g4xx_hal_msp.c ****   if(huart->Instance==USART1)
 1166              		.loc 1 526 0
 1167 0000 0C4B     		ldr	r3, .L109
 1168 0002 0268     		ldr	r2, [r0]
 1169 0004 9A42     		cmp	r2, r3
 1170 0006 00D0     		beq	.L108
 1171 0008 7047     		bx	lr
 1172              	.L108:
 527:Core/Src/stm32g4xx_hal_msp.c ****   {
 528:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 0 */
 529:Core/Src/stm32g4xx_hal_msp.c **** 
 530:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 0 */
 531:Core/Src/stm32g4xx_hal_msp.c ****     /* Peripheral clock disable */
ARM GAS  /tmp/ccG6yNTx.s 			page 33


 532:Core/Src/stm32g4xx_hal_msp.c ****     __HAL_RCC_USART1_CLK_DISABLE();
 1173              		.loc 1 532 0
 1174 000a 0B4A     		ldr	r2, .L109+4
 525:Core/Src/stm32g4xx_hal_msp.c ****   if(huart->Instance==USART1)
 1175              		.loc 1 525 0
 1176 000c 10B5     		push	{r4, lr}
 1177              	.LCFI40:
 1178              		.cfi_def_cfa_offset 8
 1179              		.cfi_offset 4, -8
 1180              		.cfi_offset 14, -4
 1181              		.loc 1 532 0
 1182 000e 136E     		ldr	r3, [r2, #96]
 1183 0010 0446     		mov	r4, r0
 1184 0012 23F48043 		bic	r3, r3, #16384
 1185 0016 1366     		str	r3, [r2, #96]
 533:Core/Src/stm32g4xx_hal_msp.c **** 
 534:Core/Src/stm32g4xx_hal_msp.c ****     /**USART1 GPIO Configuration
 535:Core/Src/stm32g4xx_hal_msp.c ****     PA9     ------> USART1_TX
 536:Core/Src/stm32g4xx_hal_msp.c ****     PA10     ------> USART1_RX
 537:Core/Src/stm32g4xx_hal_msp.c ****     */
 538:Core/Src/stm32g4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
 1186              		.loc 1 538 0
 1187 0018 4FF4C061 		mov	r1, #1536
 1188 001c 4FF09040 		mov	r0, #1207959552
 1189              	.LVL50:
 1190 0020 FFF7FEFF 		bl	HAL_GPIO_DeInit
 1191              	.LVL51:
 539:Core/Src/stm32g4xx_hal_msp.c **** 
 540:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 DMA DeInit */
 541:Core/Src/stm32g4xx_hal_msp.c ****     HAL_DMA_DeInit(huart->hdmatx);
 1192              		.loc 1 541 0
 1193 0024 A06F     		ldr	r0, [r4, #120]
 1194 0026 FFF7FEFF 		bl	HAL_DMA_DeInit
 1195              	.LVL52:
 542:Core/Src/stm32g4xx_hal_msp.c **** 
 543:Core/Src/stm32g4xx_hal_msp.c ****     /* USART1 interrupt DeInit */
 544:Core/Src/stm32g4xx_hal_msp.c ****     HAL_NVIC_DisableIRQ(USART1_IRQn);
 1196              		.loc 1 544 0
 1197 002a 2520     		movs	r0, #37
 545:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
 546:Core/Src/stm32g4xx_hal_msp.c **** 
 547:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE END USART1_MspDeInit 1 */
 548:Core/Src/stm32g4xx_hal_msp.c ****   }
 549:Core/Src/stm32g4xx_hal_msp.c **** 
 550:Core/Src/stm32g4xx_hal_msp.c **** }
 1198              		.loc 1 550 0
 1199 002c BDE81040 		pop	{r4, lr}
 1200              	.LCFI41:
 1201              		.cfi_restore 14
 1202              		.cfi_restore 4
 1203              		.cfi_def_cfa_offset 0
 1204              	.LVL53:
 544:Core/Src/stm32g4xx_hal_msp.c ****   /* USER CODE BEGIN USART1_MspDeInit 1 */
 1205              		.loc 1 544 0
 1206 0030 FFF7FEBF 		b	HAL_NVIC_DisableIRQ
 1207              	.LVL54:
 1208              	.L110:
ARM GAS  /tmp/ccG6yNTx.s 			page 34


 1209              		.align	2
 1210              	.L109:
 1211 0034 00380140 		.word	1073821696
 1212 0038 00100240 		.word	1073876992
 1213              		.cfi_endproc
 1214              	.LFE341:
 1216              		.text
 1217              	.Letext0:
 1218              		.file 2 "/usr/include/newlib/machine/_default_types.h"
 1219              		.file 3 "/usr/include/newlib/sys/_stdint.h"
 1220              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
 1221              		.file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
 1222              		.file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
 1223              		.file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
 1224              		.file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
 1225              		.file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
 1226              		.file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
 1227              		.file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
 1228              		.file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h"
 1229              		.file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h"
 1230              		.file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
 1231              		.file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h"
 1232              		.file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
 1233              		.file 17 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
 1234              		.file 18 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
 1235              		.file 19 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
 1236              		.file 20 "Core/Inc/main.h"
 1237              		.file 21 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
ARM GAS  /tmp/ccG6yNTx.s 			page 35


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32g4xx_hal_msp.c
     /tmp/ccG6yNTx.s:16     .text.HAL_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:24     .text.HAL_MspInit:0000000000000000 HAL_MspInit
     /tmp/ccG6yNTx.s:71     .text.HAL_MspInit:0000000000000030 $d
     /tmp/ccG6yNTx.s:76     .text.HAL_ADC_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:84     .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
     /tmp/ccG6yNTx.s:212    .text.HAL_ADC_MspInit:0000000000000078 $d
     /tmp/ccG6yNTx.s:218    .text.HAL_ADC_MspDeInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:226    .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
     /tmp/ccG6yNTx.s:271    .text.HAL_ADC_MspDeInit:0000000000000028 $d
     /tmp/ccG6yNTx.s:276    .text.HAL_CORDIC_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:284    .text.HAL_CORDIC_MspInit:0000000000000000 HAL_CORDIC_MspInit
     /tmp/ccG6yNTx.s:326    .text.HAL_CORDIC_MspInit:000000000000002c $d
     /tmp/ccG6yNTx.s:331    .text.HAL_CORDIC_MspDeInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:339    .text.HAL_CORDIC_MspDeInit:0000000000000000 HAL_CORDIC_MspDeInit
     /tmp/ccG6yNTx.s:363    .text.HAL_CORDIC_MspDeInit:0000000000000014 $d
     /tmp/ccG6yNTx.s:369    .text.HAL_DAC_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:377    .text.HAL_DAC_MspInit:0000000000000000 HAL_DAC_MspInit
     /tmp/ccG6yNTx.s:570    .text.HAL_DAC_MspInit:00000000000000d4 $d
     /tmp/ccG6yNTx.s:579    .text.HAL_DAC_MspDeInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:587    .text.HAL_DAC_MspDeInit:0000000000000000 HAL_DAC_MspDeInit
     /tmp/ccG6yNTx.s:639    .text.HAL_DAC_MspDeInit:0000000000000034 $d
     /tmp/ccG6yNTx.s:645    .text.HAL_OPAMP_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:653    .text.HAL_OPAMP_MspInit:0000000000000000 HAL_OPAMP_MspInit
     /tmp/ccG6yNTx.s:733    .text.HAL_OPAMP_MspInit:000000000000004c $d
     /tmp/ccG6yNTx.s:738    .text.HAL_OPAMP_MspDeInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:746    .text.HAL_OPAMP_MspDeInit:0000000000000000 HAL_OPAMP_MspDeInit
     /tmp/ccG6yNTx.s:771    .text.HAL_OPAMP_MspDeInit:0000000000000014 $d
     /tmp/ccG6yNTx.s:776    .text.HAL_TIM_Base_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:784    .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit
     /tmp/ccG6yNTx.s:908    .text.HAL_TIM_Base_MspInit:000000000000007c $d
     /tmp/ccG6yNTx.s:916    .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:924    .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit
     /tmp/ccG6yNTx.s:978    .text.HAL_TIM_Base_MspDeInit:0000000000000044 $d
     /tmp/ccG6yNTx.s:985    .text.HAL_UART_MspInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:993    .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
     /tmp/ccG6yNTx.s:1144   .text.HAL_UART_MspInit:00000000000000a0 $d
     /tmp/ccG6yNTx.s:1151   .text.HAL_UART_MspDeInit:0000000000000000 $t
     /tmp/ccG6yNTx.s:1159   .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
     /tmp/ccG6yNTx.s:1211   .text.HAL_UART_MspDeInit:0000000000000034 $d

UNDEFINED SYMBOLS
HAL_PWREx_DisableUCPDDeadBattery
HAL_DMA_Init
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
Error_Handler
hdma_adc1
HAL_DMA_DeInit
HAL_NVIC_DisableIRQ
HAL_GPIO_Init
hdma_dac1_ch1
hdma_dac1_ch2
HAL_GPIO_DeInit
hdma_usart1_tx
