ARM GAS  /tmp/ccNGAEpA.s 			page 1


   1              		.cpu cortex-m4
   2              		.eabi_attribute 27, 1
   3              		.eabi_attribute 28, 1
   4              		.eabi_attribute 23, 1
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 2
   9              		.eabi_attribute 34, 1
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32g4xx_it.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.NMI_Handler,"ax",%progbits
  16              		.align	1
  17              		.p2align 2,,3
  18              		.global	NMI_Handler
  19              		.syntax unified
  20              		.thumb
  21              		.thumb_func
  22              		.fpu fpv4-sp-d16
  24              	NMI_Handler:
  25              	.LFB329:
  26              		.file 1 "Core/Src/stm32g4xx_it.c"
   1:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN Header */
   2:Core/Src/stm32g4xx_it.c **** /**
   3:Core/Src/stm32g4xx_it.c ****   ******************************************************************************
   4:Core/Src/stm32g4xx_it.c ****   * @file    stm32g4xx_it.c
   5:Core/Src/stm32g4xx_it.c ****   * @brief   Interrupt Service Routines.
   6:Core/Src/stm32g4xx_it.c ****   ******************************************************************************
   7:Core/Src/stm32g4xx_it.c ****   * @attention
   8:Core/Src/stm32g4xx_it.c ****   *
   9:Core/Src/stm32g4xx_it.c ****   * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
  10:Core/Src/stm32g4xx_it.c ****   * All rights reserved.</center></h2>
  11:Core/Src/stm32g4xx_it.c ****   *
  12:Core/Src/stm32g4xx_it.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  13:Core/Src/stm32g4xx_it.c ****   * the "License"; You may not use this file except in compliance with the
  14:Core/Src/stm32g4xx_it.c ****   * License. You may obtain a copy of the License at:
  15:Core/Src/stm32g4xx_it.c ****   *                        opensource.org/licenses/BSD-3-Clause
  16:Core/Src/stm32g4xx_it.c ****   *
  17:Core/Src/stm32g4xx_it.c ****   ******************************************************************************
  18:Core/Src/stm32g4xx_it.c ****   */
  19:Core/Src/stm32g4xx_it.c **** /* USER CODE END Header */
  20:Core/Src/stm32g4xx_it.c **** 
  21:Core/Src/stm32g4xx_it.c **** /* Includes ------------------------------------------------------------------*/
  22:Core/Src/stm32g4xx_it.c **** #include "main.h"
  23:Core/Src/stm32g4xx_it.c **** #include "stm32g4xx_it.h"
  24:Core/Src/stm32g4xx_it.c **** /* Private includes ----------------------------------------------------------*/
  25:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN Includes */
  26:Core/Src/stm32g4xx_it.c **** /* USER CODE END Includes */
  27:Core/Src/stm32g4xx_it.c **** 
  28:Core/Src/stm32g4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
  29:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN TD */
  30:Core/Src/stm32g4xx_it.c **** 
  31:Core/Src/stm32g4xx_it.c **** /* USER CODE END TD */
  32:Core/Src/stm32g4xx_it.c **** 
ARM GAS  /tmp/ccNGAEpA.s 			page 2


  33:Core/Src/stm32g4xx_it.c **** /* Private define ------------------------------------------------------------*/
  34:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PD */
  35:Core/Src/stm32g4xx_it.c **** 
  36:Core/Src/stm32g4xx_it.c **** /* USER CODE END PD */
  37:Core/Src/stm32g4xx_it.c **** 
  38:Core/Src/stm32g4xx_it.c **** /* Private macro -------------------------------------------------------------*/
  39:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PM */
  40:Core/Src/stm32g4xx_it.c **** 
  41:Core/Src/stm32g4xx_it.c **** /* USER CODE END PM */
  42:Core/Src/stm32g4xx_it.c **** 
  43:Core/Src/stm32g4xx_it.c **** /* Private variables ---------------------------------------------------------*/
  44:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PV */
  45:Core/Src/stm32g4xx_it.c **** 
  46:Core/Src/stm32g4xx_it.c **** /* USER CODE END PV */
  47:Core/Src/stm32g4xx_it.c **** 
  48:Core/Src/stm32g4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
  49:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN PFP */
  50:Core/Src/stm32g4xx_it.c **** 
  51:Core/Src/stm32g4xx_it.c **** /* USER CODE END PFP */
  52:Core/Src/stm32g4xx_it.c **** 
  53:Core/Src/stm32g4xx_it.c **** /* Private user code ---------------------------------------------------------*/
  54:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN 0 */
  55:Core/Src/stm32g4xx_it.c **** 
  56:Core/Src/stm32g4xx_it.c **** /* USER CODE END 0 */
  57:Core/Src/stm32g4xx_it.c **** 
  58:Core/Src/stm32g4xx_it.c **** /* External variables --------------------------------------------------------*/
  59:Core/Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_adc1;
  60:Core/Src/stm32g4xx_it.c **** extern ADC_HandleTypeDef hadc1;
  61:Core/Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_dac1_ch1;
  62:Core/Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_dac1_ch2;
  63:Core/Src/stm32g4xx_it.c **** extern TIM_HandleTypeDef htim7;
  64:Core/Src/stm32g4xx_it.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
  65:Core/Src/stm32g4xx_it.c **** extern UART_HandleTypeDef huart1;
  66:Core/Src/stm32g4xx_it.c **** /* USER CODE BEGIN EV */
  67:Core/Src/stm32g4xx_it.c **** 
  68:Core/Src/stm32g4xx_it.c **** /* USER CODE END EV */
  69:Core/Src/stm32g4xx_it.c **** 
  70:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
  71:Core/Src/stm32g4xx_it.c **** /*           Cortex-M4 Processor Interruption and Exception Handlers          */
  72:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
  73:Core/Src/stm32g4xx_it.c **** /**
  74:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Non maskable interrupt.
  75:Core/Src/stm32g4xx_it.c ****   */
  76:Core/Src/stm32g4xx_it.c **** void NMI_Handler(void)
  77:Core/Src/stm32g4xx_it.c **** {
  27              		.loc 1 77 0
  28              		.cfi_startproc
  29              		@ Volatile: function does not return.
  30              		@ args = 0, pretend = 0, frame = 0
  31              		@ frame_needed = 0, uses_anonymous_args = 0
  32              		@ link register save eliminated.
  33              	.L2:
  34 0000 FEE7     		b	.L2
  35              		.cfi_endproc
  36              	.LFE329:
  38 0002 00BF     		.section	.text.HardFault_Handler,"ax",%progbits
  39              		.align	1
ARM GAS  /tmp/ccNGAEpA.s 			page 3


  40              		.p2align 2,,3
  41              		.global	HardFault_Handler
  42              		.syntax unified
  43              		.thumb
  44              		.thumb_func
  45              		.fpu fpv4-sp-d16
  47              	HardFault_Handler:
  48              	.LFB330:
  78:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
  79:Core/Src/stm32g4xx_it.c **** 
  80:Core/Src/stm32g4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 0 */
  81:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
  82:Core/Src/stm32g4xx_it.c ****   while (1)
  83:Core/Src/stm32g4xx_it.c ****   {
  84:Core/Src/stm32g4xx_it.c ****   }
  85:Core/Src/stm32g4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 1 */
  86:Core/Src/stm32g4xx_it.c **** }
  87:Core/Src/stm32g4xx_it.c **** 
  88:Core/Src/stm32g4xx_it.c **** /**
  89:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Hard fault interrupt.
  90:Core/Src/stm32g4xx_it.c ****   */
  91:Core/Src/stm32g4xx_it.c **** void HardFault_Handler(void)
  92:Core/Src/stm32g4xx_it.c **** {
  49              		.loc 1 92 0
  50              		.cfi_startproc
  51              		@ Volatile: function does not return.
  52              		@ args = 0, pretend = 0, frame = 0
  53              		@ frame_needed = 0, uses_anonymous_args = 0
  54              		@ link register save eliminated.
  55              	.L5:
  56 0000 FEE7     		b	.L5
  57              		.cfi_endproc
  58              	.LFE330:
  60 0002 00BF     		.section	.text.MemManage_Handler,"ax",%progbits
  61              		.align	1
  62              		.p2align 2,,3
  63              		.global	MemManage_Handler
  64              		.syntax unified
  65              		.thumb
  66              		.thumb_func
  67              		.fpu fpv4-sp-d16
  69              	MemManage_Handler:
  70              	.LFB331:
  93:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN HardFault_IRQn 0 */
  94:Core/Src/stm32g4xx_it.c **** 
  95:Core/Src/stm32g4xx_it.c ****   /* USER CODE END HardFault_IRQn 0 */
  96:Core/Src/stm32g4xx_it.c ****   while (1)
  97:Core/Src/stm32g4xx_it.c ****   {
  98:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_HardFault_IRQn 0 */
  99:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_HardFault_IRQn 0 */
 100:Core/Src/stm32g4xx_it.c ****   }
 101:Core/Src/stm32g4xx_it.c **** }
 102:Core/Src/stm32g4xx_it.c **** 
 103:Core/Src/stm32g4xx_it.c **** /**
 104:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Memory management fault.
 105:Core/Src/stm32g4xx_it.c ****   */
 106:Core/Src/stm32g4xx_it.c **** void MemManage_Handler(void)
ARM GAS  /tmp/ccNGAEpA.s 			page 4


 107:Core/Src/stm32g4xx_it.c **** {
  71              		.loc 1 107 0
  72              		.cfi_startproc
  73              		@ Volatile: function does not return.
  74              		@ args = 0, pretend = 0, frame = 0
  75              		@ frame_needed = 0, uses_anonymous_args = 0
  76              		@ link register save eliminated.
  77              	.L7:
  78 0000 FEE7     		b	.L7
  79              		.cfi_endproc
  80              	.LFE331:
  82 0002 00BF     		.section	.text.BusFault_Handler,"ax",%progbits
  83              		.align	1
  84              		.p2align 2,,3
  85              		.global	BusFault_Handler
  86              		.syntax unified
  87              		.thumb
  88              		.thumb_func
  89              		.fpu fpv4-sp-d16
  91              	BusFault_Handler:
  92              	.LFB332:
 108:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
 109:Core/Src/stm32g4xx_it.c **** 
 110:Core/Src/stm32g4xx_it.c ****   /* USER CODE END MemoryManagement_IRQn 0 */
 111:Core/Src/stm32g4xx_it.c ****   while (1)
 112:Core/Src/stm32g4xx_it.c ****   {
 113:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
 114:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_MemoryManagement_IRQn 0 */
 115:Core/Src/stm32g4xx_it.c ****   }
 116:Core/Src/stm32g4xx_it.c **** }
 117:Core/Src/stm32g4xx_it.c **** 
 118:Core/Src/stm32g4xx_it.c **** /**
 119:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Prefetch fault, memory access fault.
 120:Core/Src/stm32g4xx_it.c ****   */
 121:Core/Src/stm32g4xx_it.c **** void BusFault_Handler(void)
 122:Core/Src/stm32g4xx_it.c **** {
  93              		.loc 1 122 0
  94              		.cfi_startproc
  95              		@ Volatile: function does not return.
  96              		@ args = 0, pretend = 0, frame = 0
  97              		@ frame_needed = 0, uses_anonymous_args = 0
  98              		@ link register save eliminated.
  99              	.L9:
 100 0000 FEE7     		b	.L9
 101              		.cfi_endproc
 102              	.LFE332:
 104 0002 00BF     		.section	.text.UsageFault_Handler,"ax",%progbits
 105              		.align	1
 106              		.p2align 2,,3
 107              		.global	UsageFault_Handler
 108              		.syntax unified
 109              		.thumb
 110              		.thumb_func
 111              		.fpu fpv4-sp-d16
 113              	UsageFault_Handler:
 114              	.LFB333:
 123:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN BusFault_IRQn 0 */
ARM GAS  /tmp/ccNGAEpA.s 			page 5


 124:Core/Src/stm32g4xx_it.c **** 
 125:Core/Src/stm32g4xx_it.c ****   /* USER CODE END BusFault_IRQn 0 */
 126:Core/Src/stm32g4xx_it.c ****   while (1)
 127:Core/Src/stm32g4xx_it.c ****   {
 128:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_BusFault_IRQn 0 */
 129:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_BusFault_IRQn 0 */
 130:Core/Src/stm32g4xx_it.c ****   }
 131:Core/Src/stm32g4xx_it.c **** }
 132:Core/Src/stm32g4xx_it.c **** 
 133:Core/Src/stm32g4xx_it.c **** /**
 134:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Undefined instruction or illegal state.
 135:Core/Src/stm32g4xx_it.c ****   */
 136:Core/Src/stm32g4xx_it.c **** void UsageFault_Handler(void)
 137:Core/Src/stm32g4xx_it.c **** {
 115              		.loc 1 137 0
 116              		.cfi_startproc
 117              		@ Volatile: function does not return.
 118              		@ args = 0, pretend = 0, frame = 0
 119              		@ frame_needed = 0, uses_anonymous_args = 0
 120              		@ link register save eliminated.
 121              	.L11:
 122 0000 FEE7     		b	.L11
 123              		.cfi_endproc
 124              	.LFE333:
 126 0002 00BF     		.section	.text.SVC_Handler,"ax",%progbits
 127              		.align	1
 128              		.p2align 2,,3
 129              		.global	SVC_Handler
 130              		.syntax unified
 131              		.thumb
 132              		.thumb_func
 133              		.fpu fpv4-sp-d16
 135              	SVC_Handler:
 136              	.LFB334:
 138:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN UsageFault_IRQn 0 */
 139:Core/Src/stm32g4xx_it.c **** 
 140:Core/Src/stm32g4xx_it.c ****   /* USER CODE END UsageFault_IRQn 0 */
 141:Core/Src/stm32g4xx_it.c ****   while (1)
 142:Core/Src/stm32g4xx_it.c ****   {
 143:Core/Src/stm32g4xx_it.c ****     /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
 144:Core/Src/stm32g4xx_it.c ****     /* USER CODE END W1_UsageFault_IRQn 0 */
 145:Core/Src/stm32g4xx_it.c ****   }
 146:Core/Src/stm32g4xx_it.c **** }
 147:Core/Src/stm32g4xx_it.c **** 
 148:Core/Src/stm32g4xx_it.c **** /**
 149:Core/Src/stm32g4xx_it.c ****   * @brief This function handles System service call via SWI instruction.
 150:Core/Src/stm32g4xx_it.c ****   */
 151:Core/Src/stm32g4xx_it.c **** void SVC_Handler(void)
 152:Core/Src/stm32g4xx_it.c **** {
 137              		.loc 1 152 0
 138              		.cfi_startproc
 139              		@ args = 0, pretend = 0, frame = 0
 140              		@ frame_needed = 0, uses_anonymous_args = 0
 141              		@ link register save eliminated.
 153:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 0 */
 154:Core/Src/stm32g4xx_it.c **** 
 155:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SVCall_IRQn 0 */
ARM GAS  /tmp/ccNGAEpA.s 			page 6


 156:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 1 */
 157:Core/Src/stm32g4xx_it.c **** 
 158:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SVCall_IRQn 1 */
 159:Core/Src/stm32g4xx_it.c **** }
 142              		.loc 1 159 0
 143 0000 7047     		bx	lr
 144              		.cfi_endproc
 145              	.LFE334:
 147 0002 00BF     		.section	.text.DebugMon_Handler,"ax",%progbits
 148              		.align	1
 149              		.p2align 2,,3
 150              		.global	DebugMon_Handler
 151              		.syntax unified
 152              		.thumb
 153              		.thumb_func
 154              		.fpu fpv4-sp-d16
 156              	DebugMon_Handler:
 157              	.LFB346:
 158              		.cfi_startproc
 159              		@ args = 0, pretend = 0, frame = 0
 160              		@ frame_needed = 0, uses_anonymous_args = 0
 161              		@ link register save eliminated.
 162 0000 7047     		bx	lr
 163              		.cfi_endproc
 164              	.LFE346:
 166 0002 00BF     		.section	.text.PendSV_Handler,"ax",%progbits
 167              		.align	1
 168              		.p2align 2,,3
 169              		.global	PendSV_Handler
 170              		.syntax unified
 171              		.thumb
 172              		.thumb_func
 173              		.fpu fpv4-sp-d16
 175              	PendSV_Handler:
 176              	.LFB348:
 177              		.cfi_startproc
 178              		@ args = 0, pretend = 0, frame = 0
 179              		@ frame_needed = 0, uses_anonymous_args = 0
 180              		@ link register save eliminated.
 181 0000 7047     		bx	lr
 182              		.cfi_endproc
 183              	.LFE348:
 185 0002 00BF     		.section	.text.SysTick_Handler,"ax",%progbits
 186              		.align	1
 187              		.p2align 2,,3
 188              		.global	SysTick_Handler
 189              		.syntax unified
 190              		.thumb
 191              		.thumb_func
 192              		.fpu fpv4-sp-d16
 194              	SysTick_Handler:
 195              	.LFB337:
 160:Core/Src/stm32g4xx_it.c **** 
 161:Core/Src/stm32g4xx_it.c **** /**
 162:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Debug monitor.
 163:Core/Src/stm32g4xx_it.c ****   */
 164:Core/Src/stm32g4xx_it.c **** void DebugMon_Handler(void)
ARM GAS  /tmp/ccNGAEpA.s 			page 7


 165:Core/Src/stm32g4xx_it.c **** {
 166:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 0 */
 167:Core/Src/stm32g4xx_it.c **** 
 168:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 0 */
 169:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
 170:Core/Src/stm32g4xx_it.c **** 
 171:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 1 */
 172:Core/Src/stm32g4xx_it.c **** }
 173:Core/Src/stm32g4xx_it.c **** 
 174:Core/Src/stm32g4xx_it.c **** /**
 175:Core/Src/stm32g4xx_it.c ****   * @brief This function handles Pendable request for system service.
 176:Core/Src/stm32g4xx_it.c ****   */
 177:Core/Src/stm32g4xx_it.c **** void PendSV_Handler(void)
 178:Core/Src/stm32g4xx_it.c **** {
 179:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 0 */
 180:Core/Src/stm32g4xx_it.c **** 
 181:Core/Src/stm32g4xx_it.c ****   /* USER CODE END PendSV_IRQn 0 */
 182:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 1 */
 183:Core/Src/stm32g4xx_it.c **** 
 184:Core/Src/stm32g4xx_it.c ****   /* USER CODE END PendSV_IRQn 1 */
 185:Core/Src/stm32g4xx_it.c **** }
 186:Core/Src/stm32g4xx_it.c **** 
 187:Core/Src/stm32g4xx_it.c **** /**
 188:Core/Src/stm32g4xx_it.c ****   * @brief This function handles System tick timer.
 189:Core/Src/stm32g4xx_it.c ****   */
 190:Core/Src/stm32g4xx_it.c **** void SysTick_Handler(void)
 191:Core/Src/stm32g4xx_it.c **** {
 196              		.loc 1 191 0
 197              		.cfi_startproc
 198              		@ args = 0, pretend = 0, frame = 0
 199              		@ frame_needed = 0, uses_anonymous_args = 0
 200              		@ link register save eliminated.
 192:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 0 */
 193:Core/Src/stm32g4xx_it.c **** 
 194:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SysTick_IRQn 0 */
 195:Core/Src/stm32g4xx_it.c ****   HAL_IncTick();
 201              		.loc 1 195 0
 202 0000 FFF7FEBF 		b	HAL_IncTick
 203              	.LVL0:
 204              		.cfi_endproc
 205              	.LFE337:
 207              		.section	.text.DMA1_Channel1_IRQHandler,"ax",%progbits
 208              		.align	1
 209              		.p2align 2,,3
 210              		.global	DMA1_Channel1_IRQHandler
 211              		.syntax unified
 212              		.thumb
 213              		.thumb_func
 214              		.fpu fpv4-sp-d16
 216              	DMA1_Channel1_IRQHandler:
 217              	.LFB338:
 196:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
 197:Core/Src/stm32g4xx_it.c **** 
 198:Core/Src/stm32g4xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
 199:Core/Src/stm32g4xx_it.c **** }
 200:Core/Src/stm32g4xx_it.c **** 
 201:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
ARM GAS  /tmp/ccNGAEpA.s 			page 8


 202:Core/Src/stm32g4xx_it.c **** /* STM32G4xx Peripheral Interrupt Handlers                                    */
 203:Core/Src/stm32g4xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals.                  */
 204:Core/Src/stm32g4xx_it.c **** /* For the available peripheral interrupt handler names,                      */
 205:Core/Src/stm32g4xx_it.c **** /* please refer to the startup file (startup_stm32g4xx.s).                    */
 206:Core/Src/stm32g4xx_it.c **** /******************************************************************************/
 207:Core/Src/stm32g4xx_it.c **** 
 208:Core/Src/stm32g4xx_it.c **** /**
 209:Core/Src/stm32g4xx_it.c ****   * @brief This function handles DMA1 channel1 global interrupt.
 210:Core/Src/stm32g4xx_it.c ****   */
 211:Core/Src/stm32g4xx_it.c **** void DMA1_Channel1_IRQHandler(void)
 212:Core/Src/stm32g4xx_it.c **** {
 218              		.loc 1 212 0
 219              		.cfi_startproc
 220              		@ args = 0, pretend = 0, frame = 0
 221              		@ frame_needed = 0, uses_anonymous_args = 0
 222              		@ link register save eliminated.
 213:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
 214:Core/Src/stm32g4xx_it.c **** 
 215:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel1_IRQn 0 */
 216:Core/Src/stm32g4xx_it.c ****   HAL_DMA_IRQHandler(&hdma_adc1);
 223              		.loc 1 216 0
 224 0000 0148     		ldr	r0, .L17
 225 0002 FFF7FEBF 		b	HAL_DMA_IRQHandler
 226              	.LVL1:
 227              	.L18:
 228 0006 00BF     		.align	2
 229              	.L17:
 230 0008 00000000 		.word	hdma_adc1
 231              		.cfi_endproc
 232              	.LFE338:
 234              		.section	.text.DMA1_Channel2_IRQHandler,"ax",%progbits
 235              		.align	1
 236              		.p2align 2,,3
 237              		.global	DMA1_Channel2_IRQHandler
 238              		.syntax unified
 239              		.thumb
 240              		.thumb_func
 241              		.fpu fpv4-sp-d16
 243              	DMA1_Channel2_IRQHandler:
 244              	.LFB339:
 217:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
 218:Core/Src/stm32g4xx_it.c **** 
 219:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel1_IRQn 1 */
 220:Core/Src/stm32g4xx_it.c **** }
 221:Core/Src/stm32g4xx_it.c **** 
 222:Core/Src/stm32g4xx_it.c **** /**
 223:Core/Src/stm32g4xx_it.c ****   * @brief This function handles DMA1 channel2 global interrupt.
 224:Core/Src/stm32g4xx_it.c ****   */
 225:Core/Src/stm32g4xx_it.c **** void DMA1_Channel2_IRQHandler(void)
 226:Core/Src/stm32g4xx_it.c **** {
 245              		.loc 1 226 0
 246              		.cfi_startproc
 247              		@ args = 0, pretend = 0, frame = 0
 248              		@ frame_needed = 0, uses_anonymous_args = 0
 249              		@ link register save eliminated.
 227:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
 228:Core/Src/stm32g4xx_it.c **** 
ARM GAS  /tmp/ccNGAEpA.s 			page 9


 229:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel2_IRQn 0 */
 230:Core/Src/stm32g4xx_it.c ****   HAL_DMA_IRQHandler(&hdma_dac1_ch1);
 250              		.loc 1 230 0
 251 0000 0148     		ldr	r0, .L20
 252 0002 FFF7FEBF 		b	HAL_DMA_IRQHandler
 253              	.LVL2:
 254              	.L21:
 255 0006 00BF     		.align	2
 256              	.L20:
 257 0008 00000000 		.word	hdma_dac1_ch1
 258              		.cfi_endproc
 259              	.LFE339:
 261              		.section	.text.DMA1_Channel4_IRQHandler,"ax",%progbits
 262              		.align	1
 263              		.p2align 2,,3
 264              		.global	DMA1_Channel4_IRQHandler
 265              		.syntax unified
 266              		.thumb
 267              		.thumb_func
 268              		.fpu fpv4-sp-d16
 270              	DMA1_Channel4_IRQHandler:
 271              	.LFB340:
 231:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
 232:Core/Src/stm32g4xx_it.c **** 
 233:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel2_IRQn 1 */
 234:Core/Src/stm32g4xx_it.c **** }
 235:Core/Src/stm32g4xx_it.c **** 
 236:Core/Src/stm32g4xx_it.c **** /**
 237:Core/Src/stm32g4xx_it.c ****   * @brief This function handles DMA1 channel4 global interrupt.
 238:Core/Src/stm32g4xx_it.c ****   */
 239:Core/Src/stm32g4xx_it.c **** void DMA1_Channel4_IRQHandler(void)
 240:Core/Src/stm32g4xx_it.c **** {
 272              		.loc 1 240 0
 273              		.cfi_startproc
 274              		@ args = 0, pretend = 0, frame = 0
 275              		@ frame_needed = 0, uses_anonymous_args = 0
 276              		@ link register save eliminated.
 241:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
 242:Core/Src/stm32g4xx_it.c **** 
 243:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel4_IRQn 0 */
 244:Core/Src/stm32g4xx_it.c ****   HAL_DMA_IRQHandler(&hdma_dac1_ch2);
 277              		.loc 1 244 0
 278 0000 0148     		ldr	r0, .L23
 279 0002 FFF7FEBF 		b	HAL_DMA_IRQHandler
 280              	.LVL3:
 281              	.L24:
 282 0006 00BF     		.align	2
 283              	.L23:
 284 0008 00000000 		.word	hdma_dac1_ch2
 285              		.cfi_endproc
 286              	.LFE340:
 288              		.section	.text.DMA1_Channel5_IRQHandler,"ax",%progbits
 289              		.align	1
 290              		.p2align 2,,3
 291              		.global	DMA1_Channel5_IRQHandler
 292              		.syntax unified
 293              		.thumb
ARM GAS  /tmp/ccNGAEpA.s 			page 10


 294              		.thumb_func
 295              		.fpu fpv4-sp-d16
 297              	DMA1_Channel5_IRQHandler:
 298              	.LFB341:
 245:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
 246:Core/Src/stm32g4xx_it.c **** 
 247:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel4_IRQn 1 */
 248:Core/Src/stm32g4xx_it.c **** }
 249:Core/Src/stm32g4xx_it.c **** 
 250:Core/Src/stm32g4xx_it.c **** /**
 251:Core/Src/stm32g4xx_it.c ****   * @brief This function handles DMA1 channel5 global interrupt.
 252:Core/Src/stm32g4xx_it.c ****   */
 253:Core/Src/stm32g4xx_it.c **** void DMA1_Channel5_IRQHandler(void)
 254:Core/Src/stm32g4xx_it.c **** {
 299              		.loc 1 254 0
 300              		.cfi_startproc
 301              		@ args = 0, pretend = 0, frame = 0
 302              		@ frame_needed = 0, uses_anonymous_args = 0
 303              		@ link register save eliminated.
 255:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
 256:Core/Src/stm32g4xx_it.c **** 
 257:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel5_IRQn 0 */
 258:Core/Src/stm32g4xx_it.c ****   HAL_DMA_IRQHandler(&hdma_usart1_tx);
 304              		.loc 1 258 0
 305 0000 0148     		ldr	r0, .L26
 306 0002 FFF7FEBF 		b	HAL_DMA_IRQHandler
 307              	.LVL4:
 308              	.L27:
 309 0006 00BF     		.align	2
 310              	.L26:
 311 0008 00000000 		.word	hdma_usart1_tx
 312              		.cfi_endproc
 313              	.LFE341:
 315              		.section	.text.ADC1_2_IRQHandler,"ax",%progbits
 316              		.align	1
 317              		.p2align 2,,3
 318              		.global	ADC1_2_IRQHandler
 319              		.syntax unified
 320              		.thumb
 321              		.thumb_func
 322              		.fpu fpv4-sp-d16
 324              	ADC1_2_IRQHandler:
 325              	.LFB342:
 259:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
 260:Core/Src/stm32g4xx_it.c **** 
 261:Core/Src/stm32g4xx_it.c ****   /* USER CODE END DMA1_Channel5_IRQn 1 */
 262:Core/Src/stm32g4xx_it.c **** }
 263:Core/Src/stm32g4xx_it.c **** 
 264:Core/Src/stm32g4xx_it.c **** /**
 265:Core/Src/stm32g4xx_it.c ****   * @brief This function handles ADC1 and ADC2 global interrupt.
 266:Core/Src/stm32g4xx_it.c ****   */
 267:Core/Src/stm32g4xx_it.c **** void ADC1_2_IRQHandler(void)
 268:Core/Src/stm32g4xx_it.c **** {
 326              		.loc 1 268 0
 327              		.cfi_startproc
 328              		@ args = 0, pretend = 0, frame = 0
 329              		@ frame_needed = 0, uses_anonymous_args = 0
ARM GAS  /tmp/ccNGAEpA.s 			page 11


 330              		@ link register save eliminated.
 269:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN ADC1_2_IRQn 0 */
 270:Core/Src/stm32g4xx_it.c **** 
 271:Core/Src/stm32g4xx_it.c ****   /* USER CODE END ADC1_2_IRQn 0 */
 272:Core/Src/stm32g4xx_it.c ****   HAL_ADC_IRQHandler(&hadc1);
 331              		.loc 1 272 0
 332 0000 0148     		ldr	r0, .L29
 333 0002 FFF7FEBF 		b	HAL_ADC_IRQHandler
 334              	.LVL5:
 335              	.L30:
 336 0006 00BF     		.align	2
 337              	.L29:
 338 0008 00000000 		.word	hadc1
 339              		.cfi_endproc
 340              	.LFE342:
 342              		.section	.text.USART1_IRQHandler,"ax",%progbits
 343              		.align	1
 344              		.p2align 2,,3
 345              		.global	USART1_IRQHandler
 346              		.syntax unified
 347              		.thumb
 348              		.thumb_func
 349              		.fpu fpv4-sp-d16
 351              	USART1_IRQHandler:
 352              	.LFB343:
 273:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN ADC1_2_IRQn 1 */
 274:Core/Src/stm32g4xx_it.c **** 
 275:Core/Src/stm32g4xx_it.c ****   /* USER CODE END ADC1_2_IRQn 1 */
 276:Core/Src/stm32g4xx_it.c **** }
 277:Core/Src/stm32g4xx_it.c **** 
 278:Core/Src/stm32g4xx_it.c **** /**
 279:Core/Src/stm32g4xx_it.c ****   * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI li
 280:Core/Src/stm32g4xx_it.c ****   */
 281:Core/Src/stm32g4xx_it.c **** void USART1_IRQHandler(void)
 282:Core/Src/stm32g4xx_it.c **** {
 353              		.loc 1 282 0
 354              		.cfi_startproc
 355              		@ args = 0, pretend = 0, frame = 0
 356              		@ frame_needed = 0, uses_anonymous_args = 0
 357              		@ link register save eliminated.
 283:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 0 */
 284:Core/Src/stm32g4xx_it.c **** 
 285:Core/Src/stm32g4xx_it.c ****   /* USER CODE END USART1_IRQn 0 */
 286:Core/Src/stm32g4xx_it.c ****   HAL_UART_IRQHandler(&huart1);
 358              		.loc 1 286 0
 359 0000 0148     		ldr	r0, .L32
 360 0002 FFF7FEBF 		b	HAL_UART_IRQHandler
 361              	.LVL6:
 362              	.L33:
 363 0006 00BF     		.align	2
 364              	.L32:
 365 0008 00000000 		.word	huart1
 366              		.cfi_endproc
 367              	.LFE343:
 369              		.section	.text.TIM7_IRQHandler,"ax",%progbits
 370              		.align	1
 371              		.p2align 2,,3
ARM GAS  /tmp/ccNGAEpA.s 			page 12


 372              		.global	TIM7_IRQHandler
 373              		.syntax unified
 374              		.thumb
 375              		.thumb_func
 376              		.fpu fpv4-sp-d16
 378              	TIM7_IRQHandler:
 379              	.LFB344:
 287:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN USART1_IRQn 1 */
 288:Core/Src/stm32g4xx_it.c **** 
 289:Core/Src/stm32g4xx_it.c ****   /* USER CODE END USART1_IRQn 1 */
 290:Core/Src/stm32g4xx_it.c **** }
 291:Core/Src/stm32g4xx_it.c **** 
 292:Core/Src/stm32g4xx_it.c **** /**
 293:Core/Src/stm32g4xx_it.c ****   * @brief This function handles TIM7 global interrupt.
 294:Core/Src/stm32g4xx_it.c ****   */
 295:Core/Src/stm32g4xx_it.c **** void TIM7_IRQHandler(void)
 296:Core/Src/stm32g4xx_it.c **** {
 380              		.loc 1 296 0
 381              		.cfi_startproc
 382              		@ args = 0, pretend = 0, frame = 0
 383              		@ frame_needed = 0, uses_anonymous_args = 0
 384              		@ link register save eliminated.
 297:Core/Src/stm32g4xx_it.c ****   /* USER CODE BEGIN TIM7_IRQn 0 */
 298:Core/Src/stm32g4xx_it.c **** 
 299:Core/Src/stm32g4xx_it.c ****   /* USER CODE END TIM7_IRQn 0 */
 300:Core/Src/stm32g4xx_it.c ****   HAL_TIM_IRQHandler(&htim7);
 385              		.loc 1 300 0
 386 0000 0148     		ldr	r0, .L35
 387 0002 FFF7FEBF 		b	HAL_TIM_IRQHandler
 388              	.LVL7:
 389              	.L36:
 390 0006 00BF     		.align	2
 391              	.L35:
 392 0008 00000000 		.word	htim7
 393              		.cfi_endproc
 394              	.LFE344:
 396              		.text
 397              	.Letext0:
 398              		.file 2 "/usr/include/newlib/machine/_default_types.h"
 399              		.file 3 "/usr/include/newlib/sys/_stdint.h"
 400              		.file 4 "Drivers/CMSIS/Include/core_cm4.h"
 401              		.file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
 402              		.file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
 403              		.file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
 404              		.file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
 405              		.file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
 406              		.file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
 407              		.file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
 408              		.file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
 409              		.file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
 410              		.file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
ARM GAS  /tmp/ccNGAEpA.s 			page 13


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32g4xx_it.c
     /tmp/ccNGAEpA.s:16     .text.NMI_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:24     .text.NMI_Handler:0000000000000000 NMI_Handler
     /tmp/ccNGAEpA.s:39     .text.HardFault_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:47     .text.HardFault_Handler:0000000000000000 HardFault_Handler
     /tmp/ccNGAEpA.s:61     .text.MemManage_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:69     .text.MemManage_Handler:0000000000000000 MemManage_Handler
     /tmp/ccNGAEpA.s:83     .text.BusFault_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:91     .text.BusFault_Handler:0000000000000000 BusFault_Handler
     /tmp/ccNGAEpA.s:105    .text.UsageFault_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:113    .text.UsageFault_Handler:0000000000000000 UsageFault_Handler
     /tmp/ccNGAEpA.s:127    .text.SVC_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:135    .text.SVC_Handler:0000000000000000 SVC_Handler
     /tmp/ccNGAEpA.s:148    .text.DebugMon_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:156    .text.DebugMon_Handler:0000000000000000 DebugMon_Handler
     /tmp/ccNGAEpA.s:167    .text.PendSV_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:175    .text.PendSV_Handler:0000000000000000 PendSV_Handler
     /tmp/ccNGAEpA.s:186    .text.SysTick_Handler:0000000000000000 $t
     /tmp/ccNGAEpA.s:194    .text.SysTick_Handler:0000000000000000 SysTick_Handler
     /tmp/ccNGAEpA.s:208    .text.DMA1_Channel1_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:216    .text.DMA1_Channel1_IRQHandler:0000000000000000 DMA1_Channel1_IRQHandler
     /tmp/ccNGAEpA.s:230    .text.DMA1_Channel1_IRQHandler:0000000000000008 $d
     /tmp/ccNGAEpA.s:235    .text.DMA1_Channel2_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:243    .text.DMA1_Channel2_IRQHandler:0000000000000000 DMA1_Channel2_IRQHandler
     /tmp/ccNGAEpA.s:257    .text.DMA1_Channel2_IRQHandler:0000000000000008 $d
     /tmp/ccNGAEpA.s:262    .text.DMA1_Channel4_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:270    .text.DMA1_Channel4_IRQHandler:0000000000000000 DMA1_Channel4_IRQHandler
     /tmp/ccNGAEpA.s:284    .text.DMA1_Channel4_IRQHandler:0000000000000008 $d
     /tmp/ccNGAEpA.s:289    .text.DMA1_Channel5_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:297    .text.DMA1_Channel5_IRQHandler:0000000000000000 DMA1_Channel5_IRQHandler
     /tmp/ccNGAEpA.s:311    .text.DMA1_Channel5_IRQHandler:0000000000000008 $d
     /tmp/ccNGAEpA.s:316    .text.ADC1_2_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:324    .text.ADC1_2_IRQHandler:0000000000000000 ADC1_2_IRQHandler
     /tmp/ccNGAEpA.s:338    .text.ADC1_2_IRQHandler:0000000000000008 $d
     /tmp/ccNGAEpA.s:343    .text.USART1_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:351    .text.USART1_IRQHandler:0000000000000000 USART1_IRQHandler
     /tmp/ccNGAEpA.s:365    .text.USART1_IRQHandler:0000000000000008 $d
     /tmp/ccNGAEpA.s:370    .text.TIM7_IRQHandler:0000000000000000 $t
     /tmp/ccNGAEpA.s:378    .text.TIM7_IRQHandler:0000000000000000 TIM7_IRQHandler
     /tmp/ccNGAEpA.s:392    .text.TIM7_IRQHandler:0000000000000008 $d

UNDEFINED SYMBOLS
HAL_IncTick
HAL_DMA_IRQHandler
hdma_adc1
hdma_dac1_ch1
hdma_dac1_ch2
hdma_usart1_tx
HAL_ADC_IRQHandler
hadc1
HAL_UART_IRQHandler
huart1
HAL_TIM_IRQHandler
htim7
