5217 lines
399 KiB
Plaintext
5217 lines
399 KiB
Plaintext
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ARM GAS /tmp/cc8z1BIG.s page 1
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1 .cpu cortex-m4
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2 .eabi_attribute 27, 1
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3 .eabi_attribute 28, 1
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4 .eabi_attribute 23, 1
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5 .eabi_attribute 24, 1
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6 .eabi_attribute 25, 1
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7 .eabi_attribute 26, 1
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8 .eabi_attribute 30, 2
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9 .eabi_attribute 34, 1
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10 .eabi_attribute 18, 4
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11 .file "ControllerFunctions.c"
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12 .text
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13 .Ltext0:
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14 .cfi_sections .debug_frame
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15 .section .text.arm_pid_init_f32,"ax",%progbits
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16 .align 1
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17 .p2align 2,,3
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18 .global arm_pid_init_f32
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19 .syntax unified
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20 .thumb
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21 .thumb_func
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22 .fpu fpv4-sp-d16
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24 arm_pid_init_f32:
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25 .LFB148:
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26 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
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1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /* ----------------------------------------------------------------------
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2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Project: CMSIS DSP Library
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3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Title: arm_pid_init_f32.c
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4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Description: Floating-point PID Control initialization function
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5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** *
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6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * $Date: 18. March 2019
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7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * $Revision: V1.6.0
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8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** *
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9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Target Processor: Cortex-M cores
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10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * -------------------------------------------------------------------- */
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11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /*
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12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
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13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** *
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14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * SPDX-License-Identifier: Apache-2.0
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15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** *
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16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
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17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * not use this file except in compliance with the License.
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18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * You may obtain a copy of the License at
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19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** *
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20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0
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21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** *
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22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * Unless required by applicable law or agreed to in writing, software
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23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
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24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * See the License for the specific language governing permissions and
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26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** * limitations under the License.
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27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** */
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28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** #include "arm_math.h"
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30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /**
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32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @addtogroup PID
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ARM GAS /tmp/cc8z1BIG.s page 2
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33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @{
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34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** */
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35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /**
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37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @brief Initialization function for the floating-point PID Control.
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38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @param[in,out] S points to an instance of the PID structure
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39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @param[in] resetStateFlag
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40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** - value = 0: no change in state
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41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** - value = 1: reset state
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42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @return none
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43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** @par Details
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45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** The <code>resetStateFlag</code> specifies whether to set state to zero or not. \
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46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** The function computes the structure fields: <code>A0</code>, <code>A1</code> <co
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47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain(
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48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** also sets the state variables to all zeros.
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49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** */
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50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** void arm_pid_init_f32(
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52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** arm_pid_instance_f32 * S,
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53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** int32_t resetStateFlag)
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54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** {
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27 .loc 1 54 0
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28 .cfi_startproc
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29 @ args = 0, pretend = 0, frame = 0
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30 @ frame_needed = 0, uses_anonymous_args = 0
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31 @ link register save eliminated.
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32 .LVL0:
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55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /* Derived coefficient A0 */
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56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** S->A0 = S->Kp + S->Ki + S->Kd;
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33 .loc 1 56 0
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34 0000 D0ED067A vldr.32 s15, [r0, #24]
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35 0004 D0ED086A vldr.32 s13, [r0, #32]
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36 0008 90ED076A vldr.32 s12, [r0, #28]
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57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /* Derived coefficient A1 */
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59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** S->A1 = (-S->Kp) - ((float32_t) 2.0f * S->Kd);
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60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /* Derived coefficient A2 */
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62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** S->A2 = S->Kd;
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37 .loc 1 62 0
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38 000c C0ED026A vstr.32 s13, [r0, #8]
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59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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39 .loc 1 59 0
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40 0010 B0EE007A vmov.f32 s14, #2.0e+0
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41 0014 F0EE675A vmov.f32 s11, s15
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42 0018 E6EE875A vfma.f32 s11, s13, s14
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56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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43 .loc 1 56 0
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44 001c 77EE867A vadd.f32 s15, s15, s12
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59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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45 .loc 1 59 0
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46 0020 B1EE657A vneg.f32 s14, s11
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56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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47 .loc 1 56 0
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48 0024 77EEA67A vadd.f32 s15, s15, s13
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59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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ARM GAS /tmp/cc8z1BIG.s page 3
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49 .loc 1 59 0
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50 0028 80ED017A vstr.32 s14, [r0, #4]
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56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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51 .loc 1 56 0
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52 002c C0ED007A vstr.32 s15, [r0]
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63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /* Check whether state needs reset or not */
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65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** if (resetStateFlag)
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53 .loc 1 65 0
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54 0030 19B1 cbz r1, .L1
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66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** {
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67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** /* Reset state to zero, The size will be always 3 samples */
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68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** memset(S->state, 0, 3U * sizeof(float32_t));
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55 .loc 1 68 0
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56 0032 0023 movs r3, #0
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57 0034 C360 str r3, [r0, #12] @ unaligned
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58 0036 0361 str r3, [r0, #16] @ unaligned
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59 0038 4361 str r3, [r0, #20] @ unaligned
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60 .L1:
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69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** }
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70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c ****
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71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c **** }
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61 .loc 1 71 0
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62 003a 7047 bx lr
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63 .cfi_endproc
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64 .LFE148:
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66 .section .text.arm_pid_init_q15,"ax",%progbits
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67 .align 1
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68 .p2align 2,,3
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69 .global arm_pid_init_q15
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70 .syntax unified
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71 .thumb
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72 .thumb_func
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73 .fpu fpv4-sp-d16
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75 arm_pid_init_q15:
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76 .LFB149:
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77 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
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1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* ----------------------------------------------------------------------
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2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Project: CMSIS DSP Library
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3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Title: arm_pid_init_q15.c
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4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Description: Q15 PID Control initialization function
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5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** *
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6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * $Date: 18. March 2019
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7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * $Revision: V1.6.0
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8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** *
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9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Target Processor: Cortex-M cores
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10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * -------------------------------------------------------------------- */
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11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /*
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12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
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13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** *
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14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * SPDX-License-Identifier: Apache-2.0
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15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** *
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16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
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17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * not use this file except in compliance with the License.
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18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * You may obtain a copy of the License at
|
|||
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19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** *
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20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * www.apache.org/licenses/LICENSE-2.0
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ARM GAS /tmp/cc8z1BIG.s page 4
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21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** *
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22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * Unless required by applicable law or agreed to in writing, software
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23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
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24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /**
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @addtogroup PID
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @{
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /**
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @brief Initialization function for the Q15 PID Control.
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @param[in,out] S points to an instance of the Q15 PID structure
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @param[in] resetStateFlag
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** - value = 0: no change in state
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** - value = 1: reset state
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @return none
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** @par Details
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** The <code>resetStateFlag</code> specifies whether to set state to zero or not. \
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** The function computes the structure fields: <code>A0</code>, <code>A1</code> <co
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain(
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** also sets the state variables to all zeros.
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** */
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** void arm_pid_init_q15(
|
|||
|
|
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** arm_pid_instance_q15 * S,
|
|||
|
|
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** int32_t resetStateFlag)
|
|||
|
|
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** {
|
|||
|
|
78 .loc 2 54 0
|
|||
|
|
79 .cfi_startproc
|
|||
|
|
80 @ args = 0, pretend = 0, frame = 0
|
|||
|
|
81 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
82 @ link register save eliminated.
|
|||
|
|
83 .LVL1:
|
|||
|
|
84 0000 30B4 push {r4, r5}
|
|||
|
|
85 .LCFI0:
|
|||
|
|
86 .cfi_def_cfa_offset 8
|
|||
|
|
87 .cfi_offset 4, -8
|
|||
|
|
88 .cfi_offset 5, -4
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #if defined (ARM_MATH_DSP)
|
|||
|
|
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* Derived coefficient A0 */
|
|||
|
|
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
|
|||
|
|
89 .loc 2 59 0
|
|||
|
|
90 0002 B0F91020 ldrsh r2, [r0, #16]
|
|||
|
|
91 0006 B0F90E50 ldrsh r5, [r0, #14]
|
|||
|
|
92 .LVL2:
|
|||
|
|
93 .LBB22:
|
|||
|
|
94 .LBB23:
|
|||
|
|
95 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h"
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 5
|
|||
|
|
|
|||
|
|
|
|||
|
|
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
|
|||
|
|
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
|
|||
|
|
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
|
|||
|
|
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0
|
|||
|
|
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019
|
|||
|
|
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
|
|||
|
|
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
|
|||
|
|
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
|||
|
|
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
|||
|
|
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
|||
|
|
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
|
|||
|
|
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
|
|||
|
|
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
|||
|
|
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
|
|||
|
|
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
|
|||
|
|
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
|
|||
|
|
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
|
|||
|
|
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
|
|||
|
|
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
|
|||
|
|
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
|||
|
|
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
|
|||
|
|
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
|
|||
|
|
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
|
|||
|
|
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
|
|||
|
|
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
|
|||
|
|
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
|
|||
|
|
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
|
|||
|
|
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
|
|||
|
|
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
|
|||
|
|
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
|
|||
|
|
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
|
|||
|
|
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
|
|||
|
|
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
|
|||
|
|
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
|
|||
|
|
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
|
|||
|
|
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
|
|||
|
|
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
|
|||
|
|
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
|
|||
|
|
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
|
|||
|
|
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 6
|
|||
|
|
|
|||
|
|
|
|||
|
|
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
|
|||
|
|
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
|
|||
|
|
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
|
|||
|
|
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
|
|||
|
|
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
|
|||
|
|
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
|||
|
|
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
|
|||
|
|
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
|||
|
|
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
|
|||
|
|
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
|||
|
|
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
|||
|
|
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
|||
|
|
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
|||
|
|
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
|||
|
|
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
|||
|
|
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
|
|||
|
|
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
|||
|
|
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
|||
|
|
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
|||
|
|
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
|||
|
|
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
|||
|
|
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
|
|||
|
|
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
|
|||
|
|
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
|||
|
|
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
|||
|
|
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
|||
|
|
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
|||
|
|
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
|||
|
|
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
|
|||
|
|
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
|
|||
|
|
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
|||
|
|
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
|||
|
|
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
|||
|
|
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
|||
|
|
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
|||
|
|
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
|
|||
|
|
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
|
|||
|
|
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
|
|||
|
|
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
|
|||
|
|
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
|||
|
|
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
|||
|
|
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
|
|||
|
|
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
|
|||
|
|
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
|
|||
|
|
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
|
|||
|
|
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
|
|||
|
|
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 7
|
|||
|
|
|
|||
|
|
|
|||
|
|
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER
|
|||
|
|
117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
|
|||
|
|
118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
119:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */
|
|||
|
|
121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START
|
|||
|
|
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections
|
|||
|
|
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss
|
|||
|
|
127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly
|
|||
|
|
128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script.
|
|||
|
|
129:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
130:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
|
|||
|
|
132:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN;
|
|||
|
|
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
|
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|
136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src;
|
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137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
|
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138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
|
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139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t;
|
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140:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
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141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct {
|
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142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest;
|
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143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen;
|
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144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t;
|
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145:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__;
|
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|
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147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__;
|
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148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__;
|
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149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__;
|
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150:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable
|
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152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
|
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153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i];
|
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154:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
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155:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
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156:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
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|
|
157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable
|
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158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; i<pTable->wlen; ++i) {
|
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159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u;
|
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160:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
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161:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
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|
162:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
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|
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163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start();
|
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|
164:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
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|
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165:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
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|
|
166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start
|
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167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
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|
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168:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
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|
|
169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP
|
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|
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170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop
|
|||
|
|
171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 8
|
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|
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|
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|
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|
|
172:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT
|
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|
|
174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit
|
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|
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175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
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|
|
176:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
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|
|
177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE
|
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|
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178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors
|
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|
|
179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
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|
|
180:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
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|
|
181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE
|
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|
|
182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors")))
|
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|
|
183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
184:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
|
|||
|
|
186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
|
|||
|
|
187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
|||
|
|
188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
|||
|
|
189:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
190:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
191:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
|
|||
|
|
193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
|||
|
|
194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
|||
|
|
195:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
|
|||
|
|
197:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
|
|||
|
|
199:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
200:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
201:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
202:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
|
|||
|
|
204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
|||
|
|
205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
|||
|
|
206:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
|
|||
|
|
208:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
|
|||
|
|
210:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
211:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
213:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
|
|||
|
|
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
|
|||
|
|
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
|
|||
|
|
217:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
|
|||
|
|
219:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
221:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
|
|||
|
|
223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
224:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
225:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 9
|
|||
|
|
|
|||
|
|
|
|||
|
|
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
|
|||
|
|
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
|
|||
|
|
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
|
|||
|
|
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
|
|||
|
|
234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
236:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
|
|||
|
|
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
242:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
243:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
|
|||
|
|
245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
|
|||
|
|
246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
|
|||
|
|
247:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
|
|||
|
|
249:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
|
|||
|
|
251:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
252:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
253:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
255:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
|
|||
|
|
257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
|
|||
|
|
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
|
|||
|
|
259:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
|
|||
|
|
261:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
|
|||
|
|
263:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
265:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
266:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
267:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
|
|||
|
|
269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
|
|||
|
|
270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
|
|||
|
|
271:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
|
|||
|
|
273:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
275:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
|
|||
|
|
277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
278:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
279:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
280:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
281:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
|
|||
|
|
283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
|
|||
|
|
284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
|
|||
|
|
285:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 10
|
|||
|
|
|
|||
|
|
|
|||
|
|
286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
|
|||
|
|
287:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
289:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
|
|||
|
|
291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
293:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
295:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
|
|||
|
|
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
|
|||
|
|
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
|
|||
|
|
299:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
|
|||
|
|
301:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
303:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
|
|||
|
|
305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
306:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
307:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
308:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
309:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
|
|||
|
|
311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
|
|||
|
|
312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
|
|||
|
|
313:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
|
|||
|
|
315:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
317:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
|
|||
|
|
319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
320:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
321:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
322:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
324:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
|
|||
|
|
326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
|
|||
|
|
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
|
|||
|
|
328:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
|
|||
|
|
330:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
332:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
|
|||
|
|
334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
335:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
337:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
338:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
339:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
|
|||
|
|
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
|
|||
|
|
342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 11
|
|||
|
|
|
|||
|
|
|
|||
|
|
343:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
|
|||
|
|
345:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
|
|||
|
|
347:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
348:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
349:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
|
|||
|
|
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
|
|||
|
|
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
|
|||
|
|
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
|
|||
|
|
357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
|
|||
|
|
359:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
361:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
362:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
363:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
|
|||
|
|
365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
|
|||
|
|
366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
|
|||
|
|
367:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
|
|||
|
|
369:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
371:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
|
|||
|
|
373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
374:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
378:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
|
|||
|
|
380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
|
|||
|
|
381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
|
|||
|
|
382:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
|
|||
|
|
384:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
386:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
|
|||
|
|
388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
389:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
391:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
392:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
393:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
|
|||
|
|
395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
|
|||
|
|
396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
|
|||
|
|
397:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
|
|||
|
|
399:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 12
|
|||
|
|
|
|||
|
|
|
|||
|
|
400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
|
|||
|
|
401:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
402:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
403:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
405:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
|
|||
|
|
407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
|
|||
|
|
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
|
|||
|
|
409:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
|
|||
|
|
411:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
|
|||
|
|
413:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
415:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
416:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
418:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
|
|||
|
|
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
|
|||
|
|
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
|
|||
|
|
422:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
|
|||
|
|
424:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
426:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
|
|||
|
|
428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
429:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
431:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
432:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
|
|||
|
|
434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
|
|||
|
|
435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
|
|||
|
|
436:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
|
|||
|
|
438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
|
|||
|
|
440:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
442:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
444:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
|
|||
|
|
446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
|
|||
|
|
447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
|
|||
|
|
448:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
|
|||
|
|
450:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
452:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
|
|||
|
|
454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
455:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
456:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 13
|
|||
|
|
|
|||
|
|
|
|||
|
|
457:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
459:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
|
|||
|
|
461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
|
|||
|
|
462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
|
|||
|
|
463:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
|
|||
|
|
465:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
467:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
|
|||
|
|
469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
470:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
472:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
473:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
474:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
|
|||
|
|
476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
|
|||
|
|
477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
|
|||
|
|
478:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
|
|||
|
|
480:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
|
|||
|
|
482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
483:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
|
|||
|
|
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
|
|||
|
|
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
|
|||
|
|
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
|
|||
|
|
492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
|
|||
|
|
494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
496:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
497:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
|||
|
|
501:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
|
|||
|
|
503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
|||
|
|
504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
|||
|
|
505:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
|
|||
|
|
507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
|
|||
|
|
509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
510:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
511:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 14
|
|||
|
|
|
|||
|
|
|
|||
|
|
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
|||
|
|
515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
|
|||
|
|
516:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
|
|||
|
|
518:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
|
|||
|
|
520:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
521:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
522:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
523:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
|
|||
|
|
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
|
|||
|
|
526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
|
|||
|
|
527:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
|
|||
|
|
529:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
531:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
|
|||
|
|
533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
534:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
536:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
538:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
|
|||
|
|
540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
|
|||
|
|
541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
|
|||
|
|
542:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
|
|||
|
|
544:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
546:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
|
|||
|
|
548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
549:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
551:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
552:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
553:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
|
|||
|
|
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
|
|||
|
|
556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
|||
|
|
557:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
|
|||
|
|
559:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
|
|||
|
|
561:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
562:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
563:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
565:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
|
|||
|
|
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
|
|||
|
|
568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
|||
|
|
569:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 15
|
|||
|
|
|
|||
|
|
|
|||
|
|
571:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
|
|||
|
|
573:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
575:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
576:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
577:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
|
|||
|
|
579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
|
|||
|
|
580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
|
|||
|
|
581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
|
|||
|
|
582:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
|||
|
|
584:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
|
|||
|
|
586:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
587:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
588:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
589:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
|
|||
|
|
591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
|
|||
|
|
592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
|
|||
|
|
593:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
|
|||
|
|
595:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
597:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
|
|||
|
|
599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
600:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
601:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
602:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
604:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
|
|||
|
|
606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
|
|||
|
|
607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
|
|||
|
|
608:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
|
|||
|
|
610:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
612:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
|
|||
|
|
614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
615:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
617:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
618:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
619:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
|
|||
|
|
621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
|
|||
|
|
622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
|
|||
|
|
623:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
|
|||
|
|
625:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
|
|||
|
|
627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 16
|
|||
|
|
|
|||
|
|
|
|||
|
|
628:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
629:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
631:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
|
|||
|
|
633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
|
|||
|
|
634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
|
|||
|
|
635:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
|
|||
|
|
637:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
|
|||
|
|
639:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
641:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
|
|||
|
|
645:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
646:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
|||
|
|
648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
|||
|
|
649:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
|
|||
|
|
652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
|
|||
|
|
654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
|||
|
|
655:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
|
|||
|
|
657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
|
|||
|
|
658:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
|
|||
|
|
660:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
|||
|
|
662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
|||
|
|
663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
|||
|
|
664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
|||
|
|
665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
|
|||
|
|
668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
670:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
671:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
673:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
|
|||
|
|
675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
|
|||
|
|
677:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
|
|||
|
|
679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
|
|||
|
|
680:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
|
|||
|
|
682:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
|||
|
|
684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 17
|
|||
|
|
|
|||
|
|
|
|||
|
|
685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
|||
|
|
686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
|
|||
|
|
689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
691:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
693:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
694:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
695:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
|
|||
|
|
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
|
|||
|
|
699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
|||
|
|
700:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
|
|||
|
|
702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
|||
|
|
703:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
|
|||
|
|
705:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
|||
|
|
707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
|||
|
|
708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
|||
|
|
709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
|
|||
|
|
710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
|
|||
|
|
712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
713:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
717:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
|
|||
|
|
719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
|
|||
|
|
721:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
|
|||
|
|
723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
|
|||
|
|
724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
|
|||
|
|
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
|||
|
|
728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
|
|||
|
|
729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
|
|||
|
|
730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
|
|||
|
|
732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
735:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
736:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
737:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
|
|||
|
|
739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
|
|||
|
|
741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 18
|
|||
|
|
|
|||
|
|
|
|||
|
|
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
|
|||
|
|
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
|
|||
|
|
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
|
|||
|
|
747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
|||
|
|
749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
|||
|
|
750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
|||
|
|
751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
|||
|
|
752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
|
|||
|
|
755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
758:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
759:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
|
|||
|
|
763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
|
|||
|
|
765:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
|
|||
|
|
767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
|
|||
|
|
768:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
|
|||
|
|
770:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
|||
|
|
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
|||
|
|
773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
|||
|
|
774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
|
|||
|
|
777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
779:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
781:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
782:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
783:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
|
|||
|
|
785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
|
|||
|
|
787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
|
|||
|
|
788:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
|
|||
|
|
790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
|
|||
|
|
791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
|
|||
|
|
793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
|||
|
|
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
|||
|
|
796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
|||
|
|
797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
|
|||
|
|
798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 19
|
|||
|
|
|
|||
|
|
|
|||
|
|
799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
|
|||
|
|
800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
801:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
802:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
803:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
|
|||
|
|
805:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
|
|||
|
|
807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
|
|||
|
|
808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
|
|||
|
|
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
|
|||
|
|
811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
|
|||
|
|
812:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
|
|||
|
|
814:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
|
|||
|
|
816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
|
|||
|
|
817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
|
|||
|
|
818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
|
|||
|
|
820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
823:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
|||
|
|
825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
|
|||
|
|
826:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
827:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
828:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
|
|||
|
|
830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
|
|||
|
|
831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
|
|||
|
|
832:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
|
|||
|
|
834:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
|||
|
|
836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
|||
|
|
837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
|
|||
|
|
838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
|
|||
|
|
839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
|||
|
|
840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
|||
|
|
841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
|
|||
|
|
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
|
|||
|
|
846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
|
|||
|
|
850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
851:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
853:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
854:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 20
|
|||
|
|
|
|||
|
|
|
|||
|
|
856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
|
|||
|
|
857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
|
|||
|
|
858:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
|
|||
|
|
860:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
|||
|
|
862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
|||
|
|
863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
|
|||
|
|
864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
|
|||
|
|
865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
|
|||
|
|
866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
|
|||
|
|
867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
|
|||
|
|
868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
|
|||
|
|
870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
|
|||
|
|
873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
874:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
875:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
876:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
|
|||
|
|
878:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
879:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
|
|||
|
|
881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
|||
|
|
882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
|
|||
|
|
883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
|||
|
|
884:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
885:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
|
|||
|
|
887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
|
|||
|
|
888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
|
|||
|
|
889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
|
|||
|
|
890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
|
|||
|
|
891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
|
|||
|
|
892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
|
|||
|
|
893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
|
|||
|
|
895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
|
|||
|
|
896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
|
|||
|
|
897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
898:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
899:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
|
|||
|
|
901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
|
|||
|
|
902:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
|
|||
|
|
904:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
905:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
|
|||
|
|
907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
|
|||
|
|
908:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
|
|||
|
|
910:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
912:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 21
|
|||
|
|
|
|||
|
|
|
|||
|
|
913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
|
|||
|
|
914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
|
|||
|
|
915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
|
|||
|
|
916:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
|
|||
|
|
918:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
919:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
920:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
|
|||
|
|
922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
|||
|
|
923:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
|
|||
|
|
925:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
926:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
927:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
|
|||
|
|
929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
|||
|
|
930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
|
|||
|
|
931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
|
|||
|
|
932:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
|
|||
|
|
934:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
|
|||
|
|
936:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
937:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
938:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
939:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
|
|||
|
|
941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
|
|||
|
|
942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
|
|||
|
|
943:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
|
|||
|
|
945:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
|
|||
|
|
947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
948:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
949:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
950:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
|
|||
|
|
952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
|
|||
|
|
953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
|
|||
|
|
954:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
|
|||
|
|
956:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
|
|||
|
|
958:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
959:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
960:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
961:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
|
|||
|
|
963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
|
|||
|
|
964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
|||
|
|
965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
|||
|
|
966:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
|
|||
|
|
968:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 22
|
|||
|
|
|
|||
|
|
|
|||
|
|
970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
|
|||
|
|
971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
973:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
|||
|
|
975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
977:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
978:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
979:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
980:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
|
|||
|
|
982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
|
|||
|
|
983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
|||
|
|
984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
|||
|
|
985:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
|
|||
|
|
987:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
989:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
|||
|
|
991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
992:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
993:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
994:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
995:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
|
|||
|
|
997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
|
|||
|
|
998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
|||
|
|
999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
|||
|
|
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
|
|||
|
|
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
|||
|
|
1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
|
|||
|
|
1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
|
|||
|
|
1007:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
|||
|
|
1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
|
|||
|
|
1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
|
|||
|
|
1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
|
|||
|
|
1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
|
|||
|
|
1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
|
|||
|
|
1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
|
|||
|
|
1022:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
|
|||
|
|
1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
|
|||
|
|
1025:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 23
|
|||
|
|
|
|||
|
|
|
|||
|
|
1027:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
|
|||
|
|
1029:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1030:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1031:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
|
|||
|
|
1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
|
|||
|
|
1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
|
|||
|
|
1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
|
|||
|
|
1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
|
|||
|
|
1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
|
|||
|
|
1040:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1041:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
|
|||
|
|
1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
|
|||
|
|
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
|
|||
|
|
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
|
|||
|
|
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
|
|||
|
|
1049:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1051:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
|||
|
|
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
|
|||
|
|
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
|
|||
|
|
1058:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
|
|||
|
|
1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
|
|||
|
|
1061:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
|
|||
|
|
1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
|
|||
|
|
1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
|
|||
|
|
1065:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
|
|||
|
|
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
|
|||
|
|
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros
|
|||
|
|
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value.
|
|||
|
|
1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros
|
|||
|
|
1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value
|
|||
|
|
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
|
|||
|
|
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
|
|||
|
|
1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially.
|
|||
|
|
1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM
|
|||
|
|
1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 24
|
|||
|
|
|
|||
|
|
|
|||
|
|
1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it
|
|||
|
|
1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero".
|
|||
|
|
1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
|
|||
|
|
1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction.
|
|||
|
|
1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U)
|
|||
|
|
1090:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U;
|
|||
|
|
1092:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value);
|
|||
|
|
1094:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1095:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1096:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1097:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
1098:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
1099:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
|||
|
|
1100:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
|||
|
|
1101:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1102:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit)
|
|||
|
|
1103:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value.
|
|||
|
|
1104:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1105:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
|
|||
|
|
1106:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1107:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
|
|||
|
|
1108:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1109:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1110:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1111:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
|||
|
|
1112:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
|
|||
|
|
1113:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
1114:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
|
|||
|
|
1115:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
|
|||
|
|
1116:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
|
|||
|
|
1118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
|
|||
|
|
1120:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1122:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1124:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit)
|
|||
|
|
1125:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values.
|
|||
|
|
1126:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1127:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
|
|||
|
|
1128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
|
|||
|
|
1130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1131:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1132:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1133:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
|||
|
|
1134:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
|
|||
|
|
1135:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
1136:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
|
|||
|
|
1137:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
|
|||
|
|
1138:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1139:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
|
|||
|
|
1140:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 25
|
|||
|
|
|
|||
|
|
|
|||
|
|
1141:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
|
|||
|
|
1142:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1143:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1144:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1145:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1146:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit)
|
|||
|
|
1147:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values.
|
|||
|
|
1148:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
|
|||
|
|
1150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
|
|||
|
|
1152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1154:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
|
|||
|
|
1156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1158:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1159:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1160:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1161:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit)
|
|||
|
|
1162:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values.
|
|||
|
|
1163:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1164:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1165:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
|||
|
|
1166:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
|||
|
|
1167:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1168:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
|
|||
|
|
1169:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1170:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1171:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1172:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
|
|||
|
|
1173:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1174:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1175:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1176:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1177:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1178:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit)
|
|||
|
|
1179:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values.
|
|||
|
|
1180:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1181:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1182:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
|||
|
|
1183:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
|||
|
|
1184:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1185:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
|
|||
|
|
1186:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1187:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1188:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1189:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
|
|||
|
|
1190:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1191:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1192:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1193:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1194:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit)
|
|||
|
|
1196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values.
|
|||
|
|
1197:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 26
|
|||
|
|
|
|||
|
|
|
|||
|
|
1198:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1199:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
|||
|
|
1200:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
|||
|
|
1201:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1202:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
|
|||
|
|
1203:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1204:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1205:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1206:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
|
|||
|
|
1207:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1208:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1209:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1210:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1211:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1212:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock
|
|||
|
|
1213:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX.
|
|||
|
|
1214:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1215:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void)
|
|||
|
|
1216:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1217:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("clrex" ::: "memory");
|
|||
|
|
1218:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1219:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1220:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
1221:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
1222:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
|||
|
|
1223:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
|
|||
|
|
1224:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1225:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1226:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
1227:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
1228:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
|
|||
|
|
1229:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1230:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate
|
|||
|
|
1231:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value.
|
|||
|
|
1232:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated
|
|||
|
|
1233:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32)
|
|||
|
|
1234:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
|
|||
|
|
1235:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1236:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT(ARG1,ARG2) \
|
|||
|
|
1237:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \
|
|||
|
|
1238:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
|
|||
|
|
1239:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \
|
|||
|
|
1240:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
|||
|
|
1241:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
|
|||
|
|
1242:Drivers/CMSIS/Include/cmsis_gcc.h **** })
|
|||
|
|
1243:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1244:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1245:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1246:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate
|
|||
|
|
1247:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value.
|
|||
|
|
1248:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated
|
|||
|
|
1249:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (0..31)
|
|||
|
|
1250:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
|
|||
|
|
1251:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1252:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1,ARG2) \
|
|||
|
|
1253:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \
|
|||
|
|
1254:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 27
|
|||
|
|
|
|||
|
|
|
|||
|
|
1255:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \
|
|||
|
|
1256:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
|||
|
|
1257:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
|
|||
|
|
1258:Drivers/CMSIS/Include/cmsis_gcc.h **** })
|
|||
|
|
1259:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1260:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1261:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1262:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right with Extend (32 bit)
|
|||
|
|
1263:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Moves each bit of a bitstring right by one bit.
|
|||
|
|
1264:Drivers/CMSIS/Include/cmsis_gcc.h **** The carry input is shifted in at the left end of the bitstring.
|
|||
|
|
1265:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to rotate
|
|||
|
|
1266:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
|
|||
|
|
1267:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1268:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
|
|||
|
|
1269:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1270:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1271:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1272:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
|
|||
|
|
1273:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1274:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1275:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1276:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1277:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1278:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (8 bit)
|
|||
|
|
1279:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 8 bit value.
|
|||
|
|
1280:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1281:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
|
|||
|
|
1282:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1283:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
|
|||
|
|
1284:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1285:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1286:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1287:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
|||
|
|
1288:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1289:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
1290:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
|
|||
|
|
1291:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
|
|||
|
|
1292:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1293:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
|
|||
|
|
1294:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
1295:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
|
|||
|
|
1296:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1297:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1298:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1299:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1300:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (16 bit)
|
|||
|
|
1301:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 16 bit values.
|
|||
|
|
1302:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1303:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
|
|||
|
|
1304:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1305:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
|
|||
|
|
1306:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1307:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1308:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1309:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
|
|||
|
|
1310:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1311:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 28
|
|||
|
|
|
|||
|
|
|
|||
|
|
1312:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
|
|||
|
|
1313:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
|
|||
|
|
1314:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1315:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
|
|||
|
|
1316:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
1317:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
|
|||
|
|
1318:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1319:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1320:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1321:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1322:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (32 bit)
|
|||
|
|
1323:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 32 bit values.
|
|||
|
|
1324:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1325:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
|
|||
|
|
1326:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1327:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
|
|||
|
|
1328:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1329:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1330:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1331:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1332:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1333:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1334:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1335:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1336:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1337:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (8 bit)
|
|||
|
|
1338:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 8 bit values.
|
|||
|
|
1339:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1340:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1341:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1342:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
|
|||
|
|
1343:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1344:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1345:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1346:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1347:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1348:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1349:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit)
|
|||
|
|
1350:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 16 bit values.
|
|||
|
|
1351:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1352:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1353:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1354:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
|
|||
|
|
1355:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1356:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1357:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1358:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1359:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1360:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1361:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (32 bit)
|
|||
|
|
1362:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 32 bit values.
|
|||
|
|
1363:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1364:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1365:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1366:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
|
|||
|
|
1367:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1368:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 29
|
|||
|
|
|
|||
|
|
|
|||
|
|
1369:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1370:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1371:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
1372:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
1373:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
|
|||
|
|
1374:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1375:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1376:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate
|
|||
|
|
1377:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value.
|
|||
|
|
1378:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated
|
|||
|
|
1379:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (1..32)
|
|||
|
|
1380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
|
|||
|
|
1381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
|||
|
|
1383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1384:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U))
|
|||
|
|
1385:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1386:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
|||
|
|
1387:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t min = -1 - max ;
|
|||
|
|
1388:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > max)
|
|||
|
|
1389:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1390:Drivers/CMSIS/Include/cmsis_gcc.h **** return max;
|
|||
|
|
1391:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1392:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < min)
|
|||
|
|
1393:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1394:Drivers/CMSIS/Include/cmsis_gcc.h **** return min;
|
|||
|
|
1395:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1396:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1397:Drivers/CMSIS/Include/cmsis_gcc.h **** return val;
|
|||
|
|
1398:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1399:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1400:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate
|
|||
|
|
1402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value.
|
|||
|
|
1403:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated
|
|||
|
|
1404:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31)
|
|||
|
|
1405:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value
|
|||
|
|
1406:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1407:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
|||
|
|
1408:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1409:Drivers/CMSIS/Include/cmsis_gcc.h **** if (sat <= 31U)
|
|||
|
|
1410:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1411:Drivers/CMSIS/Include/cmsis_gcc.h **** const uint32_t max = ((1U << sat) - 1U);
|
|||
|
|
1412:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > (int32_t)max)
|
|||
|
|
1413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1414:Drivers/CMSIS/Include/cmsis_gcc.h **** return max;
|
|||
|
|
1415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1416:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < 0)
|
|||
|
|
1417:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1418:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
|
|||
|
|
1419:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1420:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1421:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val;
|
|||
|
|
1422:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1423:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1424:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
|||
|
|
1425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 30
|
|||
|
|
|
|||
|
|
|
|||
|
|
1426:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
|
|||
|
|
1427:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1428:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1429:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
|||
|
|
1430:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
|||
|
|
1431:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1432:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (8 bit)
|
|||
|
|
1433:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB instruction for 8 bit value.
|
|||
|
|
1434:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1435:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
|
|||
|
|
1436:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
|
|||
|
|
1438:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1439:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1440:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1442:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result);
|
|||
|
|
1443:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1444:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1445:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1446:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1447:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (16 bit)
|
|||
|
|
1448:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH instruction for 16 bit values.
|
|||
|
|
1449:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1450:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
|
|||
|
|
1451:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1452:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
|
|||
|
|
1453:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1454:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1455:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1456:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1457:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result);
|
|||
|
|
1458:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1459:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1460:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1461:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1462:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit)
|
|||
|
|
1463:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values.
|
|||
|
|
1464:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1465:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
|
|||
|
|
1466:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1467:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
|
|||
|
|
1468:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1469:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1470:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1471:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1472:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1473:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1474:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1475:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1476:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1477:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (8 bit)
|
|||
|
|
1478:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values.
|
|||
|
|
1479:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1480:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1481:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1482:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 31
|
|||
|
|
|
|||
|
|
|
|||
|
|
1483:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1484:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1485:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1486:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1487:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1488:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1489:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (16 bit)
|
|||
|
|
1490:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH instruction for 16 bit values.
|
|||
|
|
1491:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1492:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1493:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1494:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
|
|||
|
|
1495:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1496:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1497:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1498:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1499:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1500:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1501:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (32 bit)
|
|||
|
|
1502:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL instruction for 32 bit values.
|
|||
|
|
1503:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1504:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1505:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
|
|||
|
|
1507:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1509:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1510:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1511:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1512:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (8 bit)
|
|||
|
|
1514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value.
|
|||
|
|
1515:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1516:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
|
|||
|
|
1517:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1518:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
|
|||
|
|
1519:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1520:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1521:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1522:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1523:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result);
|
|||
|
|
1524:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1525:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1526:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1527:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1528:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (16 bit)
|
|||
|
|
1529:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH exclusive instruction for 16 bit values.
|
|||
|
|
1530:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1531:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
|
|||
|
|
1532:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1533:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
|
|||
|
|
1534:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1535:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1536:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1537:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1538:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result);
|
|||
|
|
1539:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 32
|
|||
|
|
|
|||
|
|
|
|||
|
|
1540:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1541:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1542:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1543:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit)
|
|||
|
|
1544:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values.
|
|||
|
|
1545:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
|
|||
|
|
1546:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
|
|||
|
|
1547:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1548:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
|
|||
|
|
1549:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1550:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1551:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1552:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
|
|||
|
|
1553:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1554:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1555:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1556:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1557:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1558:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (8 bit)
|
|||
|
|
1559:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB exclusive instruction for 8 bit values.
|
|||
|
|
1560:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1561:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1562:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
|||
|
|
1563:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
|||
|
|
1564:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1565:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
|
|||
|
|
1566:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1567:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1568:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1569:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1570:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1571:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1572:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1573:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1574:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1575:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit)
|
|||
|
|
1576:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values.
|
|||
|
|
1577:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1578:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1579:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
|||
|
|
1580:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
|||
|
|
1581:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1582:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
|
|||
|
|
1583:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1584:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1585:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1586:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1587:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1588:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1589:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1590:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1591:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
|
|||
|
|
1592:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit)
|
|||
|
|
1593:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values.
|
|||
|
|
1594:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
|
|||
|
|
1595:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
|
|||
|
|
1596:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 33
|
|||
|
|
|
|||
|
|
|
|||
|
|
1597:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
|
|||
|
|
1598:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1599:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
|
|||
|
|
1600:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1601:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1602:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1603:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
|
|||
|
|
1604:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1605:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1606:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1607:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
|||
|
|
1608:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
|
|||
|
|
1609:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1610:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
|||
|
|
1611:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1612:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1613:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ################### Compiler specific Intrinsics ########################### */
|
|||
|
|
1614:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
|||
|
|
1615:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated SIMD instructions
|
|||
|
|
1616:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
|
|||
|
|
1617:Drivers/CMSIS/Include/cmsis_gcc.h **** */
|
|||
|
|
1618:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1619:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
|
|||
|
|
1620:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1621:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
|
|||
|
|
1622:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1623:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1624:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1625:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1626:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1627:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1628:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1629:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
|
|||
|
|
1630:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1631:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1632:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1633:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1634:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1635:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1636:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
|
|||
|
|
1638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1639:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1640:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1641:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1642:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1643:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1644:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1645:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
|
|||
|
|
1646:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1647:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1648:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1649:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1650:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1651:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1652:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1653:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 34
|
|||
|
|
|
|||
|
|
|
|||
|
|
1654:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1655:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1656:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1657:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1658:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1659:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1660:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1661:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
|
|||
|
|
1662:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1663:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1664:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1665:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1666:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1667:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1668:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1669:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1670:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
|
|||
|
|
1671:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1672:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1673:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1674:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1675:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1676:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1677:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1678:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
|
|||
|
|
1679:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1680:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1681:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1682:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1683:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1684:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1685:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1686:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
|
|||
|
|
1687:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1688:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1689:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1690:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1691:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1692:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1693:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1694:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
|
|||
|
|
1695:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1696:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1697:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1698:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1699:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1700:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1701:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
|
|||
|
|
1703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1704:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1705:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1706:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1707:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1708:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1709:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1710:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 35
|
|||
|
|
|
|||
|
|
|
|||
|
|
1711:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1712:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1713:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1714:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1715:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1716:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1717:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1718:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1719:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
|
|||
|
|
1720:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1721:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1722:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1723:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1724:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1725:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1726:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1727:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
|
|||
|
|
1728:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1729:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1730:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
96 .loc 3 1731 0
|
|||
|
|
97 .syntax unified
|
|||
|
|
98 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
99 000a 95FA12F2 qadd16 r2, r5, r2
|
|||
|
|
100 @ 0 "" 2
|
|||
|
|
101 .LVL3:
|
|||
|
|
102 .thumb
|
|||
|
|
103 .syntax unified
|
|||
|
|
104 .LBE23:
|
|||
|
|
105 .LBE22:
|
|||
|
|
106 .loc 2 59 0
|
|||
|
|
107 000e B0F91240 ldrsh r4, [r0, #18]
|
|||
|
|
108 .LVL4:
|
|||
|
|
109 .LBB24:
|
|||
|
|
110 .LBB25:
|
|||
|
|
111 .loc 3 1731 0
|
|||
|
|
112 .syntax unified
|
|||
|
|
113 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
114 0012 92FA14F2 qadd16 r2, r2, r4
|
|||
|
|
115 @ 0 "" 2
|
|||
|
|
116 .LVL5:
|
|||
|
|
117 .thumb
|
|||
|
|
118 .syntax unified
|
|||
|
|
119 .LBE25:
|
|||
|
|
120 .LBE24:
|
|||
|
|
121 .loc 2 59 0
|
|||
|
|
122 0016 0280 strh r2, [r0] @ movhi
|
|||
|
|
123 .LVL6:
|
|||
|
|
124 .LBB26:
|
|||
|
|
125 .LBB27:
|
|||
|
|
126 .loc 3 1731 0
|
|||
|
|
127 .syntax unified
|
|||
|
|
128 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
129 0018 94FA14F3 qadd16 r3, r4, r4
|
|||
|
|
130 @ 0 "" 2
|
|||
|
|
131 .LVL7:
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 36
|
|||
|
|
|
|||
|
|
|
|||
|
|
132 .thumb
|
|||
|
|
133 .syntax unified
|
|||
|
|
134 .LBE27:
|
|||
|
|
135 .LBE26:
|
|||
|
|
136 .LBB28:
|
|||
|
|
137 .LBB29:
|
|||
|
|
138 .syntax unified
|
|||
|
|
139 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
140 001c 93FA15F3 qadd16 r3, r3, r5
|
|||
|
|
141 @ 0 "" 2
|
|||
|
|
142 .LVL8:
|
|||
|
|
143 .thumb
|
|||
|
|
144 .syntax unified
|
|||
|
|
145 .LBE29:
|
|||
|
|
146 .LBE28:
|
|||
|
|
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* Derived coefficients and pack into A1 */
|
|||
|
|
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #ifndef ARM_MATH_BIG_ENDIAN
|
|||
|
|
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
|
|||
|
|
147 .loc 2 64 0
|
|||
|
|
148 0020 5B42 negs r3, r3
|
|||
|
|
149 0022 9BB2 uxth r3, r3
|
|||
|
|
150 0024 43EA0443 orr r3, r3, r4, lsl #16
|
|||
|
|
151 0028 4360 str r3, [r0, #4]
|
|||
|
|
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #else
|
|||
|
|
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #endif
|
|||
|
|
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #else
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** q31_t temp; /* to store the sum */
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* Derived coefficient A0 */
|
|||
|
|
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** temp = S->Kp + S->Ki + S->Kd;
|
|||
|
|
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** S->A0 = (q15_t) __SSAT(temp, 16);
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* Derived coefficients and pack into A1 */
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** temp = -(S->Kd + S->Kd + S->Kp);
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** S->A1 = (q15_t) __SSAT(temp, 16);
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** S->A2 = S->Kd;
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */
|
|||
|
|
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* Check whether state needs reset or not */
|
|||
|
|
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** if (resetStateFlag)
|
|||
|
|
152 .loc 2 85 0
|
|||
|
|
153 002a 11B1 cbz r1, .L7
|
|||
|
|
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** {
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** /* Reset state to zero, The size will be always 3 samples */
|
|||
|
|
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** memset(S->state, 0, 3U * sizeof(q15_t));
|
|||
|
|
154 .loc 2 88 0
|
|||
|
|
155 002c 0023 movs r3, #0
|
|||
|
|
156 002e 8360 str r3, [r0, #8] @ unaligned
|
|||
|
|
157 0030 8381 strh r3, [r0, #12] @ unaligned
|
|||
|
|
158 .L7:
|
|||
|
|
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** }
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 37
|
|||
|
|
|
|||
|
|
|
|||
|
|
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c ****
|
|||
|
|
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c **** }
|
|||
|
|
159 .loc 2 91 0
|
|||
|
|
160 0032 30BC pop {r4, r5}
|
|||
|
|
161 .LCFI1:
|
|||
|
|
162 .cfi_restore 5
|
|||
|
|
163 .cfi_restore 4
|
|||
|
|
164 .cfi_def_cfa_offset 0
|
|||
|
|
165 0034 7047 bx lr
|
|||
|
|
166 .cfi_endproc
|
|||
|
|
167 .LFE149:
|
|||
|
|
169 0036 00BF .section .text.arm_pid_init_q31,"ax",%progbits
|
|||
|
|
170 .align 1
|
|||
|
|
171 .p2align 2,,3
|
|||
|
|
172 .global arm_pid_init_q31
|
|||
|
|
173 .syntax unified
|
|||
|
|
174 .thumb
|
|||
|
|
175 .thumb_func
|
|||
|
|
176 .fpu fpv4-sp-d16
|
|||
|
|
178 arm_pid_init_q31:
|
|||
|
|
179 .LFB150:
|
|||
|
|
180 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* ----------------------------------------------------------------------
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Project: CMSIS DSP Library
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Title: arm_pid_init_q31.c
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Description: Q31 PID Control initialization function
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** *
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * $Date: 18. March 2019
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * $Revision: V1.6.0
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** *
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Target Processor: Cortex-M cores
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * -------------------------------------------------------------------- */
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /*
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** *
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** *
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * not use this file except in compliance with the License.
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * You may obtain a copy of the License at
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** *
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** *
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /**
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @addtogroup PID
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @{
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 38
|
|||
|
|
|
|||
|
|
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /**
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @brief Initialization function for the Q31 PID Control.
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @param[in,out] S points to an instance of the Q31 PID structure
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @param[in] resetStateFlag
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** - value = 0: no change in state
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** - value = 1: reset state
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @return none
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** @par Details
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** The <code>resetStateFlag</code> specifies whether to set state to zero or not. \
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** The function computes the structure fields: <code>A0</code>, <code>A1</code> <co
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain(
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** also sets the state variables to all zeros.
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** */
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** void arm_pid_init_q31(
|
|||
|
|
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** arm_pid_instance_q31 * S,
|
|||
|
|
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** int32_t resetStateFlag)
|
|||
|
|
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** {
|
|||
|
|
181 .loc 4 54 0
|
|||
|
|
182 .cfi_startproc
|
|||
|
|
183 @ args = 0, pretend = 0, frame = 0
|
|||
|
|
184 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
185 @ link register save eliminated.
|
|||
|
|
186 .LVL9:
|
|||
|
|
187 0000 30B4 push {r4, r5}
|
|||
|
|
188 .LCFI2:
|
|||
|
|
189 .cfi_def_cfa_offset 8
|
|||
|
|
190 .cfi_offset 4, -8
|
|||
|
|
191 .cfi_offset 5, -4
|
|||
|
|
192 .LBB30:
|
|||
|
|
193 .LBB31:
|
|||
|
|
1732:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1733:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1734:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1735:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
|
|||
|
|
1736:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1737:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1738:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1739:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1740:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1741:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1742:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1743:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
|
|||
|
|
1744:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1745:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1746:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1747:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1748:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1749:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1750:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1751:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
|
|||
|
|
1752:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1754:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1755:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1756:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 39
|
|||
|
|
|
|||
|
|
|
|||
|
|
1757:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1758:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1759:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
|
|||
|
|
1760:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1761:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1762:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1763:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1764:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1765:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1766:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1767:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1768:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1769:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1770:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1771:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1772:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1773:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1774:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1775:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1776:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1777:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1778:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1779:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1780:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1781:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1782:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1783:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1784:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1785:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1786:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1787:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1788:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1789:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1790:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1791:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1792:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1793:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1794:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1795:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1796:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1797:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1798:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1799:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1800:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1801:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1802:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1803:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1804:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1805:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1806:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1808:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1809:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1810:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1811:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1812:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1813:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 40
|
|||
|
|
|
|||
|
|
|
|||
|
|
1814:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1815:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
|
|||
|
|
1816:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1817:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1818:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1820:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1821:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1822:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1823:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
|
|||
|
|
1824:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1825:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1826:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1827:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1828:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1829:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1830:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1831:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
|
|||
|
|
1832:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1833:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1834:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1835:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1836:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1837:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1838:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1839:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
|
|||
|
|
1840:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1841:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1842:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1843:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1844:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1845:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1846:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1847:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
|
|||
|
|
1848:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1849:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1850:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1851:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1852:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1853:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1854:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1855:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
|
|||
|
|
1856:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1857:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1858:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1859:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1860:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1861:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1862:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1863:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
|
|||
|
|
1864:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1865:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1866:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1867:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1868:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1870:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 41
|
|||
|
|
|
|||
|
|
|
|||
|
|
1871:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
|
|||
|
|
1872:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1873:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1874:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1875:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1876:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1877:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1878:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1879:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
|
|||
|
|
1880:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1881:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1882:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1883:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1884:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1885:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1886:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1887:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
|
|||
|
|
1888:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1889:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1890:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1891:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1892:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1893:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1894:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1895:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
|
|||
|
|
1896:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1897:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1898:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1899:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1900:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1901:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1902:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1903:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
|
|||
|
|
1904:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1906:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1908:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1909:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1910:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1911:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
|
|||
|
|
1912:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1913:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1914:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1915:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1916:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1917:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1918:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
|
|||
|
|
1920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1922:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
|||
|
|
1924:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1926:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1927:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT16(ARG1,ARG2) \
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 42
|
|||
|
|
|
|||
|
|
|
|||
|
|
1928:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
|
|||
|
|
1929:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \
|
|||
|
|
1930:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
|||
|
|
1931:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
|
|||
|
|
1932:Drivers/CMSIS/Include/cmsis_gcc.h **** })
|
|||
|
|
1933:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1934:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT16(ARG1,ARG2) \
|
|||
|
|
1935:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \
|
|||
|
|
1936:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \
|
|||
|
|
1937:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
|
|||
|
|
1938:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \
|
|||
|
|
1939:Drivers/CMSIS/Include/cmsis_gcc.h **** })
|
|||
|
|
1940:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1941:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
|
|||
|
|
1942:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1943:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1944:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1945:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
|
|||
|
|
1946:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1947:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1948:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1949:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1950:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1951:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1952:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1953:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1954:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1955:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1956:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1957:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
|
|||
|
|
1958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1959:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1960:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1961:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
|
|||
|
|
1962:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1963:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1964:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1965:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
|
|||
|
|
1966:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1967:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1968:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1969:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1970:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1971:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1972:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1973:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
|
|||
|
|
1974:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1975:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1976:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1977:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1978:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1979:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1980:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
|
|||
|
|
1982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1984:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 43
|
|||
|
|
|
|||
|
|
|
|||
|
|
1985:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
1986:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1987:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1988:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1989:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
|
|||
|
|
1990:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1991:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
1992:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1993:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
|||
|
|
1994:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
1995:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
1996:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
1997:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
|
|||
|
|
1998:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
1999:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
2000:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2001:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
|||
|
|
2002:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
2003:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2004:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2005:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
|
|||
|
|
2006:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2007:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
|
|||
|
|
2008:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
|
|||
|
|
2009:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
|
|||
|
|
2010:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
|
|||
|
|
2011:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
|
|||
|
|
2012:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2013:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
|
|||
|
|
2014:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o
|
|||
|
|
2015:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
|
|||
|
|
2016:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o
|
|||
|
|
2017:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
2018:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2019:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
|
|||
|
|
2020:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2021:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2022:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
|
|||
|
|
2023:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2024:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
|
|||
|
|
2025:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
|
|||
|
|
2026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
|
|||
|
|
2027:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
|
|||
|
|
2028:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
|
|||
|
|
2029:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2030:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
|
|||
|
|
2031:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (
|
|||
|
|
2032:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
|
|||
|
|
2033:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (
|
|||
|
|
2034:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
2035:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2036:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
|
|||
|
|
2037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2038:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2039:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
|
|||
|
|
2040:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2041:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 44
|
|||
|
|
|
|||
|
|
|
|||
|
|
2042:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2043:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
2044:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
2045:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2046:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2047:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
|
|||
|
|
2048:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2049:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
2050:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
2052:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
2053:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2054:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2055:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
|
|||
|
|
2056:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
2058:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2059:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
|||
|
|
2060:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
2061:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2062:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2063:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
|
|||
|
|
2064:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2065:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
2066:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2067:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
|
|||
|
|
2068:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
2069:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2070:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2071:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
|
|||
|
|
2072:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2073:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
|
|||
|
|
2074:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
|
|||
|
|
2075:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
|
|||
|
|
2076:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
|
|||
|
|
2077:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
|
|||
|
|
2078:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2079:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
|
|||
|
|
2080:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o
|
|||
|
|
2081:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
|
|||
|
|
2082:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (o
|
|||
|
|
2083:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
2084:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2085:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
|
|||
|
|
2086:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2087:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2088:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
|
|||
|
|
2089:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2090:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{
|
|||
|
|
2091:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2];
|
|||
|
|
2092:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64;
|
|||
|
|
2093:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr;
|
|||
|
|
2094:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc;
|
|||
|
|
2095:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2096:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */
|
|||
|
|
2097:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (
|
|||
|
|
2098:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* Big endian */
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 45
|
|||
|
|
|
|||
|
|
|
|||
|
|
2099:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (
|
|||
|
|
2100:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
|
|||
|
|
2101:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2102:Drivers/CMSIS/Include/cmsis_gcc.h **** return(llr.w64);
|
|||
|
|
2103:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2104:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2105:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
|
|||
|
|
2106:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2107:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
|
|||
|
|
2108:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2109:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
2110:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
|
|||
|
|
2111:Drivers/CMSIS/Include/cmsis_gcc.h **** }
|
|||
|
|
2112:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2113:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __QADD( int32_t op1, int32_t op2)
|
|||
|
|
2114:Drivers/CMSIS/Include/cmsis_gcc.h **** {
|
|||
|
|
2115:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t result;
|
|||
|
|
2116:Drivers/CMSIS/Include/cmsis_gcc.h ****
|
|||
|
|
2117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
|
|||
|
|
194 .loc 3 2117 0
|
|||
|
|
195 0002 D0E90652 ldrd r5, r2, [r0, #24]
|
|||
|
|
196 .syntax unified
|
|||
|
|
197 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
198 0006 82FA85F2 qadd r2, r5, r2
|
|||
|
|
199 @ 0 "" 2
|
|||
|
|
200 .thumb
|
|||
|
|
201 .syntax unified
|
|||
|
|
202 .LBE31:
|
|||
|
|
203 .LBE30:
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** #if defined (ARM_MATH_DSP)
|
|||
|
|
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Derived coefficient A0 */
|
|||
|
|
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
|
|||
|
|
204 .loc 4 59 0
|
|||
|
|
205 000a 046A ldr r4, [r0, #32]
|
|||
|
|
206 .LVL10:
|
|||
|
|
207 .LBB32:
|
|||
|
|
208 .LBB33:
|
|||
|
|
209 .loc 3 2117 0
|
|||
|
|
210 .syntax unified
|
|||
|
|
211 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
212 000c 84FA82F2 qadd r2, r2, r4
|
|||
|
|
213 @ 0 "" 2
|
|||
|
|
214 .LVL11:
|
|||
|
|
215 .thumb
|
|||
|
|
216 .syntax unified
|
|||
|
|
217 .LBE33:
|
|||
|
|
218 .LBE32:
|
|||
|
|
219 .loc 4 59 0
|
|||
|
|
220 0010 0260 str r2, [r0]
|
|||
|
|
221 .LVL12:
|
|||
|
|
222 .LBB34:
|
|||
|
|
223 .LBB35:
|
|||
|
|
224 .loc 3 2117 0
|
|||
|
|
225 .syntax unified
|
|||
|
|
226 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 46
|
|||
|
|
|
|||
|
|
|
|||
|
|
227 0012 84FA84F3 qadd r3, r4, r4
|
|||
|
|
228 @ 0 "" 2
|
|||
|
|
229 .LVL13:
|
|||
|
|
230 .thumb
|
|||
|
|
231 .syntax unified
|
|||
|
|
232 .LBE35:
|
|||
|
|
233 .LBE34:
|
|||
|
|
234 .LBB36:
|
|||
|
|
235 .LBB37:
|
|||
|
|
236 .syntax unified
|
|||
|
|
237 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
|
|||
|
|
238 0016 85FA83F3 qadd r3, r3, r5
|
|||
|
|
239 @ 0 "" 2
|
|||
|
|
240 .LVL14:
|
|||
|
|
241 .thumb
|
|||
|
|
242 .syntax unified
|
|||
|
|
243 .LBE37:
|
|||
|
|
244 .LBE36:
|
|||
|
|
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Derived coefficient A1 */
|
|||
|
|
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
|
|||
|
|
245 .loc 4 62 0
|
|||
|
|
246 001a 5B42 negs r3, r3
|
|||
|
|
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** #else
|
|||
|
|
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** q31_t temp; /* to store the sum */
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Derived coefficient A0 */
|
|||
|
|
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Derived coefficient A1 */
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
|
|||
|
|
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
|
|||
|
|
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** #endif /* #if defined (ARM_MATH_DSP) */
|
|||
|
|
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Derived coefficient A2 */
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** S->A2 = S->Kd;
|
|||
|
|
247 .loc 4 79 0
|
|||
|
|
248 001c C0E90134 strd r3, r4, [r0, #4]
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Check whether state needs reset or not */
|
|||
|
|
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** if (resetStateFlag)
|
|||
|
|
249 .loc 4 82 0
|
|||
|
|
250 0020 19B1 cbz r1, .L13
|
|||
|
|
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** {
|
|||
|
|
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** /* Reset state to zero, The size will be always 3 samples */
|
|||
|
|
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** memset(S->state, 0, 3U * sizeof(q31_t));
|
|||
|
|
251 .loc 4 85 0
|
|||
|
|
252 0022 0023 movs r3, #0
|
|||
|
|
253 0024 C360 str r3, [r0, #12] @ unaligned
|
|||
|
|
254 0026 0361 str r3, [r0, #16] @ unaligned
|
|||
|
|
255 0028 4361 str r3, [r0, #20] @ unaligned
|
|||
|
|
256 .L13:
|
|||
|
|
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** }
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 47
|
|||
|
|
|
|||
|
|
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c ****
|
|||
|
|
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c **** }
|
|||
|
|
257 .loc 4 88 0
|
|||
|
|
258 002a 30BC pop {r4, r5}
|
|||
|
|
259 .LCFI3:
|
|||
|
|
260 .cfi_restore 5
|
|||
|
|
261 .cfi_restore 4
|
|||
|
|
262 .cfi_def_cfa_offset 0
|
|||
|
|
263 002c 7047 bx lr
|
|||
|
|
264 .cfi_endproc
|
|||
|
|
265 .LFE150:
|
|||
|
|
267 002e 00BF .section .text.arm_pid_reset_f32,"ax",%progbits
|
|||
|
|
268 .align 1
|
|||
|
|
269 .p2align 2,,3
|
|||
|
|
270 .global arm_pid_reset_f32
|
|||
|
|
271 .syntax unified
|
|||
|
|
272 .thumb
|
|||
|
|
273 .thumb_func
|
|||
|
|
274 .fpu fpv4-sp-d16
|
|||
|
|
276 arm_pid_reset_f32:
|
|||
|
|
277 .LFB151:
|
|||
|
|
278 .file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** /* ----------------------------------------------------------------------
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Project: CMSIS DSP Library
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Title: arm_pid_reset_f32.c
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Description: Floating-point PID Control reset function
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** *
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * $Date: 18. March 2019
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * $Revision: V1.6.0
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** *
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Target Processor: Cortex-M cores
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * -------------------------------------------------------------------- */
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** /*
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** *
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** *
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * not use this file except in compliance with the License.
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * You may obtain a copy of the License at
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** *
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** *
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c ****
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** /**
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** @addtogroup PID
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** @{
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 48
|
|||
|
|
|
|||
|
|
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** /**
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** @brief Reset function for the floating-point PID Control.
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** @param[in,out] S points to an instance of the floating-point PID structure
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** @return none
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c ****
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** @par Details
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** The function resets the state buffer to zeros.
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** */
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c ****
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** void arm_pid_reset_f32(
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** arm_pid_instance_f32 * S)
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** {
|
|||
|
|
279 .loc 5 47 0
|
|||
|
|
280 .cfi_startproc
|
|||
|
|
281 @ args = 0, pretend = 0, frame = 0
|
|||
|
|
282 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
283 @ link register save eliminated.
|
|||
|
|
284 .LVL15:
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** /* Reset state to zero, The size will be always 3 samples */
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** memset(S->state, 0, 3U * sizeof(float32_t));
|
|||
|
|
285 .loc 5 49 0
|
|||
|
|
286 0000 0023 movs r3, #0
|
|||
|
|
287 0002 C360 str r3, [r0, #12] @ unaligned
|
|||
|
|
288 0004 0361 str r3, [r0, #16] @ unaligned
|
|||
|
|
289 0006 4361 str r3, [r0, #20] @ unaligned
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c **** }
|
|||
|
|
290 .loc 5 50 0
|
|||
|
|
291 0008 7047 bx lr
|
|||
|
|
292 .cfi_endproc
|
|||
|
|
293 .LFE151:
|
|||
|
|
295 000a 00BF .section .text.arm_pid_reset_q15,"ax",%progbits
|
|||
|
|
296 .align 1
|
|||
|
|
297 .p2align 2,,3
|
|||
|
|
298 .global arm_pid_reset_q15
|
|||
|
|
299 .syntax unified
|
|||
|
|
300 .thumb
|
|||
|
|
301 .thumb_func
|
|||
|
|
302 .fpu fpv4-sp-d16
|
|||
|
|
304 arm_pid_reset_q15:
|
|||
|
|
305 .LFB152:
|
|||
|
|
306 .file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** /* ----------------------------------------------------------------------
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Project: CMSIS DSP Library
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Title: arm_pid_reset_q15.c
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Description: Q15 PID Control reset function
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** *
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * $Date: 18. March 2019
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * $Revision: V1.6.0
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** *
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Target Processor: Cortex-M cores
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * -------------------------------------------------------------------- */
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** /*
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** *
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** *
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 49
|
|||
|
|
|
|||
|
|
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * not use this file except in compliance with the License.
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * You may obtain a copy of the License at
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** *
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** *
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c ****
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** /**
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** @addtogroup PID
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** @{
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c ****
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** /**
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** @brief Reset function for the Q15 PID Control.
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** @param[in,out] S points to an instance of the Q15 PID structure
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** @return none
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c ****
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** @par Details
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** The function resets the state buffer to zeros.
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** */
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c ****
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** void arm_pid_reset_q15(
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** arm_pid_instance_q15 * S)
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** {
|
|||
|
|
307 .loc 6 47 0
|
|||
|
|
308 .cfi_startproc
|
|||
|
|
309 @ args = 0, pretend = 0, frame = 0
|
|||
|
|
310 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
311 @ link register save eliminated.
|
|||
|
|
312 .LVL16:
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** /* Reset state to zero, The size will be always 3 samples */
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** memset(S->state, 0, 3U * sizeof(q15_t));
|
|||
|
|
313 .loc 6 49 0
|
|||
|
|
314 0000 0023 movs r3, #0
|
|||
|
|
315 0002 8360 str r3, [r0, #8] @ unaligned
|
|||
|
|
316 0004 8381 strh r3, [r0, #12] @ unaligned
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c **** }
|
|||
|
|
317 .loc 6 50 0
|
|||
|
|
318 0006 7047 bx lr
|
|||
|
|
319 .cfi_endproc
|
|||
|
|
320 .LFE152:
|
|||
|
|
322 .section .text.arm_pid_reset_q31,"ax",%progbits
|
|||
|
|
323 .align 1
|
|||
|
|
324 .p2align 2,,3
|
|||
|
|
325 .global arm_pid_reset_q31
|
|||
|
|
326 .syntax unified
|
|||
|
|
327 .thumb
|
|||
|
|
328 .thumb_func
|
|||
|
|
329 .fpu fpv4-sp-d16
|
|||
|
|
331 arm_pid_reset_q31:
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 50
|
|||
|
|
|
|||
|
|
|
|||
|
|
332 .LFB153:
|
|||
|
|
333 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** /* ----------------------------------------------------------------------
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Project: CMSIS DSP Library
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Title: arm_pid_reset_q31.c
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Description: Q31 PID Control reset function
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** *
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * $Date: 18. March 2019
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * $Revision: V1.6.0
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** *
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Target Processor: Cortex-M cores
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * -------------------------------------------------------------------- */
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** /*
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** *
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** *
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * not use this file except in compliance with the License.
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * You may obtain a copy of the License at
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** *
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** *
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c ****
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** /**
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** @addtogroup PID
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** @{
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c ****
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** /**
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** @brief Reset function for the Q31 PID Control.
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** @param[in,out] S points to an instance of the Q31 PID structure
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** @return none
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c ****
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** @par Details
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** The function resets the state buffer to zeros.
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** */
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c ****
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** void arm_pid_reset_q31(
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** arm_pid_instance_q31 * S)
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** {
|
|||
|
|
334 .loc 7 47 0
|
|||
|
|
335 .cfi_startproc
|
|||
|
|
336 @ args = 0, pretend = 0, frame = 0
|
|||
|
|
337 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
338 @ link register save eliminated.
|
|||
|
|
339 .LVL17:
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** /* Reset state to zero, The size will be always 3 samples */
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** memset(S->state, 0, 3U * sizeof(q31_t));
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 51
|
|||
|
|
|
|||
|
|
|
|||
|
|
340 .loc 7 49 0
|
|||
|
|
341 0000 0023 movs r3, #0
|
|||
|
|
342 0002 C360 str r3, [r0, #12] @ unaligned
|
|||
|
|
343 0004 0361 str r3, [r0, #16] @ unaligned
|
|||
|
|
344 0006 4361 str r3, [r0, #20] @ unaligned
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c **** }
|
|||
|
|
345 .loc 7 50 0
|
|||
|
|
346 0008 7047 bx lr
|
|||
|
|
347 .cfi_endproc
|
|||
|
|
348 .LFE153:
|
|||
|
|
350 000a 00BF .section .text.arm_sin_cos_f32,"ax",%progbits
|
|||
|
|
351 .align 1
|
|||
|
|
352 .p2align 2,,3
|
|||
|
|
353 .global arm_sin_cos_f32
|
|||
|
|
354 .syntax unified
|
|||
|
|
355 .thumb
|
|||
|
|
356 .thumb_func
|
|||
|
|
357 .fpu fpv4-sp-d16
|
|||
|
|
359 arm_sin_cos_f32:
|
|||
|
|
360 .LFB154:
|
|||
|
|
361 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c"
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* ----------------------------------------------------------------------
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Project: CMSIS DSP Library
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Title: arm_sin_cos_f32.c
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Description: Sine and Cosine calculation for floating-point values
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * $Date: 18. March 2019
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * $Revision: V1.6.0
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Target Processor: Cortex-M cores
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * -------------------------------------------------------------------- */
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /*
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * not use this file except in compliance with the License.
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * You may obtain a copy of the License at
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** #include "arm_common_tables.h"
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /**
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @ingroup groupController
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /**
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 52
|
|||
|
|
|
|||
|
|
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @defgroup SinCos Sine Cosine
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** Computes the trigonometric sine and cosine values using a combination of table lookup
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** and linear interpolation.
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** There are separate functions for Q31 and floating-point data types.
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** The input to the floating-point version is in degrees while the
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** fixed-point Q31 have a scaled input with the range
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** [-1 0.9999] mapping to [-180 +180] degrees.
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** The floating point function also allows values that are out of the usual range. When this happens
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** take extra time to adjust the input value to the range of [-180 180].
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** The result is accurate to 5 digits after the decimal point.
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** The implementation is based on table lookup using 360 values together with linear interpolation.
|
|||
|
|
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** The steps used are:
|
|||
|
|
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** -# Calculation of the nearest integer table index.
|
|||
|
|
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** -# Compute the fractional portion (fract) of the input.
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c ind
|
|||
|
|
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
|
|||
|
|
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c i
|
|||
|
|
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
|
|||
|
|
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** */
|
|||
|
|
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /**
|
|||
|
|
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @addtogroup SinCos
|
|||
|
|
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @{
|
|||
|
|
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** */
|
|||
|
|
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /**
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @brief Floating-point sin_cos function.
|
|||
|
|
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @param[in] theta input value in degrees
|
|||
|
|
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @param[out] pSinVal points to processed sine output
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @param[out] pCosVal points to processed cosine output
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** @return none
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** */
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** void arm_sin_cos_f32(
|
|||
|
|
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t theta,
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t * pSinVal,
|
|||
|
|
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t * pCosVal)
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** {
|
|||
|
|
362 .loc 8 78 0
|
|||
|
|
363 .cfi_startproc
|
|||
|
|
364 @ args = 0, pretend = 0, frame = 0
|
|||
|
|
365 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
366 @ link register save eliminated.
|
|||
|
|
367 .LVL18:
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t fract, in; /* Temporary input, output variables */
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** uint16_t indexS, indexC; /* Index variable */
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t f1, f2, d1, d2; /* Two nearest output values */
|
|||
|
|
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t Dn, Df;
|
|||
|
|
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t temp, findex;
|
|||
|
|
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* input x is in degrees */
|
|||
|
|
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** in = theta * 0.00277777777778f;
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 53
|
|||
|
|
|
|||
|
|
|
|||
|
|
368 .loc 8 87 0
|
|||
|
|
369 0000 9FED3C7A vldr.32 s14, .L27
|
|||
|
|
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** if (in < 0.0f)
|
|||
|
|
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** {
|
|||
|
|
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** in = -in;
|
|||
|
|
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** }
|
|||
|
|
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** in = in - (int32_t)in;
|
|||
|
|
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Calculate the nearest index */
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
|
|||
|
|
370 .loc 8 97 0
|
|||
|
|
371 0004 9FED3C6A vldr.32 s12, .L27+4
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** indexS = ((uint16_t)findex) & 0x1ff;
|
|||
|
|
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
|
|||
|
|
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Calculation of fractional value */
|
|||
|
|
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** fract = findex - (float32_t) indexS;
|
|||
|
|
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Read two nearest values of input value from the cos & sin tables */
|
|||
|
|
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f1 = sinTable_f32[indexC ];
|
|||
|
|
372 .loc 8 105 0
|
|||
|
|
373 0008 3C4A ldr r2, .L27+8
|
|||
|
|
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f2 = sinTable_f32[indexC+1];
|
|||
|
|
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d1 = -sinTable_f32[indexS ];
|
|||
|
|
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d2 = -sinTable_f32[indexS+1];
|
|||
|
|
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = (1.0f - fract) * f1 + fract * f2;
|
|||
|
|
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE
|
|||
|
|
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** Df = f2 - f1; /* delta between the values of the functions */
|
|||
|
|
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = Dn * (d1 + d2) - 2 * Df;
|
|||
|
|
374 .loc 8 115 0
|
|||
|
|
375 000a DFED3D6A vldr.32 s13, .L27+12
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
376 .loc 8 87 0
|
|||
|
|
377 000e 20EE077A vmul.f32 s14, s0, s14
|
|||
|
|
378 .LVL19:
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** float32_t fract, in; /* Temporary input, output variables */
|
|||
|
|
379 .loc 8 78 0
|
|||
|
|
380 0012 30B4 push {r4, r5}
|
|||
|
|
381 .LCFI4:
|
|||
|
|
382 .cfi_def_cfa_offset 8
|
|||
|
|
383 .cfi_offset 4, -8
|
|||
|
|
384 .cfi_offset 5, -4
|
|||
|
|
385 0014 B0EEC77A vabs.f32 s14, s14
|
|||
|
|
386 .LVL20:
|
|||
|
|
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
387 .loc 8 94 0
|
|||
|
|
388 0018 FDEEC77A vcvt.s32.f32 s15, s14
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
389 .loc 8 116 0
|
|||
|
|
390 001c F0EE005A vmov.f32 s11, #2.0e+0
|
|||
|
|
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
391 .loc 8 94 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 54
|
|||
|
|
|
|||
|
|
|
|||
|
|
392 0020 F8EEE77A vcvt.f32.s32 s15, s15
|
|||
|
|
393 .LVL21:
|
|||
|
|
394 .loc 8 116 0
|
|||
|
|
395 0024 F0EE081A vmov.f32 s3, #3.0e+0
|
|||
|
|
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
396 .loc 8 94 0
|
|||
|
|
397 0028 77EE677A vsub.f32 s15, s14, s15
|
|||
|
|
398 .LVL22:
|
|||
|
|
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Calculation of cosine value */
|
|||
|
|
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *pCosVal = fract * temp + f1;
|
|||
|
|
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Read two nearest values of input value from the cos & sin tables */
|
|||
|
|
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f1 = sinTable_f32[indexS ];
|
|||
|
|
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f2 = sinTable_f32[indexS+1];
|
|||
|
|
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d1 = sinTable_f32[indexC ];
|
|||
|
|
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d2 = sinTable_f32[indexC+1];
|
|||
|
|
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = (1.0f - fract) * f1 + fract * f2;
|
|||
|
|
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** Df = f2 - f1; // delta between the values of the functions
|
|||
|
|
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = Dn * (d1 + d2) - 2 * Df;
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** /* Calculation of sine value */
|
|||
|
|
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *pSinVal = fract * temp + f1;
|
|||
|
|
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** if (theta < 0.0f)
|
|||
|
|
399 .loc 8 138 0
|
|||
|
|
400 002c B5EEC00A vcmpe.f32 s0, #0
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** indexS = ((uint16_t)findex) & 0x1ff;
|
|||
|
|
401 .loc 8 97 0
|
|||
|
|
402 0030 67EE867A vmul.f32 s15, s15, s12
|
|||
|
|
403 .LVL23:
|
|||
|
|
404 .loc 8 138 0
|
|||
|
|
405 0034 F1EE10FA vmrs APSR_nzcv, FPSCR
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
|
|||
|
|
406 .loc 8 98 0
|
|||
|
|
407 0038 BCEEE77A vcvt.u32.f32 s14, s15
|
|||
|
|
408 .LVL24:
|
|||
|
|
409 003c 17EE103A vmov r3, s14 @ int
|
|||
|
|
410 0040 C3F30803 ubfx r3, r3, #0, #9
|
|||
|
|
411 .LVL25:
|
|||
|
|
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
412 .loc 8 99 0
|
|||
|
|
413 0044 03F18004 add r4, r3, #128
|
|||
|
|
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d2 = -sinTable_f32[indexS+1];
|
|||
|
|
414 .loc 8 107 0
|
|||
|
|
415 0048 02EB8305 add r5, r2, r3, lsl #2
|
|||
|
|
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f2 = sinTable_f32[indexC+1];
|
|||
|
|
416 .loc 8 105 0
|
|||
|
|
417 004c C4F30804 ubfx r4, r4, #0, #9
|
|||
|
|
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d2 = -sinTable_f32[indexS+1];
|
|||
|
|
418 .loc 8 107 0
|
|||
|
|
419 0050 D5ED003A vldr.32 s7, [r5]
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 55
|
|||
|
|
|
|||
|
|
|
|||
|
|
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
420 .loc 8 108 0
|
|||
|
|
421 0054 95ED014A vldr.32 s8, [r5, #4]
|
|||
|
|
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f2 = sinTable_f32[indexC+1];
|
|||
|
|
422 .loc 8 105 0
|
|||
|
|
423 0058 02EB8405 add r5, r2, r4, lsl #2
|
|||
|
|
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d1 = -sinTable_f32[indexS ];
|
|||
|
|
424 .loc 8 106 0
|
|||
|
|
425 005c 95ED013A vldr.32 s6, [r5, #4]
|
|||
|
|
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** f2 = sinTable_f32[indexC+1];
|
|||
|
|
426 .loc 8 105 0
|
|||
|
|
427 0060 95ED006A vldr.32 s12, [r5]
|
|||
|
|
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** d2 = -sinTable_f32[indexS+1];
|
|||
|
|
428 .loc 8 107 0
|
|||
|
|
429 0064 B1EE635A vneg.f32 s10, s7
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
430 .loc 8 116 0
|
|||
|
|
431 0068 F0EE444A vmov.f32 s9, s8
|
|||
|
|
432 006c D5EE254A vfnms.f32 s9, s10, s11
|
|||
|
|
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** {
|
|||
|
|
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** *pSinVal = -*pSinVal;
|
|||
|
|
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** }
|
|||
|
|
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** }
|
|||
|
|
433 .loc 8 142 0
|
|||
|
|
434 0070 30BC pop {r4, r5}
|
|||
|
|
435 .LCFI5:
|
|||
|
|
436 .cfi_restore 5
|
|||
|
|
437 .cfi_restore 4
|
|||
|
|
438 .cfi_def_cfa_offset 0
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
439 .loc 8 132 0
|
|||
|
|
440 0072 B0EE437A vmov.f32 s14, s6
|
|||
|
|
441 0076 A6EE257A vfma.f32 s14, s12, s11
|
|||
|
|
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
442 .loc 8 113 0
|
|||
|
|
443 007a 73EE462A vsub.f32 s5, s6, s12
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
444 .loc 8 116 0
|
|||
|
|
445 007e 66EEE44A vnmul.f32 s9, s13, s9
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
446 .loc 8 132 0
|
|||
|
|
447 0082 F0EE475A vmov.f32 s11, s14
|
|||
|
|
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
448 .loc 8 102 0
|
|||
|
|
449 0086 07EE103A vmov s14, r3 @ int
|
|||
|
|
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
450 .loc 8 115 0
|
|||
|
|
451 008a 35EE441A vsub.f32 s2, s10, s8
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
452 .loc 8 116 0
|
|||
|
|
453 008e E2EEA14A vfma.f32 s9, s5, s3
|
|||
|
|
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = Dn * (d1 + d2) - 2 * Df;
|
|||
|
|
454 .loc 8 130 0
|
|||
|
|
455 0092 34EE634A vsub.f32 s8, s8, s7
|
|||
|
|
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
456 .loc 8 102 0
|
|||
|
|
457 0096 B8EE477A vcvt.f32.u32 s14, s14
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 56
|
|||
|
|
|
|||
|
|
|
|||
|
|
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
458 .loc 8 115 0
|
|||
|
|
459 009a 32EEA22A vadd.f32 s4, s5, s5
|
|||
|
|
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
460 .loc 8 131 0
|
|||
|
|
461 009e 74EE042A vadd.f32 s5, s8, s8
|
|||
|
|
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
462 .loc 8 102 0
|
|||
|
|
463 00a2 77EEC77A vsub.f32 s15, s15, s14
|
|||
|
|
464 .LVL26:
|
|||
|
|
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
465 .loc 8 131 0
|
|||
|
|
466 00a6 36EE033A vadd.f32 s6, s12, s6
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
467 .loc 8 132 0
|
|||
|
|
468 00aa 26EEE57A vnmul.f32 s14, s13, s11
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
469 .loc 8 116 0
|
|||
|
|
470 00ae F0EE645A vmov.f32 s11, s9
|
|||
|
|
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
471 .loc 8 131 0
|
|||
|
|
472 00b2 F0EE624A vmov.f32 s9, s5
|
|||
|
|
473 00b6 D3EE264A vfnms.f32 s9, s6, s13
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
474 .loc 8 132 0
|
|||
|
|
475 00ba A4EE217A vfma.f32 s14, s8, s3
|
|||
|
|
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
|
|||
|
|
476 .loc 8 115 0
|
|||
|
|
477 00be 91EE262A vfnms.f32 s4, s2, s13
|
|||
|
|
478 .LVL27:
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
479 .loc 8 132 0
|
|||
|
|
480 00c2 A7EEA47A vfma.f32 s14, s15, s9
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** temp = fract * temp + d1 * Dn;
|
|||
|
|
481 .loc 8 116 0
|
|||
|
|
482 00c6 E7EE825A vfma.f32 s11, s15, s4
|
|||
|
|
483 .LVL28:
|
|||
|
|
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
484 .loc 8 117 0
|
|||
|
|
485 00ca 25EE265A vmul.f32 s10, s10, s13
|
|||
|
|
486 .LVL29:
|
|||
|
|
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
487 .loc 8 133 0
|
|||
|
|
488 00ce 66EE266A vmul.f32 s13, s12, s13
|
|||
|
|
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
489 .loc 8 117 0
|
|||
|
|
490 00d2 A7EEA55A vfma.f32 s10, s15, s11
|
|||
|
|
491 .LVL30:
|
|||
|
|
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
492 .loc 8 133 0
|
|||
|
|
493 00d6 E7EE876A vfma.f32 s13, s15, s14
|
|||
|
|
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
494 .loc 8 120 0
|
|||
|
|
495 00da A7EE856A vfma.f32 s12, s15, s10
|
|||
|
|
496 .LVL31:
|
|||
|
|
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
497 .loc 8 136 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 57
|
|||
|
|
|
|||
|
|
|
|||
|
|
498 00de E7EEA63A vfma.f32 s7, s15, s13
|
|||
|
|
499 .LVL32:
|
|||
|
|
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c ****
|
|||
|
|
500 .loc 8 120 0
|
|||
|
|
501 00e2 81ED006A vstr.32 s12, [r1]
|
|||
|
|
502 .LVL33:
|
|||
|
|
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c **** }
|
|||
|
|
503 .loc 8 140 0
|
|||
|
|
504 00e6 48BF it mi
|
|||
|
|
505 00e8 F1EE633A vnegmi.f32 s7, s7
|
|||
|
|
506 00ec C0ED003A vstr.32 s7, [r0]
|
|||
|
|
507 .loc 8 142 0
|
|||
|
|
508 00f0 7047 bx lr
|
|||
|
|
509 .L28:
|
|||
|
|
510 00f2 00BF .align 2
|
|||
|
|
511 .L27:
|
|||
|
|
512 00f4 610B363B .word 993397601
|
|||
|
|
513 00f8 00000044 .word 1140850688
|
|||
|
|
514 00fc 00000000 .word sinTable_f32
|
|||
|
|
515 0100 DB0F493C .word 1011421147
|
|||
|
|
516 .cfi_endproc
|
|||
|
|
517 .LFE154:
|
|||
|
|
519 .section .text.arm_sin_cos_q31,"ax",%progbits
|
|||
|
|
520 .align 1
|
|||
|
|
521 .p2align 2,,3
|
|||
|
|
522 .global arm_sin_cos_q31
|
|||
|
|
523 .syntax unified
|
|||
|
|
524 .thumb
|
|||
|
|
525 .thumb_func
|
|||
|
|
526 .fpu fpv4-sp-d16
|
|||
|
|
528 arm_sin_cos_q31:
|
|||
|
|
529 .LFB155:
|
|||
|
|
530 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c"
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* ----------------------------------------------------------------------
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Project: CMSIS DSP Library
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Title: arm_sin_cos_q31.c
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Description: Cosine & Sine calculation for Q31 values
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * $Date: 18. March 2019
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * $Revision: V1.6.0
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Target Processor: Cortex-M cores
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * -------------------------------------------------------------------- */
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /*
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * not use this file except in compliance with the License.
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * You may obtain a copy of the License at
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 58
|
|||
|
|
|
|||
|
|
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * See the License for the specific language governing permissions and
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** * limitations under the License.
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** */
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** #include "arm_math.h"
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** #include "arm_common_tables.h"
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /**
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @ingroup groupController
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** */
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /**
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @addtogroup SinCos
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @{
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** */
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /**
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @brief Q31 sin_cos function.
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @param[in] theta scaled input value in degrees
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @param[out] pSinVal points to processed sine output
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @param[out] pCosVal points to processed cosine output
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** @return none
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** */
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** void arm_sin_cos_q31(
|
|||
|
|
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t theta,
|
|||
|
|
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t * pSinVal,
|
|||
|
|
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t * pCosVal)
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** {
|
|||
|
|
531 .loc 9 55 0
|
|||
|
|
532 .cfi_startproc
|
|||
|
|
533 @ args = 0, pretend = 0, frame = 40
|
|||
|
|
534 @ frame_needed = 0, uses_anonymous_args = 0
|
|||
|
|
535 .LVL34:
|
|||
|
|
536 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
|
|||
|
|
537 .LCFI6:
|
|||
|
|
538 .cfi_def_cfa_offset 36
|
|||
|
|
539 .cfi_offset 4, -36
|
|||
|
|
540 .cfi_offset 5, -32
|
|||
|
|
541 .cfi_offset 6, -28
|
|||
|
|
542 .cfi_offset 7, -24
|
|||
|
|
543 .cfi_offset 8, -20
|
|||
|
|
544 .cfi_offset 9, -16
|
|||
|
|
545 .cfi_offset 10, -12
|
|||
|
|
546 .cfi_offset 11, -8
|
|||
|
|
547 .cfi_offset 14, -4
|
|||
|
|
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t fract; /* Temporary input, output variables */
|
|||
|
|
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** uint16_t indexS, indexC; /* Index variable */
|
|||
|
|
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t f1, f2, d1, d2; /* Two nearest output values */
|
|||
|
|
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t Dn, Df;
|
|||
|
|
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q63_t temp;
|
|||
|
|
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* Calculate the nearest index */
|
|||
|
|
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;
|
|||
|
|
548 .loc 9 63 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 59
|
|||
|
|
|
|||
|
|
|
|||
|
|
549 0004 C60D lsrs r6, r0, #23
|
|||
|
|
550 .LVL35:
|
|||
|
|
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** indexC = (indexS + 128) & 0x1ff;
|
|||
|
|
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* Calculation of fractional value */
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
|
|||
|
|
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* Read two nearest values of input value from the cos & sin tables */
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** f1 = sinTable_q31[indexC ];
|
|||
|
|
551 .loc 9 70 0
|
|||
|
|
552 0006 944C ldr r4, .L34
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** f2 = sinTable_q31[indexC+1];
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d1 = -sinTable_q31[indexS ];
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d2 = -sinTable_q31[indexS+1];
|
|||
|
|
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE *
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** Df = f2 - f1; /* delta between the values of the functions */
|
|||
|
|
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = Dn * ((q63_t)d1 + d2);
|
|||
|
|
553 .loc 9 78 0
|
|||
|
|
554 0008 944B ldr r3, .L34+4
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d2 = -sinTable_q31[indexS+1];
|
|||
|
|
555 .loc 9 72 0
|
|||
|
|
556 000a 54F82670 ldr r7, [r4, r6, lsl #2]
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t fract; /* Temporary input, output variables */
|
|||
|
|
557 .loc 9 55 0
|
|||
|
|
558 000e 8BB0 sub sp, sp, #44
|
|||
|
|
559 .LCFI7:
|
|||
|
|
560 .cfi_def_cfa_offset 80
|
|||
|
|
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
561 .loc 9 64 0
|
|||
|
|
562 0010 06F18005 add r5, r6, #128
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
563 .loc 9 73 0
|
|||
|
|
564 0014 06F1010C add ip, r6, #1
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** f2 = sinTable_q31[indexC+1];
|
|||
|
|
565 .loc 9 70 0
|
|||
|
|
566 0018 C5F30805 ubfx r5, r5, #0, #9
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d2 = -sinTable_q31[indexS+1];
|
|||
|
|
567 .loc 9 72 0
|
|||
|
|
568 001c 0497 str r7, [sp, #16]
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d1 = -sinTable_q31[indexS ];
|
|||
|
|
569 .loc 9 71 0
|
|||
|
|
570 001e 6F1C adds r7, r5, #1
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t fract; /* Temporary input, output variables */
|
|||
|
|
571 .loc 9 55 0
|
|||
|
|
572 0020 8146 mov r9, r0
|
|||
|
|
573 .LVL36:
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
574 .loc 9 73 0
|
|||
|
|
575 0022 54F82C00 ldr r0, [r4, ip, lsl #2]
|
|||
|
|
576 .LVL37:
|
|||
|
|
577 0026 0590 str r0, [sp, #20]
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d1 = -sinTable_q31[indexS ];
|
|||
|
|
578 .loc 9 71 0
|
|||
|
|
579 0028 54F82700 ldr r0, [r4, r7, lsl #2]
|
|||
|
|
580 002c 0790 str r0, [sp, #28]
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 60
|
|||
|
|
|
|||
|
|
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
581 .loc 9 73 0
|
|||
|
|
582 002e 0598 ldr r0, [sp, #20]
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d2 = -sinTable_q31[indexS+1];
|
|||
|
|
583 .loc 9 72 0
|
|||
|
|
584 0030 049F ldr r7, [sp, #16]
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** f2 = sinTable_q31[indexC+1];
|
|||
|
|
585 .loc 9 70 0
|
|||
|
|
586 0032 54F82550 ldr r5, [r4, r5, lsl #2]
|
|||
|
|
587 .LVL38:
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
588 .loc 9 76 0
|
|||
|
|
589 0036 0695 str r5, [sp, #24]
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
590 .loc 9 73 0
|
|||
|
|
591 0038 4442 negs r4, r0
|
|||
|
|
592 .LVL39:
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
593 .loc 9 76 0
|
|||
|
|
594 003a 0798 ldr r0, [sp, #28]
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d2 = -sinTable_q31[indexS+1];
|
|||
|
|
595 .loc 9 72 0
|
|||
|
|
596 003c C7F1000E rsb lr, r7, #0
|
|||
|
|
597 .LVL40:
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
598 .loc 9 76 0
|
|||
|
|
599 0040 A0EB050C sub ip, r0, r5
|
|||
|
|
600 .LVL41:
|
|||
|
|
601 .loc 9 78 0
|
|||
|
|
602 0044 4FEAE47B asr fp, r4, #31
|
|||
|
|
603 0048 4FEAEE78 asr r8, lr, #31
|
|||
|
|
604 004c A246 mov r10, r4
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
605 .loc 9 79 0
|
|||
|
|
606 004e 0020 movs r0, #0
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
607 .loc 9 78 0
|
|||
|
|
608 0050 14EB0E04 adds r4, r4, lr
|
|||
|
|
609 .LVL42:
|
|||
|
|
610 .loc 9 79 0
|
|||
|
|
611 0054 CDF804C0 str ip, [sp, #4]
|
|||
|
|
612 0058 0090 str r0, [sp]
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
613 .loc 9 78 0
|
|||
|
|
614 005a 4BEB0805 adc r5, fp, r8
|
|||
|
|
615 .LVL43:
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
616 .loc 9 67 0
|
|||
|
|
617 005e A9EBC650 sub r0, r9, r6, lsl #23
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
618 .loc 9 81 0
|
|||
|
|
619 0062 1EEB0E06 adds r6, lr, lr
|
|||
|
|
620 .LVL44:
|
|||
|
|
621 0066 48EB0807 adc r7, r8, r8
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
622 .loc 9 79 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 61
|
|||
|
|
|
|||
|
|
|
|||
|
|
623 006a DDE90089 ldrd r8, [sp]
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
624 .loc 9 78 0
|
|||
|
|
625 006e CDE908AB strd r10, [sp, #32]
|
|||
|
|
626 0072 A4FB03AB umull r10, fp, r4, r3
|
|||
|
|
627 .LVL45:
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
628 .loc 9 79 0
|
|||
|
|
629 0076 BAEB0808 subs r8, r10, r8
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
630 .loc 9 78 0
|
|||
|
|
631 007a 03FB05BB mla fp, r3, r5, fp
|
|||
|
|
632 .LVL46:
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
633 .loc 9 79 0
|
|||
|
|
634 007e 6BEB0909 sbc r9, fp, r9
|
|||
|
|
635 .LVL47:
|
|||
|
|
636 .loc 9 81 0
|
|||
|
|
637 0082 0324 movs r4, #3
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
638 .loc 9 79 0
|
|||
|
|
639 0084 CDE90289 strd r8, [sp, #8]
|
|||
|
|
640 .loc 9 81 0
|
|||
|
|
641 0088 DDE908AB ldrd r10, [sp, #32]
|
|||
|
|
642 .LVL48:
|
|||
|
|
643 008c 8CFB0489 smull r8, r9, ip, r4
|
|||
|
|
644 0090 0025 movs r5, #0
|
|||
|
|
645 0092 0024 movs r4, #0
|
|||
|
|
646 0094 CDE90045 strd r4, [sp]
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
647 .loc 9 80 0
|
|||
|
|
648 0098 029C ldr r4, [sp, #8]
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** q31_t fract; /* Temporary input, output variables */
|
|||
|
|
649 .loc 9 55 0
|
|||
|
|
650 009a 0891 str r1, [sp, #32]
|
|||
|
|
651 .loc 9 81 0
|
|||
|
|
652 009c 1AEB060A adds r10, r10, r6
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
653 .loc 9 80 0
|
|||
|
|
654 00a0 4FEAD476 lsr r6, r4, #31
|
|||
|
|
655 00a4 039C ldr r4, [sp, #12]
|
|||
|
|
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + (q63_t)d1 * Dn;
|
|||
|
|
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* Calculation of cosine value */
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
|
|||
|
|
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* Read two nearest values of input value from the cos & sin tables */
|
|||
|
|
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** f1 = sinTable_q31[indexS ];
|
|||
|
|
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** f2 = sinTable_q31[indexS+1];
|
|||
|
|
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d1 = sinTable_q31[indexC ];
|
|||
|
|
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** d2 = sinTable_q31[indexC+1];
|
|||
|
|
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** Df = f2 - f1; // delta between the values of the functions
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = Dn * ((q63_t)d1 + d2);
|
|||
|
|
656 .loc 9 96 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 62
|
|||
|
|
|
|||
|
|
|
|||
|
|
657 00a6 0799 ldr r1, [sp, #28]
|
|||
|
|
658 .LVL49:
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
659 .loc 9 80 0
|
|||
|
|
660 00a8 4FEAE47C asr ip, r4, #31
|
|||
|
|
661 .LVL50:
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
662 .loc 9 81 0
|
|||
|
|
663 00ac 4FEAC974 lsl r4, r9, #31
|
|||
|
|
664 00b0 0194 str r4, [sp, #4]
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
665 .loc 9 80 0
|
|||
|
|
666 00b2 039C ldr r4, [sp, #12]
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
667 .loc 9 67 0
|
|||
|
|
668 00b4 4FEA0020 lsl r0, r0, #8
|
|||
|
|
669 .LVL51:
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
670 .loc 9 81 0
|
|||
|
|
671 00b8 4BEB070B adc fp, fp, r7
|
|||
|
|
672 00bc 019F ldr r7, [sp, #4]
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
673 .loc 9 80 0
|
|||
|
|
674 00be C517 asrs r5, r0, #31
|
|||
|
|
675 00c0 46EA4406 orr r6, r6, r4, lsl #1
|
|||
|
|
676 00c4 0446 mov r4, r0
|
|||
|
|
677 00c6 CDE90245 strd r4, [sp, #8]
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
678 .loc 9 81 0
|
|||
|
|
679 00ca 47EA5807 orr r7, r7, r8, lsr #1
|
|||
|
|
680 00ce 4FEAC874 lsl r4, r8, #31
|
|||
|
|
681 00d2 0197 str r7, [sp, #4]
|
|||
|
|
682 00d4 0094 str r4, [sp]
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
683 .loc 9 80 0
|
|||
|
|
684 00d6 00FB0CFC mul ip, r0, ip
|
|||
|
|
685 00da 06FB05CC mla ip, r6, r5, ip
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
686 .loc 9 81 0
|
|||
|
|
687 00de DDE90045 ldrd r4, [sp]
|
|||
|
|
688 00e2 AAFB0389 umull r8, r9, r10, r3
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
689 .loc 9 80 0
|
|||
|
|
690 00e6 A0FB0667 umull r6, r7, r0, r6
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
691 .loc 9 81 0
|
|||
|
|
692 00ea 03FB0B99 mla r9, r3, fp, r9
|
|||
|
|
693 00ee B4EB0804 subs r4, r4, r8
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
694 .loc 9 80 0
|
|||
|
|
695 00f2 6744 add r7, r7, ip
|
|||
|
|
696 .LVL52:
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
697 .loc 9 81 0
|
|||
|
|
698 00f4 65EB0905 sbc r5, r5, r9
|
|||
|
|
699 00f8 14EB0609 adds r9, r4, r6
|
|||
|
|
700 00fc 45EB070A adc r10, r5, r7
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 63
|
|||
|
|
|
|||
|
|
|
|||
|
|
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + (q63_t)d1 * Dn;
|
|||
|
|
701 .loc 9 82 0
|
|||
|
|
702 0100 4FEAD974 lsr r4, r9, #31
|
|||
|
|
703 0104 DDE90289 ldrd r8, [sp, #8]
|
|||
|
|
704 0108 4FEAEA76 asr r6, r10, #31
|
|||
|
|
705 010c 44EA4A04 orr r4, r4, r10, lsl #1
|
|||
|
|
706 0110 00FB06F6 mul r6, r0, r6
|
|||
|
|
707 0114 04FB0966 mla r6, r4, r9, r6
|
|||
|
|
708 0118 A0FB0445 umull r4, r5, r0, r4
|
|||
|
|
709 011c 3544 add r5, r5, r6
|
|||
|
|
710 .LVL53:
|
|||
|
|
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
711 .loc 9 83 0
|
|||
|
|
712 011e C3FB0E45 smlal r4, r5, r3, lr
|
|||
|
|
713 .LVL54:
|
|||
|
|
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
714 .loc 9 84 0
|
|||
|
|
715 0122 EB17 asrs r3, r5, #31
|
|||
|
|
716 0124 E40F lsrs r4, r4, #31
|
|||
|
|
717 0126 44EA4504 orr r4, r4, r5, lsl #1
|
|||
|
|
718 .LVL55:
|
|||
|
|
719 012a 00FB03F3 mul r3, r0, r3
|
|||
|
|
720 012e 04FB0933 mla r3, r4, r9, r3
|
|||
|
|
721 0132 A0FB0445 umull r4, r5, r0, r4
|
|||
|
|
722 0136 1D44 add r5, r5, r3
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
723 .loc 9 87 0
|
|||
|
|
724 0138 4FEAD478 lsr r8, r4, #31
|
|||
|
|
725 013c 48EA4508 orr r8, r8, r5, lsl #1
|
|||
|
|
726 0140 4FEAE579 asr r9, r5, #31
|
|||
|
|
727 0144 069D ldr r5, [sp, #24]
|
|||
|
|
728 0146 2B46 mov r3, r5
|
|||
|
|
729 0148 EC17 asrs r4, r5, #31
|
|||
|
|
730 014a 13EB0806 adds r6, r3, r8
|
|||
|
|
731 014e 2746 mov r7, r4
|
|||
|
|
732 0150 2C46 mov r4, r5
|
|||
|
|
733 0152 3D46 mov r5, r7
|
|||
|
|
734 0154 47EB0907 adc r7, r7, r9
|
|||
|
|
735 .LVL56:
|
|||
|
|
736 .LBB38:
|
|||
|
|
737 .LBB39:
|
|||
|
|
738 .file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h"
|
|||
|
|
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /******************************************************************************
|
|||
|
|
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h
|
|||
|
|
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library
|
|||
|
|
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0
|
|||
|
|
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019
|
|||
|
|
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/
|
|||
|
|
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /*
|
|||
|
|
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
|
|||
|
|
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0
|
|||
|
|
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
|
|||
|
|
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License.
|
|||
|
|
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at
|
|||
|
|
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 64
|
|||
|
|
|
|||
|
|
|
|||
|
|
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0
|
|||
|
|
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software
|
|||
|
|
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|||
|
|
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|||
|
|
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and
|
|||
|
|
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License.
|
|||
|
|
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library
|
|||
|
|
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction
|
|||
|
|
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
|
|||
|
|
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library,
|
|||
|
|
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor
|
|||
|
|
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices.
|
|||
|
|
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category:
|
|||
|
|
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions
|
|||
|
|
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions
|
|||
|
|
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions
|
|||
|
|
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions
|
|||
|
|
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions
|
|||
|
|
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions
|
|||
|
|
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions
|
|||
|
|
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions
|
|||
|
|
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions
|
|||
|
|
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions
|
|||
|
|
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM)
|
|||
|
|
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions
|
|||
|
|
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions
|
|||
|
|
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers,
|
|||
|
|
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values.
|
|||
|
|
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library
|
|||
|
|
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
|
|||
|
|
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the <code>Lib</code> fold
|
|||
|
|
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries :
|
|||
|
|
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)
|
|||
|
|
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)
|
|||
|
|
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)
|
|||
|
|
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on
|
|||
|
|
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)
|
|||
|
|
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)
|
|||
|
|
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)
|
|||
|
|
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)
|
|||
|
|
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)
|
|||
|
|
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)
|
|||
|
|
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)
|
|||
|
|
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)
|
|||
|
|
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)
|
|||
|
|
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 65
|
|||
|
|
|
|||
|
|
|
|||
|
|
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian)
|
|||
|
|
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)
|
|||
|
|
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point
|
|||
|
|
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)
|
|||
|
|
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis
|
|||
|
|
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file <code>arm_math.h</code> which is placed
|
|||
|
|
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling
|
|||
|
|
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endi
|
|||
|
|
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples
|
|||
|
|
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * --------
|
|||
|
|
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions
|
|||
|
|
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support
|
|||
|
|
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
|
|||
|
|
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake.
|
|||
|
|
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested.
|
|||
|
|
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
|
|||
|
|
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the <co
|
|||
|
|
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM_math.uvprojx
|
|||
|
|
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecti
|
|||
|
|
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also a work in progress cmake build. The README file is giving more details.
|
|||
|
|
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Preprocessor Macros
|
|||
|
|
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
|
|||
|
|
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Each library project have different preprocessor macros.
|
|||
|
|
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_BIG_ENDIAN:
|
|||
|
|
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default libra
|
|||
|
|
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MATRIX_CHECK:
|
|||
|
|
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
|
|||
|
|
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_ROUNDING:
|
|||
|
|
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_ROUNDING for rounding on support functions
|
|||
|
|
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_LOOPUNROLL:
|
|||
|
|
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
|
|||
|
|
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_NEON:
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 66
|
|||
|
|
|
|||
|
|
|
|||
|
|
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
|
|||
|
|
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It is not enabled by default when Neon is available because performances are
|
|||
|
|
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * dependent on the compiler and target architecture.
|
|||
|
|
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_NEON_EXPERIMENTAL:
|
|||
|
|
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
|
|||
|
|
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * of some DSP functions. Experimental Neon versions currently do not have better
|
|||
|
|
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * performances than the scalar versions.
|
|||
|
|
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_HELIUM:
|
|||
|
|
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It implies the flags ARM_MATH_MVEF and ARM_MATH_MVEI and ARM_MATH_FLOAT16.
|
|||
|
|
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MVEF:
|
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|
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146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Select Helium versions of the f32 algorithms.
|
|||
|
|
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It implies ARM_MATH_FLOAT16 and ARM_MATH_MVEI.
|
|||
|
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149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
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|
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150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MVEI:
|
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|
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151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
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152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Select Helium versions of the int and fixed point algorithms.
|
|||
|
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153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
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154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_FLOAT16:
|
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|
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155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
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156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Float16 implementations of some algorithms (Requires MVE extension).
|
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157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
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158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <hr>
|
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159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack
|
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|
|
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -----------------------------
|
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|
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161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
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162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directorie
|
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163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content
|
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164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|-----------------------------------------------------------
|
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165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation
|
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166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite
|
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167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu
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168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files
|
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169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries
|
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170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries
|
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171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files
|
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172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
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173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <hr>
|
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174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP
|
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|
|
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
|
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|
|
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg.
|
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|
|
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
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|
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178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
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|
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179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
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|
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180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
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181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions
|
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182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
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|
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183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
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|
|
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions
|
|||
|
|
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root.
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 67
|
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|
|
|
|||
|
|
|
|||
|
|
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions
|
|||
|
|
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays.
|
|||
|
|
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data.
|
|||
|
|
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions
|
|||
|
|
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors.
|
|||
|
|
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion
|
|||
|
|
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...).
|
|||
|
|
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers
|
|||
|
|
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of
|
|||
|
|
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values.
|
|||
|
|
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions
|
|||
|
|
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions
|
|||
|
|
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations.
|
|||
|
|
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example,
|
|||
|
|
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type
|
|||
|
|
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown
|
|||
|
|
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below:
|
|||
|
|
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
|
|||
|
|
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * typedef struct
|
|||
|
|
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * {
|
|||
|
|
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * uint16_t numRows; // number of rows of the matrix.
|
|||
|
|
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * uint16_t numCols; // number of columns of the matrix.
|
|||
|
|
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * float32_t *pData; // points to the data of the matrix.
|
|||
|
|
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * } arm_matrix_instance_f32;
|
|||
|
|
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
|
|||
|
|
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types.
|
|||
|
|
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to
|
|||
|
|
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size <code>numRows X numCols</code>
|
|||
|
|
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the
|
|||
|
|
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at:
|
|||
|
|
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
|
|||
|
|
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pData[i*numCols + j]
|
|||
|
|
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
|
|||
|
|
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions
|
|||
|
|
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix
|
|||
|
|
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure.
|
|||
|
|
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields.
|
|||
|
|
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
|
|||
|
|
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively.
|
|||
|
|
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par
|
|||
|
|
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used
|
|||
|
|
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section.
|
|||
|
|
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 68
|
|||
|
|
|
|||
|
|
|
|||
|
|
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example:
|
|||
|
|
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
|
|||
|
|
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
|
|||
|
|
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
|
|||
|
|
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
|
|||
|
|
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
|
|||
|
|
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
|
|||
|
|
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and <code>pData</code> points to the
|
|||
|
|
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array.
|
|||
|
|
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking
|
|||
|
|
255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and
|
|||
|
|
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the
|
|||
|
|
257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and
|
|||
|
|
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return:
|
|||
|
|
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
|
|||
|
|
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH
|
|||
|
|
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
|
|||
|
|
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return
|
|||
|
|
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
|
|||
|
|
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SUCCESS
|
|||
|
|
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
|
|||
|
|
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking.
|
|||
|
|
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define
|
|||
|
|
268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
|
|||
|
|
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_MATRIX_CHECK
|
|||
|
|
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
|
|||
|
|
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined
|
|||
|
|
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and
|
|||
|
|
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions
|
|||
|
|
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always
|
|||
|
|
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return <code>ARM_MATH_SUCCESS</code>.
|
|||
|
|
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions
|
|||
|
|
280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions
|
|||
|
|
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions
|
|||
|
|
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions
|
|||
|
|
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions
|
|||
|
|
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data.
|
|||
|
|
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and
|
|||
|
|
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data.
|
|||
|
|
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 69
|
|||
|
|
|
|||
|
|
|
|||
|
|
301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples
|
|||
|
|
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions
|
|||
|
|
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes.
|
|||
|
|
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily
|
|||
|
|
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in
|
|||
|
|
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py
|
|||
|
|
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder
|
|||
|
|
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification.
|
|||
|
|
314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder.
|
|||
|
|
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators
|
|||
|
|
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator.
|
|||
|
|
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn.
|
|||
|
|
325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily
|
|||
|
|
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in
|
|||
|
|
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py
|
|||
|
|
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions
|
|||
|
|
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms.
|
|||
|
|
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors.
|
|||
|
|
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
|
|||
|
|
337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H
|
|||
|
|
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H
|
|||
|
|
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus
|
|||
|
|
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C"
|
|||
|
|
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */
|
|||
|
|
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM )
|
|||
|
|
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
|||
|
|
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ )
|
|||
|
|
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push
|
|||
|
|
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
|
|||
|
|
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion"
|
|||
|
|
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 70
|
|||
|
|
|
|||
|
|
|
|||
|
|
358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ )
|
|||
|
|
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ )
|
|||
|
|
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ )
|
|||
|
|
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ )
|
|||
|
|
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER )
|
|||
|
|
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler
|
|||
|
|
371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */
|
|||
|
|
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER )
|
|||
|
|
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <stdint.h>
|
|||
|
|
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline
|
|||
|
|
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline
|
|||
|
|
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x))
|
|||
|
|
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__)
|
|||
|
|
382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <stdint.h>
|
|||
|
|
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
|
|||
|
|
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline))
|
|||
|
|
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline))
|
|||
|
|
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function"
|
|||
|
|
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes"
|
|||
|
|
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h"
|
|||
|
|
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <string.h>
|
|||
|
|
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <math.h>
|
|||
|
|
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <float.h>
|
|||
|
|
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <limits.h>
|
|||
|
|
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX)
|
|||
|
|
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX)
|
|||
|
|
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX)
|
|||
|
|
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX)
|
|||
|
|
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX)
|
|||
|
|
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX)
|
|||
|
|
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 71
|
|||
|
|
|
|||
|
|
|
|||
|
|
415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX)
|
|||
|
|
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX)
|
|||
|
|
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX)
|
|||
|
|
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0)
|
|||
|
|
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0)
|
|||
|
|
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0)
|
|||
|
|
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL))
|
|||
|
|
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF))
|
|||
|
|
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F))
|
|||
|
|
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L))
|
|||
|
|
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000))
|
|||
|
|
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80))
|
|||
|
|
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL))
|
|||
|
|
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF))
|
|||
|
|
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F))
|
|||
|
|
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0)
|
|||
|
|
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0)
|
|||
|
|
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0)
|
|||
|
|
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */
|
|||
|
|
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
|
|||
|
|
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1
|
|||
|
|
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON)
|
|||
|
|
449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <arm_neon.h>
|
|||
|
|
450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM)
|
|||
|
|
453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF
|
|||
|
|
454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16
|
|||
|
|
455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF)
|
|||
|
|
458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI
|
|||
|
|
459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16
|
|||
|
|
460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI)
|
|||
|
|
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <arm_mve.h>
|
|||
|
|
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS
|
|||
|
|
469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100))
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 72
|
|||
|
|
|
|||
|
|
|
|||
|
|
472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5)
|
|||
|
|
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F
|
|||
|
|
474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI
|
|||
|
|
475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f
|
|||
|
|
476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations
|
|||
|
|
480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512
|
|||
|
|
483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10)
|
|||
|
|
484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10)
|
|||
|
|
485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9)
|
|||
|
|
486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000
|
|||
|
|
487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80
|
|||
|
|
488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions
|
|||
|
|
491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */
|
|||
|
|
493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
|
|||
|
|
494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61
|
|||
|
|
495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers
|
|||
|
|
498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */
|
|||
|
|
501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2
|
|||
|
|
502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library.
|
|||
|
|
505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum
|
|||
|
|
508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */
|
|||
|
|
510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
|
|||
|
|
511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
|
|||
|
|
512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation
|
|||
|
|
513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
|
|||
|
|
514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */
|
|||
|
|
515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
|
|||
|
|
516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status;
|
|||
|
|
517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format.
|
|||
|
|
520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t;
|
|||
|
|
522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format.
|
|||
|
|
525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t;
|
|||
|
|
527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 73
|
|||
|
|
|
|||
|
|
|
|||
|
|
529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format.
|
|||
|
|
530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t;
|
|||
|
|
532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format.
|
|||
|
|
535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t;
|
|||
|
|
537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition.
|
|||
|
|
540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t;
|
|||
|
|
542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition.
|
|||
|
|
545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t;
|
|||
|
|
547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types
|
|||
|
|
550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI)
|
|||
|
|
552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format
|
|||
|
|
554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t;
|
|||
|
|
556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format.
|
|||
|
|
559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t;
|
|||
|
|
561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format.
|
|||
|
|
564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t;
|
|||
|
|
566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format.
|
|||
|
|
569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t;
|
|||
|
|
571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format.
|
|||
|
|
574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t;
|
|||
|
|
576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format.
|
|||
|
|
579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t;
|
|||
|
|
581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format.
|
|||
|
|
584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t;
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 74
|
|||
|
|
|
|||
|
|
|
|||
|
|
586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format.
|
|||
|
|
589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t;
|
|||
|
|
591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format.
|
|||
|
|
594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t;
|
|||
|
|
596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format.
|
|||
|
|
599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t;
|
|||
|
|
601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format.
|
|||
|
|
604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t;
|
|||
|
|
606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format.
|
|||
|
|
609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t;
|
|||
|
|
611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type.
|
|||
|
|
614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t;
|
|||
|
|
616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type.
|
|||
|
|
619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t;
|
|||
|
|
621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type.
|
|||
|
|
624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t;
|
|||
|
|
626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type.
|
|||
|
|
629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t;
|
|||
|
|
631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/
|
|||
|
|
636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type
|
|||
|
|
638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t;
|
|||
|
|
640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 75
|
|||
|
|
|
|||
|
|
|
|||
|
|
643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type
|
|||
|
|
644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t;
|
|||
|
|
646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type
|
|||
|
|
650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t;
|
|||
|
|
652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type
|
|||
|
|
655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t;
|
|||
|
|
657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type
|
|||
|
|
661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t;
|
|||
|
|
663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type
|
|||
|
|
666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t;
|
|||
|
|
668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type
|
|||
|
|
672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t
|
|||
|
|
674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f;
|
|||
|
|
676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i;
|
|||
|
|
677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t;
|
|||
|
|
678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type
|
|||
|
|
682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t
|
|||
|
|
684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f;
|
|||
|
|
686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i;
|
|||
|
|
687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t;
|
|||
|
|
688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON)
|
|||
|
|
693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format.
|
|||
|
|
695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t;
|
|||
|
|
697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format.
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 76
|
|||
|
|
|
|||
|
|
|
|||
|
|
700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t;
|
|||
|
|
702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format.
|
|||
|
|
705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t;
|
|||
|
|
707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type.
|
|||
|
|
710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t;
|
|||
|
|
712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type.
|
|||
|
|
716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t;
|
|||
|
|
718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type
|
|||
|
|
722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t;
|
|||
|
|
724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type
|
|||
|
|
728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t;
|
|||
|
|
730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format
|
|||
|
|
734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t;
|
|||
|
|
736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format
|
|||
|
|
739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t;
|
|||
|
|
741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format
|
|||
|
|
744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t;
|
|||
|
|
746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type
|
|||
|
|
749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t;
|
|||
|
|
751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type
|
|||
|
|
754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t;
|
|||
|
|
756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 77
|
|||
|
|
|
|||
|
|
|
|||
|
|
757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type
|
|||
|
|
759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t;
|
|||
|
|
761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type
|
|||
|
|
765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t;
|
|||
|
|
767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type
|
|||
|
|
770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t;
|
|||
|
|
772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type
|
|||
|
|
775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t;
|
|||
|
|
777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format
|
|||
|
|
781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t;
|
|||
|
|
783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format
|
|||
|
|
786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t;
|
|||
|
|
788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format
|
|||
|
|
791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t;
|
|||
|
|
793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format
|
|||
|
|
796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t;
|
|||
|
|
798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format
|
|||
|
|
801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t;
|
|||
|
|
803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format
|
|||
|
|
806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t;
|
|||
|
|
808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format
|
|||
|
|
811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t;
|
|||
|
|
813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 78
|
|||
|
|
|
|||
|
|
|
|||
|
|
814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format
|
|||
|
|
816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t;
|
|||
|
|
818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format
|
|||
|
|
821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t;
|
|||
|
|
823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type
|
|||
|
|
826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t
|
|||
|
|
828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f;
|
|||
|
|
830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i;
|
|||
|
|
831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t;
|
|||
|
|
832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
|
|||
|
|
834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type
|
|||
|
|
836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t
|
|||
|
|
838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f;
|
|||
|
|
840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i;
|
|||
|
|
841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t;
|
|||
|
|
842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type.
|
|||
|
|
846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t;
|
|||
|
|
848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type.
|
|||
|
|
851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t;
|
|||
|
|
853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type.
|
|||
|
|
856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t;
|
|||
|
|
858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values.
|
|||
|
|
865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated
|
|||
|
|
866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM )
|
|||
|
|
868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed
|
|||
|
|
869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
|
|||
|
|
870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 79
|
|||
|
|
|
|||
|
|
|
|||
|
|
871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ )
|
|||
|
|
872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
|
|||
|
|
873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ )
|
|||
|
|
874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed
|
|||
|
|
875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ )
|
|||
|
|
876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
|
|||
|
|
877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ )
|
|||
|
|
878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
|
|||
|
|
879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ )
|
|||
|
|
880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t
|
|||
|
|
881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER )
|
|||
|
|
882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
|
|||
|
|
883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler
|
|||
|
|
885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
|
|||
|
|
888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr))
|
|||
|
|
889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr))
|
|||
|
|
890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr))
|
|||
|
|
891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1
|
|||
|
|
893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x))
|
|||
|
|
894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */
|
|||
|
|
896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer.
|
|||
|
|
900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
|
|||
|
|
901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
|
|||
|
|
902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 (
|
|||
|
|
904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15)
|
|||
|
|
905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
|
|||
|
|
907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4);
|
|||
|
|
910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ;
|
|||
|
|
912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
|
|||
|
|
915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards.
|
|||
|
|
919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
|
|||
|
|
920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
|
|||
|
|
921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia (
|
|||
|
|
923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15)
|
|||
|
|
924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
|
|||
|
|
926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 80
|
|||
|
|
|
|||
|
|
|
|||
|
|
928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4);
|
|||
|
|
929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
|
|||
|
|
931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2;
|
|||
|
|
934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
|
|||
|
|
935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
|
|||
|
|
939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
|
|||
|
|
940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
|
|||
|
|
941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da (
|
|||
|
|
943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15)
|
|||
|
|
944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
|
|||
|
|
946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4);
|
|||
|
|
949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
|
|||
|
|
951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2;
|
|||
|
|
954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
|
|||
|
|
955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards.
|
|||
|
|
959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
|
|||
|
|
960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
|
|||
|
|
961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
|
|||
|
|
962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia (
|
|||
|
|
964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15,
|
|||
|
|
965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
|
|||
|
|
966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
|
|||
|
|
968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4);
|
|||
|
|
970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF);
|
|||
|
|
972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF;
|
|||
|
|
973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2;
|
|||
|
|
976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer.
|
|||
|
|
980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
|
|||
|
|
981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
|
|||
|
|
982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
|
|||
|
|
983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 (
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 81
|
|||
|
|
|
|||
|
|
|
|||
|
|
985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15,
|
|||
|
|
986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
|
|||
|
|
987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
|
|||
|
|
989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4);
|
|||
|
|
992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[0] = val & 0x0FFFF;
|
|||
|
|
994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[1] = val >> 16;
|
|||
|
|
995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards.
|
|||
|
|
1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
|
|||
|
|
1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
|
|||
|
|
1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_ia (
|
|||
|
|
1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7)
|
|||
|
|
1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
|
|||
|
|
1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4);
|
|||
|
|
1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) |
|
|||
|
|
1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4;
|
|||
|
|
1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
|
|||
|
|
1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
|
|||
|
|
1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
|
|||
|
|
1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
|
|||
|
|
1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_da (
|
|||
|
|
1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7)
|
|||
|
|
1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
|
|||
|
|
1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4);
|
|||
|
|
1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) <<
|
|||
|
|
1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 -= 4;
|
|||
|
|
1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
|
|||
|
|
1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards.
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 82
|
|||
|
|
|
|||
|
|
|
|||
|
|
1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
|
|||
|
|
1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
|
|||
|
|
1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
|
|||
|
|
1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q7x4_ia (
|
|||
|
|
1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7,
|
|||
|
|
1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
|
|||
|
|
1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
|
|||
|
|
1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
|
|||
|
|
1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ7, &val, 4);
|
|||
|
|
1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[0] = val & 0x0FF;
|
|||
|
|
1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[1] = (val >> 8) & 0x0FF;
|
|||
|
|
1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[2] = (val >> 16) & 0x0FF;
|
|||
|
|
1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[3] = (val >> 24) & 0x0FF;
|
|||
|
|
1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4;
|
|||
|
|
1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /*
|
|||
|
|
1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Normally those kind of definitions are in a compiler file
|
|||
|
|
1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in Core or Core_A.
|
|||
|
|
1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** But for MSVC compiler it is a bit special. The goal is very specific
|
|||
|
|
1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** to CMSIS-DSP and only to allow the use of this library from other
|
|||
|
|
1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** systems like Python or Matlab.
|
|||
|
|
1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
|
|||
|
|
1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** compiler file in Core or Core_A would not make sense.
|
|||
|
|
1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__)
|
|||
|
|
1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
|
|||
|
|
1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (data == 0U) { return 32U; }
|
|||
|
|
1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t count = 0U;
|
|||
|
|
1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t mask = 0x80000000U;
|
|||
|
|
1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while ((data & mask) == 0U)
|
|||
|
|
1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** count += 1U;
|
|||
|
|
1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** mask = mask >> 1U;
|
|||
|
|
1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return count;
|
|||
|
|
1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
|||
|
|
1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if ((sat >= 1U) && (sat <= 32U))
|
|||
|
|
1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
|||
|
|
1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t min = -1 - max ;
|
|||
|
|
1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > max)
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 83
|
|||
|
|
|
|||
|
|
|
|||
|
|
1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max;
|
|||
|
|
1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < min)
|
|||
|
|
1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return min;
|
|||
|
|
1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return val;
|
|||
|
|
1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
|||
|
|
1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (sat <= 31U)
|
|||
|
|
1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t max = ((1U << sat) - 1U);
|
|||
|
|
1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > (int32_t)max)
|
|||
|
|
1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max;
|
|||
|
|
1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < 0)
|
|||
|
|
1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return 0U;
|
|||
|
|
1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (uint32_t)val;
|
|||
|
|
1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
|
|||
|
|
1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_DSP
|
|||
|
|
1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack two 16 bit values.
|
|||
|
|
1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
|
|||
|
|
1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
|
|||
|
|
1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
|
|||
|
|
1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
|
|||
|
|
1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack four 8 bit values.
|
|||
|
|
1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_BIG_ENDIAN
|
|||
|
|
1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
|
|||
|
|
1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
|
|||
|
|
1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
|
|||
|
|
1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
|
|||
|
|
1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
|
|||
|
|
1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
|
|||
|
|
1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
|
|||
|
|
1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
|
|||
|
|
1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
|
|||
|
|
1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
|
|||
|
|
1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
|
|||
|
|
1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
|
|||
|
|
1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q31 values.
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 84
|
|||
|
|
|
|||
|
|
|
|||
|
|
1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
|
|||
|
|
1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
|
|||
|
|
1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x)
|
|||
|
|
1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
|
|||
|
|
1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
|
|||
|
|
1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
|
|||
|
|
739 .loc 10 1161 0
|
|||
|
|
740 0158 B7EBE67F cmp r7, r6, asr #31
|
|||
|
|
741 015c 1ABF itte ne
|
|||
|
|
742 015e 6FF00043 mvnne r3, #-2147483648
|
|||
|
|
743 0162 83EAE773 eorne r3, r3, r7, asr #31
|
|||
|
|
744 0166 3346 moveq r3, r6
|
|||
|
|
745 .LBE39:
|
|||
|
|
746 .LBE38:
|
|||
|
|
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
747 .loc 9 87 0
|
|||
|
|
748 0168 1360 str r3, [r2]
|
|||
|
|
749 .LVL57:
|
|||
|
|
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = Dn * ((q63_t)d1 + d2);
|
|||
|
|
750 .loc 9 95 0
|
|||
|
|
751 016a 059B ldr r3, [sp, #20]
|
|||
|
|
752 016c 1A46 mov r2, r3
|
|||
|
|
753 .LVL58:
|
|||
|
|
754 016e 049B ldr r3, [sp, #16]
|
|||
|
|
755 .loc 9 96 0
|
|||
|
|
756 0170 0E46 mov r6, r1
|
|||
|
|
757 0172 CF17 asrs r7, r1, #31
|
|||
|
|
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = Dn * ((q63_t)d1 + d2);
|
|||
|
|
758 .loc 9 95 0
|
|||
|
|
759 0174 A2EB0308 sub r8, r2, r3
|
|||
|
|
760 .LVL59:
|
|||
|
|
761 .loc 9 96 0
|
|||
|
|
762 0178 A219 adds r2, r4, r6
|
|||
|
|
763 017a 45EB0703 adc r3, r5, r7
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
764 .loc 9 99 0
|
|||
|
|
765 017e 2419 adds r4, r4, r4
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
766 .loc 9 96 0
|
|||
|
|
767 0180 3649 ldr r1, .L34+4
|
|||
|
|
768 .loc 9 99 0
|
|||
|
|
769 0182 6D41 adcs r5, r5, r5
|
|||
|
|
770 0184 14EB060B adds fp, r4, r6
|
|||
|
|
771 0188 45EB070C adc ip, r5, r7
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
772 .loc 9 96 0
|
|||
|
|
773 018c 9146 mov r9, r2
|
|||
|
|
774 018e 9A46 mov r10, r3
|
|||
|
|
775 .loc 9 99 0
|
|||
|
|
776 0190 CDE900BC strd fp, [sp]
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
777 .loc 9 96 0
|
|||
|
|
778 0194 5646 mov r6, r10
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
779 .loc 9 97 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 85
|
|||
|
|
|
|||
|
|
|
|||
|
|
780 0196 0022 movs r2, #0
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
781 .loc 9 96 0
|
|||
|
|
782 0198 A9FB01AB umull r10, fp, r9, r1
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
783 .loc 9 97 0
|
|||
|
|
784 019c BAEB020A subs r10, r10, r2
|
|||
|
|
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
785 .loc 9 96 0
|
|||
|
|
786 01a0 01FB06BB mla fp, r1, r6, fp
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
787 .loc 9 98 0
|
|||
|
|
788 01a4 5346 mov r3, r10
|
|||
|
|
789 .loc 9 99 0
|
|||
|
|
790 01a6 4FF00306 mov r6, #3
|
|||
|
|
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp - ((q63_t)Df << 32);
|
|||
|
|
791 .loc 9 97 0
|
|||
|
|
792 01aa 6BEB080B sbc fp, fp, r8
|
|||
|
|
793 .loc 9 99 0
|
|||
|
|
794 01ae 88FB0689 smull r8, r9, r8, r6
|
|||
|
|
795 .LVL60:
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
796 .loc 9 98 0
|
|||
|
|
797 01b2 DE0F lsrs r6, r3, #31
|
|||
|
|
798 .loc 9 99 0
|
|||
|
|
799 01b4 009B ldr r3, [sp]
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
800 .loc 9 98 0
|
|||
|
|
801 01b6 46EA4B06 orr r6, r6, fp, lsl #1
|
|||
|
|
802 01ba 4FEAEB7E asr lr, fp, #31
|
|||
|
|
803 .loc 9 99 0
|
|||
|
|
804 01be 4FEAC975 lsl r5, r9, #31
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
805 .loc 9 98 0
|
|||
|
|
806 01c2 DDE902AB ldrd r10, [sp, #8]
|
|||
|
|
807 .loc 9 99 0
|
|||
|
|
808 01c6 45EA5805 orr r5, r5, r8, lsr #1
|
|||
|
|
809 01ca 4FEAC874 lsl r4, r8, #31
|
|||
|
|
810 01ce A3FB0189 umull r8, r9, r3, r1
|
|||
|
|
811 01d2 019B ldr r3, [sp, #4]
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
812 .loc 9 98 0
|
|||
|
|
813 01d4 00FB0EFE mul lr, r0, lr
|
|||
|
|
814 .loc 9 99 0
|
|||
|
|
815 01d8 B4EB0802 subs r2, r4, r8
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
816 .loc 9 98 0
|
|||
|
|
817 01dc 06FB0BEE mla lr, r6, fp, lr
|
|||
|
|
818 .loc 9 99 0
|
|||
|
|
819 01e0 01FB0399 mla r9, r1, r3, r9
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
820 .loc 9 98 0
|
|||
|
|
821 01e4 A0FB0667 umull r6, r7, r0, r6
|
|||
|
|
822 .loc 9 99 0
|
|||
|
|
823 01e8 65EB0903 sbc r3, r5, r9
|
|||
|
|
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
|
|||
|
|
824 .loc 9 98 0
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 86
|
|||
|
|
|
|||
|
|
|
|||
|
|
825 01ec 7744 add r7, r7, lr
|
|||
|
|
826 .loc 9 99 0
|
|||
|
|
827 01ee 12EB0608 adds r8, r2, r6
|
|||
|
|
828 01f2 43EB0709 adc r9, r3, r7
|
|||
|
|
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
829 .loc 9 100 0
|
|||
|
|
830 01f6 4FEAD872 lsr r2, r8, #31
|
|||
|
|
831 01fa 4FEAE974 asr r4, r9, #31
|
|||
|
|
832 01fe 42EA4902 orr r2, r2, r9, lsl #1
|
|||
|
|
833 0202 00FB04F4 mul r4, r0, r4
|
|||
|
|
834 0206 02FB0B44 mla r4, r2, fp, r4
|
|||
|
|
835 020a A0FB0223 umull r2, r3, r0, r2
|
|||
|
|
836 020e 2344 add r3, r3, r4
|
|||
|
|
837 .LVL61:
|
|||
|
|
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = temp + (q63_t)d1 * Dn;
|
|||
|
|
838 .loc 9 101 0
|
|||
|
|
839 0210 069C ldr r4, [sp, #24]
|
|||
|
|
840 0212 C1FB0423 smlal r2, r3, r1, r4
|
|||
|
|
841 .LVL62:
|
|||
|
|
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** temp = (q63_t)fract * (temp >> 31);
|
|||
|
|
842 .loc 9 102 0
|
|||
|
|
843 0216 D10F lsrs r1, r2, #31
|
|||
|
|
844 0218 DA17 asrs r2, r3, #31
|
|||
|
|
845 021a 41EA4301 orr r1, r1, r3, lsl #1
|
|||
|
|
846 .LVL63:
|
|||
|
|
847 021e 00FB02F3 mul r3, r0, r2
|
|||
|
|
848 0222 01FB0B33 mla r3, r1, fp, r3
|
|||
|
|
849 0226 A0FB0101 umull r0, r1, r0, r1
|
|||
|
|
850 .LVL64:
|
|||
|
|
851 022a 1944 add r1, r1, r3
|
|||
|
|
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c ****
|
|||
|
|
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** /* Calculation of sine value */
|
|||
|
|
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
|
|||
|
|
852 .loc 9 105 0
|
|||
|
|
853 022c C40F lsrs r4, r0, #31
|
|||
|
|
854 022e 049B ldr r3, [sp, #16]
|
|||
|
|
855 0230 44EA4104 orr r4, r4, r1, lsl #1
|
|||
|
|
856 0234 E218 adds r2, r4, r3
|
|||
|
|
857 0236 4FEAE175 asr r5, r1, #31
|
|||
|
|
858 023a 45EBE373 adc r3, r5, r3, asr #31
|
|||
|
|
859 .LVL65:
|
|||
|
|
860 .LBB40:
|
|||
|
|
861 .LBB41:
|
|||
|
|
862 .loc 10 1161 0
|
|||
|
|
863 023e B3EBE27F cmp r3, r2, asr #31
|
|||
|
|
1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
|
|||
|
|
864 .loc 10 1160 0
|
|||
|
|
865 0242 1146 mov r1, r2
|
|||
|
|
866 .loc 10 1161 0
|
|||
|
|
867 0244 1CBF itt ne
|
|||
|
|
868 0246 6FF00041 mvnne r1, #-2147483648
|
|||
|
|
869 024a 81EAE371 eorne r1, r1, r3, asr #31
|
|||
|
|
870 .LVL66:
|
|||
|
|
871 .LBE41:
|
|||
|
|
872 .LBE40:
|
|||
|
|
873 .loc 9 105 0
|
|||
|
|
874 024e 089B ldr r3, [sp, #32]
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 87
|
|||
|
|
|
|||
|
|
|
|||
|
|
875 0250 1960 str r1, [r3]
|
|||
|
|
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c **** }
|
|||
|
|
876 .loc 9 106 0
|
|||
|
|
877 0252 0BB0 add sp, sp, #44
|
|||
|
|
878 .LCFI8:
|
|||
|
|
879 .cfi_def_cfa_offset 36
|
|||
|
|
880 @ sp needed
|
|||
|
|
881 0254 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
|
|||
|
|
882 .LVL67:
|
|||
|
|
883 .L35:
|
|||
|
|
884 .align 2
|
|||
|
|
885 .L34:
|
|||
|
|
886 0258 00000000 .word sinTable_q31
|
|||
|
|
887 025c B51F9201 .word 26353589
|
|||
|
|
888 .cfi_endproc
|
|||
|
|
889 .LFE155:
|
|||
|
|
891 .text
|
|||
|
|
892 .Letext0:
|
|||
|
|
893 .file 11 "/usr/include/newlib/machine/_default_types.h"
|
|||
|
|
894 .file 12 "/usr/include/newlib/sys/_stdint.h"
|
|||
|
|
895 .file 13 "/usr/include/newlib/sys/lock.h"
|
|||
|
|
896 .file 14 "/usr/include/newlib/sys/_types.h"
|
|||
|
|
897 .file 15 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h"
|
|||
|
|
898 .file 16 "/usr/include/newlib/sys/reent.h"
|
|||
|
|
899 .file 17 "/usr/include/newlib/math.h"
|
|||
|
|
900 .file 18 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h"
|
|||
|
|
ARM GAS /tmp/cc8z1BIG.s page 88
|
|||
|
|
|
|||
|
|
|
|||
|
|
DEFINED SYMBOLS
|
|||
|
|
*ABS*:0000000000000000 ControllerFunctions.c
|
|||
|
|
/tmp/cc8z1BIG.s:16 .text.arm_pid_init_f32:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:24 .text.arm_pid_init_f32:0000000000000000 arm_pid_init_f32
|
|||
|
|
/tmp/cc8z1BIG.s:67 .text.arm_pid_init_q15:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:75 .text.arm_pid_init_q15:0000000000000000 arm_pid_init_q15
|
|||
|
|
/tmp/cc8z1BIG.s:170 .text.arm_pid_init_q31:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:178 .text.arm_pid_init_q31:0000000000000000 arm_pid_init_q31
|
|||
|
|
/tmp/cc8z1BIG.s:268 .text.arm_pid_reset_f32:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:276 .text.arm_pid_reset_f32:0000000000000000 arm_pid_reset_f32
|
|||
|
|
/tmp/cc8z1BIG.s:296 .text.arm_pid_reset_q15:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:304 .text.arm_pid_reset_q15:0000000000000000 arm_pid_reset_q15
|
|||
|
|
/tmp/cc8z1BIG.s:323 .text.arm_pid_reset_q31:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:331 .text.arm_pid_reset_q31:0000000000000000 arm_pid_reset_q31
|
|||
|
|
/tmp/cc8z1BIG.s:351 .text.arm_sin_cos_f32:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:359 .text.arm_sin_cos_f32:0000000000000000 arm_sin_cos_f32
|
|||
|
|
/tmp/cc8z1BIG.s:512 .text.arm_sin_cos_f32:00000000000000f4 $d
|
|||
|
|
/tmp/cc8z1BIG.s:520 .text.arm_sin_cos_q31:0000000000000000 $t
|
|||
|
|
/tmp/cc8z1BIG.s:528 .text.arm_sin_cos_q31:0000000000000000 arm_sin_cos_q31
|
|||
|
|
/tmp/cc8z1BIG.s:886 .text.arm_sin_cos_q31:0000000000000258 $d
|
|||
|
|
|
|||
|
|
UNDEFINED SYMBOLS
|
|||
|
|
sinTable_f32
|
|||
|
|
sinTable_q31
|