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ARM GAS /tmp/ccR8QFlv.s page 1
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1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32g4xx_hal_pwr_ex.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .global HAL_PWREx_GetVoltageRange
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 HAL_PWREx_GetVoltageRange:
25 .LFB329:
26 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c"
1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ******************************************************************************
3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @file stm32g4xx_hal_pwr_ex.c
4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @author MCD Application Team
5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver.
6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral:
8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions
9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions
10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** *
11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ******************************************************************************
12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @attention
13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** *
14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * <h2><center>© Copyright (c) 2019 STMicroelectronics.
15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * All rights reserved.</center></h2>
16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** *
17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This software component is licensed by ST under BSD 3-Clause license,
18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * the "License"; You may not use this file except in compliance with the
19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * License. You may obtain a copy of the License at:
20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * opensource.org/licenses/BSD-3-Clause
21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** *
22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ******************************************************************************
23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #include "stm32g4xx_hal.h"
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @addtogroup STM32G4xx_HAL_Driver
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
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33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR Extended HAL module driver
34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined (STM32G471xx) || defined (STM32G473xx) || defined (STM32G474xx) || defined (STM32G483xx
44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTF_AVAILABLE_PINS 0x0000FFFFU /* PF0..PF15 */
45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTG_AVAILABLE_PINS 0x000007FFU /* PG0..PG10 */
46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #elif defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32GBK1CB) || defined (STM32G491
47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTF_AVAILABLE_PINS 0x00000607U /* PF0..PF2 and PF9 and PF10 */
48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_PORTG_AVAILABLE_PINS 0x00000400U /* PG10 */
49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif
50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWR_Extended_Private_Defines PWR Extended Private Defines
52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_PVM_Mode_Mask PWR PVM Mode Mask
56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_MODE_IT 0x00010000U /*!< Mask for interruption yielded by PVM threshol
59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_MODE_EVT 0x00020000U /*!< Mask for event yielded by PVM threshold cross
60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_RISING_EDGE 0x00000001U /*!< Mask for rising edge set as PVM trigger
61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PVM_FALLING_EDGE 0x00000002U /*!< Mask for falling edge set as PVM trigger
62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @}
64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_TimeOut_Value PWR Extended Flag Setting Time Out Value
67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #define PWR_FLAG_SETTING_DELAY_US 50UL /*!< Time out value for REGLPF and VO
70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @}
72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @}
78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Exported functions --------------------------------------------------------*/
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWR Extended Exported Functions
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
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90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions
92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions
93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** *
94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** @verbatim
95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ===============================================================================
96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ##### Extended Peripheral Initialization and de-initialization functions #####
97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** ===============================================================================
98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** [..]
99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** @endverbatim
101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @{
102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Return Voltage Scaling Range.
107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval VOS bit field (PWR_REGULATOR_VOLTAGE_SCALE1 or PWR_REGULATOR_VOLTAGE_SCALE2
108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * or PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when applicable)
109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void)
111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
27 .loc 1 111 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
32 .loc 1 112 0
33 0000 074B ldr r3, .L6
34 0002 1868 ldr r0, [r3]
35 0004 00F4C060 and r0, r0, #1536
36 0008 B0F5806F cmp r0, #1024
37 000c 07D0 beq .L1
113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE2;
115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE)
38 .loc 1 116 0
39 000e D3F88030 ldr r3, [r3, #128]
40 0012 13F4807F tst r3, #256
117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR_CR5_R1MODE bit set means that Range 1 Boost is disabled */
119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE1;
120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else
122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return PWR_REGULATOR_VOLTAGE_SCALE1_BOOST;
41 .loc 1 123 0
42 0016 14BF ite ne
43 0018 4FF40070 movne r0, #512
44 001c 0020 moveq r0, #0
45 .L1:
124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
46 .loc 1 125 0
47 001e 7047 bx lr
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48 .L7:
49 .align 2
50 .L6:
51 0020 00700040 .word 1073770496
52 .cfi_endproc
53 .LFE329:
55 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits
56 .align 1
57 .p2align 2,,3
58 .global HAL_PWREx_ControlVoltageScaling
59 .syntax unified
60 .thumb
61 .thumb_func
62 .fpu fpv4-sp-d16
64 HAL_PWREx_ControlVoltageScaling:
65 .LFB330:
126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Configure the main internal regulator output voltage.
131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param VoltageScaling: specifies the regulator output voltage to achieve
132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption.
133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1_BOOST when available, Regulator voltage outpu
135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * typical output voltage at 1.28 V,
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * system frequency up to 170 MHz.
137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE1 Regulator voltage output range 1 mode,
138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * typical output voltage at 1.2 V,
139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * system frequency up to 150 MHz.
140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_REGULATOR_VOLTAGE_SCALE2 Regulator voltage output range 2 mode,
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * typical output voltage at 1.0 V,
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * system frequency up to 26 MHz.
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When moving from Range 1 to Range 2, the system frequency must be decreased to
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a value below 26 MHz before calling HAL_PWREx_ControlVoltageScaling() API.
145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * When moving from Range 2 to Range 1, the system frequency can be increased to
146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a value up to 150 MHz after calling HAL_PWREx_ControlVoltageScaling() API.
147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * When moving from Range 1 to Boost Mode Range 1, the system frequency can be increased to
148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * a value up to 170 MHz after calling HAL_PWREx_ControlVoltageScaling() API.
149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When moving from Range 2 to Range 1, the API waits for VOSF flag to be
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * cleared before returning the status. If the flag is not cleared within
151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * 50 microseconds, HAL_TIMEOUT status is reported.
152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
66 .loc 1 155 0
67 .cfi_startproc
68 @ args = 0, pretend = 0, frame = 0
69 @ frame_needed = 0, uses_anonymous_args = 0
70 @ link register save eliminated.
71 .LVL0:
156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t wait_loop_index;
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1_BOOST)
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161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 2 */
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
72 .loc 1 163 0
73 0000 3B4A ldr r2, .L45
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t wait_loop_index;
74 .loc 1 155 0
75 0002 10B4 push {r4}
76 .LCFI0:
77 .cfi_def_cfa_offset 4
78 .cfi_offset 4, -4
79 .loc 1 163 0
80 0004 1368 ldr r3, [r2]
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
81 .loc 1 160 0
82 0006 68B9 cbnz r0, .L9
83 .loc 1 163 0
84 0008 03F4C063 and r3, r3, #1536
85 000c B3F5806F cmp r3, #1024
86 0010 14D0 beq .L40
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Make sure Range 1 Boost is enabled */
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE);
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Range 1 */
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1);
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Wait until VOSF is cleared */
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U;
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index--;
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 1 normal or boost mode */
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Enable Range 1 Boost (no issue if bit already reset) */
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE);
87 .loc 1 186 0
88 0012 D2F88030 ldr r3, [r2, #128]
187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else if (VoltageScaling == PWR_REGULATOR_VOLTAGE_SCALE1)
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 2 */
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (READ_BIT(PWR->CR1, PWR_CR1_VOS) == PWR_REGULATOR_VOLTAGE_SCALE2)
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Make sure Range 1 Boost is disabled */
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR5, PWR_CR5_R1MODE);
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Range 1 */
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE1);
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Wait until VOSF is cleared */
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index = ((PWR_FLAG_SETTING_DELAY_US * SystemCoreClock) / 1000000U) + 1U;
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index--;
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF))
207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* If current range is range 1 normal or boost mode */
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Disable Range 1 Boost (no issue if bit already set) */
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR5, PWR_CR5_R1MODE);
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else
219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Range 2 */
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_VOS, PWR_REGULATOR_VOLTAGE_SCALE2);
222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* No need to wait for VOSF to be cleared for this transition */
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR_CR5_R1MODE bit setting has no effect in Range 2 */
224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_OK;
227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
89 .loc 1 227 0
90 0016 5DF8044B ldr r4, [sp], #4
91 .LCFI1:
92 .cfi_remember_state
93 .cfi_restore 4
94 .cfi_def_cfa_offset 0
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
95 .loc 1 186 0
96 001a 23F48073 bic r3, r3, #256
97 001e C2F88030 str r3, [r2, #128]
98 .loc 1 227 0
99 0022 7047 bx lr
100 .L9:
101 .LCFI2:
102 .cfi_restore_state
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
103 .loc 1 189 0
104 0024 B0F5007F cmp r0, #512
105 0028 2FD0 beq .L41
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* No need to wait for VOSF to be cleared for this transition */
106 .loc 1 221 0
107 002a 23F4C063 bic r3, r3, #1536
108 002e 43F48063 orr r3, r3, #1024
109 0032 1360 str r3, [r2]
110 .LVL1:
111 .L39:
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
112 .loc 1 226 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
113 0034 0020 movs r0, #0
114 .L14:
115 .loc 1 227 0
116 0036 5DF8044B ldr r4, [sp], #4
117 .LCFI3:
118 .cfi_remember_state
119 .cfi_restore 4
120 .cfi_def_cfa_offset 0
121 003a 7047 bx lr
122 .LVL2:
123 .L40:
124 .LCFI4:
125 .cfi_restore_state
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
126 .loc 1 166 0
127 003c D2F88010 ldr r1, [r2, #128]
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
128 .loc 1 172 0
129 0040 2C4B ldr r3, .L45+4
130 0042 2D48 ldr r0, .L45+8
131 .LVL3:
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
132 .loc 1 166 0
133 0044 21F48071 bic r1, r1, #256
134 0048 C2F88010 str r1, [r2, #128]
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
135 .loc 1 169 0
136 004c 1168 ldr r1, [r2]
137 004e 21F4C061 bic r1, r1, #1536
138 0052 41F40071 orr r1, r1, #512
139 0056 1160 str r1, [r2]
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
140 .loc 1 172 0
141 0058 1C68 ldr r4, [r3]
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
142 .loc 1 173 0
143 005a 5169 ldr r1, [r2, #20]
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
144 .loc 1 172 0
145 005c 3223 movs r3, #50
146 005e 03FB04F3 mul r3, r3, r4
147 0062 A0FB0303 umull r0, r3, r0, r3
148 0066 9B0C lsrs r3, r3, #18
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
149 .loc 1 173 0
150 0068 4805 lsls r0, r1, #21
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
151 .loc 1 172 0
152 006a 03F10103 add r3, r3, #1
153 .LVL4:
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
154 .loc 1 173 0
155 006e 06D5 bpl .L11
156 0070 00E0 b .L12
157 .L42:
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
158 .loc 1 173 0 is_stmt 0 discriminator 1
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
159 0072 23B1 cbz r3, .L11
160 .L12:
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
161 .loc 1 173 0
162 0074 5169 ldr r1, [r2, #20]
163 0076 4905 lsls r1, r1, #21
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
164 .loc 1 175 0 is_stmt 1
165 0078 03F1FF33 add r3, r3, #-1
166 .LVL5:
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
167 .loc 1 173 0
168 007c F9D4 bmi .L42
169 .L11:
177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
170 .loc 1 177 0
171 007e 1C4B ldr r3, .L45
172 .LVL6:
173 0080 5B69 ldr r3, [r3, #20]
174 0082 5C05 lsls r4, r3, #21
175 0084 D6D5 bpl .L39
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
176 .loc 1 179 0
177 0086 0320 movs r0, #3
178 0088 D5E7 b .L14
179 .LVL7:
180 .L41:
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
181 .loc 1 192 0
182 008a 03F4C063 and r3, r3, #1536
183 008e B3F5806F cmp r3, #1024
184 0092 09D0 beq .L43
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
185 .loc 1 215 0
186 0094 D2F88030 ldr r3, [r2, #128]
187 .loc 1 227 0
188 0098 5DF8044B ldr r4, [sp], #4
189 .LCFI5:
190 .cfi_remember_state
191 .cfi_restore 4
192 .cfi_def_cfa_offset 0
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
193 .loc 1 215 0
194 009c 43F48073 orr r3, r3, #256
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
195 .loc 1 226 0
196 00a0 0020 movs r0, #0
197 .LVL8:
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
198 .loc 1 215 0
199 00a2 C2F88030 str r3, [r2, #128]
200 .loc 1 227 0
201 00a6 7047 bx lr
202 .LVL9:
203 .L43:
204 .LCFI6:
205 .cfi_restore_state
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
206 .loc 1 195 0
207 00a8 D2F88010 ldr r1, [r2, #128]
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
208 .loc 1 201 0
209 00ac 114B ldr r3, .L45+4
210 00ae 1248 ldr r0, .L45+8
211 .LVL10:
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
212 .loc 1 195 0
213 00b0 41F48071 orr r1, r1, #256
214 00b4 C2F88010 str r1, [r2, #128]
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
215 .loc 1 198 0
216 00b8 1168 ldr r1, [r2]
217 00ba 21F4C061 bic r1, r1, #1536
218 00be 41F40071 orr r1, r1, #512
219 00c2 1160 str r1, [r2]
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
220 .loc 1 201 0
221 00c4 1C68 ldr r4, [r3]
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
222 .loc 1 202 0
223 00c6 5169 ldr r1, [r2, #20]
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
224 .loc 1 201 0
225 00c8 3223 movs r3, #50
226 00ca 03FB04F3 mul r3, r3, r4
227 00ce A0FB0303 umull r0, r3, r0, r3
228 00d2 9B0C lsrs r3, r3, #18
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
229 .loc 1 202 0
230 00d4 4805 lsls r0, r1, #21
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_VOSF)) && (wait_loop_index != 0U))
231 .loc 1 201 0
232 00d6 03F10103 add r3, r3, #1
233 .LVL11:
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
234 .loc 1 202 0
235 00da D0D5 bpl .L11
236 00dc 01E0 b .L18
237 .L44:
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
238 .loc 1 202 0 is_stmt 0 discriminator 1
239 00de 002B cmp r3, #0
240 00e0 CDD0 beq .L11
241 .L18:
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
242 .loc 1 202 0
243 00e2 5169 ldr r1, [r2, #20]
244 00e4 4905 lsls r1, r1, #21
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
245 .loc 1 204 0 is_stmt 1
246 00e6 03F1FF33 add r3, r3, #-1
247 .LVL12:
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
248 .loc 1 202 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
249 00ea C8D5 bpl .L11
250 00ec F7E7 b .L44
251 .L46:
252 00ee 00BF .align 2
253 .L45:
254 00f0 00700040 .word 1073770496
255 00f4 00000000 .word SystemCoreClock
256 00f8 83DE1B43 .word 1125899907
257 .cfi_endproc
258 .LFE330:
260 .section .text.HAL_PWREx_EnableBatteryCharging,"ax",%progbits
261 .align 1
262 .p2align 2,,3
263 .global HAL_PWREx_EnableBatteryCharging
264 .syntax unified
265 .thumb
266 .thumb_func
267 .fpu fpv4-sp-d16
269 HAL_PWREx_EnableBatteryCharging:
270 .LFB331:
228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable battery charging.
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * When VDD is present, charge the external battery on VBAT through an internal resistor.
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param ResistorSelection: specifies the resistor impedance.
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_5 5 kOhms resistor
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_BATTERY_CHARGING_RESISTOR_1_5 1.5 kOhms resistor
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection)
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
271 .loc 1 240 0
272 .cfi_startproc
273 @ args = 0, pretend = 0, frame = 0
274 @ frame_needed = 0, uses_anonymous_args = 0
275 @ link register save eliminated.
276 .LVL13:
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_BATTERY_RESISTOR_SELECT(ResistorSelection));
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Specify resistor selection */
244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, ResistorSelection);
277 .loc 1 244 0
278 0000 054A ldr r2, .L48
279 0002 D368 ldr r3, [r2, #12]
280 0004 23F40073 bic r3, r3, #512
281 0008 1843 orrs r0, r0, r3
282 .LVL14:
283 000a D060 str r0, [r2, #12]
245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Enable battery charging */
247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR4, PWR_CR4_VBE);
284 .loc 1 247 0
285 000c D368 ldr r3, [r2, #12]
286 000e 43F48073 orr r3, r3, #256
287 0012 D360 str r3, [r2, #12]
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248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
288 .loc 1 248 0
289 0014 7047 bx lr
290 .L49:
291 0016 00BF .align 2
292 .L48:
293 0018 00700040 .word 1073770496
294 .cfi_endproc
295 .LFE331:
297 .section .text.HAL_PWREx_DisableBatteryCharging,"ax",%progbits
298 .align 1
299 .p2align 2,,3
300 .global HAL_PWREx_DisableBatteryCharging
301 .syntax unified
302 .thumb
303 .thumb_func
304 .fpu fpv4-sp-d16
306 HAL_PWREx_DisableBatteryCharging:
307 .LFB332:
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable battery charging.
253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableBatteryCharging(void)
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
308 .loc 1 256 0
309 .cfi_startproc
310 @ args = 0, pretend = 0, frame = 0
311 @ frame_needed = 0, uses_anonymous_args = 0
312 @ link register save eliminated.
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR4, PWR_CR4_VBE);
313 .loc 1 257 0
314 0000 024A ldr r2, .L51
315 0002 D368 ldr r3, [r2, #12]
316 0004 23F48073 bic r3, r3, #256
317 0008 D360 str r3, [r2, #12]
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
318 .loc 1 258 0
319 000a 7047 bx lr
320 .L52:
321 .align 2
322 .L51:
323 000c 00700040 .word 1073770496
324 .cfi_endproc
325 .LFE332:
327 .section .text.HAL_PWREx_EnableInternalWakeUpLine,"ax",%progbits
328 .align 1
329 .p2align 2,,3
330 .global HAL_PWREx_EnableInternalWakeUpLine
331 .syntax unified
332 .thumb
333 .thumb_func
334 .fpu fpv4-sp-d16
336 HAL_PWREx_EnableInternalWakeUpLine:
337 .LFB333:
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259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable Internal Wake-up Line.
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableInternalWakeUpLine(void)
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
338 .loc 1 266 0
339 .cfi_startproc
340 @ args = 0, pretend = 0, frame = 0
341 @ frame_needed = 0, uses_anonymous_args = 0
342 @ link register save eliminated.
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_EIWF);
343 .loc 1 267 0
344 0000 024A ldr r2, .L54
345 0002 9368 ldr r3, [r2, #8]
346 0004 43F40043 orr r3, r3, #32768
347 0008 9360 str r3, [r2, #8]
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
348 .loc 1 268 0
349 000a 7047 bx lr
350 .L55:
351 .align 2
352 .L54:
353 000c 00700040 .word 1073770496
354 .cfi_endproc
355 .LFE333:
357 .section .text.HAL_PWREx_DisableInternalWakeUpLine,"ax",%progbits
358 .align 1
359 .p2align 2,,3
360 .global HAL_PWREx_DisableInternalWakeUpLine
361 .syntax unified
362 .thumb
363 .thumb_func
364 .fpu fpv4-sp-d16
366 HAL_PWREx_DisableInternalWakeUpLine:
367 .LFB334:
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable Internal Wake-up Line.
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableInternalWakeUpLine(void)
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
368 .loc 1 276 0
369 .cfi_startproc
370 @ args = 0, pretend = 0, frame = 0
371 @ frame_needed = 0, uses_anonymous_args = 0
372 @ link register save eliminated.
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF);
373 .loc 1 277 0
374 0000 024A ldr r2, .L57
375 0002 9368 ldr r3, [r2, #8]
376 0004 23F40043 bic r3, r3, #32768
377 0008 9360 str r3, [r2, #8]
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278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
378 .loc 1 278 0
379 000a 7047 bx lr
380 .L58:
381 .align 2
382 .L57:
383 000c 00700040 .word 1073770496
384 .cfi_endproc
385 .LFE334:
387 .section .text.HAL_PWREx_EnableGPIOPullUp,"ax",%progbits
388 .align 1
389 .p2align 2,,3
390 .global HAL_PWREx_EnableGPIOPullUp
391 .syntax unified
392 .thumb
393 .thumb_func
394 .fpu fpv4-sp-d16
396 HAL_PWREx_EnableGPIOPullUp:
397 .LFB335:
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable GPIO pull-up state in Standby and Shutdown modes.
284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Set the relevant PUy bits of PWR_PUCRx register to configure the I/O in
285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * pull-up state in Standby and Shutdown modes.
286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This state is effective in Standby and Shutdown modes only if APC bit
287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The configuration is lost when exiting the Shutdown mode due to the
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * power-on reset, maintained when exiting the Standby mode.
290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PDy bit of PWR_PDCRx register is cleared unless it is reserved.
292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PUy bit to set is reserved, the other PUy bits entered as input
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are set.
294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_G
295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers.
297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to set
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call.
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
398 .loc 1 304 0
399 .cfi_startproc
400 @ args = 0, pretend = 0, frame = 0
401 @ frame_needed = 0, uses_anonymous_args = 0
402 @ link register save eliminated.
403 .LVL15:
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO));
308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO)
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404 .loc 1 310 0
405 0000 0628 cmp r0, #6
406 0002 54D8 bhi .L69
407 0004 DFE800F0 tbb [pc, r0]
408 .L62:
409 0008 0E .byte (.L61-.L62)/2
410 0009 1C .byte (.L63-.L62)/2
411 000a 28 .byte (.L64-.L62)/2
412 000b 32 .byte (.L65-.L62)/2
413 000c 3C .byte (.L66-.L62)/2
414 000d 46 .byte (.L67-.L62)/2
415 000e 04 .byte (.L68-.L62)/2
416 000f 00 .p2align 1
417 .L68:
311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A:
313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRB, GPIONumber);
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRC, GPIONumber);
322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRC, GPIONumber);
323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRD, GPIONumber);
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber);
327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRE, GPIONumber);
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRE, GPIONumber);
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PUCRG, (GPIONumber & PWR_PORTG_AVAILABLE_PINS));
418 .loc 1 337 0
419 0010 284B ldr r3, .L70
420 0012 1A6D ldr r2, [r3, #80]
421 0014 01F48061 and r1, r1, #1024
422 .LVL16:
423 0018 1143 orrs r1, r1, r2
424 001a 1965 str r1, [r3, #80]
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRG, ((GPIONumber & PWR_PORTG_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_10))));
425 .loc 1 338 0
426 001c 5A6D ldr r2, [r3, #84]
427 001e 5A65 str r2, [r3, #84]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
428 .loc 1 305 0
429 0020 0020 movs r0, #0
430 .LVL17:
339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
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2021-07-02 22:19:04 +02:00
431 .loc 1 339 0
432 0022 7047 bx lr
433 .LVL18:
434 .L61:
313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
435 .loc 1 313 0
436 0024 234B ldr r3, .L70
437 0026 186A ldr r0, [r3, #32]
438 .LVL19:
439 0028 21F48042 bic r2, r1, #16384
440 002c 0243 orrs r2, r2, r0
441 002e 1A62 str r2, [r3, #32]
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
442 .loc 1 314 0
443 0030 5A6A ldr r2, [r3, #36]
444 0032 21F42041 bic r1, r1, #40960
445 .LVL20:
446 0036 22EA0101 bic r1, r2, r1
447 003a 5962 str r1, [r3, #36]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
448 .loc 1 305 0
449 003c 0020 movs r0, #0
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
450 .loc 1 315 0
451 003e 7047 bx lr
452 .LVL21:
453 .L63:
317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
454 .loc 1 317 0
455 0040 1C4B ldr r3, .L70
456 0042 9A6A ldr r2, [r3, #40]
457 0044 0A43 orrs r2, r2, r1
458 0046 9A62 str r2, [r3, #40]
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
459 .loc 1 318 0
460 0048 DA6A ldr r2, [r3, #44]
461 004a 21F01001 bic r1, r1, #16
462 .LVL22:
463 004e 22EA0101 bic r1, r2, r1
464 0052 D962 str r1, [r3, #44]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
465 .loc 1 305 0
466 0054 0020 movs r0, #0
467 .LVL23:
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
468 .loc 1 319 0
469 0056 7047 bx lr
470 .LVL24:
471 .L64:
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRC, GPIONumber);
472 .loc 1 321 0
473 0058 164B ldr r3, .L70
474 005a 1A6B ldr r2, [r3, #48]
475 005c 0A43 orrs r2, r2, r1
476 005e 1A63 str r2, [r3, #48]
322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
477 .loc 1 322 0
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2021-07-02 22:19:04 +02:00
478 0060 5A6B ldr r2, [r3, #52]
479 0062 22EA0101 bic r1, r2, r1
480 .LVL25:
481 0066 5963 str r1, [r3, #52]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
482 .loc 1 305 0
483 0068 0020 movs r0, #0
484 .LVL26:
323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
485 .loc 1 323 0
486 006a 7047 bx lr
487 .LVL27:
488 .L65:
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber);
489 .loc 1 325 0
490 006c 114B ldr r3, .L70
491 006e 9A6B ldr r2, [r3, #56]
492 0070 0A43 orrs r2, r2, r1
493 0072 9A63 str r2, [r3, #56]
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
494 .loc 1 326 0
495 0074 DA6B ldr r2, [r3, #60]
496 0076 22EA0101 bic r1, r2, r1
497 .LVL28:
498 007a D963 str r1, [r3, #60]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
499 .loc 1 305 0
500 007c 0020 movs r0, #0
501 .LVL29:
327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
502 .loc 1 327 0
503 007e 7047 bx lr
504 .LVL30:
505 .L66:
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRE, GPIONumber);
506 .loc 1 329 0
507 0080 0C4B ldr r3, .L70
508 0082 1A6C ldr r2, [r3, #64]
509 0084 0A43 orrs r2, r2, r1
510 0086 1A64 str r2, [r3, #64]
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
511 .loc 1 330 0
512 0088 5A6C ldr r2, [r3, #68]
513 008a 22EA0101 bic r1, r2, r1
514 .LVL31:
515 008e 5964 str r1, [r3, #68]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
516 .loc 1 305 0
517 0090 0020 movs r0, #0
518 .LVL32:
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
519 .loc 1 331 0
520 0092 7047 bx lr
521 .LVL33:
522 .L67:
333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
523 .loc 1 333 0
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2021-07-02 22:19:04 +02:00
524 0094 074B ldr r3, .L70
525 0096 40F20762 movw r2, #1543
526 009a 986C ldr r0, [r3, #72]
527 .LVL34:
528 009c 1140 ands r1, r1, r2
529 .LVL35:
530 009e 0843 orrs r0, r0, r1
531 00a0 9864 str r0, [r3, #72]
334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
532 .loc 1 334 0
533 00a2 DA6C ldr r2, [r3, #76]
534 00a4 22EA0101 bic r1, r2, r1
535 00a8 D964 str r1, [r3, #76]
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
536 .loc 1 305 0
537 00aa 0020 movs r0, #0
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
538 .loc 1 335 0
539 00ac 7047 bx lr
540 .LVL36:
541 .L69:
340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default:
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR;
542 .loc 1 341 0
543 00ae 0120 movs r0, #1
544 .LVL37:
342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status;
346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
545 .loc 1 346 0
546 00b0 7047 bx lr
547 .L71:
548 00b2 00BF .align 2
549 .L70:
550 00b4 00700040 .word 1073770496
551 .cfi_endproc
552 .LFE335:
554 .section .text.HAL_PWREx_DisableGPIOPullUp,"ax",%progbits
555 .align 1
556 .p2align 2,,3
557 .global HAL_PWREx_DisableGPIOPullUp
558 .syntax unified
559 .thumb
560 .thumb_func
561 .fpu fpv4-sp-d16
563 HAL_PWREx_DisableGPIOPullUp:
564 .LFB336:
347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable GPIO pull-up state in Standby mode and Shutdown modes.
351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Reset the relevant PUy bits of PWR_PUCRx register used to configure the I/O
352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in pull-up state in Standby and Shutdown modes.
353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PUy bit to reset is reserved, the other PUy bits entered as input
354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are reset.
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355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A, ..., PWR_GPIO_G
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers.
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less
360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to reset
361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call.
362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber)
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
565 .loc 1 365 0
566 .cfi_startproc
567 @ args = 0, pretend = 0, frame = 0
568 @ frame_needed = 0, uses_anonymous_args = 0
569 @ link register save eliminated.
570 .LVL38:
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO));
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO)
571 .loc 1 371 0
572 0000 0628 cmp r0, #6
573 0002 3DD8 bhi .L82
574 0004 DFE800F0 tbb [pc, r0]
575 .L75:
576 0008 0D .byte (.L74-.L75)/2
577 0009 16 .byte (.L76-.L75)/2
578 000a 1D .byte (.L77-.L75)/2
579 000b 24 .byte (.L78-.L75)/2
580 000c 2B .byte (.L79-.L75)/2
581 000d 32 .byte (.L80-.L75)/2
582 000e 04 .byte (.L81-.L75)/2
583 000f 00 .p2align 1
584 .L81:
372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A:
374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRB, GPIONumber);
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRC, GPIONumber);
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRD, GPIONumber);
384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRE, GPIONumber);
387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
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392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRG, (GPIONumber & PWR_PORTG_AVAILABLE_PINS));
585 .loc 1 392 0
586 0010 1C4A ldr r2, .L83
587 0012 136D ldr r3, [r2, #80]
588 0014 01F48061 and r1, r1, #1024
589 .LVL39:
590 0018 23EA0101 bic r1, r3, r1
591 001c 1165 str r1, [r2, #80]
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
592 .loc 1 366 0
593 001e 0020 movs r0, #0
594 .LVL40:
393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
595 .loc 1 393 0
596 0020 7047 bx lr
597 .LVL41:
598 .L74:
374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
599 .loc 1 374 0
600 0022 184A ldr r2, .L83
601 0024 136A ldr r3, [r2, #32]
602 0026 21F48041 bic r1, r1, #16384
603 .LVL42:
604 002a 23EA0101 bic r1, r3, r1
605 002e 1162 str r1, [r2, #32]
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
606 .loc 1 366 0
607 0030 0020 movs r0, #0
608 .LVL43:
375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
609 .loc 1 375 0
610 0032 7047 bx lr
611 .LVL44:
612 .L76:
377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
613 .loc 1 377 0
614 0034 134A ldr r2, .L83
615 0036 936A ldr r3, [r2, #40]
616 0038 23EA0101 bic r1, r3, r1
617 .LVL45:
618 003c 9162 str r1, [r2, #40]
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
619 .loc 1 366 0
620 003e 0020 movs r0, #0
621 .LVL46:
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
622 .loc 1 378 0
623 0040 7047 bx lr
624 .LVL47:
625 .L77:
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
626 .loc 1 380 0
627 0042 104A ldr r2, .L83
628 0044 136B ldr r3, [r2, #48]
629 0046 23EA0101 bic r1, r3, r1
630 .LVL48:
631 004a 1163 str r1, [r2, #48]
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366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
632 .loc 1 366 0
633 004c 0020 movs r0, #0
634 .LVL49:
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
635 .loc 1 381 0
636 004e 7047 bx lr
637 .LVL50:
638 .L78:
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
639 .loc 1 383 0
640 0050 0C4A ldr r2, .L83
641 0052 936B ldr r3, [r2, #56]
642 0054 23EA0101 bic r1, r3, r1
643 .LVL51:
644 0058 9163 str r1, [r2, #56]
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
645 .loc 1 366 0
646 005a 0020 movs r0, #0
647 .LVL52:
384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
648 .loc 1 384 0
649 005c 7047 bx lr
650 .LVL53:
651 .L79:
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
652 .loc 1 386 0
653 005e 094A ldr r2, .L83
654 0060 136C ldr r3, [r2, #64]
655 0062 23EA0101 bic r1, r3, r1
656 .LVL54:
657 0066 1164 str r1, [r2, #64]
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
658 .loc 1 366 0
659 0068 0020 movs r0, #0
660 .LVL55:
387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
661 .loc 1 387 0
662 006a 7047 bx lr
663 .LVL56:
664 .L80:
389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
665 .loc 1 389 0
666 006c 0548 ldr r0, .L83
667 .LVL57:
668 006e 40F20762 movw r2, #1543
669 0072 836C ldr r3, [r0, #72]
670 0074 1140 ands r1, r1, r2
671 .LVL58:
672 0076 23EA0101 bic r1, r3, r1
673 007a 8164 str r1, [r0, #72]
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
674 .loc 1 366 0
675 007c 0020 movs r0, #0
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
676 .loc 1 390 0
677 007e 7047 bx lr
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678 .LVL59:
679 .L82:
394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default:
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR;
680 .loc 1 395 0
681 0080 0120 movs r0, #1
682 .LVL60:
396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status;
400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
683 .loc 1 400 0
684 0082 7047 bx lr
685 .L84:
686 .align 2
687 .L83:
688 0084 00700040 .word 1073770496
689 .cfi_endproc
690 .LFE336:
692 .section .text.HAL_PWREx_EnableGPIOPullDown,"ax",%progbits
693 .align 1
694 .p2align 2,,3
695 .global HAL_PWREx_EnableGPIOPullDown
696 .syntax unified
697 .thumb
698 .thumb_func
699 .fpu fpv4-sp-d16
701 HAL_PWREx_EnableGPIOPullDown:
702 .LFB337:
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable GPIO pull-down state in Standby and Shutdown modes.
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Set the relevant PDy bits of PWR_PDCRx register to configure the I/O in
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * pull-down state in Standby and Shutdown modes.
408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This state is effective in Standby and Shutdown modes only if APC bit
409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set through HAL_PWREx_EnablePullUpPullDownConfig() API.
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The configuration is lost when exiting the Shutdown mode due to the
411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * power-on reset, maintained when exiting the Standby mode.
412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note To avoid any conflict at Standby and Shutdown modes exits, the corresponding
413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PUy bit of PWR_PUCRx register is cleared unless it is reserved.
414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PDy bit to set is reserved, the other PDy bits entered as input
415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are set.
416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specify the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_G
417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers.
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less
421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to set
422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call.
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
703 .loc 1 426 0
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704 .cfi_startproc
705 @ args = 0, pretend = 0, frame = 0
706 @ frame_needed = 0, uses_anonymous_args = 0
707 @ link register save eliminated.
708 .LVL61:
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO));
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO)
709 .loc 1 432 0
710 0000 0628 cmp r0, #6
711 0002 55D8 bhi .L95
712 0004 DFE800F0 tbb [pc, r0]
713 .L88:
714 0008 0F .byte (.L87-.L88)/2
715 0009 1D .byte (.L89-.L88)/2
716 000a 29 .byte (.L90-.L88)/2
717 000b 33 .byte (.L91-.L88)/2
718 000c 3D .byte (.L92-.L88)/2
719 000d 47 .byte (.L93-.L88)/2
720 000e 04 .byte (.L94-.L88)/2
721 000f 00 .p2align 1
722 .L94:
433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A:
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRB, GPIONumber);
441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRC, GPIONumber);
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRC, GPIONumber);
445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRD, GPIONumber);
448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRD, GPIONumber);
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRE, GPIONumber);
452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRE, GPIONumber);
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->PDCRG, ((GPIONumber & PWR_PORTG_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_10))));
723 .loc 1 459 0
724 0010 284B ldr r3, .L96
725 0012 5A6D ldr r2, [r3, #84]
726 0014 5A65 str r2, [r3, #84]
460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRG, (GPIONumber & PWR_PORTG_AVAILABLE_PINS));
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
727 .loc 1 460 0
728 0016 1A6D ldr r2, [r3, #80]
729 0018 01F48061 and r1, r1, #1024
730 .LVL62:
731 001c 22EA0101 bic r1, r2, r1
732 0020 1965 str r1, [r3, #80]
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
733 .loc 1 427 0
734 0022 0020 movs r0, #0
735 .LVL63:
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
736 .loc 1 461 0
737 0024 7047 bx lr
738 .LVL64:
739 .L87:
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRA, (GPIONumber & (~(PWR_GPIO_BIT_14))));
740 .loc 1 435 0
741 0026 234B ldr r3, .L96
742 0028 586A ldr r0, [r3, #36]
743 .LVL65:
744 002a 21F42042 bic r2, r1, #40960
745 002e 0243 orrs r2, r2, r0
746 0030 5A62 str r2, [r3, #36]
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
747 .loc 1 436 0
748 0032 1A6A ldr r2, [r3, #32]
749 0034 21F48041 bic r1, r1, #16384
750 .LVL66:
751 0038 22EA0101 bic r1, r2, r1
752 003c 1962 str r1, [r3, #32]
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
753 .loc 1 427 0
754 003e 0020 movs r0, #0
437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
755 .loc 1 437 0
756 0040 7047 bx lr
757 .LVL67:
758 .L89:
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRB, GPIONumber);
759 .loc 1 439 0
760 0042 1C4B ldr r3, .L96
761 0044 D86A ldr r0, [r3, #44]
762 .LVL68:
763 0046 21F01002 bic r2, r1, #16
764 004a 0243 orrs r2, r2, r0
765 004c DA62 str r2, [r3, #44]
440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
766 .loc 1 440 0
767 004e 9A6A ldr r2, [r3, #40]
768 0050 22EA0101 bic r1, r2, r1
769 .LVL69:
770 0054 9962 str r1, [r3, #40]
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
771 .loc 1 427 0
772 0056 0020 movs r0, #0
441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
773 .loc 1 441 0
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2021-07-02 22:19:04 +02:00
774 0058 7047 bx lr
775 .LVL70:
776 .L90:
443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRC, GPIONumber);
777 .loc 1 443 0
778 005a 164B ldr r3, .L96
779 005c 5A6B ldr r2, [r3, #52]
780 005e 0A43 orrs r2, r2, r1
781 0060 5A63 str r2, [r3, #52]
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
782 .loc 1 444 0
783 0062 1A6B ldr r2, [r3, #48]
784 0064 22EA0101 bic r1, r2, r1
785 .LVL71:
786 0068 1963 str r1, [r3, #48]
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
787 .loc 1 427 0
788 006a 0020 movs r0, #0
789 .LVL72:
445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
790 .loc 1 445 0
791 006c 7047 bx lr
792 .LVL73:
793 .L91:
447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRD, GPIONumber);
794 .loc 1 447 0
795 006e 114B ldr r3, .L96
796 0070 DA6B ldr r2, [r3, #60]
797 0072 0A43 orrs r2, r2, r1
798 0074 DA63 str r2, [r3, #60]
448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
799 .loc 1 448 0
800 0076 9A6B ldr r2, [r3, #56]
801 0078 22EA0101 bic r1, r2, r1
802 .LVL74:
803 007c 9963 str r1, [r3, #56]
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
804 .loc 1 427 0
805 007e 0020 movs r0, #0
806 .LVL75:
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
807 .loc 1 449 0
808 0080 7047 bx lr
809 .LVL76:
810 .L92:
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRE, GPIONumber);
811 .loc 1 451 0
812 0082 0C4B ldr r3, .L96
813 0084 5A6C ldr r2, [r3, #68]
814 0086 0A43 orrs r2, r2, r1
815 0088 5A64 str r2, [r3, #68]
452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
816 .loc 1 452 0
817 008a 1A6C ldr r2, [r3, #64]
818 008c 22EA0101 bic r1, r2, r1
819 .LVL77:
820 0090 1964 str r1, [r3, #64]
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
821 .loc 1 427 0
822 0092 0020 movs r0, #0
823 .LVL78:
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
824 .loc 1 453 0
825 0094 7047 bx lr
826 .LVL79:
827 .L93:
455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PUCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
828 .loc 1 455 0
829 0096 074B ldr r3, .L96
830 0098 40F20762 movw r2, #1543
831 009c D86C ldr r0, [r3, #76]
832 .LVL80:
833 009e 1140 ands r1, r1, r2
834 .LVL81:
835 00a0 0843 orrs r0, r0, r1
836 00a2 D864 str r0, [r3, #76]
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
837 .loc 1 456 0
838 00a4 9A6C ldr r2, [r3, #72]
839 00a6 22EA0101 bic r1, r2, r1
840 00aa 9964 str r1, [r3, #72]
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
841 .loc 1 427 0
842 00ac 0020 movs r0, #0
457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
843 .loc 1 457 0
844 00ae 7047 bx lr
845 .LVL82:
846 .L95:
462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default:
463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR;
847 .loc 1 463 0
848 00b0 0120 movs r0, #1
849 .LVL83:
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status;
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
850 .loc 1 468 0
851 00b2 7047 bx lr
852 .L97:
853 .align 2
854 .L96:
855 00b4 00700040 .word 1073770496
856 .cfi_endproc
857 .LFE337:
859 .section .text.HAL_PWREx_DisableGPIOPullDown,"ax",%progbits
860 .align 1
861 .p2align 2,,3
862 .global HAL_PWREx_DisableGPIOPullDown
863 .syntax unified
864 .thumb
865 .thumb_func
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
866 .fpu fpv4-sp-d16
868 HAL_PWREx_DisableGPIOPullDown:
869 .LFB338:
469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable GPIO pull-down state in Standby and Shutdown modes.
473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Reset the relevant PDy bits of PWR_PDCRx register used to configure the I/O
474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in pull-down state in Standby and Shutdown modes.
475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Even if a PDy bit to reset is reserved, the other PDy bits entered as input
476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * parameter at the same time are reset.
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIO: Specifies the IO port. This parameter can be PWR_GPIO_A..PWR_GPIO_G
478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (or PWR_GPIO_I depending on the devices) to select the GPIO peripheral.
479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param GPIONumber: Specify the I/O pins numbers.
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_GPIO_BIT_0, ..., PWR_GPIO_BIT_15 (except for the port where less
482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * I/O pins are available) or the logical OR of several of them to reset
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * several bits for a given port in a single API call.
484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber)
487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
870 .loc 1 487 0
871 .cfi_startproc
872 @ args = 0, pretend = 0, frame = 0
873 @ frame_needed = 0, uses_anonymous_args = 0
874 @ link register save eliminated.
875 .LVL84:
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO(GPIO));
491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_GPIO_BIT_NUMBER(GPIONumber));
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (GPIO)
876 .loc 1 493 0
877 0000 0628 cmp r0, #6
878 0002 3BD8 bhi .L108
879 0004 DFE800F0 tbb [pc, r0]
880 .L101:
881 0008 09 .byte (.L100-.L101)/2
882 0009 12 .byte (.L102-.L101)/2
883 000a 1B .byte (.L103-.L101)/2
884 000b 22 .byte (.L104-.L101)/2
885 000c 29 .byte (.L105-.L101)/2
886 000d 30 .byte (.L106-.L101)/2
887 000e 04 .byte (.L107-.L101)/2
888 000f 00 .p2align 1
889 .L107:
494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_A:
496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRA, (GPIONumber & (~(PWR_GPIO_BIT_13|PWR_GPIO_BIT_15))));
497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRB, (GPIONumber & (~(PWR_GPIO_BIT_4))));
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRC, GPIONumber);
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2021-07-02 22:19:04 +02:00
503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRD, GPIONumber);
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRE, GPIONumber);
509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRF, (GPIONumber & PWR_PORTF_AVAILABLE_PINS));
512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->PDCRG, ((GPIONumber & PWR_PORTG_AVAILABLE_PINS) & (~(PWR_GPIO_BIT_10))));
890 .loc 1 514 0
891 0010 1B4B ldr r3, .L109
892 0012 5A6D ldr r2, [r3, #84]
893 0014 5A65 str r2, [r3, #84]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
894 .loc 1 488 0
895 0016 0020 movs r0, #0
896 .LVL85:
515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
897 .loc 1 515 0
898 0018 7047 bx lr
899 .LVL86:
900 .L100:
496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
901 .loc 1 496 0
902 001a 194A ldr r2, .L109
903 001c 536A ldr r3, [r2, #36]
904 001e 21F42041 bic r1, r1, #40960
905 .LVL87:
906 0022 23EA0101 bic r1, r3, r1
907 0026 5162 str r1, [r2, #36]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
908 .loc 1 488 0
909 0028 0020 movs r0, #0
910 .LVL88:
497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_B:
911 .loc 1 497 0
912 002a 7047 bx lr
913 .LVL89:
914 .L102:
499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
915 .loc 1 499 0
916 002c 144A ldr r2, .L109
917 002e D36A ldr r3, [r2, #44]
918 0030 21F01001 bic r1, r1, #16
919 .LVL90:
920 0034 23EA0101 bic r1, r3, r1
921 0038 D162 str r1, [r2, #44]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
922 .loc 1 488 0
923 003a 0020 movs r0, #0
924 .LVL91:
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_C:
925 .loc 1 500 0
926 003c 7047 bx lr
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2021-07-02 22:19:04 +02:00
927 .LVL92:
928 .L103:
502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
929 .loc 1 502 0
930 003e 104A ldr r2, .L109
931 0040 536B ldr r3, [r2, #52]
932 0042 23EA0101 bic r1, r3, r1
933 .LVL93:
934 0046 5163 str r1, [r2, #52]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
935 .loc 1 488 0
936 0048 0020 movs r0, #0
937 .LVL94:
503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_D:
938 .loc 1 503 0
939 004a 7047 bx lr
940 .LVL95:
941 .L104:
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
942 .loc 1 505 0
943 004c 0C4A ldr r2, .L109
944 004e D36B ldr r3, [r2, #60]
945 0050 23EA0101 bic r1, r3, r1
946 .LVL96:
947 0054 D163 str r1, [r2, #60]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
948 .loc 1 488 0
949 0056 0020 movs r0, #0
950 .LVL97:
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_E:
951 .loc 1 506 0
952 0058 7047 bx lr
953 .LVL98:
954 .L105:
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
955 .loc 1 508 0
956 005a 094A ldr r2, .L109
957 005c 536C ldr r3, [r2, #68]
958 005e 23EA0101 bic r1, r3, r1
959 .LVL99:
960 0062 5164 str r1, [r2, #68]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
961 .loc 1 488 0
962 0064 0020 movs r0, #0
963 .LVL100:
509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_F:
964 .loc 1 509 0
965 0066 7047 bx lr
966 .LVL101:
967 .L106:
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
968 .loc 1 511 0
969 0068 054A ldr r2, .L109
970 006a 40F20760 movw r0, #1543
971 .LVL102:
972 006e D36C ldr r3, [r2, #76]
973 0070 0140 ands r1, r1, r0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
974 .LVL103:
975 0072 23EA0101 bic r1, r3, r1
976 0076 D164 str r1, [r2, #76]
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
977 .loc 1 488 0
978 0078 0020 movs r0, #0
512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_GPIO_G:
979 .loc 1 512 0
980 007a 7047 bx lr
981 .LVL104:
982 .L108:
516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default:
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR;
983 .loc 1 517 0
984 007c 0120 movs r0, #1
985 .LVL105:
518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status;
522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
986 .loc 1 522 0
987 007e 7047 bx lr
988 .L110:
989 .align 2
990 .L109:
991 0080 00700040 .word 1073770496
992 .cfi_endproc
993 .LFE338:
995 .section .text.HAL_PWREx_EnablePullUpPullDownConfig,"ax",%progbits
996 .align 1
997 .p2align 2,,3
998 .global HAL_PWREx_EnablePullUpPullDownConfig
999 .syntax unified
1000 .thumb
1001 .thumb_func
1002 .fpu fpv4-sp-d16
1004 HAL_PWREx_EnablePullUpPullDownConfig:
1005 .LFB339:
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable pull-up and pull-down configuration.
528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When APC bit is set, the I/O pull-up and pull-down configurations defined in
529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_PUCRx and PWR_PDCRx registers are applied in Standby and Shutdown modes.
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Pull-up set by PUy bit of PWR_PUCRx register is not activated if the corresponding
531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PDy bit of PWR_PDCRx register is also set (pull-down configuration priority is higher).
532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() API's ensure there
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is no conflict when setting PUy or PDy bit.
534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePullUpPullDownConfig(void)
537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1006 .loc 1 537 0
1007 .cfi_startproc
1008 @ args = 0, pretend = 0, frame = 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1009 @ frame_needed = 0, uses_anonymous_args = 0
1010 @ link register save eliminated.
538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_APC);
1011 .loc 1 538 0
1012 0000 024A ldr r2, .L112
1013 0002 9368 ldr r3, [r2, #8]
1014 0004 43F48063 orr r3, r3, #1024
1015 0008 9360 str r3, [r2, #8]
539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1016 .loc 1 539 0
1017 000a 7047 bx lr
1018 .L113:
1019 .align 2
1020 .L112:
1021 000c 00700040 .word 1073770496
1022 .cfi_endproc
1023 .LFE339:
1025 .section .text.HAL_PWREx_DisablePullUpPullDownConfig,"ax",%progbits
1026 .align 1
1027 .p2align 2,,3
1028 .global HAL_PWREx_DisablePullUpPullDownConfig
1029 .syntax unified
1030 .thumb
1031 .thumb_func
1032 .fpu fpv4-sp-d16
1034 HAL_PWREx_DisablePullUpPullDownConfig:
1035 .LFB340:
540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable pull-up and pull-down configuration.
544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When APC bit is cleared, the I/O pull-up and pull-down configurations defined in
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PWR_PUCRx and PWR_PDCRx registers are not applied in Standby and Shutdown modes.
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePullUpPullDownConfig(void)
549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1036 .loc 1 549 0
1037 .cfi_startproc
1038 @ args = 0, pretend = 0, frame = 0
1039 @ frame_needed = 0, uses_anonymous_args = 0
1040 @ link register save eliminated.
550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_APC);
1041 .loc 1 550 0
1042 0000 024A ldr r2, .L115
1043 0002 9368 ldr r3, [r2, #8]
1044 0004 23F48063 bic r3, r3, #1024
1045 0008 9360 str r3, [r2, #8]
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1046 .loc 1 551 0
1047 000a 7047 bx lr
1048 .L116:
1049 .align 2
1050 .L115:
1051 000c 00700040 .word 1073770496
1052 .cfi_endproc
1053 .LFE340:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1055 .section .text.HAL_PWREx_EnableSRAM2ContentRetention,"ax",%progbits
1056 .align 1
1057 .p2align 2,,3
1058 .global HAL_PWREx_EnableSRAM2ContentRetention
1059 .syntax unified
1060 .thumb
1061 .thumb_func
1062 .fpu fpv4-sp-d16
1064 HAL_PWREx_EnableSRAM2ContentRetention:
1065 .LFB341:
552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable SRAM2 content retention in Standby mode.
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When RRS bit is set, SRAM2 is powered by the low-power regulator in
558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Standby mode and its content is kept.
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableSRAM2ContentRetention(void)
562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1066 .loc 1 562 0
1067 .cfi_startproc
1068 @ args = 0, pretend = 0, frame = 0
1069 @ frame_needed = 0, uses_anonymous_args = 0
1070 @ link register save eliminated.
563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_RRS);
1071 .loc 1 563 0
1072 0000 024A ldr r2, .L118
1073 0002 9368 ldr r3, [r2, #8]
1074 0004 43F48073 orr r3, r3, #256
1075 0008 9360 str r3, [r2, #8]
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1076 .loc 1 564 0
1077 000a 7047 bx lr
1078 .L119:
1079 .align 2
1080 .L118:
1081 000c 00700040 .word 1073770496
1082 .cfi_endproc
1083 .LFE341:
1085 .section .text.HAL_PWREx_DisableSRAM2ContentRetention,"ax",%progbits
1086 .align 1
1087 .p2align 2,,3
1088 .global HAL_PWREx_DisableSRAM2ContentRetention
1089 .syntax unified
1090 .thumb
1091 .thumb_func
1092 .fpu fpv4-sp-d16
1094 HAL_PWREx_DisableSRAM2ContentRetention:
1095 .LFB342:
565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable SRAM2 content retention in Standby mode.
569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When RRS bit is reset, SRAM2 is powered off in Standby mode
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * and its content is lost.
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableSRAM2ContentRetention(void)
574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1096 .loc 1 574 0
1097 .cfi_startproc
1098 @ args = 0, pretend = 0, frame = 0
1099 @ frame_needed = 0, uses_anonymous_args = 0
1100 @ link register save eliminated.
575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_RRS);
1101 .loc 1 575 0
1102 0000 024A ldr r2, .L121
1103 0002 9368 ldr r3, [r2, #8]
1104 0004 23F48073 bic r3, r3, #256
1105 0008 9360 str r3, [r2, #8]
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1106 .loc 1 576 0
1107 000a 7047 bx lr
1108 .L122:
1109 .align 2
1110 .L121:
1111 000c 00700040 .word 1073770496
1112 .cfi_endproc
1113 .LFE342:
1115 .section .text.HAL_PWREx_EnablePVM1,"ax",%progbits
1116 .align 1
1117 .p2align 2,,3
1118 .global HAL_PWREx_EnablePVM1
1119 .syntax unified
1120 .thumb
1121 .thumb_func
1122 .fpu fpv4-sp-d16
1124 HAL_PWREx_EnablePVM1:
1125 .LFB343:
577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1)
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 1: VDDA versus FASTCOMP minimum voltage.
584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM1(void)
587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1126 .loc 1 587 0
1127 .cfi_startproc
1128 @ args = 0, pretend = 0, frame = 0
1129 @ frame_needed = 0, uses_anonymous_args = 0
1130 @ link register save eliminated.
588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_1);
1131 .loc 1 588 0
1132 0000 024A ldr r2, .L124
1133 0002 5368 ldr r3, [r2, #4]
1134 0004 43F01003 orr r3, r3, #16
1135 0008 5360 str r3, [r2, #4]
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1136 .loc 1 589 0
1137 000a 7047 bx lr
1138 .L125:
1139 .align 2
1140 .L124:
1141 000c 00700040 .word 1073770496
1142 .cfi_endproc
1143 .LFE343:
1145 .section .text.HAL_PWREx_DisablePVM1,"ax",%progbits
1146 .align 1
1147 .p2align 2,,3
1148 .global HAL_PWREx_DisablePVM1
1149 .syntax unified
1150 .thumb
1151 .thumb_func
1152 .fpu fpv4-sp-d16
1154 HAL_PWREx_DisablePVM1:
1155 .LFB344:
590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 1: VDDA versus FASTCOMP minimum voltage.
593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM1(void)
596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1156 .loc 1 596 0
1157 .cfi_startproc
1158 @ args = 0, pretend = 0, frame = 0
1159 @ frame_needed = 0, uses_anonymous_args = 0
1160 @ link register save eliminated.
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_1);
1161 .loc 1 597 0
1162 0000 024A ldr r2, .L127
1163 0002 5368 ldr r3, [r2, #4]
1164 0004 23F01003 bic r3, r3, #16
1165 0008 5360 str r3, [r2, #4]
598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1166 .loc 1 598 0
1167 000a 7047 bx lr
1168 .L128:
1169 .align 2
1170 .L127:
1171 000c 00700040 .word 1073770496
1172 .cfi_endproc
1173 .LFE344:
1175 .section .text.HAL_PWREx_EnablePVM2,"ax",%progbits
1176 .align 1
1177 .p2align 2,,3
1178 .global HAL_PWREx_EnablePVM2
1179 .syntax unified
1180 .thumb
1181 .thumb_func
1182 .fpu fpv4-sp-d16
1184 HAL_PWREx_EnablePVM2:
1185 .LFB345:
599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */
600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2)
603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 2: VDDA versus FASTDAC minimum voltage.
605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM2(void)
608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1186 .loc 1 608 0
1187 .cfi_startproc
1188 @ args = 0, pretend = 0, frame = 0
1189 @ frame_needed = 0, uses_anonymous_args = 0
1190 @ link register save eliminated.
609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_2);
1191 .loc 1 609 0
1192 0000 024A ldr r2, .L130
1193 0002 5368 ldr r3, [r2, #4]
1194 0004 43F02003 orr r3, r3, #32
1195 0008 5360 str r3, [r2, #4]
610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1196 .loc 1 610 0
1197 000a 7047 bx lr
1198 .L131:
1199 .align 2
1200 .L130:
1201 000c 00700040 .word 1073770496
1202 .cfi_endproc
1203 .LFE345:
1205 .section .text.HAL_PWREx_DisablePVM2,"ax",%progbits
1206 .align 1
1207 .p2align 2,,3
1208 .global HAL_PWREx_DisablePVM2
1209 .syntax unified
1210 .thumb
1211 .thumb_func
1212 .fpu fpv4-sp-d16
1214 HAL_PWREx_DisablePVM2:
1215 .LFB346:
611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 2: VDDA versus FASTDAC minimum voltage.
614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM2(void)
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1216 .loc 1 617 0
1217 .cfi_startproc
1218 @ args = 0, pretend = 0, frame = 0
1219 @ frame_needed = 0, uses_anonymous_args = 0
1220 @ link register save eliminated.
618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_2);
1221 .loc 1 618 0
1222 0000 024A ldr r2, .L133
1223 0002 5368 ldr r3, [r2, #4]
1224 0004 23F02003 bic r3, r3, #32
1225 0008 5360 str r3, [r2, #4]
619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1226 .loc 1 619 0
1227 000a 7047 bx lr
1228 .L134:
1229 .align 2
1230 .L133:
1231 000c 00700040 .word 1073770496
1232 .cfi_endproc
1233 .LFE346:
1235 .section .text.HAL_PWREx_EnablePVM3,"ax",%progbits
1236 .align 1
1237 .p2align 2,,3
1238 .global HAL_PWREx_EnablePVM3
1239 .syntax unified
1240 .thumb
1241 .thumb_func
1242 .fpu fpv4-sp-d16
1244 HAL_PWREx_EnablePVM3:
1245 .LFB347:
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 3: VDDA versus ADC minimum voltage 1.62V.
625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM3(void)
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1246 .loc 1 628 0
1247 .cfi_startproc
1248 @ args = 0, pretend = 0, frame = 0
1249 @ frame_needed = 0, uses_anonymous_args = 0
1250 @ link register save eliminated.
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_3);
1251 .loc 1 629 0
1252 0000 024A ldr r2, .L136
1253 0002 5368 ldr r3, [r2, #4]
1254 0004 43F04003 orr r3, r3, #64
1255 0008 5360 str r3, [r2, #4]
630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1256 .loc 1 630 0
1257 000a 7047 bx lr
1258 .L137:
1259 .align 2
1260 .L136:
1261 000c 00700040 .word 1073770496
1262 .cfi_endproc
1263 .LFE347:
1265 .section .text.HAL_PWREx_DisablePVM3,"ax",%progbits
1266 .align 1
1267 .p2align 2,,3
1268 .global HAL_PWREx_DisablePVM3
1269 .syntax unified
1270 .thumb
1271 .thumb_func
1272 .fpu fpv4-sp-d16
1274 HAL_PWREx_DisablePVM3:
1275 .LFB348:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 3: VDDA versus ADC minimum voltage 1.62V.
634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM3(void)
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1276 .loc 1 637 0
1277 .cfi_startproc
1278 @ args = 0, pretend = 0, frame = 0
1279 @ frame_needed = 0, uses_anonymous_args = 0
1280 @ link register save eliminated.
638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_3);
1281 .loc 1 638 0
1282 0000 024A ldr r2, .L139
1283 0002 5368 ldr r3, [r2, #4]
1284 0004 23F04003 bic r3, r3, #64
1285 0008 5360 str r3, [r2, #4]
639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1286 .loc 1 639 0
1287 000a 7047 bx lr
1288 .L140:
1289 .align 2
1290 .L139:
1291 000c 00700040 .word 1073770496
1292 .cfi_endproc
1293 .LFE348:
1295 .section .text.HAL_PWREx_EnablePVM4,"ax",%progbits
1296 .align 1
1297 .p2align 2,,3
1298 .global HAL_PWREx_EnablePVM4
1299 .syntax unified
1300 .thumb
1301 .thumb_func
1302 .fpu fpv4-sp-d16
1304 HAL_PWREx_EnablePVM4:
1305 .LFB349:
640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the Power Voltage Monitoring 4: VDDA versus OPAMP/DAC minimum voltage 1.8V.
644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnablePVM4(void)
647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1306 .loc 1 647 0
1307 .cfi_startproc
1308 @ args = 0, pretend = 0, frame = 0
1309 @ frame_needed = 0, uses_anonymous_args = 0
1310 @ link register save eliminated.
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR2, PWR_PVM_4);
1311 .loc 1 648 0
1312 0000 024A ldr r2, .L142
1313 0002 5368 ldr r3, [r2, #4]
1314 0004 43F08003 orr r3, r3, #128
1315 0008 5360 str r3, [r2, #4]
649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
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2021-07-02 22:19:04 +02:00
1316 .loc 1 649 0
1317 000a 7047 bx lr
1318 .L143:
1319 .align 2
1320 .L142:
1321 000c 00700040 .word 1073770496
1322 .cfi_endproc
1323 .LFE349:
1325 .section .text.HAL_PWREx_DisablePVM4,"ax",%progbits
1326 .align 1
1327 .p2align 2,,3
1328 .global HAL_PWREx_DisablePVM4
1329 .syntax unified
1330 .thumb
1331 .thumb_func
1332 .fpu fpv4-sp-d16
1334 HAL_PWREx_DisablePVM4:
1335 .LFB350:
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the Power Voltage Monitoring 4: VDDA versus OPAMP/DAC minimum voltage 1.8V.
653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisablePVM4(void)
656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1336 .loc 1 656 0
1337 .cfi_startproc
1338 @ args = 0, pretend = 0, frame = 0
1339 @ frame_needed = 0, uses_anonymous_args = 0
1340 @ link register save eliminated.
657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR2, PWR_PVM_4);
1341 .loc 1 657 0
1342 0000 024A ldr r2, .L145
1343 0002 5368 ldr r3, [r2, #4]
1344 0004 23F08003 bic r3, r3, #128
1345 0008 5360 str r3, [r2, #4]
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1346 .loc 1 658 0
1347 000a 7047 bx lr
1348 .L146:
1349 .align 2
1350 .L145:
1351 000c 00700040 .word 1073770496
1352 .cfi_endproc
1353 .LFE350:
1355 .section .text.HAL_PWREx_ConfigPVM,"ax",%progbits
1356 .align 1
1357 .p2align 2,,3
1358 .global HAL_PWREx_ConfigPVM
1359 .syntax unified
1360 .thumb
1361 .thumb_func
1362 .fpu fpv4-sp-d16
1364 HAL_PWREx_ConfigPVM:
1365 .LFB351:
659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Configure the Peripheral Voltage Monitoring (PVM).
665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param sConfigPVM: pointer to a PWR_PVMTypeDef structure that contains the
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * PVM configuration information.
667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The API configures a single PVM according to the information contained
668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * in the input structure. To configure several PVMs, the API must be singly
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * called for each PVM used.
670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * more details about the voltage thresholds corresponding to each
672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * detection level and to each monitored supply.
673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL status
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM)
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1366 .loc 1 676 0
1367 .cfi_startproc
1368 @ args = 0, pretend = 0, frame = 0
1369 @ frame_needed = 0, uses_anonymous_args = 0
1370 @ link register save eliminated.
1371 .LVL106:
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef status = HAL_OK;
678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check the parameters */
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVM_TYPE(sConfigPVM->PVMType));
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVM_MODE(sConfigPVM->Mode));
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure EXTI 35 to 38 interrupts if so required:
685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** scan through PVMType to detect which PVMx is set and
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** configure the corresponding EXTI line accordingly. */
687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** switch (sConfigPVM->PVMType)
1372 .loc 1 687 0
1373 0000 0368 ldr r3, [r0]
1374 0002 202B cmp r3, #32
1375 0004 00F09780 beq .L149
1376 0008 62D9 bls .L215
1377 000a 402B cmp r3, #64
1378 000c 31D0 beq .L152
1379 000e 802B cmp r3, #128
1380 0010 40F08F80 bne .L168
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1)
690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_1:
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */
692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_EVENT();
693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_IT();
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE();
695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE();
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */
698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_IT();
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_EVENT();
707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */
710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE();
713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE();
718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2)
723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_2:
724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */
725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_EVENT();
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_IT();
727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE();
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE();
729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */
731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_IT();
734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_EVENT();
740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE();
746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE();
751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_3:
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */
757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_EVENT();
758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_IT();
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE();
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE();
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_IT();
766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_EVENT();
772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */
775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE();
778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE();
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** case PWR_PVM_4:
787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_EVENT();
1381 .loc 1 788 0
1382 0014 5F4B ldr r3, .L216
1383 0016 5A6A ldr r2, [r3, #36]
1384 0018 22F04002 bic r2, r2, #64
1385 001c 5A62 str r2, [r3, #36]
789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_IT();
1386 .loc 1 789 0
1387 001e 1A6A ldr r2, [r3, #32]
1388 0020 22F04002 bic r2, r2, #64
1389 0024 1A62 str r2, [r3, #32]
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE();
1390 .loc 1 790 0
1391 0026 DA6A ldr r2, [r3, #44]
1392 0028 22F04002 bic r2, r2, #64
1393 002c DA62 str r2, [r3, #44]
791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE();
1394 .loc 1 791 0
1395 002e 9A6A ldr r2, [r3, #40]
1396 0030 22F04002 bic r2, r2, #64
1397 0034 9A62 str r2, [r3, #40]
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure interrupt mode */
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_IT) == PVM_MODE_IT)
1398 .loc 1 794 0
1399 0036 4268 ldr r2, [r0, #4]
1400 0038 D103 lsls r1, r2, #15
1401 003a 03D5 bpl .L165
795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_IT();
1402 .loc 1 796 0
1403 003c 196A ldr r1, [r3, #32]
1404 003e 41F04001 orr r1, r1, #64
1405 0042 1962 str r1, [r3, #32]
1406 .L165:
797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure event mode */
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_MODE_EVT) == PVM_MODE_EVT)
1407 .loc 1 800 0
1408 0044 9003 lsls r0, r2, #14
1409 .LVL107:
1410 0046 04D5 bpl .L166
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_EVENT();
1411 .loc 1 802 0
1412 0048 5249 ldr r1, .L216
1413 004a 4B6A ldr r3, [r1, #36]
1414 004c 43F04003 orr r3, r3, #64
1415 0050 4B62 str r3, [r1, #36]
1416 .L166:
803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Configure the edge */
806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_RISING_EDGE) == PVM_RISING_EDGE)
1417 .loc 1 806 0
1418 0052 D107 lsls r1, r2, #31
1419 0054 04D5 bpl .L167
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE();
1420 .loc 1 808 0
1421 0056 4F49 ldr r1, .L216
1422 0058 8B6A ldr r3, [r1, #40]
1423 005a 43F04003 orr r3, r3, #64
1424 005e 8B62 str r3, [r1, #40]
1425 .L167:
809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if((sConfigPVM->Mode & PVM_FALLING_EDGE) == PVM_FALLING_EDGE)
1426 .loc 1 811 0
1427 0060 9307 lsls r3, r2, #30
1428 0062 64D5 bpl .L214
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE();
1429 .loc 1 813 0
1430 0064 4B4A ldr r2, .L216
1431 0066 D36A ldr r3, [r2, #44]
1432 0068 43F04003 orr r3, r3, #64
1433 006c D362 str r3, [r2, #44]
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1434 .loc 1 677 0
1435 006e 0020 movs r0, #0
1436 0070 7047 bx lr
1437 .LVL108:
1438 .L152:
757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_IT();
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1439 .loc 1 757 0
1440 0072 484B ldr r3, .L216
1441 0074 5A6A ldr r2, [r3, #36]
1442 0076 22F02002 bic r2, r2, #32
1443 007a 5A62 str r2, [r3, #36]
758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE();
1444 .loc 1 758 0
1445 007c 1A6A ldr r2, [r3, #32]
1446 007e 22F02002 bic r2, r2, #32
1447 0082 1A62 str r2, [r3, #32]
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE();
1448 .loc 1 759 0
1449 0084 DA6A ldr r2, [r3, #44]
1450 0086 22F02002 bic r2, r2, #32
1451 008a DA62 str r2, [r3, #44]
760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1452 .loc 1 760 0
1453 008c 9A6A ldr r2, [r3, #40]
1454 008e 22F02002 bic r2, r2, #32
1455 0092 9A62 str r2, [r3, #40]
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1456 .loc 1 763 0
1457 0094 4268 ldr r2, [r0, #4]
1458 0096 D003 lsls r0, r2, #15
1459 .LVL109:
1460 0098 03D5 bpl .L162
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1461 .loc 1 765 0
1462 009a 196A ldr r1, [r3, #32]
1463 009c 41F02001 orr r1, r1, #32
1464 00a0 1962 str r1, [r3, #32]
1465 .L162:
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1466 .loc 1 769 0
1467 00a2 9103 lsls r1, r2, #14
1468 00a4 04D5 bpl .L163
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1469 .loc 1 771 0
1470 00a6 3B49 ldr r1, .L216
1471 00a8 4B6A ldr r3, [r1, #36]
1472 00aa 43F02003 orr r3, r3, #32
1473 00ae 4B62 str r3, [r1, #36]
1474 .L163:
775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1475 .loc 1 775 0
1476 00b0 D307 lsls r3, r2, #31
1477 00b2 04D5 bpl .L164
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1478 .loc 1 777 0
1479 00b4 3749 ldr r1, .L216
1480 00b6 8B6A ldr r3, [r1, #40]
1481 00b8 43F02003 orr r3, r3, #32
1482 00bc 8B62 str r3, [r1, #40]
1483 .L164:
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1484 .loc 1 780 0
1485 00be 9007 lsls r0, r2, #30
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1486 00c0 35D5 bpl .L214
782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1487 .loc 1 782 0
1488 00c2 344A ldr r2, .L216
1489 00c4 D36A ldr r3, [r2, #44]
1490 00c6 43F02003 orr r3, r3, #32
1491 00ca D362 str r3, [r2, #44]
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1492 .loc 1 677 0
1493 00cc 0020 movs r0, #0
1494 00ce 7047 bx lr
1495 .LVL110:
1496 .L215:
687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1497 .loc 1 687 0
1498 00d0 102B cmp r3, #16
1499 00d2 2ED1 bne .L168
692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_IT();
1500 .loc 1 692 0
1501 00d4 2F4B ldr r3, .L216
1502 00d6 5A6A ldr r2, [r3, #36]
1503 00d8 22F00802 bic r2, r2, #8
1504 00dc 5A62 str r2, [r3, #36]
693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE();
1505 .loc 1 693 0
1506 00de 1A6A ldr r2, [r3, #32]
1507 00e0 22F00802 bic r2, r2, #8
1508 00e4 1A62 str r2, [r3, #32]
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE();
1509 .loc 1 694 0
1510 00e6 DA6A ldr r2, [r3, #44]
1511 00e8 22F00802 bic r2, r2, #8
1512 00ec DA62 str r2, [r3, #44]
695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1513 .loc 1 695 0
1514 00ee 9A6A ldr r2, [r3, #40]
1515 00f0 22F00802 bic r2, r2, #8
1516 00f4 9A62 str r2, [r3, #40]
698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1517 .loc 1 698 0
1518 00f6 4268 ldr r2, [r0, #4]
1519 00f8 D003 lsls r0, r2, #15
1520 .LVL111:
1521 00fa 03D5 bpl .L154
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1522 .loc 1 700 0
1523 00fc 196A ldr r1, [r3, #32]
1524 00fe 41F00801 orr r1, r1, #8
1525 0102 1962 str r1, [r3, #32]
1526 .L154:
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1527 .loc 1 704 0
1528 0104 9103 lsls r1, r2, #14
1529 0106 04D5 bpl .L155
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1530 .loc 1 706 0
1531 0108 2249 ldr r1, .L216
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1532 010a 4B6A ldr r3, [r1, #36]
1533 010c 43F00803 orr r3, r3, #8
1534 0110 4B62 str r3, [r1, #36]
1535 .L155:
710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1536 .loc 1 710 0
1537 0112 D307 lsls r3, r2, #31
1538 0114 04D5 bpl .L156
712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1539 .loc 1 712 0
1540 0116 1F49 ldr r1, .L216
1541 0118 8B6A ldr r3, [r1, #40]
1542 011a 43F00803 orr r3, r3, #8
1543 011e 8B62 str r3, [r1, #40]
1544 .L156:
715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1545 .loc 1 715 0
1546 0120 9007 lsls r0, r2, #30
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1547 .loc 1 717 0
1548 0122 41BF itttt mi
1549 0124 1B4A ldrmi r2, .L216
1550 0126 D36A ldrmi r3, [r2, #44]
1551 0128 43F00803 orrmi r3, r3, #8
1552 012c D362 strmi r3, [r2, #44]
1553 .L214:
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1554 .loc 1 677 0
1555 012e 0020 movs r0, #0
1556 0130 7047 bx lr
1557 .LVL112:
1558 .L168:
814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** default:
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** status = HAL_ERROR;
1559 .loc 1 818 0
1560 0132 0120 movs r0, #1
1561 .LVL113:
819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** break;
820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return status;
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1562 .loc 1 823 0
1563 0134 7047 bx lr
1564 .LVL114:
1565 .L149:
725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_IT();
1566 .loc 1 725 0
1567 0136 174B ldr r3, .L216
1568 0138 5A6A ldr r2, [r3, #36]
1569 013a 22F01002 bic r2, r2, #16
1570 013e 5A62 str r2, [r3, #36]
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE();
1571 .loc 1 726 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1572 0140 1A6A ldr r2, [r3, #32]
1573 0142 22F01002 bic r2, r2, #16
1574 0146 1A62 str r2, [r3, #32]
727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE();
1575 .loc 1 727 0
1576 0148 DA6A ldr r2, [r3, #44]
1577 014a 22F01002 bic r2, r2, #16
1578 014e DA62 str r2, [r3, #44]
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1579 .loc 1 728 0
1580 0150 9A6A ldr r2, [r3, #40]
1581 0152 22F01002 bic r2, r2, #16
1582 0156 9A62 str r2, [r3, #40]
731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1583 .loc 1 731 0
1584 0158 4268 ldr r2, [r0, #4]
1585 015a D103 lsls r1, r2, #15
1586 015c 03D5 bpl .L158
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1587 .loc 1 733 0
1588 015e 196A ldr r1, [r3, #32]
1589 0160 41F01001 orr r1, r1, #16
1590 0164 1962 str r1, [r3, #32]
1591 .L158:
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1592 .loc 1 737 0
1593 0166 9003 lsls r0, r2, #14
1594 .LVL115:
1595 0168 04D5 bpl .L159
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1596 .loc 1 739 0
1597 016a 0A49 ldr r1, .L216
1598 016c 4B6A ldr r3, [r1, #36]
1599 016e 43F01003 orr r3, r3, #16
1600 0172 4B62 str r3, [r1, #36]
1601 .L159:
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1602 .loc 1 743 0
1603 0174 D107 lsls r1, r2, #31
1604 0176 04D5 bpl .L160
745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1605 .loc 1 745 0
1606 0178 0649 ldr r1, .L216
1607 017a 8B6A ldr r3, [r1, #40]
1608 017c 43F01003 orr r3, r3, #16
1609 0180 8B62 str r3, [r1, #40]
1610 .L160:
748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1611 .loc 1 748 0
1612 0182 9307 lsls r3, r2, #30
1613 0184 D3D5 bpl .L214
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1614 .loc 1 750 0
1615 0186 034A ldr r2, .L216
1616 0188 D36A ldr r3, [r2, #44]
1617 018a 43F01003 orr r3, r3, #16
1618 018e D362 str r3, [r2, #44]
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1619 .loc 1 677 0
1620 0190 0020 movs r0, #0
1621 0192 7047 bx lr
1622 .L217:
1623 .align 2
1624 .L216:
1625 0194 00040140 .word 1073808384
1626 .cfi_endproc
1627 .LFE351:
1629 .section .text.HAL_PWREx_EnableLowPowerRunMode,"ax",%progbits
1630 .align 1
1631 .p2align 2,,3
1632 .global HAL_PWREx_EnableLowPowerRunMode
1633 .syntax unified
1634 .thumb
1635 .thumb_func
1636 .fpu fpv4-sp-d16
1638 HAL_PWREx_EnableLowPowerRunMode:
1639 .LFB352:
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Low-power Run mode
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Low-power Run mode, all I/O pins keep the same state as in Run mode.
829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When Regulator is set to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the
830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Flash in power-down monde in setting the RUN_PD bit in FLASH_ACR register.
831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Additionally, the clock frequency must be reduced below 2 MHz.
832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * Setting RUN_PD in FLASH_ACR then appropriately reducing the clock frequency must
833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * be done before calling HAL_PWREx_EnableLowPowerRunMode() API.
834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableLowPowerRunMode(void)
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1640 .loc 1 837 0
1641 .cfi_startproc
1642 @ args = 0, pretend = 0, frame = 0
1643 @ frame_needed = 0, uses_anonymous_args = 0
1644 @ link register save eliminated.
838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Regulator parameter */
839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR1, PWR_CR1_LPR);
1645 .loc 1 839 0
1646 0000 024A ldr r2, .L219
1647 0002 1368 ldr r3, [r2]
1648 0004 43F48043 orr r3, r3, #16384
1649 0008 1360 str r3, [r2]
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1650 .loc 1 840 0
1651 000a 7047 bx lr
1652 .L220:
1653 .align 2
1654 .L219:
1655 000c 00700040 .word 1073770496
1656 .cfi_endproc
1657 .LFE352:
1659 .section .text.HAL_PWREx_DisableLowPowerRunMode,"ax",%progbits
1660 .align 1
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1661 .p2align 2,,3
1662 .global HAL_PWREx_DisableLowPowerRunMode
1663 .syntax unified
1664 .thumb
1665 .thumb_func
1666 .fpu fpv4-sp-d16
1668 HAL_PWREx_DisableLowPowerRunMode:
1669 .LFB353:
841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Exit Low-power Run mode.
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Before HAL_PWREx_DisableLowPowerRunMode() completion, the function checks that
846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * REGLPF has been properly reset (otherwise, HAL_PWREx_DisableLowPowerRunMode
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * returns HAL_TIMEOUT status). The system clock frequency can then be
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * increased above 2 MHz.
849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval HAL Status
850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void)
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1670 .loc 1 852 0
1671 .cfi_startproc
1672 @ args = 0, pretend = 0, frame = 0
1673 @ frame_needed = 0, uses_anonymous_args = 0
1674 @ link register save eliminated.
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** uint32_t wait_loop_index;
854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear LPR bit */
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR1, PWR_CR1_LPR);
1675 .loc 1 856 0
1676 0000 0F49 ldr r1, .L237
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Wait until REGLPF is reset */
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index = (PWR_FLAG_SETTING_DELAY_US * (SystemCoreClock / 1000000U));
1677 .loc 1 859 0
1678 0002 104B ldr r3, .L237+4
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1679 .loc 1 856 0
1680 0004 0868 ldr r0, [r1]
1681 .loc 1 859 0
1682 0006 104A ldr r2, .L237+8
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1683 .loc 1 856 0
1684 0008 20F48040 bic r0, r0, #16384
1685 000c 0860 str r0, [r1]
1686 .loc 1 859 0
1687 000e 1B68 ldr r3, [r3]
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U))
1688 .loc 1 860 0
1689 0010 4869 ldr r0, [r1, #20]
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** while ((HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF)) && (wait_loop_index != 0U))
1690 .loc 1 859 0
1691 0012 A2FB0323 umull r2, r3, r2, r3
1692 0016 9A0C lsrs r2, r3, #18
1693 0018 3223 movs r3, #50
1694 001a 03FB02F3 mul r3, r3, r2
1695 .LVL116:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1696 .loc 1 860 0
1697 001e 8205 lsls r2, r0, #22
1698 0020 05D5 bpl .L222
1699 .L236:
1700 0022 23B1 cbz r3, .L222
1701 0024 4A69 ldr r2, [r1, #20]
1702 0026 9205 lsls r2, r2, #22
861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** wait_loop_index--;
1703 .loc 1 862 0
1704 0028 03F1FF33 add r3, r3, #-1
1705 .LVL117:
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1706 .loc 1 860 0
1707 002c F9D4 bmi .L236
1708 .L222:
863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
1709 .loc 1 864 0
1710 002e 044B ldr r3, .L237
1711 .LVL118:
1712 0030 5B69 ldr r3, [r3, #20]
865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** return HAL_OK;
1713 .loc 1 869 0
1714 0032 13F4007F tst r3, #512
870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1715 .loc 1 870 0
1716 0036 14BF ite ne
1717 0038 0320 movne r0, #3
1718 003a 0020 moveq r0, #0
1719 003c 7047 bx lr
1720 .L238:
1721 003e 00BF .align 2
1722 .L237:
1723 0040 00700040 .word 1073770496
1724 0044 00000000 .word SystemCoreClock
1725 0048 83DE1B43 .word 1125899907
1726 .cfi_endproc
1727 .LFE353:
1729 .section .text.HAL_PWREx_EnterSTOP0Mode,"ax",%progbits
1730 .align 1
1731 .p2align 2,,3
1732 .global HAL_PWREx_EnterSTOP0Mode
1733 .syntax unified
1734 .thumb
1735 .thumb_func
1736 .fpu fpv4-sp-d16
1738 HAL_PWREx_EnterSTOP0Mode:
1739 .LFB354:
871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Stop 0 mode.
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 0 mode, main and low voltage regulators are ON.
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 0 mode, all I/O pins keep the same state as in Run mode.
877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note All clocks in the VCORE domain are stopped; the PLL, the HSI
878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * and the HSE oscillators are disabled. Some peripherals with the wakeup capability
879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the H
880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is pr
881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * only to the peripheral requesting it.
882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * SRAM1, SRAM2 and register contents are preserved.
883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is available.
884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When exiting Stop 0 mode by issuing an interrupt or a wakeup event,
885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set; the HSI oscillator is selected if STOPWUCK is cleared.
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note By keeping the internal regulator ON during Stop 0 mode, the consumption
888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is higher although the startup time is reduced.
889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction.
890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction
892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSTOP0Mode(uint8_t STOPEntry)
896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1740 .loc 1 896 0
1741 .cfi_startproc
1742 @ args = 0, pretend = 0, frame = 0
1743 @ frame_needed = 0, uses_anonymous_args = 0
1744 @ link register save eliminated.
1745 .LVL119:
897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check the parameters */
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Stop 0 mode with Main Regulator */
901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP0);
1746 .loc 1 901 0
1747 0000 0B49 ldr r1, .L243
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
1748 .loc 1 904 0
1749 0002 0C4A ldr r2, .L243+4
901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1750 .loc 1 901 0
1751 0004 0B68 ldr r3, [r1]
1752 0006 23F00703 bic r3, r3, #7
1753 000a 0B60 str r3, [r1]
1754 .loc 1 904 0
1755 000c 1369 ldr r3, [r2, #16]
905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Select Stop mode entry --------------------------------------------------*/
907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(STOPEntry == PWR_STOPENTRY_WFI)
1756 .loc 1 907 0
1757 000e 0128 cmp r0, #1
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1758 .loc 1 904 0
1759 0010 43F00403 orr r3, r3, #4
1760 0014 1361 str r3, [r2, #16]
1761 .loc 1 907 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1762 0016 08D0 beq .L242
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFI();
911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else
913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Event */
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __SEV();
1763 .loc 1 915 0
1764 .syntax unified
1765 @ 915 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1766 0018 40BF sev
1767 @ 0 "" 2
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE();
1768 .loc 1 916 0
1769 @ 916 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1770 001a 20BF wfe
1771 @ 0 "" 2
917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE();
1772 .loc 1 917 0
1773 @ 917 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1774 001c 20BF wfe
1775 @ 0 "" 2
1776 .thumb
1777 .syntax unified
1778 .L241:
918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */
921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
1779 .loc 1 921 0
1780 001e 054A ldr r2, .L243+4
1781 0020 1369 ldr r3, [r2, #16]
1782 0022 23F00403 bic r3, r3, #4
1783 0026 1361 str r3, [r2, #16]
922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1784 .loc 1 922 0
1785 0028 7047 bx lr
1786 .L242:
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1787 .loc 1 910 0
1788 .syntax unified
1789 @ 910 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1790 002a 30BF wfi
1791 @ 0 "" 2
1792 .thumb
1793 .syntax unified
1794 002c F7E7 b .L241
1795 .L244:
1796 002e 00BF .align 2
1797 .L243:
1798 0030 00700040 .word 1073770496
1799 0034 00ED00E0 .word -536810240
1800 .cfi_endproc
1801 .LFE354:
1803 .section .text.HAL_PWREx_EnterSTOP1Mode,"ax",%progbits
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1804 .align 1
1805 .p2align 2,,3
1806 .global HAL_PWREx_EnterSTOP1Mode
1807 .syntax unified
1808 .thumb
1809 .thumb_func
1810 .fpu fpv4-sp-d16
1812 HAL_PWREx_EnterSTOP1Mode:
1813 .LFB355:
923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Stop 1 mode.
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 1 mode, only low power voltage regulator is ON.
928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Stop 1 mode, all I/O pins keep the same state as in Run mode.
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note All clocks in the VCORE domain are stopped; the PLL, the HSI
930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * and the HSE oscillators are disabled. Some peripherals with the wakeup capability
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the H
932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is pr
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * only to the peripheral requesting it.
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * SRAM1, SRAM2 and register contents are preserved.
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is available.
936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note When exiting Stop 1 mode by issuing an interrupt or a wakeup event,
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * is set.
939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note Due to low power mode, an additional startup delay is incurred when waking up from Stop
940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @param STOPEntry specifies if Stop mode in entered with WFI or WFE instruction.
941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFI Enter Stop mode with WFI instruction
943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @arg @ref PWR_STOPENTRY_WFE Enter Stop mode with WFE instruction
944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSTOP1Mode(uint8_t STOPEntry)
947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1814 .loc 1 947 0
1815 .cfi_startproc
1816 @ args = 0, pretend = 0, frame = 0
1817 @ frame_needed = 0, uses_anonymous_args = 0
1818 @ link register save eliminated.
1819 .LVL120:
948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check the parameters */
949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Stop 1 mode with Low-Power Regulator */
952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STOP1);
1820 .loc 1 952 0
1821 0000 0C49 ldr r1, .L249
953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */
955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
1822 .loc 1 955 0
1823 0002 0D4A ldr r2, .L249+4
952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1824 .loc 1 952 0
1825 0004 0B68 ldr r3, [r1]
1826 0006 23F00703 bic r3, r3, #7
1827 000a 43F00103 orr r3, r3, #1
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1828 000e 0B60 str r3, [r1]
1829 .loc 1 955 0
1830 0010 1369 ldr r3, [r2, #16]
956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Select Stop mode entry --------------------------------------------------*/
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(STOPEntry == PWR_STOPENTRY_WFI)
1831 .loc 1 958 0
1832 0012 0128 cmp r0, #1
955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1833 .loc 1 955 0
1834 0014 43F00403 orr r3, r3, #4
1835 0018 1361 str r3, [r2, #16]
1836 .loc 1 958 0
1837 001a 08D0 beq .L248
959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */
961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFI();
962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** else
964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Event */
966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __SEV();
1838 .loc 1 966 0
1839 .syntax unified
1840 @ 966 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1841 001c 40BF sev
1842 @ 0 "" 2
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE();
1843 .loc 1 967 0
1844 @ 967 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1845 001e 20BF wfe
1846 @ 0 "" 2
968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFE();
1847 .loc 1 968 0
1848 @ 968 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1849 0020 20BF wfe
1850 @ 0 "" 2
1851 .thumb
1852 .syntax unified
1853 .L247:
969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */
972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
1854 .loc 1 972 0
1855 0022 054A ldr r2, .L249+4
1856 0024 1369 ldr r3, [r2, #16]
1857 0026 23F00403 bic r3, r3, #4
1858 002a 1361 str r3, [r2, #16]
973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1859 .loc 1 973 0
1860 002c 7047 bx lr
1861 .L248:
961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1862 .loc 1 961 0
1863 .syntax unified
1864 @ 961 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1865 002e 30BF wfi
1866 @ 0 "" 2
1867 .thumb
1868 .syntax unified
1869 0030 F7E7 b .L247
1870 .L250:
1871 0032 00BF .align 2
1872 .L249:
1873 0034 00700040 .word 1073770496
1874 0038 00ED00E0 .word -536810240
1875 .cfi_endproc
1876 .LFE355:
1878 .section .text.HAL_PWREx_EnterSHUTDOWNMode,"ax",%progbits
1879 .align 1
1880 .p2align 2,,3
1881 .global HAL_PWREx_EnterSHUTDOWNMode
1882 .syntax unified
1883 .thumb
1884 .thumb_func
1885 .fpu fpv4-sp-d16
1887 HAL_PWREx_EnterSHUTDOWNMode:
1888 .LFB356:
974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enter Shutdown mode.
980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note In Shutdown mode, the PLL, the HSI, the LSI and the HSE oscillators are switched
981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * off. The voltage regulator is disabled and Vcore domain is powered off.
982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * SRAM1, SRAM2 and registers contents are lost except for registers in the Backup domain.
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * The BOR is not available.
984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog s
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnterSHUTDOWNMode(void)
988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1889 .loc 1 988 0
1890 .cfi_startproc
1891 @ args = 0, pretend = 0, frame = 0
1892 @ frame_needed = 0, uses_anonymous_args = 0
1893 @ link register save eliminated.
989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set Shutdown mode */
991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_SHUTDOWN);
1894 .loc 1 991 0
1895 0000 0649 ldr r1, .L252
992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */
994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
1896 .loc 1 994 0
1897 0002 074A ldr r2, .L252+4
991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1898 .loc 1 991 0
1899 0004 0B68 ldr r3, [r1]
1900 0006 23F00703 bic r3, r3, #7
1901 000a 43F00403 orr r3, r3, #4
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1902 000e 0B60 str r3, [r1]
1903 .loc 1 994 0
1904 0010 1369 ldr r3, [r2, #16]
1905 0012 43F00403 orr r3, r3, #4
1906 0016 1361 str r3, [r2, #16]
995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* This option is used to ensure that store operations are completed */
997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined ( __CC_ARM)
998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __force_stores();
999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif
1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Request Wait For Interrupt */
1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __WFI();
1907 .loc 1 1001 0
1908 .syntax unified
1909 @ 1001 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1
1910 0018 30BF wfi
1911 @ 0 "" 2
1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1912 .loc 1 1002 0
1913 .thumb
1914 .syntax unified
1915 001a 7047 bx lr
1916 .L253:
1917 .align 2
1918 .L252:
1919 001c 00700040 .word 1073770496
1920 0020 00ED00E0 .word -536810240
1921 .cfi_endproc
1922 .LFE356:
1924 .section .text.HAL_PWREx_PVM1Callback,"ax",%progbits
1925 .align 1
1926 .p2align 2,,3
1927 .weak HAL_PWREx_PVM1Callback
1928 .syntax unified
1929 .thumb
1930 .thumb_func
1931 .fpu fpv4-sp-d16
1933 HAL_PWREx_PVM1Callback:
1934 .LFB358:
1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD/PVMx interrupt request.
1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_PVM_IRQHandler().
1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_PVD_PVM_IRQHandler(void)
1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check PWR exti flag */
1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != 0U)
1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */
1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback();
1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVD exti pending bit */
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Next, successively check PVMx exti flags */
1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1)
1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM1_EXTI_GET_FLAG() != 0U)
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM1 interrupt user callback */
1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM1Callback();
1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM1 exti pending bit */
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM1_EXTI_CLEAR_FLAG();
1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */
1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2)
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM2_EXTI_GET_FLAG() != 0U)
1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM2 interrupt user callback */
1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM2Callback();
1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM2 exti pending bit */
1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM2_EXTI_CLEAR_FLAG();
1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */
1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM3_EXTI_GET_FLAG() != 0U)
1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM3 interrupt user callback */
1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM3Callback();
1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM3 exti pending bit */
1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM3_EXTI_CLEAR_FLAG();
1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** if(__HAL_PWR_PVM4_EXTI_GET_FLAG() != 0U)
1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* PWR PVM4 interrupt user callback */
1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM4Callback();
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Clear PVM4 exti pending bit */
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __HAL_PWR_PVM4_EXTI_CLEAR_FLAG();
1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME1)
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM1 interrupt callback
1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM1Callback(void)
1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1935 .loc 1 1069 0
1936 .cfi_startproc
1937 @ args = 0, pretend = 0, frame = 0
1938 @ frame_needed = 0, uses_anonymous_args = 0
1939 @ link register save eliminated.
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed,
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM1Callback() API can be implemented in the user file
1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1940 .loc 1 1073 0
1941 0000 7047 bx lr
1942 .cfi_endproc
1943 .LFE358:
1945 0002 00BF .section .text.HAL_PWREx_PVM2Callback,"ax",%progbits
1946 .align 1
1947 .p2align 2,,3
1948 .weak HAL_PWREx_PVM2Callback
1949 .syntax unified
1950 .thumb
1951 .thumb_func
1952 .fpu fpv4-sp-d16
1954 HAL_PWREx_PVM2Callback:
1955 .LFB367:
1956 .cfi_startproc
1957 @ args = 0, pretend = 0, frame = 0
1958 @ frame_needed = 0, uses_anonymous_args = 0
1959 @ link register save eliminated.
1960 0000 7047 bx lr
1961 .cfi_endproc
1962 .LFE367:
1964 0002 00BF .section .text.HAL_PWREx_PVM3Callback,"ax",%progbits
1965 .align 1
1966 .p2align 2,,3
1967 .weak HAL_PWREx_PVM3Callback
1968 .syntax unified
1969 .thumb
1970 .thumb_func
1971 .fpu fpv4-sp-d16
1973 HAL_PWREx_PVM3Callback:
1974 .LFB369:
1975 .cfi_startproc
1976 @ args = 0, pretend = 0, frame = 0
1977 @ frame_needed = 0, uses_anonymous_args = 0
1978 @ link register save eliminated.
1979 0000 7047 bx lr
1980 .cfi_endproc
1981 .LFE369:
1983 0002 00BF .section .text.HAL_PWREx_PVM4Callback,"ax",%progbits
1984 .align 1
1985 .p2align 2,,3
1986 .weak HAL_PWREx_PVM4Callback
1987 .syntax unified
1988 .thumb
1989 .thumb_func
1990 .fpu fpv4-sp-d16
1992 HAL_PWREx_PVM4Callback:
1993 .LFB371:
1994 .cfi_startproc
1995 @ args = 0, pretend = 0, frame = 0
1996 @ frame_needed = 0, uses_anonymous_args = 0
1997 @ link register save eliminated.
1998 0000 7047 bx lr
1999 .cfi_endproc
2000 .LFE371:
2002 0002 00BF .section .text.HAL_PWREx_PVD_PVM_IRQHandler,"ax",%progbits
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
2003 .align 1
2004 .p2align 2,,3
2005 .global HAL_PWREx_PVD_PVM_IRQHandler
2006 .syntax unified
2007 .thumb
2008 .thumb_func
2009 .fpu fpv4-sp-d16
2011 HAL_PWREx_PVD_PVM_IRQHandler:
2012 .LFB357:
1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check PWR exti flag */
2013 .loc 1 1013 0
2014 .cfi_startproc
2015 @ args = 0, pretend = 0, frame = 0
2016 @ frame_needed = 0, uses_anonymous_args = 0
1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Check PWR exti flag */
2017 .loc 1 1013 0
2018 0000 10B5 push {r4, lr}
2019 .LCFI7:
2020 .cfi_def_cfa_offset 8
2021 .cfi_offset 4, -8
2022 .cfi_offset 14, -4
1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2023 .loc 1 1015 0
2024 0002 174C ldr r4, .L285
2025 0004 6369 ldr r3, [r4, #20]
2026 0006 DB03 lsls r3, r3, #15
2027 0008 24D4 bmi .L280
2028 .L259:
1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2029 .loc 1 1025 0
2030 000a 154C ldr r4, .L285
2031 000c 636B ldr r3, [r4, #52]
2032 000e 1807 lsls r0, r3, #28
2033 0010 1BD4 bmi .L281
2034 .L260:
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2035 .loc 1 1035 0
2036 0012 134C ldr r4, .L285
2037 0014 636B ldr r3, [r4, #52]
2038 0016 D906 lsls r1, r3, #27
2039 0018 12D4 bmi .L282
2040 .L261:
1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2041 .loc 1 1044 0
2042 001a 114C ldr r4, .L285
2043 001c 636B ldr r3, [r4, #52]
2044 001e 9A06 lsls r2, r3, #26
2045 0020 09D4 bmi .L283
2046 .L262:
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2047 .loc 1 1052 0
2048 0022 0F4C ldr r4, .L285
2049 0024 636B ldr r3, [r4, #52]
2050 0026 5B06 lsls r3, r3, #25
2051 0028 00D4 bmi .L284
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2052 .loc 1 1060 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
2053 002a 10BD pop {r4, pc}
2054 .L284:
1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2055 .loc 1 1055 0
2056 002c FFF7FEFF bl HAL_PWREx_PVM4Callback
2057 .LVL121:
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2058 .loc 1 1058 0
2059 0030 4023 movs r3, #64
2060 0032 6363 str r3, [r4, #52]
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2061 .loc 1 1060 0
2062 0034 10BD pop {r4, pc}
2063 .L283:
1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2064 .loc 1 1047 0
2065 0036 FFF7FEFF bl HAL_PWREx_PVM3Callback
2066 .LVL122:
1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2067 .loc 1 1050 0
2068 003a 2023 movs r3, #32
2069 003c 6363 str r3, [r4, #52]
2070 003e F0E7 b .L262
2071 .L282:
1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2072 .loc 1 1038 0
2073 0040 FFF7FEFF bl HAL_PWREx_PVM2Callback
2074 .LVL123:
1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2075 .loc 1 1041 0
2076 0044 1023 movs r3, #16
2077 0046 6363 str r3, [r4, #52]
2078 0048 E7E7 b .L261
2079 .L281:
1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2080 .loc 1 1028 0
2081 004a FFF7FEFF bl HAL_PWREx_PVM1Callback
2082 .LVL124:
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2083 .loc 1 1031 0
2084 004e 0823 movs r3, #8
2085 0050 6363 str r3, [r4, #52]
2086 0052 DEE7 b .L260
2087 .L280:
1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
2088 .loc 1 1018 0
2089 0054 FFF7FEFF bl HAL_PWR_PVDCallback
2090 .LVL125:
1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2091 .loc 1 1021 0
2092 0058 4FF48033 mov r3, #65536
2093 005c 6361 str r3, [r4, #20]
2094 005e D4E7 b .L259
2095 .L286:
2096 .align 2
2097 .L285:
2098 0060 00040140 .word 1073808384
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
2099 .cfi_endproc
2100 .LFE357:
2102 .section .text.HAL_PWREx_EnableUCPDStandbyMode,"ax",%progbits
2103 .align 1
2104 .p2align 2,,3
2105 .global HAL_PWREx_EnableUCPDStandbyMode
2106 .syntax unified
2107 .thumb
2108 .thumb_func
2109 .fpu fpv4-sp-d16
2111 HAL_PWREx_EnableUCPDStandbyMode:
2112 .LFB362:
1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME1 */
1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR2_PVME2)
1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM2 interrupt callback
1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM2Callback(void)
1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed,
1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM2Callback() API can be implemented in the user file
1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR2_PVME2 */
1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM3 interrupt callback
1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM3Callback(void)
1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed,
1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM3Callback() API can be implemented in the user file
1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief PWR PVM4 interrupt callback
1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** __weak void HAL_PWREx_PVM4Callback(void)
1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* NOTE : This function should not be modified; when the callback is needed,
1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** HAL_PWREx_PVM4Callback() API can be implemented in the user file
1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR3_UCPD_STDBY)
1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable UCPD configuration memorization in Standby.
1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableUCPDStandbyMode(void)
1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2113 .loc 1 1117 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
2114 .cfi_startproc
2115 @ args = 0, pretend = 0, frame = 0
2116 @ frame_needed = 0, uses_anonymous_args = 0
2117 @ link register save eliminated.
1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Memorize UCPD configuration when entering standby mode */
1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY);
2118 .loc 1 1119 0
2119 0000 024A ldr r2, .L288
2120 0002 9368 ldr r3, [r2, #8]
2121 0004 43F40053 orr r3, r3, #8192
2122 0008 9360 str r3, [r2, #8]
1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2123 .loc 1 1120 0
2124 000a 7047 bx lr
2125 .L289:
2126 .align 2
2127 .L288:
2128 000c 00700040 .word 1073770496
2129 .cfi_endproc
2130 .LFE362:
2132 .section .text.HAL_PWREx_DisableUCPDStandbyMode,"ax",%progbits
2133 .align 1
2134 .p2align 2,,3
2135 .global HAL_PWREx_DisableUCPDStandbyMode
2136 .syntax unified
2137 .thumb
2138 .thumb_func
2139 .fpu fpv4-sp-d16
2141 HAL_PWREx_DisableUCPDStandbyMode:
2142 .LFB363:
1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable UCPD configuration memorization in Standby.
1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note This function must be called on exiting the Standby mode and before any UCPD
1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * configuration update.
1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableUCPDStandbyMode(void)
1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2143 .loc 1 1129 0
2144 .cfi_startproc
2145 @ args = 0, pretend = 0, frame = 0
2146 @ frame_needed = 0, uses_anonymous_args = 0
2147 @ link register save eliminated.
1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Write 0 immediately after Standby exit when using UCPD,
1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** and before writing any UCPD registers */
1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_STDBY);
2148 .loc 1 1132 0
2149 0000 024A ldr r2, .L291
2150 0002 9368 ldr r3, [r2, #8]
2151 0004 23F40053 bic r3, r3, #8192
2152 0008 9360 str r3, [r2, #8]
1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2153 .loc 1 1133 0
2154 000a 7047 bx lr
2155 .L292:
2156 .align 2
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
2157 .L291:
2158 000c 00700040 .word 1073770496
2159 .cfi_endproc
2160 .LFE363:
2162 .section .text.HAL_PWREx_EnableUCPDDeadBattery,"ax",%progbits
2163 .align 1
2164 .p2align 2,,3
2165 .global HAL_PWREx_EnableUCPDDeadBattery
2166 .syntax unified
2167 .thumb
2168 .thumb_func
2169 .fpu fpv4-sp-d16
2171 HAL_PWREx_EnableUCPDDeadBattery:
2172 .LFB364:
1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #endif /* PWR_CR3_UCPD_STDBY */
1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** #if defined(PWR_CR3_UCPD_DBDIS)
1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Enable the USB Type-C dead battery pull-down behavior
1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * on UCPDx_CC1 and UCPDx_CC2 pins
1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableUCPDDeadBattery(void)
1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2173 .loc 1 1143 0
2174 .cfi_startproc
2175 @ args = 0, pretend = 0, frame = 0
2176 @ frame_needed = 0, uses_anonymous_args = 0
2177 @ link register save eliminated.
1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Write 0 to enable the USB Type-C dead battery pull-down behavior */
1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** CLEAR_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS);
2178 .loc 1 1145 0
2179 0000 024A ldr r2, .L294
2180 0002 9368 ldr r3, [r2, #8]
2181 0004 23F48043 bic r3, r3, #16384
2182 0008 9360 str r3, [r2, #8]
1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2183 .loc 1 1146 0
2184 000a 7047 bx lr
2185 .L295:
2186 .align 2
2187 .L294:
2188 000c 00700040 .word 1073770496
2189 .cfi_endproc
2190 .LFE364:
2192 .section .text.HAL_PWREx_DisableUCPDDeadBattery,"ax",%progbits
2193 .align 1
2194 .p2align 2,,3
2195 .global HAL_PWREx_DisableUCPDDeadBattery
2196 .syntax unified
2197 .thumb
2198 .thumb_func
2199 .fpu fpv4-sp-d16
2201 HAL_PWREx_DisableUCPDDeadBattery:
2202 .LFB365:
1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c ****
1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /**
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @brief Disable the USB Type-C dead battery pull-down behavior
1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * on UCPDx_CC1 and UCPDx_CC2 pins
1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @note After exiting reset, the USB Type-C dead battery behavior will be enabled,
1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * which may have a pull-down effect on CC1 and CC2 pins.
1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * It is recommended to disable it in all cases, either to stop this pull-down
1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * or to hand over control to the UCPD (which should therefore be
1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * initialized before doing the disable).
1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** * @retval None
1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** */
1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableUCPDDeadBattery(void)
1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** {
2203 .loc 1 1159 0
2204 .cfi_startproc
2205 @ args = 0, pretend = 0, frame = 0
2206 @ frame_needed = 0, uses_anonymous_args = 0
2207 @ link register save eliminated.
1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** /* Write 1 to disable the USB Type-C dead battery pull-down behavior */
1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** SET_BIT(PWR->CR3, PWR_CR3_UCPD_DBDIS);
2208 .loc 1 1161 0
2209 0000 024A ldr r2, .L297
2210 0002 9368 ldr r3, [r2, #8]
2211 0004 43F48043 orr r3, r3, #16384
2212 0008 9360 str r3, [r2, #8]
1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c **** }
2213 .loc 1 1162 0
2214 000a 7047 bx lr
2215 .L298:
2216 .align 2
2217 .L297:
2218 000c 00700040 .word 1073770496
2219 .cfi_endproc
2220 .LFE365:
2222 .text
2223 .Letext0:
2224 .file 2 "/usr/include/newlib/machine/_default_types.h"
2225 .file 3 "/usr/include/newlib/sys/_stdint.h"
2226 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
2227 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
2228 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
2229 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
2230 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
2231 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
2232 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
2233 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
2234 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h"
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32g4xx_hal_pwr_ex.c
2021-07-03 18:17:05 +02:00
/tmp/ccR8QFlv.s:16 .text.HAL_PWREx_GetVoltageRange:0000000000000000 $t
/tmp/ccR8QFlv.s:24 .text.HAL_PWREx_GetVoltageRange:0000000000000000 HAL_PWREx_GetVoltageRange
/tmp/ccR8QFlv.s:51 .text.HAL_PWREx_GetVoltageRange:0000000000000020 $d
/tmp/ccR8QFlv.s:56 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 $t
/tmp/ccR8QFlv.s:64 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 HAL_PWREx_ControlVoltageScaling
/tmp/ccR8QFlv.s:254 .text.HAL_PWREx_ControlVoltageScaling:00000000000000f0 $d
/tmp/ccR8QFlv.s:261 .text.HAL_PWREx_EnableBatteryCharging:0000000000000000 $t
/tmp/ccR8QFlv.s:269 .text.HAL_PWREx_EnableBatteryCharging:0000000000000000 HAL_PWREx_EnableBatteryCharging
/tmp/ccR8QFlv.s:293 .text.HAL_PWREx_EnableBatteryCharging:0000000000000018 $d
/tmp/ccR8QFlv.s:298 .text.HAL_PWREx_DisableBatteryCharging:0000000000000000 $t
/tmp/ccR8QFlv.s:306 .text.HAL_PWREx_DisableBatteryCharging:0000000000000000 HAL_PWREx_DisableBatteryCharging
/tmp/ccR8QFlv.s:323 .text.HAL_PWREx_DisableBatteryCharging:000000000000000c $d
/tmp/ccR8QFlv.s:328 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000000000000 $t
/tmp/ccR8QFlv.s:336 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000000000000 HAL_PWREx_EnableInternalWakeUpLine
/tmp/ccR8QFlv.s:353 .text.HAL_PWREx_EnableInternalWakeUpLine:000000000000000c $d
/tmp/ccR8QFlv.s:358 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000000000000 $t
/tmp/ccR8QFlv.s:366 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000000000000 HAL_PWREx_DisableInternalWakeUpLine
/tmp/ccR8QFlv.s:383 .text.HAL_PWREx_DisableInternalWakeUpLine:000000000000000c $d
/tmp/ccR8QFlv.s:388 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000000 $t
/tmp/ccR8QFlv.s:396 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000000 HAL_PWREx_EnableGPIOPullUp
/tmp/ccR8QFlv.s:409 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000008 $d
/tmp/ccR8QFlv.s:550 .text.HAL_PWREx_EnableGPIOPullUp:00000000000000b4 $d
/tmp/ccR8QFlv.s:555 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000000 $t
/tmp/ccR8QFlv.s:563 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000000 HAL_PWREx_DisableGPIOPullUp
/tmp/ccR8QFlv.s:576 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000008 $d
/tmp/ccR8QFlv.s:688 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000084 $d
/tmp/ccR8QFlv.s:693 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000000 $t
/tmp/ccR8QFlv.s:701 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000000 HAL_PWREx_EnableGPIOPullDown
/tmp/ccR8QFlv.s:714 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000008 $d
/tmp/ccR8QFlv.s:855 .text.HAL_PWREx_EnableGPIOPullDown:00000000000000b4 $d
/tmp/ccR8QFlv.s:860 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000000 $t
/tmp/ccR8QFlv.s:868 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000000 HAL_PWREx_DisableGPIOPullDown
/tmp/ccR8QFlv.s:881 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000008 $d
/tmp/ccR8QFlv.s:991 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000080 $d
/tmp/ccR8QFlv.s:996 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000000000000 $t
/tmp/ccR8QFlv.s:1004 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000000000000 HAL_PWREx_EnablePullUpPullDownConfig
/tmp/ccR8QFlv.s:1021 .text.HAL_PWREx_EnablePullUpPullDownConfig:000000000000000c $d
/tmp/ccR8QFlv.s:1026 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000000000000 $t
/tmp/ccR8QFlv.s:1034 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000000000000 HAL_PWREx_DisablePullUpPullDownConfig
/tmp/ccR8QFlv.s:1051 .text.HAL_PWREx_DisablePullUpPullDownConfig:000000000000000c $d
/tmp/ccR8QFlv.s:1056 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000000000000 $t
/tmp/ccR8QFlv.s:1064 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000000000000 HAL_PWREx_EnableSRAM2ContentRetention
/tmp/ccR8QFlv.s:1081 .text.HAL_PWREx_EnableSRAM2ContentRetention:000000000000000c $d
/tmp/ccR8QFlv.s:1086 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000000000000 $t
/tmp/ccR8QFlv.s:1094 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000000000000 HAL_PWREx_DisableSRAM2ContentRetention
/tmp/ccR8QFlv.s:1111 .text.HAL_PWREx_DisableSRAM2ContentRetention:000000000000000c $d
/tmp/ccR8QFlv.s:1116 .text.HAL_PWREx_EnablePVM1:0000000000000000 $t
/tmp/ccR8QFlv.s:1124 .text.HAL_PWREx_EnablePVM1:0000000000000000 HAL_PWREx_EnablePVM1
/tmp/ccR8QFlv.s:1141 .text.HAL_PWREx_EnablePVM1:000000000000000c $d
/tmp/ccR8QFlv.s:1146 .text.HAL_PWREx_DisablePVM1:0000000000000000 $t
/tmp/ccR8QFlv.s:1154 .text.HAL_PWREx_DisablePVM1:0000000000000000 HAL_PWREx_DisablePVM1
/tmp/ccR8QFlv.s:1171 .text.HAL_PWREx_DisablePVM1:000000000000000c $d
/tmp/ccR8QFlv.s:1176 .text.HAL_PWREx_EnablePVM2:0000000000000000 $t
/tmp/ccR8QFlv.s:1184 .text.HAL_PWREx_EnablePVM2:0000000000000000 HAL_PWREx_EnablePVM2
/tmp/ccR8QFlv.s:1201 .text.HAL_PWREx_EnablePVM2:000000000000000c $d
/tmp/ccR8QFlv.s:1206 .text.HAL_PWREx_DisablePVM2:0000000000000000 $t
/tmp/ccR8QFlv.s:1214 .text.HAL_PWREx_DisablePVM2:0000000000000000 HAL_PWREx_DisablePVM2
/tmp/ccR8QFlv.s:1231 .text.HAL_PWREx_DisablePVM2:000000000000000c $d
/tmp/ccR8QFlv.s:1236 .text.HAL_PWREx_EnablePVM3:0000000000000000 $t
/tmp/ccR8QFlv.s:1244 .text.HAL_PWREx_EnablePVM3:0000000000000000 HAL_PWREx_EnablePVM3
/tmp/ccR8QFlv.s:1261 .text.HAL_PWREx_EnablePVM3:000000000000000c $d
/tmp/ccR8QFlv.s:1266 .text.HAL_PWREx_DisablePVM3:0000000000000000 $t
/tmp/ccR8QFlv.s:1274 .text.HAL_PWREx_DisablePVM3:0000000000000000 HAL_PWREx_DisablePVM3
/tmp/ccR8QFlv.s:1291 .text.HAL_PWREx_DisablePVM3:000000000000000c $d
/tmp/ccR8QFlv.s:1296 .text.HAL_PWREx_EnablePVM4:0000000000000000 $t
/tmp/ccR8QFlv.s:1304 .text.HAL_PWREx_EnablePVM4:0000000000000000 HAL_PWREx_EnablePVM4
/tmp/ccR8QFlv.s:1321 .text.HAL_PWREx_EnablePVM4:000000000000000c $d
/tmp/ccR8QFlv.s:1326 .text.HAL_PWREx_DisablePVM4:0000000000000000 $t
/tmp/ccR8QFlv.s:1334 .text.HAL_PWREx_DisablePVM4:0000000000000000 HAL_PWREx_DisablePVM4
/tmp/ccR8QFlv.s:1351 .text.HAL_PWREx_DisablePVM4:000000000000000c $d
/tmp/ccR8QFlv.s:1356 .text.HAL_PWREx_ConfigPVM:0000000000000000 $t
/tmp/ccR8QFlv.s:1364 .text.HAL_PWREx_ConfigPVM:0000000000000000 HAL_PWREx_ConfigPVM
/tmp/ccR8QFlv.s:1625 .text.HAL_PWREx_ConfigPVM:0000000000000194 $d
/tmp/ccR8QFlv.s:1630 .text.HAL_PWREx_EnableLowPowerRunMode:0000000000000000 $t
/tmp/ccR8QFlv.s:1638 .text.HAL_PWREx_EnableLowPowerRunMode:0000000000000000 HAL_PWREx_EnableLowPowerRunMode
/tmp/ccR8QFlv.s:1655 .text.HAL_PWREx_EnableLowPowerRunMode:000000000000000c $d
/tmp/ccR8QFlv.s:1660 .text.HAL_PWREx_DisableLowPowerRunMode:0000000000000000 $t
/tmp/ccR8QFlv.s:1668 .text.HAL_PWREx_DisableLowPowerRunMode:0000000000000000 HAL_PWREx_DisableLowPowerRunMode
/tmp/ccR8QFlv.s:1723 .text.HAL_PWREx_DisableLowPowerRunMode:0000000000000040 $d
/tmp/ccR8QFlv.s:1730 .text.HAL_PWREx_EnterSTOP0Mode:0000000000000000 $t
/tmp/ccR8QFlv.s:1738 .text.HAL_PWREx_EnterSTOP0Mode:0000000000000000 HAL_PWREx_EnterSTOP0Mode
/tmp/ccR8QFlv.s:1798 .text.HAL_PWREx_EnterSTOP0Mode:0000000000000030 $d
/tmp/ccR8QFlv.s:1804 .text.HAL_PWREx_EnterSTOP1Mode:0000000000000000 $t
/tmp/ccR8QFlv.s:1812 .text.HAL_PWREx_EnterSTOP1Mode:0000000000000000 HAL_PWREx_EnterSTOP1Mode
/tmp/ccR8QFlv.s:1873 .text.HAL_PWREx_EnterSTOP1Mode:0000000000000034 $d
/tmp/ccR8QFlv.s:1879 .text.HAL_PWREx_EnterSHUTDOWNMode:0000000000000000 $t
/tmp/ccR8QFlv.s:1887 .text.HAL_PWREx_EnterSHUTDOWNMode:0000000000000000 HAL_PWREx_EnterSHUTDOWNMode
/tmp/ccR8QFlv.s:1919 .text.HAL_PWREx_EnterSHUTDOWNMode:000000000000001c $d
/tmp/ccR8QFlv.s:1925 .text.HAL_PWREx_PVM1Callback:0000000000000000 $t
/tmp/ccR8QFlv.s:1933 .text.HAL_PWREx_PVM1Callback:0000000000000000 HAL_PWREx_PVM1Callback
/tmp/ccR8QFlv.s:1946 .text.HAL_PWREx_PVM2Callback:0000000000000000 $t
/tmp/ccR8QFlv.s:1954 .text.HAL_PWREx_PVM2Callback:0000000000000000 HAL_PWREx_PVM2Callback
/tmp/ccR8QFlv.s:1965 .text.HAL_PWREx_PVM3Callback:0000000000000000 $t
/tmp/ccR8QFlv.s:1973 .text.HAL_PWREx_PVM3Callback:0000000000000000 HAL_PWREx_PVM3Callback
/tmp/ccR8QFlv.s:1984 .text.HAL_PWREx_PVM4Callback:0000000000000000 $t
/tmp/ccR8QFlv.s:1992 .text.HAL_PWREx_PVM4Callback:0000000000000000 HAL_PWREx_PVM4Callback
/tmp/ccR8QFlv.s:2003 .text.HAL_PWREx_PVD_PVM_IRQHandler:0000000000000000 $t
/tmp/ccR8QFlv.s:2011 .text.HAL_PWREx_PVD_PVM_IRQHandler:0000000000000000 HAL_PWREx_PVD_PVM_IRQHandler
/tmp/ccR8QFlv.s:2098 .text.HAL_PWREx_PVD_PVM_IRQHandler:0000000000000060 $d
/tmp/ccR8QFlv.s:2103 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000000000000 $t
/tmp/ccR8QFlv.s:2111 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000000000000 HAL_PWREx_EnableUCPDStandbyMode
/tmp/ccR8QFlv.s:2128 .text.HAL_PWREx_EnableUCPDStandbyMode:000000000000000c $d
/tmp/ccR8QFlv.s:2133 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000000000000 $t
/tmp/ccR8QFlv.s:2141 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000000000000 HAL_PWREx_DisableUCPDStandbyMode
/tmp/ccR8QFlv.s:2158 .text.HAL_PWREx_DisableUCPDStandbyMode:000000000000000c $d
/tmp/ccR8QFlv.s:2163 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000000000000 $t
/tmp/ccR8QFlv.s:2171 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000000000000 HAL_PWREx_EnableUCPDDeadBattery
/tmp/ccR8QFlv.s:2188 .text.HAL_PWREx_EnableUCPDDeadBattery:000000000000000c $d
/tmp/ccR8QFlv.s:2193 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000000000000 $t
/tmp/ccR8QFlv.s:2201 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000000000000 HAL_PWREx_DisableUCPDDeadBattery
/tmp/ccR8QFlv.s:2218 .text.HAL_PWREx_DisableUCPDDeadBattery:000000000000000c $d
/tmp/ccR8QFlv.s:416 .text.HAL_PWREx_EnableGPIOPullUp:000000000000000f $d
/tmp/ccR8QFlv.s:416 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000010 $t
/tmp/ccR8QFlv.s:583 .text.HAL_PWREx_DisableGPIOPullUp:000000000000000f $d
/tmp/ccR8QFlv.s:583 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000010 $t
/tmp/ccR8QFlv.s:721 .text.HAL_PWREx_EnableGPIOPullDown:000000000000000f $d
/tmp/ccR8QFlv.s:721 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000010 $t
/tmp/ccR8QFlv.s:888 .text.HAL_PWREx_DisableGPIOPullDown:000000000000000f $d
/tmp/ccR8QFlv.s:888 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000010 $t
2021-07-02 22:19:04 +02:00
UNDEFINED SYMBOLS
SystemCoreClock
HAL_PWR_PVDCallback
