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Core/Src/usr/include/newlib/machine/usr/include/newlib/sysDrivers/CMSIS/IncludeDrivers/CMSIS/Device/ST/STM32G4xx/IncludeDrivers/STM32G4xx_HAL_Driver/Incstm32g4xx_it.c
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DMA1_Channel4_IRQHandlerhdma_dac1_ch1DirectionChannelNStatehdma_adc1SQR1SQR2SQR3SQR4RGCRLockAdvancedInitint32_tpFlashRTORFLASH_CACHE_ICACHE_ENABLEDDTR2huart1OneBitSamplingDMAMUX_RequestGenStatus_TypeDefHAL_TIM_CHANNEL_STATE_RESETCNDTRLowPowerAutoWaitAdvFeatureInitDMARStopBitsCCR1CCR2CCR3CCR4CCR5CCR6__uint8_tOverSamplingFLASH_CacheTypeDefDMAmuxRequestGenStatusMaskuwTickNbrOfConversionHAL_TIM_CHANNEL_STATE_BUSYDMAMUX_Channel_TypeDefHAL_TIM_STATE_ERRORFLASH_PROC_PROGRAM_LASTlong intPendSV_HandlerDebugMon_HandlerTIM_Base_InitTypeDefPrioritypRxBuffPtrErrorCodehdma_usart1_txAddressHAL_LockTypeDefChannelDMA1_Channel5_IRQHandlerHAL_TIM_StateTypeDefCPARsigned charuint8_tSwapHAL_TIM_IRQHandlerDMAmuxChannelStatusFLASH_PROC_PROGRAMUART_AdvFeatureInitTypeDefCacheToReactivateTIM_TypeDefRESERVED0RESERVED1unsigned charRESERVED3RESERVED4RESERVED5RESERVED6RESERVED7RESERVED8RESERVED9DMA_TypeDefChannelIndexScanConvModeuwTickFreqFLASH_PROC_NONEGNU C11 7.3.1 20180622 (release) [ARM/embedded-7-branch revision 261907] -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -g -gdwarf-2 -Ofast -fdata-sections -ffunction-sectionsPRESCTriggeredModeRESERVED2FLASH_PROC_MASS_ERASEHAL_TIM_ACTIVE_CHANNEL_1HAL_TIM_ACTIVE_CHANNEL_2HAL_TIM_ACTIVE_CHANNEL_3HAL_TIM_ACTIVE_CHANNEL_4HAL_TIM_ACTIVE_CHANNEL_5CCMR1CCMR2CCMR3IFCR__uint16_thdmarxOverrunDisableDMAmuxChannelStatusMaskUSART_TypeDefFLASH_ProcedureTypeDefWordLengthhdma_dac1_ch2ADC1_2_IRQHandlerNbPagesToEraseMaskDMAMUX_RequestGen_TypeDefPrescalerPeriphIncTIM7_IRQHandlerAWD2CRXferAbortCallbackFLASH_CACHE_ICACHE_DCACHE_ENABLEDADC_TypeDefhdmatxhdmaHAL_TIM_STATE_BUSYCFGRChannelCountInstanceADC_OversamplingTypeDefHwFlowCtlHAL_DMA_BURST_STATE_RESETDIFSELDiscontinuousConvModelong unsigned intDMAmuxChannelHAL_TIM_CHANNEL_STATE_READYuwTickPrioDMAmuxRequestGenDIERRxXferSizeHAL_ADC_IRQHandlerDataInvertSystemCoreClockMSBFirstGainCompensationHAL_TIM_STATE_RESETDMABurstStateSMPR1SMPR2ADC_InitTypeDefPageNbTxDataToProcessDMADisableonRxErrorTISELDMA_HandleDMA1_Channel1_IRQHandlerAutoBaudRateModeRxXferCountDMAmuxRequestGenStatusMemDataAlignment__uint32_tlong long intPeriphDataAlignmentFLASH_CACHE_DCACHE_ENABLEDUSART1_IRQHandlerGTPRHAL_TIM_ACTIVE_CHANNEL_CLEAREDFifoModeExternalTrigConvEdgeContinuousConvModeITM_RxBufferAWD3CRAutoReloadPreloadRGSRReceptionTypeHAL_DMA_STATE_TIMEOUT__UART_HandleTypeDefunsigned intRGCFRResolutionCFGR2NbrOfDiscConversionDmaBaseAddressgStateParentCMARChannelStateParityHAL_DMA_STATE_RESETHardFault_HandlerHAL_IncTickInitDMAContinuousRequestsHAL_DMA_IRQHandlerBankpTxBuffPtrContextQueueUART_HandleTypeDefMemIncUART_InitTypeDefHAL_TIM_ACTIVE_CHANNEL_6DISABLEXferErrorCallbacklong doubleProcedureOnGoingRepetitionCounterModeCore/Src/stm32g4xx_it.cHAL_TIM_ActiveChannelDMA_Channel_TypeDefAHBPrescTableNMI_HandlerTxXferSizeFunctionalStatelong long unsigned int__DMA_HandleTypeDefuint16_tHAL_TIM_DMABurstStateTypeDefRESERVED10CCERCounterMod






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