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ARM GAS /tmp/ccK7oyem.s page 1
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1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32g4xx_hal_dma.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_DMA_Init,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .global HAL_DMA_Init
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 HAL_DMA_Init:
25 .LFB329:
26 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c"
1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ******************************************************************************
3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @file stm32g4xx_hal_dma.c
4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @author MCD Application Team
5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief DMA HAL module driver.
6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral:
8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * + Initialization and de-initialization functions
9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * + IO operation functions
10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * + Peripheral State and errors functions
11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ==============================================================================
13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### How to use this driver #####
14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ==============================================================================
15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel
17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is
18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** necessary). Please refer to the Reference manual for connection between peripherals
19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** and DMA requests.
20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters:
22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Channel request, Transfer Direction, Source and Destination data formats,
23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode
24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** using HAL_DMA_Init() function.
25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Prior to HAL_DMA_Init the peripheral clock shall be enabled for both DMA & DMAMUX
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** thanks to:
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (##) DMA1 or DMA2: __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE() ;
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (##) DMAMUX1: __HAL_RCC_DMAMUX1_CLK_ENABLE();
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er
32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** detection.
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33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer
35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed.
37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *** Polling mode IO operation ***
39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** =================================
40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source
42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** address and destination address and the Length of data to be transferred
43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this
44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application.
45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *** Interrupt mode IO operation ***
47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===================================
48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority()
50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ()
51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of
52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred.
53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** In this case the DMA interrupt is configured
54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Use HAL_DMA_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine
55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can
56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** add his own function to register callbacks with HAL_DMA_RegisterCallback().
57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *** DMA HAL driver macros list ***
59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** =============================================
60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Below the list of macros in DMA HAL driver.
62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_ENABLE: Enable the specified DMA Channel.
64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_DISABLE: Disable the specified DMA Channel.
65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_GET_FLAG: Get the DMA Channel pending flags.
66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_CLEAR_FLAG: Clear the DMA Channel pending flags.
67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_ENABLE_IT: Enable the specified DMA Channel interrupts.
68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_DISABLE_IT: Disable the specified DMA Channel interrupts.
69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) __HAL_DMA_GET_IT_SOURCE: Check whether the specified DMA Channel interrupt has occurred
70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros
73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ******************************************************************************
76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @attention
77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * <h2><center>© Copyright (c) 2019 STMicroelectronics.
79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * All rights reserved.</center></h2>
80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * This software component is licensed by ST under BSD 3-Clause license,
82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the "License"; You may not use this file except in compliance with the
83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * License. You may obtain a copy of the License at:
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * opensource.org/licenses/BSD-3-Clause
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ******************************************************************************
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/
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90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #include "stm32g4xx_hal.h"
91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @addtogroup STM32G4xx_HAL_Driver
93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA DMA
97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief DMA HAL module driver
98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED
102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/
104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/
105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/
106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/
107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/
108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions
109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32
112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma);
114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma);
115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/
121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions
123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Initialization and de-initialization functions
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### Initialization and de-initialization functions #####
132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source
135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction,
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value.
137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in
139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** reference manual.
140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Initialize the DMA according to the specified
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147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle.
148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains
149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
27 .loc 1 153 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 .LVL0:
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tmp;
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the DMA handle allocation */
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma == NULL)
32 .loc 1 157 0
33 0000 0028 cmp r0, #0
34 0002 7CD0 beq .L9
35 0004 0346 mov r3, r0
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction));
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc));
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc));
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment));
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment));
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode));
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_ALL_REQUEST(hdma->Init.Request));
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Compute the channel index */
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
36 .loc 1 175 0
37 0006 3F4A ldr r2, .L18
38 0008 0068 ldr r0, [r0]
39 .LVL1:
40 000a 9042 cmp r0, r2
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tmp;
41 .loc 1 153 0
42 000c 2DE9F041 push {r4, r5, r6, r7, r8, lr}
43 .LCFI0:
44 .cfi_def_cfa_offset 24
45 .cfi_offset 4, -24
46 .cfi_offset 5, -20
47 .cfi_offset 6, -16
48 .cfi_offset 7, -12
49 .cfi_offset 8, -8
50 .cfi_offset 14, -4
51 .loc 1 175 0
52 0010 61D9 bls .L16
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
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177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA1 */
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA2 */
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch
53 .loc 1 184 0
54 0012 3D49 ldr r1, .L18+4
55 0014 3D4A ldr r2, .L18+8
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
56 .loc 1 185 0
57 0016 3E4C ldr r4, .L18+12
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
58 .loc 1 184 0
59 0018 0144 add r1, r1, r0
60 001a A2FB0121 umull r2, r1, r2, r1
61 001e 0909 lsrs r1, r1, #4
62 0020 8900 lsls r1, r1, #2
63 .L4:
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change DMA peripheral state */
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY;
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Get the CR register value */
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tmp = hdma->Instance->CCR;
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE |
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_DIR | DMA_CCR_MEM2MEM));
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Prepare the DMA Channel configuration */
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tmp |= hdma->Init.Direction |
64 .loc 1 200 0
65 0022 D3E90272 ldrd r7, r2, [r3, #8]
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
66 .loc 1 201 0
67 0026 1E69 ldr r6, [r3, #16]
68 0028 1C64 str r4, [r3, #64]
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
69 .loc 1 200 0
70 002a 3A43 orrs r2, r2, r7
71 .loc 1 201 0
72 002c 5C69 ldr r4, [r3, #20]
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
73 .loc 1 202 0
74 002e 9D69 ldr r5, [r3, #24]
75 .LBB14:
76 .LBB15:
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Write to DMA Channel CR register */
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CCR = tmp;
207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX channel :
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask
210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXChannelBaseAndMask(hdma);
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->Init.Direction == DMA_MEMORY_TO_MEMORY)
214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if memory to memory force the request to 0*/
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Request = DMA_REQUEST_MEM2MEM;
217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Set peripheral request to DMAMUX channel */
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR = (hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID);
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX request generator :
228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask
229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset the DMAMUX request generator register*/
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR = 0U;
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen = 0U;
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the error code */
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the DMA state*/
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Allocate lock resource and initialize it */
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED;
253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_OK;
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral.
259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma)
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the DMA handle allocation */
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (NULL == hdma)
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance));
274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the selected DMA Channelx */
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Compute the channel index */
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1))
280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA1 */
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA2 */
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset DMA Channel control register */
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CCR = 0;
294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX channel :
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxChannel, DMAmuxChannelStatus and DMAmuxChannelStatusMask */
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXChannelBaseAndMask(hdma);
302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset the DMAMUX channel that corresponds to the DMA channel */
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR = 0;
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset Request generator parameters if any */
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (((hdma->Init.Request > 0U) && (hdma->Init.Request <= DMA_REQUEST_GENERATOR3)))
311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize parameters for DMAMUX request generator :
313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAmuxRequestGen, DMAmuxRequestGenStatus and DMAmuxRequestGenStatusMask
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CalcDMAMUXRequestGenBaseAndMask(hdma);
316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Reset the DMAMUX request generator register*/
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR = 0U;
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen = 0U;
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clean callbacks */
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = NULL;
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the error code */
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Initialize the DMA state */
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET;
339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Release Lock */
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_OK;
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions
351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Input and Output operation functions
352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### IO operation functions #####
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..] This section provides functions allowing to:
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Configure the source, destination address and data length and
360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** Start DMA transfer with interrupt
361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Abort DMA transfer
362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Poll for transfer complete
363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Handle DMA interrupt request
364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Start the DMA Transfer.
371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address
374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address
375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination (up to 256Kb
376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress,
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379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength));
384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change DMA peripheral state */
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY;
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the peripheral */
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure the source, destination address and the data length & clear flags*/
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the Peripheral */
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma);
402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled.
414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address
417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address
418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination (up to 256Kb
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres
422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t DataLength)
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check the parameters */
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength));
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change DMA peripheral state */
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY;
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436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the peripheral */
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure the source, destination address and the data length & clear flags*/
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the transfer complete interrupt */
445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the transfer Error interrupt */
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (NULL != hdma->XferHalfCpltCallback)
447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the Half transfer complete interrupt as well */
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check if DMAMUX Synchronization is enabled*/
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->DMAmuxChannel->CCR & DMAMUX_CxCR_SE) != 0U)
459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable DMAMUX sync overrun IT*/
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR |= DMAMUX_CxCR_SOIE;
462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator, enable the DMAMUX request generator overrun IT*/
467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* enable the request gen overrun IT*/
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Enable the Peripheral */
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma);
473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Remain BUSY */
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Abort the DMA Transfer.
487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
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493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY)
496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* no transfer ongoing */
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable DMA IT */
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the DMAMUX sync overrun IT*/
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the channel */
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the request gen overrun IT*/
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Aborts the DMA Transfer in Interrupt mode.
540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State)
549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
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550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* no transfer ongoing */
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable DMA IT */
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the channel */
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the DMAMUX sync overrun IT*/
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel->CCR &= ~DMAMUX_CxCR_SOIE;
571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator, disable the DMAMUX request generator overrun IT*/
581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* disable the request gen overrun IT*/
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR &= ~DMAMUX_RGxCR_OIE;
583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Call User Abort callback */
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferAbortCallback != NULL)
596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback(hdma);
598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Polling for transfer complete.
605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete.
608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param Timeout Timeout duration.
609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, HAL_DMA_LevelCompleteTypeDef Com
612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t Timeout)
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t temp;
615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t tickstart;
616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_BUSY != hdma->State)
618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* no transfer ongoing */
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Polling mode not supported in circular mode */
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (0U != (hdma->Instance->CCR & DMA_CCR_CIRC))
627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED;
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Get the level transfer complete flag */
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer Complete flag */
636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** temp = (uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU);
638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Half Transfer Complete flag */
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** temp = (uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU);
643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Get tick */
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** tickstart = HAL_GetTick();
647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** while (0U == (hdma->DmaBaseAddress->ISR & temp))
649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((0U != (hdma->DmaBaseAddress->ISR & ((uint32_t)DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1FU)
651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* When a DMA transfer error occurs */
653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */
654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE;
659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check for the Timeout */
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (Timeout != HAL_MAX_DELAY)
670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT;
675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /*Check for DMAMUX Request generator (if used) overrun status */
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* if using DMAMUX request generator Check for DMAMUX request generator overrun */
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->DMAmuxRequestGenStatus->RGSR & hdma->DMAmuxRequestGenStatusMask) != 0U)
692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the request gen overrun interrupt */
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen->RGCR |= DMAMUX_RGxCR_OIE;
695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_REQGEN;
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Check for DMAMUX Synchronization overrun */
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->DMAmuxChannelStatus->CSR & hdma->DMAmuxChannelStatusMask) != 0U)
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode |= HAL_DMA_ERROR_SYNC;
712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_FULL_TRANSFER == CompleteLevel)
715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the transfer complete flag */
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU));
718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and
720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** all transfers are complete) */
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the half transfer complete flag */
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU));
727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process unlocked */
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_OK;
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Handle DMA interrupt request.
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval None
740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR;
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR;
745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((0U != (flag_it & ((uint32_t)DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1FU)))) && (0U != (sourc
748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the half transfer interrupt */
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the half transfer complete flag */
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1FU));
757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */
759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* but in Transfer Complete case */
760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferHalfCpltCallback != NULL)
762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Half transfer callback */
764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma);
765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else if ((0U != (flag_it & ((uint32_t)DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1FU))))
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TC)))
770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable the transfer complete and error interrupt */
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the transfer complete flag */
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1FU));
781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferCpltCallback != NULL)
786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer complete callback */
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback(hdma);
789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer Error Interrupt management **************************************/
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else if ((0U != (flag_it & ((uint32_t)DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1FU))))
793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TE)))
794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* When a DMA transfer error occurs */
796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */
797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Disable ALL DMA IT */
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = ((uint32_t)DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Update error code */
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE;
805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Change the DMA state */
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY;
808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process Unlocked */
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->XferErrorCallback != NULL)
813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Transfer error callback */
815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback(hdma);
816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Nothing To Do */
821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return;
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Register callbacks
827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param CallbackID User Callback identifier
830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param pCallback pointer to private callbacsk function which has pointer to
832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter.
833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** switch (CallbackID)
845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID:
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = pCallback;
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID:
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback;
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID:
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = pCallback;
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID:
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = pCallback;
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** default:
863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Release Lock */
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief UnRegister callbacks
880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param CallbackID User Callback identifier
883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter.
884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Process locked */
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_LOCK(hdma);
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (HAL_DMA_STATE_READY == hdma->State)
894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** switch (CallbackID)
896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID:
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = NULL;
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID:
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID:
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID:
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID:
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferCpltCallback = NULL;
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** default:
921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_ERROR;
928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Release Lock */
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return status;
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State and Errors functions
943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Peripheral State and Errors functions
944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** *
945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @verbatim
946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ##### Peripheral State and Errors functions #####
948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** ===============================================================================
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** [..]
950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** This subsection provides functions allowing to
951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Check the DMA state
952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** (+) Get error code
953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** @endverbatim
955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Return the DMA hande state.
960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL state
963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma)
965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Return DMA handle state */
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return hdma->State;
968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Return the DMA error code.
972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval DMA Error Code
975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma)
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return hdma->ErrorCode;
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @}
987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions
990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @{
991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Sets the DMA Transfer parameter.
995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address
998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address
999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination
1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval HAL status
1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32
1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX synchro overrun flag */
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask;
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if (hdma->DMAmuxRequestGen != 0U)
1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear the DMAMUX request generator overrun flag */
1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus->RGCFR = hdma->DMAmuxRequestGenStatusMask;
1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Clear all flags */
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1FU));
1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel data length */
1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength;
1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Memory to Peripheral */
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel destination address */
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress;
1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel source address */
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress;
1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Peripheral to Memory */
1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel source address */
1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress;
1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Configure DMA Channel destination address */
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress;
1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Updates the DMA handle with the DMAMUX channel and status mask depending on stream num
1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Stream.
1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval None
1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXChannelBaseAndMask(DMA_HandleTypeDef *hdma)
1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t dmamux_base_addr;
1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t channel_number;
1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX_Channel_TypeDef *DMAMUX1_ChannelBase;
1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* check if instance is not outside the DMA channel range */
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** if ((uint32_t)hdma->Instance < (uint32_t)DMA2_Channel1)
77 .loc 1 1052 0
78 0030 DFF8F4E0 ldr lr, .L18+36
79 0034 DFF8CC80 ldr r8, .L18
80 .LBE15:
81 .LBE14:
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
82 .loc 1 201 0
83 0038 3243 orrs r2, r2, r6
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
84 .loc 1 189 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
85 003a 4FF0020C mov ip, #2
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
86 .loc 1 201 0
87 003e 2243 orrs r2, r2, r4
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
88 .loc 1 189 0
89 0040 83F825C0 strb ip, [r3, #37]
90 .LBB23:
91 .LBB16:
1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA1 */
1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel0;
1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** else
1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA2 */
1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #if defined (STM32G471xx) || defined (STM32G473xx) || defined (STM32G474xx) || defined (STM32G483xx
1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel8;
1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #elif defined (STM32G431xx) || defined (STM32G441xx) || defined (STM32GBK1CB)
1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel6;
1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #else
1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMAMUX1_ChannelBase = DMAMUX1_Channel7;
1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** #endif /* STM32G4x1xx) */
1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** dmamux_base_addr = (uint32_t)DMAMUX1_ChannelBase;
1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** channel_number = (((uint32_t)hdma->Instance & 0xFFU) - 8U) / 20U;
92 .loc 1 1069 0
93 0044 314C ldr r4, .L18+8
94 .LBE16:
95 .LBE23:
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
96 .loc 1 192 0
97 0046 D0F800C0 ldr ip, [r0]
98 .LVL2:
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
99 .loc 1 202 0
100 004a DE69 ldr r6, [r3, #28]
101 004c 5964 str r1, [r3, #68]
102 004e 2A43 orrs r2, r2, r5
103 .LBB24:
104 .LBB17:
105 .loc 1 1069 0
106 0050 C5B2 uxtb r5, r0
107 0052 083D subs r5, r5, #8
108 0054 A4FB0545 umull r4, r5, r4, r5
109 .LBE17:
110 .LBE24:
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
111 .loc 1 203 0
112 0058 1C6A ldr r4, [r3, #32]
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority;
113 .loc 1 202 0
114 005a 3243 orrs r2, r2, r6
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
115 .loc 1 195 0
116 005c 2CF4FF4C bic ip, ip, #32640
117 .LVL3:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
118 .LBB25:
119 .LBB18:
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
120 .loc 1 1052 0
121 0060 2C4E ldr r6, .L18+16
122 .LBE18:
123 .LBE25:
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
124 .loc 1 203 0
125 0062 2243 orrs r2, r2, r4
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC |
126 .loc 1 195 0
127 0064 2CF0700C bic ip, ip, #112
128 .LVL4:
129 .LBB26:
130 .LBB19:
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelInde
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
131 .loc 1 1072 0
132 0068 C5F30414 ubfx r4, r5, #4, #5
1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
133 .loc 1 1052 0
134 006c 4045 cmp r0, r8
135 006e 98BF it ls
136 0070 7646 movls r6, lr
137 .LBE19:
138 .LBE26:
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc |
139 .loc 1 200 0
140 0072 42EA0C02 orr r2, r2, ip
141 .LVL5:
142 .LBB27:
143 .LBB20:
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelInde
144 .loc 1 1070 0
145 0076 8908 lsrs r1, r1, #2
146 .loc 1 1072 0
147 0078 0125 movs r5, #1
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
148 .loc 1 1071 0
149 007a DFF8B0C0 ldr ip, .L18+40
150 .LBE20:
151 .LBE27:
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
152 .loc 1 206 0
153 007e 0260 str r2, [r0]
154 .LVL6:
155 .LBB28:
156 .LBB21:
157 .loc 1 1072 0
158 0080 05FA04F4 lsl r4, r5, r4
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
159 .loc 1 1070 0
160 0084 06EB810E add lr, r6, r1, lsl #2
161 .LBE21:
162 .LBE28:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
163 .loc 1 213 0
164 0088 B7F5804F cmp r7, #16384
165 .LBB29:
166 .LBB22:
167 .loc 1 1072 0
168 008c 1C65 str r4, [r3, #80]
169 .LVL7:
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
170 .loc 1 1071 0
171 008e C3E912EC strd lr, ip, [r3, #72]
172 .LBE22:
173 .LBE29:
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
174 .loc 1 213 0
175 0092 29D0 beq .L17
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
176 .loc 1 220 0
177 0094 5868 ldr r0, [r3, #4]
178 0096 C2B2 uxtb r2, r0
179 .LVL8:
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
180 .loc 1 225 0
181 0098 0138 subs r0, r0, #1
182 009a 0328 cmp r0, #3
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
183 .loc 1 220 0
184 009c 46F82120 str r2, [r6, r1, lsl #2]
185 .LVL9:
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
186 .loc 1 223 0
187 00a0 CCF80440 str r4, [ip, #4]
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
188 .loc 1 225 0
189 00a4 26D8 bhi .L7
190 .LVL10:
191 .LBB30:
192 .LBB31:
1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /**
1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @brief Updates the DMA handle with the DMAMUX request generator params
1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * the configuration information for the specified DMA Channel.
1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** * @retval None
1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** */
1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma)
1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t request = hdma->Init.Request & DMAMUX_CxCR_DMAREQ_ID;
1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* DMA Channels are connected to DMAMUX1 request generator blocks*/
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGen = (DMAMUX_RequestGen_TypeDef *)((uint32_t)(((uint32_t)DMAMUX1_RequestGener
193 .loc 1 1087 0
194 00a6 1C49 ldr r1, .L18+20
1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = DMAMUX1_RequestGenStatus;
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
195 .loc 1 1089 0
196 00a8 1C48 ldr r0, .L18+24
197 00aa 9865 str r0, [r3, #88]
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
198 .loc 1 1087 0
199 00ac 1144 add r1, r1, r2
1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 1UL << ((request - 1U) & 0x1FU);
200 .loc 1 1091 0
201 00ae 013A subs r2, r2, #1
202 .LVL11:
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
203 .loc 1 1087 0
204 00b0 8900 lsls r1, r1, #2
205 .loc 1 1091 0
206 00b2 02F01F02 and r2, r2, #31
207 .LVL12:
208 00b6 05FA02F2 lsl r2, r5, r2
209 .LBE31:
210 .LBE30:
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
211 .loc 1 233 0
212 00ba 0024 movs r4, #0
213 .LBB33:
214 .LBB32:
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
215 .loc 1 1087 0
216 00bc 5965 str r1, [r3, #84]
217 .loc 1 1091 0
218 00be DA65 str r2, [r3, #92]
219 .LVL13:
220 .LBE32:
221 .LBE33:
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
222 .loc 1 233 0
223 00c0 0C60 str r4, [r1]
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
224 .loc 1 236 0
225 00c2 4260 str r2, [r0, #4]
226 .L8:
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
227 .loc 1 246 0
228 00c4 0020 movs r0, #0
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
229 .loc 1 249 0
230 00c6 0122 movs r2, #1
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
231 .loc 1 246 0
232 00c8 D863 str r0, [r3, #60]
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
233 .loc 1 252 0
234 00ca 83F82400 strb r0, [r3, #36]
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
235 .loc 1 249 0
236 00ce 83F82520 strb r2, [r3, #37]
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
237 .loc 1 255 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
238 00d2 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
239 .L16:
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
240 .loc 1 178 0
241 00d6 1249 ldr r1, .L18+28
242 00d8 0C4A ldr r2, .L18+8
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
243 .loc 1 179 0
244 00da 124C ldr r4, .L18+32
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
245 .loc 1 178 0
246 00dc 0144 add r1, r1, r0
247 00de A2FB0121 umull r2, r1, r2, r1
248 00e2 0909 lsrs r1, r1, #4
249 00e4 8900 lsls r1, r1, #2
250 00e6 9CE7 b .L4
251 .LVL14:
252 .L17:
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
253 .loc 1 216 0
254 00e8 0022 movs r2, #0
255 .LVL15:
256 00ea 5A60 str r2, [r3, #4]
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
257 .loc 1 220 0
258 00ec 46F82120 str r2, [r6, r1, lsl #2]
259 .LVL16:
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
260 .loc 1 223 0
261 00f0 CCF80440 str r4, [ip, #4]
262 .L7:
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
263 .loc 1 240 0
264 00f4 0022 movs r2, #0
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
265 .loc 1 241 0
266 00f6 C3E91522 strd r2, r2, [r3, #84]
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
267 .loc 1 242 0
268 00fa DA65 str r2, [r3, #92]
269 00fc E2E7 b .L8
270 .LVL17:
271 .L9:
272 .LCFI1:
273 .cfi_def_cfa_offset 0
274 .cfi_restore 4
275 .cfi_restore 5
276 .cfi_restore 6
277 .cfi_restore 7
278 .cfi_restore 8
279 .cfi_restore 14
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
280 .loc 1 159 0
281 00fe 0120 movs r0, #1
282 .LVL18:
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
283 .loc 1 255 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
284 0100 7047 bx lr
285 .L19:
286 0102 00BF .align 2
287 .L18:
288 0104 07040240 .word 1073873927
289 0108 F8FBFDBF .word -1073873928
290 010c CDCCCCCC .word -858993459
291 0110 00040240 .word 1073873920
292 0114 20080240 .word 1073874976
293 0118 3F820010 .word 268468799
294 011c 40090240 .word 1073875264
295 0120 F8FFFDBF .word -1073872904
296 0124 00000240 .word 1073872896
297 0128 00080240 .word 1073874944
298 012c 80080240 .word 1073875072
299 .cfi_endproc
300 .LFE329:
302 .section .text.HAL_DMA_DeInit,"ax",%progbits
303 .align 1
304 .p2align 2,,3
305 .global HAL_DMA_DeInit
306 .syntax unified
307 .thumb
308 .thumb_func
309 .fpu fpv4-sp-d16
311 HAL_DMA_DeInit:
312 .LFB330:
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
313 .loc 1 264 0
314 .cfi_startproc
315 @ args = 0, pretend = 0, frame = 0
316 @ frame_needed = 0, uses_anonymous_args = 0
317 @ link register save eliminated.
318 .LVL19:
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
319 .loc 1 267 0
320 0000 0028 cmp r0, #0
321 0002 60D0 beq .L25
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
322 .loc 1 276 0
323 0004 0368 ldr r3, [r0]
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
324 .loc 1 279 0
325 0006 3149 ldr r1, .L31
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
326 .loc 1 276 0
327 0008 1A68 ldr r2, [r3]
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
328 .loc 1 279 0
329 000a 8B42 cmp r3, r1
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
330 .loc 1 276 0
331 000c 22F00102 bic r2, r2, #1
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
332 .loc 1 264 0
333 0010 F0B4 push {r4, r5, r6, r7}
334 .LCFI2:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
335 .cfi_def_cfa_offset 16
336 .cfi_offset 4, -16
337 .cfi_offset 5, -12
338 .cfi_offset 6, -8
339 .cfi_offset 7, -4
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
340 .loc 1 276 0
341 0012 1A60 str r2, [r3]
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
342 .loc 1 279 0
343 0014 41D9 bls .L30
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2;
344 .loc 1 288 0
345 0016 2E4A ldr r2, .L31+4
346 0018 2E49 ldr r1, .L31+8
347 001a 2F4C ldr r4, .L31+12
348 001c 0464 str r4, [r0, #64]
349 001e 1A44 add r2, r2, r3
350 0020 A1FB0212 umull r1, r2, r1, r2
351 0024 1209 lsrs r2, r2, #4
352 0026 9200 lsls r2, r2, #2
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
353 .loc 1 296 0
354 0028 02F01F05 and r5, r2, #31
355 002c 0121 movs r1, #1
356 002e A940 lsls r1, r1, r5
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
357 .loc 1 293 0
358 0030 0026 movs r6, #0
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
359 .loc 1 296 0
360 0032 2A4D ldr r5, .L31+16
361 0034 4264 str r2, [r0, #68]
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
362 .loc 1 293 0
363 0036 1E60 str r6, [r3]
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
364 .loc 1 296 0
365 0038 6160 str r1, [r4, #4]
366 .LVL20:
367 .L23:
368 .LBB34:
369 .LBB35:
1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelInde
370 .loc 1 1069 0
371 003a 2649 ldr r1, .L31+8
1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatusMask = 1UL << (channel_number & 0x1FU);
372 .loc 1 1071 0
373 003c 284C ldr r4, .L31+20
374 003e C464 str r4, [r0, #76]
1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannel = (DMAMUX_Channel_TypeDef *)(uint32_t)(dmamux_base_addr + ((hdma->ChannelInde
375 .loc 1 1069 0
376 0040 DBB2 uxtb r3, r3
377 .LVL21:
378 0042 083B subs r3, r3, #8
379 0044 A1FB0313 umull r1, r3, r1, r3
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
380 .loc 1 1070 0
381 0048 9208 lsrs r2, r2, #2
1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
382 .loc 1 1072 0
383 004a C3F30413 ubfx r3, r3, #4, #5
384 004e 0121 movs r1, #1
385 0050 01FA03F3 lsl r3, r1, r3
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
386 .loc 1 1070 0
387 0054 05EB8207 add r7, r5, r2, lsl #2
388 .LBE35:
389 .LBE34:
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
390 .loc 1 304 0
391 0058 0026 movs r6, #0
392 .LBB37:
393 .LBB36:
1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
394 .loc 1 1072 0
395 005a 0365 str r3, [r0, #80]
396 .LVL22:
1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxChannelStatus = DMAMUX1_ChannelStatus;
397 .loc 1 1070 0
398 005c 8764 str r7, [r0, #72]
399 .LBE36:
400 .LBE37:
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
401 .loc 1 304 0
402 005e 45F82260 str r6, [r5, r2, lsl #2]
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
403 .loc 1 307 0
404 0062 6360 str r3, [r4, #4]
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
405 .loc 1 310 0
406 0064 4468 ldr r4, [r0, #4]
407 0066 621E subs r2, r4, #1
408 0068 032A cmp r2, #3
409 006a 06D8 bhi .L24
410 .LVL23:
411 .LBB38:
412 .LBB39:
1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
413 .loc 1 1087 0
414 006c 1D4B ldr r3, .L31+24
415 006e 2344 add r3, r3, r4
416 0070 9B00 lsls r3, r3, #2
417 .LBE39:
418 .LBE38:
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
419 .loc 1 321 0
420 0072 1D4C ldr r4, .L31+28
421 .LVL24:
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
422 .loc 1 318 0
423 0074 1E60 str r6, [r3]
424 .LBB41:
425 .LBB40:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
426 .loc 1 1091 0
427 0076 9140 lsls r1, r1, r2
428 .LVL25:
429 .LBE40:
430 .LBE41:
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
431 .loc 1 321 0
432 0078 6160 str r1, [r4, #4]
433 .L24:
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatus = 0U;
434 .loc 1 324 0
435 007a 0023 movs r3, #0
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
436 .loc 1 335 0
437 007c C363 str r3, [r0, #60]
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DMAmuxRequestGenStatusMask = 0U;
438 .loc 1 325 0
439 007e C0E91533 strd r3, r3, [r0, #84]
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
440 .loc 1 326 0
441 0082 C365 str r3, [r0, #92]
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
442 .loc 1 330 0
443 0084 C0E90B33 strd r3, r3, [r0, #44]
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
444 .loc 1 332 0
445 0088 C0E90D33 strd r3, r3, [r0, #52]
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
446 .loc 1 338 0
447 008c 80F82530 strb r3, [r0, #37]
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
448 .loc 1 341 0
449 0090 80F82430 strb r3, [r0, #36]
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
450 .loc 1 344 0
451 0094 F0BC pop {r4, r5, r6, r7}
452 .LCFI3:
453 .cfi_remember_state
454 .cfi_restore 7
455 .cfi_restore 6
456 .cfi_restore 5
457 .cfi_restore 4
458 .cfi_def_cfa_offset 0
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
459 .loc 1 343 0
460 0096 1846 mov r0, r3
461 .LVL26:
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
462 .loc 1 344 0
463 0098 7047 bx lr
464 .LVL27:
465 .L30:
466 .LCFI4:
467 .cfi_restore_state
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1;
468 .loc 1 282 0
469 009a 144A ldr r2, .L31+32
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
470 009c 0D49 ldr r1, .L31+8
471 009e 144C ldr r4, .L31+36
472 00a0 0464 str r4, [r0, #64]
473 00a2 1A44 add r2, r2, r3
474 00a4 A1FB0212 umull r1, r2, r1, r2
475 00a8 1209 lsrs r2, r2, #4
476 00aa 9200 lsls r2, r2, #2
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
477 .loc 1 296 0
478 00ac 02F01F05 and r5, r2, #31
479 00b0 0121 movs r1, #1
480 00b2 A940 lsls r1, r1, r5
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
481 .loc 1 293 0
482 00b4 0025 movs r5, #0
483 00b6 4264 str r2, [r0, #68]
484 00b8 1D60 str r5, [r3]
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
485 .loc 1 296 0
486 00ba 05F18045 add r5, r5, #1073741824
487 00be 05F50235 add r5, r5, #133120
488 00c2 6160 str r1, [r4, #4]
489 .LVL28:
490 00c4 B9E7 b .L23
491 .LVL29:
492 .L25:
493 .LCFI5:
494 .cfi_def_cfa_offset 0
495 .cfi_restore 4
496 .cfi_restore 5
497 .cfi_restore 6
498 .cfi_restore 7
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
499 .loc 1 269 0
500 00c6 0120 movs r0, #1
501 .LVL30:
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
502 .loc 1 344 0
503 00c8 7047 bx lr
504 .L32:
505 00ca 00BF .align 2
506 .L31:
507 00cc 07040240 .word 1073873927
508 00d0 F8FBFDBF .word -1073873928
509 00d4 CDCCCCCC .word -858993459
510 00d8 00040240 .word 1073873920
511 00dc 20080240 .word 1073874976
512 00e0 80080240 .word 1073875072
513 00e4 3F820010 .word 268468799
514 00e8 40090240 .word 1073875264
515 00ec F8FFFDBF .word -1073872904
516 00f0 00000240 .word 1073872896
517 .cfi_endproc
518 .LFE330:
520 .section .text.HAL_DMA_Start,"ax",%progbits
521 .align 1
522 .p2align 2,,3
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
523 .global HAL_DMA_Start
524 .syntax unified
525 .thumb
526 .thumb_func
527 .fpu fpv4-sp-d16
529 HAL_DMA_Start:
530 .LFB331:
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
531 .loc 1 379 0
532 .cfi_startproc
533 @ args = 0, pretend = 0, frame = 0
534 @ frame_needed = 0, uses_anonymous_args = 0
535 @ link register save eliminated.
536 .LVL31:
537 0000 F0B4 push {r4, r5, r6, r7}
538 .LCFI6:
539 .cfi_def_cfa_offset 16
540 .cfi_offset 4, -16
541 .cfi_offset 5, -12
542 .cfi_offset 6, -8
543 .cfi_offset 7, -4
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
544 .loc 1 386 0
545 0002 90F82440 ldrb r4, [r0, #36] @ zero_extendqisi2
546 0006 012C cmp r4, #1
547 0008 36D0 beq .L39
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
548 .loc 1 388 0 discriminator 2
549 000a 90F82540 ldrb r4, [r0, #37] @ zero_extendqisi2
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
550 .loc 1 386 0 discriminator 2
551 000e 0125 movs r5, #1
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
552 .loc 1 388 0 discriminator 2
553 0010 AC42 cmp r4, r5
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
554 .loc 1 386 0 discriminator 2
555 0012 80F82450 strb r5, [r0, #36]
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
556 .loc 1 388 0 discriminator 2
557 0016 29D1 bne .L35
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
558 .loc 1 395 0
559 0018 0468 ldr r4, [r0]
560 .LBB42:
561 .LBB43:
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
562 .loc 1 1005 0
563 001a C76C ldr r7, [r0, #76]
564 .LBE43:
565 .LBE42:
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
566 .loc 1 391 0
567 001c 0226 movs r6, #2
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
568 .loc 1 392 0
569 001e 0025 movs r5, #0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
570 .loc 1 391 0
571 0020 80F82560 strb r6, [r0, #37]
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
572 .loc 1 392 0
573 0024 C563 str r5, [r0, #60]
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
574 .loc 1 395 0
575 0026 2568 ldr r5, [r4]
576 .LBB46:
577 .LBB44:
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
578 .loc 1 1005 0
579 0028 D0E914C6 ldrd ip, r6, [r0, #80]
580 .LBE44:
581 .LBE46:
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
582 .loc 1 395 0
583 002c 25F00105 bic r5, r5, #1
584 0030 2560 str r5, [r4]
585 .LVL32:
586 .LBB47:
587 .LBB45:
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
588 .loc 1 1005 0
589 0032 C7F804C0 str ip, [r7, #4]
1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
590 .loc 1 1007 0
591 0036 16B1 cbz r6, .L36
1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
592 .loc 1 1010 0
593 0038 D0E91656 ldrd r5, r6, [r0, #88]
594 003c 6E60 str r6, [r5, #4]
595 .L36:
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
596 .loc 1 1014 0
597 003e D0E91075 ldrd r7, r5, [r0, #64]
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
598 .loc 1 1020 0
599 0042 8668 ldr r6, [r0, #8]
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
600 .loc 1 1014 0
601 0044 05F01F05 and r5, r5, #31
602 0048 0120 movs r0, #1
603 .LVL33:
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
604 .loc 1 1020 0
605 004a 102E cmp r6, #16
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
606 .loc 1 1014 0
607 004c 00FA05F0 lsl r0, r0, r5
608 0050 7860 str r0, [r7, #4]
1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
609 .loc 1 1017 0
610 0052 6360 str r3, [r4, #4]
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
611 .loc 1 1023 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
612 0054 0BBF itete eq
613 0056 A260 streq r2, [r4, #8]
1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
614 .loc 1 1032 0
615 0058 A160 strne r1, [r4, #8]
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
616 .loc 1 1026 0
617 005a E160 streq r1, [r4, #12]
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
618 .loc 1 1035 0
619 005c E260 strne r2, [r4, #12]
620 .LVL34:
621 .LBE45:
622 .LBE47:
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
623 .loc 1 401 0
624 005e 2368 ldr r3, [r4]
625 .LVL35:
626 0060 43F00103 orr r3, r3, #1
627 0064 2360 str r3, [r4]
628 .LVL36:
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
629 .loc 1 380 0
630 0066 0020 movs r0, #0
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
631 .loc 1 410 0
632 0068 F0BC pop {r4, r5, r6, r7}
633 .LCFI7:
634 .cfi_remember_state
635 .cfi_restore 7
636 .cfi_restore 6
637 .cfi_restore 5
638 .cfi_restore 4
639 .cfi_def_cfa_offset 0
640 006a 7047 bx lr
641 .LVL37:
642 .L35:
643 .LCFI8:
644 .cfi_restore_state
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** status = HAL_BUSY;
645 .loc 1 406 0
646 006c 0023 movs r3, #0
647 .LVL38:
648 006e 80F82430 strb r3, [r0, #36]
649 .LVL39:
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
650 .loc 1 410 0
651 0072 F0BC pop {r4, r5, r6, r7}
652 .LCFI9:
653 .cfi_remember_state
654 .cfi_restore 7
655 .cfi_restore 6
656 .cfi_restore 5
657 .cfi_restore 4
658 .cfi_def_cfa_offset 0
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
659 .loc 1 407 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
660 0074 0220 movs r0, #2
661 .LVL40:
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
662 .loc 1 410 0
663 0076 7047 bx lr
664 .LVL41:
665 .L39:
666 .LCFI10:
667 .cfi_restore_state
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
668 .loc 1 386 0
669 0078 0220 movs r0, #2
670 .LVL42:
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
671 .loc 1 410 0
672 007a F0BC pop {r4, r5, r6, r7}
673 .LCFI11:
674 .cfi_restore 7
675 .cfi_restore 6
676 .cfi_restore 5
677 .cfi_restore 4
678 .cfi_def_cfa_offset 0
679 007c 7047 bx lr
680 .cfi_endproc
681 .LFE331:
683 007e 00BF .section .text.HAL_DMA_Start_IT,"ax",%progbits
684 .align 1
685 .p2align 2,,3
686 .global HAL_DMA_Start_IT
687 .syntax unified
688 .thumb
689 .thumb_func
690 .fpu fpv4-sp-d16
692 HAL_DMA_Start_IT:
693 .LFB332:
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
694 .loc 1 423 0
695 .cfi_startproc
696 @ args = 0, pretend = 0, frame = 0
697 @ frame_needed = 0, uses_anonymous_args = 0
698 @ link register save eliminated.
699 .LVL43:
700 0000 F0B4 push {r4, r5, r6, r7}
701 .LCFI12:
702 .cfi_def_cfa_offset 16
703 .cfi_offset 4, -16
704 .cfi_offset 5, -12
705 .cfi_offset 6, -8
706 .cfi_offset 7, -4
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
707 .loc 1 430 0
708 0002 90F82440 ldrb r4, [r0, #36] @ zero_extendqisi2
709 0006 012C cmp r4, #1
710 0008 4AD0 beq .L54
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
711 .loc 1 432 0 discriminator 2
712 000a 90F82540 ldrb r4, [r0, #37] @ zero_extendqisi2
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
713 .loc 1 430 0 discriminator 2
714 000e 0125 movs r5, #1
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
715 .loc 1 432 0 discriminator 2
716 0010 AC42 cmp r4, r5
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
717 .loc 1 430 0 discriminator 2
718 0012 80F82450 strb r5, [r0, #36]
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
719 .loc 1 432 0 discriminator 2
720 0016 3DD1 bne .L46
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
721 .loc 1 439 0
722 0018 0468 ldr r4, [r0]
723 .LBB48:
724 .LBB49:
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
725 .loc 1 1005 0
726 001a C76C ldr r7, [r0, #76]
727 .LBE49:
728 .LBE48:
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
729 .loc 1 435 0
730 001c 0226 movs r6, #2
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
731 .loc 1 436 0
732 001e 0025 movs r5, #0
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE;
733 .loc 1 435 0
734 0020 80F82560 strb r6, [r0, #37]
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
735 .loc 1 436 0
736 0024 C563 str r5, [r0, #60]
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
737 .loc 1 439 0
738 0026 2668 ldr r6, [r4]
739 .LBB53:
740 .LBB50:
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
741 .loc 1 1005 0
742 0028 D0E914C5 ldrd ip, r5, [r0, #80]
743 .LBE50:
744 .LBE53:
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
745 .loc 1 439 0
746 002c 26F00106 bic r6, r6, #1
747 0030 2660 str r6, [r4]
748 .LVL44:
749 .LBB54:
750 .LBB51:
1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
751 .loc 1 1005 0
752 0032 C7F804C0 str ip, [r7, #4]
1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
753 .loc 1 1007 0
754 0036 15B1 cbz r5, .L47
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
755 .loc 1 1010 0
756 0038 D0E91667 ldrd r6, r7, [r0, #88]
757 003c 7760 str r7, [r6, #4]
758 .L47:
759 .LVL45:
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
760 .loc 1 1014 0
761 003e 466C ldr r6, [r0, #68]
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
762 .loc 1 1020 0
763 0040 D0F808C0 ldr ip, [r0, #8]
1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
764 .loc 1 1014 0
765 0044 06F01F07 and r7, r6, #31
766 0048 0126 movs r6, #1
767 004a BE40 lsls r6, r6, r7
768 004c 076C ldr r7, [r0, #64]
769 004e 7E60 str r6, [r7, #4]
1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
770 .loc 1 1017 0
771 0050 6360 str r3, [r4, #4]
772 .LBE51:
773 .LBE54:
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
774 .loc 1 446 0
775 0052 036B ldr r3, [r0, #48]
776 .LVL46:
777 .LBB55:
778 .LBB52:
1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
779 .loc 1 1020 0
780 0054 BCF1100F cmp ip, #16
1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
781 .loc 1 1023 0
782 0058 0BBF itete eq
783 005a A260 streq r2, [r4, #8]
1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
784 .loc 1 1032 0
785 005c A160 strne r1, [r4, #8]
1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
786 .loc 1 1026 0
787 005e E160 streq r1, [r4, #12]
1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
788 .loc 1 1035 0
789 0060 E260 strne r2, [r4, #12]
790 .LBE52:
791 .LBE55:
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
792 .loc 1 446 0
793 0062 03B3 cbz r3, .L50
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
794 .loc 1 449 0
795 0064 2368 ldr r3, [r4]
796 0066 43F00E03 orr r3, r3, #14
797 006a 2360 str r3, [r4]
798 .LVL47:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
799 .L51:
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
800 .loc 1 458 0
801 006c 836C ldr r3, [r0, #72]
802 006e 1A68 ldr r2, [r3]
803 .LVL48:
804 0070 D203 lsls r2, r2, #15
805 0072 03D5 bpl .L52
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
806 .loc 1 461 0
807 0074 1A68 ldr r2, [r3]
808 0076 42F48072 orr r2, r2, #256
809 007a 1A60 str r2, [r3]
810 .L52:
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
811 .loc 1 464 0
812 007c 1DB1 cbz r5, .L53
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
813 .loc 1 468 0
814 007e 2B68 ldr r3, [r5]
815 0080 43F48073 orr r3, r3, #256
816 0084 2B60 str r3, [r5]
817 .L53:
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
818 .loc 1 472 0
819 0086 2368 ldr r3, [r4]
820 0088 43F00103 orr r3, r3, #1
821 008c 2360 str r3, [r4]
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
822 .loc 1 424 0
823 008e 0020 movs r0, #0
824 .LVL49:
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
825 .loc 1 483 0
826 0090 F0BC pop {r4, r5, r6, r7}
827 .LCFI13:
828 .cfi_remember_state
829 .cfi_restore 7
830 .cfi_restore 6
831 .cfi_restore 5
832 .cfi_restore 4
833 .cfi_def_cfa_offset 0
834 0092 7047 bx lr
835 .LVL50:
836 .L46:
837 .LCFI14:
838 .cfi_restore_state
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
839 .loc 1 477 0
840 0094 0023 movs r3, #0
841 .LVL51:
842 0096 80F82430 strb r3, [r0, #36]
843 .LVL52:
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
844 .loc 1 483 0
845 009a F0BC pop {r4, r5, r6, r7}
846 .LCFI15:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
847 .cfi_remember_state
848 .cfi_restore 7
849 .cfi_restore 6
850 .cfi_restore 5
851 .cfi_restore 4
852 .cfi_def_cfa_offset 0
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
853 .loc 1 480 0
854 009c 0220 movs r0, #2
855 .LVL53:
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
856 .loc 1 483 0
857 009e 7047 bx lr
858 .LVL54:
859 .L54:
860 .LCFI16:
861 .cfi_restore_state
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
862 .loc 1 430 0
863 00a0 0220 movs r0, #2
864 .LVL55:
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
865 .loc 1 483 0
866 00a2 F0BC pop {r4, r5, r6, r7}
867 .LCFI17:
868 .cfi_remember_state
869 .cfi_restore 7
870 .cfi_restore 6
871 .cfi_restore 5
872 .cfi_restore 4
873 .cfi_def_cfa_offset 0
874 00a4 7047 bx lr
875 .LVL56:
876 .L50:
877 .LCFI18:
878 .cfi_restore_state
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
879 .loc 1 453 0
880 00a6 2368 ldr r3, [r4]
881 00a8 23F00403 bic r3, r3, #4
882 00ac 2360 str r3, [r4]
883 .LVL57:
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
884 .loc 1 454 0
885 00ae 2368 ldr r3, [r4]
886 00b0 43F00A03 orr r3, r3, #10
887 00b4 2360 str r3, [r4]
888 00b6 D9E7 b .L51
889 .cfi_endproc
890 .LFE332:
892 .section .text.HAL_DMA_Abort,"ax",%progbits
893 .align 1
894 .p2align 2,,3
895 .global HAL_DMA_Abort
896 .syntax unified
897 .thumb
898 .thumb_func
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
899 .fpu fpv4-sp-d16
901 HAL_DMA_Abort:
902 .LFB333:
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
903 .loc 1 492 0
904 .cfi_startproc
905 @ args = 0, pretend = 0, frame = 0
906 @ frame_needed = 0, uses_anonymous_args = 0
907 @ link register save eliminated.
908 .LVL58:
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
909 .loc 1 495 0
910 0000 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2
911 0004 022A cmp r2, #2
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
912 .loc 1 492 0
913 0006 0346 mov r3, r0
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
914 .loc 1 495 0
915 0008 09D0 beq .L66
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
916 .loc 1 498 0
917 000a 0422 movs r2, #4
918 000c C263 str r2, [r0, #60]
919 .LVL59:
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
920 .loc 1 530 0
921 000e 0121 movs r1, #1
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
922 .loc 1 533 0
923 0010 0022 movs r2, #0
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
924 .loc 1 500 0
925 0012 0120 movs r0, #1
926 .LVL60:
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
927 .loc 1 530 0
928 0014 83F82510 strb r1, [r3, #37]
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
929 .loc 1 533 0
930 0018 83F82420 strb r2, [r3, #36]
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
931 .loc 1 536 0
932 001c 7047 bx lr
933 .LVL61:
934 .L66:
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
935 .loc 1 505 0
936 001e 0268 ldr r2, [r0]
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
937 .loc 1 492 0
938 0020 70B4 push {r4, r5, r6}
939 .LCFI19:
940 .cfi_def_cfa_offset 12
941 .cfi_offset 4, -12
942 .cfi_offset 5, -8
943 .cfi_offset 6, -4
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
944 .loc 1 508 0
945 0022 846C ldr r4, [r0, #72]
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
946 .loc 1 505 0
947 0024 1068 ldr r0, [r2]
948 .LVL62:
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
949 .loc 1 517 0
950 0026 DE6C ldr r6, [r3, #76]
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
951 .loc 1 505 0
952 0028 20F00E00 bic r0, r0, #14
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
953 .loc 1 514 0
954 002c D3E91051 ldrd r5, r1, [r3, #64]
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
955 .loc 1 505 0
956 0030 1060 str r0, [r2]
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
957 .loc 1 508 0
958 0032 2068 ldr r0, [r4]
959 0034 20F48070 bic r0, r0, #256
960 0038 2060 str r0, [r4]
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
961 .loc 1 511 0
962 003a 1468 ldr r4, [r2]
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
963 .loc 1 519 0
964 003c 586D ldr r0, [r3, #84]
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
965 .loc 1 511 0
966 003e 24F00104 bic r4, r4, #1
967 0042 1460 str r4, [r2]
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
968 .loc 1 514 0
969 0044 01F01F01 and r1, r1, #31
970 0048 0122 movs r2, #1
971 004a 8A40 lsls r2, r2, r1
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
972 .loc 1 517 0
973 004c 196D ldr r1, [r3, #80]
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
974 .loc 1 514 0
975 004e 6A60 str r2, [r5, #4]
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
976 .loc 1 517 0
977 0050 7160 str r1, [r6, #4]
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
978 .loc 1 519 0
979 0052 38B1 cbz r0, .L67
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
980 .loc 1 523 0
981 0054 0268 ldr r2, [r0]
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
982 .loc 1 526 0
983 0056 D3E91614 ldrd r1, r4, [r3, #88]
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
984 .loc 1 523 0
985 005a 22F48072 bic r2, r2, #256
986 005e 0260 str r2, [r0]
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
987 .loc 1 493 0
988 0060 0020 movs r0, #0
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
989 .loc 1 526 0
990 0062 4C60 str r4, [r1, #4]
991 .L67:
992 .LVL63:
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
993 .loc 1 530 0
994 0064 0121 movs r1, #1
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
995 .loc 1 533 0
996 0066 0022 movs r2, #0
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
997 .loc 1 530 0
998 0068 83F82510 strb r1, [r3, #37]
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
999 .loc 1 533 0
1000 006c 83F82420 strb r2, [r3, #36]
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1001 .loc 1 536 0
1002 0070 70BC pop {r4, r5, r6}
1003 .LCFI20:
1004 .cfi_restore 6
1005 .cfi_restore 5
1006 .cfi_restore 4
1007 .cfi_def_cfa_offset 0
1008 0072 7047 bx lr
1009 .cfi_endproc
1010 .LFE333:
1012 .section .text.HAL_DMA_Abort_IT,"ax",%progbits
1013 .align 1
1014 .p2align 2,,3
1015 .global HAL_DMA_Abort_IT
1016 .syntax unified
1017 .thumb
1018 .thumb_func
1019 .fpu fpv4-sp-d16
1021 HAL_DMA_Abort_IT:
1022 .LFB334:
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
1023 .loc 1 545 0
1024 .cfi_startproc
1025 @ args = 0, pretend = 0, frame = 0
1026 @ frame_needed = 0, uses_anonymous_args = 0
1027 .LVL64:
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1028 .loc 1 548 0
1029 0000 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
1030 0004 022B cmp r3, #2
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
1031 .loc 1 545 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1032 0006 70B5 push {r4, r5, r6, lr}
1033 .LCFI21:
1034 .cfi_def_cfa_offset 16
1035 .cfi_offset 4, -16
1036 .cfi_offset 5, -12
1037 .cfi_offset 6, -8
1038 .cfi_offset 14, -4
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1039 .loc 1 548 0
1040 0008 0AD0 beq .L73
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1041 .loc 1 554 0
1042 000a 0122 movs r2, #1
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1043 .loc 1 551 0
1044 000c 0423 movs r3, #4
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1045 .loc 1 557 0
1046 000e 0021 movs r1, #0
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1047 .loc 1 551 0
1048 0010 C363 str r3, [r0, #60]
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1049 .loc 1 559 0
1050 0012 1446 mov r4, r2
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1051 .loc 1 554 0
1052 0014 80F82520 strb r2, [r0, #37]
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1053 .loc 1 557 0
1054 0018 80F82410 strb r1, [r0, #36]
1055 .LVL65:
1056 .L74:
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1057 .loc 1 601 0
1058 001c 2046 mov r0, r4
1059 .LVL66:
1060 001e 70BD pop {r4, r5, r6, pc}
1061 .LVL67:
1062 .L73:
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1063 .loc 1 564 0
1064 0020 0368 ldr r3, [r0]
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1065 .loc 1 570 0
1066 0022 856C ldr r5, [r0, #72]
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1067 .loc 1 564 0
1068 0024 1968 ldr r1, [r3]
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1069 .loc 1 576 0
1070 0026 C66C ldr r6, [r0, #76]
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1071 .loc 1 564 0
1072 0028 21F00E01 bic r1, r1, #14
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1073 .loc 1 573 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1074 002c D0E91042 ldrd r4, r2, [r0, #64]
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1075 .loc 1 564 0
1076 0030 1960 str r1, [r3]
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1077 .loc 1 567 0
1078 0032 1968 ldr r1, [r3]
1079 0034 21F00101 bic r1, r1, #1
1080 0038 1960 str r1, [r3]
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1081 .loc 1 570 0
1082 003a 2B68 ldr r3, [r5]
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1083 .loc 1 578 0
1084 003c 416D ldr r1, [r0, #84]
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1085 .loc 1 570 0
1086 003e 23F48073 bic r3, r3, #256
1087 0042 2B60 str r3, [r5]
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1088 .loc 1 573 0
1089 0044 02F01F02 and r2, r2, #31
1090 0048 0123 movs r3, #1
1091 004a 9340 lsls r3, r3, r2
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1092 .loc 1 576 0
1093 004c 026D ldr r2, [r0, #80]
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1094 .loc 1 573 0
1095 004e 6360 str r3, [r4, #4]
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1096 .loc 1 576 0
1097 0050 7260 str r2, [r6, #4]
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1098 .loc 1 578 0
1099 0052 31B1 cbz r1, .L75
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1100 .loc 1 582 0
1101 0054 0B68 ldr r3, [r1]
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1102 .loc 1 585 0
1103 0056 D0E91624 ldrd r2, r4, [r0, #88]
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1104 .loc 1 582 0
1105 005a 23F48073 bic r3, r3, #256
1106 005e 0B60 str r3, [r1]
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1107 .loc 1 585 0
1108 0060 5460 str r4, [r2, #4]
1109 .L75:
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1110 .loc 1 595 0
1111 0062 836B ldr r3, [r0, #56]
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1112 .loc 1 589 0
1113 0064 0122 movs r2, #1
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1114 .loc 1 592 0
1115 0066 0024 movs r4, #0
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1116 .loc 1 589 0
1117 0068 80F82520 strb r2, [r0, #37]
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1118 .loc 1 592 0
1119 006c 80F82440 strb r4, [r0, #36]
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1120 .loc 1 595 0
1121 0070 13B1 cbz r3, .L76
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1122 .loc 1 597 0
1123 0072 9847 blx r3
1124 .LVL68:
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1125 .loc 1 601 0
1126 0074 2046 mov r0, r4
1127 0076 70BD pop {r4, r5, r6, pc}
1128 .LVL69:
1129 .L76:
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1130 .loc 1 546 0
1131 0078 1C46 mov r4, r3
1132 007a CFE7 b .L74
1133 .cfi_endproc
1134 .LFE334:
1136 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits
1137 .align 1
1138 .p2align 2,,3
1139 .global HAL_DMA_PollForTransfer
1140 .syntax unified
1141 .thumb
1142 .thumb_func
1143 .fpu fpv4-sp-d16
1145 HAL_DMA_PollForTransfer:
1146 .LFB335:
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t temp;
1147 .loc 1 613 0
1148 .cfi_startproc
1149 @ args = 0, pretend = 0, frame = 0
1150 @ frame_needed = 0, uses_anonymous_args = 0
1151 .LVL70:
1152 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr}
1153 .LCFI22:
1154 .cfi_def_cfa_offset 32
1155 .cfi_offset 3, -32
1156 .cfi_offset 4, -28
1157 .cfi_offset 5, -24
1158 .cfi_offset 6, -20
1159 .cfi_offset 7, -16
1160 .cfi_offset 8, -12
1161 .cfi_offset 9, -8
1162 .cfi_offset 14, -4
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1163 .loc 1 617 0
1164 0004 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1165 0008 DBB2 uxtb r3, r3
1166 000a 022B cmp r3, #2
1167 000c 07D0 beq .L82
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
1168 .loc 1 620 0
1169 000e 0422 movs r2, #4
1170 .LVL71:
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
1171 .loc 1 621 0
1172 0010 0023 movs r3, #0
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** __HAL_UNLOCK(hdma);
1173 .loc 1 620 0
1174 0012 C263 str r2, [r0, #60]
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
1175 .loc 1 621 0
1176 0014 80F82430 strb r3, [r0, #36]
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1177 .loc 1 622 0
1178 0018 0120 movs r0, #1
1179 .LVL72:
1180 .L83:
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1181 .loc 1 733 0
1182 001a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc}
1183 .LVL73:
1184 .L82:
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1185 .loc 1 626 0
1186 001e 0468 ldr r4, [r0]
1187 0020 2468 ldr r4, [r4]
1188 0022 A406 lsls r4, r4, #26
1189 0024 3ED4 bmi .L111
1190 0026 456C ldr r5, [r0, #68]
1191 0028 05F01F05 and r5, r5, #31
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1192 .loc 1 633 0
1193 002c 0029 cmp r1, #0
1194 002e 37D1 bne .L85
1195 .L110:
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1196 .loc 1 642 0
1197 0030 03FA05F5 lsl r5, r3, r5
1198 .LVL74:
1199 0034 1746 mov r7, r2
1200 0036 0E46 mov r6, r1
1201 0038 0446 mov r4, r0
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1202 .loc 1 646 0
1203 003a FFF7FEFF bl HAL_GetTick
1204 .LVL75:
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1205 .loc 1 650 0
1206 003e 4FF00808 mov r8, #8
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1207 .loc 1 646 0
1208 0042 8146 mov r9, r0
1209 .LVL76:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1210 .L87:
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1211 .loc 1 648 0
1212 0044 D4E91031 ldrd r3, r1, [r4, #64]
1213 0048 7A1C adds r2, r7, #1
1214 004a 01F01F01 and r1, r1, #31
1215 004e 2FD1 bne .L90
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1216 .loc 1 650 0
1217 0050 0820 movs r0, #8
1218 0052 8840 lsls r0, r0, r1
1219 0054 02E0 b .L93
1220 .L112:
1221 0056 1A68 ldr r2, [r3]
1222 0058 0242 tst r2, r0
1223 005a 43D1 bne .L92
1224 .L93:
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1225 .loc 1 648 0
1226 005c 1A68 ldr r2, [r3]
1227 005e 2A42 tst r2, r5
1228 0060 F9D0 beq .L112
1229 .L91:
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1230 .loc 1 688 0
1231 0062 626D ldr r2, [r4, #84]
1232 0064 22B1 cbz r2, .L95
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1233 .loc 1 691 0
1234 0066 D4E91605 ldrd r0, r5, [r4, #88]
1235 .LVL77:
1236 006a 0768 ldr r7, [r0]
1237 .LVL78:
1238 006c 2F42 tst r7, r5
1239 006e 4AD1 bne .L113
1240 .L95:
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1241 .loc 1 705 0
1242 0070 D4E91320 ldrd r2, r0, [r4, #76]
1243 0074 1568 ldr r5, [r2]
1244 0076 0542 tst r5, r0
1245 0078 04D0 beq .L96
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1246 .loc 1 708 0
1247 007a 5060 str r0, [r2, #4]
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1248 .loc 1 711 0
1249 007c E26B ldr r2, [r4, #60]
1250 007e 42F40072 orr r2, r2, #512
1251 0082 E263 str r2, [r4, #60]
1252 .L96:
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1253 .loc 1 714 0
1254 0084 002E cmp r6, #0
1255 0086 39D1 bne .L97
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1256 .loc 1 717 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1257 0088 0222 movs r2, #2
1258 008a 02FA01F1 lsl r1, r2, r1
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1259 .loc 1 721 0
1260 008e 0122 movs r2, #1
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1261 .loc 1 717 0
1262 0090 5960 str r1, [r3, #4]
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1263 .loc 1 721 0
1264 0092 84F82520 strb r2, [r4, #37]
1265 .L98:
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1266 .loc 1 730 0
1267 0096 0020 movs r0, #0
1268 0098 84F82400 strb r0, [r4, #36]
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1269 .loc 1 733 0
1270 009c BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc}
1271 .LVL79:
1272 .L85:
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1273 .loc 1 642 0
1274 00a0 0423 movs r3, #4
1275 00a2 C5E7 b .L110
1276 .L111:
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return HAL_ERROR;
1277 .loc 1 628 0
1278 00a4 4FF48073 mov r3, #256
1279 00a8 C363 str r3, [r0, #60]
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1280 .loc 1 629 0
1281 00aa 0120 movs r0, #1
1282 .LVL80:
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1283 .loc 1 733 0
1284 00ac BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc}
1285 .LVL81:
1286 .L90:
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1287 .loc 1 648 0
1288 00b0 1A68 ldr r2, [r3]
1289 00b2 2A42 tst r2, r5
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1290 .loc 1 650 0
1291 00b4 08FA01F0 lsl r0, r8, r1
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1292 .loc 1 648 0
1293 00b8 D3D1 bne .L91
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1294 .loc 1 650 0
1295 00ba 1A68 ldr r2, [r3]
1296 00bc 1042 tst r0, r2
1297 00be 11D1 bne .L92
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1298 .loc 1 671 0
1299 00c0 FFF7FEFF bl HAL_GetTick
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1300 .LVL82:
1301 00c4 A0EB0900 sub r0, r0, r9
1302 00c8 B842 cmp r0, r7
1303 00ca 01D8 bhi .L89
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1304 .loc 1 671 0 is_stmt 0 discriminator 1
1305 00cc 002F cmp r7, #0
1306 00ce B9D1 bne .L87
1307 .L89:
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1308 .loc 1 677 0 is_stmt 1
1309 00d0 0123 movs r3, #1
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1310 .loc 1 674 0
1311 00d2 2021 movs r1, #32
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1312 .loc 1 680 0
1313 00d4 0022 movs r2, #0
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1314 .loc 1 674 0
1315 00d6 E163 str r1, [r4, #60]
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1316 .loc 1 682 0
1317 00d8 1846 mov r0, r3
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1318 .loc 1 677 0
1319 00da 84F82530 strb r3, [r4, #37]
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1320 .loc 1 680 0
1321 00de 84F82420 strb r2, [r4, #36]
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1322 .loc 1 682 0
1323 00e2 9AE7 b .L83
1324 .L92:
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1325 .loc 1 655 0
1326 00e4 0122 movs r2, #1
1327 00e6 02FA01F1 lsl r1, r2, r1
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1328 .loc 1 664 0
1329 00ea 0025 movs r5, #0
1330 .LVL83:
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1331 .loc 1 655 0
1332 00ec 5960 str r1, [r3, #4]
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1333 .loc 1 666 0
1334 00ee 1046 mov r0, r2
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1335 .loc 1 658 0
1336 00f0 E263 str r2, [r4, #60]
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1337 .loc 1 664 0
1338 00f2 84F82450 strb r5, [r4, #36]
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1339 .loc 1 661 0
1340 00f6 84F82520 strb r2, [r4, #37]
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1341 .loc 1 666 0
1342 00fa 8EE7 b .L83
1343 .LVL84:
1344 .L97:
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1345 .loc 1 726 0
1346 00fc 0422 movs r2, #4
1347 00fe 02FA01F1 lsl r1, r2, r1
1348 0102 5960 str r1, [r3, #4]
1349 0104 C7E7 b .L98
1350 .L113:
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1351 .loc 1 694 0
1352 0106 1768 ldr r7, [r2]
1353 0108 47F48077 orr r7, r7, #256
1354 010c 1760 str r7, [r2]
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1355 .loc 1 697 0
1356 010e 4560 str r5, [r0, #4]
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1357 .loc 1 700 0
1358 0110 E26B ldr r2, [r4, #60]
1359 0112 42F48062 orr r2, r2, #1024
1360 0116 E263 str r2, [r4, #60]
1361 0118 AAE7 b .L95
1362 .cfi_endproc
1363 .LFE335:
1365 011a 00BF .section .text.HAL_DMA_IRQHandler,"ax",%progbits
1366 .align 1
1367 .p2align 2,,3
1368 .global HAL_DMA_IRQHandler
1369 .syntax unified
1370 .thumb
1371 .thumb_func
1372 .fpu fpv4-sp-d16
1374 HAL_DMA_IRQHandler:
1375 .LFB336:
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR;
1376 .loc 1 742 0
1377 .cfi_startproc
1378 @ args = 0, pretend = 0, frame = 0
1379 @ frame_needed = 0, uses_anonymous_args = 0
1380 @ link register save eliminated.
1381 .LVL85:
1382 0000 70B4 push {r4, r5, r6}
1383 .LCFI23:
1384 .cfi_def_cfa_offset 12
1385 .cfi_offset 4, -12
1386 .cfi_offset 5, -8
1387 .cfi_offset 6, -4
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1388 .loc 1 747 0
1389 0002 D0E91063 ldrd r6, r3, [r0, #64]
1390 0006 0422 movs r2, #4
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR;
1391 .loc 1 743 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1392 0008 3168 ldr r1, [r6]
1393 .LVL86:
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1394 .loc 1 744 0
1395 000a 0568 ldr r5, [r0]
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1396 .loc 1 747 0
1397 000c 03F01F03 and r3, r3, #31
1398 0010 9A40 lsls r2, r2, r3
1399 0012 0A42 tst r2, r1
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1400 .loc 1 744 0
1401 0014 2C68 ldr r4, [r5]
1402 .LVL87:
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1403 .loc 1 747 0
1404 0016 0AD0 beq .L115
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1405 .loc 1 747 0 is_stmt 0 discriminator 1
1406 0018 14F0040F tst r4, #4
1407 001c 07D0 beq .L115
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1408 .loc 1 750 0 is_stmt 1
1409 001e 2B68 ldr r3, [r5]
1410 0020 9B06 lsls r3, r3, #26
1411 0022 37D5 bpl .L148
1412 .L116:
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1413 .loc 1 761 0
1414 0024 036B ldr r3, [r0, #48]
756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1415 .loc 1 756 0
1416 0026 7260 str r2, [r6, #4]
761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1417 .loc 1 761 0
1418 0028 CBB1 cbz r3, .L114
1419 .LVL88:
1420 .L147:
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1421 .loc 1 823 0
1422 002a 70BC pop {r4, r5, r6}
1423 .LCFI24:
1424 .cfi_remember_state
1425 .cfi_restore 6
1426 .cfi_restore 5
1427 .cfi_restore 4
1428 .cfi_def_cfa_offset 0
1429 .LVL89:
788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1430 .loc 1 788 0
1431 002c 1847 bx r3 @ indirect register sibling call
1432 .LVL90:
1433 .L115:
1434 .LCFI25:
1435 .cfi_restore_state
768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TC)))
1436 .loc 1 768 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1437 002e 0222 movs r2, #2
1438 0030 9A40 lsls r2, r2, r3
1439 0032 0A42 tst r2, r1
1440 0034 15D0 beq .L119
769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1441 .loc 1 769 0
1442 0036 14F0020F tst r4, #2
1443 003a 12D0 beq .L119
771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1444 .loc 1 771 0
1445 003c 2B68 ldr r3, [r5]
1446 003e 9906 lsls r1, r3, #26
1447 .LVL91:
1448 0040 06D4 bmi .L120
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1449 .loc 1 774 0
1450 0042 2B68 ldr r3, [r5]
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1451 .loc 1 777 0
1452 0044 0121 movs r1, #1
774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1453 .loc 1 774 0
1454 0046 23F00A03 bic r3, r3, #10
1455 004a 2B60 str r3, [r5]
777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1456 .loc 1 777 0
1457 004c 80F82510 strb r1, [r0, #37]
1458 .L120:
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1459 .loc 1 785 0
1460 0050 C36A ldr r3, [r0, #44]
780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1461 .loc 1 780 0
1462 0052 7260 str r2, [r6, #4]
783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1463 .loc 1 783 0
1464 0054 0022 movs r2, #0
1465 0056 80F82420 strb r2, [r0, #36]
785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1466 .loc 1 785 0
1467 005a 002B cmp r3, #0
1468 005c E5D1 bne .L147
1469 .LVL92:
1470 .L114:
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1471 .loc 1 823 0
1472 005e 70BC pop {r4, r5, r6}
1473 .LCFI26:
1474 .cfi_remember_state
1475 .cfi_restore 6
1476 .cfi_restore 5
1477 .cfi_restore 4
1478 .cfi_def_cfa_offset 0
1479 0060 7047 bx lr
1480 .LVL93:
1481 .L119:
1482 .LCFI27:
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1483 .cfi_restore_state
792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** && (0U != (source_it & DMA_IT_TE)))
1484 .loc 1 792 0
1485 0062 0822 movs r2, #8
1486 0064 9A40 lsls r2, r2, r3
1487 0066 0A42 tst r2, r1
1488 0068 F9D0 beq .L114
793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1489 .loc 1 793 0
1490 006a 2207 lsls r2, r4, #28
1491 006c F7D5 bpl .L114
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1492 .loc 1 798 0
1493 006e 2A68 ldr r2, [r5]
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1494 .loc 1 812 0
1495 0070 416B ldr r1, [r0, #52]
1496 .LVL94:
798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1497 .loc 1 798 0
1498 0072 22F00E02 bic r2, r2, #14
1499 0076 2A60 str r2, [r5]
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1500 .loc 1 801 0
1501 0078 0122 movs r2, #1
1502 007a 02FA03F3 lsl r3, r2, r3
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1503 .loc 1 810 0
1504 007e 0024 movs r4, #0
1505 .LVL95:
801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1506 .loc 1 801 0
1507 0080 7360 str r3, [r6, #4]
804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1508 .loc 1 804 0
1509 0082 C263 str r2, [r0, #60]
810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1510 .loc 1 810 0
1511 0084 80F82440 strb r4, [r0, #36]
807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1512 .loc 1 807 0
1513 0088 80F82520 strb r2, [r0, #37]
812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1514 .loc 1 812 0
1515 008c 0029 cmp r1, #0
1516 008e E6D0 beq .L114
823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1517 .loc 1 823 0
1518 0090 70BC pop {r4, r5, r6}
1519 .LCFI28:
1520 .cfi_remember_state
1521 .cfi_restore 6
1522 .cfi_restore 5
1523 .cfi_restore 4
1524 .cfi_def_cfa_offset 0
815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1525 .loc 1 815 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1526 0092 0847 bx r1 @ indirect register sibling call
1527 .LVL96:
1528 .L148:
1529 .LCFI29:
1530 .cfi_restore_state
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1531 .loc 1 753 0
1532 0094 2B68 ldr r3, [r5]
1533 0096 23F00403 bic r3, r3, #4
1534 009a 2B60 str r3, [r5]
1535 009c C2E7 b .L116
1536 .cfi_endproc
1537 .LFE336:
1539 009e 00BF .section .text.HAL_DMA_RegisterCallback,"ax",%progbits
1540 .align 1
1541 .p2align 2,,3
1542 .global HAL_DMA_RegisterCallback
1543 .syntax unified
1544 .thumb
1545 .thumb_func
1546 .fpu fpv4-sp-d16
1548 HAL_DMA_RegisterCallback:
1549 .LFB337:
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
1550 .loc 1 836 0
1551 .cfi_startproc
1552 @ args = 0, pretend = 0, frame = 0
1553 @ frame_needed = 0, uses_anonymous_args = 0
1554 @ link register save eliminated.
1555 .LVL97:
1556 0000 0346 mov r3, r0
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1557 .loc 1 840 0
1558 0002 90F82400 ldrb r0, [r0, #36] @ zero_extendqisi2
1559 .LVL98:
1560 0006 0128 cmp r0, #1
1561 0008 1FD0 beq .L157
836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
1562 .loc 1 836 0 discriminator 2
1563 000a 10B4 push {r4}
1564 .LCFI30:
1565 .cfi_def_cfa_offset 4
1566 .cfi_offset 4, -4
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1567 .loc 1 842 0 discriminator 2
1568 000c 93F82540 ldrb r4, [r3, #37] @ zero_extendqisi2
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1569 .loc 1 840 0 discriminator 2
1570 0010 0120 movs r0, #1
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1571 .loc 1 842 0 discriminator 2
1572 0012 8442 cmp r4, r0
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1573 .loc 1 840 0 discriminator 2
1574 0014 83F82400 strb r0, [r3, #36]
842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1575 .loc 1 842 0 discriminator 2
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1576 0018 05D0 beq .L164
1577 .L151:
1578 .LVL99:
873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1579 .loc 1 873 0
1580 001a 0022 movs r2, #0
1581 .LVL100:
1582 001c 83F82420 strb r2, [r3, #36]
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1583 .loc 1 876 0
1584 0020 5DF8044B ldr r4, [sp], #4
1585 .LCFI31:
1586 .cfi_remember_state
1587 .cfi_restore 4
1588 .cfi_def_cfa_offset 0
1589 0024 7047 bx lr
1590 .LVL101:
1591 .L164:
1592 .LCFI32:
1593 .cfi_restore_state
844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1594 .loc 1 844 0
1595 0026 0329 cmp r1, #3
1596 0028 11D8 bhi .L159
1597 002a DFE801F0 tbb [pc, r1]
1598 .L153:
1599 002e 0B .byte (.L152-.L153)/2
1600 002f 08 .byte (.L154-.L153)/2
1601 0030 05 .byte (.L155-.L153)/2
1602 0031 02 .byte (.L156-.L153)/2
1603 .p2align 1
1604 .L156:
859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1605 .loc 1 859 0
1606 0032 9A63 str r2, [r3, #56]
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1607 .loc 1 837 0
1608 0034 0020 movs r0, #0
860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1609 .loc 1 860 0
1610 0036 F0E7 b .L151
1611 .L155:
855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1612 .loc 1 855 0
1613 0038 5A63 str r2, [r3, #52]
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1614 .loc 1 837 0
1615 003a 0020 movs r0, #0
856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1616 .loc 1 856 0
1617 003c EDE7 b .L151
1618 .L154:
851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1619 .loc 1 851 0
1620 003e 1A63 str r2, [r3, #48]
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1621 .loc 1 837 0
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1622 0040 0020 movs r0, #0
852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1623 .loc 1 852 0
1624 0042 EAE7 b .L151
1625 .L152:
847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1626 .loc 1 847 0
1627 0044 DA62 str r2, [r3, #44]
837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1628 .loc 1 837 0
1629 0046 0020 movs r0, #0
848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1630 .loc 1 848 0
1631 0048 E7E7 b .L151
1632 .L157:
1633 .LCFI33:
1634 .cfi_def_cfa_offset 0
1635 .cfi_restore 4
840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1636 .loc 1 840 0
1637 004a 0220 movs r0, #2
876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1638 .loc 1 876 0
1639 004c 7047 bx lr
1640 .L159:
863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1641 .loc 1 863 0
1642 004e 0120 movs r0, #1
1643 0050 E3E7 b .L151
1644 .cfi_endproc
1645 .LFE337:
1647 0052 00BF .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits
1648 .align 1
1649 .p2align 2,,3
1650 .global HAL_DMA_UnRegisterCallback
1651 .syntax unified
1652 .thumb
1653 .thumb_func
1654 .fpu fpv4-sp-d16
1656 HAL_DMA_UnRegisterCallback:
1657 .LFB338:
887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK;
1658 .loc 1 887 0
1659 .cfi_startproc
1660 @ args = 0, pretend = 0, frame = 0
1661 @ frame_needed = 0, uses_anonymous_args = 0
1662 @ link register save eliminated.
1663 .LVL102:
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1664 .loc 1 891 0
1665 0000 90F82430 ldrb r3, [r0, #36] @ zero_extendqisi2
1666 0004 012B cmp r3, #1
1667 0006 12D0 beq .L174
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1668 .loc 1 893 0 discriminator 2
1669 0008 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1670 .loc 1 891 0 discriminator 2
1671 000c 0123 movs r3, #1
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1672 .loc 1 893 0 discriminator 2
1673 000e 9A42 cmp r2, r3
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1674 .loc 1 891 0 discriminator 2
1675 0010 80F82430 strb r3, [r0, #36]
893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1676 .loc 1 893 0 discriminator 2
1677 0014 04D0 beq .L177
1678 .L167:
1679 .LVL103:
931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1680 .loc 1 931 0
1681 0016 0022 movs r2, #0
1682 0018 80F82420 strb r2, [r0, #36]
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1683 .loc 1 934 0
1684 001c 1846 mov r0, r3
1685 .LVL104:
1686 001e 7047 bx lr
1687 .LVL105:
1688 .L177:
895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** {
1689 .loc 1 895 0
1690 0020 0429 cmp r1, #4
1691 0022 19D8 bhi .L176
1692 0024 DFE801F0 tbb [pc, r1]
1693 .L169:
1694 0028 0C .byte (.L168-.L169)/2
1695 0029 0F .byte (.L170-.L169)/2
1696 002a 12 .byte (.L171-.L169)/2
1697 002b 15 .byte (.L172-.L169)/2
1698 002c 06 .byte (.L173-.L169)/2
1699 002d 00 .p2align 1
1700 .L174:
891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1701 .loc 1 891 0
1702 002e 0223 movs r3, #2
934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1703 .loc 1 934 0
1704 0030 1846 mov r0, r3
1705 .LVL106:
1706 0032 7047 bx lr
1707 .LVL107:
1708 .L173:
914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL;
1709 .loc 1 914 0
1710 0034 0023 movs r3, #0
915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** hdma->XferErrorCallback = NULL;
1711 .loc 1 915 0
1712 0036 C0E90B33 strd r3, r3, [r0, #44]
917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1713 .loc 1 917 0
1714 003a C0E90D33 strd r3, r3, [r0, #52]
918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1715 .loc 1 918 0
1716 003e EAE7 b .L167
1717 .L168:
898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1718 .loc 1 898 0
1719 0040 0023 movs r3, #0
1720 0042 C362 str r3, [r0, #44]
899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1721 .loc 1 899 0
1722 0044 E7E7 b .L167
1723 .L170:
902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1724 .loc 1 902 0
1725 0046 0023 movs r3, #0
1726 0048 0363 str r3, [r0, #48]
903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1727 .loc 1 903 0
1728 004a E4E7 b .L167
1729 .L171:
906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1730 .loc 1 906 0
1731 004c 0023 movs r3, #0
1732 004e 4363 str r3, [r0, #52]
907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1733 .loc 1 907 0
1734 0050 E1E7 b .L167
1735 .L172:
910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1736 .loc 1 910 0
1737 0052 0023 movs r3, #0
1738 0054 8363 str r3, [r0, #56]
911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1739 .loc 1 911 0
1740 0056 DEE7 b .L167
1741 .L176:
921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** break;
1742 .loc 1 921 0
1743 0058 0123 movs r3, #1
1744 005a DCE7 b .L167
1745 .cfi_endproc
1746 .LFE338:
1748 .section .text.HAL_DMA_GetState,"ax",%progbits
1749 .align 1
1750 .p2align 2,,3
1751 .global HAL_DMA_GetState
1752 .syntax unified
1753 .thumb
1754 .thumb_func
1755 .fpu fpv4-sp-d16
1757 HAL_DMA_GetState:
1758 .LFB339:
965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** /* Return DMA handle state */
1759 .loc 1 965 0
1760 .cfi_startproc
1761 @ args = 0, pretend = 0, frame = 0
1762 @ frame_needed = 0, uses_anonymous_args = 0
1763 @ link register save eliminated.
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
1764 .LVL108:
967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1765 .loc 1 967 0
1766 0000 90F82500 ldrb r0, [r0, #37] @ zero_extendqisi2
1767 .LVL109:
968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1768 .loc 1 968 0
1769 0004 7047 bx lr
1770 .cfi_endproc
1771 .LFE339:
1773 0006 00BF .section .text.HAL_DMA_GetError,"ax",%progbits
1774 .align 1
1775 .p2align 2,,3
1776 .global HAL_DMA_GetError
1777 .syntax unified
1778 .thumb
1779 .thumb_func
1780 .fpu fpv4-sp-d16
1782 HAL_DMA_GetError:
1783 .LFB340:
977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** return hdma->ErrorCode;
1784 .loc 1 977 0
1785 .cfi_startproc
1786 @ args = 0, pretend = 0, frame = 0
1787 @ frame_needed = 0, uses_anonymous_args = 0
1788 @ link register save eliminated.
1789 .LVL110:
978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c **** }
1790 .loc 1 978 0
1791 0000 C06B ldr r0, [r0, #60]
1792 .LVL111:
979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c ****
1793 .loc 1 979 0
1794 0002 7047 bx lr
1795 .cfi_endproc
1796 .LFE340:
1798 .text
1799 .Letext0:
1800 .file 2 "/usr/include/newlib/machine/_default_types.h"
1801 .file 3 "/usr/include/newlib/sys/_stdint.h"
1802 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
1803 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
1804 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1805 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1806 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
1807 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
1808 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
1809 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
2021-07-03 18:17:05 +02:00
2021-07-02 22:19:04 +02:00
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32g4xx_hal_dma.c
2021-07-03 18:17:05 +02:00
/tmp/ccK7oyem.s:16 .text.HAL_DMA_Init:0000000000000000 $t
/tmp/ccK7oyem.s:24 .text.HAL_DMA_Init:0000000000000000 HAL_DMA_Init
/tmp/ccK7oyem.s:288 .text.HAL_DMA_Init:0000000000000104 $d
/tmp/ccK7oyem.s:303 .text.HAL_DMA_DeInit:0000000000000000 $t
/tmp/ccK7oyem.s:311 .text.HAL_DMA_DeInit:0000000000000000 HAL_DMA_DeInit
/tmp/ccK7oyem.s:507 .text.HAL_DMA_DeInit:00000000000000cc $d
/tmp/ccK7oyem.s:521 .text.HAL_DMA_Start:0000000000000000 $t
/tmp/ccK7oyem.s:529 .text.HAL_DMA_Start:0000000000000000 HAL_DMA_Start
/tmp/ccK7oyem.s:684 .text.HAL_DMA_Start_IT:0000000000000000 $t
/tmp/ccK7oyem.s:692 .text.HAL_DMA_Start_IT:0000000000000000 HAL_DMA_Start_IT
/tmp/ccK7oyem.s:893 .text.HAL_DMA_Abort:0000000000000000 $t
/tmp/ccK7oyem.s:901 .text.HAL_DMA_Abort:0000000000000000 HAL_DMA_Abort
/tmp/ccK7oyem.s:1013 .text.HAL_DMA_Abort_IT:0000000000000000 $t
/tmp/ccK7oyem.s:1021 .text.HAL_DMA_Abort_IT:0000000000000000 HAL_DMA_Abort_IT
/tmp/ccK7oyem.s:1137 .text.HAL_DMA_PollForTransfer:0000000000000000 $t
/tmp/ccK7oyem.s:1145 .text.HAL_DMA_PollForTransfer:0000000000000000 HAL_DMA_PollForTransfer
/tmp/ccK7oyem.s:1366 .text.HAL_DMA_IRQHandler:0000000000000000 $t
/tmp/ccK7oyem.s:1374 .text.HAL_DMA_IRQHandler:0000000000000000 HAL_DMA_IRQHandler
/tmp/ccK7oyem.s:1540 .text.HAL_DMA_RegisterCallback:0000000000000000 $t
/tmp/ccK7oyem.s:1548 .text.HAL_DMA_RegisterCallback:0000000000000000 HAL_DMA_RegisterCallback
/tmp/ccK7oyem.s:1599 .text.HAL_DMA_RegisterCallback:000000000000002e $d
/tmp/ccK7oyem.s:1603 .text.HAL_DMA_RegisterCallback:0000000000000032 $t
/tmp/ccK7oyem.s:1648 .text.HAL_DMA_UnRegisterCallback:0000000000000000 $t
/tmp/ccK7oyem.s:1656 .text.HAL_DMA_UnRegisterCallback:0000000000000000 HAL_DMA_UnRegisterCallback
/tmp/ccK7oyem.s:1694 .text.HAL_DMA_UnRegisterCallback:0000000000000028 $d
/tmp/ccK7oyem.s:1749 .text.HAL_DMA_GetState:0000000000000000 $t
/tmp/ccK7oyem.s:1757 .text.HAL_DMA_GetState:0000000000000000 HAL_DMA_GetState
/tmp/ccK7oyem.s:1774 .text.HAL_DMA_GetError:0000000000000000 $t
/tmp/ccK7oyem.s:1782 .text.HAL_DMA_GetError:0000000000000000 HAL_DMA_GetError
/tmp/ccK7oyem.s:1699 .text.HAL_DMA_UnRegisterCallback:000000000000002d $d
/tmp/ccK7oyem.s:1699 .text.HAL_DMA_UnRegisterCallback:000000000000002e $t
2021-07-02 22:19:04 +02:00
UNDEFINED SYMBOLS
HAL_GetTick
