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bassofono/codice/build/SVMFunctions.lst

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1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "SVMFunctions.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.arm_svm_linear_init_f32,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .global arm_svm_linear_init_f32
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 arm_svm_linear_init_f32:
25 .LFB148:
26 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Title: arm_svm_linear_init_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Description: SVM Linear Instance Initialization
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @defgroup groupSVM SVM Functions
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33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** */
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** /**
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @addtogroup groupSVM
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @{
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** */
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** /**
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @brief SVM linear instance init function
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * Classes are integer used as output of the function (instead of having -1,1
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * as class values).
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] S Parameters for the SVM function
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] nbOfSupportVectors Number of support vectors
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] vectorDimension Dimension of vector space
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] intercept Intercept
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] dualCoefficients Array of dual coefficients
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] supportVectors Array of support vectors
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @param[in] classes Array of 2 classes ID
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** * @return none.
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** *
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** */
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c ****
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** uint32_t nbOfSupportVectors,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** uint32_t vectorDimension,
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** float32_t intercept,
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** const float32_t *dualCoefficients,
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** const float32_t *supportVectors,
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** const int32_t *classes)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** {
27 .loc 1 68 0
28 .cfi_startproc
29 @ args = 8, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
32 .LVL0:
33 0000 30B4 push {r4, r5}
34 .LCFI0:
35 .cfi_def_cfa_offset 8
36 .cfi_offset 4, -8
37 .cfi_offset 5, -4
38 .loc 1 68 0
39 0002 DDE90254 ldrd r5, r4, [sp, #8]
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->nbOfSupportVectors = nbOfSupportVectors;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->vectorDimension = vectorDimension;
40 .loc 1 70 0
41 0006 C0E90012 strd r1, r2, [r0]
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->intercept = intercept;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->dualCoefficients = dualCoefficients;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->supportVectors = supportVectors;
42 .loc 1 73 0
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43 000a C0E90335 strd r3, r5, [r0, #12]
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->classes = classes;
44 .loc 1 74 0
45 000e 4461 str r4, [r0, #20]
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** S->intercept = intercept;
46 .loc 1 71 0
47 0010 80ED020A vstr.32 s0, [r0, #8]
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c **** }
48 .loc 1 75 0
49 0014 30BC pop {r4, r5}
50 .LCFI1:
51 .cfi_restore 5
52 .cfi_restore 4
53 .cfi_def_cfa_offset 0
54 .LVL1:
55 0016 7047 bx lr
56 .cfi_endproc
57 .LFE148:
59 .section .text.arm_svm_linear_predict_f32,"ax",%progbits
60 .align 1
61 .p2align 2,,3
62 .global arm_svm_linear_predict_f32
63 .syntax unified
64 .thumb
65 .thumb_func
66 .fpu fpv4-sp-d16
68 arm_svm_linear_predict_f32:
69 .LFB149:
70 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f3
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Title: arm_svm_linear_predict_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Description: SVM Linear Classifier
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #include <limits.h>
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29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /**
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @addtogroup groupSVM
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @{
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /**
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @brief SVM linear prediction
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @param[in] S Pointer to an instance of the linear SVM structure.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @param[in] in Pointer to input vector
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @param[out] pResult Decision value
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * @return none.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #include "arm_helium_utils.h"
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** void arm_svm_linear_predict_f32(
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const arm_svm_linear_instance_f32 *S,
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t * in,
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** int32_t * pResult)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /* inlined Matrix x Vector function interleaved with dot prod */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t numRows = S->nbOfSupportVectors;
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t numCols = S->vectorDimension;
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSrcA = pSupport;
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pInA0;
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pInA1;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t row;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t blkCnt; /* loop counters */
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pDualCoef = S->dualCoefficients;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t sum = S->intercept;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** row = numRows;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * compute 4 rows in parrallel
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (row >= 4)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pInA2, *pInA3;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecIn, acc0, acc1, acc2, acc3;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t const *pSrcVecPtr = in;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Initialize the pointers to 4 consecutive MatrixA rows
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA0 = pSrcA;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA1 = pInA0 + numCols;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA2 = pInA1 + numCols;
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA3 = pInA2 + numCols;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
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86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Initialize the vector pointer
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInVec = pSrcVecPtr;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * reset accumulators
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc2 = vdupq_n_f32(0.0f);
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc3 = vdupq_n_f32(0.0f);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA0Vec = pInA0;
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA1Vec = pInA1;
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA2Vec = pInA2;
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA3Vec = pInA3;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = numCols >> 2;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U) {
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecA;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecIn = vld1q(pInVec);
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInVec += 4;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA0Vec += 4;
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA1Vec += 4;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA2Vec);
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA2Vec += 4;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc2 = vfmaq(acc2, vecIn, vecA);
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA3Vec);
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA3Vec += 4;
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc3 = vfmaq(acc3, vecIn, vecA);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt--;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * tail
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * (will be merged thru tail predication)
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = numCols & 3;
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** if (blkCnt > 0U) {
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecA;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA2Vec, p0);
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc2 = vfmaq(acc2, vecIn, vecA);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA3Vec, p0);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc3 = vfmaq(acc3, vecIn, vecA);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
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143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Sum the partial parts
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc0);
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc1);
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc2);
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc3);
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA += numCols * 4;
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Decrement the row loop counter
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** row -= 4;
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * compute 2 rows in parallel
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** if (row >= 2) {
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecIn, acc0, acc1;
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t const *pSrcVecPtr = in;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Initialize the pointers to 2 consecutive MatrixA rows
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA0 = pSrcA;
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA1 = pInA0 + numCols;
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Initialize the vector pointer
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInVec = pSrcVecPtr;
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * reset accumulators
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA0Vec = pInA0;
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA1Vec = pInA1;
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = numCols >> 2;
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U) {
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecA;
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecIn = vld1q(pInVec);
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInVec += 4;
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA0Vec += 4;
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA1Vec += 4;
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt--;
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * tail
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * (will be merged thru tail predication)
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200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = numCols & 3;
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** if (blkCnt > 0U) {
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecA;
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Sum the partial parts
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc0);
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc1);
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA += numCols * 2;
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** row -= 2;
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** if (row >= 1) {
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecIn, acc0;
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t const *pSrcA0Vec, *pInVec;
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t const *pSrcVecPtr = in;
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Initialize the pointers to last MatrixA row
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInA0 = pSrcA;
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Initialize the vector pointer
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInVec = pSrcVecPtr;
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * reset accumulators
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA0Vec = pInA0;
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = numCols >> 2;
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U) {
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecA;
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecIn = vld1q(pInVec);
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pInVec += 4;
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSrcA0Vec += 4;
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt--;
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * tail
255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * (will be merged thru tail predication)
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
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257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = numCols & 3;
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** if (blkCnt > 0U) {
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** f32x4_t vecA;
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** /*
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** * Sum the partial parts
268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** */
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoef++ * vecAddAcrossF32Mve(acc0);
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *pResult = S->classes[STEP(sum)];
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #else
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #if defined(ARM_MATH_NEON)
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** void arm_svm_linear_predict_f32(
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const arm_svm_linear_instance_f32 *S,
280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t * in,
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** int32_t * pResult)
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t sum = S->intercept;
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t dot;
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32x4_t dotV;
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32x4_t accuma,accumb,accumc,accumd,accum;
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32x2_t accum2;
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32x4_t vec1;
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t blkCnt;
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t vectorBlkCnt;
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pIn = in;
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupporta = S->supportVectors;
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupportb;
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupportc;
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupportd;
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportb = pSupporta + S->vectorDimension;
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportc = pSupportb + S->vectorDimension;
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportd = pSupportc + S->vectorDimension;
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pDualCoefs = S->dualCoefficients;
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors >> 2;
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
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314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (vectorBlkCnt > 0U)
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accuma = vdupq_n_f32(0);
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accumb = vdupq_n_f32(0);
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accumc = vdupq_n_f32(0);
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accumd = vdupq_n_f32(0);
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pIn = in;
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U)
325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec1 = vld1q_f32(pIn);
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec2a = vld1q_f32(pSupporta);
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec2b = vld1q_f32(pSupportb);
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec2c = vld1q_f32(pSupportc);
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec2d = vld1q_f32(pSupportd);
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pIn += 4;
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupporta += 4;
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportb += 4;
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportc += 4;
337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportd += 4;
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accuma = vmlaq_f32(accuma, vec1,vec2a);
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accumb = vmlaq_f32(accumb, vec1,vec2b);
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accumc = vmlaq_f32(accumc, vec1,vec2c);
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accumd = vmlaq_f32(accumd, vec1,vec2d);
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt -- ;
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = S->vectorDimension & 3;
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U)
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0);
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1);
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2);
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3);
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pIn++;
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt -- ;
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
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371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec1 = vld1q_f32(pDualCoefs);
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pDualCoefs += 4;
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum = vmulq_f32(vec1,dotV);
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupporta += 3*S->vectorDimension;
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportb += 3*S->vectorDimension;
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportc += 3*S->vectorDimension;
382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupportd += 3*S->vectorDimension;
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vectorBlkCnt -- ;
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupport = pSupporta;
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors & 3;
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (vectorBlkCnt > 0U)
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum = vdupq_n_f32(0);
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dot = 0.0f;
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pIn = in;
394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U)
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec1 = vld1q_f32(pIn);
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vec2 = vld1q_f32(pSupport);
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pIn += 4;
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** pSupport += 4;
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum = vmlaq_f32(accum, vec1,vec2);
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt -- ;
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt = S->vectorDimension & 3;
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** while (blkCnt > 0U)
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dot = dot + *pIn++ * *pSupport++;
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** blkCnt -- ;
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += *pDualCoefs++ * dot;
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** vectorBlkCnt -- ;
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *pResult=S->classes[STEP(sum)];
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** #else
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** void arm_svm_linear_predict_f32(
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428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const arm_svm_linear_instance_f32 *S,
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t * in,
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** int32_t * pResult)
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
71 .loc 2 431 0
72 .cfi_startproc
73 @ args = 0, pretend = 0, frame = 0
74 @ frame_needed = 0, uses_anonymous_args = 0
75 .LVL2:
76 0000 F0B5 push {r4, r5, r6, r7, lr}
77 .LCFI2:
78 .cfi_def_cfa_offset 20
79 .cfi_offset 4, -20
80 .cfi_offset 5, -16
81 .cfi_offset 6, -12
82 .cfi_offset 7, -8
83 .cfi_offset 14, -4
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t sum=S->intercept;
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t dot=0;
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** uint32_t i,j;
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** for(i=0; i < S->nbOfSupportVectors; i++)
84 .loc 2 437 0
85 0002 0768 ldr r7, [r0]
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t sum=S->intercept;
86 .loc 2 432 0
87 0004 90ED026A vldr.32 s12, [r0, #8]
88 .LVL3:
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c ****
89 .loc 2 435 0
90 0008 0369 ldr r3, [r0, #16]
91 .LVL4:
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** float32_t sum=S->intercept;
92 .loc 2 431 0
93 000a 9646 mov lr, r2
94 .loc 2 437 0
95 000c CFB1 cbz r7, .L5
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dot=0;
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
96 .loc 2 440 0
97 000e 4268 ldr r2, [r0, #4]
98 .LVL5:
99 0010 C668 ldr r6, [r0, #12]
100 0012 4FEA820C lsl ip, r2, #2
101 0016 06EB8707 add r7, r6, r7, lsl #2
102 .LVL6:
103 .L6:
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
104 .loc 2 439 0
105 001a DFED0F7A vldr.32 s15, .L18
106 .loc 2 440 0
107 001e 52B1 cbz r2, .L9
108 0020 0C46 mov r4, r1
109 0022 03EB0C05 add r5, r3, ip
110 .LVL7:
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111 .L7:
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** dot = dot + in[j]* *pSupport++;
112 .loc 2 442 0 discriminator 3
113 0026 B3EC017A vldmia.32 r3!, {s14}
114 .LVL8:
115 002a F4EC016A vldmia.32 r4!, {s13}
116 .LVL9:
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
117 .loc 2 440 0 discriminator 3
118 002e AB42 cmp r3, r5
119 .loc 2 442 0 discriminator 3
120 0030 E6EE877A vfma.f32 s15, s13, s14
121 .LVL10:
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
122 .loc 2 440 0 discriminator 3
123 0034 F7D1 bne .L7
124 .LVL11:
125 .L9:
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** sum += S->dualCoefficients[i] * dot;
126 .loc 2 444 0 discriminator 2
127 0036 B6EC017A vldmia.32 r6!, {s14}
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
128 .loc 2 437 0 discriminator 2
129 003a B742 cmp r7, r6
130 .loc 2 444 0 discriminator 2
131 003c A7EE276A vfma.f32 s12, s14, s15
132 .LVL12:
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** {
133 .loc 2 437 0 discriminator 2
134 0040 EBD1 bne .L6
135 .L5:
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** *pResult=S->classes[STEP(sum)];
136 .loc 2 446 0
137 0042 4369 ldr r3, [r0, #20]
138 .LVL13:
139 0044 B5EEC06A vcmpe.f32 s12, #0
140 0048 F1EE10FA vmrs APSR_nzcv, FPSCR
141 004c C8BF it gt
142 004e 0433 addgt r3, r3, #4
143 0050 1B68 ldr r3, [r3]
144 0052 CEF80030 str r3, [lr]
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c **** }
145 .loc 2 447 0
146 0056 F0BD pop {r4, r5, r6, r7, pc}
147 .L19:
148 .align 2
149 .L18:
150 0058 00000000 .word 0
151 .cfi_endproc
152 .LFE149:
154 .section .text.arm_svm_polynomial_init_f32,"ax",%progbits
155 .align 1
156 .p2align 2,,3
157 .global arm_svm_polynomial_init_f32
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158 .syntax unified
159 .thumb
160 .thumb_func
161 .fpu fpv4-sp-d16
163 arm_svm_polynomial_init_f32:
164 .LFB150:
165 .file 3 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Title: arm_svm_polynomial_init_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Description: SVM Polynomial Instance Initialization
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** /**
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @addtogroup groupSVM
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @{
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** */
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** /**
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @brief SVM polynomial instance init function
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * Classes are integer used as output of the function (instead of having -1,1
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * as class values).
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] S points to an instance of the polynomial SVM structure.
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] nbOfSupportVectors Number of support vectors
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] vectorDimension Dimension of vector space
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] intercept Intercept
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] dualCoefficients Array of dual coefficients
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] supportVectors Array of support vectors
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51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] classes Array of 2 classes ID
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] degree Polynomial degree
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] coef0 coeff0 (scikit-learn terminology)
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @param[in] gamma gamma (scikit-learn terminology)
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** * @return none.
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** *
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** */
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c ****
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** uint32_t nbOfSupportVectors,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** uint32_t vectorDimension,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** float32_t intercept,
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** const float32_t *dualCoefficients,
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** const float32_t *supportVectors,
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** const int32_t *classes,
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** int32_t degree,
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** float32_t coef0,
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** float32_t gamma
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** )
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** {
166 .loc 3 71 0
167 .cfi_startproc
168 @ args = 12, pretend = 0, frame = 0
169 @ frame_needed = 0, uses_anonymous_args = 0
170 @ link register save eliminated.
171 .LVL14:
172 0000 30B4 push {r4, r5}
173 .LCFI3:
174 .cfi_def_cfa_offset 8
175 .cfi_offset 4, -8
176 .cfi_offset 5, -4
177 .loc 3 71 0
178 0002 DDE90254 ldrd r5, r4, [sp, #8]
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->nbOfSupportVectors = nbOfSupportVectors;
179 .loc 3 72 0
180 0006 0160 str r1, [r0]
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->nbOfSupportVectors = nbOfSupportVectors;
181 .loc 3 71 0
182 0008 0499 ldr r1, [sp, #16]
183 .LVL15:
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->vectorDimension = vectorDimension;
184 .loc 3 73 0
185 000a 4260 str r2, [r0, #4]
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->intercept = intercept;
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->dualCoefficients = dualCoefficients;
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->supportVectors = supportVectors;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->classes = classes;
186 .loc 3 77 0
187 000c C0E90454 strd r5, r4, [r0, #16]
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->intercept = intercept;
188 .loc 3 74 0
189 0010 80ED020A vstr.32 s0, [r0, #8]
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->supportVectors = supportVectors;
190 .loc 3 75 0
191 0014 C360 str r3, [r0, #12]
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->degree = degree;
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79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->coef0 = coef0;
192 .loc 3 79 0
193 0016 C0ED070A vstr.32 s1, [r0, #28]
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->gamma = gamma;
194 .loc 3 80 0
195 001a 80ED081A vstr.32 s2, [r0, #32]
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** S->degree = degree;
196 .loc 3 78 0
197 001e 8161 str r1, [r0, #24]
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c **** }
198 .loc 3 81 0
199 0020 30BC pop {r4, r5}
200 .LCFI4:
201 .cfi_restore 5
202 .cfi_restore 4
203 .cfi_def_cfa_offset 0
204 .LVL16:
205 0022 7047 bx lr
206 .cfi_endproc
207 .LFE150:
209 .section .text.arm_svm_polynomial_predict_f32,"ax",%progbits
210 .align 1
211 .p2align 2,,3
212 .global arm_svm_polynomial_predict_f32
213 .syntax unified
214 .thumb
215 .thumb_func
216 .fpu fpv4-sp-d16
218 arm_svm_polynomial_predict_f32:
219 .LFB151:
220 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predic
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Title: arm_svm_polynomial_predict_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Description: SVM Polynomial Classifier
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
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27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #include "arm_vec_math.h"
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #endif
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /**
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @addtogroup groupSVM
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @{
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /**
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @brief SVM polynomial prediction
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @param[in] S Pointer to an instance of the polynomial SVM structure.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @param[in] in Pointer to input vector
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @param[out] pResult Decision value
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * @return none.
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #include "arm_helium_utils.h"
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #include "arm_vec_math.h"
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** void arm_svm_polynomial_predict_f32(
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const arm_svm_polynomial_instance_f32 *S,
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t * in,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** int32_t * pResult)
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /* inlined Matrix x Vector function interleaved with dot prod */
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t numRows = S->nbOfSupportVectors;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t numCols = S->vectorDimension;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSrcA = pSupport;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pInA0;
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pInA1;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t row;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t blkCnt; /* loop counters */
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pDualCoef = S->dualCoefficients;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t sum = S->intercept;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vSum = vdupq_n_f32(0.0f);
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** row = numRows;
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * compute 4 rows in parrallel
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (row >= 4) {
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pInA2, *pInA3;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecIn, acc0, acc1, acc2, acc3;
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t const *pSrcVecPtr = in;
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
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84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Initialize the pointers to 4 consecutive MatrixA rows
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA0 = pSrcA;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA1 = pInA0 + numCols;
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA2 = pInA1 + numCols;
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA3 = pInA2 + numCols;
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Initialize the vector pointer
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInVec = pSrcVecPtr;
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * reset accumulators
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc2 = vdupq_n_f32(0.0f);
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc3 = vdupq_n_f32(0.0f);
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA0Vec = pInA0;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA1Vec = pInA1;
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA2Vec = pInA2;
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA3Vec = pInA3;
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = numCols >> 2;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U) {
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecA;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecIn = vld1q(pInVec);
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInVec += 4;
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA0Vec += 4;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA1Vec += 4;
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA2Vec);
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA2Vec += 4;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc2 = vfmaq(acc2, vecIn, vecA);
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA3Vec);
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA3Vec += 4;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc3 = vfmaq(acc3, vecIn, vecA);
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt--;
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * tail
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * (will be merged thru tail predication)
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = numCols & 3;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** if (blkCnt > 0U) {
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecA;
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
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141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA2Vec, p0);
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc2 = vfmaq(acc2, vecIn, vecA);
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA3Vec, p0);
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc3 = vfmaq(acc3, vecIn, vecA);
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Sum the partial parts
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2);
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3);
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vSum = vfmaq_f32(vSum, vld1q(pDualCoef),
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** arm_vec_exponent_f32
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree));
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pDualCoef += 4;
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA += numCols * 4;
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Decrement the row loop counter
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** row -= 4;
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * compute 2 rows in parrallel
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** if (row >= 2) {
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecIn, acc0, acc1;
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t const *pSrcVecPtr = in;
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Initialize the pointers to 2 consecutive MatrixA rows
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA0 = pSrcA;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA1 = pInA0 + numCols;
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Initialize the vector pointer
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInVec = pSrcVecPtr;
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * reset accumulators
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA0Vec = pInA0;
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA1Vec = pInA1;
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = numCols >> 2;
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U) {
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecA;
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198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecIn = vld1q(pInVec);
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInVec += 4;
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA0Vec += 4;
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA1Vec += 4;
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt--;
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * tail
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * (will be merged thru tail predication)
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = numCols & 3;
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** if (blkCnt > 0U) {
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecA;
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Sum the partial parts
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vSum = vfmaq_m_f32(vSum, vld1q(pDualCoef),
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** arm_vec_exponent_f32
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree),
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vctp32q(2));
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pDualCoef += 2;
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA += numCols * 2;
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** row -= 2;
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** if (row >= 1) {
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecIn, acc0;
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t const *pSrcA0Vec, *pInVec;
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t const *pSrcVecPtr = in;
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Initialize the pointers to last MatrixA row
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInA0 = pSrcA;
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Initialize the vector pointer
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInVec = pSrcVecPtr;
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
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255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * reset accumulators
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA0Vec = pInA0;
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = numCols >> 2;
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U) {
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecA;
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecIn = vld1q(pInVec);
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pInVec += 4;
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSrcA0Vec += 4;
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt--;
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * tail
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * (will be merged thru tail predication)
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = numCols & 3;
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** if (blkCnt > 0U) {
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vecA;
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** /*
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** * Sum the partial parts
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** */
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vSum = vfmaq_m_f32(vSum, vld1q(pDualCoef),
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** arm_vec_exponent_f32
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree),
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vctp32q(1));
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** sum += vecAddAcrossF32Mve(vSum);
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *pResult = S->classes[STEP(sum)];
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #else
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #if defined(ARM_MATH_NEON)
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** void arm_svm_polynomial_predict_f32(
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const arm_svm_polynomial_instance_f32 *S,
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t * in,
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** int32_t * pResult)
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t sum = S->intercept;
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t dot;
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312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32x4_t dotV;
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32x4_t accuma,accumb,accumc,accumd,accum;
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32x2_t accum2;
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32x4_t vec1;
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32x4_t coef0 = vdupq_n_f32(S->coef0);
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t blkCnt;
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t vectorBlkCnt;
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pIn = in;
325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupporta = S->supportVectors;
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupportb;
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupportc;
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupportd;
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportb = pSupporta + S->vectorDimension;
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportc = pSupportb + S->vectorDimension;
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportd = pSupportc + S->vectorDimension;
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pDualCoefs = S->dualCoefficients;
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors >> 2;
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (vectorBlkCnt > 0U)
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accuma = vdupq_n_f32(0);
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accumb = vdupq_n_f32(0);
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accumc = vdupq_n_f32(0);
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accumd = vdupq_n_f32(0);
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pIn = in;
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U)
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec1 = vld1q_f32(pIn);
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec2a = vld1q_f32(pSupporta);
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec2b = vld1q_f32(pSupportb);
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec2c = vld1q_f32(pSupportc);
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec2d = vld1q_f32(pSupportd);
358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pIn += 4;
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupporta += 4;
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportb += 4;
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportc += 4;
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportd += 4;
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accuma = vmlaq_f32(accuma, vec1,vec2a);
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accumb = vmlaq_f32(accumb, vec1,vec2b);
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accumc = vmlaq_f32(accumc, vec1,vec2c);
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accumd = vmlaq_f32(accumd, vec1,vec2d);
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369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt -- ;
371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = S->vectorDimension & 3;
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U)
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0);
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1);
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2);
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3);
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pIn++;
394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt -- ;
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec1 = vld1q_f32(pDualCoefs);
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pDualCoefs += 4;
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** // To vectorize later
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vmulq_n_f32(dotV, S->gamma);
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = vaddq_f32(dotV, coef0);
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dotV = arm_vec_exponent_f32(dotV,S->degree);
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum = vmulq_f32(vec1,dotV);
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupporta += 3*S->vectorDimension;
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportb += 3*S->vectorDimension;
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportc += 3*S->vectorDimension;
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupportd += 3*S->vectorDimension;
415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vectorBlkCnt -- ;
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupport = pSupporta;
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors & 3;
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (vectorBlkCnt > 0U)
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum = vdupq_n_f32(0);
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dot = 0.0f;
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426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pIn = in;
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U)
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec1 = vld1q_f32(pIn);
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vec2 = vld1q_f32(pSupport);
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pIn += 4;
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** pSupport += 4;
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum = vmlaq_f32(accum, vec1,vec2);
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt -- ;
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt = S->vectorDimension & 3;
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** while (blkCnt > 0U)
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dot = dot + *pIn++ * *pSupport++;
449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** blkCnt -- ;
451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** sum += *pDualCoefs++ * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree);
454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** vectorBlkCnt -- ;
455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *pResult=S->classes[STEP(sum)];
458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** #else
460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** void arm_svm_polynomial_predict_f32(
461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const arm_svm_polynomial_instance_f32 *S,
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t * in,
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** int32_t * pResult)
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
221 .loc 4 464 0
222 .cfi_startproc
223 @ args = 0, pretend = 0, frame = 0
224 @ frame_needed = 0, uses_anonymous_args = 0
225 .LVL17:
226 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
227 .LCFI5:
228 .cfi_def_cfa_offset 24
229 .cfi_offset 4, -24
230 .cfi_offset 5, -20
231 .cfi_offset 6, -16
232 .cfi_offset 7, -12
233 .cfi_offset 8, -8
234 .cfi_offset 14, -4
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t sum=S->intercept;
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t dot=0;
467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** uint32_t i,j;
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
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469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** for(i=0; i < S->nbOfSupportVectors; i++)
235 .loc 4 470 0
236 0004 0468 ldr r4, [r0]
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t sum=S->intercept;
237 .loc 4 465 0
238 0006 90ED026A vldr.32 s12, [r0, #8]
239 .LVL18:
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
240 .loc 4 468 0
241 000a 0369 ldr r3, [r0, #16]
242 .LVL19:
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** float32_t sum=S->intercept;
243 .loc 4 464 0
244 000c 9046 mov r8, r2
245 .loc 4 470 0
246 000e 64B3 cbz r4, .L23
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dot=0;
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
247 .loc 4 473 0
248 0010 4268 ldr r2, [r0, #4]
249 .LVL20:
250 0012 8769 ldr r7, [r0, #24]
251 0014 C668 ldr r6, [r0, #12]
252 0016 90ED085A vldr.32 s10, [r0, #32]
253 001a D0ED075A vldr.32 s11, [r0, #28]
254 001e 4FEA820E lsl lr, r2, #2
255 0022 013F subs r7, r7, #1
256 0024 06EB840C add ip, r6, r4, lsl #2
257 .LVL21:
258 .L24:
259 0028 5AB3 cbz r2, .L40
472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
260 .loc 4 472 0
261 002a DFED177A vldr.32 s15, .L41
262 002e 0C46 mov r4, r1
263 0030 03EB0E05 add r5, r3, lr
264 .LVL22:
265 .L25:
474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** dot = dot + in[j]* *pSupport++;
266 .loc 4 475 0 discriminator 3
267 0034 B3EC017A vldmia.32 r3!, {s14}
268 .LVL23:
269 0038 F4EC016A vldmia.32 r4!, {s13}
270 .LVL24:
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
271 .loc 4 473 0 discriminator 3
272 003c AB42 cmp r3, r5
273 .loc 4 475 0 discriminator 3
274 003e E6EE877A vfma.f32 s15, s13, s14
275 .LVL25:
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
276 .loc 4 473 0 discriminator 3
277 0042 F7D1 bne .L25
278 0044 B0EE657A vmov.f32 s14, s11
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279 0048 A7EE857A vfma.f32 s14, s15, s10
280 .LVL26:
281 .L29:
282 .LBB4:
283 .LBB5:
284 .file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /******************************************************************************
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /*
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License.
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library,
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices.
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category:
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM)
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers,
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values.
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52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the <code>Lib</code> fold
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries :
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian)
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file <code>arm_math.h</code> which is placed
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endi
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * --------
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake.
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested.
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the <co
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM_math.uvprojx
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecti
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also a work in progress cmake build. The README file is giving more details.
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Preprocessor Macros
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109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Each library project have different preprocessor macros.
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_BIG_ENDIAN:
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default libra
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MATRIX_CHECK:
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_ROUNDING:
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_ROUNDING for rounding on support functions
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_LOOPUNROLL:
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_NEON:
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It is not enabled by default when Neon is available because performances are
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * dependent on the compiler and target architecture.
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_NEON_EXPERIMENTAL:
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * of some DSP functions. Experimental Neon versions currently do not have better
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * performances than the scalar versions.
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_HELIUM:
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It implies the flags ARM_MATH_MVEF and ARM_MATH_MVEI and ARM_MATH_FLOAT16.
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MVEF:
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Select Helium versions of the f32 algorithms.
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * It implies ARM_MATH_FLOAT16 and ARM_MATH_MVEI.
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_MVEI:
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Select Helium versions of the int and fixed point algorithms.
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - ARM_MATH_FLOAT16:
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Float16 implementations of some algorithms (Requires MVE extension).
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <hr>
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -----------------------------
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directorie
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|-----------------------------------------------------------
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation
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166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <hr>
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg.
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root.
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays.
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data.
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors.
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...).
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values.
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations.
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example,
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below:
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * typedef struct
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * {
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * uint16_t numRows; // number of rows of the matrix.
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * uint16_t numCols; // number of columns of the matrix.
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * float32_t *pData; // points to the data of the matrix.
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * } arm_matrix_instance_f32;
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
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223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types.
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size <code>numRows X numCols</code>
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at:
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pData[i*numCols + j]
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure.
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields.
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively.
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section.
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example:
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and <code>pData</code> points to the
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array.
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking
255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the
257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return:
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SUCCESS
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking.
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define
268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * <pre>
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_MATRIX_CHECK
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * </pre>
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return <code>ARM_MATH_SUCCESS</code>.
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions
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280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data.
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data.
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes.
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification.
314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder.
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator.
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn.
325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms.
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors.
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
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337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C"
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM )
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ )
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion"
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ )
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ )
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ )
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ )
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER )
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler
371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER )
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <stdint.h>
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x))
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__)
382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <stdint.h>
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline))
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline))
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function"
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes"
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h"
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
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394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <string.h>
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <math.h>
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <float.h>
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <limits.h>
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX)
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX)
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX)
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX)
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX)
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX)
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX)
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX)
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX)
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0)
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0)
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0)
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL))
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF))
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F))
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L))
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000))
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80))
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL))
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF))
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F))
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0)
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0)
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0)
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON)
449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <arm_neon.h>
450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
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451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM)
453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF
454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16
455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF)
458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI
459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16
460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI)
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include <arm_mve.h>
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS
469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100))
472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5)
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F
474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI
475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f
476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations
480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512
483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10)
484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10)
485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9)
486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000
487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80
488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions
491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */
493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61
495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers
498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */
501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2
502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library.
505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum
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508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */
510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */
511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */
512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation
513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */
514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */
515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */
516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status;
517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format.
520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t;
522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format.
525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t;
527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format.
530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t;
532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format.
535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t;
537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition.
540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t;
542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition.
545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t;
547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types
550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI)
552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format
554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t;
556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format.
559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t;
561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format.
564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
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565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t;
566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format.
569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t;
571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format.
574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t;
576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format.
579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t;
581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format.
584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t;
586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format.
589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t;
591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format.
594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t;
596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format.
599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t;
601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format.
604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t;
606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format.
609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t;
611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type.
614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t;
616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type.
619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t;
621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
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622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type.
624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t;
626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type.
629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t;
631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/
636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type
638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t;
640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type
644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t;
646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type
650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t;
652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type
655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t;
657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type
661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t;
663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type
666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t;
668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type
672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t
674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f;
676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i;
677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t;
678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
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679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type
682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t
684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f;
686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i;
687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t;
688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON)
693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format.
695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t;
697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format.
700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t;
702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format.
705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t;
707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type.
710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t;
712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type.
716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t;
718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type
722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t;
724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type
728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t;
730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format
734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t;
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736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format
739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t;
741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format
744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t;
746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type
749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t;
751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type
754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t;
756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type
759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t;
761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type
765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t;
767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type
770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t;
772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type
775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t;
777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format
781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t;
783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format
786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t;
788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format
791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t;
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793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format
796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t;
798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format
801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t;
803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format
806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t;
808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format
811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t;
813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format
816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t;
818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format
821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t;
823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type
826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t
828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f;
830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i;
831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t;
832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16)
834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type
836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t
838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f;
840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i;
841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t;
842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type.
846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t;
848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
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850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type.
851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t;
853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type.
856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t;
858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values.
865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated
866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM )
868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed
869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ )
872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ )
874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed
875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ )
876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ )
878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ )
880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t
881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER )
882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t
883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler
885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr))
888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr))
889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr))
890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr))
891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1
893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x))
894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */
896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer.
900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 (
904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15)
905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
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907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4);
910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ;
912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards.
919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia (
923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15)
924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4);
929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2;
934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da (
943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15)
944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4);
949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2;
954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards.
959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia (
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964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15,
965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4);
970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF);
972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF;
973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2;
976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer.
980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value
981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 (
985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15,
986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4);
992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[0] = val & 0x0FFFF;
994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[1] = val >> 16;
995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards.
1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_ia (
1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7)
1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4);
1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) |
1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4;
1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
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1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value
1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_da (
1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7)
1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val;
1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4);
1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) <<
1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 -= 4;
1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val);
1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards.
1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value
1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value
1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none
1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q7x4_ia (
1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7,
1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value)
1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value;
1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED
1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ7, &val, 4);
1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[0] = val & 0x0FF;
1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[1] = (val >> 8) & 0x0FF;
1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[2] = (val >> 16) & 0x0FF;
1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[3] = (val >> 24) & 0x0FF;
1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4;
1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /*
1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Normally those kind of definitions are in a compiler file
1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in Core or Core_A.
1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** But for MSVC compiler it is a bit special. The goal is very specific
1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** to CMSIS-DSP and only to allow the use of this library from other
1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** systems like Python or Matlab.
1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** compiler file in Core or Core_A would not make sense.
1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__)
1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
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1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (data == 0U) { return 32U; }
1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t count = 0U;
1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t mask = 0x80000000U;
1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while ((data & mask) == 0U)
1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** count += 1U;
1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** mask = mask >> 1U;
1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return count;
1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if ((sat >= 1U) && (sat <= 32U))
1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t min = -1 - max ;
1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > max)
1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max;
1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < min)
1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return min;
1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return val;
1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (sat <= 31U)
1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t max = ((1U << sat) - 1U);
1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > (int32_t)max)
1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max;
1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < 0)
1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return 0U;
1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (uint32_t)val;
1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_DSP
1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack two 16 bit values.
1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \
1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) )
1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \
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1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) )
1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack four 8 bit values.
1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_BIG_ENDIAN
1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \
1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \
1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v3) << 24) & (int32_t)0xFF000000) )
1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else
1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \
1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \
1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v0) << 24) & (int32_t)0xFF000000) )
1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif
1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q31 values.
1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x)
1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q15 values.
1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x)
1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q31 to Q7 values.
1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x)
1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q31 to Q15 values.
1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x)
1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
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1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q63_t mult32x64(
1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x,
1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y)
1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) );
1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t arm_recip_q31(
1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t in,
1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * dst,
1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pRecipTable)
1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t out;
1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t tempVal;
1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index, i;
1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t signBits;
1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in > 0)
1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t) (__CLZ( in) - 1));
1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else
1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t) (__CLZ(-in) - 1));
1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert input sample to 1.31 format */
1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in = (in << signBits);
1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of index for initial approximated Val */
1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (uint32_t)(in >> 24);
1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (index & INDEX_MASK);
1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */
1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = pRecipTable[index];
1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of reciprocal value */
1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* running approximation for two iterations */
1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** for (i = 0U; i < 2U; i++)
1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = (uint32_t) (((q63_t) in * out) >> 31);
1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal;
1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */
1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* write output */
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1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = out;
1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return num of signbits of out = 1/in value */
1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (signBits + 1U);
1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t arm_recip_q15(
1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t in,
1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * dst,
1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pRecipTable)
1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t out = 0;
1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t tempVal = 0;
1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index = 0, i = 0;
1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t signBits = 0;
1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in > 0)
1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t)(__CLZ( in) - 17));
1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else
1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t)(__CLZ(-in) - 17));
1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert input sample to 1.15 format */
1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in = (in << signBits);
1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of index for initial approximated Val */
1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (uint32_t)(in >> 8);
1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (index & INDEX_MASK);
1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */
1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = pRecipTable[index];
1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of reciprocal value */
1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* running approximation for two iterations */
1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** for (i = 0U; i < 2U; i++)
1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = (uint32_t) (((q31_t) in * out) >> 15);
1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFu - tempVal;
1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */
1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q15_t) (((q31_t) out * tempVal) >> 14);
1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* write output */
1300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = out;
1301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
1302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return num of signbits of out = 1/in value */
1303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (signBits + 1);
1304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** }
1305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****
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1306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**
1307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Integer exponentiation
1308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x value
1309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nb integer exponent >= 1
1310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return x^nb
1311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
1312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */
1313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb)
1314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t r = x;
1316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** nb --;
1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while(nb > 0)
285 .loc 5 1317 0 discriminator 2
286 004c 002F cmp r7, #0
287 .LBE5:
288 .LBE4:
476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** sum += S->dualCoefficients[i] * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree);
289 .loc 4 477 0 discriminator 2
290 004e F6EC016A vldmia.32 r6!, {s13}
291 .LVL27:
292 .LBB7:
293 .LBB6:
1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** nb --;
294 .loc 5 1315 0 discriminator 2
295 0052 F0EE477A vmov.f32 s15, s14
296 .loc 5 1317 0 discriminator 2
297 0056 04DD ble .L26
298 .loc 5 1317 0 is_stmt 0
299 0058 3C46 mov r4, r7
300 .L27:
301 .LVL28:
302 005a 013C subs r4, r4, #1
303 .LVL29:
1318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
1319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = r * x;
304 .loc 5 1319 0 is_stmt 1
305 005c 67EE877A vmul.f32 s15, s15, s14
306 .LVL30:
1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** {
307 .loc 5 1317 0
308 0060 FBD1 bne .L27
309 .LVL31:
310 .L26:
311 .LBE6:
312 .LBE7:
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
313 .loc 4 470 0
314 0062 B445 cmp ip, r6
315 .loc 4 477 0
316 0064 A6EEA76A vfma.f32 s12, s13, s15
317 .LVL32:
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
318 .loc 4 470 0
319 0068 DED1 bne .L24
320 .L23:
478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
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479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c ****
480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** *pResult=S->classes[STEP(sum)];
321 .loc 4 480 0
322 006a 4369 ldr r3, [r0, #20]
323 .LVL33:
324 006c B5EEC06A vcmpe.f32 s12, #0
325 0070 F1EE10FA vmrs APSR_nzcv, FPSCR
326 0074 C8BF it gt
327 0076 0433 addgt r3, r3, #4
328 0078 1B68 ldr r3, [r3]
329 007a C8F80030 str r3, [r8]
481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** }
330 .loc 4 481 0
331 007e BDE8F081 pop {r4, r5, r6, r7, r8, pc}
332 .LVL34:
333 .L40:
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c **** {
334 .loc 4 473 0
335 0082 B0EE657A vmov.f32 s14, s11
336 0086 E1E7 b .L29
337 .L42:
338 .align 2
339 .L41:
340 0088 00000000 .word 0
341 .cfi_endproc
342 .LFE151:
344 .section .text.arm_svm_rbf_init_f32,"ax",%progbits
345 .align 1
346 .p2align 2,,3
347 .global arm_svm_rbf_init_f32
348 .syntax unified
349 .thumb
350 .thumb_func
351 .fpu fpv4-sp-d16
353 arm_svm_rbf_init_f32:
354 .LFB152:
355 .file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c"
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Title: arm_svm_rbf_init_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Description: SVM Radial Basis Function Instance Initialization
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Unless required by applicable law or agreed to in writing, software
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21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c ****
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** /**
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @addtogroup groupSVM
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @{
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** */
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** /**
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @brief SVM radial basis function instance init function
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * Classes are integer used as output of the function (instead of having -1,1
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * as class values).
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] S points to an instance of the polynomial SVM structure.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] nbOfSupportVectors Number of support vectors
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] vectorDimension Dimension of vector space
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] intercept Intercept
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] dualCoefficients Array of dual coefficients
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] supportVectors Array of support vectors
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] classes Array of 2 classes ID
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @param[in] gamma gamma (scikit-learn terminology)
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** * @return none.
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** *
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** */
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c ****
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S,
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** uint32_t nbOfSupportVectors,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** uint32_t vectorDimension,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** float32_t intercept,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** const float32_t *dualCoefficients,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** const float32_t *supportVectors,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** const int32_t *classes,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** float32_t gamma
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** )
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** {
356 .loc 6 65 0
357 .cfi_startproc
358 @ args = 8, pretend = 0, frame = 0
359 @ frame_needed = 0, uses_anonymous_args = 0
360 @ link register save eliminated.
361 .LVL35:
362 0000 30B4 push {r4, r5}
363 .LCFI6:
364 .cfi_def_cfa_offset 8
365 .cfi_offset 4, -8
366 .cfi_offset 5, -4
367 .loc 6 65 0
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368 0002 DDE90254 ldrd r5, r4, [sp, #8]
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->nbOfSupportVectors = nbOfSupportVectors;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->vectorDimension = vectorDimension;
369 .loc 6 67 0
370 0006 C0E90012 strd r1, r2, [r0]
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->intercept = intercept;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->dualCoefficients = dualCoefficients;
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->supportVectors = supportVectors;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->classes = classes;
371 .loc 6 71 0
372 000a C0E90454 strd r5, r4, [r0, #16]
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->intercept = intercept;
373 .loc 6 68 0
374 000e 80ED020A vstr.32 s0, [r0, #8]
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->supportVectors = supportVectors;
375 .loc 6 69 0
376 0012 C360 str r3, [r0, #12]
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** S->gamma = gamma;
377 .loc 6 72 0
378 0014 C0ED060A vstr.32 s1, [r0, #24]
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c **** }
379 .loc 6 73 0
380 0018 30BC pop {r4, r5}
381 .LCFI7:
382 .cfi_restore 5
383 .cfi_restore 4
384 .cfi_def_cfa_offset 0
385 .LVL36:
386 001a 7047 bx lr
387 .cfi_endproc
388 .LFE152:
390 .section .text.arm_svm_rbf_predict_f32,"ax",%progbits
391 .align 1
392 .p2align 2,,3
393 .global arm_svm_rbf_predict_f32
394 .syntax unified
395 .thumb
396 .thumb_func
397 .fpu fpv4-sp-d16
399 arm_svm_rbf_predict_f32:
400 .LFB153:
401 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Title: arm_svm_rbf_predict_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Description: SVM Radial Basis Function Classifier
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * not use this file except in compliance with the License.
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16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /**
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @addtogroup groupSVM
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @{
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /**
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @brief SVM rbf prediction
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @param[in] S Pointer to an instance of the rbf SVM structure.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @param[in] in Pointer to input vector
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @param[out] pResult decision value
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * @return none.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #include "arm_helium_utils.h"
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #include "arm_vec_math.h"
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** void arm_svm_rbf_predict_f32(
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const arm_svm_rbf_instance_f32 *S,
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t * in,
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** int32_t * pResult)
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /* inlined Matrix x Vector function interleaved with dot prod */
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t numRows = S->nbOfSupportVectors;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t numCols = S->vectorDimension;
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSrcA = pSupport;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pInA0;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pInA1;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t row;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t blkCnt; /* loop counters */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pDualCoef = S->dualCoefficients;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum = S->intercept;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vSum = vdupq_n_f32(0);
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** row = numRows;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
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73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * compute 4 rows in parrallel
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (row >= 4) {
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pInA2, *pInA3;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecIn, acc0, acc1, acc2, acc3;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t const *pSrcVecPtr = in;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Initialize the pointers to 4 consecutive MatrixA rows
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA0 = pSrcA;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA1 = pInA0 + numCols;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA2 = pInA1 + numCols;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA3 = pInA2 + numCols;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Initialize the vector pointer
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInVec = pSrcVecPtr;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * reset accumulators
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc2 = vdupq_n_f32(0.0f);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc3 = vdupq_n_f32(0.0f);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA0Vec = pInA0;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA1Vec = pInA1;
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA2Vec = pInA2;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA3Vec = pInA3;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = numCols >> 2;
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U) {
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecA;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecDif;
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecIn = vld1q(pInVec);
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInVec += 4;
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA0Vec += 4;
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vfmaq(acc0, vecDif, vecDif);
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA1Vec += 4;
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc1 = vfmaq(acc1, vecDif, vecDif);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA2Vec);
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA2Vec += 4;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc2 = vfmaq(acc2, vecDif, vecDif);
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA3Vec);
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA3Vec += 4;
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc3 = vfmaq(acc3, vecDif, vecDif);
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt--;
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130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * tail
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * (will be merged thru tail predication)
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = numCols & 3;
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** if (blkCnt > 0U) {
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecA;
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecDif;
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vfmaq(acc0, vecDif, vecDif);
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc1 = vfmaq(acc1, vecDif, vecDif);
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA2Vec, p0);;
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc2 = vfmaq(acc2, vecDif, vecDif);
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA3Vec, p0);
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc3 = vfmaq(acc3, vecDif, vecDif);
154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Sum the partial parts
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** //sum += *pDualCoef++ * expf(-S->gamma * vecReduceF32Mve(acc0));
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2);
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3);
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vSum =
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vfmaq_f32(vSum, vld1q(pDualCoef),
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)));
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pDualCoef += 4;
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA += numCols * 4;
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Decrement the row loop counter
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** row -= 4;
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * compute 2 rows in parrallel
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** if (row >= 2) {
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecIn, acc0, acc1;
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t const *pSrcVecPtr = in;
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Initialize the pointers to 2 consecutive MatrixA rows
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187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA0 = pSrcA;
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA1 = pInA0 + numCols;
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Initialize the vector pointer
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInVec = pSrcVecPtr;
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * reset accumulators
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA0Vec = pInA0;
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA1Vec = pInA1;
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = numCols >> 2;
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U) {
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecA;
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecDif;
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecIn = vld1q(pInVec);
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInVec += 4;
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA0Vec += 4;
211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vfmaq(acc0, vecDif, vecDif);;
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA1Vec += 4;
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc1 = vfmaq(acc1, vecDif, vecDif);
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt--;
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * tail
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * (will be merged thru tail predication)
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = numCols & 3;
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** if (blkCnt > 0U) {
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecA, vecDif;
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vfmaq(acc0, vecDif, vecDif);
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc1 = vfmaq(acc1, vecDif, vecDif);
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Sum the partial parts
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
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244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vSum =
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vfmaq_m_f32(vSum, vld1q(pDualCoef),
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)), vctp32q(2));
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pDualCoef += 2;
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA += numCols * 2;
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** row -= 2;
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** if (row >= 1) {
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecIn, acc0;
255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t const *pSrcA0Vec, *pInVec;
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t const *pSrcVecPtr = in;
257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Initialize the pointers to last MatrixA row
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInA0 = pSrcA;
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Initialize the vector pointer
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInVec = pSrcVecPtr;
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * reset accumulators
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA0Vec = pInA0;
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = numCols >> 2;
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U) {
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecA, vecDif;
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecIn = vld1q(pInVec);
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pInVec += 4;
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSrcA0Vec += 4;
280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vfmaq(acc0, vecDif, vecDif);
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt--;
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * tail
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * (will be merged thru tail predication)
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = numCols & 3;
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** if (blkCnt > 0U) {
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vecA, vecDif;
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vecDif = vsubq(vecIn, vecA);
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** acc0 = vfmaq(acc0, vecDif, vecDif);
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** /*
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** * Sum the partial parts
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301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** */
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vSum =
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vfmaq_m_f32(vSum, vld1q(pDualCoef),
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)), vctp32q(1));
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** sum += vecAddAcrossF32Mve(vSum);
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *pResult = S->classes[STEP(sum)];
314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #else
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #if defined(ARM_MATH_NEON)
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #include "NEMath.h"
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** void arm_svm_rbf_predict_f32(
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const arm_svm_rbf_instance_f32 *S,
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t * in,
325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** int32_t * pResult)
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum = S->intercept;
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t dot;
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32x4_t dotV;
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32x4_t accuma,accumb,accumc,accumd,accum;
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32x2_t accum2;
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32x4_t temp;
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32x4_t vec1;
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t blkCnt;
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t vectorBlkCnt;
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pIn = in;
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupporta = S->supportVectors;
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupportb;
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupportc;
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupportd;
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportb = pSupporta + S->vectorDimension;
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportc = pSupportb + S->vectorDimension;
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportd = pSupportc + S->vectorDimension;
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pDualCoefs = S->dualCoefficients;
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
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358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors >> 2;
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (vectorBlkCnt > 0U)
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accuma = vdupq_n_f32(0);
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accumb = vdupq_n_f32(0);
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accumc = vdupq_n_f32(0);
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accumd = vdupq_n_f32(0);
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pIn = in;
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U)
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec1 = vld1q_f32(pIn);
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec2a = vld1q_f32(pSupporta);
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec2b = vld1q_f32(pSupportb);
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec2c = vld1q_f32(pSupportc);
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec2d = vld1q_f32(pSupportd);
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pIn += 4;
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupporta += 4;
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportb += 4;
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportc += 4;
382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportd += 4;
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** temp = vsubq_f32(vec1, vec2a);
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accuma = vmlaq_f32(accuma, temp, temp);
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** temp = vsubq_f32(vec1, vec2b);
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accumb = vmlaq_f32(accumb, temp, temp);
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** temp = vsubq_f32(vec1, vec2c);
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accumc = vmlaq_f32(accumc, temp, temp);
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** temp = vsubq_f32(vec1, vec2d);
394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accumd = vmlaq_f32(accumd, temp, temp);
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt -- ;
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = S->vectorDimension & 3;
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U)
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + SQ(*pIn - *pSupporta), dotV,0);
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415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + SQ(*pIn - *pSupportb), dotV,1);
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + SQ(*pIn - *pSupportc), dotV,2);
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + SQ(*pIn - *pSupportd), dotV,3);
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupporta++;
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportb++;
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportc++;
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportd++;
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pIn++;
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt -- ;
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec1 = vld1q_f32(pDualCoefs);
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pDualCoefs += 4;
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** // To vectorize later
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vmulq_n_f32(dotV, -S->gamma);
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dotV = vexpq_f32(dotV);
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum = vmulq_f32(vec1,dotV);
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupporta += 3*S->vectorDimension;
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportb += 3*S->vectorDimension;
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportc += 3*S->vectorDimension;
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupportd += 3*S->vectorDimension;
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vectorBlkCnt -- ;
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupport = pSupporta;
449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors & 3;
450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (vectorBlkCnt > 0U)
452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum = vdupq_n_f32(0);
454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dot = 0.0f;
455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pIn = in;
456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U)
459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec1 = vld1q_f32(pIn);
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vec2 = vld1q_f32(pSupport);
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pIn += 4;
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupport += 4;
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** temp = vsubq_f32(vec1,vec2);
467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum = vmlaq_f32(accum, temp,temp);
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt -- ;
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
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472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt = S->vectorDimension & 3;
476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** while (blkCnt > 0U)
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dot = dot + SQ(*pIn - *pSupport);
480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pIn++;
481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupport++;
482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** blkCnt -- ;
484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** sum += *pDualCoefs++ * expf(-S->gamma * dot);
487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** vectorBlkCnt -- ;
488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *pResult=S->classes[STEP(sum)];
491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** #else
493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** void arm_svm_rbf_predict_f32(
494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const arm_svm_rbf_instance_f32 *S,
495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t * in,
496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** int32_t * pResult)
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
402 .loc 7 497 0
403 .cfi_startproc
404 @ args = 0, pretend = 0, frame = 0
405 @ frame_needed = 0, uses_anonymous_args = 0
406 .LVL37:
407 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
408 .LCFI8:
409 .cfi_def_cfa_offset 40
410 .cfi_offset 3, -40
411 .cfi_offset 4, -36
412 .cfi_offset 5, -32
413 .cfi_offset 6, -28
414 .cfi_offset 7, -24
415 .cfi_offset 8, -20
416 .cfi_offset 9, -16
417 .cfi_offset 10, -12
418 .cfi_offset 11, -8
419 .cfi_offset 14, -4
498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum=S->intercept;
499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t dot=0;
500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** uint32_t i,j;
501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** for(i=0; i < S->nbOfSupportVectors; i++)
420 .loc 7 503 0
421 0004 0568 ldr r5, [r0]
501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c ****
422 .loc 7 501 0
423 0006 0469 ldr r4, [r0, #16]
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum=S->intercept;
424 .loc 7 497 0
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425 0008 2DED028B vpush.64 {d8}
426 .LCFI9:
427 .cfi_def_cfa_offset 48
428 .cfi_offset 80, -48
429 .cfi_offset 81, -44
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum=S->intercept;
430 .loc 7 497 0
431 000c 0646 mov r6, r0
498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum=S->intercept;
432 .loc 7 498 0
433 000e 90ED028A vldr.32 s16, [r0, #8]
434 .LVL38:
497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** float32_t sum=S->intercept;
435 .loc 7 497 0
436 0012 9246 mov r10, r2
437 .loc 7 503 0
438 0014 1DB3 cbz r5, .L46
504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dot=0;
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
439 .loc 7 506 0
440 0016 4768 ldr r7, [r0, #4]
441 0018 D0F80CB0 ldr fp, [r0, #12]
442 001c D0ED068A vldr.32 s17, [r0, #24]
443 0020 8846 mov r8, r1
444 0022 4FEA8709 lsl r9, r7, #2
445 0026 0BEB8505 add r5, fp, r5, lsl #2
446 .LVL39:
447 .L47:
448 002a 37B3 cbz r7, .L59
505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
449 .loc 7 505 0
450 002c 9FED140A vldr.32 s0, .L60
451 0030 4346 mov r3, r8
452 0032 04EB0902 add r2, r4, r9
453 .LVL40:
454 .L48:
507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** dot = dot + SQ(in[j] - *pSupport);
455 .loc 7 508 0 discriminator 3
456 0036 B4EC017A vldmia.32 r4!, {s14}
457 .LVL41:
458 003a F3EC017A vldmia.32 r3!, {s15}
459 003e 77EEC77A vsub.f32 s15, s15, s14
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
460 .loc 7 506 0 discriminator 3
461 0042 9442 cmp r4, r2
462 .loc 7 508 0 discriminator 3
463 0044 A7EEA70A vfma.f32 s0, s15, s15
464 .LVL42:
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
465 .loc 7 506 0 discriminator 3
466 0048 F5D1 bne .L48
467 004a 28EEC00A vnmul.f32 s0, s17, s0
468 .LVL43:
469 004e FFF7FEFF bl expf
470 .LVL44:
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471 .L50:
509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** pSupport++;
510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** sum += S->dualCoefficients[i] * expf(-S->gamma * dot);
472 .loc 7 511 0 discriminator 2
473 0052 FBEC017A vldmia.32 fp!, {s15}
503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
474 .loc 7 503 0 discriminator 2
475 0056 5D45 cmp r5, fp
476 .loc 7 511 0 discriminator 2
477 0058 A7EE808A vfma.f32 s16, s15, s0
478 .LVL45:
503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
479 .loc 7 503 0 discriminator 2
480 005c E5D1 bne .L47
481 .LVL46:
482 .L46:
512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** *pResult=S->classes[STEP(sum)];
483 .loc 7 513 0
484 005e 7369 ldr r3, [r6, #20]
485 0060 B5EEC08A vcmpe.f32 s16, #0
514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
486 .loc 7 514 0
487 0064 BDEC028B vldm sp!, {d8}
488 .LCFI10:
489 .cfi_remember_state
490 .cfi_restore 80
491 .cfi_restore 81
492 .cfi_def_cfa_offset 40
493 .LVL47:
513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** }
494 .loc 7 513 0
495 0068 F1EE10FA vmrs APSR_nzcv, FPSCR
496 006c C8BF it gt
497 006e 0433 addgt r3, r3, #4
498 0070 1B68 ldr r3, [r3]
499 0072 CAF80030 str r3, [r10]
500 .loc 7 514 0
501 0076 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
502 .LVL48:
503 .L59:
504 .LCFI11:
505 .cfi_restore_state
506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c **** {
506 .loc 7 506 0
507 007a B7EE000A vmov.f32 s0, #1.0e+0
508 007e E8E7 b .L50
509 .L61:
510 .align 2
511 .L60:
512 0080 00000000 .word 0
513 .cfi_endproc
514 .LFE153:
516 .section .text.arm_svm_sigmoid_init_f32,"ax",%progbits
517 .align 1
518 .p2align 2,,3
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519 .global arm_svm_sigmoid_init_f32
520 .syntax unified
521 .thumb
522 .thumb_func
523 .fpu fpv4-sp-d16
525 arm_svm_sigmoid_init_f32:
526 .LFB154:
527 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Title: arm_svm_sigmoid_predict_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Description: SVM Sigmoid Instance Initialization
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c ****
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** /**
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @addtogroup groupSVM
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @{
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** */
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** /**
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @brief SVM sigmoid instance init function
40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * Classes are integer used as output of the function (instead of having -1,1
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * as class values).
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] S points to an instance of the rbf SVM structure.
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] nbOfSupportVectors Number of support vectors
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] vectorDimension Dimension of vector space
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] intercept Intercept
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] dualCoefficients Array of dual coefficients
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] supportVectors Array of support vectors
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50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] classes Array of 2 classes ID
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] coef0 coeff0 (scikit-learn terminology)
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @param[in] gamma gamma (scikit-learn terminology)
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** * @return none.
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** *
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** */
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c ****
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S,
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** uint32_t nbOfSupportVectors,
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** uint32_t vectorDimension,
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** float32_t intercept,
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** const float32_t *dualCoefficients,
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** const float32_t *supportVectors,
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** const int32_t *classes,
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** float32_t coef0,
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** float32_t gamma
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** )
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** {
528 .loc 8 67 0
529 .cfi_startproc
530 @ args = 8, pretend = 0, frame = 0
531 @ frame_needed = 0, uses_anonymous_args = 0
532 @ link register save eliminated.
533 .LVL49:
534 0000 30B4 push {r4, r5}
535 .LCFI12:
536 .cfi_def_cfa_offset 8
537 .cfi_offset 4, -8
538 .cfi_offset 5, -4
539 .loc 8 67 0
540 0002 DDE90254 ldrd r5, r4, [sp, #8]
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->nbOfSupportVectors = nbOfSupportVectors;
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->vectorDimension = vectorDimension;
541 .loc 8 69 0
542 0006 C0E90012 strd r1, r2, [r0]
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->intercept = intercept;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->dualCoefficients = dualCoefficients;
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->supportVectors = supportVectors;
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->classes = classes;
543 .loc 8 73 0
544 000a C0E90454 strd r5, r4, [r0, #16]
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->intercept = intercept;
545 .loc 8 70 0
546 000e 80ED020A vstr.32 s0, [r0, #8]
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->supportVectors = supportVectors;
547 .loc 8 71 0
548 0012 C360 str r3, [r0, #12]
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->coef0 = coef0;
549 .loc 8 74 0
550 0014 C0ED060A vstr.32 s1, [r0, #24]
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** S->gamma = gamma;
551 .loc 8 75 0
552 0018 80ED071A vstr.32 s2, [r0, #28]
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c **** }
553 .loc 8 76 0
554 001c 30BC pop {r4, r5}
555 .LCFI13:
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556 .cfi_restore 5
557 .cfi_restore 4
558 .cfi_def_cfa_offset 0
559 .LVL50:
560 001e 7047 bx lr
561 .cfi_endproc
562 .LFE154:
564 .section .text.arm_svm_sigmoid_predict_f32,"ax",%progbits
565 .align 1
566 .p2align 2,,3
567 .global arm_svm_sigmoid_predict_f32
568 .syntax unified
569 .thumb
570 .thumb_func
571 .fpu fpv4-sp-d16
573 arm_svm_sigmoid_predict_f32:
574 .LFB155:
575 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f
1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /* ----------------------------------------------------------------------
2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Project: CMSIS DSP Library
3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Title: arm_svm_sigmoid_predict_f32.c
4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Description: SVM Sigmoid Classifier
5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Target Processor: Cortex-M and Cortex-A cores
8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * -------------------------------------------------------------------- */
9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * SPDX-License-Identifier: Apache-2.0
13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may
15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * not use this file except in compliance with the License.
16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * You may obtain a copy of the License at
17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * www.apache.org/licenses/LICENSE-2.0
19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Unless required by applicable law or agreed to in writing, software
21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * See the License for the specific language governing permissions and
24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * limitations under the License.
25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #include "arm_math.h"
28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #include <limits.h>
29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #include <math.h>
30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /**
32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @addtogroup groupSVM
33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @{
34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /**
39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @brief SVM sigmoid prediction
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40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @param[in] S Pointer to an instance of the rbf SVM structure.
41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @param[in] in Pointer to input vector
42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @param[out] pResult Decision value
43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * @return none.
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *
45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #include "arm_helium_utils.h"
50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #include "arm_vec_math.h"
51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** void arm_svm_sigmoid_predict_f32(
53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const arm_svm_sigmoid_instance_f32 *S,
54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t * in,
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** int32_t * pResult)
56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /* inlined Matrix x Vector function interleaved with dot prod */
58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t numRows = S->nbOfSupportVectors;
59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t numCols = S->vectorDimension;
60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSrcA = pSupport;
62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pInA0;
63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pInA1;
64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t row;
65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t blkCnt; /* loop counters */
66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pDualCoef = S->dualCoefficients;
67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum = S->intercept;
68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vSum = vdupq_n_f32(0.0f);
69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** row = numRows;
71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * compute 4 rows in parrallel
74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (row >= 4) {
76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pInA2, *pInA3;
77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecIn, acc0, acc1, acc2, acc3;
79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t const *pSrcVecPtr = in;
80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Initialize the pointers to 4 consecutive MatrixA rows
83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA0 = pSrcA;
85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA1 = pInA0 + numCols;
86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA2 = pInA1 + numCols;
87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA3 = pInA2 + numCols;
88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Initialize the vector pointer
90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInVec = pSrcVecPtr;
92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * reset accumulators
94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
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97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc2 = vdupq_n_f32(0.0f);
98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc3 = vdupq_n_f32(0.0f);
99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA0Vec = pInA0;
101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA1Vec = pInA1;
102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA2Vec = pInA2;
103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA3Vec = pInA3;
104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = numCols >> 2;
106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U) {
107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecA;
108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecIn = vld1q(pInVec);
110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInVec += 4;
111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA0Vec += 4;
113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA1Vec += 4;
116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA2Vec);
118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA2Vec += 4;
119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc2 = vfmaq(acc2, vecIn, vecA);
120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA3Vec);
121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA3Vec += 4;
122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc3 = vfmaq(acc3, vecIn, vecA);
123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt--;
125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * tail
128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * (will be merged thru tail predication)
129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = numCols & 3;
131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** if (blkCnt > 0U) {
132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecA;
134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA2Vec, p0);
141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc2 = vfmaq(acc2, vecIn, vecA);
142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA3Vec, p0);
143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc3 = vfmaq(acc3, vecIn, vecA);
144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Sum the partial parts
147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2);
152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3);
153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
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154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vSum =
155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vfmaq_f32(vSum, vld1q(pDualCoef),
156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)));
157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pDualCoef += 4;
159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA += numCols * 4;
161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Decrement the row loop counter
163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** row -= 4;
165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * compute 2 rows in parrallel
169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** if (row >= 2) {
171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecIn, acc0, acc1;
173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t const *pSrcVecPtr = in;
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Initialize the pointers to 2 consecutive MatrixA rows
177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA0 = pSrcA;
179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA1 = pInA0 + numCols;
180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Initialize the vector pointer
182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInVec = pSrcVecPtr;
184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * reset accumulators
186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc1 = vdupq_n_f32(0.0f);
189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA0Vec = pInA0;
190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA1Vec = pInA1;
191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = numCols >> 2;
193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U) {
194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecA;
195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecIn = vld1q(pInVec);
197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInVec += 4;
198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA0Vec += 4;
200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA1Vec);
202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA1Vec += 4;
203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt--;
206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * tail
209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * (will be merged thru tail predication)
210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
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211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = numCols & 3;
212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** if (blkCnt > 0U) {
213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecA;
215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA1Vec, p0);
220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc1 = vfmaq(acc1, vecIn, vecA);
221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Sum the partial parts
224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vSum =
230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vfmaq_m_f32(vSum, vld1q(pDualCoef),
231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)),
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vctp32q(2));
233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA += numCols * 2;
235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** row -= 2;
236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** if (row >= 1) {
239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecIn, acc0;
240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t const *pSrcA0Vec, *pInVec;
241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t const *pSrcVecPtr = in;
242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Initialize the pointers to last MatrixA row
244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInA0 = pSrcA;
246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Initialize the vector pointer
248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInVec = pSrcVecPtr;
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * reset accumulators
252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vdupq_n_f32(0.0f);
254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA0Vec = pInA0;
256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = numCols >> 2;
258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U) {
259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecA;
260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecIn = vld1q(pInVec);
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pInVec += 4;
263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vld1q(pSrcA0Vec);
264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSrcA0Vec += 4;
265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt--;
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268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * tail
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * (will be merged thru tail predication)
272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = numCols & 3;
274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** if (blkCnt > 0U) {
275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** mve_pred16_t p0 = vctp32q(blkCnt);
276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vecA;
277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecIn = vldrwq_z_f32(pInVec, p0);
279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vecA = vldrwq_z_f32(pSrcA0Vec, p0);
280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** acc0 = vfmaq(acc0, vecIn, vecA);
281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** /*
283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** * Sum the partial parts
284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** */
285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** f32x4_t vtmp = vuninitializedq_f32();
286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vSum =
289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vfmaq_m_f32(vSum, vld1q(pDualCoef),
290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)),
291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vctp32q(1));
292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** sum += vecAddAcrossF32Mve(vSum);
294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *pResult = S->classes[STEP(sum)];
296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #else
299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #if defined(ARM_MATH_NEON)
300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #include "NEMath.h"
301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** void arm_svm_sigmoid_predict_f32(
303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const arm_svm_sigmoid_instance_f32 *S,
304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t * in,
305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** int32_t * pResult)
306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum = S->intercept;
308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t dot;
310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32x4_t dotV;
311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32x4_t accuma,accumb,accumc,accumd,accum;
313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32x2_t accum2;
314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32x4_t vec1;
315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32x4_t coef0 = vdupq_n_f32(S->coef0);
316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t blkCnt;
320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t vectorBlkCnt;
321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pIn = in;
323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
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325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupporta = S->supportVectors;
327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupportb;
328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupportc;
329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupportd;
330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportb = pSupporta + S->vectorDimension;
332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportc = pSupportb + S->vectorDimension;
333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportd = pSupportc + S->vectorDimension;
334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pDualCoefs = S->dualCoefficients;
336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors >> 2;
338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (vectorBlkCnt > 0U)
339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accuma = vdupq_n_f32(0);
341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accumb = vdupq_n_f32(0);
342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accumc = vdupq_n_f32(0);
343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accumd = vdupq_n_f32(0);
344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pIn = in;
346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U)
349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec1 = vld1q_f32(pIn);
352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec2a = vld1q_f32(pSupporta);
353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec2b = vld1q_f32(pSupportb);
354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec2c = vld1q_f32(pSupportc);
355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec2d = vld1q_f32(pSupportd);
356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pIn += 4;
358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupporta += 4;
359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportb += 4;
360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportc += 4;
361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportd += 4;
362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accuma = vmlaq_f32(accuma, vec1,vec2a);
364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accumb = vmlaq_f32(accumb, vec1,vec2b);
365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accumc = vmlaq_f32(accumc, vec1,vec2c);
366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accumd = vmlaq_f32(accumd, vec1,vec2d);
367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt -- ;
369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
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382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = S->vectorDimension & 3;
384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U)
385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0);
387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1);
388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2);
389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3);
390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pIn++;
392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt -- ;
394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec1 = vld1q_f32(pDualCoefs);
397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pDualCoefs += 4;
398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** // To vectorize later
400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vmulq_n_f32(dotV, S->gamma);
401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vaddq_f32(dotV, coef0);
402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dotV = vtanhq_f32(dotV);
404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum = vmulq_f32(vec1,dotV);
406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupporta += 3*S->vectorDimension;
410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportb += 3*S->vectorDimension;
411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportc += 3*S->vectorDimension;
412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupportd += 3*S->vectorDimension;
413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vectorBlkCnt -- ;
415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupport = pSupporta;
418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vectorBlkCnt = S->nbOfSupportVectors & 3;
419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (vectorBlkCnt > 0U)
421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum = vdupq_n_f32(0);
423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dot = 0.0f;
424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pIn = in;
425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = S->vectorDimension >> 2;
427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U)
428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec1 = vld1q_f32(pIn);
431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vec2 = vld1q_f32(pSupport);
432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pIn += 4;
433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** pSupport += 4;
434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum = vmlaq_f32(accum, vec1,vec2);
436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt -- ;
438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
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439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt = S->vectorDimension & 3;
444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** while (blkCnt > 0U)
445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dot = dot + *pIn++ * *pSupport++;
447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** blkCnt -- ;
449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** sum += *pDualCoefs++ * tanhf(S->gamma * dot + S->coef0);
452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** vectorBlkCnt -- ;
453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *pResult=S->classes[STEP(sum)];
456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** #else
458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** void arm_svm_sigmoid_predict_f32(
459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const arm_svm_sigmoid_instance_f32 *S,
460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t * in,
461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** int32_t * pResult)
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
576 .loc 9 462 0
577 .cfi_startproc
578 @ args = 0, pretend = 0, frame = 0
579 @ frame_needed = 0, uses_anonymous_args = 0
580 .LVL51:
581 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
582 .LCFI14:
583 .cfi_def_cfa_offset 40
584 .cfi_offset 3, -40
585 .cfi_offset 4, -36
586 .cfi_offset 5, -32
587 .cfi_offset 6, -28
588 .cfi_offset 7, -24
589 .cfi_offset 8, -20
590 .cfi_offset 9, -16
591 .cfi_offset 10, -12
592 .cfi_offset 11, -8
593 .cfi_offset 14, -4
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum=S->intercept;
464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t dot=0;
465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** uint32_t i,j;
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** const float32_t *pSupport = S->supportVectors;
467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** for(i=0; i < S->nbOfSupportVectors; i++)
594 .loc 9 468 0
595 0004 0568 ldr r5, [r0]
466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c ****
596 .loc 9 466 0
597 0006 0469 ldr r4, [r0, #16]
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum=S->intercept;
598 .loc 9 462 0
599 0008 2DED048B vpush.64 {d8, d9}
600 .LCFI15:
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601 .cfi_def_cfa_offset 56
602 .cfi_offset 80, -56
603 .cfi_offset 81, -52
604 .cfi_offset 82, -48
605 .cfi_offset 83, -44
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum=S->intercept;
606 .loc 9 462 0
607 000c 0646 mov r6, r0
463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum=S->intercept;
608 .loc 9 463 0
609 000e 90ED028A vldr.32 s16, [r0, #8]
610 .LVL52:
462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** float32_t sum=S->intercept;
611 .loc 9 462 0
612 0012 9246 mov r10, r2
613 .loc 9 468 0
614 0014 2DB3 cbz r5, .L65
469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dot=0;
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
615 .loc 9 471 0
616 0016 4768 ldr r7, [r0, #4]
617 0018 D0F80CB0 ldr fp, [r0, #12]
618 001c 90ED079A vldr.32 s18, [r0, #28]
619 0020 D0ED068A vldr.32 s17, [r0, #24]
620 0024 8846 mov r8, r1
621 0026 4FEA8709 lsl r9, r7, #2
622 002a 0BEB8505 add r5, fp, r5, lsl #2
623 .LVL53:
624 .L66:
625 002e 37B3 cbz r7, .L78
470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** for(j=0; j < S->vectorDimension; j++)
626 .loc 9 470 0
627 0030 DFED147A vldr.32 s15, .L79
628 0034 4346 mov r3, r8
629 0036 04EB0902 add r2, r4, r9
630 .LVL54:
631 .L67:
472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** dot = dot + in[j]* *pSupport++;
632 .loc 9 473 0 discriminator 3
633 003a B4EC017A vldmia.32 r4!, {s14}
634 .LVL55:
635 003e F3EC016A vldmia.32 r3!, {s13}
636 .LVL56:
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
637 .loc 9 471 0 discriminator 3
638 0042 9442 cmp r4, r2
639 .loc 9 473 0 discriminator 3
640 0044 E6EE877A vfma.f32 s15, s13, s14
641 .LVL57:
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
642 .loc 9 471 0 discriminator 3
643 0048 F7D1 bne .L67
644 004a B0EE680A vmov.f32 s0, s17
645 004e A7EE890A vfma.f32 s0, s15, s18
646 .LVL58:
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647 .L69:
474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** sum += S->dualCoefficients[i] * tanhf(S->gamma * dot + S->coef0);
648 .loc 9 475 0 discriminator 2
649 0052 FFF7FEFF bl tanhf
650 .LVL59:
651 0056 FBEC017A vldmia.32 fp!, {s15}
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
652 .loc 9 468 0 discriminator 2
653 005a 5D45 cmp r5, fp
654 .loc 9 475 0 discriminator 2
655 005c A7EE808A vfma.f32 s16, s15, s0
656 .LVL60:
468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
657 .loc 9 468 0 discriminator 2
658 0060 E5D1 bne .L66
659 .LVL61:
660 .L65:
476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** *pResult=S->classes[STEP(sum)];
661 .loc 9 477 0
662 0062 7369 ldr r3, [r6, #20]
663 0064 B5EEC08A vcmpe.f32 s16, #0
478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
664 .loc 9 478 0
665 0068 BDEC048B vldm sp!, {d8-d9}
666 .LCFI16:
667 .cfi_remember_state
668 .cfi_restore 82
669 .cfi_restore 83
670 .cfi_restore 80
671 .cfi_restore 81
672 .cfi_def_cfa_offset 40
673 .LVL62:
477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** }
674 .loc 9 477 0
675 006c F1EE10FA vmrs APSR_nzcv, FPSCR
676 0070 C8BF it gt
677 0072 0433 addgt r3, r3, #4
678 0074 1B68 ldr r3, [r3]
679 0076 CAF80030 str r3, [r10]
680 .loc 9 478 0
681 007a BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
682 .LVL63:
683 .L78:
684 .LCFI17:
685 .cfi_restore_state
471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c **** {
686 .loc 9 471 0
687 007e B0EE680A vmov.f32 s0, s17
688 0082 E6E7 b .L69
689 .L80:
690 .align 2
691 .L79:
692 0084 00000000 .word 0
693 .cfi_endproc
694 .LFE155:
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696 .text
697 .Letext0:
698 .file 10 "/usr/include/newlib/machine/_default_types.h"
699 .file 11 "/usr/include/newlib/sys/_stdint.h"
700 .file 12 "/usr/include/newlib/sys/lock.h"
701 .file 13 "/usr/include/newlib/sys/_types.h"
702 .file 14 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h"
703 .file 15 "/usr/include/newlib/sys/reent.h"
704 .file 16 "/usr/include/newlib/math.h"
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DEFINED SYMBOLS
*ABS*:0000000000000000 SVMFunctions.c
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/tmp/cc6wDIqQ.s:16 .text.arm_svm_linear_init_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:24 .text.arm_svm_linear_init_f32:0000000000000000 arm_svm_linear_init_f32
/tmp/cc6wDIqQ.s:60 .text.arm_svm_linear_predict_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:68 .text.arm_svm_linear_predict_f32:0000000000000000 arm_svm_linear_predict_f32
/tmp/cc6wDIqQ.s:150 .text.arm_svm_linear_predict_f32:0000000000000058 $d
/tmp/cc6wDIqQ.s:155 .text.arm_svm_polynomial_init_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:163 .text.arm_svm_polynomial_init_f32:0000000000000000 arm_svm_polynomial_init_f32
/tmp/cc6wDIqQ.s:210 .text.arm_svm_polynomial_predict_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:218 .text.arm_svm_polynomial_predict_f32:0000000000000000 arm_svm_polynomial_predict_f32
/tmp/cc6wDIqQ.s:340 .text.arm_svm_polynomial_predict_f32:0000000000000088 $d
/tmp/cc6wDIqQ.s:345 .text.arm_svm_rbf_init_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:353 .text.arm_svm_rbf_init_f32:0000000000000000 arm_svm_rbf_init_f32
/tmp/cc6wDIqQ.s:391 .text.arm_svm_rbf_predict_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:399 .text.arm_svm_rbf_predict_f32:0000000000000000 arm_svm_rbf_predict_f32
/tmp/cc6wDIqQ.s:512 .text.arm_svm_rbf_predict_f32:0000000000000080 $d
/tmp/cc6wDIqQ.s:517 .text.arm_svm_sigmoid_init_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:525 .text.arm_svm_sigmoid_init_f32:0000000000000000 arm_svm_sigmoid_init_f32
/tmp/cc6wDIqQ.s:565 .text.arm_svm_sigmoid_predict_f32:0000000000000000 $t
/tmp/cc6wDIqQ.s:573 .text.arm_svm_sigmoid_predict_f32:0000000000000000 arm_svm_sigmoid_predict_f32
/tmp/cc6wDIqQ.s:692 .text.arm_svm_sigmoid_predict_f32:0000000000000084 $d
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UNDEFINED SYMBOLS
expf
tanhf
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