Files
bassofono/codice/build/stm32g4xx_hal.lst

2236 lines
123 KiB
Plaintext
Raw Normal View History

2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 1
2021-07-02 22:19:04 +02:00
1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32g4xx_hal.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_MspInit,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .weak HAL_MspInit
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 HAL_MspInit:
25 .LFB331:
26 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c"
1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ******************************************************************************
3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @file stm32g4xx_hal.c
4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @author MCD Application Team
5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief HAL module driver.
6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This is the common part of the HAL initialization
7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @verbatim
9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ==============================================================================
10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ##### How to use this driver #####
11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ==============================================================================
12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** [..]
13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** The common HAL driver contains a set of generic and common APIs that can be
14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** used by the PPP peripheral drivers and the user to start using the HAL.
15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** [..]
16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** The HAL contains two APIs' categories:
17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Common HAL APIs
18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Services HAL APIs
19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @endverbatim
21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ******************************************************************************
22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @attention
23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * All rights reserved.</center></h2>
26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This software component is licensed by ST under BSD 3-Clause license,
28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * the "License"; You may not use this file except in compliance with the
29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * License. You may obtain a copy of the License at:
30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * opensource.org/licenses/BSD-3-Clause
31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ******************************************************************************
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 2
2021-07-02 22:19:04 +02:00
33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Includes ------------------------------------------------------------------*/
36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #include "stm32g4xx_hal.h"
37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @addtogroup STM32G4xx_HAL_Driver
39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL HAL
43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief HAL module driver
44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #ifdef HAL_MODULE_ENABLED
48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Private typedef -----------------------------------------------------------*/
50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Private define ------------------------------------------------------------*/
51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief STM32G4xx HAL Driver version number V1.2.1
53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define __STM32G4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */
55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define __STM32G4xx_HAL_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */
56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define __STM32G4xx_HAL_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */
57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define __STM32G4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */
58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define __STM32G4xx_HAL_VERSION ((__STM32G4xx_HAL_VERSION_MAIN << 24U)\
59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** |(__STM32G4xx_HAL_VERSION_SUB1 << 16U)\
60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** |(__STM32G4xx_HAL_VERSION_SUB2 << 8U )\
61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** |(__STM32G4xx_HAL_VERSION_RC))
62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #if defined(VREFBUF)
64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define VREFBUF_TIMEOUT_VALUE 10U /* 10 ms */
65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #endif /* VREFBUF */
66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* ------------ SYSCFG registers bit address in the alias region ------------ */
68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define SYSCFG_OFFSET (SYSCFG_BASE - PERIPH_BASE)
69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* --- MEMRMP Register ---*/
70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Alias word address of FB_MODE bit */
71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define MEMRMP_OFFSET SYSCFG_OFFSET
72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define FB_MODE_BitNumber ((uint8_t)0x8)
73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define FB_MODE_BB (PERIPH_BB_BASE + (MEMRMP_OFFSET * 32) + (FB_MODE_BitNumber * 4))
74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* --- GPC Register ---*/
76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Alias word address of CCMER bit */
77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define SCSR_OFFSET (SYSCFG_OFFSET + 0x18)
78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define CCMER_BitNumber ((uint8_t)0x0)
79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #define SCSR_CCMER_BB (PERIPH_BB_BASE + (SCSR_OFFSET * 32) + (CCMER_BitNumber * 4))
80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Private macro -------------------------------------------------------------*/
82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Exported variables ---------------------------------------------------------*/
83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL_Exported_Variables HAL Exported Variables
84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __IO uint32_t uwTick;
87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */
88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */
89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 3
2021-07-02 22:19:04 +02:00
90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @}
91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Private function prototypes -----------------------------------------------*/
94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Exported functions --------------------------------------------------------*/
95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL_Exported_Functions HAL Exported Functions
97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief HAL Initialization and de-initialization functions
102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @verbatim
104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ##### Initialization and Configuration functions #####
106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** [..] This section provides functions allowing to:
108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Initialize the Flash interface the NVIC allocation and initial time base
109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** clock configuration.
110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) De-Initialize common part of the HAL.
111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Configure the time base source to have 1ms time base with a dedicated
112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** Tick interrupt priority.
113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (++) SysTick timer is used by default as source of time base, but user
114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** can eventually implement his proper time base source (a general purpose
115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** timer for example or other time source), keeping in mind that Time base
116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and
117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** handled in milliseconds basis.
118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (++) Time base configuration function (HAL_InitTick ()) is called automatically
119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** at the beginning of the program after reset by HAL_Init() or at any time
120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** when clock is configured, by HAL_RCC_ClockConfig().
121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (++) Source of time base is configured to generate interrupts at regular
122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** time intervals. Care must be taken if HAL_Delay() is called from a
123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** peripheral ISR process, the Tick interrupt line must have higher priority
124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (numerically lower) than the peripheral interrupt. Otherwise the caller
125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ISR process will be blocked.
126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (++) functions affecting time base configurations are declared as __weak
127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** to make override possible in case of other implementations in user file.
128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @endverbatim
129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function is used to configure the Flash prefetch, the Instruction and Data caches,
134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * the time base source, NVIC and any required global low level hardware
135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * by calling the HAL_MspInit() callback function to be optionally defined in user file
136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * stm32g4xx_hal_msp.c.
137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note HAL_Init() function is called at the beginning of program after reset and before
139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * the clock configuration.
140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note In the default implementation the System Timer (Systick) is used as source of time base
142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * The Systick configuration is based on HSI clock, as HSI is the clock
143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * used after a system Reset and the NVIC configuration is set to Priority group 4.
144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * Once done, time base tick starts incrementing: the tick variable counter is incremented
145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * each 1ms in the SysTick_Handler() interrupt handler.
146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 4
2021-07-02 22:19:04 +02:00
147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval HAL status
148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef HAL_Init(void)
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef status = HAL_OK;
152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Configure Flash prefetch, Instruction cache, Data cache */
153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Default configuration at reset is: */
154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* - Prefetch disabled */
155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* - Instruction cache enabled */
156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* - Data cache enabled */
157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #if (INSTRUCTION_CACHE_ENABLE == 0U)
158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #endif /* INSTRUCTION_CACHE_ENABLE */
160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #if (DATA_CACHE_ENABLE == 0U)
162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_FLASH_DATA_CACHE_DISABLE();
163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #endif /* DATA_CACHE_ENABLE */
164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #if (PREFETCH_ENABLE != 0U)
166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #endif /* PREFETCH_ENABLE */
168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Set Interrupt Group Priority */
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is HSI) */
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** status = HAL_ERROR;
176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** else
178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Init the low level hardware */
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_MspInit();
181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Return function status */
184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return status;
185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function de-initializes common part of the HAL and stops the source of time base.
190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is optional.
191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval HAL status
192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef HAL_DeInit(void)
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Reset of all peripherals */
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB1_FORCE_RESET();
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET();
198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB2_FORCE_RESET();
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET();
201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB1_FORCE_RESET();
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB1_RELEASE_RESET();
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 5
2021-07-02 22:19:04 +02:00
204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB2_FORCE_RESET();
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB2_RELEASE_RESET();
207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB3_FORCE_RESET();
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB3_RELEASE_RESET();
210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* De-Init the low level hardware */
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_MspDeInit();
213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Return function status */
215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return HAL_OK;
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Initialize the MSP.
220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak void HAL_MspInit(void)
223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
27 .loc 1 223 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed,
225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** the HAL_MspInit could be implemented in the user file
226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
32 .loc 1 227 0
33 0000 7047 bx lr
34 .cfi_endproc
35 .LFE331:
37 0002 00BF .section .text.HAL_MspDeInit,"ax",%progbits
38 .align 1
39 .p2align 2,,3
40 .weak HAL_MspDeInit
41 .syntax unified
42 .thumb
43 .thumb_func
44 .fpu fpv4-sp-d16
46 HAL_MspDeInit:
47 .LFB366:
48 .cfi_startproc
49 @ args = 0, pretend = 0, frame = 0
50 @ frame_needed = 0, uses_anonymous_args = 0
51 @ link register save eliminated.
52 0000 7047 bx lr
53 .cfi_endproc
54 .LFE366:
56 0002 00BF .section .text.HAL_DeInit,"ax",%progbits
57 .align 1
58 .p2align 2,,3
59 .global HAL_DeInit
60 .syntax unified
61 .thumb
62 .thumb_func
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 6
2021-07-02 22:19:04 +02:00
63 .fpu fpv4-sp-d16
65 HAL_DeInit:
66 .LFB330:
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Reset of all peripherals */
67 .loc 1 194 0
68 .cfi_startproc
69 @ args = 0, pretend = 0, frame = 0
70 @ frame_needed = 0, uses_anonymous_args = 0
194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Reset of all peripherals */
71 .loc 1 194 0
72 0000 10B5 push {r4, lr}
73 .LCFI0:
74 .cfi_def_cfa_offset 8
75 .cfi_offset 4, -8
76 .cfi_offset 14, -4
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET();
77 .loc 1 196 0
78 0002 094B ldr r3, .L6
79 0004 4FF0FF32 mov r2, #-1
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
80 .loc 1 197 0
81 0008 0024 movs r4, #0
196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET();
82 .loc 1 196 0
83 000a 9A63 str r2, [r3, #56]
197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
84 .loc 1 197 0
85 000c 9C63 str r4, [r3, #56]
199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET();
86 .loc 1 199 0
87 000e 1A64 str r2, [r3, #64]
200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
88 .loc 1 200 0
89 0010 1C64 str r4, [r3, #64]
202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB1_RELEASE_RESET();
90 .loc 1 202 0
91 0012 9A62 str r2, [r3, #40]
203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
92 .loc 1 203 0
93 0014 9C62 str r4, [r3, #40]
205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB2_RELEASE_RESET();
94 .loc 1 205 0
95 0016 DA62 str r2, [r3, #44]
206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
96 .loc 1 206 0
97 0018 DC62 str r4, [r3, #44]
208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __HAL_RCC_AHB3_RELEASE_RESET();
98 .loc 1 208 0
99 001a 1A63 str r2, [r3, #48]
209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
100 .loc 1 209 0
101 001c 1C63 str r4, [r3, #48]
212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
102 .loc 1 212 0
103 001e FFF7FEFF bl HAL_MspDeInit
104 .LVL0:
216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 7
2021-07-02 22:19:04 +02:00
105 .loc 1 216 0
106 0022 2046 mov r0, r4
107 0024 10BD pop {r4, pc}
108 .L7:
109 0026 00BF .align 2
110 .L6:
111 0028 00100240 .word 1073876992
112 .cfi_endproc
113 .LFE330:
115 .section .text.HAL_InitTick,"ax",%progbits
116 .align 1
117 .p2align 2,,3
118 .weak HAL_InitTick
119 .syntax unified
120 .thumb
121 .thumb_func
122 .fpu fpv4-sp-d16
124 HAL_InitTick:
125 .LFB333:
228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief DeInitializes the MSP.
231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak void HAL_MspDeInit(void)
234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed,
236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** the HAL_MspDeInit could be implemented in the user file
237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function configures the source of the time base:
242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * The time source is configured to have 1ms time base with a dedicated
243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * Tick interrupt priority.
244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is called automatically at the beginning of program after
245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig().
246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note In the default implementation, SysTick timer is the source of time base.
247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * It is used to generate interrupts at regular time intervals.
248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * Care must be taken if HAL_Delay() is called from a peripheral ISR process,
249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * The SysTick interrupt must have higher priority (numerically lower)
250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * than the peripheral interrupt. Otherwise the caller ISR process will be blocked.
251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * The function is declared as __weak to be overwritten in case of other
252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * implementation in user file.
253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param TickPriority: Tick interrupt priority.
254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval HAL status
255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
126 .loc 1 257 0
127 .cfi_startproc
128 @ args = 0, pretend = 0, frame = 0
129 @ frame_needed = 0, uses_anonymous_args = 0
130 .LVL1:
131 0000 38B5 push {r3, r4, r5, lr}
132 .LCFI1:
133 .cfi_def_cfa_offset 16
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 8
2021-07-02 22:19:04 +02:00
134 .cfi_offset 3, -16
135 .cfi_offset 4, -12
136 .cfi_offset 5, -8
137 .cfi_offset 14, -4
258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef status = HAL_OK;
259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (uwTickFreq != 0U)
138 .loc 1 260 0
139 0002 0F4B ldr r3, .L13
140 0004 1B68 ldr r3, [r3]
141 0006 0BB9 cbnz r3, .L9
142 .LVL2:
143 .L11:
261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Configure the SysTick to have interrupt in 1ms time basis*/
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) == 0U)
264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Configure the SysTick IRQ priority */
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS))
267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uwTickPrio = TickPriority;
270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** else
272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** status = HAL_ERROR;
274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** else
277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** status = HAL_ERROR;
279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** else
282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** status = HAL_ERROR;
144 .loc 1 283 0
145 0008 0120 movs r0, #1
146 .LVL3:
284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Return function status */
287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return status;
288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
147 .loc 1 288 0
148 000a 38BD pop {r3, r4, r5, pc}
149 .LVL4:
150 .L9:
263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
151 .loc 1 263 0
152 000c 0D49 ldr r1, .L13+4
153 000e 4FF47A72 mov r2, #1000
154 0012 0546 mov r5, r0
155 0014 B2FBF3F3 udiv r3, r2, r3
156 0018 0868 ldr r0, [r1]
157 .LVL5:
158 001a B0FBF3F0 udiv r0, r0, r3
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 9
2021-07-02 22:19:04 +02:00
159 001e FFF7FEFF bl HAL_SYSTICK_Config
160 .LVL6:
161 0022 0446 mov r4, r0
162 0024 0028 cmp r0, #0
163 0026 EFD1 bne .L11
266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
164 .loc 1 266 0
165 0028 0F2D cmp r5, #15
166 002a EDD8 bhi .L11
167 .LVL7:
168 .LBB4:
169 .LBB5:
268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uwTickPrio = TickPriority;
170 .loc 1 268 0
171 002c 0246 mov r2, r0
172 002e 2946 mov r1, r5
173 0030 4FF0FF30 mov r0, #-1
174 0034 FFF7FEFF bl HAL_NVIC_SetPriority
175 .LVL8:
269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
176 .loc 1 269 0
177 0038 034B ldr r3, .L13+8
178 003a 2046 mov r0, r4
179 003c 1D60 str r5, [r3]
180 .LVL9:
181 .LBE5:
182 .LBE4:
183 .loc 1 288 0
184 003e 38BD pop {r3, r4, r5, pc}
185 .LVL10:
186 .L14:
187 .align 2
188 .L13:
189 0040 00000000 .word .LANCHOR0
190 0044 00000000 .word SystemCoreClock
191 0048 00000000 .word .LANCHOR1
192 .cfi_endproc
193 .LFE333:
195 .section .text.HAL_Init,"ax",%progbits
196 .align 1
197 .p2align 2,,3
198 .global HAL_Init
199 .syntax unified
200 .thumb
201 .thumb_func
202 .fpu fpv4-sp-d16
204 HAL_Init:
205 .LFB329:
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef status = HAL_OK;
206 .loc 1 150 0
207 .cfi_startproc
208 @ args = 0, pretend = 0, frame = 8
209 @ frame_needed = 0, uses_anonymous_args = 0
210 .LVL11:
211 0000 00B5 push {lr}
212 .LCFI2:
213 .cfi_def_cfa_offset 4
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 10
2021-07-02 22:19:04 +02:00
214 .cfi_offset 14, -4
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
215 .loc 1 170 0
216 0002 0320 movs r0, #3
150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef status = HAL_OK;
217 .loc 1 150 0
218 0004 83B0 sub sp, sp, #12
219 .LCFI3:
220 .cfi_def_cfa_offset 16
170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
221 .loc 1 170 0
222 0006 FFF7FEFF bl HAL_NVIC_SetPriorityGrouping
223 .LVL12:
173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
224 .loc 1 173 0
225 000a 0020 movs r0, #0
226 000c FFF7FEFF bl HAL_InitTick
227 .LVL13:
228 0010 18B1 cbz r0, .L19
175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
229 .loc 1 175 0
230 0012 0120 movs r0, #1
231 .LVL14:
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
232 .loc 1 186 0
233 0014 03B0 add sp, sp, #12
234 .LCFI4:
235 .cfi_remember_state
236 .cfi_def_cfa_offset 4
237 @ sp needed
238 0016 5DF804FB ldr pc, [sp], #4
239 .LVL15:
240 .L19:
241 .LCFI5:
242 .cfi_restore_state
243 001a 0190 str r0, [sp, #4]
180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
244 .loc 1 180 0
245 001c FFF7FEFF bl HAL_MspInit
246 .LVL16:
247 0020 0198 ldr r0, [sp, #4]
248 .LVL17:
186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
249 .loc 1 186 0
250 0022 03B0 add sp, sp, #12
251 .LCFI6:
252 .cfi_def_cfa_offset 4
253 @ sp needed
254 0024 5DF804FB ldr pc, [sp], #4
255 .cfi_endproc
256 .LFE329:
258 .section .text.HAL_IncTick,"ax",%progbits
259 .align 1
260 .p2align 2,,3
261 .weak HAL_IncTick
262 .syntax unified
263 .thumb
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 11
2021-07-02 22:19:04 +02:00
264 .thumb_func
265 .fpu fpv4-sp-d16
267 HAL_IncTick:
268 .LFB334:
289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @}
292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions
295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief HAL Control functions
296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @verbatim
298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ##### HAL Control functions #####
300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** [..] This section provides functions allowing to:
302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Provide a tick value in millisecond
303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Provide a blocking delay in millisecond
304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Suspend the time base source interrupt
305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Resume the time base source interrupt
306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Get the HAL API driver version
307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Get the device identifier
308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Get the device revision identifier
309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @endverbatim
311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function is called to increment a global variable "uwTick"
316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * used as application time base.
317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms
318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * in SysTick ISR.
319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other
320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * implementations in user file.
321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak void HAL_IncTick(void)
324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
269 .loc 1 324 0
270 .cfi_startproc
271 @ args = 0, pretend = 0, frame = 0
272 @ frame_needed = 0, uses_anonymous_args = 0
273 @ link register save eliminated.
325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uwTick += uwTickFreq;
274 .loc 1 325 0
275 0000 034A ldr r2, .L21
276 0002 0449 ldr r1, .L21+4
277 0004 1368 ldr r3, [r2]
278 0006 0968 ldr r1, [r1]
279 0008 0B44 add r3, r3, r1
280 000a 1360 str r3, [r2]
326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
281 .loc 1 326 0
282 000c 7047 bx lr
283 .L22:
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 12
2021-07-02 22:19:04 +02:00
284 000e 00BF .align 2
285 .L21:
286 0010 00000000 .word uwTick
287 0014 00000000 .word .LANCHOR0
288 .cfi_endproc
289 .LFE334:
291 .section .text.HAL_GetTick,"ax",%progbits
292 .align 1
293 .p2align 2,,3
294 .weak HAL_GetTick
295 .syntax unified
296 .thumb
297 .thumb_func
298 .fpu fpv4-sp-d16
300 HAL_GetTick:
301 .LFB335:
327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Provides a tick value in millisecond.
330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other
331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * implementations in user file.
332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval tick value
333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak uint32_t HAL_GetTick(void)
335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
302 .loc 1 335 0
303 .cfi_startproc
304 @ args = 0, pretend = 0, frame = 0
305 @ frame_needed = 0, uses_anonymous_args = 0
306 @ link register save eliminated.
336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return uwTick;
307 .loc 1 336 0
308 0000 014B ldr r3, .L24
309 0002 1868 ldr r0, [r3]
337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
310 .loc 1 337 0
311 0004 7047 bx lr
312 .L25:
313 0006 00BF .align 2
314 .L24:
315 0008 00000000 .word uwTick
316 .cfi_endproc
317 .LFE335:
319 .section .text.HAL_GetTickPrio,"ax",%progbits
320 .align 1
321 .p2align 2,,3
322 .global HAL_GetTickPrio
323 .syntax unified
324 .thumb
325 .thumb_func
326 .fpu fpv4-sp-d16
328 HAL_GetTickPrio:
329 .LFB336:
338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function returns a tick priority.
341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval tick priority
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 13
2021-07-02 22:19:04 +02:00
342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t HAL_GetTickPrio(void)
344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
330 .loc 1 344 0
331 .cfi_startproc
332 @ args = 0, pretend = 0, frame = 0
333 @ frame_needed = 0, uses_anonymous_args = 0
334 @ link register save eliminated.
345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return uwTickPrio;
335 .loc 1 345 0
336 0000 014B ldr r3, .L27
346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
337 .loc 1 346 0
338 0002 1868 ldr r0, [r3]
339 0004 7047 bx lr
340 .L28:
341 0006 00BF .align 2
342 .L27:
343 0008 00000000 .word .LANCHOR1
344 .cfi_endproc
345 .LFE336:
347 .section .text.HAL_SetTickFreq,"ax",%progbits
348 .align 1
349 .p2align 2,,3
350 .global HAL_SetTickFreq
351 .syntax unified
352 .thumb
353 .thumb_func
354 .fpu fpv4-sp-d16
356 HAL_SetTickFreq:
357 .LFB337:
347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Set new tick Freq.
350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval status
351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef HAL_SetTickFreq(uint32_t Freq)
353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
358 .loc 1 353 0
359 .cfi_startproc
360 @ args = 0, pretend = 0, frame = 0
361 @ frame_needed = 0, uses_anonymous_args = 0
362 .LVL18:
363 0000 38B5 push {r3, r4, r5, lr}
364 .LCFI7:
365 .cfi_def_cfa_offset 16
366 .cfi_offset 3, -16
367 .cfi_offset 4, -12
368 .cfi_offset 5, -8
369 .cfi_offset 14, -4
354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef status = HAL_OK;
355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t prevTickFreq;
356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** assert_param(IS_TICKFREQ(Freq));
358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (uwTickFreq != Freq)
370 .loc 1 359 0
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 14
2021-07-02 22:19:04 +02:00
371 0002 074C ldr r4, .L36
372 0004 2568 ldr r5, [r4]
373 0006 8542 cmp r5, r0
374 0008 07D0 beq .L31
375 .LVL19:
360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Back up uwTickFreq frequency */
362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** prevTickFreq = uwTickFreq;
363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uwTickFreq = Freq;
366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Apply the new tick Freq */
368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** status = HAL_InitTick(uwTickPrio);
376 .loc 1 368 0
377 000a 064B ldr r3, .L36+4
365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
378 .loc 1 365 0
379 000c 2060 str r0, [r4]
380 .loc 1 368 0
381 000e 1868 ldr r0, [r3]
382 .LVL20:
383 0010 FFF7FEFF bl HAL_InitTick
384 .LVL21:
369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (status != HAL_OK)
385 .loc 1 370 0
386 0014 00B1 cbz r0, .L30
371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Restore previous tick frequency */
373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uwTickFreq = prevTickFreq;
387 .loc 1 373 0
388 0016 2560 str r5, [r4]
389 .L30:
374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return status;
378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
390 .loc 1 378 0
391 0018 38BD pop {r3, r4, r5, pc}
392 .LVL22:
393 .L31:
354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t prevTickFreq;
394 .loc 1 354 0
395 001a 0020 movs r0, #0
396 .LVL23:
397 .loc 1 378 0
398 001c 38BD pop {r3, r4, r5, pc}
399 .L37:
400 001e 00BF .align 2
401 .L36:
402 0020 00000000 .word .LANCHOR0
403 0024 00000000 .word .LANCHOR1
404 .cfi_endproc
405 .LFE337:
407 .section .text.HAL_GetTickFreq,"ax",%progbits
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 15
2021-07-02 22:19:04 +02:00
408 .align 1
409 .p2align 2,,3
410 .global HAL_GetTickFreq
411 .syntax unified
412 .thumb
413 .thumb_func
414 .fpu fpv4-sp-d16
416 HAL_GetTickFreq:
417 .LFB338:
379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Returns tick frequency.
382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval tick period in Hz
383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t HAL_GetTickFreq(void)
385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
418 .loc 1 385 0
419 .cfi_startproc
420 @ args = 0, pretend = 0, frame = 0
421 @ frame_needed = 0, uses_anonymous_args = 0
422 @ link register save eliminated.
386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return uwTickFreq;
423 .loc 1 386 0
424 0000 014B ldr r3, .L39
387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
425 .loc 1 387 0
426 0002 1868 ldr r0, [r3]
427 0004 7047 bx lr
428 .L40:
429 0006 00BF .align 2
430 .L39:
431 0008 00000000 .word .LANCHOR0
432 .cfi_endproc
433 .LFE338:
435 .section .text.HAL_Delay,"ax",%progbits
436 .align 1
437 .p2align 2,,3
438 .weak HAL_Delay
439 .syntax unified
440 .thumb
441 .thumb_func
442 .fpu fpv4-sp-d16
444 HAL_Delay:
445 .LFB339:
388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief This function provides minimum delay (in milliseconds) based
391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * on variable incremented.
392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base.
393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick
394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * is incremented.
395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other
396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * implementations in user file.
397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param Delay specifies the delay time length, in milliseconds.
398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak void HAL_Delay(uint32_t Delay)
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 16
2021-07-02 22:19:04 +02:00
401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
446 .loc 1 401 0
447 .cfi_startproc
448 @ args = 0, pretend = 0, frame = 0
449 @ frame_needed = 0, uses_anonymous_args = 0
450 .LVL24:
451 0000 38B5 push {r3, r4, r5, lr}
452 .LCFI8:
453 .cfi_def_cfa_offset 16
454 .cfi_offset 3, -16
455 .cfi_offset 4, -12
456 .cfi_offset 5, -8
457 .cfi_offset 14, -4
458 .loc 1 401 0
459 0002 0446 mov r4, r0
402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t tickstart = HAL_GetTick();
460 .loc 1 402 0
461 0004 FFF7FEFF bl HAL_GetTick
462 .LVL25:
403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t wait = Delay;
404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Add a freq to guarantee minimum wait */
406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if (wait < HAL_MAX_DELAY)
463 .loc 1 406 0
464 0008 631C adds r3, r4, #1
402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t tickstart = HAL_GetTick();
465 .loc 1 402 0
466 000a 0546 mov r5, r0
467 .LVL26:
468 .loc 1 406 0
469 000c 02D0 beq .L43
407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** wait += (uint32_t)(uwTickFreq);
470 .loc 1 408 0
471 000e 044B ldr r3, .L49
472 0010 1B68 ldr r3, [r3]
473 0012 1C44 add r4, r4, r3
474 .LVL27:
475 .L43:
409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** while ((HAL_GetTick() - tickstart) < wait)
476 .loc 1 411 0 discriminator 1
477 0014 FFF7FEFF bl HAL_GetTick
478 .LVL28:
479 0018 401B subs r0, r0, r5
480 001a A042 cmp r0, r4
481 001c FAD3 bcc .L43
412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
482 .loc 1 414 0
483 001e 38BD pop {r3, r4, r5, pc}
484 .LVL29:
485 .L50:
486 .align 2
487 .L49:
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 17
2021-07-02 22:19:04 +02:00
488 0020 00000000 .word .LANCHOR0
489 .cfi_endproc
490 .LFE339:
492 .section .text.HAL_SuspendTick,"ax",%progbits
493 .align 1
494 .p2align 2,,3
495 .weak HAL_SuspendTick
496 .syntax unified
497 .thumb
498 .thumb_func
499 .fpu fpv4-sp-d16
501 HAL_SuspendTick:
502 .LFB340:
415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Suspends Tick increment.
418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is
419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick()
420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * is called, the SysTick interrupt will be disabled and so Tick increment
421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * is suspended.
422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other
423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * implementations in user file.
424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak void HAL_SuspendTick(void)
427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
503 .loc 1 427 0
504 .cfi_startproc
505 @ args = 0, pretend = 0, frame = 0
506 @ frame_needed = 0, uses_anonymous_args = 0
507 @ link register save eliminated.
428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Disable SysTick Interrupt */
429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
508 .loc 1 429 0
509 0000 024A ldr r2, .L52
510 0002 1368 ldr r3, [r2]
511 0004 23F00203 bic r3, r3, #2
512 0008 1360 str r3, [r2]
430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
513 .loc 1 430 0
514 000a 7047 bx lr
515 .L53:
516 .align 2
517 .L52:
518 000c 10E000E0 .word -536813552
519 .cfi_endproc
520 .LFE340:
522 .section .text.HAL_ResumeTick,"ax",%progbits
523 .align 1
524 .p2align 2,,3
525 .weak HAL_ResumeTick
526 .syntax unified
527 .thumb
528 .thumb_func
529 .fpu fpv4-sp-d16
531 HAL_ResumeTick:
532 .LFB341:
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 18
2021-07-02 22:19:04 +02:00
431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Resume Tick increment.
434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is
435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick()
436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * is called, the SysTick interrupt will be enabled and so Tick increment
437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * is resumed.
438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other
439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * implementations in user file.
440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** __weak void HAL_ResumeTick(void)
443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
533 .loc 1 443 0
534 .cfi_startproc
535 @ args = 0, pretend = 0, frame = 0
536 @ frame_needed = 0, uses_anonymous_args = 0
537 @ link register save eliminated.
444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Enable SysTick Interrupt */
445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(SysTick->CTRL, SysTick_CTRL_TICKINT_Msk);
538 .loc 1 445 0
539 0000 024A ldr r2, .L55
540 0002 1368 ldr r3, [r2]
541 0004 43F00203 orr r3, r3, #2
542 0008 1360 str r3, [r2]
446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
543 .loc 1 446 0
544 000a 7047 bx lr
545 .L56:
546 .align 2
547 .L55:
548 000c 10E000E0 .word -536813552
549 .cfi_endproc
550 .LFE341:
552 .section .text.HAL_GetHalVersion,"ax",%progbits
553 .align 1
554 .p2align 2,,3
555 .global HAL_GetHalVersion
556 .syntax unified
557 .thumb
558 .thumb_func
559 .fpu fpv4-sp-d16
561 HAL_GetHalVersion:
562 .LFB342:
447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Returns the HAL revision.
450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval version : 0xXYZR (8bits for each decimal, R for RC)
451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t HAL_GetHalVersion(void)
453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
563 .loc 1 453 0
564 .cfi_startproc
565 @ args = 0, pretend = 0, frame = 0
566 @ frame_needed = 0, uses_anonymous_args = 0
567 @ link register save eliminated.
454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return __STM32G4xx_HAL_VERSION;
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 19
2021-07-02 22:19:04 +02:00
455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
568 .loc 1 455 0
569 0000 0048 ldr r0, .L58
570 0002 7047 bx lr
571 .L59:
572 .align 2
573 .L58:
574 0004 00010201 .word 16908544
575 .cfi_endproc
576 .LFE342:
578 .section .text.HAL_GetREVID,"ax",%progbits
579 .align 1
580 .p2align 2,,3
581 .global HAL_GetREVID
582 .syntax unified
583 .thumb
584 .thumb_func
585 .fpu fpv4-sp-d16
587 HAL_GetREVID:
588 .LFB343:
456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Returns the device revision identifier.
459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval Device revision identifier
460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t HAL_GetREVID(void)
462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
589 .loc 1 462 0
590 .cfi_startproc
591 @ args = 0, pretend = 0, frame = 0
592 @ frame_needed = 0, uses_anonymous_args = 0
593 @ link register save eliminated.
463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return ((DBGMCU->IDCODE & DBGMCU_IDCODE_REV_ID) >> 16U);
594 .loc 1 463 0
595 0000 014B ldr r3, .L61
596 0002 1868 ldr r0, [r3]
464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
597 .loc 1 464 0
598 0004 000C lsrs r0, r0, #16
599 0006 7047 bx lr
600 .L62:
601 .align 2
602 .L61:
603 0008 002004E0 .word -536600576
604 .cfi_endproc
605 .LFE343:
607 .section .text.HAL_GetDEVID,"ax",%progbits
608 .align 1
609 .p2align 2,,3
610 .global HAL_GetDEVID
611 .syntax unified
612 .thumb
613 .thumb_func
614 .fpu fpv4-sp-d16
616 HAL_GetDEVID:
617 .LFB344:
465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 20
2021-07-02 22:19:04 +02:00
466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Returns the device identifier.
468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval Device identifier
469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t HAL_GetDEVID(void)
471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
618 .loc 1 471 0
619 .cfi_startproc
620 @ args = 0, pretend = 0, frame = 0
621 @ frame_needed = 0, uses_anonymous_args = 0
622 @ link register save eliminated.
472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return (DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID);
623 .loc 1 472 0
624 0000 024B ldr r3, .L64
625 0002 1868 ldr r0, [r3]
473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
626 .loc 1 473 0
627 0004 C0F30B00 ubfx r0, r0, #0, #12
628 0008 7047 bx lr
629 .L65:
630 000a 00BF .align 2
631 .L64:
632 000c 002004E0 .word -536600576
633 .cfi_endproc
634 .LFE344:
636 .section .text.HAL_DBGMCU_EnableDBGSleepMode,"ax",%progbits
637 .align 1
638 .p2align 2,,3
639 .global HAL_DBGMCU_EnableDBGSleepMode
640 .syntax unified
641 .thumb
642 .thumb_func
643 .fpu fpv4-sp-d16
645 HAL_DBGMCU_EnableDBGSleepMode:
646 .LFB345:
474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @}
477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group3 HAL Debug functions
480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief HAL Debug functions
481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @verbatim
483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ##### HAL Debug functions #####
485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** [..] This section provides functions allowing to:
487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Enable/Disable Debug module during SLEEP mode
488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Enable/Disable Debug module during STOP0/STOP1/STOP2 modes
489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Enable/Disable Debug module during STANDBY mode
490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @endverbatim
492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 21
2021-07-02 22:19:04 +02:00
496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the Debug Module during SLEEP mode.
497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_EnableDBGSleepMode(void)
500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
647 .loc 1 500 0
648 .cfi_startproc
649 @ args = 0, pretend = 0, frame = 0
650 @ frame_needed = 0, uses_anonymous_args = 0
651 @ link register save eliminated.
501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
652 .loc 1 501 0
653 0000 024A ldr r2, .L67
654 0002 5368 ldr r3, [r2, #4]
655 0004 43F00103 orr r3, r3, #1
656 0008 5360 str r3, [r2, #4]
502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
657 .loc 1 502 0
658 000a 7047 bx lr
659 .L68:
660 .align 2
661 .L67:
662 000c 002004E0 .word -536600576
663 .cfi_endproc
664 .LFE345:
666 .section .text.HAL_DBGMCU_DisableDBGSleepMode,"ax",%progbits
667 .align 1
668 .p2align 2,,3
669 .global HAL_DBGMCU_DisableDBGSleepMode
670 .syntax unified
671 .thumb
672 .thumb_func
673 .fpu fpv4-sp-d16
675 HAL_DBGMCU_DisableDBGSleepMode:
676 .LFB346:
503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the Debug Module during SLEEP mode.
506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_DisableDBGSleepMode(void)
509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
677 .loc 1 509 0
678 .cfi_startproc
679 @ args = 0, pretend = 0, frame = 0
680 @ frame_needed = 0, uses_anonymous_args = 0
681 @ link register save eliminated.
510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
682 .loc 1 510 0
683 0000 024A ldr r2, .L70
684 0002 5368 ldr r3, [r2, #4]
685 0004 23F00103 bic r3, r3, #1
686 0008 5360 str r3, [r2, #4]
511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
687 .loc 1 511 0
688 000a 7047 bx lr
689 .L71:
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 22
2021-07-02 22:19:04 +02:00
690 .align 2
691 .L70:
692 000c 002004E0 .word -536600576
693 .cfi_endproc
694 .LFE346:
696 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits
697 .align 1
698 .p2align 2,,3
699 .global HAL_DBGMCU_EnableDBGStopMode
700 .syntax unified
701 .thumb
702 .thumb_func
703 .fpu fpv4-sp-d16
705 HAL_DBGMCU_EnableDBGStopMode:
706 .LFB347:
512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the Debug Module during STOP0/STOP1/STOP2 modes.
515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void)
518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
707 .loc 1 518 0
708 .cfi_startproc
709 @ args = 0, pretend = 0, frame = 0
710 @ frame_needed = 0, uses_anonymous_args = 0
711 @ link register save eliminated.
519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
712 .loc 1 519 0
713 0000 024A ldr r2, .L73
714 0002 5368 ldr r3, [r2, #4]
715 0004 43F00203 orr r3, r3, #2
716 0008 5360 str r3, [r2, #4]
520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
717 .loc 1 520 0
718 000a 7047 bx lr
719 .L74:
720 .align 2
721 .L73:
722 000c 002004E0 .word -536600576
723 .cfi_endproc
724 .LFE347:
726 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits
727 .align 1
728 .p2align 2,,3
729 .global HAL_DBGMCU_DisableDBGStopMode
730 .syntax unified
731 .thumb
732 .thumb_func
733 .fpu fpv4-sp-d16
735 HAL_DBGMCU_DisableDBGStopMode:
736 .LFB348:
521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the Debug Module during STOP0/STOP1/STOP2 modes.
524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 23
2021-07-02 22:19:04 +02:00
526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void)
527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
737 .loc 1 527 0
738 .cfi_startproc
739 @ args = 0, pretend = 0, frame = 0
740 @ frame_needed = 0, uses_anonymous_args = 0
741 @ link register save eliminated.
528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
742 .loc 1 528 0
743 0000 024A ldr r2, .L76
744 0002 5368 ldr r3, [r2, #4]
745 0004 23F00203 bic r3, r3, #2
746 0008 5360 str r3, [r2, #4]
529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
747 .loc 1 529 0
748 000a 7047 bx lr
749 .L77:
750 .align 2
751 .L76:
752 000c 002004E0 .word -536600576
753 .cfi_endproc
754 .LFE348:
756 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits
757 .align 1
758 .p2align 2,,3
759 .global HAL_DBGMCU_EnableDBGStandbyMode
760 .syntax unified
761 .thumb
762 .thumb_func
763 .fpu fpv4-sp-d16
765 HAL_DBGMCU_EnableDBGStandbyMode:
766 .LFB349:
530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the Debug Module during STANDBY mode.
533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void)
536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
767 .loc 1 536 0
768 .cfi_startproc
769 @ args = 0, pretend = 0, frame = 0
770 @ frame_needed = 0, uses_anonymous_args = 0
771 @ link register save eliminated.
537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
772 .loc 1 537 0
773 0000 024A ldr r2, .L79
774 0002 5368 ldr r3, [r2, #4]
775 0004 43F00403 orr r3, r3, #4
776 0008 5360 str r3, [r2, #4]
538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
777 .loc 1 538 0
778 000a 7047 bx lr
779 .L80:
780 .align 2
781 .L79:
782 000c 002004E0 .word -536600576
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 24
2021-07-02 22:19:04 +02:00
783 .cfi_endproc
784 .LFE349:
786 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits
787 .align 1
788 .p2align 2,,3
789 .global HAL_DBGMCU_DisableDBGStandbyMode
790 .syntax unified
791 .thumb
792 .thumb_func
793 .fpu fpv4-sp-d16
795 HAL_DBGMCU_DisableDBGStandbyMode:
796 .LFB350:
539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode.
542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void)
545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
797 .loc 1 545 0
798 .cfi_startproc
799 @ args = 0, pretend = 0, frame = 0
800 @ frame_needed = 0, uses_anonymous_args = 0
801 @ link register save eliminated.
546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
802 .loc 1 546 0
803 0000 024A ldr r2, .L82
804 0002 5368 ldr r3, [r2, #4]
805 0004 23F00403 bic r3, r3, #4
806 0008 5360 str r3, [r2, #4]
547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
807 .loc 1 547 0
808 000a 7047 bx lr
809 .L83:
810 .align 2
811 .L82:
812 000c 002004E0 .word -536600576
813 .cfi_endproc
814 .LFE350:
816 .section .text.HAL_SYSCFG_CCMSRAMErase,"ax",%progbits
817 .align 1
818 .p2align 2,,3
819 .global HAL_SYSCFG_CCMSRAMErase
820 .syntax unified
821 .thumb
822 .thumb_func
823 .fpu fpv4-sp-d16
825 HAL_SYSCFG_CCMSRAMErase:
826 .LFB351:
548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @}
551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group4 HAL SYSCFG configuration functions
554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief HAL SYSCFG configuration functions
555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 25
2021-07-02 22:19:04 +02:00
556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @verbatim
557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ##### HAL SYSCFG configuration functions #####
559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** ===============================================================================
560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** [..] This section provides functions allowing to:
561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Start a hardware CCMSRAM erase operation
562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Enable/Disable the Internal FLASH Bank Swapping
563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Configure the Voltage reference buffer
564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Enable/Disable the Voltage reference buffer
565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** (+) Enable/Disable the I/O analog switch voltage booster
566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** @endverbatim
568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @{
569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Start a hardware CCMSRAM erase operation.
573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note As long as CCMSRAM is not erased the CCMER bit will be set.
574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This bit is automatically reset at the end of the CCMSRAM erase operation.
575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_CCMSRAMErase(void)
578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
827 .loc 1 578 0
828 .cfi_startproc
829 @ args = 0, pretend = 0, frame = 0
830 @ frame_needed = 0, uses_anonymous_args = 0
831 @ link register save eliminated.
579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* unlock the write protection of the CCMER bit */
580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SYSCFG->SKR = 0xCA;
832 .loc 1 580 0
833 0000 044B ldr r3, .L85
581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SYSCFG->SKR = 0x53;
834 .loc 1 581 0
835 0002 5322 movs r2, #83
580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SYSCFG->SKR = 0x53;
836 .loc 1 580 0
837 0004 CA21 movs r1, #202
838 0006 5962 str r1, [r3, #36]
839 .loc 1 581 0
840 0008 5A62 str r2, [r3, #36]
582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Starts a hardware CCMSRAM erase operation*/
583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(SYSCFG->SCSR, SYSCFG_SCSR_CCMER);
841 .loc 1 583 0
842 000a 9A69 ldr r2, [r3, #24]
843 000c 42F00102 orr r2, r2, #1
844 0010 9A61 str r2, [r3, #24]
584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
845 .loc 1 584 0
846 0012 7047 bx lr
847 .L86:
848 .align 2
849 .L85:
850 0014 00000140 .word 1073807360
851 .cfi_endproc
852 .LFE351:
854 .section .text.HAL_SYSCFG_EnableMemorySwappingBank,"ax",%progbits
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 26
2021-07-02 22:19:04 +02:00
855 .align 1
856 .p2align 2,,3
857 .global HAL_SYSCFG_EnableMemorySwappingBank
858 .syntax unified
859 .thumb
860 .thumb_func
861 .fpu fpv4-sp-d16
863 HAL_SYSCFG_EnableMemorySwappingBank:
864 .LFB352:
585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the Internal FLASH Bank Swapping.
588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function can be used only for STM32G4xx devices.
590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note Flash Bank2 mapped at 0x08000000 (and aliased @0x00000000)
592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * and Flash Bank1 mapped at 0x08040000 (and aliased at 0x00040000)
593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_EnableMemorySwappingBank(void)
597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
865 .loc 1 597 0
866 .cfi_startproc
867 @ args = 0, pretend = 0, frame = 0
868 @ frame_needed = 0, uses_anonymous_args = 0
869 @ link register save eliminated.
598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE);
870 .loc 1 598 0
871 0000 024A ldr r2, .L88
872 0002 1368 ldr r3, [r2]
873 0004 43F48073 orr r3, r3, #256
874 0008 1360 str r3, [r2]
599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
875 .loc 1 599 0
876 000a 7047 bx lr
877 .L89:
878 .align 2
879 .L88:
880 000c 00000140 .word 1073807360
881 .cfi_endproc
882 .LFE352:
884 .section .text.HAL_SYSCFG_DisableMemorySwappingBank,"ax",%progbits
885 .align 1
886 .p2align 2,,3
887 .global HAL_SYSCFG_DisableMemorySwappingBank
888 .syntax unified
889 .thumb
890 .thumb_func
891 .fpu fpv4-sp-d16
893 HAL_SYSCFG_DisableMemorySwappingBank:
894 .LFB353:
600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the Internal FLASH Bank Swapping.
603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note This function can be used only for STM32G4xx devices.
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 27
2021-07-02 22:19:04 +02:00
605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note The default state : Flash Bank1 mapped at 0x08000000 (and aliased @0x0000 0000)
607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * and Flash Bank2 mapped at 0x08040000 (and aliased at 0x00040000)
608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_DisableMemorySwappingBank(void)
612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
895 .loc 1 612 0
896 .cfi_startproc
897 @ args = 0, pretend = 0, frame = 0
898 @ frame_needed = 0, uses_anonymous_args = 0
899 @ link register save eliminated.
613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE);
900 .loc 1 613 0
901 0000 024A ldr r2, .L91
902 0002 1368 ldr r3, [r2]
903 0004 23F48073 bic r3, r3, #256
904 0008 1360 str r3, [r2]
614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
905 .loc 1 614 0
906 000a 7047 bx lr
907 .L92:
908 .align 2
909 .L91:
910 000c 00000140 .word 1073807360
911 .cfi_endproc
912 .LFE353:
914 .section .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig,"ax",%progbits
915 .align 1
916 .p2align 2,,3
917 .global HAL_SYSCFG_VREFBUF_VoltageScalingConfig
918 .syntax unified
919 .thumb
920 .thumb_func
921 .fpu fpv4-sp-d16
923 HAL_SYSCFG_VREFBUF_VoltageScalingConfig:
924 .LFB354:
615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #if defined(VREFBUF)
617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Configure the internal voltage reference buffer voltage scale.
619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param VoltageScaling: specifies the output voltage to achieve
620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This parameter can be one of the following values:
621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE0: VREFBUF_OUT around 2.048 V.
622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This requires VDDA equal to or higher than 2.4 V
623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE1: VREFBUF_OUT around 2.5 V.
624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This requires VDDA equal to or higher than 2.8 V
625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @arg SYSCFG_VREFBUF_VOLTAGE_SCALE2: VREFBUF_OUT around 2.9 V.
626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This requires VDDA equal to or higher than 3.15
627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_VREFBUF_VoltageScalingConfig(uint32_t VoltageScaling)
630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
925 .loc 1 630 0
926 .cfi_startproc
927 @ args = 0, pretend = 0, frame = 0
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 28
2021-07-02 22:19:04 +02:00
928 @ frame_needed = 0, uses_anonymous_args = 0
929 @ link register save eliminated.
930 .LVL30:
631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Check the parameters */
632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** assert_param(IS_SYSCFG_VREFBUF_VOLTAGE_SCALE(VoltageScaling));
633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_VRS, VoltageScaling);
931 .loc 1 634 0
932 0000 034A ldr r2, .L94
933 0002 1368 ldr r3, [r2]
934 0004 23F03003 bic r3, r3, #48
935 0008 1843 orrs r0, r0, r3
936 .LVL31:
937 000a 1060 str r0, [r2]
635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
938 .loc 1 635 0
939 000c 7047 bx lr
940 .L95:
941 000e 00BF .align 2
942 .L94:
943 0010 30000140 .word 1073807408
944 .cfi_endproc
945 .LFE354:
947 .section .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig,"ax",%progbits
948 .align 1
949 .p2align 2,,3
950 .global HAL_SYSCFG_VREFBUF_HighImpedanceConfig
951 .syntax unified
952 .thumb
953 .thumb_func
954 .fpu fpv4-sp-d16
956 HAL_SYSCFG_VREFBUF_HighImpedanceConfig:
957 .LFB355:
636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Configure the internal voltage reference buffer high impedance mode.
639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param Mode: specifies the high impedance mode
640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This parameter can be one of the following values:
641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_DISABLE: VREF+ pin is internally connect to VREFI
642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @arg SYSCFG_VREFBUF_HIGH_IMPEDANCE_ENABLE: VREF+ pin is high impedance.
643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_VREFBUF_HighImpedanceConfig(uint32_t Mode)
646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
958 .loc 1 646 0
959 .cfi_startproc
960 @ args = 0, pretend = 0, frame = 0
961 @ frame_needed = 0, uses_anonymous_args = 0
962 @ link register save eliminated.
963 .LVL32:
647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Check the parameters */
648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** assert_param(IS_SYSCFG_VREFBUF_HIGH_IMPEDANCE(Mode));
649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** MODIFY_REG(VREFBUF->CSR, VREFBUF_CSR_HIZ, Mode);
964 .loc 1 650 0
965 0000 034A ldr r2, .L97
966 0002 1368 ldr r3, [r2]
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 29
2021-07-02 22:19:04 +02:00
967 0004 23F00203 bic r3, r3, #2
968 0008 1843 orrs r0, r0, r3
969 .LVL33:
970 000a 1060 str r0, [r2]
651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
971 .loc 1 651 0
972 000c 7047 bx lr
973 .L98:
974 000e 00BF .align 2
975 .L97:
976 0010 30000140 .word 1073807408
977 .cfi_endproc
978 .LFE355:
980 .section .text.HAL_SYSCFG_VREFBUF_TrimmingConfig,"ax",%progbits
981 .align 1
982 .p2align 2,,3
983 .global HAL_SYSCFG_VREFBUF_TrimmingConfig
984 .syntax unified
985 .thumb
986 .thumb_func
987 .fpu fpv4-sp-d16
989 HAL_SYSCFG_VREFBUF_TrimmingConfig:
990 .LFB356:
652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Tune the Internal Voltage Reference buffer (VREFBUF).
655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param TrimmingValue specifies trimming code for VREFBUF calibration
656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x3F
657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_VREFBUF_TrimmingConfig(uint32_t TrimmingValue)
660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
991 .loc 1 660 0
992 .cfi_startproc
993 @ args = 0, pretend = 0, frame = 0
994 @ frame_needed = 0, uses_anonymous_args = 0
995 @ link register save eliminated.
996 .LVL34:
661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Check the parameters */
662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** assert_param(IS_SYSCFG_VREFBUF_TRIMMING(TrimmingValue));
663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** MODIFY_REG(VREFBUF->CCR, VREFBUF_CCR_TRIM, TrimmingValue);
997 .loc 1 664 0
998 0000 034A ldr r2, .L100
999 0002 5368 ldr r3, [r2, #4]
1000 0004 23F03F03 bic r3, r3, #63
1001 0008 1843 orrs r0, r0, r3
1002 .LVL35:
1003 000a 5060 str r0, [r2, #4]
665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1004 .loc 1 665 0
1005 000c 7047 bx lr
1006 .L101:
1007 000e 00BF .align 2
1008 .L100:
1009 0010 30000140 .word 1073807408
1010 .cfi_endproc
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 30
2021-07-02 22:19:04 +02:00
1011 .LFE356:
1013 .section .text.HAL_SYSCFG_EnableVREFBUF,"ax",%progbits
1014 .align 1
1015 .p2align 2,,3
1016 .global HAL_SYSCFG_EnableVREFBUF
1017 .syntax unified
1018 .thumb
1019 .thumb_func
1020 .fpu fpv4-sp-d16
1022 HAL_SYSCFG_EnableVREFBUF:
1023 .LFB357:
666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the Internal Voltage Reference buffer (VREFBUF).
669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval HAL_OK/HAL_TIMEOUT
670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** HAL_StatusTypeDef HAL_SYSCFG_EnableVREFBUF(void)
672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1024 .loc 1 672 0
1025 .cfi_startproc
1026 @ args = 0, pretend = 0, frame = 0
1027 @ frame_needed = 0, uses_anonymous_args = 0
1028 0000 38B5 push {r3, r4, r5, lr}
1029 .LCFI9:
1030 .cfi_def_cfa_offset 16
1031 .cfi_offset 3, -16
1032 .cfi_offset 4, -12
1033 .cfi_offset 5, -8
1034 .cfi_offset 14, -4
673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** uint32_t tickstart;
674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
1035 .loc 1 675 0
1036 0002 0A4C ldr r4, .L108
1037 0004 2368 ldr r3, [r4]
1038 0006 43F00103 orr r3, r3, #1
1039 000a 2360 str r3, [r4]
676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Get Start Tick*/
678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** tickstart = HAL_GetTick();
1040 .loc 1 678 0
1041 000c FFF7FEFF bl HAL_GetTick
1042 .LVL36:
1043 0010 0546 mov r5, r0
1044 .LVL37:
679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /* Wait for VRR bit */
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** while (READ_BIT(VREFBUF->CSR, VREFBUF_CSR_VRR) == 0x00U)
1045 .loc 1 681 0
1046 0012 04E0 b .L103
1047 .LVL38:
1048 .L105:
682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** if ((HAL_GetTick() - tickstart) > VREFBUF_TIMEOUT_VALUE)
1049 .loc 1 683 0
1050 0014 FFF7FEFF bl HAL_GetTick
1051 .LVL39:
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 31
2021-07-02 22:19:04 +02:00
1052 0018 401B subs r0, r0, r5
1053 001a 0A28 cmp r0, #10
1054 001c 04D8 bhi .L106
1055 .L103:
681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1056 .loc 1 681 0
1057 001e 2368 ldr r3, [r4]
1058 0020 1B07 lsls r3, r3, #28
1059 0022 F7D5 bpl .L105
684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return HAL_TIMEOUT;
686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** return HAL_OK;
1060 .loc 1 689 0
1061 0024 0020 movs r0, #0
690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1062 .loc 1 690 0
1063 0026 38BD pop {r3, r4, r5, pc}
1064 .LVL40:
1065 .L106:
685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1066 .loc 1 685 0
1067 0028 0320 movs r0, #3
1068 .loc 1 690 0
1069 002a 38BD pop {r3, r4, r5, pc}
1070 .LVL41:
1071 .L109:
1072 .align 2
1073 .L108:
1074 002c 30000140 .word 1073807408
1075 .cfi_endproc
1076 .LFE357:
1078 .section .text.HAL_SYSCFG_DisableVREFBUF,"ax",%progbits
1079 .align 1
1080 .p2align 2,,3
1081 .global HAL_SYSCFG_DisableVREFBUF
1082 .syntax unified
1083 .thumb
1084 .thumb_func
1085 .fpu fpv4-sp-d16
1087 HAL_SYSCFG_DisableVREFBUF:
1088 .LFB358:
691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the Internal Voltage Reference buffer (VREFBUF).
694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_DisableVREFBUF(void)
698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1089 .loc 1 698 0
1090 .cfi_startproc
1091 @ args = 0, pretend = 0, frame = 0
1092 @ frame_needed = 0, uses_anonymous_args = 0
1093 @ link register save eliminated.
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 32
2021-07-02 22:19:04 +02:00
699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(VREFBUF->CSR, VREFBUF_CSR_ENVR);
1094 .loc 1 699 0
1095 0000 024A ldr r2, .L111
1096 0002 1368 ldr r3, [r2]
1097 0004 23F00103 bic r3, r3, #1
1098 0008 1360 str r3, [r2]
700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1099 .loc 1 700 0
1100 000a 7047 bx lr
1101 .L112:
1102 .align 2
1103 .L111:
1104 000c 30000140 .word 1073807408
1105 .cfi_endproc
1106 .LFE358:
1108 .section .text.HAL_SYSCFG_EnableIOSwitchBooster,"ax",%progbits
1109 .align 1
1110 .p2align 2,,3
1111 .global HAL_SYSCFG_EnableIOSwitchBooster
1112 .syntax unified
1113 .thumb
1114 .thumb_func
1115 .fpu fpv4-sp-d16
1117 HAL_SYSCFG_EnableIOSwitchBooster:
1118 .LFB359:
701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** #endif /* VREFBUF */
702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the I/O analog switch voltage booster
705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_EnableIOSwitchBooster(void)
709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1119 .loc 1 709 0
1120 .cfi_startproc
1121 @ args = 0, pretend = 0, frame = 0
1122 @ frame_needed = 0, uses_anonymous_args = 0
1123 @ link register save eliminated.
710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
1124 .loc 1 710 0
1125 0000 024A ldr r2, .L114
1126 0002 5368 ldr r3, [r2, #4]
1127 0004 43F48073 orr r3, r3, #256
1128 0008 5360 str r3, [r2, #4]
711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1129 .loc 1 711 0
1130 000a 7047 bx lr
1131 .L115:
1132 .align 2
1133 .L114:
1134 000c 00000140 .word 1073807360
1135 .cfi_endproc
1136 .LFE359:
1138 .section .text.HAL_SYSCFG_DisableIOSwitchBooster,"ax",%progbits
1139 .align 1
1140 .p2align 2,,3
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 33
2021-07-02 22:19:04 +02:00
1141 .global HAL_SYSCFG_DisableIOSwitchBooster
1142 .syntax unified
1143 .thumb
1144 .thumb_func
1145 .fpu fpv4-sp-d16
1147 HAL_SYSCFG_DisableIOSwitchBooster:
1148 .LFB360:
712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the I/O analog switch voltage booster
715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_DisableIOSwitchBooster(void)
719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1149 .loc 1 719 0
1150 .cfi_startproc
1151 @ args = 0, pretend = 0, frame = 0
1152 @ frame_needed = 0, uses_anonymous_args = 0
1153 @ link register save eliminated.
720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN);
1154 .loc 1 720 0
1155 0000 024A ldr r2, .L117
1156 0002 5368 ldr r3, [r2, #4]
1157 0004 23F48073 bic r3, r3, #256
1158 0008 5360 str r3, [r2, #4]
721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1159 .loc 1 721 0
1160 000a 7047 bx lr
1161 .L118:
1162 .align 2
1163 .L117:
1164 000c 00000140 .word 1073807360
1165 .cfi_endproc
1166 .LFE360:
1168 .section .text.HAL_SYSCFG_EnableIOSwitchVDD,"ax",%progbits
1169 .align 1
1170 .p2align 2,,3
1171 .global HAL_SYSCFG_EnableIOSwitchVDD
1172 .syntax unified
1173 .thumb
1174 .thumb_func
1175 .fpu fpv4-sp-d16
1177 HAL_SYSCFG_EnableIOSwitchVDD:
1178 .LFB361:
722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Enable the I/O analog switch voltage by VDD
725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_EnableIOSwitchVDD(void)
729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1179 .loc 1 729 0
1180 .cfi_startproc
1181 @ args = 0, pretend = 0, frame = 0
1182 @ frame_needed = 0, uses_anonymous_args = 0
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 34
2021-07-02 22:19:04 +02:00
1183 @ link register save eliminated.
730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD);
1184 .loc 1 730 0
1185 0000 024A ldr r2, .L120
1186 0002 5368 ldr r3, [r2, #4]
1187 0004 43F40073 orr r3, r3, #512
1188 0008 5360 str r3, [r2, #4]
731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1189 .loc 1 731 0
1190 000a 7047 bx lr
1191 .L121:
1192 .align 2
1193 .L120:
1194 000c 00000140 .word 1073807360
1195 .cfi_endproc
1196 .LFE361:
1198 .section .text.HAL_SYSCFG_DisableIOSwitchVDD,"ax",%progbits
1199 .align 1
1200 .p2align 2,,3
1201 .global HAL_SYSCFG_DisableIOSwitchVDD
1202 .syntax unified
1203 .thumb
1204 .thumb_func
1205 .fpu fpv4-sp-d16
1207 HAL_SYSCFG_DisableIOSwitchVDD:
1208 .LFB362:
732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /**
734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @brief Disable the I/O analog switch voltage by VDD
735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** *
736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_DisableIOSwitchVDD(void)
739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1209 .loc 1 739 0
1210 .cfi_startproc
1211 @ args = 0, pretend = 0, frame = 0
1212 @ frame_needed = 0, uses_anonymous_args = 0
1213 @ link register save eliminated.
740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD);
1214 .loc 1 740 0
1215 0000 024A ldr r2, .L123
1216 0002 5368 ldr r3, [r2, #4]
1217 0004 23F40073 bic r3, r3, #512
1218 0008 5360 str r3, [r2, #4]
741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1219 .loc 1 741 0
1220 000a 7047 bx lr
1221 .L124:
1222 .align 2
1223 .L123:
1224 000c 00000140 .word 1073807360
1225 .cfi_endproc
1226 .LFE362:
1228 .section .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable,"ax",%progbits
1229 .align 1
1230 .p2align 2,,3
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 35
2021-07-02 22:19:04 +02:00
1231 .global HAL_SYSCFG_CCMSRAM_WriteProtectionEnable
1232 .syntax unified
1233 .thumb
1234 .thumb_func
1235 .fpu fpv4-sp-d16
1237 HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:
1238 .LFB363:
742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** /** @brief CCMSRAM page write protection enable
745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @param Page: This parameter is a long 32bit value and can be a value of @ref SYSCFG_CCMSRAMWRP
746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @note write protection can only be disabled by a system reset
747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** * @retval None
748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** */
749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** void HAL_SYSCFG_CCMSRAM_WriteProtectionEnable(uint32_t Page)
750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** {
1239 .loc 1 750 0
1240 .cfi_startproc
1241 @ args = 0, pretend = 0, frame = 0
1242 @ frame_needed = 0, uses_anonymous_args = 0
1243 @ link register save eliminated.
1244 .LVL42:
751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** assert_param(IS_SYSCFG_CCMSRAMWRP_PAGE(Page));
752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c ****
753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** SET_BIT(SYSCFG->SWPR, (uint32_t)(Page));
1245 .loc 1 753 0
1246 0000 024A ldr r2, .L126
1247 0002 136A ldr r3, [r2, #32]
1248 0004 1843 orrs r0, r0, r3
1249 .LVL43:
1250 0006 1062 str r0, [r2, #32]
754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c **** }
1251 .loc 1 754 0
1252 0008 7047 bx lr
1253 .L127:
1254 000a 00BF .align 2
1255 .L126:
1256 000c 00000140 .word 1073807360
1257 .cfi_endproc
1258 .LFE363:
1260 .global uwTickFreq
1261 .global uwTickPrio
1262 .comm uwTick,4,4
1263 .section .data.uwTickFreq,"aw",%progbits
1264 .align 2
1265 .set .LANCHOR0,. + 0
1268 uwTickFreq:
1269 0000 01000000 .word 1
1270 .section .data.uwTickPrio,"aw",%progbits
1271 .align 2
1272 .set .LANCHOR1,. + 0
1275 uwTickPrio:
1276 0000 10000000 .word 16
1277 .text
1278 .Letext0:
1279 .file 2 "/usr/include/newlib/machine/_default_types.h"
1280 .file 3 "/usr/include/newlib/sys/_stdint.h"
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 36
2021-07-02 22:19:04 +02:00
1281 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
1282 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
1283 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1284 .file 7 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1285 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
1286 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
1287 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
1288 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 37
2021-07-02 22:19:04 +02:00
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32g4xx_hal.c
2021-07-03 04:08:08 +02:00
/tmp/ccLG2aoy.s:16 .text.HAL_MspInit:0000000000000000 $t
/tmp/ccLG2aoy.s:24 .text.HAL_MspInit:0000000000000000 HAL_MspInit
/tmp/ccLG2aoy.s:38 .text.HAL_MspDeInit:0000000000000000 $t
/tmp/ccLG2aoy.s:46 .text.HAL_MspDeInit:0000000000000000 HAL_MspDeInit
/tmp/ccLG2aoy.s:57 .text.HAL_DeInit:0000000000000000 $t
/tmp/ccLG2aoy.s:65 .text.HAL_DeInit:0000000000000000 HAL_DeInit
/tmp/ccLG2aoy.s:111 .text.HAL_DeInit:0000000000000028 $d
/tmp/ccLG2aoy.s:116 .text.HAL_InitTick:0000000000000000 $t
/tmp/ccLG2aoy.s:124 .text.HAL_InitTick:0000000000000000 HAL_InitTick
/tmp/ccLG2aoy.s:189 .text.HAL_InitTick:0000000000000040 $d
/tmp/ccLG2aoy.s:196 .text.HAL_Init:0000000000000000 $t
/tmp/ccLG2aoy.s:204 .text.HAL_Init:0000000000000000 HAL_Init
/tmp/ccLG2aoy.s:259 .text.HAL_IncTick:0000000000000000 $t
/tmp/ccLG2aoy.s:267 .text.HAL_IncTick:0000000000000000 HAL_IncTick
/tmp/ccLG2aoy.s:286 .text.HAL_IncTick:0000000000000010 $d
2021-07-02 22:19:04 +02:00
*COM*:0000000000000004 uwTick
2021-07-03 04:08:08 +02:00
/tmp/ccLG2aoy.s:292 .text.HAL_GetTick:0000000000000000 $t
/tmp/ccLG2aoy.s:300 .text.HAL_GetTick:0000000000000000 HAL_GetTick
/tmp/ccLG2aoy.s:315 .text.HAL_GetTick:0000000000000008 $d
/tmp/ccLG2aoy.s:320 .text.HAL_GetTickPrio:0000000000000000 $t
/tmp/ccLG2aoy.s:328 .text.HAL_GetTickPrio:0000000000000000 HAL_GetTickPrio
/tmp/ccLG2aoy.s:343 .text.HAL_GetTickPrio:0000000000000008 $d
/tmp/ccLG2aoy.s:348 .text.HAL_SetTickFreq:0000000000000000 $t
/tmp/ccLG2aoy.s:356 .text.HAL_SetTickFreq:0000000000000000 HAL_SetTickFreq
/tmp/ccLG2aoy.s:402 .text.HAL_SetTickFreq:0000000000000020 $d
/tmp/ccLG2aoy.s:408 .text.HAL_GetTickFreq:0000000000000000 $t
/tmp/ccLG2aoy.s:416 .text.HAL_GetTickFreq:0000000000000000 HAL_GetTickFreq
/tmp/ccLG2aoy.s:431 .text.HAL_GetTickFreq:0000000000000008 $d
/tmp/ccLG2aoy.s:436 .text.HAL_Delay:0000000000000000 $t
/tmp/ccLG2aoy.s:444 .text.HAL_Delay:0000000000000000 HAL_Delay
/tmp/ccLG2aoy.s:488 .text.HAL_Delay:0000000000000020 $d
/tmp/ccLG2aoy.s:493 .text.HAL_SuspendTick:0000000000000000 $t
/tmp/ccLG2aoy.s:501 .text.HAL_SuspendTick:0000000000000000 HAL_SuspendTick
/tmp/ccLG2aoy.s:518 .text.HAL_SuspendTick:000000000000000c $d
/tmp/ccLG2aoy.s:523 .text.HAL_ResumeTick:0000000000000000 $t
/tmp/ccLG2aoy.s:531 .text.HAL_ResumeTick:0000000000000000 HAL_ResumeTick
/tmp/ccLG2aoy.s:548 .text.HAL_ResumeTick:000000000000000c $d
/tmp/ccLG2aoy.s:553 .text.HAL_GetHalVersion:0000000000000000 $t
/tmp/ccLG2aoy.s:561 .text.HAL_GetHalVersion:0000000000000000 HAL_GetHalVersion
/tmp/ccLG2aoy.s:574 .text.HAL_GetHalVersion:0000000000000004 $d
/tmp/ccLG2aoy.s:579 .text.HAL_GetREVID:0000000000000000 $t
/tmp/ccLG2aoy.s:587 .text.HAL_GetREVID:0000000000000000 HAL_GetREVID
/tmp/ccLG2aoy.s:603 .text.HAL_GetREVID:0000000000000008 $d
/tmp/ccLG2aoy.s:608 .text.HAL_GetDEVID:0000000000000000 $t
/tmp/ccLG2aoy.s:616 .text.HAL_GetDEVID:0000000000000000 HAL_GetDEVID
/tmp/ccLG2aoy.s:632 .text.HAL_GetDEVID:000000000000000c $d
/tmp/ccLG2aoy.s:637 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000000000000 $t
/tmp/ccLG2aoy.s:645 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000000000000 HAL_DBGMCU_EnableDBGSleepMode
/tmp/ccLG2aoy.s:662 .text.HAL_DBGMCU_EnableDBGSleepMode:000000000000000c $d
/tmp/ccLG2aoy.s:667 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000000000000 $t
/tmp/ccLG2aoy.s:675 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000000000000 HAL_DBGMCU_DisableDBGSleepMode
/tmp/ccLG2aoy.s:692 .text.HAL_DBGMCU_DisableDBGSleepMode:000000000000000c $d
/tmp/ccLG2aoy.s:697 .text.HAL_DBGMCU_EnableDBGStopMode:0000000000000000 $t
/tmp/ccLG2aoy.s:705 .text.HAL_DBGMCU_EnableDBGStopMode:0000000000000000 HAL_DBGMCU_EnableDBGStopMode
/tmp/ccLG2aoy.s:722 .text.HAL_DBGMCU_EnableDBGStopMode:000000000000000c $d
ARM GAS /tmp/ccLG2aoy.s page 38
/tmp/ccLG2aoy.s:727 .text.HAL_DBGMCU_DisableDBGStopMode:0000000000000000 $t
/tmp/ccLG2aoy.s:735 .text.HAL_DBGMCU_DisableDBGStopMode:0000000000000000 HAL_DBGMCU_DisableDBGStopMode
/tmp/ccLG2aoy.s:752 .text.HAL_DBGMCU_DisableDBGStopMode:000000000000000c $d
/tmp/ccLG2aoy.s:757 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000000000000 $t
/tmp/ccLG2aoy.s:765 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000000000000 HAL_DBGMCU_EnableDBGStandbyMode
/tmp/ccLG2aoy.s:782 .text.HAL_DBGMCU_EnableDBGStandbyMode:000000000000000c $d
/tmp/ccLG2aoy.s:787 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000000000000 $t
/tmp/ccLG2aoy.s:795 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000000000000 HAL_DBGMCU_DisableDBGStandbyMode
/tmp/ccLG2aoy.s:812 .text.HAL_DBGMCU_DisableDBGStandbyMode:000000000000000c $d
/tmp/ccLG2aoy.s:817 .text.HAL_SYSCFG_CCMSRAMErase:0000000000000000 $t
/tmp/ccLG2aoy.s:825 .text.HAL_SYSCFG_CCMSRAMErase:0000000000000000 HAL_SYSCFG_CCMSRAMErase
/tmp/ccLG2aoy.s:850 .text.HAL_SYSCFG_CCMSRAMErase:0000000000000014 $d
/tmp/ccLG2aoy.s:855 .text.HAL_SYSCFG_EnableMemorySwappingBank:0000000000000000 $t
/tmp/ccLG2aoy.s:863 .text.HAL_SYSCFG_EnableMemorySwappingBank:0000000000000000 HAL_SYSCFG_EnableMemorySwappingBank
/tmp/ccLG2aoy.s:880 .text.HAL_SYSCFG_EnableMemorySwappingBank:000000000000000c $d
/tmp/ccLG2aoy.s:885 .text.HAL_SYSCFG_DisableMemorySwappingBank:0000000000000000 $t
/tmp/ccLG2aoy.s:893 .text.HAL_SYSCFG_DisableMemorySwappingBank:0000000000000000 HAL_SYSCFG_DisableMemorySwappingBank
/tmp/ccLG2aoy.s:910 .text.HAL_SYSCFG_DisableMemorySwappingBank:000000000000000c $d
/tmp/ccLG2aoy.s:915 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:0000000000000000 $t
/tmp/ccLG2aoy.s:923 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:0000000000000000 HAL_SYSCFG_VREFBUF_VoltageScalingConfig
/tmp/ccLG2aoy.s:943 .text.HAL_SYSCFG_VREFBUF_VoltageScalingConfig:0000000000000010 $d
/tmp/ccLG2aoy.s:948 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:0000000000000000 $t
/tmp/ccLG2aoy.s:956 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:0000000000000000 HAL_SYSCFG_VREFBUF_HighImpedanceConfig
/tmp/ccLG2aoy.s:976 .text.HAL_SYSCFG_VREFBUF_HighImpedanceConfig:0000000000000010 $d
/tmp/ccLG2aoy.s:981 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:0000000000000000 $t
/tmp/ccLG2aoy.s:989 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:0000000000000000 HAL_SYSCFG_VREFBUF_TrimmingConfig
/tmp/ccLG2aoy.s:1009 .text.HAL_SYSCFG_VREFBUF_TrimmingConfig:0000000000000010 $d
/tmp/ccLG2aoy.s:1014 .text.HAL_SYSCFG_EnableVREFBUF:0000000000000000 $t
/tmp/ccLG2aoy.s:1022 .text.HAL_SYSCFG_EnableVREFBUF:0000000000000000 HAL_SYSCFG_EnableVREFBUF
/tmp/ccLG2aoy.s:1074 .text.HAL_SYSCFG_EnableVREFBUF:000000000000002c $d
/tmp/ccLG2aoy.s:1079 .text.HAL_SYSCFG_DisableVREFBUF:0000000000000000 $t
/tmp/ccLG2aoy.s:1087 .text.HAL_SYSCFG_DisableVREFBUF:0000000000000000 HAL_SYSCFG_DisableVREFBUF
/tmp/ccLG2aoy.s:1104 .text.HAL_SYSCFG_DisableVREFBUF:000000000000000c $d
/tmp/ccLG2aoy.s:1109 .text.HAL_SYSCFG_EnableIOSwitchBooster:0000000000000000 $t
/tmp/ccLG2aoy.s:1117 .text.HAL_SYSCFG_EnableIOSwitchBooster:0000000000000000 HAL_SYSCFG_EnableIOSwitchBooster
/tmp/ccLG2aoy.s:1134 .text.HAL_SYSCFG_EnableIOSwitchBooster:000000000000000c $d
/tmp/ccLG2aoy.s:1139 .text.HAL_SYSCFG_DisableIOSwitchBooster:0000000000000000 $t
/tmp/ccLG2aoy.s:1147 .text.HAL_SYSCFG_DisableIOSwitchBooster:0000000000000000 HAL_SYSCFG_DisableIOSwitchBooster
/tmp/ccLG2aoy.s:1164 .text.HAL_SYSCFG_DisableIOSwitchBooster:000000000000000c $d
/tmp/ccLG2aoy.s:1169 .text.HAL_SYSCFG_EnableIOSwitchVDD:0000000000000000 $t
/tmp/ccLG2aoy.s:1177 .text.HAL_SYSCFG_EnableIOSwitchVDD:0000000000000000 HAL_SYSCFG_EnableIOSwitchVDD
/tmp/ccLG2aoy.s:1194 .text.HAL_SYSCFG_EnableIOSwitchVDD:000000000000000c $d
/tmp/ccLG2aoy.s:1199 .text.HAL_SYSCFG_DisableIOSwitchVDD:0000000000000000 $t
/tmp/ccLG2aoy.s:1207 .text.HAL_SYSCFG_DisableIOSwitchVDD:0000000000000000 HAL_SYSCFG_DisableIOSwitchVDD
/tmp/ccLG2aoy.s:1224 .text.HAL_SYSCFG_DisableIOSwitchVDD:000000000000000c $d
/tmp/ccLG2aoy.s:1229 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:0000000000000000 $t
/tmp/ccLG2aoy.s:1237 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:0000000000000000 HAL_SYSCFG_CCMSRAM_WriteProtectionEnable
/tmp/ccLG2aoy.s:1256 .text.HAL_SYSCFG_CCMSRAM_WriteProtectionEnable:000000000000000c $d
/tmp/ccLG2aoy.s:1268 .data.uwTickFreq:0000000000000000 uwTickFreq
/tmp/ccLG2aoy.s:1275 .data.uwTickPrio:0000000000000000 uwTickPrio
/tmp/ccLG2aoy.s:1264 .data.uwTickFreq:0000000000000000 $d
/tmp/ccLG2aoy.s:1271 .data.uwTickPrio:0000000000000000 $d
2021-07-02 22:19:04 +02:00
UNDEFINED SYMBOLS
HAL_SYSTICK_Config
HAL_NVIC_SetPriority
SystemCoreClock
2021-07-03 04:08:08 +02:00
ARM GAS /tmp/ccLG2aoy.s page 39
2021-07-02 22:19:04 +02:00
HAL_NVIC_SetPriorityGrouping