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bassofono/codice/build/stm32g4xx_hal_msp.lst

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1 .cpu cortex-m4
2 .eabi_attribute 27, 1
3 .eabi_attribute 28, 1
4 .eabi_attribute 23, 1
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 2
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32g4xx_hal_msp.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_MspInit,"ax",%progbits
16 .align 1
17 .p2align 2,,3
18 .global HAL_MspInit
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu fpv4-sp-d16
24 HAL_MspInit:
25 .LFB329:
26 .file 1 "Core/Src/stm32g4xx_hal_msp.c"
1:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32g4xx_hal_msp.c **** /**
3:Core/Src/stm32g4xx_hal_msp.c **** ******************************************************************************
4:Core/Src/stm32g4xx_hal_msp.c **** * @file stm32g4xx_hal_msp.c
5:Core/Src/stm32g4xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
6:Core/Src/stm32g4xx_hal_msp.c **** * and de-Initialization codes.
7:Core/Src/stm32g4xx_hal_msp.c **** ******************************************************************************
8:Core/Src/stm32g4xx_hal_msp.c **** * @attention
9:Core/Src/stm32g4xx_hal_msp.c **** *
10:Core/Src/stm32g4xx_hal_msp.c **** * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
11:Core/Src/stm32g4xx_hal_msp.c **** * All rights reserved.</center></h2>
12:Core/Src/stm32g4xx_hal_msp.c **** *
13:Core/Src/stm32g4xx_hal_msp.c **** * This software component is licensed by ST under BSD 3-Clause license,
14:Core/Src/stm32g4xx_hal_msp.c **** * the "License"; You may not use this file except in compliance with the
15:Core/Src/stm32g4xx_hal_msp.c **** * License. You may obtain a copy of the License at:
16:Core/Src/stm32g4xx_hal_msp.c **** * opensource.org/licenses/BSD-3-Clause
17:Core/Src/stm32g4xx_hal_msp.c **** *
18:Core/Src/stm32g4xx_hal_msp.c **** ******************************************************************************
19:Core/Src/stm32g4xx_hal_msp.c **** */
20:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Header */
21:Core/Src/stm32g4xx_hal_msp.c ****
22:Core/Src/stm32g4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
23:Core/Src/stm32g4xx_hal_msp.c **** #include "main.h"
24:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32g4xx_hal_msp.c ****
26:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Includes */
27:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc1;
28:Core/Src/stm32g4xx_hal_msp.c ****
29:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_dac1_ch1;
30:Core/Src/stm32g4xx_hal_msp.c ****
31:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_dac1_ch2;
32:Core/Src/stm32g4xx_hal_msp.c ****
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33:Core/Src/stm32g4xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_usart1_tx;
34:Core/Src/stm32g4xx_hal_msp.c ****
35:Core/Src/stm32g4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
36:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TD */
37:Core/Src/stm32g4xx_hal_msp.c ****
38:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TD */
39:Core/Src/stm32g4xx_hal_msp.c ****
40:Core/Src/stm32g4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
41:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Define */
42:Core/Src/stm32g4xx_hal_msp.c ****
43:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Define */
44:Core/Src/stm32g4xx_hal_msp.c ****
45:Core/Src/stm32g4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
46:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
47:Core/Src/stm32g4xx_hal_msp.c ****
48:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END Macro */
49:Core/Src/stm32g4xx_hal_msp.c ****
50:Core/Src/stm32g4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
51:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PV */
52:Core/Src/stm32g4xx_hal_msp.c ****
53:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END PV */
54:Core/Src/stm32g4xx_hal_msp.c ****
55:Core/Src/stm32g4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
56:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
57:Core/Src/stm32g4xx_hal_msp.c ****
58:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END PFP */
59:Core/Src/stm32g4xx_hal_msp.c ****
60:Core/Src/stm32g4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
61:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
62:Core/Src/stm32g4xx_hal_msp.c ****
63:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
64:Core/Src/stm32g4xx_hal_msp.c ****
65:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
66:Core/Src/stm32g4xx_hal_msp.c ****
67:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END 0 */
68:Core/Src/stm32g4xx_hal_msp.c **** /**
69:Core/Src/stm32g4xx_hal_msp.c **** * Initializes the Global MSP.
70:Core/Src/stm32g4xx_hal_msp.c **** */
71:Core/Src/stm32g4xx_hal_msp.c **** void HAL_MspInit(void)
72:Core/Src/stm32g4xx_hal_msp.c **** {
27 .loc 1 72 0
28 .cfi_startproc
29 @ args = 0, pretend = 0, frame = 8
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
32 .LBB2:
73:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
74:Core/Src/stm32g4xx_hal_msp.c ****
75:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END MspInit 0 */
76:Core/Src/stm32g4xx_hal_msp.c ****
77:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
33 .loc 1 77 0
34 0000 0B4B ldr r3, .L4
35 0002 1A6E ldr r2, [r3, #96]
36 0004 42F00102 orr r2, r2, #1
37 0008 1A66 str r2, [r3, #96]
38 000a 1A6E ldr r2, [r3, #96]
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39 .LBE2:
72:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
40 .loc 1 72 0
41 000c 82B0 sub sp, sp, #8
42 .LCFI0:
43 .cfi_def_cfa_offset 8
44 .LBB3:
45 .loc 1 77 0
46 000e 02F00102 and r2, r2, #1
47 0012 0092 str r2, [sp]
48 0014 009A ldr r2, [sp]
49 .LBE3:
50 .LBB4:
78:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
51 .loc 1 78 0
52 0016 9A6D ldr r2, [r3, #88]
53 0018 42F08052 orr r2, r2, #268435456
54 001c 9A65 str r2, [r3, #88]
55 001e 9B6D ldr r3, [r3, #88]
56 0020 03F08053 and r3, r3, #268435456
57 0024 0193 str r3, [sp, #4]
58 0026 019B ldr r3, [sp, #4]
59 .LBE4:
79:Core/Src/stm32g4xx_hal_msp.c ****
80:Core/Src/stm32g4xx_hal_msp.c **** /* System interrupt init*/
81:Core/Src/stm32g4xx_hal_msp.c ****
82:Core/Src/stm32g4xx_hal_msp.c **** /** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
83:Core/Src/stm32g4xx_hal_msp.c **** */
84:Core/Src/stm32g4xx_hal_msp.c **** HAL_PWREx_DisableUCPDDeadBattery();
85:Core/Src/stm32g4xx_hal_msp.c ****
86:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
87:Core/Src/stm32g4xx_hal_msp.c ****
88:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END MspInit 1 */
89:Core/Src/stm32g4xx_hal_msp.c **** }
60 .loc 1 89 0
61 0028 02B0 add sp, sp, #8
62 .LCFI1:
63 .cfi_def_cfa_offset 0
64 @ sp needed
84:Core/Src/stm32g4xx_hal_msp.c ****
65 .loc 1 84 0
66 002a FFF7FEBF b HAL_PWREx_DisableUCPDDeadBattery
67 .LVL0:
68 .L5:
69 002e 00BF .align 2
70 .L4:
71 0030 00100240 .word 1073876992
72 .cfi_endproc
73 .LFE329:
75 .section .text.HAL_ADC_MspInit,"ax",%progbits
76 .align 1
77 .p2align 2,,3
78 .global HAL_ADC_MspInit
79 .syntax unified
80 .thumb
81 .thumb_func
82 .fpu fpv4-sp-d16
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84 HAL_ADC_MspInit:
85 .LFB330:
90:Core/Src/stm32g4xx_hal_msp.c ****
91:Core/Src/stm32g4xx_hal_msp.c **** /**
92:Core/Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP Initialization
93:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
94:Core/Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer
95:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
96:Core/Src/stm32g4xx_hal_msp.c **** */
97:Core/Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
98:Core/Src/stm32g4xx_hal_msp.c **** {
86 .loc 1 98 0
87 .cfi_startproc
88 @ args = 0, pretend = 0, frame = 8
89 @ frame_needed = 0, uses_anonymous_args = 0
90 .LVL1:
99:Core/Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1)
91 .loc 1 99 0
92 0000 0368 ldr r3, [r0]
93 0002 B3F1A04F cmp r3, #1342177280
94 0006 00D0 beq .L16
95 0008 7047 bx lr
96 .L16:
97 .LBB5:
100:Core/Src/stm32g4xx_hal_msp.c **** {
101:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
102:Core/Src/stm32g4xx_hal_msp.c ****
103:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */
104:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
105:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_ENABLE();
98 .loc 1 105 0
99 000a 03F17043 add r3, r3, #-268435456
100 000e 03F50433 add r3, r3, #135168
101 .LBE5:
98:Core/Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1)
102 .loc 1 98 0
103 0012 70B5 push {r4, r5, r6, lr}
104 .LCFI2:
105 .cfi_def_cfa_offset 16
106 .cfi_offset 4, -16
107 .cfi_offset 5, -12
108 .cfi_offset 6, -8
109 .cfi_offset 14, -4
110 .LBB6:
111 .loc 1 105 0
112 0014 DA6C ldr r2, [r3, #76]
113 .LBE6:
106:Core/Src/stm32g4xx_hal_msp.c ****
107:Core/Src/stm32g4xx_hal_msp.c **** /* ADC1 DMA Init */
108:Core/Src/stm32g4xx_hal_msp.c **** /* ADC1 Init */
109:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Instance = DMA1_Channel1;
114 .loc 1 109 0
115 0016 144C ldr r4, .L18
116 0018 1449 ldr r1, .L18+4
117 .LBB7:
105:Core/Src/stm32g4xx_hal_msp.c ****
118 .loc 1 105 0
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119 001a 42F40052 orr r2, r2, #8192
120 001e DA64 str r2, [r3, #76]
121 0020 DB6C ldr r3, [r3, #76]
122 .LBE7:
123 .loc 1 109 0
124 0022 2160 str r1, [r4]
98:Core/Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1)
125 .loc 1 98 0
126 0024 82B0 sub sp, sp, #8
127 .LCFI3:
128 .cfi_def_cfa_offset 24
129 .LBB8:
105:Core/Src/stm32g4xx_hal_msp.c ****
130 .loc 1 105 0
131 0026 03F40053 and r3, r3, #8192
132 002a 0193 str r3, [sp, #4]
133 .LBE8:
110:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
134 .loc 1 110 0
135 002c 0522 movs r2, #5
111:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
112:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
113:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
114:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
136 .loc 1 114 0
137 002e 4FF48073 mov r3, #256
138 0032 0546 mov r5, r0
113:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
139 .loc 1 113 0
140 0034 8020 movs r0, #128
141 .LVL2:
115:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
142 .loc 1 115 0
143 0036 4FF48061 mov r1, #1024
110:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
144 .loc 1 110 0
145 003a 6260 str r2, [r4, #4]
113:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
146 .loc 1 113 0
147 003c 2061 str r0, [r4, #16]
116:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Mode = DMA_CIRCULAR;
148 .loc 1 116 0
149 003e 2022 movs r2, #32
114:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
150 .loc 1 114 0
151 0040 6361 str r3, [r4, #20]
117:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
118:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
152 .loc 1 118 0
153 0042 2046 mov r0, r4
111:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
154 .loc 1 111 0
155 0044 0023 movs r3, #0
156 .LBB9:
105:Core/Src/stm32g4xx_hal_msp.c ****
157 .loc 1 105 0
158 0046 019E ldr r6, [sp, #4]
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159 .LBE9:
117:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
160 .loc 1 117 0
161 0048 2362 str r3, [r4, #32]
116:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
162 .loc 1 116 0
163 004a C4E90612 strd r1, r2, [r4, #24]
112:Core/Src/stm32g4xx_hal_msp.c **** hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
164 .loc 1 112 0
165 004e C4E90233 strd r3, r3, [r4, #8]
166 .loc 1 118 0
167 0052 FFF7FEFF bl HAL_DMA_Init
168 .LVL3:
169 0056 18B9 cbnz r0, .L17
170 .L8:
119:Core/Src/stm32g4xx_hal_msp.c **** {
120:Core/Src/stm32g4xx_hal_msp.c **** Error_Handler();
121:Core/Src/stm32g4xx_hal_msp.c **** }
122:Core/Src/stm32g4xx_hal_msp.c ****
123:Core/Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
171 .loc 1 123 0
172 0058 6C65 str r4, [r5, #84]
173 005a A562 str r5, [r4, #40]
124:Core/Src/stm32g4xx_hal_msp.c ****
125:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
126:Core/Src/stm32g4xx_hal_msp.c ****
127:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */
128:Core/Src/stm32g4xx_hal_msp.c **** }
129:Core/Src/stm32g4xx_hal_msp.c ****
130:Core/Src/stm32g4xx_hal_msp.c **** }
174 .loc 1 130 0
175 005c 02B0 add sp, sp, #8
176 .LCFI4:
177 .cfi_remember_state
178 .cfi_def_cfa_offset 16
179 @ sp needed
180 005e 70BD pop {r4, r5, r6, pc}
181 .LVL4:
182 .L17:
183 .LCFI5:
184 .cfi_restore_state
120:Core/Src/stm32g4xx_hal_msp.c **** }
185 .loc 1 120 0
186 0060 FFF7FEFF bl Error_Handler
187 .LVL5:
188 0064 F8E7 b .L8
189 .L19:
190 0066 00BF .align 2
191 .L18:
192 0068 00000000 .word hdma_adc1
193 006c 08000240 .word 1073872904
194 .cfi_endproc
195 .LFE330:
197 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
198 .align 1
199 .p2align 2,,3
200 .global HAL_ADC_MspDeInit
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201 .syntax unified
202 .thumb
203 .thumb_func
204 .fpu fpv4-sp-d16
206 HAL_ADC_MspDeInit:
207 .LFB331:
131:Core/Src/stm32g4xx_hal_msp.c ****
132:Core/Src/stm32g4xx_hal_msp.c **** /**
133:Core/Src/stm32g4xx_hal_msp.c **** * @brief ADC MSP De-Initialization
134:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
135:Core/Src/stm32g4xx_hal_msp.c **** * @param hadc: ADC handle pointer
136:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
137:Core/Src/stm32g4xx_hal_msp.c **** */
138:Core/Src/stm32g4xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
139:Core/Src/stm32g4xx_hal_msp.c **** {
208 .loc 1 139 0
209 .cfi_startproc
210 @ args = 0, pretend = 0, frame = 0
211 @ frame_needed = 0, uses_anonymous_args = 0
212 @ link register save eliminated.
213 .LVL6:
140:Core/Src/stm32g4xx_hal_msp.c **** if(hadc->Instance==ADC1)
214 .loc 1 140 0
215 0000 0368 ldr r3, [r0]
216 0002 B3F1A04F cmp r3, #1342177280
217 0006 00D0 beq .L22
141:Core/Src/stm32g4xx_hal_msp.c **** {
142:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
143:Core/Src/stm32g4xx_hal_msp.c ****
144:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */
145:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
146:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_ADC12_CLK_DISABLE();
147:Core/Src/stm32g4xx_hal_msp.c ****
148:Core/Src/stm32g4xx_hal_msp.c **** /* ADC1 DMA DeInit */
149:Core/Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle);
150:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
151:Core/Src/stm32g4xx_hal_msp.c ****
152:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */
153:Core/Src/stm32g4xx_hal_msp.c **** }
154:Core/Src/stm32g4xx_hal_msp.c ****
155:Core/Src/stm32g4xx_hal_msp.c **** }
218 .loc 1 155 0
219 0008 7047 bx lr
220 .L22:
146:Core/Src/stm32g4xx_hal_msp.c ****
221 .loc 1 146 0
222 000a 044A ldr r2, .L23
149:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
223 .loc 1 149 0
224 000c 406D ldr r0, [r0, #84]
225 .LVL7:
146:Core/Src/stm32g4xx_hal_msp.c ****
226 .loc 1 146 0
227 000e D36C ldr r3, [r2, #76]
228 0010 23F40053 bic r3, r3, #8192
229 0014 D364 str r3, [r2, #76]
149:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
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230 .loc 1 149 0
231 0016 FFF7FEBF b HAL_DMA_DeInit
232 .LVL8:
233 .L24:
234 001a 00BF .align 2
235 .L23:
236 001c 00100240 .word 1073876992
237 .cfi_endproc
238 .LFE331:
240 .section .text.HAL_CORDIC_MspInit,"ax",%progbits
241 .align 1
242 .p2align 2,,3
243 .global HAL_CORDIC_MspInit
244 .syntax unified
245 .thumb
246 .thumb_func
247 .fpu fpv4-sp-d16
249 HAL_CORDIC_MspInit:
250 .LFB332:
156:Core/Src/stm32g4xx_hal_msp.c ****
157:Core/Src/stm32g4xx_hal_msp.c **** /**
158:Core/Src/stm32g4xx_hal_msp.c **** * @brief CORDIC MSP Initialization
159:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
160:Core/Src/stm32g4xx_hal_msp.c **** * @param hcordic: CORDIC handle pointer
161:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
162:Core/Src/stm32g4xx_hal_msp.c **** */
163:Core/Src/stm32g4xx_hal_msp.c **** void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
164:Core/Src/stm32g4xx_hal_msp.c **** {
251 .loc 1 164 0
252 .cfi_startproc
253 @ args = 0, pretend = 0, frame = 8
254 @ frame_needed = 0, uses_anonymous_args = 0
255 @ link register save eliminated.
256 .LVL9:
165:Core/Src/stm32g4xx_hal_msp.c **** if(hcordic->Instance==CORDIC)
257 .loc 1 165 0
258 0000 0268 ldr r2, [r0]
259 0002 0A4B ldr r3, .L32
260 0004 9A42 cmp r2, r3
261 0006 00D0 beq .L31
262 0008 7047 bx lr
263 .L31:
264 .LBB10:
166:Core/Src/stm32g4xx_hal_msp.c **** {
167:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN CORDIC_MspInit 0 */
168:Core/Src/stm32g4xx_hal_msp.c ****
169:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END CORDIC_MspInit 0 */
170:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
171:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_CORDIC_CLK_ENABLE();
265 .loc 1 171 0
266 000a D3F84824 ldr r2, [r3, #1096]
267 000e 42F00802 orr r2, r2, #8
268 0012 C3F84824 str r2, [r3, #1096]
269 0016 03F58063 add r3, r3, #1024
270 .LBE10:
164:Core/Src/stm32g4xx_hal_msp.c **** if(hcordic->Instance==CORDIC)
271 .loc 1 164 0
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272 001a 82B0 sub sp, sp, #8
273 .LCFI6:
274 .cfi_def_cfa_offset 8
275 .LBB11:
276 .loc 1 171 0
277 001c 9B6C ldr r3, [r3, #72]
278 001e 03F00803 and r3, r3, #8
279 0022 0193 str r3, [sp, #4]
280 0024 019B ldr r3, [sp, #4]
281 .LBE11:
172:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN CORDIC_MspInit 1 */
173:Core/Src/stm32g4xx_hal_msp.c ****
174:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END CORDIC_MspInit 1 */
175:Core/Src/stm32g4xx_hal_msp.c **** }
176:Core/Src/stm32g4xx_hal_msp.c ****
177:Core/Src/stm32g4xx_hal_msp.c **** }
282 .loc 1 177 0
283 0026 02B0 add sp, sp, #8
284 .LCFI7:
285 .cfi_def_cfa_offset 0
286 @ sp needed
287 0028 7047 bx lr
288 .L33:
289 002a 00BF .align 2
290 .L32:
291 002c 000C0240 .word 1073875968
292 .cfi_endproc
293 .LFE332:
295 .section .text.HAL_CORDIC_MspDeInit,"ax",%progbits
296 .align 1
297 .p2align 2,,3
298 .global HAL_CORDIC_MspDeInit
299 .syntax unified
300 .thumb
301 .thumb_func
302 .fpu fpv4-sp-d16
304 HAL_CORDIC_MspDeInit:
305 .LFB333:
178:Core/Src/stm32g4xx_hal_msp.c ****
179:Core/Src/stm32g4xx_hal_msp.c **** /**
180:Core/Src/stm32g4xx_hal_msp.c **** * @brief CORDIC MSP De-Initialization
181:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
182:Core/Src/stm32g4xx_hal_msp.c **** * @param hcordic: CORDIC handle pointer
183:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
184:Core/Src/stm32g4xx_hal_msp.c **** */
185:Core/Src/stm32g4xx_hal_msp.c **** void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
186:Core/Src/stm32g4xx_hal_msp.c **** {
306 .loc 1 186 0
307 .cfi_startproc
308 @ args = 0, pretend = 0, frame = 0
309 @ frame_needed = 0, uses_anonymous_args = 0
310 @ link register save eliminated.
311 .LVL10:
187:Core/Src/stm32g4xx_hal_msp.c **** if(hcordic->Instance==CORDIC)
312 .loc 1 187 0
313 0000 0268 ldr r2, [r0]
314 0002 044B ldr r3, .L36
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315 0004 9A42 cmp r2, r3
316 0006 04D1 bne .L34
188:Core/Src/stm32g4xx_hal_msp.c **** {
189:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN CORDIC_MspDeInit 0 */
190:Core/Src/stm32g4xx_hal_msp.c ****
191:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END CORDIC_MspDeInit 0 */
192:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
193:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_CORDIC_CLK_DISABLE();
317 .loc 1 193 0
318 0008 034A ldr r2, .L36+4
319 000a 936C ldr r3, [r2, #72]
320 000c 23F00803 bic r3, r3, #8
321 0010 9364 str r3, [r2, #72]
322 .L34:
194:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN CORDIC_MspDeInit 1 */
195:Core/Src/stm32g4xx_hal_msp.c ****
196:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END CORDIC_MspDeInit 1 */
197:Core/Src/stm32g4xx_hal_msp.c **** }
198:Core/Src/stm32g4xx_hal_msp.c ****
199:Core/Src/stm32g4xx_hal_msp.c **** }
323 .loc 1 199 0
324 0012 7047 bx lr
325 .L37:
326 .align 2
327 .L36:
328 0014 000C0240 .word 1073875968
329 0018 00100240 .word 1073876992
330 .cfi_endproc
331 .LFE333:
333 .section .text.HAL_DAC_MspInit,"ax",%progbits
334 .align 1
335 .p2align 2,,3
336 .global HAL_DAC_MspInit
337 .syntax unified
338 .thumb
339 .thumb_func
340 .fpu fpv4-sp-d16
342 HAL_DAC_MspInit:
343 .LFB334:
200:Core/Src/stm32g4xx_hal_msp.c ****
201:Core/Src/stm32g4xx_hal_msp.c **** /**
202:Core/Src/stm32g4xx_hal_msp.c **** * @brief DAC MSP Initialization
203:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
204:Core/Src/stm32g4xx_hal_msp.c **** * @param hdac: DAC handle pointer
205:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
206:Core/Src/stm32g4xx_hal_msp.c **** */
207:Core/Src/stm32g4xx_hal_msp.c **** void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
208:Core/Src/stm32g4xx_hal_msp.c **** {
344 .loc 1 208 0
345 .cfi_startproc
346 @ args = 0, pretend = 0, frame = 32
347 @ frame_needed = 0, uses_anonymous_args = 0
348 .LVL11:
349 0000 70B5 push {r4, r5, r6, lr}
350 .LCFI8:
351 .cfi_def_cfa_offset 16
352 .cfi_offset 4, -16
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353 .cfi_offset 5, -12
354 .cfi_offset 6, -8
355 .cfi_offset 14, -4
209:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
210:Core/Src/stm32g4xx_hal_msp.c **** if(hdac->Instance==DAC1)
356 .loc 1 210 0
357 0002 0268 ldr r2, [r0]
358 0004 334B ldr r3, .L52
208:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
359 .loc 1 208 0
360 0006 88B0 sub sp, sp, #32
361 .LCFI9:
362 .cfi_def_cfa_offset 48
209:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
363 .loc 1 209 0
364 0008 0024 movs r4, #0
365 .loc 1 210 0
366 000a 9A42 cmp r2, r3
209:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
367 .loc 1 209 0
368 000c CDE90344 strd r4, r4, [sp, #12]
369 0010 CDE90544 strd r4, r4, [sp, #20]
370 0014 0794 str r4, [sp, #28]
371 .loc 1 210 0
372 0016 01D0 beq .L49
211:Core/Src/stm32g4xx_hal_msp.c **** {
212:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN DAC1_MspInit 0 */
213:Core/Src/stm32g4xx_hal_msp.c ****
214:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END DAC1_MspInit 0 */
215:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
216:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_DAC1_CLK_ENABLE();
217:Core/Src/stm32g4xx_hal_msp.c ****
218:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
219:Core/Src/stm32g4xx_hal_msp.c **** /**DAC1 GPIO Configuration
220:Core/Src/stm32g4xx_hal_msp.c **** PA4 ------> DAC1_OUT1
221:Core/Src/stm32g4xx_hal_msp.c **** PA5 ------> DAC1_OUT2
222:Core/Src/stm32g4xx_hal_msp.c **** */
223:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
224:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
225:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
226:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
227:Core/Src/stm32g4xx_hal_msp.c ****
228:Core/Src/stm32g4xx_hal_msp.c **** /* DAC1 DMA Init */
229:Core/Src/stm32g4xx_hal_msp.c **** /* DAC1_CH1 Init */
230:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Instance = DMA1_Channel2;
231:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
232:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
233:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
234:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
235:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
236:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
237:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
238:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
239:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
240:Core/Src/stm32g4xx_hal_msp.c **** {
241:Core/Src/stm32g4xx_hal_msp.c **** Error_Handler();
242:Core/Src/stm32g4xx_hal_msp.c **** }
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243:Core/Src/stm32g4xx_hal_msp.c ****
244:Core/Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(hdac,DMA_Handle1,hdma_dac1_ch1);
245:Core/Src/stm32g4xx_hal_msp.c ****
246:Core/Src/stm32g4xx_hal_msp.c **** /* DAC1_CH2 Init */
247:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Instance = DMA1_Channel4;
248:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Request = DMA_REQUEST_DAC1_CHANNEL2;
249:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
250:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
251:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
252:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
253:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
254:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Mode = DMA_CIRCULAR;
255:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
256:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_dac1_ch2) != HAL_OK)
257:Core/Src/stm32g4xx_hal_msp.c **** {
258:Core/Src/stm32g4xx_hal_msp.c **** Error_Handler();
259:Core/Src/stm32g4xx_hal_msp.c **** }
260:Core/Src/stm32g4xx_hal_msp.c ****
261:Core/Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(hdac,DMA_Handle2,hdma_dac1_ch2);
262:Core/Src/stm32g4xx_hal_msp.c ****
263:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN DAC1_MspInit 1 */
264:Core/Src/stm32g4xx_hal_msp.c ****
265:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END DAC1_MspInit 1 */
266:Core/Src/stm32g4xx_hal_msp.c **** }
267:Core/Src/stm32g4xx_hal_msp.c ****
268:Core/Src/stm32g4xx_hal_msp.c **** }
373 .loc 1 268 0
374 0018 08B0 add sp, sp, #32
375 .LCFI10:
376 .cfi_remember_state
377 .cfi_def_cfa_offset 16
378 @ sp needed
379 001a 70BD pop {r4, r5, r6, pc}
380 .L49:
381 .LCFI11:
382 .cfi_restore_state
383 .LBB12:
216:Core/Src/stm32g4xx_hal_msp.c ****
384 .loc 1 216 0
385 001c 03F17043 add r3, r3, #-268435456
386 0020 03F50233 add r3, r3, #133120
387 .LBE12:
230:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
388 .loc 1 230 0
389 0024 2C4D ldr r5, .L52+4
390 .LBB13:
216:Core/Src/stm32g4xx_hal_msp.c ****
391 .loc 1 216 0
392 0026 DA6C ldr r2, [r3, #76]
393 0028 42F48032 orr r2, r2, #65536
394 002c DA64 str r2, [r3, #76]
395 002e DA6C ldr r2, [r3, #76]
396 0030 02F48032 and r2, r2, #65536
397 0034 0192 str r2, [sp, #4]
398 0036 019A ldr r2, [sp, #4]
399 .LBE13:
400 .LBB14:
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218:Core/Src/stm32g4xx_hal_msp.c **** /**DAC1 GPIO Configuration
401 .loc 1 218 0
402 0038 DA6C ldr r2, [r3, #76]
403 003a 42F00102 orr r2, r2, #1
404 003e DA64 str r2, [r3, #76]
405 0040 DB6C ldr r3, [r3, #76]
406 0042 03F00103 and r3, r3, #1
407 0046 0293 str r3, [sp, #8]
408 .LBE14:
223:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
409 .loc 1 223 0
410 0048 3022 movs r2, #48
224:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
411 .loc 1 224 0
412 004a 0323 movs r3, #3
226:Core/Src/stm32g4xx_hal_msp.c ****
413 .loc 1 226 0
414 004c 03A9 add r1, sp, #12
415 004e 0646 mov r6, r0
416 .LBB15:
218:Core/Src/stm32g4xx_hal_msp.c **** /**DAC1 GPIO Configuration
417 .loc 1 218 0
418 0050 0298 ldr r0, [sp, #8]
419 .LVL12:
420 .LBE15:
223:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
421 .loc 1 223 0
422 0052 0392 str r2, [sp, #12]
226:Core/Src/stm32g4xx_hal_msp.c ****
423 .loc 1 226 0
424 0054 4FF09040 mov r0, #1207959552
224:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
425 .loc 1 224 0
426 0058 0493 str r3, [sp, #16]
226:Core/Src/stm32g4xx_hal_msp.c ****
427 .loc 1 226 0
428 005a FFF7FEFF bl HAL_GPIO_Init
429 .LVL13:
230:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
430 .loc 1 230 0
431 005e 1F49 ldr r1, .L52+8
432 0060 2960 str r1, [r5]
231:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
433 .loc 1 231 0
434 0062 0622 movs r2, #6
232:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
435 .loc 1 232 0
436 0064 1023 movs r3, #16
234:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
437 .loc 1 234 0
438 0066 8020 movs r0, #128
235:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
439 .loc 1 235 0
440 0068 4FF40071 mov r1, #512
231:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
441 .loc 1 231 0
442 006c 6A60 str r2, [r5, #4]
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232:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
443 .loc 1 232 0
444 006e AB60 str r3, [r5, #8]
236:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
445 .loc 1 236 0
446 0070 4FF40062 mov r2, #2048
237:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
447 .loc 1 237 0
448 0074 2023 movs r3, #32
234:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
449 .loc 1 234 0
450 0076 2861 str r0, [r5, #16]
239:Core/Src/stm32g4xx_hal_msp.c **** {
451 .loc 1 239 0
452 0078 2846 mov r0, r5
233:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
453 .loc 1 233 0
454 007a EC60 str r4, [r5, #12]
238:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
455 .loc 1 238 0
456 007c 2C62 str r4, [r5, #32]
236:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
457 .loc 1 236 0
458 007e C5E90512 strd r1, r2, [r5, #20]
237:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
459 .loc 1 237 0
460 0082 EB61 str r3, [r5, #28]
239:Core/Src/stm32g4xx_hal_msp.c **** {
461 .loc 1 239 0
462 0084 FFF7FEFF bl HAL_DMA_Init
463 .LVL14:
464 0088 E8B9 cbnz r0, .L50
465 .L40:
247:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Request = DMA_REQUEST_DAC1_CHANNEL2;
466 .loc 1 247 0
467 008a 154C ldr r4, .L52+12
468 008c 154B ldr r3, .L52+16
469 008e 2360 str r3, [r4]
248:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
470 .loc 1 248 0
471 0090 0721 movs r1, #7
249:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
472 .loc 1 249 0
473 0092 1022 movs r2, #16
251:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
474 .loc 1 251 0
475 0094 8020 movs r0, #128
252:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
476 .loc 1 252 0
477 0096 4FF40073 mov r3, #512
244:Core/Src/stm32g4xx_hal_msp.c ****
478 .loc 1 244 0
479 009a B560 str r5, [r6, #8]
248:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
480 .loc 1 248 0
481 009c 6160 str r1, [r4, #4]
249:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
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482 .loc 1 249 0
483 009e A260 str r2, [r4, #8]
253:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Mode = DMA_CIRCULAR;
484 .loc 1 253 0
485 00a0 4FF40061 mov r1, #2048
254:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
486 .loc 1 254 0
487 00a4 2022 movs r2, #32
251:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
488 .loc 1 251 0
489 00a6 2061 str r0, [r4, #16]
252:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
490 .loc 1 252 0
491 00a8 6361 str r3, [r4, #20]
256:Core/Src/stm32g4xx_hal_msp.c **** {
492 .loc 1 256 0
493 00aa 2046 mov r0, r4
250:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
494 .loc 1 250 0
495 00ac 0023 movs r3, #0
244:Core/Src/stm32g4xx_hal_msp.c ****
496 .loc 1 244 0
497 00ae AE62 str r6, [r5, #40]
254:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
498 .loc 1 254 0
499 00b0 C4E90612 strd r1, r2, [r4, #24]
250:Core/Src/stm32g4xx_hal_msp.c **** hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
500 .loc 1 250 0
501 00b4 E360 str r3, [r4, #12]
255:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_dac1_ch2) != HAL_OK)
502 .loc 1 255 0
503 00b6 2362 str r3, [r4, #32]
256:Core/Src/stm32g4xx_hal_msp.c **** {
504 .loc 1 256 0
505 00b8 FFF7FEFF bl HAL_DMA_Init
506 .LVL15:
507 00bc 30B9 cbnz r0, .L51
508 .L41:
261:Core/Src/stm32g4xx_hal_msp.c ****
509 .loc 1 261 0
510 00be F460 str r4, [r6, #12]
511 00c0 A662 str r6, [r4, #40]
512 .loc 1 268 0
513 00c2 08B0 add sp, sp, #32
514 .LCFI12:
515 .cfi_remember_state
516 .cfi_def_cfa_offset 16
517 @ sp needed
518 00c4 70BD pop {r4, r5, r6, pc}
519 .LVL16:
520 .L50:
521 .LCFI13:
522 .cfi_restore_state
241:Core/Src/stm32g4xx_hal_msp.c **** }
523 .loc 1 241 0
524 00c6 FFF7FEFF bl Error_Handler
525 .LVL17:
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526 00ca DEE7 b .L40
527 .L51:
258:Core/Src/stm32g4xx_hal_msp.c **** }
528 .loc 1 258 0
529 00cc FFF7FEFF bl Error_Handler
530 .LVL18:
531 00d0 F5E7 b .L41
532 .L53:
533 00d2 00BF .align 2
534 .L52:
535 00d4 00080050 .word 1342179328
536 00d8 00000000 .word hdma_dac1_ch1
537 00dc 1C000240 .word 1073872924
538 00e0 00000000 .word hdma_dac1_ch2
539 00e4 44000240 .word 1073872964
540 .cfi_endproc
541 .LFE334:
543 .section .text.HAL_DAC_MspDeInit,"ax",%progbits
544 .align 1
545 .p2align 2,,3
546 .global HAL_DAC_MspDeInit
547 .syntax unified
548 .thumb
549 .thumb_func
550 .fpu fpv4-sp-d16
552 HAL_DAC_MspDeInit:
553 .LFB335:
269:Core/Src/stm32g4xx_hal_msp.c ****
270:Core/Src/stm32g4xx_hal_msp.c **** /**
271:Core/Src/stm32g4xx_hal_msp.c **** * @brief DAC MSP De-Initialization
272:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
273:Core/Src/stm32g4xx_hal_msp.c **** * @param hdac: DAC handle pointer
274:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
275:Core/Src/stm32g4xx_hal_msp.c **** */
276:Core/Src/stm32g4xx_hal_msp.c **** void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
277:Core/Src/stm32g4xx_hal_msp.c **** {
554 .loc 1 277 0
555 .cfi_startproc
556 @ args = 0, pretend = 0, frame = 0
557 @ frame_needed = 0, uses_anonymous_args = 0
558 .LVL19:
278:Core/Src/stm32g4xx_hal_msp.c **** if(hdac->Instance==DAC1)
559 .loc 1 278 0
560 0000 0C4B ldr r3, .L60
561 0002 0268 ldr r2, [r0]
562 0004 9A42 cmp r2, r3
563 0006 00D0 beq .L59
564 0008 7047 bx lr
565 .L59:
279:Core/Src/stm32g4xx_hal_msp.c **** {
280:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN DAC1_MspDeInit 0 */
281:Core/Src/stm32g4xx_hal_msp.c ****
282:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END DAC1_MspDeInit 0 */
283:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
284:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_DAC1_CLK_DISABLE();
566 .loc 1 284 0
567 000a 0B4A ldr r2, .L60+4
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277:Core/Src/stm32g4xx_hal_msp.c **** if(hdac->Instance==DAC1)
568 .loc 1 277 0
569 000c 10B5 push {r4, lr}
570 .LCFI14:
571 .cfi_def_cfa_offset 8
572 .cfi_offset 4, -8
573 .cfi_offset 14, -4
574 .loc 1 284 0
575 000e D36C ldr r3, [r2, #76]
576 0010 0446 mov r4, r0
577 0012 23F48033 bic r3, r3, #65536
578 0016 D364 str r3, [r2, #76]
285:Core/Src/stm32g4xx_hal_msp.c ****
286:Core/Src/stm32g4xx_hal_msp.c **** /**DAC1 GPIO Configuration
287:Core/Src/stm32g4xx_hal_msp.c **** PA4 ------> DAC1_OUT1
288:Core/Src/stm32g4xx_hal_msp.c **** PA5 ------> DAC1_OUT2
289:Core/Src/stm32g4xx_hal_msp.c **** */
290:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5);
579 .loc 1 290 0
580 0018 3021 movs r1, #48
581 001a 4FF09040 mov r0, #1207959552
582 .LVL20:
583 001e FFF7FEFF bl HAL_GPIO_DeInit
584 .LVL21:
291:Core/Src/stm32g4xx_hal_msp.c ****
292:Core/Src/stm32g4xx_hal_msp.c **** /* DAC1 DMA DeInit */
293:Core/Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(hdac->DMA_Handle1);
585 .loc 1 293 0
586 0022 A068 ldr r0, [r4, #8]
587 0024 FFF7FEFF bl HAL_DMA_DeInit
588 .LVL22:
294:Core/Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(hdac->DMA_Handle2);
589 .loc 1 294 0
590 0028 E068 ldr r0, [r4, #12]
295:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN DAC1_MspDeInit 1 */
296:Core/Src/stm32g4xx_hal_msp.c ****
297:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END DAC1_MspDeInit 1 */
298:Core/Src/stm32g4xx_hal_msp.c **** }
299:Core/Src/stm32g4xx_hal_msp.c ****
300:Core/Src/stm32g4xx_hal_msp.c **** }
591 .loc 1 300 0
592 002a BDE81040 pop {r4, lr}
593 .LCFI15:
594 .cfi_restore 14
595 .cfi_restore 4
596 .cfi_def_cfa_offset 0
597 .LVL23:
294:Core/Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(hdac->DMA_Handle2);
598 .loc 1 294 0
599 002e FFF7FEBF b HAL_DMA_DeInit
600 .LVL24:
601 .L61:
602 0032 00BF .align 2
603 .L60:
604 0034 00080050 .word 1342179328
605 0038 00100240 .word 1073876992
606 .cfi_endproc
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607 .LFE335:
609 .section .text.HAL_OPAMP_MspInit,"ax",%progbits
610 .align 1
611 .p2align 2,,3
612 .global HAL_OPAMP_MspInit
613 .syntax unified
614 .thumb
615 .thumb_func
616 .fpu fpv4-sp-d16
618 HAL_OPAMP_MspInit:
619 .LFB336:
301:Core/Src/stm32g4xx_hal_msp.c ****
302:Core/Src/stm32g4xx_hal_msp.c **** /**
303:Core/Src/stm32g4xx_hal_msp.c **** * @brief OPAMP MSP Initialization
304:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
305:Core/Src/stm32g4xx_hal_msp.c **** * @param hopamp: OPAMP handle pointer
306:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
307:Core/Src/stm32g4xx_hal_msp.c **** */
308:Core/Src/stm32g4xx_hal_msp.c **** void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
309:Core/Src/stm32g4xx_hal_msp.c **** {
620 .loc 1 309 0
621 .cfi_startproc
622 @ args = 0, pretend = 0, frame = 24
623 @ frame_needed = 0, uses_anonymous_args = 0
624 .LVL25:
625 0000 10B5 push {r4, lr}
626 .LCFI16:
627 .cfi_def_cfa_offset 8
628 .cfi_offset 4, -8
629 .cfi_offset 14, -4
310:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
311:Core/Src/stm32g4xx_hal_msp.c **** if(hopamp->Instance==OPAMP1)
630 .loc 1 311 0
631 0002 0168 ldr r1, [r0]
632 0004 114A ldr r2, .L66
309:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
633 .loc 1 309 0
634 0006 86B0 sub sp, sp, #24
635 .LCFI17:
636 .cfi_def_cfa_offset 32
310:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
637 .loc 1 310 0
638 0008 0023 movs r3, #0
639 .loc 1 311 0
640 000a 9142 cmp r1, r2
310:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
641 .loc 1 310 0
642 000c CDE90133 strd r3, r3, [sp, #4]
643 0010 CDE90333 strd r3, r3, [sp, #12]
644 0014 0593 str r3, [sp, #20]
645 .loc 1 311 0
646 0016 01D0 beq .L65
312:Core/Src/stm32g4xx_hal_msp.c **** {
313:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN OPAMP1_MspInit 0 */
314:Core/Src/stm32g4xx_hal_msp.c ****
315:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END OPAMP1_MspInit 0 */
316:Core/Src/stm32g4xx_hal_msp.c ****
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317:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
318:Core/Src/stm32g4xx_hal_msp.c **** /**OPAMP1 GPIO Configuration
319:Core/Src/stm32g4xx_hal_msp.c **** PA1 ------> OPAMP1_VINP
320:Core/Src/stm32g4xx_hal_msp.c **** PA3 ------> OPAMP1_VINM0
321:Core/Src/stm32g4xx_hal_msp.c **** */
322:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_3;
323:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
324:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
325:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
326:Core/Src/stm32g4xx_hal_msp.c ****
327:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN OPAMP1_MspInit 1 */
328:Core/Src/stm32g4xx_hal_msp.c ****
329:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END OPAMP1_MspInit 1 */
330:Core/Src/stm32g4xx_hal_msp.c **** }
331:Core/Src/stm32g4xx_hal_msp.c ****
332:Core/Src/stm32g4xx_hal_msp.c **** }
647 .loc 1 332 0
648 0018 06B0 add sp, sp, #24
649 .LCFI18:
650 .cfi_remember_state
651 .cfi_def_cfa_offset 8
652 @ sp needed
653 001a 10BD pop {r4, pc}
654 .L65:
655 .LCFI19:
656 .cfi_restore_state
657 .LBB16:
317:Core/Src/stm32g4xx_hal_msp.c **** /**OPAMP1 GPIO Configuration
658 .loc 1 317 0
659 001c 03F18043 add r3, r3, #1073741824
660 0020 03F50433 add r3, r3, #135168
661 .LBE16:
325:Core/Src/stm32g4xx_hal_msp.c ****
662 .loc 1 325 0
663 0024 01A9 add r1, sp, #4
664 .LBB17:
317:Core/Src/stm32g4xx_hal_msp.c **** /**OPAMP1 GPIO Configuration
665 .loc 1 317 0
666 0026 DA6C ldr r2, [r3, #76]
667 0028 42F00102 orr r2, r2, #1
668 002c DA64 str r2, [r3, #76]
669 002e DB6C ldr r3, [r3, #76]
670 0030 03F00103 and r3, r3, #1
671 0034 0093 str r3, [sp]
672 .LBE17:
322:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
673 .loc 1 322 0
674 0036 0A22 movs r2, #10
323:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
675 .loc 1 323 0
676 0038 0323 movs r3, #3
325:Core/Src/stm32g4xx_hal_msp.c ****
677 .loc 1 325 0
678 003a 4FF09040 mov r0, #1207959552
679 .LVL26:
680 .LBB18:
317:Core/Src/stm32g4xx_hal_msp.c **** /**OPAMP1 GPIO Configuration
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681 .loc 1 317 0
682 003e 009C ldr r4, [sp]
683 .LBE18:
323:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
684 .loc 1 323 0
685 0040 CDE90123 strd r2, r3, [sp, #4]
325:Core/Src/stm32g4xx_hal_msp.c ****
686 .loc 1 325 0
687 0044 FFF7FEFF bl HAL_GPIO_Init
688 .LVL27:
689 .loc 1 332 0
690 0048 06B0 add sp, sp, #24
691 .LCFI20:
692 .cfi_def_cfa_offset 8
693 @ sp needed
694 004a 10BD pop {r4, pc}
695 .L67:
696 .align 2
697 .L66:
698 004c 00030140 .word 1073808128
699 .cfi_endproc
700 .LFE336:
702 .section .text.HAL_OPAMP_MspDeInit,"ax",%progbits
703 .align 1
704 .p2align 2,,3
705 .global HAL_OPAMP_MspDeInit
706 .syntax unified
707 .thumb
708 .thumb_func
709 .fpu fpv4-sp-d16
711 HAL_OPAMP_MspDeInit:
712 .LFB337:
333:Core/Src/stm32g4xx_hal_msp.c ****
334:Core/Src/stm32g4xx_hal_msp.c **** /**
335:Core/Src/stm32g4xx_hal_msp.c **** * @brief OPAMP MSP De-Initialization
336:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
337:Core/Src/stm32g4xx_hal_msp.c **** * @param hopamp: OPAMP handle pointer
338:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
339:Core/Src/stm32g4xx_hal_msp.c **** */
340:Core/Src/stm32g4xx_hal_msp.c **** void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
341:Core/Src/stm32g4xx_hal_msp.c **** {
713 .loc 1 341 0
714 .cfi_startproc
715 @ args = 0, pretend = 0, frame = 0
716 @ frame_needed = 0, uses_anonymous_args = 0
717 @ link register save eliminated.
718 .LVL28:
342:Core/Src/stm32g4xx_hal_msp.c **** if(hopamp->Instance==OPAMP1)
719 .loc 1 342 0
720 0000 0268 ldr r2, [r0]
721 0002 044B ldr r3, .L71
722 0004 9A42 cmp r2, r3
723 0006 00D0 beq .L70
343:Core/Src/stm32g4xx_hal_msp.c **** {
344:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN OPAMP1_MspDeInit 0 */
345:Core/Src/stm32g4xx_hal_msp.c ****
346:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END OPAMP1_MspDeInit 0 */
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347:Core/Src/stm32g4xx_hal_msp.c ****
348:Core/Src/stm32g4xx_hal_msp.c **** /**OPAMP1 GPIO Configuration
349:Core/Src/stm32g4xx_hal_msp.c **** PA1 ------> OPAMP1_VINP
350:Core/Src/stm32g4xx_hal_msp.c **** PA3 ------> OPAMP1_VINM0
351:Core/Src/stm32g4xx_hal_msp.c **** */
352:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_3);
353:Core/Src/stm32g4xx_hal_msp.c ****
354:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN OPAMP1_MspDeInit 1 */
355:Core/Src/stm32g4xx_hal_msp.c ****
356:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END OPAMP1_MspDeInit 1 */
357:Core/Src/stm32g4xx_hal_msp.c **** }
358:Core/Src/stm32g4xx_hal_msp.c ****
359:Core/Src/stm32g4xx_hal_msp.c **** }
724 .loc 1 359 0
725 0008 7047 bx lr
726 .L70:
352:Core/Src/stm32g4xx_hal_msp.c ****
727 .loc 1 352 0
728 000a 0A21 movs r1, #10
729 000c 4FF09040 mov r0, #1207959552
730 .LVL29:
731 0010 FFF7FEBF b HAL_GPIO_DeInit
732 .LVL30:
733 .L72:
734 .align 2
735 .L71:
736 0014 00030140 .word 1073808128
737 .cfi_endproc
738 .LFE337:
740 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
741 .align 1
742 .p2align 2,,3
743 .global HAL_TIM_Base_MspInit
744 .syntax unified
745 .thumb
746 .thumb_func
747 .fpu fpv4-sp-d16
749 HAL_TIM_Base_MspInit:
750 .LFB338:
360:Core/Src/stm32g4xx_hal_msp.c ****
361:Core/Src/stm32g4xx_hal_msp.c **** /**
362:Core/Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP Initialization
363:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
364:Core/Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
365:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
366:Core/Src/stm32g4xx_hal_msp.c **** */
367:Core/Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
368:Core/Src/stm32g4xx_hal_msp.c **** {
751 .loc 1 368 0
752 .cfi_startproc
753 @ args = 0, pretend = 0, frame = 16
754 @ frame_needed = 0, uses_anonymous_args = 0
755 .LVL31:
756 0000 00B5 push {lr}
757 .LCFI21:
758 .cfi_def_cfa_offset 4
759 .cfi_offset 14, -4
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369:Core/Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM6)
760 .loc 1 369 0
761 0002 0368 ldr r3, [r0]
762 0004 1D4A ldr r2, .L81
763 0006 9342 cmp r3, r2
368:Core/Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM6)
764 .loc 1 368 0
765 0008 85B0 sub sp, sp, #20
766 .LCFI22:
767 .cfi_def_cfa_offset 24
768 .loc 1 369 0
769 000a 15D0 beq .L78
370:Core/Src/stm32g4xx_hal_msp.c **** {
371:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspInit 0 */
372:Core/Src/stm32g4xx_hal_msp.c ****
373:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM6_MspInit 0 */
374:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
375:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM6_CLK_ENABLE();
376:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspInit 1 */
377:Core/Src/stm32g4xx_hal_msp.c ****
378:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM6_MspInit 1 */
379:Core/Src/stm32g4xx_hal_msp.c **** }
380:Core/Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM7)
770 .loc 1 380 0
771 000c 1C4A ldr r2, .L81+4
772 000e 9342 cmp r3, r2
773 0010 1FD0 beq .L79
381:Core/Src/stm32g4xx_hal_msp.c **** {
382:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspInit 0 */
383:Core/Src/stm32g4xx_hal_msp.c ****
384:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM7_MspInit 0 */
385:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
386:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM7_CLK_ENABLE();
387:Core/Src/stm32g4xx_hal_msp.c **** /* TIM7 interrupt Init */
388:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
389:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM7_IRQn);
390:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspInit 1 */
391:Core/Src/stm32g4xx_hal_msp.c ****
392:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM7_MspInit 1 */
393:Core/Src/stm32g4xx_hal_msp.c **** }
394:Core/Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
774 .loc 1 394 0
775 0012 1C4A ldr r2, .L81+8
776 0014 9342 cmp r3, r2
777 0016 02D0 beq .L80
395:Core/Src/stm32g4xx_hal_msp.c **** {
396:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 0 */
397:Core/Src/stm32g4xx_hal_msp.c ****
398:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 0 */
399:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
400:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_ENABLE();
401:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
402:Core/Src/stm32g4xx_hal_msp.c ****
403:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspInit 1 */
404:Core/Src/stm32g4xx_hal_msp.c **** }
405:Core/Src/stm32g4xx_hal_msp.c ****
406:Core/Src/stm32g4xx_hal_msp.c **** }
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778 .loc 1 406 0
779 0018 05B0 add sp, sp, #20
780 .LCFI23:
781 .cfi_remember_state
782 .cfi_def_cfa_offset 4
783 @ sp needed
784 001a 5DF804FB ldr pc, [sp], #4
785 .L80:
786 .LCFI24:
787 .cfi_restore_state
788 .LBB19:
400:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspInit 1 */
789 .loc 1 400 0
790 001e 1A4B ldr r3, .L81+12
791 0020 1A6E ldr r2, [r3, #96]
792 0022 42F40052 orr r2, r2, #8192
793 0026 1A66 str r2, [r3, #96]
794 0028 1B6E ldr r3, [r3, #96]
795 002a 03F40053 and r3, r3, #8192
796 002e 0393 str r3, [sp, #12]
797 0030 039B ldr r3, [sp, #12]
798 .LBE19:
799 .loc 1 406 0
800 0032 05B0 add sp, sp, #20
801 .LCFI25:
802 .cfi_remember_state
803 .cfi_def_cfa_offset 4
804 @ sp needed
805 0034 5DF804FB ldr pc, [sp], #4
806 .L78:
807 .LCFI26:
808 .cfi_restore_state
809 .LBB20:
375:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspInit 1 */
810 .loc 1 375 0
811 0038 134B ldr r3, .L81+12
812 003a 9A6D ldr r2, [r3, #88]
813 003c 42F01002 orr r2, r2, #16
814 0040 9A65 str r2, [r3, #88]
815 0042 9B6D ldr r3, [r3, #88]
816 0044 03F01003 and r3, r3, #16
817 0048 0193 str r3, [sp, #4]
818 004a 019B ldr r3, [sp, #4]
819 .LBE20:
820 .loc 1 406 0
821 004c 05B0 add sp, sp, #20
822 .LCFI27:
823 .cfi_remember_state
824 .cfi_def_cfa_offset 4
825 @ sp needed
826 004e 5DF804FB ldr pc, [sp], #4
827 .L79:
828 .LCFI28:
829 .cfi_restore_state
830 .LBB21:
386:Core/Src/stm32g4xx_hal_msp.c **** /* TIM7 interrupt Init */
831 .loc 1 386 0
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832 0052 0D4B ldr r3, .L81+12
833 0054 9A6D ldr r2, [r3, #88]
834 0056 42F02002 orr r2, r2, #32
835 005a 9A65 str r2, [r3, #88]
836 005c 9B6D ldr r3, [r3, #88]
837 .LBE21:
388:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM7_IRQn);
838 .loc 1 388 0
839 005e 0022 movs r2, #0
840 .LBB22:
386:Core/Src/stm32g4xx_hal_msp.c **** /* TIM7 interrupt Init */
841 .loc 1 386 0
842 0060 03F02003 and r3, r3, #32
843 0064 0293 str r3, [sp, #8]
844 .LBE22:
388:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM7_IRQn);
845 .loc 1 388 0
846 0066 1146 mov r1, r2
847 0068 3720 movs r0, #55
848 .LVL32:
849 .LBB23:
386:Core/Src/stm32g4xx_hal_msp.c **** /* TIM7 interrupt Init */
850 .loc 1 386 0
851 006a 029B ldr r3, [sp, #8]
852 .LBE23:
388:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM7_IRQn);
853 .loc 1 388 0
854 006c FFF7FEFF bl HAL_NVIC_SetPriority
855 .LVL33:
389:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspInit 1 */
856 .loc 1 389 0
857 0070 3720 movs r0, #55
858 .loc 1 406 0
859 0072 05B0 add sp, sp, #20
860 .LCFI29:
861 .cfi_def_cfa_offset 4
862 @ sp needed
863 0074 5DF804EB ldr lr, [sp], #4
864 .LCFI30:
865 .cfi_restore 14
866 .cfi_def_cfa_offset 0
389:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspInit 1 */
867 .loc 1 389 0
868 0078 FFF7FEBF b HAL_NVIC_EnableIRQ
869 .LVL34:
870 .L82:
871 .align 2
872 .L81:
873 007c 00100040 .word 1073745920
874 0080 00140040 .word 1073746944
875 0084 00340140 .word 1073820672
876 0088 00100240 .word 1073876992
877 .cfi_endproc
878 .LFE338:
880 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
881 .align 1
882 .p2align 2,,3
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883 .global HAL_TIM_Base_MspDeInit
884 .syntax unified
885 .thumb
886 .thumb_func
887 .fpu fpv4-sp-d16
889 HAL_TIM_Base_MspDeInit:
890 .LFB339:
407:Core/Src/stm32g4xx_hal_msp.c ****
408:Core/Src/stm32g4xx_hal_msp.c **** /**
409:Core/Src/stm32g4xx_hal_msp.c **** * @brief TIM_Base MSP De-Initialization
410:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
411:Core/Src/stm32g4xx_hal_msp.c **** * @param htim_base: TIM_Base handle pointer
412:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
413:Core/Src/stm32g4xx_hal_msp.c **** */
414:Core/Src/stm32g4xx_hal_msp.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
415:Core/Src/stm32g4xx_hal_msp.c **** {
891 .loc 1 415 0
892 .cfi_startproc
893 @ args = 0, pretend = 0, frame = 0
894 @ frame_needed = 0, uses_anonymous_args = 0
895 @ link register save eliminated.
896 .LVL35:
416:Core/Src/stm32g4xx_hal_msp.c **** if(htim_base->Instance==TIM6)
897 .loc 1 416 0
898 0000 0368 ldr r3, [r0]
899 0002 104A ldr r2, .L90
900 0004 9342 cmp r3, r2
901 0006 0DD0 beq .L87
417:Core/Src/stm32g4xx_hal_msp.c **** {
418:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspDeInit 0 */
419:Core/Src/stm32g4xx_hal_msp.c ****
420:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM6_MspDeInit 0 */
421:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
422:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM6_CLK_DISABLE();
423:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspDeInit 1 */
424:Core/Src/stm32g4xx_hal_msp.c ****
425:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM6_MspDeInit 1 */
426:Core/Src/stm32g4xx_hal_msp.c **** }
427:Core/Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM7)
902 .loc 1 427 0
903 0008 0F4A ldr r2, .L90+4
904 000a 9342 cmp r3, r2
905 000c 11D0 beq .L88
428:Core/Src/stm32g4xx_hal_msp.c **** {
429:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspDeInit 0 */
430:Core/Src/stm32g4xx_hal_msp.c ****
431:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM7_MspDeInit 0 */
432:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
433:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM7_CLK_DISABLE();
434:Core/Src/stm32g4xx_hal_msp.c ****
435:Core/Src/stm32g4xx_hal_msp.c **** /* TIM7 interrupt DeInit */
436:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(TIM7_IRQn);
437:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspDeInit 1 */
438:Core/Src/stm32g4xx_hal_msp.c ****
439:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM7_MspDeInit 1 */
440:Core/Src/stm32g4xx_hal_msp.c **** }
441:Core/Src/stm32g4xx_hal_msp.c **** else if(htim_base->Instance==TIM8)
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906 .loc 1 441 0
907 000e 0F4A ldr r2, .L90+8
908 0010 9342 cmp r3, r2
909 0012 00D0 beq .L89
442:Core/Src/stm32g4xx_hal_msp.c **** {
443:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 0 */
444:Core/Src/stm32g4xx_hal_msp.c ****
445:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 0 */
446:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
447:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_TIM8_CLK_DISABLE();
448:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
449:Core/Src/stm32g4xx_hal_msp.c ****
450:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END TIM8_MspDeInit 1 */
451:Core/Src/stm32g4xx_hal_msp.c **** }
452:Core/Src/stm32g4xx_hal_msp.c ****
453:Core/Src/stm32g4xx_hal_msp.c **** }
910 .loc 1 453 0
911 0014 7047 bx lr
912 .L89:
447:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM8_MspDeInit 1 */
913 .loc 1 447 0
914 0016 02F55C42 add r2, r2, #56320
915 001a 136E ldr r3, [r2, #96]
916 001c 23F40053 bic r3, r3, #8192
917 0020 1366 str r3, [r2, #96]
918 .loc 1 453 0
919 0022 7047 bx lr
920 .L87:
422:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM6_MspDeInit 1 */
921 .loc 1 422 0
922 0024 02F50032 add r2, r2, #131072
923 0028 936D ldr r3, [r2, #88]
924 002a 23F01003 bic r3, r3, #16
925 002e 9365 str r3, [r2, #88]
926 0030 7047 bx lr
927 .L88:
433:Core/Src/stm32g4xx_hal_msp.c ****
928 .loc 1 433 0
929 0032 02F5FE32 add r2, r2, #130048
436:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspDeInit 1 */
930 .loc 1 436 0
931 0036 3720 movs r0, #55
932 .LVL36:
433:Core/Src/stm32g4xx_hal_msp.c ****
933 .loc 1 433 0
934 0038 936D ldr r3, [r2, #88]
935 003a 23F02003 bic r3, r3, #32
936 003e 9365 str r3, [r2, #88]
436:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN TIM7_MspDeInit 1 */
937 .loc 1 436 0
938 0040 FFF7FEBF b HAL_NVIC_DisableIRQ
939 .LVL37:
940 .L91:
941 .align 2
942 .L90:
943 0044 00100040 .word 1073745920
944 0048 00140040 .word 1073746944
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945 004c 00340140 .word 1073820672
946 .cfi_endproc
947 .LFE339:
949 .section .text.HAL_UART_MspInit,"ax",%progbits
950 .align 1
951 .p2align 2,,3
952 .global HAL_UART_MspInit
953 .syntax unified
954 .thumb
955 .thumb_func
956 .fpu fpv4-sp-d16
958 HAL_UART_MspInit:
959 .LFB340:
454:Core/Src/stm32g4xx_hal_msp.c ****
455:Core/Src/stm32g4xx_hal_msp.c **** /**
456:Core/Src/stm32g4xx_hal_msp.c **** * @brief UART MSP Initialization
457:Core/Src/stm32g4xx_hal_msp.c **** * This function configures the hardware resources used in this example
458:Core/Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
459:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
460:Core/Src/stm32g4xx_hal_msp.c **** */
461:Core/Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
462:Core/Src/stm32g4xx_hal_msp.c **** {
960 .loc 1 462 0
961 .cfi_startproc
962 @ args = 0, pretend = 0, frame = 32
963 @ frame_needed = 0, uses_anonymous_args = 0
964 .LVL38:
965 0000 70B5 push {r4, r5, r6, lr}
966 .LCFI31:
967 .cfi_def_cfa_offset 16
968 .cfi_offset 4, -16
969 .cfi_offset 5, -12
970 .cfi_offset 6, -8
971 .cfi_offset 14, -4
463:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
464:Core/Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1)
972 .loc 1 464 0
973 0002 0268 ldr r2, [r0]
974 0004 264B ldr r3, .L101
462:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
975 .loc 1 462 0
976 0006 88B0 sub sp, sp, #32
977 .LCFI32:
978 .cfi_def_cfa_offset 48
463:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
979 .loc 1 463 0
980 0008 0024 movs r4, #0
981 .loc 1 464 0
982 000a 9A42 cmp r2, r3
463:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
983 .loc 1 463 0
984 000c CDE90344 strd r4, r4, [sp, #12]
985 0010 CDE90544 strd r4, r4, [sp, #20]
986 0014 0794 str r4, [sp, #28]
987 .loc 1 464 0
988 0016 01D0 beq .L99
465:Core/Src/stm32g4xx_hal_msp.c **** {
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466:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 0 */
467:Core/Src/stm32g4xx_hal_msp.c ****
468:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 0 */
469:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock enable */
470:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_ENABLE();
471:Core/Src/stm32g4xx_hal_msp.c ****
472:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
473:Core/Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
474:Core/Src/stm32g4xx_hal_msp.c **** PA9 ------> USART1_TX
475:Core/Src/stm32g4xx_hal_msp.c **** PA10 ------> USART1_RX
476:Core/Src/stm32g4xx_hal_msp.c **** */
477:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
478:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
479:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
480:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
481:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
482:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
483:Core/Src/stm32g4xx_hal_msp.c ****
484:Core/Src/stm32g4xx_hal_msp.c **** /* USART1 DMA Init */
485:Core/Src/stm32g4xx_hal_msp.c **** /* USART1_TX Init */
486:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Instance = DMA1_Channel5;
487:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
488:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
489:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
490:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
491:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
492:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
493:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL;
494:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
495:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
496:Core/Src/stm32g4xx_hal_msp.c **** {
497:Core/Src/stm32g4xx_hal_msp.c **** Error_Handler();
498:Core/Src/stm32g4xx_hal_msp.c **** }
499:Core/Src/stm32g4xx_hal_msp.c ****
500:Core/Src/stm32g4xx_hal_msp.c **** __HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
501:Core/Src/stm32g4xx_hal_msp.c ****
502:Core/Src/stm32g4xx_hal_msp.c **** /* USART1 interrupt Init */
503:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
504:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn);
505:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */
506:Core/Src/stm32g4xx_hal_msp.c ****
507:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspInit 1 */
508:Core/Src/stm32g4xx_hal_msp.c **** }
509:Core/Src/stm32g4xx_hal_msp.c ****
510:Core/Src/stm32g4xx_hal_msp.c **** }
989 .loc 1 510 0
990 0018 08B0 add sp, sp, #32
991 .LCFI33:
992 .cfi_remember_state
993 .cfi_def_cfa_offset 16
994 @ sp needed
995 001a 70BD pop {r4, r5, r6, pc}
996 .L99:
997 .LCFI34:
998 .cfi_restore_state
999 .LBB24:
470:Core/Src/stm32g4xx_hal_msp.c ****
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ARM GAS /tmp/ccfcS0M8.s page 29
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1000 .loc 1 470 0
1001 001c 03F55843 add r3, r3, #55296
1002 .LBE24:
486:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
1003 .loc 1 486 0
1004 0020 204D ldr r5, .L101+4
1005 .LBB25:
470:Core/Src/stm32g4xx_hal_msp.c ****
1006 .loc 1 470 0
1007 0022 1A6E ldr r2, [r3, #96]
1008 0024 42F48042 orr r2, r2, #16384
1009 0028 1A66 str r2, [r3, #96]
1010 002a 1A6E ldr r2, [r3, #96]
1011 002c 02F48042 and r2, r2, #16384
1012 0030 0192 str r2, [sp, #4]
1013 0032 019A ldr r2, [sp, #4]
1014 .LBE25:
1015 .LBB26:
472:Core/Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1016 .loc 1 472 0
1017 0034 DA6C ldr r2, [r3, #76]
1018 0036 42F00102 orr r2, r2, #1
1019 003a DA64 str r2, [r3, #76]
1020 003c DB6C ldr r3, [r3, #76]
1021 003e 03F00103 and r3, r3, #1
1022 0042 0293 str r3, [sp, #8]
1023 .LBE26:
477:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1024 .loc 1 477 0
1025 0044 4FF4C063 mov r3, #1536
478:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1026 .loc 1 478 0
1027 0048 0222 movs r2, #2
482:Core/Src/stm32g4xx_hal_msp.c ****
1028 .loc 1 482 0
1029 004a 03A9 add r1, sp, #12
477:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
1030 .loc 1 477 0
1031 004c 0393 str r3, [sp, #12]
1032 004e 0646 mov r6, r0
481:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1033 .loc 1 481 0
1034 0050 0723 movs r3, #7
1035 .LBB27:
472:Core/Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
1036 .loc 1 472 0
1037 0052 0298 ldr r0, [sp, #8]
1038 .LVL39:
1039 .LBE27:
478:Core/Src/stm32g4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
1040 .loc 1 478 0
1041 0054 0492 str r2, [sp, #16]
482:Core/Src/stm32g4xx_hal_msp.c ****
1042 .loc 1 482 0
1043 0056 4FF09040 mov r0, #1207959552
481:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
1044 .loc 1 481 0
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1045 005a 0793 str r3, [sp, #28]
482:Core/Src/stm32g4xx_hal_msp.c ****
1046 .loc 1 482 0
1047 005c FFF7FEFF bl HAL_GPIO_Init
1048 .LVL40:
486:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
1049 .loc 1 486 0
1050 0060 1148 ldr r0, .L101+8
1051 0062 2860 str r0, [r5]
487:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
1052 .loc 1 487 0
1053 0064 1921 movs r1, #25
488:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
1054 .loc 1 488 0
1055 0066 1022 movs r2, #16
490:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
1056 .loc 1 490 0
1057 0068 8023 movs r3, #128
495:Core/Src/stm32g4xx_hal_msp.c **** {
1058 .loc 1 495 0
1059 006a 2846 mov r0, r5
489:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
1060 .loc 1 489 0
1061 006c EC60 str r4, [r5, #12]
492:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.Mode = DMA_NORMAL;
1062 .loc 1 492 0
1063 006e C5E90544 strd r4, r4, [r5, #20]
494:Core/Src/stm32g4xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
1064 .loc 1 494 0
1065 0072 C5E90744 strd r4, r4, [r5, #28]
488:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
1066 .loc 1 488 0
1067 0076 C5E90112 strd r1, r2, [r5, #4]
490:Core/Src/stm32g4xx_hal_msp.c **** hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
1068 .loc 1 490 0
1069 007a 2B61 str r3, [r5, #16]
495:Core/Src/stm32g4xx_hal_msp.c **** {
1070 .loc 1 495 0
1071 007c FFF7FEFF bl HAL_DMA_Init
1072 .LVL41:
1073 0080 58B9 cbnz r0, .L100
1074 .L94:
503:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn);
1075 .loc 1 503 0
1076 0082 0022 movs r2, #0
1077 0084 1146 mov r1, r2
500:Core/Src/stm32g4xx_hal_msp.c ****
1078 .loc 1 500 0
1079 0086 B567 str r5, [r6, #120]
503:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn);
1080 .loc 1 503 0
1081 0088 2520 movs r0, #37
500:Core/Src/stm32g4xx_hal_msp.c ****
1082 .loc 1 500 0
1083 008a AE62 str r6, [r5, #40]
503:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_EnableIRQ(USART1_IRQn);
1084 .loc 1 503 0
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1085 008c FFF7FEFF bl HAL_NVIC_SetPriority
1086 .LVL42:
504:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspInit 1 */
1087 .loc 1 504 0
1088 0090 2520 movs r0, #37
1089 0092 FFF7FEFF bl HAL_NVIC_EnableIRQ
1090 .LVL43:
1091 .loc 1 510 0
1092 0096 08B0 add sp, sp, #32
1093 .LCFI35:
1094 .cfi_remember_state
1095 .cfi_def_cfa_offset 16
1096 @ sp needed
1097 0098 70BD pop {r4, r5, r6, pc}
1098 .LVL44:
1099 .L100:
1100 .LCFI36:
1101 .cfi_restore_state
497:Core/Src/stm32g4xx_hal_msp.c **** }
1102 .loc 1 497 0
1103 009a FFF7FEFF bl Error_Handler
1104 .LVL45:
1105 009e F0E7 b .L94
1106 .L102:
1107 .align 2
1108 .L101:
1109 00a0 00380140 .word 1073821696
1110 00a4 00000000 .word hdma_usart1_tx
1111 00a8 58000240 .word 1073872984
1112 .cfi_endproc
1113 .LFE340:
1115 .section .text.HAL_UART_MspDeInit,"ax",%progbits
1116 .align 1
1117 .p2align 2,,3
1118 .global HAL_UART_MspDeInit
1119 .syntax unified
1120 .thumb
1121 .thumb_func
1122 .fpu fpv4-sp-d16
1124 HAL_UART_MspDeInit:
1125 .LFB341:
511:Core/Src/stm32g4xx_hal_msp.c ****
512:Core/Src/stm32g4xx_hal_msp.c **** /**
513:Core/Src/stm32g4xx_hal_msp.c **** * @brief UART MSP De-Initialization
514:Core/Src/stm32g4xx_hal_msp.c **** * This function freeze the hardware resources used in this example
515:Core/Src/stm32g4xx_hal_msp.c **** * @param huart: UART handle pointer
516:Core/Src/stm32g4xx_hal_msp.c **** * @retval None
517:Core/Src/stm32g4xx_hal_msp.c **** */
518:Core/Src/stm32g4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
519:Core/Src/stm32g4xx_hal_msp.c **** {
1126 .loc 1 519 0
1127 .cfi_startproc
1128 @ args = 0, pretend = 0, frame = 0
1129 @ frame_needed = 0, uses_anonymous_args = 0
1130 .LVL46:
520:Core/Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1)
1131 .loc 1 520 0
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1132 0000 0C4B ldr r3, .L109
1133 0002 0268 ldr r2, [r0]
1134 0004 9A42 cmp r2, r3
1135 0006 00D0 beq .L108
1136 0008 7047 bx lr
1137 .L108:
521:Core/Src/stm32g4xx_hal_msp.c **** {
522:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 0 */
523:Core/Src/stm32g4xx_hal_msp.c ****
524:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 0 */
525:Core/Src/stm32g4xx_hal_msp.c **** /* Peripheral clock disable */
526:Core/Src/stm32g4xx_hal_msp.c **** __HAL_RCC_USART1_CLK_DISABLE();
1138 .loc 1 526 0
1139 000a 0B4A ldr r2, .L109+4
519:Core/Src/stm32g4xx_hal_msp.c **** if(huart->Instance==USART1)
1140 .loc 1 519 0
1141 000c 10B5 push {r4, lr}
1142 .LCFI37:
1143 .cfi_def_cfa_offset 8
1144 .cfi_offset 4, -8
1145 .cfi_offset 14, -4
1146 .loc 1 526 0
1147 000e 136E ldr r3, [r2, #96]
1148 0010 0446 mov r4, r0
1149 0012 23F48043 bic r3, r3, #16384
1150 0016 1366 str r3, [r2, #96]
527:Core/Src/stm32g4xx_hal_msp.c ****
528:Core/Src/stm32g4xx_hal_msp.c **** /**USART1 GPIO Configuration
529:Core/Src/stm32g4xx_hal_msp.c **** PA9 ------> USART1_TX
530:Core/Src/stm32g4xx_hal_msp.c **** PA10 ------> USART1_RX
531:Core/Src/stm32g4xx_hal_msp.c **** */
532:Core/Src/stm32g4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
1151 .loc 1 532 0
1152 0018 4FF4C061 mov r1, #1536
1153 001c 4FF09040 mov r0, #1207959552
1154 .LVL47:
1155 0020 FFF7FEFF bl HAL_GPIO_DeInit
1156 .LVL48:
533:Core/Src/stm32g4xx_hal_msp.c ****
534:Core/Src/stm32g4xx_hal_msp.c **** /* USART1 DMA DeInit */
535:Core/Src/stm32g4xx_hal_msp.c **** HAL_DMA_DeInit(huart->hdmatx);
1157 .loc 1 535 0
1158 0024 A06F ldr r0, [r4, #120]
1159 0026 FFF7FEFF bl HAL_DMA_DeInit
1160 .LVL49:
536:Core/Src/stm32g4xx_hal_msp.c ****
537:Core/Src/stm32g4xx_hal_msp.c **** /* USART1 interrupt DeInit */
538:Core/Src/stm32g4xx_hal_msp.c **** HAL_NVIC_DisableIRQ(USART1_IRQn);
1161 .loc 1 538 0
1162 002a 2520 movs r0, #37
539:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */
540:Core/Src/stm32g4xx_hal_msp.c ****
541:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE END USART1_MspDeInit 1 */
542:Core/Src/stm32g4xx_hal_msp.c **** }
543:Core/Src/stm32g4xx_hal_msp.c ****
544:Core/Src/stm32g4xx_hal_msp.c **** }
1163 .loc 1 544 0
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1164 002c BDE81040 pop {r4, lr}
1165 .LCFI38:
1166 .cfi_restore 14
1167 .cfi_restore 4
1168 .cfi_def_cfa_offset 0
1169 .LVL50:
538:Core/Src/stm32g4xx_hal_msp.c **** /* USER CODE BEGIN USART1_MspDeInit 1 */
1170 .loc 1 538 0
1171 0030 FFF7FEBF b HAL_NVIC_DisableIRQ
1172 .LVL51:
1173 .L110:
1174 .align 2
1175 .L109:
1176 0034 00380140 .word 1073821696
1177 0038 00100240 .word 1073876992
1178 .cfi_endproc
1179 .LFE341:
1181 .text
1182 .Letext0:
1183 .file 2 "/usr/include/newlib/machine/_default_types.h"
1184 .file 3 "/usr/include/newlib/sys/_stdint.h"
1185 .file 4 "Drivers/CMSIS/Include/core_cm4.h"
1186 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h"
1187 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h"
1188 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h"
1189 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h"
1190 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h"
1191 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h"
1192 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h"
1193 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h"
1194 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h"
1195 .file 14 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h"
1196 .file 15 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h"
1197 .file 16 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h"
1198 .file 17 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h"
1199 .file 18 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h"
1200 .file 19 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h"
1201 .file 20 "Core/Inc/main.h"
1202 .file 21 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h"
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DEFINED SYMBOLS
*ABS*:0000000000000000 stm32g4xx_hal_msp.c
opamp
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/tmp/ccfcS0M8.s:16 .text.HAL_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:24 .text.HAL_MspInit:0000000000000000 HAL_MspInit
/tmp/ccfcS0M8.s:71 .text.HAL_MspInit:0000000000000030 $d
/tmp/ccfcS0M8.s:76 .text.HAL_ADC_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:84 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
/tmp/ccfcS0M8.s:192 .text.HAL_ADC_MspInit:0000000000000068 $d
/tmp/ccfcS0M8.s:198 .text.HAL_ADC_MspDeInit:0000000000000000 $t
/tmp/ccfcS0M8.s:206 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
/tmp/ccfcS0M8.s:236 .text.HAL_ADC_MspDeInit:000000000000001c $d
/tmp/ccfcS0M8.s:241 .text.HAL_CORDIC_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:249 .text.HAL_CORDIC_MspInit:0000000000000000 HAL_CORDIC_MspInit
/tmp/ccfcS0M8.s:291 .text.HAL_CORDIC_MspInit:000000000000002c $d
/tmp/ccfcS0M8.s:296 .text.HAL_CORDIC_MspDeInit:0000000000000000 $t
/tmp/ccfcS0M8.s:304 .text.HAL_CORDIC_MspDeInit:0000000000000000 HAL_CORDIC_MspDeInit
/tmp/ccfcS0M8.s:328 .text.HAL_CORDIC_MspDeInit:0000000000000014 $d
/tmp/ccfcS0M8.s:334 .text.HAL_DAC_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:342 .text.HAL_DAC_MspInit:0000000000000000 HAL_DAC_MspInit
/tmp/ccfcS0M8.s:535 .text.HAL_DAC_MspInit:00000000000000d4 $d
/tmp/ccfcS0M8.s:544 .text.HAL_DAC_MspDeInit:0000000000000000 $t
/tmp/ccfcS0M8.s:552 .text.HAL_DAC_MspDeInit:0000000000000000 HAL_DAC_MspDeInit
/tmp/ccfcS0M8.s:604 .text.HAL_DAC_MspDeInit:0000000000000034 $d
/tmp/ccfcS0M8.s:610 .text.HAL_OPAMP_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:618 .text.HAL_OPAMP_MspInit:0000000000000000 HAL_OPAMP_MspInit
/tmp/ccfcS0M8.s:698 .text.HAL_OPAMP_MspInit:000000000000004c $d
/tmp/ccfcS0M8.s:703 .text.HAL_OPAMP_MspDeInit:0000000000000000 $t
/tmp/ccfcS0M8.s:711 .text.HAL_OPAMP_MspDeInit:0000000000000000 HAL_OPAMP_MspDeInit
/tmp/ccfcS0M8.s:736 .text.HAL_OPAMP_MspDeInit:0000000000000014 $d
/tmp/ccfcS0M8.s:741 .text.HAL_TIM_Base_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:749 .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit
/tmp/ccfcS0M8.s:873 .text.HAL_TIM_Base_MspInit:000000000000007c $d
/tmp/ccfcS0M8.s:881 .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t
/tmp/ccfcS0M8.s:889 .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit
/tmp/ccfcS0M8.s:943 .text.HAL_TIM_Base_MspDeInit:0000000000000044 $d
/tmp/ccfcS0M8.s:950 .text.HAL_UART_MspInit:0000000000000000 $t
/tmp/ccfcS0M8.s:958 .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
/tmp/ccfcS0M8.s:1109 .text.HAL_UART_MspInit:00000000000000a0 $d
/tmp/ccfcS0M8.s:1116 .text.HAL_UART_MspDeInit:0000000000000000 $t
/tmp/ccfcS0M8.s:1124 .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
/tmp/ccfcS0M8.s:1176 .text.HAL_UART_MspDeInit:0000000000000034 $d
aggiunta cod
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UNDEFINED SYMBOLS
HAL_PWREx_DisableUCPDDeadBattery
HAL_DMA_Init
Error_Handler
hdma_adc1
HAL_DMA_DeInit
HAL_GPIO_Init
hdma_dac1_ch1
hdma_dac1_ch2
HAL_GPIO_DeInit
HAL_NVIC_SetPriority
HAL_NVIC_EnableIRQ
HAL_NVIC_DisableIRQ
hdma_usart1_tx
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