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nzasch
2021-07-02 22:19:04 +02:00
parent 4e96b2c1f0
commit 2c600301a2
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38
codice/Core/Inc/FIRFilterCode.h Normal file
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//---------------------------------------------------------------------------
#ifndef FIRFilterCodeH
#define FIRFilterCodeH
// #include "FFTCode.h" // For the definition of TWindowType
#include <stdbool.h>
//---------------------------------------------------------------------------
typedef enum {wtFIRSTWINDOW, wtNONE, wtKAISER, wtSINC, wtHANNING,
wtHAMMING, wtBLACKMAN, wtFLATTOP, wtBLACKMAN_HARRIS,
wtBLACKMAN_NUTTALL, wtNUTTALL, wtKAISER_BESSEL, wtTRAPEZOID,
wtGAUSS, wtSINE, wtTEST } TWindowType;
// TWindowType WindowType;
// typedef enum {FORWARD, INVERSE} TTransFormType;
#define MAX_NUMTAPS 256
#define M_2PI 6.28318530717958647692
#define NUM_FREQ_ERR_PTS 1000 // these are only used in the FIRFreqError function.
#define dNUM_FREQ_ERR_PTS 1000.0
typedef enum {firLPF, firHPF, firBPF, firNOTCH, firALLPASS, firNOT_FIR} TFIRPassTypes;
// TFIRPassTypes PassType;
void FilterWithFIR(double *FirCoeff, int NumTaps, double *Signal, double *FilteredSignal, int NumSigPts);
void FilterWithFIR2(double *FirCoeff, int NumTaps, double *Signal, double *FilteredSignal, int NumSigPts);
void RectWinFIR(double *FirCoeff, int NumTaps, TFIRPassTypes PassType, double OmegaC, double BW);
void WindowData(double *Data, int N, TWindowType WindowType, double Alpha, double Beta, bool UnityGain);
double Sinc(double x);
void FIRFreqError(double *Coeff, int NumTaps, int PassType, double *OmegaC, double *BW);
void FIRFilterWindow(double *FIRCoeff, int N, TWindowType WindowType, double Beta);
void AdjustDelay(double *FirCoeff, int NumTaps, double Delay);
double Goertzel(double *Samples, int N, double Omega);
double Bessel(double x);
#endif

148
codice/Core/Inc/bassofono.h Normal file
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#include <stdint.h>
#include <stdio.h>
#include <arm_math.h>
#include "main.h"
#include "rx.h"
#include "tx.h"
#define CLOCK (168000000UL)
// RX ADC
#define ADC_CLOCK (700000L) // (168000000/((47,5+12,5)*4)
#define OVERSAMPLING (2)
#define ADC_SAMPLE_RATE (ADC_CLOCK/OVERSAMPLING)
#define ADC_BUFFER_SIZE (1024)
#define SAMPLES_BUFFER_RATE (ADC_SAMPLE_RATE/ADC_BUFFER_SIZE)
// TX DAC
#define TX_DAC_SAMPLE_RATE (CLOCK/480)
#define TX_DAC_BUFFER_SIZE (1024)
#define TX_DAC_BUFFER_RATE (TX_DAC_SAMPLE_RATE/TX_DAC_BUFFER_SIZE)
// =========== HBF ==========
// #define MS_HBF_TAP_NUM (15)
// #define DECIMATION_FACTOR (ADC_BUFFER_SIZE/ST2_BUFFER_SIZE)
// #define DECIMATION_FACTOR_MASK (DECIMATION_FACTOR - 1)
/*
// 1° stadio
// decimazione del singolo stadio
#define MS_DECIMATION_FACTOR (2)
#define MS_DECIMATION_FACTOR_MASK (MS_DECIMATION_FACTOR - 1)
// ringbuf
#define MIXED_SAMPLES_RINGBUFFER_SIZE (64) // l'ultimo deve essere grande almeno come MS_HBF_TAP_NUM
#define MIXED_SAMPLES_RINGBUFFER_SIZE_MASK (MIXED_SAMPLES_RINGBUFFER_SIZE - 1)
#define MIXED_SAMPLES_2M_RINGBUFFER_SIZE (MIXED_SAMPLES_RINGBUFFER_SIZE / 2)
#define MIXED_SAMPLES_2M_RINGBUFFER_SIZE_MASK (MIXED_SAMPLES_2M_RINGBUFFER_SIZE - 1)
#define ST1_OUT_SAMPLE_RATE (ADC_SAMPLE_RATE/(MS_DECIMATION_FACTOR*2))
// 2° stadio
#define ST2_BUFFER_SIZE (256)
#define ST2_DECIMATION_FACTOR (4)
#define ST2_OUT_SAMPLE_RATE (ST1_OUT_SAMPLE_RATE/ST2_DECIMATION_FACTOR)
#define ST2_FILTER_BLOCK_SIZE (ST2_BUFFER_SIZE)
#define ST2_FILTER_TAP_NUM (128)
*/
/*
// =========== DEMOD ==========
// DAC_SAMPLE_RATE/((2^32)/(incremento)) = freq
// (2^32)/(DAC_SAMPLE_RATE/freq) = incremento
#define NCO2_INCREMENT (343597383L)
#define NCO2_FREQUENCY (DAC_SAMPLE_RATE/((0xFFFFFFFF)/NCO2_INCREMENT))
#define LF_BUFFER_SIZE (ST2_BUFFER_SIZE/ST2_DECIMATION_FACTOR)
// audio filter
#define AUDIO_FILTER_TAP_NUM 128
#define AUDIO_FILTER_FREQ_DEF (1350)
#define AUDIO_FILTER_FREQ_MAX (DAC_SAMPLE_RATE/2)
#define AUDIO_FILTER_BW_DEF (2000)
#define AUDIO_FILTER_BW_MAX (DAC_SAMPLE_RATE/2)
#define AUDIO_FILTER_BETA_DEF (16)
#define AUDIO_FILTER_BLOCK_SIZE LF_BUFFER_SIZE
*/
// statemask
/*
#define FREQUENCY_OFFSET 0
#define GAIN_OFFSET 1
#define VOLUME_OFFSET 2
#define FILTER_OFFSET 3
#define MODULATION_OFFSET 4
*/
#define MOD_DC 0
#define MOD_LSB 1
#define MOD_USB 2
#define MOD_AM 3
// === DAC ===
#define DAC_DIVISOR 7680
#define DAC_SAMPLE_RATE (CLOCK/DAC_DIVISOR)
// === UART ===
#define RX_CMD_RB_SIZE (32)
#define RX_CMD_RB_SIZE_MASK (RX_CMD_RB_SIZE - 1)
#define UART_TX_BUFFER_SIZE (512)
// ====== VARS ====================
// state
extern uint8_t receive, transmit;
extern q31_t nco1_increment;
extern uint32_t frequency;
extern int32_t modulation;
extern int32_t gain;
extern int32_t volume;
extern int32_t squelch;
extern int32_t mic_gain;
extern int32_t scan;
extern uint32_t audio_filter_freq, audio_filter_bw, audio_filter_beta;
extern uint16_t state_changed;
extern CORDIC_HandleTypeDef hcordic;
// uartz
extern char uart_rx_buf[2], rx_cmd_rb[RX_CMD_RB_SIZE];
extern uint8_t rx_cmd_rb_in_idx, rx_cmd_rb_out_idx;
// uart tx
extern char uart_tx_buf[UART_TX_BUFFER_SIZE];
extern uint16_t uart_tx_buf_in_idx;
// rx adc
extern uint16_t adc_buffer[ADC_BUFFER_SIZE];
// tx dac
extern q31_t tx_dac_buffer[2][TX_DAC_BUFFER_SIZE];
extern volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
extern q31_t if_I[LF_BUFFER_SIZE];
extern q31_t if_Q[LF_BUFFER_SIZE];
// RX DAC
extern uint8_t lf_buffer_toggle;
extern q31_t prefilter_lf_buffer[LF_BUFFER_SIZE];
extern q31_t lf_buffer[2][LF_BUFFER_SIZE];
// ======== FUNZIONI ========
int32_t set_nco1_freq(int32_t freq);
void set_filter(void);
void set_frequency(void);
void set_modulation(void);
void set_dummy (void);
uint8_t get_changed(uint8_t state);
// varie
uint16_t ringbuf_increment(uint8_t *index, uint8_t buff_size_mask);
q31_t sat_mult_q31(q31_t a, q31_t b);
// diag
void diag(void);

31
codice/Core/Inc/cordic-16bit.h Normal file
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//Cordic in 16 bit signed fixed point math
//Function is valid for arguments in range -pi/2 -- pi/2
//for values pi/2--pi: value = half_pi-(theta-half_pi) and similarly for values -pi---pi/2
//
// 1.0 = 16384
// 1/k = 0.6072529350088812561694
// pi = 3.1415926536897932384626
//Constants
#define cordic_1K 0x000026DD
#define half_pi 0x00006487
#define MUL 16384.000000
#define CORDIC_NTAB 16
int cordic_ctab [] = {0x00003243, 0x00001DAC, 0x00000FAD, 0x000007F5, 0x000003FE, 0x000001FF, 0x000000FF, 0x0000007F, 0x0000003F, 0x0000001F, 0x0000000F, 0x00000007, 0x00000003, 0x00000001, 0x00000000, 0x00000000, };
void cordic(int theta, int *s, int *c, int n)
{
int k, d, tx, ty, tz;
int x=cordic_1K,y=0,z=theta;
n = (n>CORDIC_NTAB) ? CORDIC_NTAB : n;
for (k=0; k<n; ++k)
{
d = z>>15;
//get sign. for other architectures, you might want to use the more portable version
//d = z>=0 ? 0 : -1;
tx = x - (((y>>k) ^ d) - d);
ty = y + (((x>>k) ^ d) - d);
tz = z - ((cordic_ctab[k] ^ d) - d);
x = tx; y = ty; z = tz;
}
*c = x; *s = y;
}

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codice/Core/Inc/interface.h Normal file
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#include <stdint.h>
// === Tosta CMDS ===
#define BT1P 'A'
#define BT1R 'a'
#define BT2P 'B'
#define BT2R 'b'
#define BT3P 'C'
#define BT3R 'c'
#define BT4P 'D'
#define BT4R 'd'
#define JSBP 'E'
#define JSBR 'e'
#define JSLP 'F'
#define JSLR 'f'
#define JSRP 'G'
#define JSRR 'g'
#define JSUP 'H'
#define JSUR 'h'
#define JSDP 'I'
#define JSDR 'i'
#define ENBP 'J'
#define ENBR 'j'
#define ENRH '+'
#define ENLH '-'
#define TYP_INT 0
#define TYP_FLOAT 1
#define TYP_ALPHA 2
#define TYP_LIST 3
/*
#define MOD_DC 0
#define MOD_LSB 1
#define MOD_USB 2
#define MOD_AM 3
*/
#define SAT 0
#define WRAP 1
/*
#define MENU_SELECT_FREQ 0
#define MENU_SELECT_VOL 1
#define MENU_SELECT_MODUL 2
#define MENU_SELECT_FILTER_F 3
#define MENU_SELECT_FILTER_BW 4
*/
// #define MENU_SELECT_DEFAULT MENU_SELECT_FREQ
// #define MENU_SELECT_EOM MENU_SELECT_FILTER_BW
#define MENU_NAME_ROW 0
#define MENU_NAME_COL 1
#define DISPLAY_BL_DIM 0
#define DISPLAY_ROWS 6
#define DISPLAY_COLS 14
#define DISPLAY_X_SIZE 48
#define DISPLAY_Y_SIZE 84
#define DISPLAY_STANDBY_TIMER 30000
// ==== MENU =======
typedef void (*menu_set_function)(void);
typedef void (*menu_print_function)(uint8_t a);
struct menu_item {
char name[14];
uint8_t type;
uint8_t size;
uint8_t row;
uint8_t col;
uint32_t step;
uint32_t min;
uint32_t max;
uint8_t wrap;
uint32_t *varptr;
menu_set_function set_function_ptr;
menu_print_function print_function_ptr;
};
extern uint8_t menu_mode, current_tab;
extern char modulation_list[4][4];
extern struct menu_item items[];
extern struct menu_item tabs[];
extern uint8_t menu_item_count;
extern uint8_t tabs_count;
// funcs
void encoder_increment(void);
void encoder_decrement(void);
void joystick_dx(void);
void joystick_sx(void);
void set_menu_mode(uint8_t mode);
void print_integer(uint8_t item_idx);
void print_modulation(uint8_t item_idx);
void print_bar(uint8_t item_idx);
void print_frequency(uint8_t item_idx);
char * valToStr(uint32_t val, char *buf, uint8_t bufSize, char sepChar);
uint8_t sat_subu8b(uint8_t x, uint8_t y);

79
codice/Core/Inc/main.h Normal file
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32g4xx_hal.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define T_SWDIO_Pin GPIO_PIN_13
#define T_SWDIO_GPIO_Port GPIOA
#define T_SWCLK_Pin GPIO_PIN_14
#define T_SWCLK_GPIO_Port GPIOA
#define T_SWO_Pin GPIO_PIN_3
#define T_SWO_GPIO_Port GPIOB
#define OUT_Pin GPIO_PIN_5
#define OUT_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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codice/Core/Inc/rx.h Normal file
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#ifndef __RX_H
#define __RX_H
#include <stdint.h>
#include <arm_math.h>
#define NCO2_INCREMENT (343597383L)
#define NCO2_FREQUENCY (DAC_SAMPLE_RATE/((0xFFFFFFFF)/NCO2_INCREMENT))
#define LF_BUFFER_SIZE (ST2_BUFFER_SIZE/ST2_DECIMATION_FACTOR)
// 1° stadio
// decimazione del singolo stadio
#define MS_HBF_TAP_NUM (15)
#define MS_DECIMATION_FACTOR (2)
#define MS_DECIMATION_FACTOR_MASK (MS_DECIMATION_FACTOR - 1)
// ringbuf
#define MIXED_SAMPLES_RINGBUFFER_SIZE (64) // l'ultimo deve essere grande almeno come MS_HBF_TAP_NUM
#define MIXED_SAMPLES_RINGBUFFER_SIZE_MASK (MIXED_SAMPLES_RINGBUFFER_SIZE - 1)
#define MIXED_SAMPLES_2M_RINGBUFFER_SIZE (MIXED_SAMPLES_RINGBUFFER_SIZE / 2)
#define MIXED_SAMPLES_2M_RINGBUFFER_SIZE_MASK (MIXED_SAMPLES_2M_RINGBUFFER_SIZE - 1)
#define ST1_OUT_SAMPLE_RATE (ADC_SAMPLE_RATE/(MS_DECIMATION_FACTOR*2))
// 2° stadio
#define ST2_BUFFER_SIZE (256)
#define ST2_DECIMATION_FACTOR (4)
#define ST2_OUT_SAMPLE_RATE (ST1_OUT_SAMPLE_RATE/ST2_DECIMATION_FACTOR)
#define ST2_FILTER_BLOCK_SIZE (ST2_BUFFER_SIZE)
#define ST2_FILTER_TAP_NUM (128)
// audio filter
#define AUDIO_FILTER_TAP_NUM 128
#define AUDIO_FILTER_FREQ_DEF (1350)
#define AUDIO_FILTER_FREQ_MAX (DAC_SAMPLE_RATE/2)
#define AUDIO_FILTER_BW_DEF (2000)
#define AUDIO_FILTER_BW_MAX (DAC_SAMPLE_RATE/2)
#define AUDIO_FILTER_BETA_DEF (16)
#define AUDIO_FILTER_BLOCK_SIZE LF_BUFFER_SIZE
extern int32_t rx_signal;
// filtro st2
extern arm_fir_decimate_instance_q31 st2_filter_I_struct;
extern arm_fir_decimate_instance_q31 st2_filter_Q_struct;
extern q31_t st2_filter_I_state[ST2_FILTER_BLOCK_SIZE + ST2_FILTER_TAP_NUM - 1];
extern q31_t st2_filter_Q_state[ST2_FILTER_BLOCK_SIZE + ST2_FILTER_TAP_NUM - 1];
extern int32_t st2_filter_taps[ST2_FILTER_TAP_NUM];
extern int32_t st2_wide_taps[ST2_FILTER_TAP_NUM];
// filtro audio
extern arm_fir_instance_q31 audio_filter_struct;
extern q31_t audio_filter_state[AUDIO_FILTER_BLOCK_SIZE + AUDIO_FILTER_TAP_NUM - 1];
extern int32_t audio_filter_coeffs[AUDIO_FILTER_TAP_NUM];
// mix
void rx_mixer(uint16_t *in, uint16_t size, q31_t *I_out, q31_t *Q_out, int32_t nco_freq);
// demodulatori
void ssb_demodulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out, q31_t nco_freq);
void dc_demodulator(q31_t *in, uint16_t size, q31_t *out);
void am_demodulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out);
// filtri
// void filter_init(void);
void st2_filter_init(void);
void audio_filter_init(void);
void audio_filter_generate_coeffs(int32_t *Coeffs, uint32_t freq, uint32_t bw, uint8_t beta);
q31_t hb_fir15(q31_t * samples_ringbuf, uint8_t sample_index, uint8_t buff_size_mask, q31_t * coefficients);
void rx_measure_signal(q31_t *samples, uint16_t size);
#endif

381
codice/Core/Inc/stm32g4xx_hal_conf.h Normal file
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/**
******************************************************************************
* @file stm32g4xx_hal_conf.h
* @author MCD Application Team
* @brief HAL configuration file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32G4xx_HAL_CONF_H
#define STM32G4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
/*#define HAL_COMP_MODULE_ENABLED */
#define HAL_CORDIC_MODULE_ENABLED
/*#define HAL_CRC_MODULE_ENABLED */
/*#define HAL_CRYP_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/*#define HAL_FDCAN_MODULE_ENABLED */
/*#define HAL_FMAC_MODULE_ENABLED */
/*#define HAL_HRTIM_MODULE_ENABLED */
/*#define HAL_IRDA_MODULE_ENABLED */
/*#define HAL_IWDG_MODULE_ENABLED */
/*#define HAL_I2C_MODULE_ENABLED */
/*#define HAL_I2S_MODULE_ENABLED */
/*#define HAL_LPTIM_MODULE_ENABLED */
/*#define HAL_NAND_MODULE_ENABLED */
/*#define HAL_NOR_MODULE_ENABLED */
#define HAL_OPAMP_MODULE_ENABLED
/*#define HAL_PCD_MODULE_ENABLED */
/*#define HAL_QSPI_MODULE_ENABLED */
/*#define HAL_RNG_MODULE_ENABLED */
/*#define HAL_RTC_MODULE_ENABLED */
/*#define HAL_SAI_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
/*#define HAL_SMBUS_MODULE_ENABLED */
/*#define HAL_SPI_MODULE_ENABLED */
/*#define HAL_SRAM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
/*#define HAL_WWDG_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_EXTI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
/* ########################## Register Callbacks selection ############################## */
/**
* @brief This is the list of modules where register callback can be used
*/
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U
#define USE_HAL_EXTI_REGISTER_CALLBACKS 0U
#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U
#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U
#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U
#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
#define USE_HAL_RNG_REGISTER_CALLBACKS 0U
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
#define USE_HAL_USART_REGISTER_CALLBACKS 0U
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (24000000UL) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE (16000000UL) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI48) value for USB FS and RNG.
* This internal oscillator is mainly dedicated to provide a high precision clock to
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
* which is subject to manufacturing process variations.
*/
#if !defined (HSI48_VALUE)
#define HSI48_VALUE (48000000UL) /*!< Value of the Internal High Speed oscillator for USB FS/RNG in Hz.
The real value my vary depending on manufacturing process variations.*/
#endif /* HSI48_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
/*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations in voltage and temperature.*/
#define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE (32768UL) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
#endif /* LSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for I2S and SAI peripherals
* This value is used by the I2S and SAI HAL modules to compute the I2S and SAI clock source
* frequency, this source is inserted directly through I2S_CKIN pad.
*/
#if !defined (EXTERNAL_CLOCK_VALUE)
#define EXTERNAL_CLOCK_VALUE (12288000UL) /*!< Value of the External oscillator in Hz*/
#endif /* EXTERNAL_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority (lowest by default) */
#define USE_RTOS 0U
#define PREFETCH_ENABLE 0U
#define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1U */
/* ################## SPI peripheral configuration ########################## */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
* Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
*/
#define USE_SPI_CRC 0U
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32g4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32g4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32g4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32g4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32g4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32g4xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CORDIC_MODULE_ENABLED
#include "stm32g4xx_hal_cordic.h"
#endif /* HAL_CORDIC_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32g4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32g4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32g4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_EXTI_MODULE_ENABLED
#include "stm32g4xx_hal_exti.h"
#endif /* HAL_EXTI_MODULE_ENABLED */
#ifdef HAL_FDCAN_MODULE_ENABLED
#include "stm32g4xx_hal_fdcan.h"
#endif /* HAL_FDCAN_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32g4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_FMAC_MODULE_ENABLED
#include "stm32g4xx_hal_fmac.h"
#endif /* HAL_FMAC_MODULE_ENABLED */
#ifdef HAL_HRTIM_MODULE_ENABLED
#include "stm32g4xx_hal_hrtim.h"
#endif /* HAL_HRTIM_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32g4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32g4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32g4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
#include "stm32g4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32g4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32g4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32g4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32g4xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32g4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32g4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32g4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32g4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32g4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32g4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32g4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32g4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32g4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32g4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32g4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32g4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32g4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32g4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t *file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* STM32G4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_it.h
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32G4xx_IT_H
#define __STM32G4xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
void DMA1_Channel2_IRQHandler(void);
void DMA1_Channel4_IRQHandler(void);
void DMA1_Channel5_IRQHandler(void);
void USART1_IRQHandler(void);
void TIM7_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
#ifdef __cplusplus
}
#endif
#endif /* __STM32G4xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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#ifndef __TX_H
#define __TX_H
#include <stdint.h>
#include <arm_math.h>
#define TX_AUDIO_FILTER_INTERPOLATION_FACTOR (16)
#define TX_AUDIO_FILTER_BLOCK_SIZE (1024)
#define TX_AUDIO_FILTER_TAP_NUM (128)
// buffer
extern volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
extern volatile uint8_t tx_adc_buffer_ready;
// filtro audio
extern arm_fir_instance_q31 tx_audio_filter_I_struct, tx_audio_filter_Q_struct;
extern q31_t tx_audio_filter_I_state[TX_AUDIO_FILTER_BLOCK_SIZE + TX_AUDIO_FILTER_TAP_NUM - 1];
extern q31_t tx_audio_filter_Q_state[TX_AUDIO_FILTER_BLOCK_SIZE + TX_AUDIO_FILTER_TAP_NUM - 1];
extern int32_t tx_audio_filter_coeffs[TX_AUDIO_FILTER_TAP_NUM];
// modulatori
void ssb_modulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out, q31_t nco_freq);
void dc_modulator(q31_t *in, uint16_t size, q31_t *out);
void am_modulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out);
#endif

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/*
By Daniel Klostermann
Iowa Hills Software, LLC IowaHills.com
If you find a problem, please leave a note at:
http://www.iowahills.com/feedbackcomments.html
May 1, 2016
ShowMessage is a C++ Builder function, and it usage has been commented out.
If you are using C++ Builder, include vcl.h for ShowMessage.
Otherwise replace ShowMessage with something appropriate for yor compiler.
RectWinFIR() generates the impulse response for a rectangular windowed low pass, high pass,
band pass, or notch filter. Then a window, such as the Kaiser, is applied to the FIR coefficients.
See the FilterKitMain.cpp file for an example on how to use this code.
double FirCoeff[MAXNUMTAPS];
int NumTaps; NumTaps can be even or odd and < MAXNUMTAPS
TPassTypeName PassType; PassType is defined in the header file. firLPF, firHPF, firBPF, firNOTCH, firALLPASS
double OmegaC 0.0 < OmegaC < 1.0 The corner freq, or center freq if BPF or NOTCH
double BW 0.0 < BW < 1.0 The band width if BPF or NOTCH
*/
// http://www.iowahills.com/Example%20Code/WindowedFIRFilterWebCode.txt
#include "FIRFilterCode.h"
#include <math.h>
// #include <new.h> // For the new operator.
#include <stdbool.h>
#include <stdlib.h>
// Rectangular Windowed FIR. The equations used here are developed in numerous textbooks.
void RectWinFIR(double *FirCoeff, int NumTaps, TFIRPassTypes PassType, double OmegaC, double BW){
int j;
double Arg, OmegaLow, OmegaHigh;
switch(PassType)
{
case firLPF: // Low Pass
for(j=0; j<NumTaps; j++)
{
Arg = (double)j - (double)(NumTaps-1) / 2.0;
FirCoeff[j] = OmegaC * Sinc(OmegaC * Arg * M_PI);
}
break;
case firHPF: // High Pass
if(NumTaps % 2 == 1) // Odd tap counts
{
for(j=0; j<NumTaps; j++)
{
Arg = (double)j - (double)(NumTaps-1) / 2.0;
FirCoeff[j] = Sinc(Arg * M_PI) - OmegaC * Sinc(OmegaC * Arg * M_PI);
}
}
else // Even tap counts
{
for(j=0; j<NumTaps; j++)
{
Arg = (double)j - (double)(NumTaps-1) / 2.0;
if(Arg == 0.0)FirCoeff[j] = 0.0;
else FirCoeff[j] = cos(OmegaC * Arg * M_PI) / M_PI / Arg + cos(Arg * M_PI);
}
}
break;
case firBPF: // Band Pass
OmegaLow = OmegaC - BW/2.0;
OmegaHigh = OmegaC + BW/2.0;
for(j=0; j<NumTaps; j++)
{
Arg = (double)j - (double)(NumTaps-1) / 2.0;
if(Arg == 0.0)FirCoeff[j] = 0.0;
else FirCoeff[j] = ( cos(OmegaLow * Arg * M_PI) - cos(OmegaHigh * Arg * M_PI) ) / M_PI / Arg ;
}
break;
case firNOTCH: // Notch, if NumTaps is even, the response at Pi is attenuated.
OmegaLow = OmegaC - BW/2.0;
OmegaHigh = OmegaC + BW/2.0;
for(j=0; j<NumTaps; j++)
{
Arg = (double)j - (double)(NumTaps-1) / 2.0;
FirCoeff[j] = Sinc(Arg * M_PI) - OmegaHigh * Sinc(OmegaHigh * Arg * M_PI) - OmegaLow * Sinc(OmegaLow * Arg * M_PI);
}
break;
case firALLPASS: // All Pass, this is trivial, but it shows how an fir all pass (delay) can be done.
for(j=0; j<NumTaps; j++)FirCoeff[j] = 0.0;
FirCoeff[(NumTaps-1) / 2] = 1.0;
break;
}
// Now use the FIRFilterWindow() function to reduce the sinc(x) effects.
}
//---------------------------------------------------------------------------
// This gets used in numerous places above.
// If using Visual C, this (and the header file declaration) may need to be commented out.
double Sinc(double x)
{
if(x > -1.0E-5 && x < 1.0E-5)return(1.0);
return(sin(x)/x);
}
// This gets used with the Kaiser window.
double Bessel(double x)
{
double Sum=0.0, XtoIpower;
int i, j, Factorial;
for(i=1; i<10; i++)
{
XtoIpower = pow(x/2.0, (double)i);
Factorial = 1;
for(j=1; j<=i; j++)Factorial *= j;
Sum += pow(XtoIpower / (double)Factorial, 2.0);
}
return(1.0 + Sum);
}
//---------------------------------------------------------------------------
// Used to reduce the sinc(x) effects on a set of FIR coefficients. This will, unfortunately,
// widen the filter's transition band, but the stop band attenuation will improve dramatically.
void FIRFilterWindow(double *FIRCoeff, int N, TWindowType WindowType, double Beta)
{
if(WindowType == wtNONE) return;
int j;
double dN, *WinCoeff;
if(Beta < 0.0)Beta = 0.0;
if(Beta > 10.0)Beta = 10.0;
// WinCoeff = new(std::nothrow) double[N+2];
WinCoeff = (double *) malloc(sizeof(double) * (N+2));
if(WinCoeff == NULL){
// ShowMessage("Failed to allocate memory in WindowData() ");
return;
}
// Calculate the window for N/2 points, then fold the window over (at the bottom).
dN = N + 1; // a double
if(WindowType == wtKAISER)
{
double Arg;
for(j=0; j<N; j++)
{
Arg = Beta * sqrt(1.0 - pow( ((double)(2*j+2) - dN) / dN, 2.0) );
WinCoeff[j] = Bessel(Arg) / Bessel(Beta);
}
}
else if(WindowType == wtSINC) // Lanczos
{
for(j=0; j<N; j++)WinCoeff[j] = Sinc((double)(2*j+1-N)/dN * M_PI );
for(j=0; j<N; j++)WinCoeff[j] = pow(WinCoeff[j], Beta);
}
else if(WindowType == wtSINE) // Hanning if Beta = 2
{
for(j=0; j<N/2; j++)WinCoeff[j] = sin((double)(j+1) * M_PI / dN);
for(j=0; j<N/2; j++)WinCoeff[j] = pow(WinCoeff[j], Beta);
}
else // Error.
{
// ShowMessage("Incorrect window type in WindowFFTData");
// delete[] WinCoeff;
free(WinCoeff);
return;
}
// Fold the coefficients over.
for(j=0; j<N/2; j++)WinCoeff[N-j-1] = WinCoeff[j];
// Apply the window to the FIR coefficients.
for(j=0; j<N; j++)FIRCoeff[j] *= WinCoeff[j];
// delete[] WinCoeff;
free(WinCoeff);
}
/*
//---------------------------------------------------------------------------
// This implements an FIR filter. The register shifts are done by rotating the indexes.
void FilterWithFIR(double *FirCoeff, int NumTaps, double *Signal, double *FilteredSignal, int NumSigPts)
{
int j, k, n, Top = 0;
double y, Reg[MAX_NUMTAPS];
for(j=0; j<NumTaps; j++)Reg[j] = 0.0;
for(j=0; j<NumSigPts; j++)
{
Reg[Top] = Signal[j];
y = 0.0;
n = 0;
// The FirCoeff index increases while the Reg index decreases.
for(k=Top; k>=0; k--)
{
y += FirCoeff[n++] * Reg[k];
}
for(k=NumTaps-1; k>Top; k--)
{
y += FirCoeff[n++] * Reg[k];
}
FilteredSignal[j] = y;
Top++;
if(Top >= NumTaps)Top = 0;
}
}
//---------------------------------------------------------------------------
// This code is equivalent to the code above. It uses register shifts, which makes it
// less efficient, but it is easier to follow (i.e. compare to a FIR flow chart).
void FilterWithFIR2(double *FirCoeff, int NumTaps, double *Signal, double *FilteredSignal, int NumSigPts)
{
int j, k;
double y, Reg[MAX_NUMTAPS];
for(j=0; j<NumTaps; j++)Reg[j] = 0.0; // Init the delay registers.
for(j=0; j<NumSigPts; j++)
{
// Shift the register values down and set Reg[0].
for(k=NumTaps; k>1; k--)Reg[k-1] = Reg[k-2];
Reg[0] = Signal[j];
y = 0.0;
for(k=0; k<NumTaps; k++)y += FirCoeff[k] * Reg[k];
FilteredSignal[j] = y;
}
}
*/
//---------------------------------------------------------------------------
// This function is used to correct the corner frequency values on FIR filters.
// We normally specify the 3 dB frequencies when specifing a filter. The Parks McClellan routine
// uses OmegaC and BW to set the 0 dB band edges, so its final OmegaC and BW values are not close
// to -3 dB. The Rectangular Windowed filters are better for high tap counts, but for low tap counts,
// their 3 dB frequencies are also well off the mark.
// To use this function, first calculate a set of FIR coefficients, then pass them here, along with
// OmegaC and BW. This calculates a corrected OmegaC for low and high pass filters. It calcultes a
// corrected BW for band pass and notch filters. Use these corrected values to recalculate the FIR filter.
// The Goertzel algorithm is used to calculate the filter's magnitude response at the single
// frequency defined in the loop. We start in the pass band and work out to the -20dB freq.
void FIRFreqError(double *Coeff, int NumTaps, int PassType, double *OmegaC, double *BW)
{
int j, J3dB, CenterJ;
double Omega, CorrectedOmega, CorrectedBW, Omega1, Omega2, Mag;
// In these loops, we break at -20 dB to ensure that large ripple is ignored.
if(PassType == firLPF)
{
J3dB = 10;
for(j=0; j<NUM_FREQ_ERR_PTS; j++)
{
Omega = (double)j / dNUM_FREQ_ERR_PTS;
Mag = Goertzel(Coeff, NumTaps, Omega);
if(Mag > 0.707)J3dB = j; // J3dB will be the last j where the response was > -3 dB
if(Mag < 0.1)break; // Stop when the response is down to -20 dB.
}
Omega = (double)J3dB / dNUM_FREQ_ERR_PTS;
}
else if(PassType == firHPF)
{
J3dB = NUM_FREQ_ERR_PTS - 10;
for(j=NUM_FREQ_ERR_PTS-1; j>=0; j--)
{
Omega = (double)j / dNUM_FREQ_ERR_PTS;
Mag = Goertzel(Coeff, NumTaps, Omega);
if(Mag > 0.707)J3dB = j; // J3dB will be the last j where the response was > -3 dB
if(Mag < 0.1)break; // Stop when the response is down to -20 dB.
}
Omega = (double)J3dB / dNUM_FREQ_ERR_PTS;
}
else if(PassType == firBPF)
{
CenterJ = (int)(dNUM_FREQ_ERR_PTS * *OmegaC);
J3dB = CenterJ;
for(j=CenterJ; j>=0; j--)
{
Omega = (double)j / dNUM_FREQ_ERR_PTS;
Mag = Goertzel(Coeff, NumTaps, Omega);
if(Mag > 0.707)J3dB = j;
if(Mag < 0.1)break;
}
Omega1 = (double)J3dB / dNUM_FREQ_ERR_PTS;
J3dB = CenterJ;
for(j=CenterJ; j<NUM_FREQ_ERR_PTS; j++)
{
Omega = (double)j / dNUM_FREQ_ERR_PTS;
Mag = Goertzel(Coeff, NumTaps, Omega);
if(Mag > 0.707)J3dB = j;
if(Mag < 0.1)break;
}
Omega2 = (double)J3dB / dNUM_FREQ_ERR_PTS;
}
// The code above starts in the pass band. This starts in the stop band.
else // PassType == firNOTCH
{
CenterJ = (int)(dNUM_FREQ_ERR_PTS * *OmegaC);
J3dB = CenterJ;
for(j=CenterJ; j>=0; j--)
{
Omega = (double)j / dNUM_FREQ_ERR_PTS;
Mag = Goertzel(Coeff, NumTaps, Omega);
if(Mag <= 0.707)J3dB = j;
if(Mag > 0.99)break;
}
Omega1 = (double)J3dB/dNUM_FREQ_ERR_PTS;
J3dB = CenterJ;
for(j=CenterJ; j<NUM_FREQ_ERR_PTS; j++)
{
Omega = (double)j / dNUM_FREQ_ERR_PTS;
Mag = Goertzel(Coeff, NumTaps, Omega);
if(Mag <= 0.707)J3dB = j;
if(Mag > 0.99)break;
}
Omega2 = (double)J3dB / dNUM_FREQ_ERR_PTS;
}
// This calculates the corrected OmegaC and BW and error checks the values.
if(PassType == firLPF || PassType == firHPF )
{
CorrectedOmega = *OmegaC * 2.0 - Omega; // This is usually OK.
if(CorrectedOmega < 0.001)CorrectedOmega = 0.001;
if(CorrectedOmega > 0.99)CorrectedOmega = 0.99;
*OmegaC = CorrectedOmega;
}
else // PassType == firBPF || PassType == firNOTCH
{
CorrectedBW = *BW * 2.0 - (Omega2 - Omega1); // This routinely goes neg with Notch.
if(CorrectedBW < 0.01)CorrectedBW = 0.01;
if(CorrectedBW > *BW * 2.0)CorrectedBW = *BW * 2.0;
if(CorrectedBW > 0.98)CorrectedBW = 0.98;
*BW = CorrectedBW;
}
}
/*
//-----------------------------------------------------------------------------
// This shows how to adjust the delay of an FIR by a fractional amount.
// We take the FFT of the FIR coefficients to get to the frequency domain,
// then apply the Laplace delay operator, and then do an inverse FFT.
// Use this function last. i.e. After the window was applied to the coefficients.
// The Delay value is in terms of a fraction of a sample (not in terms of sampling freq).
// Delay may be pos or neg. Typically a filter's delay can be adjusted by +/- NumTaps/20
// without affecting its performance significantly. A typical Delay value would be 0.75
void AdjustDelay(double *FirCoeff, int NumTaps, double Delay)
{
int j, FFTSize;
double *FFTInputR, *FFTInputI, Arg, Temp;
FFTSize = RequiredFFTSize(NumTaps+(int)fabs(Delay)+1); // Zero pad by at least Delay + 1 to prevent the impulse response from wrapping around.
FFTInputR = new(std::nothrow) double[FFTSize]; // Real part
FFTInputI = new(std::nothrow) double[FFTSize]; // Imag part
if(FFTInputR == NULL || FFTInputI == NULL)
{
//ShowMessage("Unable to allocate memory in AdjustDelay");
return;
}
for(j=0; j<FFTSize; j++)FFTInputR[j] = FFTInputI[j] = 0.0; // A mandatory init.
for(j=0; j<NumTaps; j++)FFTInputR[j] = FirCoeff[j]; // Fill the real part with the FIR coeff.
FFT(FFTInputR, FFTInputI, FFTSize, FORWARD); // Do an FFT
for(j=0; j<=FFTSize/2; j++) // Apply the Laplace Delay operator e^(-j*omega*Delay).
{
Arg = -Delay * (double)j / (double)FFTSize * M_2PI; // This is -Delay * (the FFT bin frequency).
Temp = cos(Arg)*FFTInputR[j] - sin(Arg)*FFTInputI[j];
FFTInputI[j] = cos(Arg)*FFTInputI[j] + sin(Arg)*FFTInputR[j];
FFTInputR[j] = Temp;
}
for(j=1; j<FFTSize/2; j++) // Fill the neg freq bins with the conjugate values.
{
FFTInputR[FFTSize-j] = FFTInputR[j];
FFTInputI[FFTSize-j] = -FFTInputI[j];
}
FFT(FFTInputR, FFTInputI, FFTSize, INVERSE); // Inverse FFT
for(j=0; j<NumTaps; j++)
{
FirCoeff[j] = FFTInputR[j];
}
delete[] FFTInputR;
delete[] FFTInputI;
}
//-----------------------------------------------------------------------------
*/
//---------------------------------------------------------------------------
// Goertzel is essentially a single frequency DFT, but without phase information.
// Its simplicity allows it to run about 3 times faster than a single frequency DFT.
// It is typically used to find a tone embedded in a signal. A DTMF tone for example.
// 256 pts in 6 us
double Goertzel(double *Samples, int N, double Omega)
{
int j;
double Reg0, Reg1, Reg2; // 3 shift registers
double CosVal, Mag;
Reg1 = Reg2 = 0.0;
CosVal = 2.0 * cos(M_PI * Omega );
for (j=0; j<N; j++)
{
Reg0 = Samples[j] + CosVal * Reg1 - Reg2;
Reg2 = Reg1; // Shift the values.
Reg1 = Reg0;
}
Mag = Reg2 * Reg2 + Reg1 * Reg1 - CosVal * Reg1 * Reg2;
if(Mag > 0.0)Mag = sqrt(Mag);
else Mag = 1.0E-12;
return(Mag);
}

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/*
"THE CHINOTTO-WARE LICENSE" (Revision 42):
IZ4KLL a.k.a. cesco@ventuordici.org wrote this code.
As long as you retain this notice you can do whatever you want with this stuff.
I reserve the right to do the absolute minimum provided by law, up to and including absolutely nothing.
If we meet some day, and you think this stuff is worth it, you can buy me a chinotto in return.
*/
#include <stdint.h>
#include "bassofono.h"
#include "tx.h"
#include "rx.h"
#include "interface.h"
#include "main.h"
#include "FIRFilterCode.h"
#include <arm_math.h>
#include <stm32g4xx_ll_cordic.h>
/*
BASSOFONO .-.
(___________________________()6 `-,
( ______________________ /''"`
//\\ //\\
"" "" "" ""
~~~~ ricetrasmettitore basso ~~~~
Ricetrasmettittore multimodo per
onde lunghe e lunghissime.
*/
// state
uint8_t receive, transmit;
uint32_t frequency;
int32_t modulation;
int32_t gain;
int32_t volume;
int32_t squelch;
int32_t mic_gain;
int32_t scan;
q31_t nco1_increment;
uint32_t audio_filter_freq, audio_filter_bw, audio_filter_beta;
// maschera, ogni bit uno stato
uint16_t state_changed;
// uart rx
char uart_rx_buf[2], rx_cmd_rb[RX_CMD_RB_SIZE];
uint8_t rx_cmd_rb_in_idx, rx_cmd_rb_out_idx;
// uart tx
char uart_tx_buf[UART_TX_BUFFER_SIZE];
uint16_t uart_tx_buf_in_idx;
// bufffah
uint16_t adc_buffer[ADC_BUFFER_SIZE];
q31_t if_I[LF_BUFFER_SIZE];
q31_t if_Q[LF_BUFFER_SIZE];
// RX
uint8_t lf_buffer_toggle;
q31_t prefilter_lf_buffer[LF_BUFFER_SIZE];
q31_t lf_buffer[2][LF_BUFFER_SIZE];
// TX
volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
q31_t tx_dac_buffer[2][TX_DAC_BUFFER_SIZE];
// ============
int32_t set_nco1_freq(int32_t freq){
int64_t tmp_increment;
if(modulation == MOD_USB) freq += (NCO2_FREQUENCY);
else if(modulation == MOD_LSB) freq -= (NCO2_FREQUENCY);
tmp_increment = ((int64_t)freq * 0x100000000LL)/ADC_SAMPLE_RATE;
return (int32_t)tmp_increment;
}
inline uint16_t ringbuf_increment(uint8_t *index, uint8_t buff_size_mask) {
(*index)++;
*index &= buff_size_mask;
return *index;
}
q31_t sat_mult_q31(q31_t a, q31_t b){
q31_t out;
out = ((q63_t) a * b) >> 32;
out = __SSAT(out, 31);
return out << 1U;
}
// uart
void enqueue_cmd(char in){
rx_cmd_rb[rx_cmd_rb_in_idx] = in;
ringbuf_increment(&rx_cmd_rb_in_idx, RX_CMD_RB_SIZE_MASK);
}
void dequeue_cmd(void){
decode_cmd(rx_cmd_rb[rx_cmd_rb_out_idx]);
ringbuf_increment(&rx_cmd_rb_out_idx, RX_CMD_RB_SIZE_MASK);
}
void enqueue_tx(char * data, uint16_t len){
for( uint8_t index = 0; index < len; index++){
uart_tx_buf[uart_tx_buf_in_idx] = data[index];
uart_tx_buf_in_idx++;
if(uart_tx_buf_in_idx == UART_TX_BUFFER_SIZE) break;
}
}
// state changes
void set_frequency(void){
nco1_increment = set_nco1_freq(frequency);
}
void set_filter(void){
audio_filter_generate_coeffs(audio_filter_coeffs, audio_filter_freq, audio_filter_bw, audio_filter_beta);
}
void set_modulation(void){
st2_filter_init();
// cambia offset
nco1_increment = set_nco1_freq(frequency);
}
void set_dummy(void){
// non fare NULLAH
}
void set_changed(uint8_t state){
state_changed |= (1U<<state);
}
void reset_changed(uint8_t state){
state_changed &= ~(1U<<state);
}
uint8_t get_changed(uint8_t state){
return (state_changed >> state) & 1U;
}
void state_set_default(void){
modulation = MOD_USB;
frequency = 129000;
nco1_increment = set_nco1_freq(frequency);
gain = 4;
volume = 16;
audio_filter_freq = AUDIO_FILTER_FREQ_DEF;
audio_filter_bw = AUDIO_FILTER_BW_DEF;
audio_filter_beta = AUDIO_FILTER_BETA_DEF;
audio_filter_generate_coeffs(audio_filter_coeffs, audio_filter_freq, audio_filter_bw, audio_filter_beta);
state_changed = 0xFFFF;
}
// diag
void diag(void){
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"ADC sample rate: %d\nADC oversampling: %d\n", ADC_SAMPLE_RATE, OVERSAMPLING);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"ADC buffer size: %d\n1st decimation factor: %d\n", ADC_BUFFER_SIZE, MS_DECIMATION_FACTOR * 2);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"1st out sample rate: %d\n", ST1_OUT_SAMPLE_RATE);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"2st buffer size: %d\n2st decimation factor: %d\n", ST2_BUFFER_SIZE, ST2_DECIMATION_FACTOR * 2);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"2st out sample rate: %d\n", ST2_OUT_SAMPLE_RATE);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"in gain %d\n", gain);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"af gain %d\n", volume);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"nco1 inc %d\n", nco1_increment);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"nco2 inc %d\n", NCO2_INCREMENT);
uart_tx_buf_in_idx += sprintf(uart_tx_buf,"audio filter f %d bw %d\n", audio_filter_freq, audio_filter_bw);
}

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#include "interface.h"
#include "bassofono.h"
#include <stdint.h>
uint8_t menu_mode, current_tab;
/*
typedef void (*menu_set_function)(void);
typedef void (*menu_print_function)(uint8_t a);
struct menu_item {
char name[14];
uint8_t type;
uint8_t size;
uint8_t row;
uint8_t col;
uint32_t step;
uint32_t min;
uint32_t max;
uint8_t wrap;
uint32_t *varptr;
menu_set_function set_function_ptr;
menu_print_function print_function_ptr;
};
*/
// name, type, size,row,col,step, min, max, wrap *varptr, set_function_ptr print_function_ptr
struct menu_item items[] = {
{" Frequency", TYP_INT, 11, 1, 0, 100, 1000, 175000, WRAP, &frequency, &set_frequency, &print_frequency},
{" Volume ", TYP_INT, 2, 2, 0, 1, 0, 32, SAT, &volume, &set_dummy, &print_integer},
{" Modulation", TYP_INT, 3, 2, 4, 1, 0, 3, WRAP, &modulation, &set_modulation,&print_modulation},
{" Squelch ", TYP_INT, 3, 2, 9, 1, 0, 32, SAT, &squelch, &set_dummy, &print_integer},
{" Filter CF ", TYP_INT, 4, 3, 0, 100, 100, 3500, SAT, &audio_filter_freq, &set_filter, &print_integer},
{" Filter BW ", TYP_INT, 4, 3, 5, 100, 100, 2500, SAT, &audio_filter_bw, &set_filter, &print_integer},
{" Filter Q ", TYP_INT, 2, 3, 10, 1, 1, 32, SAT, &audio_filter_beta, &set_filter, &print_integer},
{" Signal ", TYP_INT, 5, 10, 0, 1, 1, 32, SAT, &rx_signal, &set_dummy, &print_bar},
};
struct menu_item tabs[] = {
{"SCN", TYP_INT, 3, 0, 0, 1, 0, 3, WRAP, &scan, &set_dummy, &print_integer},
};
uint8_t menu_item_count = sizeof(items)/sizeof(items[0]);
uint8_t tabs_count = sizeof(tabs)/sizeof(tabs[0]);
char modulation_list[][4] = {
[MOD_DC] = "DC",
[MOD_LSB] = "LSB",
[MOD_USB] = "USB",
[MOD_AM] = "AM"
};
uint8_t modulation_list_count = sizeof(modulation_list)/sizeof(modulation_list[0]);
void decode_cmd(char cmd){
switch(cmd){
case ENRH:
encoder_increment();
break;
case ENLH:
encoder_decrement();
break;
case JSRP:
joystick_dx();
break;
case JSLP:
joystick_sx();
break;
case JSUP:
joystick_up();
break;
case JSDP:
joystick_down();
break;
case JSBP:
joystick_button();
break;
case BT1P:
tab_up(0);
break;
case BT2P:
tab_up(1);
break;
case BT3P:
tab_up(2);
break;
case BT4P:
tab_up(3);
break;
case BT1R:
tab_down(0);
break;
case BT2R:
tab_down(1);
break;
case BT3R:
tab_down(2);
break;
case BT4R:
tab_down(3);
break;
}
}
void encoder_increment(void){
integer_editor_up(menu_mode);
items[menu_mode].set_function_ptr();
}
void encoder_decrement(void){
integer_editor_down(menu_mode);
items[menu_mode].set_function_ptr();
}
void joystick_dx(void){
step_down(menu_mode);
}
void joystick_sx(void){
step_up(menu_mode);
}
void joystick_down(void){
menu_mode_up();
}
void joystick_up(void){
menu_mode_down();
}
void joystick_button(void){
}
void menu_mode_up(void){
set_changed(menu_mode); // pulisci vecchio
menu_mode++;
if(menu_mode >= menu_item_count) menu_mode = 0;
set_changed(menu_mode); // cursore nel nuovo
// nome
display_update_mode();
}
void menu_mode_down(void){
set_changed(menu_mode); // pulisci vecchio
menu_mode--;
if(menu_mode >= menu_item_count) menu_mode = menu_item_count - 1;
set_changed(menu_mode); // nuovo
display_update_mode();
}
void step_up(uint8_t mode){
if((items[mode].step * 10) < items[mode].max) items[mode].step *= 10;
}
void step_down(uint8_t mode){
if(items[mode].step >= 10) items[mode].step /= 10;
}
void interface_set_default(void){
menu_mode = 0;
display_update_mode();
}
void display_set_position(uint8_t row, uint8_t col){
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%d,%dz", col, row);
}
void display_print_string(uint8_t row, uint8_t col, char * string){
display_set_position(row,col);
enqueue_tx(string, strlen(string));
}
/*
void display_draw_bar(uint8_t char_size, uint8_t value){
// display_set_position(row,col);
uint8_t i;
uint8_t cols, cols_tmp;
cols = (value * char_size * 6)/255;
char buf[char_size];
for( i = 0; i < char_size; i++){
if(cols >= 6){
buf[i] = 133;
} else if (cols > 0){
buf[i] = 128 + cols;
} else {
buf[i] = 32;
}
cols = sat_subu8b(cols, 6);
}
enqueue_tx(buf, char_size);
}
*/
void display_draw_dual_bar(char * string, uint8_t value1, uint8_t value2){
uint8_t cols;
char buf[84];
for( cols = 0; cols < DISPLAY_Y_SIZE; cols++){
if(cols < value1) buf[cols] |= 0xF;
if(cols < value2) buf[cols] |= 0xF0;
}
enqueue_tx(buf, DISPLAY_Y_SIZE);
}
void display_update_mode(void){
display_set_position(MENU_NAME_ROW,MENU_NAME_COL);
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%d %-12s", menu_mode, items[menu_mode].name);
}
void display_update_state(void){
uint8_t var;
for(uint8_t item_idx = 0; item_idx < (menu_item_count); item_idx++){
if(get_changed(item_idx)){
display_set_position(items[item_idx].row,items[item_idx].col);
if(item_idx == menu_mode) uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx, ">");
else {
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx, " ");
}
if(items[item_idx].type == TYP_INT) items[item_idx].print_function_ptr(item_idx);
// if(items[item_idx].type == TYP_INT) uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%0*ld", items[item_idx].size, * items[item_idx].varptr);
// if(items[item_idx].type == TYP_LIST) uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%*s", items[item_idx].size, &items[item_idx].mapptr[* items[item_idx].varptr]);
// display_draw_bar(14, 4, 0, volume * 2);
reset_changed(item_idx);
}
}
}
void integer_editor_up(uint8_t mode){
* items[mode].varptr += items[mode].step;
if((* items[mode].varptr < items[mode].min) || (* items[mode].varptr > items[mode].max)){
if(items[mode].wrap){
* items[mode].varptr = items[mode].min;
}
else{
* items[mode].varptr = items[mode].max;
}
}
set_changed(mode);
}
void integer_editor_down(uint8_t mode){
* items[mode].varptr -= items[mode].step;
if((* items[mode].varptr < items[mode].min) || (* items[mode].varptr > items[mode].max)){
if(items[mode].wrap){
* items[mode].varptr = items[mode].max;
}
else{
* items[mode].varptr = items[mode].min;
}
}
set_changed(mode);
}
void list_editor_down(uint8_t mode){
}
void tabs_update(void){
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\a");
}
void tab_up(uint8_t tab){
switch(tab){
case 0:
stop_receive();
start_transmit();
break;
}
}
void tab_down(uint8_t tab){
switch(tab){
case 0:
stop_transmit();
start_receive();
break;
}
}
void display_init(void){
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[128,255,0,0,0,0,0c");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[129,255,255,0,0,0,0c");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[130,255,255,255,0,0,0c");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[131,255,255,255,255,0,0c");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[132,255,255,255,255,255,0c");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[133,255,255,255,255,255,255c");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%ds",DISPLAY_STANDBY_TIMER);
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[200,100q");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%db",DISPLAY_BL_DIM);
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\a");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\f");
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\f");
}
// menu prints
void print_integer(uint8_t item_idx){
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%*ld", items[item_idx].size, * items[item_idx].varptr);
}
void print_modulation(uint8_t item_idx){
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%*s", items[item_idx].size, modulation_list[*items[item_idx].varptr]);
}
void print_bar(uint8_t item_idx){
// uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%0*ld", items[item_idx].size, * items[item_idx].varptr);
// display_draw_bar(items[item_idx].size, * items[item_idx].varptr);
uint8_t i;
uint8_t cols, cols_tmp;
// cols = *items[item_idx].varptr / (2147483648 / (items[item_idx].size * 6));
cols = *items[item_idx].varptr;
char buf[items[item_idx].size];
for( i = 0; i < items[item_idx].size; i++){
if(cols >= 6){
buf[i] = 133;
} else if (cols > 0){
buf[i] = 128 + cols;
} else {
buf[i] = 32;
}
cols = sat_subu8b(cols, 6);
}
enqueue_tx(buf, items[item_idx].size);
}
void print_frequency(uint8_t item_idx){
char bufin[14];
char bufout[14];
uint8_t i, j;
j = 0;
sprintf(bufin,"%8ld", * items[item_idx].varptr);
for(i=0; bufin[i] != '\0'; i++){
if((((strlen(bufin)-i)%3)==0) && (i != 0)) {
if(bufin[i-1] == ' '){
bufout[j] = ' ';
} else {
bufout[j] = '.';
}
j++;
}
bufout[j] = bufin[i];
j++;
}
bufout[j] = '\0';
uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"%s", bufout);
}
void scan_do(uint8_t scan_state){
static uint8_t scan_timer;
frequency += items[0].step * scan_state;
set_frequency();
set_changed(0);
}
uint8_t sat_subu8b(uint8_t x, uint8_t y){
uint8_t res = x - y;
res &= -(res <= x);
return res;
}

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Title: license
"THE CHINOTTO-WARE LICENSE" (Revision 42):
IZ4KLL a.k.a. cesco@ventuordici.org wrote this code.
As long as you retain this notice you can do whatever you want with this stuff.
I reserve the right to do the absolute minimum provided by law, up to and including absolutely nothing.
If we meet some day, and you think this stuff is worth it, you can buy me a chinotto in return.

844
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdio.h>
#include "bassofono.h"
#include "interface.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
ADC_HandleTypeDef hadc1;
DMA_HandleTypeDef hdma_adc1;
CORDIC_HandleTypeDef hcordic;
DAC_HandleTypeDef hdac1;
DMA_HandleTypeDef hdma_dac1_ch1;
DMA_HandleTypeDef hdma_dac1_ch2;
OPAMP_HandleTypeDef hopamp1;
TIM_HandleTypeDef htim6;
TIM_HandleTypeDef htim7;
TIM_HandleTypeDef htim8;
UART_HandleTypeDef huart1;
DMA_HandleTypeDef hdma_usart1_tx;
/* USER CODE BEGIN PV */
volatile uint8_t tick;
// RX
volatile uint8_t rx_adc_buffer_ready, half_rx_dac_buffer_empty;
// TX
// volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_DMA_Init(void);
static void MX_DAC1_Init(void);
static void MX_ADC1_Init(void);
static void MX_TIM7_Init(void);
static void MX_TIM6_Init(void);
static void MX_CORDIC_Init(void);
static void MX_USART1_UART_Init(void);
static void MX_TIM8_Init(void);
static void MX_OPAMP1_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
// IRQ
// ADC
void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc){
if(hadc->Instance == ADC1){
rx_adc_buffer_ready = 1;
}
}
// DAC
// rx
void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) {
lf_buffer_toggle = 0;
half_rx_dac_buffer_empty = 1;
}
void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) {
lf_buffer_toggle = 1;
half_rx_dac_buffer_empty = 1;
}
// tx
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
HAL_GPIO_TogglePin(OUT_GPIO_Port, OUT_Pin);
tx_dac_buffer_toggle = 0;
half_tx_dac_buffer_empty = 1;
}
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
HAL_GPIO_TogglePin(OUT_GPIO_Port, OUT_Pin);
tx_dac_buffer_toggle = 1;
half_tx_dac_buffer_empty = 1;
}
/*
void HAL_DAC_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
tx_dac_buffer_toggle = 0;
half_tx_dac_buffer_empty = 1;
}
void HAL_DAC_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) {
tx_dac_buffer_toggle = 1;
half_tx_dac_buffer_empty = 1;
}
*/
// TIMERZ
// 10 ms
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim){
if (htim->Instance == TIM7){
tick = 1;
}
}
// uart
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart){
if (huart == &huart1){
enqueue_cmd(uart_rx_buf[0]);
HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
}
/*
if (huart == &huart2){
enqueue_cmd(uart_rx_buf[0]);
HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
}
*/
}
// non-DMA
int __io_putchar(int ch){
uint8_t c[1];
c[0] = ch & 0x00FF;
HAL_UART_Transmit(&huart1, &*c, 1, 10);
// HAL_UART_Transmit(&huart2, &*c, 1, 10);
return ch;
}
int _write(int file,char *ptr, int len){
HAL_UART_Transmit_DMA(&huart1, ptr, len);
// HAL_UART_Transmit_DMA(&huart2, ptr, len);
/* int DataIdx;
for(DataIdx= 0; DataIdx< len; DataIdx++) {
__io_putchar(*ptr++);
}*/
return len;
}
int display_write(char *ptr, int len){
HAL_UART_Transmit_DMA(&huart1, ptr, len);
// HAL_UART_Transmit_DMA(&huart2, ptr, len);
return len;
}
void start_transmit(void){
transmit = 1;
// ADC
// HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
// DAC
HAL_TIM_Base_Start(&htim8);
HAL_DAC_Start(&hdac1,DAC_CHANNEL_2);
HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_2, tx_dac_buffer, (TX_DAC_BUFFER_SIZE * 2), DAC_ALIGN_12B_R);
}
void stop_transmit(void){
transmit = 0;
// ADC
// HAL_ADC_Stop_DMA(&hadc1);
// DAC
HAL_TIM_Base_Stop(&htim8);
HAL_DAC_Stop(&hdac1,DAC_CHANNEL_2);
HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_2);
}
void start_receive(void){
receive = 1;
// ADC
HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
// DAC
HAL_TIM_Base_Start(&htim6);
HAL_DAC_Start(&hdac1,DAC_CHANNEL_1);
HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, lf_buffer, (LF_BUFFER_SIZE * 2), DAC_ALIGN_12B_R);
}
void stop_receive(void){
receive = 0;
// ADC
HAL_ADC_Stop_DMA(&hadc1);
// DAC
HAL_TIM_Base_Stop(&htim6);
HAL_DAC_Stop(&hdac1,DAC_CHANNEL_1);
HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1);
}
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
state_changed = 0;
display_init();
state_set_default();
interface_set_default();
display_update_mode();
display_update_state();
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_DAC1_Init();
MX_ADC1_Init();
MX_TIM7_Init();
MX_TIM6_Init();
MX_CORDIC_Init();
MX_USART1_UART_Init();
MX_TIM8_Init();
MX_OPAMP1_Init();
/* USER CODE BEGIN 2 */
st2_filter_init();
audio_filter_init();
// diag();
HAL_TIM_Base_Start_IT(&htim7);
HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1);
// HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1);
start_receive();
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
if(receive){
if(rx_adc_buffer_ready){
HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
rx_mixer(adc_buffer, ADC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
rx_adc_buffer_ready = 0;
}
if(half_rx_dac_buffer_empty){
if (modulation == MOD_DC) dc_demodulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer, NCO2_INCREMENT);
else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], AUDIO_FILTER_BLOCK_SIZE);
half_rx_dac_buffer_empty = 0;
}
}
if (transmit){
if(half_tx_dac_buffer_empty){
// HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
tx_mixer(tx_dac_buffer[tx_dac_buffer_toggle], TX_DAC_BUFFER_SIZE, if_I, if_Q, nco1_increment);
half_tx_dac_buffer_empty = 0;
// HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
}
if(tx_adc_buffer_ready){
if (modulation == MOD_DC) dc_modulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer);
else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer, NCO2_INCREMENT);
else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer);
}
}
if(tick){
if(receive){
// TODO
rx_measure_signal(if_I, LF_BUFFER_SIZE);
}
// HAL_GPIO_TogglePin(LD2_GPIO_Port, LD2_Pin);
while(rx_cmd_rb_in_idx != rx_cmd_rb_out_idx) dequeue_cmd();
if(state_changed) display_update_state();
if(uart_tx_buf_in_idx){
display_write(uart_tx_buf, uart_tx_buf_in_idx);
uart_tx_buf_in_idx = 0;
}
tick = 0;
}
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
RCC_OscInitStruct.PLL.PLLN = 28;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
{
Error_Handler();
}
/** Initializes the peripherals clocks
*/
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_ADC12;
PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_MultiModeTypeDef multimode = {0};
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
hadc1.Init.Resolution = ADC_RESOLUTION_12B;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.GainCompensation = 0;
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
hadc1.Init.LowPowerAutoWait = DISABLE;
hadc1.Init.ContinuousConvMode = ENABLE;
hadc1.Init.NbrOfConversion = 1;
hadc1.Init.DiscontinuousConvMode = DISABLE;
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
hadc1.Init.DMAContinuousRequests = ENABLE;
hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
hadc1.Init.OversamplingMode = ENABLE;
hadc1.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_2;
hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_NONE;
hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;
hadc1.Init.Oversampling.OversamplingStopReset = ADC_REGOVERSAMPLING_CONTINUED_MODE;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure the ADC multi-mode
*/
multimode.Mode = ADC_MODE_INDEPENDENT;
if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_VOPAMP1;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_47CYCLES_5;
sConfig.SingleDiff = ADC_SINGLE_ENDED;
sConfig.OffsetNumber = ADC_OFFSET_NONE;
sConfig.Offset = 0;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
/**
* @brief CORDIC Initialization Function
* @param None
* @retval None
*/
static void MX_CORDIC_Init(void)
{
/* USER CODE BEGIN CORDIC_Init 0 */
// CORDIC_HandleTypeDef hcordic = {0};
CORDIC_ConfigTypeDef sConfig = {0};
sConfig.Function = CORDIC_FUNCTION_SINE;
sConfig.Precision = CORDIC_PRECISION_4CYCLES;
sConfig.Scale = CORDIC_SCALE_0;
sConfig.NbWrite = CORDIC_NBWRITE_1;
sConfig.NbRead = CORDIC_NBREAD_1;
sConfig.InSize = CORDIC_INSIZE_32BITS;
sConfig.OutSize = CORDIC_OUTSIZE_16BITS;
/* USER CODE END CORDIC_Init 0 */
/* USER CODE BEGIN CORDIC_Init 1 */
/* USER CODE END CORDIC_Init 1 */
hcordic.Instance = CORDIC;
if (HAL_CORDIC_Init(&hcordic) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN CORDIC_Init 2 */
HAL_CORDIC_Configure(&hcordic, &sConfig);
/* USER CODE END CORDIC_Init 2 */
}
/**
* @brief DAC1 Initialization Function
* @param None
* @retval None
*/
static void MX_DAC1_Init(void)
{
/* USER CODE BEGIN DAC1_Init 0 */
/* USER CODE END DAC1_Init 0 */
DAC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN DAC1_Init 1 */
/* USER CODE END DAC1_Init 1 */
/** DAC Initialization
*/
hdac1.Instance = DAC1;
if (HAL_DAC_Init(&hdac1) != HAL_OK)
{
Error_Handler();
}
/** DAC channel OUT1 config
*/
sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
sConfig.DAC_DMADoubleDataMode = DISABLE;
sConfig.DAC_SignedFormat = ENABLE;
sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
sConfig.DAC_Trigger = DAC_TRIGGER_T6_TRGO;
sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_EXTERNAL;
sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
/** DAC channel OUT2 config
*/
sConfig.DAC_SignedFormat = DISABLE;
sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
if (HAL_DAC_ConfigChannel(&hdac1, &sConfig, DAC_CHANNEL_2) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN DAC1_Init 2 */
/* USER CODE END DAC1_Init 2 */
}
/**
* @brief OPAMP1 Initialization Function
* @param None
* @retval None
*/
static void MX_OPAMP1_Init(void)
{
/* USER CODE BEGIN OPAMP1_Init 0 */
/* USER CODE END OPAMP1_Init 0 */
/* USER CODE BEGIN OPAMP1_Init 1 */
/* USER CODE END OPAMP1_Init 1 */
hopamp1.Instance = OPAMP1;
hopamp1.Init.PowerMode = OPAMP_POWERMODE_HIGHSPEED;
hopamp1.Init.Mode = OPAMP_PGA_MODE;
hopamp1.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
hopamp1.Init.InternalOutput = ENABLE;
hopamp1.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
hopamp1.Init.PgaConnect = OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0;
hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_8_OR_MINUS_7;
hopamp1.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
if (HAL_OPAMP_Init(&hopamp1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN OPAMP1_Init 2 */
/* USER CODE END OPAMP1_Init 2 */
}
/**
* @brief TIM6 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM6_Init(void)
{
/* USER CODE BEGIN TIM6_Init 0 */
/* USER CODE END TIM6_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM6_Init 1 */
/* USER CODE END TIM6_Init 1 */
htim6.Instance = TIM6;
htim6.Init.Prescaler = 0;
htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
htim6.Init.Period = 7679;
htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim6) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim6, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM6_Init 2 */
/* USER CODE END TIM6_Init 2 */
}
/**
* @brief TIM7 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM7_Init(void)
{
/* USER CODE BEGIN TIM7_Init 0 */
/* USER CODE END TIM7_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM7_Init 1 */
/* USER CODE END TIM7_Init 1 */
htim7.Instance = TIM7;
htim7.Init.Prescaler = 1679;
htim7.Init.CounterMode = TIM_COUNTERMODE_UP;
htim7.Init.Period = 999;
htim7.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim7) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim7, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM7_Init 2 */
/* USER CODE END TIM7_Init 2 */
}
/**
* @brief TIM8 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM8_Init(void)
{
/* USER CODE BEGIN TIM8_Init 0 */
/* USER CODE END TIM8_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
/* USER CODE BEGIN TIM8_Init 1 */
/* USER CODE END TIM8_Init 1 */
htim8.Instance = TIM8;
htim8.Init.Prescaler = 0;
htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
htim8.Init.Period = 239;
htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim8.Init.RepetitionCounter = 0;
htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM8_Init 2 */
/* USER CODE END TIM8_Init 2 */
}
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
huart1.Init.BaudRate = 115200;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1;
huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart1) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMAMUX1_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/* DMA1_Channel2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
/* DMA1_Channel4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn);
/* DMA1_Channel5_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel5_IRQn);
}
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOF_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin : OUT_Pin */
GPIO_InitStruct.Pin = OUT_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(OUT_GPIO_Port, &GPIO_InitStruct);
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

272
codice/Core/Src/rx.c Normal file
View File

@@ -0,0 +1,272 @@
#include <stdint.h>
#include <arm_math.h>
#include <stm32g4xx_ll_cordic.h>
#include "FIRFilterCode.h"
#include "bassofono.h"
#include "rx.h"
int32_t rx_signal;
// filtro 2
arm_fir_decimate_instance_q31 st2_filter_I_struct;
arm_fir_decimate_instance_q31 st2_filter_Q_struct;
q31_t st2_filter_I_state[ST2_FILTER_BLOCK_SIZE + ST2_FILTER_TAP_NUM - 1];
q31_t st2_filter_Q_state[ST2_FILTER_BLOCK_SIZE + ST2_FILTER_TAP_NUM - 1];
// filtro audio
arm_fir_instance_q31 audio_filter_struct;
q31_t audio_filter_state[AUDIO_FILTER_BLOCK_SIZE + AUDIO_FILTER_TAP_NUM - 1];
int32_t audio_filter_coeffs[AUDIO_FILTER_TAP_NUM];
int32_t ms_hbf_filter_taps[MS_HBF_TAP_NUM] = {
-181552, 0, 3414100, 0,
-16841686, 0, 80782761, 134217728,
80782761, 0, -16841686, 0,
3414100, 0, -181552,
};
// fir 127t 0,02fc 32bit x SSB
int32_t st2_filter_taps[ST2_FILTER_TAP_NUM] = {
-1126183, -1060446, -1001030, -944190,
-885669, -820733, -744204, -650507,
-533714, -387602, -205707, 18609,
292094, 621539, 1013699, 1475225,
2012590, 2632009, 3339367, 4140147,
5039355, 6041454, 7150298, 8369068,
9700219, 11145427, 12705542, 14380553,
16169554, 18070720, 20081290, 22197560,
24414882, 26727671, 29129426, 31612749,
34169384, 36790257, 39465521, 42184622,
44936354, 47708936, 50490086, 53267102,
56026952, 58756364, 61441918, 64070145,
66627626, 69101088, 71477504, 73744193,
75888914, 77899962, 79766252, 81477413,
83023862, 84396881, 85588686, 86592486,
87402540, 88014198, 88423939, 88629403,
88629403, 88423939, 88014198, 87402540,
86592486, 85588686, 84396881, 83023862,
81477413, 79766252, 77899962, 75888914,
73744193, 71477504, 69101088, 66627626,
64070145, 61441918, 58756364, 56026952,
53267102, 50490086, 47708936, 44936354,
42184622, 39465521, 36790257, 34169384,
31612749, 29129426, 26727671, 24414882,
22197560, 20081290, 18070720, 16169554,
14380553, 12705542, 11145427, 9700219,
8369068, 7150298, 6041454, 5039355,
4140147, 3339367, 2632009, 2012590,
1475225, 1013699, 621539, 292094,
18609, -205707, -387602, -533714,
-650507, -744204, -820733, -885669,
-944190, -1001030, -1060446, -1126183,
};
// fir 127t 0,08fc 32bit x DC & AM
int32_t st2_wide_taps[ST2_FILTER_TAP_NUM] = {
-97978, 335568, 778895, 1221284,
1647428, 2035927, 2358700, 2581561,
2666121, 2573011, 2266239, 1718351,
915904, -135341, -1406144, -2841077,
-4357945, -5849758, -7189482, -8237567,
-8851951, -8900018, -8271675, -6892581,
-4736355, -1834599, 1716434, 5753496,
10049098, 14319768, 18239836, 21460339,
23632183, 24432297, 23591167, 20919867,
16334581, 9876614, 1726037, -7792580,
-18213471, -28942584, -39280046, -48451497,
-55646916, -60065020, -60960793, -57693344,
-49771152, -36891699, -18972776, 3826929,
31099731, 62194426, 96235614, 132156305,
168742396, 204686835, 238650645, 269327486,
295508153, 316141338, 330387150, 337660283,
337660283, 330387150, 316141338, 295508153,
269327486, 238650645, 204686835, 168742396,
132156305, 96235614, 62194426, 31099731,
3826929, -18972776, -36891699, -49771152,
-57693344, -60960793, -60065020, -55646916,
-48451497, -39280046, -28942584, -18213471,
-7792580, 1726037, 9876614, 16334581,
20919867, 23591167, 24432297, 23632183,
21460339, 18239836, 14319768, 10049098,
5753496, 1716434, -1834599, -4736355,
-6892581, -8271675, -8900018, -8851951,
-8237567, -7189482, -5849758, -4357945,
-2841077, -1406144, -135341, 915904,
1718351, 2266239, 2573011, 2666121,
2581561, 2358700, 2035927, 1647428,
1221284, 778895, 335568, -97978,
};
int32_t audio_filter_coeffs[AUDIO_FILTER_TAP_NUM];
// mix
void rx_mixer(uint16_t *in, uint16_t size, q31_t *I_out, q31_t *Q_out, int32_t nco_freq){
uint16_t i = 0, j = 0, k = 0;
static int32_t phase_accu;
int32_t scaled_in, sin, cos, tmp;
q31_t I_tmp2[ST2_BUFFER_SIZE], Q_tmp2[ST2_BUFFER_SIZE];
// rb
static uint8_t mixed_samples_ringbuffer_index, mixed_samples_2m_ringbuffer_index;
static q31_t I_mixed_rb[MIXED_SAMPLES_RINGBUFFER_SIZE], Q_mixed_rb[MIXED_SAMPLES_RINGBUFFER_SIZE];
static q31_t I_mixed_2m_rb[MIXED_SAMPLES_2M_RINGBUFFER_SIZE], Q_mixed_2m_rb[MIXED_SAMPLES_2M_RINGBUFFER_SIZE];
LL_CORDIC_WriteData(CORDIC, phase_accu);
while(i < size){
// in 12 + 1 bit
scaled_in = (int32_t)in[i]-4096;
// printf("%d\n", scaled_in);
tmp = LL_CORDIC_ReadData(CORDIC);
phase_accu += nco_freq;
LL_CORDIC_WriteData(CORDIC, phase_accu);
sin = (int16_t)tmp;
cos = tmp>>16;
I_mixed_rb[mixed_samples_ringbuffer_index] = (int32_t)sin * scaled_in;
Q_mixed_rb[mixed_samples_ringbuffer_index] = (int32_t)cos * scaled_in;
// MS HB FIR
if(i & 1) {
I_mixed_2m_rb[mixed_samples_2m_ringbuffer_index] = hb_fir15(I_mixed_rb, mixed_samples_ringbuffer_index, MIXED_SAMPLES_RINGBUFFER_SIZE_MASK, ms_hbf_filter_taps);
Q_mixed_2m_rb[mixed_samples_2m_ringbuffer_index] = hb_fir15(Q_mixed_rb, mixed_samples_ringbuffer_index, MIXED_SAMPLES_RINGBUFFER_SIZE_MASK, ms_hbf_filter_taps);
if(j & 1) {
I_tmp2[k] = hb_fir15(I_mixed_2m_rb, mixed_samples_2m_ringbuffer_index, MIXED_SAMPLES_2M_RINGBUFFER_SIZE_MASK, ms_hbf_filter_taps);
Q_tmp2[k] = hb_fir15(Q_mixed_2m_rb, mixed_samples_2m_ringbuffer_index, MIXED_SAMPLES_2M_RINGBUFFER_SIZE_MASK, ms_hbf_filter_taps);
k++;
}
ringbuf_increment(&mixed_samples_2m_ringbuffer_index, MIXED_SAMPLES_2M_RINGBUFFER_SIZE_MASK);
j++;
}
ringbuf_increment(&mixed_samples_ringbuffer_index, MIXED_SAMPLES_RINGBUFFER_SIZE_MASK);
i++;
}
arm_fir_decimate_q31(&st2_filter_I_struct, I_tmp2, I_out, ST2_FILTER_BLOCK_SIZE);
arm_fir_decimate_q31(&st2_filter_Q_struct, Q_tmp2, Q_out, ST2_FILTER_BLOCK_SIZE);
tmp = LL_CORDIC_ReadData(CORDIC);
}
// demodulatori
void am_demodulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out){
uint16_t i;
q31_t acc0, acc1;
i = 0;
while(i < size){
acc0 = (q31_t) (((q63_t) in_I[i] * in_I[i]) >> 33);
acc1 = (q31_t) (((q63_t) in_Q[i] * in_Q[i]) >> 33);
out[i] = acc0 + acc1;
i++;
}
}
void ssb_demodulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out, q31_t nco_freq){
uint16_t i;
static int32_t phase_accu;
int32_t sin, cos, tmp, I, Q;
LL_CORDIC_WriteData(CORDIC, phase_accu);
i = 0;
while(i < size){
tmp = LL_CORDIC_ReadData(CORDIC);
phase_accu += nco_freq;
LL_CORDIC_WriteData(CORDIC, phase_accu);
sin = (int16_t)tmp;
cos = tmp>>16;
I = sat_mult_q31(sin*(volume*32), in_I[i]);
Q = sat_mult_q31(cos*(volume*32), in_Q[i]);
if (modulation == MOD_USB) out[i] = (I + Q);
else {
out[i] = (I - Q);
}
i++;
}
tmp = LL_CORDIC_ReadData(CORDIC);
}
void dc_demodulator(q31_t *in, uint16_t size, q31_t *out){
uint16_t i;
i = 0;
while(i < LF_BUFFER_SIZE){
out[i] = ((in[i]*(int32_t)volume))/4096;
i++;
}
}
void nco(uint16_t size, q31_t *out, q31_t nco_freq){
uint16_t i;
int32_t sin, cos, tmp;
static int32_t phase_accu;
LL_CORDIC_WriteData(CORDIC, phase_accu);
i = 0;
while(i < size){
tmp = LL_CORDIC_ReadData(CORDIC);
phase_accu += nco_freq;
LL_CORDIC_WriteData(CORDIC, phase_accu);
sin = (int16_t)tmp;
cos = tmp>>16;
out[i] = cos/volume;
i++;
}
tmp = LL_CORDIC_ReadData(CORDIC);
}
// filtri
inline q31_t hb_fir15(q31_t * samples_ringbuf, uint8_t sample_index, uint8_t buff_size_mask, q31_t * coefficients){
q63_t sum0 = 0;
sum0 += (q63_t) samples_ringbuf[(sample_index - 0) & buff_size_mask] * coefficients[0];
sum0 += (q63_t) samples_ringbuf[(sample_index - 14) & buff_size_mask] * coefficients[0];
sum0 += (q63_t) samples_ringbuf[(sample_index - 2) & buff_size_mask] * coefficients[2];
sum0 += (q63_t) samples_ringbuf[(sample_index - 12) & buff_size_mask] * coefficients[2];
sum0 += (q63_t) samples_ringbuf[(sample_index - 4) & buff_size_mask] * coefficients[4];
sum0 += (q63_t) samples_ringbuf[(sample_index - 10) & buff_size_mask] * coefficients[4];
sum0 += (q63_t) samples_ringbuf[(sample_index - 6) & buff_size_mask] * coefficients[6];
sum0 += (q63_t) samples_ringbuf[(sample_index - 8) & buff_size_mask] * coefficients[6];
sum0 += (q63_t) samples_ringbuf[(sample_index - 7) & buff_size_mask] * coefficients[7];
return (q31_t) (sum0 >> 31);
}
void st2_filter_init(void){
if((modulation == MOD_LSB) || (modulation == MOD_USB)){
arm_fir_decimate_init_q31(&st2_filter_I_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_filter_taps[0], &st2_filter_I_state[0], ST2_FILTER_BLOCK_SIZE);
arm_fir_decimate_init_q31(&st2_filter_Q_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_filter_taps[0], &st2_filter_Q_state[0], ST2_FILTER_BLOCK_SIZE);
} else if ((modulation == MOD_DC) || (modulation == MOD_AM)){
arm_fir_decimate_init_q31(&st2_filter_I_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_wide_taps[0], &st2_filter_I_state[0], ST2_FILTER_BLOCK_SIZE);
arm_fir_decimate_init_q31(&st2_filter_Q_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_wide_taps[0], &st2_filter_Q_state[0], ST2_FILTER_BLOCK_SIZE);
}
}
void audio_filter_init(void){
arm_fir_init_q31 (&audio_filter_struct, AUDIO_FILTER_TAP_NUM, audio_filter_coeffs, &audio_filter_state[0], AUDIO_FILTER_BLOCK_SIZE);
}
void audio_filter_generate_coeffs(int32_t *Coeffs, uint32_t freq, uint32_t bw, uint8_t beta){
double FPCoeff[AUDIO_FILTER_TAP_NUM + 1];
double normalized_center_freq, normalized_bw, fp_beta;
normalized_center_freq = (double)(freq*2)/DAC_SAMPLE_RATE;
normalized_bw = (double)(bw*2)/DAC_SAMPLE_RATE;
fp_beta = beta/4;
RectWinFIR(FPCoeff, AUDIO_FILTER_TAP_NUM, firBPF, normalized_center_freq, normalized_bw);
FIRFilterWindow(FPCoeff, AUDIO_FILTER_TAP_NUM, wtKAISER, fp_beta);
for( int index = 0; index < AUDIO_FILTER_TAP_NUM; index++){
Coeffs[index] = (int32_t) ( (double)(FPCoeff[index])*(double)0x7FFFFFFF );
}
}
void rx_measure_signal(q31_t *samples, uint16_t size){
static int32_t old_rx_signal;
uint32_t index;
arm_max_q31(samples, size, &old_rx_signal, &index);
old_rx_signal >>= 10;
if(old_rx_signal != rx_signal) {
rx_signal = old_rx_signal;
// rx_signal = 45;
set_changed(7);
}
}

550
codice/Core/Src/stm32g4xx_hal_msp.c Normal file
View File

@@ -0,0 +1,550 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern DMA_HandleTypeDef hdma_adc1;
extern DMA_HandleTypeDef hdma_dac1_ch1;
extern DMA_HandleTypeDef hdma_dac1_ch2;
extern DMA_HandleTypeDef hdma_usart1_tx;
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/** Disable the internal Pull-Up in Dead Battery pins of UCPD peripheral
*/
HAL_PWREx_DisableUCPDDeadBattery();
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/**
* @brief ADC MSP Initialization
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
if(hadc->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC12_CLK_ENABLE();
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
hdma_adc1.Init.Request = DMA_REQUEST_ADC1;
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc1.Init.Mode = DMA_CIRCULAR;
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
/**
* @brief ADC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
{
if(hadc->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC12_CLK_DISABLE();
/* ADC1 DMA DeInit */
HAL_DMA_DeInit(hadc->DMA_Handle);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
}
/**
* @brief CORDIC MSP Initialization
* This function configures the hardware resources used in this example
* @param hcordic: CORDIC handle pointer
* @retval None
*/
void HAL_CORDIC_MspInit(CORDIC_HandleTypeDef* hcordic)
{
if(hcordic->Instance==CORDIC)
{
/* USER CODE BEGIN CORDIC_MspInit 0 */
/* USER CODE END CORDIC_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_CORDIC_CLK_ENABLE();
/* USER CODE BEGIN CORDIC_MspInit 1 */
/* USER CODE END CORDIC_MspInit 1 */
}
}
/**
* @brief CORDIC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hcordic: CORDIC handle pointer
* @retval None
*/
void HAL_CORDIC_MspDeInit(CORDIC_HandleTypeDef* hcordic)
{
if(hcordic->Instance==CORDIC)
{
/* USER CODE BEGIN CORDIC_MspDeInit 0 */
/* USER CODE END CORDIC_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_CORDIC_CLK_DISABLE();
/* USER CODE BEGIN CORDIC_MspDeInit 1 */
/* USER CODE END CORDIC_MspDeInit 1 */
}
}
/**
* @brief DAC MSP Initialization
* This function configures the hardware resources used in this example
* @param hdac: DAC handle pointer
* @retval None
*/
void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hdac->Instance==DAC1)
{
/* USER CODE BEGIN DAC1_MspInit 0 */
/* USER CODE END DAC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_DAC1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**DAC1 GPIO Configuration
PA4 ------> DAC1_OUT1
PA5 ------> DAC1_OUT2
*/
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* DAC1 DMA Init */
/* DAC1_CH1 Init */
hdma_dac1_ch1.Instance = DMA1_Channel2;
hdma_dac1_ch1.Init.Request = DMA_REQUEST_DAC1_CHANNEL1;
hdma_dac1_ch1.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_dac1_ch1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_dac1_ch1.Init.MemInc = DMA_MINC_ENABLE;
hdma_dac1_ch1.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_dac1_ch1.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_dac1_ch1.Init.Mode = DMA_CIRCULAR;
hdma_dac1_ch1.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_dac1_ch1) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(hdac,DMA_Handle1,hdma_dac1_ch1);
/* DAC1_CH2 Init */
hdma_dac1_ch2.Instance = DMA1_Channel4;
hdma_dac1_ch2.Init.Request = DMA_REQUEST_DAC1_CHANNEL2;
hdma_dac1_ch2.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_dac1_ch2.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_dac1_ch2.Init.MemInc = DMA_MINC_ENABLE;
hdma_dac1_ch2.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
hdma_dac1_ch2.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
hdma_dac1_ch2.Init.Mode = DMA_CIRCULAR;
hdma_dac1_ch2.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_dac1_ch2) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(hdac,DMA_Handle2,hdma_dac1_ch2);
/* USER CODE BEGIN DAC1_MspInit 1 */
/* USER CODE END DAC1_MspInit 1 */
}
}
/**
* @brief DAC MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hdac: DAC handle pointer
* @retval None
*/
void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
{
if(hdac->Instance==DAC1)
{
/* USER CODE BEGIN DAC1_MspDeInit 0 */
/* USER CODE END DAC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_DAC1_CLK_DISABLE();
/**DAC1 GPIO Configuration
PA4 ------> DAC1_OUT1
PA5 ------> DAC1_OUT2
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5);
/* DAC1 DMA DeInit */
HAL_DMA_DeInit(hdac->DMA_Handle1);
HAL_DMA_DeInit(hdac->DMA_Handle2);
/* USER CODE BEGIN DAC1_MspDeInit 1 */
/* USER CODE END DAC1_MspDeInit 1 */
}
}
/**
* @brief OPAMP MSP Initialization
* This function configures the hardware resources used in this example
* @param hopamp: OPAMP handle pointer
* @retval None
*/
void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(hopamp->Instance==OPAMP1)
{
/* USER CODE BEGIN OPAMP1_MspInit 0 */
/* USER CODE END OPAMP1_MspInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
/**OPAMP1 GPIO Configuration
PA1 ------> OPAMP1_VINP
PA3 ------> OPAMP1_VINM0
*/
GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN OPAMP1_MspInit 1 */
/* USER CODE END OPAMP1_MspInit 1 */
}
}
/**
* @brief OPAMP MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param hopamp: OPAMP handle pointer
* @retval None
*/
void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
{
if(hopamp->Instance==OPAMP1)
{
/* USER CODE BEGIN OPAMP1_MspDeInit 0 */
/* USER CODE END OPAMP1_MspDeInit 0 */
/**OPAMP1 GPIO Configuration
PA1 ------> OPAMP1_VINP
PA3 ------> OPAMP1_VINM0
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1|GPIO_PIN_3);
/* USER CODE BEGIN OPAMP1_MspDeInit 1 */
/* USER CODE END OPAMP1_MspDeInit 1 */
}
}
/**
* @brief TIM_Base MSP Initialization
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspInit 0 */
/* USER CODE END TIM6_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM6_CLK_ENABLE();
/* USER CODE BEGIN TIM6_MspInit 1 */
/* USER CODE END TIM6_MspInit 1 */
}
else if(htim_base->Instance==TIM7)
{
/* USER CODE BEGIN TIM7_MspInit 0 */
/* USER CODE END TIM7_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM7_CLK_ENABLE();
/* TIM7 interrupt Init */
HAL_NVIC_SetPriority(TIM7_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(TIM7_IRQn);
/* USER CODE BEGIN TIM7_MspInit 1 */
/* USER CODE END TIM7_MspInit 1 */
}
else if(htim_base->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspInit 0 */
/* USER CODE END TIM8_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM8_CLK_ENABLE();
/* USER CODE BEGIN TIM8_MspInit 1 */
/* USER CODE END TIM8_MspInit 1 */
}
}
/**
* @brief TIM_Base MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
{
if(htim_base->Instance==TIM6)
{
/* USER CODE BEGIN TIM6_MspDeInit 0 */
/* USER CODE END TIM6_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM6_CLK_DISABLE();
/* USER CODE BEGIN TIM6_MspDeInit 1 */
/* USER CODE END TIM6_MspDeInit 1 */
}
else if(htim_base->Instance==TIM7)
{
/* USER CODE BEGIN TIM7_MspDeInit 0 */
/* USER CODE END TIM7_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM7_CLK_DISABLE();
/* TIM7 interrupt DeInit */
HAL_NVIC_DisableIRQ(TIM7_IRQn);
/* USER CODE BEGIN TIM7_MspDeInit 1 */
/* USER CODE END TIM7_MspDeInit 1 */
}
else if(htim_base->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspDeInit 0 */
/* USER CODE END TIM8_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM8_CLK_DISABLE();
/* USER CODE BEGIN TIM8_MspDeInit 1 */
/* USER CODE END TIM8_MspDeInit 1 */
}
}
/**
* @brief UART MSP Initialization
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 DMA Init */
/* USART1_TX Init */
hdma_usart1_tx.Instance = DMA1_Channel5;
hdma_usart1_tx.Init.Request = DMA_REQUEST_USART1_TX;
hdma_usart1_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart1_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart1_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart1_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart1_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart1_tx.Init.Mode = DMA_NORMAL;
hdma_usart1_tx.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_usart1_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(huart,hdmatx,hdma_usart1_tx);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
/**
* @brief UART MSP De-Initialization
* This function freeze the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
{
if(huart->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
/* USART1 DMA DeInit */
HAL_DMA_DeInit(huart->hdmatx);
/* USART1 interrupt DeInit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32g4xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32g4xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_adc1;
extern DMA_HandleTypeDef hdma_dac1_ch1;
extern DMA_HandleTypeDef hdma_dac1_ch2;
extern TIM_HandleTypeDef htim7;
extern DMA_HandleTypeDef hdma_usart1_tx;
extern UART_HandleTypeDef huart1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M4 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32G4xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32g4xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel2 global interrupt.
*/
void DMA1_Channel2_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel2_IRQn 0 */
/* USER CODE END DMA1_Channel2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_dac1_ch1);
/* USER CODE BEGIN DMA1_Channel2_IRQn 1 */
/* USER CODE END DMA1_Channel2_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel4 global interrupt.
*/
void DMA1_Channel4_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
/* USER CODE END DMA1_Channel4_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_dac1_ch2);
/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
/* USER CODE END DMA1_Channel4_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel5 global interrupt.
*/
void DMA1_Channel5_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
/* USER CODE END DMA1_Channel5_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart1_tx);
/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
/* USER CODE END DMA1_Channel5_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/**
* @brief This function handles TIM7 global interrupt.
*/
void TIM7_IRQHandler(void)
{
/* USER CODE BEGIN TIM7_IRQn 0 */
/* USER CODE END TIM7_IRQn 0 */
HAL_TIM_IRQHandler(&htim7);
/* USER CODE BEGIN TIM7_IRQn 1 */
/* USER CODE END TIM7_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file system_stm32g4xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File
*
* This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32g4xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* After each device reset the HSI (16 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to
* configure the system clock before to branch to main program.
*
* This file configures the system clock as follows:
*=============================================================================
*-----------------------------------------------------------------------------
* System Clock source | HSI
*-----------------------------------------------------------------------------
* SYSCLK(Hz) | 16000000
*-----------------------------------------------------------------------------
* HCLK(Hz) | 16000000
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 1
*-----------------------------------------------------------------------------
* APB2 Prescaler | 1
*-----------------------------------------------------------------------------
* PLL_M | 1
*-----------------------------------------------------------------------------
* PLL_N | 16
*-----------------------------------------------------------------------------
* PLL_P | 7
*-----------------------------------------------------------------------------
* PLL_Q | 2
*-----------------------------------------------------------------------------
* PLL_R | 2
*-----------------------------------------------------------------------------
* Require 48MHz for RNG | Disabled
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32g4xx_system
* @{
*/
/** @addtogroup STM32G4xx_System_Private_Includes
* @{
*/
#include "stm32g4xx.h"
#if !defined (HSE_VALUE)
#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Defines
* @{
*/
/************************* Miscellaneous Configuration ************************/
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00UL /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Variables
* @{
*/
/* The SystemCoreClock variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = HSI_VALUE;
const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32G4xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */
#endif
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
* (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default value
* 16 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file (default value
* 24 MHz), user has to ensure that HSE_VALUE is same as the real
* frequency of the crystal used. Otherwise, this function may
* have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
*
* @param None
* @retval None
*/
void SystemCoreClockUpdate(void)
{
uint32_t tmp, pllvco, pllr, pllsource, pllm;
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
{
case 0x04: /* HSI used as system clock source */
SystemCoreClock = HSI_VALUE;
break;
case 0x08: /* HSE used as system clock source */
SystemCoreClock = HSE_VALUE;
break;
case 0x0C: /* PLL used as system clock source */
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR
*/
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC);
pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U ;
if (pllsource == 0x02UL) /* HSI used as PLL clock source */
{
pllvco = (HSI_VALUE / pllm);
}
else /* HSE used as PLL clock source */
{
pllvco = (HSE_VALUE / pllm);
}
pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8);
pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U;
SystemCoreClock = pllvco/pllr;
break;
default:
break;
}
/* Compute HCLK clock frequency --------------------------------------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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#include <stdint.h>
#include <arm_math.h>
#include <stm32g4xx_ll_cordic.h>
#include "bassofono.h"
#include "tx.h"
volatile uint8_t half_tx_dac_buffer_empty, tx_dac_buffer_toggle;
volatile uint8_t tx_adc_buffer_ready;
// FILTRO
arm_fir_instance_q31 tx_audio_filter_I_struct, tx_audio_filter_Q_struct;
q31_t tx_audio_filter_I_state[TX_AUDIO_FILTER_BLOCK_SIZE + TX_AUDIO_FILTER_TAP_NUM - 1];
q31_t tx_audio_filter_Q_state[TX_AUDIO_FILTER_BLOCK_SIZE + TX_AUDIO_FILTER_TAP_NUM - 1];
int32_t tx_audio_filter_coeffs[TX_AUDIO_FILTER_TAP_NUM];
void tx_mixer(uint16_t *out, uint16_t size, q31_t *I_in, q31_t *Q_in, int32_t nco_freq){
uint16_t i = 0;
int32_t sin, cos, tmp;
static int32_t phase_accu;
// perche?
nco_freq = nco_freq>>2;
LL_CORDIC_WriteData(CORDIC, phase_accu);
while(i < (size * 2)){
tmp = LL_CORDIC_ReadData(CORDIC);
phase_accu += nco_freq;
LL_CORDIC_WriteData(CORDIC, phase_accu);
sin = (int16_t)tmp;
cos = tmp>>16;
// out[i] = (int32_t)cos;
// out[i] = 2000;
out[i] = cos>>4;
// out[i] = (I_in[i] * sin) + (Q_in[i] * cos);
i++;
}
tmp = LL_CORDIC_ReadData(CORDIC);
}
// modulatori
void ssb_modulator(q31_t *out_I, q31_t *out_Q, uint16_t size, q31_t *in, q31_t nco_freq){
uint16_t i;
static int32_t phase_accu;
int32_t sin, cos, tmp;
LL_CORDIC_WriteData(CORDIC, phase_accu);
i = 0;
while(i < size){
tmp = LL_CORDIC_ReadData(CORDIC);
phase_accu += nco_freq;
LL_CORDIC_WriteData(CORDIC, phase_accu);
sin = (int16_t)tmp;
cos = tmp>>16;
out_I = sat_mult_q31(sin, in[i]);
out_Q = sat_mult_q31(cos, in[i]);
i++;
}
tmp = LL_CORDIC_ReadData(CORDIC);
}
void dc_modulator(q31_t *in, uint16_t size, q31_t *out){
uint16_t i;
i = 0;
while(i < LF_BUFFER_SIZE){
out[i] = ((in[i]*(int32_t)mic_gain))/4096;
i++;
}
}
void am_modulator(q31_t *out_I, q31_t *out_Q, uint16_t size, q31_t *in){
// SQRT (I * I + Q * Q)
uint16_t i;
q31_t acc0, acc1;
i = 0;
while(i < size){
out_I[i] = in[i];
out_Q[i] = 0;
i++;
}
}
void tx_audio_filter_init(void){
arm_fir_interpolate_init_q15 (&tx_audio_filter_I_struct, TX_AUDIO_FILTER_INTERPOLATION_FACTOR, TX_AUDIO_FILTER_TAP_NUM, tx_audio_filter_coeffs, &tx_audio_filter_I_state[0], TX_AUDIO_FILTER_BLOCK_SIZE);
arm_fir_interpolate_init_q15 (&tx_audio_filter_Q_struct, TX_AUDIO_FILTER_INTERPOLATION_FACTOR, TX_AUDIO_FILTER_TAP_NUM, tx_audio_filter_coeffs, &tx_audio_filter_Q_state[0], TX_AUDIO_FILTER_BLOCK_SIZE);
}