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This commit is contained in:
nzasch
471
schemi/bassofono-cache.lib
Normal file
471
schemi/bassofono-cache.lib
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@@ -0,0 +1,471 @@
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EESchema-LIBRARY Version 2.4
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#encoding utf-8
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#
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# Amplifier_Operational_TL082
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#
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DEF Amplifier_Operational_TL082 U 0 5 Y Y 3 L N
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F0 "U" 0 200 50 H V L CNN
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F1 "Amplifier_Operational_TL082" 0 -200 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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ALIAS LM358 AD8620 LMC6062 LMC6082 TL062 TL072 TL082 NE5532 SA5532 RC4558 RC4560 RC4580 LMV358 TS912 TSV912IDT TSV912IST TLC272 TLC277 MCP602 OPA1678 OPA2134 OPA2340 OPA2376xxD OPA2376xxDGK MC33078 MC33178 LM4562 OP249 OP275 ADA4075-2 MCP6002-xP MCP6002-xSN MCP6002-xMS LM7332 OPA2333xxD OPA2333xxDGK LMC6482 LT1492 LTC6081xMS8 LM6172 MCP6L92 NJM2043 NJM2114 NJM4556A NJM4558 NJM4559 NJM4560 NJM4580 NJM5532 ADA4807-2ARM OPA2691 LT6234 OPA2356xxD OPA2356xxDGK OPA1612AxD MC33172 OPA1602 TLV2372 LT6237 OPA2277 MCP6022 MCP6V67EMS
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$FPLIST
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SOIC*3.9x4.9mm*P1.27mm*
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DIP*W7.62mm*
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TO*99*
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OnSemi*Micro8*
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TSSOP*3x3mm*P0.65mm*
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TSSOP*4.4x3mm*P0.65mm*
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MSOP*3x3mm*P0.65mm*
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SSOP*3.9x4.9mm*P0.635mm*
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LFCSP*2x2mm*P0.5mm*
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*SIP*
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SOIC*5.3x6.2mm*P1.27mm*
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$ENDFPLIST
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DRAW
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P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
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P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
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X ~ 1 300 0 100 L 50 50 1 1 O
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X - 2 -300 -100 100 R 50 50 1 1 I
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X + 3 -300 100 100 R 50 50 1 1 I
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X + 5 -300 100 100 R 50 50 2 1 I
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X - 6 -300 -100 100 R 50 50 2 1 I
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X ~ 7 300 0 100 L 50 50 2 1 O
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X V- 4 -100 -300 150 U 50 50 3 1 W
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X V+ 8 -100 300 150 D 50 50 3 1 W
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ENDDRAW
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ENDDEF
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#
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# Connector_Conn_01x01_Female
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#
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DEF Connector_Conn_01x01_Female J 0 40 Y N 1 F N
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F0 "J" 0 100 50 H V C CNN
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F1 "Connector_Conn_01x01_Female" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*
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$ENDFPLIST
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DRAW
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A 0 0 20 901 -901 1 1 6 N 0 20 0 -20
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P 2 1 1 6 -50 0 -20 0 N
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X Pin_1 1 -200 0 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_Generic_Conn_01x06
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#
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DEF Connector_Generic_Conn_01x06 J 0 40 Y N 1 F N
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F0 "J" 0 300 50 H V C CNN
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F1 "Connector_Generic_Conn_01x06" 0 -400 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S -50 -295 0 -305 1 1 6 N
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S -50 -195 0 -205 1 1 6 N
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 105 0 95 1 1 6 N
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S -50 205 0 195 1 1 6 N
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S -50 250 50 -350 1 1 10 f
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X Pin_1 1 -200 200 150 R 50 50 1 1 P
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X Pin_2 2 -200 100 150 R 50 50 1 1 P
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X Pin_3 3 -200 0 150 R 50 50 1 1 P
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X Pin_4 4 -200 -100 150 R 50 50 1 1 P
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X Pin_5 5 -200 -200 150 R 50 50 1 1 P
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X Pin_6 6 -200 -300 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Connector_Generic_Conn_01x14
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#
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DEF Connector_Generic_Conn_01x14 J 0 40 Y N 1 F N
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F0 "J" 0 700 50 H V C CNN
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F1 "Connector_Generic_Conn_01x14" 0 -800 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Connector*:*_1x??_*
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$ENDFPLIST
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DRAW
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S -50 -695 0 -705 1 1 6 N
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S -50 -595 0 -605 1 1 6 N
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S -50 -495 0 -505 1 1 6 N
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S -50 -395 0 -405 1 1 6 N
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S -50 -295 0 -305 1 1 6 N
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S -50 -195 0 -205 1 1 6 N
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S -50 -95 0 -105 1 1 6 N
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S -50 5 0 -5 1 1 6 N
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S -50 105 0 95 1 1 6 N
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S -50 205 0 195 1 1 6 N
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S -50 305 0 295 1 1 6 N
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S -50 405 0 395 1 1 6 N
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S -50 505 0 495 1 1 6 N
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S -50 605 0 595 1 1 6 N
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S -50 650 50 -750 1 1 10 f
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X Pin_1 1 -200 600 150 R 50 50 1 1 P
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X Pin_10 10 -200 -300 150 R 50 50 1 1 P
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X Pin_11 11 -200 -400 150 R 50 50 1 1 P
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X Pin_12 12 -200 -500 150 R 50 50 1 1 P
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X Pin_13 13 -200 -600 150 R 50 50 1 1 P
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X Pin_14 14 -200 -700 150 R 50 50 1 1 P
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X Pin_2 2 -200 500 150 R 50 50 1 1 P
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X Pin_3 3 -200 400 150 R 50 50 1 1 P
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X Pin_4 4 -200 300 150 R 50 50 1 1 P
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X Pin_5 5 -200 200 150 R 50 50 1 1 P
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X Pin_6 6 -200 100 150 R 50 50 1 1 P
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X Pin_7 7 -200 0 150 R 50 50 1 1 P
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X Pin_8 8 -200 -100 150 R 50 50 1 1 P
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X Pin_9 9 -200 -200 150 R 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_C
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#
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DEF Device_C C 0 10 N Y 1 F N
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F0 "C" 25 100 50 H V L CNN
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F1 "Device_C" 25 -100 50 H V L CNN
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F2 "" 38 -150 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 20 -80 -30 80 -30 N
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P 2 0 1 20 -80 30 80 30 N
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X ~ 1 0 150 110 D 50 50 1 1 P
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X ~ 2 0 -150 110 U 50 50 1 1 P
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||||
ENDDRAW
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||||
ENDDEF
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#
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# Device_C_Small
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#
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DEF Device_C_Small C 0 10 N N 1 F N
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F0 "C" 10 70 50 H V L CNN
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F1 "Device_C_Small" 10 -80 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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C_*
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$ENDFPLIST
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DRAW
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P 2 0 1 13 -60 -20 60 -20 N
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P 2 0 1 12 -60 20 60 20 N
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||||
X ~ 1 0 100 80 D 50 50 1 1 P
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||||
X ~ 2 0 -100 80 U 50 50 1 1 P
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||||
ENDDRAW
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ENDDEF
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#
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# Device_Crystal_GND24
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#
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DEF Device_Crystal_GND24 Y 0 40 Y N 1 F N
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F0 "Y" 125 200 50 H V L CNN
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F1 "Device_Crystal_GND24" 125 125 50 H V L CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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Crystal*
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$ENDFPLIST
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DRAW
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S -45 100 45 -100 0 1 12 N
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P 2 0 1 0 -100 0 -80 0 N
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P 2 0 1 20 -80 -50 -80 50 N
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P 2 0 1 0 0 -150 0 -140 N
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P 2 0 1 0 0 140 0 150 N
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P 2 0 1 20 80 -50 80 50 N
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P 2 0 1 0 80 0 100 0 N
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P 4 0 1 0 -100 -90 -100 -140 100 -140 100 -90 N
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P 4 0 1 0 -100 90 -100 140 100 140 100 90 N
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X 1 1 -150 0 50 R 50 50 1 1 P
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X 2 2 0 200 50 D 50 50 1 1 P
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X 3 3 150 0 50 L 50 50 1 1 P
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X 4 4 0 -200 50 U 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_D
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#
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DEF Device_D D 0 40 N N 1 F N
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F0 "D" 0 100 50 H V C CNN
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F1 "Device_D" 0 -100 50 H V C CNN
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F2 "" 0 0 50 H I C CNN
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F3 "" 0 0 50 H I C CNN
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$FPLIST
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TO-???*
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*_Diode_*
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*SingleDiode*
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D_*
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$ENDFPLIST
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DRAW
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P 2 0 1 10 -50 50 -50 -50 N
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P 2 0 1 0 50 0 -50 0 N
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P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
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||||
X K 1 -150 0 100 R 50 50 1 1 P
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X A 2 150 0 100 L 50 50 1 1 P
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ENDDRAW
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ENDDEF
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#
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# Device_L
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#
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DEF Device_L L 0 40 N N 1 F N
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F0 "L" -50 0 50 V V C CNN
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F1 "Device_L" 75 0 50 V V C CNN
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F2 "" 0 0 50 H I C CNN
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||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
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Choke_*
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*Coil*
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||||
Inductor_*
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L_*
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||||
$ENDFPLIST
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DRAW
|
||||
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
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A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
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A 0 25 25 -899 899 0 1 0 N 0 0 0 50
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A 0 75 25 -899 899 0 1 0 N 0 50 0 100
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X 1 1 0 150 50 D 50 50 1 1 P
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X 2 2 0 -150 50 U 50 50 1 1 P
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||||
ENDDRAW
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||||
ENDDEF
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#
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# Device_R
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#
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DEF Device_R R 0 0 N Y 1 F N
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F0 "R" 80 0 50 V V C CNN
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F1 "Device_R" 0 0 50 V V C CNN
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F2 "" -70 0 50 V I C CNN
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F3 "" 0 0 50 H I C CNN
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||||
$FPLIST
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R_*
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||||
$ENDFPLIST
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DRAW
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S -40 -100 40 100 0 1 10 N
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X ~ 1 0 150 50 D 50 50 1 1 P
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||||
X ~ 2 0 -150 50 U 50 50 1 1 P
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||||
ENDDRAW
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||||
ENDDEF
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||||
#
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# Memory_EEPROM_M24C02-RMN
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#
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DEF Memory_EEPROM_M24C02-RMN U 0 20 Y Y 1 F N
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F0 "U" -250 250 50 H V C CNN
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F1 "Memory_EEPROM_M24C02-RMN" 300 250 50 H V C CNN
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F2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" 0 350 50 H I C CNN
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F3 "" 50 -500 50 H I C CNN
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ALIAS M24C01-WMN M24C01-RMN M24C01-FMN M24C02-RMN M24C02-FMN
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$FPLIST
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SOIC*3.9x4.9mm*P1.27mm*
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$ENDFPLIST
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DRAW
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||||
S -300 200 300 -200 0 1 10 f
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||||
X E0 1 -400 100 100 R 50 50 1 1 I
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||||
X E1 2 -400 0 100 R 50 50 1 1 I
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||||
X E2 3 -400 -100 100 R 50 50 1 1 I
|
||||
X VSS 4 0 -300 100 U 50 50 1 1 W
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||||
X SDA 5 400 100 100 L 50 50 1 1 B
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X SCL 6 400 0 100 L 50 50 1 1 I
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X ~WC 7 400 -100 100 L 50 50 1 1 I
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||||
X VCC 8 0 300 100 D 50 50 1 1 W
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||||
ENDDRAW
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||||
ENDDEF
|
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#
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# Oscillator_Si5351A-B-GT
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#
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DEF Oscillator_Si5351A-B-GT U 0 20 Y Y 1 F N
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F0 "U" -350 450 50 H V C CNN
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F1 "Oscillator_Si5351A-B-GT" -500 -500 50 H V C CNN
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||||
F2 "Package_SO:MSOP-10_3x3mm_P0.5mm" 0 -800 50 H I C CNN
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||||
F3 "" -350 -100 50 H I C CNN
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||||
$FPLIST
|
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MSOP*3x3mm*P0.5mm*
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||||
$ENDFPLIST
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DRAW
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||||
S -400 400 400 -400 0 1 10 f
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||||
X VDD 1 -100 500 100 D 50 50 1 1 W
|
||||
X CLK0 10 500 200 100 L 50 50 1 1 O
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||||
X XA 2 -500 300 100 R 50 50 1 1 I
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||||
X XB 3 -500 100 100 R 50 50 1 1 I
|
||||
X SCL 4 -500 -200 100 R 50 50 1 1 I
|
||||
X SDA 5 -500 -300 100 R 50 50 1 1 B
|
||||
X CLK2 6 500 -200 100 L 50 50 1 1 O
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||||
X VDDO 7 100 500 100 D 50 50 1 1 W
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||||
X GND 8 0 -500 100 U 50 50 1 1 W
|
||||
X CLK1 9 500 0 100 L 50 50 1 1 O
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||||
ENDDRAW
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||||
ENDDEF
|
||||
#
|
||||
# Regulator_Linear_AZ1117-3.3
|
||||
#
|
||||
DEF Regulator_Linear_AZ1117-3.3 U 0 10 Y Y 1 F N
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||||
F0 "U" -150 125 50 H V C CNN
|
||||
F1 "Regulator_Linear_AZ1117-3.3" 0 125 50 H V L CNN
|
||||
F2 "" 0 250 50 H I C CIN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS AZ1117-1.5 AZ1117-1.8 AZ1117-2.5 AZ1117-2.85 AZ1117-3.3 AZ1117-5.0
|
||||
$FPLIST
|
||||
SOT?223*
|
||||
SOT?89*
|
||||
TO?220*
|
||||
TO?252*
|
||||
TO?263*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -200 75 200 -200 0 1 10 f
|
||||
X GND 1 0 -300 100 U 50 50 1 1 W
|
||||
X VO 2 300 0 100 L 50 50 1 1 w
|
||||
X VI 3 -300 0 100 R 50 50 1 1 W
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Transistor_FET_AO3400A
|
||||
#
|
||||
DEF Transistor_FET_AO3400A Q 0 20 Y N 1 F N
|
||||
F0 "Q" 200 75 50 H V L CNN
|
||||
F1 "Transistor_FET_AO3400A" 200 0 50 H V L CNN
|
||||
F2 "Package_TO_SOT_SMD:SOT-23" 200 -75 50 H I L CIN
|
||||
F3 "" 0 0 50 H I L CNN
|
||||
ALIAS 2N7002 2N7002E 2N7002H 2N7002K BS170F BS870 BSN20 BSS123 BSS127S DMG2302U DMG3402L DMG3404L DMG3406L DMG3414U DMG3418L DMN10H220L DMN10H700S DMN13H750S DMN2041L DMN2050L DMN2056U DMN2058U DMN2075U DMN2230U DMN24H11DS DMN24H3D5L DMN3042L DMN3051L DMN30H4D0L DMN3110S DMN3150L DMN3300U DMN3404L DMN6075S DMN6140L DMN67D7L DMN67D8L MMBF170 VN10LF ZVN3306F ZVN3310F ZVN3320F ZVN4106F ZXM61N02F ZXM61N03F ZXMN10A07F ZXMN2A01F ZXMN2A14F ZXMN2B01F ZXMN2B14FH ZXMN2F30FH ZXMN2F34FH ZXMN3A01F ZXMN3A14F ZXMN3B01F ZXMN3B14F ZXMN3F30FH ZXMN6A07F IRLML0030 IRLML2060 TSM2302CX AO3400A
|
||||
$FPLIST
|
||||
SOT?23*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
C 65 0 110 0 1 10 N
|
||||
C 100 -70 10 0 1 0 F
|
||||
C 100 70 10 0 1 0 F
|
||||
P 2 0 1 0 10 0 -100 0 N
|
||||
P 2 0 1 10 10 75 10 -75 N
|
||||
P 2 0 1 10 30 -50 30 -90 N
|
||||
P 2 0 1 10 30 20 30 -20 N
|
||||
P 2 0 1 10 30 90 30 50 N
|
||||
P 2 0 1 0 100 100 100 70 N
|
||||
P 3 0 1 0 100 -100 100 0 30 0 N
|
||||
P 4 0 1 0 30 -70 130 -70 130 70 30 70 N
|
||||
P 4 0 1 0 40 0 80 15 80 -15 40 0 F
|
||||
P 4 0 1 0 110 20 115 15 145 15 150 10 N
|
||||
P 4 0 1 0 130 15 115 -10 145 -10 130 15 N
|
||||
X G 1 -200 0 100 R 50 50 1 1 I
|
||||
X S 2 100 -200 100 U 50 50 1 1 P
|
||||
X D 3 100 200 100 D 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# cesco_STM32G431KBTx
|
||||
#
|
||||
DEF cesco_STM32G431KBTx U 0 50 Y Y 1 F N
|
||||
F0 "U" 0 100 50 H V C CNN
|
||||
F1 "cesco_STM32G431KBTx" 0 -100 50 H V C CNN
|
||||
F2 "LQFP32" 0 -200 50 H V C CIN
|
||||
F3 "" 0 0 50 H V C CNN
|
||||
DRAW
|
||||
S -850 750 700 -700 0 1 0 N
|
||||
X VDD 1 -1150 550 300 R 50 50 1 1 W
|
||||
X PA5 10 -400 -1000 300 U 50 50 1 1 B
|
||||
X PA6 11 -250 -1000 300 U 50 50 1 1 B
|
||||
X PA7 12 -100 -1000 300 U 50 50 1 1 B
|
||||
X PB0 13 50 -1000 300 U 50 50 1 1 B
|
||||
X VSSA 14 200 -1000 300 U 50 50 1 1 W
|
||||
X VDDA 15 350 -1000 300 U 50 50 1 1 W
|
||||
X VSS 16 500 -1000 300 U 50 50 1 1 W
|
||||
X VDD 17 1000 -500 300 L 50 50 1 1 W
|
||||
X PA8 18 1000 -350 300 L 50 50 1 1 B
|
||||
X PA9 19 1000 -200 300 L 50 50 1 1 B
|
||||
X PF0 2 -1150 400 300 R 50 50 1 1 B
|
||||
X PA10 20 1000 -50 300 L 50 50 1 1 B
|
||||
X PA11 21 1000 100 300 L 50 50 1 1 B
|
||||
X PA12 22 1000 250 300 L 50 50 1 1 B
|
||||
X PA13 23 1000 400 300 L 50 50 1 1 B
|
||||
X PA14 24 1000 550 300 L 50 50 1 1 B
|
||||
X PA15 25 450 1050 300 D 50 50 1 1 B
|
||||
X PB3 26 300 1050 300 D 50 50 1 1 B
|
||||
X PB4 27 150 1050 300 D 50 50 1 1 B
|
||||
X PB5 28 0 1050 300 D 50 50 1 1 B
|
||||
X PB6 29 -150 1050 300 D 50 50 1 1 B
|
||||
X PF1 3 -1150 250 300 R 50 50 1 1 B
|
||||
X PB7 30 -300 1050 300 D 50 50 1 1 B
|
||||
X PB8 31 -450 1050 300 D 50 50 1 1 B
|
||||
X VSS 32 -600 1050 300 D 50 50 1 1 W
|
||||
X PG10 4 -1150 100 300 R 50 50 1 1 B
|
||||
X PA0 5 -1150 -50 300 R 50 50 1 1 B
|
||||
X PA1 6 -1150 -200 300 R 50 50 1 1 B
|
||||
X PA2 7 -1150 -350 300 R 50 50 1 1 B
|
||||
X PA3 8 -1150 -500 300 R 50 50 1 1 B
|
||||
X PA4 9 -550 -1000 300 U 50 50 1 1 B
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+12V
|
||||
#
|
||||
DEF power_+12V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+12V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +12V 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3V
|
||||
#
|
||||
DEF power_+3.3V #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3V" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS +3.3V
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3V3 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_+3.3VA
|
||||
#
|
||||
DEF power_+3.3VA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -150 50 H I C CNN
|
||||
F1 "power_+3.3VA" 0 140 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 2 0 1 0 -30 50 0 100 N
|
||||
P 2 0 1 0 0 0 0 100 N
|
||||
P 2 0 1 0 0 100 30 50 N
|
||||
X +3.3VA 1 0 0 0 U 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GNDA
|
||||
#
|
||||
DEF power_GNDA #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GNDA" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GNDA 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
2500
schemi/bassofono.kicad_pcb
Normal file
2500
schemi/bassofono.kicad_pcb
Normal file
File diff suppressed because it is too large
Load Diff
2242
schemi/bassofono.kicad_pcb-bak
Normal file
2242
schemi/bassofono.kicad_pcb-bak
Normal file
File diff suppressed because it is too large
Load Diff
241
schemi/bassofono.pro
Normal file
241
schemi/bassofono.pro
Normal file
@@ -0,0 +1,241 @@
|
||||
update=ven 24 dic 2021, 14:52:25
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.2
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.2
|
||||
TrackWidth3=0.5
|
||||
TrackWidth4=1
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.05
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0
|
||||
SolderMaskMinWidth=0
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.2
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
1419
schemi/bassofono.sch
Normal file
1419
schemi/bassofono.sch
Normal file
File diff suppressed because it is too large
Load Diff
1300
schemi/bassofono.sch-bak
Normal file
1300
schemi/bassofono.sch-bak
Normal file
File diff suppressed because it is too large
Load Diff
@@ -1,96 +0,0 @@
|
||||
EESchema-LIBRARY Version 2.4
|
||||
#encoding utf-8
|
||||
#
|
||||
# 74xGxx_74LVC2G04
|
||||
#
|
||||
DEF 74xGxx_74LVC2G04 U 0 40 Y Y 2 F N
|
||||
F0 "U" -100 150 50 H V C CNN
|
||||
F1 "74xGxx_74LVC2G04" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
ALIAS 74AUC2G04 74LVC2GU04 74AUC2GU04
|
||||
$FPLIST
|
||||
SG-*
|
||||
SOT*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 4 0 1 10 -150 100 -150 -100 100 0 -150 100 N
|
||||
X GND 2 0 -100 0 D 40 40 0 1 W N
|
||||
X VCC 5 0 100 0 U 40 40 0 1 W N
|
||||
X ~ 1 -300 0 150 R 40 40 1 1 I
|
||||
X ~ 6 250 0 150 L 40 40 1 1 O I
|
||||
X ~ 3 -300 0 150 R 40 40 2 1 I
|
||||
X ~ 4 250 0 150 L 40 40 2 1 O I
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_C
|
||||
#
|
||||
DEF Device_C C 0 10 N Y 1 F N
|
||||
F0 "C" 25 100 50 H V L CNN
|
||||
F1 "Device_C" 25 -100 50 H V L CNN
|
||||
F2 "" 38 -150 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
C_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
P 2 0 1 20 -80 -30 80 -30 N
|
||||
P 2 0 1 20 -80 30 80 30 N
|
||||
X ~ 1 0 150 110 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 110 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_Crystal
|
||||
#
|
||||
DEF Device_Crystal Y 0 40 N N 1 F N
|
||||
F0 "Y" 0 150 50 H V C CNN
|
||||
F1 "Device_Crystal" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
Crystal*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -45 100 45 -100 0 1 12 N
|
||||
P 2 0 1 0 -100 0 -75 0 N
|
||||
P 2 0 1 20 -75 -50 -75 50 N
|
||||
P 2 0 1 20 75 -50 75 50 N
|
||||
P 2 0 1 0 100 0 75 0 N
|
||||
X 1 1 -150 0 50 R 50 50 1 1 P
|
||||
X 2 2 150 0 50 L 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# Device_R
|
||||
#
|
||||
DEF Device_R R 0 0 N Y 1 F N
|
||||
F0 "R" 80 0 50 V V C CNN
|
||||
F1 "Device_R" 0 0 50 V V C CNN
|
||||
F2 "" -70 0 50 V I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
$FPLIST
|
||||
R_*
|
||||
$ENDFPLIST
|
||||
DRAW
|
||||
S -40 -100 40 100 0 1 10 N
|
||||
X ~ 1 0 150 50 D 50 50 1 1 P
|
||||
X ~ 2 0 -150 50 U 50 50 1 1 P
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
# power_GND
|
||||
#
|
||||
DEF power_GND #PWR 0 0 Y Y 1 F P
|
||||
F0 "#PWR" 0 -250 50 H I C CNN
|
||||
F1 "power_GND" 0 -150 50 H V C CNN
|
||||
F2 "" 0 0 50 H I C CNN
|
||||
F3 "" 0 0 50 H I C CNN
|
||||
DRAW
|
||||
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
|
||||
X GND 1 0 0 0 D 50 50 1 1 W N
|
||||
ENDDRAW
|
||||
ENDDEF
|
||||
#
|
||||
#End Library
|
||||
@@ -1 +0,0 @@
|
||||
(kicad_pcb (version 4) (host kicad "dummy file") )
|
||||
@@ -1,33 +0,0 @@
|
||||
update=22/05/2015 07:44:53
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
@@ -1,128 +0,0 @@
|
||||
EESchema Schematic File Version 4
|
||||
EELAYER 30 0
|
||||
EELAYER END
|
||||
$Descr A4 11693 8268
|
||||
encoding utf-8
|
||||
Sheet 1 1
|
||||
Title ""
|
||||
Date ""
|
||||
Rev ""
|
||||
Comp ""
|
||||
Comment1 ""
|
||||
Comment2 ""
|
||||
Comment3 ""
|
||||
Comment4 ""
|
||||
$EndDescr
|
||||
$Comp
|
||||
L 74xGxx:74LVC2G04 U?
|
||||
U 1 1 609B1631
|
||||
P 1950 1500
|
||||
F 0 "U?" H 1925 1767 50 0000 C CNN
|
||||
F 1 "74LVC2G04" H 1925 1676 50 0000 C CNN
|
||||
F 2 "" H 1950 1500 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf" H 1950 1500 50 0001 C CNN
|
||||
1 1950 1500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L 74xGxx:74LVC2G04 U?
|
||||
U 2 1 609B2C8B
|
||||
P 2500 1500
|
||||
F 0 "U?" H 2475 1767 50 0000 C CNN
|
||||
F 1 "74LVC2G04" H 2475 1676 50 0000 C CNN
|
||||
F 2 "" H 2500 1500 50 0001 C CNN
|
||||
F 3 "http://www.ti.com/lit/sg/scyt129e/scyt129e.pdf" H 2500 1500 50 0001 C CNN
|
||||
2 2500 1500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:Crystal Y?
|
||||
U 1 1 609B38A2
|
||||
P 1950 2000
|
||||
F 0 "Y?" H 1950 2268 50 0000 C CNN
|
||||
F 1 "10.6MHz" H 1950 2177 50 0000 C CNN
|
||||
F 2 "" H 1950 2000 50 0001 C CNN
|
||||
F 3 "~" H 1950 2000 50 0001 C CNN
|
||||
1 1950 2000
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:R R?
|
||||
U 1 1 609B458B
|
||||
P 1900 950
|
||||
F 0 "R?" V 1693 950 50 0000 C CNN
|
||||
F 1 "1M" V 1784 950 50 0000 C CNN
|
||||
F 2 "" V 1830 950 50 0001 C CNN
|
||||
F 3 "~" H 1900 950 50 0001 C CNN
|
||||
1 1900 950
|
||||
0 1 1 0
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 609B58D5
|
||||
P 1650 2500
|
||||
F 0 "#PWR?" H 1650 2250 50 0001 C CNN
|
||||
F 1 "GND" H 1655 2327 50 0000 C CNN
|
||||
F 2 "" H 1650 2500 50 0001 C CNN
|
||||
F 3 "" H 1650 2500 50 0001 C CNN
|
||||
1 1650 2500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
Wire Wire Line
|
||||
1800 2000 1650 2000
|
||||
Wire Wire Line
|
||||
1650 2000 1650 2200
|
||||
Wire Wire Line
|
||||
2200 1500 2200 2000
|
||||
Wire Wire Line
|
||||
2100 2000 2200 2000
|
||||
Connection ~ 2200 2000
|
||||
Wire Wire Line
|
||||
2200 2000 2200 2200
|
||||
Wire Wire Line
|
||||
1650 2000 1650 1500
|
||||
Wire Wire Line
|
||||
1650 950 1750 950
|
||||
Connection ~ 1650 2000
|
||||
Connection ~ 1650 1500
|
||||
Wire Wire Line
|
||||
1650 1500 1650 950
|
||||
Wire Wire Line
|
||||
2050 950 2200 950
|
||||
Wire Wire Line
|
||||
2200 950 2200 1500
|
||||
Connection ~ 2200 1500
|
||||
$Comp
|
||||
L Device:C C?
|
||||
U 1 1 609BBCA3
|
||||
P 1650 2350
|
||||
F 0 "C?" H 1765 2396 50 0000 L CNN
|
||||
F 1 "22p" H 1765 2305 50 0000 L CNN
|
||||
F 2 "" H 1688 2200 50 0001 C CNN
|
||||
F 3 "~" H 1650 2350 50 0001 C CNN
|
||||
1 1650 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L Device:C C?
|
||||
U 1 1 609BC44D
|
||||
P 2200 2350
|
||||
F 0 "C?" H 2315 2396 50 0000 L CNN
|
||||
F 1 "22p" H 2315 2305 50 0000 L CNN
|
||||
F 2 "" H 2238 2200 50 0001 C CNN
|
||||
F 3 "~" H 2200 2350 50 0001 C CNN
|
||||
1 2200 2350
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$Comp
|
||||
L power:GND #PWR?
|
||||
U 1 1 609B62B6
|
||||
P 2200 2500
|
||||
F 0 "#PWR?" H 2200 2250 50 0001 C CNN
|
||||
F 1 "GND" H 2205 2327 50 0000 C CNN
|
||||
F 2 "" H 2200 2500 50 0001 C CNN
|
||||
F 3 "" H 2200 2500 50 0001 C CNN
|
||||
1 2200 2500
|
||||
1 0 0 -1
|
||||
$EndComp
|
||||
$EndSCHEMATC
|
||||
@@ -1,4 +0,0 @@
|
||||
EESchema Schematic File Version 2
|
||||
EELAYER 25 0
|
||||
EELAYER END
|
||||
$EndSCHEMATC
|
||||
@@ -1 +0,0 @@
|
||||
0
|
||||
@@ -1 +0,0 @@
|
||||
(kicad_pcb (version 4) (host kicad "dummy file") )
|
||||
@@ -1,33 +0,0 @@
|
||||
update=22/05/2015 07:44:53
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[pcbnew]
|
||||
version=1
|
||||
LastNetListRead=
|
||||
UseCmpFile=1
|
||||
PadDrill=0.600000000000
|
||||
PadDrillOvalY=0.600000000000
|
||||
PadSizeH=1.500000000000
|
||||
PadSizeV=1.500000000000
|
||||
PcbTextSizeV=1.500000000000
|
||||
PcbTextSizeH=1.500000000000
|
||||
PcbTextThickness=0.300000000000
|
||||
ModuleTextSizeV=1.000000000000
|
||||
ModuleTextSizeH=1.000000000000
|
||||
ModuleTextSizeThickness=0.150000000000
|
||||
SolderMaskClearance=0.000000000000
|
||||
SolderMaskMinWidth=0.000000000000
|
||||
DrawSegmentWidth=0.200000000000
|
||||
BoardOutlineThickness=0.100000000000
|
||||
ModuleOutlineThickness=0.150000000000
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
@@ -1,4 +0,0 @@
|
||||
EESchema Schematic File Version 2
|
||||
EELAYER 25 0
|
||||
EELAYER END
|
||||
$EndSCHEMATC
|
||||
1947
schemi/fp-info-cache
Normal file
1947
schemi/fp-info-cache
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user