From 6d0c31556ac332c4aa604f780bad2c6d66d39eee Mon Sep 17 00:00:00 2001 From: nzasch <> Date: Wed, 12 Jan 2022 01:09:32 +0100 Subject: [PATCH] fix interfaccia --- README.md | 2 +- codice/.mxproject | 6 +- codice/Core/Inc/bassofono.h | 16 +- codice/Core/Inc/interface.h | 2 +- codice/Core/Inc/main.h | 2 +- codice/Core/Inc/rx.h | 1 + codice/Core/Inc/si5351.h | 7 + codice/Core/Inc/tx.h | 10 +- codice/Core/Src/bassofono.c | 21 +- codice/Core/Src/interface.c | 31 +- codice/Core/Src/main.c | 34 +- codice/Core/Src/rx.c | 8 +- codice/Core/Src/si5351.c | 22 +- codice/Core/Src/tx.c | 15 + .../Device/ST/STM32G4xx/Include/stm32g431xx.h | 37 +- .../Device/ST/STM32G4xx/Include/stm32g441xx.h | 37 +- .../Device/ST/STM32G4xx/Include/stm32g471xx.h | 230 +- .../Device/ST/STM32G4xx/Include/stm32g473xx.h | 37 +- .../Device/ST/STM32G4xx/Include/stm32g474xx.h | 264 +- .../Device/ST/STM32G4xx/Include/stm32g483xx.h | 37 +- .../Device/ST/STM32G4xx/Include/stm32g484xx.h | 264 +- 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schemi/bassofono-backups/bassofono-2022-01-11_170854.zip create mode 100644 schemi/bassofono-backups/bassofono-2022-01-11_171854.zip create mode 100644 schemi/bassofono-backups/bassofono-2022-01-11_172854.zip create mode 100644 schemi/bassofono-backups/bassofono-2022-01-11_173854.zip create mode 100644 schemi/bassofono-backups/bassofono-2022-01-11_174930.zip create mode 100644 schemi/bassofono.kicad_prl create mode 100644 schemi/bassofono.kicad_pro create mode 100644 schemi/bassofono.kicad_sch create mode 100644 tools/FFTCode.c create mode 100755 tools/a.out create mode 100644 tools/fir_generate.c create mode 100644 tools/rb_test.c create mode 100644 tools/test_firgen.c create mode 100644 tools/tone_generator.c diff --git a/README.md b/README.md index da90bb9..62c102a 100644 --- a/README.md +++ b/README.md @@ -15,6 +15,6 @@ con frequenza intermedia minore di 150khz, oppure in undersampling a 455khz. * Controllo del guadagno di ingresso su 6 step * 1 LO in onda quadra complementare * 1 LO in onda quadra semplice -* FIltro audio regolabile +* Filtro audio configurabile * S-Meter diff --git a/codice/.mxproject b/codice/.mxproject index 4b52b10..520ba6e 100644 --- a/codice/.mxproject +++ b/codice/.mxproject @@ -1,9 +1,9 @@ [PreviousLibFiles] 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[PreviousUsedMakefileFiles] -SourceFiles=Core/Src/main.c;Core/Src/stm32g4xx_it.c;Core/Src/stm32g4xx_hal_msp.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;Core/Src/system_stm32g4xx.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;Core/Src/system_stm32g4xx.c;Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;; -HeaderPath=Drivers/STM32G4xx_HAL_Driver/Inc;Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32G4xx/Include;Drivers/CMSIS/Include;Middlewares\Third_Party\ARM_CMSIS\CMSIS\Core\Include\;Middlewares\Third_Party\ARM_CMSIS\CMSIS\Core_A\Include\;Middlewares\Third_Party\ARM_CMSIS\CMSIS\DSP\PrivateInclude\;Middlewares\Third_Party\ARM_CMSIS\CMSIS\DSP\Include;Core/Inc; +SourceFiles=Core/Src/main.c;Core/Src/stm32g4xx_it.c;Core/Src/stm32g4xx_hal_msp.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c;Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;Core/Src/system_stm32g4xx.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c;Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c;Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c;Core/Src/system_stm32g4xx.c;;; +HeaderPath=Drivers/STM32G4xx_HAL_Driver/Inc;Drivers/STM32G4xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32G4xx/Include;Drivers/CMSIS/Include;Middlewares/Third_Party/ARM_CMSIS/CMSIS/Core/Include/;Middlewares/Third_Party/ARM_CMSIS/CMSIS/Core_A/Include/;Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/PrivateInclude/;Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include;Core/Inc; CDefines=USE_HAL_DRIVER;STM32G431xx;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] diff --git a/codice/Core/Inc/bassofono.h b/codice/Core/Inc/bassofono.h index 820ea51..eedc0b6 100644 --- a/codice/Core/Inc/bassofono.h +++ b/codice/Core/Inc/bassofono.h @@ -45,7 +45,10 @@ #define MOD_DC 0 #define MOD_LSB 1 #define MOD_USB 2 -#define MOD_AM 3 +#define MOD_CWL 3 +#define MOD_CWU 4 +#define MOD_AM 5 +#define MOD_FM 6 #define STATUS_RX 0 #define STATUS_TX 1 @@ -72,7 +75,7 @@ extern uint32_t frequency; extern int32_t rit; extern uint16_t pwm_tx_period; extern int32_t modulation; -extern int32_t gain; +extern int32_t rx_gain; extern int32_t peak, oldpeak, peakset; extern int32_t volume; extern int32_t squelch; @@ -111,9 +114,16 @@ extern q31_t lf_buffer[2][LF_BUFFER_SIZE]; // ======== FUNZIONI ======== +void start_transmit(void); +void stop_transmit(void); +void start_receive(void); +void stop_receive(void); + +void set_rx_gain(void); + int32_t set_nco1_freq(int32_t freq); -void set_filter(void); +// void set_filter(void); void set_frequency(void); void set_modulation(void); void set_dummy (void); diff --git a/codice/Core/Inc/interface.h b/codice/Core/Inc/interface.h index 6ffdf75..14b43a8 100644 --- a/codice/Core/Inc/interface.h +++ b/codice/Core/Inc/interface.h @@ -82,7 +82,7 @@ struct menu_item { extern uint8_t menu_item, menu_page; extern uint8_t menu_last_item[MENU_PAGE_EOM + 1]; -extern char modulation_list[4][4]; +extern char modulation_list[][4]; extern char status_list[3][3]; extern struct menu_item items[]; diff --git a/codice/Core/Inc/main.h b/codice/Core/Inc/main.h index 1918a6b..a4a67a0 100644 --- a/codice/Core/Inc/main.h +++ b/codice/Core/Inc/main.h @@ -54,7 +54,7 @@ extern "C" { void Error_Handler(void); /* USER CODE BEGIN EFP */ -void set_gain(void); +// void set_rx_gain(void); /* USER CODE END EFP */ diff --git a/codice/Core/Inc/rx.h b/codice/Core/Inc/rx.h index 4636b16..f7c9865 100644 --- a/codice/Core/Inc/rx.h +++ b/codice/Core/Inc/rx.h @@ -78,6 +78,7 @@ void am_demodulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out); // filtri // void filter_init(void); +void set_rx_audio_filter(void); void st2_filter_init(void); void audio_filter_init(void); void audio_filter_generate_coeffs(int32_t *Coeffs, uint32_t freq, uint32_t bw, uint8_t beta); diff --git a/codice/Core/Inc/si5351.h b/codice/Core/Inc/si5351.h index 1574627..2a85ebe 100644 --- a/codice/Core/Inc/si5351.h +++ b/codice/Core/Inc/si5351.h @@ -5,6 +5,8 @@ #define SI5351_MIN_FREQ 3000 #define SI5351_MAX_FREQ 200000000 +// #### registri #### + #define SI5351_OUT_ENABLE 3 #define SI5351_OUT_DIS_STATE 24 @@ -25,3 +27,8 @@ #define SI5351_CRYSTAL_LOAD 183 extern I2C_HandleTypeDef hi2c1; + +void si53531_initialize(void); +void si53531_set_frequency(uint32_t freq, uint8_t synth); +void si5351_off(void); +void si5351_on(void); diff --git a/codice/Core/Inc/tx.h b/codice/Core/Inc/tx.h index 3bdbd4d..29b32cb 100644 --- a/codice/Core/Inc/tx.h +++ b/codice/Core/Inc/tx.h @@ -4,12 +4,15 @@ #include #include +#define CW_TONE_INCREMENT 0.15 +#define CW_TONE_VOLUME 2 + #define TX_TYPE_NONE 0 #define TX_TYPE_DAC 1 #define TX_TYPE_PWM 2 #define TX_TYPE_SI5351 3 -// #define TX_TYPE TX_TYPE_SI5351 -#define TX_TYPE TX_TYPE_NONE +#define TX_TYPE TX_TYPE_SI5351 +// #define TX_TYPE TX_TYPE_NONE #define TX_AUDIO_FILTER_INTERPOLATION_FACTOR (16) #define TX_AUDIO_FILTER_BLOCK_SIZE (1024) @@ -43,4 +46,7 @@ void ssb_modulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out, q31_t nc void dc_modulator(q31_t *in, uint16_t size, q31_t *out); void am_modulator(q31_t *in_I, q31_t *in_Q, uint16_t size, q31_t *out); +uint16_t u12_sine(void); +void generate_tone(q31_t *buffer, uint16_t buffer_size); + #endif diff --git a/codice/Core/Src/bassofono.c b/codice/Core/Src/bassofono.c index d1f56fe..7820f52 100644 --- a/codice/Core/Src/bassofono.c +++ b/codice/Core/Src/bassofono.c @@ -37,7 +37,7 @@ uint32_t frequency; int32_t rit; uint16_t pwm_tx_period; int32_t modulation; -int32_t gain; +int32_t rx_gain; int32_t peak, oldpeak, peakset; int32_t volume; int32_t squelch; @@ -79,8 +79,8 @@ q31_t tx_dac_buffer[2][TX_DAC_BUFFER_SIZE]; int32_t set_nco1_freq(int32_t freq){ int64_t tmp_increment; - if(modulation == MOD_USB) freq += (NCO2_FREQUENCY); - else if(modulation == MOD_LSB) freq -= (NCO2_FREQUENCY); + if(modulation == MOD_USB || modulation == MOD_CWU) freq += (NCO2_FREQUENCY); + else if(modulation == MOD_LSB || modulation == MOD_CWL) freq -= (NCO2_FREQUENCY); tmp_increment = ((int64_t)freq * 0x100000000LL)/RX_ADC_SAMPLE_RATE; return (int32_t)tmp_increment; } @@ -130,14 +130,15 @@ void set_frequency(void){ pwm_tx_period = get_pwm_period(frequency); } else if(TX_TYPE == TX_TYPE_SI5351){ - si53531_set_frequency(frequency); + si53531_set_frequency(frequency, 0); } } +/* void set_filter(void){ audio_filter_generate_coeffs(audio_filter_coeffs, audio_filter_freq, audio_filter_bw, audio_filter_beta); } - +*/ void set_modulation(void){ st2_filter_init(); // cambia offset @@ -162,11 +163,11 @@ uint8_t get_changed(uint8_t state){ } void state_set_default(void){ - modulation = MOD_USB; + modulation = MOD_CWU; frequency = 128000; rit = 0; set_frequency(); - gain = 2; + rx_gain = 2; volume = 8; audio_filter_freq = RX_AUDIO_FILTER_FREQ_DEF; audio_filter_bw = RX_AUDIO_FILTER_BW_DEF; @@ -184,7 +185,7 @@ void diag(void){ uart_tx_buf_in_idx += sprintf(uart_tx_buf,"1st out sample rate: %d\n", ST1_OUT_SAMPLE_RATE); uart_tx_buf_in_idx += sprintf(uart_tx_buf,"2st buffer size: %d\n2st decimation factor: %d\n", ST2_BUFFER_SIZE, ST2_DECIMATION_FACTOR * 2); uart_tx_buf_in_idx += sprintf(uart_tx_buf,"2st out sample rate: %d\n", ST2_OUT_SAMPLE_RATE); - uart_tx_buf_in_idx += sprintf(uart_tx_buf,"in gain %d\n", gain); + uart_tx_buf_in_idx += sprintf(uart_tx_buf,"in rx_gain %d\n", rx_gain); uart_tx_buf_in_idx += sprintf(uart_tx_buf,"af gain %d\n", volume); uart_tx_buf_in_idx += sprintf(uart_tx_buf,"rx nco1 inc %d\n", rx_nco1_increment); uart_tx_buf_in_idx += sprintf(uart_tx_buf,"nco2 inc %d\n", NCO2_INCREMENT); @@ -216,3 +217,7 @@ uint8_t measure_log_abs_mean(q31_t *samples, uint16_t size){ } return log_sig; } + +void set_LO_freq(uint32_t freq){ + +} diff --git a/codice/Core/Src/interface.c b/codice/Core/Src/interface.c index e6e8fc1..cf5259f 100644 --- a/codice/Core/Src/interface.c +++ b/codice/Core/Src/interface.c @@ -32,18 +32,18 @@ struct menu_item { // name, type, size,row,col,step, min, max, wrap suffix *varptr, set_function_ptr print_function_ptr struct menu_item items[] = { - {MENU_PAGE_DEFAULT, " Frequency", TYP_INT, 9, 1, 0, 100, 1000, 175000, WRAP, "", " Hz", &frequency, &set_frequency, &print_frequency}, + {MENU_PAGE_DEFAULT, " Frequency", TYP_INT, 9, 1, 0, 100, 1000, 1750000,WRAP, "", " Hz", &frequency, &set_frequency, &print_frequency}, // {MENU_PAGE_DEFAULT, " Rit ", TYP_INT, 4, 2, 0, 10, 0, 9999, SAT, "", "", &rit, &set_frequency, &print_frequency}, {MENU_PAGE_DEFAULT, " Volume ", TYP_INT, 5, 2, 0, 1, 0, 32, SAT, "", "|", &volume, &set_dummy, &print_bar}, - {MENU_PAGE_DEFAULT, " Gain ", TYP_INT, 1, 2, 7, 1, 1, 6, SAT, "", "x", &gain, &set_gain, &print_integer}, - {MENU_PAGE_DEFAULT, " Modulation", TYP_INT, 3, 2, 10, 1, 0, 3, WRAP, "", "", &modulation, &set_modulation,&print_modulation}, + {MENU_PAGE_DEFAULT, " Gain ", TYP_INT, 1, 2, 7, 1, 1, 6, SAT, "", "x", &rx_gain, &set_rx_gain, &print_integer}, + {MENU_PAGE_DEFAULT, " Modulation", TYP_INT, 3, 2, 10, 1, 0, 6, WRAP, "", "", &modulation, &set_modulation,&print_modulation}, // {MENU_PAGE_DEFAULT, " Squelch ", TYP_INT, 2, 3, 10, 1, 0, 32, SAT, "", "", &squelch, &set_dummy, &print_integer}, - {MENU_PAGE_AUDIO, " Filter CF ", TYP_INT, 4, 1, 0, 50, 50, 3500, SAT, "", " Hz", &audio_filter_freq, &set_filter, &print_integer}, - {MENU_PAGE_AUDIO, " Filter BW ", TYP_INT, 4, 2, 0, 50, 50, 2500, SAT, "", " Hz", &audio_filter_bw, &set_filter, &print_integer}, - {MENU_PAGE_AUDIO, " Filter Q ", TYP_INT, 2, 3, 0, 1, 1, 32, SAT, "", " Q", &audio_filter_beta, &set_filter, &print_integer}, + {MENU_PAGE_AUDIO, " Filter CF ", TYP_INT, 4, 1, 0, 50, 50, 3500, SAT, "", " Hz", &audio_filter_freq, &set_rx_audio_filter, &print_integer}, + {MENU_PAGE_AUDIO, " Filter BW ", TYP_INT, 4, 2, 0, 50, 50, 2500, SAT, "", " Hz", &audio_filter_bw, &set_rx_audio_filter, &print_integer}, + {MENU_PAGE_AUDIO, " Filter Q ", TYP_INT, 2, 3, 0, 1, 1, 32, SAT, "", " Q", &audio_filter_beta, &set_rx_audio_filter, &print_integer}, - {MENU_PAGE_ALL, " Signal ", TYP_NED, 13, 4, 0, 0, 0, 0, SAT, "S", "", &s_meter, &set_dummy, &print_bar}, + {MENU_PAGE_ALL, " Signal ", TYP_NED, 13, 4, 0, 0, 0, 0, SAT, "S", "", &s_meter, &set_dummy, &print_bar}, {MENU_PAGE_ALL, " TX tab ", TYP_NED, 3, 5, 0, 0, 0, 0, SAT, "", "", "PTT", &set_dummy, &print_string}, {MENU_PAGE_ALL, " Tabs ", TYP_NED, 3, 5, 4, 0, 0, 0, SAT, "", "", "SET", &set_dummy, &print_string}, {MENU_PAGE_ALL, " Tabs ", TYP_NED, 2, 5, 9, 0, 0, 0, SAT, "", "", "BL", &set_dummy, &print_string}, @@ -63,7 +63,10 @@ char modulation_list[][4] = { [MOD_DC] = "DC", [MOD_LSB] = "LSB", [MOD_USB] = "USB", - [MOD_AM] = "AM" + [MOD_CWL] = "CWL", + [MOD_CWU] = "CWU", + [MOD_AM] = "AM", + [MOD_FM] = "FM" }; uint8_t modulation_list_count = sizeof(modulation_list)/sizeof(modulation_list[0]); @@ -334,12 +337,12 @@ void tab_down(uint8_t tab){ void display_init(void){ // https://git.lattuga.net/asdrea/tosta // caratteri print_bar - uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[128,255,0,0,0,0,0c"); - uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[129,255,255,0,0,0,0c"); - uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[130,255,255,255,0,0,0c"); - uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[131,255,255,255,255,0,0c"); - uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[132,255,255,255,255,255,0c"); - uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[133,255,255,255,255,255,255c"); + uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[128,127,0,0,0,0,0c"); + uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[129,127,127,0,0,0,0c"); + uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[130,127,127,127,0,0,0c"); + uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[131,127,127,127,127,0,0c"); + uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[132,127,127,127,127,127,0c"); + uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[133,127,127,127,127,127,127c"); uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%ds",DISPLAY_STANDBY_TIMER); uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[150,100q"); diff --git a/codice/Core/Src/main.c b/codice/Core/Src/main.c index 8cf350f..14f4e35 100644 --- a/codice/Core/Src/main.c +++ b/codice/Core/Src/main.c @@ -235,6 +235,12 @@ void start_transmit(void){ } else if(TX_TYPE == TX_TYPE_SI5351){ si5351_on(); } + if(modulation == MOD_CWL || modulation == MOD_CWU){ + // TONO su DAC + HAL_TIM_Base_Start(&htim6); + HAL_DAC_Start(&hdac1,DAC_CHANNEL_1); + HAL_DAC_Start_DMA(&hdac1, DAC_CHANNEL_1, lf_buffer, (LF_BUFFER_SIZE * 2), DAC_ALIGN_12B_R); + } } void stop_transmit(void){ @@ -252,6 +258,12 @@ void stop_transmit(void){ } else if(TX_TYPE == TX_TYPE_SI5351){ si5351_off(); } + if(modulation == MOD_CWL || modulation == MOD_CWU){ + // DAC + HAL_TIM_Base_Stop(&htim6); + HAL_DAC_Stop(&hdac1,DAC_CHANNEL_1); + HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1); + } } void start_receive(void){ @@ -276,9 +288,9 @@ void stop_receive(void){ HAL_DAC_Stop_DMA(&hdac1, DAC_CHANNEL_1); } -void set_gain(void){ +void set_rx_gain(void){ HAL_OPAMP_Stop(&hopamp1); - switch (gain){ + switch (rx_gain){ case 1: hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_2_OR_MINUS_1; break; @@ -301,9 +313,8 @@ void set_gain(void){ hopamp1.Init.PgaGain = OPAMP_PGA_GAIN_2_OR_MINUS_1; break; } - HAL_OPAMP_Init(&hopamp1); - HAL_OPAMP_Start(&hopamp1); - + HAL_OPAMP_Init(&hopamp1); + HAL_OPAMP_Start(&hopamp1); } @@ -367,7 +378,7 @@ int main(void) audio_filter_init(); // diag(); HAL_OPAMP_Start(&hopamp1); - set_gain(); + set_rx_gain(); HAL_TIM_Base_Start_IT(&htim7); HAL_UART_Receive_IT(&huart1, uart_rx_buf, 1); // HAL_UART_Receive_IT(&huart2, uart_rx_buf, 1); @@ -376,7 +387,6 @@ int main(void) // rooto! si53531_initialize(); } - start_receive(); /* USER CODE END 2 */ @@ -387,7 +397,7 @@ int main(void) /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ - HAL_GPIO_TogglePin(GPIO1_GPIO_Port, GPIO1_Pin); +// HAL_GPIO_TogglePin(GPIO1_GPIO_Port, GPIO1_Pin); // receive = transmit = 0; if(receive){ if(rx_adc_buffer_ready){ @@ -399,7 +409,7 @@ int main(void) if(half_rx_dac_buffer_empty){ // HAL_GPIO_WritePin(GPIO1_GPIO_Port, GPIO1_Pin, SET); if (modulation == MOD_DC) dc_demodulator(if_I, LF_BUFFER_SIZE, prefilter_lf_buffer); - else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer, NCO2_INCREMENT); + else if(modulation == MOD_LSB || modulation == MOD_USB || modulation == MOD_CWL || modulation == MOD_CWU) ssb_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer, NCO2_INCREMENT); else if (modulation == MOD_AM) am_demodulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer); arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer[lf_buffer_toggle], RX_AUDIO_FILTER_BLOCK_SIZE); // arm_fir_q31(&audio_filter_struct, prefilter_lf_buffer, lf_buffer_test[lf_buffer_toggle], AUDIO_FILTER_BLOCK_SIZE); @@ -419,6 +429,12 @@ int main(void) else if(modulation == MOD_LSB || modulation == MOD_USB) ssb_modulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer, NCO2_INCREMENT); else if (modulation == MOD_AM) am_modulator(if_I, if_Q, LF_BUFFER_SIZE, prefilter_lf_buffer); } + + if(half_rx_dac_buffer_empty && (modulation == MOD_CWL || modulation == MOD_CWU)){ + generate_tone(lf_buffer[lf_buffer_toggle], LF_BUFFER_SIZE); + half_rx_dac_buffer_empty = 0; + } + } if(tick){ // consuma coda comandi diff --git a/codice/Core/Src/rx.c b/codice/Core/Src/rx.c index 81259d5..e8376ca 100644 --- a/codice/Core/Src/rx.c +++ b/codice/Core/Src/rx.c @@ -234,10 +234,10 @@ inline q31_t hb_fir15(q31_t * samples_ringbuf, uint8_t sample_index, uint8_t buf } void st2_filter_init(void){ - if((modulation == MOD_LSB) || (modulation == MOD_USB)){ + if((modulation == MOD_LSB) || (modulation == MOD_USB || modulation == MOD_CWL || modulation == MOD_CWU)){ arm_fir_decimate_init_q31(&st2_filter_I_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_filter_taps[0], &st2_filter_I_state[0], ST2_FILTER_BLOCK_SIZE); arm_fir_decimate_init_q31(&st2_filter_Q_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_filter_taps[0], &st2_filter_Q_state[0], ST2_FILTER_BLOCK_SIZE); - } else if ((modulation == MOD_DC) || (modulation == MOD_AM)){ + } else if ((modulation == MOD_DC) || (modulation == MOD_AM || modulation == MOD_FM)){ arm_fir_decimate_init_q31(&st2_filter_I_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_wide_taps[0], &st2_filter_I_state[0], ST2_FILTER_BLOCK_SIZE); arm_fir_decimate_init_q31(&st2_filter_Q_struct, ST2_FILTER_TAP_NUM, ST2_DECIMATION_FACTOR, &st2_wide_taps[0], &st2_filter_Q_state[0], ST2_FILTER_BLOCK_SIZE); } @@ -260,3 +260,7 @@ void audio_filter_generate_coeffs(int32_t *Coeffs, uint32_t freq, uint32_t bw, u Coeffs[index] = (int32_t) ( (double)(FPCoeff[index])*(double)0x7FFFFFFF ); } } + +void set_rx_audio_filter(void){ + audio_filter_generate_coeffs(audio_filter_coeffs, audio_filter_freq, audio_filter_bw, audio_filter_beta); +} diff --git a/codice/Core/Src/si5351.c b/codice/Core/Src/si5351.c index 2425d53..f4d92a9 100644 --- a/codice/Core/Src/si5351.c +++ b/codice/Core/Src/si5351.c @@ -44,14 +44,14 @@ void CalcRegisters(uint32_t fout, uint8_t *regs){ rd++; } rx_div = rd << 4; - + d = 600e6 / (r * fout); // Use lowest VCO frequency but handle d minimum if (d % 2) // Make d even to reduce spurious and phase noise/jitter, see datasheet 4.1.2.1. d++; - + if (d * r * fout < 600e6) // VCO frequency to low check and maintain an even d value d += 2; - } + } else // 292968 Hz <= fout <= 150 MHz { d = 600e6 / fout; // Use lowest VCO frequency but handle d minimum @@ -144,20 +144,22 @@ void si53531_initialize(){ // si5351_write8(SI5351_OUT_ENABLE, 0xFC); // Output Enable Control. Active low } -void si53531_set_frequency(uint32_t freq){ +void si53531_set_frequency(uint32_t freq, uint8_t synth){ uint8_t regs[16]; CalcRegisters(freq, regs); - + // Load PLLA Feedback Multisynth NA for (int i = 0; i < 8; i++) si5351_write8(SI5351_PLLA + i, regs[i]); // Load Output Multisynth0 with d (e and f already set during init. and never changed) - for (int i = 10; i < 13; i++) - si5351_write8(34 + i, regs[i]); - - for (int i = 10; i < 13; i++) - si5351_write8(42 + i, regs[i]); + if(synth = 0){ + for (int i = 10; i < 13; i++) + si5351_write8(34 + i, regs[i]); + } else if(synth = 1){ + for (int i = 10; i < 13; i++) + si5351_write8(42 + i, regs[i]); + } // Reset PLLA // delayMicroseconds(500); // Allow registers to settle before resetting the PLL diff --git a/codice/Core/Src/tx.c b/codice/Core/Src/tx.c index 87ec8fa..36de966 100644 --- a/codice/Core/Src/tx.c +++ b/codice/Core/Src/tx.c @@ -87,3 +87,18 @@ void tx_audio_filter_init(void){ arm_fir_interpolate_init_q15 (&tx_audio_filter_I_struct, TX_AUDIO_FILTER_INTERPOLATION_FACTOR, TX_AUDIO_FILTER_TAP_NUM, tx_audio_filter_coeffs, &tx_audio_filter_I_state[0], TX_AUDIO_FILTER_BLOCK_SIZE); arm_fir_interpolate_init_q15 (&tx_audio_filter_Q_struct, TX_AUDIO_FILTER_INTERPOLATION_FACTOR, TX_AUDIO_FILTER_TAP_NUM, tx_audio_filter_coeffs, &tx_audio_filter_Q_state[0], TX_AUDIO_FILTER_BLOCK_SIZE); } + +uint16_t u12_sine(void){ + static double angle; + angle += CW_TONE_INCREMENT; + if(angle >= 6.28) angle = 0; + return (uint16_t)((sin(angle) * CW_TONE_VOLUME) + 0x7ff); +} + +void generate_tone(q31_t *buffer, uint16_t buffer_size){ + uint16_t i; + while(i < buffer_size){ + buffer[i] = u12_sine(); + i++; + } +} diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h index c5578b6..7e3265d 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -912,6 +911,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1189,6 +1192,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -13125,4 +13137,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g441xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g441xx.h index d8b1a06..38b53d9 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g441xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g441xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -944,6 +943,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1223,6 +1226,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -13357,4 +13369,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g471xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g471xx.h index 19f777a..6dfc260 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g471xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g471xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -125,7 +124,6 @@ typedef enum TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ LPTIM1_IRQn = 49, /*!< LP TIM1 Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ UART4_IRQn = 52, /*!< UART4 global Interrupt */ UART5_IRQn = 53, /*!< UART5 global Interrupt */ @@ -141,6 +139,10 @@ typedef enum COMP4_IRQn = 65, /*!< COMP4 */ CRS_IRQn = 75, /*!< CRS global interrupt */ SAI1_IRQn = 76, /*!< Serial Audio Interface global interrupt */ + TIM20_BRK_IRQn = 77, /*!< TIM20 Break, Transition error and Index error Interrupt */ + TIM20_UP_IRQn = 78, /*!< TIM20 Update interrupt */ + TIM20_TRG_COM_IRQn = 79, /*!< TIM20 Trigger, Commutation, Direction change and Index Interrupt */ + TIM20_CC_IRQn = 80, /*!< TIM20 Capture Compare interrupt */ FPU_IRQn = 81, /*!< FPU global interrupt */ I2C4_EV_IRQn = 82, /*!< I2C4 Event interrupt */ I2C4_ER_IRQn = 83, /*!< I2C4 Error interrupt */ @@ -967,6 +969,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1002,7 +1008,6 @@ typedef struct #define TIM2_BASE (APB1PERIPH_BASE + 0x0000UL) #define TIM3_BASE (APB1PERIPH_BASE + 0x0400UL) #define TIM4_BASE (APB1PERIPH_BASE + 0x0800UL) -#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00UL) #define TIM6_BASE (APB1PERIPH_BASE + 0x1000UL) #define TIM7_BASE (APB1PERIPH_BASE + 0x1400UL) #define CRS_BASE (APB1PERIPH_BASE + 0x2000UL) @@ -1052,6 +1057,7 @@ typedef struct #define TIM15_BASE (APB2PERIPH_BASE + 0x4000UL) #define TIM16_BASE (APB2PERIPH_BASE + 0x4400UL) #define TIM17_BASE (APB2PERIPH_BASE + 0x4800UL) +#define TIM20_BASE (APB2PERIPH_BASE + 0x5000UL) #define SAI1_BASE (APB2PERIPH_BASE + 0x5400UL) #define SAI1_Block_A_BASE (SAI1_BASE + 0x0004UL) #define SAI1_Block_B_BASE (SAI1_BASE + 0x0024UL) @@ -1144,7 +1150,6 @@ typedef struct #define TIM2 ((TIM_TypeDef *) TIM2_BASE) #define TIM3 ((TIM_TypeDef *) TIM3_BASE) #define TIM4 ((TIM_TypeDef *) TIM4_BASE) -#define TIM5 ((TIM_TypeDef *) TIM5_BASE) #define TIM6 ((TIM_TypeDef *) TIM6_BASE) #define TIM7 ((TIM_TypeDef *) TIM7_BASE) #define CRS ((CRS_TypeDef *) CRS_BASE) @@ -1192,6 +1197,7 @@ typedef struct #define TIM15 ((TIM_TypeDef *) TIM15_BASE) #define TIM16 ((TIM_TypeDef *) TIM16_BASE) #define TIM17 ((TIM_TypeDef *) TIM17_BASE) +#define TIM20 ((TIM_TypeDef *) TIM20_BASE) #define SAI1 ((SAI_TypeDef *) SAI1_BASE) #define SAI1_Block_A ((SAI_Block_TypeDef *)SAI1_Block_A_BASE) #define SAI1_Block_B ((SAI_Block_TypeDef *)SAI1_Block_B_BASE) @@ -1277,6 +1283,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -2928,9 +2943,6 @@ typedef struct #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos (2U) #define DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM4_STOP_Pos)/*!< 0x00000004 */ #define DBGMCU_APB1FZR1_DBG_TIM4_STOP DBGMCU_APB1FZR1_DBG_TIM4_STOP_Msk -#define DBGMCU_APB1FZR1_DBG_TIM5_STOP_Pos (3U) -#define DBGMCU_APB1FZR1_DBG_TIM5_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM5_STOP_Pos)/*!< 0x00000008 */ -#define DBGMCU_APB1FZR1_DBG_TIM5_STOP DBGMCU_APB1FZR1_DBG_TIM5_STOP_Msk #define DBGMCU_APB1FZR1_DBG_TIM6_STOP_Pos (4U) #define DBGMCU_APB1FZR1_DBG_TIM6_STOP_Msk (0x1UL << DBGMCU_APB1FZR1_DBG_TIM6_STOP_Pos)/*!< 0x00000010 */ #define DBGMCU_APB1FZR1_DBG_TIM6_STOP DBGMCU_APB1FZR1_DBG_TIM6_STOP_Msk @@ -2980,6 +2992,9 @@ typedef struct #define DBGMCU_APB2FZ_DBG_TIM17_STOP_Pos (18U) #define DBGMCU_APB2FZ_DBG_TIM17_STOP_Msk (0x1UL << DBGMCU_APB2FZ_DBG_TIM17_STOP_Pos)/*!< 0x00040000 */ #define DBGMCU_APB2FZ_DBG_TIM17_STOP DBGMCU_APB2FZ_DBG_TIM17_STOP_Msk +#define DBGMCU_APB2FZ_DBG_TIM20_STOP_Pos (20U) +#define DBGMCU_APB2FZ_DBG_TIM20_STOP_Msk (0x1UL << DBGMCU_APB2FZ_DBG_TIM20_STOP_Pos)/*!< 0x00100000 */ +#define DBGMCU_APB2FZ_DBG_TIM20_STOP DBGMCU_APB2FZ_DBG_TIM20_STOP_Msk /******************************************************************************/ /* */ @@ -8101,9 +8116,6 @@ typedef struct #define RCC_APB1RSTR1_TIM4RST_Pos (2U) #define RCC_APB1RSTR1_TIM4RST_Msk (0x1UL << RCC_APB1RSTR1_TIM4RST_Pos)/*!< 0x00000004 */ #define RCC_APB1RSTR1_TIM4RST RCC_APB1RSTR1_TIM4RST_Msk -#define RCC_APB1RSTR1_TIM5RST_Pos (3U) -#define RCC_APB1RSTR1_TIM5RST_Msk (0x1UL << RCC_APB1RSTR1_TIM5RST_Pos)/*!< 0x00000008 */ -#define RCC_APB1RSTR1_TIM5RST RCC_APB1RSTR1_TIM5RST_Msk #define RCC_APB1RSTR1_TIM6RST_Pos (4U) #define RCC_APB1RSTR1_TIM6RST_Msk (0x1UL << RCC_APB1RSTR1_TIM6RST_Pos)/*!< 0x00000010 */ #define RCC_APB1RSTR1_TIM6RST RCC_APB1RSTR1_TIM6RST_Msk @@ -8192,6 +8204,9 @@ typedef struct #define RCC_APB2RSTR_TIM17RST_Pos (18U) #define RCC_APB2RSTR_TIM17RST_Msk (0x1UL << RCC_APB2RSTR_TIM17RST_Pos)/*!< 0x00040000 */ #define RCC_APB2RSTR_TIM17RST RCC_APB2RSTR_TIM17RST_Msk +#define RCC_APB2RSTR_TIM20RST_Pos (20U) +#define RCC_APB2RSTR_TIM20RST_Msk (0x1UL << RCC_APB2RSTR_TIM20RST_Pos)/*!< 0x00100000 */ +#define RCC_APB2RSTR_TIM20RST RCC_APB2RSTR_TIM20RST_Msk #define RCC_APB2RSTR_SAI1RST_Pos (21U) #define RCC_APB2RSTR_SAI1RST_Msk (0x1UL << RCC_APB2RSTR_SAI1RST_Pos)/*!< 0x00200000 */ #define RCC_APB2RSTR_SAI1RST RCC_APB2RSTR_SAI1RST_Msk @@ -8272,9 +8287,6 @@ typedef struct #define RCC_APB1ENR1_TIM4EN_Pos (2U) #define RCC_APB1ENR1_TIM4EN_Msk (0x1UL << RCC_APB1ENR1_TIM4EN_Pos)/*!< 0x00000004 */ #define RCC_APB1ENR1_TIM4EN RCC_APB1ENR1_TIM4EN_Msk -#define RCC_APB1ENR1_TIM5EN_Pos (3U) -#define RCC_APB1ENR1_TIM5EN_Msk (0x1UL << RCC_APB1ENR1_TIM5EN_Pos)/*!< 0x00000008 */ -#define RCC_APB1ENR1_TIM5EN RCC_APB1ENR1_TIM5EN_Msk #define RCC_APB1ENR1_TIM6EN_Pos (4U) #define RCC_APB1ENR1_TIM6EN_Msk (0x1UL << RCC_APB1ENR1_TIM6EN_Pos)/*!< 0x00000010 */ #define RCC_APB1ENR1_TIM6EN RCC_APB1ENR1_TIM6EN_Msk @@ -8369,6 +8381,9 @@ typedef struct #define RCC_APB2ENR_TIM17EN_Pos (18U) #define RCC_APB2ENR_TIM17EN_Msk (0x1UL << RCC_APB2ENR_TIM17EN_Pos)/*!< 0x00040000 */ #define RCC_APB2ENR_TIM17EN RCC_APB2ENR_TIM17EN_Msk +#define RCC_APB2ENR_TIM20EN_Pos (20U) +#define RCC_APB2ENR_TIM20EN_Msk (0x1UL << RCC_APB2ENR_TIM20EN_Pos)/*!< 0x00100000 */ +#define RCC_APB2ENR_TIM20EN RCC_APB2ENR_TIM20EN_Msk #define RCC_APB2ENR_SAI1EN_Pos (21U) #define RCC_APB2ENR_SAI1EN_Msk (0x1UL << RCC_APB2ENR_SAI1EN_Pos)/*!< 0x00200000 */ #define RCC_APB2ENR_SAI1EN RCC_APB2ENR_SAI1EN_Msk @@ -8458,9 +8473,6 @@ typedef struct #define RCC_APB1SMENR1_TIM4SMEN_Pos (2U) #define RCC_APB1SMENR1_TIM4SMEN_Msk (0x1UL << RCC_APB1SMENR1_TIM4SMEN_Pos)/*!< 0x00000004 */ #define RCC_APB1SMENR1_TIM4SMEN RCC_APB1SMENR1_TIM4SMEN_Msk -#define RCC_APB1SMENR1_TIM5SMEN_Pos (3U) -#define RCC_APB1SMENR1_TIM5SMEN_Msk (0x1UL << RCC_APB1SMENR1_TIM5SMEN_Pos)/*!< 0x00000008 */ -#define RCC_APB1SMENR1_TIM5SMEN RCC_APB1SMENR1_TIM5SMEN_Msk #define RCC_APB1SMENR1_TIM6SMEN_Pos (4U) #define RCC_APB1SMENR1_TIM6SMEN_Msk (0x1UL << RCC_APB1SMENR1_TIM6SMEN_Pos)/*!< 0x00000010 */ #define RCC_APB1SMENR1_TIM6SMEN RCC_APB1SMENR1_TIM6SMEN_Msk @@ -8555,6 +8567,9 @@ typedef struct #define RCC_APB2SMENR_TIM17SMEN_Pos (18U) #define RCC_APB2SMENR_TIM17SMEN_Msk (0x1UL << RCC_APB2SMENR_TIM17SMEN_Pos)/*!< 0x00040000 */ #define RCC_APB2SMENR_TIM17SMEN RCC_APB2SMENR_TIM17SMEN_Msk +#define RCC_APB2SMENR_TIM20SMEN_Pos (20U) +#define RCC_APB2SMENR_TIM20SMEN_Msk (0x1UL << RCC_APB2SMENR_TIM20SMEN_Pos)/*!< 0x00100000 */ +#define RCC_APB2SMENR_TIM20SMEN RCC_APB2SMENR_TIM20SMEN_Msk #define RCC_APB2SMENR_SAI1SMEN_Pos (21U) #define RCC_APB2SMENR_SAI1SMEN_Msk (0x1UL << RCC_APB2SMENR_SAI1SMEN_Pos)/*!< 0x00200000 */ #define RCC_APB2SMENR_SAI1SMEN RCC_APB2SMENR_SAI1SMEN_Msk @@ -13396,122 +13411,127 @@ typedef struct ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM6) || \ ((INSTANCE) == TIM7) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting 32 bits counter ****************/ -#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM2) || \ - ((INSTANCE) == TIM5)) +#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) ((INSTANCE) == TIM2) /****************** TIM Instances : supporting the break function *************/ #define IS_TIM_BREAK_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /************** TIM Instances : supporting Break source selection *************/ #define IS_TIM_BREAKSOURCE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting 2 break inputs *****************/ #define IS_TIM_BKIN2_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /************* TIM Instances : at least 1 capture/compare channel *************/ #define IS_TIM_CC1_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /************ TIM Instances : at least 2 capture/compare channels *************/ #define IS_TIM_CC2_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15) || \ + ((INSTANCE) == TIM20)) /************ TIM Instances : at least 3 capture/compare channels *************/ #define IS_TIM_CC3_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /************ TIM Instances : at least 4 capture/compare channels *************/ #define IS_TIM_CC4_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : at least 5 capture/compare channels *******/ #define IS_TIM_CC5_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : at least 6 capture/compare channels *******/ #define IS_TIM_CC6_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /************ TIM Instances : DMA requests generation (TIMx_DIER.COMDE) *******/ #define IS_TIM_CCDMA_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : DMA requests generation (TIMx_DIER.UDE) ***/ #define IS_TIM_DMA_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM6) || \ ((INSTANCE) == TIM7) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /************ TIM Instances : DMA requests generation (TIMx_DIER.CCxDE) *******/ #define IS_TIM_DMA_CC_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /******************** TIM Instances : DMA burst feature ***********************/ #define IS_TIM_DMABURST_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /******************* TIM Instances : output(s) available **********************/ #define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL) \ @@ -13541,12 +13561,6 @@ typedef struct ((CHANNEL) == TIM_CHANNEL_3) || \ ((CHANNEL) == TIM_CHANNEL_4))) \ || \ - (((INSTANCE) == TIM5) && \ - (((CHANNEL) == TIM_CHANNEL_1) || \ - ((CHANNEL) == TIM_CHANNEL_2) || \ - ((CHANNEL) == TIM_CHANNEL_3) || \ - ((CHANNEL) == TIM_CHANNEL_4))) \ - || \ (((INSTANCE) == TIM8) && \ (((CHANNEL) == TIM_CHANNEL_1) || \ ((CHANNEL) == TIM_CHANNEL_2) || \ @@ -13563,7 +13577,15 @@ typedef struct (((CHANNEL) == TIM_CHANNEL_1))) \ || \ (((INSTANCE) == TIM17) && \ - (((CHANNEL) == TIM_CHANNEL_1)))) + (((CHANNEL) == TIM_CHANNEL_1))) \ + || \ + (((INSTANCE) == TIM20) && \ + (((CHANNEL) == TIM_CHANNEL_1) || \ + ((CHANNEL) == TIM_CHANNEL_2) || \ + ((CHANNEL) == TIM_CHANNEL_3) || \ + ((CHANNEL) == TIM_CHANNEL_4) || \ + ((CHANNEL) == TIM_CHANNEL_5) || \ + ((CHANNEL) == TIM_CHANNEL_6)))) /****************** TIM Instances : supporting complementary output(s) ********/ #define IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL) \ @@ -13586,135 +13608,143 @@ typedef struct ((CHANNEL) == TIM_CHANNEL_1)) \ || \ (((INSTANCE) == TIM17) && \ - ((CHANNEL) == TIM_CHANNEL_1))) + ((CHANNEL) == TIM_CHANNEL_1)) \ + || \ + (((INSTANCE) == TIM20) && \ + (((CHANNEL) == TIM_CHANNEL_1) || \ + ((CHANNEL) == TIM_CHANNEL_2) || \ + ((CHANNEL) == TIM_CHANNEL_3) || \ + ((CHANNEL) == TIM_CHANNEL_4)))) /****************** TIM Instances : supporting clock division *****************/ #define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****** TIM Instances : supporting external clock mode 1 for ETRF input *******/ #define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****** TIM Instances : supporting external clock mode 2 for ETRF input *******/ #define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting external clock mode 1 for TIX inputs*/ #define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15)|| \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting internal trigger inputs(ITRX) *******/ #define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15)|| \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting combined 3-phase PWM mode ******/ #define IS_TIM_COMBINED3PHASEPWM_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting commutation event generation ***/ #define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting counting mode selection ********/ #define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting encoder interface **************/ #define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting Hall sensor interface **********/ #define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15) || \ + ((INSTANCE) == TIM20)) /**************** TIM Instances : external trigger input available ************/ #define IS_TIM_ETR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /************* TIM Instances : supporting ETR source selection ***************/ #define IS_TIM_ETRSEL_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****** TIM Instances : Master mode available (TIMx_CR2.MMS available )********/ #define IS_TIM_MASTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM6) || \ ((INSTANCE) == TIM7) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15) || \ + ((INSTANCE) == TIM20)) /*********** TIM Instances : Slave mode available (TIMx_SMCR available )*******/ #define IS_TIM_SLAVE_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting OCxREF clear *******************/ #define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting bitfield OCCS in SMCR register *******************/ #define IS_TIM_OCCS_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ @@ -13723,51 +13753,54 @@ typedef struct ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : remapping capability **********************/ #define IS_TIM_REMAP_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting repetition counter *************/ #define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting ADC triggering through TRGO2 ***/ #define IS_TIM_TRGO2_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ - ((INSTANCE) == TIM8)) + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /******************* TIM Instances : Timer input XOR function *****************/ #define IS_TIM_XOR_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ - ((INSTANCE) == TIM15)) + ((INSTANCE) == TIM15) || \ + ((INSTANCE) == TIM20)) /******************* TIM Instances : Timer input selection ********************/ #define IS_TIM_TISEL_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ ((INSTANCE) == TIM2) || \ ((INSTANCE) == TIM3) || \ ((INSTANCE) == TIM4) || \ - ((INSTANCE) == TIM5) || \ ((INSTANCE) == TIM8) || \ ((INSTANCE) == TIM15) || \ ((INSTANCE) == TIM16) || \ - ((INSTANCE) == TIM17)) + ((INSTANCE) == TIM17) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : Advanced timer instances *******************/ #define IS_TIM_ADVANCED_INSTANCE(INSTANCE) (((INSTANCE) == TIM1) || \ - ((INSTANCE) == TIM8)) - + ((INSTANCE) == TIM8) || \ + ((INSTANCE) == TIM20)) /****************** TIM Instances : supporting HSE/32 request instances *******************/ #define IS_TIM_HSE32_INSTANCE(INSTANCE) (((INSTANCE) == TIM16) || \ @@ -13907,4 +13940,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h index 890a747..a9b5e6b 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g473xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -1009,6 +1008,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1358,6 +1361,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -14535,4 +14547,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h index 7dcc290..25f9136 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g474xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -1492,6 +1491,15 @@ typedef struct { * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -8047,6 +8055,8 @@ typedef struct { #define HRTIM_RSTR_EXTEVNT10_Pos (18U) #define HRTIM_RSTR_EXTEVNT10_Msk (0x1UL << HRTIM_RSTR_EXTEVNT10_Pos) /*!< 0x00040000 */ #define HRTIM_RSTR_EXTEVNT10 HRTIM_RSTR_EXTEVNT10_Msk /*!< External event 10 */ + +/* Slave Timer A reset enable bits upon other slave timers events */ #define HRTIM_RSTR_TIMBCMP1_Pos (19U) #define HRTIM_RSTR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTR_TIMBCMP1_Pos) /*!< 0x00080000 */ #define HRTIM_RSTR_TIMBCMP1 HRTIM_RSTR_TIMBCMP1_Msk /*!< Timer B compare 1 */ @@ -8056,6 +8066,7 @@ typedef struct { #define HRTIM_RSTR_TIMBCMP4_Pos (21U) #define HRTIM_RSTR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTR_TIMBCMP4_Pos) /*!< 0x00200000 */ #define HRTIM_RSTR_TIMBCMP4 HRTIM_RSTR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + #define HRTIM_RSTR_TIMCCMP1_Pos (22U) #define HRTIM_RSTR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTR_TIMCCMP1_Pos) /*!< 0x00400000 */ #define HRTIM_RSTR_TIMCCMP1 HRTIM_RSTR_TIMCCMP1_Msk /*!< Timer C compare 1 */ @@ -8065,6 +8076,7 @@ typedef struct { #define HRTIM_RSTR_TIMCCMP4_Pos (24U) #define HRTIM_RSTR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTR_TIMCCMP4_Pos) /*!< 0x01000000 */ #define HRTIM_RSTR_TIMCCMP4 HRTIM_RSTR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + #define HRTIM_RSTR_TIMDCMP1_Pos (25U) #define HRTIM_RSTR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTR_TIMDCMP1_Pos) /*!< 0x02000000 */ #define HRTIM_RSTR_TIMDCMP1 HRTIM_RSTR_TIMDCMP1_Msk /*!< Timer D compare 1 */ @@ -8074,6 +8086,7 @@ typedef struct { #define HRTIM_RSTR_TIMDCMP4_Pos (27U) #define HRTIM_RSTR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTR_TIMDCMP4_Pos) /*!< 0x08000000 */ #define HRTIM_RSTR_TIMDCMP4 HRTIM_RSTR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + #define HRTIM_RSTR_TIMECMP1_Pos (28U) #define HRTIM_RSTR_TIMECMP1_Msk (0x1UL << HRTIM_RSTR_TIMECMP1_Pos) /*!< 0x10000000 */ #define HRTIM_RSTR_TIMECMP1 HRTIM_RSTR_TIMECMP1_Msk /*!< Timer E compare 1 */ @@ -8083,10 +8096,236 @@ typedef struct { #define HRTIM_RSTR_TIMECMP4_Pos (30U) #define HRTIM_RSTR_TIMECMP4_Msk (0x1UL << HRTIM_RSTR_TIMECMP4_Pos) /*!< 0x40000000 */ #define HRTIM_RSTR_TIMECMP4 HRTIM_RSTR_TIMECMP4_Msk /*!< Timer E compare 4 */ + #define HRTIM_RSTR_TIMFCMP2_Pos (31U) #define HRTIM_RSTR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTR_TIMFCMP2_Pos) /*!< 0x80000000 */ #define HRTIM_RSTR_TIMFCMP2 HRTIM_RSTR_TIMFCMP2_Msk /*!< Timer F compare 2 */ +/* Slave Timer B reset enable bits upon other slave timers events */ +#define HRTIM_RSTBR_TIMACMP1_Pos (19U) +#define HRTIM_RSTBR_TIMACMP1_Msk (0x1UL << HRTIM_RSTBR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTBR_TIMACMP1 HRTIM_RSTBR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTBR_TIMACMP2_Pos (20U) +#define HRTIM_RSTBR_TIMACMP2_Msk (0x1UL << HRTIM_RSTBR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTBR_TIMACMP2 HRTIM_RSTBR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTBR_TIMACMP4_Pos (21U) +#define HRTIM_RSTBR_TIMACMP4_Msk (0x1UL << HRTIM_RSTBR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTBR_TIMACMP4 HRTIM_RSTBR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTBR_TIMCCMP1_Pos (22U) +#define HRTIM_RSTBR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTBR_TIMCCMP1 HRTIM_RSTBR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTBR_TIMCCMP2_Pos (23U) +#define HRTIM_RSTBR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTBR_TIMCCMP2 HRTIM_RSTBR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTBR_TIMCCMP4_Pos (24U) +#define HRTIM_RSTBR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTBR_TIMCCMP4 HRTIM_RSTBR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTBR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTBR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTBR_TIMDCMP1 HRTIM_RSTBR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTBR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTBR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTBR_TIMDCMP2 HRTIM_RSTBR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTBR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTBR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTBR_TIMDCMP4 HRTIM_RSTBR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTBR_TIMECMP1_Pos (28U) +#define HRTIM_RSTBR_TIMECMP1_Msk (0x1UL << HRTIM_RSTBR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTBR_TIMECMP1 HRTIM_RSTBR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTBR_TIMECMP2_Pos (29U) +#define HRTIM_RSTBR_TIMECMP2_Msk (0x1UL << HRTIM_RSTBR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTBR_TIMECMP2 HRTIM_RSTBR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTBR_TIMECMP4_Pos (30U) +#define HRTIM_RSTBR_TIMECMP4_Msk (0x1UL << HRTIM_RSTBR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTBR_TIMECMP4 HRTIM_RSTBR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTBR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTBR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTBR_TIMFCMP2 HRTIM_RSTBR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer C reset enable bits upon other slave timers events */ +#define HRTIM_RSTCR_TIMACMP1_Pos (19U) +#define HRTIM_RSTCR_TIMACMP1_Msk (0x1UL << HRTIM_RSTCR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTCR_TIMACMP1 HRTIM_RSTCR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTCR_TIMACMP2_Pos (20U) +#define HRTIM_RSTCR_TIMACMP2_Msk (0x1UL << HRTIM_RSTCR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTCR_TIMACMP2 HRTIM_RSTCR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTCR_TIMACMP4_Pos (21U) +#define HRTIM_RSTCR_TIMACMP4_Msk (0x1UL << HRTIM_RSTCR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTCR_TIMACMP4 HRTIM_RSTCR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTCR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTCR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTCR_TIMBCMP1 HRTIM_RSTCR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTCR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTCR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTCR_TIMBCMP2 HRTIM_RSTCR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTCR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTCR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTCR_TIMBCMP4 HRTIM_RSTCR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTCR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTCR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTCR_TIMDCMP1 HRTIM_RSTCR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTCR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTCR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTCR_TIMDCMP2 HRTIM_RSTCR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTCR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTCR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTCR_TIMDCMP4 HRTIM_RSTCR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTCR_TIMECMP1_Pos (28U) +#define HRTIM_RSTCR_TIMECMP1_Msk (0x1UL << HRTIM_RSTCR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTCR_TIMECMP1 HRTIM_RSTCR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTCR_TIMECMP2_Pos (29U) +#define HRTIM_RSTCR_TIMECMP2_Msk (0x1UL << HRTIM_RSTCR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTCR_TIMECMP2 HRTIM_RSTCR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTCR_TIMECMP4_Pos (30U) +#define HRTIM_RSTCR_TIMECMP4_Msk (0x1UL << HRTIM_RSTCR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTCR_TIMECMP4 HRTIM_RSTCR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTCR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTCR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTCR_TIMFCMP2 HRTIM_RSTCR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer D reset enable bits upon other slave timers events */ +#define HRTIM_RSTDR_TIMACMP1_Pos (19U) +#define HRTIM_RSTDR_TIMACMP1_Msk (0x1UL << HRTIM_RSTDR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTDR_TIMACMP1 HRTIM_RSTDR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTDR_TIMACMP2_Pos (20U) +#define HRTIM_RSTDR_TIMACMP2_Msk (0x1UL << HRTIM_RSTDR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTDR_TIMACMP2 HRTIM_RSTDR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTDR_TIMACMP4_Pos (21U) +#define HRTIM_RSTDR_TIMACMP4_Msk (0x1UL << HRTIM_RSTDR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTDR_TIMACMP4 HRTIM_RSTDR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTDR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTDR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTDR_TIMBCMP1 HRTIM_RSTDR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTDR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTDR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTDR_TIMBCMP2 HRTIM_RSTDR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTDR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTDR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTDR_TIMBCMP4 HRTIM_RSTDR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTDR_TIMCCMP1_Pos (25U) +#define HRTIM_RSTDR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTDR_TIMCCMP1 HRTIM_RSTDR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTDR_TIMCCMP2_Pos (26U) +#define HRTIM_RSTDR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTDR_TIMCCMP2 HRTIM_RSTDR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTDR_TIMCCMP4_Pos (27U) +#define HRTIM_RSTDR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTDR_TIMCCMP4 HRTIM_RSTDR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTDR_TIMECMP1_Pos (28U) +#define HRTIM_RSTDR_TIMECMP1_Msk (0x1UL << HRTIM_RSTDR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTDR_TIMECMP1 HRTIM_RSTDR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTDR_TIMECMP2_Pos (29U) +#define HRTIM_RSTDR_TIMECMP2_Msk (0x1UL << HRTIM_RSTDR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTDR_TIMECMP2 HRTIM_RSTDR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTDR_TIMECMP4_Pos (30U) +#define HRTIM_RSTDR_TIMECMP4_Msk (0x1UL << HRTIM_RSTDR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTDR_TIMECMP4 HRTIM_RSTDR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTDR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTDR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTDR_TIMFCMP2 HRTIM_RSTDR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer E reset enable bits upon other slave timers events */ +#define HRTIM_RSTER_TIMACMP1_Pos (19U) +#define HRTIM_RSTER_TIMACMP1_Msk (0x1UL << HRTIM_RSTER_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTER_TIMACMP1 HRTIM_RSTER_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTER_TIMACMP2_Pos (20U) +#define HRTIM_RSTER_TIMACMP2_Msk (0x1UL << HRTIM_RSTER_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTER_TIMACMP2 HRTIM_RSTER_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTER_TIMACMP4_Pos (21U) +#define HRTIM_RSTER_TIMACMP4_Msk (0x1UL << HRTIM_RSTER_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTER_TIMACMP4 HRTIM_RSTER_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTER_TIMBCMP1_Pos (22U) +#define HRTIM_RSTER_TIMBCMP1_Msk (0x1UL << HRTIM_RSTER_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTER_TIMBCMP1 HRTIM_RSTER_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTER_TIMBCMP2_Pos (23U) +#define HRTIM_RSTER_TIMBCMP2_Msk (0x1UL << HRTIM_RSTER_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTER_TIMBCMP2 HRTIM_RSTER_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTER_TIMBCMP4_Pos (24U) +#define HRTIM_RSTER_TIMBCMP4_Msk (0x1UL << HRTIM_RSTER_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTER_TIMBCMP4 HRTIM_RSTER_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTER_TIMCCMP1_Pos (25U) +#define HRTIM_RSTER_TIMCCMP1_Msk (0x1UL << HRTIM_RSTER_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTER_TIMCCMP1 HRTIM_RSTER_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTER_TIMCCMP2_Pos (26U) +#define HRTIM_RSTER_TIMCCMP2_Msk (0x1UL << HRTIM_RSTER_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTER_TIMCCMP2 HRTIM_RSTER_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTER_TIMCCMP4_Pos (27U) +#define HRTIM_RSTER_TIMCCMP4_Msk (0x1UL << HRTIM_RSTER_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTER_TIMCCMP4 HRTIM_RSTER_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTER_TIMDCMP1_Pos (28U) +#define HRTIM_RSTER_TIMDCMP1_Msk (0x1UL << HRTIM_RSTER_TIMDCMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTER_TIMDCMP1 HRTIM_RSTER_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTER_TIMDCMP2_Pos (29U) +#define HRTIM_RSTER_TIMDCMP2_Msk (0x1UL << HRTIM_RSTER_TIMDCMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTER_TIMDCMP2 HRTIM_RSTER_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTER_TIMDCMP4_Pos (30U) +#define HRTIM_RSTER_TIMDCMP4_Msk (0x1UL << HRTIM_RSTER_TIMDCMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTER_TIMDCMP4 HRTIM_RSTER_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTER_TIMFCMP2_Pos (31U) +#define HRTIM_RSTER_TIMFCMP2_Msk (0x1UL << HRTIM_RSTER_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTER_TIMFCMP2 HRTIM_RSTER_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer F reset enable bits upon other slave timers events */ +#define HRTIM_RSTFR_TIMACMP1_Pos (19U) +#define HRTIM_RSTFR_TIMACMP1_Msk (0x1UL << HRTIM_RSTFR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTFR_TIMACMP1 HRTIM_RSTFR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTFR_TIMACMP2_Pos (20U) +#define HRTIM_RSTFR_TIMACMP2_Msk (0x1UL << HRTIM_RSTFR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTFR_TIMACMP2 HRTIM_RSTFR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTFR_TIMACMP4_Pos (21U) +#define HRTIM_RSTFR_TIMACMP4_Msk (0x1UL << HRTIM_RSTFR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTFR_TIMACMP4 HRTIM_RSTFR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTFR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTFR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTFR_TIMBCMP1 HRTIM_RSTFR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTFR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTFR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTFR_TIMBCMP2 HRTIM_RSTFR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTFR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTFR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTFR_TIMBCMP4 HRTIM_RSTFR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTFR_TIMCCMP1_Pos (25U) +#define HRTIM_RSTFR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTFR_TIMCCMP1 HRTIM_RSTFR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTFR_TIMCCMP2_Pos (26U) +#define HRTIM_RSTFR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTFR_TIMCCMP2 HRTIM_RSTFR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTFR_TIMCCMP4_Pos (27U) +#define HRTIM_RSTFR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTFR_TIMCCMP4 HRTIM_RSTFR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTFR_TIMDCMP1_Pos (28U) +#define HRTIM_RSTFR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTFR_TIMDCMP1 HRTIM_RSTFR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTFR_TIMDCMP2_Pos (29U) +#define HRTIM_RSTFR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTFR_TIMDCMP2 HRTIM_RSTFR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTFR_TIMDCMP4_Pos (30U) +#define HRTIM_RSTFR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTFR_TIMDCMP4 HRTIM_RSTFR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTFR_TIMECMP2_Pos (31U) +#define HRTIM_RSTFR_TIMECMP2_Msk (0x1UL << HRTIM_RSTFR_TIMECMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTFR_TIMECMP2 HRTIM_RSTFR_TIMECMP2_Msk /*!< Timer E compare 2 */ + /**** Bit definition for Slave Timer Chopper register *************************/ #define HRTIM_CHPR_CARFRQ_Pos (0U) #define HRTIM_CHPR_CARFRQ_Msk (0xFUL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x0000000F */ @@ -17889,4 +18128,3 @@ typedef struct { * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g483xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g483xx.h index e1b02d6..6cf38cf 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g483xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g483xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -1041,6 +1040,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1392,6 +1395,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -14767,4 +14779,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g484xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g484xx.h index 498894b..9386f90 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g484xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g484xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -1526,6 +1525,15 @@ typedef struct { * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -8268,6 +8276,8 @@ typedef struct { #define HRTIM_RSTR_EXTEVNT10_Pos (18U) #define HRTIM_RSTR_EXTEVNT10_Msk (0x1UL << HRTIM_RSTR_EXTEVNT10_Pos) /*!< 0x00040000 */ #define HRTIM_RSTR_EXTEVNT10 HRTIM_RSTR_EXTEVNT10_Msk /*!< External event 10 */ + +/* Slave Timer A reset enable bits upon other slave timers events */ #define HRTIM_RSTR_TIMBCMP1_Pos (19U) #define HRTIM_RSTR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTR_TIMBCMP1_Pos) /*!< 0x00080000 */ #define HRTIM_RSTR_TIMBCMP1 HRTIM_RSTR_TIMBCMP1_Msk /*!< Timer B compare 1 */ @@ -8277,6 +8287,7 @@ typedef struct { #define HRTIM_RSTR_TIMBCMP4_Pos (21U) #define HRTIM_RSTR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTR_TIMBCMP4_Pos) /*!< 0x00200000 */ #define HRTIM_RSTR_TIMBCMP4 HRTIM_RSTR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + #define HRTIM_RSTR_TIMCCMP1_Pos (22U) #define HRTIM_RSTR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTR_TIMCCMP1_Pos) /*!< 0x00400000 */ #define HRTIM_RSTR_TIMCCMP1 HRTIM_RSTR_TIMCCMP1_Msk /*!< Timer C compare 1 */ @@ -8286,6 +8297,7 @@ typedef struct { #define HRTIM_RSTR_TIMCCMP4_Pos (24U) #define HRTIM_RSTR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTR_TIMCCMP4_Pos) /*!< 0x01000000 */ #define HRTIM_RSTR_TIMCCMP4 HRTIM_RSTR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + #define HRTIM_RSTR_TIMDCMP1_Pos (25U) #define HRTIM_RSTR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTR_TIMDCMP1_Pos) /*!< 0x02000000 */ #define HRTIM_RSTR_TIMDCMP1 HRTIM_RSTR_TIMDCMP1_Msk /*!< Timer D compare 1 */ @@ -8295,6 +8307,7 @@ typedef struct { #define HRTIM_RSTR_TIMDCMP4_Pos (27U) #define HRTIM_RSTR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTR_TIMDCMP4_Pos) /*!< 0x08000000 */ #define HRTIM_RSTR_TIMDCMP4 HRTIM_RSTR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + #define HRTIM_RSTR_TIMECMP1_Pos (28U) #define HRTIM_RSTR_TIMECMP1_Msk (0x1UL << HRTIM_RSTR_TIMECMP1_Pos) /*!< 0x10000000 */ #define HRTIM_RSTR_TIMECMP1 HRTIM_RSTR_TIMECMP1_Msk /*!< Timer E compare 1 */ @@ -8304,10 +8317,236 @@ typedef struct { #define HRTIM_RSTR_TIMECMP4_Pos (30U) #define HRTIM_RSTR_TIMECMP4_Msk (0x1UL << HRTIM_RSTR_TIMECMP4_Pos) /*!< 0x40000000 */ #define HRTIM_RSTR_TIMECMP4 HRTIM_RSTR_TIMECMP4_Msk /*!< Timer E compare 4 */ + #define HRTIM_RSTR_TIMFCMP2_Pos (31U) #define HRTIM_RSTR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTR_TIMFCMP2_Pos) /*!< 0x80000000 */ #define HRTIM_RSTR_TIMFCMP2 HRTIM_RSTR_TIMFCMP2_Msk /*!< Timer F compare 2 */ +/* Slave Timer B reset enable bits upon other slave timers events */ +#define HRTIM_RSTBR_TIMACMP1_Pos (19U) +#define HRTIM_RSTBR_TIMACMP1_Msk (0x1UL << HRTIM_RSTBR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTBR_TIMACMP1 HRTIM_RSTBR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTBR_TIMACMP2_Pos (20U) +#define HRTIM_RSTBR_TIMACMP2_Msk (0x1UL << HRTIM_RSTBR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTBR_TIMACMP2 HRTIM_RSTBR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTBR_TIMACMP4_Pos (21U) +#define HRTIM_RSTBR_TIMACMP4_Msk (0x1UL << HRTIM_RSTBR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTBR_TIMACMP4 HRTIM_RSTBR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTBR_TIMCCMP1_Pos (22U) +#define HRTIM_RSTBR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTBR_TIMCCMP1 HRTIM_RSTBR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTBR_TIMCCMP2_Pos (23U) +#define HRTIM_RSTBR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTBR_TIMCCMP2 HRTIM_RSTBR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTBR_TIMCCMP4_Pos (24U) +#define HRTIM_RSTBR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTBR_TIMCCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTBR_TIMCCMP4 HRTIM_RSTBR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTBR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTBR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTBR_TIMDCMP1 HRTIM_RSTBR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTBR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTBR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTBR_TIMDCMP2 HRTIM_RSTBR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTBR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTBR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTBR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTBR_TIMDCMP4 HRTIM_RSTBR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTBR_TIMECMP1_Pos (28U) +#define HRTIM_RSTBR_TIMECMP1_Msk (0x1UL << HRTIM_RSTBR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTBR_TIMECMP1 HRTIM_RSTBR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTBR_TIMECMP2_Pos (29U) +#define HRTIM_RSTBR_TIMECMP2_Msk (0x1UL << HRTIM_RSTBR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTBR_TIMECMP2 HRTIM_RSTBR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTBR_TIMECMP4_Pos (30U) +#define HRTIM_RSTBR_TIMECMP4_Msk (0x1UL << HRTIM_RSTBR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTBR_TIMECMP4 HRTIM_RSTBR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTBR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTBR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTBR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTBR_TIMFCMP2 HRTIM_RSTBR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer C reset enable bits upon other slave timers events */ +#define HRTIM_RSTCR_TIMACMP1_Pos (19U) +#define HRTIM_RSTCR_TIMACMP1_Msk (0x1UL << HRTIM_RSTCR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTCR_TIMACMP1 HRTIM_RSTCR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTCR_TIMACMP2_Pos (20U) +#define HRTIM_RSTCR_TIMACMP2_Msk (0x1UL << HRTIM_RSTCR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTCR_TIMACMP2 HRTIM_RSTCR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTCR_TIMACMP4_Pos (21U) +#define HRTIM_RSTCR_TIMACMP4_Msk (0x1UL << HRTIM_RSTCR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTCR_TIMACMP4 HRTIM_RSTCR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTCR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTCR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTCR_TIMBCMP1 HRTIM_RSTCR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTCR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTCR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTCR_TIMBCMP2 HRTIM_RSTCR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTCR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTCR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTCR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTCR_TIMBCMP4 HRTIM_RSTCR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTCR_TIMDCMP1_Pos (25U) +#define HRTIM_RSTCR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTCR_TIMDCMP1 HRTIM_RSTCR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTCR_TIMDCMP2_Pos (26U) +#define HRTIM_RSTCR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTCR_TIMDCMP2 HRTIM_RSTCR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTCR_TIMDCMP4_Pos (27U) +#define HRTIM_RSTCR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTCR_TIMDCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTCR_TIMDCMP4 HRTIM_RSTCR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTCR_TIMECMP1_Pos (28U) +#define HRTIM_RSTCR_TIMECMP1_Msk (0x1UL << HRTIM_RSTCR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTCR_TIMECMP1 HRTIM_RSTCR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTCR_TIMECMP2_Pos (29U) +#define HRTIM_RSTCR_TIMECMP2_Msk (0x1UL << HRTIM_RSTCR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTCR_TIMECMP2 HRTIM_RSTCR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTCR_TIMECMP4_Pos (30U) +#define HRTIM_RSTCR_TIMECMP4_Msk (0x1UL << HRTIM_RSTCR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTCR_TIMECMP4 HRTIM_RSTCR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTCR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTCR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTCR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTCR_TIMFCMP2 HRTIM_RSTCR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer D reset enable bits upon other slave timers events */ +#define HRTIM_RSTDR_TIMACMP1_Pos (19U) +#define HRTIM_RSTDR_TIMACMP1_Msk (0x1UL << HRTIM_RSTDR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTDR_TIMACMP1 HRTIM_RSTDR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTDR_TIMACMP2_Pos (20U) +#define HRTIM_RSTDR_TIMACMP2_Msk (0x1UL << HRTIM_RSTDR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTDR_TIMACMP2 HRTIM_RSTDR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTDR_TIMACMP4_Pos (21U) +#define HRTIM_RSTDR_TIMACMP4_Msk (0x1UL << HRTIM_RSTDR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTDR_TIMACMP4 HRTIM_RSTDR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTDR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTDR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTDR_TIMBCMP1 HRTIM_RSTDR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTDR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTDR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTDR_TIMBCMP2 HRTIM_RSTDR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTDR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTDR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTDR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTDR_TIMBCMP4 HRTIM_RSTDR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTDR_TIMCCMP1_Pos (25U) +#define HRTIM_RSTDR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTDR_TIMCCMP1 HRTIM_RSTDR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTDR_TIMCCMP2_Pos (26U) +#define HRTIM_RSTDR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTDR_TIMCCMP2 HRTIM_RSTDR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTDR_TIMCCMP4_Pos (27U) +#define HRTIM_RSTDR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTDR_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTDR_TIMCCMP4 HRTIM_RSTDR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTDR_TIMECMP1_Pos (28U) +#define HRTIM_RSTDR_TIMECMP1_Msk (0x1UL << HRTIM_RSTDR_TIMECMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTDR_TIMECMP1 HRTIM_RSTDR_TIMECMP1_Msk /*!< Timer E compare 1 */ +#define HRTIM_RSTDR_TIMECMP2_Pos (29U) +#define HRTIM_RSTDR_TIMECMP2_Msk (0x1UL << HRTIM_RSTDR_TIMECMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTDR_TIMECMP2 HRTIM_RSTDR_TIMECMP2_Msk /*!< Timer E compare 2 */ +#define HRTIM_RSTDR_TIMECMP4_Pos (30U) +#define HRTIM_RSTDR_TIMECMP4_Msk (0x1UL << HRTIM_RSTDR_TIMECMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTDR_TIMECMP4 HRTIM_RSTDR_TIMECMP4_Msk /*!< Timer E compare 4 */ + +#define HRTIM_RSTDR_TIMFCMP2_Pos (31U) +#define HRTIM_RSTDR_TIMFCMP2_Msk (0x1UL << HRTIM_RSTDR_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTDR_TIMFCMP2 HRTIM_RSTDR_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer E reset enable bits upon other slave timers events */ +#define HRTIM_RSTER_TIMACMP1_Pos (19U) +#define HRTIM_RSTER_TIMACMP1_Msk (0x1UL << HRTIM_RSTER_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTER_TIMACMP1 HRTIM_RSTER_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTER_TIMACMP2_Pos (20U) +#define HRTIM_RSTER_TIMACMP2_Msk (0x1UL << HRTIM_RSTER_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTER_TIMACMP2 HRTIM_RSTER_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTER_TIMACMP4_Pos (21U) +#define HRTIM_RSTER_TIMACMP4_Msk (0x1UL << HRTIM_RSTER_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTER_TIMACMP4 HRTIM_RSTER_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTER_TIMBCMP1_Pos (22U) +#define HRTIM_RSTER_TIMBCMP1_Msk (0x1UL << HRTIM_RSTER_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTER_TIMBCMP1 HRTIM_RSTER_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTER_TIMBCMP2_Pos (23U) +#define HRTIM_RSTER_TIMBCMP2_Msk (0x1UL << HRTIM_RSTER_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTER_TIMBCMP2 HRTIM_RSTER_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTER_TIMBCMP4_Pos (24U) +#define HRTIM_RSTER_TIMBCMP4_Msk (0x1UL << HRTIM_RSTER_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTER_TIMBCMP4 HRTIM_RSTER_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTER_TIMCCMP1_Pos (25U) +#define HRTIM_RSTER_TIMCCMP1_Msk (0x1UL << HRTIM_RSTER_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTER_TIMCCMP1 HRTIM_RSTER_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTER_TIMCCMP2_Pos (26U) +#define HRTIM_RSTER_TIMCCMP2_Msk (0x1UL << HRTIM_RSTER_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTER_TIMCCMP2 HRTIM_RSTER_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTER_TIMCCMP4_Pos (27U) +#define HRTIM_RSTER_TIMCCMP4_Msk (0x1UL << HRTIM_RSTER_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTER_TIMCCMP4 HRTIM_RSTER_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTER_TIMDCMP1_Pos (28U) +#define HRTIM_RSTER_TIMDCMP1_Msk (0x1UL << HRTIM_RSTER_TIMDCMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTER_TIMDCMP1 HRTIM_RSTER_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTER_TIMDCMP2_Pos (29U) +#define HRTIM_RSTER_TIMDCMP2_Msk (0x1UL << HRTIM_RSTER_TIMDCMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTER_TIMDCMP2 HRTIM_RSTER_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTER_TIMDCMP4_Pos (30U) +#define HRTIM_RSTER_TIMDCMP4_Msk (0x1UL << HRTIM_RSTER_TIMDCMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTER_TIMDCMP4 HRTIM_RSTER_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTER_TIMFCMP2_Pos (31U) +#define HRTIM_RSTER_TIMFCMP2_Msk (0x1UL << HRTIM_RSTER_TIMFCMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTER_TIMFCMP2 HRTIM_RSTER_TIMFCMP2_Msk /*!< Timer F compare 2 */ + +/* Slave Timer F reset enable bits upon other slave timers events */ +#define HRTIM_RSTFR_TIMACMP1_Pos (19U) +#define HRTIM_RSTFR_TIMACMP1_Msk (0x1UL << HRTIM_RSTFR_TIMACMP1_Pos) /*!< 0x00080000 */ +#define HRTIM_RSTFR_TIMACMP1 HRTIM_RSTFR_TIMACMP1_Msk /*!< Timer A compare 1 */ +#define HRTIM_RSTFR_TIMACMP2_Pos (20U) +#define HRTIM_RSTFR_TIMACMP2_Msk (0x1UL << HRTIM_RSTFR_TIMACMP2_Pos) /*!< 0x00100000 */ +#define HRTIM_RSTFR_TIMACMP2 HRTIM_RSTFR_TIMACMP2_Msk /*!< Timer A compare 2 */ +#define HRTIM_RSTFR_TIMACMP4_Pos (21U) +#define HRTIM_RSTFR_TIMACMP4_Msk (0x1UL << HRTIM_RSTFR_TIMACMP4_Pos) /*!< 0x00200000 */ +#define HRTIM_RSTFR_TIMACMP4 HRTIM_RSTFR_TIMACMP4_Msk /*!< Timer A compare 4 */ + +#define HRTIM_RSTFR_TIMBCMP1_Pos (22U) +#define HRTIM_RSTFR_TIMBCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP1_Pos) /*!< 0x00400000 */ +#define HRTIM_RSTFR_TIMBCMP1 HRTIM_RSTFR_TIMBCMP1_Msk /*!< Timer B compare 1 */ +#define HRTIM_RSTFR_TIMBCMP2_Pos (23U) +#define HRTIM_RSTFR_TIMBCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP2_Pos) /*!< 0x00800000 */ +#define HRTIM_RSTFR_TIMBCMP2 HRTIM_RSTFR_TIMBCMP2_Msk /*!< Timer B compare 2 */ +#define HRTIM_RSTFR_TIMBCMP4_Pos (24U) +#define HRTIM_RSTFR_TIMBCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMBCMP4_Pos) /*!< 0x01000000 */ +#define HRTIM_RSTFR_TIMBCMP4 HRTIM_RSTFR_TIMBCMP4_Msk /*!< Timer B compare 4 */ + +#define HRTIM_RSTFR_TIMCCMP1_Pos (25U) +#define HRTIM_RSTFR_TIMCCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP1_Pos) /*!< 0x02000000 */ +#define HRTIM_RSTFR_TIMCCMP1 HRTIM_RSTFR_TIMCCMP1_Msk /*!< Timer C compare 1 */ +#define HRTIM_RSTFR_TIMCCMP2_Pos (26U) +#define HRTIM_RSTFR_TIMCCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP2_Pos) /*!< 0x04000000 */ +#define HRTIM_RSTFR_TIMCCMP2 HRTIM_RSTFR_TIMCCMP2_Msk /*!< Timer C compare 2 */ +#define HRTIM_RSTFR_TIMCCMP4_Pos (27U) +#define HRTIM_RSTFR_TIMCCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMCCMP4_Pos) /*!< 0x08000000 */ +#define HRTIM_RSTFR_TIMCCMP4 HRTIM_RSTFR_TIMCCMP4_Msk /*!< Timer C compare 4 */ + +#define HRTIM_RSTFR_TIMDCMP1_Pos (28U) +#define HRTIM_RSTFR_TIMDCMP1_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP1_Pos) /*!< 0x10000000 */ +#define HRTIM_RSTFR_TIMDCMP1 HRTIM_RSTFR_TIMDCMP1_Msk /*!< Timer D compare 1 */ +#define HRTIM_RSTFR_TIMDCMP2_Pos (29U) +#define HRTIM_RSTFR_TIMDCMP2_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP2_Pos) /*!< 0x20000000 */ +#define HRTIM_RSTFR_TIMDCMP2 HRTIM_RSTFR_TIMDCMP2_Msk /*!< Timer D compare 2 */ +#define HRTIM_RSTFR_TIMDCMP4_Pos (30U) +#define HRTIM_RSTFR_TIMDCMP4_Msk (0x1UL << HRTIM_RSTFR_TIMDCMP4_Pos) /*!< 0x40000000 */ +#define HRTIM_RSTFR_TIMDCMP4 HRTIM_RSTFR_TIMDCMP4_Msk /*!< Timer D compare 4 */ + +#define HRTIM_RSTFR_TIMECMP2_Pos (31U) +#define HRTIM_RSTFR_TIMECMP2_Msk (0x1UL << HRTIM_RSTFR_TIMECMP2_Pos) /*!< 0x80000000 */ +#define HRTIM_RSTFR_TIMECMP2 HRTIM_RSTFR_TIMECMP2_Msk /*!< Timer E compare 2 */ + /**** Bit definition for Slave Timer Chopper register *************************/ #define HRTIM_CHPR_CARFRQ_Pos (0U) #define HRTIM_CHPR_CARFRQ_Msk (0xFUL << HRTIM_CHPR_CARFRQ_Pos) /*!< 0x0000000F */ @@ -18121,4 +18360,3 @@ typedef struct { * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h index 29ddb21..1de1517 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g491xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -961,6 +960,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1269,6 +1272,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -13699,4 +13711,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h index efc67b1..ee7aa19 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4a1xx.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -993,6 +992,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1303,6 +1306,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -13931,4 +13943,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h index d21f994..5bc4aa9 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h @@ -16,13 +16,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -85,11 +84,11 @@ #endif /* USE_HAL_DRIVER */ /** - * @brief CMSIS Device version number V1.2.1 + * @brief CMSIS Device version number V1.2.2 */ #define __STM32G4_CMSIS_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32G4_CMSIS_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */ -#define __STM32G4_CMSIS_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */ +#define __STM32G4_CMSIS_VERSION_SUB2 (0x02U) /*!< [15:8] sub2 version */ #define __STM32G4_CMSIS_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32G4_CMSIS_VERSION ((__STM32G4_CMSIS_VERSION_MAIN << 24)\ |(__STM32G4_CMSIS_VERSION_SUB1 << 16)\ @@ -178,6 +177,61 @@ typedef enum #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) +/* Use of CMSIS compiler intrinsics for register exclusive access */ +/* Atomic 32-bit register access macro to set one or several bits */ +#define ATOMIC_SET_BIT(REG, BIT) \ + do { \ + uint32_t val; \ + do { \ + val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ + } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ + } while(0) + +/* Atomic 32-bit register access macro to clear one or several bits */ +#define ATOMIC_CLEAR_BIT(REG, BIT) \ + do { \ + uint32_t val; \ + do { \ + val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ + } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ + } while(0) + +/* Atomic 32-bit register access macro to clear and set one or several bits */ +#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ + do { \ + uint32_t val; \ + do { \ + val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ + } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ + } while(0) + +/* Atomic 16-bit register access macro to set one or several bits */ +#define ATOMIC_SETH_BIT(REG, BIT) \ + do { \ + uint16_t val; \ + do { \ + val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ + } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ + } while(0) + +/* Atomic 16-bit register access macro to clear one or several bits */ +#define ATOMIC_CLEARH_BIT(REG, BIT) \ + do { \ + uint16_t val; \ + do { \ + val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ + } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ + } while(0) + +/* Atomic 16-bit register access macro to clear and set one or several bits */ +#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ + do { \ + uint16_t val; \ + do { \ + val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ + } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ + } while(0) + /** * @} @@ -203,4 +257,3 @@ typedef enum -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32gbk1cb.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32gbk1cb.h index 33f1159..5a701aa 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32gbk1cb.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32gbk1cb.h @@ -7,18 +7,17 @@ * This file contains: * - Data structures and the address mapping for all peripherals * - Peripheral's registers declarations and bits definition - * - Macros to access peripheral’s registers hardware + * - Macros to access peripheral's registers hardware * ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -45,11 +44,11 @@ /** * @brief Configuration of the Cortex-M4 Processor and Core Peripherals */ -#define __CM4_REV 0x0001 /*!< Cortex-M4 revision r0p1 */ -#define __MPU_PRESENT 1 /*!< STM32G4XX provides an MPU */ -#define __NVIC_PRIO_BITS 4 /*!< STM32G4XX uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ -#define __FPU_PRESENT 1 /*!< FPU present */ +#define __CM4_REV 0x0001U /*!< Cortex-M4 revision r0p1 */ +#define __MPU_PRESENT 1U /*!< STM32G4XX provides an MPU */ +#define __NVIC_PRIO_BITS 4U /*!< STM32G4XX uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0U /*!< Set to 1 if different SysTick Config is used */ +#define __FPU_PRESENT 1U /*!< FPU present */ /** * @} @@ -902,6 +901,10 @@ typedef struct } UCPD_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1175,6 +1178,15 @@ typedef struct * @{ */ + /** @addtogroup Hardware_Constant_Definition + * @{ + */ +#define LSI_STARTUP_TIME 130U /*!< LSI Maximum startup time in us */ + + /** + * @} + */ + /** @addtogroup Peripheral_Registers_Bits_Definition * @{ */ @@ -13063,4 +13075,3 @@ typedef struct * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h index fbff611..ba8bdae 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -103,4 +102,3 @@ extern void SystemCoreClockUpdate(void); /** * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/LICENSE.txt b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/LICENSE.txt new file mode 100644 index 0000000..5306686 --- /dev/null +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/LICENSE.txt @@ -0,0 +1,6 @@ +This software component is provided to you as part of a software package and +applicable license terms are in the Package_license file. If you received this +software component outside of a package or without applicable license terms, +the terms of the Apache-2.0 license shall apply. +You may obtain a copy of the Apache-2.0 at: +https://opensource.org/licenses/Apache-2.0 diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g431xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g431xx.s index 20cbcc4..679431c 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g431xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g431xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -422,4 +421,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g441xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g441xx.s index b46da7e..ee12e77 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g441xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g441xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -424,4 +423,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g471xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g471xx.s index 6eed0fd..0fe0d09 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g471xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g471xx.s @@ -17,14 +17,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -441,4 +440,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g473xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g473xx.s index 5658005..01b9fc2 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g473xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g473xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -468,4 +467,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g474xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g474xx.s index 93195a1..c351165 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g474xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g474xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -484,4 +483,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g483xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g483xx.s index 1f682db..6d10053 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g483xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g483xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -470,4 +469,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g484xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g484xx.s index 55fbe72..756e492 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g484xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g484xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -486,4 +485,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g491xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g491xx.s index bccbe66..307ab62 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g491xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g491xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -448,4 +447,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g4a1xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g4a1xx.s index d98a6a9..d52ba13 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g4a1xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32g4a1xx.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -450,4 +449,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32gbk1cb.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32gbk1cb.s index bd7f5e7..6e5f0d5 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32gbk1cb.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/arm/startup_stm32gbk1cb.s @@ -16,14 +16,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ;* <<< Use Configuration Wizard in Context Menu >>> ; @@ -420,4 +419,3 @@ __user_initial_stackheap END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g431xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g431xx.s index dd14982..9ea4773 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g431xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g431xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -496,4 +495,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g441xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g441xx.s index 74c76e6..93c064d 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g441xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g441xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -499,4 +498,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g471xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g471xx.s index 2e2d3f1..1add0ca 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g471xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g471xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -523,4 +522,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g473xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g473xx.s index 59a5182..35137d5 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g473xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g473xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -565,4 +564,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g474xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g474xx.s index 8cd3d7d..334d965 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g474xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g474xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -589,4 +588,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g483xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g483xx.s index 4922c5d..45c6156 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g483xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g483xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -568,4 +567,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g484xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g484xx.s index 3a62c0e..c36ca86 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g484xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g484xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -591,4 +590,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g491xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g491xx.s index 401117d..88e2cc1 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g491xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g491xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -535,4 +534,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g4a1xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g4a1xx.s index 043b758..e339f13 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g4a1xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32g4a1xx.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -538,4 +537,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32gbk1cb.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32gbk1cb.s index 8eda963..5fb9133 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32gbk1cb.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/gcc/startup_stm32gbk1cb.s @@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -489,4 +488,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g431xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g431xx.s index e43464c..62e94af 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g431xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g431xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; The modules in this file are included in the libraries, and may be replaced @@ -584,4 +583,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g441xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g441xx.s index d79af22..4ec8ca6 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g441xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g441xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -590,4 +589,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g471xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g471xx.s index e1215f2..7bb91f8 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g471xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g471xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -630,4 +629,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g473xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g473xx.s index cec010c..2e3fdae 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g473xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g473xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -700,4 +699,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g474xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g474xx.s index f60e256..0a4de84 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g474xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g474xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -740,4 +739,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g483xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g483xx.s index aafbd8e..bd515d0 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g483xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g483xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -705,4 +704,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g484xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g484xx.s index 01de00f..22b3268 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g484xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g484xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -745,4 +744,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g491xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g491xx.s index 4d14cbc..878c2fa 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g491xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g491xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -650,4 +649,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g4a1xx.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g4a1xx.s index 11693c7..8cdff83 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g4a1xx.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32g4a1xx.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; @@ -655,4 +654,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32gbk1cb.s b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32gbk1cb.s index 37ec178..07e0bc2 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32gbk1cb.s +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/iar/startup_stm32gbk1cb.s @@ -15,14 +15,13 @@ ;******************************************************************************** ;* @attention ;* -;*

© Copyright (c) 2019 STMicroelectronics. -;* All rights reserved.

-;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. ;* +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. +; ;******************************************************************************* ; ; The modules in this file are included in the libraries, and may be replaced @@ -579,4 +578,3 @@ FMAC_IRQHandler B FMAC_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c index 0c4204e..d20700b 100644 --- a/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c +++ b/codice/Drivers/CMSIS/Device/ST/STM32G4xx/Source/Templates/system_stm32g4xx.c @@ -53,13 +53,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -283,5 +282,4 @@ void SystemCoreClockUpdate(void) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index bf9346f..aca5b00 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -7,13 +7,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -38,6 +37,14 @@ extern "C" { #define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF #define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR #define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR +#if defined(STM32U5) +#define CRYP_DATATYPE_32B CRYP_NO_SWAP +#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP +#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP +#define CRYP_DATATYPE_1B CRYP_BIT_SWAP +#define CRYP_CCF_CLEAR CRYP_CLEAR_CCF +#define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF +#endif /* STM32U5 */ /** * @} */ @@ -206,6 +213,20 @@ extern "C" { * @{ */ #define __HAL_CORTEX_SYSTICKCLK_CONFIG HAL_SYSTICK_CLKSourceConfig +#if defined(STM32U5) +#define MPU_DEVICE_nGnRnE MPU_DEVICE_NGNRNE +#define MPU_DEVICE_nGnRE MPU_DEVICE_NGNRE +#define MPU_DEVICE_nGRE MPU_DEVICE_NGRE +#endif /* STM32U5 */ +/** + * @} + */ + +/** @defgroup CRC_Aliases CRC API aliases + * @{ + */ +#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */ +#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */ /** * @} */ @@ -235,11 +256,18 @@ extern "C" { #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE -#if defined(STM32G4) || defined(STM32H7) +#if defined(STM32G4) || defined(STM32H7) || defined (STM32U5) #define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL #define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL #endif +#if defined(STM32U5) +#define DAC_TRIGGER_STOP_LPTIM1_OUT DAC_TRIGGER_STOP_LPTIM1_CH1 +#define DAC_TRIGGER_STOP_LPTIM3_OUT DAC_TRIGGER_STOP_LPTIM3_CH1 +#define DAC_TRIGGER_LPTIM1_OUT DAC_TRIGGER_LPTIM1_CH1 +#define DAC_TRIGGER_LPTIM3_OUT DAC_TRIGGER_LPTIM3_CH1 +#endif + #if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) || defined(STM32G4) #define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID #define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID @@ -382,7 +410,6 @@ extern "C" { #define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT #endif /* STM32H7 */ - /** * @} */ @@ -470,15 +497,24 @@ extern "C" { #define OB_BOOT_ENTRY_FORCED_FLASH OB_BOOT_LOCK_ENABLE #endif #if defined(STM32H7) -#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1 -#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1 -#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1 -#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2 -#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2 -#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2 -#define FLASH_FLAG_WDW FLASH_FLAG_WBNE -#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL +#define FLASH_FLAG_SNECCE_BANK1RR FLASH_FLAG_SNECCERR_BANK1 +#define FLASH_FLAG_DBECCE_BANK1RR FLASH_FLAG_DBECCERR_BANK1 +#define FLASH_FLAG_STRBER_BANK1R FLASH_FLAG_STRBERR_BANK1 +#define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2 +#define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2 +#define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2 +#define FLASH_FLAG_WDW FLASH_FLAG_WBNE +#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL #endif /* STM32H7 */ +#if defined(STM32U5) +#define OB_USER_nRST_STOP OB_USER_NRST_STOP +#define OB_USER_nRST_STDBY OB_USER_NRST_STDBY +#define OB_USER_nRST_SHDW OB_USER_NRST_SHDW +#define OB_USER_nSWBOOT0 OB_USER_NSWBOOT0 +#define OB_USER_nBOOT0 OB_USER_NBOOT0 +#define OB_nBOOT0_RESET OB_NBOOT0_RESET +#define OB_nBOOT0_SET OB_NBOOT0_SET +#endif /* STM32U5 */ /** * @} @@ -521,6 +557,7 @@ extern "C" { #define HAL_SYSCFG_EnableIOAnalogSwitchVDD HAL_SYSCFG_EnableIOSwitchVDD #define HAL_SYSCFG_DisableIOAnalogSwitchVDD HAL_SYSCFG_DisableIOSwitchVDD #endif /* STM32G4 */ + /** * @} */ @@ -595,12 +632,12 @@ extern "C" { #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 #define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1 -#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) +#if defined(STM32L0) || defined(STM32L4) || defined(STM32F4) || defined(STM32F2) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB) || defined(STM32U5) #define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW #define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM #define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH #define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH -#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB*/ +#endif /* STM32L0 || STM32L4 || STM32F4 || STM32F2 || STM32F7 || STM32G4 || STM32H7 || STM32WB || STM32U5*/ #if defined(STM32L1) #define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW @@ -616,6 +653,20 @@ extern "C" { #endif /* STM32F0 || STM32F3 || STM32F1 */ #define GPIO_AF6_DFSDM GPIO_AF6_DFSDM1 + +#if defined(STM32U5) +#define GPIO_AF0_RTC_50Hz GPIO_AF0_RTC_50HZ +#endif /* STM32U5 */ +/** + * @} + */ + +/** @defgroup HAL_GTZC_Aliased_Defines HAL GTZC Aliased Defines maintained for legacy purpose + * @{ + */ +#if defined(STM32U5) +#define GTZC_PERIPH_DCMI GTZC_PERIPH_DCMI_PSSI +#endif /* STM32U5 */ /** * @} */ @@ -853,6 +904,31 @@ extern "C" { #define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS #define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS + +/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose + * @{ + */ +#define HAL_LPTIM_ReadCompare HAL_LPTIM_ReadCapturedValue +/** + * @} + */ + +/** @defgroup HAL_LPTIM_Aliased_Defines LL LPTIM Aliased Defines maintained for legacy purpose + * @{ + */ +#define LL_LPTIM_SetCompareCH1 LL_LPTIM_OC_SetCompareCH1 +#define LL_LPTIM_SetCompareCH2 LL_LPTIM_OC_SetCompareCH2 +#define LL_LPTIM_GetCompareCH1 LL_LPTIM_OC_GetCompareCH1 +#define LL_LPTIM_GetCompareCH2 LL_LPTIM_OC_GetCompareCH2 +/** + * @} + */ + +#if defined(STM32U5) +#define LPTIM_ISR_CC1 LPTIM_ISR_CC1IF +#define LPTIM_ISR_CC2 LPTIM_ISR_CC2IF +#define LPTIM_CHANNEL_ALL 0x00000000U +#endif /* STM32U5 */ /** * @} */ @@ -1379,6 +1455,20 @@ extern "C" { */ #endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 */ +#if defined(STM32L4) || defined(STM32F7) || defined(STM32F427xx) || defined(STM32F437xx) \ + || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx) \ + || defined(STM32H7) || defined(STM32U5) +/** @defgroup DMA2D_Aliases DMA2D API Aliases + * @{ + */ +#define HAL_DMA2D_DisableCLUT HAL_DMA2D_CLUTLoading_Abort /*!< Aliased to HAL_DMA2D_CLUTLoading_Abort + for compatibility with legacy code */ +/** + * @} + */ + +#endif /* STM32L4 || STM32F7 || STM32F4 || STM32H7 || STM32U5 */ + /** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose * @{ */ @@ -1397,6 +1487,29 @@ extern "C" { * @} */ +/** @defgroup HAL_DCACHE_Aliased_Functions HAL DCACHE Aliased Functions maintained for legacy purpose + * @{ + */ + +#if defined(STM32U5) +#define HAL_DCACHE_CleanInvalidateByAddr HAL_DCACHE_CleanInvalidByAddr +#define HAL_DCACHE_CleanInvalidateByAddr_IT HAL_DCACHE_CleanInvalidByAddr_IT +#endif /* STM32U5 */ + +/** + * @} + */ + +#if !defined(STM32F2) +/** @defgroup HASH_alias HASH API alias + * @{ + */ +#define HAL_HASHEx_IRQHandler HAL_HASH_IRQHandler /*!< Redirection for compatibility with legacy code */ +/** + * + * @} + */ +#endif /* STM32F2 */ /** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose * @{ */ @@ -3329,6 +3442,31 @@ extern "C" { #define RCC_DFSDM1CLKSOURCE_APB2 RCC_DFSDM1CLKSOURCE_PCLK2 #define RCC_DFSDM2CLKSOURCE_APB2 RCC_DFSDM2CLKSOURCE_PCLK2 #define RCC_FMPI2C1CLKSOURCE_APB RCC_FMPI2C1CLKSOURCE_PCLK1 +#if defined(STM32U5) +#define MSIKPLLModeSEL RCC_MSIKPLL_MODE_SEL +#define MSISPLLModeSEL RCC_MSISPLL_MODE_SEL +#define __HAL_RCC_AHB21_CLK_DISABLE __HAL_RCC_AHB2_1_CLK_DISABLE +#define __HAL_RCC_AHB22_CLK_DISABLE __HAL_RCC_AHB2_2_CLK_DISABLE +#define __HAL_RCC_AHB1_CLK_Disable_Clear __HAL_RCC_AHB1_CLK_ENABLE +#define __HAL_RCC_AHB21_CLK_Disable_Clear __HAL_RCC_AHB2_1_CLK_ENABLE +#define __HAL_RCC_AHB22_CLK_Disable_Clear __HAL_RCC_AHB2_2_CLK_ENABLE +#define __HAL_RCC_AHB3_CLK_Disable_Clear __HAL_RCC_AHB3_CLK_ENABLE +#define __HAL_RCC_APB1_CLK_Disable_Clear __HAL_RCC_APB1_CLK_ENABLE +#define __HAL_RCC_APB2_CLK_Disable_Clear __HAL_RCC_APB2_CLK_ENABLE +#define __HAL_RCC_APB3_CLK_Disable_Clear __HAL_RCC_APB3_CLK_ENABLE +#define IS_RCC_MSIPLLModeSelection IS_RCC_MSIPLLMODE_SELECT +#define RCC_PERIPHCLK_CLK48 RCC_PERIPHCLK_ICLK +#define RCC_CLK48CLKSOURCE_HSI48 RCC_ICLK_CLKSOURCE_HSI48 +#define RCC_CLK48CLKSOURCE_PLL2 RCC_ICLK_CLKSOURCE_PLL2 +#define RCC_CLK48CLKSOURCE_PLL1 RCC_ICLK_CLKSOURCE_PLL1 +#define RCC_CLK48CLKSOURCE_MSIK RCC_ICLK_CLKSOURCE_MSIK +#define __HAL_RCC_ADC1_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE +#define __HAL_RCC_ADC1_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE +#define __HAL_RCC_ADC1_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED +#define __HAL_RCC_ADC1_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED +#define __HAL_RCC_ADC1_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET +#define __HAL_RCC_ADC1_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET +#endif /** * @} @@ -3346,7 +3484,7 @@ extern "C" { /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose * @{ */ -#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) +#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL) || defined (STM32U5) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -3403,13 +3541,22 @@ extern "C" { * @} */ -/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose +/** @defgroup HAL_SD_Aliased_Macros HAL SD/MMC Aliased Macros maintained for legacy purpose * @{ */ #define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE #define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS +#if !defined(STM32F1) && !defined(STM32F2) && !defined(STM32F4) && !defined(STM32F7) && !defined(STM32L1) +#define eMMC_HIGH_VOLTAGE_RANGE EMMC_HIGH_VOLTAGE_RANGE +#define eMMC_DUAL_VOLTAGE_RANGE EMMC_DUAL_VOLTAGE_RANGE +#define eMMC_LOW_VOLTAGE_RANGE EMMC_LOW_VOLTAGE_RANGE + +#define SDMMC_NSpeed_CLK_DIV SDMMC_NSPEED_CLK_DIV +#define SDMMC_HSpeed_CLK_DIV SDMMC_HSPEED_CLK_DIV +#endif + #if defined(STM32F4) || defined(STM32F2) #define SD_SDMMC_DISABLED SD_SDIO_DISABLED #define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY @@ -3738,6 +3885,16 @@ extern "C" { * @} */ +/** @defgroup HAL_Generic_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose + * @{ + */ +#if defined (STM32F7) +#define ART_ACCLERATOR_ENABLE ART_ACCELERATOR_ENABLE +#endif /* STM32F7 */ +/** + * @} + */ + /** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose * @{ */ @@ -3752,5 +3909,4 @@ extern "C" { #endif /* STM32_HAL_LEGACY */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32_assert_template.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32_assert_template.h index 3d6f2a7..16f723e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32_assert_template.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32_assert_template.h @@ -8,13 +8,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -54,4 +53,3 @@ void assert_failed(uint8_t *file, uint32_t line); #endif /* STM32_ASSERT_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h index 6cddc67..60a335b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h @@ -7,13 +7,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -623,4 +622,3 @@ void HAL_SYSCFG_CCMSRAM_WriteProtectionEnable(uint32_t Page); #endif /* STM32G4xx_HAL_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h index 2bf34ea..f0114a3 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -2033,5 +2032,3 @@ void ADC_DMAError(DMA_HandleTypeDef *hdma); #endif /* STM32G4xx_HAL_ADC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h index 0b10338..d2da2c2 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1392,6 +1391,3 @@ HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *h #endif #endif /* STM32G4xx_HAL_ADC_EX_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_comp.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_comp.h index dbac75c..9e16377 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_comp.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_comp.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -90,7 +89,7 @@ typedef enum typedef struct __COMP_HandleTypeDef #else typedef struct -#endif +#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */ { COMP_TypeDef *Instance; /*!< Register base address */ COMP_InitTypeDef Init; /*!< COMP required parameters */ @@ -294,7 +293,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer } while(0) #else #define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET) -#endif +#endif /* USE_HAL_COMP_REGISTER_CALLBACKS */ /** * @brief Clear COMP error code (set it to no error code "HAL_COMP_ERROR_NONE"). @@ -963,7 +962,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer #define COMP_EXTI_LINE_COMP5 (LL_EXTI_LINE_31) /*!< EXTI line 31 connected to COMP5 output. Note: For COMPx instance availability, please refer to datasheet */ #define COMP_EXTI_LINE_COMP6 (LL_EXTI_LINE_32) /*!< EXTI line 32 connected to COMP6 output. Note: For COMPx instance availability, please refer to datasheet */ #define COMP_EXTI_LINE_COMP7 (LL_EXTI_LINE_33) /*!< EXTI line 33 connected to COMP7 output. Note: For COMPx instance availability, please refer to datasheet */ -#endif +#endif /* STM32G474xx || STM32G484xx || STM32G473xx || STM32G483xx */ /** * @} */ @@ -1009,7 +1008,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer :((__INSTANCE__) == COMP2) ? COMP_EXTI_LINE_COMP2 \ :((__INSTANCE__) == COMP3) ? COMP_EXTI_LINE_COMP3 \ : COMP_EXTI_LINE_COMP4) -#endif +#endif /* STM32G474xx || STM32G484xx || STM32G473xx || STM32G483xx */ /** * @} */ @@ -1252,7 +1251,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer || ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM15_OC1) \ || ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM4_OC3) \ ) -#endif +#endif /* STM32G474xx || STM32G484xx || STM32G473xx || STM32G483xx */ #define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \ ((__MODE__) == COMP_TRIGGERMODE_IT_RISING) || \ @@ -1349,5 +1348,3 @@ uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp); #endif #endif /* STM32G4xx_HAL_COMP_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_conf_template.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_conf_template.h index b1a0e2b..6f79c8e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_conf_template.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_conf_template.h @@ -8,13 +8,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -379,4 +378,3 @@ void assert_failed(uint8_t *file, uint32_t line); #endif /* STM32G4xx_HAL_CONF_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h index aa1b529..0297bc2 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h @@ -7,13 +7,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -608,5 +607,3 @@ uint32_t HAL_CORDIC_GetError(CORDIC_HandleTypeDef *hcordic); #endif #endif /* STM32G4xx_HAL_CORDIC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h index 8d84d9c..c55a859 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -418,4 +417,3 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); #endif /* __STM32G4xx_HAL_CORTEX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h index 289cc8e..8b9a854 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -60,19 +59,22 @@ typedef struct { uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used. If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default - X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1. + X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + + X^4 + X^2+ X +1. In that case, there is no need to set GeneratingPolynomial field. - If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set. */ + If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and + CRCLength fields must be set. */ uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used. If set to DEFAULT_INIT_VALUE_ENABLE, resort to default - 0xFFFFFFFF value. In that case, there is no need to set InitValue field. - If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */ + 0xFFFFFFFF value. In that case, there is no need to set InitValue field. If + otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */ uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree - respectively equal to 7, 8, 16 or 32. This field is written in normal representation, - e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65. - No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE. */ + respectively equal to 7, 8, 16 or 32. This field is written in normal, + representation e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 + is written 0x65. No need to specify it if DefaultPolynomialUse is set to + DEFAULT_POLYNOMIAL_ENABLE. */ uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length. Value can be either one of @@ -87,14 +89,18 @@ typedef struct uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode. Can be either one of the following values @arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion - @arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2 - @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C - @arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */ + @arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D + becomes 0x58D43CB2 + @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, + 0x1A2B3C4D becomes 0xD458B23C + @arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D + becomes 0xB23CD458 */ uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode. Can be either @arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion, - @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */ + @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted + into 0x22CC4488 */ } CRC_InitTypeDef; /** @@ -112,12 +118,16 @@ typedef struct uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format. Can be either - @arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data) - @arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data) - @arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bit data) + @arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes + (8-bit data) + @arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of + half-words (16-bit data) + @arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words + (32-bit data) - Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error - must occur if InputBufferFormat is not one of the three values listed above */ + Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization + error must occur if InputBufferFormat is not one of the three values listed + above */ } CRC_HandleTypeDef; /** * @} @@ -199,15 +209,6 @@ typedef struct * @} */ -/** @defgroup CRC_Aliases CRC API aliases - * @{ - */ -#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */ -#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */ -/** - * @} - */ - /** * @} */ @@ -339,5 +340,3 @@ HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); #endif #endif /* STM32G4xx_HAL_CRC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc_ex.h index a300db7..41d02a7 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_crc_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -149,5 +148,3 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_ #endif #endif /* STM32G4xx_HAL_CRC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp.h index e425666..6e1cdb2 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -107,7 +106,7 @@ typedef enum typedef struct __CRYP_HandleTypeDef #else typedef struct -#endif +#endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ { AES_TypeDef *Instance; /*!< AES Register base address */ @@ -644,5 +643,3 @@ uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp); #endif #endif /* STM32G4xx_HAL_CRYP_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp_ex.h index fb7b465..b7469aa 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cryp_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -129,5 +128,3 @@ void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp); #endif #endif /* STM32G4xx_HAL_CRYP_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h index 212c571..3819edf 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -79,19 +78,19 @@ typedef struct __IO uint32_t ErrorCode; /*!< DAC Error code */ #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) - void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); - void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); - void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); - void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); + void (* ConvCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); + void (* ConvHalfCpltCallbackCh1) (struct __DAC_HandleTypeDef *hdac); + void (* ErrorCallbackCh1) (struct __DAC_HandleTypeDef *hdac); + void (* DMAUnderrunCallbackCh1) (struct __DAC_HandleTypeDef *hdac); - void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); - void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); - void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); - void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); + void (* ConvCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); + void (* ConvHalfCpltCallbackCh2) (struct __DAC_HandleTypeDef *hdac); + void (* ErrorCallbackCh2) (struct __DAC_HandleTypeDef *hdac); + void (* DMAUnderrunCallbackCh2) (struct __DAC_HandleTypeDef *hdac); - void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); - void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); + void (* MspInitCallback) (struct __DAC_HandleTypeDef *hdac); + void (* MspDeInitCallback) (struct __DAC_HandleTypeDef *hdac); #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ } DAC_HandleTypeDef; @@ -613,4 +612,3 @@ void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); #endif /* STM32G4xx_HAL_DAC_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h index ee378b8..90d60ab 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -344,4 +343,3 @@ void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); #endif /* STM32G4xx_HAL_DAC_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h index 579466a..c16f6c7 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h @@ -7,13 +7,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -208,4 +207,3 @@ typedef enum #endif /* ___STM32G4xx_HAL_DEF */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h index ec21906..0e6eecf 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -851,4 +850,3 @@ uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma); #endif /* __STM32G4xx_HAL_DMA_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h index ac26051..ac8d562 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -263,4 +262,3 @@ void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma); #endif /* __STM32G4xx_HAL_DMA_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h index 7d02a79..afde61d 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -314,4 +313,3 @@ void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti); #endif /* STM32G4xx_HAL_EXTI_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fdcan.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fdcan.h index d90360f..3d517c6 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fdcan.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fdcan.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1268,14 +1267,6 @@ HAL_FDCAN_StateTypeDef HAL_FDCAN_GetState(FDCAN_HandleTypeDef *hfdcan); */ /* Private types -------------------------------------------------------------*/ -/** @defgroup FDCAN_Private_Types FDCAN Private Types - * @{ - */ - -/** - * @} - */ - /* Private variables ---------------------------------------------------------*/ /** @defgroup FDCAN_Private_Variables FDCAN Private Variables * @{ @@ -1330,8 +1321,8 @@ HAL_FDCAN_StateTypeDef HAL_FDCAN_GetState(FDCAN_HandleTypeDef *hfdcan); #define IS_FDCAN_DATA_SJW(SJW) (((SJW) >= 1U) && ((SJW) <= 16U)) #define IS_FDCAN_DATA_TSEG1(TSEG1) (((TSEG1) >= 1U) && ((TSEG1) <= 32U)) #define IS_FDCAN_DATA_TSEG2(TSEG2) (((TSEG2) >= 1U) && ((TSEG2) <= 16U)) -#define IS_FDCAN_MAX_VALUE(VALUE, MAX) ((VALUE) <= (MAX)) -#define IS_FDCAN_MIN_VALUE(VALUE, MIN) ((VALUE) >= (MIN)) +#define IS_FDCAN_MAX_VALUE(VALUE, _MAX_) ((VALUE) <= (_MAX_)) +#define IS_FDCAN_MIN_VALUE(VALUE, _MIN_) ((VALUE) >= (_MIN_)) #define IS_FDCAN_TX_FIFO_QUEUE_MODE(MODE) (((MODE) == FDCAN_TX_FIFO_OPERATION ) || \ ((MODE) == FDCAN_TX_QUEUE_OPERATION)) #define IS_FDCAN_ID_TYPE(ID_TYPE) (((ID_TYPE) == FDCAN_STANDARD_ID) || \ @@ -1420,22 +1411,8 @@ HAL_FDCAN_StateTypeDef HAL_FDCAN_GetState(FDCAN_HandleTypeDef *hfdcan); */ /* Private functions prototypes ----------------------------------------------*/ -/** @defgroup FDCAN_Private_Functions_Prototypes FDCAN Private Functions Prototypes - * @{ - */ - -/** - * @} - */ - /* Private functions ---------------------------------------------------------*/ -/** @defgroup FDCAN_Private_Functions FDCAN Private Functions - * @{ - */ -/** - * @} - */ /** * @} */ @@ -1450,6 +1427,3 @@ HAL_FDCAN_StateTypeDef HAL_FDCAN_GetState(FDCAN_HandleTypeDef *hfdcan); #endif #endif /* STM32G4xx_HAL_FDCAN_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h index 8051c2f..f13aa0b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -880,7 +879,8 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); #define FLASH_SIZE ((((*((uint16_t *)FLASH_SIZE_DATA_REGISTER)) == 0xFFFFU)) ? (0x80UL << 10U) : \ (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & 0xFFFFUL) << 10U)) #define FLASH_BANK_SIZE (FLASH_SIZE) -#define FLASH_PAGE_NB ((FLASH_SIZE == 0x00080000U) ? 256U : 64U) +#define FLASH_PAGE_NB ((FLASH_SIZE == 0x00080000U) ? 256U : \ + ((FLASH_SIZE == 0x00040000U) ? 128U : 64U)) #endif #define FLASH_PAGE_SIZE 0x800U /* 2 KB */ @@ -1015,4 +1015,3 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); #endif /* STM32G4xx_HAL_FLASH_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h index 0a3fff4..b785f6f 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -88,4 +87,3 @@ void FLASH_FlushCaches(void); #endif /* STM32G4xx_HAL_FLASH_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h index cbfdc98..3f0f1bb 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -73,4 +72,3 @@ __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig); #endif /* STM32G4xx_FLASH_RAMFUNC_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fmac.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fmac.h index 39a8d19..4bea105 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fmac.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_fmac.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -689,5 +688,3 @@ uint32_t HAL_FMAC_GetError(FMAC_HandleTypeDef *hfmac); #endif #endif /* STM32G4xx_HAL_FMAC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h index 7afcf12..1b710c1 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -107,26 +106,28 @@ typedef enum /** @defgroup GPIO_mode GPIO mode * @brief GPIO Configuration Mode - * Elements values convention: 0xX0yz00YZ - * - X : GPIO mode or EXTI Mode - * - y : External IT or Event trigger detection - * - z : IO configuration on External IT or Event - * - Y : Output type (Push Pull or Open Drain) - * - Z : IO Direction mode (Input, Output, Alternate or Analog) + * Elements values convention: 0x00WX00YZ + * - W : EXTI trigger detection on 3 bits + * - X : EXTI mode (IT or Event) on 2 bits + * - Y : Output type (Push Pull or Open Drain) on 1 bit + * - Z : GPIO mode (Input, Output, Alternate or Analog) on 2 bits * @{ - */ -#define GPIO_MODE_INPUT (0x00000000U) /*!< Input Floating Mode */ -#define GPIO_MODE_OUTPUT_PP (0x00000001U) /*!< Output Push Pull Mode */ -#define GPIO_MODE_OUTPUT_OD (0x00000011U) /*!< Output Open Drain Mode */ -#define GPIO_MODE_AF_PP (0x00000002U) /*!< Alternate Function Push Pull Mode */ -#define GPIO_MODE_AF_OD (0x00000012U) /*!< Alternate Function Open Drain Mode */ -#define GPIO_MODE_ANALOG (0x00000003U) /*!< Analog Mode */ -#define GPIO_MODE_IT_RISING (0x10110000U) /*!< External Interrupt Mode with Rising edge trigger detection */ -#define GPIO_MODE_IT_FALLING (0x10210000U) /*!< External Interrupt Mode with Falling edge trigger detection */ -#define GPIO_MODE_IT_RISING_FALLING (0x10310000U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ -#define GPIO_MODE_EVT_RISING (0x10120000U) /*!< External Event Mode with Rising edge trigger detection */ -#define GPIO_MODE_EVT_FALLING (0x10220000U) /*!< External Event Mode with Falling edge trigger detection */ -#define GPIO_MODE_EVT_RISING_FALLING (0x10320000U) /*!< External Event Mode with Rising/Falling edge trigger detection */ + */ +#define GPIO_MODE_INPUT MODE_INPUT /*!< Input Floating Mode */ +#define GPIO_MODE_OUTPUT_PP (MODE_OUTPUT | OUTPUT_PP) /*!< Output Push Pull Mode */ +#define GPIO_MODE_OUTPUT_OD (MODE_OUTPUT | OUTPUT_OD) /*!< Output Open Drain Mode */ +#define GPIO_MODE_AF_PP (MODE_AF | OUTPUT_PP) /*!< Alternate Function Push Pull Mode */ +#define GPIO_MODE_AF_OD (MODE_AF | OUTPUT_OD) /*!< Alternate Function Open Drain Mode */ + +#define GPIO_MODE_ANALOG MODE_ANALOG /*!< Analog Mode */ + +#define GPIO_MODE_IT_RISING (MODE_INPUT | EXTI_IT | TRIGGER_RISING) /*!< External Interrupt Mode with Rising edge trigger detection */ +#define GPIO_MODE_IT_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_FALLING) /*!< External Interrupt Mode with Falling edge trigger detection */ +#define GPIO_MODE_IT_RISING_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ + +#define GPIO_MODE_EVT_RISING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING) /*!< External Event Mode with Rising edge trigger detection */ +#define GPIO_MODE_EVT_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_FALLING) /*!< External Event Mode with Falling edge trigger detection */ +#define GPIO_MODE_EVT_RISING_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Event Mode with Rising/Falling edge trigger detection */ /** * @} */ @@ -208,6 +209,31 @@ typedef enum */ /* Private macros ------------------------------------------------------------*/ +/** @defgroup GPIO_Private_Constants GPIO Private Constants + * @{ + */ +#define GPIO_MODE_Pos 0U +#define GPIO_MODE (0x3UL << GPIO_MODE_Pos) +#define MODE_INPUT (0x0UL << GPIO_MODE_Pos) +#define MODE_OUTPUT (0x1UL << GPIO_MODE_Pos) +#define MODE_AF (0x2UL << GPIO_MODE_Pos) +#define MODE_ANALOG (0x3UL << GPIO_MODE_Pos) +#define OUTPUT_TYPE_Pos 4U +#define OUTPUT_TYPE (0x1UL << OUTPUT_TYPE_Pos) +#define OUTPUT_PP (0x0UL << OUTPUT_TYPE_Pos) +#define OUTPUT_OD (0x1UL << OUTPUT_TYPE_Pos) +#define EXTI_MODE_Pos 16U +#define EXTI_MODE (0x3UL << EXTI_MODE_Pos) +#define EXTI_IT (0x1UL << EXTI_MODE_Pos) +#define EXTI_EVT (0x2UL << EXTI_MODE_Pos) +#define TRIGGER_MODE_Pos 20U +#define TRIGGER_MODE (0x7UL << TRIGGER_MODE_Pos) +#define TRIGGER_RISING (0x1UL << TRIGGER_MODE_Pos) +#define TRIGGER_FALLING (0x2UL << TRIGGER_MODE_Pos) +/** + * @} + */ + /** @defgroup GPIO_Private_Macros GPIO Private Macros * @{ */ @@ -298,4 +324,3 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); #endif /* STM32G4xx_HAL_GPIO_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h index 03487eb..ec466f9 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -339,4 +338,3 @@ extern "C" { #endif /* STM32G4xx_HAL_GPIO_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_hrtim.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_hrtim.h index 5d66505..101d569 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_hrtim.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_hrtim.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1290,7 +1289,7 @@ typedef void (* pHRTIM_TIMxCallbackTypeDef)(HRTIM_HandleTypeDef *hhrtim, /*!< /** @defgroup HRTIM_Output_Reset_Source HRTIM Output Reset Source * @{ * @brief Constants defining the events that can be selected to configure the - * set crossbar of a timer output + * reset crossbar of a timer output */ #define HRTIM_OUTPUTRESET_NONE 0x00000000U /*!< Reset the output reset crossbar */ #define HRTIM_OUTPUTRESET_RESYNC (HRTIM_RST1R_RESYNC) /*!< Timer reset event coming solely from software or SYNC input forces the output to its inactive state */ @@ -1793,10 +1792,10 @@ typedef void (* pHRTIM_TIMxCallbackTypeDef)(HRTIM_HandleTypeDef *hhrtim, /*!< * @brief Constants defining the source and event to be sent on the * synchronization outputs */ -#define HRTIM_SYNCOUTPUTSOURCE_MASTER_START 0x00000000U /*!< A pulse is sent on the SYNCOUT output upon master timer start event */ -#define HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon master timer compare 1 event*/ -#define HRTIM_SYNCOUTPUTSOURCE_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /*!< A pulse is sent on the SYNCOUT output upon timer A start or reset events */ -#define HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon timer A compare 1 event */ +#define HRTIM_SYNCOUTPUTSOURCE_MASTER_START 0x00000000U /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon master timer start event */ +#define HRTIM_SYNCOUTPUTSOURCE_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon master timer compare 1 event */ +#define HRTIM_SYNCOUTPUTSOURCE_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon timer A start or reset events */ +#define HRTIM_SYNCOUTPUTSOURCE_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon timer A compare 1 event */ /** * @} */ @@ -5140,5 +5139,3 @@ HAL_StatusTypeDef HAL_HRTIM_TIMxUnRegisterCallback(HRTIM_HandleTypeDef * h #endif #endif /* STM32G4xx_HAL_HRTIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h index 797a616..a2ae591 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -48,29 +47,30 @@ extern "C" { typedef struct { uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. - This parameter calculated by referring to I2C initialization - section in Reference manual */ + This parameter calculated by referring to I2C initialization section + in Reference manual */ uint32_t OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ + This parameter can be a 7-bit or 10-bit address. */ uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. - This parameter can be a value of @ref I2C_ADDRESSING_MODE */ + This parameter can be a value of @ref I2C_ADDRESSING_MODE */ uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. - This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ + This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected - This parameter can be a 7-bit address. */ + This parameter can be a 7-bit address. */ - uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected - This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ + uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing + mode is selected. + This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. - This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ + This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. - This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ + This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ } I2C_InitTypeDef; @@ -200,7 +200,8 @@ typedef struct __I2C_HandleTypeDef __IO uint32_t PreviousState; /*!< I2C communication Previous state */ - HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ + HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); + /*!< I2C transfer IRQ handler function pointer */ DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ @@ -217,20 +218,32 @@ typedef struct __I2C_HandleTypeDef __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) - void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Tx Transfer completed callback */ - void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Master Rx Transfer completed callback */ - void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Tx Transfer completed callback */ - void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Slave Rx Transfer completed callback */ - void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Listen Complete callback */ - void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Tx Transfer completed callback */ - void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Memory Rx Transfer completed callback */ - void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Error callback */ - void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Abort callback */ + void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Master Tx Transfer completed callback */ + void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Master Rx Transfer completed callback */ + void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Slave Tx Transfer completed callback */ + void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Slave Rx Transfer completed callback */ + void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Listen Complete callback */ + void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Memory Tx Transfer completed callback */ + void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Memory Rx Transfer completed callback */ + void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Error callback */ + void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Abort callback */ - void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< I2C Slave Address Match callback */ + void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); + /*!< I2C Slave Address Match callback */ - void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp Init callback */ - void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); /*!< I2C Msp DeInit callback */ + void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Msp Init callback */ + void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); + /*!< I2C Msp DeInit callback */ #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } I2C_HandleTypeDef; @@ -259,8 +272,11 @@ typedef enum /** * @brief HAL I2C Callback pointer definition */ -typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); /*!< pointer to an I2C callback function */ -typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an I2C Address Match callback function */ +typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); +/*!< pointer to an I2C callback function */ +typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, + uint16_t AddrMatchCode); +/*!< pointer to an I2C Address Match callback function */ #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ /** @@ -440,14 +456,14 @@ typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t Trans * @retval None */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) -#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ - (__HANDLE__)->MspInitCallback = NULL; \ - (__HANDLE__)->MspDeInitCallback = NULL; \ +#define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ + (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ + (__HANDLE__)->MspInitCallback = NULL; \ + (__HANDLE__)->MspDeInitCallback = NULL; \ } while(0) #else #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) -#endif +#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ /** @brief Enable the specified I2C interrupt. * @param __HANDLE__ specifies the I2C Handle. @@ -542,26 +558,27 @@ typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t Trans * * @retval None */ -#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ - : ((__HANDLE__)->Instance->ICR = (__FLAG__))) +#define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \ + ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ + ((__HANDLE__)->Instance->ICR = (__FLAG__))) /** @brief Enable the specified I2C peripheral. * @param __HANDLE__ specifies the I2C Handle. * @retval None */ -#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) +#define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) /** @brief Disable the specified I2C peripheral. * @param __HANDLE__ specifies the I2C Handle. * @retval None */ -#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) +#define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. * @param __HANDLE__ specifies the I2C Handle. * @retval None */ -#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) +#define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) /** * @} */ @@ -601,12 +618,14 @@ HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); */ /* IO operation functions ****************************************************/ /******* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, - uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, +HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, + uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, + uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, + uint32_t Timeout); HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, @@ -757,10 +776,14 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ - (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) + (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \ + I2C_CR2_NBYTES | I2C_CR2_RELOAD | \ + I2C_CR2_RD_WRN))) -#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U)) -#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U)) +#define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \ + >> 16U)) +#define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \ + >> 16U)) #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) @@ -772,10 +795,15 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); (uint16_t)(0xFF00U))) >> 8U))) #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) -#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ - (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) +#define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \ + (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ + (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \ + (~I2C_CR2_RD_WRN)) : \ + (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ + (I2C_CR2_ADD10) | (I2C_CR2_START)) & \ + (~I2C_CR2_RD_WRN))) -#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \ +#define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \ ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) /** @@ -805,5 +833,3 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); #endif /* STM32G4xx_HAL_I2C_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h index 3da8669..9fda573 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -66,7 +65,7 @@ extern "C" { #define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ #else #define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ -#endif +#endif /* SYSCFG_CFGR1_I2C4_FMP */ /** * @} */ @@ -89,7 +88,7 @@ extern "C" { * @{ */ -/** @addtogroup I2CEx_Exported_Functions_Group1 I2C Extended Filter Mode Functions +/** @addtogroup I2CEx_Exported_Functions_Group1 Filter Mode Functions * @{ */ /* Peripheral Control functions ************************************************/ @@ -99,7 +98,7 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_ * @} */ -/** @addtogroup I2CEx_Exported_Functions_Group2 I2C Extended WakeUp Mode Functions +/** @addtogroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions * @{ */ HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); @@ -108,7 +107,7 @@ HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); * @} */ -/** @addtogroup I2CEx_Exported_Functions_Group3 I2C Extended FastModePlus Functions +/** @addtogroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions * @{ */ void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); @@ -117,7 +116,6 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); * @} */ - /** * @} */ @@ -175,5 +173,3 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); #endif #endif /* STM32G4xx_HAL_I2C_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2s.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2s.h index 62ee95d..2d6554b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2s.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2s.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -553,4 +552,3 @@ uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); #endif /* STM32G4xx_HAL_I2S_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda.h index c7ca501..35f6626 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -144,7 +143,7 @@ typedef struct IRDA_InitTypeDef Init; /*!< IRDA communication parameters */ - uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */ + const uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */ uint16_t TxXferSize; /*!< IRDA Tx Transfer size */ @@ -828,11 +827,11 @@ HAL_StatusTypeDef HAL_IRDA_UnRegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRD */ /* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); @@ -891,4 +890,3 @@ uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda); #endif /* STM32G4xx_HAL_IRDA_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda_ex.h index 05c0431..40556fe 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_irda_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -421,4 +420,3 @@ extern "C" { #endif /* STM32G4xx_HAL_IRDA_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_iwdg.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_iwdg.h index 5097962..955f92a 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_iwdg.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_iwdg.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -236,5 +235,3 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); #endif #endif /* STM32G4xx_HAL_IWDG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_lptim.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_lptim.h index 850b6ea..85bf1f7 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_lptim.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_lptim.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -97,30 +96,30 @@ typedef struct */ typedef struct { - LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ + LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ - LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */ + LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ - LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ + LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ - uint32_t OutputPolarity; /*!< Specifies the Output polarity. - This parameter can be a value of @ref LPTIM_Output_Polarity */ + uint32_t OutputPolarity; /*!< Specifies the Output polarity. + This parameter can be a value of @ref LPTIM_Output_Polarity */ - uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare - values is done immediately or after the end of current period. - This parameter can be a value of @ref LPTIM_Updating_Mode */ + uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare + values is done immediately or after the end of current period. + This parameter can be a value of @ref LPTIM_Updating_Mode */ - uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event - or each external event. - This parameter can be a value of @ref LPTIM_Counter_Source */ + uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event + or each external event. + This parameter can be a value of @ref LPTIM_Counter_Source */ - uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). - This parameter can be a value of @ref LPTIM_Input1_Source */ + uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). + This parameter can be a value of @ref LPTIM_Input1_Source */ - uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). - Note: This parameter is used only for encoder feature so is used only - for LPTIM1 instance. - This parameter can be a value of @ref LPTIM_Input2_Source */ + uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). + Note: This parameter is used only for encoder feature so is used only + for LPTIM1 instance. + This parameter can be a value of @ref LPTIM_Input2_Source */ } LPTIM_InitTypeDef; /** @@ -874,5 +873,3 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim); #endif #endif /* STM32G4xx_HAL_LPTIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nand.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nand.h index fefd472..786335d 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nand.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nand.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -325,8 +324,10 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); * @retval NAND Raw address value */ #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \ - (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * \ - ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize))) + (((__ADDRESS__)->Block + \ + (((__ADDRESS__)->Plane) * \ + ((__HANDLE__)->Config.PlaneSize))) * \ + ((__HANDLE__)->Config.BlockSize))) /** * @brief NAND memory Column address computation. @@ -376,5 +377,3 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); #endif #endif /* STM32G4xx_HAL_NAND_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nor.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nor.h index 34f6238..5623ffb 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nor.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_nor.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -325,5 +324,3 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres #endif #endif /* STM32G4xx_HAL_NOR_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h index 5397071..739ad43 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -452,7 +451,7 @@ typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp); ((GAIN) == OPAMP_PGA_GAIN_32_OR_MINUS_31) || \ ((GAIN) == OPAMP_PGA_GAIN_64_OR_MINUS_63)) -#define IS_OPAMP_POWERMODE(POWERMODE) (((POWERMODE) == OPAMP_POWERMODE_NORMAL) || \ +#define IS_OPAMP_POWERMODE(POWERMODE) (((POWERMODE) == OPAMP_POWERMODE_NORMALSPEED) || \ ((POWERMODE) == OPAMP_POWERMODE_HIGHSPEED) ) #define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \ @@ -572,4 +571,3 @@ OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset(OPAMP_HandleTypeDef *hopamp, #endif /* STM32G4xx_HAL_OPAMP_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h index 5a136f9..f9bfa6e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -84,4 +83,3 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA #endif /* STM32G4xx_HAL_OPAMP_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h index d9e074b..48b51e1 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -193,13 +192,16 @@ typedef struct */ -#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= (uint16_t)(~(__INTERRUPT__))) +#define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) +#define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) +#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance)\ + & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE -#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) +#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR)\ + &= (uint16_t)(~(__INTERRUPT__))) + +#define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE +#define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) /** @@ -343,13 +345,11 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); - HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); - uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); /** * @} @@ -433,7 +433,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); #define USB_CNTRX_BLSIZE (0x1U << 15) /* SetENDPOINT */ -#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) +#define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)\ + (&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) /* GetENDPOINT */ #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U))) @@ -448,7 +449,9 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); * @param wType Endpoint Type. * @retval None */ -#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) +#define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), ((PCD_GET_ENDPOINT((USBx), (bEpNum))\ + & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX))) + /** * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) @@ -465,7 +468,7 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); * @param bEpNum, bDir * @retval None */ -#define PCD_FreeUserBuffer(USBx, bEpNum, bDir) \ +#define PCD_FREE_USER_BUFFER(USBx, bEpNum, bDir) \ do { \ if ((bDir) == 0U) \ { \ @@ -633,8 +636,8 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); * @param bEpNum Endpoint Number. * @retval None */ -#define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) -#define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) +#define PCD_SET_BULK_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) +#define PCD_CLEAR_BULK_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) /** * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. @@ -737,8 +740,12 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); */ #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) -#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) -#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) +#define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ + + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) + +#define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE\ + + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) + /** * @brief sets address of the tx/rx buffer. @@ -806,18 +813,22 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) \ do { \ uint32_t wNBlocks; \ - if ((wCount) == 0U) \ + \ + if ((wCount) > 62U) \ { \ - *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ - *(pdwReg) |= USB_CNTRX_BLSIZE; \ - } \ - else if((wCount) <= 62U) \ - { \ - PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ + PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ } \ else \ { \ - PCD_CALC_BLK32((pdwReg), (wCount), wNBlocks); \ + if ((wCount) == 0U) \ + { \ + *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \ + *(pdwReg) |= USB_CNTRX_BLSIZE; \ + } \ + else \ + { \ + PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ + } \ } \ } while(0) /* PCD_SET_EP_CNT_RX_REG */ @@ -990,5 +1001,3 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); #endif #endif /* STM32G4xx_HAL_PCD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h index 19ff42b..300eab2 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -23,7 +22,7 @@ #ifdef __cplusplus extern "C" { -#endif +#endif /* __cplusplus */ /* Includes ------------------------------------------------------------------*/ #include "stm32g4xx_hal_def.h" @@ -83,9 +82,7 @@ void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); #ifdef __cplusplus } -#endif +#endif /* __cplusplus */ #endif /* STM32G4xx_HAL_PCD_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h index a7b0a64..fe23556 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -410,4 +409,3 @@ void HAL_PWR_PVDCallback(void); #endif /* STM32G4xx_HAL_PWR_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h index 31f50dd..923f83c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -816,4 +815,3 @@ void HAL_PWREx_DisableUCPDDeadBattery(void); #endif /* STM32G4xx_HAL_PWR_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_qspi.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_qspi.h index 67b990b..1d1f53a 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_qspi.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_qspi.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -742,12 +741,10 @@ HAL_StatusTypeDef HAL_QSPI_SetFlashID (QSPI_HandleTypeDef *hqspi, uint3 * @} */ -#endif /* defined(QUADSPI) || defined(QUADSPI1) || defined(QUADSPI2) */ +#endif /* defined(QUADSPI) */ #ifdef __cplusplus } #endif #endif /* STM32G4xx_HAL_QSPI_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h index ad2ab34..c0969dc 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h @@ -6,14 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -386,7 +384,24 @@ typedef struct /** @defgroup RCC_MCO_Index MCO Index * @{ */ -#define RCC_MCO1 0x00000000U +/* 32 28 20 16 0 + -------------------------------- + | MCO | GPIO | GPIO | GPIO | + | Index | AF | Port | Pin | + -------------------------------*/ + +#define RCC_MCO_GPIOPORT_POS 16U +#define RCC_MCO_GPIOPORT_MASK (0xFUL << RCC_MCO_GPIOPORT_POS) +#define RCC_MCO_GPIOAF_POS 20U +#define RCC_MCO_GPIOAF_MASK (0xFFUL << RCC_MCO_GPIOAF_POS) +#define RCC_MCO_INDEX_POS 28U +#define RCC_MCO_INDEX_MASK (0x1UL << RCC_MCO_INDEX_POS) +#define RCC_MCO1_INDEX (0x0UL << RCC_MCO_INDEX_POS) /*!< MCO1 index */ +#define RCC_MCO_PA8 (RCC_MCO1_INDEX | (GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS) | (GPIO_GET_INDEX(GPIOA) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_8) +#define RCC_MCO_PG10 (RCC_MCO1_INDEX | (GPIO_AF0_MCO << RCC_MCO_GPIOAF_POS) | (GPIO_GET_INDEX(GPIOG) << RCC_MCO_GPIOPORT_POS) | GPIO_PIN_10) + +/* Legacy Defines*/ +#define RCC_MCO1 RCC_MCO_PA8 #define RCC_MCO RCC_MCO1 /*!< MCO1 to be compliant with other families with 2 MCOs*/ /** * @} @@ -3300,7 +3315,8 @@ typedef struct ((__SOURCE__) == RCC_RTCCLKSOURCE_LSI) || \ ((__SOURCE__) == RCC_RTCCLKSOURCE_HSE_DIV32)) -#define IS_RCC_MCO(__MCOX__) ((__MCOX__) == RCC_MCO1) +#define IS_RCC_MCO(__MCOX__) (((__MCOX__) == RCC_MCO_PA8) || \ + ((__MCOX__) == RCC_MCO_PG10)) #define IS_RCC_MCO1SOURCE(__SOURCE__) (((__SOURCE__) == RCC_MCO1SOURCE_NOCLOCK) || \ ((__SOURCE__) == RCC_MCO1SOURCE_SYSCLK) || \ @@ -3388,4 +3404,3 @@ void HAL_RCC_CSSCallback(void); #endif /* STM32G4xx_HAL_RCC_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h index 0519965..3dcc2f8 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h @@ -6,14 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -1606,4 +1604,3 @@ void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error); #endif /* STM32G4xx_HAL_RCC_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rng.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rng.h index ef01dfd..1abf70c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rng.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rng.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -22,7 +21,7 @@ #define STM32G4xx_HAL_RNG_H #ifdef __cplusplus - extern "C" { +extern "C" { #endif /* Includes ------------------------------------------------------------------*/ @@ -81,7 +80,7 @@ typedef enum typedef struct __RNG_HandleTypeDef #else typedef struct -#endif /* (USE_HAL_RNG_REGISTER_CALLBACKS) */ +#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */ { RNG_TypeDef *Instance; /*!< Register base address */ @@ -91,7 +90,7 @@ typedef struct __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */ - __IO uint32_t ErrorCode; /*!< RNG Error code */ + __IO uint32_t ErrorCode; /*!< RNG Error code */ uint32_t RandomNumber; /*!< Last Generated RNG Data */ @@ -171,14 +170,14 @@ typedef void (*pRNG_ReadyDataCallbackTypeDef)(RNG_HandleTypeDef *hrng, uint32_t /** @defgroup RNG_Error_Definition RNG Error Definition * @{ */ -#define HAL_RNG_ERROR_NONE 0x00000000U /*!< No error */ +#define HAL_RNG_ERROR_NONE 0x00000000U /*!< No error */ #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1) #define HAL_RNG_ERROR_INVALID_CALLBACK 0x00000001U /*!< Invalid Callback error */ #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */ -#define HAL_RNG_ERROR_TIMEOUT 0x00000002U /*!< Timeout error */ +#define HAL_RNG_ERROR_TIMEOUT 0x00000002U /*!< Timeout error */ #define HAL_RNG_ERROR_BUSY 0x00000004U /*!< Busy error */ #define HAL_RNG_ERROR_SEED 0x00000008U /*!< Seed error */ -#define HAL_RNG_ERROR_CLOCK 0x00000010U /*!< Clock error */ +#define HAL_RNG_ERROR_CLOCK 0x00000010U /*!< Clock error */ /** * @} */ @@ -204,7 +203,7 @@ typedef void (*pRNG_ReadyDataCallbackTypeDef)(RNG_HandleTypeDef *hrng, uint32_t } while(0U) #else #define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET) -#endif /*USE_HAL_RNG_REGISTER_CALLBACKS */ +#endif /* USE_HAL_RNG_REGISTER_CALLBACKS */ /** * @brief Enables the RNG peripheral. @@ -299,7 +298,8 @@ void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng); /* Callbacks Register/UnRegister functions ***********************************/ #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1) -HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID, pRNG_CallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID, + pRNG_CallbackTypeDef pCallback); HAL_StatusTypeDef HAL_RNG_UnRegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID); HAL_StatusTypeDef HAL_RNG_RegisterReadyDataCallback(RNG_HandleTypeDef *hrng, pRNG_ReadyDataCallbackTypeDef pCallback); @@ -346,8 +346,8 @@ uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng); ((IT) == RNG_IT_SEI)) #define IS_RNG_FLAG(FLAG) (((FLAG) == RNG_FLAG_DRDY) || \ - ((FLAG) == RNG_FLAG_CECS) || \ - ((FLAG) == RNG_FLAG_SECS)) + ((FLAG) == RNG_FLAG_CECS) || \ + ((FLAG) == RNG_FLAG_SECS)) /** * @brief Verify the RNG Clock Error Detection mode. @@ -377,4 +377,3 @@ uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng); #endif /* STM32G4xx_HAL_RNG_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h index 97d9e79..cdb3072 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc.h @@ -6,12 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -545,8 +545,8 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to */ #define __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__) \ do{ \ - RTC->WPR = 0xCAU; \ - RTC->WPR = 0x53U; \ + (__HANDLE__)->Instance->WPR = 0xCAU; \ + (__HANDLE__)->Instance->WPR = 0x53U; \ } while(0U) /** @@ -556,7 +556,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to */ #define __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__) \ do{ \ - RTC->WPR = 0xFFU; \ + (__HANDLE__)->Instance->WPR = 0xFFU; \ } while(0U) /** @@ -573,8 +573,8 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to #define __HAL_RTC_DAYLIGHT_SAVING_TIME_ADD1H(__HANDLE__, __BKP__) \ do { \ __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__); \ - SET_BIT(RTC->CR, RTC_CR_ADD1H); \ - MODIFY_REG(RTC->CR, RTC_CR_BKP , (__BKP__)); \ + SET_BIT((__HANDLE__)->Instance->CR, RTC_CR_ADD1H); \ + MODIFY_REG((__HANDLE__)->Instance->CR, RTC_CR_BKP , (__BKP__)); \ __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__); \ } while(0); @@ -592,8 +592,8 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to #define __HAL_RTC_DAYLIGHT_SAVING_TIME_SUB1H(__HANDLE__, __BKP__) \ do { \ __HAL_RTC_WRITEPROTECTION_DISABLE(__HANDLE__); \ - SET_BIT(RTC->CR, RTC_CR_SUB1H); \ - MODIFY_REG(RTC->CR, RTC_CR_BKP , (__BKP__)); \ + SET_BIT((__HANDLE__)->Instance->CR, RTC_CR_SUB1H); \ + MODIFY_REG((__HANDLE__)->Instance->CR, RTC_CR_BKP , (__BKP__)); \ __HAL_RTC_WRITEPROTECTION_ENABLE(__HANDLE__); \ } while(0); @@ -602,28 +602,28 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_ALRAE)) +#define __HAL_RTC_ALARMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRAE)) /** * @brief Disable the RTC ALARMA peripheral. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_ALRAE)) +#define __HAL_RTC_ALARMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRAE)) /** * @brief Enable the RTC ALARMB peripheral. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_ALRBE)) +#define __HAL_RTC_ALARMB_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ALRBE)) /** * @brief Disable the RTC ALARMB peripheral. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_ALRBE)) +#define __HAL_RTC_ALARMB_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ALRBE)) /** * @brief Enable the RTC Alarm interrupt. @@ -634,7 +634,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @arg @ref RTC_IT_ALRB Alarm B interrupt * @retval None */ -#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR |= (__INTERRUPT__)) +#define __HAL_RTC_ALARM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) /** * @brief Disable the RTC Alarm interrupt. @@ -645,7 +645,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @arg @ref RTC_IT_ALRB Alarm B interrupt * @retval None */ -#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR &= ~(__INTERRUPT__)) +#define __HAL_RTC_ALARM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) /** * @brief Check whether the specified RTC Alarm interrupt has occurred or not. @@ -656,7 +656,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @arg @ref RTC_IT_ALRB Alarm B interrupt * @retval None */ -#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) ((((RTC->MISR)& ((__INTERRUPT__)>> 12U)) != 0U) ? 1UL : 0UL) +#define __HAL_RTC_ALARM_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->MISR)& ((__INTERRUPT__)>> 12U)) != 0U) ? 1UL : 0UL) /** * @brief Check whether the specified RTC Alarm interrupt has been enabled or not. @@ -667,7 +667,7 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @arg @ref RTC_IT_ALRB Alarm B interrupt * @retval None */ -#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((RTC->CR) & (__INTERRUPT__)) != 0U) ? 1UL : 0UL) +#define __HAL_RTC_ALARM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR) & (__INTERRUPT__)) != 0U) ? 1UL : 0UL) /** * @brief Get the selected RTC Alarms flag status. @@ -691,8 +691,8 @@ typedef void (*pRTC_CallbackTypeDef)(RTC_HandleTypeDef *hrtc); /*!< pointer to * @arg @ref RTC_FLAG_ALRBF * @retval None */ -#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == RTC_FLAG_ALRAF) ? ((RTC->SCR = (RTC_CLEAR_ALRAF))) : \ - (RTC->SCR = (RTC_CLEAR_ALRBF))) +#define __HAL_RTC_ALARM_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == RTC_FLAG_ALRAF) ? (((__HANDLE__)->Instance->SCR = (RTC_CLEAR_ALRAF))) : \ + ((__HANDLE__)->Instance->SCR = (RTC_CLEAR_ALRBF))) /** * @brief Enable interrupt on the RTC Alarm associated Exti line. * @retval None @@ -1010,6 +1010,3 @@ uint8_t RTC_Bcd2ToByte(uint8_t Value); #endif #endif /* STM32G4xx_HAL_RTC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc_ex.h index d610e78..9bb6ec3 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rtc_ex.h @@ -6,12 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -552,7 +552,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_CLEAR_ALRAF Clear Alarm A flag * @retval None */ -#define __HAL_RTC_CLEAR_FLAG(__HANDLE__, __FLAG__) (RTC->SCR = (__FLAG__)) +#define __HAL_RTC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SCR = (__FLAG__)) /** @brief Check whether the specified RTC flag is set or not. @@ -587,14 +587,14 @@ with a frequency = RTCCLK / 256 */ * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_WUTE)) +#define __HAL_RTC_WAKEUPTIMER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_WUTE)) /** * @brief Disable the RTC WakeUp Timer peripheral. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_WUTE)) +#define __HAL_RTC_WAKEUPTIMER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_WUTE)) /** * @brief Enable the RTC WakeUpTimer interrupt. @@ -604,7 +604,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_WUT WakeUpTimer interrupt * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR |= (__INTERRUPT__)) +#define __HAL_RTC_WAKEUPTIMER_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) /** * @brief Disable the RTC WakeUpTimer interrupt. @@ -614,7 +614,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_WUT WakeUpTimer interrupt * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR &= ~(__INTERRUPT__)) +#define __HAL_RTC_WAKEUPTIMER_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) /** @@ -625,7 +625,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_WUT WakeUpTimer interrupt * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) ((((RTC->MISR)\ +#define __HAL_RTC_WAKEUPTIMER_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->MISR)\ & ((__INTERRUPT__)>> 12U)) != 0UL) ? 1UL : 0UL) /** * @brief Check whether the specified RTC Wake Up timer interrupt has been enabled or not. @@ -635,7 +635,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_WUT WakeUpTimer interrupt * @retval None */ -#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((RTC->CR)\ +#define __HAL_RTC_WAKEUPTIMER_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR)\ & (__INTERRUPT__)) != 0UL) ? 1UL : 0UL) /** @@ -722,14 +722,14 @@ with a frequency = RTCCLK / 256 */ * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_TSE)) +#define __HAL_RTC_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TSE)) /** * @brief Disable the RTC TimeStamp peripheral. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_TSE)) +#define __HAL_RTC_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TSE)) /** * @brief Enable the RTC TimeStamp interrupt. @@ -739,7 +739,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_TS TimeStamp interrupt * @retval None */ -#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR |= (__INTERRUPT__)) +#define __HAL_RTC_TIMESTAMP_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR |= (__INTERRUPT__)) /** * @brief Disable the RTC TimeStamp interrupt. @@ -749,7 +749,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_TS TimeStamp interrupt * @retval None */ -#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) (RTC->CR &= ~(__INTERRUPT__)) +#define __HAL_RTC_TIMESTAMP_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR &= ~(__INTERRUPT__)) /** * @brief Check whether the specified RTC TimeStamp interrupt has occurred or not. @@ -759,7 +759,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_TS TimeStamp interrupt * @retval None */ -#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) ((((RTC->MISR)\ +#define __HAL_RTC_TIMESTAMP_GET_IT(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->MISR)\ & ((__INTERRUPT__)>> 12U)) != 0U) ? 1UL : 0UL) /** * @brief Check whether the specified RTC Time Stamp interrupt has been enabled or not. @@ -769,7 +769,7 @@ with a frequency = RTCCLK / 256 */ * @arg @ref RTC_IT_TS TimeStamp interrupt * @retval None */ -#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((RTC->CR)\ +#define __HAL_RTC_TIMESTAMP_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((((__HANDLE__)->Instance->CR)\ & (__INTERRUPT__)) != 0U) ? 1UL : 0UL) /** @@ -850,14 +850,14 @@ with a frequency = RTCCLK / 256 */ * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_ITSE)) +#define __HAL_RTC_INTERNAL_TIMESTAMP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_ITSE)) /** * @brief Disable the RTC internal TimeStamp peripheral. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_ITSE)) +#define __HAL_RTC_INTERNAL_TIMESTAMP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_ITSE)) /** * @brief Get the selected RTC Internal Time Stamps flag status. @@ -884,28 +884,28 @@ with a frequency = RTCCLK / 256 */ * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_TAMPTS_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_TAMPTS)) +#define __HAL_RTC_TAMPTS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TAMPTS)) /** * @brief Disable the RTC TimeStamp on Tamper detection. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_TAMPTS_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_TAMPTS)) +#define __HAL_RTC_TAMPTS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TAMPTS)) /** * @brief Enable the RTC Tamper detection output. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_TAMPOE_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_TAMPOE)) +#define __HAL_RTC_TAMPOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_TAMPOE)) /** * @brief Disable the RTC Tamper detection output. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_TAMPOE_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_TAMPOE)) +#define __HAL_RTC_TAMPOE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_TAMPOE)) /** @@ -923,14 +923,14 @@ with a frequency = RTCCLK / 256 */ * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_COE)) +#define __HAL_RTC_CALIBRATION_OUTPUT_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_COE)) /** * @brief Disable the calibration output. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_COE)) +#define __HAL_RTC_CALIBRATION_OUTPUT_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_COE)) /** @@ -938,14 +938,14 @@ with a frequency = RTCCLK / 256 */ * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) (RTC->CR |= (RTC_CR_REFCKON)) +#define __HAL_RTC_CLOCKREF_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (RTC_CR_REFCKON)) /** * @brief Disable the clock reference detection. * @param __HANDLE__ specifies the RTC handle. * @retval None */ -#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) (RTC->CR &= ~(RTC_CR_REFCKON)) +#define __HAL_RTC_CLOCKREF_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(RTC_CR_REFCKON)) /** @@ -1381,5 +1381,3 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupReg #endif #endif /* STM32G4xx_HAL_RTC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai.h index 1b32620..17d3aa1 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -962,4 +961,3 @@ uint32_t HAL_SAI_GetError(SAI_HandleTypeDef *hsai); #endif /* STM32G4xx_HAL_SAI_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai_ex.h index 90f630a..c5be091 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sai_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -102,4 +101,3 @@ HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(SAI_HandleTypeDef *hsai, SAIEx_Pdm #endif /* STM32G4xx_HAL_SAI_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard.h index b904eb3..6d6ac08 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -202,7 +201,7 @@ typedef struct __SMARTCARD_HandleTypeDef SMARTCARD_AdvFeatureInitTypeDef AdvancedInit; /*!< SmartCard advanced features initialization parameters */ - uint8_t *pTxBuffPtr; /*!< Pointer to SmartCard Tx transfer Buffer */ + const uint8_t *pTxBuffPtr; /*!< Pointer to SmartCard Tx transfer Buffer */ uint16_t TxXferSize; /*!< SmartCard Tx Transfer size */ @@ -1153,13 +1152,13 @@ HAL_StatusTypeDef HAL_SMARTCARD_UnRegisterCallback(SMARTCARD_HandleTypeDef *hsma * @{ */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, +HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); /* Transfer Abort functions */ HAL_StatusTypeDef HAL_SMARTCARD_Abort(SMARTCARD_HandleTypeDef *hsmartcard); @@ -1211,4 +1210,3 @@ uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmar #endif /* STM32G4xx_HAL_SMARTCARD_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard_ex.h index adbe650..8fdd47c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smartcard_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -335,4 +334,3 @@ HAL_StatusTypeDef HAL_SMARTCARDEx_SetRxFifoThreshold(SMARTCARD_HandleTypeDef *hs #endif /* STM32G4xx_HAL_SMARTCARD_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus.h index 0820e4e..1d09750 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -27,7 +26,6 @@ extern "C" { /* Includes ------------------------------------------------------------------*/ #include "stm32g4xx_hal_def.h" -#include "stm32g4xx_hal_smbus_ex.h" /** @addtogroup STM32G4xx_HAL_Driver * @{ @@ -49,42 +47,43 @@ extern "C" { typedef struct { uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. - This parameter calculated by referring to SMBUS initialization - section in Reference manual */ + This parameter calculated by referring to SMBUS initialization section + in Reference manual */ uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. - This parameter can be a value of @ref SMBUS_Analog_Filter */ + This parameter can be a value of @ref SMBUS_Analog_Filter */ uint32_t OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ + This parameter can be a 7-bit or 10-bit address. */ uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. - This parameter can be a value of @ref SMBUS_addressing_mode */ + This parameter can be a value of @ref SMBUS_addressing_mode */ uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. - This parameter can be a value of @ref SMBUS_dual_addressing_mode */ + This parameter can be a value of @ref SMBUS_dual_addressing_mode */ uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected - This parameter can be a 7-bit address. */ + This parameter can be a 7-bit address. */ - uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected - This parameter can be a value of @ref SMBUS_own_address2_masks. */ + uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address + if dual addressing mode is selected + This parameter can be a value of @ref SMBUS_own_address2_masks. */ uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. - This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ + This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. - This parameter can be a value of @ref SMBUS_nostretch_mode */ + This parameter can be a value of @ref SMBUS_nostretch_mode */ uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. - This parameter can be a value of @ref SMBUS_packet_error_check_mode */ + This parameter can be a value of @ref SMBUS_packet_error_check_mode */ uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. - This parameter can be a value of @ref SMBUS_peripheral_mode */ + This parameter can be a value of @ref SMBUS_peripheral_mode */ uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. - (Enable bits and different timeout values) - This parameter calculated by referring to SMBUS initialization - section in Reference manual */ + (Enable bits and different timeout values) + This parameter calculated by referring to SMBUS initialization section + in Reference manual */ } SMBUS_InitTypeDef; /** * @} @@ -103,7 +102,7 @@ typedef struct #define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /*!< Slave Data Reception process is ongoing */ #define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /*!< Timeout state */ #define HAL_SMBUS_STATE_ERROR (0x00000004U) /*!< Reception process is ongoing */ -#define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */ +#define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */ /** * @} */ @@ -122,7 +121,7 @@ typedef struct #define HAL_SMBUS_ERROR_ALERT (0x00000040U) /*!< Alert error */ #define HAL_SMBUS_ERROR_PECERR (0x00000080U) /*!< PEC error */ #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) -#define HAL_SMBUS_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ +#define HAL_SMBUS_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ #define HAL_SMBUS_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ /** @@ -160,17 +159,26 @@ typedef struct __IO uint32_t ErrorCode; /*!< SMBUS Error code */ #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) - void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Tx Transfer completed callback */ - void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Rx Transfer completed callback */ - void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Tx Transfer completed callback */ - void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Rx Transfer completed callback */ - void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Listen Complete callback */ - void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Error callback */ + void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Master Tx Transfer completed callback */ + void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Master Rx Transfer completed callback */ + void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Slave Tx Transfer completed callback */ + void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Slave Rx Transfer completed callback */ + void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Listen Complete callback */ + void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Error callback */ - void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< SMBUS Slave Address Match callback */ + void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); + /*!< SMBUS Slave Address Match callback */ - void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp Init callback */ - void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp DeInit callback */ + void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Msp Init callback */ + void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); + /*!< SMBUS Msp DeInit callback */ #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ } SMBUS_HandleTypeDef; @@ -196,8 +204,11 @@ typedef enum /** * @brief HAL SMBUS Callback pointer definition */ -typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); /*!< pointer to an SMBUS callback function */ -typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an SMBUS Address Match callback function */ +typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); +/*!< pointer to an SMBUS callback function */ +typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, + uint16_t AddrMatchCode); +/*!< pointer to an SMBUS Address Match callback function */ #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ /** @@ -359,9 +370,10 @@ typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE #define SMBUS_IT_RXI I2C_CR1_RXIE #define SMBUS_IT_TXI I2C_CR1_TXIE -#define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | \ - SMBUS_IT_TXI) -#define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) +#define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | \ + SMBUS_IT_NACKI | SMBUS_IT_TXI) +#define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | \ + SMBUS_IT_RXI) #define SMBUS_IT_ALERT (SMBUS_IT_ERRI) #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) /** @@ -409,14 +421,14 @@ typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t * @retval None */ #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) -#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \ - (__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \ +#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \ + (__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \ (__HANDLE__)->MspInitCallback = NULL; \ (__HANDLE__)->MspDeInitCallback = NULL; \ } while(0) #else #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) -#endif +#endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ /** @brief Enable the specified SMBUS interrupts. * @param __HANDLE__ specifies the SMBUS Handle. @@ -492,12 +504,14 @@ typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t */ #define SMBUS_FLAG_MASK (0x0001FFFFU) #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) \ - (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET) + (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == \ + ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET) /** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit. * @param __HANDLE__ specifies the SMBUS Handle. * @param __FLAG__ specifies the flag to clear. * This parameter can be any combination of the following values: + * @arg @ref SMBUS_FLAG_TXE Transmit data register empty * @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode) * @arg @ref SMBUS_FLAG_AF NACK received flag * @arg @ref SMBUS_FLAG_STOPF STOP detection flag @@ -510,7 +524,9 @@ typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t * * @retval None */ -#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) +#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == SMBUS_FLAG_TXE) ? \ + ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ + ((__HANDLE__)->Instance->ICR = (__FLAG__))) /** @brief Enable the specified SMBUS peripheral. * @param __HANDLE__ specifies the SMBUS Handle. @@ -575,43 +591,52 @@ typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) -#define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ - ((MODE) == SMBUS_AUTOEND_MODE) || \ - ((MODE) == SMBUS_SOFTEND_MODE) || \ - ((MODE) == SMBUS_SENDPEC_MODE) || \ - ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ - ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ - ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ - ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) +#define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ + ((MODE) == SMBUS_AUTOEND_MODE) || \ + ((MODE) == SMBUS_SOFTEND_MODE) || \ + ((MODE) == SMBUS_SENDPEC_MODE) || \ + ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ + ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ + ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ + ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | \ + SMBUS_RELOAD_MODE ))) #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ - ((REQUEST) == SMBUS_GENERATE_START_READ) || \ - ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ + ((REQUEST) == SMBUS_GENERATE_START_READ) || \ + ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ ((REQUEST) == SMBUS_NO_STARTSTOP)) -#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \ - ((REQUEST) == SMBUS_FIRST_FRAME) || \ - ((REQUEST) == SMBUS_NEXT_FRAME) || \ - ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ - ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ - ((REQUEST) == SMBUS_FIRST_FRAME_WITH_PEC) || \ - ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ - ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) +#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \ + ((REQUEST) == SMBUS_FIRST_FRAME) || \ + ((REQUEST) == SMBUS_NEXT_FRAME) || \ + ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ + ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ + ((REQUEST) == SMBUS_FIRST_FRAME_WITH_PEC) || \ + ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ + ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) -#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC) || \ - ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC) || \ - ((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC) || \ +#define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC) || \ + ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC) || \ + ((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC) || \ ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)) -#define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= \ - (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) -#define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ - (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) +#define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= \ + (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | \ + I2C_CR1_PECEN))) +#define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ + (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \ + I2C_CR2_NBYTES | I2C_CR2_RELOAD | \ + I2C_CR2_RD_WRN))) -#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ - (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) +#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? \ + (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ + (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \ + (~I2C_CR2_RD_WRN)) : \ + (uint32_t)((((uint32_t)(__ADDRESS__) & \ + (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | \ + (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) #define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U) #define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) @@ -630,6 +655,9 @@ typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t * @} */ +/* Include SMBUS HAL Extended module */ +#include "stm32g4xx_hal_smbus_ex.h" + /* Exported functions --------------------------------------------------------*/ /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions * @{ @@ -649,11 +677,14 @@ HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uin /* Callbacks Register/UnRegister functions ***********************************/ #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) -HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, +HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, + HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback); -HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID); +HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, + HAL_SMBUS_CallbackIDTypeDef CallbackID); -HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, + pSMBUS_AddrCallbackTypeDef pCallback); HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus); #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ /** @@ -679,10 +710,10 @@ HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t * @{ */ /******* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, - uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, - uint16_t Size, uint32_t XferOptions); +HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, + uint8_t *pData, uint16_t Size, uint32_t XferOptions); +HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, + uint8_t *pData, uint16_t Size, uint32_t XferOptions); HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); @@ -758,5 +789,3 @@ uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); #endif /* STM32G4xx_HAL_SMBUS_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus_ex.h index 2b8a136..eb87898 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_smbus_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -37,7 +36,6 @@ extern "C" { */ /* Exported types ------------------------------------------------------------*/ - /* Exported constants --------------------------------------------------------*/ /** @defgroup SMBUSEx_Exported_Constants SMBUS Extended Exported Constants * @{ @@ -58,7 +56,7 @@ extern "C" { #define SMBUS_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ #else #define SMBUS_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | SMBUS_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ -#endif +#endif /* SYSCFG_CFGR1_I2C4_FMP */ /** * @} */ @@ -81,7 +79,17 @@ extern "C" { * @{ */ -/** @addtogroup SMBUSEx_Exported_Functions_Group3 SMBUS Extended FastModePlus Functions +/** @addtogroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions + * @{ + */ +/* Peripheral Control functions ************************************************/ +HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus); +HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus); +/** + * @} + */ + +/** @addtogroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions * @{ */ void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus); @@ -108,13 +116,13 @@ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus); * @{ */ #define IS_SMBUS_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & SMBUS_FMP_NOT_SUPPORTED) != SMBUS_FMP_NOT_SUPPORTED) && \ - ((((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB6)) == SMBUS_FASTMODEPLUS_PB6) || \ - (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB7)) == SMBUS_FASTMODEPLUS_PB7) || \ - (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB8)) == SMBUS_FASTMODEPLUS_PB8) || \ - (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB9)) == SMBUS_FASTMODEPLUS_PB9) || \ - (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C1)) == SMBUS_FASTMODEPLUS_I2C1) || \ - (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C2)) == SMBUS_FASTMODEPLUS_I2C2) || \ - (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C3)) == SMBUS_FASTMODEPLUS_I2C3) || \ + ((((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB6)) == SMBUS_FASTMODEPLUS_PB6) || \ + (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB7)) == SMBUS_FASTMODEPLUS_PB7) || \ + (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB8)) == SMBUS_FASTMODEPLUS_PB8) || \ + (((__CONFIG__) & (SMBUS_FASTMODEPLUS_PB9)) == SMBUS_FASTMODEPLUS_PB9) || \ + (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C1)) == SMBUS_FASTMODEPLUS_I2C1) || \ + (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C2)) == SMBUS_FASTMODEPLUS_I2C2) || \ + (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C3)) == SMBUS_FASTMODEPLUS_I2C3) || \ (((__CONFIG__) & (SMBUS_FASTMODEPLUS_I2C4)) == SMBUS_FASTMODEPLUS_I2C4))) /** * @} @@ -142,5 +150,3 @@ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus); #endif #endif /* STM32G4xx_HAL_SMBUS_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h index c032597..28743ea 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -778,7 +777,8 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi); /* Callbacks Register/UnRegister functions ***********************************/ #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U) -HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback); +HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, + pSPI_CallbackTypeDef pCallback); HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID); #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ /** @@ -849,4 +849,3 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi); #endif /* STM32G4xx_HAL_SPI_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h index 429e9f9..4db1186 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -72,4 +71,3 @@ HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi); #endif /* STM32G4xx_HAL_SPI_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sram.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sram.h index bda7cac..3f1d629 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sram.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_sram.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -231,5 +230,3 @@ HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram); #endif #endif /* STM32G4xx_HAL_SRAM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h index b30eab0..acc47aa 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -55,9 +54,10 @@ typedef struct uint32_t Period; /*!< Specifies the period value to be loaded into the active Auto-Reload Register at the next update event. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF (or 0xFFEF if dithering is activated) - Macros __HAL_TIM_CALC_PERIOD(), __HAL_TIM_CALC_PERIOD_DITHER(), __HAL_TIM_CALC_PERIOD_BY_DELAY(), __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY() - can be used to calculate Period value */ + This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF + (or 0xFFEF if dithering is activated)Macros __HAL_TIM_CALC_PERIOD(), + __HAL_TIM_CALC_PERIOD_DITHER(),__HAL_TIM_CALC_PERIOD_BY_DELAY(), + __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY()can be used to calculate Period value */ uint32_t ClockDivision; /*!< Specifies the clock division. This parameter can be a value of @ref TIM_ClockDivision */ @@ -68,8 +68,10 @@ typedef struct This means in PWM mode that (N+1) corresponds to: - the number of PWM periods in edge-aligned mode - the number of half PWM period in center-aligned mode - GP timers: this parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. - Advanced timers: this parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ + GP timers: this parameter must be a number between Min_Data = 0x00 and + Max_Data = 0xFF. + Advanced timers: this parameter must be a number between Min_Data = 0x0000 and + Max_Data = 0xFFFF. */ uint32_t AutoReloadPreload; /*!< Specifies the auto-reload preload. This parameter can be a value of @ref TIM_AutoReloadPreload */ @@ -84,9 +86,10 @@ typedef struct This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF (or 0xFFEF if dithering is activated) - Macros __HAL_TIM_CALC_PULSE(), __HAL_TIM_CALC_PULSE_DITHER() - can be used to calculate Pulse value */ + This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF + (or 0xFFEF if dithering is activated) + Macros __HAL_TIM_CALC_PULSE(), __HAL_TIM_CALC_PULSE_DITHER() can be used to calculate + Pulse value */ uint32_t OCPolarity; /*!< Specifies the output polarity. This parameter can be a value of @ref TIM_Output_Compare_Polarity */ @@ -118,9 +121,10 @@ typedef struct This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF (or 0xFFEF if dithering is activated) - Macros __HAL_TIM_CALC_PULSE(), __HAL_TIM_CALC_PULSE_DITHER() - can be used to calculate Pulse value */ + This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF + (or 0xFFEF if dithering is activated) + Macros __HAL_TIM_CALC_PULSE(), __HAL_TIM_CALC_PULSE_DITHER() can be used to calculate + Pulse value */ uint32_t OCPolarity; /*!< Specifies the output polarity. This parameter can be a value of @ref TIM_Output_Compare_Polarity */ @@ -225,7 +229,8 @@ typedef struct uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity This parameter can be a value of @ref TIM_ClearInput_Polarity */ uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler - This parameter must be 0: When OCRef clear feature is used with ETR source, ETR prescaler must be off */ + This parameter must be 0: When OCRef clear feature is used with ETR source, + ETR prescaler must be off */ uint32_t ClearInputFilter; /*!< TIM Clear Input filter This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ } TIM_ClearInputConfigTypeDef; @@ -275,32 +280,32 @@ typedef struct */ typedef struct { - uint32_t OffStateRunMode; /*!< TIM off state in run mode - This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ - uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode - This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ - uint32_t LockLevel; /*!< TIM Lock level - This parameter can be a value of @ref TIM_Lock_level */ - uint32_t DeadTime; /*!< TIM dead Time - This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - uint32_t BreakState; /*!< TIM Break State - This parameter can be a value of @ref TIM_Break_Input_enable_disable */ - uint32_t BreakPolarity; /*!< TIM Break input polarity - This parameter can be a value of @ref TIM_Break_Polarity */ - uint32_t BreakFilter; /*!< Specifies the break input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t BreakAFMode; /*!< Specifies the alternate function mode of the break input. - This parameter can be a value of @ref TIM_Break_Input_AF_Mode */ - uint32_t Break2State; /*!< TIM Break2 State - This parameter can be a value of @ref TIM_Break2_Input_enable_disable */ - uint32_t Break2Polarity; /*!< TIM Break2 input polarity - This parameter can be a value of @ref TIM_Break2_Polarity */ - uint32_t Break2Filter; /*!< TIM break2 input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t Break2AFMode; /*!< Specifies the alternate function mode of the break2 input. - This parameter can be a value of @ref TIM_Break2_Input_AF_Mode */ - uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state - This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ + uint32_t OffStateRunMode; /*!< TIM off state in run mode, This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ + + uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode, This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ + + uint32_t LockLevel; /*!< TIM Lock level, This parameter can be a value of @ref TIM_Lock_level */ + + uint32_t DeadTime; /*!< TIM dead Time, This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ + + uint32_t BreakState; /*!< TIM Break State, This parameter can be a value of @ref TIM_Break_Input_enable_disable */ + + uint32_t BreakPolarity; /*!< TIM Break input polarity, This parameter can be a value of @ref TIM_Break_Polarity */ + + uint32_t BreakFilter; /*!< Specifies the break input filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ + + uint32_t BreakAFMode; /*!< Specifies the alternate function mode of the break input.This parameter can be a value of @ref TIM_Break_Input_AF_Mode */ + + uint32_t Break2State; /*!< TIM Break2 State, This parameter can be a value of @ref TIM_Break2_Input_enable_disable */ + + uint32_t Break2Polarity; /*!< TIM Break2 input polarity, This parameter can be a value of @ref TIM_Break2_Polarity */ + + uint32_t Break2Filter; /*!< TIM break2 input filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ + + uint32_t Break2AFMode; /*!< Specifies the alternate function mode of the break2 input.This parameter can be a value of @ref TIM_Break2_Input_AF_Mode */ + + uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state, This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ + } TIM_BreakDeadTimeConfigTypeDef; /** @@ -691,10 +696,8 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to /** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection * @{ */ -#define TIM_ICSELECTION_DIRECTTI TIM_CCMR1_CC1S_0 /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC1, IC2, IC3 or IC4, respectively */ -#define TIM_ICSELECTION_INDIRECTTI TIM_CCMR1_CC1S_1 /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC2, IC1, IC4 or IC3, respectively */ +#define TIM_ICSELECTION_DIRECTTI TIM_CCMR1_CC1S_0 /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to IC1, IC2, IC3 or IC4, respectively */ +#define TIM_ICSELECTION_INDIRECTTI TIM_CCMR1_CC1S_1 /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to IC2, IC1, IC4 or IC3, respectively */ #define TIM_ICSELECTION_TRC TIM_CCMR1_CC1S /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */ /** * @} @@ -977,19 +980,18 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to * @{ */ #define TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by software */ -#define TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by software or automatically at the next update event - (if none of the break inputs BRK and BRK2 is active) */ +#define TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by software or automatically at the next update event (if none of the break inputs BRK and BRK2 is active) */ /** * @} */ -/** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3 +/** @defgroup TIM_Group_Channel5 TIM Group Channel 5 and Channel 1, 2 or 3 * @{ */ -#define TIM_GROUPCH5_NONE 0x00000000U /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ -#define TIM_GROUPCH5_OC1REFC TIM_CCR5_GC5C1 /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */ -#define TIM_GROUPCH5_OC2REFC TIM_CCR5_GC5C2 /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */ -#define TIM_GROUPCH5_OC3REFC TIM_CCR5_GC5C3 /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */ +#define TIM_GROUPCH5_NONE 0x00000000U /*!< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ +#define TIM_GROUPCH5_OC1REFC TIM_CCR5_GC5C1 /*!< OC1REFC is the logical AND of OC1REFC and OC5REF */ +#define TIM_GROUPCH5_OC2REFC TIM_CCR5_GC5C2 /*!< OC2REFC is the logical AND of OC2REFC and OC5REF */ +#define TIM_GROUPCH5_OC3REFC TIM_CCR5_GC5C3 /*!< OC3REFC is the logical AND of OC3REFC and OC5REF */ /** * @} */ @@ -1302,7 +1304,8 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to * @brief Disable the TIM main Output. * @param __HANDLE__ TIM handle * @retval None - * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled + * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been + * disabled */ #define __HAL_TIM_MOE_DISABLE(__HANDLE__) \ do { \ @@ -1493,7 +1496,8 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to /** * @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31). - * @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read in an atomic way. + * @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read + * in an atomic way. * @param __HANDLE__ TIM handle. * @retval None mode. @@ -1520,8 +1524,8 @@ mode. * @brief Indicates whether or not the TIM Counter is used as downcounter. * @param __HANDLE__ TIM handle. * @retval False (Counter used as upcounter) or True (Counter used as downcounter) - * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder -mode. + * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode + * or Encoder mode. */ #define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR)) @@ -1535,7 +1539,8 @@ mode. /** * @brief Set the TIM Counter Register value on runtime. - * Note Please check if the bit 31 of CNT register is used as UIF copy or not, this may affect the counter range in case of 32 bits counter TIM instance. + * Note Please check if the bit 31 of CNT register is used as UIF copy or not, this may affect the counter range in + * case of 32 bits counter TIM instance. * Bit 31 of CNT can be enabled/disabled using __HAL_TIM_UIFREMAP_ENABLE()/__HAL_TIM_UIFREMAP_DISABLE() macros. * @param __HANDLE__ TIM handle. * @param __COUNTER__ specifies the Counter register new value. @@ -1597,7 +1602,8 @@ mode. #define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD) /** - * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function. + * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() + * function. * @param __HANDLE__ TIM handle. * @param __CHANNEL__ TIM Channels to be configured. * This parameter can be one of the following values: @@ -2309,13 +2315,19 @@ mode. ((__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelState[0] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[1] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[2] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[3] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[4] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelState[5] = (__CHANNEL_STATE__); \ - } while(0) + (__HANDLE__)->ChannelState[0] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[1] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[2] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[3] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[4] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelState[5] = \ + (__CHANNEL_STATE__); \ + } while(0) #define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)\ (((__CHANNEL__) == TIM_CHANNEL_1) ? (__HANDLE__)->ChannelNState[0] :\ @@ -2330,11 +2342,15 @@ mode. ((__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__))) #define TIM_CHANNEL_N_STATE_SET_ALL(__HANDLE__, __CHANNEL_STATE__) do { \ - (__HANDLE__)->ChannelNState[0] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[1] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[2] = (__CHANNEL_STATE__); \ - (__HANDLE__)->ChannelNState[3] = (__CHANNEL_STATE__); \ - } while(0) + (__HANDLE__)->ChannelNState[0] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[1] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[2] = \ + (__CHANNEL_STATE__); \ + (__HANDLE__)->ChannelNState[3] = \ + (__CHANNEL_STATE__); \ + } while(0) /** * @} @@ -2508,14 +2524,14 @@ HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim, TIM_Sla HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength); HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, - uint32_t DataLength); + uint32_t BurstRequestSrc, uint32_t *BurstBuffer, + uint32_t BurstLength, uint32_t DataLength); HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength); HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, - uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, - uint32_t DataLength); + uint32_t BurstRequestSrc, uint32_t *BurstBuffer, + uint32_t BurstLength, uint32_t DataLength); HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource); uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel); @@ -2613,5 +2629,3 @@ void TIM_ResetCallback(TIM_HandleTypeDef *htim); #endif #endif /* STM32G4xx_HAL_TIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h index 66fb848..b40d85c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -71,27 +70,26 @@ typedef struct This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ uint32_t Polarity; /*!< Specifies the break input source polarity. This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity */ -} -TIMEx_BreakInputConfigTypeDef; +} TIMEx_BreakInputConfigTypeDef; /** * @brief TIM Encoder index configuration */ typedef struct { - uint32_t Polarity; /*!< TIM Encoder index polarity. - This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */ - uint32_t Prescaler; /*!< TIM Encoder index prescaler. - This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */ - uint32_t Filter; /*!< TIM Encoder index filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - FunctionalState FirstIndexEnable; /*!< Specifies whether or not the encoder first index is enabled. - This parameter value can be ENABLE or DISABLE. */ - uint32_t Position; /*!< Specifies in which AB input configuration the index event resets the counter. - This parameter can be a value of @ref TIMEx_Encoder_Index_Position */ - uint32_t Direction; /*!< Specifies in which counter direction the index event resets the counter. - This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */ -} TIMEx_EncoderIndexConfigTypeDef ; + uint32_t Polarity; /*!< TIM Encoder index polarity.This parameter can be a value of @ref TIMEx_Encoder_Index_Polarity */ + + uint32_t Prescaler; /*!< TIM Encoder index prescaler.This parameter can be a value of @ref TIMEx_Encoder_Index_Prescaler */ + + uint32_t Filter; /*!< TIM Encoder index filter.This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ + + FunctionalState FirstIndexEnable; /*!< Specifies whether or not the encoder first index is enabled.This parameter value can be ENABLE or DISABLE. */ + + uint32_t Position; /*!< Specifies in which AB input configuration the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Position */ + + uint32_t Direction; /*!< Specifies in which counter direction the index event resets the counter.This parameter can be a value of @ref TIMEx_Encoder_Index_Direction */ + +} TIMEx_EncoderIndexConfigTypeDef; /** * @} @@ -262,8 +260,8 @@ typedef struct /** @defgroup TIMEx_Break_Input TIM Extended Break input * @{ */ -#define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */ -#define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */ +#define TIM_BREAKINPUT_BRK 0x00000001U /*!< Timer break input */ +#define TIM_BREAKINPUT_BRK2 0x00000002U /*!< Timer break2 input */ /** * @} */ @@ -292,8 +290,8 @@ typedef struct /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling * @{ */ -#define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */ -#define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */ +#define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /*!< Break input source is disabled */ +#define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /*!< Break input source is enabled */ /** * @} */ @@ -301,8 +299,8 @@ typedef struct /** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity * @{ */ -#define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */ -#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */ +#define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /*!< Break input source is active low */ +#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /*!< Break input source is active_high */ /** * @} */ @@ -600,7 +598,8 @@ typedef struct (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? ((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) - 1U) : 0U /** - * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required output signal frequency. + * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required + * output signal frequency. * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER(1000000, 0, 10000); * @note This macro should be used only if dithering is already enabled * @param __TIMCLK__ timer input clock frequency (in Hz) @@ -609,10 +608,12 @@ typedef struct * @retval Auto-reload value (between Min_Data=0 and Max_Data=65519) */ #define __HAL_TIM_CALC_PERIOD_DITHER(__TIMCLK__, __PSC__, __FREQ__) \ - (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U + (((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \ + (uint32_t)(((uint64_t)(__TIMCLK__)*16/((__FREQ__) * ((__PSC__) + 1U)) - 16U)) : 0U /** - * @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay. + * @brief HELPER macro calculating the compare value required to achieve the required timer output compare + * active/inactive delay. * @note ex: @ref __HAL_TIM_CALC_PULSE(1000000, 0, 10); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -624,7 +625,8 @@ typedef struct / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) /** - * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer output compare active/inactive delay. + * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer + * output compare active/inactive delay. * @note ex: @ref __HAL_TIM_CALC_PULSE_DITHER(1000000, 0, 10); * @note This macro should be used only if dithering is already enabled * @param __TIMCLK__ timer input clock frequency (in Hz) @@ -637,7 +639,8 @@ typedef struct / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) /** - * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode). + * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration + * (when the timer operates in one pulse mode). * @note ex: @ref __HAL_TIM_CALC_PERIOD_BY_DELAY(1000000, 0, 10, 20); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -650,7 +653,8 @@ typedef struct + __HAL_TIM_CALC_PULSE((__TIMCLK__), (__PSC__), (__DELAY__)))) /** - * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required pulse duration (when the timer operates in one pulse mode). + * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required + * pulse duration (when the timer operates in one pulse mode). * @note ex: @ref __HAL_TIM_CALC_PERIOD_DITHER_BY_DELAY(1000000, 0, 10, 20); * @note This macro should be used only if dithering is already enabled * @param __TIMCLK__ timer input clock frequency (in Hz) @@ -2108,7 +2112,7 @@ HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, /* End of exported functions -------------------------------------------------*/ /* Private functions----------------------------------------------------------*/ -/** @addtogroup TIMEx_Private_Functions TIMEx Private Functions +/** @addtogroup TIMEx_Private_Functions TIM Extended Private Functions * @{ */ void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); @@ -2132,5 +2136,3 @@ void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma); #endif /* STM32G4xx_HAL_TIM_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h index 47125ee..0df466b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -214,7 +213,7 @@ typedef struct __UART_HandleTypeDef UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ - uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ + const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ uint16_t TxXferSize; /*!< UART Tx Transfer size */ @@ -817,10 +816,6 @@ typedef void (*pUART_RxEventCallbackTypeDef) * @} */ -/* Prescaler Table used in BRR computation macros. - Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ -extern const uint16_t UARTPrescTable[12]; - /** * @} */ @@ -1142,10 +1137,10 @@ extern const uint16_t UARTPrescTable[12]; * @param __HANDLE__ specifies the UART Handle. * @retval None */ -#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ +#define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ + do{ \ + ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ + (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ } while(0U) /** @brief Disable CTS flow control. @@ -1161,10 +1156,10 @@ extern const uint16_t UARTPrescTable[12]; * @param __HANDLE__ specifies the UART Handle. * @retval None */ -#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ - do{ \ - CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ +#define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ + do{ \ + ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ + (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ } while(0U) /** @brief Enable RTS flow control. @@ -1180,10 +1175,10 @@ extern const uint16_t UARTPrescTable[12]; * @param __HANDLE__ specifies the UART Handle. * @retval None */ -#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ - (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ +#define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ + do{ \ + ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ + (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ } while(0U) /** @brief Disable RTS flow control. @@ -1199,10 +1194,10 @@ extern const uint16_t UARTPrescTable[12]; * @param __HANDLE__ specifies the UART Handle. * @retval None */ -#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ - do{ \ - CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ - (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ +#define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ + do{ \ + ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ + (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ } while(0U) /** * @} @@ -1613,11 +1608,11 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); */ /* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); @@ -1697,6 +1692,17 @@ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); +/** + * @} + */ + +/* Private variables -----------------------------------------------------------*/ +/** @defgroup UART_Private_variables UART Private variables + * @{ + */ +/* Prescaler Table used in BRR computation macros. + Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ +extern const uint16_t UARTPrescTable[12]; /** * @} */ @@ -1715,4 +1721,3 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa #endif /* STM32G4xx_HAL_UART_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h index a261bf2..1408711 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -650,4 +649,3 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ #endif /* STM32G4xx_HAL_UART_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart.h index ae1de58..27c8892 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -125,7 +124,7 @@ typedef struct __USART_HandleTypeDef USART_InitTypeDef Init; /*!< USART communication parameters */ - uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ + const uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ uint16_t TxXferSize; /*!< USART Tx Transfer size */ @@ -599,7 +598,7 @@ typedef void (*pUSART_CallbackTypeDef)(USART_HandleTypeDef *husart); /*!< poin */ #define __HAL_USART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ & (0x01U << (((__INTERRUPT__) & USART_ISR_MASK)>>\ - USART_ISR_POS))) != 0U) ? SET : RESET) + USART_ISR_POS))) != 0U) ? SET : RESET) /** @brief Check whether the specified USART interrupt source is enabled or not. * @param __HANDLE__ specifies the USART Handle. @@ -921,17 +920,17 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_ */ /* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); +HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout); HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); +HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size); HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); +HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size); HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); @@ -983,4 +982,3 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); #endif /* STM32G4xx_HAL_USART_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart_ex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart_ex.h index 77e0c63..f008964 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart_ex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_usart_ex.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -281,4 +280,3 @@ HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, ui #endif /* STM32G4xx_HAL_USART_EX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_wwdg.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_wwdg.h index 82d9ac2..7e5fc5b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_wwdg.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_wwdg.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -305,5 +304,3 @@ void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg); #endif #endif /* STM32G4xx_HAL_WWDG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h index 3683c03..11dc3e6 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -349,7 +348,7 @@ extern "C" { #define TEMPSENSOR_CAL1_ADDR ((uint16_t*) (0x1FFF75A8UL)) /* Internal temperature sensor, address of parameter TS_CAL1: On STM32G4, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */ #define TEMPSENSOR_CAL2_ADDR ((uint16_t*) (0x1FFF75CAUL)) /* Internal temperature sensor, address of parameter TS_CAL2: On STM32G4, temperature sensor ADC raw data acquired at temperature 110 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */ #define TEMPSENSOR_CAL1_TEMP (30L) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */ -#define TEMPSENSOR_CAL2_TEMP (110L) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */ +#define TEMPSENSOR_CAL2_TEMP (130L) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */ #define TEMPSENSOR_CAL_VREFANALOG (3000UL) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */ /** @@ -5495,12 +5494,20 @@ __STATIC_INLINE uint32_t LL_ADC_GetChannelSamplingTime(ADC_TypeDef *ADCx, uint32 */ __STATIC_INLINE void LL_ADC_SetChannelSingleDiff(ADC_TypeDef *ADCx, uint32_t Channel, uint32_t SingleDiff) { - /* Bits of channels in single or differential mode are set only for */ - /* differential mode (for single mode, mask of bits allowed to be set is */ - /* shifted out of range of bits of channels in single or differential mode. */ - MODIFY_REG(ADCx->DIFSEL, - Channel & ADC_SINGLEDIFF_CHANNEL_MASK, - (Channel & ADC_SINGLEDIFF_CHANNEL_MASK) & (ADC_DIFSEL_DIFSEL >> (SingleDiff & ADC_SINGLEDIFF_CHANNEL_SHIFT_MASK))); + /* Bits for single or differential mode selection for each channel are set */ + /* to 1 only when the differential mode is selected, and to 0 when the */ + /* single mode is selected. */ + + if (SingleDiff == LL_ADC_DIFFERENTIAL_ENDED) + { + SET_BIT(ADCx->DIFSEL, + Channel & ADC_SINGLEDIFF_CHANNEL_MASK); + } + else + { + CLEAR_BIT(ADCx->DIFSEL, + Channel & ADC_SINGLEDIFF_CHANNEL_MASK); + } } /** @@ -5856,7 +5863,7 @@ __STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK) >> ADC_AWD_CRX_REGOFFSET_POS) + ((AWDy & ADC_AWD_CR12_REGOFFSETGAP_MASK) * ADC_AWD_CR12_REGOFFSETGAP_VAL)); - uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & AWDy & ADC_AWD_CR_ALL_CHANNEL_MASK); + uint32_t AnalogWDMonitChannels = (READ_BIT(*preg, AWDy) & ADC_AWD_CR_ALL_CHANNEL_MASK); /* If "AnalogWDMonitChannels" == 0, then the selected AWD is disabled */ /* (parameter value LL_ADC_AWD_DISABLE). */ @@ -8174,5 +8181,3 @@ void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct); #endif #endif /* STM32G4xx_LL_ADC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h index f73715a..8641c9f 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_bus.h @@ -23,14 +23,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -1680,4 +1678,3 @@ __STATIC_INLINE void LL_APB2_GRP1_DisableClockStopSleep(uint32_t Periphs) #endif /* STM32G4xx_LL_BUS_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_comp.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_comp.h index 00828c1..ee65142 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_comp.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_comp.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -756,5 +755,3 @@ void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct); #endif #endif /* STM32G4xx_LL_COMP_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cordic.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cordic.h index 9c010e7..14acff8 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cordic.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cordic.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -782,5 +781,3 @@ ErrorStatus LL_CORDIC_DeInit(CORDIC_TypeDef *CORDICx); #endif #endif /* STM32G4xx_LL_CORDIC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h index 3121240..a0283f2 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cortex.h @@ -3,6 +3,17 @@ * @file stm32g4xx_ll_cortex.h * @author MCD Application Team * @brief Header file of CORTEX LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -10,7 +21,7 @@ [..] The LL CORTEX driver contains a set of generic APIs that can be used by user: - (+) SYSTICK configuration used by @ref LL_mDelay and @ref LL_Init1msTick + (+) SYSTICK configuration used by LL_mDelay and LL_Init1msTick functions (+) Low power mode configuration (SCB register of Cortex-MCU) (+) MPU API to configure and enable regions @@ -18,18 +29,6 @@ (+) API to enable fault handler (SHCSR accesses) @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ @@ -636,4 +635,3 @@ __STATIC_INLINE void LL_MPU_DisableRegion(uint32_t Region) #endif /* __STM32G4xx_LL_CORTEX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crc.h index a7c6430..d857367 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -236,7 +235,7 @@ __STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t } /** - * @brief Configure the reversal of the bit order of the Output data + * @brief Return type of reversal of the bit order of the Output data * @rmtoll CR REV_OUT LL_CRC_GetOutputDataReverseMode * @param CRCx CRC Instance * @retval Returned value can be one of the following values: @@ -460,5 +459,3 @@ ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); #endif #endif /* STM32G4xx_LL_CRC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h index 8bbb49f..054d572 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_crs.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2018 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -780,4 +779,3 @@ ErrorStatus LL_CRS_DeInit(void); #endif /* __STM32G4xx_LL_CRS_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dac.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dac.h index 1a1005a..136b954 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dac.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dac.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -2403,6 +2402,7 @@ __STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t D /** @defgroup DAC_LL_EF_FLAG_Management FLAG Management * @{ */ + /** * @brief Get DAC calibration offset flag for DAC channel 1 * @rmtoll SR CAL_FLAG1 LL_DAC_IsActiveFlag_CAL1 @@ -2663,4 +2663,3 @@ void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct); #endif /* STM32G4xx_LL_DAC_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h index 4fa3c4b..76dfbf0 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dma.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -2577,4 +2576,3 @@ void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct); #endif /* __STM32G4xx_LL_DMA_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h index 55a3380..7cd04b4 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_dmamux.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -2005,4 +2004,3 @@ __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMU #endif /* __STM32G4xx_LL_DMAMUX_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h index df9edb2..db1d280 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_exti.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1421,4 +1420,3 @@ void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct); #endif /* __STM32G4xx_LL_EXTI_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmac.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmac.h index bfe3a28..acbc61d 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmac.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmac.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1062,5 +1061,3 @@ ErrorStatus LL_FMAC_DeInit(FMAC_TypeDef *FMACx); #endif #endif /* STM32G4xx_LL_FMAC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmc.h index 59c58de..26976d4 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_fmc.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -854,5 +853,3 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, u #endif #endif /* STM32G4xx_LL_FMC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h index 8bf2777..faf0e9a 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_gpio.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -993,4 +992,3 @@ void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct); #endif /* STM32G4xx_LL_GPIO_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_hrtim.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_hrtim.h index 313c9b3..12ccb1d 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_hrtim.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_hrtim.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -570,10 +569,10 @@ static const uint32_t REG_MASK_TAB_CPT[] = * @{ * @brief Constants defining the source and event to be sent on the synchronization output. */ -#define LL_HRTIM_SYNCOUT_SRC_MASTER_START 0x00000000U /*!< A pulse is sent on the SYNCOUT output upon master timer start event */ -#define LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon master timer compare 1 event*/ -#define LL_HRTIM_SYNCOUT_SRC_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /*!< A pulse is sent on the SYNCOUT output upon timer A start or reset events */ -#define LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon timer A compare 1 event */ +#define LL_HRTIM_SYNCOUT_SRC_MASTER_START 0x00000000U /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon master timer start event */ +#define LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon master timer compare 1 event */ +#define LL_HRTIM_SYNCOUT_SRC_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon timer A start or reset events */ +#define LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on HRTIM_SCOUT output and hrtim_out_sync2 upon timer A compare 1 event */ /** * @} */ @@ -3910,6 +3909,8 @@ __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledHalfMode(HRTIM_TypeDef *HRTIMx, u * @brief Enable the Re-Syncronisation Update. * @note The update coming from adjacent timers (when MSTU, TAU, TBU, TCU, TDU, TEU, TFU bit is set) * or from a software update (TxSWU bit) is taken into account on the following reset/roll-over. + * @note LL_HRTIM_ForceUpdate must be called prior programming the syncrhonization mode to force + * immediate update of the slave timer registers. * @rmtoll TIMxCR RSYNCU LL_HRTIM_TIM_EnableResyncUpdate * @param HRTIMx High Resolution Timer instance * @param Timer This parameter can be one of the following values: @@ -13892,6 +13893,4 @@ ErrorStatus LL_HRTIM_DeInit(HRTIM_TypeDef* HRTIMx); #endif /* STM32G4xx_LL_HRTIM_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_i2c.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_i2c.h index 9584ef2..9350781 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_i2c.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_i2c.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -69,38 +68,46 @@ typedef struct uint32_t PeripheralMode; /*!< Specifies the peripheral mode. This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE. - This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */ + This feature can be modified afterwards using unitary function + @ref LL_I2C_SetMode(). */ uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values. This parameter must be set by referring to the STM32CubeMX Tool and the helper macro @ref __LL_I2C_CONVERT_TIMINGS(). - This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */ + This feature can be modified afterwards using unitary function + @ref LL_I2C_SetTiming(). */ uint32_t AnalogFilter; /*!< Enables or disables analog noise filter. This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION. - This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */ + This feature can be modified afterwards using unitary functions + @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */ uint32_t DigitalFilter; /*!< Configures the digital noise filter. This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F. - This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */ + This feature can be modified afterwards using unitary function + @ref LL_I2C_SetDigitalFilter(). */ uint32_t OwnAddress1; /*!< Specifies the device own address 1. This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF. - This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */ + This feature can be modified afterwards using unitary function + @ref LL_I2C_SetOwnAddress1(). */ - uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte. + uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive + match code or next received byte. This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE. - This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */ + This feature can be modified afterwards using unitary function + @ref LL_I2C_AcknowledgeNextData(). */ uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit). This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1. - This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */ + This feature can be modified afterwards using unitary function + @ref LL_I2C_SetOwnAddress1(). */ } LL_I2C_InitTypeDef; /** * @} @@ -170,10 +177,11 @@ typedef struct /** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode * @{ */ -#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */ -#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */ -#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode (Default address not acknowledge) */ -#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */ +#define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */ +#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */ +#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode + (Default address not acknowledge) */ +#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */ /** * @} */ @@ -208,14 +216,15 @@ typedef struct /** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks * @{ */ -#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */ -#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */ -#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */ -#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */ -#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */ -#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */ -#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */ -#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. All Address2 are acknowledged.*/ +#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */ +#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */ +#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */ +#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */ +#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */ +#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */ +#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */ +#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. + All Address2 are acknowledged. */ /** * @} */ @@ -250,14 +259,21 @@ typedef struct /** @defgroup I2C_LL_EC_MODE Transfer End Mode * @{ */ -#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */ -#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode with no HW PEC comparison. */ -#define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode with no HW PEC comparison. */ -#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ -#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ -#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode with HW PEC comparison. */ -#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ -#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Software end mode with HW PEC comparison. */ +#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */ +#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode + with no HW PEC comparison. */ +#define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode + with no HW PEC comparison. */ +#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode + with HW PEC comparison. */ +#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode + with HW PEC comparison. */ +#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode + with HW PEC comparison. */ +#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) +/*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ +#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) +/*!< Enable SMBUS Software end mode with HW PEC comparison. */ /** * @} */ @@ -265,14 +281,23 @@ typedef struct /** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation * @{ */ -#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /*!< Don't Generate Stop and Start condition. */ -#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) /*!< Generate Stop condition (Size should be set to 0). */ -#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Start for read request. */ -#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Start for write request. */ -#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Restart for read request, slave 7Bit address. */ -#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 7Bit address. */ -#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */ -#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 10Bit address.*/ +#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U +/*!< Don't Generate Stop and Start condition. */ +#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) +/*!< Generate Stop condition (Size should be set to 0). */ +#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) +/*!< Generate Start for read request. */ +#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) +/*!< Generate Start for write request. */ +#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) +/*!< Generate Restart for read request, slave 7Bit address. */ +#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) +/*!< Generate Restart for write request, slave 7Bit address. */ +#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | \ + I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) +/*!< Generate Restart for read request, slave 10Bit address. */ +#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) +/*!< Generate Restart for write request, slave 10Bit address.*/ /** * @} */ @@ -280,8 +305,10 @@ typedef struct /** @defgroup I2C_LL_EC_DIRECTION Read Write Direction * @{ */ -#define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, slave enters receiver mode. */ -#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, slave enters transmitter mode.*/ +#define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, + slave enters receiver mode. */ +#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, + slave enters transmitter mode.*/ /** * @} */ @@ -289,8 +316,10 @@ typedef struct /** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data * @{ */ -#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ -#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ +#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for + transmission */ +#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for + reception */ /** * @} */ @@ -298,8 +327,10 @@ typedef struct /** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout * @{ */ -#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect SCL low level timeout. */ -#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/ +#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect + SCL low level timeout. */ +#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect + both SCL and SDA high level timeout.*/ /** * @} */ @@ -307,9 +338,12 @@ typedef struct /** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection * @{ */ -#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */ -#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) enable bit */ -#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */ +#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */ +#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) + enable bit */ +#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | \ + I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB +(extended clock) enable bits */ /** * @} */ @@ -353,18 +387,22 @@ typedef struct /** * @brief Configure the SDA setup, hold time and the SCL high, low period. * @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. - * @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc) - * @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc) - * @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc) - * @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc) + * @param __SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. + (tscldel = (SCLDEL+1)xtpresc) + * @param __HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. + (tsdadel = SDADELxtpresc) + * @param __SCLH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. + (tsclh = (SCLH+1)xtpresc) + * @param __SCLL_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. + (tscll = (SCLL+1)xtpresc) * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF */ -#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \ - ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \ - (((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \ - (((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \ - (((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \ - (((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL)) +#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __SETUP_TIME__, __HOLD_TIME__, __SCLH_PERIOD__, __SCLL_PERIOD__) \ + ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \ + (((uint32_t)(__SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \ + (((uint32_t)(__HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \ + (((uint32_t)(__SCLH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \ + (((uint32_t)(__SCLL_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL)) /** * @} */ @@ -428,7 +466,8 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx) * @param AnalogFilter This parameter can be one of the following values: * @arg @ref LL_I2C_ANALOGFILTER_ENABLE * @arg @ref LL_I2C_ANALOGFILTER_DISABLE - * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk). + * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) + and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk). * This parameter is used to configure the digital noise filter on SDA and SCL input. * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk. * @retval None @@ -444,7 +483,8 @@ __STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilt * This filter can only be programmed when the I2C is disabled (PE = 0). * @rmtoll CR1 DNF LL_I2C_SetDigitalFilter * @param I2Cx I2C Instance. - * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk). + * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) + and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk). * This parameter is used to configure the digital noise filter on SDA and SCL input. * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk. * @retval None @@ -664,7 +704,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx) /** * @brief Enable Wakeup from STOP. - * @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not * WakeUpFromStop feature is supported by the I2Cx Instance. * @note This bit can only be programmed when Digital Filter is disabled. * @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop @@ -678,7 +718,7 @@ __STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx) /** * @brief Disable Wakeup from STOP. - * @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not * WakeUpFromStop feature is supported by the I2Cx Instance. * @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop * @param I2Cx I2C Instance. @@ -691,7 +731,7 @@ __STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx) /** * @brief Check if Wakeup from STOP is enabled or disabled. - * @note Macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not * WakeUpFromStop feature is supported by the I2Cx Instance. * @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop * @param I2Cx I2C Instance. @@ -941,7 +981,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx) /** * @brief Configure peripheral mode. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR1 SMBHEN LL_I2C_SetMode\n * CR1 SMBDEN LL_I2C_SetMode @@ -960,7 +1000,7 @@ __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode) /** * @brief Get peripheral mode. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR1 SMBHEN LL_I2C_GetMode\n * CR1 SMBDEN LL_I2C_GetMode @@ -978,7 +1018,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx) /** * @brief Enable SMBus alert (Host or Device mode) - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note SMBus Device mode: * - SMBus Alert pin is drived low and @@ -996,7 +1036,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx) /** * @brief Disable SMBus alert (Host or Device mode) - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note SMBus Device mode: * - SMBus Alert pin is not drived (can be used as a standard GPIO) and @@ -1014,7 +1054,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx) /** * @brief Check if SMBus alert (Host or Device mode) is enabled or disabled. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert * @param I2Cx I2C Instance. @@ -1027,7 +1067,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx) /** * @brief Enable SMBus Packet Error Calculation (PEC). - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC * @param I2Cx I2C Instance. @@ -1040,7 +1080,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx) /** * @brief Disable SMBus Packet Error Calculation (PEC). - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC * @param I2Cx I2C Instance. @@ -1053,7 +1093,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx) /** * @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC * @param I2Cx I2C Instance. @@ -1066,7 +1106,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx) /** * @brief Configure the SMBus Clock Timeout. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB). * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n @@ -1089,7 +1129,7 @@ __STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Timeo /** * @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode). - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note These bits can only be programmed when TimeoutA is disabled. * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA @@ -1104,7 +1144,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t Timeout /** * @brief Get the SMBus Clock TimeoutA setting. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA * @param I2Cx I2C Instance. @@ -1117,7 +1157,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx) /** * @brief Set the SMBus Clock TimeoutA mode. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note This bit can only be programmed when TimeoutA is disabled. * @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode @@ -1134,7 +1174,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t Tim /** * @brief Get the SMBus Clock TimeoutA mode. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode * @param I2Cx I2C Instance. @@ -1149,7 +1189,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx) /** * @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode). - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note These bits can only be programmed when TimeoutB is disabled. * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB @@ -1164,7 +1204,7 @@ __STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t Timeout /** * @brief Get the SMBus Extended Cumulative Clock TimeoutB setting. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB * @param I2Cx I2C Instance. @@ -1177,7 +1217,7 @@ __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx) /** * @brief Enable the SMBus Clock Timeout. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n * TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout @@ -1195,7 +1235,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Clock /** * @brief Disable the SMBus Clock Timeout. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n * TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout @@ -1213,7 +1253,7 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc /** * @brief Check if the SMBus Clock Timeout is enabled or disabled. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n * TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout @@ -1226,7 +1266,8 @@ __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t Cloc */ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout) { - return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL); + return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == \ + (ClockTimeout)) ? 1UL : 0UL); } /** @@ -1443,7 +1484,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx) /** * @brief Enable Error interrupts. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note Any of these errors will generate interrupt : * Arbitration Loss (ARLO) @@ -1463,7 +1504,7 @@ __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx) /** * @brief Disable Error interrupts. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note Any of these errors will generate interrupt : * Arbitration Loss (ARLO) @@ -1645,7 +1686,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of SMBus PEC error flag in reception. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note RESET: Clear default value. * SET: When the received PEC does not match with the PEC register content. @@ -1660,7 +1701,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of SMBus Timeout detection flag. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note RESET: Clear default value. * SET: When a timeout or extended clock timeout occurs. @@ -1675,7 +1716,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx) /** * @brief Indicate the status of SMBus alert flag. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @note RESET: Clear default value. * SET: When SMBus host configuration, SMBus alert enabled and @@ -1782,7 +1823,7 @@ __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx) /** * @brief Clear SMBus PEC error flag. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR * @param I2Cx I2C Instance. @@ -1795,7 +1836,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx) /** * @brief Clear SMBus Timeout detection flag. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT * @param I2Cx I2C Instance. @@ -1808,7 +1849,7 @@ __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx) /** * @brief Clear SMBus Alert flag. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT * @param I2Cx I2C Instance. @@ -1923,7 +1964,8 @@ __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx) } /** - * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte. + * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code + or next received byte. * @note Usage in Slave mode only. * @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData * @param I2Cx I2C Instance. @@ -1964,7 +2006,8 @@ __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx) /** * @brief Enable automatic RESTART Read request condition for 10bit address header (master mode). * @note The master sends the complete 10bit slave address read sequence : - * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction. + * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address + in Read direction. * @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead * @param I2Cx I2C Instance. * @retval None @@ -2125,9 +2168,10 @@ __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx) /** * @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode). - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. - * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received. + * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition + or an Address Matched is received. * This bit has no effect when RELOAD bit is set. * This bit has no effect in device mode when SBC bit is not set. * @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare @@ -2141,7 +2185,7 @@ __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx) /** * @brief Check if the SMBus Packet Error byte internal comparison is requested or not. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare * @param I2Cx I2C Instance. @@ -2154,7 +2198,7 @@ __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx) /** * @brief Get the SMBus Packet Error byte calculated. - * @note Macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not + * @note The macro IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not * SMBus feature is supported by the I2Cx Instance. * @rmtoll PECR PEC LL_I2C_GetSMBusPEC * @param I2Cx I2C Instance. @@ -2226,5 +2270,3 @@ void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct); #endif #endif /* STM32G4xx_LL_I2C_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h index b6dcf47..7e0c16c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_iwdg.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -337,5 +336,3 @@ __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) #endif #endif /* STM32G4xx_LL_IWDG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lptim.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lptim.h index a573484..27e9b19 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lptim.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lptim.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -67,22 +66,26 @@ typedef struct uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance. This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE. - This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/ + This feature can be modified afterwards using unitary + function @ref LL_LPTIM_SetClockSource().*/ uint32_t Prescaler; /*!< Specifies the prescaler division ratio. This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER. - This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/ + This feature can be modified afterwards using using unitary + function @ref LL_LPTIM_SetPrescaler().*/ uint32_t Waveform; /*!< Specifies the waveform shape. This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM. - This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/ + This feature can be modified afterwards using unitary + function @ref LL_LPTIM_ConfigOutput().*/ uint32_t Polarity; /*!< Specifies waveform polarity. This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/ + This feature can be modified afterwards using unitary + function @ref LL_LPTIM_ConfigOutput().*/ } LL_LPTIM_InitTypeDef; /** @@ -931,7 +934,8 @@ __STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx) } /** - * @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source. + * @brief Configure the active edge or edges used by the counter when + the LPTIM is clocked by an external clock source. * @note This function must be called when the LPTIM instance is disabled. * @note When both external clock signal edges are considered active ones, * the LPTIM must also be clocked by an internal clock source with a @@ -1149,7 +1153,8 @@ __STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx) } /** - * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed. If so, a new one can be initiated. + * @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully + completed. If so, a new one can be initiated. * @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). @@ -1171,7 +1176,8 @@ __STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx) } /** - * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed. If so, a new one can be initiated. + * @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully + completed. If so, a new one can be initiated. * @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). @@ -1193,7 +1199,8 @@ __STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx) } /** - * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode). + * @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance + operates in encoder mode). * @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). @@ -1215,7 +1222,8 @@ __STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx) } /** - * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode). + * @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance + operates in encoder mode). * @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). @@ -1487,5 +1495,3 @@ __STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx) #endif #endif /* STM32G4xx_LL_LPTIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h index 227af5d..ea93064 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_lpuart.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -159,7 +158,6 @@ typedef struct #define LL_LPUART_ICR_NCF USART_ICR_NECF /*!< Noise error detected clear flag */ #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */ #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */ -#define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF /*!< TX FIFO Empty clear flag */ #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */ #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */ #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */ @@ -577,7 +575,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) { - MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); } /** @@ -612,7 +610,7 @@ __STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) { - MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); } /** @@ -655,8 +653,8 @@ __STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold) { - MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \ - (RXThreshold << USART_CR3_RXFTCFG_Pos)); + ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \ + (RXThreshold << USART_CR3_RXFTCFG_Pos)); } /** @@ -669,7 +667,7 @@ __STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint */ __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_UESM); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_UESM); } /** @@ -681,7 +679,7 @@ __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM); } /** @@ -704,7 +702,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_RE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RE); } /** @@ -715,7 +713,7 @@ __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE); } /** @@ -726,7 +724,7 @@ __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_TE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TE); } /** @@ -737,7 +735,7 @@ __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE); } /** @@ -755,7 +753,7 @@ __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection) { - MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); + ATOMIC_MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); } /** @@ -872,7 +870,7 @@ __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_MME); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_MME); } /** @@ -883,7 +881,7 @@ __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME); } /** @@ -1875,17 +1873,6 @@ __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx) WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF); } -/** - * @brief Clear TX FIFO Empty Flag - * @rmtoll ICR TXFECF LL_LPUART_ClearFlag_TXFE - * @param LPUARTx LPUART Instance - * @retval None - */ -__STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx) -{ - WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF); -} - /** * @brief Clear Transmission Complete Flag * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC @@ -1946,7 +1933,7 @@ __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); } /* Legacy define */ @@ -1960,7 +1947,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); } /** @@ -1971,7 +1958,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TCIE); } /* Legacy define */ @@ -1985,7 +1972,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); } /** @@ -1996,7 +1983,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_PEIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_PEIE); } /** @@ -2007,7 +1994,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_CMIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_CMIE); } /** @@ -2018,7 +2005,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); } /** @@ -2029,7 +2016,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); + ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); } /** @@ -2044,7 +2031,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_EIE); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_EIE); } /** @@ -2055,7 +2042,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE); } /** @@ -2066,7 +2053,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE); } /** @@ -2077,7 +2064,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); } /** @@ -2088,7 +2075,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); } /** @@ -2099,7 +2086,7 @@ __STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); } /* Legacy define */ @@ -2113,7 +2100,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); } /** @@ -2124,7 +2111,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE); } /* Legacy define */ @@ -2138,7 +2125,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); } /** @@ -2149,7 +2136,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE); } /** @@ -2160,7 +2147,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE); } /** @@ -2171,7 +2158,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); } /** @@ -2182,7 +2169,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); } /** @@ -2197,7 +2184,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE); } /** @@ -2208,7 +2195,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE); } /** @@ -2219,7 +2206,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE); } /** @@ -2230,7 +2217,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); } /** @@ -2241,7 +2228,7 @@ __STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); } /** @@ -2409,7 +2396,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_DMAR); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAR); } /** @@ -2420,7 +2407,7 @@ __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR); } /** @@ -2442,7 +2429,7 @@ __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx) { - SET_BIT(LPUARTx->CR3, USART_CR3_DMAT); + ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAT); } /** @@ -2453,7 +2440,7 @@ __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx) */ __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx) { - CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT); + ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT); } /** @@ -2661,4 +2648,3 @@ void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct); #endif /* STM32G4xx_LL_LPUART_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_opamp.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_opamp.h index 3d711d0..b96b6ce 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_opamp.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_opamp.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -329,7 +328,7 @@ typedef struct */ /** @defgroup OPAMP_LL_EC_HW_DELAYS Definitions of OPAMP hardware constraints delays - * @note Only OPAMP IP HW delays are defined in OPAMP LL driver driver, + * @note Only OPAMP peripheral HW delays are defined in OPAMP LL driver driver, * not timeout values. * For details on delays values, refer to descriptions in source code * above each literal definition. @@ -520,7 +519,7 @@ __STATIC_INLINE uint32_t LL_OPAMP_GetPGAGain(OPAMP_TypeDef *OPAMPx) * @rmtoll CSR HIGHSPEEDEN LL_OPAMP_SetPowerMode * @param OPAMPx OPAMP instance * @param PowerMode This parameter can be one of the following values: - * @arg @ref LL_OPAMP_POWERMODE_NORMAL + * @arg @ref LL_OPAMP_POWERMODE_NORMALSPEED * @arg @ref LL_OPAMP_POWERMODE_HIGHSPEED * @retval None */ @@ -535,7 +534,7 @@ __STATIC_INLINE void LL_OPAMP_SetPowerMode(OPAMP_TypeDef *OPAMPx, uint32_t Power * @rmtoll CSR HIGHSPEEDEN LL_OPAMP_GetPowerMode * @param OPAMPx OPAMP instance * @retval Returned value can be one of the following values: - * @arg @ref LL_OPAMP_POWERMODE_NORMAL + * @arg @ref LL_OPAMP_POWERMODE_NORMALSPEED * @arg @ref LL_OPAMP_POWERMODE_HIGHSPEED */ __STATIC_INLINE uint32_t LL_OPAMP_GetPowerMode(OPAMP_TypeDef *OPAMPx) @@ -1026,4 +1025,3 @@ void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct); #endif /* STM32G4xx_LL_OPAMP_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h index 35d7b9f..a15c7cf 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_pwr.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1601,4 +1600,3 @@ ErrorStatus LL_PWR_DeInit(void); #endif /* STM32G4xx_LL_PWR_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h index 6e0fbbe..4c18025 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rcc.h @@ -6,14 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -2396,6 +2394,16 @@ __STATIC_INLINE void LL_RCC_PLL_DisableDomain_ADC(void) CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN); } +/** + * @brief Check if PLL output mapped on ADC domain clock is enabled + * @rmtoll PLLCFGR PLLPEN LL_RCC_PLL_IsEnabledDomain_ADC + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsEnabledDomain_ADC(void) +{ + return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPEN) == (RCC_PLLCFGR_PLLPEN)) ? 1UL : 0UL); +} + /** * @brief Enable PLL output mapped on 48MHz domain clock * @rmtoll PLLCFGR PLLQEN LL_RCC_PLL_EnableDomain_48M @@ -2420,6 +2428,16 @@ __STATIC_INLINE void LL_RCC_PLL_DisableDomain_48M(void) CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN); } +/** + * @brief Check if PLL output mapped on 48MHz domain clock is enabled + * @rmtoll PLLCFGR PLLQEN LL_RCC_PLL_IsEnabledDomain_48M + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsEnabledDomain_48M(void) +{ + return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQEN) == (RCC_PLLCFGR_PLLQEN)) ? 1UL : 0UL); +} + /** * @brief Enable PLL output mapped on SYSCLK domain * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_EnableDomain_SYS @@ -2444,6 +2462,16 @@ __STATIC_INLINE void LL_RCC_PLL_DisableDomain_SYS(void) CLEAR_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN); } +/** + * @brief Check if PLL output mapped on SYSCLK domain clock is enabled + * @rmtoll PLLCFGR PLLREN LL_RCC_PLL_IsEnabledDomain_SYS + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_RCC_PLL_IsEnabledDomain_SYS(void) +{ + return ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLREN) == (RCC_PLLCFGR_PLLREN)) ? 1UL : 0UL); +} + /** * @} */ @@ -2968,4 +2996,3 @@ uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource); #endif /* STM32G4xx_LL_RCC_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rng.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rng.h index a19fe45..0d82f72 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rng.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rng.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -57,8 +56,8 @@ typedef struct { uint32_t ClockErrorDetection; /*!< Clock error detection. This parameter can be one value of @ref RNG_LL_CED. - - This parameter can be modified using unitary functions @ref LL_RNG_EnableClkErrorDetect(). */ + This parameter can be modified using unitary + functions @ref LL_RNG_EnableClkErrorDetect(). */ } LL_RNG_InitTypeDef; /** @@ -398,4 +397,3 @@ ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx); #endif /* __STM32G4xx_LL_RNG_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h index 17a011d..964080c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_rtc.h @@ -6,12 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -5568,5 +5568,3 @@ ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx); #endif #endif /* STM32G4xx_LL_RTC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h index bfb93d6..4c91928 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_spi.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1333,7 +1332,7 @@ __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx) */ __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx) { - return (uint8_t)(READ_REG(SPIx->DR)); + return (*((__IO uint8_t *)&SPIx->DR)); } /** @@ -2283,4 +2282,3 @@ void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, #endif /* STM32G4xx_LL_SPI_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h index 5e3f56b..2a8e877 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_system.h @@ -3,6 +3,17 @@ * @file stm32g4xx_ll_system.h * @author MCD Application Team * @brief Header file of SYSTEM LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -17,17 +28,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ @@ -1514,4 +1514,3 @@ __STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void) #endif /* __STM32G4xx_LL_SYSTEM_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h index b2b265f..d42f158 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_tim.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -215,24 +214,29 @@ typedef struct uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetPrescaler().*/ uint32_t CounterMode; /*!< Specifies the counter mode. This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetCounterMode().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetCounterMode().*/ uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active Auto-Reload Register at the next update event. This parameter must be a number between Min_Data=0x0000 and Max_Data=0xFFFF. - Some timer instances may support 32 bits counters. In that case this parameter must be a number between 0x0000 and 0xFFFFFFFF. + Some timer instances may support 32 bits counters. In that case this parameter must + be a number between 0x0000 and 0xFFFFFFFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetAutoReload().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetAutoReload().*/ uint32_t ClockDivision; /*!< Specifies the clock division. This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetClockDivision().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetClockDivision().*/ uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter reaches zero, an update event is generated and counting restarts @@ -240,10 +244,13 @@ typedef struct This means in PWM mode that (N+1) corresponds to: - the number of PWM periods in edge-aligned mode - the number of half PWM period in center-aligned mode - GP timers: this parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. - Advanced timers: this parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. + GP timers: this parameter must be a number between Min_Data = 0x00 and + Max_Data = 0xFF. + Advanced timers: this parameter must be a number between Min_Data = 0x0000 and + Max_Data = 0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetRepetitionCounter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetRepetitionCounter().*/ } LL_TIM_InitTypeDef; /** @@ -254,43 +261,51 @@ typedef struct uint32_t OCMode; /*!< Specifies the output mode. This parameter can be a value of @ref TIM_LL_EC_OCMODE. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetMode().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetMode().*/ uint32_t OCState; /*!< Specifies the TIM Output Compare state. This parameter can be a value of @ref TIM_LL_EC_OCSTATE. - This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ + This feature can be modified afterwards using unitary functions + @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state. This parameter can be a value of @ref TIM_LL_EC_OCSTATE. - This feature can be modified afterwards using unitary functions @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ + This feature can be modified afterwards using unitary functions + @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/ uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Register. This parameter can be a number between Min_Data=0x0000 and Max_Data=0xFFFF. - This feature can be modified afterwards using unitary function LL_TIM_OC_SetCompareCHx (x=1..6).*/ + This feature can be modified afterwards using unitary function + LL_TIM_OC_SetCompareCHx (x=1..6).*/ uint32_t OCPolarity; /*!< Specifies the output polarity. This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetPolarity().*/ uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetPolarity().*/ uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetIdleState().*/ uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetIdleState().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetIdleState().*/ } LL_TIM_OC_InitTypeDef; /** @@ -303,22 +318,26 @@ typedef struct uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t ICActiveInput; /*!< Specifies the input. This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t ICFilter; /*!< Specifies the input capture filter. This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ } LL_TIM_IC_InitTypeDef; @@ -330,47 +349,56 @@ typedef struct uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. - This feature can be modified afterwards using unitary function @ref LL_TIM_SetEncoderMode().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetEncoderMode().*/ uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t IC1Filter; /*!< Specifies the TI1 input filter. This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetActiveInput().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetActiveInput().*/ uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t IC2Filter; /*!< Specifies the TI2 input filter. This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ } LL_TIM_ENCODER_InitTypeDef; @@ -383,26 +411,31 @@ typedef struct uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPolarity().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPolarity().*/ uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value. Prescaler must be set to get a maximum counter period longer than the time interval between 2 consecutive changes on the Hall inputs. This parameter can be a value of @ref TIM_LL_EC_ICPSC. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetPrescaler().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetPrescaler().*/ uint32_t IC1Filter; /*!< Specifies the TI1 input filter. - This parameter can be a value of @ref TIM_LL_EC_IC_FILTER. + This parameter can be a value of + @ref TIM_LL_EC_IC_FILTER. - This feature can be modified afterwards using unitary function @ref LL_TIM_IC_SetFilter().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_IC_SetFilter().*/ uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compare Register. A positive pulse (TRGO event) is generated with a programmable delay every time a change occurs on the Hall inputs. This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetCompareCH2().*/ + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetCompareCH2().*/ } LL_TIM_HALLSENSOR_InitTypeDef; /** @@ -413,97 +446,121 @@ typedef struct uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode. This parameter can be a value of @ref TIM_LL_EC_OSSR - This feature can be modified afterwards using unitary function @ref LL_TIM_SetOffStates() + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetOffStates() - @note This bit-field cannot be modified as long as LOCK level 2 has been programmed. */ + @note This bit-field cannot be modified as long as LOCK level 2 has been + programmed. */ uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state. This parameter can be a value of @ref TIM_LL_EC_OSSI - This feature can be modified afterwards using unitary function @ref LL_TIM_SetOffStates() + This feature can be modified afterwards using unitary function + @ref LL_TIM_SetOffStates() - @note This bit-field cannot be modified as long as LOCK level 2 has been programmed. */ + @note This bit-field cannot be modified as long as LOCK level 2 has been + programmed. */ uint32_t LockLevel; /*!< Specifies the LOCK level parameters. This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL - @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR register - has been written, their content is frozen until the next reset.*/ + @note The LOCK bits can be written only once after the reset. Once the TIMx_BDTR + register has been written, their content is frozen until the next reset.*/ uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the switching-on of the outputs. This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF. - This feature can be modified afterwards using unitary function @ref LL_TIM_OC_SetDeadTime() + This feature can be modified afterwards using unitary function + @ref LL_TIM_OC_SetDeadTime() - @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been + programmed. */ uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not. This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE - This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK() + This feature can be modified afterwards using unitary functions + @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARITY - This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK() + This feature can be modified afterwards using unitary function + @ref LL_TIM_ConfigBRK() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t BreakFilter; /*!< Specifies the TIM Break Filter. This parameter can be a value of @ref TIM_LL_EC_BREAK_FILTER - This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK() + This feature can be modified afterwards using unitary function + @ref LL_TIM_ConfigBRK() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t BreakAFMode; /*!< Specifies the alternate function mode of the break input. This parameter can be a value of @ref TIM_LL_EC_BREAK_AFMODE - This feature can be modified afterwards using unitary functions @ref LL_TIM_ConfigBRK() + This feature can be modified afterwards using unitary functions + @ref LL_TIM_ConfigBRK() @note Bidirectional break input is only supported by advanced timers instances. - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not. This parameter can be a value of @ref TIM_LL_EC_BREAK2_ENABLE - This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableBRK2() or @ref LL_TIM_DisableBRK2() + This feature can be modified afterwards using unitary functions + @ref LL_TIM_EnableBRK2() or @ref LL_TIM_DisableBRK2() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t Break2Polarity; /*!< Specifies the TIM Break2 Input pin polarity. This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARITY - This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK2() + This feature can be modified afterwards using unitary function + @ref LL_TIM_ConfigBRK2() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter. This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER - This feature can be modified afterwards using unitary function @ref LL_TIM_ConfigBRK2() + This feature can be modified afterwards using unitary function + @ref LL_TIM_ConfigBRK2() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t Break2AFMode; /*!< Specifies the alternate function mode of the break2 input. This parameter can be a value of @ref TIM_LL_EC_BREAK2_AFMODE - This feature can be modified afterwards using unitary functions @ref LL_TIM_ConfigBRK2() + This feature can be modified afterwards using unitary functions + @ref LL_TIM_ConfigBRK2() @note Bidirectional break input is only supported by advanced timers instances. - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTPUT_ENABLE - This feature can be modified afterwards using unitary functions @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput() + This feature can be modified afterwards using unitary functions + @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAutomaticOutput() - @note This bit-field can not be modified as long as LOCK level 1 has been programmed. */ + @note This bit-field can not be modified as long as LOCK level 1 has been + programmed. */ } LL_TIM_BDTR_InitTypeDef; /** @@ -878,8 +935,8 @@ typedef struct #define LL_TIM_SLAVEMODE_GATED (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0) /*!< Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high */ #define LL_TIM_SLAVEMODE_TRIGGER (TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1) /*!< Trigger Mode - The counter starts at a rising edge of the trigger TRGI */ #define LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER TIM_SMCR_SMS_3 /*!< Combined reset + trigger mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter, generates an update of the registers and starts the counter */ -#define LL_TIM_SLAVEMODE_COMBINED_GATEDRESET (TIM_SMCR_SMS_3 | TIM_SMCR_SMS_0) /*!< Combined gated + reset mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops and is reset) as soon as the trigger becomes low. - Both start and stop of the counter are controlled. */ +#define LL_TIM_SLAVEMODE_COMBINED_GATEDRESET (TIM_SMCR_SMS_3 | TIM_SMCR_SMS_0) /*!< Combined gated + reset mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops and is reset) as soon as the trigger becomes low.Both startand stop of + the counter are controlled. */ /** * @} */ @@ -1815,10 +1872,17 @@ typedef struct * @retval DTG[0:7] */ #define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \ - ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \ - (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\ - (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\ - (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\ + ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) : \ + (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ + (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2)) :\ + (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ + (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3)) :\ + (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ? \ + (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMCLK__), \ + (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4)) :\ 0U) /** @@ -1843,7 +1907,8 @@ typedef struct ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))) - 1U) : 0U) /** - * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required output signal frequency. + * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required + * output signal frequency. * @note ex: @ref __LL_TIM_CALC_ARR_DITHER (1000000, @ref LL_TIM_GetPrescaler (), 10000); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -1851,10 +1916,12 @@ typedef struct * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535) */ #define __LL_TIM_CALC_ARR_DITHER(__TIMCLK__, __PSC__, __FREQ__) \ - ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (uint32_t)((((uint64_t)(__TIMCLK__) * 16U/((__FREQ__) * ((__PSC__) + 1U))) - 16U)) : 0U) + ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? \ + (uint32_t)((((uint64_t)(__TIMCLK__) * 16U/((__FREQ__) * ((__PSC__) + 1U))) - 16U)) : 0U) /** - * @brief HELPER macro calculating the compare value required to achieve the required timer output compare active/inactive delay. + * @brief HELPER macro calculating the compare value required to achieve the required timer output compare + * active/inactive delay. * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -1866,7 +1933,8 @@ typedef struct / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) /** - * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer output compare active/inactive delay. + * @brief HELPER macro calculating the compare value, with dithering feature enabled, to achieve the required timer + * output compare active/inactive delay. * @note ex: @ref __LL_TIM_CALC_DELAY_DITHER (1000000, @ref LL_TIM_GetPrescaler (), 10); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -1878,7 +1946,8 @@ typedef struct / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U)))) /** - * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration (when the timer operates in one pulse mode). + * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration + * (when the timer operates in one pulse mode). * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -1891,7 +1960,8 @@ typedef struct + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__)))) /** - * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required pulse duration (when the timer operates in one pulse mode). + * @brief HELPER macro calculating the auto-reload value, with dithering feature enabled, to achieve the required + * pulse duration (when the timer operates in one pulse mode). * @note ex: @ref __LL_TIM_CALC_PULSE_DITHER (1000000, @ref LL_TIM_GetPrescaler (), 10, 20); * @param __TIMCLK__ timer input clock frequency (in Hz) * @param __PSC__ prescaler @@ -2148,7 +2218,8 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(TIM_TypeDef *TIMx) } /** - * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters. + * @brief Set the division ratio between the timer clock and the sampling clock used by the dead-time generators + * (when supported) and the digital filters. * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check * whether or not the clock division feature is supported by the timer * instance. @@ -2166,7 +2237,8 @@ __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDi } /** - * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time generators (when supported) and the digital filters. + * @brief Get the actual division ratio between the timer clock and the sampling clock used by the dead-time + * generators (when supported) and the digital filters. * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check * whether or not the clock division feature is supported by the timer * instance. @@ -2257,7 +2329,8 @@ __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(TIM_TypeDef *TIMx) * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check * whether or not a timer instance supports a 32 bits counter. * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter - * In case dithering is activated,macro __LL_TIM_CALC_ARR_DITHER can be used instead, to calculate the AutoReload parameter. + * In case dithering is activated,macro __LL_TIM_CALC_ARR_DITHER can be used instead, to calculate the AutoReload + * parameter. * @rmtoll ARR ARR LL_TIM_SetAutoReload * @param TIMx Timer instance * @param AutoReload between Min_Data=0 and Max_Data=65535 @@ -2312,7 +2385,8 @@ __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(TIM_TypeDef *TIMx) /** * @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter register (bit 31). - * @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read in an atomic way. + * @note This allows both the counter value and a potential roll-over condition signalled by the UIFCPY flag to be read + * in an atomic way. * @rmtoll CR1 UIFREMAP LL_TIM_EnableUIFRemap * @param TIMx Timer instance * @retval None @@ -2345,7 +2419,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(uint32_t Counter) /** * @brief Enable dithering. - * @note Macro @ref IS_TIM_DITHERING_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_DITHERING_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides dithering. * @rmtoll CR1 DITHEN LL_TIM_EnableDithering * @param TIMx Timer instance @@ -2358,7 +2432,7 @@ __STATIC_INLINE void LL_TIM_EnableDithering(TIM_TypeDef *TIMx) /** * @brief Disable dithering. - * @note Macro @ref IS_TIM_DITHERING_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_DITHERING_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides dithering. * @rmtoll CR1 DITHEN LL_TIM_DisableDithering * @param TIMx Timer instance @@ -2664,7 +2738,7 @@ __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint { uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); - MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); + MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT_TAB_OCxx[iChannel]); } /** @@ -2705,7 +2779,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(TIM_TypeDef *TIMx, uint32_t Channel) { uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); - return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); + return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT_TAB_OCxx[iChannel]); } /** @@ -3091,7 +3165,8 @@ __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(TIM_TypeDef *TIMx, uint32_t Ch } /** - * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of the Ocx and OCxN signals). + * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal and the rising edge of + * the Ocx and OCxN signals). * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not * dead-time insertion feature is supported by a timer instance. * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter @@ -3380,7 +3455,7 @@ __STATIC_INLINE uint32_t LL_TIM_OC_GetPulseWidthPrescaler(TIM_TypeDef *TIMx) */ __STATIC_INLINE void LL_TIM_OC_SetPulseWidth(TIM_TypeDef *TIMx, uint32_t PulseWidth) { - MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth); + MODIFY_REG(TIMx->ECR, TIM_ECR_PW, PulseWidth << TIM_ECR_PW_Pos); } /** @@ -3444,7 +3519,8 @@ __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint3 uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iChannel])); MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), - ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) << SHIFT_TAB_ICxx[iChannel]); + ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S)) \ + << SHIFT_TAB_ICxx[iChannel]); MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]); } @@ -4703,7 +4779,7 @@ __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint3 } /** * @brief Enable asymmetrical deadtime. - * @note Macro @ref IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides asymmetrical deadtime. * @rmtoll DTR2 DTAE LL_TIM_EnableAsymmetricalDeadTime * @param TIMx Timer instance @@ -4716,7 +4792,7 @@ __STATIC_INLINE void LL_TIM_EnableAsymmetricalDeadTime(TIM_TypeDef *TIMx) /** * @brief Disable asymmetrical dead-time. - * @note Macro @ref IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides asymmetrical deadtime. * @rmtoll DTR2 DTAE LL_TIM_DisableAsymmetricalDeadTime * @param TIMx Timer instance @@ -4741,7 +4817,8 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledAsymmetricalDeadTime(TIM_TypeDef *TIMx) } /** - * @brief Set the falling edge dead-time delay (delay inserted between the falling edge of the OCxREF signal and the rising edge of OCxN signals). + * @brief Set the falling edge dead-time delay (delay inserted between the falling edge of the OCxREF signal and the + * rising edge of OCxN signals). * @note Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(TIMx) can be used to check whether or not * asymmetrical dead-time insertion feature is supported by a timer instance. * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter @@ -4758,7 +4835,8 @@ __STATIC_INLINE void LL_TIM_SetFallingDeadTime(TIM_TypeDef *TIMx, uint32_t DeadT } /** - * @brief Get the falling edge dead-time delay (delay inserted between the falling edge of the OCxREF signal and the rising edge of OCxN signals). + * @brief Get the falling edge dead-time delay (delay inserted between the falling edge of the OCxREF signal and + * the rising edge of OCxN signals). * @note Macro IS_TIM_DEADTIME_ASYMMETRICAL_INSTANCE(TIMx) can be used to check whether or not * asymmetrical dead-time insertion feature is supported by a timer instance. * @note This bit-field can not be modified as long as LOCK level 1, 2 or 3 has been programmed @@ -4774,7 +4852,7 @@ __STATIC_INLINE uint32_t LL_TIM_GetFallingDeadTime(TIM_TypeDef *TIMx) /** * @brief Enable deadtime preload. - * @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides deadtime preload. * @rmtoll DTR2 DTPE LL_TIM_EnableDeadTimePreload * @param TIMx Timer instance @@ -4787,7 +4865,7 @@ __STATIC_INLINE void LL_TIM_EnableDeadTimePreload(TIM_TypeDef *TIMx) /** * @brief Disable dead-time preload. - * @note Macro @ref IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides deadtime preload. * @rmtoll DTR2 DTPE LL_TIM_DisableDeadTimePreload * @param TIMx Timer instance @@ -5317,9 +5395,6 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledHSE32(TIM_TypeDef *TIMx) { return ((READ_BIT(TIMx->OR, TIM_OR_HSE32EN) == (TIM_OR_HSE32EN)) ? 1UL : 0UL); } -/** - * @} - */ /** * @} @@ -5617,7 +5692,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set (Capture/Compare 1 interrupt is pending). + * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set + * (Capture/Compare 1 interrupt is pending). * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -5639,7 +5715,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set (Capture/Compare 2 over-capture interrupt is pending). + * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set + * (Capture/Compare 2 over-capture interrupt is pending). * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -5661,7 +5738,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set (Capture/Compare 3 over-capture interrupt is pending). + * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set + * (Capture/Compare 3 over-capture interrupt is pending). * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -5683,7 +5761,8 @@ __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) } /** - * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set (Capture/Compare 4 over-capture interrupt is pending). + * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set + * (Capture/Compare 4 over-capture interrupt is pending). * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR * @param TIMx Timer instance * @retval State of bit (1 or 0). @@ -5769,7 +5848,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_IERR(TIM_TypeDef *TIMx) /** * @brief Clear the direction change interrupt flag (DIRF). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll SR DIRF LL_TIM_ClearFlag_DIR * @param TIMx Timer instance @@ -5782,7 +5861,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_DIR(TIM_TypeDef *TIMx) /** * @brief Indicate whether direction change interrupt flag (DIRF) is set (direction change interrupt is pending). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll SR DIRF LL_TIM_IsActiveFlag_DIR * @param TIMx Timer instance @@ -5795,7 +5874,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_DIR(TIM_TypeDef *TIMx) /** * @brief Clear the index interrupt flag (IDXF). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll SR IDXF LL_TIM_ClearFlag_IDX * @param TIMx Timer instance @@ -5808,7 +5887,7 @@ __STATIC_INLINE void LL_TIM_ClearFlag_IDX(TIM_TypeDef *TIMx) /** * @brief Indicate whether index interrupt flag (IDXF) is set (index interrupt is pending). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll SR IDXF LL_TIM_IsActiveFlag_IDX * @param TIMx Timer instance @@ -6169,7 +6248,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IERR(TIM_TypeDef *TIMx) /** * @brief Enable direction change interrupt (DIRIE). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll DIER DIRIE LL_TIM_EnableIT_DIR * @param TIMx Timer instance @@ -6182,7 +6261,7 @@ __STATIC_INLINE void LL_TIM_EnableIT_DIR(TIM_TypeDef *TIMx) /** * @brief Disable direction change interrupt (DIRIE). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll DIER DIRIE LL_TIM_DisableIT_DIR * @param TIMx Timer instance @@ -6195,7 +6274,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_DIR(TIM_TypeDef *TIMx) /** * @brief Indicates whether the direction change interrupt (DIRIE) is enabled. - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll DIER DIRIE LL_TIM_IsEnabledIT_DIR * @param TIMx Timer instance @@ -6208,7 +6287,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_DIR(TIM_TypeDef *TIMx) /** * @brief Enable index interrupt (IDXIE). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll DIER IDXIE LL_TIM_EnableIT_IDX * @param TIMx Timer instance @@ -6221,7 +6300,7 @@ __STATIC_INLINE void LL_TIM_EnableIT_IDX(TIM_TypeDef *TIMx) /** * @brief Disable index interrupt (IDXIE). - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll DIER IDXIE LL_TIM_DisableIT_IDX * @param TIMx Timer instance @@ -6234,7 +6313,7 @@ __STATIC_INLINE void LL_TIM_DisableIT_IDX(TIM_TypeDef *TIMx) /** * @brief Indicates whether the index interrupt (IDXIE) is enabled. - * @note Macro @ref IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not + * @note Macro IS_TIM_FUNCTINONAL_ENCODER_INTERRUPT_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides encoder interrupt management. * @rmtoll DIER IDXIE LL_TIM_IsEnabledIT_IDX * @param TIMx Timer instance @@ -6249,7 +6328,7 @@ __STATIC_INLINE uint32_t LL_TIM_IsEnabledIT_IDX(TIM_TypeDef *TIMx) * @} */ -/** @defgroup TIM_LL_EF_DMA_Management DMA-Management +/** @defgroup TIM_LL_EF_DMA_Management DMA Management * @{ */ /** @@ -6635,4 +6714,3 @@ ErrorStatus LL_TIM_BDTR_Init(TIM_TypeDef *TIMx, LL_TIM_BDTR_InitTypeDef *TIM_BDT #endif #endif /* __STM32G4xx_LL_TIM_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_ucpd.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_ucpd.h index f0fa547..472dc93 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_ucpd.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_ucpd.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2018 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -55,22 +54,28 @@ typedef struct { uint32_t psc_ucpdclk; /*!< Specify the prescaler for the UCPD clock. This parameter can be a value of @ref UCPD_LL_EC_PSC. - This feature can be modified afterwards using unitary function @ref LL_UCPD_SetPSCClk(). */ + This feature can be modified afterwards using function @ref LL_UCPD_SetPSCClk(). + */ - uint32_t transwin; /*!< Specify the number of cycles (minus 1) of the half bit clock (see HBITCLKDIV) to achieve a legal - tTransitionWindow (set according to peripheral clock to define an interval of between 12 and 20 us) + uint32_t transwin; /*!< Specify the number of cycles (minus 1) of the half bit clock (see HBITCLKDIV) + to achieve a legal tTransitionWindow (set according to peripheral clock to define + an interval of between 12 and 20 us). This parameter can be a value between Min_Data=0x1 and Max_Data=0x1F - This value can be modified afterwards using unitary function @ref LL_UCPD_SetTransWin(). */ + This value can be modified afterwards using function @ref LL_UCPD_SetTransWin(). + */ - uint32_t IfrGap; /*!< Specify the definition of the clock divider (minus 1) in order to generate tInterframeGap - from the peripheral clock. + uint32_t IfrGap; /*!< Specify the definition of the clock divider (minus 1) in order to generate + tInterframeGap from the peripheral clock. This parameter can be a value between Min_Data=0x1 and Max_Data=0x1F - This feature can be modified afterwards using unitary function @ref LL_UCPD_SetIfrGap(). */ + This feature can be modified afterwards using function @ref LL_UCPD_SetIfrGap(). + */ - uint32_t HbitClockDiv; /*!< Specify the number of cycles (minus one) at UCPD peripheral for a half bit clock e.g. program 3 - for a bit clock that takes 8 cycles of the peripheral clock "UCPD1_CLK".. + uint32_t HbitClockDiv; /*!< Specify the number of cycles (minus one) at UCPD peripheral for a half bit clock + e.g. program 3 for a bit clock that takes 8 cycles of the peripheral clock : + "UCPD1_CLK". This parameter can be a value between Min_Data=0x0 and Max_Data=0x3F. - This feature can be modified afterwards using unitary function @ref LL_UCPD_SetHbitClockDiv(). */ + This feature can be modified using function @ref LL_UCPD_SetHbitClockDiv(). + */ } LL_UCPD_InitTypeDef; @@ -130,6 +135,7 @@ typedef struct #define LL_UCPD_IMR_TYPECEVT1 UCPD_IMR_TYPECEVT1IE /*!< Enable Type C voltage level event on CC1 */ #define LL_UCPD_IMR_TYPECEVT2 UCPD_IMR_TYPECEVT2IE /*!< Enable Type C voltage level event on CC2 */ #define LL_UCPD_IMR_FRSEVT UCPD_IMR_FRSEVTIE /*!< Enable fast Role Swap detection event */ + /** * @} */ @@ -360,7 +366,7 @@ __STATIC_INLINE void LL_UCPD_Disable(UCPD_TypeDef *UCPDx) * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnabled(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnabled(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_UCPDEN) == (UCPD_CFG1_UCPDEN)) ? 1UL : 0UL); } @@ -669,7 +675,7 @@ __STATIC_INLINE void LL_UCPD_SetSRCRole(UCPD_TypeDef *UCPDx) * @arg @ref LL_UCPD_ROLE_SNK * @arg @ref LL_UCPD_ROLE_SRC */ -__STATIC_INLINE uint32_t LL_UCPD_GetRole(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_GetRole(UCPD_TypeDef const *const UCPDx) { return (uint32_t)(READ_BIT(UCPDx->CR, UCPD_CR_ANAMODE)); } @@ -1121,7 +1127,7 @@ __STATIC_INLINE void LL_UCPD_DisableIT_TxIS(UCPD_TypeDef *UCPDx) * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_FRS(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_FRS(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_FRSEVTIE) == UCPD_IMR_FRSEVTIE) ? 1UL : 0UL); } @@ -1132,7 +1138,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_FRS(UCPD_TypeDef const * const UCPDx * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TypeCEventCC2(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TypeCEventCC2(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TYPECEVT2IE) == UCPD_IMR_TYPECEVT2IE) ? 1UL : 0UL); } @@ -1143,7 +1149,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TypeCEventCC2(UCPD_TypeDef const * c * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TypeCEventCC1(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TypeCEventCC1(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TYPECEVT1IE) == UCPD_IMR_TYPECEVT1IE) ? 1UL : 0UL); } @@ -1154,7 +1160,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TypeCEventCC1(UCPD_TypeDef const * c * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxMsgEnd(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxMsgEnd(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_RXMSGENDIE) == UCPD_IMR_RXMSGENDIE) ? 1UL : 0UL); } @@ -1165,7 +1171,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxMsgEnd(UCPD_TypeDef const * const * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxOvr(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxOvr(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_RXOVRIE) == UCPD_IMR_RXOVRIE) ? 1UL : 0UL); } @@ -1176,7 +1182,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxOvr(UCPD_TypeDef const * const UCP * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxHRST(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxHRST(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_RXHRSTDETIE) == UCPD_IMR_RXHRSTDETIE) ? 1UL : 0UL); } @@ -1187,7 +1193,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxHRST(UCPD_TypeDef const * const UC * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxOrderSet(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxOrderSet(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_RXORDDETIE) == UCPD_IMR_RXORDDETIE) ? 1UL : 0UL); } @@ -1198,7 +1204,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxOrderSet(UCPD_TypeDef const * cons * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxNE(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxNE(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_RXNEIE) == UCPD_IMR_RXNEIE) ? 1UL : 0UL); } @@ -1209,7 +1215,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_RxNE(UCPD_TypeDef const * const UCPD * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxUND(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxUND(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TXUNDIE) == UCPD_IMR_TXUNDIE) ? 1UL : 0UL); } @@ -1220,7 +1226,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxUND(UCPD_TypeDef const * const UCP * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxHRSTSENT(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxHRSTSENT(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_HRSTSENTIE) == UCPD_IMR_HRSTSENTIE) ? 1UL : 0UL); } @@ -1231,7 +1237,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxHRSTSENT(UCPD_TypeDef const * cons * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxHRSTDISC(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxHRSTDISC(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_HRSTDISCIE) == UCPD_IMR_HRSTDISCIE) ? 1UL : 0UL); } @@ -1242,7 +1248,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxHRSTDISC(UCPD_TypeDef const * cons * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGABT(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGABT(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TXMSGABTIE) == UCPD_IMR_TXMSGABTIE) ? 1UL : 0UL); } @@ -1253,7 +1259,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGABT(UCPD_TypeDef const * const * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGSENT(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGSENT(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TXMSGSENTIE) == UCPD_IMR_TXMSGSENTIE) ? 1UL : 0UL); } @@ -1264,7 +1270,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGSENT(UCPD_TypeDef const * const * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGDISC(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGDISC(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TXMSGDISCIE) == UCPD_IMR_TXMSGDISCIE) ? 1UL : 0UL); } @@ -1275,7 +1281,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxMSGDISC(UCPD_TypeDef const * const * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxIS(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxIS(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->IMR, UCPD_IMR_TXISIE) == UCPD_IMR_TXISIE) ? 1UL : 0UL); } @@ -1287,6 +1293,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnableIT_TxIS(UCPD_TypeDef const * const UCPD /** @defgroup UCPD_LL_EF_IT_Clear Interrupt Clear * @{ */ + /** * @brief Clear FRS interrupt * @rmtoll ICR FRSEVTIE LL_UCPD_ClearFlag_FRS @@ -1444,7 +1451,7 @@ __STATIC_INLINE void LL_UCPD_ClearFlag_TxMSGDISC(UCPD_TypeDef *UCPDx) * @param UCPDx UCPD Instance * @retval None */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_FRS(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_FRS(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_FRSEVT) == UCPD_SR_FRSEVT) ? 1UL : 0UL); } @@ -1455,7 +1462,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_FRS(UCPD_TypeDef const * const UCP * @param UCPDx UCPD Instance * @retval None */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TypeCEventCC2(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TypeCEventCC2(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TYPECEVT2) == UCPD_SR_TYPECEVT2) ? 1UL : 0UL); } @@ -1466,7 +1473,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TypeCEventCC2(UCPD_TypeDef const * * @param UCPDx UCPD Instance * @retval None */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TypeCEventCC1(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TypeCEventCC1(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TYPECEVT1) == UCPD_SR_TYPECEVT1) ? 1UL : 0UL); } @@ -1477,7 +1484,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TypeCEventCC1(UCPD_TypeDef const * * @param UCPDx UCPD Instance * @retval None */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxMsgEnd(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxMsgEnd(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_RXMSGEND) == UCPD_SR_RXMSGEND) ? 1UL : 0UL); } @@ -1488,7 +1495,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxMsgEnd(UCPD_TypeDef const * cons * @param UCPDx UCPD Instance * @retval None */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxOvr(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxOvr(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_RXOVR) == UCPD_SR_RXOVR) ? 1UL : 0UL); } @@ -1499,7 +1506,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxOvr(UCPD_TypeDef const * const U * @param UCPDx UCPD Instance * @retval None */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxHRST(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxHRST(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_RXHRSTDET) == UCPD_SR_RXHRSTDET) ? 1UL : 0UL); } @@ -1510,7 +1517,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxHRST(UCPD_TypeDef const * const * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxOrderSet(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxOrderSet(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_RXORDDET) == UCPD_SR_RXORDDET) ? 1UL : 0UL); } @@ -1521,7 +1528,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxOrderSet(UCPD_TypeDef const * co * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxNE(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxNE(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_RXNE) == UCPD_SR_RXNE) ? 1UL : 0UL); } @@ -1532,7 +1539,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_RxNE(UCPD_TypeDef const * const UC * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxUND(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxUND(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TXUND) == UCPD_SR_TXUND) ? 1UL : 0UL); } @@ -1543,7 +1550,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxUND(UCPD_TypeDef const * const U * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxHRSTSENT(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxHRSTSENT(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_HRSTSENT) == UCPD_SR_HRSTSENT) ? 1UL : 0UL); } @@ -1554,7 +1561,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxHRSTSENT(UCPD_TypeDef const * co * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxHRSTDISC(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxHRSTDISC(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_HRSTDISC) == UCPD_SR_HRSTDISC) ? 1UL : 0UL); } @@ -1565,7 +1572,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxHRSTDISC(UCPD_TypeDef const * co * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGABT(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGABT(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TXMSGABT) == UCPD_SR_TXMSGABT) ? 1UL : 0UL); } @@ -1576,7 +1583,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGABT(UCPD_TypeDef const * cons * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGSENT(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGSENT(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TXMSGSENT) == UCPD_SR_TXMSGSENT) ? 1UL : 0UL); } @@ -1587,7 +1594,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGSENT(UCPD_TypeDef const * con * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGDISC(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGDISC(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TXMSGDISC) == UCPD_SR_TXMSGDISC) ? 1UL : 0UL); } @@ -1598,7 +1605,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxMSGDISC(UCPD_TypeDef const * con * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxIS(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxIS(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->SR, UCPD_SR_TXIS) == UCPD_SR_TXIS) ? 1UL : 0UL); } @@ -1609,7 +1616,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsActiveFlag_TxIS(UCPD_TypeDef const * const UC * @param UCPDx UCPD Instance * @retval val */ -__STATIC_INLINE uint32_t LL_UCPD_GetTypeCVstateCC2(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_GetTypeCVstateCC2(UCPD_TypeDef const *const UCPDx) { return UCPDx->SR & UCPD_SR_TYPEC_VSTATE_CC2; } @@ -1620,7 +1627,7 @@ __STATIC_INLINE uint32_t LL_UCPD_GetTypeCVstateCC2(UCPD_TypeDef const * const UC * @param UCPDx UCPD Instance * @retval val */ -__STATIC_INLINE uint32_t LL_UCPD_GetTypeCVstateCC1(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_GetTypeCVstateCC1(UCPD_TypeDef const *const UCPDx) { return UCPDx->SR & UCPD_SR_TYPEC_VSTATE_CC1; } @@ -1684,7 +1691,7 @@ __STATIC_INLINE void LL_UCPD_TxDMADisable(UCPD_TypeDef *UCPDx) * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnabledTxDMA(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnabledTxDMA(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_TXDMAEN) == (UCPD_CFG1_TXDMAEN)) ? 1UL : 0UL); } @@ -1695,7 +1702,7 @@ __STATIC_INLINE uint32_t LL_UCPD_IsEnabledTxDMA(UCPD_TypeDef const * const UCPDx * @param UCPDx UCPD Instance * @retval State of bit (1 or 0). */ -__STATIC_INLINE uint32_t LL_UCPD_IsEnabledRxDMA(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_IsEnabledRxDMA(UCPD_TypeDef const *const UCPDx) { return ((READ_BIT(UCPDx->CFG1, UCPD_CFG1_RXDMAEN) == (UCPD_CFG1_RXDMAEN)) ? 1UL : 0UL); } @@ -1765,7 +1772,7 @@ __STATIC_INLINE void LL_UCPD_WriteData(UCPD_TypeDef *UCPDx, uint8_t Data) * @arg @ref LL_UCPD_RXORDSET_SOPEXT1 * @arg @ref LL_UCPD_RXORDSET_SOPEXT2 */ -__STATIC_INLINE uint32_t LL_UCPD_ReadRxOrderSet(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_ReadRxOrderSet(UCPD_TypeDef const *const UCPDx) { return READ_BIT(UCPDx->RX_ORDSET, UCPD_RX_ORDSET_RXORDSET); } @@ -1776,7 +1783,7 @@ __STATIC_INLINE uint32_t LL_UCPD_ReadRxOrderSet(UCPD_TypeDef const * const UCPDx * @param UCPDx UCPD Instance * @retval RXPaysize. */ -__STATIC_INLINE uint32_t LL_UCPD_ReadRxPaySize(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_ReadRxPaySize(UCPD_TypeDef const *const UCPDx) { return READ_BIT(UCPDx->TX_PAYSZ, UCPD_RX_PAYSZ_RXPAYSZ); } @@ -1787,7 +1794,7 @@ __STATIC_INLINE uint32_t LL_UCPD_ReadRxPaySize(UCPD_TypeDef const * const UCPDx) * @param UCPDx UCPD Instance * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF */ -__STATIC_INLINE uint32_t LL_UCPD_ReadData(UCPD_TypeDef const * const UCPDx) +__STATIC_INLINE uint32_t LL_UCPD_ReadData(UCPD_TypeDef const *const UCPDx) { return READ_REG(UCPDx->RXDR); } @@ -1854,4 +1861,3 @@ void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct); #endif /* STM32G4xx_LL_UCPD_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h index 6892aa5..f15e11e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usart.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -712,7 +711,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledFIFO(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_SetTXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold) { - MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); + ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); } /** @@ -751,7 +750,7 @@ __STATIC_INLINE uint32_t LL_USART_GetTXFIFOThreshold(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_SetRXFIFOThreshold(USART_TypeDef *USARTx, uint32_t Threshold) { - MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); + ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); } /** @@ -798,8 +797,8 @@ __STATIC_INLINE uint32_t LL_USART_GetRXFIFOThreshold(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_ConfigFIFOsThreshold(USART_TypeDef *USARTx, uint32_t TXThreshold, uint32_t RXThreshold) { - MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | - (RXThreshold << USART_CR3_RXFTCFG_Pos)); + ATOMIC_MODIFY_REG(USARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | + (RXThreshold << USART_CR3_RXFTCFG_Pos)); } /** @@ -814,7 +813,7 @@ __STATIC_INLINE void LL_USART_ConfigFIFOsThreshold(USART_TypeDef *USARTx, uint32 */ __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_UESM); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM); } /** @@ -828,7 +827,7 @@ __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableInStopMode(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_UESM); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_UESM); } /** @@ -852,7 +851,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledInStopMode(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_RE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE); } /** @@ -863,7 +862,7 @@ __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_RE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RE); } /** @@ -874,7 +873,7 @@ __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_TE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TE); } /** @@ -885,7 +884,7 @@ __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_TE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE); } /** @@ -903,7 +902,7 @@ __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection) { - MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); + ATOMIC_MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); } /** @@ -1022,7 +1021,7 @@ __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_MME); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME); } /** @@ -1033,7 +1032,7 @@ __STATIC_INLINE void LL_USART_EnableMuteMode(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableMuteMode(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_MME); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_MME); } /** @@ -2094,7 +2093,7 @@ __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) { - MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue); + MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue); } /** @@ -2241,7 +2240,7 @@ __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(USART_TypeDef *USAR */ __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue) { - MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_PSC, (uint16_t)PrescalerValue); + MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, (uint16_t)PrescalerValue); } /** @@ -2270,7 +2269,7 @@ __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime) { - MODIFY_REG(USARTx->GTPR, (uint16_t)USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos)); + MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, (uint16_t)(GuardTime << USART_GTPR_GT_Pos)); } /** @@ -3459,7 +3458,7 @@ __STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE); } /* Legacy define */ @@ -3475,7 +3474,7 @@ __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_RXNE_RXFNE(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); } /** @@ -3486,7 +3485,7 @@ __STATIC_INLINE void LL_USART_EnableIT_RXNE_RXFNE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); } /* Legacy define */ @@ -3502,7 +3501,7 @@ __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_TXE_TXFNF(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE); } /** @@ -3513,7 +3512,7 @@ __STATIC_INLINE void LL_USART_EnableIT_TXE_TXFNF(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_PEIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE); } /** @@ -3524,7 +3523,7 @@ __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_CMIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE); } /** @@ -3535,7 +3534,7 @@ __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_RTOIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE); } /** @@ -3548,7 +3547,7 @@ __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_EOBIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE); } /** @@ -3561,7 +3560,7 @@ __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_TXFE(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_TXFEIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXFEIE); } /** @@ -3572,7 +3571,7 @@ __STATIC_INLINE void LL_USART_EnableIT_TXFE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_RXFF(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR1, USART_CR1_RXFFIE); + ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXFFIE); } /** @@ -3600,7 +3599,7 @@ __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_EIE); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE); } /** @@ -3613,7 +3612,7 @@ __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_CTSIE); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE); } /** @@ -3626,7 +3625,7 @@ __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_WUFIE); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE); } /** @@ -3639,7 +3638,7 @@ __STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_TXFT(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_TXFTIE); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TXFTIE); } /** @@ -3652,7 +3651,7 @@ __STATIC_INLINE void LL_USART_EnableIT_TXFT(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE); } /** @@ -3665,7 +3664,7 @@ __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableIT_RXFT(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_RXFTIE); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_RXFTIE); } /** @@ -3676,7 +3675,7 @@ __STATIC_INLINE void LL_USART_EnableIT_RXFT(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE); } /* Legacy define */ @@ -3692,7 +3691,7 @@ __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_RXNE_RXFNE(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); } /** @@ -3703,7 +3702,7 @@ __STATIC_INLINE void LL_USART_DisableIT_RXNE_RXFNE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE); } /* Legacy define */ @@ -3719,7 +3718,7 @@ __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_TXE_TXFNF(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE_TXFNFIE); } /** @@ -3730,7 +3729,7 @@ __STATIC_INLINE void LL_USART_DisableIT_TXE_TXFNF(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE); } /** @@ -3741,7 +3740,7 @@ __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE); } /** @@ -3752,7 +3751,7 @@ __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE); } /** @@ -3765,7 +3764,7 @@ __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE); } /** @@ -3778,7 +3777,7 @@ __STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_TXFE(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_TXFEIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXFEIE); } /** @@ -3791,7 +3790,7 @@ __STATIC_INLINE void LL_USART_DisableIT_TXFE(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_RXFF(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR1, USART_CR1_RXFFIE); + ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXFFIE); } /** @@ -3819,7 +3818,7 @@ __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE); } /** @@ -3832,7 +3831,7 @@ __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE); } /** @@ -3845,7 +3844,7 @@ __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE); } /** @@ -3858,7 +3857,7 @@ __STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_TXFT(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TXFTIE); } /** @@ -3871,7 +3870,7 @@ __STATIC_INLINE void LL_USART_DisableIT_TXFT(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE); } /** @@ -3884,7 +3883,7 @@ __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableIT_RXFT(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_RXFTIE); } /** @@ -4118,7 +4117,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXFT(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_DMAR); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR); } /** @@ -4129,7 +4128,7 @@ __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR); } /** @@ -4151,7 +4150,7 @@ __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) { - SET_BIT(USARTx->CR3, USART_CR3_DMAT); + ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT); } /** @@ -4162,7 +4161,7 @@ __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx) */ __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx) { - CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); + ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT); } /** @@ -4400,4 +4399,3 @@ void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitS #endif /* STM32G4xx_LL_USART_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h index 0391f5b..1675cc6 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -23,7 +22,7 @@ #ifdef __cplusplus extern "C" { -#endif +#endif /* __cplusplus */ /* Includes ------------------------------------------------------------------*/ #include "stm32g4xx_hal_def.h" @@ -60,12 +59,13 @@ typedef struct This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ uint32_t speed; /*!< USB Core speed. - This parameter can be any value of @ref USB_Core_Speed */ + This parameter can be any value of @ref PCD_Speed/HCD_Speed + (HCD_SPEED_xxx, HCD_SPEED_xxx) */ uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ uint32_t phy_itface; /*!< Select the used PHY interface. - This parameter can be any value of @ref USB_Core_PHY */ + This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module */ uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ @@ -167,6 +167,10 @@ typedef struct #define PMA_ACCESS 1U #define EP_ADDR_MSK 0x7U + +#ifndef USE_USB_DOUBLE_BUFFER +#define USE_USB_DOUBLE_BUFFER 1U +#endif /* USE_USB_DOUBLE_BUFFER */ /** * @} */ @@ -194,7 +198,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep); HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep); HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep); -#endif +#endif /* defined (HAL_PCD_MODULE_ENABLED) */ HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address); HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx); @@ -229,9 +233,7 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, #ifdef __cplusplus } -#endif +#endif /* __cplusplus */ #endif /* STM32G4xx_LL_USB_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h index f1d6281..6a12eb7 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_utils.h @@ -3,6 +3,17 @@ * @file stm32g4xx_ll_utils.h * @author MCD Application Team * @brief Header file of UTILS LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -15,18 +26,6 @@ (+) PLL configuration functions @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Define to prevent recursive inclusion -------------------------------------*/ @@ -316,4 +315,3 @@ ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypa #endif /* STM32G4xx_LL_UTILS_H */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_wwdg.h b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_wwdg.h index 191112f..f6e903b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_wwdg.h +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_wwdg.h @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -327,5 +326,3 @@ __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx) #endif #endif /* STM32G4xx_LL_WWDG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt b/codice/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt new file mode 100644 index 0000000..b40364c --- /dev/null +++ b/codice/Drivers/STM32G4xx_HAL_Driver/LICENSE.txt @@ -0,0 +1,6 @@ +This software component is provided to you as part of a software package and +applicable license terms are in the Package_license file. If you received this +software component outside of a package or without applicable license terms, +the terms of the BSD-3-Clause license shall apply. +You may obtain a copy of the BSD-3-Clause at: +https://opensource.org/licenses/BSD-3-Clause diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c index ebd6782..3d9e92f 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal.c @@ -4,7 +4,17 @@ * @author MCD Application Team * @brief HAL module driver. * This is the common part of the HAL initialization + ****************************************************************************** + * @attention * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -19,17 +29,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -49,11 +48,11 @@ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /** - * @brief STM32G4xx HAL Driver version number V1.2.1 + * @brief STM32G4xx HAL Driver version number V1.2.2 */ #define __STM32G4xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ #define __STM32G4xx_HAL_VERSION_SUB1 (0x02U) /*!< [23:16] sub1 version */ -#define __STM32G4xx_HAL_VERSION_SUB2 (0x01U) /*!< [15:8] sub2 version */ +#define __STM32G4xx_HAL_VERSION_SUB2 (0x02U) /*!< [15:8] sub2 version */ #define __STM32G4xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32G4xx_HAL_VERSION ((__STM32G4xx_HAL_VERSION_MAIN << 24U)\ |(__STM32G4xx_HAL_VERSION_SUB1 << 16U)\ @@ -771,4 +770,3 @@ void HAL_SYSCFG_CCMSRAM_WriteProtectionEnable(uint32_t Page) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c index b9ab05e..47bfcbc 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c @@ -6,19 +6,22 @@ * functionalities of the Analog to Digital Converter (ADC) * peripheral: * + Initialization and de-initialization functions - * ++ Initialization and Configuration of ADC - * + Operation functions - * ++ Start, stop, get result of conversions of regular - * group, using 3 possible modes: polling, interruption or DMA. - * + Control functions - * ++ Channels configuration on regular group - * ++ Analog Watchdog configuration - * + State functions - * ++ ADC state machine management - * ++ Interrupts and flags management + * + Peripheral Control functions + * + Peripheral State functions * Other functions (extended functions) are available in file * "stm32g4xx_hal_adc_ex.c". * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### ADC peripheral features ##### @@ -219,11 +222,11 @@ The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1, allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_ADC_RegisterCallback() + Use Functions HAL_ADC_RegisterCallback() to register an interrupt callback. [..] - Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks: + Function HAL_ADC_RegisterCallback() allows to register following callbacks: (+) ConvCpltCallback : ADC conversion complete callback (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback @@ -239,11 +242,11 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default + Use function HAL_ADC_UnRegisterCallback to reset a callback to the default weak function. [..] - @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) ConvCpltCallback : ADC conversion complete callback @@ -259,27 +262,27 @@ (+) MspDeInitCallback : ADC Msp DeInit callback [..] - By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET + By default, after the HAL_ADC_Init() and when the state is HAL_ADC_STATE_RESET all callbacks are set to the corresponding weak functions: - examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback(). + examples HAL_ADC_ConvCpltCallback(), HAL_ADC_ErrorCallback(). Exception done for MspInit and MspDeInit functions that are - reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when + reset to the legacy weak functions in the HAL_ADC_Init()/ HAL_ADC_DeInit() only when these callbacks are null (not registered beforehand). [..] - If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() + If MspInit or MspDeInit are not null, the HAL_ADC_Init()/ HAL_ADC_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. [..] - Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only. + Callbacks can be registered/unregistered in HAL_ADC_STATE_READY state only. Exception done MspInit/MspDeInit functions that can be registered/unregistered - in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state, + in HAL_ADC_STATE_READY or HAL_ADC_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. [..] Then, the user first registers the MspInit/MspDeInit user callbacks - using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit() - or @ref HAL_ADC_Init() function. + using HAL_ADC_RegisterCallback() before calling HAL_ADC_DeInit() + or HAL_ADC_Init() function. [..] When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or @@ -288,17 +291,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -2025,11 +2017,12 @@ HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, ui #if defined(ADC_MULTIMODE_SUPPORT) /* Ensure that multimode regular conversions are not enabled. */ /* Otherwise, dedicated API HAL_ADCEx_MultiModeStart_DMA() must be used. */ - if ((tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) + if ((ADC_IS_INDEPENDENT(hadc) != RESET) + || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT) || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_SIMULT) || (tmp_multimode_config == LL_ADC_MULTI_DUAL_INJ_ALTERN) ) -#endif +#endif /* ADC_MULTIMODE_SUPPORT */ { /* Enable the ADC peripheral */ tmp_hal_status = ADC_Enable(hadc); @@ -3687,5 +3680,3 @@ void ADC_DMAError(DMA_HandleTypeDef *hdma) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c index 8cc274a..c45adc4 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c @@ -5,20 +5,21 @@ * @brief This file provides firmware functions to manage the following * functionalities of the Analog to Digital Converter (ADC) * peripheral: - * + Operation functions - * ++ Start, stop, get result of conversions of ADC group injected, - * using 2 possible modes: polling, interruption. - * ++ Calibration - * +++ ADC automatic self-calibration - * +++ Calibration factors get or set - * ++ Multimode feature when available - * + Control functions - * ++ Channels configuration on ADC group injected - * + State functions - * ++ ADC group injected contexts queue management + * + Peripheral Control functions * Other functions (generic functions) are available in file * "stm32g4xx_hal_adc.c". * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim [..] (@) Sections "ADC peripheral features" and "How to use this driver" are @@ -26,17 +27,6 @@ [..] @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -2381,5 +2371,3 @@ HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c index dbad332..9f5585a 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_comp.c @@ -6,11 +6,20 @@ * This file provides firmware functions to manage the following * functionalities of the COMP peripheral: * + Initialization and de-initialization functions - * + Start/Stop operation functions in polling mode - * + Start/Stop operation functions in interrupt mode (through EXTI interrupt) * + Peripheral control functions * + Peripheral state functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ================================================================================ ##### COMP Peripheral features ##### @@ -140,18 +149,6 @@ @endverbatim ****************************************************************************** - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -314,7 +311,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) /* Note: Variable divided by 2 to compensate partially */ /* CPU processing cycles, scaling in us split to not */ /* exceed 32 bits register capacity and handle low frequency. */ - wait_loop_index = ((COMP_DELAY_VOLTAGE_SCALER_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL))); + wait_loop_index = ((COMP_DELAY_VOLTAGE_SCALER_STAB_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL)); while(wait_loop_index != 0UL) { wait_loop_index--; @@ -330,7 +327,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) /* Configure EXTI rising edge */ if((hcomp->Init.TriggerMode & COMP_EXTI_RISING) != 0UL) { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_EnableRisingTrig_32_63(exti_line); @@ -341,11 +338,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_EnableRisingTrig_0_31(exti_line); -#endif +#endif /* COMP7 */ } else { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_DisableRisingTrig_32_63(exti_line); @@ -356,13 +353,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_DisableRisingTrig_0_31(exti_line); -#endif +#endif /* COMP7 */ } /* Configure EXTI falling edge */ if((hcomp->Init.TriggerMode & COMP_EXTI_FALLING) != 0UL) { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_EnableFallingTrig_32_63(exti_line); @@ -373,11 +370,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_EnableFallingTrig_0_31(exti_line); -#endif +#endif /* COMP7 */ } else { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_DisableFallingTrig_32_63(exti_line); @@ -388,11 +385,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_DisableFallingTrig_0_31(exti_line); -#endif +#endif /* COMP7 */ } /* Clear COMP EXTI pending bit (if any) */ -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_ClearFlag_32_63(exti_line); @@ -403,12 +400,12 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_ClearFlag_0_31(exti_line); -#endif +#endif /* COMP7 */ /* Configure EXTI event mode */ if((hcomp->Init.TriggerMode & COMP_EXTI_EVENT) != 0UL) { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_EnableEvent_32_63(exti_line); @@ -419,11 +416,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_EnableEvent_0_31(exti_line); -#endif +#endif /* COMP7 */ } else { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_DisableEvent_32_63(exti_line); @@ -434,13 +431,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_DisableEvent_0_31(exti_line); -#endif +#endif /* COMP7 */ } /* Configure EXTI interrupt mode */ if((hcomp->Init.TriggerMode & COMP_EXTI_IT) != 0UL) { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_EnableIT_32_63(exti_line); @@ -451,11 +448,11 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_EnableIT_0_31(exti_line); -#endif +#endif /* COMP7 */ } else { -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_DisableIT_32_63(exti_line); @@ -466,13 +463,13 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_DisableIT_0_31(exti_line); -#endif +#endif /* COMP7 */ } } else { /* Disable EXTI event mode */ -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_DisableEvent_32_63(exti_line); @@ -483,10 +480,10 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_DisableEvent_0_31(exti_line); -#endif +#endif /* COMP7 */ /* Disable EXTI interrupt mode */ -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { LL_EXTI_DisableIT_32_63(exti_line); @@ -497,7 +494,7 @@ HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_DisableIT_0_31(exti_line); -#endif +#endif /* COMP7 */ } /* Set HAL COMP handle state */ @@ -880,7 +877,7 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp) uint32_t tmp_comp_exti_flag_set = 0UL; /* Check COMP EXTI flag */ -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if((hcomp->Instance == COMP6) || (hcomp->Instance == COMP7)) { if(LL_EXTI_IsActiveFlag_32_63(exti_line) != 0UL) @@ -900,12 +897,12 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp) { tmp_comp_exti_flag_set = 1UL; } -#endif +#endif /* COMP7 */ if(tmp_comp_exti_flag_set != 0UL) { /* Clear COMP EXTI line pending bit */ -#if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx) || defined(STM32G483xx) +#if defined(COMP7) if(tmp_comp_exti_flag_set == 2UL) { LL_EXTI_ClearFlag_32_63(exti_line); @@ -916,7 +913,7 @@ void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp) } #else LL_EXTI_ClearFlag_0_31(exti_line); -#endif +#endif /* COMP7 */ /* COMP trigger user callback */ #if (USE_HAL_COMP_REGISTER_CALLBACKS == 1) @@ -1104,5 +1101,3 @@ uint32_t HAL_COMP_GetError(COMP_HandleTypeDef *hcomp) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c index 9ae5ec9..d36cd88 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c @@ -11,7 +11,18 @@ * + IRQ handler management * + Peripheral State functions * - * @verbatim + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim ================================================================================ ##### How to use this driver ##### ================================================================================ @@ -79,9 +90,9 @@ The compilation define USE_HAL_CORDIC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Function @ref HAL_CORDIC_RegisterCallback() to register an interrupt callback. + Use Function HAL_CORDIC_RegisterCallback() to register an interrupt callback. - Function @ref HAL_CORDIC_RegisterCallback() allows to register following callbacks: + Function HAL_CORDIC_RegisterCallback() allows to register following callbacks: (+) ErrorCallback : Error Callback. (+) CalculateCpltCallback : Calculate complete Callback. (+) MspInitCallback : CORDIC MspInit. @@ -89,9 +100,9 @@ This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - Use function @ref HAL_CORDIC_UnRegisterCallback() to reset a callback to the default + Use function HAL_CORDIC_UnRegisterCallback() to reset a callback to the default weak function. - @ref HAL_CORDIC_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_CORDIC_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) ErrorCallback : Error Callback. @@ -101,11 +112,11 @@ By default, after the HAL_CORDIC_Init() and when the state is HAL_CORDIC_STATE_RESET, all callbacks are set to the corresponding weak functions: - examples @ref HAL_CORDIC_ErrorCallback(), @ref HAL_CORDIC_CalculateCpltCallback(). + examples HAL_CORDIC_ErrorCallback(), HAL_CORDIC_CalculateCpltCallback(). Exception done for MspInit and MspDeInit functions that are - reset to the legacy weak function in the HAL_CORDIC_Init()/ @ref HAL_CORDIC_DeInit() only when + reset to the legacy weak function in the HAL_CORDIC_Init()/ HAL_CORDIC_DeInit() only when these callbacks are null (not registered beforehand). - if not, MspInit or MspDeInit are not null, the HAL_CORDIC_Init()/ @ref HAL_CORDIC_DeInit() + if not, MspInit or MspDeInit are not null, the HAL_CORDIC_Init()/ HAL_CORDIC_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in HAL_CORDIC_STATE_READY state only. @@ -113,7 +124,7 @@ in HAL_CORDIC_STATE_READY or HAL_CORDIC_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_CORDIC_RegisterCallback() before calling @ref HAL_CORDIC_DeInit() + using HAL_CORDIC_RegisterCallback() before calling HAL_CORDIC_DeInit() or HAL_CORDIC_Init() function. When The compilation define USE_HAL_CORDIC_REGISTER_CALLBACKS is set to 0 or @@ -121,18 +132,6 @@ are set to the corresponding weak functions. @endverbatim - * - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * ****************************************************************************** */ @@ -1352,5 +1351,3 @@ static void CORDIC_DMAError(DMA_HandleTypeDef *hdma) #endif /* HAL_CORDIC_MODULE_ENABLED */ #endif /* CORDIC */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c index daca353..d53ee2c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c @@ -8,6 +8,17 @@ * + Initialization and Configuration functions * + Peripheral Control functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -87,18 +98,6 @@ | | | 0 bit for subpriority ========================================================================================================================== - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -516,4 +515,3 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c index 8cfff44..d116f9e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc.c @@ -9,6 +9,17 @@ * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim =============================================================================== ##### How to use this driver ##### @@ -29,17 +40,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -62,8 +62,8 @@ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ /** @defgroup CRC_Private_Functions CRC Private Functions - * @{ - */ + * @{ + */ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength); static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength); /** @@ -77,8 +77,8 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3 */ /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions. - * + * @brief Initialization and Configuration functions. + * @verbatim =============================================================================== ##### Initialization and de-initialization functions ##### @@ -250,8 +250,8 @@ __weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc) */ /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions - * @brief management functions. - * + * @brief management functions. + * @verbatim =============================================================================== ##### Peripheral Control functions ##### @@ -385,8 +385,8 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t */ /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions - * @brief Peripheral State functions. - * + * @brief Peripheral State functions. + * @verbatim =============================================================================== ##### Peripheral State functions ##### @@ -418,8 +418,8 @@ HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc) */ /** @addtogroup CRC_Private_Functions - * @{ - */ + * @{ + */ /** * @brief Enter 8-bit input data to the CRC calculator. @@ -514,5 +514,3 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3 /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c index 70f0dfd..b241334 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_crc_ex.c @@ -6,6 +6,17 @@ * This file provides firmware functions to manage the extended * functionalities of the CRC peripheral. * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ================================================================================ ##### How to use this driver ##### @@ -16,17 +27,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -221,5 +221,3 @@ HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_ /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c index cf950f1..a81909c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp.c @@ -11,6 +11,17 @@ * + CRYP IRQ handler management * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -283,17 +294,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -1209,7 +1209,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u /* Check input buffer size */ assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size)); -#endif +#endif /* USE_FULL_ASSERT */ if (hcryp->State == HAL_CRYP_STATE_READY) { @@ -1309,7 +1309,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt(CRYP_HandleTypeDef *hcryp, uint32_t *Input, u /* Check input buffer size */ assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size)); -#endif +#endif /* USE_FULL_ASSERT */ if (hcryp->State == HAL_CRYP_STATE_READY) { @@ -1408,7 +1408,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input /* Check input buffer size */ assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size)); -#endif +#endif /* USE_FULL_ASSERT */ if (hcryp->State == HAL_CRYP_STATE_READY) { @@ -1518,7 +1518,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint32_t *Input /* Check input buffer size */ assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size)); -#endif +#endif /* USE_FULL_ASSERT */ if (hcryp->State == HAL_CRYP_STATE_READY) { @@ -1628,7 +1628,7 @@ HAL_StatusTypeDef HAL_CRYP_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu /* Check input buffer size */ assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size)); -#endif +#endif /* USE_FULL_ASSERT */ if (hcryp->State == HAL_CRYP_STATE_READY) { @@ -1754,7 +1754,7 @@ HAL_StatusTypeDef HAL_CRYP_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint32_t *Inpu /* Check input buffer size */ assert_param(IS_CRYP_BUFFERSIZE(algo_assert, hcryp->Init.DataWidthUnit, Size)); -#endif +#endif /* USE_FULL_ASSERT */ if (hcryp->State == HAL_CRYP_STATE_READY) { @@ -3939,6 +3939,11 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp) uint32_t npblb; uint32_t mode; uint32_t DoKeyIVConfig = 1U; /* By default, carry out peripheral Key and IV configuration */ + uint32_t headersize_in_bytes; + uint32_t tmp; + uint32_t mask[12] = {0x0U, 0xFF000000U, 0xFFFF0000U, 0xFFFFFF00U, /* 32-bit data type */ + 0x0U, 0x0000FF00U, 0x0000FFFFU, 0xFF00FFFFU, /* 16-bit data type */ + 0x0U, 0x000000FFU, 0x0000FFFFU, 0x00FFFFFFU}; /* 8-bit data type */ #if (USE_HAL_CRYP_SUSPEND_RESUME == 1U) if ((hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED) || (hcryp->Phase == CRYP_PHASE_PAYLOAD_SUSPENDED)) @@ -4028,7 +4033,16 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp) /* Enable the CRYP peripheral */ __HAL_CRYP_ENABLE(hcryp); - if (hcryp->Init.HeaderSize == 0U) /*header phase is skipped*/ + if (hcryp->Init.HeaderWidthUnit == CRYP_HEADERWIDTHUNIT_WORD) + { + headersize_in_bytes = hcryp->Init.HeaderSize * 4U; + } + else + { + headersize_in_bytes = hcryp->Init.HeaderSize; + } + + if (headersize_in_bytes == 0U) /* Header phase is skipped */ { /* Set the phase */ hcryp->Phase = CRYP_PHASE_PROCESS; @@ -4122,24 +4136,53 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp) #endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ } } - else if ((hcryp->Init.HeaderSize) < 4U) /*HeaderSize < 4 */ + /* Enter header data */ + /* Check first whether header length is small enough to enter the full header in one shot */ + else if (headersize_in_bytes <= 16U) { - /* Last block optionally pad the data with zeros*/ - for (loopcounter = 0U; loopcounter < (hcryp->Init.HeaderSize % 4U); loopcounter++) + for (loopcounter = 0U; (loopcounter < (headersize_in_bytes / 4U)); loopcounter++) { hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); hcryp->CrypHeaderCount++ ; } + /* If the header size is a multiple of words */ + if ((headersize_in_bytes % 4U) == 0U) + { + /* Pad the data with zeros to have a complete block */ + while (loopcounter < 4U) + { + hcryp->Instance->DINR = 0x0U; + loopcounter++; + } + } + else + { + /* Enter last bytes, padded with zeros */ + tmp = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); + tmp &= mask[(hcryp->Init.DataType * 2U) + (headersize_in_bytes % 4U)]; + hcryp->Instance->DINR = tmp; + hcryp->CrypHeaderCount++; + loopcounter++; + /* Pad the data with zeros to have a complete block */ while (loopcounter < 4U) { - /* pad the data with zeros to have a complete block */ hcryp->Instance->DINR = 0x0U; loopcounter++; } + } + /* Call Input transfer complete callback */ +#if (USE_HAL_CRYP_REGISTER_CALLBACKS == 1U) + /*Call registered Input complete callback*/ + hcryp->InCpltCallback(hcryp); +#else + /*Call legacy weak Input complete callback*/ + HAL_CRYP_InCpltCallback(hcryp); +#endif /* USE_HAL_CRYP_REGISTER_CALLBACKS */ } else { - /* Write the input block in the IN FIFO */ + /* Write the first input header block in the Input FIFO, + the following header data will be fed after interrupt occurrence */ hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); hcryp->CrypHeaderCount++; hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); @@ -4148,9 +4191,8 @@ static HAL_StatusTypeDef CRYP_AESCCM_Process_IT(CRYP_HandleTypeDef *hcryp) hcryp->CrypHeaderCount++; hcryp->Instance->DINR = *(uint32_t *)(hcryp->Init.Header + hcryp->CrypHeaderCount); hcryp->CrypHeaderCount++; - } - - } /* end of if (DoKeyIVConfig == 1U) */ + }/* if (hcryp->Init.HeaderSize == 0U) */ /* Header phase is skipped*/ + } /* end of if (dokeyivconfig == 1U) */ else /* Key and IV have already been configured, header has already been processed; only process here message payload */ @@ -5548,4 +5590,3 @@ static void CRYP_PhaseProcessingResume(CRYP_HandleTypeDef *hcryp) /** * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c index 90ef716..b703b1d 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cryp_ex.c @@ -9,13 +9,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -385,5 +384,3 @@ void HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c index c03fb8a..379b9de 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c @@ -11,6 +11,17 @@ * + Peripheral State and Errors functions * * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### DAC Peripheral features ##### @@ -264,7 +275,7 @@ The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback, + Use Functions HAL_DAC_RegisterCallback() to register a user callback, it allows to register following callbacks: (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. @@ -279,7 +290,7 @@ This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default + Use function HAL_DAC_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. It allows to reset following callbacks: (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1. (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1. @@ -294,12 +305,12 @@ (+) All Callbacks This function) takes as parameters the HAL peripheral handle and the Callback ID. - By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET + By default, after the HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET all callbacks are reset to the corresponding legacy weak (surcharged) functions. Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init - and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit + reset to the legacy weak (surcharged) functions in the HAL_DAC_Init + and HAL_DAC_DeInit only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_DAC_Init and HAL_DAC_DeInit keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in READY state only. @@ -307,8 +318,8 @@ in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit - or @ref HAL_DAC_Init function. + using HAL_DAC_RegisterCallback before calling HAL_DAC_DeInit + or HAL_DAC_Init function. When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available @@ -328,17 +339,6 @@ (@) You can refer to the DAC HAL driver header file for more useful macros @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * ****************************************************************************** */ @@ -669,7 +669,7 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel) HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length, uint32_t Alignment) { - HAL_StatusTypeDef status = HAL_ERROR; + HAL_StatusTypeDef status; uint32_t tmpreg = 0U; /* Check the parameters */ @@ -1059,23 +1059,23 @@ __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) */ uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel) { - uint32_t tmp = 0U; + uint32_t result; /* Check the parameters */ assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel)); if (Channel == DAC_CHANNEL_1) { - tmp = hdac->Instance->DOR1; + result = hdac->Instance->DOR1; } else { - tmp = hdac->Instance->DOR2; + result = hdac->Instance->DOR2; } /* Returns the DAC channel data output register value */ - return tmp; + return result; } /** @@ -1673,4 +1673,3 @@ void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c index 593e61a..587b97f 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c @@ -7,6 +7,17 @@ * functionalities of the DAC peripheral. * * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -52,17 +63,6 @@ at least one time after reset). @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * ****************************************************************************** */ @@ -1098,4 +1098,3 @@ void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c index 2574e3b..a96558e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma.c @@ -8,6 +8,18 @@ * + Initialization and de-initialization functions * + IO operation functions * + Peripheral State and errors functions + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -72,18 +84,6 @@ (@) You can refer to the DMA HAL driver header file for more useful macros @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -1108,4 +1108,3 @@ static void DMA_CalcDMAMUXRequestGenBaseAndMask(DMA_HandleTypeDef *hdma) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c index 52990e6..cb44db8 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dma_ex.c @@ -7,6 +7,17 @@ * functionalities of the DMA Extension peripheral: * + Extended features functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -26,18 +37,6 @@ (exception done if a given DMA is not using the DMAMUX SYNC block neither a request generator) @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -297,4 +296,3 @@ void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c index 04afa46..94af4cc 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_exti.c @@ -9,6 +9,17 @@ * + Initialization and de-initialization functions * + IO operation functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### EXTI Peripheral features ##### @@ -70,18 +81,6 @@ (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -317,6 +316,10 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT pExtiConfig->Mode |= EXTI_MODE_EVENT; } + /* Get default Trigger and GPIOSel configuration */ + pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + pExtiConfig->GPIOSel = 0x00u; + /* 2] Get trigger for configurable lines : rising */ if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) { @@ -328,10 +331,6 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT { pExtiConfig->Trigger = EXTI_TRIGGER_RISING; } - else - { - pExtiConfig->Trigger = EXTI_TRIGGER_NONE; - } /* Get falling configuration */ regaddr = (&EXTI->FTSR1 + (EXTI_CONFIG_OFFSET * offset)); @@ -351,15 +350,6 @@ HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigT regval = SYSCFG->EXTICR[linepos >> 2u]; pExtiConfig->GPIOSel = ((regval >> (SYSCFG_EXTICR1_EXTI1_Pos * ((linepos & 0x03u))))); } - else - { - pExtiConfig->GPIOSel = 0x00u; - } - } - else - { - pExtiConfig->Trigger = EXTI_TRIGGER_NONE; - pExtiConfig->GPIOSel = 0x00u; } return HAL_OK; @@ -647,4 +637,3 @@ void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c index 655eeed..4869e49 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fdcan.c @@ -10,7 +10,17 @@ * + IO operation functions * + Peripheral Configuration and Control functions * + Peripheral State and Error functions + ****************************************************************************** + * @attention * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -88,10 +98,10 @@ The compilation define USE_HAL_FDCAN_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Function @ref HAL_FDCAN_RegisterCallback() or HAL_FDCAN_RegisterXXXCallback() + Use Function HAL_FDCAN_RegisterCallback() or HAL_FDCAN_RegisterXXXCallback() to register an interrupt callback. - Function @ref HAL_FDCAN_RegisterCallback() allows to register following callbacks: + Function HAL_FDCAN_RegisterCallback() allows to register following callbacks: (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. (+) HighPriorityMessageCallback : High Priority Message Callback. (+) TimestampWraparoundCallback : Timestamp Wraparound Callback. @@ -104,14 +114,14 @@ For specific callbacks TxEventFifoCallback, RxFifo0Callback, RxFifo1Callback, TxBufferCompleteCallback, TxBufferAbortCallback and ErrorStatusCallback use dedicated - register callbacks : respectively @ref HAL_FDCAN_RegisterTxEventFifoCallback(), - @ref HAL_FDCAN_RegisterRxFifo0Callback(), @ref HAL_FDCAN_RegisterRxFifo1Callback(), - @ref HAL_FDCAN_RegisterTxBufferCompleteCallback(), @ref HAL_FDCAN_RegisterTxBufferAbortCallback() - and @ref HAL_FDCAN_RegisterErrorStatusCallback(). + register callbacks : respectively HAL_FDCAN_RegisterTxEventFifoCallback(), + HAL_FDCAN_RegisterRxFifo0Callback(), HAL_FDCAN_RegisterRxFifo1Callback(), + HAL_FDCAN_RegisterTxBufferCompleteCallback(), HAL_FDCAN_RegisterTxBufferAbortCallback() + and HAL_FDCAN_RegisterErrorStatusCallback(). - Use function @ref HAL_FDCAN_UnRegisterCallback() to reset a callback to the default + Use function HAL_FDCAN_UnRegisterCallback() to reset a callback to the default weak function. - @ref HAL_FDCAN_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_FDCAN_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) TxFifoEmptyCallback : Tx Fifo Empty Callback. @@ -124,18 +134,18 @@ For specific callbacks TxEventFifoCallback, RxFifo0Callback, RxFifo1Callback, TxBufferCompleteCallback and TxBufferAbortCallback, use dedicated - unregister callbacks : respectively @ref HAL_FDCAN_UnRegisterTxEventFifoCallback(), - @ref HAL_FDCAN_UnRegisterRxFifo0Callback(), @ref HAL_FDCAN_UnRegisterRxFifo1Callback(), - @ref HAL_FDCAN_UnRegisterTxBufferCompleteCallback(), @ref HAL_FDCAN_UnRegisterTxBufferAbortCallback() - and @ref HAL_FDCAN_UnRegisterErrorStatusCallback(). + unregister callbacks : respectively HAL_FDCAN_UnRegisterTxEventFifoCallback(), + HAL_FDCAN_UnRegisterRxFifo0Callback(), HAL_FDCAN_UnRegisterRxFifo1Callback(), + HAL_FDCAN_UnRegisterTxBufferCompleteCallback(), HAL_FDCAN_UnRegisterTxBufferAbortCallback() + and HAL_FDCAN_UnRegisterErrorStatusCallback(). - By default, after the @ref HAL_FDCAN_Init() and when the state is HAL_FDCAN_STATE_RESET, + By default, after the HAL_FDCAN_Init() and when the state is HAL_FDCAN_STATE_RESET, all callbacks are set to the corresponding weak functions: - examples @ref HAL_FDCAN_ErrorCallback(). + examples HAL_FDCAN_ErrorCallback(). Exception done for MspInit and MspDeInit functions that are - reset to the legacy weak function in the @ref HAL_FDCAN_Init()/ @ref HAL_FDCAN_DeInit() only when + reset to the legacy weak function in the HAL_FDCAN_Init()/ HAL_FDCAN_DeInit() only when these callbacks are null (not registered beforehand). - if not, MspInit or MspDeInit are not null, the @ref HAL_FDCAN_Init()/ @ref HAL_FDCAN_DeInit() + if not, MspInit or MspDeInit are not null, the HAL_FDCAN_Init()/ HAL_FDCAN_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in HAL_FDCAN_STATE_READY state only. @@ -143,8 +153,8 @@ in HAL_FDCAN_STATE_READY or HAL_FDCAN_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_FDCAN_RegisterCallback() before calling @ref HAL_FDCAN_DeInit() - or @ref HAL_FDCAN_Init() function. + using HAL_FDCAN_RegisterCallback() before calling HAL_FDCAN_DeInit() + or HAL_FDCAN_Init() function. When The compilation define USE_HAL_FDCAN_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available and all callbacks @@ -152,17 +162,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -241,19 +240,19 @@ /* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ -static const uint8_t DLCtoBytes[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64}; - -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup FDCAN_Private_Functions_Prototypes +/** @addtogroup FDCAN_Private_Variables * @{ */ -static void FDCAN_CalcultateRamBlockAddresses(FDCAN_HandleTypeDef *hfdcan); -static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData, - uint32_t BufferIndex); +static const uint8_t DLCtoBytes[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 12, 16, 20, 24, 32, 48, 64}; /** * @} */ +/* Private function prototypes -----------------------------------------------*/ +static void FDCAN_CalcultateRamBlockAddresses(FDCAN_HandleTypeDef *hfdcan); +static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData, + uint32_t BufferIndex); + /* Exported functions --------------------------------------------------------*/ /** @defgroup FDCAN_Exported_Functions FDCAN Exported Functions * @{ @@ -3383,7 +3382,7 @@ uint32_t HAL_FDCAN_GetError(FDCAN_HandleTypeDef *hfdcan) * @} */ -/** @addtogroup FDCAN_Private_Functions +/** @defgroup FDCAN_Private_Functions FDCAN Private Functions * @{ */ @@ -3515,5 +3514,3 @@ static void FDCAN_CopyMessageToRAM(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTy */ #endif /* FDCAN1 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c index 403fab8..9139817 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash.c @@ -75,13 +75,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -767,4 +766,3 @@ static void FLASH_Program_Fast(uint32_t Address, uint32_t DataAddress) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c index 480e317..fd64b10 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ex.c @@ -58,13 +58,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -157,9 +156,6 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t /* Deactivate the cache if they are activated to avoid data misbehavior */ if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U) { - /* Disable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U) { /* Disable data cache */ @@ -253,9 +249,6 @@ HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) /* Deactivate the cache if they are activated to avoid data misbehavior */ if (READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != 0U) { - /* Disable instruction cache */ - __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); - if (READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != 0U) { /* Disable data cache */ @@ -625,6 +618,8 @@ void FLASH_FlushCaches(void) if ((cache == FLASH_CACHE_ICACHE_ENABLED) || (cache == FLASH_CACHE_ICACHE_DCACHE_ENABLED)) { + /* Disable instruction cache */ + __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); /* Reset instruction cache */ __HAL_FLASH_INSTRUCTION_CACHE_RESET(); /* Enable instruction cache */ @@ -1417,4 +1412,3 @@ static void FLASH_OB_GetPCROP(uint32_t *PCROPConfig, uint32_t *PCROPStartAddr, u * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c index 542870a..f12a1a8 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c @@ -36,13 +36,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2019 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -250,6 +249,5 @@ __RAM_FUNC HAL_StatusTypeDef HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig) */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c index 0148182..ab9c8eb 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_fmac.c @@ -14,13 +14,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** * @@ -31,17 +30,17 @@ [..] The FMAC HAL driver can be used as follows: - (#) Initialize the FMAC low level resources by implementing the @ref HAL_FMAC_MspInit(): - (++) Enable the FMAC interface clock using @ref __HAL_RCC_FMAC_CLK_ENABLE(). + (#) Initialize the FMAC low level resources by implementing the HAL_FMAC_MspInit(): + (++) Enable the FMAC interface clock using __HAL_RCC_FMAC_CLK_ENABLE(). (++) In case of using interrupts (e.g. access configured as FMAC_BUFFER_ACCESS_IT): - (+++) Configure the FMAC interrupt priority using @ref HAL_NVIC_SetPriority(). - (+++) Enable the FMAC IRQ handler using @ref HAL_NVIC_EnableIRQ(). - (+++) In FMAC IRQ handler, call @ref HAL_FMAC_IRQHandler(). + (+++) Configure the FMAC interrupt priority using HAL_NVIC_SetPriority(). + (+++) Enable the FMAC IRQ handler using HAL_NVIC_EnableIRQ(). + (+++) In FMAC IRQ handler, call HAL_FMAC_IRQHandler(). (++) In case of using DMA to control data transfer (e.g. access configured as FMAC_BUFFER_ACCESS_DMA): - (+++) Enable the DMA interface clock using @ref __HAL_RCC_DMA1_CLK_ENABLE() - or @ref __HAL_RCC_DMA2_CLK_ENABLE() depending on the used DMA instance. - (+++) Enable the DMAMUX1 interface clock using @ref __HAL_RCC_DMAMUX1_CLK_ENABLE(). + (+++) Enable the DMA interface clock using __HAL_RCC_DMA1_CLK_ENABLE() + or __HAL_RCC_DMA2_CLK_ENABLE() depending on the used DMA instance. + (+++) Enable the DMAMUX1 interface clock using __HAL_RCC_DMAMUX1_CLK_ENABLE(). (+++) If the initialization of the internal buffers (coefficients, input, output) is done via DMA, configure and enable one DMA channel for managing data transfer from memory to memory (preload channel). @@ -52,16 +51,16 @@ one DMA channel for managing data transfer from peripheral to memory (output channel). (+++) Associate the initialized DMA handle(s) to the FMAC DMA handle(s) - using @ref __HAL_LINKDMA(). + using __HAL_LINKDMA(). (+++) Configure the priority and enable the NVIC for the transfer complete - interrupt on the enabled DMA channel(s) using @ref HAL_NVIC_SetPriority() - and @ref HAL_NVIC_EnableIRQ(). + interrupt on the enabled DMA channel(s) using HAL_NVIC_SetPriority() + and HAL_NVIC_EnableIRQ(). - (#) Initialize the FMAC HAL using @ref HAL_FMAC_Init(). This function - resorts to @ref HAL_FMAC_MspInit() for low-level initialization. + (#) Initialize the FMAC HAL using HAL_FMAC_Init(). This function + resorts to HAL_FMAC_MspInit() for low-level initialization. - (#) Configure the FMAC processing (filter) using @ref HAL_FMAC_FilterConfig() - or @ref HAL_FMAC_FilterConfig_DMA(). + (#) Configure the FMAC processing (filter) using HAL_FMAC_FilterConfig() + or HAL_FMAC_FilterConfig_DMA(). This function: (++) Defines the memory area within the FMAC internal memory (input, coefficients, output) and the associated threshold (input, output). @@ -74,61 +73,61 @@ (++) Enable the error interruptions in the input access and/or the output access is done through IT/DMA. If an error occurs, the interruption will be triggered in loop. In order to recover, the user will have - to reset the IP with the sequence @ref HAL_FMAC_DeInit / @ref HAL_FMAC_Init. - Optionally, he can also disable the interrupt using @ref __HAL_FMAC_DISABLE_IT; + to reset the IP with the sequence HAL_FMAC_DeInit / HAL_FMAC_Init. + Optionally, he can also disable the interrupt using __HAL_FMAC_DISABLE_IT; the error status will be kept, but no more interrupt will be triggered. (++) Write the provided coefficients into the internal memory using polling - mode ( @ref HAL_FMAC_FilterConfig() ) or DMA ( @ref HAL_FMAC_FilterConfig_DMA() ). - In the DMA case, @ref HAL_FMAC_FilterConfigCallback() is called when + mode ( HAL_FMAC_FilterConfig() ) or DMA ( HAL_FMAC_FilterConfig_DMA() ). + In the DMA case, HAL_FMAC_FilterConfigCallback() is called when the handling is over. (#) Optionally, the user can enable the error interruption related to - saturation by calling @ref __HAL_FMAC_ENABLE_IT. This helps in debugging the + saturation by calling __HAL_FMAC_ENABLE_IT. This helps in debugging the filter. If a saturation occurs, the interruption will be triggered in loop. In order to recover, the user will have to: - (++) Disable the interruption by calling @ref __HAL_FMAC_DISABLE_IT if + (++) Disable the interruption by calling __HAL_FMAC_DISABLE_IT if the user wishes to continue all the same. - (++) Reset the IP with the sequence @ref HAL_FMAC_DeInit / @ref HAL_FMAC_Init. + (++) Reset the IP with the sequence HAL_FMAC_DeInit / HAL_FMAC_Init. (#) Optionally, preload input (FIR, IIR) and output (IIR) data using - @ref HAL_FMAC_FilterPreload() or @ref HAL_FMAC_FilterPreload_DMA(). - In the DMA case, @ref HAL_FMAC_FilterPreloadCallback() is called when + HAL_FMAC_FilterPreload() or HAL_FMAC_FilterPreload_DMA(). + In the DMA case, HAL_FMAC_FilterPreloadCallback() is called when the handling is over. This step is optional as the filter can be started without preloaded data. - (#) Start the FMAC processing (filter) using @ref HAL_FMAC_FilterStart(). + (#) Start the FMAC processing (filter) using HAL_FMAC_FilterStart(). This function also configures the output buffer that will be filled from the circular internal output buffer. The function returns immediately without updating the provided buffer. The IP processing will be active until - @ref HAL_FMAC_FilterStop() is called. + HAL_FMAC_FilterStop() is called. - (#) If the input internal buffer is accessed via DMA, @ref HAL_FMAC_HalfGetDataCallback() + (#) If the input internal buffer is accessed via DMA, HAL_FMAC_HalfGetDataCallback() will be called to indicate that half of the input buffer has been handled. - (#) If the input internal buffer is accessed via DMA or interrupt, @ref HAL_FMAC_GetDataCallback() + (#) If the input internal buffer is accessed via DMA or interrupt, HAL_FMAC_GetDataCallback() will be called to require new input data. It will be provided through - @ref HAL_FMAC_AppendFilterData() if the DMA isn't in circular mode. + HAL_FMAC_AppendFilterData() if the DMA isn't in circular mode. - (#) If the output internal buffer is accessed via DMA, @ref HAL_FMAC_HalfOutputDataReadyCallback() + (#) If the output internal buffer is accessed via DMA, HAL_FMAC_HalfOutputDataReadyCallback() will be called to indicate that half of the output buffer has been handled. (#) If the output internal buffer is accessed via DMA or interrupt, - @ref HAL_FMAC_OutputDataReadyCallback() will be called to require a new output - buffer. It will be provided through @ref HAL_FMAC_ConfigFilterOutputBuffer() + HAL_FMAC_OutputDataReadyCallback() will be called to require a new output + buffer. It will be provided through HAL_FMAC_ConfigFilterOutputBuffer() if the DMA isn't in circular mode. - (#) In all modes except none, provide new input data to be processed via @ref HAL_FMAC_AppendFilterData(). + (#) In all modes except none, provide new input data to be processed via HAL_FMAC_AppendFilterData(). This function should only be called once the previous input data has been handled (the preloaded input data isn't concerned). (#) In all modes except none, provide a new output buffer to be filled via - @ref HAL_FMAC_ConfigFilterOutputBuffer(). This function should only be called once the previous + HAL_FMAC_ConfigFilterOutputBuffer(). This function should only be called once the previous user's output buffer has been filled. - (#) In polling mode, handle the input and output data using @ref HAL_FMAC_PollFilterData(). + (#) In polling mode, handle the input and output data using HAL_FMAC_PollFilterData(). This function: - (++) Write the user's input data (provided via @ref HAL_FMAC_AppendFilterData()) + (++) Write the user's input data (provided via HAL_FMAC_AppendFilterData()) into the FMAC input memory area. (++) Read the FMAC output memory area and write it into the user's output buffer. It will return either when: @@ -138,10 +137,10 @@ The user will have to use the updated input and output sizes to keep track of them. - (#) Stop the FMAC processing (filter) using @ref HAL_FMAC_FilterStop(). + (#) Stop the FMAC processing (filter) using HAL_FMAC_FilterStop(). - (#) Call @ref HAL_FMAC_DeInit() to de-initialize the FMAC peripheral. This function - resorts to @ref HAL_FMAC_MspDeInit() for low-level de-initialization. + (#) Call HAL_FMAC_DeInit() to de-initialize the FMAC peripheral. This function + resorts to HAL_FMAC_MspDeInit() for low-level de-initialization. ##### Callback registration ##### ================================== @@ -151,8 +150,8 @@ allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_FMAC_RegisterCallback() to register a user callback. - Function @ref HAL_FMAC_RegisterCallback() allows to register following callbacks: + Use Function HAL_FMAC_RegisterCallback() to register a user callback. + Function HAL_FMAC_RegisterCallback() allows to register following callbacks: (+) ErrorCallback : Error Callback. (+) HalfGetDataCallback : Get Half Data Callback. (+) GetDataCallback : Get Data Callback. @@ -166,9 +165,9 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_FMAC_UnRegisterCallback() to reset a callback to the default + Use function HAL_FMAC_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. - @ref HAL_FMAC_UnRegisterCallback() takes as parameters the HAL peripheral handle + HAL_FMAC_UnRegisterCallback() takes as parameters the HAL peripheral handle and the Callback ID. This function allows to reset following callbacks: (+) ErrorCallback : Error Callback. @@ -182,13 +181,13 @@ (+) MspDeInitCallback : FMAC MspDeInit. [..] - By default, after the @ref HAL_FMAC_Init() and when the state is HAL_FMAC_STATE_RESET + By default, after the HAL_FMAC_Init() and when the state is HAL_FMAC_STATE_RESET all callbacks are set to the corresponding weak (surcharged) functions: - examples @ref GetDataCallback(), @ref OutputDataReadyCallback(). + examples GetDataCallback(), OutputDataReadyCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_FMAC_Init() - and @ref HAL_FMAC_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_FMAC_Init() and @ref HAL_FMAC_DeInit() + reset to the legacy weak (surcharged) functions in the HAL_FMAC_Init() + and HAL_FMAC_DeInit() only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_FMAC_Init() and HAL_FMAC_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). [..] @@ -197,8 +196,8 @@ in HAL_FMAC_STATE_READY or HAL_FMAC_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_FMAC_RegisterCallback() before calling @ref HAL_FMAC_DeInit() - or @ref HAL_FMAC_Init() function. + using HAL_FMAC_RegisterCallback() before calling HAL_FMAC_DeInit() + or HAL_FMAC_Init() function. [..] When the compilation define USE_HAL_FMAC_REGISTER_CALLBACKS is set to 0 or @@ -250,11 +249,6 @@ /* FMAC Execution Enable */ #define FMAC_START FMAC_PARAM_START -/** - * @} - */ - - /** * @} */ @@ -2540,5 +2534,3 @@ static void FMAC_DMAError(DMA_HandleTypeDef *hdma) #endif /* HAL_FMAC_MODULE_ENABLED */ #endif /* FMAC */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c index ea317f9..b735929 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_gpio.c @@ -8,6 +8,17 @@ * + Initialization and de-initialization functions * + IO operation functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### GPIO Peripheral features ##### @@ -89,17 +100,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -122,18 +122,10 @@ #ifdef HAL_GPIO_MODULE_ENABLED /* Private typedef -----------------------------------------------------------*/ -/* Private defines ------------------------------------------------------------*/ -/** @defgroup GPIO_Private_Constants GPIO Private Constants +/* Private defines -----------------------------------------------------------*/ +/** @addtogroup GPIO_Private_Constants GPIO Private Constants * @{ */ -#define GPIO_MODE (0x00000003U) -#define EXTI_MODE (0x10000000U) -#define GPIO_MODE_IT (0x00010000U) -#define GPIO_MODE_EVT (0x00020000U) -#define RISING_EDGE (0x00100000U) -#define FALLING_EDGE (0x00200000U) -#define GPIO_OUTPUT_TYPE (0x00000010U) - #define GPIO_NUMBER (16U) /** * @} @@ -177,7 +169,6 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); - assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0U) @@ -189,8 +180,8 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ - if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || - (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || + ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); @@ -203,18 +194,24 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) /* Configure the IO Output Type */ temp = GPIOx->OTYPER; temp &= ~(GPIO_OTYPER_OT0 << position) ; - temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position); + temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); GPIOx->OTYPER = temp; } - /* Activate the Pull-up or Pull down resistor for the current IO */ - temp = GPIOx->PUPDR; - temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - temp |= ((GPIO_Init->Pull) << (position * 2U)); - GPIOx->PUPDR = temp; + if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) + { + /* Check the Pull parameter */ + assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + + /* Activate the Pull-up or Pull down resistor for the current IO */ + temp = GPIOx->PUPDR; + temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); + temp |= ((GPIO_Init->Pull) << (position * 2U)); + GPIOx->PUPDR = temp; + } /* In case of Alternate function mode selection */ - if ((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) { /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); @@ -235,7 +232,7 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ - if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) + if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); @@ -245,27 +242,10 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) temp |= (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))); SYSCFG->EXTICR[position >> 2U] = temp; - /* Clear EXTI line configuration */ - temp = EXTI->IMR1; - temp &= ~(iocurrent); - if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) - { - temp |= iocurrent; - } - EXTI->IMR1 = temp; - - temp = EXTI->EMR1; - temp &= ~(iocurrent); - if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) - { - temp |= iocurrent; - } - EXTI->EMR1 = temp; - /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR1; temp &= ~(iocurrent); - if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) + if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) { temp |= iocurrent; } @@ -273,11 +253,28 @@ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) temp = EXTI->FTSR1; temp &= ~(iocurrent); - if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) + if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) { temp |= iocurrent; } EXTI->FTSR1 = temp; + + temp = EXTI->EMR1; + temp &= ~(iocurrent); + if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) + { + temp |= iocurrent; + } + EXTI->EMR1 = temp; + + /* Clear EXTI line configuration */ + temp = EXTI->IMR1; + temp &= ~(iocurrent); + if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) + { + temp |= iocurrent; + } + EXTI->IMR1 = temp; } } @@ -322,8 +319,8 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) EXTI->EMR1 &= ~(iocurrent); /* Clear Rising Falling edge configuration */ - EXTI->RTSR1 &= ~(iocurrent); EXTI->FTSR1 &= ~(iocurrent); + EXTI->RTSR1 &= ~(iocurrent); tmp = 0x0FUL << (4U * (position & 0x03U)); SYSCFG->EXTICR[position >> 2U] &= ~tmp; @@ -533,4 +530,3 @@ __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c index ed2af7e..a625126 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_hrtim.c @@ -50,6 +50,18 @@ * + Waveform Timer Burst Status Get * + Waveform Timer Push-Pull Status Get * + Peripheral State Get + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### Simple mode v.s. waveform mode ##### @@ -71,6 +83,8 @@ operates in waveform mode, all the HRTIM features are accessible without any restriction. HRTIM waveform modes are managed through the set of functions named HAL_HRTIM_Waveform + +============================================================================== ##### How to use this driver ##### ============================================================================== [..] @@ -357,18 +371,6 @@ callbacks are set to the corresponding weak functions. @endverbatim - - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * ****************************************************************************** */ @@ -1814,11 +1816,11 @@ HAL_StatusTypeDef HAL_HRTIM_SimpleOCStart_DMA(HRTIM_HandleTypeDef * hhrtim, /* Check the parameters */ assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, OCChannel)); - if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) + if(hhrtim->State == HAL_HRTIM_STATE_BUSY) { return HAL_BUSY; } - if((hhrtim->State == HAL_HRTIM_STATE_READY)) + if(hhrtim->State == HAL_HRTIM_STATE_READY) { if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U)) { @@ -2458,11 +2460,11 @@ HAL_StatusTypeDef HAL_HRTIM_SimplePWMStart_DMA(HRTIM_HandleTypeDef * hhrtim, /* Check the parameters */ assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, PWMChannel)); - if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) + if(hhrtim->State == HAL_HRTIM_STATE_BUSY) { return HAL_BUSY; } - if((hhrtim->State == HAL_HRTIM_STATE_READY)) + if(hhrtim->State == HAL_HRTIM_STATE_READY) { if((SrcAddr == 0U ) || (DestAddr == 0U ) || (Length == 0U)) { @@ -5024,6 +5026,15 @@ HAL_StatusTypeDef HAL_HRTIM_WaveformTimerConfig(HRTIM_HandleTypeDef * hhrtim, /* Force a software update */ HRTIM_ForceRegistersUpdate(hhrtim, TimerIdx); + /* Configure slave timer update re-synchronization */ + if ((TimerIdx != HRTIM_TIMERINDEX_MASTER) + && (pTimerCfg->UpdateGating == HRTIM_UPDATEGATING_INDEPENDENT)) + { + MODIFY_REG(hhrtim->Instance->sTimerxRegs[TimerIdx].TIMxCR, + HRTIM_TIMCR_RSYNCU_Msk, + pTimerCfg->ReSyncUpdate << HRTIM_TIMCR_RSYNCU_Pos); + } + hhrtim->State = HAL_HRTIM_STATE_READY; /* Process Unlocked */ @@ -6597,7 +6608,7 @@ HAL_StatusTypeDef HAL_HRTIM_WaveformCountStart_DMA(HRTIM_HandleTypeDef * hhrtim, /* Check the parameters */ assert_param(IS_HRTIM_TIMERID(Timers)); - if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) + if(hhrtim->State == HAL_HRTIM_STATE_BUSY) { return HAL_BUSY; } @@ -7159,11 +7170,11 @@ HAL_StatusTypeDef HAL_HRTIM_BurstDMATransfer(HRTIM_HandleTypeDef *hhrtim, /* Check the parameters */ assert_param(IS_HRTIM_TIMERINDEX(TimerIdx)); - if((hhrtim->State == HAL_HRTIM_STATE_BUSY)) + if(hhrtim->State == HAL_HRTIM_STATE_BUSY) { return HAL_BUSY; } - if((hhrtim->State == HAL_HRTIM_STATE_READY)) + if(hhrtim->State == HAL_HRTIM_STATE_READY) { if((BurstBufferAddress == 0U ) || (BurstBufferLength == 0U)) { @@ -7626,6 +7637,9 @@ uint32_t HAL_HRTIM_WaveformGetOutputState(HRTIM_HandleTypeDef * hhrtim, /* Check parameters */ assert_param(IS_HRTIM_TIMER_OUTPUT(TimerIdx, Output)); + /* Prevent unused argument(s) compilation warning */ + UNUSED(TimerIdx); + /* Set output state according to output control status and output disable status */ switch (Output) { @@ -9292,14 +9306,6 @@ static void HRTIM_TimingUnitWaveform_Config(HRTIM_HandleTypeDef * hhrtim, hrtim_timcr &= ~(HRTIM_TIMCR_UPDGAT); hrtim_timcr |= pTimerCfg->UpdateGating; - if (pTimerCfg->UpdateGating == HRTIM_UPDATEGATING_INDEPENDENT) - { - /* Timing unit Re-Synchronized Update */ - hrtim_timcr &= ~(HRTIM_TIMCR_RSYNCU); - hrtim_timcr |= (pTimerCfg->ReSyncUpdate) << HRTIM_TIMCR_RSYNCU_Pos; - } - - /* Enable/Disable registers update on repetition */ hrtim_timcr &= ~(HRTIM_TIMCR_TREPU); if (pTimerCfg->RepetitionUpdate == HRTIM_UPDATEONREPETITION_ENABLED) @@ -11093,5 +11099,3 @@ static void HRTIM_BurstDMACplt(DMA_HandleTypeDef *hdma) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c index 4238cb4..54c8246 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c @@ -9,6 +9,17 @@ * + IO operation functions * + Peripheral State and Errors functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -19,7 +30,7 @@ (#) Declare a I2C_HandleTypeDef handle structure, for example: I2C_HandleTypeDef hi2c; - (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API: + (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API: (##) Enable the I2Cx interface clock (##) I2C pins configuration (+++) Enable the clock for the I2C GPIOs @@ -28,7 +39,8 @@ (+++) Configure the I2Cx interrupt priority (+++) Enable the NVIC I2C IRQ Channel (##) DMA Configuration if you need to use DMA process - (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel + (+++) Declare a DMA_HandleTypeDef handle structure for + the transmit or receive channel (+++) Enable the DMAx interface clock using (+++) Configure the DMA handle parameters (+++) Configure the DMA Tx or Rx channel @@ -39,49 +51,49 @@ (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addressing mode, Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure. - (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware - (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit(&hi2c) API. + (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware + (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API. - (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady() + (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady() (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : *** Polling mode IO operation *** ================================= [..] - (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit() - (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive() - (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit() - (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive() + (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit() + (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive() + (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit() + (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive() *** Polling mode IO MEM operation *** ===================================== [..] - (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write() - (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read() + (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write() + (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read() *** Interrupt mode IO operation *** =================================== [..] - (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT() - (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback() - (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT() - (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback() - (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT() - (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback() - (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT() - (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback() - (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT() - (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback() - (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro. + (+) Transmit in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Transmit_IT() + (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + (+) Receive in master mode an amount of data in non-blocking mode using HAL_I2C_Master_Receive_IT() + (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + (+) Transmit in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Transmit_IT() + (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_IT() + (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + add their own code by customization of function pointer HAL_I2C_ErrorCallback() + (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. This action will inform Master to generate a Stop condition to discard the communication. @@ -92,120 +104,135 @@ when a direction change during transfer [..] (+) A specific option field manage the different steps of a sequential transfer - (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below: - (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in no sequential mode + (+) Option field values are defined through I2C_XFEROPTIONS and are listed below: + (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functional is same as associated interfaces in + no sequential mode (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address and data to transfer without a final stop condition - (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address - and data to transfer without a final stop condition, an then permit a call the same master sequential interface - several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT() - or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_Transmit_DMA()) + (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with + start condition, address and data to transfer without a final stop condition, + an then permit a call the same master sequential interface several times + (like HAL_I2C_Master_Seq_Transmit_IT() then HAL_I2C_Master_Seq_Transmit_IT() + or HAL_I2C_Master_Seq_Transmit_DMA() then HAL_I2C_Master_Seq_Transmit_DMA()) (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address - and with new data to transfer if the direction change or manage only the new data to transfer + and with new data to transfer if the direction change or manage only the new data to + transfer if no direction change and without a final stop condition in both cases (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address - and with new data to transfer if the direction change or manage only the new data to transfer + and with new data to transfer if the direction change or manage only the new data to + transfer if no direction change and with a final stop condition in both cases - (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential - interface several times (link with option I2C_FIRST_AND_NEXT_FRAME). - Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME) - or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME) - or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME) - or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME). - Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the opposite interface Receive or Transmit + (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition + after several call of the same master sequential interface several times + (link with option I2C_FIRST_AND_NEXT_FRAME). + Usage can, transfer several bytes one by one using + HAL_I2C_Master_Seq_Transmit_IT + or HAL_I2C_Master_Seq_Receive_IT + or HAL_I2C_Master_Seq_Transmit_DMA + or HAL_I2C_Master_Seq_Receive_DMA + with option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME. + Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or + Receive sequence permit to call the opposite interface Receive or Transmit without stopping the communication and so generate a restart condition. - (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential + (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after + each call of the same master sequential interface. - Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME) - or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME) - or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME) - or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTHER_FRAME). - Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition. + Usage can, transfer several bytes one by one with a restart with slave address between + each bytes using + HAL_I2C_Master_Seq_Transmit_IT + or HAL_I2C_Master_Seq_Receive_IT + or HAL_I2C_Master_Seq_Transmit_DMA + or HAL_I2C_Master_Seq_Receive_DMA + with option I2C_FIRST_FRAME then I2C_OTHER_FRAME. + Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic + generation of STOP condition. (+) Different sequential I2C interfaces are listed below: - (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT() - or using @ref HAL_I2C_Master_Seq_Transmit_DMA() - (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback() - (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT() - or using @ref HAL_I2C_Master_Seq_Receive_DMA() - (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback() - (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT() - (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback() - (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT() - (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can - add his own code to check the Address Match Code and the transmission direction request by master (Write/Read). - (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback() - (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT() - or using @ref HAL_I2C_Slave_Seq_Transmit_DMA() - (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback() - (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT() - or using @ref HAL_I2C_Slave_Seq_Receive_DMA() - (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback() - (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() - (++) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro. + (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using + HAL_I2C_Master_Seq_Transmit_IT() or using HAL_I2C_Master_Seq_Transmit_DMA() + (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and + users can add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() + (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using + HAL_I2C_Master_Seq_Receive_IT() or using HAL_I2C_Master_Seq_Receive_DMA() + (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() + (++) Abort a master IT or DMA I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() + HAL_I2C_DisableListen_IT() + (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and users can + add their own code to check the Address Match Code and the transmission direction request by master + (Write/Read). + (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_ListenCpltCallback() + (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using + HAL_I2C_Slave_Seq_Transmit_IT() or using HAL_I2C_Slave_Seq_Transmit_DMA() + (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and + users can add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() + (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using + HAL_I2C_Slave_Seq_Receive_IT() or using HAL_I2C_Slave_Seq_Receive_DMA() + (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + add their own code by customization of function pointer HAL_I2C_ErrorCallback() + (++) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. This action will inform Master to generate a Stop condition to discard the communication. *** Interrupt mode IO MEM operation *** ======================================= [..] (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using - @ref HAL_I2C_Mem_Write_IT() - (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback() + HAL_I2C_Mem_Write_IT() + (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using - @ref HAL_I2C_Mem_Read_IT() - (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback() - (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + HAL_I2C_Mem_Read_IT() + (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + add their own code by customization of function pointer HAL_I2C_ErrorCallback() *** DMA mode IO operation *** ============================== [..] (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using - @ref HAL_I2C_Master_Transmit_DMA() - (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback() + HAL_I2C_Master_Transmit_DMA() + (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback() (+) Receive in master mode an amount of data in non-blocking mode (DMA) using - @ref HAL_I2C_Master_Receive_DMA() - (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback() + HAL_I2C_Master_Receive_DMA() + (+) At reception end of transfer, HAL_I2C_MasterRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MasterRxCpltCallback() (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using - @ref HAL_I2C_Slave_Transmit_DMA() - (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback() + HAL_I2C_Slave_Transmit_DMA() + (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback() (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using - @ref HAL_I2C_Slave_Receive_DMA() - (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback() - (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() - (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT() - (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback() - (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro. + HAL_I2C_Slave_Receive_DMA() + (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback() + (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + add their own code by customization of function pointer HAL_I2C_ErrorCallback() + (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT() + (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_AbortCpltCallback() + (+) Discard a slave I2C process communication using __HAL_I2C_GENERATE_NACK() macro. This action will inform Master to generate a Stop condition to discard the communication. *** DMA mode IO MEM operation *** ================================= [..] (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using - @ref HAL_I2C_Mem_Write_DMA() - (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback() + HAL_I2C_Mem_Write_DMA() + (+) At Memory end of write transfer, HAL_I2C_MemTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MemTxCpltCallback() (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using - @ref HAL_I2C_Mem_Read_DMA() - (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback() - (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can - add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + HAL_I2C_Mem_Read_DMA() + (+) At Memory end of read transfer, HAL_I2C_MemRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_I2C_MemRxCpltCallback() + (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and users can + add their own code by customization of function pointer HAL_I2C_ErrorCallback() *** I2C HAL driver macros list *** @@ -213,23 +240,23 @@ [..] Below the list of most used macros in I2C HAL driver. - (+) @ref __HAL_I2C_ENABLE: Enable the I2C peripheral - (+) @ref __HAL_I2C_DISABLE: Disable the I2C peripheral - (+) @ref __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode - (+) @ref __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not - (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag - (+) @ref __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt - (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt + (+) __HAL_I2C_ENABLE: Enable the I2C peripheral + (+) __HAL_I2C_DISABLE: Disable the I2C peripheral + (+) __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode + (+) __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not + (+) __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag + (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt + (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt *** Callback registration *** ============================================= [..] The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback() + Use Functions HAL_I2C_RegisterCallback() or HAL_I2C_RegisterAddrCallback() to register an interrupt callback. [..] - Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks: + Function HAL_I2C_RegisterCallback() allows to register following callbacks: (+) MasterTxCpltCallback : callback for Master transmission end of transfer. (+) MasterRxCpltCallback : callback for Master reception end of transfer. (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. @@ -244,11 +271,11 @@ This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. [..] - For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback(). + For specific callback AddrCallback use dedicated register callbacks : HAL_I2C_RegisterAddrCallback(). [..] - Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default + Use function HAL_I2C_UnRegisterCallback to reset a callback to the default weak function. - @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) MasterTxCpltCallback : callback for Master transmission end of transfer. @@ -263,24 +290,24 @@ (+) MspInitCallback : callback for Msp Init. (+) MspDeInitCallback : callback for Msp DeInit. [..] - For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback(). + For callback AddrCallback use dedicated register callbacks : HAL_I2C_UnRegisterAddrCallback(). [..] - By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET + By default, after the HAL_I2C_Init() and when the state is HAL_I2C_STATE_RESET all callbacks are set to the corresponding weak functions: - examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback(). + examples HAL_I2C_MasterTxCpltCallback(), HAL_I2C_MasterRxCpltCallback(). Exception done for MspInit and MspDeInit functions that are - reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when + reset to the legacy weak functions in the HAL_I2C_Init()/ HAL_I2C_DeInit() only when these callbacks are null (not registered beforehand). - If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() + If MspInit or MspDeInit are not null, the HAL_I2C_Init()/ HAL_I2C_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. [..] - Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only. + Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. Exception done MspInit/MspDeInit functions that can be registered/unregistered - in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state, + in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. Then, the user first registers the MspInit/MspDeInit user callbacks - using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit() - or @ref HAL_I2C_Init() function. + using HAL_I2C_RegisterCallback() before calling HAL_I2C_DeInit() + or HAL_I2C_Init() function. [..] When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available and all callbacks @@ -290,18 +317,6 @@ (@) You can refer to the I2C HAL driver header file for more useful macros @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -336,28 +351,48 @@ #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ #define MAX_NBYTE_SIZE 255U -#define SlaveAddr_SHIFT 7U -#define SlaveAddr_MSK 0x06U +#define SLAVE_ADDR_SHIFT 7U +#define SLAVE_ADDR_MSK 0x06U /* Private define for @ref PreviousState usage */ -#define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */ -#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */ -#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MEM)) /*!< Memory Busy TX, combinaison of State LSB and Mode enum */ -#define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MEM)) /*!< Memory Busy RX, combinaison of State LSB and Mode enum */ +#define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | \ + (uint32_t)HAL_I2C_STATE_BUSY_RX) & \ + (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) +/*!< Mask State define, keep only RX and TX bits */ +#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) +/*!< Default Value */ +#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + (uint32_t)HAL_I2C_MODE_MASTER)) +/*!< Master Busy TX, combinaison of State LSB and Mode enum */ +#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + (uint32_t)HAL_I2C_MODE_MASTER)) +/*!< Master Busy RX, combinaison of State LSB and Mode enum */ +#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + (uint32_t)HAL_I2C_MODE_SLAVE)) +/*!< Slave Busy TX, combinaison of State LSB and Mode enum */ +#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + (uint32_t)HAL_I2C_MODE_SLAVE)) +/*!< Slave Busy RX, combinaison of State LSB and Mode enum */ +#define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | \ + (uint32_t)HAL_I2C_MODE_MEM)) +/*!< Memory Busy TX, combinaison of State LSB and Mode enum */ +#define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \ + (uint32_t)HAL_I2C_MODE_MEM)) +/*!< Memory Busy RX, combinaison of State LSB and Mode enum */ /* Private define to centralize the enable/disable of Interrupts */ -#define I2C_XFER_TX_IT (uint16_t)(0x0001U) /* Bit field can be combinated with @ref I2C_XFER_LISTEN_IT */ -#define I2C_XFER_RX_IT (uint16_t)(0x0002U) /* Bit field can be combinated with @ref I2C_XFER_LISTEN_IT */ -#define I2C_XFER_LISTEN_IT (uint16_t)(0x8000U) /* Bit field can be combinated with @ref I2C_XFER_TX_IT and @ref I2C_XFER_RX_IT */ +#define I2C_XFER_TX_IT (uint16_t)(0x0001U) /*!< Bit field can be combinated with + @ref I2C_XFER_LISTEN_IT */ +#define I2C_XFER_RX_IT (uint16_t)(0x0002U) /*!< Bit field can be combinated with + @ref I2C_XFER_LISTEN_IT */ +#define I2C_XFER_LISTEN_IT (uint16_t)(0x8000U) /*!< Bit field can be combinated with @ref I2C_XFER_TX_IT + and @ref I2C_XFER_RX_IT */ -#define I2C_XFER_ERROR_IT (uint16_t)(0x0010U) /* Bit definition to manage addition of global Error and NACK treatment */ -#define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /* Bit definition to manage only STOP evenement */ -#define I2C_XFER_RELOAD_IT (uint16_t)(0x0040U) /* Bit definition to manage only Reload of NBYTE */ +#define I2C_XFER_ERROR_IT (uint16_t)(0x0010U) /*!< Bit definition to manage addition of global Error + and NACK treatment */ +#define I2C_XFER_CPLT_IT (uint16_t)(0x0020U) /*!< Bit definition to manage only STOP evenement */ +#define I2C_XFER_RELOAD_IT (uint16_t)(0x0040U) /*!< Bit definition to manage only Reload of NBYTE */ /* Private define Sequential Transfer Options default/reset value */ #define I2C_NO_OPTION_FRAME (0xFFFF0000U) @@ -366,6 +401,9 @@ */ /* Private macro -------------------------------------------------------------*/ +/* Macro to get remaining data to transfer on DMA side */ +#define I2C_GET_DMA_REMAIN_DATA(__HANDLE__) __HAL_DMA_GET_COUNTER(__HANDLE__) + /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ @@ -390,24 +428,34 @@ static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); /* Private functions to handle IT transfer */ -static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, - uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, - uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart); +static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, + uint32_t Tickstart); +static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, + uint32_t Tickstart); /* Private functions for I2C transfer IRQ handler */ -static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); +static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources); +static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources); +static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources); +static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources); /* Private functions to handle flags during polling transfer */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); -static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart); +static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart); +static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart); +static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart); +static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart); /* Private functions to centralize the enable/disable of Interrupts */ static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); @@ -559,7 +607,8 @@ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; /* Configure I2Cx: Dual mode and Own Address2 */ - hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddress2Masks << 8)); + hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ + (hi2c->Init.OwnAddress2Masks << 8)); /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ @@ -1065,8 +1114,8 @@ HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c) * @param Timeout Timeout duration * @retval HAL status */ -HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, - uint32_t Timeout) +HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, + uint16_t Size, uint32_t Timeout) { uint32_t tickstart; @@ -1097,12 +1146,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + I2C_GENERATE_START_WRITE); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_WRITE); } while (hi2c->XferCount > 0U) @@ -1132,12 +1183,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_NO_STARTSTOP); } } } @@ -1180,8 +1233,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevA * @param Timeout Timeout duration * @retval HAL status */ -HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, - uint32_t Timeout) +HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, + uint16_t Size, uint32_t Timeout) { uint32_t tickstart; @@ -1212,12 +1265,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + I2C_GENERATE_START_READ); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_READ); } while (hi2c->XferCount > 0U) @@ -1248,12 +1303,14 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_NO_STARTSTOP); } } } @@ -1294,7 +1351,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAd * @param Timeout Timeout duration * @retval HAL status */ -HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, + uint32_t Timeout) { uint32_t tickstart; @@ -1376,22 +1434,27 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData hi2c->XferCount--; } + /* Wait until AF flag is set */ + if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK) + { + /* Disable Address Acknowledge */ + hi2c->Instance->CR2 |= I2C_CR2_NACK; + return HAL_ERROR; + } + + /* Flush TX register */ + I2C_Flush_TXDR(hi2c); + + /* Clear AF flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + /* Wait until STOP flag is set */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) { /* Disable Address Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; - if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) - { - /* Normal use case for Transmitter mode */ - /* A NACK is generated to confirm the end of transfer */ - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; - } - else - { - return HAL_ERROR; - } + return HAL_ERROR; } /* Clear STOP flag */ @@ -1431,7 +1494,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData * @param Timeout Timeout duration * @retval HAL status */ -HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, + uint32_t Timeout) { uint32_t tickstart; @@ -1455,6 +1519,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; hi2c->XferCount = Size; + hi2c->XferSize = hi2c->XferCount; hi2c->XferISR = NULL; /* Enable Address Acknowledge */ @@ -1497,6 +1562,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, hi2c->pBuffPtr++; hi2c->XferCount--; + hi2c->XferSize--; } return HAL_ERROR; @@ -1509,6 +1575,7 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, hi2c->pBuffPtr++; hi2c->XferCount--; + hi2c->XferSize--; } /* Wait until STOP flag is set */ @@ -1606,7 +1673,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); return HAL_OK; @@ -1627,7 +1695,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t D * @param Size Amount of data to be sent * @retval HAL status */ -HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, + uint16_t Size) { uint32_t xfermode; @@ -1675,7 +1744,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); return HAL_OK; @@ -1724,7 +1794,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pD /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); return HAL_OK; @@ -1773,7 +1844,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pDa /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); return HAL_OK; @@ -1846,7 +1918,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, + hi2c->XferSize); } else { @@ -1906,7 +1979,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_WRITE); /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -1916,7 +1990,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t process unlock */ /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); } @@ -1990,7 +2065,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D hi2c->hdmarx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, + hi2c->XferSize); } else { @@ -2050,7 +2126,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D /* Send Slave Address */ /* Set NBYTES to read and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_READ); /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -2060,7 +2137,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t D process unlock */ /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); } @@ -2118,7 +2196,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *p hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, + hi2c->XferSize); } else { @@ -2221,7 +2300,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pD hi2c->hdmarx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, + hi2c->XferSize); } else { @@ -2374,12 +2454,14 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_NO_STARTSTOP); } } @@ -2474,12 +2556,14 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_START_READ); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, + I2C_GENERATE_START_READ); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_READ); } do @@ -2510,12 +2594,14 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, if (hi2c->XferCount > MAX_NBYTE_SIZE) { hi2c->XferSize = MAX_NBYTE_SIZE; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, + I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); @@ -2608,7 +2694,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr } /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) + if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) + != HAL_OK) { /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -2627,7 +2714,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddr /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); return HAL_OK; @@ -2719,7 +2807,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddre /* Enable ERR, TC, STOP, NACK, RXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); return HAL_OK; @@ -2792,7 +2881,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd } /* Send Slave Address and Memory Address */ - if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK) + if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) + != HAL_OK) { /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -2813,7 +2903,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAdd hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, + hi2c->XferSize); } else { @@ -2957,7 +3048,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr hi2c->hdmarx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, + hi2c->XferSize); } else { @@ -3028,7 +3120,8 @@ HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddr * @param Timeout Timeout duration * @retval HAL status */ -HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) +HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, + uint32_t Timeout) { uint32_t tickstart; @@ -3205,9 +3298,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16 xfermode = hi2c->XferOptions; } - /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ + /* If transfer direction not change and there is no request to start another frame, + do not generate Restart Condition */ /* Mean Previous state is same as current state */ - if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ + (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) { xferrequest = I2C_NO_STARTSTOP; } @@ -3291,9 +3386,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 xfermode = hi2c->XferOptions; } - /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ + /* If transfer direction not change and there is no request to start another frame, + do not generate Restart Condition */ /* Mean Previous state is same as current state */ - if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && \ + (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) { xferrequest = I2C_NO_STARTSTOP; } @@ -3324,7 +3421,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, + hi2c->XferSize); } else { @@ -3383,7 +3481,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 /* Send Slave Address */ /* Set NBYTES to write and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_WRITE); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_WRITE); /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3393,7 +3492,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint1 process unlock */ /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); } @@ -3453,9 +3553,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_ xfermode = hi2c->XferOptions; } - /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ + /* If transfer direction not change and there is no request to start another frame, + do not generate Restart Condition */ /* Mean Previous state is same as current state */ - if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ + (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) { xferrequest = I2C_NO_STARTSTOP; } @@ -3539,9 +3641,11 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 xfermode = hi2c->XferOptions; } - /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */ + /* If transfer direction not change and there is no request to start another frame, + do not generate Restart Condition */ /* Mean Previous state is same as current state */ - if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) + if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && \ + (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0)) { xferrequest = I2C_NO_STARTSTOP; } @@ -3572,7 +3676,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 hi2c->hdmarx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, + hi2c->XferSize); } else { @@ -3631,7 +3736,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 /* Send Slave Address */ /* Set NBYTES to read and generate START condition */ - I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_START_READ); + I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, + I2C_GENERATE_START_READ); /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -3641,7 +3747,8 @@ HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16 process unlock */ /* Enable ERR, TC, STOP, NACK, TXI interrupt */ /* possible to enable all of these */ - /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ + /* I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | + I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TXI */ I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); } @@ -3862,7 +3969,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_ hi2c->hdmatx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TXDR, + hi2c->XferSize); } else { @@ -3912,15 +4020,15 @@ HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_ /* Process Unlocked */ __HAL_UNLOCK(hi2c); + /* Enable DMA Request */ + hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; + /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ /* Enable ERR, STOP, NACK, ADDR interrupts */ I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; - return HAL_OK; } else @@ -4138,7 +4246,8 @@ HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t hi2c->hdmarx->XferAbortCallback = NULL; /* Enable the DMA channel */ - dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pData, hi2c->XferSize); + dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, + (uint32_t)pData, hi2c->XferSize); } else { @@ -4188,15 +4297,15 @@ HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t /* Process Unlocked */ __HAL_UNLOCK(hi2c); + /* Enable DMA Request */ + hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; + /* Note : The I2C interrupts must be enabled after unlocking current process to avoid the risk of I2C interrupt handle execution before current process unlock */ /* REnable ADDR interrupt */ I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); - /* Enable DMA Request */ - hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; - return HAL_OK; } else @@ -4356,7 +4465,8 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) uint32_t tmperror; /* I2C Bus error interrupt occurred ------------------------------------*/ - if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && \ + (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) { hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; @@ -4365,7 +4475,8 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) } /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ - if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && \ + (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) { hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; @@ -4374,7 +4485,8 @@ void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) } /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ - if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) + if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && \ + (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERRI) != RESET)) { hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; @@ -4628,7 +4740,8 @@ uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) * @param ITSources Interrupt sources enabled. * @retval HAL status */ -static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) +static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources) { uint16_t devaddress; uint32_t tmpITFlags = ITFlags; @@ -4636,7 +4749,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin /* Process Locked */ __HAL_LOCK(hi2c); - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); @@ -4649,7 +4763,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin /* Flush TX register */ I2C_Flush_TXDR(hi2c); } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) { /* Remove RXNE flag on temporary variable as read done */ tmpITFlags &= ~I2C_FLAG_RXNE; @@ -4663,7 +4778,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin hi2c->XferSize--; hi2c->XferCount--; } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) { /* Write data to TXDR */ hi2c->Instance->TXDR = *hi2c->pBuffPtr; @@ -4674,7 +4790,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin hi2c->XferSize--; hi2c->XferCount--; } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) { @@ -4690,11 +4807,13 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin hi2c->XferSize = hi2c->XferCount; if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) { - I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, hi2c->XferOptions, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, + hi2c->XferOptions, I2C_NO_STARTSTOP); } else { - I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); + I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, + I2C_AUTOEND_MODE, I2C_NO_STARTSTOP); } } } @@ -4714,7 +4833,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin } } } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { if (hi2c->XferCount == 0U) { @@ -4745,7 +4865,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin /* Nothing to do */ } - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) { /* Call I2C Master complete process */ I2C_ITMasterCplt(hi2c, tmpITFlags); @@ -4765,7 +4886,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uin * @param ITSources Interrupt sources enabled. * @retval HAL status */ -static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) +static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources) { uint32_t tmpoptions = hi2c->XferOptions; uint32_t tmpITFlags = ITFlags; @@ -4774,13 +4896,15 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint __HAL_LOCK(hi2c); /* Check if STOPF is set */ - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) { /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, tmpITFlags); } - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -4788,8 +4912,9 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint /* So clear Flag NACKF only */ if (hi2c->XferCount == 0U) { - /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */ if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) + /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + Warning[Pa134]: left and right operands are identical */ { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, tmpITFlags); @@ -4828,7 +4953,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint } } } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_RXI) != RESET)) { if (hi2c->XferCount > 0U) { @@ -4854,7 +4980,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint { I2C_ITAddrCplt(hi2c, tmpITFlags); } - else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) + else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET)) { /* Write data to TXDR only if XferCount not reach "0" */ /* A TXIS flag can be set, during STOP treatment */ @@ -4900,7 +5027,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint * @param ITSources Interrupt sources enabled. * @retval HAL status */ -static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) +static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources) { uint16_t devaddress; uint32_t xfermode; @@ -4908,7 +5036,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui /* Process Locked */ __HAL_LOCK(hi2c); - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Clear NACK Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); @@ -4924,7 +5053,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui /* Flush TX register */ I2C_Flush_TXDR(hi2c); } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { /* Disable TC interrupt */ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); @@ -4985,7 +5115,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui } } } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET)) { if (hi2c->XferCount == 0U) { @@ -5011,7 +5142,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); } } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) { /* Call I2C Master complete process */ I2C_ITMasterCplt(hi2c, ITFlags); @@ -5035,7 +5167,8 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui * @param ITSources Interrupt sources enabled. * @retval HAL status */ -static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources) +static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, + uint32_t ITSources) { uint32_t tmpoptions = hi2c->XferOptions; uint32_t treatdmanack = 0U; @@ -5045,13 +5178,15 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin __HAL_LOCK(hi2c); /* Check if STOPF is set */ - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) { /* Call I2C Slave complete process */ I2C_ITSlaveCplt(hi2c, ITFlags); } - if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) + if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ @@ -5065,7 +5200,7 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin { if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) { - if (__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) + if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) { treatdmanack = 1U; } @@ -5077,7 +5212,7 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin { if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) { - if (__HAL_DMA_GET_COUNTER(hi2c->hdmatx) == 0U) + if (I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx) == 0U) { treatdmanack = 1U; } @@ -5086,8 +5221,9 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin if (treatdmanack == 1U) { - /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for Warning[Pa134]: left and right operands are identical */ if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) + /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for + Warning[Pa134]: left and right operands are identical */ { /* Call I2C Listen complete process */ I2C_ITListenCplt(hi2c, ITFlags); @@ -5148,7 +5284,8 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); } } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) + else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && \ + (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET)) { I2C_ITAddrCplt(hi2c, ITFlags); } @@ -5175,8 +5312,9 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin * @param Tickstart Tick start value * @retval HAL status */ -static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, - uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) +static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, + uint32_t Tickstart) { I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRITE); @@ -5229,8 +5367,9 @@ static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_ * @param Tickstart Tick start value * @retval HAL status */ -static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, - uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) +static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, + uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, + uint32_t Tickstart) { I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); @@ -5298,7 +5437,7 @@ static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) /* If 10bits addressing mode is selected */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) { - if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK)) + if ((slaveaddrcode & SLAVE_ADDR_MSK) == ((ownadd1code >> SLAVE_ADDR_SHIFT) & SLAVE_ADDR_MSK)) { slaveaddrcode = ownadd1code; hi2c->AddrEventCount++; @@ -5684,7 +5823,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) if (hi2c->hdmatx != NULL) { - hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmatx); + hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmatx); } } else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) @@ -5694,7 +5833,7 @@ static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) if (hi2c->hdmarx != NULL) { - hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmarx); + hi2c->XferCount = (uint16_t)I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx); } } else @@ -6025,7 +6164,8 @@ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) */ static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) { - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + /* Derogation MISRAC2012-Rule-11.5 */ + I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; @@ -6053,7 +6193,8 @@ static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) } /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, hi2c->XferSize) != HAL_OK) + if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, + hi2c->XferSize) != HAL_OK) { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); @@ -6073,7 +6214,8 @@ static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) */ static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) { - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + /* Derogation MISRAC2012-Rule-11.5 */ + I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tmpoptions = hi2c->XferOptions; if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) @@ -6100,7 +6242,8 @@ static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) */ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) { - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + /* Derogation MISRAC2012-Rule-11.5 */ + I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Disable DMA Request */ hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; @@ -6128,7 +6271,8 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) } /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize) != HAL_OK) + if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, + hi2c->XferSize) != HAL_OK) { /* Call the corresponding callback to inform upper layer of End of Transfer */ I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); @@ -6148,10 +6292,11 @@ static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) */ static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) { - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + /* Derogation MISRAC2012-Rule-11.5 */ + I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); uint32_t tmpoptions = hi2c->XferOptions; - if ((__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) && \ + if ((I2C_GET_DMA_REMAIN_DATA(hi2c->hdmarx) == 0U) && \ (tmpoptions != I2C_NO_OPTION_FRAME)) { /* Disable DMA Request */ @@ -6175,7 +6320,8 @@ static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) */ static void I2C_DMAError(DMA_HandleTypeDef *hdma) { - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + /* Derogation MISRAC2012-Rule-11.5 */ + I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Disable Acknowledge */ hi2c->Instance->CR2 |= I2C_CR2_NACK; @@ -6192,7 +6338,8 @@ static void I2C_DMAError(DMA_HandleTypeDef *hdma) */ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) { - I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogation MISRAC2012-Rule-11.5 */ + /* Derogation MISRAC2012-Rule-11.5 */ + I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Reset AbortCpltCallback */ if (hi2c->hdmatx != NULL) @@ -6208,11 +6355,12 @@ static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) } /** - * @brief This function handles I2C Communication Timeout. + * @brief This function handles I2C Communication Timeout. It waits + * until a flag is no longer in the specified status. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @param Flag Specifies the I2C flag to check. - * @param Status The new Flag status (SET or RESET). + * @param Status The actual Flag status (SET or RESET). * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status @@ -6248,12 +6396,13 @@ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uin * @param Tickstart Tick start value * @retval HAL status */ -static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) +static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart) { while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) { return HAL_ERROR; } @@ -6285,12 +6434,13 @@ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, * @param Tickstart Tick start value * @retval HAL status */ -static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) +static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart) { while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) { return HAL_ERROR; } @@ -6319,12 +6469,13 @@ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, * @param Tickstart Tick start value * @retval HAL status */ -static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) +static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + uint32_t Tickstart) { while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) { - /* Check if a NACK is detected */ - if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) + /* Check if an error is detected */ + if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) { return HAL_ERROR; } @@ -6342,13 +6493,22 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, } else { + if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) + { + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + hi2c->ErrorCode = HAL_I2C_ERROR_AF; + } + else + { + hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + } + /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); - hi2c->ErrorCode = HAL_I2C_ERROR_NONE; hi2c->State = HAL_I2C_STATE_READY; hi2c->Mode = HAL_I2C_MODE_NONE; @@ -6375,60 +6535,136 @@ static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, } /** - * @brief This function handles Acknowledge failed detection during an I2C Communication. + * @brief This function handles errors detection during an I2C Communication. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ -static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) +static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { - if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) + HAL_StatusTypeDef status = HAL_OK; + uint32_t itflag = hi2c->Instance->ISR; + uint32_t error_code = 0; + uint32_t tickstart = Tickstart; + uint32_t tmp1; + HAL_I2C_ModeTypeDef tmp2; + + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) { - /* Wait until STOP Flag is reset */ + /* Clear NACKF Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + + /* Wait until STOP Flag is set or timeout occurred */ /* AutoEnd should be initiate after AF */ - while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) { - if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) + if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) { - hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; - hi2c->State = HAL_I2C_STATE_READY; - hi2c->Mode = HAL_I2C_MODE_NONE; + tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); + tmp2 = hi2c->Mode; - /* Process Unlocked */ - __HAL_UNLOCK(hi2c); - - return HAL_ERROR; + /* In case of I2C still busy, try to regenerate a STOP manually */ + if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ + (tmp1 != I2C_CR2_STOP) && \ + (tmp2 != HAL_I2C_MODE_SLAVE)) + { + /* Generate Stop */ + hi2c->Instance->CR2 |= I2C_CR2_STOP; + + /* Update Tick with new reference */ + tickstart = HAL_GetTick(); + } + + while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + { + /* Check for the Timeout */ + if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) + { + hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; + hi2c->State = HAL_I2C_STATE_READY; + hi2c->Mode = HAL_I2C_MODE_NONE; + + /* Process Unlocked */ + __HAL_UNLOCK(hi2c); + + status = HAL_ERROR; + } + } } } } - /* Clear NACKF Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); + /* In case STOP Flag is detected, clear it */ + if (status == HAL_OK) + { + /* Clear STOP Flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + } - /* Clear STOP Flag */ - __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); + error_code |= HAL_I2C_ERROR_AF; + status = HAL_ERROR; + } + + /* Refresh Content of Status register */ + itflag = hi2c->Instance->ISR; + + /* Then verify if an additional errors occurs */ + /* Check if a Bus error occurred */ + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) + { + error_code |= HAL_I2C_ERROR_BERR; + + /* Clear BERR flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); + + status = HAL_ERROR; + } + + /* Check if an Over-Run/Under-Run error occurred */ + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) + { + error_code |= HAL_I2C_ERROR_OVR; + + /* Clear OVR flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); + + status = HAL_ERROR; + } + + /* Check if an Arbitration Loss error occurred */ + if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) + { + error_code |= HAL_I2C_ERROR_ARLO; + + /* Clear ARLO flag */ + __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); + + status = HAL_ERROR; + } + + if (status != HAL_OK) + { /* Flush TX register */ I2C_Flush_TXDR(hi2c); /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); - hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + hi2c->ErrorCode |= error_code; hi2c->State = HAL_I2C_STATE_READY; hi2c->Mode = HAL_I2C_MODE_NONE; /* Process Unlocked */ __HAL_UNLOCK(hi2c); - - return HAL_ERROR; } - return HAL_OK; + + return status; } /** @@ -6458,12 +6694,16 @@ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uin assert_param(IS_TRANSFER_MODE(Mode)); assert_param(IS_TRANSFER_REQUEST(Request)); + /* Declaration of tmp to prevent undefined behavior of volatile usage */ + uint32_t tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ + (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); + /* update CR2 register */ - MODIFY_REG(hi2c->Instance->CR2, + MODIFY_REG(hi2c->Instance->CR2, \ ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ - (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \ - (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | - (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request)); + (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ + I2C_CR2_START | I2C_CR2_STOP)), tmp); } /** @@ -6642,5 +6882,3 @@ static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c index 9b02bab..b2e51cf 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c @@ -5,8 +5,21 @@ * @brief I2C Extended HAL module driver. * This file provides firmware functions to manage the following * functionalities of I2C Extended peripheral: - * + Extended features functions + * + Filter Mode Functions + * + WakeUp Mode Functions + * + FastModePlus Functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### I2C peripheral Extended features ##### @@ -32,18 +45,6 @@ (++) HAL_I2CEx_EnableFastModePlus() (++) HAL_I2CEx_DisableFastModePlus() @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -71,17 +72,15 @@ * @{ */ -/** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions - * @brief Extended features functions +/** @defgroup I2CEx_Exported_Functions_Group1 Filter Mode Functions + * @brief Filter Mode Functions * @verbatim =============================================================================== - ##### Extended features functions ##### + ##### Filter Mode Functions ##### =============================================================================== [..] This section provides functions allowing to: (+) Configure Noise Filters - (+) Configure Wake Up Feature - (+) Configure Fast Mode Plus @endverbatim * @{ @@ -182,6 +181,23 @@ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_ return HAL_BUSY; } } +/** + * @} + */ + +/** @defgroup I2CEx_Exported_Functions_Group2 WakeUp Mode Functions + * @brief WakeUp Mode Functions + * +@verbatim + =============================================================================== + ##### WakeUp Mode Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Configure Wake Up Feature + +@endverbatim + * @{ + */ /** * @brief Enable I2C wakeup from Stop mode(s). @@ -260,6 +276,23 @@ HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) return HAL_BUSY; } } +/** + * @} + */ + +/** @defgroup I2CEx_Exported_Functions_Group3 Fast Mode Plus Functions + * @brief Fast Mode Plus Functions + * +@verbatim + =============================================================================== + ##### Fast Mode Plus Functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Configure Fast Mode Plus + +@endverbatim + * @{ + */ /** * @brief Enable the I2C fast mode plus driving capability. @@ -318,11 +351,9 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) /* Disable fast mode plus driving capability for selected pin */ CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); } - /** * @} */ - /** * @} */ @@ -335,5 +366,3 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c index 3377f0f..f625820 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2s.c @@ -8,6 +8,17 @@ * + Initialization and de-initialization functions * + IO operation functions * + Peripheral State and Errors functions + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim =============================================================================== ##### How to use this driver ##### @@ -169,18 +180,7 @@ and weak (surcharged) callbacks are used. @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** + */ /* Includes ------------------------------------------------------------------*/ @@ -1857,4 +1857,3 @@ static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, #endif /* HAL_I2S_MODULE_ENABLED */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_irda.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_irda.c index 557630a..0fbbf7c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_irda.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_irda.c @@ -11,6 +11,17 @@ * + Peripheral State and Errors functions * + Peripheral Control functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -114,8 +125,8 @@ allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_IRDA_RegisterCallback() to register a user callback. - Function @ref HAL_IRDA_RegisterCallback() allows to register following callbacks: + Use Function HAL_IRDA_RegisterCallback() to register a user callback. + Function HAL_IRDA_RegisterCallback() allows to register following callbacks: (+) TxHalfCpltCallback : Tx Half Complete Callback. (+) TxCpltCallback : Tx Complete Callback. (+) RxHalfCpltCallback : Rx Half Complete Callback. @@ -130,9 +141,9 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_IRDA_UnRegisterCallback() to reset a callback to the default + Use function HAL_IRDA_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. - @ref HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle, + HAL_IRDA_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) TxHalfCpltCallback : Tx Half Complete Callback. @@ -147,13 +158,13 @@ (+) MspDeInitCallback : IRDA MspDeInit. [..] - By default, after the @ref HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET + By default, after the HAL_IRDA_Init() and when the state is HAL_IRDA_STATE_RESET all callbacks are set to the corresponding weak (surcharged) functions: - examples @ref HAL_IRDA_TxCpltCallback(), @ref HAL_IRDA_RxHalfCpltCallback(). + examples HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_IRDA_Init() - and @ref HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_IRDA_Init() and @ref HAL_IRDA_DeInit() + reset to the legacy weak (surcharged) functions in the HAL_IRDA_Init() + and HAL_IRDA_DeInit() only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_IRDA_Init() and HAL_IRDA_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). [..] @@ -162,8 +173,8 @@ in HAL_IRDA_STATE_READY or HAL_IRDA_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_IRDA_RegisterCallback() before calling @ref HAL_IRDA_DeInit() - or @ref HAL_IRDA_Init() function. + using HAL_IRDA_RegisterCallback() before calling HAL_IRDA_DeInit() + or HAL_IRDA_Init() function. [..] When The compilation define USE_HAL_IRDA_REGISTER_CALLBACKS is set to 0 or @@ -172,17 +183,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -801,10 +801,10 @@ HAL_StatusTypeDef HAL_IRDA_UnRegisterCallback(IRDA_HandleTypeDef *hirda, HAL_IRD * @param Timeout Specify timeout value. * @retval HAL status */ -HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - uint8_t *pdata8bits; - uint16_t *pdata16bits; + const uint8_t *pdata8bits; + const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ @@ -831,7 +831,7 @@ HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, u if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE)) { pdata8bits = NULL; - pdata16bits = (uint16_t *) pData; /* Derogation R.11.3 */ + pdata16bits = (const uint16_t *) pData; /* Derogation R.11.3 */ } else { @@ -980,7 +980,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, ui * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size) { /* Check that a Tx process is not already ongoing */ if (hirda->gState == HAL_IRDA_STATE_READY) @@ -1052,8 +1052,16 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, /* Process Unlocked */ __HAL_UNLOCK(hirda); - /* Enable the IRDA Parity Error and Data Register not empty Interrupts */ - SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + if (hirda->Init.Parity != IRDA_PARITY_NONE) + { + /* Enable the IRDA Parity Error and Data Register not empty Interrupts */ + SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + } + else + { + /* Enable the IRDA Data Register not empty Interrupts */ + SET_BIT(hirda->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */ SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); @@ -1077,7 +1085,7 @@ HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, const uint8_t *pData, uint16_t Size) { /* Check that a Tx process is not already ongoing */ if (hirda->gState == HAL_IRDA_STATE_READY) @@ -1194,8 +1202,11 @@ HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData /* Process Unlocked */ __HAL_UNLOCK(hirda); - /* Enable the UART Parity Error Interrupt */ - SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); + if (hirda->Init.Parity != IRDA_PARITY_NONE) + { + /* Enable the UART Parity Error Interrupt */ + SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); + } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); @@ -1287,7 +1298,10 @@ HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda) __HAL_IRDA_CLEAR_OREFLAG(hirda); /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ - SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); + if (hirda->Init.Parity != IRDA_PARITY_NONE) + { + SET_BIT(hirda->Instance->CR1, USART_CR1_PEIE); + } SET_BIT(hirda->Instance->CR3, USART_CR3_EIE); /* Enable the IRDA DMA Rx request */ @@ -2283,21 +2297,21 @@ static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda) { case IRDA_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); + tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); break; case IRDA_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); + tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); break; case IRDA_CLOCKSOURCE_HSI: - tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(HSI_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); + tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(HSI_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); break; case IRDA_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); + tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16(pclk, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); break; case IRDA_CLOCKSOURCE_LSE: - tmpreg = (uint16_t)(IRDA_DIV_SAMPLING16((uint32_t)LSE_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); + tmpreg = (uint32_t)(IRDA_DIV_SAMPLING16((uint32_t)LSE_VALUE, hirda->Init.BaudRate, hirda->Init.ClockPrescaler)); break; default: ret = HAL_ERROR; @@ -2307,7 +2321,7 @@ static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda) /* USARTDIV must be greater than or equal to 0d16 */ if ((tmpreg >= USART_BRR_MIN) && (tmpreg <= USART_BRR_MAX)) { - hirda->Instance->BRR = tmpreg; + hirda->Instance->BRR = (uint16_t)tmpreg; } else { @@ -2365,11 +2379,12 @@ static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda) } /** - * @brief Handle IRDA Communication Timeout. + * @brief Handle IRDA Communication Timeout. It waits + * until a flag is no longer in the specified status. * @param hirda Pointer to a IRDA_HandleTypeDef structure that contains * the configuration information for the specified IRDA module. * @param Flag Specifies the IRDA flag to check. - * @param Status Flag status (SET or RESET) + * @param Status The actual Flag status (SET or RESET) * @param Tickstart Tick start value * @param Timeout Timeout duration * @retval HAL status @@ -2770,7 +2785,7 @@ static void IRDA_DMARxOnlyAbortCallback(DMA_HandleTypeDef *hdma) */ static void IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda) { - uint16_t *tmp; + const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (hirda->gState == HAL_IRDA_STATE_BUSY_TX) @@ -2787,7 +2802,7 @@ static void IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda) { if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE)) { - tmp = (uint16_t *) hirda->pTxBuffPtr; /* Derogation R.11.3 */ + tmp = (const uint16_t *) hirda->pTxBuffPtr; /* Derogation R.11.3 */ hirda->Instance->TDR = (uint16_t)(*tmp & 0x01FFU); hirda->pTxBuffPtr += 2U; } @@ -2895,4 +2910,4 @@ static void IRDA_Receive_IT(IRDA_HandleTypeDef *hirda) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c index d9bf659..d7ecf6f 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_iwdg.c @@ -8,6 +8,17 @@ * + Initialization and Start functions * + IO operation functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### IWDG Generic features ##### @@ -86,18 +97,6 @@ the reload register @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -121,11 +120,13 @@ /* Status register needs up to 5 LSI clock periods divided by the clock prescaler to be updated. The number of LSI clock periods is upper-rounded to 6 for the timeout value calculation. - The timeout value is also calculated using the highest prescaler (256) and + The timeout value is calculated using the highest prescaler (256) and the LSI_VALUE constant. The value of this constant can be changed by the user to take into account possible LSI clock period variations. - The timeout value is multiplied by 1000 to be converted in milliseconds. */ -#define HAL_IWDG_DEFAULT_TIMEOUT ((6UL * 256UL * 1000UL) / LSI_VALUE) + The timeout value is multiplied by 1000 to be converted in milliseconds. + LSI startup time is also considered here by adding LSI_STARTUP_TIME + converted in milliseconds. */ +#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_WVU | IWDG_SR_RVU | IWDG_SR_PVU) /** * @} @@ -279,5 +280,3 @@ HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c index 6bde103..73b15a5 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_lptim.c @@ -11,6 +11,17 @@ * + Reading operation functions. * + Peripheral State functions. * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -96,13 +107,13 @@ The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback. - @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle, + Use Function HAL_LPTIM_RegisterCallback() to register a callback. + HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. [..] - Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the + Use function HAL_LPTIM_UnRegisterCallback() to reset a callback to the default weak function. - @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. [..] These functions allow to register/unregister following callbacks: @@ -120,7 +131,7 @@ [..] By default, after the Init and when the state is HAL_LPTIM_STATE_RESET all interrupt callbacks are set to the corresponding weak functions: - examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback(). + examples HAL_LPTIM_TriggerCallback(), HAL_LPTIM_CompareMatchCallback(). [..] Exception done for MspInit and MspDeInit functions that are reset to the legacy weak @@ -134,7 +145,7 @@ in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function. + using HAL_LPTIM_RegisterCallback() before calling DeInit or Init function. [..] When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or @@ -143,17 +154,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -235,8 +235,8 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source)); assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler)); - if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) - || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) + || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) { assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime)); @@ -279,8 +279,8 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) /* Get the LPTIMx CFGR value */ tmpcfgr = hlptim->Instance->CFGR; - if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) - || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) + || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) { tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT)); } @@ -310,8 +310,8 @@ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) } /* Configure LPTIM external clock polarity and digital filter */ - if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) - || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) + if ((hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_ULPTIM) + || (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) { tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity | hlptim->Init.UltraLowPowerClock.SampleTime); @@ -534,7 +534,7 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim) return HAL_TIMEOUT; } - /* Change the TIM state*/ + /* Change the LPTIM state*/ hlptim->State = HAL_LPTIM_STATE_READY; /* Return function status */ @@ -670,7 +670,7 @@ HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim) __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); } - /* Change the TIM state*/ + /* Change the LPTIM state*/ hlptim->State = HAL_LPTIM_STATE_READY; /* Return function status */ @@ -757,7 +757,7 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim) return HAL_TIMEOUT; } - /* Change the TIM state*/ + /* Change the LPTIM state*/ hlptim->State = HAL_LPTIM_STATE_READY; /* Return function status */ @@ -893,7 +893,7 @@ HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim) __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); } - /* Change the TIM state*/ + /* Change the LPTIM state*/ hlptim->State = HAL_LPTIM_STATE_READY; /* Return function status */ @@ -980,7 +980,7 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim) return HAL_TIMEOUT; } - /* Change the TIM state*/ + /* Change the LPTIM state*/ hlptim->State = HAL_LPTIM_STATE_READY; /* Return function status */ @@ -1116,7 +1116,7 @@ HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim) __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); } - /* Change the TIM state*/ + /* Change the LPTIM state*/ hlptim->State = HAL_LPTIM_STATE_READY; /* Return function status */ @@ -2178,39 +2178,48 @@ HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlpti switch (CallbackID) { case HAL_LPTIM_MSPINIT_CB_ID : - hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */ + /* Legacy weak MspInit Callback */ + hlptim->MspInitCallback = HAL_LPTIM_MspInit; break; case HAL_LPTIM_MSPDEINIT_CB_ID : - hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */ + /* Legacy weak Msp DeInit Callback */ + hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; break; case HAL_LPTIM_COMPARE_MATCH_CB_ID : - hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */ + /* Legacy weak Compare match Callback */ + hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; break; case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID : - hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */ + /* Legacy weak Auto-reload match Callback */ + hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; break; case HAL_LPTIM_TRIGGER_CB_ID : - hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */ + /* Legacy weak External trigger event detection Callback */ + hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; break; case HAL_LPTIM_COMPARE_WRITE_CB_ID : - hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */ + /* Legacy weak Compare register write complete Callback */ + hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; break; case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID : - hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */ + /* Legacy weak Auto-reload register write complete Callback */ + hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; break; case HAL_LPTIM_DIRECTION_UP_CB_ID : - hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */ + /* Legacy weak Up-counting direction change Callback */ + hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; break; case HAL_LPTIM_DIRECTION_DOWN_CB_ID : - hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */ + /* Legacy weak Down-counting direction change Callback */ + hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; break; default : @@ -2224,11 +2233,13 @@ HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlpti switch (CallbackID) { case HAL_LPTIM_MSPINIT_CB_ID : - hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */ + /* Legacy weak MspInit Callback */ + hlptim->MspInitCallback = HAL_LPTIM_MspInit; break; case HAL_LPTIM_MSPDEINIT_CB_ID : - hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */ + /* Legacy weak Msp DeInit Callback */ + hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; break; default : @@ -2303,13 +2314,13 @@ HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim) static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim) { /* Reset the LPTIM callback to the legacy weak callbacks */ - lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */ - lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */ - lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */ - lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */ - lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */ - lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */ - lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */ + lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; + lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; + lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; + lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; + lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; + lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; + lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; } #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ @@ -2352,9 +2363,12 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim) uint32_t tmpCFGR; uint32_t tmpCMP; uint32_t tmpARR; + uint32_t primask_bit; uint32_t tmpOR; - __disable_irq(); + /* Enter critical section */ + primask_bit = __get_PRIMASK(); + __set_PRIMASK(1) ; /*********** Save LPTIM Config ***********/ /* Save LPTIM source clock */ @@ -2444,7 +2458,8 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim) hlptim->Instance->CFGR = tmpCFGR; hlptim->Instance->OR = tmpOR; - __enable_irq(); + /* Exit critical section: restore previous priority mask */ + __set_PRIMASK(primask_bit); } /** * @} @@ -2459,5 +2474,3 @@ void LPTIM_Disable(LPTIM_HandleTypeDef *hlptim) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c index 706921a..5ca0721 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_msp_template.c @@ -8,13 +8,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -102,4 +101,3 @@ void HAL_PPP_MspDeInit(void) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nand.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nand.c index 83dd439..a09a722 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nand.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nand.c @@ -6,6 +6,17 @@ * This file provides a generic firmware to drive NAND memories mounted * as external device. * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -58,25 +69,25 @@ The compilation define USE_HAL_NAND_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_NAND_RegisterCallback() to register a user callback, + Use Functions HAL_NAND_RegisterCallback() to register a user callback, it allows to register following callbacks: (+) MspInitCallback : NAND MspInit. (+) MspDeInitCallback : NAND MspDeInit. This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - Use function @ref HAL_NAND_UnRegisterCallback() to reset a callback to the default + Use function HAL_NAND_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. It allows to reset following callbacks: (+) MspInitCallback : NAND MspInit. (+) MspDeInitCallback : NAND MspDeInit. This function) takes as parameters the HAL peripheral handle and the Callback ID. - By default, after the @ref HAL_NAND_Init and if the state is HAL_NAND_STATE_RESET + By default, after the HAL_NAND_Init and if the state is HAL_NAND_STATE_RESET all callbacks are reset to the corresponding legacy weak (surcharged) functions. Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_NAND_Init - and @ref HAL_NAND_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_NAND_Init and @ref HAL_NAND_DeInit + reset to the legacy weak (surcharged) functions in the HAL_NAND_Init + and HAL_NAND_DeInit only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_NAND_Init and HAL_NAND_DeInit keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in READY state only. @@ -84,8 +95,8 @@ in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_NAND_RegisterCallback before calling @ref HAL_NAND_DeInit - or @ref HAL_NAND_Init function. + using HAL_NAND_RegisterCallback before calling HAL_NAND_DeInit + or HAL_NAND_Init function. When The compilation define USE_HAL_NAND_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available @@ -93,17 +104,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -790,6 +790,17 @@ HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_Address __DSB(); } + /* Calculate PageSize */ + if (hnand->Init.MemoryDataWidth == FMC_NAND_MEM_BUS_WIDTH_8) + { + hnand->Config.PageSize = hnand->Config.PageSize / 2U; + } + else + { + /* Do nothing */ + /* Keep the same PageSize for FMC_NAND_MEM_BUS_WIDTH_16*/ + } + /* Get Data into Buffer */ for (index = 0U; index < hnand->Config.PageSize; index++) { @@ -1074,6 +1085,17 @@ HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_Addres } } + /* Calculate PageSize */ + if (hnand->Init.MemoryDataWidth == FMC_NAND_MEM_BUS_WIDTH_8) + { + hnand->Config.PageSize = hnand->Config.PageSize / 2U; + } + else + { + /* Do nothing */ + /* Keep the same PageSize for FMC_NAND_MEM_BUS_WIDTH_16*/ + } + /* Write data to memory */ for (index = 0U; index < hnand->Config.PageSize; index++) { @@ -2217,5 +2239,3 @@ uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand) */ #endif /* FMC_BANK3 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nor.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nor.c index 3f1da73..f5afab9 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nor.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_nor.c @@ -6,6 +6,17 @@ * This file provides a generic firmware to drive NOR memories mounted * as external device. * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -55,25 +66,25 @@ The compilation define USE_HAL_NOR_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_NOR_RegisterCallback() to register a user callback, + Use Functions HAL_NOR_RegisterCallback() to register a user callback, it allows to register following callbacks: (+) MspInitCallback : NOR MspInit. (+) MspDeInitCallback : NOR MspDeInit. This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - Use function @ref HAL_NOR_UnRegisterCallback() to reset a callback to the default + Use function HAL_NOR_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. It allows to reset following callbacks: (+) MspInitCallback : NOR MspInit. (+) MspDeInitCallback : NOR MspDeInit. This function) takes as parameters the HAL peripheral handle and the Callback ID. - By default, after the @ref HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET + By default, after the HAL_NOR_Init and if the state is HAL_NOR_STATE_RESET all callbacks are reset to the corresponding legacy weak (surcharged) functions. Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_NOR_Init - and @ref HAL_NOR_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_NOR_Init and @ref HAL_NOR_DeInit + reset to the legacy weak (surcharged) functions in the HAL_NOR_Init + and HAL_NOR_DeInit only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_NOR_Init and HAL_NOR_DeInit keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in READY state only. @@ -81,8 +92,8 @@ in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_NOR_RegisterCallback before calling @ref HAL_NOR_DeInit - or @ref HAL_NOR_Init function. + using HAL_NOR_RegisterCallback before calling HAL_NOR_DeInit + or HAL_NOR_Init function. When The compilation define USE_HAL_NOR_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available @@ -90,17 +101,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -1508,5 +1508,3 @@ HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Addres */ #endif /* FMC_BANK1 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c index e512aea..f6ab426 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c @@ -4,16 +4,23 @@ * @author MCD Application Team * @brief OPAMP HAL module driver. * This file provides firmware functions to manage the following - * functionalities of the operational amplifiers (OPAMP1,...OPAMP6) - * peripheral: - * + OPAMP Configuration - * + OPAMP calibration - * Thanks to + * functionalities of the operational amplifiers peripheral: * + Initialization/de-initialization functions * + I/O operation functions * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ================================================================================ ##### OPAMP Peripheral Features ##### @@ -90,7 +97,7 @@ (#) Configure the OPAMP using HAL_OPAMP_Init() function: (++) Select OPAMP_POWERMODE_HIGHSPEED - (++) Otherwise select OPAMP_POWERMODE_NORMAL + (++) Otherwise select OPAMP_POWERMODE_NORMALSPEED *** Calibration *** ============================================ @@ -111,14 +118,14 @@ (++) The compilation define USE_HAL_OPAMP_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - (++) Use Functions @ref HAL_OPAMP_RegisterCallback() to register a user callback, + (++) Use Functions HAL_OPAMP_RegisterCallback() to register a user callback, it allows to register following callbacks: (+++) MspInitCallback : OPAMP MspInit. (+++) MspDeInitCallback : OPAMP MspDeInit. This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - (++) Use function @ref HAL_OPAMP_UnRegisterCallback() to reset a callback to the default + (++) Use function HAL_OPAMP_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. It allows to reset following callbacks: (+++) MspInitCallback : OPAMP MspInit. (+++) MspDeInitCallback : OPAMP MspDeInit. @@ -167,17 +174,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* @@ -189,31 +185,43 @@ selected among the list shown by table below. Table 1. OPAMPs inverting/non-inverting inputs for the STM32G4 devices: - +--------------------------------------------------------------------------------------------+ - | | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 | - |-----------------|--------|----------|----------|----------|----------|----------|----------| - | | No conn| X | X | X | X | X | X | - | Inverting Input | VM0 | PA3 | PA5 | PB2 | PB10 | PB15 | PA1 | - | (1) | VM1 | PC5 | PC5 | PB10 | PD8 | PA3 | PB1 | - |-----------------|--------|----------|----------|----------|----------|----------|----------| - | | VP0 | PA1 | PA7 | PB0 | PB13 | PB14 | PB12 | - | Non Inverting | VP1 | PA3 | PB14 | PB13 | PD11 | PD12 | PD9 | - | Input | VP2 | PA7 | PB0 | PA1 | PB11 | PC3 | PB13 | - | | VP3 | DAC3_CH1 | PD14 | DAC3_CH2 | DAC4_CH1 | DAC4_CH2 | DAC3_CH1 | - +--------------------------------------------------------------------------------------------+ + +-----------------------------------------------------------------------------------------------+ + | | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 | + |-----------------|--------|----------|----------|-------------|----------|----------|----------| + | | No conn| X | X | X | X | X | X | + | Inverting Input | VM0 | PA3 | PA5 | PB2 | PB10 | PB15 | PA1 | + | (1) | VM1 | PC5 | PC5 | PB10 | PD8 | PA3 | PB1 | + |-----------------|--------|----------|----------|-------------|----------|----------|----------| + | | VP0 | PA1 | PA7 | PB0 | PB13 | PB14 | PB12 | + | Non Inverting | VP1 | PA3 | PB14 | PB13 | PD11 | PD12 | PD9 | + | Input | VP2 | PA7 | PB0 | PA1 | PB11 | PC3 | PB13 | + | | VP3 | DAC3_CH1 | PD14 | DAC3_CH2(2) | DAC4_CH1 | DAC4_CH2 | DAC3_CH1 | + +-----------------------------------------------------------------------------------------------+ (1): No connection in follower mode. + (2): Available for STM32G47x/ STM32G48x devices only Table 2. OPAMPs outputs for the STM32G4 devices: - +--------------------------------------------------------------------------------+ - | | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 | - |-----------------|--------|--------|--------|--------|--------|--------|--------| - | Output | | PA2 | PA6 | PB1 | PB12 | PA8 | PB11 | - |-----------------|--------|--------|--------|--------|--------|--------|--------+ - | Internal output | | ADC1 | ADC2 | ADC2 | ADC5 | ADC5 | ADC4 | - | to ADCs | | CH13 | CH16 | CH18 | CH5 | CH3 | CH17 | - | | | | | ADC3 | | | | - | | | | | CH13 | | | | - |-----------------|--------|--------|--------|--------|--------|--------|--------+ + +------------------------------------------------------------------------------------+ + | | | OPAMP1 | OPAMP2 | OPAMP3 | OPAMP4 | OPAMP5 | OPAMP6 | + |-----------------|--------|--------|--------|----------|--------|--------|----------| + | Output | | PA2 | PA6 | PB1 | PB12 | PA8 | PB11 | + |-----------------|--------|--------|--------|----------|--------|--------|----------+ + | Internal output | | ADC1 | ADC2 | ADC2 | ADC5 | ADC5 | ADC4 | + | to ADCs | | CH13 | CH16 | CH18 | CH5 | CH3 | CH17(2) | + | (1) | | | | ADC3 | | | ADC3 | + | | | | | CH13(2) | | | CH17(3) | + |-----------------|--------|--------|--------|----------|------ -|--------|----------| + | Internal output | | ADC1 | ADC2 | ADC3 | ADC4 | ADC5 | ADC1 | + | to ADCs input | | CH3 | CH3 | CH1(2) | CH3 | CH1 | CH14 | + | on GPIO | | | | ADC1 | ADC1 | | ADC2 | + | | | | | CH12 | CH11 | | CH14 | + +------------------------------------------------------------------------------------+ + (1): This ADC channel is connected internally to the OPAMPx_VOUT when OPAINTOEN + bit is set. + In this case, the I/O on which the OPAMPx_VOUT is available, can be used for + another purpose. + (2): Available for STM32G47x/ STM32G48x devices only. + (3): Available for STM32G491/STM32G4A1 devices only. */ @@ -1192,4 +1200,3 @@ HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c index 320d953..577ef2a 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c @@ -5,8 +5,7 @@ * @brief Extended OPAMP HAL module driver. * * This file provides firmware functions to manage the following - * functionalities of the operational amplifiers (OPAMP1...OPAMP6) - * peripheral: + * functionalities of the operational amplifiers peripheral: * + Extended Initialization and de-initialization functions * + Extended Peripheral Control functions * @@ -14,13 +13,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -747,4 +745,3 @@ HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPA * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c index 3579032..4bc9bef 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c @@ -10,6 +10,17 @@ * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -40,17 +51,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -88,8 +88,10 @@ */ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd); +#if (USE_USB_DOUBLE_BUFFER == 1U) static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal); static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal); +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /** * @} @@ -200,7 +202,7 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) hpcd->USB_Address = 0U; hpcd->State = HAL_PCD_STATE_READY; - + /* Activate LPM */ if (hpcd->Init.lpm_enable == 1U) { @@ -695,7 +697,8 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, /** * @brief Unregister the USB PCD Iso OUT incomplete Callback - * USB PCD Iso OUT incomplete Callback is redirected to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback + * USB PCD Iso OUT incomplete Callback is redirected + * to the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback * @param hpcd PCD handle * @retval HAL status */ @@ -769,7 +772,8 @@ HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, /** * @brief Unregister the USB PCD Iso IN incomplete Callback - * USB PCD Iso IN incomplete Callback is redirected to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback + * USB PCD Iso IN incomplete Callback is redirected + * to the weak HAL_PCD_ISOINIncompleteCallback() predefined callback * @param hpcd PCD handle * @retval HAL status */ @@ -1003,14 +1007,18 @@ HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR)) + uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance); + + if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR) { /* servicing of the endpoint correct transfer interrupt */ /* clear of the CTR flag into the sub */ (void)PCD_EP_ISR_Handler(hpcd); + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET)) + if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET) { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); @@ -1021,19 +1029,25 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ (void)HAL_PCD_SetAddress(hpcd, 0U); + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR)) + if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR) { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR)) + if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR) { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP)) + if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP) { hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE); hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); @@ -1055,9 +1069,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP)) + if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP) { /* Force low-power mode in the macrocell */ hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP; @@ -1072,10 +1088,12 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) #else HAL_PCD_SuspendCallback(hpcd); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + + return; } /* Handle LPM Interrupt */ - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_L1REQ)) + if ((wIstr & USB_ISTR_L1REQ) == USB_ISTR_L1REQ) { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ); if (hpcd->LPM_State == LPM_L0) @@ -1100,9 +1118,11 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) HAL_PCD_SuspendCallback(hpcd); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF)) + if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF) { __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); @@ -1111,12 +1131,16 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) #else HAL_PCD_SOFCallback(hpcd); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + + return; } - if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF)) + if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF) { /* clear ESOF flag in ISTR */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); + + return; } } @@ -1669,7 +1693,10 @@ PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { PCD_EPTypeDef *ep; - uint16_t count, wIstr, wEPVal, TxByteNbre; + uint16_t count; + uint16_t wIstr; + uint16_t wEPVal; + uint16_t TxPctSize; uint8_t epindex; /* stay in loop while pending interrupts */ @@ -1789,6 +1816,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); } } +#if (USE_USB_DOUBLE_BUFFER == 1U) else { /* manage double buffer bulk out */ @@ -1799,7 +1827,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) else /* manage double buffer iso out */ { /* free EP OUT Buffer */ - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) { @@ -1823,6 +1851,8 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) } } } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ + /* multi-packet on the NON control OUT endpoint */ ep->xfer_count += count; ep->xfer_buff += count; @@ -1840,7 +1870,6 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) { (void) USB_EPStartXfer(hpcd->Instance, ep); } - } if ((wEPVal & USB_EP_CTR_TX) != 0U) @@ -1850,43 +1879,73 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) /* clear int flag */ PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); - /* Manage Bulk Single Buffer Transaction */ - if ((ep->type == EP_TYPE_BULK) && ((wEPVal & USB_EP_KIND) == 0U)) + if (ep->type != EP_TYPE_BULK) { - /* multi-packet on the NON control IN endpoint */ - TxByteNbre = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); + ep->xfer_len = 0U; - if (ep->xfer_len > TxByteNbre) +#if (USE_USB_DOUBLE_BUFFER == 1U) + if (ep->doublebuffer != 0U) { - ep->xfer_len -= TxByteNbre; - } - else - { - ep->xfer_len = 0U; + if ((wEPVal & USB_EP_DTOG_TX) != 0U) + { + PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); + } + else + { + PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U); + } } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ - /* Zero Length Packet? */ - if (ep->xfer_len == 0U) - { - /* TX COMPLETE */ + /* TX COMPLETE */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) - hpcd->DataInStageCallback(hpcd, ep->num); + hpcd->DataInStageCallback(hpcd, ep->num); #else - HAL_PCD_DataInStageCallback(hpcd, ep->num); + HAL_PCD_DataInStageCallback(hpcd, ep->num); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ - } - else - { - /* Transfer is not yet Done */ - ep->xfer_buff += TxByteNbre; - ep->xfer_count += TxByteNbre; - (void)USB_EPStartXfer(hpcd->Instance, ep); - } } - /* Double Buffer Iso/bulk IN (bulk transfer Len > Ep_Mps) */ else { - (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); + /* Manage Bulk Single Buffer Transaction */ + if ((wEPVal & USB_EP_KIND) == 0U) + { + /* multi-packet on the NON control IN endpoint */ + TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); + + if (ep->xfer_len > TxPctSize) + { + ep->xfer_len -= TxPctSize; + } + else + { + ep->xfer_len = 0U; + } + + /* Zero Length Packet? */ + if (ep->xfer_len == 0U) + { + /* TX COMPLETE */ +#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + hpcd->DataInStageCallback(hpcd, ep->num); +#else + HAL_PCD_DataInStageCallback(hpcd, ep->num); +#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + } + else + { + /* Transfer is not yet Done */ + ep->xfer_buff += TxPctSize; + ep->xfer_count += TxPctSize; + (void)USB_EPStartXfer(hpcd->Instance, ep); + } + } +#if (USE_USB_DOUBLE_BUFFER == 1U) + /* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */ + else + { + (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); + } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ } } } @@ -1896,6 +1955,7 @@ static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) } +#if (USE_USB_DOUBLE_BUFFER == 1U) /** * @brief Manage double buffer bulk out transaction from ISR * @param hpcd PCD handle @@ -1932,7 +1992,7 @@ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, /* Check if Buffer1 is in blocked state which requires to toggle */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) { - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); } if (count != 0U) @@ -1964,7 +2024,7 @@ static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd, /*Need to FreeUser Buffer*/ if ((wEPVal & USB_EP_DTOG_TX) == 0U) { - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U); } if (count != 0U) @@ -1988,22 +2048,23 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, PCD_EPTypeDef *ep, uint16_t wEPVal) { uint32_t len; - uint16_t TxByteNbre; + uint16_t TxPctSize; /* Data Buffer0 ACK received */ if ((wEPVal & USB_EP_DTOG_TX) != 0U) { /* multi-packet on the NON control IN endpoint */ - TxByteNbre = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); + TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); - if (ep->xfer_len > TxByteNbre) + if (ep->xfer_len > TxPctSize) { - ep->xfer_len -= TxByteNbre; + ep->xfer_len -= TxPctSize; } else { ep->xfer_len = 0U; } + /* Transfer is completed */ if (ep->xfer_len == 0U) { @@ -2019,7 +2080,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, if ((wEPVal & USB_EP_DTOG_RX) != 0U) { - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); } } else /* Transfer is not yet Done */ @@ -2027,14 +2088,14 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) != 0U) { - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) { - ep->xfer_buff += TxByteNbre; - ep->xfer_count += TxByteNbre; + ep->xfer_buff += TxPctSize; + ep->xfer_count += TxPctSize; /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) @@ -2044,7 +2105,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, } else if (ep->xfer_len_db == 0U) { - len = TxByteNbre; + len = TxPctSize; ep->xfer_fill_db = 0U; } else @@ -2066,11 +2127,11 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, else /* Data Buffer1 ACK received */ { /* multi-packet on the NON control IN endpoint */ - TxByteNbre = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); + TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); - if (ep->xfer_len >= TxByteNbre) + if (ep->xfer_len >= TxPctSize) { - ep->xfer_len -= TxByteNbre; + ep->xfer_len -= TxPctSize; } else { @@ -2093,7 +2154,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) { - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); } } else /* Transfer is not yet Done */ @@ -2101,14 +2162,14 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, /* need to Free USB Buff */ if ((wEPVal & USB_EP_DTOG_RX) == 0U) { - PCD_FreeUserBuffer(hpcd->Instance, ep->num, 1U); + PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U); } /* Still there is data to Fill in the next Buffer */ if (ep->xfer_fill_db == 1U) { - ep->xfer_buff += TxByteNbre; - ep->xfer_count += TxByteNbre; + ep->xfer_buff += TxPctSize; + ep->xfer_count += TxPctSize; /* Calculate the len of the new buffer to fill */ if (ep->xfer_len_db >= ep->maxpacket) @@ -2118,7 +2179,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, } else if (ep->xfer_len_db == 0U) { - len = TxByteNbre; + len = TxPctSize; ep->xfer_fill_db = 0U; } else @@ -2142,6 +2203,7 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, return HAL_OK; } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ @@ -2158,5 +2220,3 @@ static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd, /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c index ae988e8..60d761e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c @@ -10,13 +10,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -101,6 +100,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr /* Configure the PMA */ ep->pmaadress = (uint16_t)pmaadress; } +#if (USE_USB_DOUBLE_BUFFER == 1U) else /* USB_DBL_BUF */ { /* Double Buffer Endpoint */ @@ -109,6 +109,7 @@ HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; } @@ -160,7 +161,7 @@ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) USB_TypeDef *USBx = hpcd->Instance; uint32_t tickstart = HAL_GetTick(); - /* Wait Detect flag or a timeout is happen*/ + /* Wait Detect flag or a timeout is happen */ while ((USBx->BCDR & USB_BCDR_DCDET) == 0U) { /* Check for the Timeout */ @@ -332,5 +333,3 @@ __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef m /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c index 224472a..7127cb4 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr.c @@ -11,13 +11,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -651,4 +650,3 @@ __weak void HAL_PWR_PVDCallback(void) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c index babc1ab..05577aa 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c @@ -11,13 +11,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1181,4 +1180,3 @@ void HAL_PWREx_DisableUCPDDeadBattery(void) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c index ada09ba..53a22b8 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_qspi.c @@ -14,6 +14,17 @@ * + Errors management and abort functionality * * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim =============================================================================== ##### How to use this driver ##### @@ -133,7 +144,7 @@ The compilation define USE_HAL_QSPI_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_QSPI_RegisterCallback() to register a user callback, + Use Functions HAL_QSPI_RegisterCallback() to register a user callback, it allows to register following callbacks: (+) ErrorCallback : callback when error occurs. (+) AbortCpltCallback : callback when abort is completed. @@ -150,7 +161,7 @@ This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - Use function @ref HAL_QSPI_UnRegisterCallback() to reset a callback to the default + Use function HAL_QSPI_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. It allows to reset following callbacks: (+) ErrorCallback : callback when error occurs. (+) AbortCpltCallback : callback when abort is completed. @@ -166,12 +177,12 @@ (+) MspDeInitCallback : QSPI MspDeInit. This function) takes as parameters the HAL peripheral handle and the Callback ID. - By default, after the @ref HAL_QSPI_Init and if the state is HAL_QSPI_STATE_RESET + By default, after the HAL_QSPI_Init and if the state is HAL_QSPI_STATE_RESET all callbacks are reset to the corresponding legacy weak (surcharged) functions. Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_QSPI_Init - and @ref HAL_QSPI_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_QSPI_Init and @ref HAL_QSPI_DeInit + reset to the legacy weak (surcharged) functions in the HAL_QSPI_Init + and HAL_QSPI_DeInit only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_QSPI_Init and HAL_QSPI_DeInit keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in READY state only. @@ -179,8 +190,8 @@ in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_QSPI_RegisterCallback before calling @ref HAL_QSPI_DeInit - or @ref HAL_QSPI_Init function. + using HAL_QSPI_RegisterCallback before calling HAL_QSPI_DeInit + or HAL_QSPI_Init function. When The compilation define USE_HAL_QSPI_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available @@ -194,17 +205,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -314,9 +314,6 @@ HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) assert_param(IS_QSPI_FLASH_ID(hqspi->Init.FlashID)); } - /* Process locked */ - __HAL_LOCK(hqspi); - if(hqspi->State == HAL_QSPI_STATE_RESET) { /* Allocate lock resource and initialize it */ @@ -400,9 +397,6 @@ HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi) return HAL_ERROR; } - /* Process locked */ - __HAL_LOCK(hqspi); - /* Disable the QSPI Peripheral Clock */ __HAL_QSPI_DISABLE(hqspi); @@ -728,7 +722,7 @@ void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - + /* Error callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->ErrorCallback(hqspi); @@ -1359,10 +1353,10 @@ HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pDat { /* Process unlocked */ __HAL_UNLOCK(hqspi); - + /* Enable the QSPI transfer error Interrupt */ __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); - + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); } @@ -1507,10 +1501,10 @@ HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData /* Process unlocked */ __HAL_UNLOCK(hqspi); - + /* Enable the QSPI transfer error Interrupt */ __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE); - + /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); } @@ -2341,7 +2335,7 @@ HAL_StatusTypeDef HAL_QSPI_Abort_IT(QSPI_HandleTypeDef *hqspi) { /* Change state of QSPI */ hqspi->State = HAL_QSPI_STATE_READY; - + /* Abort Complete callback */ #if (USE_HAL_QSPI_REGISTER_CALLBACKS == 1) hqspi->AbortCpltCallback(hqspi); @@ -2783,6 +2777,4 @@ static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uin * @} */ -#endif /* defined(QUADSPI) || defined(QUADSPI1) || defined(QUADSPI2) */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +#endif /* defined(QUADSPI) */ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c index ec2e8e6..8c6fe27 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c @@ -39,14 +39,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -83,9 +81,13 @@ /** @defgroup RCC_Private_Macros RCC Private Macros * @{ */ -#define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() -#define MCO1_GPIO_PORT GPIOA -#define MCO1_PIN GPIO_PIN_8 +#define RCC_GET_MCO_GPIO_PIN(__RCC_MCOx__) ((__RCC_MCOx__) & GPIO_PIN_MASK) + +#define RCC_GET_MCO_GPIO_AF(__RCC_MCOx__) (((__RCC_MCOx__) & RCC_MCO_GPIOAF_MASK) >> RCC_MCO_GPIOAF_POS) + +#define RCC_GET_MCO_GPIO_INDEX(__RCC_MCOx__) (((__RCC_MCOx__) & RCC_MCO_GPIOPORT_MASK) >> RCC_MCO_GPIOPORT_POS) + +#define RCC_GET_MCO_GPIO_PORT(__RCC_MCOx__) (AHB2PERIPH_BASE + ((0x00000400UL) * RCC_GET_MCO_GPIO_INDEX(__RCC_MCOx__))) #define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \ (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__))) @@ -961,11 +963,16 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui */ /** - * @brief Select the clock source to output on MCO pin(PA8). - * @note PA8 should be configured in alternate function mode. + * @brief Select the clock source to output on MCO pin(PA8/PG10). + * @note PA8/PG10 should be configured in alternate function mode. + * @note The default configuration of the GPIOG pin 10 (PG10) is set to reset mode (NRST pin) + * and user shall set the NRST_MODE Bit in the FLASH OPTR register to be able to use it + * as an MCO pin. + * The @ref HAL_FLASHEx_OBProgram() API can be used to configure the NRST_MODE Bit value. * @param RCC_MCOx specifies the output direction for the clock source. * For STM32G4xx family this parameter can have only one value: - * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + * @arg @ref RCC_MCO_PA8 Clock source to output on MCO1 pin(PA8). + * @arg @ref RCC_MCO_PG10 Clock source to output on MCO1 pin(PG10). * @param RCC_MCOSource specifies the clock source to output. * This parameter can be one of the following values: * @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled, no clock on MCO @@ -987,29 +994,41 @@ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, ui */ void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) { - GPIO_InitTypeDef GPIO_InitStruct; + GPIO_InitTypeDef gpio_initstruct; + uint32_t mcoindex; + uint32_t mco_gpio_index; + GPIO_TypeDef * mco_gpio_port; /* Check the parameters */ assert_param(IS_RCC_MCO(RCC_MCOx)); - assert_param(IS_RCC_MCODIV(RCC_MCODiv)); - assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); - /* Prevent unused argument(s) compilation warning if no assert_param check */ - UNUSED(RCC_MCOx); + /* Common GPIO init parameters */ + gpio_initstruct.Mode = GPIO_MODE_AF_PP; + gpio_initstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + gpio_initstruct.Pull = GPIO_NOPULL; - /* MCO Clock Enable */ - MCO1_CLK_ENABLE(); + /* Get MCOx selection */ + mcoindex = RCC_MCOx & RCC_MCO_INDEX_MASK; - /* Configure the MCO1 pin in alternate function mode */ - GPIO_InitStruct.Pin = MCO1_PIN; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Alternate = GPIO_AF0_MCO; - HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); + /* Get MCOx GPIO Port */ + mco_gpio_port = (GPIO_TypeDef *) RCC_GET_MCO_GPIO_PORT(RCC_MCOx); - /* Mask MCOSEL[] and MCOPRE[] bits then set MCO1 clock source and prescaler */ - MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv)); + /* MCOx Clock Enable */ + mco_gpio_index = RCC_GET_MCO_GPIO_INDEX(RCC_MCOx); + SET_BIT(RCC->AHB2ENR, (1UL << mco_gpio_index )); + + /* Configure the MCOx pin in alternate function mode */ + gpio_initstruct.Pin = RCC_GET_MCO_GPIO_PIN(RCC_MCOx); + gpio_initstruct.Alternate = RCC_GET_MCO_GPIO_AF(RCC_MCOx); + HAL_GPIO_Init(mco_gpio_port, &gpio_initstruct); + + if (mcoindex == RCC_MCO1_INDEX) + { + assert_param(IS_RCC_MCODIV(RCC_MCODiv)); + assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); + /* Mask MCOSEL[] and MCOPRE[] bits then set MCO clock source and prescaler */ + MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv)); + } } /** @@ -1380,4 +1399,3 @@ static uint32_t RCC_GetSysClockFreqFromPLLSource(void) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c index 25a772a..acd2664 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc_ex.c @@ -12,14 +12,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ @@ -1824,5 +1822,4 @@ __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c index a923563..4f077de 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rng.c @@ -9,6 +9,17 @@ * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -31,8 +42,8 @@ allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_RNG_RegisterCallback() to register a user callback. - Function @ref HAL_RNG_RegisterCallback() allows to register following callbacks: + Use Function HAL_RNG_RegisterCallback() to register a user callback. + Function HAL_RNG_RegisterCallback() allows to register following callbacks: (+) ErrorCallback : RNG Error Callback. (+) MspInitCallback : RNG MspInit. (+) MspDeInitCallback : RNG MspDeInit. @@ -40,9 +51,9 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_RNG_UnRegisterCallback() to reset a callback to the default + Use function HAL_RNG_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. - @ref HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle, + HAL_RNG_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) ErrorCallback : RNG Error Callback. @@ -51,16 +62,16 @@ [..] For specific callback ReadyDataCallback, use dedicated register callbacks: - respectively @ref HAL_RNG_RegisterReadyDataCallback() , @ref HAL_RNG_UnRegisterReadyDataCallback(). + respectively HAL_RNG_RegisterReadyDataCallback() , HAL_RNG_UnRegisterReadyDataCallback(). [..] - By default, after the @ref HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET + By default, after the HAL_RNG_Init() and when the state is HAL_RNG_STATE_RESET all callbacks are set to the corresponding weak (surcharged) functions: - example @ref HAL_RNG_ErrorCallback(). + example HAL_RNG_ErrorCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_RNG_Init() - and @ref HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_RNG_Init() and @ref HAL_RNG_DeInit() + reset to the legacy weak (surcharged) functions in the HAL_RNG_Init() + and HAL_RNG_DeInit() only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_RNG_Init() and HAL_RNG_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). [..] @@ -69,8 +80,8 @@ in HAL_RNG_STATE_READY or HAL_RNG_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_RNG_RegisterCallback() before calling @ref HAL_RNG_DeInit() - or @ref HAL_RNG_Init() function. + using HAL_RNG_RegisterCallback() before calling HAL_RNG_DeInit() + or HAL_RNG_Init() function. [..] When The compilation define USE_HAL_RNG_REGISTER_CALLBACKS is set to 0 or @@ -79,17 +90,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -129,8 +129,8 @@ */ /** @addtogroup RNG_Exported_Functions_Group1 - * @brief Initialization and configuration functions - * + * @brief Initialization and configuration functions + * @verbatim =============================================================================== ##### Initialization and configuration functions ##### @@ -301,7 +301,8 @@ __weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng) * @param pCallback pointer to the Callback function * @retval HAL status */ -HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID, pRNG_CallbackTypeDef pCallback) +HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID, + pRNG_CallbackTypeDef pCallback) { HAL_StatusTypeDef status = HAL_OK; @@ -318,44 +319,44 @@ HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_Call { switch (CallbackID) { - case HAL_RNG_ERROR_CB_ID : - hrng->ErrorCallback = pCallback; - break; + case HAL_RNG_ERROR_CB_ID : + hrng->ErrorCallback = pCallback; + break; - case HAL_RNG_MSPINIT_CB_ID : - hrng->MspInitCallback = pCallback; - break; + case HAL_RNG_MSPINIT_CB_ID : + hrng->MspInitCallback = pCallback; + break; - case HAL_RNG_MSPDEINIT_CB_ID : - hrng->MspDeInitCallback = pCallback; - break; + case HAL_RNG_MSPDEINIT_CB_ID : + hrng->MspDeInitCallback = pCallback; + break; - default : - /* Update the error code */ - hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - break; + default : + /* Update the error code */ + hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; + /* Return error status */ + status = HAL_ERROR; + break; } } else if (HAL_RNG_STATE_RESET == hrng->State) { switch (CallbackID) { - case HAL_RNG_MSPINIT_CB_ID : - hrng->MspInitCallback = pCallback; - break; + case HAL_RNG_MSPINIT_CB_ID : + hrng->MspInitCallback = pCallback; + break; - case HAL_RNG_MSPDEINIT_CB_ID : - hrng->MspDeInitCallback = pCallback; - break; + case HAL_RNG_MSPDEINIT_CB_ID : + hrng->MspDeInitCallback = pCallback; + break; - default : - /* Update the error code */ - hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - break; + default : + /* Update the error code */ + hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; + /* Return error status */ + status = HAL_ERROR; + break; } } else @@ -393,44 +394,44 @@ HAL_StatusTypeDef HAL_RNG_UnRegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_Ca { switch (CallbackID) { - case HAL_RNG_ERROR_CB_ID : - hrng->ErrorCallback = HAL_RNG_ErrorCallback; /* Legacy weak ErrorCallback */ - break; + case HAL_RNG_ERROR_CB_ID : + hrng->ErrorCallback = HAL_RNG_ErrorCallback; /* Legacy weak ErrorCallback */ + break; - case HAL_RNG_MSPINIT_CB_ID : - hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */ - break; + case HAL_RNG_MSPINIT_CB_ID : + hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */ + break; - case HAL_RNG_MSPDEINIT_CB_ID : - hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspDeInit */ - break; + case HAL_RNG_MSPDEINIT_CB_ID : + hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspDeInit */ + break; - default : - /* Update the error code */ - hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - break; + default : + /* Update the error code */ + hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; + /* Return error status */ + status = HAL_ERROR; + break; } } else if (HAL_RNG_STATE_RESET == hrng->State) { switch (CallbackID) { - case HAL_RNG_MSPINIT_CB_ID : - hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */ - break; + case HAL_RNG_MSPINIT_CB_ID : + hrng->MspInitCallback = HAL_RNG_MspInit; /* Legacy weak MspInit */ + break; - case HAL_RNG_MSPDEINIT_CB_ID : - hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspInit */ - break; + case HAL_RNG_MSPDEINIT_CB_ID : + hrng->MspDeInitCallback = HAL_RNG_MspDeInit; /* Legacy weak MspInit */ + break; - default : - /* Update the error code */ - hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; - /* Return error status */ - status = HAL_ERROR; - break; + default : + /* Update the error code */ + hrng->ErrorCode = HAL_RNG_ERROR_INVALID_CALLBACK; + /* Return error status */ + status = HAL_ERROR; + break; } } else @@ -520,8 +521,8 @@ HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng) */ /** @addtogroup RNG_Exported_Functions_Group2 - * @brief Peripheral Control functions - * + * @brief Peripheral Control functions + * @verbatim =============================================================================== ##### Peripheral Control functions ##### @@ -538,11 +539,11 @@ HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng) /** * @brief Generates a 32-bit random number. * @note This function checks value of RNG_FLAG_DRDY flag to know if valid - * random number is available in the DR register (RNG_FLAG_DRDY flag set + * random number is available in the DR register (RNG_FLAG_DRDY flag set * whenever a random number is available through the RNG_DR register). - * After transitioning from 0 to 1 (random number available), - * RNG_FLAG_DRDY flag remains high until output buffer becomes empty after reading - * four words from the RNG_DR register, i.e. further function calls + * After transitioning from 0 to 1 (random number available), + * RNG_FLAG_DRDY flag remains high until output buffer becomes empty after reading + * four words from the RNG_DR register, i.e. further function calls * will immediately return a new u32 random number (additional words are * available and can be read by the application, till RNG_FLAG_DRDY flag remains high). * @note When no more random number data is available in DR register, RNG_FLAG_DRDY @@ -575,11 +576,15 @@ HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t { if ((HAL_GetTick() - tickstart) > RNG_TIMEOUT_VALUE) { - hrng->State = HAL_RNG_STATE_READY; - hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT; - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - return HAL_ERROR; + /* New check to avoid false timeout detection in case of preemption */ + if (__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET) + { + hrng->State = HAL_RNG_STATE_READY; + hrng->ErrorCode = HAL_RNG_ERROR_TIMEOUT; + /* Process Unlocked */ + __HAL_UNLOCK(hrng); + return HAL_ERROR; + } } } @@ -693,6 +698,8 @@ void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) /* Clear the clock error flag */ __HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI | RNG_IT_SEI); + + return; } /* Check RNG data ready interrupt occurred */ @@ -738,7 +745,7 @@ uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng) * @note When RNG_FLAG_DRDY flag value is set, first random number has been read * from DR register in IRQ Handler and is provided as callback parameter. * Depending on valid data available in the conditioning output buffer, - * additional words can be read by the application from DR register till + * additional words can be read by the application from DR register till * DRDY bit remains high. * @param hrng pointer to a RNG_HandleTypeDef structure that contains * the configuration information for RNG. @@ -775,8 +782,8 @@ __weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng) /** @addtogroup RNG_Exported_Functions_Group3 - * @brief Peripheral State functions - * + * @brief Peripheral State functions + * @verbatim =============================================================================== ##### Peripheral State functions ##### @@ -804,7 +811,7 @@ HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng) * @brief Return the RNG handle error code. * @param hrng: pointer to a RNG_HandleTypeDef structure. * @retval RNG Error Code -*/ + */ uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng) { /* Return RNG Error Code */ @@ -830,4 +837,3 @@ uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c index 069ea5f..4465792 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc.c @@ -15,6 +15,17 @@ * + RTC Tamper and TimeStamp Pins Selection * + Interrupts and flags management * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim =============================================================================== ##### RTC Operating Condition ##### @@ -99,10 +110,10 @@ [..] The compilation define USE_RTC_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Function @ref HAL_RTC_RegisterCallback() to register an interrupt callback. + Use Function HAL_RTC_RegisterCallback() to register an interrupt callback. [..] - Function @ref HAL_RTC_RegisterCallback() allows to register following callbacks: + Function HAL_RTC_RegisterCallback() allows to register following callbacks: (+) AlarmAEventCallback : RTC Alarm A Event callback. (+) AlarmBEventCallback : RTC Alarm B Event callback. (+) TimeStampEventCallback : RTC TimeStamp Event callback. @@ -146,9 +157,9 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_RTC_UnRegisterCallback() to reset a callback to the default + Use function HAL_RTC_UnRegisterCallback() to reset a callback to the default weak function. - @ref HAL_RTC_UnRegisterCallback() takes as parameters the HAL peripheral handle, + HAL_RTC_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) AlarmAEventCallback : RTC Alarm A Event callback. @@ -195,13 +206,13 @@ (+) MspDeInitCallback : RTC MspDeInit callback. [..] - By default, after the @ref HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, + By default, after the HAL_RTC_Init() and when the state is HAL_RTC_STATE_RESET, all callbacks are set to the corresponding weak functions : - examples @ref AlarmAEventCallback(), @ref TimeStampEventCallback(). + examples AlarmAEventCallback(), TimeStampEventCallback(). Exception done for MspInit and MspDeInit callbacks that are reset to the legacy weak function - in the @ref HAL_RTC_Init()/@ref HAL_RTC_DeInit() only when these callbacks are null + in the HAL_RTC_Init()/HAL_RTC_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, @ref HAL_RTC_Init()/@ref HAL_RTC_DeInit() + If not, MspInit or MspDeInit are not null, HAL_RTC_Init()/HAL_RTC_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand) [..] @@ -210,8 +221,8 @@ in HAL_RTC_STATE_READY or HAL_RTC_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_RTC_RegisterCallback() before calling @ref HAL_RTC_DeInit() - or @ref HAL_RTC_Init() function. + using HAL_RTC_RegisterCallback() before calling HAL_RTC_DeInit() + or HAL_RTC_Init() function. [..] When The compilation define USE_HAL_RTC_REGISTER_CALLBACKS is set to 0 or @@ -220,16 +231,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -380,19 +381,19 @@ HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc) if (status == HAL_OK) { /* Clear RTC_CR FMT, OSEL and POL Bits */ - CLEAR_BIT(RTC->CR, (RTC_CR_FMT | RTC_CR_POL | RTC_CR_OSEL | RTC_CR_TAMPOE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_FMT | RTC_CR_POL | RTC_CR_OSEL | RTC_CR_TAMPOE)); /* Set RTC_CR register */ - SET_BIT(RTC->CR, (hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity)); + SET_BIT(hrtc->Instance->CR, (hrtc->Init.HourFormat | hrtc->Init.OutPut | hrtc->Init.OutPutPolarity)); /* Configure the RTC PRER */ - WRITE_REG(RTC->PRER, ((hrtc->Init.SynchPrediv) | (hrtc->Init.AsynchPrediv << RTC_PRER_PREDIV_A_Pos))); + WRITE_REG(hrtc->Instance->PRER, ((hrtc->Init.SynchPrediv) | (hrtc->Init.AsynchPrediv << RTC_PRER_PREDIV_A_Pos))); /* Exit Initialization mode */ status = RTC_ExitInitMode(hrtc); if (status == HAL_OK) { - MODIFY_REG(RTC->CR, \ + MODIFY_REG(hrtc->Instance->CR, \ RTC_CR_TAMPALRM_PU | RTC_CR_TAMPALRM_TYPE | RTC_CR_OUT2EN, \ hrtc->Init.OutPutPullUp | hrtc->Init.OutPutType | hrtc->Init.OutPutRemap); } @@ -437,21 +438,21 @@ HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc) else { /* Reset all RTC CR register bits */ - CLEAR_REG(RTC->CR); - WRITE_REG(RTC->DR, (uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0)); - CLEAR_REG(RTC->TR); - WRITE_REG(RTC->WUTR, RTC_WUTR_WUT); - WRITE_REG(RTC->PRER, ((uint32_t)(RTC_PRER_PREDIV_A | 0xFFU))); - CLEAR_REG(RTC->ALRMAR); - CLEAR_REG(RTC->ALRMBR); - CLEAR_REG(RTC->SHIFTR); - CLEAR_REG(RTC->CALR); - CLEAR_REG(RTC->ALRMASSR); - CLEAR_REG(RTC->ALRMBSSR); - WRITE_REG(RTC->SCR, RTC_SCR_CITSF | RTC_SCR_CTSOVF | RTC_SCR_CTSF | RTC_SCR_CWUTF | RTC_SCR_CALRBF | RTC_SCR_CALRAF); + CLEAR_REG(hrtc->Instance->CR); + WRITE_REG(hrtc->Instance->DR, (uint32_t)(RTC_DR_WDU_0 | RTC_DR_MU_0 | RTC_DR_DU_0)); + CLEAR_REG(hrtc->Instance->TR); + WRITE_REG(hrtc->Instance->WUTR, RTC_WUTR_WUT); + WRITE_REG(hrtc->Instance->PRER, ((uint32_t)(RTC_PRER_PREDIV_A | 0xFFU))); + CLEAR_REG(hrtc->Instance->ALRMAR); + CLEAR_REG(hrtc->Instance->ALRMBR); + CLEAR_REG(hrtc->Instance->SHIFTR); + CLEAR_REG(hrtc->Instance->CALR); + CLEAR_REG(hrtc->Instance->ALRMASSR); + CLEAR_REG(hrtc->Instance->ALRMBSSR); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CITSF | RTC_SCR_CTSOVF | RTC_SCR_CTSF | RTC_SCR_CWUTF | RTC_SCR_CALRBF | RTC_SCR_CALRAF); /* Exit initialization mode */ - CLEAR_BIT(RTC->ICSR, RTC_ICSR_INIT); + CLEAR_BIT(hrtc->Instance->ICSR, RTC_ICSR_INIT); status = HAL_RTC_WaitForSynchro(hrtc); @@ -877,7 +878,7 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim { if (Format == RTC_FORMAT_BIN) { - if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U) { assert_param(IS_RTC_HOUR12(sTime->Hours)); assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); @@ -897,7 +898,7 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim } else { - if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U) { assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sTime->Hours))); assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat)); @@ -916,13 +917,13 @@ HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim } /* Set the RTC_TR register */ - WRITE_REG(RTC->TR, (tmpreg & RTC_TR_RESERVED_MASK)); + WRITE_REG(hrtc->Instance->TR, (tmpreg & RTC_TR_RESERVED_MASK)); /* This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */ - CLEAR_BIT(RTC->CR, RTC_CR_BKP); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BKP); /* This interface is deprecated. To manage Daylight Saving Time, please use HAL_RTC_DST_xxx functions */ - SET_BIT(RTC->CR, (sTime->DayLightSaving | sTime->StoreOperation)); + SET_BIT(hrtc->Instance->CR, (sTime->DayLightSaving | sTime->StoreOperation)); /* Exit Initialization mode */ status = RTC_ExitInitMode(hrtc); @@ -964,19 +965,17 @@ HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDef *sTim { uint32_t tmpreg; - UNUSED(hrtc); - /* Check the parameters */ assert_param(IS_RTC_FORMAT(Format)); /* Get subseconds structure field from the corresponding register*/ - sTime->SubSeconds = READ_REG(RTC->SSR); + sTime->SubSeconds = READ_REG(hrtc->Instance->SSR); /* Get SecondFraction structure field from the corresponding register field*/ - sTime->SecondFraction = (uint32_t)(READ_REG(RTC->PRER) & RTC_PRER_PREDIV_S); + sTime->SecondFraction = (uint32_t)(READ_REG(hrtc->Instance->PRER) & RTC_PRER_PREDIV_S); /* Get the TR register */ - tmpreg = (uint32_t)(READ_REG(RTC->TR) & RTC_TR_RESERVED_MASK); + tmpreg = (uint32_t)(READ_REG(hrtc->Instance->TR) & RTC_TR_RESERVED_MASK); /* Fill the structure fields with the read parameters */ sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT | RTC_TR_HU)) >> RTC_TR_HU_Pos); @@ -1057,7 +1056,7 @@ HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDat if (status == HAL_OK) { /* Set the RTC_DR register */ - WRITE_REG(RTC->DR, (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK)); + WRITE_REG(hrtc->Instance->DR, (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK)); /* Exit Initialization mode */ status = RTC_ExitInitMode(hrtc); @@ -1094,13 +1093,11 @@ HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef *hrtc, RTC_DateTypeDef *sDat { uint32_t datetmpreg; - UNUSED(hrtc); - /* Check the parameters */ assert_param(IS_RTC_FORMAT(Format)); /* Get the DR register */ - datetmpreg = (uint32_t)(READ_REG(RTC->DR) & RTC_DR_RESERVED_MASK); + datetmpreg = (uint32_t)(READ_REG(hrtc->Instance->DR) & RTC_DR_RESERVED_MASK); /* Fill the structure fields with the read parameters */ sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT | RTC_DR_YU)) >> RTC_DR_YU_Pos); @@ -1167,7 +1164,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA if (Format == RTC_FORMAT_BIN) { - if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U) { assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); @@ -1200,7 +1197,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } else /* Format BCD */ { - if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U) { assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); @@ -1245,14 +1242,14 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA { /* Disable the Alarm A interrupt */ /* In case of interrupt mode is used, the interrupt source must disabled */ - CLEAR_BIT(RTC->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE)); /* Clear flag alarm A */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRAF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF); tickstart = HAL_GetTick(); /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRAWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1268,24 +1265,24 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } - WRITE_REG(RTC->ALRMAR, tmpreg); + WRITE_REG(hrtc->Instance->ALRMAR, tmpreg); /* Configure the Alarm A Sub Second register */ - WRITE_REG(RTC->ALRMASSR, subsecondtmpreg); + WRITE_REG(hrtc->Instance->ALRMASSR, subsecondtmpreg); /* Configure the Alarm state: Enable Alarm */ - SET_BIT(RTC->CR, RTC_CR_ALRAE); + SET_BIT(hrtc->Instance->CR, RTC_CR_ALRAE); } else { /* Disable the Alarm B interrupt */ /* In case of interrupt mode is used, the interrupt source must disabled */ - CLEAR_BIT(RTC->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE)); /* Clear flag alarm B */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRBF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF); tickstart = HAL_GetTick(); /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRBWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRBWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1301,11 +1298,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA } } - WRITE_REG(RTC->ALRMBR, tmpreg); + WRITE_REG(hrtc->Instance->ALRMBR, tmpreg); /* Configure the Alarm B Sub Second register */ - WRITE_REG(RTC->ALRMBSSR, subsecondtmpreg); + WRITE_REG(hrtc->Instance->ALRMBSSR, subsecondtmpreg); /* Configure the Alarm state: Enable Alarm */ - SET_BIT(RTC->CR, RTC_CR_ALRBE); + SET_BIT(hrtc->Instance->CR, RTC_CR_ALRBE); } /* Enable the write protection for RTC registers */ @@ -1354,7 +1351,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef if (Format == RTC_FORMAT_BIN) { - if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U) { assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours)); assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); @@ -1387,7 +1384,7 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } else /* Format BCD */ { - if (READ_BIT(RTC->CR, RTC_CR_FMT) != 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_FMT) != 0U) { assert_param(IS_RTC_HOUR12(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours))); assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat)); @@ -1431,15 +1428,15 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef if (sAlarm->Alarm == RTC_ALARM_A) { /* Disable the Alarm A interrupt */ - CLEAR_BIT(RTC->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE)); /* Clear flag alarm A */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRAF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF); __HAL_RTC_ALARM_EXTI_CLEAR_IT(); tickstart = HAL_GetTick(); /* Wait till RTC ALRAWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRAWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1455,24 +1452,24 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } - WRITE_REG(RTC->ALRMAR, tmpreg); + WRITE_REG(hrtc->Instance->ALRMAR, tmpreg); /* Configure the Alarm A Sub Second register */ - WRITE_REG(RTC->ALRMASSR, subsecondtmpreg); + WRITE_REG(hrtc->Instance->ALRMASSR, subsecondtmpreg); /* Configure the Alarm interrupt : Enable Alarm */ - SET_BIT(RTC->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE)); + SET_BIT(hrtc->Instance->CR, (RTC_CR_ALRAE | RTC_CR_ALRAIE)); } else { /* Disable the Alarm B interrupt */ - CLEAR_BIT(RTC->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE)); /* Clear flag alarm B */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRBF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF); __HAL_RTC_ALARM_EXTI_CLEAR_IT(); tickstart = HAL_GetTick(); /* Wait till RTC ALRBWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRBWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRBWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1488,11 +1485,11 @@ HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef } } - WRITE_REG(RTC->ALRMBR, tmpreg); + WRITE_REG(hrtc->Instance->ALRMBR, tmpreg); /* Configure the Alarm B Sub Second register */ - WRITE_REG(RTC->ALRMBSSR, subsecondtmpreg); + WRITE_REG(hrtc->Instance->ALRMBSSR, subsecondtmpreg); /* Configure the Alarm B interrupt : Enable Alarm */ - SET_BIT(RTC->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE)); + SET_BIT(hrtc->Instance->CR, (RTC_CR_ALRBE | RTC_CR_ALRBIE)); } /* RTC Alarm Interrupt Configuration: EXTI configuration */ @@ -1539,13 +1536,13 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar { /* AlarmA */ /* In case of interrupt mode is used, the interrupt source must disabled */ - CLEAR_BIT(RTC->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_ALRAE | RTC_CR_ALRAIE); __HAL_RTC_ALARM_EXTI_CLEAR_IT(); tickstart = HAL_GetTick(); /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRAWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRAWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1565,13 +1562,13 @@ HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alar { /* AlarmB */ /* In case of interrupt mode is used, the interrupt source must disabled */ - CLEAR_BIT(RTC->CR, RTC_CR_ALRBE | RTC_CR_ALRBIE); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_ALRBE | RTC_CR_ALRBIE); __HAL_RTC_ALARM_EXTI_CLEAR_IT(); tickstart = HAL_GetTick(); /* Wait till RTC ALRxWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_ALRBWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_ALRBWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1616,8 +1613,6 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA { uint32_t tmpreg, subsecondtmpreg; - UNUSED(hrtc); - /* Check the parameters */ assert_param(IS_RTC_FORMAT(Format)); assert_param(IS_RTC_ALARM(Alarm)); @@ -1627,8 +1622,8 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA /* AlarmA */ sAlarm->Alarm = RTC_ALARM_A; - tmpreg = READ_REG(RTC->ALRMAR); - subsecondtmpreg = (uint32_t)(READ_REG(RTC->ALRMASSR) & RTC_ALRMASSR_SS); + tmpreg = READ_REG(hrtc->Instance->ALRMAR); + subsecondtmpreg = (uint32_t)(READ_REG(hrtc->Instance->ALRMASSR) & RTC_ALRMASSR_SS); /* Fill the structure with the read parameters */ sAlarm->AlarmTime.Hours = (uint8_t)((tmpreg & (RTC_ALRMAR_HT | RTC_ALRMAR_HU)) >> RTC_ALRMAR_HU_Pos); @@ -1644,8 +1639,8 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA { sAlarm->Alarm = RTC_ALARM_B; - tmpreg = READ_REG(RTC->ALRMBR); - subsecondtmpreg = (uint32_t)(READ_REG(RTC->ALRMBSSR) & RTC_ALRMBSSR_SS); + tmpreg = READ_REG(hrtc->Instance->ALRMBR); + subsecondtmpreg = (uint32_t)(READ_REG(hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS); /* Fill the structure with the read parameters */ sAlarm->AlarmTime.Hours = (uint8_t)((tmpreg & (RTC_ALRMBR_HT | RTC_ALRMBR_HU)) >> RTC_ALRMBR_HU_Pos); @@ -1677,12 +1672,12 @@ HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef *hrtc, RTC_AlarmTypeDef *sA void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc) { /* Get interrupt status */ - uint32_t tmp = READ_REG(RTC->MISR); + uint32_t tmp = READ_REG(hrtc->Instance->MISR); if ((tmp & RTC_MISR_ALRAMF) != 0U) { /* Clear the AlarmA interrupt pending bit */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRAF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF); __HAL_RTC_ALARM_EXTI_CLEAR_IT(); #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1) @@ -1696,7 +1691,7 @@ void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef *hrtc) if ((tmp & RTC_MISR_ALRBMF) != 0U) { /* Clear the AlarmB interrupt pending bit */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRBF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF); __HAL_RTC_ALARM_EXTI_CLEAR_IT(); #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1) @@ -1737,7 +1732,7 @@ HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t T uint32_t tickstart = HAL_GetTick(); - while (READ_BIT(RTC->SR, RTC_SR_ALRAF) == 0U) + while (READ_BIT(hrtc->Instance->SR, RTC_SR_ALRAF) == 0U) { if (Timeout != HAL_MAX_DELAY) { @@ -1754,7 +1749,7 @@ HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t T } /* Clear the Alarm interrupt pending bit */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRAF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRAF); /* Change RTC state */ hrtc->State = HAL_RTC_STATE_READY; @@ -1799,15 +1794,13 @@ HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef *hrtc) { uint32_t tickstart; - UNUSED(hrtc); - /* Clear RSF flag */ - CLEAR_BIT(RTC->ICSR, RTC_ICSR_RSF); + CLEAR_BIT(hrtc->Instance->ICSR, RTC_ICSR_RSF); tickstart = HAL_GetTick(); /* Wait the registers to be synchronised */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_RSF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_RSF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1869,17 +1862,15 @@ HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef *hrtc) uint32_t tickstart; HAL_StatusTypeDef status = HAL_OK; - UNUSED(hrtc); - /* Check if the Initialization mode is set */ - if (READ_BIT(RTC->ICSR, RTC_ICSR_INITF) == 0U) + if (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_INITF) == 0U) { /* Set the Initialization mode */ - SET_BIT(RTC->ICSR, RTC_ICSR_INIT); + SET_BIT(hrtc->Instance->ICSR, RTC_ICSR_INIT); tickstart = HAL_GetTick(); /* Wait till RTC is in INIT state and if Time out is reached exit */ - while ((READ_BIT(RTC->ICSR, RTC_ICSR_INITF) == 0U) && (status != HAL_TIMEOUT)) + while ((READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_INITF) == 0U) && (status != HAL_TIMEOUT)) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -1903,10 +1894,10 @@ HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) HAL_StatusTypeDef status = HAL_OK; /* Exit Initialization mode */ - CLEAR_BIT(RTC->ICSR, RTC_ICSR_INIT); + CLEAR_BIT(hrtc->Instance->ICSR, RTC_ICSR_INIT); /* If CR_BYPSHAD bit = 0, wait for synchro */ - if (READ_BIT(RTC->CR, RTC_CR_BYPSHAD) == 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD) == 0U) { if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) { @@ -1917,14 +1908,14 @@ HAL_StatusTypeDef RTC_ExitInitMode(RTC_HandleTypeDef *hrtc) else /* WA 2.9.6 Calendar initialization may fail in case of consecutive INIT mode entry */ { /* Clear BYPSHAD bit */ - CLEAR_BIT(RTC->CR, RTC_CR_BYPSHAD); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD); if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) { hrtc->State = HAL_RTC_STATE_TIMEOUT; status = HAL_TIMEOUT; } /* Restore BYPSHAD bit */ - SET_BIT(RTC->CR, RTC_CR_BYPSHAD); + SET_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD); } return status; @@ -1971,9 +1962,8 @@ uint8_t RTC_Bcd2ToByte(uint8_t Value) */ void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc) { - UNUSED(hrtc); __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - SET_BIT(RTC->CR, RTC_CR_ADD1H); + SET_BIT(hrtc->Instance->CR, RTC_CR_ADD1H); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -1985,9 +1975,8 @@ void HAL_RTC_DST_Add1Hour(RTC_HandleTypeDef *hrtc) */ void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc) { - UNUSED(hrtc); __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - SET_BIT(RTC->CR, RTC_CR_SUB1H); + SET_BIT(hrtc->Instance->CR, RTC_CR_SUB1H); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -1999,9 +1988,8 @@ void HAL_RTC_DST_Sub1Hour(RTC_HandleTypeDef *hrtc) */ void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc) { - UNUSED(hrtc); __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - SET_BIT(RTC->CR, RTC_CR_BKP); + SET_BIT(hrtc->Instance->CR, RTC_CR_BKP); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -2012,9 +2000,8 @@ void HAL_RTC_DST_SetStoreOperation(RTC_HandleTypeDef *hrtc) */ void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc) { - UNUSED(hrtc); __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - CLEAR_BIT(RTC->CR, RTC_CR_BKP); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BKP); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -2025,8 +2012,7 @@ void HAL_RTC_DST_ClearStoreOperation(RTC_HandleTypeDef *hrtc) */ uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc) { - UNUSED(hrtc); - return READ_BIT(RTC->CR, RTC_CR_BKP); + return READ_BIT(hrtc->Instance->CR, RTC_CR_BKP); } /** @@ -2041,5 +2027,3 @@ uint32_t HAL_RTC_DST_ReadStoreOperation(RTC_HandleTypeDef *hrtc) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c index cb661fb..21f69b6 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rtc_ex.c @@ -11,6 +11,17 @@ * + Extended Control functions * + Extended RTC features functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -89,17 +100,7 @@ (+) To read the RTC Backup Data registers, use the HAL_RTCEx_BKUPRead() function. - @endverbatim - ****************************************************************************** - * @attention - * - *

© COPYRIGHT(c) 2017 STMicroelectronics

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * + @endverbatim ****************************************************************************** */ @@ -175,13 +176,13 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp(RTC_HandleTypeDef *hrtc, uint32_t TimeS hrtc->State = HAL_RTC_STATE_BUSY; /* Get the RTC_CR register and clear the bits to be configured */ - CLEAR_BIT(RTC->CR, (RTC_CR_TSEDGE | RTC_CR_TSE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_TSEDGE | RTC_CR_TSE)); /* Disable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Configure the Time Stamp TSEDGE and Enable bits */ - SET_BIT(RTC->CR, (uint32_t)TimeStampEdge | RTC_CR_TSE); + SET_BIT(hrtc->Instance->CR, (uint32_t)TimeStampEdge | RTC_CR_TSE); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -229,16 +230,16 @@ HAL_StatusTypeDef HAL_RTCEx_SetTimeStamp_IT(RTC_HandleTypeDef *hrtc, uint32_t Ti __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Get the RTC_CR register and clear the bits to be configured */ - CLEAR_BIT(RTC->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE)); /* Configure the Time Stamp TSEDGE before Enable bit to avoid unwanted TSF setting. */ - SET_BIT(RTC->CR, (uint32_t)TimeStampEdge); + SET_BIT(hrtc->Instance->CR, (uint32_t)TimeStampEdge); /* clear interrupt flag if any */ - WRITE_REG(RTC->SCR, RTC_SCR_CITSF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CITSF); /* Enable IT timestamp */ - SET_BIT(RTC->CR, (RTC_CR_TSE | RTC_CR_TSIE)); + SET_BIT(hrtc->Instance->CR, (RTC_CR_TSE | RTC_CR_TSIE)); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -271,10 +272,10 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateTimeStamp(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* clear event or interrupt flag */ - WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); + WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); /* In case of interrupt mode is used, the interrupt source must disabled */ - CLEAR_BIT(RTC->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE)); + CLEAR_BIT(hrtc->Instance->CR, (RTC_CR_TSEDGE | RTC_CR_TSE | RTC_CR_TSIE)); __HAL_RTC_TIMESTAMP_EXTI_CLEAR_IT(); @@ -306,7 +307,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetInternalTimeStamp(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Configure the internal Time Stamp Enable bits */ - SET_BIT(RTC->CR, RTC_CR_ITSE); + SET_BIT(hrtc->Instance->CR, RTC_CR_ITSE); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -336,7 +337,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateInternalTimeStamp(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Configure the internal Time Stamp Enable bits */ - CLEAR_BIT(RTC->CR, RTC_CR_ITSE); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_ITSE); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -365,21 +366,19 @@ HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDe { uint32_t tmptime, tmpdate; - UNUSED(hrtc); - /* Check the parameters */ assert_param(IS_RTC_FORMAT(Format)); /* Get the TimeStamp time and date registers values */ - tmptime = (uint32_t)READ_BIT(RTC->TSTR, RTC_TR_RESERVED_MASK); - tmpdate = (uint32_t)READ_BIT(RTC->TSDR, RTC_DR_RESERVED_MASK); + tmptime = (uint32_t)READ_BIT(hrtc->Instance->TSTR, RTC_TR_RESERVED_MASK); + tmpdate = (uint32_t)READ_BIT(hrtc->Instance->TSDR, RTC_DR_RESERVED_MASK); /* Fill the Time structure fields with the read parameters */ sTimeStamp->Hours = (uint8_t)((tmptime & (RTC_TSTR_HT | RTC_TSTR_HU)) >> RTC_TSTR_HU_Pos); sTimeStamp->Minutes = (uint8_t)((tmptime & (RTC_TSTR_MNT | RTC_TSTR_MNU)) >> RTC_TSTR_MNU_Pos); sTimeStamp->Seconds = (uint8_t)((tmptime & (RTC_TSTR_ST | RTC_TSTR_SU)) >> RTC_TSTR_SU_Pos); sTimeStamp->TimeFormat = (uint8_t)((tmptime & (RTC_TSTR_PM)) >> RTC_TSTR_PM_Pos); - sTimeStamp->SubSeconds = (uint32_t)READ_BIT(RTC->TSSSR, RTC_TSSSR_SS); + sTimeStamp->SubSeconds = (uint32_t)READ_BIT(hrtc->Instance->TSSSR, RTC_TSSSR_SS); /* Fill the Date structure fields with the read parameters */ sTimeStampDate->Year = 0U; @@ -402,7 +401,7 @@ HAL_StatusTypeDef HAL_RTCEx_GetTimeStamp(RTC_HandleTypeDef *hrtc, RTC_TimeTypeDe } /* Clear the TIMESTAMP Flags */ - WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); + WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); return HAL_OK; } @@ -432,7 +431,7 @@ void HAL_RTCEx_TimeStampIRQHandler(RTC_HandleTypeDef *hrtc) /* Clear the EXTI Flag for RTC TimeStamp */ __HAL_RTC_TIMESTAMP_EXTI_CLEAR_FLAG(); - __IO uint32_t misr = READ_REG(RTC->MISR); + __IO uint32_t misr = READ_REG(hrtc->Instance->MISR); /* Get the TimeStamp interrupt source enable */ if ((misr & RTC_MISR_TSMF) != 0U) @@ -449,12 +448,12 @@ void HAL_RTCEx_TimeStampIRQHandler(RTC_HandleTypeDef *hrtc) { /* internal Timestamp interrupt */ /* ITSF flag is set, TSF must be cleared together with ITSF (this will clear timestamp time and date registers) */ - WRITE_REG(RTC->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); + WRITE_REG(hrtc->Instance->SCR, (RTC_SCR_CITSF | RTC_SCR_CTSF)); } else { /* Clear the TIMESTAMP interrupt pending bit (this will clear timestamp time and date registers) */ - WRITE_REG(RTC->SCR, RTC_SCR_CTSF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CTSF); } } @@ -472,12 +471,12 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTimeStampEvent(RTC_HandleTypeDef *hrtc, uint3 { uint32_t tickstart = HAL_GetTick(); - while (READ_BIT(RTC->SR, RTC_SR_TSF) == 0U) + while (READ_BIT(hrtc->Instance->SR, RTC_SR_TSF) == 0U) { - if (READ_BIT(RTC->SR, RTC_SR_TSOVF) != 0U) + if (READ_BIT(hrtc->Instance->SR, RTC_SR_TSOVF) != 0U) { /* Clear the TIMESTAMP OverRun Flag */ - WRITE_REG(RTC->SCR, RTC_SCR_CTSOVF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CTSOVF); /* Change TIMESTAMP state */ hrtc->State = HAL_RTC_STATE_ERROR; @@ -648,17 +647,17 @@ HAL_StatusTypeDef HAL_RTCEx_SetWakeUpTimer_IT(RTC_HandleTypeDef *hrtc, uint32_t } } /* Configure the Wakeup Timer counter */ - WRITE_REG(RTC->WUTR, (uint32_t)WakeUpCounter); + WRITE_REG(hrtc->Instance->WUTR, (uint32_t)WakeUpCounter); /* Configure the clock source */ - MODIFY_REG(RTC->CR, RTC_CR_WUCKSEL, (uint32_t)WakeUpClock); + MODIFY_REG(hrtc->Instance->CR, RTC_CR_WUCKSEL, (uint32_t)WakeUpClock); /* RTC WakeUpTimer Interrupt Configuration: EXTI configuration */ __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT(); __HAL_RTC_WAKEUPTIMER_EXTI_RISING_IT(); /* Configure the Interrupt in the RTC_CR register and Enable the Wakeup Timer */ - SET_BIT(RTC->CR, (RTC_CR_WUTIE | RTC_CR_WUTE)); + SET_BIT(hrtc->Instance->CR, (RTC_CR_WUTIE | RTC_CR_WUTE)); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -690,13 +689,13 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) /* Disable the Wakeup Timer */ /* In case of interrupt mode is used, the interrupt source must disabled */ - CLEAR_BIT(RTC->CR, RTC_CR_WUTE | RTC_CR_WUTIE); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_WUTE | RTC_CR_WUTIE); __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_IT(); tickstart = HAL_GetTick(); /* Wait till RTC WUTWF flag is set and if Time out is reached exit */ - while (READ_BIT(RTC->ICSR, RTC_ICSR_WUTWF) == 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_WUTWF) == 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -730,10 +729,8 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateWakeUpTimer(RTC_HandleTypeDef *hrtc) */ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) { - UNUSED(hrtc); - /* Get the counter value */ - return (uint32_t)(READ_BIT(RTC->WUTR, RTC_WUTR_WUT)); + return (uint32_t)(READ_BIT(hrtc->Instance->WUTR, RTC_WUTR_WUT)); } /** @@ -744,10 +741,10 @@ uint32_t HAL_RTCEx_GetWakeUpTimer(RTC_HandleTypeDef *hrtc) void HAL_RTCEx_WakeUpTimerIRQHandler(RTC_HandleTypeDef *hrtc) { /* Get the pending status of the WAKEUPTIMER Interrupt */ - if (READ_BIT(RTC->SR, RTC_SR_WUTF) != 0U) + if (READ_BIT(hrtc->Instance->SR, RTC_SR_WUTF) != 0U) { /* Clear the WAKEUPTIMER interrupt pending bit */ - WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CWUTF); __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_IT(); #if (USE_HAL_RTC_REGISTER_CALLBACKS == 1) @@ -789,7 +786,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin { uint32_t tickstart = HAL_GetTick(); - while (READ_BIT(RTC->SR, RTC_SR_WUTF) == 0U) + while (READ_BIT(hrtc->Instance->SR, RTC_SR_WUTF) == 0U) { if (Timeout != HAL_MAX_DELAY) { @@ -806,7 +803,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForWakeUpTimerEvent(RTC_HandleTypeDef *hrtc, uin } /* Clear the WAKEUPTIMER Flag */ - WRITE_REG(RTC->SCR, RTC_SCR_CWUTF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CWUTF); /* Change RTC state */ hrtc->State = HAL_RTC_STATE_READY; @@ -885,12 +882,12 @@ HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t Smo __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* check if a calibration is pending*/ - if (READ_BIT(RTC->ICSR, RTC_ICSR_RECALPF) != 0U) + if (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_RECALPF) != 0U) { tickstart = HAL_GetTick(); /* check if a calibration is pending*/ - while (READ_BIT(RTC->ICSR, RTC_ICSR_RECALPF) != 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_RECALPF) != 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -909,7 +906,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetSmoothCalib(RTC_HandleTypeDef *hrtc, uint32_t Smo } /* Configure the Smooth calibration settings */ - MODIFY_REG(RTC->CALR, (RTC_CALR_CALP | RTC_CALR_CALW8 | RTC_CALR_CALW16 | RTC_CALR_CALM), + MODIFY_REG(hrtc->Instance->CALR, (RTC_CALR_CALP | RTC_CALR_CALW8 | RTC_CALR_CALW16 | RTC_CALR_CALM), (uint32_t)(SmoothCalibPeriod | SmoothCalibPlusPulses | SmoothCalibMinusPulsesValue)); @@ -956,7 +953,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t Sh tickstart = HAL_GetTick(); /* Wait until the shift is completed*/ - while (READ_BIT(RTC->ICSR, RTC_ICSR_SHPF) != 0U) + while (READ_BIT(hrtc->Instance->ICSR, RTC_ICSR_SHPF) != 0U) { if ((HAL_GetTick() - tickstart) > RTC_TIMEOUT_VALUE) { @@ -973,13 +970,13 @@ HAL_StatusTypeDef HAL_RTCEx_SetSynchroShift(RTC_HandleTypeDef *hrtc, uint32_t Sh } /* Check if the reference clock detection is disabled */ - if (READ_BIT(RTC->CR, RTC_CR_REFCKON) == 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_REFCKON) == 0U) { /* Configure the Shift settings */ - MODIFY_REG(RTC->SHIFTR, RTC_SHIFTR_SUBFS, (uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S)); + MODIFY_REG(hrtc->Instance->SHIFTR, RTC_SHIFTR_SUBFS, (uint32_t)(ShiftSubFS) | (uint32_t)(ShiftAdd1S)); /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ - if (READ_BIT(RTC->CR, RTC_CR_BYPSHAD) == 0U) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD) == 0U) { if (HAL_RTC_WaitForSynchro(hrtc) != HAL_OK) { @@ -1044,10 +1041,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetCalibrationOutPut(RTC_HandleTypeDef *hrtc, uint32 __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Configure the RTC_CR register */ - MODIFY_REG(RTC->CR, RTC_CR_COSEL, (uint32_t)CalibOutput); + MODIFY_REG(hrtc->Instance->CR, RTC_CR_COSEL, (uint32_t)CalibOutput); /* Enable calibration output */ - SET_BIT(RTC->CR, RTC_CR_COE); + SET_BIT(hrtc->Instance->CR, RTC_CR_COE); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1077,7 +1074,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateCalibrationOutPut(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Disable calibration output */ - CLEAR_BIT(RTC->CR, RTC_CR_COE); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_COE); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1113,7 +1110,7 @@ HAL_StatusTypeDef HAL_RTCEx_SetRefClock(RTC_HandleTypeDef *hrtc) if (status == HAL_OK) { /* Enable clockref detection */ - SET_BIT(RTC->CR, RTC_CR_REFCKON); + SET_BIT(hrtc->Instance->CR, RTC_CR_REFCKON); /* Exit Initialization mode */ status = RTC_ExitInitMode(hrtc); @@ -1155,7 +1152,7 @@ HAL_StatusTypeDef HAL_RTCEx_DeactivateRefClock(RTC_HandleTypeDef *hrtc) if (status == HAL_OK) { /* Disable clockref detection */ - CLEAR_BIT(RTC->CR, RTC_CR_REFCKON); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_REFCKON); /* Exit Initialization mode */ status = RTC_ExitInitMode(hrtc); @@ -1193,7 +1190,7 @@ HAL_StatusTypeDef HAL_RTCEx_EnableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Set the BYPSHAD bit */ - SET_BIT(RTC->CR, RTC_CR_BYPSHAD); + SET_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1225,7 +1222,7 @@ HAL_StatusTypeDef HAL_RTCEx_DisableBypassShadow(RTC_HandleTypeDef *hrtc) __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); /* Reset the BYPSHAD bit */ - CLEAR_BIT(RTC->CR, RTC_CR_BYPSHAD); + CLEAR_BIT(hrtc->Instance->CR, RTC_CR_BYPSHAD); /* Enable the write protection for RTC registers */ __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); @@ -1283,7 +1280,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t { uint32_t tickstart = HAL_GetTick(); - while (READ_BIT(RTC->SR, RTC_SR_ALRBF) == 0U) + while (READ_BIT(hrtc->Instance->SR, RTC_SR_ALRBF) == 0U) { if (Timeout != HAL_MAX_DELAY) { @@ -1300,7 +1297,7 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t } /* Clear the Alarm Flag */ - WRITE_REG(RTC->SCR, RTC_SCR_CALRBF); + WRITE_REG(hrtc->Instance->SCR, RTC_SCR_CALRBF); /* Change RTC state */ hrtc->State = HAL_RTC_STATE_READY; @@ -1349,7 +1346,6 @@ HAL_StatusTypeDef HAL_RTCEx_PollForAlarmBEvent(RTC_HandleTypeDef *hrtc, uint32_t HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper) { uint32_t tmpreg; - UNUSED(hrtc); /* Check the parameters */ assert_param(IS_RTC_TAMPER(sTamper->Tamper)); @@ -1390,10 +1386,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef sTamper->PrechargeDuration | sTamper->TamperPullUp)); /* timestamp on tamper */ - if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != (sTamper->TimeStampOnTamperDetection)) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != (sTamper->TimeStampOnTamperDetection)) { __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection); + MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -1413,7 +1409,6 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperTypeDef *sTamper) { uint32_t tmpreg; - UNUSED(hrtc); /* Check the parameters */ assert_param(IS_RTC_TAMPER(sTamper->Tamper)); @@ -1451,10 +1446,10 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType sTamper->PrechargeDuration | sTamper->TamperPullUp)); /* timestamp on tamper */ - if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sTamper->TimeStampOnTamperDetection) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != sTamper->TimeStampOnTamperDetection) { __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection); + MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sTamper->TimeStampOnTamperDetection); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -1483,8 +1478,6 @@ HAL_StatusTypeDef HAL_RTCEx_SetTamper_IT(RTC_HandleTypeDef *hrtc, RTC_TamperType */ HAL_StatusTypeDef HAL_RTCEx_DeactivateTamper(RTC_HandleTypeDef *hrtc, uint32_t Tamper) { - UNUSED(hrtc); - assert_param(IS_RTC_TAMPER(Tamper)); /* Disable the selected Tamper pin */ @@ -1551,17 +1544,16 @@ HAL_StatusTypeDef HAL_RTCEx_PollForTamperEvent(RTC_HandleTypeDef *hrtc, uint32_t */ HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper) { - UNUSED(hrtc); /* Check the parameters */ assert_param(IS_RTC_INTERNAL_TAMPER(sIntTamper->IntTamper)); assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sIntTamper->TimeStampOnTamperDetection)); /* timestamp on internal tamper */ - if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection) { __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection); + MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -1580,17 +1572,15 @@ HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper(RTC_HandleTypeDef *hrtc, RTC_Inter */ HAL_StatusTypeDef HAL_RTCEx_SetInternalTamper_IT(RTC_HandleTypeDef *hrtc, RTC_InternalTamperTypeDef *sIntTamper) { - UNUSED(hrtc); - /* Check the parameters */ assert_param(IS_RTC_INTERNAL_TAMPER(sIntTamper->IntTamper)); assert_param(IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION(sIntTamper->TimeStampOnTamperDetection)); /* timestamp on internal tamper */ - if (READ_BIT(RTC->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection) + if (READ_BIT(hrtc->Instance->CR, RTC_CR_TAMPTS) != sIntTamper->TimeStampOnTamperDetection) { __HAL_RTC_WRITEPROTECTION_DISABLE(hrtc); - MODIFY_REG(RTC->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection); + MODIFY_REG(hrtc->Instance->CR, RTC_CR_TAMPTS, sIntTamper->TimeStampOnTamperDetection); __HAL_RTC_WRITEPROTECTION_ENABLE(hrtc); } @@ -1839,7 +1829,6 @@ __weak void HAL_RTCEx_Tamper1EventCallback(RTC_HandleTypeDef *hrtc) */ } - /** * @brief Tamper 2 callback. * @param hrtc RTC handle @@ -2076,5 +2065,3 @@ uint32_t HAL_RTCEx_BKUPRead(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c index 70c97fd..b720868 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai.c @@ -10,6 +10,17 @@ * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -197,18 +208,6 @@ and weak (surcharged) callbacks are used. @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -2768,4 +2767,3 @@ static void SAI_DMAAbort(DMA_HandleTypeDef *hdma) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c index ef8c8c6..931dfeb 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sai_ex.c @@ -10,13 +10,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -128,4 +127,3 @@ HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(SAI_HandleTypeDef *hsai, SAIEx_Pdm * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c index 19e1c95..cd93283 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard.c @@ -10,6 +10,17 @@ * + Peripheral Control functions * + Peripheral State and Error functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -167,17 +178,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -809,11 +809,11 @@ HAL_StatusTypeDef HAL_SMARTCARD_UnRegisterCallback(SMARTCARD_HandleTypeDef *hsma * @param Timeout Timeout duration. * @retval HAL status */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, +HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { uint32_t tickstart; - uint8_t *ptmpdata = pData; + const uint8_t *ptmpdata = pData; /* Check that a Tx process is not already ongoing */ if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY) @@ -983,7 +983,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uin * @param Size amount of data to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size) { /* Check that a Tx process is not already ongoing */ if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY) @@ -1141,7 +1141,7 @@ HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, * @param Size amount of data to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, const uint8_t *pData, uint16_t Size) { /* Check that a Tx process is not already ongoing */ if (hsmartcard->gState == HAL_SMARTCARD_STATE_READY) @@ -2420,25 +2420,25 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard { case SMARTCARD_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - tmpreg = (uint16_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + + tmpreg = (uint32_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + (hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate); break; case SMARTCARD_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - tmpreg = (uint16_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + + tmpreg = (uint32_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + (hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate); break; case SMARTCARD_CLOCKSOURCE_HSI: - tmpreg = (uint16_t)(((HSI_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + + tmpreg = (uint32_t)(((HSI_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + (hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate); break; case SMARTCARD_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - tmpreg = (uint16_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + + tmpreg = (uint32_t)(((pclk / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + (hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate); break; case SMARTCARD_CLOCKSOURCE_LSE: - tmpreg = (uint16_t)(((uint16_t)(LSE_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + + tmpreg = (uint32_t)(((uint16_t)(LSE_VALUE / SMARTCARDPrescTable[hsmartcard->Init.ClockPrescaler]) + (hsmartcard->Init.BaudRate / 2U)) / hsmartcard->Init.BaudRate); break; default: @@ -2449,7 +2449,7 @@ static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard /* USARTDIV must be greater than or equal to 0d16 */ if ((tmpreg >= USART_BRR_MIN) && (tmpreg <= USART_BRR_MAX)) { - hsmartcard->Instance->BRR = tmpreg; + hsmartcard->Instance->BRR = (uint16_t)tmpreg; } else { @@ -2580,11 +2580,12 @@ static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmar } /** - * @brief Handle SMARTCARD Communication Timeout. + * @brief Handle SMARTCARD Communication Timeout. It waits + * until a flag is no longer in the specified status. * @param hsmartcard Pointer to a SMARTCARD_HandleTypeDef structure that contains * the configuration information for the specified SMARTCARD module. * @param Flag Specifies the SMARTCARD flag to check. - * @param Status The new Flag status (SET or RESET). + * @param Status The actual Flag status (SET or RESET). * @param Tickstart Tick start value * @param Timeout Timeout duration. * @retval HAL status @@ -3184,4 +3185,3 @@ static void SMARTCARD_RxISR_FIFOEN(SMARTCARD_HandleTypeDef *hsmartcard) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c index c43d359..2ce8bb1 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smartcard_ex.c @@ -8,6 +8,17 @@ * + Initialization and de-initialization functions * + Peripheral Control functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================= ##### SMARTCARD peripheral extended features ##### @@ -27,17 +38,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -493,4 +493,3 @@ static void SMARTCARDEx_SetNbDataToProcess(SMARTCARD_HandleTypeDef *hsmartcard) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c index 208e1b2..c72fe5c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus.c @@ -10,6 +10,17 @@ * + IO operation functions * + Peripheral State and Errors functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -20,7 +31,7 @@ (#) Declare a SMBUS_HandleTypeDef handle structure, for example: SMBUS_HandleTypeDef hsmbus; - (#)Initialize the SMBUS low level resources by implementing the @ref HAL_SMBUS_MspInit() API: + (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API: (##) Enable the SMBUSx interface clock (##) SMBUS pins configuration (+++) Enable the clock for the SMBUS GPIOs @@ -33,69 +44,75 @@ Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode, Peripheral mode and Packet Error Check mode in the hsmbus Init structure. - (#) Initialize the SMBUS registers by calling the @ref HAL_SMBUS_Init() API: + (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API: (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) - by calling the customized @ref HAL_SMBUS_MspInit(&hsmbus) API. + by calling the customized HAL_SMBUS_MspInit(&hsmbus) API. - (#) To check if target device is ready for communication, use the function @ref HAL_SMBUS_IsDeviceReady() + (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady() (#) For SMBUS IO operations, only one mode of operations is available within this driver *** Interrupt mode IO operation *** =================================== [..] - (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Master_Transmit_IT() - (++) At transmission end of transfer @ref HAL_SMBUS_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_MasterTxCpltCallback() - (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Master_Receive_IT() - (++) At reception end of transfer @ref HAL_SMBUS_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_MasterRxCpltCallback() - (+) Abort a master/host SMBUS process communication with Interrupt using @ref HAL_SMBUS_Master_Abort_IT() + (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode + using HAL_SMBUS_Master_Transmit_IT() + (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback() + (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode + using HAL_SMBUS_Master_Receive_IT() + (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback() + (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT() (++) The associated previous transfer callback is called at the end of abort process - (++) mean @ref HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit - (++) mean @ref HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive + (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit + (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode - using @ref HAL_SMBUS_EnableListen_IT() @ref HAL_SMBUS_DisableListen_IT() - (++) When address slave/device SMBUS match, @ref HAL_SMBUS_AddrCallback() is executed and user can - add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read). - (++) At Listen mode end @ref HAL_SMBUS_ListenCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_ListenCpltCallback() - (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Slave_Transmit_IT() - (++) At transmission end of transfer @ref HAL_SMBUS_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_SlaveTxCpltCallback() - (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using @ref HAL_SMBUS_Slave_Receive_IT() - (++) At reception end of transfer @ref HAL_SMBUS_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_SlaveRxCpltCallback() - (+) Enable/Disable the SMBUS alert mode using @ref HAL_SMBUS_EnableAlert_IT() @ref HAL_SMBUS_DisableAlert_IT() - (++) When SMBUS Alert is generated @ref HAL_SMBUS_ErrorCallback() is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_ErrorCallback() - to check the Alert Error Code using function @ref HAL_SMBUS_GetError() - (+) Get HAL state machine or error values using @ref HAL_SMBUS_GetState() or @ref HAL_SMBUS_GetError() - (+) In case of transfer Error, @ref HAL_SMBUS_ErrorCallback() function is executed and user can - add his own code by customization of function pointer @ref HAL_SMBUS_ErrorCallback() - to check the Error Code using function @ref HAL_SMBUS_GetError() + using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT() + (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and users can + add their own code to check the Address Match Code and the transmission direction + request by master/host (Write/Read). + (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_SMBUS_ListenCpltCallback() + (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode + using HAL_SMBUS_Slave_Transmit_IT() + (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback() + (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode + using HAL_SMBUS_Slave_Receive_IT() + (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and users can + add their own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback() + (+) Enable/Disable the SMBUS alert mode using + HAL_SMBUS_EnableAlert_IT() or HAL_SMBUS_DisableAlert_IT() + (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and users can + add their own code by customization of function pointer HAL_SMBUS_ErrorCallback() + to check the Alert Error Code using function HAL_SMBUS_GetError() + (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError() + (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and users can + add their own code by customization of function pointer HAL_SMBUS_ErrorCallback() + to check the Error Code using function HAL_SMBUS_GetError() *** SMBUS HAL driver macros list *** ================================== [..] Below the list of most used macros in SMBUS HAL driver. - (+) @ref __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral - (+) @ref __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral - (+) @ref __HAL_SMBUS_GET_FLAG: Check whether the specified SMBUS flag is set or not - (+) @ref __HAL_SMBUS_CLEAR_FLAG: Clear the specified SMBUS pending flag - (+) @ref __HAL_SMBUS_ENABLE_IT: Enable the specified SMBUS interrupt - (+) @ref __HAL_SMBUS_DISABLE_IT: Disable the specified SMBUS interrupt + (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral + (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral + (+) __HAL_SMBUS_GET_FLAG: Check whether the specified SMBUS flag is set or not + (+) __HAL_SMBUS_CLEAR_FLAG: Clear the specified SMBUS pending flag + (+) __HAL_SMBUS_ENABLE_IT: Enable the specified SMBUS interrupt + (+) __HAL_SMBUS_DISABLE_IT: Disable the specified SMBUS interrupt *** Callback registration *** ============================================= [..] The compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_SMBUS_RegisterCallback() or @ref HAL_SMBUS_RegisterAddrCallback() + Use Functions HAL_SMBUS_RegisterCallback() or HAL_SMBUS_RegisterAddrCallback() to register an interrupt callback. [..] - Function @ref HAL_SMBUS_RegisterCallback() allows to register following callbacks: + Function HAL_SMBUS_RegisterCallback() allows to register following callbacks: (+) MasterTxCpltCallback : callback for Master transmission end of transfer. (+) MasterRxCpltCallback : callback for Master reception end of transfer. (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. @@ -107,11 +124,11 @@ This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. [..] - For specific callback AddrCallback use dedicated register callbacks : @ref HAL_SMBUS_RegisterAddrCallback. + For specific callback AddrCallback use dedicated register callbacks : HAL_SMBUS_RegisterAddrCallback. [..] - Use function @ref HAL_SMBUS_UnRegisterCallback to reset a callback to the default + Use function HAL_SMBUS_UnRegisterCallback to reset a callback to the default weak function. - @ref HAL_SMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_SMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) MasterTxCpltCallback : callback for Master transmission end of transfer. @@ -123,24 +140,24 @@ (+) MspInitCallback : callback for Msp Init. (+) MspDeInitCallback : callback for Msp DeInit. [..] - For callback AddrCallback use dedicated register callbacks : @ref HAL_SMBUS_UnRegisterAddrCallback. + For callback AddrCallback use dedicated register callbacks : HAL_SMBUS_UnRegisterAddrCallback. [..] - By default, after the @ref HAL_SMBUS_Init() and when the state is @ref HAL_I2C_STATE_RESET + By default, after the HAL_SMBUS_Init() and when the state is HAL_I2C_STATE_RESET all callbacks are set to the corresponding weak functions: - examples @ref HAL_SMBUS_MasterTxCpltCallback(), @ref HAL_SMBUS_MasterRxCpltCallback(). + examples HAL_SMBUS_MasterTxCpltCallback(), HAL_SMBUS_MasterRxCpltCallback(). Exception done for MspInit and MspDeInit functions that are - reset to the legacy weak functions in the @ref HAL_SMBUS_Init()/ @ref HAL_SMBUS_DeInit() only when + reset to the legacy weak functions in the HAL_SMBUS_Init()/ HAL_SMBUS_DeInit() only when these callbacks are null (not registered beforehand). - If MspInit or MspDeInit are not null, the @ref HAL_SMBUS_Init()/ @ref HAL_SMBUS_DeInit() + If MspInit or MspDeInit are not null, the HAL_SMBUS_Init()/ HAL_SMBUS_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. [..] - Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only. + Callbacks can be registered/unregistered in HAL_I2C_STATE_READY state only. Exception done MspInit/MspDeInit functions that can be registered/unregistered - in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state, + in HAL_I2C_STATE_READY or HAL_I2C_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. Then, the user first registers the MspInit/MspDeInit user callbacks - using @ref HAL_SMBUS_RegisterCallback() before calling @ref HAL_SMBUS_DeInit() - or @ref HAL_SMBUS_Init() function. + using HAL_SMBUS_RegisterCallback() before calling HAL_SMBUS_DeInit() + or HAL_SMBUS_Init() function. [..] When the compilation flag USE_HAL_SMBUS_REGISTER_CALLBACKS is set to 0 or not defined, the callback registration feature is not available and all callbacks @@ -150,18 +167,6 @@ (@) You can refer to the SMBUS HAL driver header file for more useful macros @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -203,20 +208,28 @@ /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions * @{ */ -static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, - uint32_t Timeout); +/* Private functions to handle flags during polling transfer */ +static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, + FlagStatus Status, uint32_t Timeout); -static void SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); -static void SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); +/* Private functions for SMBUS transfer IRQ handler */ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags); static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t StatusFlags); - -static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus); - static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus); -static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, - uint32_t Request); +/* Private functions to centralize the enable/disable of Interrupts */ +static void SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); +static void SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint32_t InterruptRequest); + +/* Private function to flush TXDR register */ +static void SMBUS_Flush_TXDR(SMBUS_HandleTypeDef *hsmbus); + +/* Private function to handle start, restart or stop a transfer */ +static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, + uint32_t Mode, uint32_t Request); + +/* Private function to Convert Specific options */ +static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus); /** * @} */ @@ -364,15 +377,20 @@ HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus) /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/ /* Configure SMBUSx: Dual mode and Own Address2 */ - hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8U)); + hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | \ + (hsmbus->Init.OwnAddress2Masks << 8U)); /*---------------------------- SMBUSx CR1 Configuration ------------------------*/ /* Configure SMBUSx: Generalcall and NoStretch mode */ - hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter); + hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | \ + hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | \ + hsmbus->Init.AnalogFilter); - /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */ - if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE) - && ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))) + /* Enable Slave Byte Control only in case of Packet Error Check is enabled + and SMBUS Peripheral is set in Slave mode */ + if ((hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE) && \ + ((hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ + (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))) { hsmbus->Instance->CR1 |= I2C_CR1_SBC; } @@ -581,7 +599,8 @@ HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uin * @param pCallback pointer to the Callback function * @retval HAL status */ -HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, +HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, + HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback) { HAL_StatusTypeDef status = HAL_OK; @@ -695,7 +714,8 @@ HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SM * @arg @ref HAL_SMBUS_MSPDEINIT_CB_ID MspDeInit callback ID * @retval HAL status */ -HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID) +HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, + HAL_SMBUS_CallbackIDTypeDef CallbackID) { HAL_StatusTypeDef status = HAL_OK; @@ -790,7 +810,8 @@ HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_ * @param pCallback pointer to the Address Match Callback function * @retval HAL status */ -HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback) +HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, + pSMBUS_AddrCallbackTypeDef pCallback) { HAL_StatusTypeDef status = HAL_OK; @@ -914,8 +935,8 @@ HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus) * @param XferOptions Options of Transfer, value of @ref SMBUS_XferOptions_definition * @retval HAL status */ -HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, - uint16_t Size, uint32_t XferOptions) +HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, + uint8_t *pData, uint16_t Size, uint32_t XferOptions) { uint32_t tmp; @@ -955,7 +976,8 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) { SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, - SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE); + SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), + SMBUS_GENERATE_START_WRITE); } else { @@ -965,9 +987,11 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint /* Store current volatile XferOptions, misra rule */ tmp = hsmbus->XferOptions; - if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) + if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) && \ + (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) { - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_NO_STARTSTOP); } /* Else transfer direction change, so generate Restart with new transfer direction */ else @@ -976,7 +1000,9 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint SMBUS_ConvertOtherXferOptions(hsmbus); /* Handle Transfer */ - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE); + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, + hsmbus->XferOptions, + SMBUS_GENERATE_START_WRITE); } /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */ @@ -1057,7 +1083,8 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1 if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) { SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, - SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ); + SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), + SMBUS_GENERATE_START_READ); } else { @@ -1067,9 +1094,11 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1 /* Store current volatile XferOptions, Misra rule */ tmp = hsmbus->XferOptions; - if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) + if ((hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) && \ + (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0)) { - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_NO_STARTSTOP); } /* Else transfer direction change, so generate Restart with new transfer direction */ else @@ -1078,7 +1107,9 @@ HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint1 SMBUS_ConvertOtherXferOptions(hsmbus); /* Handle Transfer */ - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ); + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, + hsmbus->XferOptions, + SMBUS_GENERATE_START_READ); } } @@ -1222,12 +1253,14 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8 if ((hsmbus->XferSize < hsmbus->XferCount) && (hsmbus->XferSize == MAX_NBYTE_SIZE)) { SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, - SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP); + SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), + SMBUS_NO_STARTSTOP); } else { /* Set NBYTE to transmit */ - SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_NO_STARTSTOP); /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ @@ -1313,7 +1346,8 @@ HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_ /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */ if (((SMBUS_GET_PEC_MODE(hsmbus) != 0UL) && (hsmbus->XferSize == 2U)) || (hsmbus->XferSize == 1U)) { - SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_NO_STARTSTOP); } else { @@ -1576,7 +1610,8 @@ void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus) uint32_t tmpcr1value = READ_REG(hsmbus->Instance->CR1); /* SMBUS in mode Transmitter ---------------------------------------------------*/ - if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) && + if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | + SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) && ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || @@ -1600,7 +1635,8 @@ void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus) } /* SMBUS in mode Receiver ----------------------------------------------------*/ - if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET) && + if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | + SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET) && ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || @@ -1720,7 +1756,8 @@ __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus) * @param AddrMatchCode Address Match Code * @retval None */ -__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode) +__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, + uint16_t AddrMatchCode) { /* Prevent unused argument(s) compilation warning */ UNUSED(hsmbus); @@ -1842,6 +1879,9 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t /* No need to generate STOP, it is automatically done */ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF; + /* Flush TX register */ + SMBUS_Flush_TXDR(hsmbus); + /* Process Unlocked */ __HAL_UNLOCK(hsmbus); @@ -1967,13 +2007,15 @@ static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t if (hsmbus->XferCount > MAX_NBYTE_SIZE) { SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, - (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP); + (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), + SMBUS_NO_STARTSTOP); hsmbus->XferSize = MAX_NBYTE_SIZE; } else { hsmbus->XferSize = hsmbus->XferCount; - SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, DevAddress, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_NO_STARTSTOP); /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) @@ -2130,6 +2172,9 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S /* Clear NACK Flag */ __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); + /* Flush TX register */ + SMBUS_Flush_TXDR(hsmbus); + /* Process Unlocked */ __HAL_UNLOCK(hsmbus); } @@ -2151,6 +2196,9 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S /* Set ErrorCode corresponding to a Non-Acknowledge */ hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF; + /* Flush TX register */ + SMBUS_Flush_TXDR(hsmbus); + /* Process Unlocked */ __HAL_UNLOCK(hsmbus); @@ -2225,7 +2273,9 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S else { /* Set Reload for next Bytes */ - SMBUS_TransferConfig(hsmbus, 0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, 0, 1, + SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), + SMBUS_NO_STARTSTOP); /* Ack last Byte Read */ hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; @@ -2237,14 +2287,16 @@ static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus, uint32_t S { if (hsmbus->XferCount > MAX_NBYTE_SIZE) { - SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), + SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, + (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP); hsmbus->XferSize = MAX_NBYTE_SIZE; } else { hsmbus->XferSize = hsmbus->XferCount; - SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); + SMBUS_TransferConfig(hsmbus, 0, (uint8_t)hsmbus->XferSize, hsmbus->XferOptions, + SMBUS_NO_STARTSTOP); /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ if (SMBUS_GET_PEC_MODE(hsmbus) != 0UL) @@ -2489,7 +2541,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) uint32_t tmperror; /* SMBUS Bus error interrupt occurred ------------------------------------*/ - if (((itflags & SMBUS_FLAG_BERR) == SMBUS_FLAG_BERR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) + if (((itflags & SMBUS_FLAG_BERR) == SMBUS_FLAG_BERR) && \ + ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) { hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR; @@ -2498,7 +2551,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) } /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/ - if (((itflags & SMBUS_FLAG_OVR) == SMBUS_FLAG_OVR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) + if (((itflags & SMBUS_FLAG_OVR) == SMBUS_FLAG_OVR) && \ + ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) { hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR; @@ -2507,7 +2561,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) } /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/ - if (((itflags & SMBUS_FLAG_ARLO) == SMBUS_FLAG_ARLO) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) + if (((itflags & SMBUS_FLAG_ARLO) == SMBUS_FLAG_ARLO) && \ + ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) { hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO; @@ -2516,7 +2571,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) } /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/ - if (((itflags & SMBUS_FLAG_TIMEOUT) == SMBUS_FLAG_TIMEOUT) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) + if (((itflags & SMBUS_FLAG_TIMEOUT) == SMBUS_FLAG_TIMEOUT) && \ + ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) { hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT; @@ -2525,7 +2581,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) } /* SMBUS Alert error interrupt occurred -----------------------------------------------*/ - if (((itflags & SMBUS_FLAG_ALERT) == SMBUS_FLAG_ALERT) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) + if (((itflags & SMBUS_FLAG_ALERT) == SMBUS_FLAG_ALERT) && \ + ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) { hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT; @@ -2534,7 +2591,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) } /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/ - if (((itflags & SMBUS_FLAG_PECERR) == SMBUS_FLAG_PECERR) && ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) + if (((itflags & SMBUS_FLAG_PECERR) == SMBUS_FLAG_PECERR) && \ + ((itsources & SMBUS_IT_ERRI) == SMBUS_IT_ERRI)) { hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR; @@ -2542,7 +2600,10 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); } - /* Store current volatile hsmbus->State, misra rule */ + /* Flush TX register */ + SMBUS_Flush_TXDR(hsmbus); + + /* Store current volatile hsmbus->ErrorCode, misra rule */ tmperror = hsmbus->ErrorCode; /* Call the Error Callback in case of Error detected */ @@ -2582,8 +2643,8 @@ static void SMBUS_ITErrorHandler(SMBUS_HandleTypeDef *hsmbus) * @param Timeout Timeout duration * @retval HAL status */ -static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, - uint32_t Timeout) +static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, + FlagStatus Status, uint32_t Timeout) { uint32_t tickstart = HAL_GetTick(); @@ -2612,6 +2673,27 @@ static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbu return HAL_OK; } +/** + * @brief SMBUS Tx data register flush process. + * @param hsmbus SMBUS handle. + * @retval None + */ +static void SMBUS_Flush_TXDR(SMBUS_HandleTypeDef *hsmbus) +{ + /* If a pending TXIS flag is set */ + /* Write a dummy data in TXDR to clear it */ + if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET) + { + hsmbus->Instance->TXDR = 0x00U; + } + + /* Flush TX register if not empty */ + if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXE) == RESET) + { + __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TXE); + } +} + /** * @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). * @param hsmbus SMBUS handle. @@ -2632,8 +2714,8 @@ static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbu * @arg @ref SMBUS_GENERATE_START_WRITE Generate Restart for write request. * @retval None */ -static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, - uint32_t Request) +static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, + uint32_t Mode, uint32_t Request) { /* Check the parameters */ assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance)); @@ -2644,9 +2726,10 @@ static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddre MODIFY_REG(hsmbus->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31UL - I2C_CR2_RD_WRN_Pos))) | \ - I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)), \ + I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)), \ (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ - (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request)); + (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ + (uint32_t)Mode | (uint32_t)Request)); } /** @@ -2703,5 +2786,3 @@ static void SMBUS_ConvertOtherXferOptions(SMBUS_HandleTypeDef *hsmbus) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus_ex.c index 246263e..be38b88 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_smbus_ex.c @@ -7,6 +7,17 @@ * functionalities of SMBUS Extended peripheral: * + Extended features functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### SMBUS peripheral Extended features ##### @@ -15,26 +26,18 @@ [..] Comparing to other previous devices, the SMBUS interface for STM32G4xx devices contains the following additional features + (+) Disable or enable wakeup from Stop mode(s) (+) Disable or enable Fast Mode Plus ##### How to use this driver ##### ============================================================================== + (#) Configure the enable or disable of SMBUS Wake Up Mode using the functions : + (++) HAL_SMBUSEx_EnableWakeUp() + (++) HAL_SMBUSEx_DisableWakeUp() (#) Configure the enable or disable of fast mode plus driving capability using the functions : (++) HAL_SMBUSEx_EnableFastModePlus() (++) HAL_SMBUSEx_DisableFastModePlus() @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -62,15 +65,109 @@ * @{ */ -/** @defgroup SMBUSEx_Exported_Functions_Group1 Extended features functions - * @brief Extended features functions - * +/** @defgroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions + * @brief WakeUp Mode Functions + * @verbatim =============================================================================== - ##### Extended features functions ##### + ##### WakeUp Mode Functions ##### =============================================================================== [..] This section provides functions allowing to: + (+) Configure Wake Up Feature +@endverbatim + * @{ + */ + +/** + * @brief Enable SMBUS wakeup from Stop mode(s). + * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains + * the configuration information for the specified SMBUSx peripheral. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus) +{ + /* Check the parameters */ + assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance)); + + if (hsmbus->State == HAL_SMBUS_STATE_READY) + { + /* Process Locked */ + __HAL_LOCK(hsmbus); + + hsmbus->State = HAL_SMBUS_STATE_BUSY; + + /* Disable the selected SMBUS peripheral */ + __HAL_SMBUS_DISABLE(hsmbus); + + /* Enable wakeup from stop mode */ + hsmbus->Instance->CR1 |= I2C_CR1_WUPEN; + + __HAL_SMBUS_ENABLE(hsmbus); + + hsmbus->State = HAL_SMBUS_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(hsmbus); + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} + +/** + * @brief Disable SMBUS wakeup from Stop mode(s). + * @param hsmbus Pointer to a SMBUS_HandleTypeDef structure that contains + * the configuration information for the specified SMBUSx peripheral. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus) +{ + /* Check the parameters */ + assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hsmbus->Instance)); + + if (hsmbus->State == HAL_SMBUS_STATE_READY) + { + /* Process Locked */ + __HAL_LOCK(hsmbus); + + hsmbus->State = HAL_SMBUS_STATE_BUSY; + + /* Disable the selected SMBUS peripheral */ + __HAL_SMBUS_DISABLE(hsmbus); + + /* Disable wakeup from stop mode */ + hsmbus->Instance->CR1 &= ~(I2C_CR1_WUPEN); + + __HAL_SMBUS_ENABLE(hsmbus); + + hsmbus->State = HAL_SMBUS_STATE_READY; + + /* Process Unlocked */ + __HAL_UNLOCK(hsmbus); + + return HAL_OK; + } + else + { + return HAL_BUSY; + } +} +/** + * @} + */ + +/** @defgroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions + * @brief Fast Mode Plus Functions + * +@verbatim + =============================================================================== + ##### Fast Mode Plus Functions ##### + =============================================================================== + [..] This section provides functions allowing to: (+) Configure Fast Mode Plus @endverbatim @@ -82,16 +179,16 @@ * @param ConfigFastModePlus Selects the pin. * This parameter can be one of the @ref SMBUSEx_FastModePlus values * @note For I2C1, fast mode plus driving capability can be enabled on all selected - * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + * I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently * on each one of the following pins PB6, PB7, PB8 and PB9. * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + * can be enabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter. * @note For all I2C2 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C2 parameter. + * only by using SMBUS_FASTMODEPLUS_I2C2 parameter. * @note For all I2C3 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C3 parameter. + * only by using SMBUS_FASTMODEPLUS_I2C3 parameter. * @note For all I2C4 pins fast mode plus driving capability can be enabled - * only by using I2C_FASTMODEPLUS_I2C4 parameter. + * only by using SMBUS_FASTMODEPLUS_I2C4 parameter. * @retval None */ void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus) @@ -111,16 +208,16 @@ void HAL_SMBUSEx_EnableFastModePlus(uint32_t ConfigFastModePlus) * @param ConfigFastModePlus Selects the pin. * This parameter can be one of the @ref SMBUSEx_FastModePlus values * @note For I2C1, fast mode plus driving capability can be disabled on all selected - * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + * I2C1 pins using SMBUS_FASTMODEPLUS_I2C1 parameter or independently * on each one of the following pins PB6, PB7, PB8 and PB9. * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability - * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + * can be disabled only by using SMBUS_FASTMODEPLUS_I2C1 parameter. * @note For all I2C2 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C2 parameter. + * only by using SMBUS_FASTMODEPLUS_I2C2 parameter. * @note For all I2C3 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C3 parameter. + * only by using SMBUS_FASTMODEPLUS_I2C3 parameter. * @note For all I2C4 pins fast mode plus driving capability can be disabled - * only by using I2C_FASTMODEPLUS_I2C4 parameter. + * only by using SMBUS_FASTMODEPLUS_I2C4 parameter. * @retval None */ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus) @@ -135,6 +232,9 @@ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus) CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); } +/** + * @} + */ /** * @} @@ -152,5 +252,3 @@ void HAL_SMBUSEx_DisableFastModePlus(uint32_t ConfigFastModePlus) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c index b678d78..d505b72 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi.c @@ -9,7 +9,17 @@ * + IO operation functions * + Peripheral Control functions * + Peripheral State functions + ****************************************************************************** + * @attention * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -184,18 +194,6 @@ (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT() and HAL_SPI_Receive_DMA() (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT() and HAL_SPI_Transmit_DMA() - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -1009,6 +1007,8 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 { #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ uint32_t tickstart; HAL_StatusTypeDef errorcode = HAL_OK; @@ -1182,10 +1182,12 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 } else { + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; /* Read 8bit CRC */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); if ((hspi->Init.DataSize == SPI_DATASIZE_8BIT) && (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT)) { @@ -1197,9 +1199,9 @@ HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint1 goto error; } /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); } } } @@ -1244,17 +1246,17 @@ error : HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { -#if (USE_SPI_CRC != 0U) - __IO uint32_t tmpreg = 0U; -#endif /* USE_SPI_CRC */ uint16_t initial_TxXferCount; uint16_t initial_RxXferCount; uint32_t tmp_mode; HAL_SPI_StateTypeDef tmp_state; uint32_t tickstart; #if (USE_SPI_CRC != 0U) + __IO uint32_t tmpreg = 0U; uint32_t spi_cr1; uint32_t spi_cr2; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ /* Variable used to alternate Rx and Tx during transfer */ @@ -1494,10 +1496,12 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD } else { + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; /* Read 8bit CRC */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) { @@ -1509,9 +1513,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxD goto error; } /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); } } } @@ -3068,6 +3072,8 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ /* Init tickstart for timeout management*/ @@ -3099,10 +3105,12 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) } else { + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; /* Read 8bit CRC */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); if (hspi->Init.CRCLength == SPI_CRC_LENGTH_16BIT) { @@ -3112,9 +3120,9 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma) SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); } /* Read 8bit CRC again in case of 16bit CRC in 8bit Data mode */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); } } } @@ -3181,6 +3189,8 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) uint32_t tickstart; #if (USE_SPI_CRC != 0U) __IO uint32_t tmpreg = 0U; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; #endif /* USE_SPI_CRC */ /* Init tickstart for timeout management*/ @@ -3204,10 +3214,12 @@ static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma) /* Error on the CRC reception */ SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_CRC); } - /* Read CRC to Flush DR and RXNE flag */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; + /* Read 8bit CRC */ + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); } else { @@ -3554,12 +3566,15 @@ static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi) */ static void SPI_2linesRxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) { - __IO uint32_t tmpreg = 0U; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; /* Read 8bit CRC to flush Data Register */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); hspi->CRCSize--; @@ -3671,7 +3686,7 @@ static void SPI_2linesRxISR_16BITCRC(struct __SPI_HandleTypeDef *hspi) /* Read 16bit CRC to flush Data Register */ tmpreg = READ_REG(hspi->Instance->DR); /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg); /* Disable RXNE interrupt */ __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE); @@ -3726,12 +3741,15 @@ static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi) */ static void SPI_RxISR_8BITCRC(struct __SPI_HandleTypeDef *hspi) { - __IO uint32_t tmpreg = 0U; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; /* Read 8bit CRC to flush Data Register */ - tmpreg = READ_REG(*(__IO uint8_t *)&hspi->Instance->DR); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); hspi->CRCSize--; @@ -3940,7 +3958,7 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, return HAL_TIMEOUT; } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ - if(count == 0U) + if (count == 0U) { tmp_timeout = 0U; } @@ -3964,15 +3982,19 @@ static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State, uint32_t Timeout, uint32_t Tickstart) { - __IO uint32_t tmpreg; __IO uint32_t count; uint32_t tmp_timeout; uint32_t tmp_tickstart; + __IO uint8_t *ptmpreg8; + __IO uint8_t tmpreg8 = 0; /* Adjust Timeout value in case of end of transfer */ tmp_timeout = Timeout - (HAL_GetTick() - Tickstart); tmp_tickstart = HAL_GetTick(); + /* Initialize the 8bit temporary pointer */ + ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR; + /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */ count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U); @@ -3981,9 +4003,9 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY)) { /* Flush Data Register by a blank read */ - tmpreg = READ_REG(*((__IO uint8_t *)&hspi->Instance->DR)); + tmpreg8 = *ptmpreg8; /* To avoid GCC warning */ - UNUSED(tmpreg); + UNUSED(tmpreg8); } if (Timeout != HAL_MAX_DELAY) @@ -4018,10 +4040,10 @@ static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, return HAL_TIMEOUT; } /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */ - if(count == 0U) + if (count == 0U) { tmp_timeout = 0U; - } + } count--; } } @@ -4412,4 +4434,3 @@ static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c index 559d3e9..ddec1b0 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_spi_ex.c @@ -10,13 +10,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -111,5 +110,3 @@ HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c index b906732..7e3b8cd 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_sram.c @@ -6,6 +6,17 @@ * This file provides a generic firmware to drive SRAM memories * mounted as external device. * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -64,25 +75,25 @@ The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS when set to 1 allows the user to configure dynamically the driver callbacks. - Use Functions @ref HAL_SRAM_RegisterCallback() to register a user callback, + Use Functions HAL_SRAM_RegisterCallback() to register a user callback, it allows to register following callbacks: (+) MspInitCallback : SRAM MspInit. (+) MspDeInitCallback : SRAM MspDeInit. This function takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. - Use function @ref HAL_SRAM_UnRegisterCallback() to reset a callback to the default + Use function HAL_SRAM_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. It allows to reset following callbacks: (+) MspInitCallback : SRAM MspInit. (+) MspDeInitCallback : SRAM MspDeInit. This function) takes as parameters the HAL peripheral handle and the Callback ID. - By default, after the @ref HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET + By default, after the HAL_SRAM_Init and if the state is HAL_SRAM_STATE_RESET all callbacks are reset to the corresponding legacy weak (surcharged) functions. Exception done for MspInit and MspDeInit callbacks that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_SRAM_Init - and @ref HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_SRAM_Init and @ref HAL_SRAM_DeInit + reset to the legacy weak (surcharged) functions in the HAL_SRAM_Init + and HAL_SRAM_DeInit only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_SRAM_Init and HAL_SRAM_DeInit keep and use the user MspInit/MspDeInit callbacks (registered beforehand) Callbacks can be registered/unregistered in READY state only. @@ -90,8 +101,8 @@ in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_SRAM_RegisterCallback before calling @ref HAL_SRAM_DeInit - or @ref HAL_SRAM_Init function. + using HAL_SRAM_RegisterCallback before calling HAL_SRAM_DeInit + or HAL_SRAM_Init function. When The compilation define USE_HAL_SRAM_REGISTER_CALLBACKS is set to 0 or not defined, the callback registering feature is not available @@ -99,17 +110,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -1108,5 +1108,3 @@ static void SRAM_DMAError(DMA_HandleTypeDef *hdma) */ #endif /* FMC_BANK1 */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c index b8b3e8f..02cbdb4 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c @@ -29,6 +29,17 @@ * + Commutation Event configuration with Interruption and DMA * + TIM OCRef clear configuration * + TIM External Clock configuration + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### TIMER Generic features ##### @@ -103,14 +114,14 @@ allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_TIM_RegisterCallback() to register a callback. - @ref HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle, + Use Function HAL_TIM_RegisterCallback() to register a callback. + HAL_TIM_RegisterCallback() takes as parameters the HAL peripheral handle, the Callback ID and a pointer to the user callback function. [..] - Use function @ref HAL_TIM_UnRegisterCallback() to reset a callback to the default + Use function HAL_TIM_UnRegisterCallback() to reset a callback to the default weak function. - @ref HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle, + HAL_TIM_UnRegisterCallback takes as parameters the HAL peripheral handle, and the Callback ID. [..] @@ -151,7 +162,7 @@ [..] By default, after the Init and when the state is HAL_TIM_STATE_RESET all interrupt callbacks are set to the corresponding weak functions: - examples @ref HAL_TIM_TriggerCallback(), @ref HAL_TIM_ErrorCallback(). + examples HAL_TIM_TriggerCallback(), HAL_TIM_ErrorCallback(). [..] Exception done for MspInit and MspDeInit functions that are reset to the legacy weak @@ -165,7 +176,7 @@ all interrupt callbacks are set to the corresponding weak functions: in HAL_TIM_STATE_READY or HAL_TIM_STATE_RESET state, thus registered(user) MspInit / DeInit callbacks can be used during the Init / DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_TIM_RegisterCallback() before calling DeInit or Init function. + using HAL_TIM_RegisterCallback() before calling DeInit or Init function. [..] When The compilation define USE_HAL_TIM_REGISTER_CALLBACKS is set to 0 or @@ -174,17 +185,6 @@ all interrupt callbacks are set to the corresponding weak functions: @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -203,8 +203,14 @@ all interrupt callbacks are set to the corresponding weak functions: /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ +/** @addtogroup TIM_Private_Constants + * @{ + */ #define TIMx_AF2_OCRSEL TIM1_AF2_OCRSEL +/** + * @} + */ /* Private macros ------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ @@ -567,7 +573,8 @@ HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pDat htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -887,6 +894,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -932,34 +940,38 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } + /* Enable the Output compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Enable the main output */ + __HAL_TIM_MOE_ENABLE(htim); + } + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -975,6 +987,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); @@ -1009,26 +1023,30 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); + /* Disable the Output compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); + } + + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); } - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - /* Return function status */ - return HAL_OK; + return status; } /** @@ -1046,6 +1064,7 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -1084,7 +1103,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1105,7 +1125,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1126,7 +1147,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1146,7 +1168,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1157,34 +1180,38 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel } default: + status = HAL_ERROR; break; } - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } + /* Enable the Output compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Enable the main output */ + __HAL_TIM_MOE_ENABLE(htim); + } + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1200,6 +1227,8 @@ HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel */ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); @@ -1238,26 +1267,30 @@ HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); + /* Disable the Output compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); + } + + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); } - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - /* Return function status */ - return HAL_OK; + return status; } /** @@ -1528,7 +1561,9 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); @@ -1572,34 +1607,38 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel } default: + status = HAL_ERROR; break; } - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } + /* Enable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Enable the main output */ + __HAL_TIM_MOE_ENABLE(htim); + } + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1615,6 +1654,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel */ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); @@ -1649,26 +1690,30 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); + /* Disable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); + } + + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); } - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - /* Return function status */ - return HAL_OK; + return status; } /** @@ -1686,6 +1731,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -1724,7 +1770,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1745,7 +1792,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1765,7 +1813,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1785,7 +1834,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1796,34 +1846,38 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe } default: + status = HAL_ERROR; break; } - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } + /* Enable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Enable the main output */ + __HAL_TIM_MOE_ENABLE(htim); + } + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1839,6 +1893,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channe */ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); @@ -1877,26 +1933,30 @@ HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel } default: + status = HAL_ERROR; break; } - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + if (status == HAL_OK) { - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); + /* Disable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + + if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) + { + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); + } + + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); } - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - /* Return function status */ - return HAL_OK; + return status; } /** @@ -2156,7 +2216,9 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; + HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); @@ -2205,27 +2267,32 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + if (status == HAL_OK) { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + /* Enable the Input Capture channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -2241,6 +2308,8 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); @@ -2275,21 +2344,25 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); + if (status == HAL_OK) + { + /* Disable the Input Capture channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -2307,7 +2380,9 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; + HAL_TIM_ChannelStateTypeDef channel_state = TIM_CHANNEL_STATE_GET(htim, Channel); HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel); @@ -2339,6 +2414,9 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel return HAL_ERROR; } + /* Enable the Input Capture channel */ + TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); + switch (Channel) { case TIM_CHANNEL_1: @@ -2351,7 +2429,8 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -2371,7 +2450,8 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -2391,7 +2471,8 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -2411,7 +2492,8 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -2422,12 +2504,10 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel } default: + status = HAL_ERROR; break; } - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) { @@ -2443,7 +2523,7 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel } /* Return function status */ - return HAL_OK; + return status; } /** @@ -2459,6 +2539,8 @@ HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel */ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); @@ -2501,18 +2583,22 @@ HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) } default: + status = HAL_ERROR; break; } - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); + if (status == HAL_OK) + { + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); - /* Set the TIM channel state */ - TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + /* Set the TIM channel state */ + TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + } /* Return function status */ - return HAL_OK; + return status; } /** * @} @@ -2698,8 +2784,8 @@ __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) * @brief Starts the TIM One Pulse signal generation. * @note Though OutputChannel parameter is deprecated and ignored by the function * it has been kept to avoid HAL_TIM API compatibility break. - * @note The pulse output channel is determined when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note The pulse output channel is determined when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel See note above * @retval HAL status @@ -2755,8 +2841,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t Outpu * @brief Stops the TIM One Pulse signal generation. * @note Though OutputChannel parameter is deprecated and ignored by the function * it has been kept to avoid HAL_TIM API compatibility break. - * @note The pulse output channel is determined when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note The pulse output channel is determined when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel See note above * @retval HAL status @@ -2798,8 +2884,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t Output * @brief Starts the TIM One Pulse signal generation in interrupt mode. * @note Though OutputChannel parameter is deprecated and ignored by the function * it has been kept to avoid HAL_TIM API compatibility break. - * @note The pulse output channel is determined when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note The pulse output channel is determined when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel See note above * @retval HAL status @@ -2861,8 +2947,8 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t Ou * @brief Stops the TIM One Pulse signal generation in interrupt mode. * @note Though OutputChannel parameter is deprecated and ignored by the function * it has been kept to avoid HAL_TIM API compatibility break. - * @note The pulse output channel is determined when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note The pulse output channel is determined when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel See note above * @retval HAL status @@ -3565,7 +3651,8 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -3573,11 +3660,12 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch /* Enable the TIM Input Capture DMA request */ __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); + /* Enable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); break; } @@ -3590,7 +3678,8 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch /* Set the DMA error callback */ htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -3598,15 +3687,16 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch /* Enable the TIM Input Capture DMA request */ __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); + /* Enable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + /* Enable the Peripheral */ __HAL_TIM_ENABLE(htim); - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); break; } - case TIM_CHANNEL_ALL: + default: { /* Set the DMA capture callbacks */ htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; @@ -3616,7 +3706,8 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -3630,27 +3721,27 @@ HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Ch htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; } - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); /* Enable the TIM Input Capture DMA request */ __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); /* Enable the TIM Input Capture DMA request */ __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); + + /* Enable the Capture compare channel */ + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); + TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); + + /* Enable the Peripheral */ + __HAL_TIM_ENABLE(htim); + break; } - - default: - break; } /* Return function status */ @@ -4030,6 +4121,8 @@ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CHANNELS(Channel)); assert_param(IS_TIM_OC_CHANNEL_MODE(sConfig->OCMode, Channel)); @@ -4101,12 +4194,13 @@ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, } default: + status = HAL_ERROR; break; } __HAL_UNLOCK(htim); - return HAL_OK; + return status; } /** @@ -4124,6 +4218,8 @@ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, */ HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef *sConfig, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); @@ -4180,7 +4276,7 @@ HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitT /* Set the IC3PSC value */ htim->Instance->CCMR2 |= sConfig->ICPrescaler; } - else + else if (Channel == TIM_CHANNEL_4) { /* TI4 Configuration */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); @@ -4196,10 +4292,14 @@ HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitT /* Set the IC4PSC value */ htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8U); } + else + { + status = HAL_ERROR; + } __HAL_UNLOCK(htim); - return HAL_OK; + return status; } /** @@ -4221,6 +4321,8 @@ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CHANNELS(Channel)); assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); @@ -4335,12 +4437,13 @@ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, } default: + status = HAL_ERROR; break; } __HAL_UNLOCK(htim); - return HAL_OK; + return status; } /** @@ -4365,6 +4468,7 @@ HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef *sConfig, uint32_t OutputChannel, uint32_t InputChannel) { + HAL_StatusTypeDef status = HAL_OK; TIM_OC_InitTypeDef temp1; /* Check the parameters */ @@ -4395,6 +4499,7 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O TIM_OC1_SetConfig(htim->Instance, &temp1); break; } + case TIM_CHANNEL_2: { assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); @@ -4402,60 +4507,67 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O TIM_OC2_SetConfig(htim->Instance, &temp1); break; } + default: + status = HAL_ERROR; break; } - switch (InputChannel) + if (status == HAL_OK) { - case TIM_CHANNEL_1: + switch (InputChannel) { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); + case TIM_CHANNEL_1: + { + assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); + TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, + sConfig->ICSelection, sConfig->ICFilter); - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; + /* Reset the IC1PSC Bits */ + htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1FP1; + /* Select the Trigger source */ + htim->Instance->SMCR &= ~TIM_SMCR_TS; + htim->Instance->SMCR |= TIM_TS_TI1FP1; - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - break; + /* Select the Slave Mode */ + htim->Instance->SMCR &= ~TIM_SMCR_SMS; + htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + break; + } + + case TIM_CHANNEL_2: + { + assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); + + TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, + sConfig->ICSelection, sConfig->ICFilter); + + /* Reset the IC2PSC Bits */ + htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; + + /* Select the Trigger source */ + htim->Instance->SMCR &= ~TIM_SMCR_TS; + htim->Instance->SMCR |= TIM_TS_TI2FP2; + + /* Select the Slave Mode */ + htim->Instance->SMCR &= ~TIM_SMCR_SMS; + htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; + break; + } + + default: + status = HAL_ERROR; + break; } - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI2FP2; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - break; - } - - default: - break; } htim->State = HAL_TIM_STATE_READY; __HAL_UNLOCK(htim); - return HAL_OK; + return status; } else { @@ -4513,8 +4625,14 @@ HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_O HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength) { - return HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength, - ((BurstLength) >> 8U) + 1U); + HAL_StatusTypeDef status; + + status = HAL_TIM_DMABurst_MultiWriteStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength, + ((BurstLength) >> 8U) + 1U); + + + + return status; } /** @@ -4569,6 +4687,8 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); @@ -4595,6 +4715,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint { /* nothing to do */ } + switch (BurstRequestSrc) { case TIM_DMA_UPDATE: @@ -4608,7 +4729,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4626,7 +4747,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4644,7 +4765,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4662,7 +4783,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4680,7 +4801,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4698,7 +4819,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4716,7 +4837,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, - (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) + (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4724,16 +4845,20 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint break; } default: + status = HAL_ERROR; break; } - /* Configure the DMA Burst Mode */ - htim->Instance->DCR = (BurstBaseAddress | BurstLength); - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); + if (status == HAL_OK) + { + /* Configure the DMA Burst Mode */ + htim->Instance->DCR = (BurstBaseAddress | BurstLength); + /* Enable the TIM DMA Request */ + __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -4744,6 +4869,8 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiWriteStart(TIM_HandleTypeDef *htim, uint */ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); @@ -4786,17 +4913,21 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t B break; } default: + status = HAL_ERROR; break; } - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); + if (status == HAL_OK) + { + /* Disable the TIM Update DMA request */ + __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - /* Change the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + /* Change the DMA burst operation state */ + htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -4849,8 +4980,13 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t B HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength) { - return HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength, - ((BurstLength) >> 8U) + 1U); + HAL_StatusTypeDef status; + + status = HAL_TIM_DMABurst_MultiReadStart(htim, BurstBaseAddress, BurstRequestSrc, BurstBuffer, BurstLength, + ((BurstLength) >> 8U) + 1U); + + + return status; } /** @@ -4905,6 +5041,8 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 uint32_t BurstRequestSrc, uint32_t *BurstBuffer, uint32_t BurstLength, uint32_t DataLength) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); @@ -4944,7 +5082,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4962,7 +5100,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4980,7 +5118,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -4998,7 +5136,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -5016,7 +5154,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -5034,7 +5172,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -5052,7 +5190,7 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 /* Enable the DMA channel */ if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, - DataLength) != HAL_OK) + DataLength) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -5060,17 +5198,21 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 break; } default: + status = HAL_ERROR; break; } - /* Configure the DMA Burst Mode */ - htim->Instance->DCR = (BurstBaseAddress | BurstLength); + if (status == HAL_OK) + { + /* Configure the DMA Burst Mode */ + htim->Instance->DCR = (BurstBaseAddress | BurstLength); - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); + /* Enable the TIM DMA Request */ + __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -5081,6 +5223,8 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_MultiReadStart(TIM_HandleTypeDef *htim, uint3 */ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); @@ -5123,17 +5267,21 @@ HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t Bu break; } default: + status = HAL_ERROR; break; } - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); + if (status == HAL_OK) + { + /* Disable the TIM Update DMA request */ + __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - /* Change the DMA burst operation state */ - htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + /* Change the DMA burst operation state */ + htim->DMABurstState = HAL_DMA_BURST_STATE_READY; + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -5200,6 +5348,8 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef *sClearInputConfig, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); @@ -5241,17 +5391,17 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, #if defined (COMP7) case TIM_CLEARINPUTSOURCE_COMP7: #endif /* COMP7 */ + { + if (IS_TIM_OCCS_INSTANCE(htim->Instance)) { - if (IS_TIM_OCCS_INSTANCE(htim->Instance)) - { - /* Clear the OCREF clear selection bit */ - CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); + /* Clear the OCREF clear selection bit */ + CLEAR_BIT(htim->Instance->SMCR, TIM_SMCR_OCCS); - /* Clear TIM1_AF2_OCRSEL (reset value) */ - MODIFY_REG(htim->Instance->AF2, TIMx_AF2_OCRSEL, sClearInputConfig->ClearInputSource); - } - break; + /* Clear TIM1_AF2_OCRSEL (reset value) */ + MODIFY_REG(htim->Instance->AF2, TIMx_AF2_OCRSEL, sClearInputConfig->ClearInputSource); } + break; + } case TIM_CLEARINPUTSOURCE_ETR: { @@ -5285,104 +5435,108 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, } default: + status = HAL_ERROR; break; } - switch (Channel) + if (status == HAL_OK) { - case TIM_CHANNEL_1: + switch (Channel) { - if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + case TIM_CHANNEL_1: { - /* Enable the OCREF clear feature for Channel 1 */ - SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); + if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + { + /* Enable the OCREF clear feature for Channel 1 */ + SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); + } + else + { + /* Disable the OCREF clear feature for Channel 1 */ + CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); + } + break; } - else + case TIM_CHANNEL_2: { - /* Disable the OCREF clear feature for Channel 1 */ - CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC1CE); + if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + { + /* Enable the OCREF clear feature for Channel 2 */ + SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); + } + else + { + /* Disable the OCREF clear feature for Channel 2 */ + CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); + } + break; } - break; + case TIM_CHANNEL_3: + { + if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + { + /* Enable the OCREF clear feature for Channel 3 */ + SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); + } + else + { + /* Disable the OCREF clear feature for Channel 3 */ + CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); + } + break; + } + case TIM_CHANNEL_4: + { + if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + { + /* Enable the OCREF clear feature for Channel 4 */ + SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); + } + else + { + /* Disable the OCREF clear feature for Channel 4 */ + CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); + } + break; + } + case TIM_CHANNEL_5: + { + if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + { + /* Enable the OCREF clear feature for Channel 5 */ + SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); + } + else + { + /* Disable the OCREF clear feature for Channel 5 */ + CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); + } + break; + } + case TIM_CHANNEL_6: + { + if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) + { + /* Enable the OCREF clear feature for Channel 6 */ + SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); + } + else + { + /* Disable the OCREF clear feature for Channel 6 */ + CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); + } + break; + } + default: + break; } - case TIM_CHANNEL_2: - { - if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) - { - /* Enable the OCREF clear feature for Channel 2 */ - SET_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); - } - else - { - /* Disable the OCREF clear feature for Channel 2 */ - CLEAR_BIT(htim->Instance->CCMR1, TIM_CCMR1_OC2CE); - } - break; - } - case TIM_CHANNEL_3: - { - if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) - { - /* Enable the OCREF clear feature for Channel 3 */ - SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); - } - else - { - /* Disable the OCREF clear feature for Channel 3 */ - CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC3CE); - } - break; - } - case TIM_CHANNEL_4: - { - if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) - { - /* Enable the OCREF clear feature for Channel 4 */ - SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); - } - else - { - /* Disable the OCREF clear feature for Channel 4 */ - CLEAR_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE); - } - break; - } - case TIM_CHANNEL_5: - { - if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) - { - /* Enable the OCREF clear feature for Channel 5 */ - SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); - } - else - { - /* Disable the OCREF clear feature for Channel 5 */ - CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC5CE); - } - break; - } - case TIM_CHANNEL_6: - { - if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE) - { - /* Enable the OCREF clear feature for Channel 6 */ - SET_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); - } - else - { - /* Disable the OCREF clear feature for Channel 6 */ - CLEAR_BIT(htim->Instance->CCMR3, TIM_CCMR3_OC6CE); - } - break; - } - default: - break; } htim->State = HAL_TIM_STATE_READY; __HAL_UNLOCK(htim); - return HAL_OK; + return status; } /** @@ -5394,6 +5548,7 @@ HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef *sClockSourceConfig) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Process Locked */ @@ -5528,22 +5683,23 @@ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockCo case TIM_CLOCKSOURCE_ITR10: #endif /* HRTIM1 */ case TIM_CLOCKSOURCE_ITR11: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_INSTANCE((htim->Instance), sClockSourceConfig->ClockSource)); + { + /* Check whether or not the timer instance supports internal trigger input */ + assert_param(IS_TIM_CLOCKSOURCE_INSTANCE((htim->Instance), sClockSourceConfig->ClockSource)); - TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - break; - } + TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); + break; + } default: + status = HAL_ERROR; break; } htim->State = HAL_TIM_STATE_READY; __HAL_UNLOCK(htim); - return HAL_OK; + return status; } /** @@ -6093,7 +6249,7 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call default : /* Return error status */ - status = HAL_ERROR; + status = HAL_ERROR; break; } } @@ -6159,14 +6315,14 @@ HAL_StatusTypeDef HAL_TIM_RegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Call default : /* Return error status */ - status = HAL_ERROR; + status = HAL_ERROR; break; } } else { /* Return error status */ - status = HAL_ERROR; + status = HAL_ERROR; } /* Release Lock */ @@ -6227,136 +6383,168 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca switch (CallbackID) { case HAL_TIM_BASE_MSPINIT_CB_ID : - htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; /* Legacy weak Base MspInit Callback */ + /* Legacy weak Base MspInit Callback */ + htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; break; case HAL_TIM_BASE_MSPDEINIT_CB_ID : - htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; /* Legacy weak Base Msp DeInit Callback */ + /* Legacy weak Base Msp DeInit Callback */ + htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; break; case HAL_TIM_IC_MSPINIT_CB_ID : - htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; /* Legacy weak IC Msp Init Callback */ + /* Legacy weak IC Msp Init Callback */ + htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; break; case HAL_TIM_IC_MSPDEINIT_CB_ID : - htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; /* Legacy weak IC Msp DeInit Callback */ + /* Legacy weak IC Msp DeInit Callback */ + htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; break; case HAL_TIM_OC_MSPINIT_CB_ID : - htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; /* Legacy weak OC Msp Init Callback */ + /* Legacy weak OC Msp Init Callback */ + htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; break; case HAL_TIM_OC_MSPDEINIT_CB_ID : - htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; /* Legacy weak OC Msp DeInit Callback */ + /* Legacy weak OC Msp DeInit Callback */ + htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; break; case HAL_TIM_PWM_MSPINIT_CB_ID : - htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; /* Legacy weak PWM Msp Init Callback */ + /* Legacy weak PWM Msp Init Callback */ + htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; break; case HAL_TIM_PWM_MSPDEINIT_CB_ID : - htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; /* Legacy weak PWM Msp DeInit Callback */ + /* Legacy weak PWM Msp DeInit Callback */ + htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; break; case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : - htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; /* Legacy weak One Pulse Msp Init Callback */ + /* Legacy weak One Pulse Msp Init Callback */ + htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; break; case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : - htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; /* Legacy weak One Pulse Msp DeInit Callback */ + /* Legacy weak One Pulse Msp DeInit Callback */ + htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; break; case HAL_TIM_ENCODER_MSPINIT_CB_ID : - htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; /* Legacy weak Encoder Msp Init Callback */ + /* Legacy weak Encoder Msp Init Callback */ + htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; break; case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : - htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; /* Legacy weak Encoder Msp DeInit Callback */ + /* Legacy weak Encoder Msp DeInit Callback */ + htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; break; case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : - htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; /* Legacy weak Hall Sensor Msp Init Callback */ + /* Legacy weak Hall Sensor Msp Init Callback */ + htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; break; case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : - htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; /* Legacy weak Hall Sensor Msp DeInit Callback */ + /* Legacy weak Hall Sensor Msp DeInit Callback */ + htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; break; case HAL_TIM_PERIOD_ELAPSED_CB_ID : - htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; /* Legacy weak Period Elapsed Callback */ + /* Legacy weak Period Elapsed Callback */ + htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; break; case HAL_TIM_PERIOD_ELAPSED_HALF_CB_ID : - htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; /* Legacy weak Period Elapsed half complete Callback */ + /* Legacy weak Period Elapsed half complete Callback */ + htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; break; case HAL_TIM_TRIGGER_CB_ID : - htim->TriggerCallback = HAL_TIM_TriggerCallback; /* Legacy weak Trigger Callback */ + /* Legacy weak Trigger Callback */ + htim->TriggerCallback = HAL_TIM_TriggerCallback; break; case HAL_TIM_TRIGGER_HALF_CB_ID : - htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; /* Legacy weak Trigger half complete Callback */ + /* Legacy weak Trigger half complete Callback */ + htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; break; case HAL_TIM_IC_CAPTURE_CB_ID : - htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; /* Legacy weak IC Capture Callback */ + /* Legacy weak IC Capture Callback */ + htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; break; case HAL_TIM_IC_CAPTURE_HALF_CB_ID : - htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; /* Legacy weak IC Capture half complete Callback */ + /* Legacy weak IC Capture half complete Callback */ + htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; break; case HAL_TIM_OC_DELAY_ELAPSED_CB_ID : - htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; /* Legacy weak OC Delay Elapsed Callback */ + /* Legacy weak OC Delay Elapsed Callback */ + htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; break; case HAL_TIM_PWM_PULSE_FINISHED_CB_ID : - htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; /* Legacy weak PWM Pulse Finished Callback */ + /* Legacy weak PWM Pulse Finished Callback */ + htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; break; case HAL_TIM_PWM_PULSE_FINISHED_HALF_CB_ID : - htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; /* Legacy weak PWM Pulse Finished half complete Callback */ + /* Legacy weak PWM Pulse Finished half complete Callback */ + htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; break; case HAL_TIM_ERROR_CB_ID : - htim->ErrorCallback = HAL_TIM_ErrorCallback; /* Legacy weak Error Callback */ + /* Legacy weak Error Callback */ + htim->ErrorCallback = HAL_TIM_ErrorCallback; break; case HAL_TIM_COMMUTATION_CB_ID : - htim->CommutationCallback = HAL_TIMEx_CommutCallback; /* Legacy weak Commutation Callback */ + /* Legacy weak Commutation Callback */ + htim->CommutationCallback = HAL_TIMEx_CommutCallback; break; case HAL_TIM_COMMUTATION_HALF_CB_ID : - htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; /* Legacy weak Commutation half complete Callback */ + /* Legacy weak Commutation half complete Callback */ + htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; break; case HAL_TIM_BREAK_CB_ID : - htim->BreakCallback = HAL_TIMEx_BreakCallback; /* Legacy weak Break Callback */ + /* Legacy weak Break Callback */ + htim->BreakCallback = HAL_TIMEx_BreakCallback; break; case HAL_TIM_BREAK2_CB_ID : - htim->Break2Callback = HAL_TIMEx_Break2Callback; /* Legacy weak Break2 Callback */ + /* Legacy weak Break2 Callback */ + htim->Break2Callback = HAL_TIMEx_Break2Callback; break; case HAL_TIM_ENCODER_INDEX_CB_ID : - htim->EncoderIndexCallback = HAL_TIMEx_EncoderIndexCallback; /* Legacy weak Encoder Index Callback */ + /* Legacy weak Encoder Index Callback */ + htim->EncoderIndexCallback = HAL_TIMEx_EncoderIndexCallback; break; case HAL_TIM_DIRECTION_CHANGE_CB_ID : - htim->DirectionChangeCallback = HAL_TIMEx_DirectionChangeCallback; /* Legacy weak Direction Change Callback */ + /* Legacy weak Direction Change Callback */ + htim->DirectionChangeCallback = HAL_TIMEx_DirectionChangeCallback; break; case HAL_TIM_INDEX_ERROR_CB_ID : - htim->IndexErrorCallback = HAL_TIMEx_IndexErrorCallback; /* Legacy weak Index Error Callback */ + /* Legacy weak Index Error Callback */ + htim->IndexErrorCallback = HAL_TIMEx_IndexErrorCallback; break; case HAL_TIM_TRANSITION_ERROR_CB_ID : - htim->TransitionErrorCallback = HAL_TIMEx_TransitionErrorCallback; /* Legacy weak Transition Error Callback */ + /* Legacy weak Transition Error Callback */ + htim->TransitionErrorCallback = HAL_TIMEx_TransitionErrorCallback; break; default : /* Return error status */ - status = HAL_ERROR; + status = HAL_ERROR; break; } } @@ -6365,71 +6553,85 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca switch (CallbackID) { case HAL_TIM_BASE_MSPINIT_CB_ID : - htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; /* Legacy weak Base MspInit Callback */ + /* Legacy weak Base MspInit Callback */ + htim->Base_MspInitCallback = HAL_TIM_Base_MspInit; break; case HAL_TIM_BASE_MSPDEINIT_CB_ID : - htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; /* Legacy weak Base Msp DeInit Callback */ + /* Legacy weak Base Msp DeInit Callback */ + htim->Base_MspDeInitCallback = HAL_TIM_Base_MspDeInit; break; case HAL_TIM_IC_MSPINIT_CB_ID : - htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; /* Legacy weak IC Msp Init Callback */ + /* Legacy weak IC Msp Init Callback */ + htim->IC_MspInitCallback = HAL_TIM_IC_MspInit; break; case HAL_TIM_IC_MSPDEINIT_CB_ID : - htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; /* Legacy weak IC Msp DeInit Callback */ + /* Legacy weak IC Msp DeInit Callback */ + htim->IC_MspDeInitCallback = HAL_TIM_IC_MspDeInit; break; case HAL_TIM_OC_MSPINIT_CB_ID : - htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; /* Legacy weak OC Msp Init Callback */ + /* Legacy weak OC Msp Init Callback */ + htim->OC_MspInitCallback = HAL_TIM_OC_MspInit; break; case HAL_TIM_OC_MSPDEINIT_CB_ID : - htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; /* Legacy weak OC Msp DeInit Callback */ + /* Legacy weak OC Msp DeInit Callback */ + htim->OC_MspDeInitCallback = HAL_TIM_OC_MspDeInit; break; case HAL_TIM_PWM_MSPINIT_CB_ID : - htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; /* Legacy weak PWM Msp Init Callback */ + /* Legacy weak PWM Msp Init Callback */ + htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit; break; case HAL_TIM_PWM_MSPDEINIT_CB_ID : - htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; /* Legacy weak PWM Msp DeInit Callback */ + /* Legacy weak PWM Msp DeInit Callback */ + htim->PWM_MspDeInitCallback = HAL_TIM_PWM_MspDeInit; break; case HAL_TIM_ONE_PULSE_MSPINIT_CB_ID : - htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; /* Legacy weak One Pulse Msp Init Callback */ + /* Legacy weak One Pulse Msp Init Callback */ + htim->OnePulse_MspInitCallback = HAL_TIM_OnePulse_MspInit; break; case HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID : - htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; /* Legacy weak One Pulse Msp DeInit Callback */ + /* Legacy weak One Pulse Msp DeInit Callback */ + htim->OnePulse_MspDeInitCallback = HAL_TIM_OnePulse_MspDeInit; break; case HAL_TIM_ENCODER_MSPINIT_CB_ID : - htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; /* Legacy weak Encoder Msp Init Callback */ + /* Legacy weak Encoder Msp Init Callback */ + htim->Encoder_MspInitCallback = HAL_TIM_Encoder_MspInit; break; case HAL_TIM_ENCODER_MSPDEINIT_CB_ID : - htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; /* Legacy weak Encoder Msp DeInit Callback */ + /* Legacy weak Encoder Msp DeInit Callback */ + htim->Encoder_MspDeInitCallback = HAL_TIM_Encoder_MspDeInit; break; case HAL_TIM_HALL_SENSOR_MSPINIT_CB_ID : - htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; /* Legacy weak Hall Sensor Msp Init Callback */ + /* Legacy weak Hall Sensor Msp Init Callback */ + htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit; break; case HAL_TIM_HALL_SENSOR_MSPDEINIT_CB_ID : - htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; /* Legacy weak Hall Sensor Msp DeInit Callback */ + /* Legacy weak Hall Sensor Msp DeInit Callback */ + htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit; break; default : /* Return error status */ - status = HAL_ERROR; + status = HAL_ERROR; break; } } else { /* Return error status */ - status = HAL_ERROR; + status = HAL_ERROR; } /* Release Lock */ @@ -7361,6 +7563,7 @@ static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef *sSlaveConfig) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; uint32_t tmpccmr1; uint32_t tmpccer; @@ -7405,7 +7608,8 @@ static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - if ((sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) || (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_COMBINED_GATEDRESET)) + if ((sSlaveConfig->SlaveMode == TIM_SLAVEMODE_GATED) || \ + (sSlaveConfig->SlaveMode == TIM_SLAVEMODE_COMBINED_GATEDRESET)) { return HAL_ERROR; } @@ -7471,16 +7675,18 @@ static HAL_StatusTypeDef TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, case TIM_TS_ITR10: #endif /* HRTIM1 */ case TIM_TS_ITR11: - { - /* Check the parameter */ - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE((htim->Instance), sSlaveConfig->InputTrigger)); - break; - } + { + /* Check the parameter */ + assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_INSTANCE((htim->Instance), sSlaveConfig->InputTrigger)); + break; + } default: + status = HAL_ERROR; break; } - return HAL_OK; + + return status; } /** @@ -7867,24 +8073,24 @@ void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelStat void TIM_ResetCallback(TIM_HandleTypeDef *htim) { /* Reset the TIM callback to the legacy weak callbacks */ - htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; /* Legacy weak PeriodElapsedCallback */ - htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; /* Legacy weak PeriodElapsedHalfCpltCallback */ - htim->TriggerCallback = HAL_TIM_TriggerCallback; /* Legacy weak TriggerCallback */ - htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; /* Legacy weak TriggerHalfCpltCallback */ - htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; /* Legacy weak IC_CaptureCallback */ - htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; /* Legacy weak IC_CaptureHalfCpltCallback */ - htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; /* Legacy weak OC_DelayElapsedCallback */ - htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; /* Legacy weak PWM_PulseFinishedCallback */ - htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; /* Legacy weak PWM_PulseFinishedHalfCpltCallback */ - htim->ErrorCallback = HAL_TIM_ErrorCallback; /* Legacy weak ErrorCallback */ - htim->CommutationCallback = HAL_TIMEx_CommutCallback; /* Legacy weak CommutationCallback */ - htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; /* Legacy weak CommutationHalfCpltCallback */ - htim->BreakCallback = HAL_TIMEx_BreakCallback; /* Legacy weak BreakCallback */ - htim->Break2Callback = HAL_TIMEx_Break2Callback; /* Legacy weak Break2Callback */ - htim->EncoderIndexCallback = HAL_TIMEx_EncoderIndexCallback; /* Legacy weak Encoder Index Callback */ - htim->DirectionChangeCallback = HAL_TIMEx_DirectionChangeCallback; /* Legacy weak Direction Change Callback */ - htim->IndexErrorCallback = HAL_TIMEx_IndexErrorCallback; /* Legacy weak Index Error Callback */ - htim->TransitionErrorCallback = HAL_TIMEx_TransitionErrorCallback; /* Legacy weak Transition Error Callback */ + htim->PeriodElapsedCallback = HAL_TIM_PeriodElapsedCallback; + htim->PeriodElapsedHalfCpltCallback = HAL_TIM_PeriodElapsedHalfCpltCallback; + htim->TriggerCallback = HAL_TIM_TriggerCallback; + htim->TriggerHalfCpltCallback = HAL_TIM_TriggerHalfCpltCallback; + htim->IC_CaptureCallback = HAL_TIM_IC_CaptureCallback; + htim->IC_CaptureHalfCpltCallback = HAL_TIM_IC_CaptureHalfCpltCallback; + htim->OC_DelayElapsedCallback = HAL_TIM_OC_DelayElapsedCallback; + htim->PWM_PulseFinishedCallback = HAL_TIM_PWM_PulseFinishedCallback; + htim->PWM_PulseFinishedHalfCpltCallback = HAL_TIM_PWM_PulseFinishedHalfCpltCallback; + htim->ErrorCallback = HAL_TIM_ErrorCallback; + htim->CommutationCallback = HAL_TIMEx_CommutCallback; + htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback; + htim->BreakCallback = HAL_TIMEx_BreakCallback; + htim->Break2Callback = HAL_TIMEx_Break2Callback; + htim->EncoderIndexCallback = HAL_TIMEx_EncoderIndexCallback; + htim->DirectionChangeCallback = HAL_TIMEx_DirectionChangeCallback; + htim->IndexErrorCallback = HAL_TIMEx_IndexErrorCallback; + htim->TransitionErrorCallback = HAL_TIMEx_TransitionErrorCallback; } #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ @@ -7900,4 +8106,3 @@ void TIM_ResetCallback(TIM_HandleTypeDef *htim) /** * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c index a5e54cd..0ffa8d1 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c @@ -13,6 +13,17 @@ * + Time OCRef clear configuration * + Timer remapping capabilities configuration * + Timer encoder index configuration + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### TIMER Extended features ##### @@ -62,24 +73,16 @@ (#) Activate the TIM peripheral using one of the start functions: - (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT() - (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() + (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), + HAL_TIMEx_OCN_Start_IT() + (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), + HAL_TIMEx_PWMN_Start_IT() (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() - (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). + (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), + HAL_TIMEx_HallSensor_Start_IT(). @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -354,7 +357,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY); /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + TIM_CHANNEL_2 and TIM_CHANNEL_3) */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ @@ -386,7 +390,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); /* Disable the Input Capture channels 1, 2 and 3 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + TIM_CHANNEL_2 and TIM_CHANNEL_3) */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); /* Disable the Peripheral */ @@ -437,7 +442,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + TIM_CHANNEL_2 and TIM_CHANNEL_3) */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ @@ -469,7 +475,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); /* Disable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + TIM_CHANNEL_2 and TIM_CHANNEL_3) */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); /* Disable the capture compare Interrupts event */ @@ -529,7 +536,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32 } /* Enable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + TIM_CHANNEL_2 and TIM_CHANNEL_3) */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); /* Set the DMA Input Capture 1 Callbacks */ @@ -576,7 +584,8 @@ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance)); /* Disable the Input Capture channel 1 - (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ + (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, + TIM_CHANNEL_2 and TIM_CHANNEL_3) */ TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); @@ -719,6 +728,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -765,34 +775,38 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chann } default: + status = HAL_ERROR; break; } - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Output */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + if (status == HAL_OK) { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + /* Enable the TIM Break interrupt */ + __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); + + /* Enable the Capture compare channel N */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + + /* Enable the Main Output */ + __HAL_TIM_MOE_ENABLE(htim); + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -809,7 +823,9 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chann */ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpccer; + /* Check the parameters */ assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); @@ -844,30 +860,34 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe } default: + status = HAL_ERROR; break; } - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET) + if (status == HAL_OK) { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + /* Disable the Capture compare channel N */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + + /* Disable the TIM Break interrupt (only if no more channel is active) */ + tmpccer = htim->Instance->CCER; + if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET) + { + __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + } + + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); + + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + + /* Set the TIM complementary channel state */ + TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); } - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Set the TIM complementary channel state */ - TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - /* Return function status */ - return HAL_OK; + return status; } /** @@ -886,6 +906,7 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channe */ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -924,7 +945,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -944,7 +966,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -964,7 +987,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -984,7 +1008,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -995,31 +1020,35 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan } default: + status = HAL_ERROR; break; } - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Output */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + if (status == HAL_OK) { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + /* Enable the Capture compare channel N */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + + /* Enable the Main Output */ + __HAL_TIM_MOE_ENABLE(htim); + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1036,6 +1065,8 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Chan */ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); @@ -1074,23 +1105,27 @@ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chann } default: + status = HAL_ERROR; break; } - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + if (status == HAL_OK) + { + /* Disable the Capture compare channel N */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); - /* Set the TIM complementary channel state */ - TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + /* Set the TIM complementary channel state */ + TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1224,6 +1259,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) */ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -1269,34 +1305,38 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chan } default: + status = HAL_ERROR; break; } - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Output */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + if (status == HAL_OK) { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + /* Enable the TIM Break interrupt */ + __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); + + /* Enable the complementary PWM output */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + + /* Enable the Main Output */ + __HAL_TIM_MOE_ENABLE(htim); + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1313,6 +1353,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Chan */ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpccer; /* Check the parameters */ @@ -1349,30 +1390,34 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann } default: + status = HAL_ERROR; break; } - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET) + if (status == HAL_OK) { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + /* Disable the complementary PWM output */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + + /* Disable the TIM Break interrupt (only if no more channel is active) */ + tmpccer = htim->Instance->CCER; + if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE | TIM_CCER_CC4NE)) == (uint32_t)RESET) + { + __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); + } + + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); + + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + + /* Set the TIM complementary channel state */ + TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); } - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Set the TIM complementary channel state */ - TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); - /* Return function status */ - return HAL_OK; + return status; } /** @@ -1391,6 +1436,7 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Chann */ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpsmcr; /* Check the parameters */ @@ -1429,7 +1475,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1449,7 +1496,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1469,7 +1517,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1489,7 +1538,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAErrorCCxN ; /* Enable the DMA channel */ - if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length) != HAL_OK) + if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, + Length) != HAL_OK) { /* Return error status */ return HAL_ERROR; @@ -1500,31 +1550,35 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha } default: + status = HAL_ERROR; break; } - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Output */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ - if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + if (status == HAL_OK) { - tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; - if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + /* Enable the complementary PWM output */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); + + /* Enable the Main Output */ + __HAL_TIM_MOE_ENABLE(htim); + + /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) + { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) + { + __HAL_TIM_ENABLE(htim); + } + } + else { __HAL_TIM_ENABLE(htim); } } - else - { - __HAL_TIM_ENABLE(htim); - } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1541,6 +1595,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Cha */ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) { + HAL_StatusTypeDef status = HAL_OK; + /* Check the parameters */ assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); @@ -1579,23 +1635,27 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chan } default: + status = HAL_ERROR; break; } - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); + if (status == HAL_OK) + { + /* Disable the complementary PWM output */ + TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - /* Disable the Main Output */ - __HAL_TIM_MOE_DISABLE(htim); + /* Disable the Main Output */ + __HAL_TIM_MOE_DISABLE(htim); - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); - /* Set the TIM complementary channel state */ - TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + /* Set the TIM complementary channel state */ + TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY); + } /* Return function status */ - return HAL_OK; + return status; } /** @@ -1623,8 +1683,8 @@ HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Chan /** * @brief Starts the TIM One Pulse signal generation on the complementary * output. - * @note OutputChannel must match the pulse output channel chosen when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note OutputChannel must match the pulse output channel chosen when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel pulse output channel to enable * This parameter can be one of the following values: @@ -1644,7 +1704,7 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t Ou assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); /* Check the TIM channels state */ - if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) @@ -1672,8 +1732,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t Ou /** * @brief Stops the TIM One Pulse signal generation on the complementary * output. - * @note OutputChannel must match the pulse output channel chosen when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note OutputChannel must match the pulse output channel chosen when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel pulse output channel to disable * This parameter can be one of the following values: @@ -1711,8 +1771,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t Out /** * @brief Starts the TIM One Pulse signal generation in interrupt mode on the * complementary channel. - * @note OutputChannel must match the pulse output channel chosen when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note OutputChannel must match the pulse output channel chosen when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel pulse output channel to enable * This parameter can be one of the following values: @@ -1732,7 +1792,7 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); /* Check the TIM channels state */ - if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) + if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY) || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY) || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY) || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY)) @@ -1766,8 +1826,8 @@ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t /** * @brief Stops the TIM One Pulse signal generation in interrupt mode on the * complementary channel. - * @note OutputChannel must match the pulse output channel chosen when calling - * @ref HAL_TIM_OnePulse_ConfigChannel(). + * @note OutputChannel must match the pulse output channel chosen when calling + * @ref HAL_TIM_OnePulse_ConfigChannel(). * @param htim TIM One Pulse handle * @param OutputChannel pulse output channel to disable * This parameter can be one of the following values: @@ -2285,6 +2345,7 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmporx; uint32_t bkin_enable_mask; uint32_t bkin_polarity_mask; @@ -2424,12 +2485,13 @@ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, break; } default: + status = HAL_ERROR; break; } __HAL_UNLOCK(htim); - return HAL_OK; + return status; } /** @@ -2811,6 +2873,7 @@ HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Chan */ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tmpbdtr; /* Check the parameters */ @@ -2845,10 +2908,11 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B break; } default: + status = HAL_ERROR; break; } - return HAL_OK; + return status; } /** @@ -2864,6 +2928,7 @@ HAL_StatusTypeDef HAL_TIMEx_DisarmBreakInput(TIM_HandleTypeDef *htim, uint32_t B */ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput) { + HAL_StatusTypeDef status = HAL_OK; uint32_t tickstart; /* Check the parameters */ @@ -2880,15 +2945,17 @@ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t Br /* Break input BRK is re-armed automatically by hardware. Poll to check whether fault condition disappeared */ /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - do + while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) { - if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != TIM_BDTR_BKDSRM) + if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT) { - return HAL_OK; + /* New check to avoid false timeout detection in case of preemption */ + if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BKDSRM) != 0UL) + { + return HAL_TIMEOUT; + } } - } while ((HAL_GetTick() - tickstart) <= TIM_BREAKINPUT_REARM_TIMEOUT); - - return HAL_TIMEOUT; + } } break; } @@ -2901,23 +2968,26 @@ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t Br /* Break input BRK2 is re-armed automatically by hardware. Poll to check whether fault condition disappeared */ /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - do + while (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) { - if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != TIM_BDTR_BK2DSRM) + if ((HAL_GetTick() - tickstart) > TIM_BREAKINPUT_REARM_TIMEOUT) { - return HAL_OK; + /* New check to avoid false timeout detection in case of preemption */ + if (READ_BIT(htim->Instance->BDTR, TIM_BDTR_BK2DSRM) != 0UL) + { + return HAL_TIMEOUT; + } } - } while ((HAL_GetTick() - tickstart) <= TIM_BREAKINPUT_REARM_TIMEOUT); - - return HAL_TIMEOUT; + } } break; } default: + status = HAL_ERROR; break; } - return HAL_OK; + return status; } /** @@ -2934,8 +3004,9 @@ HAL_StatusTypeDef HAL_TIMEx_ReArmBreakInput(TIM_HandleTypeDef *htim, uint32_t Br * @note Macros @ref __HAL_TIM_CALC_PERIOD_DITHER() __HAL_TIM_CALC_DELAY_DITHER() __HAL_TIM_CALC_PULSE_DITHER() * can be used to calculate period (ARR) and delay (CCRx) value. * @note Enabling dithering, modifies automatically values of registers ARR/CCRx to keep the same integer part. - * So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD() __HAL_TIM_GET_COMPARE() - * and if necessary update Init structure field htim->Init.Period . + * @note Enabling dithering, modifies automatically values of registers ARR/CCRx to keep the same integer part. + * So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD() + * __HAL_TIM_GET_COMPARE() and if necessary update Init structure field htim->Init.Period . * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim) @@ -2958,8 +3029,8 @@ HAL_StatusTypeDef HAL_TIMEx_DitheringEnable(TIM_HandleTypeDef *htim) * - ARR and CCRx values are limited to 0xFFEF in dithering mode * (corresponds to 4094 for the integer part and 15 for the dithered part). * @note Disabling dithering, modifies automatically values of registers ARR/CCRx to keep the same integer part. - * So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD() __HAL_TIM_GET_COMPARE() - * and if necessary update Init structure field htim->Init.Period . + * So it may be necessary to read ARR value or CCRx value with macros @ref __HAL_TIM_GET_AUTORELOAD() + * __HAL_TIM_GET_COMPARE() and if necessary update Init structure field htim->Init.Period . * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_DitheringDisable(TIM_HandleTypeDef *htim) @@ -3451,7 +3522,7 @@ HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, */ /* Private functions ---------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Functions TIMEx Private Functions +/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions * @{ */ @@ -3628,5 +3699,3 @@ static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Cha /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_timebase_tim_template.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_timebase_tim_template.c index 09cf446..e61158e 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_timebase_tim_template.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_timebase_tim_template.c @@ -8,8 +8,18 @@ * the TIM time base: * + Initializes the TIM peripheral to generate a Period elapsed Event each 1ms * + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms + ****************************************************************************** + * @attention * - @verbatim + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim ============================================================================== ##### How to use this driver ##### ============================================================================== @@ -25,17 +35,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -197,4 +196,3 @@ void TIM6_DAC_IRQHandler(void) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c index fde8da6..3a2509f 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c @@ -10,6 +10,17 @@ * + Peripheral Control functions * * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim =============================================================================== ##### How to use this driver ##### @@ -76,8 +87,8 @@ allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_UART_RegisterCallback() to register a user callback. - Function @ref HAL_UART_RegisterCallback() allows to register following callbacks: + Use Function HAL_UART_RegisterCallback() to register a user callback. + Function HAL_UART_RegisterCallback() allows to register following callbacks: (+) TxHalfCpltCallback : Tx Half Complete Callback. (+) TxCpltCallback : Tx Complete Callback. (+) RxHalfCpltCallback : Rx Half Complete Callback. @@ -95,9 +106,9 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_UART_UnRegisterCallback() to reset a callback to the default + Use function HAL_UART_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. - @ref HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, + HAL_UART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) TxHalfCpltCallback : Tx Half Complete Callback. @@ -116,16 +127,16 @@ [..] For specific callback RxEventCallback, use dedicated registration/reset functions: - respectively @ref HAL_UART_RegisterRxEventCallback() , @ref HAL_UART_UnRegisterRxEventCallback(). + respectively HAL_UART_RegisterRxEventCallback() , HAL_UART_UnRegisterRxEventCallback(). [..] - By default, after the @ref HAL_UART_Init() and when the state is HAL_UART_STATE_RESET + By default, after the HAL_UART_Init() and when the state is HAL_UART_STATE_RESET all callbacks are set to the corresponding weak (surcharged) functions: - examples @ref HAL_UART_TxCpltCallback(), @ref HAL_UART_RxHalfCpltCallback(). + examples HAL_UART_TxCpltCallback(), HAL_UART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_UART_Init() - and @ref HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_UART_Init() and @ref HAL_UART_DeInit() + reset to the legacy weak (surcharged) functions in the HAL_UART_Init() + and HAL_UART_DeInit() only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_UART_Init() and HAL_UART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). [..] @@ -134,8 +145,8 @@ in HAL_UART_STATE_READY or HAL_UART_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_UART_RegisterCallback() before calling @ref HAL_UART_DeInit() - or @ref HAL_UART_Init() function. + using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit() + or HAL_UART_Init() function. [..] When The compilation define USE_HAL_UART_REGISTER_CALLBACKS is set to 0 or @@ -145,17 +156,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -193,7 +193,6 @@ */ /* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ /** @addtogroup UART_Private_Functions * @{ @@ -223,8 +222,8 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart); * @} */ -/* Exported Constants --------------------------------------------------------*/ -/** @addtogroup UART_Exported_Constants +/* Private variables ---------------------------------------------------------*/ +/** @addtogroup UART_Private_variables * @{ */ const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U, 128U, 256U}; @@ -232,6 +231,7 @@ const uint16_t UARTPrescTable[12] = {1U, 2U, 4U, 6U, 8U, 10U, 12U, 16U, 32U, 64U * @} */ +/* Exported Constants --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/ /** @defgroup UART_Exported_Functions UART Exported Functions @@ -1118,10 +1118,10 @@ HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart) * @param Timeout Timeout duration. * @retval HAL status */ -HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - uint8_t *pdata8bits; - uint16_t *pdata16bits; + const uint8_t *pdata8bits; + const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ @@ -1147,7 +1147,7 @@ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, u if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) { pdata8bits = NULL; - pdata16bits = (uint16_t *) pData; + pdata16bits = (const uint16_t *) pData; } else { @@ -1293,7 +1293,7 @@ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, ui * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) @@ -1329,7 +1329,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData __HAL_UNLOCK(huart); /* Enable the TX FIFO threshold interrupt */ - SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); } else { @@ -1346,7 +1346,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData __HAL_UNLOCK(huart); /* Enable the Transmit Data Register Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); } return HAL_OK; @@ -1388,7 +1388,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) { /* Enable the UART Receiver Timeout Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); } } @@ -1410,7 +1410,7 @@ HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) +HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) @@ -1464,7 +1464,7 @@ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pDat /* Enable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); return HAL_OK; } @@ -1507,7 +1507,7 @@ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U) { /* Enable the UART Receiver Timeout Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE); } } @@ -1535,17 +1535,17 @@ HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart) (gstate == HAL_UART_STATE_BUSY_TX)) { /* Disable the UART DMA Tx request */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); } if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && (rxstate == HAL_UART_STATE_BUSY_RX)) { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Disable the UART DMA Rx request */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); } __HAL_UNLOCK(huart); @@ -1565,7 +1565,7 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) if (huart->gState == HAL_UART_STATE_BUSY_TX) { /* Enable the UART DMA Tx request */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); } if (huart->RxState == HAL_UART_STATE_BUSY_RX) { @@ -1573,11 +1573,14 @@ HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart) __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + } + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Enable the UART DMA Rx request */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); } __HAL_UNLOCK(huart); @@ -1606,7 +1609,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) && (gstate == HAL_UART_STATE_BUSY_TX)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); /* Abort the UART DMA Tx channel */ if (huart->hdmatx != NULL) @@ -1630,7 +1633,7 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) && (rxstate == HAL_UART_STATE_BUSY_RX)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) @@ -1668,20 +1671,21 @@ HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) { /* Disable TXE, TC, RXNE, PE, RXFT, TXFT and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE | - USART_CR1_TCIE)); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE); /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); } - /* Disable the UART DMA Tx request if enabled */ + /* Abort the UART DMA Tx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + /* Disable the UART DMA Tx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ if (huart->hdmatx != NULL) @@ -1703,10 +1707,11 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) } } - /* Disable the UART DMA Rx request if enabled */ + /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ if (huart->hdmarx != NULL) @@ -1769,13 +1774,14 @@ HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) { /* Disable TCIE, TXEIE and TXFTIE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - /* Disable the UART DMA Tx request if enabled */ + /* Abort the UART DMA Tx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + /* Disable the UART DMA Tx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); /* Abort the UART DMA Tx channel : use blocking DMA Abort API (no callback) */ if (huart->hdmatx != NULL) @@ -1827,19 +1833,20 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart) { /* Disable PEIE, EIE, RXNEIE and RXFTIE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE | USART_CR3_RXFTIE); /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); } - /* Disable the UART DMA Rx request if enabled */ + /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */ if (huart->hdmarx != NULL) @@ -1896,14 +1903,14 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) uint32_t abortcplt = 1U; /* Disable interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | - USART_CR1_TXEIE_TXFNFIE)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_TCIE | USART_CR1_RXNEIE_RXFNEIE | + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE)); /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); } /* If DMA Tx and/or DMA Rx Handles are associated to UART Handle, DMA Abort complete callbacks should be initialised @@ -1937,11 +1944,11 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) } } - /* Disable the UART DMA Tx request if enabled */ + /* Abort the UART DMA Tx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) { /* Disable DMA Tx at UART level */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmatx != NULL) @@ -1961,10 +1968,11 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) } } - /* Disable the UART DMA Rx request if enabled */ + /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmarx != NULL) @@ -2046,13 +2054,14 @@ HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) { /* Disable interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TCIE | USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); - /* Disable the UART DMA Tx request if enabled */ + /* Abort the UART DMA Tx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + /* Disable the UART DMA Tx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmatx != NULL) @@ -2136,19 +2145,20 @@ HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart) HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_IDLEIE)); } - /* Disable the UART DMA Rx request if enabled */ + /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* Abort the UART DMA Rx channel : use non blocking DMA Abort API (callback) */ if (huart->hdmarx != NULL) @@ -2326,10 +2336,11 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - /* Disable the UART DMA Rx request if enabled */ + /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) { - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + /* Disable the UART DMA Rx request if enabled */ + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) @@ -2414,18 +2425,18 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); @@ -2450,10 +2461,10 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) && (nb_rx_data > 0U)) { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); /* Disable the UART Error Interrupt:(Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; @@ -2462,7 +2473,7 @@ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) /* Clear RxISR function pointer */ huart->RxISR = NULL; - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); @@ -2812,7 +2823,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart) huart->gState = HAL_UART_STATE_BUSY; /* Enable USART mute mode by setting the MME bit in the CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_MME); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_MME); huart->gState = HAL_UART_STATE_READY; @@ -2832,7 +2843,7 @@ HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart) huart->gState = HAL_UART_STATE_BUSY; /* Disable USART mute mode by clearing the MME bit in the CR1 register */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_MME); huart->gState = HAL_UART_STATE_READY; @@ -2861,10 +2872,10 @@ HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart) huart->gState = HAL_UART_STATE_BUSY; /* Clear TE and RE bits */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_TE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TE); huart->gState = HAL_UART_STATE_READY; @@ -2884,10 +2895,10 @@ HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart) huart->gState = HAL_UART_STATE_BUSY; /* Clear TE and RE bits */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE)); /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */ - SET_BIT(huart->Instance->CR1, USART_CR1_RE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RE); huart->gState = HAL_UART_STATE_READY; @@ -3157,7 +3168,7 @@ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) { - usartdiv = (uint16_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); @@ -3198,10 +3209,10 @@ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) if (pclk != 0U) { /* USARTDIV must be greater than or equal to 0d16 */ - usartdiv = (uint16_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); + usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate, huart->Init.ClockPrescaler)); if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) { - huart->Instance->BRR = usartdiv; + huart->Instance->BRR = (uint16_t)usartdiv; } else { @@ -3343,10 +3354,11 @@ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) } /** - * @brief Handle UART Communication Timeout. + * @brief This function handles UART Communication Timeout. It waits + * until a flag is no longer in the specified status. * @param huart UART handle. * @param Flag Specifies the UART flag to check - * @param Status Flag status (SET or RESET) + * @param Status The actual Flag status (SET or RESET) * @param Tickstart Tick start value * @param Timeout Timeout duration * @retval HAL status @@ -3364,8 +3376,9 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_ { /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE)); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); huart->gState = HAL_UART_STATE_READY; huart->RxState = HAL_UART_STATE_READY; @@ -3384,8 +3397,9 @@ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_ /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | USART_CR1_TXEIE_TXFNFIE)); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE | + USART_CR1_TXEIE_TXFNFIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); huart->gState = HAL_UART_STATE_READY; huart->RxState = HAL_UART_STATE_READY; @@ -3427,7 +3441,7 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat huart->RxState = HAL_UART_STATE_BUSY_RX; /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Configure Rx interrupt processing */ if ((huart->FifoMode == UART_FIFOMODE_ENABLE) && (Size >= huart->NbRxDataToProcess)) @@ -3445,8 +3459,11 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat __HAL_UNLOCK(huart); /* Enable the UART Parity Error interrupt and RX FIFO Threshold interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); - SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + } + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); } else { @@ -3463,7 +3480,14 @@ HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pDat __HAL_UNLOCK(huart); /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + } + else + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } } return HAL_OK; } @@ -3509,8 +3533,8 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa __HAL_UNLOCK(huart); - /* Restore huart->gState to ready */ - huart->gState = HAL_UART_STATE_READY; + /* Restore huart->RxState to ready */ + huart->RxState = HAL_UART_STATE_READY; return HAL_ERROR; } @@ -3518,14 +3542,17 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa __HAL_UNLOCK(huart); /* Enable the UART Parity Error Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + if (huart->Init.Parity != UART_PARITY_NONE) + { + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); + } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - SET_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Enable the DMA transfer for the receiver request by setting the DMAR bit in the UART CR3 register */ - SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); return HAL_OK; } @@ -3539,8 +3566,8 @@ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pDa static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { /* Disable TXEIE, TCIE, TXFT interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE_TXFNFIE | USART_CR1_TCIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_TXFTIE)); /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; @@ -3555,13 +3582,13 @@ static void UART_EndTxTransfer(UART_HandleTypeDef *huart) static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); } /* At end of Rx process, restore huart->RxState to Ready */ @@ -3589,10 +3616,10 @@ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) /* Disable the DMA transfer for transmit request by resetting the DMAT bit in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); } /* DMA Circular mode */ else @@ -3640,12 +3667,12 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) huart->RxXferCount = 0U; /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; @@ -3653,7 +3680,7 @@ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); } } @@ -3965,10 +3992,10 @@ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) if (huart->TxXferCount == 0U) { /* Disable the UART Transmit Data Register Empty Interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); } else { @@ -3988,7 +4015,7 @@ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) */ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) { - uint16_t *tmp; + const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) @@ -3996,14 +4023,14 @@ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) if (huart->TxXferCount == 0U) { /* Disable the UART Transmit Data Register Empty Interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); } else { - tmp = (uint16_t *) huart->pTxBuffPtr; + tmp = (const uint16_t *) huart->pTxBuffPtr; huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); huart->pTxBuffPtr += 2U; huart->TxXferCount--; @@ -4030,10 +4057,10 @@ static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) if (huart->TxXferCount == 0U) { /* Disable the TX FIFO threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); break; /* force exit loop */ } @@ -4060,7 +4087,7 @@ static void UART_TxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) */ static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) { - uint16_t *tmp; + const uint16_t *tmp; uint16_t nb_tx_data; /* Check that a Tx process is ongoing */ @@ -4071,16 +4098,16 @@ static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) if (huart->TxXferCount == 0U) { /* Disable the TX FIFO threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_TXFTIE); /* Enable the UART Transmit Complete Interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); break; /* force exit loop */ } else if (READ_BIT(huart->Instance->ISR, USART_ISR_TXE_TXFNF) != 0U) { - tmp = (uint16_t *) huart->pTxBuffPtr; + tmp = (const uint16_t *) huart->pTxBuffPtr; huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); huart->pTxBuffPtr += 2U; huart->TxXferCount--; @@ -4102,7 +4129,7 @@ static void UART_TxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { /* Disable the UART Transmit Complete Interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; @@ -4140,10 +4167,10 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) if (huart->RxXferCount == 0U) { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; @@ -4155,9 +4182,17 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - /* Disable IDLE interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); @@ -4177,7 +4212,6 @@ static void UART_RxISR_8BIT(UART_HandleTypeDef *huart) HAL_UART_RxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; } } else @@ -4212,10 +4246,10 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) if (huart->RxXferCount == 0U) { /* Disable the UART Parity Error Interrupt and RXNE interrupt*/ - CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE_RXFNEIE | USART_CR1_PEIE)); /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; @@ -4227,9 +4261,17 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - /* Disable IDLE interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); @@ -4249,7 +4291,6 @@ static void UART_RxISR_16BIT(UART_HandleTypeDef *huart) HAL_UART_RxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; } } else @@ -4334,11 +4375,11 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) if (huart->RxXferCount == 0U) { /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; @@ -4350,9 +4391,17 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - /* Disable IDLE interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); @@ -4372,7 +4421,6 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) HAL_UART_RxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; } } @@ -4384,13 +4432,13 @@ static void UART_RxISR_8BIT_FIFOEN(UART_HandleTypeDef *huart) if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) { /* Disable the UART RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); /* Update the RxISR function pointer */ huart->RxISR = UART_RxISR_8BIT; /* Enable the UART Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); } } else @@ -4477,11 +4525,11 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) if (huart->RxXferCount == 0U) { /* Disable the UART Parity Error Interrupt and RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) and RX FIFO Threshold interrupt */ - CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE)); /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; @@ -4493,9 +4541,17 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) If Reception till IDLE event has been selected : */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { - /* Disable IDLE interrupt */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + /* Set reception type to Standard */ + huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; + /* Disable IDLE interrupt */ + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET) + { + /* Clear IDLE Flag */ + __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); + } #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); @@ -4515,7 +4571,6 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) HAL_UART_RxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; } } @@ -4527,13 +4582,13 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) if ((rxdatacount != 0U) && (rxdatacount < huart->NbRxDataToProcess)) { /* Disable the UART RXFT interrupt*/ - CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); + ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_RXFTIE); /* Update the RxISR function pointer */ huart->RxISR = UART_RxISR_16BIT; /* Enable the UART Data Register Not Empty interrupt */ - SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); } } else @@ -4556,4 +4611,3 @@ static void UART_RxISR_16BIT_FIFOEN(UART_HandleTypeDef *huart) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c index 1b5c3c9..c980cee 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c @@ -9,6 +9,17 @@ * + Peripheral Control functions * * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### UART peripheral extended features ##### @@ -27,17 +38,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -483,7 +483,7 @@ HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) __HAL_LOCK(huart); /* Set UESM bit */ - SET_BIT(huart->Instance->CR1, USART_CR1_UESM); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_UESM); /* Process Unlocked */ __HAL_UNLOCK(huart); @@ -502,7 +502,7 @@ HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) __HAL_LOCK(huart); /* Clear UESM bit */ - CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); + ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); /* Process Unlocked */ __HAL_UNLOCK(huart); @@ -858,7 +858,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); } else { @@ -920,7 +920,7 @@ HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); + ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); } else { @@ -1016,4 +1016,3 @@ static void UARTEx_SetNbDataToProcess(UART_HandleTypeDef *huart) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c index b32aa0f..e12eedb 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart.c @@ -11,6 +11,17 @@ * + Peripheral Control functions * + Peripheral State and Error functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim =============================================================================== ##### How to use this driver ##### @@ -62,8 +73,8 @@ allows the user to configure dynamically the driver callbacks. [..] - Use Function @ref HAL_USART_RegisterCallback() to register a user callback. - Function @ref HAL_USART_RegisterCallback() allows to register following callbacks: + Use Function HAL_USART_RegisterCallback() to register a user callback. + Function HAL_USART_RegisterCallback() allows to register following callbacks: (+) TxHalfCpltCallback : Tx Half Complete Callback. (+) TxCpltCallback : Tx Complete Callback. (+) RxHalfCpltCallback : Rx Half Complete Callback. @@ -79,9 +90,9 @@ and a pointer to the user callback function. [..] - Use function @ref HAL_USART_UnRegisterCallback() to reset a callback to the default + Use function HAL_USART_UnRegisterCallback() to reset a callback to the default weak (surcharged) function. - @ref HAL_USART_UnRegisterCallback() takes as parameters the HAL peripheral handle, + HAL_USART_UnRegisterCallback() takes as parameters the HAL peripheral handle, and the Callback ID. This function allows to reset following callbacks: (+) TxHalfCpltCallback : Tx Half Complete Callback. @@ -97,13 +108,13 @@ (+) MspDeInitCallback : USART MspDeInit. [..] - By default, after the @ref HAL_USART_Init() and when the state is HAL_USART_STATE_RESET + By default, after the HAL_USART_Init() and when the state is HAL_USART_STATE_RESET all callbacks are set to the corresponding weak (surcharged) functions: - examples @ref HAL_USART_TxCpltCallback(), @ref HAL_USART_RxHalfCpltCallback(). + examples HAL_USART_TxCpltCallback(), HAL_USART_RxHalfCpltCallback(). Exception done for MspInit and MspDeInit functions that are respectively - reset to the legacy weak (surcharged) functions in the @ref HAL_USART_Init() - and @ref HAL_USART_DeInit() only when these callbacks are null (not registered beforehand). - If not, MspInit or MspDeInit are not null, the @ref HAL_USART_Init() and @ref HAL_USART_DeInit() + reset to the legacy weak (surcharged) functions in the HAL_USART_Init() + and HAL_USART_DeInit() only when these callbacks are null (not registered beforehand). + If not, MspInit or MspDeInit are not null, the HAL_USART_Init() and HAL_USART_DeInit() keep and use the user MspInit/MspDeInit callbacks (registered beforehand). [..] @@ -112,8 +123,8 @@ in HAL_USART_STATE_READY or HAL_USART_STATE_RESET state, thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. In that case first register the MspInit/MspDeInit user callbacks - using @ref HAL_USART_RegisterCallback() before calling @ref HAL_USART_DeInit() - or @ref HAL_USART_Init() function. + using HAL_USART_RegisterCallback() before calling HAL_USART_DeInit() + or HAL_USART_Init() function. [..] When The compilation define USE_HAL_USART_REGISTER_CALLBACKS is set to 0 or @@ -123,17 +134,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -748,10 +748,10 @@ HAL_StatusTypeDef HAL_USART_UnRegisterCallback(USART_HandleTypeDef *husart, HAL_ * @param Timeout Timeout duration. * @retval HAL status */ -HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout) +HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size, uint32_t Timeout) { - uint8_t *ptxdata8bits; - uint16_t *ptxdata16bits; + const uint8_t *ptxdata8bits; + const uint16_t *ptxdata16bits; uint32_t tickstart; if (husart->State == HAL_USART_STATE_READY) @@ -777,7 +777,7 @@ HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxDa if ((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) { ptxdata8bits = NULL; - ptxdata16bits = (uint16_t *) pTxData; + ptxdata16bits = (const uint16_t *) pTxData; } else { @@ -957,13 +957,13 @@ HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxDat * @param Timeout Timeout duration. * @retval HAL status */ -HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) { uint8_t *prxdata8bits; uint16_t *prxdata16bits; - uint8_t *ptxdata8bits; - uint16_t *ptxdata16bits; + const uint8_t *ptxdata8bits; + const uint16_t *ptxdata16bits; uint16_t uhMask; uint16_t rxdatacount; uint32_t tickstart; @@ -998,7 +998,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t { prxdata8bits = NULL; ptxdata8bits = NULL; - ptxdata16bits = (uint16_t *) pTxData; + ptxdata16bits = (const uint16_t *) pTxData; prxdata16bits = (uint16_t *) pRxData; } else @@ -1104,7 +1104,7 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t * @param Size amount of data elements (u8 or u16) to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) +HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size) { if (husart->State == HAL_USART_STATE_READY) { @@ -1231,7 +1231,10 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx __HAL_UNLOCK(husart); /* Enable the USART Parity Error interrupt and RX FIFO Threshold interrupt */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } SET_BIT(husart->Instance->CR3, USART_CR3_RXFTIE); } else @@ -1250,7 +1253,14 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx __HAL_UNLOCK(husart); /* Enable the USART Parity Error and Data Register not empty Interrupts */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + } + else + { + SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } } if (husart->SlaveMode == USART_SLAVEMODE_DISABLE) @@ -1291,7 +1301,7 @@ HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRx * @param Size amount of data elements (u8 or u16) to be sent (same amount to be received). * @retval HAL status */ -HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) { @@ -1339,8 +1349,11 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ SET_BIT(husart->Instance->CR3, USART_CR3_EIE); - /* Enable the USART Parity Error interrupt */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + /* Enable the USART Parity Error interrupt */ + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } /* Enable the TX and RX FIFO Threshold interrupts */ SET_BIT(husart->Instance->CR3, (USART_CR3_TXFTIE | USART_CR3_RXFTIE)); @@ -1365,7 +1378,14 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint SET_BIT(husart->Instance->CR3, USART_CR3_EIE); /* Enable the USART Parity Error and USART Data Register not empty Interrupts */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE_RXFNEIE); + } + else + { + SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE_RXFNEIE); + } /* Enable the USART Transmit Data Register Empty Interrupt */ SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE_TXFNFIE); @@ -1389,10 +1409,10 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint * @param Size amount of data elements (u8 or u16) to be sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) +HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint16_t Size) { HAL_StatusTypeDef status = HAL_OK; - uint32_t *tmp; + const uint32_t *tmp; if (husart->State == HAL_USART_STATE_READY) { @@ -1423,8 +1443,8 @@ HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *p husart->hdmatx->XferErrorCallback = USART_DMAError; /* Enable the USART transmit DMA channel */ - tmp = (uint32_t *)&pTxData; - status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size); + tmp = (const uint32_t *)&pTxData; + status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size); } if (status == HAL_OK) @@ -1535,8 +1555,11 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR /* Process Unlocked */ __HAL_UNLOCK(husart); - /* Enable the USART Parity Error Interrupt */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + /* Enable the USART Parity Error Interrupt */ + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ SET_BIT(husart->Instance->CR3, USART_CR3_EIE); @@ -1591,11 +1614,11 @@ HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pR * @param Size amount of data elements (u8 or u16) to be received/sent. * @retval HAL status */ -HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, +HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) { HAL_StatusTypeDef status; - uint32_t *tmp; + const uint32_t *tmp; if (husart->State == HAL_USART_STATE_READY) { @@ -1637,13 +1660,13 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin /* Enable the USART receive DMA channel */ tmp = (uint32_t *)&pRxData; - status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t *)tmp, Size); + status = HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(const uint32_t *)tmp, Size); /* Enable the USART transmit DMA channel */ if (status == HAL_OK) { - tmp = (uint32_t *)&pTxData; - status = HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size); + tmp = (const uint32_t *)&pTxData; + status = HAL_DMA_Start_IT(husart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&husart->Instance->TDR, Size); } } else @@ -1656,8 +1679,11 @@ HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uin /* Process Unlocked */ __HAL_UNLOCK(husart); - /* Enable the USART Parity Error Interrupt */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + /* Enable the USART Parity Error Interrupt */ + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ SET_BIT(husart->Instance->CR3, USART_CR3_EIE); @@ -1774,7 +1800,10 @@ HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart) __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF); /* Re-enable PE and ERR (Frame error, noise error, overrun error) interrupts */ - SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + if (husart->Init.Parity != USART_PARITY_NONE) + { + SET_BIT(husart->Instance->CR1, USART_CR1_PEIE); + } SET_BIT(husart->Instance->CR3, USART_CR3_EIE); /* Enable the USART DMA Rx request before the DMA Tx request */ @@ -1866,9 +1895,10 @@ HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart) USART_CR1_TCIE)); CLEAR_BIT(husart->Instance->CR3, (USART_CR3_EIE | USART_CR3_RXFTIE | USART_CR3_TXFTIE)); - /* Disable the USART DMA Tx request if enabled */ + /* Abort the USART DMA Tx channel if enabled */ if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)) { + /* Disable the USART DMA Tx request if enabled */ CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT); /* Abort the USART DMA Tx channel : use blocking DMA Abort API (no callback) */ @@ -1891,9 +1921,10 @@ HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart) } } - /* Disable the USART DMA Rx request if enabled */ + /* Abort the USART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)) { + /* Disable the USART DMA Rx request if enabled */ CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); /* Abort the USART DMA Rx channel : use blocking DMA Abort API (no callback) */ @@ -1995,7 +2026,7 @@ HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart) } } - /* Disable the USART DMA Tx request if enabled */ + /* Abort the USART DMA Tx channel if enabled */ if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT)) { /* Disable DMA Tx at USART level */ @@ -2019,9 +2050,10 @@ HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart) } } - /* Disable the USART DMA Rx request if enabled */ + /* Abort the USART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)) { + /* Disable the USART DMA Rx request if enabled */ CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR); /* Abort the USART DMA Rx channel : use non blocking DMA Abort API (callback) */ @@ -2201,9 +2233,10 @@ void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) Disable Interrupts, and disable DMA requests, if ongoing */ USART_EndTransfer(husart); - /* Disable the USART DMA Rx request if enabled */ + /* Abort the USART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR)) { + /* Disable the USART DMA Rx request if enabled */ CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR | USART_CR3_DMAR); /* Abort the USART DMA Tx channel */ @@ -2810,10 +2843,11 @@ static void USART_DMARxAbortCallback(DMA_HandleTypeDef *hdma) /** - * @brief Handle USART Communication Timeout. + * @brief Handle USART Communication Timeout. It waits + * until a flag is no longer in the specified status. * @param husart USART handle. * @param Flag Specifies the USART flag to check. - * @param Status the Flag status (SET or RESET). + * @param Status the actual Flag status (SET or RESET). * @param Tickstart Tick start value * @param Timeout timeout duration. * @retval HAL status @@ -3038,7 +3072,7 @@ static void USART_TxISR_8BIT(USART_HandleTypeDef *husart) static void USART_TxISR_16BIT(USART_HandleTypeDef *husart) { const HAL_USART_StateTypeDef state = husart->State; - uint16_t *tmp; + const uint16_t *tmp; if ((state == HAL_USART_STATE_BUSY_TX) || (state == HAL_USART_STATE_BUSY_TX_RX)) @@ -3053,7 +3087,7 @@ static void USART_TxISR_16BIT(USART_HandleTypeDef *husart) } else { - tmp = (uint16_t *) husart->pTxBuffPtr; + tmp = (const uint16_t *) husart->pTxBuffPtr; husart->Instance->TDR = (uint16_t)(*tmp & 0x01FFU); husart->pTxBuffPtr += 2U; husart->TxXferCount--; @@ -3119,7 +3153,7 @@ static void USART_TxISR_8BIT_FIFOEN(USART_HandleTypeDef *husart) static void USART_TxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart) { const HAL_USART_StateTypeDef state = husart->State; - uint16_t *tmp; + const uint16_t *tmp; uint16_t nb_tx_data; /* Check that a Tx process is ongoing */ @@ -3140,7 +3174,7 @@ static void USART_TxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart) } else if (__HAL_USART_GET_FLAG(husart, USART_FLAG_TXFNF) == SET) { - tmp = (uint16_t *) husart->pTxBuffPtr; + tmp = (const uint16_t *) husart->pTxBuffPtr; husart->Instance->TDR = (uint16_t)(*tmp & 0x01FFU); husart->pTxBuffPtr += 2U; husart->TxXferCount--; @@ -3672,4 +3706,3 @@ static void USART_RxISR_16BIT_FIFOEN(USART_HandleTypeDef *husart) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c index cf750bb..d2f05ea 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_usart_ex.c @@ -8,6 +8,17 @@ * + Peripheral Control functions * * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### USART peripheral extended features ##### @@ -26,17 +37,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -539,4 +539,3 @@ static void USARTEx_SetNbDataToProcess(USART_HandleTypeDef *husart) * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c index a1de4ff..c08d180 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_wwdg.c @@ -7,6 +7,17 @@ * functionalities of the Window Watchdog (WWDG) peripheral: * + Initialization and Configuration functions * + IO operation functions + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### WWDG Specific features ##### @@ -40,7 +51,7 @@ (++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock (+) Typical values: (++) Counter min (T[5;0] = 0x00) at 170MHz (PCLK1) with zero prescaler: - max timeout before reset: approximately 24.09µs + max timeout before reset: approximately 24.09us (++) Counter max (T[5;0] = 0x3F) at 170MHz (PCLK1) with prescaler dividing by 128: max timeout before reset: approximately 197.38ms @@ -55,7 +66,7 @@ (+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE(). (+) Configure the WWDG prescaler, refresh window value, counter value and early interrupt status using HAL_WWDG_Init() function. This will automatically - enable WWDG and start its downcounter. Time reference can be taken from + enable WWDG and start its downcounter. Time reference can be taken from function exit. Care must be taken to provide a counter value greater than 0x40 to prevent generation of immediate reset. (+) If the Early Wakeup Interrupt (EWI) feature is enabled, an interrupt is @@ -112,17 +123,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -418,5 +418,3 @@ __weak void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg) /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c index 5454519..b40c47c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -1424,5 +1423,3 @@ void LL_ADC_INJ_StructInit(LL_ADC_INJ_InitTypeDef *ADC_INJ_InitStruct) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c index ee03cc2..4a2bd4a 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_comp.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -25,7 +24,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -402,5 +401,3 @@ void LL_COMP_StructInit(LL_COMP_InitTypeDef *COMP_InitStruct) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c index 432a62f..71d7b7c 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_cordic.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -101,5 +100,3 @@ ErrorStatus LL_CORDIC_DeInit(CORDIC_TypeDef *CORDICx) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c index 2cc5117..e8a82b3 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crc.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -26,7 +25,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -102,6 +101,3 @@ ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c index 9881423..03d2805 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_crs.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2018 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -83,4 +82,3 @@ ErrorStatus LL_CRS_DeInit(void) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c index c704ec8..3c46e75 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dac.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -425,4 +424,3 @@ void LL_DAC_StructInit(LL_DAC_InitTypeDef *DAC_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c index c3a85c2..778b628 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_dma.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -375,4 +374,3 @@ void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c index 3350abe..e6e1ebe 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_exti.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -295,4 +294,3 @@ void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c index 6ee9002..7cbc1d2 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmac.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -135,5 +134,3 @@ ErrorStatus LL_FMAC_DeInit(FMAC_TypeDef *FMACx) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c index f03e1ee..40a8bed 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_fmc.c @@ -10,6 +10,17 @@ * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### FMC peripheral features ##### @@ -39,17 +50,6 @@ @endverbatim ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * - ****************************************************************************** */ /* Includes ------------------------------------------------------------------*/ @@ -87,15 +87,9 @@ /* --- BWTR Register ---*/ /* BWTR register clear mask */ -#if defined(FMC_BWTRx_BUSTURN) #define BWTR_CLEAR_MASK ((uint32_t)(FMC_BWTRx_ADDSET | FMC_BWTRx_ADDHLD |\ FMC_BWTRx_DATAST | FMC_BWTRx_BUSTURN |\ FMC_BWTRx_ACCMOD | FMC_BWTRx_DATAHLD)) -#else -#define BWTR_CLEAR_MASK ((uint32_t)(FMC_BWTRx_ADDSET | FMC_BWTRx_ADDHLD |\ - FMC_BWTRx_DATAST | FMC_BWTRx_ACCMOD |\ - FMC_BWTRx_DATAHLD)) -#endif /* FMC_BWTRx_BUSTURN */ #endif /* FMC_BANK1 */ #if defined(FMC_BANK3) @@ -434,9 +428,7 @@ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef assert_param(IS_FMC_ADDRESS_HOLD_TIME(Timing->AddressHoldTime)); assert_param(IS_FMC_DATASETUP_TIME(Timing->DataSetupTime)); assert_param(IS_FMC_DATAHOLD_DURATION(Timing->DataHoldTime)); -#if defined(FMC_BWTRx_BUSTURN) assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); -#endif /* FMC_BWTRx_BUSTURN */ assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FMC_NORSRAM_BANK(Bank)); @@ -445,12 +437,8 @@ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef ((Timing->AddressHoldTime) << FMC_BWTRx_ADDHLD_Pos) | ((Timing->DataSetupTime) << FMC_BWTRx_DATAST_Pos) | ((Timing->DataHoldTime) << FMC_BWTRx_DATAHLD_Pos) | -#if defined(FMC_BWTRx_BUSTURN) Timing->AccessMode | ((Timing->BusTurnAroundDuration) << FMC_BWTRx_BUSTURN_Pos))); -#else - Timing->AccessMode)); -#endif /* FMC_BWTRx_BUSTURN */ } else { @@ -815,5 +803,3 @@ HAL_StatusTypeDef FMC_NAND_GetECC(FMC_NAND_TypeDef *Device, uint32_t *ECCval, ui /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c index 9dcbd65..86ea40b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_gpio.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -269,4 +268,3 @@ void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c index 72b4219..a953017 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_hrtim.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -79,5 +78,3 @@ ErrorStatus LL_HRTIM_DeInit(HRTIM_TypeDef *HRTIMx) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c index e607f3c..5428e67 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_i2c.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -25,7 +24,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -125,7 +124,7 @@ ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx) /* Release reset of I2C clock */ LL_APB1_GRP2_ReleaseReset(LL_APB1_GRP2_PERIPH_I2C4); } -#endif +#endif /* I2C4 */ else { status = ERROR; @@ -241,5 +240,3 @@ void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c index cbf0c72..7329972 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lptim.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -28,7 +27,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -189,12 +188,15 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) uint32_t tmpCFGR; uint32_t tmpCMP; uint32_t tmpARR; + uint32_t primask_bit; uint32_t tmpOR; /* Check the parameters */ assert_param(IS_LPTIM_INSTANCE(LPTIMx)); - __disable_irq(); + /* Enter critical section */ + primask_bit = __get_PRIMASK(); + __set_PRIMASK(1) ; /********** Save LPTIM Config *********/ /* Save LPTIM source clock */ @@ -274,7 +276,8 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) LPTIMx->CFGR = tmpCFGR; LPTIMx->OR = tmpOR; - __enable_irq(); + /* Exit critical section: restore previous priority mask */ + __set_PRIMASK(primask_bit); } /** @@ -296,5 +299,3 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c index 3f3b52f..8dd7dc1 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_lpuart.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -281,6 +280,3 @@ void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c index 28db53a..c46e41d 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_opamp.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -50,7 +49,7 @@ /* OPAMP instance. */ #define IS_LL_OPAMP_POWER_MODE(__POWER_MODE__) \ - ( ((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMAL) \ + ( ((__POWER_MODE__) == LL_OPAMP_POWERMODE_NORMALSPEED) \ || ((__POWER_MODE__) == LL_OPAMP_POWERMODE_HIGHSPEED)) #define IS_LL_OPAMP_FUNCTIONAL_MODE(__FUNCTIONAL_MODE__) \ @@ -232,7 +231,7 @@ ErrorStatus LL_OPAMP_Init(OPAMP_TypeDef *OPAMPx, LL_OPAMP_InitTypeDef *OPAMP_Ini void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct) { /* Set OPAMP_InitStruct fields to default values */ - OPAMP_InitStruct->PowerMode = LL_OPAMP_POWERMODE_NORMAL; + OPAMP_InitStruct->PowerMode = LL_OPAMP_POWERMODE_NORMALSPEED; OPAMP_InitStruct->FunctionalMode = LL_OPAMP_MODE_FOLLOWER; OPAMP_InitStruct->InputNonInverting = LL_OPAMP_INPUT_NONINVERT_IO0; /* Note: Parameter discarded if OPAMP in functional mode follower, */ @@ -260,4 +259,3 @@ void LL_OPAMP_StructInit(LL_OPAMP_InitTypeDef *OPAMP_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c index 6870bd1..ca5e1f0 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_pwr.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -82,4 +81,3 @@ ErrorStatus LL_PWR_DeInit(void) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c index 453cfce..8111ddc 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rcc.c @@ -6,14 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * + * This software is licensed under terms that can be found in the LICENSE file in + * the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. ****************************************************************************** */ #if defined(USE_FULL_LL_DRIVER) @@ -657,7 +655,10 @@ uint32_t LL_RCC_GetSAIClockFreq(uint32_t SAIxSource) case LL_RCC_SAI1_CLKSOURCE_PLL: /* PLL clock used as SAI1 clock source */ if (LL_RCC_PLL_IsReady() != 0U) { - sai_frequency = RCC_PLL_GetFreqDomain_48M(); + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + sai_frequency = RCC_PLL_GetFreqDomain_48M(); + } } break; @@ -705,7 +706,10 @@ uint32_t LL_RCC_GetI2SClockFreq(uint32_t I2SxSource) case LL_RCC_I2S_CLKSOURCE_PLL: /* I2S Clock is PLL"Q" */ if (LL_RCC_PLL_IsReady() != 0U) { - i2s_frequency = RCC_PLL_GetFreqDomain_48M(); + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + i2s_frequency = RCC_PLL_GetFreqDomain_48M(); + } } break; @@ -755,7 +759,10 @@ uint32_t LL_RCC_GetFDCANClockFreq(uint32_t FDCANxSource) case LL_RCC_FDCAN_CLKSOURCE_PLL: /* PLL clock used as FDCAN kernel clock */ if (LL_RCC_PLL_IsReady() != 0U) { - fdcan_frequency = RCC_PLL_GetFreqDomain_48M(); + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + fdcan_frequency = RCC_PLL_GetFreqDomain_48M(); + } } break; @@ -792,7 +799,10 @@ uint32_t LL_RCC_GetRNGClockFreq(uint32_t RNGxSource) case LL_RCC_RNG_CLKSOURCE_PLL: /* PLL clock used as RNG clock source */ if (LL_RCC_PLL_IsReady() != 0U) { - rng_frequency = RCC_PLL_GetFreqDomain_48M(); + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + rng_frequency = RCC_PLL_GetFreqDomain_48M(); + } } break; @@ -833,7 +843,10 @@ uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource) case LL_RCC_USB_CLKSOURCE_PLL: /* PLL clock used as USB clock source */ if (LL_RCC_PLL_IsReady() != 0U) { - usb_frequency = RCC_PLL_GetFreqDomain_48M(); + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + usb_frequency = RCC_PLL_GetFreqDomain_48M(); + } } break; @@ -878,7 +891,10 @@ uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource) case LL_RCC_ADC12_CLKSOURCE_PLL: /* PLL clock used as ADC12 clock source */ if (LL_RCC_PLL_IsReady() != 0U) { - adc_frequency = RCC_PLL_GetFreqDomain_ADC(); + if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U) + { + adc_frequency = RCC_PLL_GetFreqDomain_ADC(); + } } break; @@ -901,7 +917,10 @@ uint32_t LL_RCC_GetADCClockFreq(uint32_t ADCxSource) case LL_RCC_ADC345_CLKSOURCE_PLL: /* PLL clock used as ADC345 clock source */ if (LL_RCC_PLL_IsReady() != 0U) { - adc_frequency = RCC_PLL_GetFreqDomain_ADC(); + if (LL_RCC_PLL_IsEnabledDomain_ADC() != 0U) + { + adc_frequency = RCC_PLL_GetFreqDomain_ADC(); + } } break; @@ -952,7 +971,10 @@ uint32_t LL_RCC_GetQUADSPIClockFreq(uint32_t QUADSPIxSource) case LL_RCC_QUADSPI_CLKSOURCE_PLL: /* PLL clock used as QUADSPI source */ if (LL_RCC_PLL_IsReady() != 0U) { - quadspi_frequency = RCC_PLL_GetFreqDomain_48M(); + if (LL_RCC_PLL_IsEnabledDomain_48M() != 0U) + { + quadspi_frequency = RCC_PLL_GetFreqDomain_48M(); + } } break; @@ -1148,4 +1170,3 @@ static uint32_t RCC_PLL_GetFreqDomain_48M(void) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c index a9eda60..138ba2b 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rng.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -26,7 +25,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -42,7 +41,7 @@ /* Private variables ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ -/** @addtogroup RNG_LL_Private_Macros +/** @defgroup RNG_LL_Private_Macros RNG Private Macros * @{ */ #define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \ @@ -71,14 +70,24 @@ */ ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx) { + ErrorStatus status = SUCCESS; + /* Check the parameters */ assert_param(IS_RNG_ALL_INSTANCE(RNGx)); - /* Enable RNG reset state */ - LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG); + if (RNGx == RNG) + { + /* Enable RNG reset state */ + LL_AHB2_GRP1_ForceReset(LL_AHB2_GRP1_PERIPH_RNG); - /* Release RNG from reset state */ - LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG); - return (SUCCESS); + /* Release RNG from reset state */ + LL_AHB2_GRP1_ReleaseReset(LL_AHB2_GRP1_PERIPH_RNG); + } + else + { + status = ERROR; + } + + return status; } /** @@ -134,5 +143,3 @@ void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c index 799a489..317f188 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_rtc.c @@ -6,12 +6,12 @@ ****************************************************************************** * @attention * - *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -329,7 +329,7 @@ ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_Time } /* Exit Initialization mode */ - LL_RTC_DisableInitMode(RTC); + LL_RTC_DisableInitMode(RTCx); /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U) @@ -417,7 +417,7 @@ ErrorStatus LL_RTC_DATE_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_Date } /* Exit Initialization mode */ - LL_RTC_DisableInitMode(RTC); + LL_RTC_DisableInitMode(RTCx); /* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */ if (LL_RTC_IsShadowRegBypassEnabled(RTCx) == 0U) @@ -880,5 +880,3 @@ ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx) */ #endif /* USE_FULL_LL_DRIVER */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c index 2126cf5..536d964 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_spi.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -27,7 +26,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -556,4 +555,3 @@ void LL_I2S_ConfigPrescaler(SPI_TypeDef *SPIx, uint32_t PrescalerLinear, uint32_ #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c index ae5e96a..f340628 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_tim.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -326,7 +325,8 @@ void LL_TIM_StructInit(LL_TIM_InitTypeDef *TIM_InitStruct) /** * @brief Configure the TIMx time base unit. * @param TIMx Timer Instance - * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure (TIMx time base unit configuration data structure) + * @param TIM_InitStruct pointer to a @ref LL_TIM_InitTypeDef structure + * (TIMx time base unit configuration data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable @@ -379,7 +379,8 @@ ErrorStatus LL_TIM_Init(TIM_TypeDef *TIMx, LL_TIM_InitTypeDef *TIM_InitStruct) /** * @brief Set the fields of the TIMx output channel configuration data * structure to their default values. - * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (the output channel configuration data structure) + * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure + * (the output channel configuration data structure) * @retval None */ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct) @@ -405,7 +406,8 @@ void LL_TIM_OC_StructInit(LL_TIM_OC_InitTypeDef *TIM_OC_InitStruct) * @arg @ref LL_TIM_CHANNEL_CH4 * @arg @ref LL_TIM_CHANNEL_CH5 * @arg @ref LL_TIM_CHANNEL_CH6 - * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration data structure) + * @param TIM_OC_InitStruct pointer to a @ref LL_TIM_OC_InitTypeDef structure (TIMx output channel configuration + * data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx output channel is initialized * - ERROR: TIMx output channel is not initialized @@ -444,7 +446,8 @@ ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_OC_InitTy /** * @brief Set the fields of the TIMx input channel configuration data * structure to their default values. - * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration data structure) + * @param TIM_ICInitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (the input channel configuration + * data structure) * @retval None */ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) @@ -464,7 +467,8 @@ void LL_TIM_IC_StructInit(LL_TIM_IC_InitTypeDef *TIM_ICInitStruct) * @arg @ref LL_TIM_CHANNEL_CH2 * @arg @ref LL_TIM_CHANNEL_CH3 * @arg @ref LL_TIM_CHANNEL_CH4 - * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data structure) + * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel configuration data + * structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx output channel is initialized * - ERROR: TIMx output channel is not initialized @@ -496,7 +500,8 @@ ErrorStatus LL_TIM_IC_Init(TIM_TypeDef *TIMx, uint32_t Channel, LL_TIM_IC_InitTy /** * @brief Fills each TIM_EncoderInitStruct field with its default value - * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface configuration data structure) + * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (encoder interface + * configuration data structure) * @retval None */ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct) @@ -516,7 +521,8 @@ void LL_TIM_ENCODER_StructInit(LL_TIM_ENCODER_InitTypeDef *TIM_EncoderInitStruct /** * @brief Configure the encoder interface of the timer instance. * @param TIMx Timer Instance - * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface configuration data structure) + * @param TIM_EncoderInitStruct pointer to a @ref LL_TIM_ENCODER_InitTypeDef structure (TIMx encoder interface + * configuration data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable @@ -580,7 +586,8 @@ ErrorStatus LL_TIM_ENCODER_Init(TIM_TypeDef *TIMx, LL_TIM_ENCODER_InitTypeDef *T /** * @brief Set the fields of the TIMx Hall sensor interface configuration data * structure to their default values. - * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface configuration data structure) + * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (HALL sensor interface + * configuration data structure) * @retval None */ void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorInitStruct) @@ -607,7 +614,8 @@ void LL_TIM_HALLSENSOR_StructInit(LL_TIM_HALLSENSOR_InitTypeDef *TIM_HallSensorI * @note LL_TIM_IC_POLARITY_BOTHEDGE must not be used for TI1 when it is used * when TIMx operates in Hall sensor interface mode. * @param TIMx Timer Instance - * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor interface configuration data structure) + * @param TIM_HallSensorInitStruct pointer to a @ref LL_TIM_HALLSENSOR_InitTypeDef structure (TIMx HALL sensor + * interface configuration data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: TIMx registers are de-initialized * - ERROR: not applicable @@ -687,7 +695,8 @@ ErrorStatus LL_TIM_HALLSENSOR_Init(TIM_TypeDef *TIMx, LL_TIM_HALLSENSOR_InitType /** * @brief Set the fields of the Break and Dead Time configuration data structure * to their default values. - * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure) + * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration + * data structure) * @retval None */ void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct) @@ -719,7 +728,8 @@ void LL_TIM_BDTR_StructInit(LL_TIM_BDTR_InitTypeDef *TIM_BDTRInitStruct) * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not * a timer instance provides a second break input. * @param TIMx Timer Instance - * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration data structure) + * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead Time configuration + * data structure) * @retval An ErrorStatus enumeration value: * - SUCCESS: Break and Dead Time is initialized * - ERROR: not applicable @@ -1374,4 +1384,3 @@ static ErrorStatus IC4Config(TIM_TypeDef *TIMx, LL_TIM_IC_InitTypeDef *TIM_ICIni #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c index 3b95403..15f66a3 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_ucpd.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2018 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -27,7 +26,7 @@ #include "stm32_assert.h" #else #define assert_param(expr) ((void)0U) -#endif +#endif /* USE_FULL_ASSERT */ /** @addtogroup STM32G4xx_LL_Driver * @{ @@ -83,7 +82,7 @@ ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx) /* Check the parameters */ assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); - + LL_UCPD_Disable(UCPDx); if (UCPD1 == UCPDx) @@ -105,8 +104,9 @@ ErrorStatus LL_UCPD_DeInit(UCPD_TypeDef *UCPDx) /** * @brief Initialize the ucpd registers according to the specified parameters in UCPD_InitStruct. - * @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled (ucpd_CR1_SPE bit =0), - * UCPD peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned. + * @note As some bits in ucpd configuration registers can only be written when the ucpd is disabled + * (ucpd_CR1_SPE bit =0), UCPD peripheral should be in disabled state prior calling this function. + * Otherwise, ERROR result will be returned. * @param UCPDx UCPD Instance * @param UCPD_InitStruct pointer to a @ref LL_UCPD_InitTypeDef structure that contains * the configuration information for the UCPD peripheral. @@ -117,7 +117,7 @@ ErrorStatus LL_UCPD_Init(UCPD_TypeDef *UCPDx, LL_UCPD_InitTypeDef *UCPD_InitStru /* Check the ucpd Instance UCPDx*/ assert_param(IS_UCPD_ALL_INSTANCE(UCPDx)); - if(UCPD1 == UCPDx) + if (UCPD1 == UCPDx) { LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_UCPD1); } @@ -167,4 +167,3 @@ void LL_UCPD_StructInit(LL_UCPD_InitTypeDef *UCPD_InitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c index bd08bb8..4149628 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -421,5 +420,4 @@ void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct) #endif /* USE_FULL_LL_DRIVER */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c index dcd6b4f..c8f9fda 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c @@ -11,6 +11,17 @@ * + Peripheral Control functions * + Peripheral State functions * + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** @verbatim ============================================================================== ##### How to use this driver ##### @@ -23,17 +34,7 @@ (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. @endverbatim - ****************************************************************************** - * @attention - * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

- * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause - * + ****************************************************************************** */ @@ -53,7 +54,6 @@ /* Private function prototypes -----------------------------------------------*/ /* Private functions ---------------------------------------------------------*/ - /** * @brief Initializes the USB Core * @param USBx USB Instance @@ -235,22 +235,31 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) } else { - /*Set the endpoint Receive buffer address */ + /* Set the endpoint Receive buffer address */ PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); - /*Set the endpoint Receive buffer counter*/ + /* Set the endpoint Receive buffer counter */ PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); PCD_CLEAR_RX_DTOG(USBx, ep->num); - /* Configure VALID status for the Endpoint*/ + /* Configure VALID status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); } } - /*Double Buffer*/ +#if (USE_USB_DOUBLE_BUFFER == 1U) + /* Double Buffer */ else { - /* Set the endpoint as double buffered */ - PCD_SET_EP_DBUF(USBx, ep->num); + if (ep->type == EP_TYPE_BULK) + { + /* Set bulk endpoint as double buffered */ + PCD_SET_BULK_EP_DBUF(USBx, ep->num); + } + else + { + /* Set the ISOC endpoint in double buffer mode */ + PCD_CLEAR_EP_KIND(USBx, ep->num); + } /* Set buffer address for double buffered mode */ PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); @@ -284,6 +293,7 @@ HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); } } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return ret; } @@ -302,18 +312,20 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) { PCD_CLEAR_TX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ + /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); } + else { PCD_CLEAR_RX_DTOG(USBx, ep->num); - /* Configure DISABLE status for the Endpoint*/ + /* Configure DISABLE status for the Endpoint */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); } } - /*Double Buffer*/ +#if (USE_USB_DOUBLE_BUFFER == 1U) + /* Double Buffer */ else { if (ep->is_in == 0U) @@ -340,6 +352,7 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); } } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ return HAL_OK; } @@ -353,8 +366,10 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { uint32_t len; +#if (USE_USB_DOUBLE_BUFFER == 1U) uint16_t pmabuffer; uint16_t wEPVal; +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ /* IN endpoint */ if (ep->is_in == 1U) @@ -375,6 +390,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); PCD_SET_EP_TX_CNT(USBx, ep->num, len); } +#if (USE_USB_DOUBLE_BUFFER == 1U) else { /* double buffer bulk management */ @@ -383,7 +399,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) if (ep->xfer_len_db > ep->maxpacket) { /* enable double buffer */ - PCD_SET_EP_DBUF(USBx, ep->num); + PCD_SET_BULK_EP_DBUF(USBx, ep->num); /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; @@ -449,8 +465,8 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) { len = ep->xfer_len_db; - /* disable double buffer mode */ - PCD_CLEAR_EP_DBUF(USBx, ep->num); + /* disable double buffer mode for Bulk endpoint */ + PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num); /* Set Tx count with nbre of byte to be transmitted */ PCD_SET_EP_TX_CNT(USBx, ep->num, len); @@ -459,14 +475,9 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); } - }/* end if bulk double buffer */ - - /* manage isochronous double buffer IN mode */ - else + } + else /* manage isochronous double buffer IN mode */ { - /* enable double buffer */ - PCD_SET_EP_DBUF(USBx, ep->num); - /* each Time to write in PMA xfer_len_db will */ ep->xfer_len_db -= len; @@ -479,27 +490,6 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - ep->xfer_buff += len; - - if (ep->xfer_len_db > ep->maxpacket) - { - ep->xfer_len_db -= len; - } - else - { - len = ep->xfer_len_db; - ep->xfer_len_db = 0U; - } - - if (len > 0U) - { - /* Set the Double buffer counter for pmabuffer0 */ - PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr0; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } } else { @@ -509,30 +499,10 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* Write the user buffer to USB PMA */ USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - ep->xfer_buff += len; - - if (ep->xfer_len_db > ep->maxpacket) - { - ep->xfer_len_db -= len; - } - else - { - len = ep->xfer_len_db; - ep->xfer_len_db = 0U; - } - - if (len > 0U) - { - /* Set the Double buffer counter for pmabuffer1 */ - PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); - pmabuffer = ep->pmaaddr1; - - /* Write the user buffer to USB PMA */ - USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); - } } } } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); } @@ -554,6 +524,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) /* configure and validate Rx endpoint */ PCD_SET_EP_RX_CNT(USBx, ep->num, len); } +#if (USE_USB_DOUBLE_BUFFER == 1U) else { /* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */ @@ -572,7 +543,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) || (((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U))) { - PCD_FreeUserBuffer(USBx, ep->num, 0U); + PCD_FREE_USER_BUFFER(USBx, ep->num, 0U); } } } @@ -597,6 +568,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) return HAL_ERROR; } } +#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */ PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); } @@ -656,7 +628,7 @@ HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) return HAL_OK; } -#endif +#endif /* defined (HAL_PCD_MODULE_ENABLED) */ /** * @brief USB_StopDevice Stop the usb device mode @@ -770,7 +742,9 @@ void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui { uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; uint32_t BaseAddr = (uint32_t)USBx; - uint32_t i, temp1, temp2; + uint32_t i; + uint32_t temp1; + uint32_t temp2; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; @@ -786,7 +760,7 @@ void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, ui #if PMA_ACCESS > 1U pdwVal++; -#endif +#endif /* PMA_ACCESS */ pBuf++; } @@ -804,7 +778,8 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uin { uint32_t n = (uint32_t)wNBytes >> 1; uint32_t BaseAddr = (uint32_t)USBx; - uint32_t i, temp; + uint32_t i; + uint32_t temp; __IO uint16_t *pdwVal; uint8_t *pBuf = pbUsrBuf; @@ -821,7 +796,7 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uin #if PMA_ACCESS > 1U pdwVal++; -#endif +#endif /* PMA_ACCESS */ } if ((wNBytes % 2U) != 0U) @@ -845,5 +820,3 @@ void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uin /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c index 27b8691..4e589a8 100644 --- a/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c +++ b/codice/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_utils.c @@ -6,13 +6,12 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.

+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -698,4 +697,3 @@ static ErrorStatus UTILS_EnablePLLAndSwitchSystem(uint32_t SYSCLK_Frequency, LL_ * @} */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/codice/Makefile b/codice/Makefile index 0a69fb4..4cee853 100644 --- a/codice/Makefile +++ b/codice/Makefile @@ -1,5 +1,5 @@ ########################################################################################################################## -# File automatically-generated by tool: [projectgenerator] version: [3.13.0-B3] date: [Sat Jul 03 17:51:24 CEST 2021] +# File automatically-generated by tool: [projectgenerator] version: [3.15.2] date: [Tue Jan 11 17:51:49 CET 2022] ########################################################################################################################## # ------------------------------------------------ @@ -20,10 +20,10 @@ TARGET = bassofono # building variables ###################################### # debug build? -DEBUG = 1 +DEBUG = 0 # optimization -# OPT = -Og -OPT = -Ofast +OPT = -O3 + ####################################### # paths @@ -41,23 +41,10 @@ Core/Src/bassofono.c \ Core/Src/tx.c \ Core/Src/rx.c \ Core/Src/interface.c \ +Core/Src/si5351.c \ Core/Src/FIRFilterCode.c \ Core/Src/stm32g4xx_it.c \ Core/Src/stm32g4xx_hal_msp.c \ -Core/Src/system_stm32g4xx.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/CommonTables/CommonTables.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c \ -Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc_ex.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c \ @@ -77,12 +64,31 @@ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_dac_ex.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_i2c_ex.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c \ Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart_ex.c \ -Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp.c \ -Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_opamp_ex.c +Core/Src/system_stm32g4xx.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/CommonTables/CommonTables.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c \ +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c \ +Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c # ASM sources ASM_SOURCES = \ @@ -140,18 +146,15 @@ AS_INCLUDES = # C includes C_INCLUDES = \ -ICore/Inc \ --IDrivers/CMSIS/Include \ -IDrivers/STM32G4xx_HAL_Driver/Inc \ -IDrivers/STM32G4xx_HAL_Driver/Inc/Legacy \ -IDrivers/CMSIS/Device/ST/STM32G4xx/Include \ --IMiddlewares/Third_Party/ARM_CMSIS/CMSIS/Core/Include/ \ --IMiddlewares/Third_Party/ARM_CMSIS/CMSIS/Core_A/Include/ \ --IMiddlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/PrivateInclude/ \ --IMiddlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include - +-IDrivers/CMSIS/Include \ +-IMiddlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/PrivateInclude \ +-IMiddlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/ # compile gcc flags -ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections +# compile gcc flagsASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections diff --git a/codice/bassofono.ioc b/codice/bassofono.ioc index 1a0a91e..0855c9b 100644 --- a/codice/bassofono.ioc +++ b/codice/bassofono.ioc @@ -7,7 +7,7 @@ ADC1.Channel-2\#ChannelRegularConversion=ADC_CHANNEL_VOPAMP1 ADC1.ContinuousConvMode=ENABLE ADC1.DMAContinuousRequests=ENABLE ADC1.EnableAnalogWatchDog1=true -ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,NbrOfConversionFlag,OversamplingMode,ContinuousConvMode,DMAContinuousRequests,master,EnableAnalogWatchDog1,WatchdogChannel,AWD1HighThreshold,AWD1ITMode,AWD1LowThreshold,AWD1FilteringConfig +ADC1.IPParameters=Rank-2\#ChannelRegularConversion,Channel-2\#ChannelRegularConversion,SamplingTime-2\#ChannelRegularConversion,OffsetNumber-2\#ChannelRegularConversion,NbrOfConversionFlag,OversamplingMode,ContinuousConvMode,DMAContinuousRequests,EnableAnalogWatchDog1,WatchdogChannel,AWD1HighThreshold,AWD1ITMode,AWD1LowThreshold,AWD1FilteringConfig,master ADC1.NbrOfConversionFlag=1 ADC1.OffsetNumber-2\#ChannelRegularConversion=ADC_OFFSET_NONE ADC1.OversamplingMode=ENABLE @@ -15,6 +15,12 @@ ADC1.Rank-2\#ChannelRegularConversion=1 ADC1.SamplingTime-2\#ChannelRegularConversion=ADC_SAMPLETIME_47CYCLES_5 ADC1.WatchdogChannel=ADC_CHANNEL_VOPAMP1 ADC1.master=1 +ADC2.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_VOPAMP2 +ADC2.IPParameters=Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,OffsetNumber-1\#ChannelRegularConversion,NbrOfConversionFlag +ADC2.NbrOfConversionFlag=1 +ADC2.OffsetNumber-1\#ChannelRegularConversion=ADC_OFFSET_NONE +ADC2.Rank-1\#ChannelRegularConversion=1 +ADC2.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5 ARM.CMSIS.5.7.0.CMSISJjCORE=true ARM.CMSIS.5.7.0.CMSISJjCORE_Checked=true ARM.CMSIS.5.7.0.CMSISJjDSP=Source @@ -103,51 +109,71 @@ Dma.USART1_TX.2.SyncRequestNumber=1 Dma.USART1_TX.2.SyncSignalID=NONE File.Version=6 GPIO.groupedBy=Group By Peripherals +I2C1.IPParameters=Timing +I2C1.Timing=0x60505F8C KeepUserPlacement=false Mcu.Family=STM32G4 Mcu.IP0=ADC1 -Mcu.IP1=CORDIC -Mcu.IP10=TIM8 -Mcu.IP11=USART1 -Mcu.IP2=DAC1 -Mcu.IP3=DMA -Mcu.IP4=NVIC -Mcu.IP5=OPAMP1 -Mcu.IP6=RCC -Mcu.IP7=SYS -Mcu.IP8=TIM6 -Mcu.IP9=TIM7 -Mcu.IPNb=12 +Mcu.IP1=ADC2 +Mcu.IP10=RCC +Mcu.IP11=SYS +Mcu.IP12=TIM6 +Mcu.IP13=TIM7 +Mcu.IP14=TIM8 +Mcu.IP15=USART1 +Mcu.IP16=USB +Mcu.IP2=CORDIC +Mcu.IP3=DAC1 +Mcu.IP4=DAC3 +Mcu.IP5=DMA +Mcu.IP6=I2C1 +Mcu.IP7=NVIC +Mcu.IP8=OPAMP1 +Mcu.IP9=OPAMP2 +Mcu.IPNb=17 Mcu.Name=STM32G431K(6-8-B)Tx Mcu.Package=LQFP32 Mcu.Pin0=PF0-OSC_IN Mcu.Pin1=PF1-OSC_OUT -Mcu.Pin10=PB3 -Mcu.Pin11=PB5 -Mcu.Pin12=VP_ADC1_OPAMP_INTERNAL1 -Mcu.Pin13=VP_CORDIC_VS_CORDIC -Mcu.Pin14=VP_SYS_VS_Systick -Mcu.Pin15=VP_SYS_VS_DBSignals -Mcu.Pin16=VP_TIM6_VS_ClockSourceINT -Mcu.Pin17=VP_TIM7_VS_ClockSourceINT -Mcu.Pin18=VP_TIM8_VS_ClockSourceINT -Mcu.Pin19=VP_ARM.CMSIS_VS_CMSISJjCORE_5.4.0_5.7.0 -Mcu.Pin2=PA1 -Mcu.Pin20=VP_ARM.CMSIS_VS_CMSISJjDSP_1.8.0_5.7.0 -Mcu.Pin3=PA3 -Mcu.Pin4=PA4 -Mcu.Pin5=PA5 -Mcu.Pin6=PA9 -Mcu.Pin7=PA10 -Mcu.Pin8=PA13 -Mcu.Pin9=PA14 -Mcu.PinsNb=21 +Mcu.Pin10=PA9 +Mcu.Pin11=PA10 +Mcu.Pin12=PA11 +Mcu.Pin13=PA12 +Mcu.Pin14=PA13 +Mcu.Pin15=PA14 +Mcu.Pin16=PA15 +Mcu.Pin17=PB3 +Mcu.Pin18=PB4 +Mcu.Pin19=PB5 +Mcu.Pin2=PA0 +Mcu.Pin20=PB6 +Mcu.Pin21=PB7 +Mcu.Pin22=PB8-BOOT0 +Mcu.Pin23=VP_ADC1_OPAMP_INTERNAL1 +Mcu.Pin24=VP_ADC2_OPAMP_INTERNAL2 +Mcu.Pin25=VP_CORDIC_VS_CORDIC +Mcu.Pin26=VP_DAC3_VS_DACI1 +Mcu.Pin27=VP_SYS_VS_Systick +Mcu.Pin28=VP_SYS_VS_DBSignals +Mcu.Pin29=VP_TIM6_VS_ClockSourceINT +Mcu.Pin3=PA1 +Mcu.Pin30=VP_TIM7_VS_ClockSourceINT +Mcu.Pin31=VP_TIM8_VS_ClockSourceINT +Mcu.Pin32=VP_ARM.CMSIS_VS_CMSISJjCORE_5.4.0_5.7.0 +Mcu.Pin33=VP_ARM.CMSIS_VS_CMSISJjDSP_1.8.0_5.7.0 +Mcu.Pin4=PA2 +Mcu.Pin5=PA3 +Mcu.Pin6=PA4 +Mcu.Pin7=PA5 +Mcu.Pin8=PA7 +Mcu.Pin9=PA8 +Mcu.PinsNb=34 Mcu.ThirdParty0=ARM.CMSIS.5.7.0 Mcu.ThirdPartyNb=1 Mcu.UserConstants= Mcu.UserName=STM32G431KBTx -MxCube.Version=6.2.1 -MxDb.Version=DB.6.0.21 +MxCube.Version=6.4.0 +MxDb.Version=DB.6.0.40 NVIC.ADC1_2_IRQn=true\:0\:0\:false\:false\:true\:true\:true NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true @@ -169,6 +195,12 @@ NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false OPAMP1.IPParameters=PowerMode,PgaGain OPAMP1.PgaGain=OPAMP_PGA_GAIN_64_OR_MINUS_63 OPAMP1.PowerMode=OPAMP_POWERMODE_HIGHSPEED +PA0.GPIOParameters=GPIO_PuPd,GPIO_Label +PA0.GPIO_Label=NC1 +PA0.GPIO_PuPd=GPIO_PULLDOWN +PA0.Locked=true +PA0.Signal=GPIO_Input +PA1.Locked=true PA1.Mode=PGA Internally connected_IO0_BIAS PA1.Signal=OPAMP1_VINP PA10.GPIOParameters=GPIO_FM7 @@ -176,6 +208,10 @@ PA10.GPIO_FM7=__NULL PA10.Locked=true PA10.Mode=Asynchronous PA10.Signal=USART1_RX +PA11.Mode=Device +PA11.Signal=USB_DM +PA12.Mode=Device +PA12.Signal=USB_DP PA13.GPIOParameters=GPIO_Label PA13.GPIO_Label=T_SWDIO PA13.Locked=true @@ -186,23 +222,57 @@ PA14.GPIO_Label=T_SWCLK PA14.Locked=true PA14.Mode=Serial_Wire PA14.Signal=SYS_JTCK-SWCLK +PA15.GPIOParameters=GPIO_PuPd,GPIO_Label +PA15.GPIO_Label=GPIO4 +PA15.GPIO_PuPd=GPIO_PULLDOWN +PA15.Locked=true +PA15.Signal=GPIO_Output +PA2.GPIOParameters=GPIO_PuPd,GPIO_Label +PA2.GPIO_Label=NC2 +PA2.GPIO_PuPd=GPIO_PULLDOWN +PA2.Locked=true +PA2.Signal=GPIO_Input PA3.Mode=PGA Internally connected_IO0_BIAS PA3.Signal=OPAMP1_VINM0 PA4.Signal=COMP_DAC11_group PA5.Signal=COMP_DAC12_group +PA7.Mode=Follower_Internally_Connected +PA7.Signal=OPAMP2_VINP +PA8.Locked=true +PA8.Mode=Clock-out +PA8.Signal=RCC_MCO PA9.GPIOParameters=GPIO_FM6 PA9.GPIO_FM6=__NULL PA9.Locked=true PA9.Mode=Asynchronous PA9.Signal=USART1_TX -PB3.GPIOParameters=GPIO_Label -PB3.GPIO_Label=T_SWO +PB3.GPIOParameters=GPIO_PuPd,GPIO_Label +PB3.GPIO_Label=GPIO3 +PB3.GPIO_PuPd=GPIO_PULLDOWN PB3.Locked=true -PB3.Signal=SYS_JTDO-SWO -PB5.GPIOParameters=GPIO_Label -PB5.GPIO_Label=OUT +PB3.Signal=GPIO_Output +PB4.GPIOParameters=GPIO_PuPd,GPIO_Label +PB4.GPIO_Label=GPIO2 +PB4.GPIO_PuPd=GPIO_PULLDOWN +PB4.Locked=true +PB4.Signal=GPIO_Output +PB5.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label +PB5.GPIO_Label=GPIO1 +PB5.GPIO_PuPd=GPIO_PULLDOWN +PB5.GPIO_Speed=GPIO_SPEED_FREQ_LOW PB5.Locked=true PB5.Signal=GPIO_Output +PB6.GPIOParameters=GPIO_PuPd,GPIO_Label +PB6.GPIO_Label=PTT +PB6.GPIO_PuPd=GPIO_PULLDOWN +PB6.Locked=true +PB6.Signal=GPIO_Input +PB7.Locked=true +PB7.Mode=I2C +PB7.Signal=I2C1_SDA +PB8-BOOT0.Locked=true +PB8-BOOT0.Mode=I2C +PB8-BOOT0.Signal=I2C1_SCL PF0-OSC_IN.Mode=HSE-External-Oscillator PF0-OSC_IN.Signal=RCC_OSC_IN PF1-OSC_OUT.Mode=HSE-External-Oscillator @@ -217,7 +287,7 @@ ProjectManager.CustomerFirmwarePackage= ProjectManager.DefaultFWLocation=true ProjectManager.DeletePrevious=true ProjectManager.DeviceId=STM32G431KBTx -ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.4.0 +ProjectManager.FirmwarePackage=STM32Cube FW_G4 V1.5.0 ProjectManager.FreePins=false ProjectManager.HalAssertFull=false ProjectManager.HeapSize=0x200 @@ -235,13 +305,14 @@ ProjectManager.StackSize=0x400 ProjectManager.TargetToolchain=Makefile ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=false -ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_DAC1_Init-DAC1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_TIM7_Init-TIM7-false-HAL-true,7-MX_TIM6_Init-TIM6-false-HAL-true,8-MX_CORDIC_Init-CORDIC-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true,10-MX_TIM8_Init-TIM8-false-HAL-true,11-MX_OPAMP1_Init-OPAMP1-false-HAL-true +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_DAC1_Init-DAC1-false-HAL-true,5-MX_ADC1_Init-ADC1-false-HAL-true,6-MX_TIM7_Init-TIM7-false-HAL-true,7-MX_TIM6_Init-TIM6-false-HAL-true,8-MX_CORDIC_Init-CORDIC-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true,10-MX_TIM8_Init-TIM8-false-HAL-true,11-MX_OPAMP1_Init-OPAMP1-false-HAL-true,12-MX_I2C1_Init-I2C1-false-HAL-true,13-MX_ADC2_Init-ADC2-false-HAL-true,14-MX_DAC3_Init-DAC3-false-HAL-true,15-MX_OPAMP2_Init-OPAMP2-false-HAL-true,16-MX_USB_PCD_Init-USB-false-HAL-true RCC.ADC12Freq_Value=168000000 RCC.AHBFreq_Value=168000000 RCC.APB1Freq_Value=168000000 RCC.APB1TimFreq_Value=168000000 RCC.APB2Freq_Value=168000000 RCC.APB2TimFreq_Value=168000000 +RCC.CK48CLockSelection=RCC_USBCLKSOURCE_HSI48 RCC.CRSFreq_Value=48000000 RCC.CortexFreq_Value=168000000 RCC.EXTERNAL_CLOCK_VALUE=12288000 @@ -256,21 +327,23 @@ RCC.I2C1Freq_Value=168000000 RCC.I2C2Freq_Value=168000000 RCC.I2C3Freq_Value=168000000 RCC.I2SFreq_Value=168000000 -RCC.IPParameters=ADC12Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value +RCC.IPParameters=ADC12Freq_Value,AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,CK48CLockSelection,CRSFreq_Value,CortexFreq_Value,EXTERNAL_CLOCK_VALUE,FCLKCortexFreq_Value,FDCANFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C2Freq_Value,I2C3Freq_Value,I2SFreq_Value,LPTIM1Freq_Value,LPUART1Freq_Value,LSCOPinFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,PLLM,PLLN,PLLPoutputFreq_Value,PLLQ,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PLLSourceVirtual,PWRFreq_Value,RCC_MCO1Source,RNGFreq_Value,SAI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,UART4Freq_Value,USART1Freq_Value,USART2Freq_Value,USART3Freq_Value,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value RCC.LPTIM1Freq_Value=168000000 RCC.LPUART1Freq_Value=168000000 RCC.LSCOPinFreq_Value=32000 RCC.LSE_VALUE=32768 RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=16000000 +RCC.MCO1PinFreq_Value=24000000 RCC.PLLM=RCC_PLLM_DIV2 RCC.PLLN=28 RCC.PLLPoutputFreq_Value=168000000 -RCC.PLLQoutputFreq_Value=168000000 +RCC.PLLQ=RCC_PLLQ_DIV6 +RCC.PLLQoutputFreq_Value=56000000 RCC.PLLRCLKFreq_Value=168000000 RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE RCC.PWRFreq_Value=168000000 -RCC.RNGFreq_Value=168000000 +RCC.RCC_MCO1Source=RCC_MCO1SOURCE_HSE +RCC.RNGFreq_Value=48000000 RCC.SAI1Freq_Value=168000000 RCC.SYSCLKFreq_VALUE=168000000 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK @@ -278,7 +351,7 @@ RCC.UART4Freq_Value=168000000 RCC.USART1Freq_Value=168000000 RCC.USART2Freq_Value=168000000 RCC.USART3Freq_Value=168000000 -RCC.USBFreq_Value=168000000 +RCC.USBFreq_Value=48000000 RCC.VCOInputFreq_Value=12000000 RCC.VCOOutputFreq_Value=336000000 SH.COMP_DAC11_group.0=DAC1_OUT1,DAC_OUT1 @@ -299,12 +372,16 @@ USART1.IPParameters=VirtualMode-Asynchronous USART1.VirtualMode-Asynchronous=VM_ASYNC VP_ADC1_OPAMP_INTERNAL1.Mode=IN-OPAMP1 VP_ADC1_OPAMP_INTERNAL1.Signal=ADC1_OPAMP_INTERNAL1 +VP_ADC2_OPAMP_INTERNAL2.Mode=IN-OPAMP2 +VP_ADC2_OPAMP_INTERNAL2.Signal=ADC2_OPAMP_INTERNAL2 VP_ARM.CMSIS_VS_CMSISJjCORE_5.4.0_5.7.0.Mode=CMSISJjCORE VP_ARM.CMSIS_VS_CMSISJjCORE_5.4.0_5.7.0.Signal=ARM.CMSIS_VS_CMSISJjCORE_5.4.0_5.7.0 VP_ARM.CMSIS_VS_CMSISJjDSP_1.8.0_5.7.0.Mode=CMSISJjDSP VP_ARM.CMSIS_VS_CMSISJjDSP_1.8.0_5.7.0.Signal=ARM.CMSIS_VS_CMSISJjDSP_1.8.0_5.7.0 VP_CORDIC_VS_CORDIC.Mode=CORDIC_Activate VP_CORDIC_VS_CORDIC.Signal=CORDIC_VS_CORDIC +VP_DAC3_VS_DACI1.Mode=DAC_OUT1_Int +VP_DAC3_VS_DACI1.Signal=DAC3_VS_DACI1 VP_SYS_VS_DBSignals.Mode=DisableDeadBatterySignals VP_SYS_VS_DBSignals.Signal=SYS_VS_DBSignals VP_SYS_VS_Systick.Mode=SysTick diff --git a/codice/build/BasicMathFunctions.d b/codice/build/BasicMathFunctions.d new file mode 100644 index 0000000..1116cdc --- /dev/null +++ b/codice/build/BasicMathFunctions.d @@ -0,0 +1,101 @@ +build/BasicMathFunctions.o: \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c: diff --git a/codice/build/BasicMathFunctions.lst b/codice/build/BasicMathFunctions.lst new file mode 100644 index 0000000..51b44ff --- /dev/null +++ b/codice/build/BasicMathFunctions.lst @@ -0,0 +1,2073 @@ +ARM GAS /tmp/ccdi2JnK.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "BasicMathFunctions.c" + 14 .text + 15 .section .text.arm_abs_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_abs_f32 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_abs_f32: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 3AB1 cbz r2, .L1 + 30 .L3: + 31 0002 F0EC017A vldmia.32 r0!, {s15} + 32 0006 013A subs r2, r2, #1 + 33 0008 F0EEE77A vabs.f32 s15, s15 + 34 000c E1EC017A vstmia.32 r1!, {s15} + 35 0010 F7D1 bne .L3 + 36 .L1: + 37 0012 7047 bx lr + 39 .section .text.arm_abs_q15,"ax",%progbits + 40 .align 1 + 41 .p2align 2,,3 + 42 .global arm_abs_q15 + 43 .syntax unified + 44 .thumb + 45 .thumb_func + 46 .fpu fpv4-sp-d16 + 48 arm_abs_q15: + 49 @ args = 0, pretend = 0, frame = 0 + 50 @ frame_needed = 0, uses_anonymous_args = 0 + 51 @ link register save eliminated. + 52 0000 4AB1 cbz r2, .L9 + 53 0002 4FF0000C mov ip, #0 + 54 .L13: + 55 0006 30F9023B ldrsh r3, [r0], #2 + 56 000a 002B cmp r3, #0 + 57 000c 04DD ble .L20 + 58 000e 013A subs r2, r2, #1 + 59 0010 21F8023B strh r3, [r1], #2 @ movhi + 60 0014 F7D1 bne .L13 + ARM GAS /tmp/ccdi2JnK.s page 2 + + + 61 .L9: + 62 0016 7047 bx lr + 63 .L20: + 64 .syntax unified + 65 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 66 0018 DCFA13F3 qsub16 r3, ip, r3 + 67 @ 0 "" 2 + 68 .thumb + 69 .syntax unified + 70 001c 013A subs r2, r2, #1 + 71 001e 21F8023B strh r3, [r1], #2 @ movhi + 72 0022 F0D1 bne .L13 + 73 0024 7047 bx lr + 75 0026 00BF .section .text.arm_abs_q31,"ax",%progbits + 76 .align 1 + 77 .p2align 2,,3 + 78 .global arm_abs_q31 + 79 .syntax unified + 80 .thumb + 81 .thumb_func + 82 .fpu fpv4-sp-d16 + 84 arm_abs_q31: + 85 @ args = 0, pretend = 0, frame = 0 + 86 @ frame_needed = 0, uses_anonymous_args = 0 + 87 @ link register save eliminated. + 88 0000 4AB1 cbz r2, .L21 + 89 0002 4FF0000C mov ip, #0 + 90 .L25: + 91 0006 50F8043B ldr r3, [r0], #4 + 92 000a 002B cmp r3, #0 + 93 000c 04DD ble .L32 + 94 000e 013A subs r2, r2, #1 + 95 0010 41F8043B str r3, [r1], #4 + 96 0014 F7D1 bne .L25 + 97 .L21: + 98 0016 7047 bx lr + 99 .L32: + 100 .syntax unified + 101 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 102 0018 83FAACF3 qsub r3, ip, r3 + 103 @ 0 "" 2 + 104 .thumb + 105 .syntax unified + 106 001c 013A subs r2, r2, #1 + 107 001e 41F8043B str r3, [r1], #4 + 108 0022 F0D1 bne .L25 + 109 0024 7047 bx lr + 111 0026 00BF .section .text.arm_abs_q7,"ax",%progbits + 112 .align 1 + 113 .p2align 2,,3 + 114 .global arm_abs_q7 + 115 .syntax unified + 116 .thumb + 117 .thumb_func + 118 .fpu fpv4-sp-d16 + 120 arm_abs_q7: + 121 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccdi2JnK.s page 3 + + + 122 @ frame_needed = 0, uses_anonymous_args = 0 + 123 @ link register save eliminated. + 124 0000 52B1 cbz r2, .L33 + 125 0002 0244 add r2, r2, r0 + 126 0004 4FF0000C mov ip, #0 + 127 .L37: + 128 0008 10F9013B ldrsb r3, [r0], #1 + 129 000c 002B cmp r3, #0 + 130 000e 04DD ble .L41 + 131 0010 9042 cmp r0, r2 + 132 0012 01F8013B strb r3, [r1], #1 + 133 0016 F7D1 bne .L37 + 134 .L33: + 135 0018 7047 bx lr + 136 .L41: + 137 .syntax unified + 138 @ 1682 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 139 001a CCFA13F3 qsub8 r3, ip, r3 + 140 @ 0 "" 2 + 141 .thumb + 142 .syntax unified + 143 001e 9042 cmp r0, r2 + 144 0020 01F8013B strb r3, [r1], #1 + 145 0024 F0D1 bne .L37 + 146 0026 7047 bx lr + 148 .section .text.arm_add_f32,"ax",%progbits + 149 .align 1 + 150 .p2align 2,,3 + 151 .global arm_add_f32 + 152 .syntax unified + 153 .thumb + 154 .thumb_func + 155 .fpu fpv4-sp-d16 + 157 arm_add_f32: + 158 @ args = 0, pretend = 0, frame = 0 + 159 @ frame_needed = 0, uses_anonymous_args = 0 + 160 @ link register save eliminated. + 161 0000 4BB1 cbz r3, .L42 + 162 .L44: + 163 0002 F0EC017A vldmia.32 r0!, {s15} + 164 0006 B1EC017A vldmia.32 r1!, {s14} + 165 000a 77EE877A vadd.f32 s15, s15, s14 + 166 000e 013B subs r3, r3, #1 + 167 0010 E2EC017A vstmia.32 r2!, {s15} + 168 0014 F5D1 bne .L44 + 169 .L42: + 170 0016 7047 bx lr + 172 .section .text.arm_add_q15,"ax",%progbits + 173 .align 1 + 174 .p2align 2,,3 + 175 .global arm_add_q15 + 176 .syntax unified + 177 .thumb + 178 .thumb_func + 179 .fpu fpv4-sp-d16 + 181 arm_add_q15: + 182 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccdi2JnK.s page 4 + + + 183 @ frame_needed = 0, uses_anonymous_args = 0 + 184 0000 63B1 cbz r3, .L57 + 185 0002 00B5 push {lr} + 186 .L51: + 187 0004 30F902CB ldrsh ip, [r0], #2 + 188 0008 31F902EB ldrsh lr, [r1], #2 + 189 .syntax unified + 190 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 191 000c 9CFA1EFC qadd16 ip, ip, lr + 192 @ 0 "" 2 + 193 .thumb + 194 .syntax unified + 195 0010 013B subs r3, r3, #1 + 196 0012 22F802CB strh ip, [r2], #2 @ movhi + 197 0016 F5D1 bne .L51 + 198 0018 5DF804FB ldr pc, [sp], #4 + 199 .L57: + 200 001c 7047 bx lr + 202 001e 00BF .section .text.arm_add_q31,"ax",%progbits + 203 .align 1 + 204 .p2align 2,,3 + 205 .global arm_add_q31 + 206 .syntax unified + 207 .thumb + 208 .thumb_func + 209 .fpu fpv4-sp-d16 + 211 arm_add_q31: + 212 @ args = 0, pretend = 0, frame = 0 + 213 @ frame_needed = 0, uses_anonymous_args = 0 + 214 @ link register save eliminated. + 215 0000 63B1 cbz r3, .L67 + 216 0002 30B4 push {r4, r5} + 217 .L61: + 218 0004 50F8044B ldr r4, [r0], #4 + 219 0008 51F8045B ldr r5, [r1], #4 + 220 .syntax unified + 221 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 222 000c 85FA84F4 qadd r4, r4, r5 + 223 @ 0 "" 2 + 224 .thumb + 225 .syntax unified + 226 0010 013B subs r3, r3, #1 + 227 0012 42F8044B str r4, [r2], #4 + 228 0016 F5D1 bne .L61 + 229 0018 30BC pop {r4, r5} + 230 001a 7047 bx lr + 231 .L67: + 232 001c 7047 bx lr + 234 001e 00BF .section .text.arm_add_q7,"ax",%progbits + 235 .align 1 + 236 .p2align 2,,3 + 237 .global arm_add_q7 + 238 .syntax unified + 239 .thumb + 240 .thumb_func + 241 .fpu fpv4-sp-d16 + 243 arm_add_q7: + ARM GAS /tmp/ccdi2JnK.s page 5 + + + 244 @ args = 0, pretend = 0, frame = 0 + 245 @ frame_needed = 0, uses_anonymous_args = 0 + 246 0000 7BB1 cbz r3, .L77 + 247 0002 00B5 push {lr} + 248 0004 00EB030E add lr, r0, r3 + 249 .L71: + 250 0008 10F9013B ldrsb r3, [r0], #1 + 251 000c 11F901CB ldrsb ip, [r1], #1 + 252 0010 8645 cmp lr, r0 + 253 0012 6344 add r3, r3, ip + 254 .syntax unified + 255 @ 148 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c" 1 + 256 0014 03F30703 ssat r3, #8, r3 + 257 @ 0 "" 2 + 258 .thumb + 259 .syntax unified + 260 0018 02F8013B strb r3, [r2], #1 + 261 001c F4D1 bne .L71 + 262 001e 5DF804FB ldr pc, [sp], #4 + 263 .L77: + 264 0022 7047 bx lr + 266 .section .text.arm_and_u16,"ax",%progbits + 267 .align 1 + 268 .p2align 2,,3 + 269 .global arm_and_u16 + 270 .syntax unified + 271 .thumb + 272 .thumb_func + 273 .fpu fpv4-sp-d16 + 275 arm_and_u16: + 276 @ args = 0, pretend = 0, frame = 0 + 277 @ frame_needed = 0, uses_anonymous_args = 0 + 278 0000 CBB3 cbz r3, .L97 + 279 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 280 0006 8D1C adds r5, r1, #2 + 281 0008 841C adds r4, r0, #2 + 282 000a AA42 cmp r2, r5 + 283 000c 18BF it ne + 284 000e A242 cmpne r2, r4 + 285 0010 03F1FF36 add r6, r3, #-1 + 286 0014 23D0 beq .L92 + 287 0016 052E cmp r6, #5 + 288 0018 21D9 bls .L92 + 289 001a 4FEA5308 lsr r8, r3, #1 + 290 001e 0646 mov r6, r0 + 291 0020 0D46 mov r5, r1 + 292 0022 1446 mov r4, r2 + 293 0024 4FF0000E mov lr, #0 + 294 .L83: + 295 0028 56F804CB ldr ip, [r6], #4 @ unaligned + 296 002c 55F8047B ldr r7, [r5], #4 @ unaligned + 297 0030 0EF1010E add lr, lr, #1 + 298 0034 0CEA070C and ip, ip, r7 + 299 0038 C645 cmp lr, r8 + 300 003a 44F804CB str ip, [r4], #4 @ unaligned + 301 003e F3D1 bne .L83 + 302 0040 23F0010C bic ip, r3, #1 + ARM GAS /tmp/ccdi2JnK.s page 6 + + + 303 0044 DB07 lsls r3, r3, #31 + 304 0046 06D5 bpl .L80 + 305 0048 30F81C30 ldrh r3, [r0, ip, lsl #1] + 306 004c 31F81C10 ldrh r1, [r1, ip, lsl #1] + 307 0050 0B40 ands r3, r3, r1 + 308 0052 22F81C30 strh r3, [r2, ip, lsl #1] @ movhi + 309 .L80: + 310 0056 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 311 .L101: + 312 005a 0235 adds r5, r5, #2 + 313 005c 013E subs r6, r6, #1 + 314 .L92: + 315 005e 34F8023C ldrh r3, [r4, #-2] + 316 0062 35F8021C ldrh r1, [r5, #-2] + 317 0066 0B40 ands r3, r3, r1 + 318 0068 22F8023B strh r3, [r2], #2 @ movhi + 319 006c 0234 adds r4, r4, #2 + 320 006e 002E cmp r6, #0 + 321 0070 F3D1 bne .L101 + 322 0072 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 323 .L97: + 324 0076 7047 bx lr + 326 .section .text.arm_and_u32,"ax",%progbits + 327 .align 1 + 328 .p2align 2,,3 + 329 .global arm_and_u32 + 330 .syntax unified + 331 .thumb + 332 .thumb_func + 333 .fpu fpv4-sp-d16 + 335 arm_and_u32: + 336 @ args = 0, pretend = 0, frame = 0 + 337 @ frame_needed = 0, uses_anonymous_args = 0 + 338 0000 002B cmp r3, #0 + 339 0002 4ED0 beq .L119 + 340 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 341 0008 9846 mov r8, r3 + 342 000a 0D1D adds r5, r1, #4 + 343 000c 031D adds r3, r0, #4 + 344 000e 9A42 cmp r2, r3 + 345 0010 18BF it ne + 346 0012 AA42 cmpne r2, r5 + 347 0014 14BF ite ne + 348 0016 0126 movne r6, #1 + 349 0018 0026 moveq r6, #0 + 350 001a 08F1FF34 add r4, r8, #-1 + 351 001e 062C cmp r4, #6 + 352 0020 94BF ite ls + 353 0022 0026 movls r6, #0 + 354 0024 06F00106 andhi r6, r6, #1 + 355 0028 7EB3 cbz r6, .L114 + 356 002a 42EA0106 orr r6, r2, r1 + 357 002e 0643 orrs r6, r6, r0 + 358 0030 7607 lsls r6, r6, #29 + 359 0032 2AD1 bne .L114 + 360 0034 4FEA5809 lsr r9, r8, #1 + 361 0038 A0F10807 sub r7, r0, #8 + ARM GAS /tmp/ccdi2JnK.s page 7 + + + 362 003c A1F10806 sub r6, r1, #8 + 363 0040 9446 mov ip, r2 + 364 0042 4FF0000E mov lr, #0 + 365 .L105: + 366 0046 57F8085F ldr r5, [r7, #8]! + 367 004a 56F8083F ldr r3, [r6, #8]! + 368 004e 7C68 ldr r4, [r7, #4] + 369 0050 1D40 ands r5, r5, r3 + 370 0052 7368 ldr r3, [r6, #4] + 371 0054 CCF80050 str r5, [ip] + 372 0058 0EF1010E add lr, lr, #1 + 373 005c 1C40 ands r4, r4, r3 + 374 005e CE45 cmp lr, r9 + 375 0060 0CF1080C add ip, ip, #8 + 376 0064 4CF8044C str r4, [ip, #-4] + 377 0068 EDD1 bne .L105 + 378 006a 18F0010F tst r8, #1 + 379 006e 28F00104 bic r4, r8, #1 + 380 0072 06D0 beq .L102 + 381 0074 50F82430 ldr r3, [r0, r4, lsl #2] + 382 0078 51F82410 ldr r1, [r1, r4, lsl #2] + 383 007c 0B40 ands r3, r3, r1 + 384 007e 42F82430 str r3, [r2, r4, lsl #2] + 385 .L102: + 386 0082 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 387 .L123: + 388 0086 0435 adds r5, r5, #4 + 389 0088 013C subs r4, r4, #1 + 390 .L114: + 391 008a 53F8041C ldr r1, [r3, #-4] + 392 008e 55F8040C ldr r0, [r5, #-4] + 393 0092 0140 ands r1, r1, r0 + 394 0094 42F8041B str r1, [r2], #4 + 395 0098 0433 adds r3, r3, #4 + 396 009a 002C cmp r4, #0 + 397 009c F3D1 bne .L123 + 398 009e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 399 .L119: + 400 00a2 7047 bx lr + 402 .section .text.arm_and_u8,"ax",%progbits + 403 .align 1 + 404 .p2align 2,,3 + 405 .global arm_and_u8 + 406 .syntax unified + 407 .thumb + 408 .thumb_func + 409 .fpu fpv4-sp-d16 + 411 arm_and_u8: + 412 @ args = 0, pretend = 0, frame = 0 + 413 @ frame_needed = 0, uses_anonymous_args = 0 + 414 0000 002B cmp r3, #0 + 415 0002 4DD0 beq .L149 + 416 0004 F0B5 push {r4, r5, r6, r7, lr} + 417 0006 4D1C adds r5, r1, #1 + 418 0008 5C1E subs r4, r3, #1 + 419 000a 561B subs r6, r2, r5 + 420 000c 022E cmp r6, #2 + ARM GAS /tmp/ccdi2JnK.s page 8 + + + 421 000e 88BF it hi + 422 0010 042C cmphi r4, #4 + 423 0012 00F10104 add r4, r0, #1 + 424 0016 33D9 bls .L126 + 425 0018 161B subs r6, r2, r4 + 426 001a 022E cmp r6, #2 + 427 001c 30D9 bls .L126 + 428 001e 23F00307 bic r7, r3, #3 + 429 0022 8646 mov lr, r0 + 430 0024 0744 add r7, r7, r0 + 431 0026 0D46 mov r5, r1 + 432 0028 1446 mov r4, r2 + 433 .L127: + 434 002a 5EF804CB ldr ip, [lr], #4 @ unaligned + 435 002e 55F8046B ldr r6, [r5], #4 @ unaligned + 436 0032 BE45 cmp lr, r7 + 437 0034 0CEA060C and ip, ip, r6 + 438 0038 44F804CB str ip, [r4], #4 @ unaligned + 439 003c F5D1 bne .L127 + 440 003e 23F00304 bic r4, r3, #3 + 441 0042 A342 cmp r3, r4 + 442 0044 00EB040C add ip, r0, r4 + 443 0048 01EB0407 add r7, r1, r4 + 444 004c 02EB0406 add r6, r2, r4 + 445 0050 A3EB0405 sub r5, r3, r4 + 446 0054 13D0 beq .L124 + 447 0056 035D ldrb r3, [r0, r4] @ zero_extendqisi2 + 448 0058 095D ldrb r1, [r1, r4] @ zero_extendqisi2 + 449 005a 012D cmp r5, #1 + 450 005c 03EA0103 and r3, r3, r1 + 451 0060 1355 strb r3, [r2, r4] + 452 0062 0CD0 beq .L124 + 453 0064 9CF80130 ldrb r3, [ip, #1] @ zero_extendqisi2 + 454 0068 7A78 ldrb r2, [r7, #1] @ zero_extendqisi2 + 455 006a 022D cmp r5, #2 + 456 006c 03EA0203 and r3, r3, r2 + 457 0070 7370 strb r3, [r6, #1] + 458 0072 04D0 beq .L124 + 459 0074 9CF80230 ldrb r3, [ip, #2] @ zero_extendqisi2 + 460 0078 BA78 ldrb r2, [r7, #2] @ zero_extendqisi2 + 461 007a 1340 ands r3, r3, r2 + 462 007c B370 strb r3, [r6, #2] + 463 .L124: + 464 007e F0BD pop {r4, r5, r6, r7, pc} + 465 .L126: + 466 0080 0344 add r3, r3, r0 + 467 0082 00E0 b .L129 + 468 .L153: + 469 0084 0134 adds r4, r4, #1 + 470 .L129: + 471 0086 15F8010C ldrb r0, [r5, #-1] @ zero_extendqisi2 + 472 008a 14F8011C ldrb r1, [r4, #-1] @ zero_extendqisi2 + 473 008e 9C42 cmp r4, r3 + 474 0090 01EA0001 and r1, r1, r0 + 475 0094 02F8011B strb r1, [r2], #1 + 476 0098 05F10105 add r5, r5, #1 + 477 009c F2D1 bne .L153 + ARM GAS /tmp/ccdi2JnK.s page 9 + + + 478 009e F0BD pop {r4, r5, r6, r7, pc} + 479 .L149: + 480 00a0 7047 bx lr + 482 00a2 00BF .section .text.arm_dot_prod_f32,"ax",%progbits + 483 .align 1 + 484 .p2align 2,,3 + 485 .global arm_dot_prod_f32 + 486 .syntax unified + 487 .thumb + 488 .thumb_func + 489 .fpu fpv4-sp-d16 + 491 arm_dot_prod_f32: + 492 @ args = 0, pretend = 0, frame = 0 + 493 @ frame_needed = 0, uses_anonymous_args = 0 + 494 @ link register save eliminated. + 495 0000 DFED067A vldr.32 s15, .L159 + 496 0004 3AB1 cbz r2, .L155 + 497 .L156: + 498 0006 F0EC016A vldmia.32 r0!, {s13} + 499 000a B1EC017A vldmia.32 r1!, {s14} + 500 000e 013A subs r2, r2, #1 + 501 0010 E6EE877A vfma.f32 s15, s13, s14 + 502 0014 F7D1 bne .L156 + 503 .L155: + 504 0016 C3ED007A vstr.32 s15, [r3] + 505 001a 7047 bx lr + 506 .L160: + 507 .align 2 + 508 .L159: + 509 001c 00000000 .word 0 + 511 .section .text.arm_dot_prod_q15,"ax",%progbits + 512 .align 1 + 513 .p2align 2,,3 + 514 .global arm_dot_prod_q15 + 515 .syntax unified + 516 .thumb + 517 .thumb_func + 518 .fpu fpv4-sp-d16 + 520 arm_dot_prod_q15: + 521 @ args = 0, pretend = 0, frame = 0 + 522 @ frame_needed = 0, uses_anonymous_args = 0 + 523 0000 30B5 push {r4, r5, lr} + 524 0002 0024 movs r4, #0 + 525 0004 0025 movs r5, #0 + 526 0006 3AB1 cbz r2, .L162 + 527 .L163: + 528 0008 30F802EB ldrh lr, [r0], #2 + 529 000c 31F802CB ldrh ip, [r1], #2 + 530 0010 013A subs r2, r2, #1 + 531 0012 CEFB8C45 smlalbb r4, r5, lr, ip + 532 0016 F7D1 bne .L163 + 533 .L162: + 534 0018 C3E90045 strd r4, [r3] + 535 001c 30BD pop {r4, r5, pc} + 537 001e 00BF .section .text.arm_dot_prod_q31,"ax",%progbits + 538 .align 1 + 539 .p2align 2,,3 + ARM GAS /tmp/ccdi2JnK.s page 10 + + + 540 .global arm_dot_prod_q31 + 541 .syntax unified + 542 .thumb + 543 .thumb_func + 544 .fpu fpv4-sp-d16 + 546 arm_dot_prod_q31: + 547 @ args = 0, pretend = 0, frame = 0 + 548 @ frame_needed = 0, uses_anonymous_args = 0 + 549 @ link register save eliminated. + 550 0000 F0B4 push {r4, r5, r6, r7} + 551 0002 AAB1 cbz r2, .L170 + 552 0004 0026 movs r6, #0 + 553 0006 3746 mov r7, r6 + 554 .L169: + 555 0008 50F8044B ldr r4, [r0], #4 + 556 000c 51F8045B ldr r5, [r1], #4 + 557 0010 84FB05C4 smull ip, r4, r4, r5 + 558 0014 4FEA9C3C lsr ip, ip, #14 + 559 0018 4CEA844C orr ip, ip, r4, lsl #18 + 560 001c 1CEB0606 adds r6, ip, r6 + 561 0020 47EBA437 adc r7, r7, r4, asr #14 + 562 0024 013A subs r2, r2, #1 + 563 0026 EFD1 bne .L169 + 564 0028 C3E90067 strd r6, r7, [r3] + 565 002c F0BC pop {r4, r5, r6, r7} + 566 002e 7047 bx lr + 567 .L170: + 568 0030 1646 mov r6, r2 + 569 0032 1746 mov r7, r2 + 570 0034 C3E90067 strd r6, r7, [r3] + 571 0038 F0BC pop {r4, r5, r6, r7} + 572 003a 7047 bx lr + 574 .section .text.arm_dot_prod_q7,"ax",%progbits + 575 .align 1 + 576 .p2align 2,,3 + 577 .global arm_dot_prod_q7 + 578 .syntax unified + 579 .thumb + 580 .thumb_func + 581 .fpu fpv4-sp-d16 + 583 arm_dot_prod_q7: + 584 @ args = 0, pretend = 0, frame = 0 + 585 @ frame_needed = 0, uses_anonymous_args = 0 + 586 0000 62B1 cbz r2, .L179 + 587 0002 10B5 push {r4, lr} + 588 0004 8418 adds r4, r0, r2 + 589 0006 0022 movs r2, #0 + 590 .L175: + 591 0008 10F901EB ldrsb lr, [r0], #1 + 592 000c 11F901CB ldrsb ip, [r1], #1 + 593 0010 A042 cmp r0, r4 + 594 0012 1EFB0C22 smlabb r2, lr, ip, r2 + 595 0016 F7D1 bne .L175 + 596 0018 1A60 str r2, [r3] + 597 001a 10BD pop {r4, pc} + 598 .L179: + 599 001c 1A60 str r2, [r3] + ARM GAS /tmp/ccdi2JnK.s page 11 + + + 600 001e 7047 bx lr + 602 .section .text.arm_mult_f32,"ax",%progbits + 603 .align 1 + 604 .p2align 2,,3 + 605 .global arm_mult_f32 + 606 .syntax unified + 607 .thumb + 608 .thumb_func + 609 .fpu fpv4-sp-d16 + 611 arm_mult_f32: + 612 @ args = 0, pretend = 0, frame = 0 + 613 @ frame_needed = 0, uses_anonymous_args = 0 + 614 @ link register save eliminated. + 615 0000 4BB1 cbz r3, .L182 + 616 .L184: + 617 0002 F0EC017A vldmia.32 r0!, {s15} + 618 0006 B1EC017A vldmia.32 r1!, {s14} + 619 000a 67EE877A vmul.f32 s15, s15, s14 + 620 000e 013B subs r3, r3, #1 + 621 0010 E2EC017A vstmia.32 r2!, {s15} + 622 0014 F5D1 bne .L184 + 623 .L182: + 624 0016 7047 bx lr + 626 .section .text.arm_mult_q15,"ax",%progbits + 627 .align 1 + 628 .p2align 2,,3 + 629 .global arm_mult_q15 + 630 .syntax unified + 631 .thumb + 632 .thumb_func + 633 .fpu fpv4-sp-d16 + 635 arm_mult_q15: + 636 @ args = 0, pretend = 0, frame = 0 + 637 @ frame_needed = 0, uses_anonymous_args = 0 + 638 0000 83B1 cbz r3, .L197 + 639 0002 00B5 push {lr} + 640 .L191: + 641 0004 30F802CB ldrh ip, [r0], #2 + 642 0008 31F802EB ldrh lr, [r1], #2 + 643 000c 013B subs r3, r3, #1 + 644 000e 1CFB0EFC smulbb ip, ip, lr + 645 0012 4FEAEC3C asr ip, ip, #15 + 646 .syntax unified + 647 @ 181 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c" 1 + 648 0016 0CF30F0C ssat ip, #16, ip + 649 @ 0 "" 2 + 650 .thumb + 651 .syntax unified + 652 001a 22F802CB strh ip, [r2], #2 @ movhi + 653 001e F1D1 bne .L191 + 654 0020 5DF804FB ldr pc, [sp], #4 + 655 .L197: + 656 0024 7047 bx lr + 658 0026 00BF .section .text.arm_mult_q31,"ax",%progbits + 659 .align 1 + 660 .p2align 2,,3 + 661 .global arm_mult_q31 + ARM GAS /tmp/ccdi2JnK.s page 12 + + + 662 .syntax unified + 663 .thumb + 664 .thumb_func + 665 .fpu fpv4-sp-d16 + 667 arm_mult_q31: + 668 @ args = 0, pretend = 0, frame = 0 + 669 @ frame_needed = 0, uses_anonymous_args = 0 + 670 @ link register save eliminated. + 671 0000 83B1 cbz r3, .L207 + 672 0002 30B4 push {r4, r5} + 673 .L201: + 674 0004 50F8045B ldr r5, [r0], #4 + 675 0008 51F8044B ldr r4, [r1], #4 + 676 000c 013B subs r3, r3, #1 + 677 000e 85FB0454 smull r5, r4, r5, r4 + 678 .syntax unified + 679 @ 156 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c" 1 + 680 0012 04F31E04 ssat r4, #31, r4 + 681 @ 0 "" 2 + 682 .thumb + 683 .syntax unified + 684 0016 4FEA4404 lsl r4, r4, #1 + 685 001a 42F8044B str r4, [r2], #4 + 686 001e F1D1 bne .L201 + 687 0020 30BC pop {r4, r5} + 688 0022 7047 bx lr + 689 .L207: + 690 0024 7047 bx lr + 692 0026 00BF .section .text.arm_mult_q7,"ax",%progbits + 693 .align 1 + 694 .p2align 2,,3 + 695 .global arm_mult_q7 + 696 .syntax unified + 697 .thumb + 698 .thumb_func + 699 .fpu fpv4-sp-d16 + 701 arm_mult_q7: + 702 @ args = 0, pretend = 0, frame = 0 + 703 @ frame_needed = 0, uses_anonymous_args = 0 + 704 0000 93B1 cbz r3, .L217 + 705 0002 00B5 push {lr} + 706 0004 00EB030E add lr, r0, r3 + 707 .L211: + 708 0008 10F9013B ldrsb r3, [r0], #1 + 709 000c 11F901CB ldrsb ip, [r1], #1 + 710 0010 8645 cmp lr, r0 + 711 0012 13FB0CF3 smulbb r3, r3, ip + 712 0016 4FEAE313 asr r3, r3, #7 + 713 .syntax unified + 714 @ 157 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c" 1 + 715 001a 03F30703 ssat r3, #8, r3 + 716 @ 0 "" 2 + 717 .thumb + 718 .syntax unified + 719 001e 02F8013B strb r3, [r2], #1 + 720 0022 F1D1 bne .L211 + 721 0024 5DF804FB ldr pc, [sp], #4 + ARM GAS /tmp/ccdi2JnK.s page 13 + + + 722 .L217: + 723 0028 7047 bx lr + 725 002a 00BF .section .text.arm_negate_f32,"ax",%progbits + 726 .align 1 + 727 .p2align 2,,3 + 728 .global arm_negate_f32 + 729 .syntax unified + 730 .thumb + 731 .thumb_func + 732 .fpu fpv4-sp-d16 + 734 arm_negate_f32: + 735 @ args = 0, pretend = 0, frame = 0 + 736 @ frame_needed = 0, uses_anonymous_args = 0 + 737 @ link register save eliminated. + 738 0000 3AB1 cbz r2, .L220 + 739 .L222: + 740 0002 F0EC017A vldmia.32 r0!, {s15} + 741 0006 013A subs r2, r2, #1 + 742 0008 F1EE677A vneg.f32 s15, s15 + 743 000c E1EC017A vstmia.32 r1!, {s15} + 744 0010 F7D1 bne .L222 + 745 .L220: + 746 0012 7047 bx lr + 748 .section .text.arm_negate_q15,"ax",%progbits + 749 .align 1 + 750 .p2align 2,,3 + 751 .global arm_negate_q15 + 752 .syntax unified + 753 .thumb + 754 .thumb_func + 755 .fpu fpv4-sp-d16 + 757 arm_negate_q15: + 758 @ args = 0, pretend = 0, frame = 0 + 759 @ frame_needed = 0, uses_anonymous_args = 0 + 760 0000 AAB1 cbz r2, .L239 + 761 0002 00B5 push {lr} + 762 0004 47F6FF7E movw lr, #32767 + 763 .L231: + 764 0008 30F9023B ldrsh r3, [r0], #2 + 765 000c 13F5004F cmn r3, #32768 + 766 0010 C3F1000C rsb ip, r3, #0 + 767 0014 05D0 beq .L229 + 768 0016 013A subs r2, r2, #1 + 769 0018 21F802CB strh ip, [r1], #2 @ movhi + 770 001c F4D1 bne .L231 + 771 001e 5DF804FB ldr pc, [sp], #4 + 772 .L229: + 773 0022 013A subs r2, r2, #1 + 774 0024 21F802EB strh lr, [r1], #2 @ movhi + 775 0028 EED1 bne .L231 + 776 002a 5DF804FB ldr pc, [sp], #4 + 777 .L239: + 778 002e 7047 bx lr + 780 .section .text.arm_negate_q31,"ax",%progbits + 781 .align 1 + 782 .p2align 2,,3 + 783 .global arm_negate_q31 + ARM GAS /tmp/ccdi2JnK.s page 14 + + + 784 .syntax unified + 785 .thumb + 786 .thumb_func + 787 .fpu fpv4-sp-d16 + 789 arm_negate_q31: + 790 @ args = 0, pretend = 0, frame = 0 + 791 @ frame_needed = 0, uses_anonymous_args = 0 + 792 @ link register save eliminated. + 793 0000 4AB1 cbz r2, .L242 + 794 0002 4FF0000C mov ip, #0 + 795 .L244: + 796 0006 50F8043B ldr r3, [r0], #4 + 797 .syntax unified + 798 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 799 000a 83FAACF3 qsub r3, ip, r3 + 800 @ 0 "" 2 + 801 .thumb + 802 .syntax unified + 803 000e 013A subs r2, r2, #1 + 804 0010 41F8043B str r3, [r1], #4 + 805 0014 F7D1 bne .L244 + 806 .L242: + 807 0016 7047 bx lr + 809 .section .text.arm_negate_q7,"ax",%progbits + 810 .align 1 + 811 .p2align 2,,3 + 812 .global arm_negate_q7 + 813 .syntax unified + 814 .thumb + 815 .thumb_func + 816 .fpu fpv4-sp-d16 + 818 arm_negate_q7: + 819 @ args = 0, pretend = 0, frame = 0 + 820 @ frame_needed = 0, uses_anonymous_args = 0 + 821 @ link register save eliminated. + 822 0000 52B1 cbz r2, .L249 + 823 0002 0244 add r2, r2, r0 + 824 0004 4FF0000C mov ip, #0 + 825 .L251: + 826 0008 10F9013B ldrsb r3, [r0], #1 + 827 .syntax unified + 828 @ 1682 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 829 000c CCFA13F3 qsub8 r3, ip, r3 + 830 @ 0 "" 2 + 831 .thumb + 832 .syntax unified + 833 0010 9042 cmp r0, r2 + 834 0012 01F8013B strb r3, [r1], #1 + 835 0016 F7D1 bne .L251 + 836 .L249: + 837 0018 7047 bx lr + 839 001a 00BF .section .text.arm_not_u16,"ax",%progbits + 840 .align 1 + 841 .p2align 2,,3 + 842 .global arm_not_u16 + 843 .syntax unified + 844 .thumb + ARM GAS /tmp/ccdi2JnK.s page 15 + + + 845 .thumb_func + 846 .fpu fpv4-sp-d16 + 848 arm_not_u16: + 849 @ args = 0, pretend = 0, frame = 0 + 850 @ frame_needed = 0, uses_anonymous_args = 0 + 851 0000 4AB3 cbz r2, .L273 + 852 0002 831C adds r3, r0, #2 + 853 0004 9942 cmp r1, r3 + 854 0006 30B5 push {r4, r5, lr} + 855 0008 02F1FF34 add r4, r2, #-1 + 856 000c 1AD0 beq .L268 + 857 000e 062C cmp r4, #6 + 858 0010 18D9 bls .L268 + 859 0012 5508 lsrs r5, r2, #1 + 860 0014 0446 mov r4, r0 + 861 0016 8E46 mov lr, r1 + 862 0018 4FF0000C mov ip, #0 + 863 .L259: + 864 001c 54F8043B ldr r3, [r4], #4 @ unaligned + 865 0020 0CF1010C add ip, ip, #1 + 866 0024 DB43 mvns r3, r3 + 867 0026 AC45 cmp ip, r5 + 868 0028 4EF8043B str r3, [lr], #4 @ unaligned + 869 002c F6D1 bne .L259 + 870 002e D307 lsls r3, r2, #31 + 871 0030 22F0010C bic ip, r2, #1 + 872 0034 04D5 bpl .L256 + 873 0036 30F81C30 ldrh r3, [r0, ip, lsl #1] + 874 003a DB43 mvns r3, r3 + 875 003c 21F81C30 strh r3, [r1, ip, lsl #1] @ movhi + 876 .L256: + 877 0040 30BD pop {r4, r5, pc} + 878 .L277: + 879 0042 013C subs r4, r4, #1 + 880 .L268: + 881 0044 33F8022C ldrh r2, [r3, #-2] + 882 0048 D243 mvns r2, r2 + 883 004a 21F8022B strh r2, [r1], #2 @ movhi + 884 004e 0233 adds r3, r3, #2 + 885 0050 002C cmp r4, #0 + 886 0052 F6D1 bne .L277 + 887 0054 30BD pop {r4, r5, pc} + 888 .L273: + 889 0056 7047 bx lr + 891 .section .text.arm_not_u32,"ax",%progbits + 892 .align 1 + 893 .p2align 2,,3 + 894 .global arm_not_u32 + 895 .syntax unified + 896 .thumb + 897 .thumb_func + 898 .fpu fpv4-sp-d16 + 900 arm_not_u32: + 901 @ args = 0, pretend = 0, frame = 0 + 902 @ frame_needed = 0, uses_anonymous_args = 0 + 903 0000 92B3 cbz r2, .L295 + 904 0002 70B5 push {r4, r5, r6, lr} + ARM GAS /tmp/ccdi2JnK.s page 16 + + + 905 0004 031D adds r3, r0, #4 + 906 0006 541E subs r4, r2, #1 + 907 0008 9942 cmp r1, r3 + 908 000a 18BF it ne + 909 000c 072C cmpne r4, #7 + 910 000e 22D9 bls .L290 + 911 0010 41EA0005 orr r5, r1, r0 + 912 0014 6D07 lsls r5, r5, #29 + 913 0016 1ED1 bne .L290 + 914 0018 5608 lsrs r6, r2, #1 + 915 001a A0F1080E sub lr, r0, #8 + 916 001e 0B46 mov r3, r1 + 917 0020 4FF0000C mov ip, #0 + 918 .L281: + 919 0024 5EF8085F ldr r5, [lr, #8]! + 920 0028 DEF80440 ldr r4, [lr, #4] + 921 002c 0CF1010C add ip, ip, #1 + 922 0030 ED43 mvns r5, r5 + 923 0032 E443 mvns r4, r4 + 924 0034 B445 cmp ip, r6 + 925 0036 C3E90054 strd r5, r4, [r3] + 926 003a 03F10803 add r3, r3, #8 + 927 003e F1D1 bne .L281 + 928 0040 D307 lsls r3, r2, #31 + 929 0042 22F00104 bic r4, r2, #1 + 930 0046 04D5 bpl .L278 + 931 0048 50F82430 ldr r3, [r0, r4, lsl #2] + 932 004c DB43 mvns r3, r3 + 933 004e 41F82430 str r3, [r1, r4, lsl #2] + 934 .L278: + 935 0052 70BD pop {r4, r5, r6, pc} + 936 .L299: + 937 0054 013C subs r4, r4, #1 + 938 .L290: + 939 0056 53F8042C ldr r2, [r3, #-4] + 940 005a D243 mvns r2, r2 + 941 005c 41F8042B str r2, [r1], #4 + 942 0060 0433 adds r3, r3, #4 + 943 0062 002C cmp r4, #0 + 944 0064 F6D1 bne .L299 + 945 0066 70BD pop {r4, r5, r6, pc} + 946 .L295: + 947 0068 7047 bx lr + 949 006a 00BF .section .text.arm_not_u8,"ax",%progbits + 950 .align 1 + 951 .p2align 2,,3 + 952 .global arm_not_u8 + 953 .syntax unified + 954 .thumb + 955 .thumb_func + 956 .fpu fpv4-sp-d16 + 958 arm_not_u8: + 959 @ args = 0, pretend = 0, frame = 0 + 960 @ frame_needed = 0, uses_anonymous_args = 0 + 961 0000 EAB3 cbz r2, .L325 + 962 0002 431C adds r3, r0, #1 + 963 0004 10B5 push {r4, lr} + ARM GAS /tmp/ccdi2JnK.s page 17 + + + 964 0006 CC1A subs r4, r1, r3 + 965 0008 022C cmp r4, #2 + 966 000a 2CD9 bls .L302 + 967 000c 541E subs r4, r2, #1 + 968 000e 052C cmp r4, #5 + 969 0010 29D9 bls .L302 + 970 0012 22F00304 bic r4, r2, #3 + 971 0016 8446 mov ip, r0 + 972 0018 8E46 mov lr, r1 + 973 001a 0444 add r4, r4, r0 + 974 .L303: + 975 001c 5CF8043B ldr r3, [ip], #4 @ unaligned + 976 0020 DB43 mvns r3, r3 + 977 0022 A445 cmp ip, r4 + 978 0024 4EF8043B str r3, [lr], #4 @ unaligned + 979 0028 F8D1 bne .L303 + 980 002a 22F00303 bic r3, r2, #3 + 981 002e 9A42 cmp r2, r3 + 982 0030 00EB030E add lr, r0, r3 + 983 0034 01EB030C add ip, r1, r3 + 984 0038 A2EB0304 sub r4, r2, r3 + 985 003c 12D0 beq .L300 + 986 003e C25C ldrb r2, [r0, r3] @ zero_extendqisi2 + 987 0040 012C cmp r4, #1 + 988 0042 6FEA0202 mvn r2, r2 + 989 0046 CA54 strb r2, [r1, r3] + 990 0048 0CD0 beq .L300 + 991 004a 9EF80130 ldrb r3, [lr, #1] @ zero_extendqisi2 + 992 004e 022C cmp r4, #2 + 993 0050 6FEA0303 mvn r3, r3 + 994 0054 8CF80130 strb r3, [ip, #1] + 995 0058 04D0 beq .L300 + 996 005a 9EF80230 ldrb r3, [lr, #2] @ zero_extendqisi2 + 997 005e DB43 mvns r3, r3 + 998 0060 8CF80230 strb r3, [ip, #2] + 999 .L300: + 1000 0064 10BD pop {r4, pc} + 1001 .L302: + 1002 0066 0244 add r2, r2, r0 + 1003 0068 00E0 b .L305 + 1004 .L329: + 1005 006a 0133 adds r3, r3, #1 + 1006 .L305: + 1007 006c 13F8010C ldrb r0, [r3, #-1] @ zero_extendqisi2 + 1008 0070 9342 cmp r3, r2 + 1009 0072 6FEA0000 mvn r0, r0 + 1010 0076 01F8010B strb r0, [r1], #1 + 1011 007a F6D1 bne .L329 + 1012 007c 10BD pop {r4, pc} + 1013 .L325: + 1014 007e 7047 bx lr + 1016 .section .text.arm_offset_f32,"ax",%progbits + 1017 .align 1 + 1018 .p2align 2,,3 + 1019 .global arm_offset_f32 + 1020 .syntax unified + 1021 .thumb + ARM GAS /tmp/ccdi2JnK.s page 18 + + + 1022 .thumb_func + 1023 .fpu fpv4-sp-d16 + 1025 arm_offset_f32: + 1026 @ args = 0, pretend = 0, frame = 0 + 1027 @ frame_needed = 0, uses_anonymous_args = 0 + 1028 @ link register save eliminated. + 1029 0000 3AB1 cbz r2, .L330 + 1030 .L332: + 1031 0002 F0EC017A vldmia.32 r0!, {s15} + 1032 0006 77EE807A vadd.f32 s15, s15, s0 + 1033 000a 013A subs r2, r2, #1 + 1034 000c E1EC017A vstmia.32 r1!, {s15} + 1035 0010 F7D1 bne .L332 + 1036 .L330: + 1037 0012 7047 bx lr + 1039 .section .text.arm_offset_q15,"ax",%progbits + 1040 .align 1 + 1041 .p2align 2,,3 + 1042 .global arm_offset_q15 + 1043 .syntax unified + 1044 .thumb + 1045 .thumb_func + 1046 .fpu fpv4-sp-d16 + 1048 arm_offset_q15: + 1049 @ args = 0, pretend = 0, frame = 0 + 1050 @ frame_needed = 0, uses_anonymous_args = 0 + 1051 @ link register save eliminated. + 1052 0000 3BB1 cbz r3, .L337 + 1053 .L339: + 1054 0002 30F902CB ldrsh ip, [r0], #2 + 1055 .syntax unified + 1056 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1057 0006 9CFA11FC qadd16 ip, ip, r1 + 1058 @ 0 "" 2 + 1059 .thumb + 1060 .syntax unified + 1061 000a 013B subs r3, r3, #1 + 1062 000c 22F802CB strh ip, [r2], #2 @ movhi + 1063 0010 F7D1 bne .L339 + 1064 .L337: + 1065 0012 7047 bx lr + 1067 .section .text.arm_offset_q31,"ax",%progbits + 1068 .align 1 + 1069 .p2align 2,,3 + 1070 .global arm_offset_q31 + 1071 .syntax unified + 1072 .thumb + 1073 .thumb_func + 1074 .fpu fpv4-sp-d16 + 1076 arm_offset_q31: + 1077 @ args = 0, pretend = 0, frame = 0 + 1078 @ frame_needed = 0, uses_anonymous_args = 0 + 1079 @ link register save eliminated. + 1080 0000 5BB1 cbz r3, .L350 + 1081 0002 10B4 push {r4} + 1082 .L344: + 1083 0004 50F8044B ldr r4, [r0], #4 + ARM GAS /tmp/ccdi2JnK.s page 19 + + + 1084 .syntax unified + 1085 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1086 0008 81FA84F4 qadd r4, r4, r1 + 1087 @ 0 "" 2 + 1088 .thumb + 1089 .syntax unified + 1090 000c 013B subs r3, r3, #1 + 1091 000e 42F8044B str r4, [r2], #4 + 1092 0012 F7D1 bne .L344 + 1093 0014 5DF8044B ldr r4, [sp], #4 + 1094 0018 7047 bx lr + 1095 .L350: + 1096 001a 7047 bx lr + 1098 .section .text.arm_offset_q7,"ax",%progbits + 1099 .align 1 + 1100 .p2align 2,,3 + 1101 .global arm_offset_q7 + 1102 .syntax unified + 1103 .thumb + 1104 .thumb_func + 1105 .fpu fpv4-sp-d16 + 1107 arm_offset_q7: + 1108 @ args = 0, pretend = 0, frame = 0 + 1109 @ frame_needed = 0, uses_anonymous_args = 0 + 1110 @ link register save eliminated. + 1111 0000 53B1 cbz r3, .L352 + 1112 0002 00EB030C add ip, r0, r3 + 1113 .L354: + 1114 0006 10F9013B ldrsb r3, [r0], #1 + 1115 000a 6045 cmp r0, ip + 1116 000c 0B44 add r3, r3, r1 + 1117 .syntax unified + 1118 @ 151 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c" 1 + 1119 000e 03F30703 ssat r3, #8, r3 + 1120 @ 0 "" 2 + 1121 .thumb + 1122 .syntax unified + 1123 0012 02F8013B strb r3, [r2], #1 + 1124 0016 F6D1 bne .L354 + 1125 .L352: + 1126 0018 7047 bx lr + 1128 001a 00BF .section .text.arm_or_u16,"ax",%progbits + 1129 .align 1 + 1130 .p2align 2,,3 + 1131 .global arm_or_u16 + 1132 .syntax unified + 1133 .thumb + 1134 .thumb_func + 1135 .fpu fpv4-sp-d16 + 1137 arm_or_u16: + 1138 @ args = 0, pretend = 0, frame = 0 + 1139 @ frame_needed = 0, uses_anonymous_args = 0 + 1140 0000 CBB3 cbz r3, .L374 + 1141 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1142 0006 8D1C adds r5, r1, #2 + 1143 0008 841C adds r4, r0, #2 + 1144 000a AA42 cmp r2, r5 + ARM GAS /tmp/ccdi2JnK.s page 20 + + + 1145 000c 18BF it ne + 1146 000e A242 cmpne r2, r4 + 1147 0010 03F1FF36 add r6, r3, #-1 + 1148 0014 23D0 beq .L369 + 1149 0016 052E cmp r6, #5 + 1150 0018 21D9 bls .L369 + 1151 001a 4FEA5308 lsr r8, r3, #1 + 1152 001e 0646 mov r6, r0 + 1153 0020 0D46 mov r5, r1 + 1154 0022 1446 mov r4, r2 + 1155 0024 4FF0000E mov lr, #0 + 1156 .L360: + 1157 0028 56F804CB ldr ip, [r6], #4 @ unaligned + 1158 002c 55F8047B ldr r7, [r5], #4 @ unaligned + 1159 0030 0EF1010E add lr, lr, #1 + 1160 0034 4CEA070C orr ip, ip, r7 + 1161 0038 C645 cmp lr, r8 + 1162 003a 44F804CB str ip, [r4], #4 @ unaligned + 1163 003e F3D1 bne .L360 + 1164 0040 23F0010C bic ip, r3, #1 + 1165 0044 DB07 lsls r3, r3, #31 + 1166 0046 06D5 bpl .L357 + 1167 0048 30F81C30 ldrh r3, [r0, ip, lsl #1] + 1168 004c 31F81C10 ldrh r1, [r1, ip, lsl #1] + 1169 0050 0B43 orrs r3, r3, r1 + 1170 0052 22F81C30 strh r3, [r2, ip, lsl #1] @ movhi + 1171 .L357: + 1172 0056 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1173 .L378: + 1174 005a 0235 adds r5, r5, #2 + 1175 005c 013E subs r6, r6, #1 + 1176 .L369: + 1177 005e 34F8023C ldrh r3, [r4, #-2] + 1178 0062 35F8021C ldrh r1, [r5, #-2] + 1179 0066 0B43 orrs r3, r3, r1 + 1180 0068 22F8023B strh r3, [r2], #2 @ movhi + 1181 006c 0234 adds r4, r4, #2 + 1182 006e 002E cmp r6, #0 + 1183 0070 F3D1 bne .L378 + 1184 0072 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1185 .L374: + 1186 0076 7047 bx lr + 1188 .section .text.arm_or_u32,"ax",%progbits + 1189 .align 1 + 1190 .p2align 2,,3 + 1191 .global arm_or_u32 + 1192 .syntax unified + 1193 .thumb + 1194 .thumb_func + 1195 .fpu fpv4-sp-d16 + 1197 arm_or_u32: + 1198 @ args = 0, pretend = 0, frame = 0 + 1199 @ frame_needed = 0, uses_anonymous_args = 0 + 1200 0000 002B cmp r3, #0 + 1201 0002 4ED0 beq .L396 + 1202 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 1203 0008 9846 mov r8, r3 + ARM GAS /tmp/ccdi2JnK.s page 21 + + + 1204 000a 0D1D adds r5, r1, #4 + 1205 000c 031D adds r3, r0, #4 + 1206 000e 9A42 cmp r2, r3 + 1207 0010 18BF it ne + 1208 0012 AA42 cmpne r2, r5 + 1209 0014 14BF ite ne + 1210 0016 0126 movne r6, #1 + 1211 0018 0026 moveq r6, #0 + 1212 001a 08F1FF34 add r4, r8, #-1 + 1213 001e 062C cmp r4, #6 + 1214 0020 94BF ite ls + 1215 0022 0026 movls r6, #0 + 1216 0024 06F00106 andhi r6, r6, #1 + 1217 0028 7EB3 cbz r6, .L391 + 1218 002a 42EA0106 orr r6, r2, r1 + 1219 002e 0643 orrs r6, r6, r0 + 1220 0030 7607 lsls r6, r6, #29 + 1221 0032 2AD1 bne .L391 + 1222 0034 4FEA5809 lsr r9, r8, #1 + 1223 0038 A0F10807 sub r7, r0, #8 + 1224 003c A1F10806 sub r6, r1, #8 + 1225 0040 9446 mov ip, r2 + 1226 0042 4FF0000E mov lr, #0 + 1227 .L382: + 1228 0046 57F8085F ldr r5, [r7, #8]! + 1229 004a 56F8083F ldr r3, [r6, #8]! + 1230 004e 7C68 ldr r4, [r7, #4] + 1231 0050 1D43 orrs r5, r5, r3 + 1232 0052 7368 ldr r3, [r6, #4] + 1233 0054 CCF80050 str r5, [ip] + 1234 0058 0EF1010E add lr, lr, #1 + 1235 005c 1C43 orrs r4, r4, r3 + 1236 005e CE45 cmp lr, r9 + 1237 0060 0CF1080C add ip, ip, #8 + 1238 0064 4CF8044C str r4, [ip, #-4] + 1239 0068 EDD1 bne .L382 + 1240 006a 18F0010F tst r8, #1 + 1241 006e 28F00104 bic r4, r8, #1 + 1242 0072 06D0 beq .L379 + 1243 0074 50F82430 ldr r3, [r0, r4, lsl #2] + 1244 0078 51F82410 ldr r1, [r1, r4, lsl #2] + 1245 007c 0B43 orrs r3, r3, r1 + 1246 007e 42F82430 str r3, [r2, r4, lsl #2] + 1247 .L379: + 1248 0082 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 1249 .L400: + 1250 0086 0435 adds r5, r5, #4 + 1251 0088 013C subs r4, r4, #1 + 1252 .L391: + 1253 008a 53F8041C ldr r1, [r3, #-4] + 1254 008e 55F8040C ldr r0, [r5, #-4] + 1255 0092 0143 orrs r1, r1, r0 + 1256 0094 42F8041B str r1, [r2], #4 + 1257 0098 0433 adds r3, r3, #4 + 1258 009a 002C cmp r4, #0 + 1259 009c F3D1 bne .L400 + 1260 009e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + ARM GAS /tmp/ccdi2JnK.s page 22 + + + 1261 .L396: + 1262 00a2 7047 bx lr + 1264 .section .text.arm_or_u8,"ax",%progbits + 1265 .align 1 + 1266 .p2align 2,,3 + 1267 .global arm_or_u8 + 1268 .syntax unified + 1269 .thumb + 1270 .thumb_func + 1271 .fpu fpv4-sp-d16 + 1273 arm_or_u8: + 1274 @ args = 0, pretend = 0, frame = 0 + 1275 @ frame_needed = 0, uses_anonymous_args = 0 + 1276 0000 002B cmp r3, #0 + 1277 0002 4DD0 beq .L426 + 1278 0004 F0B5 push {r4, r5, r6, r7, lr} + 1279 0006 4D1C adds r5, r1, #1 + 1280 0008 5C1E subs r4, r3, #1 + 1281 000a 561B subs r6, r2, r5 + 1282 000c 022E cmp r6, #2 + 1283 000e 88BF it hi + 1284 0010 042C cmphi r4, #4 + 1285 0012 00F10104 add r4, r0, #1 + 1286 0016 33D9 bls .L403 + 1287 0018 161B subs r6, r2, r4 + 1288 001a 022E cmp r6, #2 + 1289 001c 30D9 bls .L403 + 1290 001e 23F00307 bic r7, r3, #3 + 1291 0022 8646 mov lr, r0 + 1292 0024 0744 add r7, r7, r0 + 1293 0026 0D46 mov r5, r1 + 1294 0028 1446 mov r4, r2 + 1295 .L404: + 1296 002a 5EF804CB ldr ip, [lr], #4 @ unaligned + 1297 002e 55F8046B ldr r6, [r5], #4 @ unaligned + 1298 0032 BE45 cmp lr, r7 + 1299 0034 4CEA060C orr ip, ip, r6 + 1300 0038 44F804CB str ip, [r4], #4 @ unaligned + 1301 003c F5D1 bne .L404 + 1302 003e 23F00304 bic r4, r3, #3 + 1303 0042 A342 cmp r3, r4 + 1304 0044 00EB040C add ip, r0, r4 + 1305 0048 01EB0407 add r7, r1, r4 + 1306 004c 02EB0406 add r6, r2, r4 + 1307 0050 A3EB0405 sub r5, r3, r4 + 1308 0054 13D0 beq .L401 + 1309 0056 035D ldrb r3, [r0, r4] @ zero_extendqisi2 + 1310 0058 095D ldrb r1, [r1, r4] @ zero_extendqisi2 + 1311 005a 012D cmp r5, #1 + 1312 005c 43EA0103 orr r3, r3, r1 + 1313 0060 1355 strb r3, [r2, r4] + 1314 0062 0CD0 beq .L401 + 1315 0064 9CF80130 ldrb r3, [ip, #1] @ zero_extendqisi2 + 1316 0068 7A78 ldrb r2, [r7, #1] @ zero_extendqisi2 + 1317 006a 022D cmp r5, #2 + 1318 006c 43EA0203 orr r3, r3, r2 + 1319 0070 7370 strb r3, [r6, #1] + ARM GAS /tmp/ccdi2JnK.s page 23 + + + 1320 0072 04D0 beq .L401 + 1321 0074 9CF80230 ldrb r3, [ip, #2] @ zero_extendqisi2 + 1322 0078 BA78 ldrb r2, [r7, #2] @ zero_extendqisi2 + 1323 007a 1343 orrs r3, r3, r2 + 1324 007c B370 strb r3, [r6, #2] + 1325 .L401: + 1326 007e F0BD pop {r4, r5, r6, r7, pc} + 1327 .L403: + 1328 0080 0344 add r3, r3, r0 + 1329 0082 00E0 b .L406 + 1330 .L430: + 1331 0084 0134 adds r4, r4, #1 + 1332 .L406: + 1333 0086 15F8010C ldrb r0, [r5, #-1] @ zero_extendqisi2 + 1334 008a 14F8011C ldrb r1, [r4, #-1] @ zero_extendqisi2 + 1335 008e 9C42 cmp r4, r3 + 1336 0090 41EA0001 orr r1, r1, r0 + 1337 0094 02F8011B strb r1, [r2], #1 + 1338 0098 05F10105 add r5, r5, #1 + 1339 009c F2D1 bne .L430 + 1340 009e F0BD pop {r4, r5, r6, r7, pc} + 1341 .L426: + 1342 00a0 7047 bx lr + 1344 00a2 00BF .section .text.arm_scale_f32,"ax",%progbits + 1345 .align 1 + 1346 .p2align 2,,3 + 1347 .global arm_scale_f32 + 1348 .syntax unified + 1349 .thumb + 1350 .thumb_func + 1351 .fpu fpv4-sp-d16 + 1353 arm_scale_f32: + 1354 @ args = 0, pretend = 0, frame = 0 + 1355 @ frame_needed = 0, uses_anonymous_args = 0 + 1356 @ link register save eliminated. + 1357 0000 3AB1 cbz r2, .L431 + 1358 .L433: + 1359 0002 F0EC017A vldmia.32 r0!, {s15} + 1360 0006 67EE807A vmul.f32 s15, s15, s0 + 1361 000a 013A subs r2, r2, #1 + 1362 000c E1EC017A vstmia.32 r1!, {s15} + 1363 0010 F7D1 bne .L433 + 1364 .L431: + 1365 0012 7047 bx lr + 1367 .section .text.arm_scale_q15,"ax",%progbits + 1368 .align 1 + 1369 .p2align 2,,3 + 1370 .global arm_scale_q15 + 1371 .syntax unified + 1372 .thumb + 1373 .thumb_func + 1374 .fpu fpv4-sp-d16 + 1376 arm_scale_q15: + 1377 @ args = 4, pretend = 0, frame = 0 + 1378 @ frame_needed = 0, uses_anonymous_args = 0 + 1379 @ link register save eliminated. + 1380 0000 10B4 push {r4} + ARM GAS /tmp/ccdi2JnK.s page 24 + + + 1381 0002 019C ldr r4, [sp, #4] + 1382 0004 7CB1 cbz r4, .L438 + 1383 0006 C2F10F02 rsb r2, r2, #15 + 1384 000a 4FFA82FC sxtb ip, r2 + 1385 .L440: + 1386 000e 30F8022B ldrh r2, [r0], #2 + 1387 0012 013C subs r4, r4, #1 + 1388 0014 12FB01F2 smulbb r2, r2, r1 + 1389 0018 42FA0CF2 asr r2, r2, ip + 1390 .syntax unified + 1391 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c" 1 + 1392 001c 02F30F02 ssat r2, #16, r2 + 1393 @ 0 "" 2 + 1394 .thumb + 1395 .syntax unified + 1396 0020 23F8022B strh r2, [r3], #2 @ movhi + 1397 0024 F3D1 bne .L440 + 1398 .L438: + 1399 0026 5DF8044B ldr r4, [sp], #4 + 1400 002a 7047 bx lr + 1402 .section .text.arm_scale_q31,"ax",%progbits + 1403 .align 1 + 1404 .p2align 2,,3 + 1405 .global arm_scale_q31 + 1406 .syntax unified + 1407 .thumb + 1408 .thumb_func + 1409 .fpu fpv4-sp-d16 + 1411 arm_scale_q31: + 1412 @ args = 4, pretend = 0, frame = 0 + 1413 @ frame_needed = 0, uses_anonymous_args = 0 + 1414 0000 0132 adds r2, r2, #1 + 1415 0002 4FFA82FC sxtb ip, r2 + 1416 0006 F0B5 push {r4, r5, r6, r7, lr} + 1417 0008 BCF1000F cmp ip, #0 + 1418 000c 059A ldr r2, [sp, #20] + 1419 000e 18DB blt .L460 + 1420 0010 8AB1 cbz r2, .L444 + 1421 0012 6FF00047 mvn r7, #-2147483648 + 1422 .L450: + 1423 0016 50F8044B ldr r4, [r0], #4 + 1424 001a 81FB044E smull r4, lr, r1, r4 + 1425 001e 0EFA0CF4 lsl r4, lr, ip + 1426 0022 44FA0CF5 asr r5, r4, ip + 1427 0026 7545 cmp r5, lr + 1428 0028 87EAEE76 eor r6, r7, lr, asr #31 + 1429 002c 04D0 beq .L448 + 1430 002e 013A subs r2, r2, #1 + 1431 0030 43F8046B str r6, [r3], #4 + 1432 0034 EFD1 bne .L450 + 1433 .L444: + 1434 0036 F0BD pop {r4, r5, r6, r7, pc} + 1435 .L448: + 1436 0038 013A subs r2, r2, #1 + 1437 003a 43F8044B str r4, [r3], #4 + 1438 003e EAD1 bne .L450 + 1439 0040 F0BD pop {r4, r5, r6, r7, pc} + ARM GAS /tmp/ccdi2JnK.s page 25 + + + 1440 .L460: + 1441 0042 CCF1000C rsb ip, ip, #0 + 1442 0046 002A cmp r2, #0 + 1443 0048 F5D0 beq .L444 + 1444 .L451: + 1445 004a 50F8044B ldr r4, [r0], #4 + 1446 004e 81FB04E4 smull lr, r4, r1, r4 + 1447 0052 44FA0CF4 asr r4, r4, ip + 1448 0056 013A subs r2, r2, #1 + 1449 0058 43F8044B str r4, [r3], #4 + 1450 005c F5D1 bne .L451 + 1451 005e F0BD pop {r4, r5, r6, r7, pc} + 1453 .section .text.arm_scale_q7,"ax",%progbits + 1454 .align 1 + 1455 .p2align 2,,3 + 1456 .global arm_scale_q7 + 1457 .syntax unified + 1458 .thumb + 1459 .thumb_func + 1460 .fpu fpv4-sp-d16 + 1462 arm_scale_q7: + 1463 @ args = 4, pretend = 0, frame = 0 + 1464 @ frame_needed = 0, uses_anonymous_args = 0 + 1465 0000 10B5 push {r4, lr} + 1466 0002 029C ldr r4, [sp, #8] + 1467 0004 8CB1 cbz r4, .L461 + 1468 0006 C2F10702 rsb r2, r2, #7 + 1469 000a 4FFA82FC sxtb ip, r2 + 1470 000e 00EB040E add lr, r0, r4 + 1471 .L463: + 1472 0012 10F9012B ldrsb r2, [r0], #1 + 1473 0016 12FB01F2 smulbb r2, r2, r1 + 1474 001a 7045 cmp r0, lr + 1475 001c 42FA0CF2 asr r2, r2, ip + 1476 .syntax unified + 1477 @ 175 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c" 1 + 1478 0020 02F30702 ssat r2, #8, r2 + 1479 @ 0 "" 2 + 1480 .thumb + 1481 .syntax unified + 1482 0024 03F8012B strb r2, [r3], #1 + 1483 0028 F3D1 bne .L463 + 1484 .L461: + 1485 002a 10BD pop {r4, pc} + 1487 .section .text.arm_shift_q15,"ax",%progbits + 1488 .align 1 + 1489 .p2align 2,,3 + 1490 .global arm_shift_q15 + 1491 .syntax unified + 1492 .thumb + 1493 .thumb_func + 1494 .fpu fpv4-sp-d16 + 1496 arm_shift_q15: + 1497 @ args = 0, pretend = 0, frame = 0 + 1498 @ frame_needed = 0, uses_anonymous_args = 0 + 1499 @ link register save eliminated. + 1500 0000 0029 cmp r1, #0 + ARM GAS /tmp/ccdi2JnK.s page 26 + + + 1501 0002 0BDB blt .L478 + 1502 0004 ABB1 cbz r3, .L467 + 1503 .L471: + 1504 0006 30F902CB ldrsh ip, [r0], #2 + 1505 000a 013B subs r3, r3, #1 + 1506 000c 0CFA01FC lsl ip, ip, r1 + 1507 .syntax unified + 1508 @ 226 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c" 1 + 1509 0010 0CF30F0C ssat ip, #16, ip + 1510 @ 0 "" 2 + 1511 .thumb + 1512 .syntax unified + 1513 0014 22F802CB strh ip, [r2], #2 @ movhi + 1514 0018 F5D1 bne .L471 + 1515 001a 7047 bx lr + 1516 .L478: + 1517 001c C1F1000C rsb ip, r1, #0 + 1518 0020 43B1 cbz r3, .L479 + 1519 .L472: + 1520 0022 30F9021B ldrsh r1, [r0], #2 + 1521 0026 013B subs r3, r3, #1 + 1522 0028 41FA0CF1 asr r1, r1, ip + 1523 002c 22F8021B strh r1, [r2], #2 @ movhi + 1524 0030 F7D1 bne .L472 + 1525 .L467: + 1526 0032 7047 bx lr + 1527 .L479: + 1528 0034 7047 bx lr + 1530 0036 00BF .section .text.arm_shift_q31,"ax",%progbits + 1531 .align 1 + 1532 .p2align 2,,3 + 1533 .global arm_shift_q31 + 1534 .syntax unified + 1535 .thumb + 1536 .thumb_func + 1537 .fpu fpv4-sp-d16 + 1539 arm_shift_q31: + 1540 @ args = 0, pretend = 0, frame = 0 + 1541 @ frame_needed = 0, uses_anonymous_args = 0 + 1542 0000 0029 cmp r1, #0 + 1543 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1544 0006 26DB blt .L496 + 1545 0008 EBB1 cbz r3, .L480 + 1546 000a A2F1040C sub ip, r2, #4 + 1547 000e A1F12008 sub r8, r1, #32 + 1548 0012 C1F12007 rsb r7, r1, #32 + 1549 0016 6FF00046 mvn r6, #-2147483648 + 1550 .L486: + 1551 001a 50F8044B ldr r4, [r0], #4 + 1552 001e E217 asrs r2, r4, #31 + 1553 0020 04FA08FE lsl lr, r4, r8 + 1554 0024 8A40 lsls r2, r2, r1 + 1555 0026 42EA0E02 orr r2, r2, lr + 1556 002a 24FA07FE lsr lr, r4, r7 + 1557 002e 42EA0E02 orr r2, r2, lr + 1558 0032 8C40 lsls r4, r4, r1 + 1559 0034 B2EBE47F cmp r2, r4, asr #31 + ARM GAS /tmp/ccdi2JnK.s page 27 + + + 1560 0038 86EAE275 eor r5, r6, r2, asr #31 + 1561 003c 05D0 beq .L484 + 1562 003e 013B subs r3, r3, #1 + 1563 0040 4CF8045F str r5, [ip, #4]! + 1564 0044 E9D1 bne .L486 + 1565 .L480: + 1566 0046 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1567 .L484: + 1568 004a 013B subs r3, r3, #1 + 1569 004c 4CF8044F str r4, [ip, #4]! + 1570 0050 E3D1 bne .L486 + 1571 0052 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1572 .L496: + 1573 0056 4942 rsbs r1, r1, #0 + 1574 0058 002B cmp r3, #0 + 1575 005a F4D0 beq .L480 + 1576 .L487: + 1577 005c 50F8044B ldr r4, [r0], #4 + 1578 0060 013B subs r3, r3, #1 + 1579 0062 44FA01F4 asr r4, r4, r1 + 1580 0066 42F8044B str r4, [r2], #4 + 1581 006a F7D1 bne .L487 + 1582 006c BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1584 .section .text.arm_shift_q7,"ax",%progbits + 1585 .align 1 + 1586 .p2align 2,,3 + 1587 .global arm_shift_q7 + 1588 .syntax unified + 1589 .thumb + 1590 .thumb_func + 1591 .fpu fpv4-sp-d16 + 1593 arm_shift_q7: + 1594 @ args = 0, pretend = 0, frame = 0 + 1595 @ frame_needed = 0, uses_anonymous_args = 0 + 1596 @ link register save eliminated. + 1597 0000 0029 cmp r1, #0 + 1598 0002 0DDB blt .L508 + 1599 0004 BBB1 cbz r3, .L497 + 1600 0006 00EB030C add ip, r0, r3 + 1601 .L501: + 1602 000a 10F9013B ldrsb r3, [r0], #1 + 1603 000e 8445 cmp ip, r0 + 1604 0010 03FA01F3 lsl r3, r3, r1 + 1605 .syntax unified + 1606 @ 200 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c" 1 + 1607 0014 03F30703 ssat r3, #8, r3 + 1608 @ 0 "" 2 + 1609 .thumb + 1610 .syntax unified + 1611 0018 02F8013B strb r3, [r2], #1 + 1612 001c F5D1 bne .L501 + 1613 001e 7047 bx lr + 1614 .L508: + 1615 0020 53B1 cbz r3, .L509 + 1616 0022 4942 rsbs r1, r1, #0 + 1617 0024 00EB030C add ip, r0, r3 + 1618 .L502: + ARM GAS /tmp/ccdi2JnK.s page 28 + + + 1619 0028 10F9013B ldrsb r3, [r0], #1 + 1620 002c 0B41 asrs r3, r3, r1 + 1621 002e 6045 cmp r0, ip + 1622 0030 02F8013B strb r3, [r2], #1 + 1623 0034 F8D1 bne .L502 + 1624 .L497: + 1625 0036 7047 bx lr + 1626 .L509: + 1627 0038 7047 bx lr + 1629 003a 00BF .section .text.arm_sub_f32,"ax",%progbits + 1630 .align 1 + 1631 .p2align 2,,3 + 1632 .global arm_sub_f32 + 1633 .syntax unified + 1634 .thumb + 1635 .thumb_func + 1636 .fpu fpv4-sp-d16 + 1638 arm_sub_f32: + 1639 @ args = 0, pretend = 0, frame = 0 + 1640 @ frame_needed = 0, uses_anonymous_args = 0 + 1641 @ link register save eliminated. + 1642 0000 4BB1 cbz r3, .L510 + 1643 .L512: + 1644 0002 F0EC017A vldmia.32 r0!, {s15} + 1645 0006 B1EC017A vldmia.32 r1!, {s14} + 1646 000a 77EEC77A vsub.f32 s15, s15, s14 + 1647 000e 013B subs r3, r3, #1 + 1648 0010 E2EC017A vstmia.32 r2!, {s15} + 1649 0014 F5D1 bne .L512 + 1650 .L510: + 1651 0016 7047 bx lr + 1653 .section .text.arm_sub_q15,"ax",%progbits + 1654 .align 1 + 1655 .p2align 2,,3 + 1656 .global arm_sub_q15 + 1657 .syntax unified + 1658 .thumb + 1659 .thumb_func + 1660 .fpu fpv4-sp-d16 + 1662 arm_sub_q15: + 1663 @ args = 0, pretend = 0, frame = 0 + 1664 @ frame_needed = 0, uses_anonymous_args = 0 + 1665 0000 63B1 cbz r3, .L525 + 1666 0002 00B5 push {lr} + 1667 .L519: + 1668 0004 30F902CB ldrsh ip, [r0], #2 + 1669 0008 31F902EB ldrsh lr, [r1], #2 + 1670 .syntax unified + 1671 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1672 000c DCFA1EFC qsub16 ip, ip, lr + 1673 @ 0 "" 2 + 1674 .thumb + 1675 .syntax unified + 1676 0010 013B subs r3, r3, #1 + 1677 0012 22F802CB strh ip, [r2], #2 @ movhi + 1678 0016 F5D1 bne .L519 + 1679 0018 5DF804FB ldr pc, [sp], #4 + ARM GAS /tmp/ccdi2JnK.s page 29 + + + 1680 .L525: + 1681 001c 7047 bx lr + 1683 001e 00BF .section .text.arm_sub_q31,"ax",%progbits + 1684 .align 1 + 1685 .p2align 2,,3 + 1686 .global arm_sub_q31 + 1687 .syntax unified + 1688 .thumb + 1689 .thumb_func + 1690 .fpu fpv4-sp-d16 + 1692 arm_sub_q31: + 1693 @ args = 0, pretend = 0, frame = 0 + 1694 @ frame_needed = 0, uses_anonymous_args = 0 + 1695 @ link register save eliminated. + 1696 0000 63B1 cbz r3, .L535 + 1697 0002 30B4 push {r4, r5} + 1698 .L529: + 1699 0004 50F8044B ldr r4, [r0], #4 + 1700 0008 51F8045B ldr r5, [r1], #4 + 1701 .syntax unified + 1702 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1703 000c 85FAA4F4 qsub r4, r4, r5 + 1704 @ 0 "" 2 + 1705 .thumb + 1706 .syntax unified + 1707 0010 013B subs r3, r3, #1 + 1708 0012 42F8044B str r4, [r2], #4 + 1709 0016 F5D1 bne .L529 + 1710 0018 30BC pop {r4, r5} + 1711 001a 7047 bx lr + 1712 .L535: + 1713 001c 7047 bx lr + 1715 001e 00BF .section .text.arm_sub_q7,"ax",%progbits + 1716 .align 1 + 1717 .p2align 2,,3 + 1718 .global arm_sub_q7 + 1719 .syntax unified + 1720 .thumb + 1721 .thumb_func + 1722 .fpu fpv4-sp-d16 + 1724 arm_sub_q7: + 1725 @ args = 0, pretend = 0, frame = 0 + 1726 @ frame_needed = 0, uses_anonymous_args = 0 + 1727 0000 83B1 cbz r3, .L545 + 1728 0002 00B5 push {lr} + 1729 0004 00EB030E add lr, r0, r3 + 1730 .L539: + 1731 0008 10F9013B ldrsb r3, [r0], #1 + 1732 000c 11F901CB ldrsb ip, [r1], #1 + 1733 0010 8645 cmp lr, r0 + 1734 0012 A3EB0C03 sub r3, r3, ip + 1735 .syntax unified + 1736 @ 147 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c" 1 + 1737 0016 03F30703 ssat r3, #8, r3 + 1738 @ 0 "" 2 + 1739 .thumb + 1740 .syntax unified + ARM GAS /tmp/ccdi2JnK.s page 30 + + + 1741 001a 02F8013B strb r3, [r2], #1 + 1742 001e F3D1 bne .L539 + 1743 0020 5DF804FB ldr pc, [sp], #4 + 1744 .L545: + 1745 0024 7047 bx lr + 1747 0026 00BF .section .text.arm_xor_u16,"ax",%progbits + 1748 .align 1 + 1749 .p2align 2,,3 + 1750 .global arm_xor_u16 + 1751 .syntax unified + 1752 .thumb + 1753 .thumb_func + 1754 .fpu fpv4-sp-d16 + 1756 arm_xor_u16: + 1757 @ args = 0, pretend = 0, frame = 0 + 1758 @ frame_needed = 0, uses_anonymous_args = 0 + 1759 0000 CBB3 cbz r3, .L565 + 1760 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1761 0006 8D1C adds r5, r1, #2 + 1762 0008 841C adds r4, r0, #2 + 1763 000a AA42 cmp r2, r5 + 1764 000c 18BF it ne + 1765 000e A242 cmpne r2, r4 + 1766 0010 03F1FF36 add r6, r3, #-1 + 1767 0014 23D0 beq .L560 + 1768 0016 052E cmp r6, #5 + 1769 0018 21D9 bls .L560 + 1770 001a 4FEA5308 lsr r8, r3, #1 + 1771 001e 0646 mov r6, r0 + 1772 0020 0D46 mov r5, r1 + 1773 0022 1446 mov r4, r2 + 1774 0024 4FF0000E mov lr, #0 + 1775 .L551: + 1776 0028 56F804CB ldr ip, [r6], #4 @ unaligned + 1777 002c 55F8047B ldr r7, [r5], #4 @ unaligned + 1778 0030 0EF1010E add lr, lr, #1 + 1779 0034 8CEA070C eor ip, ip, r7 + 1780 0038 C645 cmp lr, r8 + 1781 003a 44F804CB str ip, [r4], #4 @ unaligned + 1782 003e F3D1 bne .L551 + 1783 0040 23F0010C bic ip, r3, #1 + 1784 0044 DB07 lsls r3, r3, #31 + 1785 0046 06D5 bpl .L548 + 1786 0048 30F81C30 ldrh r3, [r0, ip, lsl #1] + 1787 004c 31F81C10 ldrh r1, [r1, ip, lsl #1] + 1788 0050 4B40 eors r3, r3, r1 + 1789 0052 22F81C30 strh r3, [r2, ip, lsl #1] @ movhi + 1790 .L548: + 1791 0056 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1792 .L569: + 1793 005a 0235 adds r5, r5, #2 + 1794 005c 013E subs r6, r6, #1 + 1795 .L560: + 1796 005e 34F8023C ldrh r3, [r4, #-2] + 1797 0062 35F8021C ldrh r1, [r5, #-2] + 1798 0066 4B40 eors r3, r3, r1 + 1799 0068 22F8023B strh r3, [r2], #2 @ movhi + ARM GAS /tmp/ccdi2JnK.s page 31 + + + 1800 006c 0234 adds r4, r4, #2 + 1801 006e 002E cmp r6, #0 + 1802 0070 F3D1 bne .L569 + 1803 0072 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1804 .L565: + 1805 0076 7047 bx lr + 1807 .section .text.arm_xor_u32,"ax",%progbits + 1808 .align 1 + 1809 .p2align 2,,3 + 1810 .global arm_xor_u32 + 1811 .syntax unified + 1812 .thumb + 1813 .thumb_func + 1814 .fpu fpv4-sp-d16 + 1816 arm_xor_u32: + 1817 @ args = 0, pretend = 0, frame = 0 + 1818 @ frame_needed = 0, uses_anonymous_args = 0 + 1819 0000 002B cmp r3, #0 + 1820 0002 4ED0 beq .L587 + 1821 0004 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 1822 0008 9846 mov r8, r3 + 1823 000a 0D1D adds r5, r1, #4 + 1824 000c 031D adds r3, r0, #4 + 1825 000e 9A42 cmp r2, r3 + 1826 0010 18BF it ne + 1827 0012 AA42 cmpne r2, r5 + 1828 0014 14BF ite ne + 1829 0016 0126 movne r6, #1 + 1830 0018 0026 moveq r6, #0 + 1831 001a 08F1FF34 add r4, r8, #-1 + 1832 001e 062C cmp r4, #6 + 1833 0020 94BF ite ls + 1834 0022 0026 movls r6, #0 + 1835 0024 06F00106 andhi r6, r6, #1 + 1836 0028 7EB3 cbz r6, .L582 + 1837 002a 42EA0106 orr r6, r2, r1 + 1838 002e 0643 orrs r6, r6, r0 + 1839 0030 7607 lsls r6, r6, #29 + 1840 0032 2AD1 bne .L582 + 1841 0034 4FEA5809 lsr r9, r8, #1 + 1842 0038 A0F10807 sub r7, r0, #8 + 1843 003c A1F10806 sub r6, r1, #8 + 1844 0040 9446 mov ip, r2 + 1845 0042 4FF0000E mov lr, #0 + 1846 .L573: + 1847 0046 57F8085F ldr r5, [r7, #8]! + 1848 004a 56F8083F ldr r3, [r6, #8]! + 1849 004e 7C68 ldr r4, [r7, #4] + 1850 0050 5D40 eors r5, r5, r3 + 1851 0052 7368 ldr r3, [r6, #4] + 1852 0054 CCF80050 str r5, [ip] + 1853 0058 0EF1010E add lr, lr, #1 + 1854 005c 5C40 eors r4, r4, r3 + 1855 005e CE45 cmp lr, r9 + 1856 0060 0CF1080C add ip, ip, #8 + 1857 0064 4CF8044C str r4, [ip, #-4] + 1858 0068 EDD1 bne .L573 + ARM GAS /tmp/ccdi2JnK.s page 32 + + + 1859 006a 18F0010F tst r8, #1 + 1860 006e 28F00104 bic r4, r8, #1 + 1861 0072 06D0 beq .L570 + 1862 0074 50F82430 ldr r3, [r0, r4, lsl #2] + 1863 0078 51F82410 ldr r1, [r1, r4, lsl #2] + 1864 007c 4B40 eors r3, r3, r1 + 1865 007e 42F82430 str r3, [r2, r4, lsl #2] + 1866 .L570: + 1867 0082 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 1868 .L591: + 1869 0086 0435 adds r5, r5, #4 + 1870 0088 013C subs r4, r4, #1 + 1871 .L582: + 1872 008a 53F8041C ldr r1, [r3, #-4] + 1873 008e 55F8040C ldr r0, [r5, #-4] + 1874 0092 4140 eors r1, r1, r0 + 1875 0094 42F8041B str r1, [r2], #4 + 1876 0098 0433 adds r3, r3, #4 + 1877 009a 002C cmp r4, #0 + 1878 009c F3D1 bne .L591 + 1879 009e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 1880 .L587: + 1881 00a2 7047 bx lr + 1883 .section .text.arm_xor_u8,"ax",%progbits + 1884 .align 1 + 1885 .p2align 2,,3 + 1886 .global arm_xor_u8 + 1887 .syntax unified + 1888 .thumb + 1889 .thumb_func + 1890 .fpu fpv4-sp-d16 + 1892 arm_xor_u8: + 1893 @ args = 0, pretend = 0, frame = 0 + 1894 @ frame_needed = 0, uses_anonymous_args = 0 + 1895 0000 002B cmp r3, #0 + 1896 0002 4DD0 beq .L617 + 1897 0004 F0B5 push {r4, r5, r6, r7, lr} + 1898 0006 4D1C adds r5, r1, #1 + 1899 0008 5C1E subs r4, r3, #1 + 1900 000a 561B subs r6, r2, r5 + 1901 000c 022E cmp r6, #2 + 1902 000e 88BF it hi + 1903 0010 042C cmphi r4, #4 + 1904 0012 00F10104 add r4, r0, #1 + 1905 0016 33D9 bls .L594 + 1906 0018 161B subs r6, r2, r4 + 1907 001a 022E cmp r6, #2 + 1908 001c 30D9 bls .L594 + 1909 001e 23F00307 bic r7, r3, #3 + 1910 0022 8646 mov lr, r0 + 1911 0024 0744 add r7, r7, r0 + 1912 0026 0D46 mov r5, r1 + 1913 0028 1446 mov r4, r2 + 1914 .L595: + 1915 002a 5EF804CB ldr ip, [lr], #4 @ unaligned + 1916 002e 55F8046B ldr r6, [r5], #4 @ unaligned + 1917 0032 BE45 cmp lr, r7 + ARM GAS /tmp/ccdi2JnK.s page 33 + + + 1918 0034 8CEA060C eor ip, ip, r6 + 1919 0038 44F804CB str ip, [r4], #4 @ unaligned + 1920 003c F5D1 bne .L595 + 1921 003e 23F00304 bic r4, r3, #3 + 1922 0042 A342 cmp r3, r4 + 1923 0044 00EB040C add ip, r0, r4 + 1924 0048 01EB0407 add r7, r1, r4 + 1925 004c 02EB0406 add r6, r2, r4 + 1926 0050 A3EB0405 sub r5, r3, r4 + 1927 0054 13D0 beq .L592 + 1928 0056 035D ldrb r3, [r0, r4] @ zero_extendqisi2 + 1929 0058 095D ldrb r1, [r1, r4] @ zero_extendqisi2 + 1930 005a 012D cmp r5, #1 + 1931 005c 83EA0103 eor r3, r3, r1 + 1932 0060 1355 strb r3, [r2, r4] + 1933 0062 0CD0 beq .L592 + 1934 0064 9CF80130 ldrb r3, [ip, #1] @ zero_extendqisi2 + 1935 0068 7A78 ldrb r2, [r7, #1] @ zero_extendqisi2 + 1936 006a 022D cmp r5, #2 + 1937 006c 83EA0203 eor r3, r3, r2 + 1938 0070 7370 strb r3, [r6, #1] + 1939 0072 04D0 beq .L592 + 1940 0074 9CF80230 ldrb r3, [ip, #2] @ zero_extendqisi2 + 1941 0078 BA78 ldrb r2, [r7, #2] @ zero_extendqisi2 + 1942 007a 5340 eors r3, r3, r2 + 1943 007c B370 strb r3, [r6, #2] + 1944 .L592: + 1945 007e F0BD pop {r4, r5, r6, r7, pc} + 1946 .L594: + 1947 0080 0344 add r3, r3, r0 + 1948 0082 00E0 b .L597 + 1949 .L621: + 1950 0084 0134 adds r4, r4, #1 + 1951 .L597: + 1952 0086 15F8010C ldrb r0, [r5, #-1] @ zero_extendqisi2 + 1953 008a 14F8011C ldrb r1, [r4, #-1] @ zero_extendqisi2 + 1954 008e 9C42 cmp r4, r3 + 1955 0090 81EA0001 eor r1, r1, r0 + 1956 0094 02F8011B strb r1, [r2], #1 + 1957 0098 05F10105 add r5, r5, #1 + 1958 009c F2D1 bne .L621 + 1959 009e F0BD pop {r4, r5, r6, r7, pc} + 1960 .L617: + 1961 00a0 7047 bx lr + 1963 00a2 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 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Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: diff --git a/codice/build/BayesFunctions.lst b/codice/build/BayesFunctions.lst new file mode 100644 index 0000000..e1cbc8c --- /dev/null +++ b/codice/build/BayesFunctions.lst @@ -0,0 +1,119 @@ +ARM GAS /tmp/cc88Y0tL.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "BayesFunctions.c" + 14 .text + 15 .section .text.arm_gaussian_naive_bayes_predict_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_gaussian_naive_bayes_predict_f32 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_gaussian_naive_bayes_predict_f32: + 26 @ args = 0, pretend = 0, frame = 24 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 29 0004 2DED068B vpush.64 {d8, d9, d10} + 30 0008 87B0 sub sp, sp, #28 + 31 000a CDE90212 strd r1, r2, [sp, #8] + 32 000e 4168 ldr r1, [r0, #4] + 33 0010 0369 ldr r3, [r0, #16] + 34 0012 8568 ldr r5, [r0, #8] + 35 0014 C668 ldr r6, [r0, #12] + 36 0016 0193 str r3, [sp, #4] + 37 0018 0029 cmp r1, #0 + 38 001a 48D0 beq .L3 + 39 001c DFED29AA vldr.32 s21, .L11 + 40 0020 DFED299A vldr.32 s19, .L11+4 + 41 0024 8346 mov fp, r0 + 42 0026 9146 mov r9, r2 + 43 0028 BEEE00AA vmov.f32 s20, #-5.0e-1 + 44 002c 0027 movs r7, #0 + 45 .L2: + 46 002e DBF80030 ldr r3, [fp] + 47 0032 F0EE6A8A vmov.f32 s17, s21 + 48 0036 5BB3 cbz r3, .L6 + 49 0038 9FED249A vldr.32 s18, .L11+8 + 50 003c DDF808A0 ldr r10, [sp, #8] + 51 0040 B046 mov r8, r6 + 52 0042 F0EE498A vmov.f32 s17, s18 + 53 0046 0024 movs r4, #0 + 54 .L4: + 55 0048 B8EC018A vldmia.32 r8!, {s16} + 56 004c DBED057A vldr.32 s15, [fp, #20] + 57 0050 38EE278A vadd.f32 s16, s16, s15 + 58 0054 0134 adds r4, r4, #1 + ARM GAS /tmp/cc88Y0tL.s page 2 + + + 59 0056 28EE290A vmul.f32 s0, s16, s19 + 60 005a FFF7FEFF bl logf + 61 005e B5EC017A vldmia.32 r5!, {s14} + 62 0062 FAEC017A vldmia.32 r10!, {s15} + 63 0066 DBF80020 ldr r2, [fp] + 64 006a 77EEC77A vsub.f32 s15, s15, s14 + 65 006e A242 cmp r2, r4 + 66 0070 67EEA77A vmul.f32 s15, s15, s15 + 67 0074 78EE808A vadd.f32 s17, s17, s0 + 68 0078 87EE887A vdiv.f32 s14, s15, s16 + 69 007c 4646 mov r6, r8 + 70 007e 39EE079A vadd.f32 s18, s18, s14 + 71 0082 E1D8 bhi .L4 + 72 0084 68EE8A8A vmul.f32 s17, s17, s20 + 73 0088 F6EE007A vmov.f32 s15, #5.0e-1 + 74 008c E9EE678A vfms.f32 s17, s18, s15 + 75 .L6: + 76 0090 019B ldr r3, [sp, #4] + 77 0092 B3EC010A vldmia.32 r3!, {s0} + 78 0096 0193 str r3, [sp, #4] + 79 0098 FFF7FEFF bl logf + 80 009c DBF80410 ldr r1, [fp, #4] + 81 00a0 30EE280A vadd.f32 s0, s0, s17 + 82 00a4 0137 adds r7, r7, #1 + 83 00a6 B942 cmp r1, r7 + 84 00a8 A9EC010A vstmia.32 r9!, {s0} + 85 00ac BFD8 bhi .L2 + 86 .L3: + 87 00ae 0398 ldr r0, [sp, #12] + 88 00b0 05AB add r3, sp, #20 + 89 00b2 04AA add r2, sp, #16 + 90 00b4 FFF7FEFF bl arm_max_f32 + 91 00b8 0598 ldr r0, [sp, #20] + 92 00ba 07B0 add sp, sp, #28 + 93 @ sp needed + 94 00bc BDEC068B vldm sp!, {d8-d10} + 95 00c0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 96 .L12: + 97 .align 2 + 98 .L11: + 99 00c4 00000080 .word -2147483648 + 100 00c8 DB0FC940 .word 1086918619 + 101 00cc 00000000 .word 0 + 103 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/cc88Y0tL.s page 3 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 BayesFunctions.c + /tmp/cc88Y0tL.s:16 .text.arm_gaussian_naive_bayes_predict_f32:0000000000000000 $t + /tmp/cc88Y0tL.s:25 .text.arm_gaussian_naive_bayes_predict_f32:0000000000000000 arm_gaussian_naive_bayes_predict_f32 + /tmp/cc88Y0tL.s:99 .text.arm_gaussian_naive_bayes_predict_f32:00000000000000c4 $d + +UNDEFINED SYMBOLS +logf +arm_max_f32 diff --git a/codice/build/BayesFunctions.o b/codice/build/BayesFunctions.o new file mode 100644 index 0000000000000000000000000000000000000000..422f9ed9ab1d6695dc58ed7d8a9994480027ac9c GIT binary patch literal 1232 zcma)5L1+_E5S^dhByFl#gT-n^q6CtFS(3EcS`^xpt_oJcqdkO8vP~jQTC!VhbFm;& z*$N`PlzLD^5bLE-1wB+RqIeK`ECdm67LrfAXz^g3+3dEl2zFrp%)EJj{`^0?HwQ1u zj4`lA+L?soQlmd!!v{OXr#Xc2Yc zmV94+!(kBuz!?2w4xv15kp*=QZ;#^kkWHw1x-qUUk860lwv-S zQ6@AkrxX$eC3js-B#D_AFRJNWN>7Y*#$a?TGh#CH%A^SZT*dmH7Jzxnz972?7fGAS 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Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_const_structs.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/CommonTables/arm_common_tables.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/CommonTables/arm_const_structs.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_const_structs.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c: diff --git a/codice/build/CommonTables.lst b/codice/build/CommonTables.lst new file mode 100644 index 0000000..5f3c992 --- /dev/null +++ b/codice/build/CommonTables.lst @@ -0,0 +1,290722 @@ +ARM GAS /tmp/ccLcDeJO.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "CommonTables.c" + 14 .text + 15 .global arm_rfft_sR_q15_len8192 + 16 .global arm_rfft_sR_q15_len4096 + 17 .global arm_rfft_sR_q15_len2048 + 18 .global arm_rfft_sR_q15_len1024 + 19 .global arm_rfft_sR_q15_len512 + 20 .global arm_rfft_sR_q15_len256 + 21 .global arm_rfft_sR_q15_len128 + 22 .global arm_rfft_sR_q15_len64 + 23 .global arm_rfft_sR_q15_len32 + 24 .global arm_rfft_sR_q31_len8192 + 25 .global arm_rfft_sR_q31_len4096 + 26 .global arm_rfft_sR_q31_len2048 + 27 .global arm_rfft_sR_q31_len1024 + 28 .global arm_rfft_sR_q31_len512 + 29 .global arm_rfft_sR_q31_len256 + 30 .global arm_rfft_sR_q31_len128 + 31 .global arm_rfft_sR_q31_len64 + 32 .global arm_rfft_sR_q31_len32 + 33 .global arm_rfft_fast_sR_f32_len4096 + 34 .global arm_rfft_fast_sR_f32_len2048 + 35 .global arm_rfft_fast_sR_f32_len1024 + 36 .global arm_rfft_fast_sR_f32_len512 + 37 .global arm_rfft_fast_sR_f32_len256 + 38 .global arm_rfft_fast_sR_f32_len128 + 39 .global arm_rfft_fast_sR_f32_len64 + 40 .global arm_rfft_fast_sR_f32_len32 + 41 .global arm_rfft_fast_sR_f64_len4096 + 42 .global arm_rfft_fast_sR_f64_len2048 + 43 .global arm_rfft_fast_sR_f64_len1024 + 44 .global arm_rfft_fast_sR_f64_len512 + 45 .global arm_rfft_fast_sR_f64_len256 + 46 .global arm_rfft_fast_sR_f64_len128 + 47 .global arm_rfft_fast_sR_f64_len64 + 48 .global arm_rfft_fast_sR_f64_len32 + 49 .global arm_cfft_sR_q15_len4096 + 50 .global arm_cfft_sR_q15_len2048 + 51 .global arm_cfft_sR_q15_len1024 + 52 .global arm_cfft_sR_q15_len512 + 53 .global arm_cfft_sR_q15_len256 + 54 .global arm_cfft_sR_q15_len128 + 55 .global arm_cfft_sR_q15_len64 + 56 .global arm_cfft_sR_q15_len32 + 57 .global arm_cfft_sR_q15_len16 + ARM GAS /tmp/ccLcDeJO.s page 2 + + + 58 .global arm_cfft_sR_q31_len4096 + 59 .global arm_cfft_sR_q31_len2048 + 60 .global arm_cfft_sR_q31_len1024 + 61 .global arm_cfft_sR_q31_len512 + 62 .global arm_cfft_sR_q31_len256 + 63 .global arm_cfft_sR_q31_len128 + 64 .global arm_cfft_sR_q31_len64 + 65 .global arm_cfft_sR_q31_len32 + 66 .global arm_cfft_sR_q31_len16 + 67 .global arm_cfft_sR_f32_len4096 + 68 .global arm_cfft_sR_f32_len2048 + 69 .global arm_cfft_sR_f32_len1024 + 70 .global arm_cfft_sR_f32_len512 + 71 .global arm_cfft_sR_f32_len256 + 72 .global arm_cfft_sR_f32_len128 + 73 .global arm_cfft_sR_f32_len64 + 74 .global arm_cfft_sR_f32_len32 + 75 .global arm_cfft_sR_f32_len16 + 76 .global arm_cfft_sR_f64_len4096 + 77 .global arm_cfft_sR_f64_len2048 + 78 .global arm_cfft_sR_f64_len1024 + 79 .global arm_cfft_sR_f64_len512 + 80 .global arm_cfft_sR_f64_len256 + 81 .global arm_cfft_sR_f64_len128 + 82 .global arm_cfft_sR_f64_len64 + 83 .global arm_cfft_sR_f64_len32 + 84 .global arm_cfft_sR_f64_len16 + 85 .global sinTable_q15 + 86 .global sinTable_q31 + 87 .global sinTable_f32 + 88 .global armRecipTableQ31 + 89 .global armRecipTableQ15 + 90 .global cos_factorsQ31_8192 + 91 .global WeightsQ31_8192 + 92 .global cos_factorsQ31_2048 + 93 .global WeightsQ31_2048 + 94 .global cos_factorsQ31_512 + 95 .global WeightsQ31_512 + 96 .global cos_factorsQ31_128 + 97 .global WeightsQ31_128 + 98 .global cos_factorsQ15_8192 + 99 .global WeightsQ15_8192 + 100 .global cos_factorsQ15_2048 + 101 .global WeightsQ15_2048 + 102 .global cos_factorsQ15_512 + 103 .global WeightsQ15_512 + 104 .global cos_factorsQ15_128 + 105 .global WeightsQ15_128 + 106 .global cos_factors_8192 + 107 .global Weights_8192 + 108 .global cos_factors_2048 + 109 .global Weights_2048 + 110 .global cos_factors_512 + 111 .global Weights_512 + 112 .global cos_factors_128 + 113 .global Weights_128 + 114 .global realCoefBQ15 + ARM GAS /tmp/ccLcDeJO.s page 3 + + + 115 .global realCoefAQ15 + 116 .global realCoefBQ31 + 117 .global realCoefAQ31 + 118 .global realCoefB + 119 .global realCoefA + 120 .global twiddleCoef_rfft_4096 + 121 .global twiddleCoef_rfft_2048 + 122 .global twiddleCoef_rfft_1024 + 123 .global twiddleCoef_rfft_512 + 124 .global twiddleCoef_rfft_256 + 125 .global twiddleCoef_rfft_128 + 126 .global twiddleCoef_rfft_64 + 127 .global twiddleCoef_rfft_32 + 128 .global twiddleCoefF64_rfft_4096 + 129 .global twiddleCoefF64_rfft_2048 + 130 .global twiddleCoefF64_rfft_1024 + 131 .global twiddleCoefF64_rfft_512 + 132 .global twiddleCoefF64_rfft_256 + 133 .global twiddleCoefF64_rfft_128 + 134 .global twiddleCoefF64_rfft_64 + 135 .global twiddleCoefF64_rfft_32 + 136 .global armBitRevIndexTable_fixed_4096 + 137 .global armBitRevIndexTable_fixed_2048 + 138 .global armBitRevIndexTable_fixed_1024 + 139 .global armBitRevIndexTable_fixed_512 + 140 .global armBitRevIndexTable_fixed_256 + 141 .global armBitRevIndexTable_fixed_128 + 142 .global armBitRevIndexTable_fixed_64 + 143 .global armBitRevIndexTable_fixed_32 + 144 .global armBitRevIndexTable_fixed_16 + 145 .global armBitRevIndexTable4096 + 146 .global armBitRevIndexTable2048 + 147 .global armBitRevIndexTable1024 + 148 .global armBitRevIndexTable512 + 149 .global armBitRevIndexTable256 + 150 .global armBitRevIndexTable128 + 151 .global armBitRevIndexTable64 + 152 .global armBitRevIndexTable32 + 153 .global armBitRevIndexTable16 + 154 .global armBitRevIndexTableF64_4096 + 155 .global armBitRevIndexTableF64_2048 + 156 .global armBitRevIndexTableF64_1024 + 157 .global armBitRevIndexTableF64_512 + 158 .global armBitRevIndexTableF64_256 + 159 .global armBitRevIndexTableF64_128 + 160 .global armBitRevIndexTableF64_64 + 161 .global armBitRevIndexTableF64_32 + 162 .global armBitRevIndexTableF64_16 + 163 .global twiddleCoef_4096_q15 + 164 .global twiddleCoef_2048_q15 + 165 .global twiddleCoef_1024_q15 + 166 .global twiddleCoef_512_q15 + 167 .global twiddleCoef_256_q15 + 168 .global twiddleCoef_128_q15 + 169 .global twiddleCoef_64_q15 + 170 .global twiddleCoef_32_q15 + 171 .global twiddleCoef_16_q15 + ARM GAS /tmp/ccLcDeJO.s page 4 + + + 172 .global twiddleCoef_4096_q31 + 173 .global twiddleCoef_2048_q31 + 174 .global twiddleCoef_1024_q31 + 175 .global twiddleCoef_512_q31 + 176 .global twiddleCoef_256_q31 + 177 .global twiddleCoef_128_q31 + 178 .global twiddleCoef_64_q31 + 179 .global twiddleCoef_32_q31 + 180 .global twiddleCoef_16_q31 + 181 .global twiddleCoef_4096 + 182 .global twiddleCoef_2048 + 183 .global twiddleCoef_1024 + 184 .global twiddleCoef_512 + 185 .global twiddleCoef_256 + 186 .global twiddleCoef_128 + 187 .global twiddleCoef_64 + 188 .global twiddleCoef_32 + 189 .global twiddleCoef_16 + 190 .global twiddleCoefF64_4096 + 191 .global twiddleCoefF64_2048 + 192 .global twiddleCoefF64_1024 + 193 .global twiddleCoefF64_512 + 194 .global twiddleCoefF64_256 + 195 .global twiddleCoefF64_128 + 196 .global twiddleCoefF64_64 + 197 .global twiddleCoefF64_32 + 198 .global twiddleCoefF64_16 + 199 .global armBitRevTable + 200 .section .rodata.WeightsQ15_128,"a" + 201 .align 2 + 204 WeightsQ15_128: + 205 0000 FF7F .short 32767 + 206 0002 0000 .short 0 + 207 0004 FD7F .short 32765 + 208 0006 6EFE .short -402 + 209 0008 F67F .short 32758 + 210 000a DCFC .short -804 + 211 000c E97F .short 32745 + 212 000e 4AFB .short -1206 + 213 0010 D87F .short 32728 + 214 0012 B9F9 .short -1607 + 215 0014 C27F .short 32706 + 216 0016 27F8 .short -2009 + 217 0018 A77F .short 32679 + 218 001a 96F6 .short -2410 + 219 001c 877F .short 32647 + 220 001e 05F5 .short -2811 + 221 0020 627F .short 32610 + 222 0022 75F3 .short -3211 + 223 0024 387F .short 32568 + 224 0026 E5F1 .short -3611 + 225 0028 097F .short 32521 + 226 002a 55F0 .short -4011 + 227 002c D57E .short 32469 + 228 002e C7EE .short -4409 + 229 0030 9D7E .short 32413 + 230 0032 38ED .short -4808 + ARM GAS /tmp/ccLcDeJO.s page 5 + + + 231 0034 5F7E .short 32351 + 232 0036 ABEB .short -5205 + 233 0038 1D7E .short 32285 + 234 003a 1EEA .short -5602 + 235 003c D67D .short 32214 + 236 003e 93E8 .short -5997 + 237 0040 8A7D .short 32138 + 238 0042 08E7 .short -6392 + 239 0044 397D .short 32057 + 240 0046 7EE5 .short -6786 + 241 0048 E37C .short 31971 + 242 004a F5E3 .short -7179 + 243 004c 897C .short 31881 + 244 004e 6DE2 .short -7571 + 245 0050 297C .short 31785 + 246 0052 E7E0 .short -7961 + 247 0054 C57B .short 31685 + 248 0056 61DF .short -8351 + 249 0058 5D7B .short 31581 + 250 005a DDDD .short -8739 + 251 005c EF7A .short 31471 + 252 005e 5ADC .short -9126 + 253 0060 7D7A .short 31357 + 254 0062 D8DA .short -9512 + 255 0064 057A .short 31237 + 256 0066 58D9 .short -9896 + 257 0068 8A79 .short 31114 + 258 006a DAD7 .short -10278 + 259 006c 0979 .short 30985 + 260 006e 5DD6 .short -10659 + 261 0070 8478 .short 30852 + 262 0072 E1D4 .short -11039 + 263 0074 FA77 .short 30714 + 264 0076 68D3 .short -11416 + 265 0078 6C77 .short 30572 + 266 007a EFD1 .short -11793 + 267 007c D976 .short 30425 + 268 007e 79D0 .short -12167 + 269 0080 4176 .short 30273 + 270 0082 05CF .short -12539 + 271 0084 A575 .short 30117 + 272 0086 92CD .short -12910 + 273 0088 0475 .short 29956 + 274 008a 22CC .short -13278 + 275 008c 5F74 .short 29791 + 276 008e B3CA .short -13645 + 277 0090 B573 .short 29621 + 278 0092 46C9 .short -14010 + 279 0094 0773 .short 29447 + 280 0096 DCC7 .short -14372 + 281 0098 5572 .short 29269 + 282 009a 74C6 .short -14732 + 283 009c 9E71 .short 29086 + 284 009e 0EC5 .short -15090 + 285 00a0 E270 .short 28898 + 286 00a2 AAC3 .short -15446 + 287 00a4 2370 .short 28707 + ARM GAS /tmp/ccLcDeJO.s page 6 + + + 288 00a6 48C2 .short -15800 + 289 00a8 5F6F .short 28511 + 290 00aa E9C0 .short -16151 + 291 00ac 966E .short 28310 + 292 00ae 8DBF .short -16499 + 293 00b0 CA6D .short 28106 + 294 00b2 32BE .short -16846 + 295 00b4 F96C .short 27897 + 296 00b6 DBBC .short -17189 + 297 00b8 246C .short 27684 + 298 00ba 86BB .short -17530 + 299 00bc 4A6B .short 27466 + 300 00be 33BA .short -17869 + 301 00c0 6D6A .short 27245 + 302 00c2 E4B8 .short -18204 + 303 00c4 8C69 .short 27020 + 304 00c6 97B7 .short -18537 + 305 00c8 A668 .short 26790 + 306 00ca 4CB6 .short -18868 + 307 00cc BD67 .short 26557 + 308 00ce 05B5 .short -19195 + 309 00d0 CF66 .short 26319 + 310 00d2 C1B3 .short -19519 + 311 00d4 DD65 .short 26077 + 312 00d6 7FB2 .short -19841 + 313 00d8 E864 .short 25832 + 314 00da 41B1 .short -20159 + 315 00dc EF63 .short 25583 + 316 00de 05B0 .short -20475 + 317 00e0 F262 .short 25330 + 318 00e2 CDAE .short -20787 + 319 00e4 F161 .short 25073 + 320 00e6 97AD .short -21097 + 321 00e8 EC60 .short 24812 + 322 00ea 65AC .short -21403 + 323 00ec E35F .short 24547 + 324 00ee 36AB .short -21706 + 325 00f0 D75E .short 24279 + 326 00f2 0BAA .short -22005 + 327 00f4 C75D .short 24007 + 328 00f6 E3A8 .short -22301 + 329 00f8 B45C .short 23732 + 330 00fa BEA7 .short -22594 + 331 00fc 9D5B .short 23453 + 332 00fe 9CA6 .short -22884 + 333 0100 825A .short 23170 + 334 0102 7EA5 .short -23170 + 335 0104 6459 .short 22884 + 336 0106 63A4 .short -23453 + 337 0108 4258 .short 22594 + 338 010a 4CA3 .short -23732 + 339 010c 1D57 .short 22301 + 340 010e 39A2 .short -24007 + 341 0110 F555 .short 22005 + 342 0112 29A1 .short -24279 + 343 0114 CA54 .short 21706 + 344 0116 1DA0 .short -24547 + ARM GAS /tmp/ccLcDeJO.s page 7 + + + 345 0118 9B53 .short 21403 + 346 011a 149F .short -24812 + 347 011c 6952 .short 21097 + 348 011e 0F9E .short -25073 + 349 0120 3351 .short 20787 + 350 0122 0E9D .short -25330 + 351 0124 FB4F .short 20475 + 352 0126 119C .short -25583 + 353 0128 BF4E .short 20159 + 354 012a 189B .short -25832 + 355 012c 814D .short 19841 + 356 012e 239A .short -26077 + 357 0130 3F4C .short 19519 + 358 0132 3199 .short -26319 + 359 0134 FB4A .short 19195 + 360 0136 4398 .short -26557 + 361 0138 B449 .short 18868 + 362 013a 5A97 .short -26790 + 363 013c 6948 .short 18537 + 364 013e 7496 .short -27020 + 365 0140 1C47 .short 18204 + 366 0142 9395 .short -27245 + 367 0144 CD45 .short 17869 + 368 0146 B694 .short -27466 + 369 0148 7A44 .short 17530 + 370 014a DC93 .short -27684 + 371 014c 2543 .short 17189 + 372 014e 0793 .short -27897 + 373 0150 CE41 .short 16846 + 374 0152 3692 .short -28106 + 375 0154 7340 .short 16499 + 376 0156 6A91 .short -28310 + 377 0158 173F .short 16151 + 378 015a A190 .short -28511 + 379 015c B83D .short 15800 + 380 015e DD8F .short -28707 + 381 0160 563C .short 15446 + 382 0162 1E8F .short -28898 + 383 0164 F23A .short 15090 + 384 0166 628E .short -29086 + 385 0168 8C39 .short 14732 + 386 016a AB8D .short -29269 + 387 016c 2438 .short 14372 + 388 016e F98C .short -29447 + 389 0170 BA36 .short 14010 + 390 0172 4B8C .short -29621 + 391 0174 4D35 .short 13645 + 392 0176 A18B .short -29791 + 393 0178 DE33 .short 13278 + 394 017a FC8A .short -29956 + 395 017c 6E32 .short 12910 + 396 017e 5B8A .short -30117 + 397 0180 FB30 .short 12539 + 398 0182 BF89 .short -30273 + 399 0184 872F .short 12167 + 400 0186 2789 .short -30425 + 401 0188 112E .short 11793 + ARM GAS /tmp/ccLcDeJO.s page 8 + + + 402 018a 9488 .short -30572 + 403 018c 982C .short 11416 + 404 018e 0688 .short -30714 + 405 0190 1F2B .short 11039 + 406 0192 7C87 .short -30852 + 407 0194 A329 .short 10659 + 408 0196 F786 .short -30985 + 409 0198 2628 .short 10278 + 410 019a 7686 .short -31114 + 411 019c A826 .short 9896 + 412 019e FB85 .short -31237 + 413 01a0 2825 .short 9512 + 414 01a2 8385 .short -31357 + 415 01a4 A623 .short 9126 + 416 01a6 1185 .short -31471 + 417 01a8 2322 .short 8739 + 418 01aa A384 .short -31581 + 419 01ac 9F20 .short 8351 + 420 01ae 3B84 .short -31685 + 421 01b0 191F .short 7961 + 422 01b2 D783 .short -31785 + 423 01b4 931D .short 7571 + 424 01b6 7783 .short -31881 + 425 01b8 0B1C .short 7179 + 426 01ba 1D83 .short -31971 + 427 01bc 821A .short 6786 + 428 01be C782 .short -32057 + 429 01c0 F818 .short 6392 + 430 01c2 7682 .short -32138 + 431 01c4 6D17 .short 5997 + 432 01c6 2A82 .short -32214 + 433 01c8 E215 .short 5602 + 434 01ca E381 .short -32285 + 435 01cc 5514 .short 5205 + 436 01ce A181 .short -32351 + 437 01d0 C812 .short 4808 + 438 01d2 6381 .short -32413 + 439 01d4 3911 .short 4409 + 440 01d6 2B81 .short -32469 + 441 01d8 AB0F .short 4011 + 442 01da F780 .short -32521 + 443 01dc 1B0E .short 3611 + 444 01de C880 .short -32568 + 445 01e0 8B0C .short 3211 + 446 01e2 9E80 .short -32610 + 447 01e4 FB0A .short 2811 + 448 01e6 7980 .short -32647 + 449 01e8 6A09 .short 2410 + 450 01ea 5980 .short -32679 + 451 01ec D907 .short 2009 + 452 01ee 3E80 .short -32706 + 453 01f0 4706 .short 1607 + 454 01f2 2880 .short -32728 + 455 01f4 B604 .short 1206 + 456 01f6 1780 .short -32745 + 457 01f8 2403 .short 804 + 458 01fa 0A80 .short -32758 + ARM GAS /tmp/ccLcDeJO.s page 9 + + + 459 01fc 9201 .short 402 + 460 01fe 0380 .short -32765 + 461 .section .rodata.WeightsQ15_2048,"a" + 462 .align 2 + 465 WeightsQ15_2048: + 466 0000 FF7F .short 32767 + 467 0002 0000 .short 0 + 468 0004 FF7F .short 32767 + 469 0006 E7FF .short -25 + 470 0008 FF7F .short 32767 + 471 000a CEFF .short -50 + 472 000c FF7F .short 32767 + 473 000e B5FF .short -75 + 474 0010 FF7F .short 32767 + 475 0012 9CFF .short -100 + 476 0014 FF7F .short 32767 + 477 0016 83FF .short -125 + 478 0018 FF7F .short 32767 + 479 001a 6AFF .short -150 + 480 001c FF7F .short 32767 + 481 001e 51FF .short -175 + 482 0020 FF7F .short 32767 + 483 0022 37FF .short -201 + 484 0024 FF7F .short 32767 + 485 0026 1EFF .short -226 + 486 0028 FF7F .short 32767 + 487 002a 05FF .short -251 + 488 002c FE7F .short 32766 + 489 002e ECFE .short -276 + 490 0030 FE7F .short 32766 + 491 0032 D3FE .short -301 + 492 0034 FE7F .short 32766 + 493 0036 BAFE .short -326 + 494 0038 FE7F .short 32766 + 495 003a A1FE .short -351 + 496 003c FD7F .short 32765 + 497 003e 88FE .short -376 + 498 0040 FD7F .short 32765 + 499 0042 6EFE .short -402 + 500 0044 FD7F .short 32765 + 501 0046 55FE .short -427 + 502 0048 FC7F .short 32764 + 503 004a 3CFE .short -452 + 504 004c FC7F .short 32764 + 505 004e 23FE .short -477 + 506 0050 FC7F .short 32764 + 507 0052 0AFE .short -502 + 508 0054 FB7F .short 32763 + 509 0056 F1FD .short -527 + 510 0058 FB7F .short 32763 + 511 005a D8FD .short -552 + 512 005c FA7F .short 32762 + 513 005e BEFD .short -578 + 514 0060 FA7F .short 32762 + 515 0062 A5FD .short -603 + 516 0064 F97F .short 32761 + 517 0066 8CFD .short -628 + ARM GAS /tmp/ccLcDeJO.s page 10 + + + 518 0068 F97F .short 32761 + 519 006a 73FD .short -653 + 520 006c F87F .short 32760 + 521 006e 5AFD .short -678 + 522 0070 F87F .short 32760 + 523 0072 41FD .short -703 + 524 0074 F77F .short 32759 + 525 0076 28FD .short -728 + 526 0078 F77F .short 32759 + 527 007a 0FFD .short -753 + 528 007c F67F .short 32758 + 529 007e F5FC .short -779 + 530 0080 F67F .short 32758 + 531 0082 DCFC .short -804 + 532 0084 F57F .short 32757 + 533 0086 C3FC .short -829 + 534 0088 F47F .short 32756 + 535 008a AAFC .short -854 + 536 008c F47F .short 32756 + 537 008e 91FC .short -879 + 538 0090 F37F .short 32755 + 539 0092 78FC .short -904 + 540 0094 F27F .short 32754 + 541 0096 5FFC .short -929 + 542 0098 F27F .short 32754 + 543 009a 46FC .short -954 + 544 009c F17F .short 32753 + 545 009e 2CFC .short -980 + 546 00a0 F07F .short 32752 + 547 00a2 13FC .short -1005 + 548 00a4 EF7F .short 32751 + 549 00a6 FAFB .short -1030 + 550 00a8 EE7F .short 32750 + 551 00aa E1FB .short -1055 + 552 00ac EE7F .short 32750 + 553 00ae C8FB .short -1080 + 554 00b0 ED7F .short 32749 + 555 00b2 AFFB .short -1105 + 556 00b4 EC7F .short 32748 + 557 00b6 96FB .short -1130 + 558 00b8 EB7F .short 32747 + 559 00ba 7DFB .short -1155 + 560 00bc EA7F .short 32746 + 561 00be 64FB .short -1180 + 562 00c0 E97F .short 32745 + 563 00c2 4AFB .short -1206 + 564 00c4 E87F .short 32744 + 565 00c6 31FB .short -1231 + 566 00c8 E77F .short 32743 + 567 00ca 18FB .short -1256 + 568 00cc E67F .short 32742 + 569 00ce FFFA .short -1281 + 570 00d0 E57F .short 32741 + 571 00d2 E6FA .short -1306 + 572 00d4 E47F .short 32740 + 573 00d6 CDFA .short -1331 + 574 00d8 E37F .short 32739 + ARM GAS /tmp/ccLcDeJO.s page 11 + + + 575 00da B4FA .short -1356 + 576 00dc E27F .short 32738 + 577 00de 9BFA .short -1381 + 578 00e0 E17F .short 32737 + 579 00e2 81FA .short -1407 + 580 00e4 E07F .short 32736 + 581 00e6 68FA .short -1432 + 582 00e8 DF7F .short 32735 + 583 00ea 4FFA .short -1457 + 584 00ec DE7F .short 32734 + 585 00ee 36FA .short -1482 + 586 00f0 DD7F .short 32733 + 587 00f2 1DFA .short -1507 + 588 00f4 DC7F .short 32732 + 589 00f6 04FA .short -1532 + 590 00f8 DA7F .short 32730 + 591 00fa EBF9 .short -1557 + 592 00fc D97F .short 32729 + 593 00fe D2F9 .short -1582 + 594 0100 D87F .short 32728 + 595 0102 B9F9 .short -1607 + 596 0104 D77F .short 32727 + 597 0106 A0F9 .short -1632 + 598 0108 D67F .short 32726 + 599 010a 86F9 .short -1658 + 600 010c D47F .short 32724 + 601 010e 6DF9 .short -1683 + 602 0110 D37F .short 32723 + 603 0112 54F9 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.short -32766 + 21880 7f38 3A01 .short 314 + 21881 7f3a 0280 .short -32766 + 21882 7f3c 3301 .short 307 + 21883 7f3e 0280 .short -32766 + 21884 7f40 2D01 .short 301 + 21885 7f42 0280 .short -32766 + 21886 7f44 2701 .short 295 + 21887 7f46 0280 .short -32766 + 21888 7f48 2101 .short 289 + 21889 7f4a 0280 .short -32766 + 21890 7f4c 1A01 .short 282 + 21891 7f4e 0280 .short -32766 + 21892 7f50 1401 .short 276 + 21893 7f52 0280 .short -32766 + 21894 7f54 0E01 .short 270 + 21895 7f56 0280 .short -32766 + 21896 7f58 0701 .short 263 + ARM GAS /tmp/ccLcDeJO.s page 385 + + + 21897 7f5a 0280 .short -32766 + 21898 7f5c 0101 .short 257 + 21899 7f5e 0280 .short -32766 + 21900 7f60 FB00 .short 251 + 21901 7f62 0180 .short -32767 + 21902 7f64 F500 .short 245 + 21903 7f66 0180 .short -32767 + 21904 7f68 EE00 .short 238 + 21905 7f6a 0180 .short -32767 + 21906 7f6c E800 .short 232 + 21907 7f6e 0180 .short -32767 + 21908 7f70 E200 .short 226 + 21909 7f72 0180 .short -32767 + 21910 7f74 DB00 .short 219 + 21911 7f76 0180 .short -32767 + 21912 7f78 D500 .short 213 + 21913 7f7a 0180 .short -32767 + 21914 7f7c CF00 .short 207 + 21915 7f7e 0180 .short -32767 + 21916 7f80 C900 .short 201 + 21917 7f82 0180 .short -32767 + 21918 7f84 C200 .short 194 + 21919 7f86 0180 .short -32767 + 21920 7f88 BC00 .short 188 + 21921 7f8a 0180 .short -32767 + 21922 7f8c B600 .short 182 + 21923 7f8e 0180 .short -32767 + 21924 7f90 AF00 .short 175 + 21925 7f92 0180 .short -32767 + 21926 7f94 A900 .short 169 + 21927 7f96 0180 .short -32767 + 21928 7f98 A300 .short 163 + 21929 7f9a 0180 .short -32767 + 21930 7f9c 9D00 .short 157 + 21931 7f9e 0180 .short -32767 + 21932 7fa0 9600 .short 150 + 21933 7fa2 0180 .short -32767 + 21934 7fa4 9000 .short 144 + 21935 7fa6 0180 .short -32767 + 21936 7fa8 8A00 .short 138 + 21937 7faa 0180 .short -32767 + 21938 7fac 8300 .short 131 + 21939 7fae 0180 .short -32767 + 21940 7fb0 7D00 .short 125 + 21941 7fb2 0180 .short -32767 + 21942 7fb4 7700 .short 119 + 21943 7fb6 0180 .short -32767 + 21944 7fb8 7100 .short 113 + 21945 7fba 0180 .short -32767 + 21946 7fbc 6A00 .short 106 + 21947 7fbe 0180 .short -32767 + 21948 7fc0 6400 .short 100 + 21949 7fc2 0180 .short -32767 + 21950 7fc4 5E00 .short 94 + 21951 7fc6 0180 .short -32767 + 21952 7fc8 5700 .short 87 + 21953 7fca 0180 .short -32767 + ARM GAS /tmp/ccLcDeJO.s page 386 + + + 21954 7fcc 5100 .short 81 + 21955 7fce 0180 .short -32767 + 21956 7fd0 4B00 .short 75 + 21957 7fd2 0180 .short -32767 + 21958 7fd4 4500 .short 69 + 21959 7fd6 0180 .short -32767 + 21960 7fd8 3E00 .short 62 + 21961 7fda 0180 .short -32767 + 21962 7fdc 3800 .short 56 + 21963 7fde 0180 .short -32767 + 21964 7fe0 3200 .short 50 + 21965 7fe2 0180 .short -32767 + 21966 7fe4 2B00 .short 43 + 21967 7fe6 0180 .short -32767 + 21968 7fe8 2500 .short 37 + 21969 7fea 0180 .short -32767 + 21970 7fec 1F00 .short 31 + 21971 7fee 0180 .short -32767 + 21972 7ff0 1900 .short 25 + 21973 7ff2 0180 .short -32767 + 21974 7ff4 1200 .short 18 + 21975 7ff6 0180 .short -32767 + 21976 7ff8 0C00 .short 12 + 21977 7ffa 0180 .short -32767 + 21978 7ffc 0600 .short 6 + 21979 7ffe 0180 .short -32767 + 21980 .section .rodata.WeightsQ31_128,"a" + 21981 .align 2 + 21984 WeightsQ31_128: + 21985 0000 FFFFFF7F .word 2147483647 + 21986 0004 00000000 .word 0 + 21987 0008 5A88FD7F .word 2147321946 + 21988 000c E0E26DFE .word -26352928 + 21989 0010 8221F67F .word 2146836866 + 21990 0014 41D5DBFC .word -52701887 + 21991 0018 C0CBE97F .word 2146028480 + 21992 001c A3E649FB .word -79042909 + 21993 0020 8E87D87F .word 2144896910 + 21994 0024 8426B8F9 .word -105372028 + 21995 0028 9655C27F .word 2143442326 + 21996 002c 62A426F8 .word -131685278 + 21997 0030 B436A77F .word 2141664948 + 21998 0034 B76F95F6 .word -157978697 + 21999 0038 F32B877F .word 2139565043 + 22000 003c FB9704F5 .word -184248325 + 22001 0040 8F36627F .word 2137142927 + 22002 0044 A22C74F3 .word -210490206 + 22003 0048 F657387F .word 2134398966 + 22004 004c 1C3DE4F1 .word -236700388 + 22005 0050 C491097F .word 2131333572 + 22006 0054 D5D854F0 .word -262874923 + 22007 0058 C6E5D57E .word 2127947206 + 22008 005c 310FC6EE .word -289009871 + 22009 0060 FC559D7E .word 2124240380 + 22010 0064 91EF37ED .word -315101295 + 22011 0068 93E45F7E .word 2120213651 + 22012 006c 4F89AAEB .word -341145265 + ARM GAS /tmp/ccLcDeJO.s page 387 + + + 22013 0070 EA931D7E .word 2115867626 + 22014 0074 BBEB1DEA .word -367137861 + 22015 0078 8F66D67D .word 2111202959 + 22016 007c 222692E8 .word -393075166 + 22017 0080 405F8A7D .word 2106220352 + 22018 0084 C44707E7 .word -418953276 + 22019 0088 EC80397D .word 2100920556 + 22020 008c DA5F7DE5 .word -444768294 + 22021 0090 B2CEE37C .word 2095304370 + 22022 0094 967DF4E3 .word -470516330 + 22023 0098 DE4B897C .word 2089372638 + 22024 009c 1BB06CE2 .word -496193509 + 22025 00a0 EEFB297C .word 2083126254 + 22026 00a4 8506E6E0 .word -521795963 + 22027 00a8 90E2C57B .word 2076566160 + 22028 00ac E48F60DF .word -547319836 + 22029 00b0 9E035D7B .word 2069693342 + 22030 00b4 3B5BDCDD .word -572761285 + 22031 00b8 2363EF7A .word 2062508835 + 22032 00bc 817759DC .word -598116479 + 22033 00c0 5B057D7A .word 2055013723 + 22034 00c4 A2F3D7DA .word -623381598 + 22035 00c8 ADEE057A .word 2047209133 + 22036 00cc 7ADE57D9 .word -648552838 + 22037 00d0 B1238A79 .word 2039096241 + 22038 00d4 D846D9D7 .word -673626408 + 22039 00d8 2DA90979 .word 2030676269 + 22040 00dc 7B3B5CD6 .word -698598533 + 22041 00e0 14848478 .word 2021950484 + 22042 00e4 15CBE0D4 .word -723465451 + 22043 00e8 89B9FA77 .word 2012920201 + 22044 00ec 460467D3 .word -748223418 + 22045 00f0 DB4E6C77 .word 2003586779 + 22046 00f4 9EF5EED1 .word -772868706 + 22047 00f8 8949D976 .word 1993951625 + 22048 00fc 9EAD78D0 .word -797397602 + 22049 0100 3DAF4176 .word 1984016189 + 22050 0104 B33A04CF .word -821806413 + 22051 0108 CF85A575 .word 1973781967 + 22052 010c 39AB91CD .word -846091463 + 22053 0110 45D30475 .word 1963250501 + 22054 0114 790D21CC .word -870249095 + 22055 0118 D19D5F74 .word 1952423377 + 22056 011c A96FB2CA .word -894275671 + 22057 0120 D1EBB573 .word 1941302225 + 22058 0124 ECDF45C9 .word -918167572 + 22059 0128 D0C30773 .word 1929888720 + 22060 012c 506CDBC7 .word -941921200 + 22061 0130 852C5572 .word 1918184581 + 22062 0134 CE2273C6 .word -965532978 + 22063 0138 D22C9E71 .word 1906191570 + 22064 013c 49110DC5 .word -988999351 + 22065 0140 C6CBE270 .word 1893911494 + 22066 0144 9045A9C3 .word -1012316784 + 22067 0148 9A102370 .word 1881346202 + 22068 014c 5ACD47C2 .word -1035481766 + 22069 0150 B2025F6F .word 1868497586 + ARM GAS /tmp/ccLcDeJO.s page 388 + + + 22070 0154 48B6E8C0 .word -1058490808 + 22071 0158 9DA9966E .word 1855367581 + 22072 015c E30D8CBF .word -1081340445 + 22073 0160 140DCA6D .word 1841958164 + 22074 0164 9BE131BE .word -1104027237 + 22075 0168 FC34F96C .word 1828271356 + 22076 016c CB3EDABC .word -1126547765 + 22077 0170 6029246C .word 1814309216 + 22078 0174 B03285BB .word -1148898640 + 22079 0178 79F24A6B .word 1800073849 + 22080 017c 71CA32BA .word -1171076495 + 22081 0180 A4986D6A .word 1785567396 + 22082 0184 1913E3B8 .word -1193077991 + 22083 0188 6C248C69 .word 1770792044 + 22084 018c 9B1996B7 .word -1214899813 + 22085 0190 819EA668 .word 1755750017 + 22086 0194 CDEA4BB6 .word -1236538675 + 22087 0198 BD0FBD67 .word 1740443581 + 22088 019c 689304B5 .word -1257991320 + 22089 01a0 2081CF66 .word 1724875040 + 22090 01a4 0C20C0B3 .word -1279254516 + 22091 01a8 D3FBDD65 .word 1709046739 + 22092 01ac 3C9D7EB2 .word -1300325060 + 22093 01b0 2689E864 .word 1692961062 + 22094 01b4 5B1740B1 .word -1321199781 + 22095 01b8 9032EF63 .word 1676620432 + 22096 01bc B39A04B0 .word -1341875533 + 22097 01c0 AC01F262 .word 1660027308 + 22098 01c4 6C33CCAE .word -1362349204 + 22099 01c8 3F00F161 .word 1643184191 + 22100 01cc 92ED96AD .word -1382617710 + 22101 01d0 3038EC60 .word 1626093616 + 22102 01d4 10D564AC .word -1402678000 + 22103 01d8 8DB3E35F .word 1608758157 + 22104 01dc B5F535AB .word -1422527051 + 22105 01e0 8A7CD75E .word 1591180426 + 22106 01e4 2E5B0AAA .word -1442161874 + 22107 01e8 7C9DC75D .word 1573363068 + 22108 01ec 0611E2A8 .word -1461579514 + 22109 01f0 E020B45C .word 1555308768 + 22110 01f4 AC22BDA7 .word -1480777044 + 22111 01f8 54119D5B .word 1537020244 + 22112 01fc 689B9BA6 .word -1499751576 + 22113 0200 9A79825A .word 1518500250 + 22114 0204 66867DA5 .word -1518500250 + 22115 0208 98646459 .word 1499751576 + 22116 020c ACEE62A4 .word -1537020244 + 22117 0210 54DD4258 .word 1480777044 + 22118 0214 20DF4BA3 .word -1555308768 + 22119 0218 FAEE1D57 .word 1461579514 + 22120 021c 846238A2 .word -1573363068 + 22121 0220 D2A4F555 .word 1442161874 + 22122 0224 768328A1 .word -1591180426 + 22123 0228 4B0ACA54 .word 1422527051 + 22124 022c 734C1CA0 .word -1608758157 + 22125 0230 F02A9B53 .word 1402678000 + 22126 0234 D0C7139F .word -1626093616 + ARM GAS /tmp/ccLcDeJO.s page 389 + + + 22127 0238 6E126952 .word 1382617710 + 22128 023c C1FF0E9E .word -1643184191 + 22129 0240 94CC3351 .word 1362349204 + 22130 0244 54FE0D9D .word -1660027308 + 22131 0248 4D65FB4F .word 1341875533 + 22132 024c 70CD109C .word -1676620432 + 22133 0250 A5E8BF4E .word 1321199781 + 22134 0254 DA76179B .word -1692961062 + 22135 0258 C462814D .word 1300325060 + 22136 025c 2D04229A .word -1709046739 + 22137 0260 F4DF3F4C .word 1279254516 + 22138 0264 E07E3099 .word -1724875040 + 22139 0268 986CFB4A .word 1257991320 + 22140 026c 43F04298 .word -1740443581 + 22141 0270 3315B449 .word 1236538675 + 22142 0274 7F615997 .word -1755750017 + 22143 0278 65E66948 .word 1214899813 + 22144 027c 94DB7396 .word -1770792044 + 22145 0280 E7EC1C47 .word 1193077991 + 22146 0284 5C679295 .word -1785567396 + 22147 0288 8F35CD45 .word 1171076495 + 22148 028c 870DB594 .word -1800073849 + 22149 0290 50CD7A44 .word 1148898640 + 22150 0294 A0D6DB93 .word -1814309216 + 22151 0298 35C12543 .word 1126547765 + 22152 029c 04CB0693 .word -1828271356 + 22153 02a0 651ECE41 .word 1104027237 + 22154 02a4 ECF23592 .word -1841958164 + 22155 02a8 1DF27340 .word 1081340445 + 22156 02ac 63566991 .word -1855367581 + 22157 02b0 B849173F .word 1058490808 + 22158 02b4 4EFDA090 .word -1868497586 + 22159 02b8 A632B83D .word 1035481766 + 22160 02bc 66EFDC8F .word -1881346202 + 22161 02c0 70BA563C .word 1012316784 + 22162 02c4 3A341D8F .word -1893911494 + 22163 02c8 B7EEF23A .word 988999351 + 22164 02cc 2ED3618E .word -1906191570 + 22165 02d0 32DD8C39 .word 965532978 + 22166 02d4 7BD3AA8D .word -1918184581 + 22167 02d8 B0932438 .word 941921200 + 22168 02dc 303CF88C .word -1929888720 + 22169 02e0 1420BA36 .word 918167572 + 22170 02e4 2F144A8C .word -1941302225 + 22171 02e8 57904D35 .word 894275671 + 22172 02ec 2F62A08B .word -1952423377 + 22173 02f0 87F2DE33 .word 870249095 + 22174 02f4 BB2CFB8A .word -1963250501 + 22175 02f8 C7546E32 .word 846091463 + 22176 02fc 317A5A8A .word -1973781967 + 22177 0300 4DC5FB30 .word 821806413 + 22178 0304 C350BE89 .word -1984016189 + 22179 0308 6252872F .word 797397602 + 22180 030c 77B62689 .word -1993951625 + 22181 0310 620A112E .word 772868706 + 22182 0314 25B19388 .word -2003586779 + 22183 0318 BAFB982C .word 748223418 + ARM GAS /tmp/ccLcDeJO.s page 390 + + + 22184 031c 77460588 .word -2012920201 + 22185 0320 EB341F2B .word 723465451 + 22186 0324 EC7B7B87 .word -2021950484 + 22187 0328 85C4A329 .word 698598533 + 22188 032c D356F686 .word -2030676269 + 22189 0330 28B92628 .word 673626408 + 22190 0334 4FDC7586 .word -2039096241 + 22191 0338 8621A826 .word 648552838 + 22192 033c 5311FA85 .word -2047209133 + 22193 0340 5E0C2825 .word 623381598 + 22194 0344 A5FA8285 .word -2055013723 + 22195 0348 7F88A623 .word 598116479 + 22196 034c DD9C1085 .word -2062508835 + 22197 0350 C5A42322 .word 572761285 + 22198 0354 62FCA284 .word -2069693342 + 22199 0358 1C709F20 .word 547319836 + 22200 035c 701D3A84 .word -2076566160 + 22201 0360 7BF9191F .word 521795963 + 22202 0364 1204D683 .word -2083126254 + 22203 0368 E54F931D .word 496193509 + 22204 036c 22B47683 .word -2089372638 + 22205 0370 6A820B1C .word 470516330 + 22206 0374 4E311C83 .word -2095304370 + 22207 0378 26A0821A .word 444768294 + 22208 037c 147FC682 .word -2100920556 + 22209 0380 3CB8F818 .word 418953276 + 22210 0384 C0A07582 .word -2106220352 + 22211 0388 DED96D17 .word 393075166 + 22212 038c 71992982 .word -2111202959 + 22213 0390 4514E215 .word 367137861 + 22214 0394 166CE281 .word -2115867626 + 22215 0398 B1765514 .word 341145265 + 22216 039c 6D1BA081 .word -2120213651 + 22217 03a0 6F10C812 .word 315101295 + 22218 03a4 04AA6281 .word -2124240380 + 22219 03a8 CFF03911 .word 289009871 + 22220 03ac 3A1A2A81 .word -2127947206 + 22221 03b0 2B27AB0F .word 262874923 + 22222 03b4 3C6EF680 .word -2131333572 + 22223 03b8 E4C21B0E .word 236700388 + 22224 03bc 0AA8C780 .word -2134398966 + 22225 03c0 5ED38B0C .word 210490206 + 22226 03c4 71C99D80 .word -2137142927 + 22227 03c8 0568FB0A .word 184248325 + 22228 03cc 0DD47880 .word -2139565043 + 22229 03d0 49906A09 .word 157978697 + 22230 03d4 4CC95880 .word -2141664948 + 22231 03d8 9E5BD907 .word 131685278 + 22232 03dc 6AAA3D80 .word -2143442326 + 22233 03e0 7CD94706 .word 105372028 + 22234 03e4 72782780 .word -2144896910 + 22235 03e8 5D19B604 .word 79042909 + 22236 03ec 40341680 .word -2146028480 + 22237 03f0 BF2A2403 .word 52701887 + 22238 03f4 7EDE0980 .word -2146836866 + 22239 03f8 201D9201 .word 26352928 + 22240 03fc A6770280 .word -2147321946 + ARM GAS /tmp/ccLcDeJO.s page 391 + + + 22241 .section .rodata.WeightsQ31_2048,"a" + 22242 .align 2 + 22245 WeightsQ31_2048: + 22246 0000 FFFFFF7F .word 2147483647 + 22247 0004 00000000 .word 0 + 22248 0008 88FDFF7F .word 2147483016 + 22249 000c 05DEE6FF .word -1647099 + 22250 0010 21F6FF7F .word 2147481121 + 22251 0014 0BBCCDFF .word -3294197 + 22252 0018 CBE9FF7F .word 2147477963 + 22253 001c 129AB4FF .word -4941294 + 22254 0020 86D8FF7F .word 2147473542 + 22255 0024 1D789BFF .word -6588387 + 22256 0028 51C2FF7F .word 2147467857 + 22257 002c 2C5682FF .word -8235476 + 22258 0030 2CA7FF7F .word 2147460908 + 22259 0034 3F3469FF .word -9882561 + 22260 0038 1987FF7F .word 2147452697 + 22261 003c 581250FF .word -11529640 + 22262 0040 1662FF7F .word 2147443222 + 22263 0044 78F036FF .word -13176712 + 22264 0048 2438FF7F .word 2147432484 + 22265 004c A0CE1DFF .word -14823776 + 22266 0050 4309FF7F .word 2147420483 + 22267 0054 D0AC04FF .word -16470832 + 22268 0058 72D5FE7F .word 2147407218 + 22269 005c 0A8BEBFE .word -18117878 + 22270 0060 B29CFE7F .word 2147392690 + 22271 0064 4F69D2FE .word -19764913 + 22272 0068 035FFE7F .word 2147376899 + 22273 006c A047B9FE .word -21411936 + 22274 0070 651CFE7F .word 2147359845 + 22275 0074 FD25A0FE .word -23058947 + 22276 0078 D7D4FD7F .word 2147341527 + 22277 007c 670487FE .word -24705945 + 22278 0080 5A88FD7F .word 2147321946 + 22279 0084 E0E26DFE .word -26352928 + 22280 0088 EE36FD7F .word 2147301102 + 22281 008c 69C154FE .word -27999895 + 22282 0090 93E0FC7F .word 2147278995 + 22283 0094 02A03BFE .word -29646846 + 22284 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3ffc 78020080 .word -2147483016 + 26342 .section .rodata.WeightsQ31_512,"a" + 26343 .align 2 + 26346 WeightsQ31_512: + 26347 0000 FFFFFF7F .word 2147483647 + 26348 0004 00000000 .word 0 + ARM GAS /tmp/ccLcDeJO.s page 463 + + + 26349 0008 86D8FF7F .word 2147473542 + 26350 000c 1D789BFF .word -6588387 + 26351 0010 1662FF7F .word 2147443222 + 26352 0014 78F036FF .word -13176712 + 26353 0018 B29CFE7F .word 2147392690 + 26354 001c 4F69D2FE .word -19764913 + 26355 0020 5A88FD7F .word 2147321946 + 26356 0024 E0E26DFE .word -26352928 + 26357 0028 0F25FC7F .word 2147230991 + 26358 002c 695D09FE .word -32940695 + 26359 0030 D172FA7F .word 2147119825 + 26360 0034 29D9A4FD .word -39528151 + 26361 0038 A271F87F .word 2146988450 + 26362 003c 5C5640FD .word -46115236 + 26363 0040 8221F67F .word 2146836866 + 26364 0044 41D5DBFC .word -52701887 + 26365 0048 7482F37F .word 2146665076 + 26366 004c 165677FC .word -59288042 + 26367 0050 7894F07F .word 2146473080 + 26368 0054 1AD912FC .word -65873638 + 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7A270080 .word -2147473542 + 27371 .section .rodata.WeightsQ31_8192,"a" + 27372 .align 2 + 27375 WeightsQ31_8192: + 27376 0000 FFFFFF7F .word 2147483647 + ARM GAS /tmp/ccLcDeJO.s page 481 + + + 27377 0004 00000000 .word 0 + 27378 0008 D9FFFF7F .word 2147483609 + 27379 000c 81B7F9FF .word -411775 + 27380 0010 62FFFF7F .word 2147483490 + 27381 0014 026FF3FF .word -823550 + 27382 0018 9DFEFF7F .word 2147483293 + 27383 001c 8426EDFF .word -1235324 + 27384 0020 88FDFF7F .word 2147483016 + 27385 0024 05DEE6FF .word -1647099 + 27386 0028 25FCFF7F .word 2147482661 + 27387 002c 8695E0FF .word -2058874 + 27388 0030 73FAFF7F .word 2147482227 + 27389 0034 084DDAFF .word -2470648 + 27390 0038 72F8FF7F .word 2147481714 + 27391 003c 8904D4FF .word -2882423 + 27392 0040 21F6FF7F .word 2147481121 + 27393 0044 0BBCCDFF .word -3294197 + 27394 0048 82F3FF7F .word 2147480450 + 27395 004c 8C73C7FF .word -3705972 + 27396 0050 94F0FF7F .word 2147479700 + 27397 0054 0E2BC1FF .word -4117746 + 27398 0058 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43925 0280 DA390E3F .word 1057896922 + 43926 0284 31DB54BF .word -1084957903 + 43927 0288 6B9A0B3F .word 1057725035 + 43928 028c E59556BF .word -1084844571 + 43929 0290 9BF5083F .word 1057551771 + 43930 0294 534858BF .word -1084733357 + 43931 0298 824B063F .word 1057377154 + 43932 029c 6AF259BF .word -1084624278 + 43933 02a0 3D9C033F .word 1057201213 + 43934 02a4 1A945BBF .word -1084517350 + 43935 02a8 E4E7003F .word 1057023972 + 43936 02ac 532D5DBF .word -1084412589 + 43937 02b0 275DFC3E .word 1056726311 + 43938 02b4 05BE5EBF .word -1084310011 + 43939 02b8 CBE0F63E .word 1056366795 + 43940 02bc 214660BF .word -1084209631 + 43941 02c0 EA5AF13E .word 1056004842 + 43942 02c4 98C561BF .word -1084111464 + 43943 02c8 BBCBEB3E .word 1055640507 + 43944 02cc 5A3C63BF .word -1084015526 + 43945 02d0 7533E63E .word 1055273845 + 43946 02d4 59AA64BF .word -1083921831 + 43947 02d8 4F92E03E .word 1054904911 + 43948 02dc 880F66BF .word -1083830392 + 43949 02e0 80E8DA3E .word 1054533760 + 43950 02e4 D86B67BF .word -1083741224 + 43951 02e8 4136D53E .word 1054160449 + 43952 02ec 3CBF68BF .word -1083654340 + 43953 02f0 CA7BCF3E .word 1053785034 + 43954 02f4 A7096ABF .word -1083569753 + 43955 02f8 53B9C93E .word 1053407571 + 43956 02fc 0C4B6BBF .word -1083487476 + 43957 0300 15EFC33E .word 1053028117 + 43958 0304 5E836CBF .word -1083407522 + 43959 0308 4A1DBE3E .word 1052646730 + 43960 030c 93B26DBF .word -1083329901 + 43961 0310 2A44B83E .word 1052263466 + 43962 0314 9ED86EBF .word -1083254626 + 43963 0318 EF63B23E .word 1051878383 + 43964 031c 73F56FBF .word -1083181709 + 43965 0320 D47CAC3E .word 1051491540 + ARM GAS /tmp/ccLcDeJO.s page 772 + + + 43966 0324 080971BF .word -1083111160 + 43967 0328 128FA63E .word 1051102994 + 43968 032c 521372BF .word -1083042990 + 43969 0330 E59AA03E .word 1050712805 + 43970 0334 471473BF .word -1082977209 + 43971 0338 86A09A3E .word 1050321030 + 43972 033c DD0B74BF .word -1082913827 + 43973 0340 31A0943E .word 1049927729 + 43974 0344 0BFA74BF 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1040830342 + 44000 03ac CCAB7DBF .word -1082283060 + 44001 03b0 73B2FA3D .word 1039839859 + 44002 03b4 24137EBF .word -1082256604 + 44003 03b8 2EBCE13D .word 1038203950 + 44004 03bc B0707EBF .word -1082232656 + 44005 03c0 36BDC83D .word 1036565814 + 44006 03c4 6DC47EBF .word -1082211219 + 44007 03c8 80B6AF3D .word 1034925696 + 44008 03cc 580E7FBF .word -1082192296 + 44009 03d0 05A9963D .word 1033283845 + 44010 03d4 6D4E7FBF .word -1082175891 + 44011 03d8 742B7B3D .word 1031482228 + 44012 03dc AB847FBF .word -1082162005 + 44013 03e0 30FB483D .word 1028193072 + 44014 03e4 0FB17FBF .word -1082150641 + 44015 03e8 2CC3163D .word 1024901932 + 44016 03ec 97D37FBF .word -1082141801 + 44017 03f0 B00AC93C .word 1019808432 + 44018 03f4 43EC7FBF .word -1082135485 + 44019 03f8 900E493C .word 1011420816 + 44020 03fc 11FB7FBF .word -1082131695 + 44021 .section .rodata.Weights_2048,"a" + 44022 .align 2 + ARM GAS /tmp/ccLcDeJO.s page 773 + + + 44025 Weights_2048: + 44026 0000 0000803F .word 1065353216 + 44027 0004 00000000 .word 0 + 44028 0008 FBFF7F3F .word 1065353211 + 44029 000c D90F49BA .word -1169616935 + 44030 0010 ECFF7F3F .word 1065353196 + 44031 0014 D50FC9BA .word -1161228331 + 44032 0018 D4FF7F3F .word 1065353172 + 44033 001c DBCB16BB .word -1156133925 + 44034 0020 B1FF7F3F .word 1065353137 + 44035 0024 C60F49BB .word -1152839738 + 44036 0028 85FF7F3F .word 1065353093 + 44037 002c A9537BBB .word -1149545559 + 44038 0030 4EFF7F3F .word 1065353038 + 44039 0034 C1CB96BB .word -1147745343 + 44040 0038 0EFF7F3F .word 1065352974 + 44041 003c A8EDAFBB .word -1146098264 + 44042 0040 C4FE7F3F .word 1065352900 + 44043 0044 880FC9BB .word -1144451192 + 44044 0048 70FE7F3F .word 1065352816 + 44045 004c 6031E2BB .word -1142804128 + 44046 0050 13FE7F3F .word 1065352723 + 44047 0054 3053FBBB .word -1141157072 + 44048 0058 ABFD7F3F .word 1065352619 + 44049 005c 7B3A0ABC .word -1140180357 + 44050 0060 39FD7F3F .word 1065352505 + 44051 0064 58CB16BC .word -1139356840 + 44052 0068 BEFC7F3F .word 1065352382 + 44053 006c 305C23BC .word -1138533328 + 44054 0070 39FC7F3F .word 1065352249 + 44055 0074 02ED2FBC .word -1137709822 + 44056 0078 AAFB7F3F .word 1065352106 + 44057 007c CC7D3CBC .word -1136886324 + 44058 0080 11FB7F3F .word 1065351953 + 44059 0084 900E49BC .word -1136062832 + 44060 0088 6EFA7F3F .word 1065351790 + 44061 008c 4C9F55BC .word -1135239348 + 44062 0090 C1F97F3F .word 1065351617 + 44063 0094 FF2F62BC .word -1134415873 + 44064 0098 0BF97F3F .word 1065351435 + 44065 009c AAC06EBC .word -1133592406 + 44066 00a0 4AF87F3F .word 1065351242 + 44067 00a4 4B517BBC .word -1132768949 + 44068 00a8 80F77F3F .word 1065351040 + 44069 00ac F2F083BC .word -1132203790 + 44070 00b0 ACF67F3F .word 1065350828 + 44071 00b4 38398ABC .word -1131792072 + 44072 00b8 CEF57F3F .word 1065350606 + 44073 00bc 7A8190BC .word -1131380358 + 44074 00c0 E6F47F3F .word 1065350374 + 44075 00c4 B6C996BC .word -1130968650 + 44076 00c8 F4F37F3F .word 1065350132 + 44077 00cc EC119DBC .word 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880A1DBD .word -1122170232 + 44128 0198 DECD7F3F .word 1065340382 + 44129 019c 2D2E20BD .word -1121964499 + 44130 01a0 E2CB7F3F .word 1065339874 + 44131 01a4 CB5123BD .word -1121758773 + 44132 01a8 DCC97F3F .word 1065339356 + 44133 01ac 647526BD .word -1121553052 + 44134 01b0 CCC77F3F .word 1065338828 + 44135 01b4 F69829BD .word -1121347338 + 44136 01b8 B2C57F3F .word 1065338290 + 44137 01bc 82BC2CBD .word -1121141630 + 44138 01c0 8FC37F3F .word 1065337743 + ARM GAS /tmp/ccLcDeJO.s page 775 + + + 44139 01c4 07E02FBD .word -1120935929 + 44140 01c8 61C17F3F .word 1065337185 + 44141 01cc 850333BD .word -1120730235 + 44142 01d0 2ABF7F3F .word 1065336618 + 44143 01d4 FC2636BD .word -1120524548 + 44144 01d8 E9BC7F3F .word 1065336041 + 44145 01dc 6C4A39BD .word -1120318868 + 44146 01e0 9EBA7F3F .word 1065335454 + 44147 01e4 D56D3CBD .word -1120113195 + 44148 01e8 49B87F3F .word 1065334857 + 44149 01ec 37913FBD .word -1119907529 + 44150 01f0 EAB57F3F .word 1065334250 + 44151 01f4 91B442BD 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543F7F3F .word 1065303892 + 44227 0324 F9EC9CBD .word -1113789191 + 44228 0328 753B7F3F .word 1065302901 + 44229 032c E77D9EBD .word -1113686553 + 44230 0330 8C377F3F .word 1065301900 + 44231 0334 CF0EA0BD .word -1113583921 + 44232 0338 9A337F3F .word 1065300890 + 44233 033c B09FA1BD .word -1113481296 + 44234 0340 9D2F7F3F .word 1065299869 + 44235 0344 8C30A3BD .word -1113378676 + 44236 0348 972B7F3F .word 1065298839 + 44237 034c 61C1A4BD .word -1113276063 + 44238 0350 87277F3F .word 1065297799 + 44239 0354 3052A6BD .word -1113173456 + 44240 0358 6D237F3F .word 1065296749 + 44241 035c F8E2A7BD .word -1113070856 + 44242 0360 491F7F3F .word 1065295689 + 44243 0364 BA73A9BD .word -1112968262 + 44244 0368 1C1B7F3F .word 1065294620 + 44245 036c 7604ABBD .word -1112865674 + 44246 0370 E4167F3F .word 1065293540 + 44247 0374 2B95ACBD .word -1112763093 + 44248 0378 A3127F3F .word 1065292451 + 44249 037c D925AEBD .word -1112660519 + 44250 0380 580E7F3F .word 1065291352 + 44251 0384 80B6AFBD .word -1112557952 + 44252 0388 030A7F3F .word 1065290243 + ARM GAS /tmp/ccLcDeJO.s page 777 + + + 44253 038c 2147B1BD .word -1112455391 + 44254 0390 A4057F3F .word 1065289124 + 44255 0394 BBD7B2BD .word -1112352837 + 44256 0398 3C017F3F .word 1065287996 + 44257 039c 4E68B4BD .word -1112250290 + 44258 03a0 C9FC7E3F .word 1065286857 + 44259 03a4 DAF8B5BD .word -1112147750 + 44260 03a8 4DF87E3F .word 1065285709 + 44261 03ac 5F89B7BD .word -1112045217 + 44262 03b0 C7F37E3F .word 1065284551 + 44263 03b4 DD19B9BD .word -1111942691 + 44264 03b8 37EF7E3F .word 1065283383 + 44265 03bc 54AABABD .word -1111840172 + 44266 03c0 9DEA7E3F .word 1065282205 + 44267 03c4 C33ABCBD .word -1111737661 + 44268 03c8 F9E57E3F .word 1065281017 + 44269 03cc 2CCBBDBD .word -1111635156 + 44270 03d0 4CE17E3F .word 1065279820 + 44271 03d4 8D5BBFBD .word -1111532659 + 44272 03d8 95DC7E3F .word 1065278613 + 44273 03dc E6EBC0BD .word -1111430170 + 44274 03e0 D4D77E3F .word 1065277396 + 44275 03e4 397CC2BD .word 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48123 .align 2 + 48126 Weights_512: + 48127 0000 0000803F .word 1065353216 + 48128 0004 00000000 .word 0 + 48129 0008 B1FF7F3F .word 1065353137 + 48130 000c C60F49BB .word -1152839738 + ARM GAS /tmp/ccLcDeJO.s page 845 + + + 48131 0010 C4FE7F3F .word 1065352900 + 48132 0014 880FC9BB .word -1144451192 + 48133 0018 39FD7F3F .word 1065352505 + 48134 001c 58CB16BC .word -1139356840 + 48135 0020 11FB7F3F .word 1065351953 + 48136 0024 900E49BC .word -1136062832 + 48137 0028 4AF87F3F .word 1065351242 + 48138 002c 4B517BBC .word -1132768949 + 48139 0030 E6F47F3F .word 1065350374 + 48140 0034 B6C996BC .word -1130968650 + 48141 0038 E3F07F3F .word 1065349347 + 48142 003c 69EAAFBC .word -1129321879 + 48143 0040 43EC7F3F .word 1065348163 + 48144 0044 B00AC9BC .word -1127675216 + 48145 0048 05E77F3F .word 1065346821 + 48146 004c 7A2AE2BC .word -1126028678 + 48147 0050 29E17F3F .word 1065345321 + 48148 0054 BA49FBBC .word -1124382278 + 48149 0058 AFDA7F3F .word 1065343663 + 48150 005c 2F340ABD .word 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66959 0b0c E016 .short 5856 + 66960 0b0e 981C .short 7320 + 66961 0b10 E816 .short 5864 + 66962 0b12 681D .short 7528 + 66963 0b14 F016 .short 5872 + 66964 0b16 981D .short 7576 + 66965 0b18 F816 .short 5880 + 66966 0b1a 681F .short 8040 + 66967 0b1c 0017 .short 5888 + 66968 0b1e 101C .short 7184 + 66969 0b20 0817 .short 5896 + 66970 0b22 181C .short 7192 + 66971 0b24 1017 .short 5904 + 66972 0b26 501C .short 7248 + 66973 0b28 1817 .short 5912 + 66974 0b2a 581C .short 7256 + 66975 0b2c 2017 .short 5920 + 66976 0b2e 6818 .short 6248 + 66977 0b30 2817 .short 5928 + 66978 0b32 681C .short 7272 + 66979 0b34 3017 .short 5936 + 66980 0b36 E818 .short 6376 + 66981 0b38 3817 .short 5944 + 66982 0b3a A817 .short 6056 + 66983 0b3c 4017 .short 5952 + 66984 0b3e 101D .short 7440 + 66985 0b40 4817 .short 5960 + 66986 0b42 A819 .short 6568 + 66987 0b44 5017 .short 5968 + 66988 0b46 501D .short 7504 + 66989 0b48 5817 .short 5976 + 66990 0b4a A81B .short 7080 + 66991 0b4c 6017 .short 5984 + 66992 0b4e 681A .short 6760 + 66993 0b50 6817 .short 5992 + 66994 0b52 A81D .short 7592 + 66995 0b54 7017 .short 6000 + 66996 0b56 E81A .short 6888 + 66997 0b58 7817 .short 6008 + 66998 0b5a A81F .short 8104 + 66999 0b5c 8017 .short 6016 + 67000 0b5e C01C .short 7360 + 67001 0b60 8817 .short 6024 + ARM GAS /tmp/ccLcDeJO.s page 1176 + + + 67002 0b62 E01C .short 7392 + 67003 0b64 9017 .short 6032 + 67004 0b66 C01D .short 7616 + 67005 0b68 9817 .short 6040 + 67006 0b6a E01D .short 7648 + 67007 0b6c A017 .short 6048 + 67008 0b6e C81C .short 7368 + 67009 0b70 A817 .short 6056 + 67010 0b72 E81C .short 7400 + 67011 0b74 B017 .short 6064 + 67012 0b76 C81D .short 7624 + 67013 0b78 B817 .short 6072 + 67014 0b7a E817 .short 6120 + 67015 0b7c C017 .short 6080 + 67016 0b7e D01C .short 7376 + 67017 0b80 C817 .short 6088 + 67018 0b82 E819 .short 6632 + 67019 0b84 D017 .short 6096 + 67020 0b86 D01D .short 7632 + 67021 0b88 D817 .short 6104 + 67022 0b8a E81B .short 7144 + 67023 0b8c E017 .short 6112 + 67024 0b8e D81C .short 7384 + 67025 0b90 E817 .short 6120 + 67026 0b92 E81D .short 7656 + 67027 0b94 F017 .short 6128 + 67028 0b96 D81D .short 7640 + 67029 0b98 F817 .short 6136 + 67030 0b9a E81F .short 8168 + 67031 0b9c 1818 .short 6168 + 67032 0b9e 6018 .short 6240 + 67033 0ba0 3018 .short 6192 + 67034 0ba2 4818 .short 6216 + 67035 0ba4 3818 .short 6200 + 67036 0ba6 601C .short 7264 + 67037 0ba8 5818 .short 6232 + 67038 0baa 301A .short 6704 + 67039 0bac 6818 .short 6248 + 67040 0bae 301C .short 7216 + 67041 0bb0 7018 .short 6256 + 67042 0bb2 181A .short 6680 + 67043 0bb4 7818 .short 6264 + 67044 0bb6 301E .short 7728 + 67045 0bb8 8018 .short 6272 + 67046 0bba 001A .short 6656 + 67047 0bbc 8818 .short 6280 + 67048 0bbe 081A .short 6664 + 67049 0bc0 9018 .short 6288 + 67050 0bc2 001B .short 6912 + 67051 0bc4 9818 .short 6296 + 67052 0bc6 6019 .short 6496 + 67053 0bc8 A018 .short 6304 + 67054 0bca 201A .short 6688 + 67055 0bcc A818 .short 6312 + 67056 0bce 281A .short 6696 + 67057 0bd0 B018 .short 6320 + 67058 0bd2 201B .short 6944 + ARM GAS /tmp/ccLcDeJO.s page 1177 + + + 67059 0bd4 B818 .short 6328 + 67060 0bd6 601D .short 7520 + 67061 0bd8 C018 .short 6336 + 67062 0bda 101A .short 6672 + 67063 0bdc C818 .short 6344 + 67064 0bde 181A .short 6680 + 67065 0be0 D018 .short 6352 + 67066 0be2 101B .short 6928 + 67067 0be4 D818 .short 6360 + 67068 0be6 701A .short 6768 + 67069 0be8 E018 .short 6368 + 67070 0bea 301A .short 6704 + 67071 0bec E818 .short 6376 + 67072 0bee 701C .short 7280 + 67073 0bf0 F018 .short 6384 + 67074 0bf2 581A .short 6744 + 67075 0bf4 F818 .short 6392 + 67076 0bf6 701E .short 7792 + 67077 0bf8 0819 .short 6408 + 67078 0bfa 2019 .short 6432 + 67079 0bfc 1819 .short 6424 + 67080 0bfe 601A .short 6752 + 67081 0c00 2819 .short 6440 + 67082 0c02 081D .short 7432 + 67083 0c04 3019 .short 6448 + 67084 0c06 8819 .short 6536 + 67085 0c08 3819 .short 6456 + 67086 0c0a 881D .short 7560 + 67087 0c0c 4819 .short 6472 + 67088 0c0e 201B .short 6944 + 67089 0c10 5819 .short 6488 + 67090 0c12 B01A .short 6832 + 67091 0c14 6019 .short 6496 + 67092 0c16 081B .short 6920 + 67093 0c18 6819 .short 6504 + 67094 0c1a B01C .short 7344 + 67095 0c1c 7019 .short 6512 + 67096 0c1e 881B .short 7048 + 67097 0c20 7819 .short 6520 + 67098 0c22 B01E .short 7856 + 67099 0c24 8019 .short 6528 + 67100 0c26 401A .short 6720 + 67101 0c28 8819 .short 6536 + 67102 0c2a 481A .short 6728 + 67103 0c2c 9019 .short 6544 + 67104 0c2e 401B .short 6976 + 67105 0c30 9819 .short 6552 + 67106 0c32 601B .short 7008 + 67107 0c34 A019 .short 6560 + 67108 0c36 601A .short 6752 + 67109 0c38 A819 .short 6568 + 67110 0c3a 181D .short 7448 + 67111 0c3c B019 .short 6576 + 67112 0c3e 601B .short 7008 + 67113 0c40 B819 .short 6584 + 67114 0c42 981D .short 7576 + 67115 0c44 C019 .short 6592 + ARM GAS /tmp/ccLcDeJO.s page 1178 + + + 67116 0c46 501A .short 6736 + 67117 0c48 C819 .short 6600 + 67118 0c4a 581A .short 6744 + 67119 0c4c D019 .short 6608 + 67120 0c4e 501B .short 6992 + 67121 0c50 D819 .short 6616 + 67122 0c52 F01A .short 6896 + 67123 0c54 E019 .short 6624 + 67124 0c56 181B .short 6936 + 67125 0c58 E819 .short 6632 + 67126 0c5a F01C .short 7408 + 67127 0c5c F019 .short 6640 + 67128 0c5e 981B .short 7064 + 67129 0c60 F819 .short 6648 + 67130 0c62 F01E .short 7920 + 67131 0c64 381A .short 6712 + 67132 0c66 701C .short 7280 + 67133 0c68 581A .short 6744 + 67134 0c6a 301B .short 6960 + 67135 0c6c 681A .short 6760 + 67136 0c6e 301D .short 7472 + 67137 0c70 701A .short 6768 + 67138 0c72 181B .short 6936 + 67139 0c74 781A .short 6776 + 67140 0c76 301F .short 7984 + 67141 0c78 901A .short 6800 + 67142 0c7a C01A .short 6848 + 67143 0c7c 981A .short 6808 + 67144 0c7e C81A .short 6856 + 67145 0c80 B01A .short 6832 + 67146 0c82 E01A .short 6880 + 67147 0c84 B81A .short 6840 + 67148 0c86 E81A .short 6888 + 67149 0c88 C01A .short 6848 + 67150 0c8a 801B .short 7040 + 67151 0c8c C81A .short 6856 + 67152 0c8e 881B .short 7048 + 67153 0c90 D01A .short 6864 + 67154 0c92 C01B .short 7104 + 67155 0c94 D81A .short 6872 + 67156 0c96 701B .short 7024 + 67157 0c98 E01A .short 6880 + 67158 0c9a A01B .short 7072 + 67159 0c9c E81A .short 6888 + 67160 0c9e 701D .short 7536 + 67161 0ca0 F01A .short 6896 + 67162 0ca2 E01B .short 7136 + 67163 0ca4 F81A .short 6904 + 67164 0ca6 701F .short 8048 + 67165 0ca8 281B .short 6952 + 67166 0caa 481D .short 7496 + 67167 0cac 381B .short 6968 + 67168 0cae C81D .short 7624 + 67169 0cb0 481B .short 6984 + 67170 0cb2 601B .short 7008 + 67171 0cb4 581B .short 7000 + 67172 0cb6 B01B .short 7088 + ARM GAS /tmp/ccLcDeJO.s page 1179 + + + 67173 0cb8 681B .short 7016 + 67174 0cba B01D .short 7600 + 67175 0cbc 701B .short 7024 + 67176 0cbe C81B .short 7112 + 67177 0cc0 781B .short 7032 + 67178 0cc2 B01F .short 8112 + 67179 0cc4 901B .short 7056 + 67180 0cc6 C01B .short 7104 + 67181 0cc8 981B .short 7064 + 67182 0cca C81B .short 7112 + 67183 0ccc A81B .short 7080 + 67184 0cce 581D .short 7512 + 67185 0cd0 B01B .short 7088 + 67186 0cd2 E01B .short 7136 + 67187 0cd4 B81B .short 7096 + 67188 0cd6 D81D .short 7640 + 67189 0cd8 D81B .short 7128 + 67190 0cda F01B .short 7152 + 67191 0cdc E81B .short 7144 + 67192 0cde F01D .short 7664 + 67193 0ce0 F81B .short 7160 + 67194 0ce2 F01F .short 8176 + 67195 0ce4 081C .short 7176 + 67196 0ce6 201C .short 7200 + 67197 0ce8 181C .short 7192 + 67198 0cea 301C .short 7216 + 67199 0cec 381C .short 7224 + 67200 0cee 681C .short 7272 + 67201 0cf0 481C .short 7240 + 67202 0cf2 601C .short 7264 + 67203 0cf4 581C .short 7256 + 67204 0cf6 701C .short 7280 + 67205 0cf8 781C .short 7288 + 67206 0cfa 381E .short 7736 + 67207 0cfc 801C .short 7296 + 67208 0cfe 001E .short 7680 + 67209 0d00 881C .short 7304 + 67210 0d02 201E .short 7712 + 67211 0d04 901C .short 7312 + 67212 0d06 001F .short 7936 + 67213 0d08 981C .short 7320 + 67214 0d0a 201F .short 7968 + 67215 0d0c A01C .short 7328 + 67216 0d0e 081E .short 7688 + 67217 0d10 A81C .short 7336 + 67218 0d12 281E .short 7720 + 67219 0d14 B01C .short 7344 + 67220 0d16 081F .short 7944 + 67221 0d18 B81C .short 7352 + 67222 0d1a 281F .short 7976 + 67223 0d1c C01C .short 7360 + 67224 0d1e 101E .short 7696 + 67225 0d20 C81C .short 7368 + 67226 0d22 301E .short 7728 + 67227 0d24 D01C .short 7376 + 67228 0d26 101F .short 7952 + 67229 0d28 D81C .short 7384 + ARM GAS /tmp/ccLcDeJO.s page 1180 + + + 67230 0d2a 301F .short 7984 + 67231 0d2c E01C .short 7392 + 67232 0d2e 181E .short 7704 + 67233 0d30 E81C .short 7400 + 67234 0d32 381E .short 7736 + 67235 0d34 F01C .short 7408 + 67236 0d36 181F .short 7960 + 67237 0d38 F81C .short 7416 + 67238 0d3a 781E .short 7800 + 67239 0d3c 081D .short 7432 + 67240 0d3e 201D .short 7456 + 67241 0d40 181D .short 7448 + 67242 0d42 301D .short 7472 + 67243 0d44 381D .short 7480 + 67244 0d46 A81D .short 7592 + 67245 0d48 481D .short 7496 + 67246 0d4a 601D .short 7520 + 67247 0d4c 581D .short 7512 + 67248 0d4e 701D .short 7536 + 67249 0d50 681D .short 7528 + 67250 0d52 281F .short 7976 + 67251 0d54 781D .short 7544 + 67252 0d56 B81E .short 7864 + 67253 0d58 801D .short 7552 + 67254 0d5a 401E .short 7744 + 67255 0d5c 881D .short 7560 + 67256 0d5e 601E .short 7776 + 67257 0d60 901D .short 7568 + 67258 0d62 401F .short 8000 + 67259 0d64 981D .short 7576 + 67260 0d66 601F .short 8032 + 67261 0d68 A01D .short 7584 + 67262 0d6a 481E .short 7752 + 67263 0d6c A81D .short 7592 + 67264 0d6e 681E .short 7784 + 67265 0d70 B01D .short 7600 + 67266 0d72 481F .short 8008 + 67267 0d74 B81D .short 7608 + 67268 0d76 681F .short 8040 + 67269 0d78 C01D .short 7616 + 67270 0d7a 501E .short 7760 + 67271 0d7c C81D .short 7624 + 67272 0d7e 701E .short 7792 + 67273 0d80 D01D .short 7632 + 67274 0d82 501F .short 8016 + 67275 0d84 D81D .short 7640 + 67276 0d86 701F .short 8048 + 67277 0d88 E01D .short 7648 + 67278 0d8a 581E .short 7768 + 67279 0d8c E81D .short 7656 + 67280 0d8e 781E .short 7800 + 67281 0d90 F01D .short 7664 + 67282 0d92 581F .short 8024 + 67283 0d94 F81D .short 7672 + 67284 0d96 F81E .short 7928 + 67285 0d98 081E .short 7688 + 67286 0d9a 201E .short 7712 + ARM GAS /tmp/ccLcDeJO.s page 1181 + + + 67287 0d9c 181E .short 7704 + 67288 0d9e 301E .short 7728 + 67289 0da0 481E .short 7752 + 67290 0da2 601E .short 7776 + 67291 0da4 581E .short 7768 + 67292 0da6 701E .short 7792 + 67293 0da8 781E .short 7800 + 67294 0daa 381F .short 7992 + 67295 0dac 881E .short 7816 + 67296 0dae A01E .short 7840 + 67297 0db0 901E .short 7824 + 67298 0db2 801F .short 8064 + 67299 0db4 981E .short 7832 + 67300 0db6 A01F .short 8096 + 67301 0db8 B01E .short 7856 + 67302 0dba 881F .short 8072 + 67303 0dbc B81E .short 7864 + 67304 0dbe A81F .short 8104 + 67305 0dc0 C01E .short 7872 + 67306 0dc2 801F .short 8064 + 67307 0dc4 C81E .short 7880 + 67308 0dc6 881F .short 8072 + 67309 0dc8 D01E .short 7888 + 67310 0dca 901F .short 8080 + 67311 0dcc D81E .short 7896 + 67312 0dce B01F .short 8112 + 67313 0dd0 E01E .short 7904 + 67314 0dd2 A01F .short 8096 + 67315 0dd4 E81E .short 7912 + 67316 0dd6 A81F .short 8104 + 67317 0dd8 F01E .short 7920 + 67318 0dda 981F .short 8088 + 67319 0ddc F81E .short 7928 + 67320 0dde 781F .short 8056 + 67321 0de0 081F .short 7944 + 67322 0de2 201F .short 7968 + 67323 0de4 181F .short 7960 + 67324 0de6 301F .short 7984 + 67325 0de8 481F .short 8008 + 67326 0dea 601F .short 8032 + 67327 0dec 581F .short 8024 + 67328 0dee 701F .short 8048 + 67329 0df0 781F .short 8056 + 67330 0df2 B81F .short 8120 + 67331 0df4 881F .short 8072 + 67332 0df6 A01F .short 8096 + 67333 0df8 901F .short 8080 + 67334 0dfa C01F .short 8128 + 67335 0dfc 981F .short 8088 + 67336 0dfe E01F .short 8160 + 67337 0e00 B01F .short 8112 + 67338 0e02 C81F .short 8136 + 67339 0e04 B81F .short 8120 + 67340 0e06 E81F .short 8168 + 67341 0e08 C81F .short 8136 + 67342 0e0a E01F .short 8160 + 67343 0e0c D81F .short 8152 + ARM GAS /tmp/ccLcDeJO.s page 1182 + + + 67344 0e0e F01F .short 8176 + 67345 .section .rodata.armBitRevIndexTable128,"a" + 67346 .align 2 + 67349 armBitRevIndexTable128: + 67350 0000 0800 .short 8 + 67351 0002 0002 .short 512 + 67352 0004 1000 .short 16 + 67353 0006 4000 .short 64 + 67354 0008 1800 .short 24 + 67355 000a 4002 .short 576 + 67356 000c 2000 .short 32 + 67357 000e 8000 .short 128 + 67358 0010 2800 .short 40 + 67359 0012 8002 .short 640 + 67360 0014 3000 .short 48 + 67361 0016 C000 .short 192 + 67362 0018 3800 .short 56 + 67363 001a C002 .short 704 + 67364 001c 4000 .short 64 + 67365 001e 0001 .short 256 + 67366 0020 4800 .short 72 + 67367 0022 0003 .short 768 + 67368 0024 5000 .short 80 + 67369 0026 4001 .short 320 + 67370 0028 5800 .short 88 + 67371 002a 4003 .short 832 + 67372 002c 6000 .short 96 + 67373 002e 8001 .short 384 + 67374 0030 6800 .short 104 + 67375 0032 8003 .short 896 + 67376 0034 7000 .short 112 + 67377 0036 C001 .short 448 + 67378 0038 7800 .short 120 + 67379 003a C003 .short 960 + 67380 003c 8000 .short 128 + 67381 003e 0002 .short 512 + 67382 0040 8800 .short 136 + 67383 0042 0802 .short 520 + 67384 0044 9000 .short 144 + 67385 0046 0003 .short 768 + 67386 0048 9800 .short 152 + 67387 004a 4802 .short 584 + 67388 004c A000 .short 160 + 67389 004e 0802 .short 520 + 67390 0050 A800 .short 168 + 67391 0052 8802 .short 648 + 67392 0054 B000 .short 176 + 67393 0056 C800 .short 200 + 67394 0058 B800 .short 184 + 67395 005a C802 .short 712 + 67396 005c C000 .short 192 + 67397 005e 0801 .short 264 + 67398 0060 C800 .short 200 + 67399 0062 0803 .short 776 + 67400 0064 D000 .short 208 + 67401 0066 4801 .short 328 + 67402 0068 D800 .short 216 + ARM GAS /tmp/ccLcDeJO.s page 1183 + + + 67403 006a 4803 .short 840 + 67404 006c E000 .short 224 + 67405 006e 8801 .short 392 + 67406 0070 E800 .short 232 + 67407 0072 8803 .short 904 + 67408 0074 F000 .short 240 + 67409 0076 C801 .short 456 + 67410 0078 F800 .short 248 + 67411 007a C803 .short 968 + 67412 007c 0801 .short 264 + 67413 007e 1002 .short 528 + 67414 0080 1001 .short 272 + 67415 0082 4001 .short 320 + 67416 0084 1801 .short 280 + 67417 0086 5002 .short 592 + 67418 0088 2001 .short 288 + 67419 008a 0003 .short 768 + 67420 008c 2801 .short 296 + 67421 008e 9002 .short 656 + 67422 0090 3001 .short 304 + 67423 0092 4801 .short 328 + 67424 0094 3801 .short 312 + 67425 0096 D002 .short 720 + 67426 0098 4801 .short 328 + 67427 009a 1003 .short 784 + 67428 009c 5801 .short 344 + 67429 009e 5003 .short 848 + 67430 00a0 6001 .short 352 + 67431 00a2 9001 .short 400 + 67432 00a4 6801 .short 360 + 67433 00a6 9003 .short 912 + 67434 00a8 7001 .short 368 + 67435 00aa D001 .short 464 + 67436 00ac 7801 .short 376 + 67437 00ae D003 .short 976 + 67438 00b0 8001 .short 384 + 67439 00b2 4002 .short 576 + 67440 00b4 8801 .short 392 + 67441 00b6 1802 .short 536 + 67442 00b8 9001 .short 400 + 67443 00ba 4003 .short 832 + 67444 00bc 9801 .short 408 + 67445 00be 5802 .short 600 + 67446 00c0 A001 .short 416 + 67447 00c2 4802 .short 584 + 67448 00c4 A801 .short 424 + 67449 00c6 9802 .short 664 + 67450 00c8 B001 .short 432 + 67451 00ca 4803 .short 840 + 67452 00cc B801 .short 440 + 67453 00ce D802 .short 728 + 67454 00d0 C001 .short 448 + 67455 00d2 5002 .short 592 + 67456 00d4 C801 .short 456 + 67457 00d6 1803 .short 792 + 67458 00d8 D001 .short 464 + 67459 00da 5003 .short 848 + ARM GAS /tmp/ccLcDeJO.s page 1184 + + + 67460 00dc D801 .short 472 + 67461 00de 5803 .short 856 + 67462 00e0 E001 .short 480 + 67463 00e2 5802 .short 600 + 67464 00e4 E801 .short 488 + 67465 00e6 9803 .short 920 + 67466 00e8 F001 .short 496 + 67467 00ea 5803 .short 856 + 67468 00ec F801 .short 504 + 67469 00ee D803 .short 984 + 67470 00f0 0802 .short 520 + 67471 00f2 2002 .short 544 + 67472 00f4 1002 .short 528 + 67473 00f6 4002 .short 576 + 67474 00f8 1802 .short 536 + 67475 00fa 6002 .short 608 + 67476 00fc 2802 .short 552 + 67477 00fe A002 .short 672 + 67478 0100 3002 .short 560 + 67479 0102 6002 .short 608 + 67480 0104 3802 .short 568 + 67481 0106 E002 .short 736 + 67482 0108 4002 .short 576 + 67483 010a 0003 .short 768 + 67484 010c 4802 .short 584 + 67485 010e 2003 .short 800 + 67486 0110 5002 .short 592 + 67487 0112 4003 .short 832 + 67488 0114 5802 .short 600 + 67489 0116 6003 .short 864 + 67490 0118 6002 .short 608 + 67491 011a 2003 .short 800 + 67492 011c 6802 .short 616 + 67493 011e A003 .short 928 + 67494 0120 7002 .short 624 + 67495 0122 6003 .short 864 + 67496 0124 7802 .short 632 + 67497 0126 E003 .short 992 + 67498 0128 8802 .short 648 + 67499 012a A002 .short 672 + 67500 012c 9002 .short 656 + 67501 012e 8003 .short 896 + 67502 0130 9802 .short 664 + 67503 0132 A003 .short 928 + 67504 0134 B002 .short 688 + 67505 0136 8803 .short 904 + 67506 0138 B802 .short 696 + 67507 013a E802 .short 744 + 67508 013c C002 .short 704 + 67509 013e 8003 .short 896 + 67510 0140 C802 .short 712 + 67511 0142 2803 .short 808 + 67512 0144 D002 .short 720 + 67513 0146 9003 .short 912 + 67514 0148 D802 .short 728 + 67515 014a 6803 .short 872 + 67516 014c E002 .short 736 + ARM GAS /tmp/ccLcDeJO.s page 1185 + + + 67517 014e A003 .short 928 + 67518 0150 E802 .short 744 + 67519 0152 A803 .short 936 + 67520 0154 F002 .short 752 + 67521 0156 9803 .short 920 + 67522 0158 F802 .short 760 + 67523 015a E803 .short 1000 + 67524 015c 0803 .short 776 + 67525 015e 2003 .short 800 + 67526 0160 1003 .short 784 + 67527 0162 4003 .short 832 + 67528 0164 1803 .short 792 + 67529 0166 6003 .short 864 + 67530 0168 2803 .short 808 + 67531 016a 8803 .short 904 + 67532 016c 3003 .short 816 + 67533 016e 6003 .short 864 + 67534 0170 3803 .short 824 + 67535 0172 9803 .short 920 + 67536 0174 4803 .short 840 + 67537 0176 6003 .short 864 + 67538 0178 5803 .short 856 + 67539 017a 7003 .short 880 + 67540 017c 6803 .short 872 + 67541 017e B003 .short 944 + 67542 0180 7803 .short 888 + 67543 0182 F003 .short 1008 + 67544 0184 8803 .short 904 + 67545 0186 A003 .short 928 + 67546 0188 9003 .short 912 + 67547 018a C003 .short 960 + 67548 018c 9803 .short 920 + 67549 018e E003 .short 992 + 67550 0190 B003 .short 944 + 67551 0192 C803 .short 968 + 67552 0194 B803 .short 952 + 67553 0196 E803 .short 1000 + 67554 0198 C803 .short 968 + 67555 019a E003 .short 992 + 67556 019c D803 .short 984 + 67557 019e F003 .short 1008 + 67558 .section .rodata.armBitRevIndexTable16,"a" + 67559 .align 2 + 67562 armBitRevIndexTable16: + 67563 0000 0800 .short 8 + 67564 0002 4000 .short 64 + 67565 0004 1800 .short 24 + 67566 0006 4800 .short 72 + 67567 0008 1000 .short 16 + 67568 000a 4000 .short 64 + 67569 000c 2800 .short 40 + 67570 000e 5000 .short 80 + 67571 0010 2000 .short 32 + 67572 0012 4000 .short 64 + 67573 0014 3800 .short 56 + 67574 0016 5800 .short 88 + 67575 0018 3000 .short 48 + ARM GAS /tmp/ccLcDeJO.s page 1186 + + + 67576 001a 4800 .short 72 + 67577 001c 5800 .short 88 + 67578 001e 6800 .short 104 + 67579 0020 4800 .short 72 + 67580 0022 6000 .short 96 + 67581 0024 6800 .short 104 + 67582 0026 7000 .short 112 + 67583 .section .rodata.armBitRevIndexTable2048,"a" + 67584 .align 2 + 67587 armBitRevIndexTable2048: + 67588 0000 0800 .short 8 + 67589 0002 0010 .short 4096 + 67590 0004 1000 .short 16 + 67591 0006 0020 .short 8192 + 67592 0008 1800 .short 24 + 67593 000a 0030 .short 12288 + 67594 000c 2000 .short 32 + 67595 000e 0002 .short 512 + 67596 0010 2800 .short 40 + 67597 0012 0012 .short 4608 + 67598 0014 3000 .short 48 + 67599 0016 0022 .short 8704 + 67600 0018 3800 .short 56 + 67601 001a 0032 .short 12800 + 67602 001c 4000 .short 64 + 67603 001e 0004 .short 1024 + 67604 0020 4800 .short 72 + 67605 0022 0014 .short 5120 + 67606 0024 5000 .short 80 + 67607 0026 0024 .short 9216 + 67608 0028 5800 .short 88 + 67609 002a 0034 .short 13312 + 67610 002c 6000 .short 96 + 67611 002e 0006 .short 1536 + 67612 0030 6800 .short 104 + 67613 0032 0016 .short 5632 + 67614 0034 7000 .short 112 + 67615 0036 0026 .short 9728 + 67616 0038 7800 .short 120 + 67617 003a 0036 .short 13824 + 67618 003c 8000 .short 128 + 67619 003e 0008 .short 2048 + 67620 0040 8800 .short 136 + 67621 0042 0018 .short 6144 + 67622 0044 9000 .short 144 + 67623 0046 0028 .short 10240 + 67624 0048 9800 .short 152 + 67625 004a 0038 .short 14336 + 67626 004c A000 .short 160 + 67627 004e 000A .short 2560 + 67628 0050 A800 .short 168 + 67629 0052 001A .short 6656 + 67630 0054 B000 .short 176 + 67631 0056 002A .short 10752 + 67632 0058 B800 .short 184 + 67633 005a 003A .short 14848 + 67634 005c C000 .short 192 + ARM GAS /tmp/ccLcDeJO.s page 1187 + + + 67635 005e 000C .short 3072 + 67636 0060 C800 .short 200 + 67637 0062 001C .short 7168 + 67638 0064 D000 .short 208 + 67639 0066 002C .short 11264 + 67640 0068 D800 .short 216 + 67641 006a 003C .short 15360 + 67642 006c E000 .short 224 + 67643 006e 000E .short 3584 + 67644 0070 E800 .short 232 + 67645 0072 001E .short 7680 + 67646 0074 F000 .short 240 + 67647 0076 002E .short 11776 + 67648 0078 F800 .short 248 + 67649 007a 003E .short 15872 + 67650 007c 0001 .short 256 + 67651 007e 0004 .short 1024 + 67652 0080 0801 .short 264 + 67653 0082 4010 .short 4160 + 67654 0084 1001 .short 272 + 67655 0086 4020 .short 8256 + 67656 0088 1801 .short 280 + 67657 008a 4030 .short 12352 + 67658 008c 2001 .short 288 + 67659 008e 4002 .short 576 + 67660 0090 2801 .short 296 + 67661 0092 4012 .short 4672 + 67662 0094 3001 .short 304 + 67663 0096 4022 .short 8768 + 67664 0098 3801 .short 312 + 67665 009a 4032 .short 12864 + 67666 009c 4001 .short 320 + 67667 009e 4004 .short 1088 + 67668 00a0 4801 .short 328 + 67669 00a2 4014 .short 5184 + 67670 00a4 5001 .short 336 + 67671 00a6 4024 .short 9280 + 67672 00a8 5801 .short 344 + 67673 00aa 4034 .short 13376 + 67674 00ac 6001 .short 352 + 67675 00ae 4006 .short 1600 + 67676 00b0 6801 .short 360 + 67677 00b2 4016 .short 5696 + 67678 00b4 7001 .short 368 + 67679 00b6 4026 .short 9792 + 67680 00b8 7801 .short 376 + 67681 00ba 4036 .short 13888 + 67682 00bc 8001 .short 384 + 67683 00be 4008 .short 2112 + 67684 00c0 8801 .short 392 + 67685 00c2 4018 .short 6208 + 67686 00c4 9001 .short 400 + 67687 00c6 4028 .short 10304 + 67688 00c8 9801 .short 408 + 67689 00ca 4038 .short 14400 + 67690 00cc A001 .short 416 + 67691 00ce 400A .short 2624 + ARM GAS /tmp/ccLcDeJO.s page 1188 + + + 67692 00d0 A801 .short 424 + 67693 00d2 401A .short 6720 + 67694 00d4 B001 .short 432 + 67695 00d6 402A .short 10816 + 67696 00d8 B801 .short 440 + 67697 00da 403A .short 14912 + 67698 00dc C001 .short 448 + 67699 00de 400C .short 3136 + 67700 00e0 C801 .short 456 + 67701 00e2 401C .short 7232 + 67702 00e4 D001 .short 464 + 67703 00e6 402C .short 11328 + 67704 00e8 D801 .short 472 + 67705 00ea 403C .short 15424 + 67706 00ec E001 .short 480 + 67707 00ee 400E .short 3648 + 67708 00f0 E801 .short 488 + 67709 00f2 401E .short 7744 + 67710 00f4 F001 .short 496 + 67711 00f6 402E .short 11840 + 67712 00f8 F801 .short 504 + 67713 00fa 403E .short 15936 + 67714 00fc 0002 .short 512 + 67715 00fe 0008 .short 2048 + 67716 0100 0802 .short 520 + 67717 0102 8010 .short 4224 + 67718 0104 1002 .short 528 + 67719 0106 8020 .short 8320 + 67720 0108 1802 .short 536 + 67721 010a 8030 .short 12416 + 67722 010c 2002 .short 544 + 67723 010e 8002 .short 640 + 67724 0110 2802 .short 552 + 67725 0112 8012 .short 4736 + 67726 0114 3002 .short 560 + 67727 0116 8022 .short 8832 + 67728 0118 3802 .short 568 + 67729 011a 8032 .short 12928 + 67730 011c 4002 .short 576 + 67731 011e 8004 .short 1152 + 67732 0120 4802 .short 584 + 67733 0122 8014 .short 5248 + 67734 0124 5002 .short 592 + 67735 0126 8024 .short 9344 + 67736 0128 5802 .short 600 + 67737 012a 8034 .short 13440 + 67738 012c 6002 .short 608 + 67739 012e 8006 .short 1664 + 67740 0130 6802 .short 616 + 67741 0132 8016 .short 5760 + 67742 0134 7002 .short 624 + 67743 0136 8026 .short 9856 + 67744 0138 7802 .short 632 + 67745 013a 8036 .short 13952 + 67746 013c 8002 .short 640 + 67747 013e 8008 .short 2176 + 67748 0140 8802 .short 648 + ARM GAS /tmp/ccLcDeJO.s page 1189 + + + 67749 0142 8018 .short 6272 + 67750 0144 9002 .short 656 + 67751 0146 8028 .short 10368 + 67752 0148 9802 .short 664 + 67753 014a 8038 .short 14464 + 67754 014c A002 .short 672 + 67755 014e 800A .short 2688 + 67756 0150 A802 .short 680 + 67757 0152 801A .short 6784 + 67758 0154 B002 .short 688 + 67759 0156 802A .short 10880 + 67760 0158 B802 .short 696 + 67761 015a 803A .short 14976 + 67762 015c C002 .short 704 + 67763 015e 800C .short 3200 + 67764 0160 C802 .short 712 + 67765 0162 801C .short 7296 + 67766 0164 D002 .short 720 + 67767 0166 802C .short 11392 + 67768 0168 D802 .short 728 + 67769 016a 803C .short 15488 + 67770 016c E002 .short 736 + 67771 016e 800E .short 3712 + 67772 0170 E802 .short 744 + 67773 0172 801E .short 7808 + 67774 0174 F002 .short 752 + 67775 0176 802E .short 11904 + 67776 0178 F802 .short 760 + 67777 017a 803E .short 16000 + 67778 017c 0003 .short 768 + 67779 017e 000C .short 3072 + 67780 0180 0803 .short 776 + 67781 0182 C010 .short 4288 + 67782 0184 1003 .short 784 + 67783 0186 C020 .short 8384 + 67784 0188 1803 .short 792 + 67785 018a C030 .short 12480 + 67786 018c 2003 .short 800 + 67787 018e 800C .short 3200 + 67788 0190 2803 .short 808 + 67789 0192 C012 .short 4800 + 67790 0194 3003 .short 816 + 67791 0196 C022 .short 8896 + 67792 0198 3803 .short 824 + 67793 019a C032 .short 12992 + 67794 019c 4003 .short 832 + 67795 019e C004 .short 1216 + 67796 01a0 4803 .short 840 + 67797 01a2 C014 .short 5312 + 67798 01a4 5003 .short 848 + 67799 01a6 C024 .short 9408 + 67800 01a8 5803 .short 856 + 67801 01aa C034 .short 13504 + 67802 01ac 6003 .short 864 + 67803 01ae C006 .short 1728 + 67804 01b0 6803 .short 872 + 67805 01b2 C016 .short 5824 + ARM GAS /tmp/ccLcDeJO.s page 1190 + + + 67806 01b4 7003 .short 880 + 67807 01b6 C026 .short 9920 + 67808 01b8 7803 .short 888 + 67809 01ba C036 .short 14016 + 67810 01bc 8003 .short 896 + 67811 01be C008 .short 2240 + 67812 01c0 8803 .short 904 + 67813 01c2 C018 .short 6336 + 67814 01c4 9003 .short 912 + 67815 01c6 C028 .short 10432 + 67816 01c8 9803 .short 920 + 67817 01ca C038 .short 14528 + 67818 01cc A003 .short 928 + 67819 01ce C00A .short 2752 + 67820 01d0 A803 .short 936 + 67821 01d2 C01A .short 6848 + 67822 01d4 B003 .short 944 + 67823 01d6 C02A .short 10944 + 67824 01d8 B803 .short 952 + 67825 01da C03A .short 15040 + 67826 01dc C003 .short 960 + 67827 01de C00C .short 3264 + 67828 01e0 C803 .short 968 + 67829 01e2 C01C .short 7360 + 67830 01e4 D003 .short 976 + 67831 01e6 C02C .short 11456 + 67832 01e8 D803 .short 984 + 67833 01ea C03C .short 15552 + 67834 01ec E003 .short 992 + 67835 01ee C00E .short 3776 + 67836 01f0 E803 .short 1000 + 67837 01f2 C01E .short 7872 + 67838 01f4 F003 .short 1008 + 67839 01f6 C02E .short 11968 + 67840 01f8 F803 .short 1016 + 67841 01fa C03E .short 16064 + 67842 01fc 0804 .short 1032 + 67843 01fe 0011 .short 4352 + 67844 0200 1004 .short 1040 + 67845 0202 0021 .short 8448 + 67846 0204 1804 .short 1048 + 67847 0206 0031 .short 12544 + 67848 0208 2004 .short 1056 + 67849 020a 000C .short 3072 + 67850 020c 2804 .short 1064 + 67851 020e 0013 .short 4864 + 67852 0210 3004 .short 1072 + 67853 0212 0023 .short 8960 + 67854 0214 3804 .short 1080 + 67855 0216 0033 .short 13056 + 67856 0218 4004 .short 1088 + 67857 021a 0005 .short 1280 + 67858 021c 4804 .short 1096 + 67859 021e 0015 .short 5376 + 67860 0220 5004 .short 1104 + 67861 0222 0025 .short 9472 + 67862 0224 5804 .short 1112 + ARM GAS /tmp/ccLcDeJO.s page 1191 + + + 67863 0226 0035 .short 13568 + 67864 0228 6004 .short 1120 + 67865 022a 0007 .short 1792 + 67866 022c 6804 .short 1128 + 67867 022e 0017 .short 5888 + 67868 0230 7004 .short 1136 + 67869 0232 0027 .short 9984 + 67870 0234 7804 .short 1144 + 67871 0236 0037 .short 14080 + 67872 0238 8004 .short 1152 + 67873 023a 0009 .short 2304 + 67874 023c 8804 .short 1160 + 67875 023e 0019 .short 6400 + 67876 0240 9004 .short 1168 + 67877 0242 0029 .short 10496 + 67878 0244 9804 .short 1176 + 67879 0246 0039 .short 14592 + 67880 0248 A004 .short 1184 + 67881 024a 000B .short 2816 + 67882 024c A804 .short 1192 + 67883 024e 001B .short 6912 + 67884 0250 B004 .short 1200 + 67885 0252 002B .short 11008 + 67886 0254 B804 .short 1208 + 67887 0256 003B .short 15104 + 67888 0258 C004 .short 1216 + 67889 025a 000D .short 3328 + 67890 025c C804 .short 1224 + 67891 025e 001D .short 7424 + 67892 0260 D004 .short 1232 + 67893 0262 002D .short 11520 + 67894 0264 D804 .short 1240 + 67895 0266 003D .short 15616 + 67896 0268 E004 .short 1248 + 67897 026a 000F .short 3840 + 67898 026c E804 .short 1256 + 67899 026e 001F .short 7936 + 67900 0270 F004 .short 1264 + 67901 0272 002F .short 12032 + 67902 0274 F804 .short 1272 + 67903 0276 003F .short 16128 + 67904 0278 0805 .short 1288 + 67905 027a 4011 .short 4416 + 67906 027c 1005 .short 1296 + 67907 027e 4021 .short 8512 + 67908 0280 1805 .short 1304 + 67909 0282 4031 .short 12608 + 67910 0284 2005 .short 1312 + 67911 0286 000D .short 3328 + 67912 0288 2805 .short 1320 + 67913 028a 4013 .short 4928 + 67914 028c 3005 .short 1328 + 67915 028e 4023 .short 9024 + 67916 0290 3805 .short 1336 + 67917 0292 4033 .short 13120 + 67918 0294 4805 .short 1352 + 67919 0296 4015 .short 5440 + ARM GAS /tmp/ccLcDeJO.s page 1192 + + + 67920 0298 5005 .short 1360 + 67921 029a 4025 .short 9536 + 67922 029c 5805 .short 1368 + 67923 029e 4035 .short 13632 + 67924 02a0 6005 .short 1376 + 67925 02a2 4007 .short 1856 + 67926 02a4 6805 .short 1384 + 67927 02a6 4017 .short 5952 + 67928 02a8 7005 .short 1392 + 67929 02aa 4027 .short 10048 + 67930 02ac 7805 .short 1400 + 67931 02ae 4037 .short 14144 + 67932 02b0 8005 .short 1408 + 67933 02b2 4009 .short 2368 + 67934 02b4 8805 .short 1416 + 67935 02b6 4019 .short 6464 + 67936 02b8 9005 .short 1424 + 67937 02ba 4029 .short 10560 + 67938 02bc 9805 .short 1432 + 67939 02be 4039 .short 14656 + 67940 02c0 A005 .short 1440 + 67941 02c2 400B .short 2880 + 67942 02c4 A805 .short 1448 + 67943 02c6 401B .short 6976 + 67944 02c8 B005 .short 1456 + 67945 02ca 402B .short 11072 + 67946 02cc B805 .short 1464 + 67947 02ce 403B .short 15168 + 67948 02d0 C005 .short 1472 + 67949 02d2 400D .short 3392 + 67950 02d4 C805 .short 1480 + 67951 02d6 401D .short 7488 + 67952 02d8 D005 .short 1488 + 67953 02da 402D .short 11584 + 67954 02dc D805 .short 1496 + 67955 02de 403D .short 15680 + 67956 02e0 E005 .short 1504 + 67957 02e2 400F .short 3904 + 67958 02e4 E805 .short 1512 + 67959 02e6 401F .short 8000 + 67960 02e8 F005 .short 1520 + 67961 02ea 402F .short 12096 + 67962 02ec F805 .short 1528 + 67963 02ee 403F .short 16192 + 67964 02f0 0006 .short 1536 + 67965 02f2 4008 .short 2112 + 67966 02f4 0806 .short 1544 + 67967 02f6 8011 .short 4480 + 67968 02f8 1006 .short 1552 + 67969 02fa 8021 .short 8576 + 67970 02fc 1806 .short 1560 + 67971 02fe 8031 .short 12672 + 67972 0300 2006 .short 1568 + 67973 0302 C008 .short 2240 + 67974 0304 2806 .short 1576 + 67975 0306 8013 .short 4992 + 67976 0308 3006 .short 1584 + ARM GAS /tmp/ccLcDeJO.s page 1193 + + + 67977 030a 8023 .short 9088 + 67978 030c 3806 .short 1592 + 67979 030e 8033 .short 13184 + 67980 0310 4006 .short 1600 + 67981 0312 4009 .short 2368 + 67982 0314 4806 .short 1608 + 67983 0316 8015 .short 5504 + 67984 0318 5006 .short 1616 + 67985 031a 8025 .short 9600 + 67986 031c 5806 .short 1624 + 67987 031e 8035 .short 13696 + 67988 0320 6006 .short 1632 + 67989 0322 8007 .short 1920 + 67990 0324 6806 .short 1640 + 67991 0326 8017 .short 6016 + 67992 0328 7006 .short 1648 + 67993 032a 8027 .short 10112 + 67994 032c 7806 .short 1656 + 67995 032e 8037 .short 14208 + 67996 0330 8006 .short 1664 + 67997 0332 8009 .short 2432 + 67998 0334 8806 .short 1672 + 67999 0336 8019 .short 6528 + 68000 0338 9006 .short 1680 + 68001 033a 8029 .short 10624 + 68002 033c 9806 .short 1688 + 68003 033e 8039 .short 14720 + 68004 0340 A006 .short 1696 + 68005 0342 800B .short 2944 + 68006 0344 A806 .short 1704 + 68007 0346 801B .short 7040 + 68008 0348 B006 .short 1712 + 68009 034a 802B .short 11136 + 68010 034c B806 .short 1720 + 68011 034e 803B .short 15232 + 68012 0350 C006 .short 1728 + 68013 0352 800D .short 3456 + 68014 0354 C806 .short 1736 + 68015 0356 801D .short 7552 + 68016 0358 D006 .short 1744 + 68017 035a 802D .short 11648 + 68018 035c D806 .short 1752 + 68019 035e 803D .short 15744 + 68020 0360 E006 .short 1760 + 68021 0362 800F .short 3968 + 68022 0364 E806 .short 1768 + 68023 0366 801F .short 8064 + 68024 0368 F006 .short 1776 + 68025 036a 802F .short 12160 + 68026 036c F806 .short 1784 + 68027 036e 803F .short 16256 + 68028 0370 0007 .short 1792 + 68029 0372 400C .short 3136 + 68030 0374 0807 .short 1800 + 68031 0376 C011 .short 4544 + 68032 0378 1007 .short 1808 + 68033 037a C021 .short 8640 + ARM GAS /tmp/ccLcDeJO.s page 1194 + + + 68034 037c 1807 .short 1816 + 68035 037e C031 .short 12736 + 68036 0380 2007 .short 1824 + 68037 0382 C00C .short 3264 + 68038 0384 2807 .short 1832 + 68039 0386 C013 .short 5056 + 68040 0388 3007 .short 1840 + 68041 038a C023 .short 9152 + 68042 038c 3807 .short 1848 + 68043 038e C033 .short 13248 + 68044 0390 4007 .short 1856 + 68045 0392 400D .short 3392 + 68046 0394 4807 .short 1864 + 68047 0396 C015 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.short 2000 + 68081 03da C02D .short 11712 + 68082 03dc D807 .short 2008 + 68083 03de C03D .short 15808 + 68084 03e0 E007 .short 2016 + 68085 03e2 C00F .short 4032 + 68086 03e4 E807 .short 2024 + 68087 03e6 C01F .short 8128 + 68088 03e8 F007 .short 2032 + 68089 03ea C02F .short 12224 + 68090 03ec F807 .short 2040 + ARM GAS /tmp/ccLcDeJO.s page 1195 + + + 68091 03ee C03F .short 16320 + 68092 03f0 0008 .short 2048 + 68093 03f2 0010 .short 4096 + 68094 03f4 0808 .short 2056 + 68095 03f6 0810 .short 4104 + 68096 03f8 1008 .short 2064 + 68097 03fa 0820 .short 8200 + 68098 03fc 1808 .short 2072 + 68099 03fe 0830 .short 12296 + 68100 0400 2008 .short 2080 + 68101 0402 8010 .short 4224 + 68102 0404 2808 .short 2088 + 68103 0406 0812 .short 4616 + 68104 0408 3008 .short 2096 + 68105 040a 0822 .short 8712 + 68106 040c 3808 .short 2104 + 68107 040e 0832 .short 12808 + 68108 0410 4008 .short 2112 + 68109 0412 0011 .short 4352 + 68110 0414 4808 .short 2120 + 68111 0416 0814 .short 5128 + 68112 0418 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.short 14024 + 70959 1a56 E03C .short 15584 + 70960 1a58 D036 .short 14032 + 70961 1a5a 683C .short 15464 + 70962 1a5c D836 .short 14040 + 70963 1a5e B03D .short 15792 + 70964 1a60 E036 .short 14048 + 70965 1a62 703C .short 15472 + 70966 1a64 E836 .short 14056 + 70967 1a66 E83C .short 15592 + 70968 1a68 F036 .short 14064 + 70969 1a6a D839 .short 14808 + 70970 1a6c F836 .short 14072 + 70971 1a6e B03F .short 16304 + 70972 1a70 0037 .short 14080 + 70973 1a72 003D .short 15616 + 70974 1a74 0837 .short 14088 + 70975 1a76 803D .short 15744 + 70976 1a78 1037 .short 14096 + 70977 1a7a 083D .short 15624 + 70978 1a7c 1837 .short 14104 + 70979 1a7e 883D .short 15752 + 70980 1a80 2037 .short 14112 + 70981 1a82 103D .short 15632 + 70982 1a84 2837 .short 14120 + 70983 1a86 903D .short 15760 + 70984 1a88 3037 .short 14128 + 70985 1a8a 183D .short 15640 + 70986 1a8c 3837 .short 14136 + 70987 1a8e 983D .short 15768 + 70988 1a90 4037 .short 14144 + 70989 1a92 403D .short 15680 + 70990 1a94 4837 .short 14152 + 70991 1a96 C03D .short 15808 + 70992 1a98 5037 .short 14160 + 70993 1a9a 483D .short 15688 + 70994 1a9c 5837 .short 14168 + 70995 1a9e C83D .short 15816 + 70996 1aa0 6037 .short 14176 + 70997 1aa2 503D .short 15696 + ARM GAS /tmp/ccLcDeJO.s page 1246 + + + 70998 1aa4 6837 .short 14184 + 70999 1aa6 D03D .short 15824 + 71000 1aa8 7037 .short 14192 + 71001 1aaa 583D .short 15704 + 71002 1aac 7837 .short 14200 + 71003 1aae F037 .short 14320 + 71004 1ab0 8037 .short 14208 + 71005 1ab2 203D .short 15648 + 71006 1ab4 8837 .short 14216 + 71007 1ab6 A03D .short 15776 + 71008 1ab8 9037 .short 14224 + 71009 1aba 283D .short 15656 + 71010 1abc 9837 .short 14232 + 71011 1abe F039 .short 14832 + 71012 1ac0 A037 .short 14240 + 71013 1ac2 303D .short 15664 + 71014 1ac4 A837 .short 14248 + 71015 1ac6 A83D .short 15784 + 71016 1ac8 B037 .short 14256 + 71017 1aca D83C .short 15576 + 71018 1acc B837 .short 14264 + 71019 1ace F03B .short 15344 + 71020 1ad0 C037 .short 14272 + 71021 1ad2 603D .short 15712 + 71022 1ad4 C837 .short 14280 + 71023 1ad6 E03D .short 15840 + 71024 1ad8 D037 .short 14288 + 71025 1ada 683D .short 15720 + 71026 1adc D837 .short 14296 + 71027 1ade F03D .short 15856 + 71028 1ae0 E037 .short 14304 + 71029 1ae2 703D .short 15728 + 71030 1ae4 E837 .short 14312 + 71031 1ae6 E83D .short 15848 + 71032 1ae8 F037 .short 14320 + 71033 1aea D83D .short 15832 + 71034 1aec F837 .short 14328 + 71035 1aee F03F .short 16368 + 71036 1af0 3838 .short 14392 + 71037 1af2 9838 .short 14488 + 71038 1af4 4038 .short 14400 + 71039 1af6 0039 .short 14592 + 71040 1af8 4838 .short 14408 + 71041 1afa 0839 .short 14600 + 71042 1afc 5038 .short 14416 + 71043 1afe 1039 .short 14608 + 71044 1b00 5838 .short 14424 + 71045 1b02 1839 .short 14616 + 71046 1b04 6038 .short 14432 + 71047 1b06 2039 .short 14624 + 71048 1b08 6838 .short 14440 + 71049 1b0a 2839 .short 14632 + 71050 1b0c 7038 .short 14448 + 71051 1b0e 3039 .short 14640 + 71052 1b10 7838 .short 14456 + 71053 1b12 983C .short 15512 + 71054 1b14 A838 .short 14504 + ARM GAS /tmp/ccLcDeJO.s page 1247 + + + 71055 1b16 B038 .short 14512 + 71056 1b18 B838 .short 14520 + 71057 1b1a 383A .short 14904 + 71058 1b1c C038 .short 14528 + 71059 1b1e 8039 .short 14720 + 71060 1b20 C838 .short 14536 + 71061 1b22 8839 .short 14728 + 71062 1b24 D038 .short 14544 + 71063 1b26 9039 .short 14736 + 71064 1b28 D838 .short 14552 + 71065 1b2a 383C .short 15416 + 71066 1b2c E038 .short 14560 + 71067 1b2e A039 .short 14752 + 71068 1b30 E838 .short 14568 + 71069 1b32 F038 .short 14576 + 71070 1b34 F838 .short 14584 + 71071 1b36 383E .short 15928 + 71072 1b38 F038 .short 14576 + 71073 1b3a A839 .short 14760 + 71074 1b3c 0039 .short 14592 + 71075 1b3e 003C .short 15360 + 71076 1b40 0839 .short 14600 + 71077 1b42 083C .short 15368 + 71078 1b44 1039 .short 14608 + 71079 1b46 103C .short 15376 + 71080 1b48 1839 .short 14616 + 71081 1b4a 183C .short 15384 + 71082 1b4c 2039 .short 14624 + 71083 1b4e 203C .short 15392 + 71084 1b50 2839 .short 14632 + 71085 1b52 283C .short 15400 + 71086 1b54 3039 .short 14640 + 71087 1b56 303C .short 15408 + 71088 1b58 3839 .short 14648 + 71089 1b5a 383C .short 15416 + 71090 1b5c 4039 .short 14656 + 71091 1b5e 003D .short 15616 + 71092 1b60 4839 .short 14664 + 71093 1b62 083D .short 15624 + 71094 1b64 5039 .short 14672 + 71095 1b66 103D .short 15632 + 71096 1b68 5839 .short 14680 + 71097 1b6a 183D .short 15640 + 71098 1b6c 6039 .short 14688 + 71099 1b6e 203D .short 15648 + 71100 1b70 6839 .short 14696 + 71101 1b72 283D .short 15656 + 71102 1b74 7039 .short 14704 + 71103 1b76 303D .short 15664 + 71104 1b78 7839 .short 14712 + 71105 1b7a D83C .short 15576 + 71106 1b7c 8039 .short 14720 + 71107 1b7e 803C .short 15488 + 71108 1b80 8839 .short 14728 + 71109 1b82 883C .short 15496 + 71110 1b84 9039 .short 14736 + 71111 1b86 903C .short 15504 + ARM GAS /tmp/ccLcDeJO.s page 1248 + + + 71112 1b88 9839 .short 14744 + 71113 1b8a 983C .short 15512 + 71114 1b8c A039 .short 14752 + 71115 1b8e A03C .short 15520 + 71116 1b90 A839 .short 14760 + 71117 1b92 B039 .short 14768 + 71118 1b94 B839 .short 14776 + 71119 1b96 783A .short 14968 + 71120 1b98 B039 .short 14768 + 71121 1b9a A83C .short 15528 + 71122 1b9c C039 .short 14784 + 71123 1b9e 803D .short 15744 + 71124 1ba0 C839 .short 14792 + 71125 1ba2 883D .short 15752 + 71126 1ba4 D039 .short 14800 + 71127 1ba6 903D .short 15760 + 71128 1ba8 D839 .short 14808 + 71129 1baa 783C .short 15480 + 71130 1bac E039 .short 14816 + 71131 1bae A03D .short 15776 + 71132 1bb0 E839 .short 14824 + 71133 1bb2 F039 .short 14832 + 71134 1bb4 F839 .short 14840 + 71135 1bb6 783E .short 15992 + 71136 1bb8 F039 .short 14832 + 71137 1bba A83D .short 15784 + 71138 1bbc 083A .short 14856 + 71139 1bbe 103A .short 14864 + 71140 1bc0 103A .short 14864 + 71141 1bc2 203A .short 14880 + 71142 1bc4 183A .short 14872 + 71143 1bc6 303A .short 14896 + 71144 1bc8 203A .short 14880 + 71145 1bca 803A .short 14976 + 71146 1bcc 283A .short 14888 + 71147 1bce 903A .short 14992 + 71148 1bd0 303A .short 14896 + 71149 1bd2 A03A .short 15008 + 71150 1bd4 383A .short 14904 + 71151 1bd6 B03A .short 15024 + 71152 1bd8 403A .short 14912 + 71153 1bda 003B .short 15104 + 71154 1bdc 483A .short 14920 + 71155 1bde 103B .short 15120 + 71156 1be0 503A .short 14928 + 71157 1be2 203B .short 15136 + 71158 1be4 583A .short 14936 + 71159 1be6 303B .short 15152 + 71160 1be8 603A .short 14944 + 71161 1bea 803B .short 15232 + 71162 1bec 683A .short 14952 + 71163 1bee 903B .short 15248 + 71164 1bf0 703A .short 14960 + 71165 1bf2 A03B .short 15264 + 71166 1bf4 783A .short 14968 + 71167 1bf6 B03B .short 15280 + 71168 1bf8 883A .short 14984 + ARM GAS /tmp/ccLcDeJO.s page 1249 + + + 71169 1bfa A03A .short 15008 + 71170 1bfc 983A .short 15000 + 71171 1bfe B03A .short 15024 + 71172 1c00 A83A .short 15016 + 71173 1c02 B03A .short 15024 + 71174 1c04 C03A .short 15040 + 71175 1c06 083B .short 15112 + 71176 1c08 C83A .short 15048 + 71177 1c0a 183B .short 15128 + 71178 1c0c D03A .short 15056 + 71179 1c0e 283B .short 15144 + 71180 1c10 D83A .short 15064 + 71181 1c12 B83C .short 15544 + 71182 1c14 E03A .short 15072 + 71183 1c16 883B .short 15240 + 71184 1c18 E83A .short 15080 + 71185 1c1a 983B .short 15256 + 71186 1c1c F03A .short 15088 + 71187 1c1e A83B .short 15272 + 71188 1c20 F83A .short 15096 + 71189 1c22 B83E .short 16056 + 71190 1c24 003B .short 15104 + 71191 1c26 003E .short 15872 + 71192 1c28 083B .short 15112 + 71193 1c2a 103E .short 15888 + 71194 1c2c 103B .short 15120 + 71195 1c2e 203E .short 15904 + 71196 1c30 183B .short 15128 + 71197 1c32 303E .short 15920 + 71198 1c34 203B .short 15136 + 71199 1c36 803E .short 16000 + 71200 1c38 283B .short 15144 + 71201 1c3a 903E .short 16016 + 71202 1c3c 303B .short 15152 + 71203 1c3e A03E .short 16032 + 71204 1c40 383B .short 15160 + 71205 1c42 B03E .short 16048 + 71206 1c44 403B .short 15168 + 71207 1c46 003F .short 16128 + 71208 1c48 483B .short 15176 + 71209 1c4a 103F .short 16144 + 71210 1c4c 503B .short 15184 + 71211 1c4e 203F .short 16160 + 71212 1c50 583B .short 15192 + 71213 1c52 303F .short 16176 + 71214 1c54 603B .short 15200 + 71215 1c56 803F .short 16256 + 71216 1c58 683B .short 15208 + 71217 1c5a 903F .short 16272 + 71218 1c5c 703B .short 15216 + 71219 1c5e A03F .short 16288 + 71220 1c60 783B .short 15224 + 71221 1c62 B03F .short 16304 + 71222 1c64 803B .short 15232 + 71223 1c66 083E .short 15880 + 71224 1c68 883B .short 15240 + 71225 1c6a 183E .short 15896 + ARM GAS /tmp/ccLcDeJO.s page 1250 + + + 71226 1c6c 903B .short 15248 + 71227 1c6e 283E .short 15912 + 71228 1c70 983B .short 15256 + 71229 1c72 383E .short 15928 + 71230 1c74 A03B .short 15264 + 71231 1c76 883E .short 16008 + 71232 1c78 A83B .short 15272 + 71233 1c7a 983E .short 16024 + 71234 1c7c B03B .short 15280 + 71235 1c7e A83E .short 16040 + 71236 1c80 B83B .short 15288 + 71237 1c82 B83E .short 16056 + 71238 1c84 C03B .short 15296 + 71239 1c86 083F .short 16136 + 71240 1c88 C83B .short 15304 + 71241 1c8a 183F .short 16152 + 71242 1c8c D03B .short 15312 + 71243 1c8e 283F .short 16168 + 71244 1c90 D83B .short 15320 + 71245 1c92 F83C .short 15608 + 71246 1c94 E03B .short 15328 + 71247 1c96 883F .short 16264 + 71248 1c98 E83B .short 15336 + 71249 1c9a 983F .short 16280 + 71250 1c9c F03B .short 15344 + 71251 1c9e A83F .short 16296 + 71252 1ca0 F83B .short 15352 + 71253 1ca2 F83E .short 16120 + 71254 1ca4 383C .short 15416 + 71255 1ca6 983C .short 15512 + 71256 1ca8 403C .short 15424 + 71257 1caa 003D .short 15616 + 71258 1cac 483C .short 15432 + 71259 1cae 083D .short 15624 + 71260 1cb0 503C .short 15440 + 71261 1cb2 103D .short 15632 + 71262 1cb4 583C .short 15448 + 71263 1cb6 183D .short 15640 + 71264 1cb8 603C .short 15456 + 71265 1cba 203D .short 15648 + 71266 1cbc 683C .short 15464 + 71267 1cbe 283D .short 15656 + 71268 1cc0 703C .short 15472 + 71269 1cc2 303D .short 15664 + 71270 1cc4 783C .short 15480 + 71271 1cc6 983D .short 15768 + 71272 1cc8 A83C .short 15528 + 71273 1cca B03C .short 15536 + 71274 1ccc B83C .short 15544 + 71275 1cce B03E .short 16048 + 71276 1cd0 C03C .short 15552 + 71277 1cd2 803D .short 15744 + 71278 1cd4 C83C .short 15560 + 71279 1cd6 883D .short 15752 + 71280 1cd8 D03C .short 15568 + 71281 1cda 903D .short 15760 + 71282 1cdc D83C .short 15576 + ARM GAS /tmp/ccLcDeJO.s page 1251 + + + 71283 1cde 383D .short 15672 + 71284 1ce0 E03C .short 15584 + 71285 1ce2 A03D .short 15776 + 71286 1ce4 E83C .short 15592 + 71287 1ce6 F03C .short 15600 + 71288 1ce8 F03C .short 15600 + 71289 1cea A83D .short 15784 + 71290 1cec F83C .short 15608 + 71291 1cee 383F .short 16184 + 71292 1cf0 383D .short 15672 + 71293 1cf2 983D .short 15768 + 71294 1cf4 783D .short 15736 + 71295 1cf6 D83D .short 15832 + 71296 1cf8 A83D .short 15784 + 71297 1cfa B03D .short 15792 + 71298 1cfc B83D .short 15800 + 71299 1cfe B03F .short 16304 + 71300 1d00 E83D .short 15848 + 71301 1d02 F03D .short 15856 + 71302 1d04 083E .short 15880 + 71303 1d06 803E .short 16000 + 71304 1d08 F83D .short 15864 + 71305 1d0a 783F .short 16248 + 71306 1d0c 103E .short 15888 + 71307 1d0e 803E .short 16000 + 71308 1d10 183E .short 15896 + 71309 1d12 883E .short 16008 + 71310 1d14 203E .short 15904 + 71311 1d16 803E .short 16000 + 71312 1d18 283E .short 15912 + 71313 1d1a 903E .short 16016 + 71314 1d1c 303E .short 15920 + 71315 1d1e 883E .short 16008 + 71316 1d20 383E .short 15928 + 71317 1d22 983E .short 16024 + 71318 1d24 403E .short 15936 + 71319 1d26 003F .short 16128 + 71320 1d28 483E .short 15944 + 71321 1d2a 203F .short 16160 + 71322 1d2c 503E .short 15952 + 71323 1d2e 803F .short 16256 + 71324 1d30 583E .short 15960 + 71325 1d32 A03F .short 16288 + 71326 1d34 603E .short 15968 + 71327 1d36 083F .short 16136 + 71328 1d38 683E .short 15976 + 71329 1d3a 283F .short 16168 + 71330 1d3c 703E .short 15984 + 71331 1d3e 883F .short 16264 + 71332 1d40 783E .short 15992 + 71333 1d42 A83F .short 16296 + 71334 1d44 883E .short 16008 + 71335 1d46 A03E .short 16032 + 71336 1d48 983E .short 16024 + 71337 1d4a A83E .short 16040 + 71338 1d4c C03E .short 16064 + 71339 1d4e 103F .short 16144 + ARM GAS /tmp/ccLcDeJO.s page 1252 + + + 71340 1d50 A83E .short 16040 + 71341 1d52 B03E .short 16048 + 71342 1d54 C83E .short 16072 + 71343 1d56 303F .short 16176 + 71344 1d58 D03E .short 16080 + 71345 1d5a 903F .short 16272 + 71346 1d5c D83E .short 16088 + 71347 1d5e B03F .short 16304 + 71348 1d60 E03E .short 16096 + 71349 1d62 183F .short 16152 + 71350 1d64 E83E .short 16104 + 71351 1d66 383F .short 16184 + 71352 1d68 F03E .short 16112 + 71353 1d6a 983F .short 16280 + 71354 1d6c 083F .short 16136 + 71355 1d6e 803F .short 16256 + 71356 1d70 F83E .short 16120 + 71357 1d72 B83F .short 16312 + 71358 1d74 103F .short 16144 + 71359 1d76 803F .short 16256 + 71360 1d78 183F .short 16152 + 71361 1d7a 883F .short 16264 + 71362 1d7c 203F .short 16160 + 71363 1d7e 803F .short 16256 + 71364 1d80 283F .short 16168 + 71365 1d82 903F .short 16272 + 71366 1d84 303F .short 16176 + 71367 1d86 883F .short 16264 + 71368 1d88 383F .short 16184 + 71369 1d8a 983F .short 16280 + 71370 1d8c 483F .short 16200 + 71371 1d8e 503F .short 16208 + 71372 1d90 503F .short 16208 + 71373 1d92 603F .short 16224 + 71374 1d94 583F .short 16216 + 71375 1d96 703F .short 16240 + 71376 1d98 603F .short 16224 + 71377 1d9a C03F .short 16320 + 71378 1d9c 683F .short 16232 + 71379 1d9e D03F .short 16336 + 71380 1da0 703F .short 16240 + 71381 1da2 E03F .short 16352 + 71382 1da4 783F .short 16248 + 71383 1da6 F03F .short 16368 + 71384 1da8 883F .short 16264 + 71385 1daa A03F .short 16288 + 71386 1dac 983F .short 16280 + 71387 1dae A83F .short 16296 + 71388 1db0 A83F .short 16296 + 71389 1db2 B03F .short 16304 + 71390 1db4 D83F .short 16344 + 71391 1db6 F03F .short 16368 + 71392 1db8 C83F .short 16328 + 71393 1dba E03F .short 16352 + 71394 1dbc E83F .short 16360 + 71395 1dbe F03F .short 16368 + 71396 .section .rodata.armBitRevIndexTable256,"a" + ARM GAS /tmp/ccLcDeJO.s page 1253 + + + 71397 .align 2 + 71400 armBitRevIndexTable256: + 71401 0000 0800 .short 8 + 71402 0002 0002 .short 512 + 71403 0004 1000 .short 16 + 71404 0006 0004 .short 1024 + 71405 0008 1800 .short 24 + 71406 000a 0006 .short 1536 + 71407 000c 2000 .short 32 + 71408 000e 4000 .short 64 + 71409 0010 2800 .short 40 + 71410 0012 4002 .short 576 + 71411 0014 3000 .short 48 + 71412 0016 4004 .short 1088 + 71413 0018 3800 .short 56 + 71414 001a 4006 .short 1600 + 71415 001c 4000 .short 64 + 71416 001e 8000 .short 128 + 71417 0020 4800 .short 72 + 71418 0022 8002 .short 640 + 71419 0024 5000 .short 80 + 71420 0026 8004 .short 1152 + 71421 0028 5800 .short 88 + 71422 002a 8006 .short 1664 + 71423 002c 6000 .short 96 + 71424 002e C000 .short 192 + 71425 0030 6800 .short 104 + 71426 0032 C002 .short 704 + 71427 0034 7000 .short 112 + 71428 0036 C004 .short 1216 + 71429 0038 7800 .short 120 + 71430 003a C006 .short 1728 + 71431 003c 8000 .short 128 + 71432 003e 0001 .short 256 + 71433 0040 8800 .short 136 + 71434 0042 0003 .short 768 + 71435 0044 9000 .short 144 + 71436 0046 0005 .short 1280 + 71437 0048 9800 .short 152 + 71438 004a 0007 .short 1792 + 71439 004c A000 .short 160 + 71440 004e 4001 .short 320 + 71441 0050 A800 .short 168 + 71442 0052 4003 .short 832 + 71443 0054 B000 .short 176 + 71444 0056 4005 .short 1344 + 71445 0058 B800 .short 184 + 71446 005a 4007 .short 1856 + 71447 005c C000 .short 192 + 71448 005e 8001 .short 384 + 71449 0060 C800 .short 200 + 71450 0062 8003 .short 896 + 71451 0064 D000 .short 208 + 71452 0066 8005 .short 1408 + 71453 0068 D800 .short 216 + 71454 006a 8007 .short 1920 + 71455 006c E000 .short 224 + ARM GAS /tmp/ccLcDeJO.s page 1254 + + + 71456 006e C001 .short 448 + 71457 0070 E800 .short 232 + 71458 0072 C003 .short 960 + 71459 0074 F000 .short 240 + 71460 0076 C005 .short 1472 + 71461 0078 F800 .short 248 + 71462 007a C007 .short 1984 + 71463 007c 0001 .short 256 + 71464 007e 0002 .short 512 + 71465 0080 0801 .short 264 + 71466 0082 0802 .short 520 + 71467 0084 1001 .short 272 + 71468 0086 0804 .short 1032 + 71469 0088 1801 .short 280 + 71470 008a 0806 .short 1544 + 71471 008c 2001 .short 288 + 71472 008e 8002 .short 640 + 71473 0090 2801 .short 296 + 71474 0092 4802 .short 584 + 71475 0094 3001 .short 304 + 71476 0096 4804 .short 1096 + 71477 0098 3801 .short 312 + 71478 009a 4806 .short 1608 + 71479 009c 4001 .short 320 + 71480 009e 0003 .short 768 + 71481 00a0 4801 .short 328 + 71482 00a2 8802 .short 648 + 71483 00a4 5001 .short 336 + 71484 00a6 8804 .short 1160 + 71485 00a8 5801 .short 344 + 71486 00aa 8806 .short 1672 + 71487 00ac 6001 .short 352 + 71488 00ae 8003 .short 896 + 71489 00b0 6801 .short 360 + 71490 00b2 C802 .short 712 + 71491 00b4 7001 .short 368 + 71492 00b6 C804 .short 1224 + 71493 00b8 7801 .short 376 + 71494 00ba C806 .short 1736 + 71495 00bc 8001 .short 384 + 71496 00be 0802 .short 520 + 71497 00c0 8801 .short 392 + 71498 00c2 0803 .short 776 + 71499 00c4 9001 .short 400 + 71500 00c6 0805 .short 1288 + 71501 00c8 9801 .short 408 + 71502 00ca 0807 .short 1800 + 71503 00cc A001 .short 416 + 71504 00ce 8802 .short 648 + 71505 00d0 A801 .short 424 + 71506 00d2 4803 .short 840 + 71507 00d4 B001 .short 432 + 71508 00d6 4805 .short 1352 + 71509 00d8 B801 .short 440 + 71510 00da 4807 .short 1864 + 71511 00dc C001 .short 448 + 71512 00de 0803 .short 776 + ARM GAS /tmp/ccLcDeJO.s page 1255 + + + 71513 00e0 C801 .short 456 + 71514 00e2 8803 .short 904 + 71515 00e4 D001 .short 464 + 71516 00e6 8805 .short 1416 + 71517 00e8 D801 .short 472 + 71518 00ea 8807 .short 1928 + 71519 00ec E001 .short 480 + 71520 00ee 8803 .short 904 + 71521 00f0 E801 .short 488 + 71522 00f2 C803 .short 968 + 71523 00f4 F001 .short 496 + 71524 00f6 C805 .short 1480 + 71525 00f8 F801 .short 504 + 71526 00fa C807 .short 1992 + 71527 00fc 0802 .short 520 + 71528 00fe 1002 .short 528 + 71529 0100 0002 .short 512 + 71530 0102 0004 .short 1024 + 71531 0104 1002 .short 528 + 71532 0106 1004 .short 1040 + 71533 0108 1802 .short 536 + 71534 010a 1006 .short 1552 + 71535 010c 2002 .short 544 + 71536 010e 8004 .short 1152 + 71537 0110 2802 .short 552 + 71538 0112 5002 .short 592 + 71539 0114 3002 .short 560 + 71540 0116 5004 .short 1104 + 71541 0118 3802 .short 568 + 71542 011a 5006 .short 1616 + 71543 011c 4002 .short 576 + 71544 011e 0005 .short 1280 + 71545 0120 4802 .short 584 + 71546 0122 9002 .short 656 + 71547 0124 5002 .short 592 + 71548 0126 9004 .short 1168 + 71549 0128 5802 .short 600 + 71550 012a 9006 .short 1680 + 71551 012c 6002 .short 608 + 71552 012e 8005 .short 1408 + 71553 0130 6802 .short 616 + 71554 0132 D002 .short 720 + 71555 0134 7002 .short 624 + 71556 0136 D004 .short 1232 + 71557 0138 7802 .short 632 + 71558 013a D006 .short 1744 + 71559 013c 8002 .short 640 + 71560 013e 0804 .short 1032 + 71561 0140 8802 .short 648 + 71562 0142 1003 .short 784 + 71563 0144 9002 .short 656 + 71564 0146 1005 .short 1296 + 71565 0148 9802 .short 664 + 71566 014a 1007 .short 1808 + 71567 014c A002 .short 672 + 71568 014e 8804 .short 1160 + 71569 0150 A802 .short 680 + ARM GAS /tmp/ccLcDeJO.s page 1256 + + + 71570 0152 5003 .short 848 + 71571 0154 B002 .short 688 + 71572 0156 5005 .short 1360 + 71573 0158 B802 .short 696 + 71574 015a 5007 .short 1872 + 71575 015c C002 .short 704 + 71576 015e 0805 .short 1288 + 71577 0160 C802 .short 712 + 71578 0162 9003 .short 912 + 71579 0164 D002 .short 720 + 71580 0166 9005 .short 1424 + 71581 0168 D802 .short 728 + 71582 016a 9007 .short 1936 + 71583 016c E002 .short 736 + 71584 016e 8805 .short 1416 + 71585 0170 E802 .short 744 + 71586 0172 D003 .short 976 + 71587 0174 F002 .short 752 + 71588 0176 D005 .short 1488 + 71589 0178 F802 .short 760 + 71590 017a D007 .short 2000 + 71591 017c 0003 .short 768 + 71592 017e 0006 .short 1536 + 71593 0180 0803 .short 776 + 71594 0182 1006 .short 1552 + 71595 0184 1003 .short 784 + 71596 0186 1804 .short 1048 + 71597 0188 1803 .short 792 + 71598 018a 1806 .short 1560 + 71599 018c 2003 .short 800 + 71600 018e 8006 .short 1664 + 71601 0190 2803 .short 808 + 71602 0192 9006 .short 1680 + 71603 0194 3003 .short 816 + 71604 0196 5804 .short 1112 + 71605 0198 3803 .short 824 + 71606 019a 5806 .short 1624 + 71607 019c 4003 .short 832 + 71608 019e 0007 .short 1792 + 71609 01a0 4803 .short 840 + 71610 01a2 1007 .short 1808 + 71611 01a4 5003 .short 848 + 71612 01a6 9804 .short 1176 + 71613 01a8 5803 .short 856 + 71614 01aa 9806 .short 1688 + 71615 01ac 6003 .short 864 + 71616 01ae 8007 .short 1920 + 71617 01b0 6803 .short 872 + 71618 01b2 9007 .short 1936 + 71619 01b4 7003 .short 880 + 71620 01b6 D804 .short 1240 + 71621 01b8 7803 .short 888 + 71622 01ba D806 .short 1752 + 71623 01bc 8003 .short 896 + 71624 01be 0806 .short 1544 + 71625 01c0 8803 .short 904 + 71626 01c2 1806 .short 1560 + ARM GAS /tmp/ccLcDeJO.s page 1257 + + + 71627 01c4 9003 .short 912 + 71628 01c6 1805 .short 1304 + 71629 01c8 9803 .short 920 + 71630 01ca 1807 .short 1816 + 71631 01cc A003 .short 928 + 71632 01ce 8806 .short 1672 + 71633 01d0 A803 .short 936 + 71634 01d2 9806 .short 1688 + 71635 01d4 B003 .short 944 + 71636 01d6 5805 .short 1368 + 71637 01d8 B803 .short 952 + 71638 01da 5807 .short 1880 + 71639 01dc C003 .short 960 + 71640 01de 0807 .short 1800 + 71641 01e0 C803 .short 968 + 71642 01e2 1807 .short 1816 + 71643 01e4 D003 .short 976 + 71644 01e6 9805 .short 1432 + 71645 01e8 D803 .short 984 + 71646 01ea 9807 .short 1944 + 71647 01ec E003 .short 992 + 71648 01ee 8807 .short 1928 + 71649 01f0 E803 .short 1000 + 71650 01f2 9807 .short 1944 + 71651 01f4 F003 .short 1008 + 71652 01f6 D805 .short 1496 + 71653 01f8 F803 .short 1016 + 71654 01fa D807 .short 2008 + 71655 01fc 0804 .short 1032 + 71656 01fe 8004 .short 1152 + 71657 0200 1004 .short 1040 + 71658 0202 2004 .short 1056 + 71659 0204 1804 .short 1048 + 71660 0206 2006 .short 1568 + 71661 0208 2804 .short 1064 + 71662 020a 8005 .short 1408 + 71663 020c 3004 .short 1072 + 71664 020e 6004 .short 1120 + 71665 0210 3804 .short 1080 + 71666 0212 6006 .short 1632 + 71667 0214 4004 .short 1088 + 71668 0216 0006 .short 1536 + 71669 0218 4804 .short 1096 + 71670 021a 8804 .short 1160 + 71671 021c 5004 .short 1104 + 71672 021e A004 .short 1184 + 71673 0220 5804 .short 1112 + 71674 0222 A006 .short 1696 + 71675 0224 6004 .short 1120 + 71676 0226 1006 .short 1552 + 71677 0228 6804 .short 1128 + 71678 022a 8805 .short 1416 + 71679 022c 7004 .short 1136 + 71680 022e E004 .short 1248 + 71681 0230 7804 .short 1144 + 71682 0232 E006 .short 1760 + 71683 0234 8804 .short 1160 + ARM GAS /tmp/ccLcDeJO.s page 1258 + + + 71684 0236 8006 .short 1664 + 71685 0238 9004 .short 1168 + 71686 023a 2005 .short 1312 + 71687 023c 9804 .short 1176 + 71688 023e 2007 .short 1824 + 71689 0240 A004 .short 1184 + 71690 0242 0806 .short 1544 + 71691 0244 A804 .short 1192 + 71692 0246 8007 .short 1920 + 71693 0248 B004 .short 1200 + 71694 024a 6005 .short 1376 + 71695 024c B804 .short 1208 + 71696 024e 6007 .short 1888 + 71697 0250 C004 .short 1216 + 71698 0252 2006 .short 1568 + 71699 0254 C804 .short 1224 + 71700 0256 8806 .short 1672 + 71701 0258 D004 .short 1232 + 71702 025a A005 .short 1440 + 71703 025c D804 .short 1240 + 71704 025e A007 .short 1952 + 71705 0260 E004 .short 1248 + 71706 0262 1806 .short 1560 + 71707 0264 E804 .short 1256 + 71708 0266 8807 .short 1928 + 71709 0268 F004 .short 1264 + 71710 026a E005 .short 1504 + 71711 026c F804 .short 1272 + 71712 026e E007 .short 2016 + 71713 0270 0805 .short 1288 + 71714 0272 2005 .short 1312 + 71715 0274 1005 .short 1296 + 71716 0276 8005 .short 1408 + 71717 0278 1805 .short 1304 + 71718 027a 2806 .short 1576 + 71719 027c 2805 .short 1320 + 71720 027e 9005 .short 1424 + 71721 0280 3005 .short 1328 + 71722 0282 8805 .short 1416 + 71723 0284 3805 .short 1336 + 71724 0286 6806 .short 1640 + 71725 0288 4005 .short 1344 + 71726 028a 0007 .short 1792 + 71727 028c 4805 .short 1352 + 71728 028e 2007 .short 1824 + 71729 0290 5005 .short 1360 + 71730 0292 8007 .short 1920 + 71731 0294 5805 .short 1368 + 71732 0296 A806 .short 1704 + 71733 0298 6005 .short 1376 + 71734 029a 0807 .short 1800 + 71735 029c 6805 .short 1384 + 71736 029e 9805 .short 1432 + 71737 02a0 7005 .short 1392 + 71738 02a2 8807 .short 1928 + 71739 02a4 7805 .short 1400 + 71740 02a6 E806 .short 1768 + ARM GAS /tmp/ccLcDeJO.s page 1259 + + + 71741 02a8 8805 .short 1416 + 71742 02aa 9006 .short 1680 + 71743 02ac 9805 .short 1432 + 71744 02ae 2807 .short 1832 + 71745 02b0 A005 .short 1440 + 71746 02b2 2806 .short 1576 + 71747 02b4 A805 .short 1448 + 71748 02b6 9007 .short 1936 + 71749 02b8 B005 .short 1456 + 71750 02ba 2807 .short 1832 + 71751 02bc B805 .short 1464 + 71752 02be 6807 .short 1896 + 71753 02c0 C005 .short 1472 + 71754 02c2 1007 .short 1808 + 71755 02c4 C805 .short 1480 + 71756 02c6 9806 .short 1688 + 71757 02c8 D005 .short 1488 + 71758 02ca 9007 .short 1936 + 71759 02cc D805 .short 1496 + 71760 02ce A807 .short 1960 + 71761 02d0 E005 .short 1504 + 71762 02d2 1807 .short 1816 + 71763 02d4 E805 .short 1512 + 71764 02d6 9807 .short 1944 + 71765 02d8 F005 .short 1520 + 71766 02da 9807 .short 1944 + 71767 02dc F805 .short 1528 + 71768 02de E807 .short 2024 + 71769 02e0 1806 .short 1560 + 71770 02e2 3006 .short 1584 + 71771 02e4 3806 .short 1592 + 71772 02e6 7006 .short 1648 + 71773 02e8 4006 .short 1600 + 71774 02ea 0007 .short 1792 + 71775 02ec 4806 .short 1608 + 71776 02ee 8007 .short 1920 + 71777 02f0 5006 .short 1616 + 71778 02f2 0807 .short 1800 + 71779 02f4 5806 .short 1624 + 71780 02f6 B006 .short 1712 + 71781 02f8 6006 .short 1632 + 71782 02fa 1007 .short 1808 + 71783 02fc 6806 .short 1640 + 71784 02fe 9007 .short 1936 + 71785 0300 7006 .short 1648 + 71786 0302 1807 .short 1816 + 71787 0304 7806 .short 1656 + 71788 0306 F006 .short 1776 + 71789 0308 8806 .short 1672 + 71790 030a A006 .short 1696 + 71791 030c 9806 .short 1688 + 71792 030e 3007 .short 1840 + 71793 0310 A806 .short 1704 + 71794 0312 A007 .short 1952 + 71795 0314 B006 .short 1712 + 71796 0316 8807 .short 1928 + 71797 0318 B806 .short 1720 + ARM GAS /tmp/ccLcDeJO.s page 1260 + + + 71798 031a 7007 .short 1904 + 71799 031c C006 .short 1728 + 71800 031e 2007 .short 1824 + 71801 0320 C806 .short 1736 + 71802 0322 A007 .short 1952 + 71803 0324 D006 .short 1744 + 71804 0326 2807 .short 1832 + 71805 0328 D806 .short 1752 + 71806 032a B007 .short 1968 + 71807 032c E006 .short 1760 + 71808 032e 3007 .short 1840 + 71809 0330 E806 .short 1768 + 71810 0332 A807 .short 1960 + 71811 0334 F006 .short 1776 + 71812 0336 9807 .short 1944 + 71813 0338 F806 .short 1784 + 71814 033a F007 .short 2032 + 71815 033c 4807 .short 1864 + 71816 033e 5007 .short 1872 + 71817 0340 3807 .short 1848 + 71818 0342 9807 .short 1944 + 71819 0344 5007 .short 1872 + 71820 0346 6007 .short 1888 + 71821 0348 5807 .short 1880 + 71822 034a 7007 .short 1904 + 71823 034c 6007 .short 1888 + 71824 034e C007 .short 1984 + 71825 0350 6807 .short 1896 + 71826 0352 D007 .short 2000 + 71827 0354 7807 .short 1912 + 71828 0356 F007 .short 2032 + 71829 0358 7007 .short 1904 + 71830 035a E007 .short 2016 + 71831 035c B807 .short 1976 + 71832 035e F007 .short 2032 + 71833 0360 A807 .short 1960 + 71834 0362 B007 .short 1968 + 71835 0364 D807 .short 2008 + 71836 0366 F007 .short 2032 + 71837 0368 C807 .short 1992 + 71838 036a E007 .short 2016 + 71839 036c E807 .short 2024 + 71840 036e F007 .short 2032 + 71841 .section .rodata.armBitRevIndexTable32,"a" + 71842 .align 2 + 71845 armBitRevIndexTable32: + 71846 0000 0800 .short 8 + 71847 0002 4000 .short 64 + 71848 0004 1000 .short 16 + 71849 0006 8000 .short 128 + 71850 0008 1800 .short 24 + 71851 000a C000 .short 192 + 71852 000c 2000 .short 32 + 71853 000e 4000 .short 64 + 71854 0010 2800 .short 40 + 71855 0012 4800 .short 72 + 71856 0014 3000 .short 48 + ARM GAS /tmp/ccLcDeJO.s page 1261 + + + 71857 0016 8800 .short 136 + 71858 0018 3800 .short 56 + 71859 001a C800 .short 200 + 71860 001c 4000 .short 64 + 71861 001e 8000 .short 128 + 71862 0020 4800 .short 72 + 71863 0022 5000 .short 80 + 71864 0024 5800 .short 88 + 71865 0026 D000 .short 208 + 71866 0028 5000 .short 80 + 71867 002a 9000 .short 144 + 71868 002c 6000 .short 96 + 71869 002e C000 .short 192 + 71870 0030 6800 .short 104 + 71871 0032 D000 .short 208 + 71872 0034 7000 .short 112 + 71873 0036 9800 .short 152 + 71874 0038 7800 .short 120 + 71875 003a D800 .short 216 + 71876 003c 8800 .short 136 + 71877 003e C000 .short 192 + 71878 0040 9000 .short 144 + 71879 0042 A000 .short 160 + 71880 0044 A800 .short 168 + 71881 0046 D000 .short 208 + 71882 0048 9800 .short 152 + 71883 004a E000 .short 224 + 71884 004c B000 .short 176 + 71885 004e D000 .short 208 + 71886 0050 B800 .short 184 + 71887 0052 E800 .short 232 + 71888 0054 D800 .short 216 + 71889 0056 F000 .short 240 + 71890 0058 C800 .short 200 + 71891 005a E000 .short 224 + 71892 005c E800 .short 232 + 71893 005e F000 .short 240 + 71894 .section .rodata.armBitRevIndexTable4096,"a" + 71895 .align 2 + 71898 armBitRevIndexTable4096: + 71899 0000 0800 .short 8 + 71900 0002 0010 .short 4096 + 71901 0004 1000 .short 16 + 71902 0006 0020 .short 8192 + 71903 0008 1800 .short 24 + 71904 000a 0030 .short 12288 + 71905 000c 2000 .short 32 + 71906 000e 0040 .short 16384 + 71907 0010 2800 .short 40 + 71908 0012 0050 .short 20480 + 71909 0014 3000 .short 48 + 71910 0016 0060 .short 24576 + 71911 0018 3800 .short 56 + 71912 001a 0070 .short 28672 + 71913 001c 4000 .short 64 + 71914 001e 0002 .short 512 + 71915 0020 4800 .short 72 + ARM GAS /tmp/ccLcDeJO.s page 1262 + + + 71916 0022 0012 .short 4608 + 71917 0024 5000 .short 80 + 71918 0026 0022 .short 8704 + 71919 0028 5800 .short 88 + 71920 002a 0032 .short 12800 + 71921 002c 6000 .short 96 + 71922 002e 0042 .short 16896 + 71923 0030 6800 .short 104 + 71924 0032 0052 .short 20992 + 71925 0034 7000 .short 112 + 71926 0036 0062 .short 25088 + 71927 0038 7800 .short 120 + 71928 003a 0072 .short 29184 + 71929 003c 8000 .short 128 + 71930 003e 0004 .short 1024 + 71931 0040 8800 .short 136 + 71932 0042 0014 .short 5120 + 71933 0044 9000 .short 144 + 71934 0046 0024 .short 9216 + 71935 0048 9800 .short 152 + 71936 004a 0034 .short 13312 + 71937 004c A000 .short 160 + 71938 004e 0044 .short 17408 + 71939 0050 A800 .short 168 + 71940 0052 0054 .short 21504 + 71941 0054 B000 .short 176 + 71942 0056 0064 .short 25600 + 71943 0058 B800 .short 184 + 71944 005a 0074 .short 29696 + 71945 005c C000 .short 192 + 71946 005e 0006 .short 1536 + 71947 0060 C800 .short 200 + 71948 0062 0016 .short 5632 + 71949 0064 D000 .short 208 + 71950 0066 0026 .short 9728 + 71951 0068 D800 .short 216 + 71952 006a 0036 .short 13824 + 71953 006c E000 .short 224 + 71954 006e 0046 .short 17920 + 71955 0070 E800 .short 232 + 71956 0072 0056 .short 22016 + 71957 0074 F000 .short 240 + 71958 0076 0066 .short 26112 + 71959 0078 F800 .short 248 + 71960 007a 0076 .short 30208 + 71961 007c 0001 .short 256 + 71962 007e 0008 .short 2048 + 71963 0080 0801 .short 264 + 71964 0082 0018 .short 6144 + 71965 0084 1001 .short 272 + 71966 0086 0028 .short 10240 + 71967 0088 1801 .short 280 + 71968 008a 0038 .short 14336 + 71969 008c 2001 .short 288 + 71970 008e 0048 .short 18432 + 71971 0090 2801 .short 296 + 71972 0092 0058 .short 22528 + ARM GAS /tmp/ccLcDeJO.s page 1263 + + + 71973 0094 3001 .short 304 + 71974 0096 0068 .short 26624 + 71975 0098 3801 .short 312 + 71976 009a 0078 .short 30720 + 71977 009c 4001 .short 320 + 71978 009e 000A .short 2560 + 71979 00a0 4801 .short 328 + 71980 00a2 001A .short 6656 + 71981 00a4 5001 .short 336 + 71982 00a6 002A .short 10752 + 71983 00a8 5801 .short 344 + 71984 00aa 003A .short 14848 + 71985 00ac 6001 .short 352 + 71986 00ae 004A .short 18944 + 71987 00b0 6801 .short 360 + 71988 00b2 005A .short 23040 + 71989 00b4 7001 .short 368 + 71990 00b6 006A .short 27136 + 71991 00b8 7801 .short 376 + 71992 00ba 007A .short 31232 + 71993 00bc 8001 .short 384 + 71994 00be 000C .short 3072 + 71995 00c0 8801 .short 392 + 71996 00c2 001C .short 7168 + 71997 00c4 9001 .short 400 + 71998 00c6 002C .short 11264 + 71999 00c8 9801 .short 408 + 72000 00ca 003C .short 15360 + 72001 00cc A001 .short 416 + 72002 00ce 004C .short 19456 + 72003 00d0 A801 .short 424 + 72004 00d2 005C .short 23552 + 72005 00d4 B001 .short 432 + 72006 00d6 006C .short 27648 + 72007 00d8 B801 .short 440 + 72008 00da 007C .short 31744 + 72009 00dc C001 .short 448 + 72010 00de 000E .short 3584 + 72011 00e0 C801 .short 456 + 72012 00e2 001E .short 7680 + 72013 00e4 D001 .short 464 + 72014 00e6 002E .short 11776 + 72015 00e8 D801 .short 472 + 72016 00ea 003E .short 15872 + 72017 00ec E001 .short 480 + 72018 00ee 004E .short 19968 + 72019 00f0 E801 .short 488 + 72020 00f2 005E .short 24064 + 72021 00f4 F001 .short 496 + 72022 00f6 006E .short 28160 + 72023 00f8 F801 .short 504 + 72024 00fa 007E .short 32256 + 72025 00fc 0802 .short 520 + 72026 00fe 4010 .short 4160 + 72027 0100 1002 .short 528 + 72028 0102 4020 .short 8256 + 72029 0104 1802 .short 536 + ARM GAS /tmp/ccLcDeJO.s page 1264 + + + 72030 0106 4030 .short 12352 + 72031 0108 2002 .short 544 + 72032 010a 4040 .short 16448 + 72033 010c 2802 .short 552 + 72034 010e 4050 .short 20544 + 72035 0110 3002 .short 560 + 72036 0112 4060 .short 24640 + 72037 0114 3802 .short 568 + 72038 0116 4070 .short 28736 + 72039 0118 4802 .short 584 + 72040 011a 4012 .short 4672 + 72041 011c 5002 .short 592 + 72042 011e 4022 .short 8768 + 72043 0120 5802 .short 600 + 72044 0122 4032 .short 12864 + 72045 0124 6002 .short 608 + 72046 0126 4042 .short 16960 + 72047 0128 6802 .short 616 + 72048 012a 4052 .short 21056 + 72049 012c 7002 .short 624 + 72050 012e 4062 .short 25152 + 72051 0130 7802 .short 632 + 72052 0132 4072 .short 29248 + 72053 0134 8002 .short 640 + 72054 0136 4004 .short 1088 + 72055 0138 8802 .short 648 + 72056 013a 4014 .short 5184 + 72057 013c 9002 .short 656 + 72058 013e 4024 .short 9280 + 72059 0140 9802 .short 664 + 72060 0142 4034 .short 13376 + 72061 0144 A002 .short 672 + 72062 0146 4044 .short 17472 + 72063 0148 A802 .short 680 + 72064 014a 4054 .short 21568 + 72065 014c B002 .short 688 + 72066 014e 4064 .short 25664 + 72067 0150 B802 .short 696 + 72068 0152 4074 .short 29760 + 72069 0154 C002 .short 704 + 72070 0156 4006 .short 1600 + 72071 0158 C802 .short 712 + 72072 015a 4016 .short 5696 + 72073 015c D002 .short 720 + 72074 015e 4026 .short 9792 + 72075 0160 D802 .short 728 + 72076 0162 4036 .short 13888 + 72077 0164 E002 .short 736 + 72078 0166 4046 .short 17984 + 72079 0168 E802 .short 744 + 72080 016a 4056 .short 22080 + 72081 016c F002 .short 752 + 72082 016e 4066 .short 26176 + 72083 0170 F802 .short 760 + 72084 0172 4076 .short 30272 + 72085 0174 0003 .short 768 + 72086 0176 4008 .short 2112 + ARM GAS /tmp/ccLcDeJO.s page 1265 + + + 72087 0178 0803 .short 776 + 72088 017a 4018 .short 6208 + 72089 017c 1003 .short 784 + 72090 017e 4028 .short 10304 + 72091 0180 1803 .short 792 + 72092 0182 4038 .short 14400 + 72093 0184 2003 .short 800 + 72094 0186 4048 .short 18496 + 72095 0188 2803 .short 808 + 72096 018a 4058 .short 22592 + 72097 018c 3003 .short 816 + 72098 018e 4068 .short 26688 + 72099 0190 3803 .short 824 + 72100 0192 4078 .short 30784 + 72101 0194 4003 .short 832 + 72102 0196 400A .short 2624 + 72103 0198 4803 .short 840 + 72104 019a 401A .short 6720 + 72105 019c 5003 .short 848 + 72106 019e 402A .short 10816 + 72107 01a0 5803 .short 856 + 72108 01a2 403A .short 14912 + 72109 01a4 6003 .short 864 + 72110 01a6 404A .short 19008 + 72111 01a8 6803 .short 872 + 72112 01aa 405A .short 23104 + 72113 01ac 7003 .short 880 + 72114 01ae 406A .short 27200 + 72115 01b0 7803 .short 888 + 72116 01b2 407A .short 31296 + 72117 01b4 8003 .short 896 + 72118 01b6 400C .short 3136 + 72119 01b8 8803 .short 904 + 72120 01ba 401C .short 7232 + 72121 01bc 9003 .short 912 + 72122 01be 402C .short 11328 + 72123 01c0 9803 .short 920 + 72124 01c2 403C .short 15424 + 72125 01c4 A003 .short 928 + 72126 01c6 404C .short 19520 + 72127 01c8 A803 .short 936 + 72128 01ca 405C .short 23616 + 72129 01cc B003 .short 944 + 72130 01ce 406C .short 27712 + 72131 01d0 B803 .short 952 + 72132 01d2 407C .short 31808 + 72133 01d4 C003 .short 960 + 72134 01d6 400E .short 3648 + 72135 01d8 C803 .short 968 + 72136 01da 401E .short 7744 + 72137 01dc D003 .short 976 + 72138 01de 402E .short 11840 + 72139 01e0 D803 .short 984 + 72140 01e2 403E .short 15936 + 72141 01e4 E003 .short 992 + 72142 01e6 404E .short 20032 + 72143 01e8 E803 .short 1000 + ARM GAS /tmp/ccLcDeJO.s page 1266 + + + 72144 01ea 405E .short 24128 + 72145 01ec F003 .short 1008 + 72146 01ee 406E .short 28224 + 72147 01f0 F803 .short 1016 + 72148 01f2 407E .short 32320 + 72149 01f4 0804 .short 1032 + 72150 01f6 8010 .short 4224 + 72151 01f8 1004 .short 1040 + 72152 01fa 8020 .short 8320 + 72153 01fc 1804 .short 1048 + 72154 01fe 8030 .short 12416 + 72155 0200 2004 .short 1056 + 72156 0202 8040 .short 16512 + 72157 0204 2804 .short 1064 + 72158 0206 8050 .short 20608 + 72159 0208 3004 .short 1072 + 72160 020a 8060 .short 24704 + 72161 020c 3804 .short 1080 + 72162 020e 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0a58 0817 .short 5896 + 73224 0a5a C818 .short 6344 + 73225 0a5c 1017 .short 5904 + 73226 0a5e C828 .short 10440 + ARM GAS /tmp/ccLcDeJO.s page 1285 + + + 73227 0a60 1817 .short 5912 + 73228 0a62 C838 .short 14536 + 73229 0a64 2017 .short 5920 + 73230 0a66 C848 .short 18632 + 73231 0a68 2817 .short 5928 + 73232 0a6a C858 .short 22728 + 73233 0a6c 3017 .short 5936 + 73234 0a6e C868 .short 26824 + 73235 0a70 3817 .short 5944 + 73236 0a72 C878 .short 30920 + 73237 0a74 4817 .short 5960 + 73238 0a76 C81A .short 6856 + 73239 0a78 5017 .short 5968 + 73240 0a7a C82A .short 10952 + 73241 0a7c 5817 .short 5976 + 73242 0a7e C83A .short 15048 + 73243 0a80 6017 .short 5984 + 73244 0a82 C84A .short 19144 + 73245 0a84 6817 .short 5992 + 73246 0a86 C85A .short 23240 + 73247 0a88 7017 .short 6000 + 73248 0a8a C86A .short 27336 + 73249 0a8c 7817 .short 6008 + 73250 0a8e C87A .short 31432 + 73251 0a90 8817 .short 6024 + 73252 0a92 C81C .short 7368 + 73253 0a94 9017 .short 6032 + 73254 0a96 C82C .short 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0ad6 0851 .short 20744 + 73287 0ad8 3018 .short 6192 + 73288 0ada 0861 .short 24840 + 73289 0adc 3818 .short 6200 + 73290 0ade 0871 .short 28936 + 73291 0ae0 5018 .short 6224 + 73292 0ae2 0823 .short 8968 + 73293 0ae4 5818 .short 6232 + 73294 0ae6 0833 .short 13064 + 73295 0ae8 6018 .short 6240 + 73296 0aea 0843 .short 17160 + 73297 0aec 6818 .short 6248 + 73298 0aee 0853 .short 21256 + 73299 0af0 7018 .short 6256 + 73300 0af2 0863 .short 25352 + 73301 0af4 7818 .short 6264 + 73302 0af6 0873 .short 29448 + 73303 0af8 9018 .short 6288 + 73304 0afa 0825 .short 9480 + 73305 0afc 9818 .short 6296 + 73306 0afe 0835 .short 13576 + 73307 0b00 A018 .short 6304 + 73308 0b02 0845 .short 17672 + 73309 0b04 A818 .short 6312 + 73310 0b06 0855 .short 21768 + 73311 0b08 B018 .short 6320 + 73312 0b0a 0865 .short 25864 + 73313 0b0c B818 .short 6328 + 73314 0b0e 0875 .short 29960 + 73315 0b10 D018 .short 6352 + 73316 0b12 0827 .short 9992 + 73317 0b14 D818 .short 6360 + 73318 0b16 0837 .short 14088 + 73319 0b18 E018 .short 6368 + 73320 0b1a 0847 .short 18184 + 73321 0b1c E818 .short 6376 + 73322 0b1e 0857 .short 22280 + 73323 0b20 F018 .short 6384 + 73324 0b22 0867 .short 26376 + 73325 0b24 F818 .short 6392 + 73326 0b26 0877 .short 30472 + 73327 0b28 1019 .short 6416 + 73328 0b2a 0829 .short 10504 + 73329 0b2c 1819 .short 6424 + 73330 0b2e 0839 .short 14600 + 73331 0b30 2019 .short 6432 + 73332 0b32 0849 .short 18696 + 73333 0b34 2819 .short 6440 + 73334 0b36 0859 .short 22792 + 73335 0b38 3019 .short 6448 + 73336 0b3a 0869 .short 26888 + 73337 0b3c 3819 .short 6456 + 73338 0b3e 0879 .short 30984 + 73339 0b40 4819 .short 6472 + 73340 0b42 081B .short 6920 + ARM GAS /tmp/ccLcDeJO.s page 1287 + + + 73341 0b44 5019 .short 6480 + 73342 0b46 082B .short 11016 + 73343 0b48 5819 .short 6488 + 73344 0b4a 083B .short 15112 + 73345 0b4c 6019 .short 6496 + 73346 0b4e 084B .short 19208 + 73347 0b50 6819 .short 6504 + 73348 0b52 085B .short 23304 + 73349 0b54 7019 .short 6512 + 73350 0b56 086B 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181A .short 6680 + 73384 0b9a 4831 .short 12616 + 73385 0b9c 201A .short 6688 + 73386 0b9e 4841 .short 16712 + 73387 0ba0 281A .short 6696 + 73388 0ba2 4851 .short 20808 + 73389 0ba4 301A .short 6704 + 73390 0ba6 4861 .short 24904 + 73391 0ba8 381A .short 6712 + 73392 0baa 4871 .short 29000 + 73393 0bac 501A .short 6736 + 73394 0bae 4823 .short 9032 + 73395 0bb0 581A .short 6744 + 73396 0bb2 4833 .short 13128 + 73397 0bb4 601A .short 6752 + ARM GAS /tmp/ccLcDeJO.s page 1288 + + + 73398 0bb6 4843 .short 17224 + 73399 0bb8 681A .short 6760 + 73400 0bba 4853 .short 21320 + 73401 0bbc 701A .short 6768 + 73402 0bbe 4863 .short 25416 + 73403 0bc0 781A .short 6776 + 73404 0bc2 4873 .short 29512 + 73405 0bc4 901A .short 6800 + 73406 0bc6 4825 .short 9544 + 73407 0bc8 981A .short 6808 + 73408 0bca 4835 .short 13640 + 73409 0bcc A01A .short 6816 + 73410 0bce 4845 .short 17736 + 73411 0bd0 A81A .short 6824 + 73412 0bd2 4855 .short 21832 + 73413 0bd4 B01A .short 6832 + 73414 0bd6 4865 .short 25928 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7016 + 73448 0c1a 485B .short 23368 + 73449 0c1c 701B .short 7024 + 73450 0c1e 486B .short 27464 + 73451 0c20 781B .short 7032 + 73452 0c22 487B .short 31560 + 73453 0c24 881B .short 7048 + 73454 0c26 481D .short 7496 + ARM GAS /tmp/ccLcDeJO.s page 1289 + + + 73455 0c28 901B .short 7056 + 73456 0c2a 482D .short 11592 + 73457 0c2c 981B .short 7064 + 73458 0c2e 483D .short 15688 + 73459 0c30 A01B .short 7072 + 73460 0c32 484D .short 19784 + 73461 0c34 A81B .short 7080 + 73462 0c36 485D .short 23880 + 73463 0c38 B01B .short 7088 + 73464 0c3a 486D .short 27976 + 73465 0c3c B81B .short 7096 + 73466 0c3e 487D .short 32072 + 73467 0c40 C81B .short 7112 + 73468 0c42 481F .short 8008 + 73469 0c44 D01B .short 7120 + 73470 0c46 482F .short 12104 + 73471 0c48 D81B .short 7128 + 73472 0c4a 483F .short 16200 + 73473 0c4c E01B .short 7136 + 73474 0c4e 484F .short 20296 + 73475 0c50 E81B .short 7144 + 73476 0c52 485F .short 24392 + 73477 0c54 F01B .short 7152 + 73478 0c56 486F .short 28488 + 73479 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GAS /tmp/ccLcDeJO.s page 1290 + + + 73512 0c9a 8855 .short 21896 + 73513 0c9c B01C .short 7344 + 73514 0c9e 8865 .short 25992 + 73515 0ca0 B81C .short 7352 + 73516 0ca2 8875 .short 30088 + 73517 0ca4 D01C .short 7376 + 73518 0ca6 8827 .short 10120 + 73519 0ca8 D81C .short 7384 + 73520 0caa 8837 .short 14216 + 73521 0cac E01C .short 7392 + 73522 0cae 8847 .short 18312 + 73523 0cb0 E81C .short 7400 + 73524 0cb2 8857 .short 22408 + 73525 0cb4 F01C .short 7408 + 73526 0cb6 8867 .short 26504 + 73527 0cb8 F81C .short 7416 + 73528 0cba 8877 .short 30600 + 73529 0cbc 101D .short 7440 + 73530 0cbe 8829 .short 10632 + 73531 0cc0 181D .short 7448 + 73532 0cc2 8839 .short 14728 + 73533 0cc4 201D .short 7456 + 73534 0cc6 8849 .short 18824 + 73535 0cc8 281D .short 7464 + 73536 0cca 8859 .short 22920 + 73537 0ccc 301D .short 7472 + 73538 0cce 8869 .short 27016 + 73539 0cd0 381D .short 7480 + 73540 0cd2 8879 .short 31112 + 73541 0cd4 501D .short 7504 + 73542 0cd6 882B .short 11144 + 73543 0cd8 581D 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501F .short 8016 + 73640 0d9a C82B .short 11208 + 73641 0d9c 581F .short 8024 + 73642 0d9e C83B .short 15304 + 73643 0da0 601F .short 8032 + 73644 0da2 C84B .short 19400 + 73645 0da4 681F .short 8040 + 73646 0da6 C85B .short 23496 + 73647 0da8 701F .short 8048 + 73648 0daa C86B .short 27592 + 73649 0dac 781F .short 8056 + 73650 0dae C87B .short 31688 + 73651 0db0 901F .short 8080 + 73652 0db2 C82D .short 11720 + 73653 0db4 981F .short 8088 + 73654 0db6 C83D .short 15816 + 73655 0db8 A01F .short 8096 + 73656 0dba C84D .short 19912 + 73657 0dbc A81F .short 8104 + 73658 0dbe C85D .short 24008 + 73659 0dc0 B01F .short 8112 + 73660 0dc2 C86D .short 28104 + 73661 0dc4 B81F .short 8120 + 73662 0dc6 C87D .short 32200 + 73663 0dc8 D01F .short 8144 + 73664 0dca C82F .short 12232 + 73665 0dcc D81F .short 8152 + 73666 0dce C83F .short 16328 + 73667 0dd0 E01F .short 8160 + 73668 0dd2 C84F .short 20424 + 73669 0dd4 E81F .short 8168 + 73670 0dd6 C85F .short 24520 + 73671 0dd8 F01F .short 8176 + 73672 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A04A .short 19104 + 75097 18fc 6845 .short 17768 + 75098 18fe A05A .short 23200 + 75099 1900 7045 .short 17776 + 75100 1902 A06A .short 27296 + 75101 1904 7845 .short 17784 + 75102 1906 A07A .short 31392 + 75103 1908 A045 .short 17824 + 75104 190a A04C .short 19616 + 75105 190c A845 .short 17832 + 75106 190e A05C .short 23712 + 75107 1910 B045 .short 17840 + ARM GAS /tmp/ccLcDeJO.s page 1318 + + + 75108 1912 A06C .short 27808 + 75109 1914 B845 .short 17848 + 75110 1916 A07C .short 31904 + 75111 1918 E045 .short 17888 + 75112 191a A04E .short 20128 + 75113 191c E845 .short 17896 + 75114 191e A05E .short 24224 + 75115 1920 F045 .short 17904 + 75116 1922 A06E .short 28320 + 75117 1924 F845 .short 17912 + 75118 1926 A07E .short 32416 + 75119 1928 2846 .short 17960 + 75120 192a E050 .short 20704 + 75121 192c 3046 .short 17968 + 75122 192e E060 .short 24800 + 75123 1930 3846 .short 17976 + 75124 1932 E070 .short 28896 + 75125 1934 6846 .short 18024 + 75126 1936 E052 .short 21216 + 75127 1938 7046 .short 18032 + 75128 193a E062 .short 25312 + 75129 193c 7846 .short 18040 + 75130 193e E072 .short 29408 + 75131 1940 A846 .short 18088 + 75132 1942 E054 .short 21728 + 75133 1944 B046 .short 18096 + 75134 1946 E064 .short 25824 + 75135 1948 B846 .short 18104 + 75136 194a E074 .short 29920 + 75137 194c E846 .short 18152 + 75138 194e E056 .short 22240 + 75139 1950 F046 .short 18160 + 75140 1952 E066 .short 26336 + 75141 1954 F846 .short 18168 + 75142 1956 E076 .short 30432 + 75143 1958 2047 .short 18208 + 75144 195a E048 .short 18656 + 75145 195c 2847 .short 18216 + 75146 195e E058 .short 22752 + 75147 1960 3047 .short 18224 + 75148 1962 E068 .short 26848 + 75149 1964 3847 .short 18232 + 75150 1966 E078 .short 30944 + 75151 1968 6047 .short 18272 + 75152 196a E04A .short 19168 + 75153 196c 6847 .short 18280 + 75154 196e E05A .short 23264 + 75155 1970 7047 .short 18288 + 75156 1972 E06A .short 27360 + 75157 1974 7847 .short 18296 + 75158 1976 E07A .short 31456 + 75159 1978 A047 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F852 .short 21240 + 75444 1bb2 6876 .short 30312 + 75445 1bb4 2853 .short 21288 + 75446 1bb6 6858 .short 22632 + 75447 1bb8 3053 .short 21296 + 75448 1bba 6868 .short 26728 + 75449 1bbc 3853 .short 21304 + ARM GAS /tmp/ccLcDeJO.s page 1324 + + + 75450 1bbe 6878 .short 30824 + 75451 1bc0 6853 .short 21352 + 75452 1bc2 685A .short 23144 + 75453 1bc4 7053 .short 21360 + 75454 1bc6 686A .short 27240 + 75455 1bc8 7853 .short 21368 + 75456 1bca 687A .short 31336 + 75457 1bcc A853 .short 21416 + 75458 1bce 685C .short 23656 + 75459 1bd0 B053 .short 21424 + 75460 1bd2 686C .short 27752 + 75461 1bd4 B853 .short 21432 + 75462 1bd6 687C .short 31848 + 75463 1bd8 E853 .short 21480 + 75464 1bda 685E .short 24168 + 75465 1bdc F053 .short 21488 + 75466 1bde 686E .short 28264 + 75467 1be0 F853 .short 21496 + 75468 1be2 687E .short 32360 + 75469 1be4 3054 .short 21552 + 75470 1be6 A860 .short 24744 + 75471 1be8 3854 .short 21560 + 75472 1bea A870 .short 28840 + 75473 1bec 7054 .short 21616 + 75474 1bee A862 .short 25256 + 75475 1bf0 7854 .short 21624 + 75476 1bf2 A872 .short 29352 + 75477 1bf4 B054 .short 21680 + 75478 1bf6 A864 .short 25768 + 75479 1bf8 B854 .short 21688 + 75480 1bfa A874 .short 29864 + 75481 1bfc E854 .short 21736 + 75482 1bfe A856 .short 22184 + 75483 1c00 F054 .short 21744 + 75484 1c02 A866 .short 26280 + 75485 1c04 F854 .short 21752 + 75486 1c06 A876 .short 30376 + 75487 1c08 2855 .short 21800 + 75488 1c0a A858 .short 22696 + 75489 1c0c 3055 .short 21808 + 75490 1c0e A868 .short 26792 + 75491 1c10 3855 .short 21816 + 75492 1c12 A878 .short 30888 + 75493 1c14 6855 .short 21864 + 75494 1c16 A85A .short 23208 + 75495 1c18 7055 .short 21872 + 75496 1c1a A86A .short 27304 + 75497 1c1c 7855 .short 21880 + 75498 1c1e A87A .short 31400 + 75499 1c20 A855 .short 21928 + 75500 1c22 A85C .short 23720 + 75501 1c24 B055 .short 21936 + 75502 1c26 A86C .short 27816 + 75503 1c28 B855 .short 21944 + 75504 1c2a A87C .short 31912 + 75505 1c2c E855 .short 21992 + 75506 1c2e A85E .short 24232 + ARM GAS /tmp/ccLcDeJO.s page 1325 + + + 75507 1c30 F055 .short 22000 + 75508 1c32 A86E .short 28328 + 75509 1c34 F855 .short 22008 + 75510 1c36 A87E .short 32424 + 75511 1c38 3056 .short 22064 + 75512 1c3a E860 .short 24808 + 75513 1c3c 3856 .short 22072 + 75514 1c3e E870 .short 28904 + 75515 1c40 7056 .short 22128 + 75516 1c42 E862 .short 25320 + 75517 1c44 7856 .short 22136 + 75518 1c46 E872 .short 29416 + 75519 1c48 B056 .short 22192 + 75520 1c4a E864 .short 25832 + 75521 1c4c B856 .short 22200 + 75522 1c4e E874 .short 29928 + 75523 1c50 F056 .short 22256 + 75524 1c52 E866 .short 26344 + 75525 1c54 F856 .short 22264 + 75526 1c56 E876 .short 30440 + 75527 1c58 2857 .short 22312 + 75528 1c5a E858 .short 22760 + 75529 1c5c 3057 .short 22320 + 75530 1c5e E868 .short 26856 + 75531 1c60 3857 .short 22328 + 75532 1c62 E878 .short 30952 + 75533 1c64 6857 .short 22376 + 75534 1c66 E85A .short 23272 + 75535 1c68 7057 .short 22384 + 75536 1c6a E86A .short 27368 + 75537 1c6c 7857 .short 22392 + 75538 1c6e E87A .short 31464 + 75539 1c70 A857 .short 22440 + 75540 1c72 E85C .short 23784 + 75541 1c74 B057 .short 22448 + 75542 1c76 E86C .short 27880 + 75543 1c78 B857 .short 22456 + 75544 1c7a E87C .short 31976 + 75545 1c7c E857 .short 22504 + 75546 1c7e E85E .short 24296 + 75547 1c80 F057 .short 22512 + 75548 1c82 E86E .short 28392 + 75549 1c84 F857 .short 22520 + 75550 1c86 E87E .short 32488 + 75551 1c88 3058 .short 22576 + 75552 1c8a 2861 .short 24872 + 75553 1c8c 3858 .short 22584 + 75554 1c8e 2871 .short 28968 + 75555 1c90 7058 .short 22640 + 75556 1c92 2863 .short 25384 + 75557 1c94 7858 .short 22648 + 75558 1c96 2873 .short 29480 + 75559 1c98 B058 .short 22704 + 75560 1c9a 2865 .short 25896 + 75561 1c9c B858 .short 22712 + 75562 1c9e 2875 .short 29992 + 75563 1ca0 F058 .short 22768 + ARM GAS /tmp/ccLcDeJO.s page 1326 + + + 75564 1ca2 2867 .short 26408 + 75565 1ca4 F858 .short 22776 + 75566 1ca6 2877 .short 30504 + 75567 1ca8 3059 .short 22832 + 75568 1caa 2869 .short 26920 + 75569 1cac 3859 .short 22840 + 75570 1cae 2879 .short 31016 + 75571 1cb0 6859 .short 22888 + 75572 1cb2 285B .short 23336 + 75573 1cb4 7059 .short 22896 + 75574 1cb6 286B .short 27432 + 75575 1cb8 7859 .short 22904 + 75576 1cba 287B .short 31528 + 75577 1cbc A859 .short 22952 + 75578 1cbe 285D .short 23848 + 75579 1cc0 B059 .short 22960 + 75580 1cc2 286D .short 27944 + 75581 1cc4 B859 .short 22968 + 75582 1cc6 287D .short 32040 + 75583 1cc8 E859 .short 23016 + 75584 1cca 285F .short 24360 + 75585 1ccc F059 .short 23024 + 75586 1cce 286F .short 28456 + 75587 1cd0 F859 .short 23032 + 75588 1cd2 287F .short 32552 + 75589 1cd4 305A .short 23088 + 75590 1cd6 6861 .short 24936 + 75591 1cd8 385A .short 23096 + 75592 1cda 6871 .short 29032 + 75593 1cdc 705A .short 23152 + 75594 1cde 6863 .short 25448 + 75595 1ce0 785A .short 23160 + 75596 1ce2 6873 .short 29544 + 75597 1ce4 B05A .short 23216 + 75598 1ce6 6865 .short 25960 + 75599 1ce8 B85A .short 23224 + 75600 1cea 6875 .short 30056 + 75601 1cec F05A .short 23280 + 75602 1cee 6867 .short 26472 + 75603 1cf0 F85A .short 23288 + 75604 1cf2 6877 .short 30568 + 75605 1cf4 305B .short 23344 + 75606 1cf6 6869 .short 26984 + 75607 1cf8 385B .short 23352 + 75608 1cfa 6879 .short 31080 + 75609 1cfc 705B .short 23408 + 75610 1cfe 686B .short 27496 + 75611 1d00 785B .short 23416 + 75612 1d02 687B .short 31592 + 75613 1d04 A85B .short 23464 + 75614 1d06 685D .short 23912 + 75615 1d08 B05B .short 23472 + 75616 1d0a 686D .short 28008 + 75617 1d0c B85B .short 23480 + 75618 1d0e 687D .short 32104 + 75619 1d10 E85B .short 23528 + 75620 1d12 685F .short 24424 + ARM GAS /tmp/ccLcDeJO.s page 1327 + + + 75621 1d14 F05B .short 23536 + 75622 1d16 686F .short 28520 + 75623 1d18 F85B .short 23544 + 75624 1d1a 687F .short 32616 + 75625 1d1c 305C .short 23600 + 75626 1d1e A861 .short 25000 + 75627 1d20 385C .short 23608 + 75628 1d22 A871 .short 29096 + 75629 1d24 705C .short 23664 + 75630 1d26 A863 .short 25512 + 75631 1d28 785C .short 23672 + 75632 1d2a A873 .short 29608 + 75633 1d2c B05C .short 23728 + 75634 1d2e A865 .short 26024 + 75635 1d30 B85C .short 23736 + 75636 1d32 A875 .short 30120 + 75637 1d34 F05C .short 23792 + 75638 1d36 A867 .short 26536 + 75639 1d38 F85C .short 23800 + 75640 1d3a A877 .short 30632 + 75641 1d3c 305D .short 23856 + 75642 1d3e A869 .short 27048 + 75643 1d40 385D .short 23864 + 75644 1d42 A879 .short 31144 + 75645 1d44 705D .short 23920 + 75646 1d46 A86B .short 27560 + 75647 1d48 785D .short 23928 + 75648 1d4a A87B .short 31656 + 75649 1d4c B05D .short 23984 + 75650 1d4e A86D .short 28072 + 75651 1d50 B85D .short 23992 + 75652 1d52 A87D .short 32168 + 75653 1d54 E85D .short 24040 + 75654 1d56 A85F .short 24488 + 75655 1d58 F05D .short 24048 + 75656 1d5a A86F .short 28584 + 75657 1d5c F85D .short 24056 + 75658 1d5e A87F .short 32680 + 75659 1d60 305E .short 24112 + 75660 1d62 E861 .short 25064 + 75661 1d64 385E .short 24120 + 75662 1d66 E871 .short 29160 + 75663 1d68 705E .short 24176 + 75664 1d6a E863 .short 25576 + 75665 1d6c 785E .short 24184 + 75666 1d6e E873 .short 29672 + 75667 1d70 B05E .short 24240 + 75668 1d72 E865 .short 26088 + 75669 1d74 B85E .short 24248 + 75670 1d76 E875 .short 30184 + 75671 1d78 F05E .short 24304 + 75672 1d7a E867 .short 26600 + 75673 1d7c F85E .short 24312 + 75674 1d7e E877 .short 30696 + 75675 1d80 305F .short 24368 + 75676 1d82 E869 .short 27112 + 75677 1d84 385F .short 24376 + ARM GAS /tmp/ccLcDeJO.s page 1328 + + + 75678 1d86 E879 .short 31208 + 75679 1d88 705F .short 24432 + 75680 1d8a E86B .short 27624 + 75681 1d8c 785F .short 24440 + 75682 1d8e E87B .short 31720 + 75683 1d90 B05F .short 24496 + 75684 1d92 E86D .short 28136 + 75685 1d94 B85F .short 24504 + 75686 1d96 E87D .short 32232 + 75687 1d98 F05F .short 24560 + 75688 1d9a E86F .short 28648 + 75689 1d9c F85F .short 24568 + 75690 1d9e E87F .short 32744 + 75691 1da0 3860 .short 24632 + 75692 1da2 3070 .short 28720 + 75693 1da4 7060 .short 24688 + 75694 1da6 3062 .short 25136 + 75695 1da8 7860 .short 24696 + 75696 1daa 3072 .short 29232 + 75697 1dac B060 .short 24752 + 75698 1dae 3064 .short 25648 + 75699 1db0 B860 .short 24760 + 75700 1db2 3074 .short 29744 + 75701 1db4 F060 .short 24816 + 75702 1db6 3066 .short 26160 + 75703 1db8 F860 .short 24824 + 75704 1dba 3076 .short 30256 + 75705 1dbc 3061 .short 24880 + 75706 1dbe 3068 .short 26672 + 75707 1dc0 3861 .short 24888 + 75708 1dc2 3078 .short 30768 + 75709 1dc4 7061 .short 24944 + 75710 1dc6 306A .short 27184 + 75711 1dc8 7861 .short 24952 + 75712 1dca 307A .short 31280 + 75713 1dcc B061 .short 25008 + 75714 1dce 306C .short 27696 + 75715 1dd0 B861 .short 25016 + 75716 1dd2 307C .short 31792 + 75717 1dd4 F061 .short 25072 + 75718 1dd6 306E .short 28208 + 75719 1dd8 F861 .short 25080 + 75720 1dda 307E .short 32304 + 75721 1ddc 3862 .short 25144 + 75722 1dde 7070 .short 28784 + 75723 1de0 7862 .short 25208 + 75724 1de2 7072 .short 29296 + 75725 1de4 B062 .short 25264 + 75726 1de6 7064 .short 25712 + 75727 1de8 B862 .short 25272 + 75728 1dea 7074 .short 29808 + 75729 1dec F062 .short 25328 + 75730 1dee 7066 .short 26224 + 75731 1df0 F862 .short 25336 + 75732 1df2 7076 .short 30320 + 75733 1df4 3063 .short 25392 + 75734 1df6 7068 .short 26736 + ARM GAS /tmp/ccLcDeJO.s page 1329 + + + 75735 1df8 3863 .short 25400 + 75736 1dfa 7078 .short 30832 + 75737 1dfc 7063 .short 25456 + 75738 1dfe 706A .short 27248 + 75739 1e00 7863 .short 25464 + 75740 1e02 707A .short 31344 + 75741 1e04 B063 .short 25520 + 75742 1e06 706C .short 27760 + 75743 1e08 B863 .short 25528 + 75744 1e0a 707C .short 31856 + 75745 1e0c F063 .short 25584 + 75746 1e0e 706E .short 28272 + 75747 1e10 F863 .short 25592 + 75748 1e12 707E .short 32368 + 75749 1e14 3864 .short 25656 + 75750 1e16 B070 .short 28848 + 75751 1e18 7864 .short 25720 + 75752 1e1a B072 .short 29360 + 75753 1e1c B864 .short 25784 + 75754 1e1e B074 .short 29872 + 75755 1e20 F064 .short 25840 + 75756 1e22 B066 .short 26288 + 75757 1e24 F864 .short 25848 + 75758 1e26 B076 .short 30384 + 75759 1e28 3065 .short 25904 + 75760 1e2a B068 .short 26800 + 75761 1e2c 3865 .short 25912 + 75762 1e2e B078 .short 30896 + 75763 1e30 7065 .short 25968 + 75764 1e32 B06A .short 27312 + 75765 1e34 7865 .short 25976 + 75766 1e36 B07A .short 31408 + 75767 1e38 B065 .short 26032 + 75768 1e3a B06C .short 27824 + 75769 1e3c B865 .short 26040 + 75770 1e3e B07C .short 31920 + 75771 1e40 F065 .short 26096 + 75772 1e42 B06E .short 28336 + 75773 1e44 F865 .short 26104 + 75774 1e46 B07E .short 32432 + 75775 1e48 3866 .short 26168 + 75776 1e4a F070 .short 28912 + 75777 1e4c 7866 .short 26232 + 75778 1e4e F072 .short 29424 + 75779 1e50 B866 .short 26296 + 75780 1e52 F074 .short 29936 + 75781 1e54 F866 .short 26360 + 75782 1e56 F076 .short 30448 + 75783 1e58 3067 .short 26416 + 75784 1e5a F068 .short 26864 + 75785 1e5c 3867 .short 26424 + 75786 1e5e F078 .short 30960 + 75787 1e60 7067 .short 26480 + 75788 1e62 F06A .short 27376 + 75789 1e64 7867 .short 26488 + 75790 1e66 F07A .short 31472 + 75791 1e68 B067 .short 26544 + ARM GAS /tmp/ccLcDeJO.s page 1330 + + + 75792 1e6a F06C .short 27888 + 75793 1e6c B867 .short 26552 + 75794 1e6e F07C .short 31984 + 75795 1e70 F067 .short 26608 + 75796 1e72 F06E .short 28400 + 75797 1e74 F867 .short 26616 + 75798 1e76 F07E .short 32496 + 75799 1e78 3868 .short 26680 + 75800 1e7a 3071 .short 28976 + 75801 1e7c 7868 .short 26744 + 75802 1e7e 3073 .short 29488 + 75803 1e80 B868 .short 26808 + 75804 1e82 3075 .short 30000 + 75805 1e84 F868 .short 26872 + 75806 1e86 3077 .short 30512 + 75807 1e88 3869 .short 26936 + 75808 1e8a 3079 .short 31024 + 75809 1e8c 7069 .short 26992 + 75810 1e8e 306B .short 27440 + 75811 1e90 7869 .short 27000 + 75812 1e92 307B .short 31536 + 75813 1e94 B069 .short 27056 + 75814 1e96 306D .short 27952 + 75815 1e98 B869 .short 27064 + 75816 1e9a 307D .short 32048 + 75817 1e9c F069 .short 27120 + 75818 1e9e 306F .short 28464 + 75819 1ea0 F869 .short 27128 + 75820 1ea2 307F .short 32560 + 75821 1ea4 386A .short 27192 + 75822 1ea6 7071 .short 29040 + 75823 1ea8 786A .short 27256 + 75824 1eaa 7073 .short 29552 + 75825 1eac B86A .short 27320 + 75826 1eae 7075 .short 30064 + 75827 1eb0 F86A .short 27384 + 75828 1eb2 7077 .short 30576 + 75829 1eb4 386B .short 27448 + 75830 1eb6 7079 .short 31088 + 75831 1eb8 786B .short 27512 + 75832 1eba 707B .short 31600 + 75833 1ebc B06B .short 27568 + 75834 1ebe 706D .short 28016 + 75835 1ec0 B86B .short 27576 + 75836 1ec2 707D .short 32112 + 75837 1ec4 F06B .short 27632 + 75838 1ec6 706F .short 28528 + 75839 1ec8 F86B .short 27640 + 75840 1eca 707F .short 32624 + 75841 1ecc 386C .short 27704 + 75842 1ece B071 .short 29104 + 75843 1ed0 786C .short 27768 + 75844 1ed2 B073 .short 29616 + 75845 1ed4 B86C .short 27832 + 75846 1ed6 B075 .short 30128 + 75847 1ed8 F86C .short 27896 + 75848 1eda B077 .short 30640 + ARM GAS /tmp/ccLcDeJO.s page 1331 + + + 75849 1edc 386D .short 27960 + 75850 1ede B079 .short 31152 + 75851 1ee0 786D .short 28024 + 75852 1ee2 B07B .short 31664 + 75853 1ee4 B86D .short 28088 + 75854 1ee6 B07D .short 32176 + 75855 1ee8 F06D .short 28144 + 75856 1eea B06F .short 28592 + 75857 1eec F86D .short 28152 + 75858 1eee B07F .short 32688 + 75859 1ef0 386E .short 28216 + 75860 1ef2 F071 .short 29168 + 75861 1ef4 786E .short 28280 + 75862 1ef6 F073 .short 29680 + 75863 1ef8 B86E .short 28344 + 75864 1efa F075 .short 30192 + 75865 1efc F86E .short 28408 + 75866 1efe F077 .short 30704 + 75867 1f00 386F .short 28472 + 75868 1f02 F079 .short 31216 + 75869 1f04 786F .short 28536 + 75870 1f06 F07B .short 31728 + 75871 1f08 B86F .short 28600 + 75872 1f0a F07D .short 32240 + 75873 1f0c F86F .short 28664 + 75874 1f0e F07F .short 32752 + 75875 1f10 7870 .short 28792 + 75876 1f12 3872 .short 29240 + 75877 1f14 B870 .short 28856 + 75878 1f16 3874 .short 29752 + 75879 1f18 F870 .short 28920 + 75880 1f1a 3876 .short 30264 + 75881 1f1c 3871 .short 28984 + 75882 1f1e 3878 .short 30776 + 75883 1f20 7871 .short 29048 + 75884 1f22 387A .short 31288 + 75885 1f24 B871 .short 29112 + 75886 1f26 387C .short 31800 + 75887 1f28 F871 .short 29176 + 75888 1f2a 387E .short 32312 + 75889 1f2c B872 .short 29368 + 75890 1f2e 7874 .short 29816 + 75891 1f30 F872 .short 29432 + 75892 1f32 7876 .short 30328 + 75893 1f34 3873 .short 29496 + 75894 1f36 7878 .short 30840 + 75895 1f38 7873 .short 29560 + 75896 1f3a 787A .short 31352 + 75897 1f3c B873 .short 29624 + 75898 1f3e 787C .short 31864 + 75899 1f40 F873 .short 29688 + 75900 1f42 787E .short 32376 + 75901 1f44 F874 .short 29944 + 75902 1f46 B876 .short 30392 + 75903 1f48 3875 .short 30008 + 75904 1f4a B878 .short 30904 + 75905 1f4c 7875 .short 30072 + ARM GAS /tmp/ccLcDeJO.s page 1332 + + + 75906 1f4e B87A .short 31416 + 75907 1f50 B875 .short 30136 + 75908 1f52 B87C .short 31928 + 75909 1f54 F875 .short 30200 + 75910 1f56 B87E .short 32440 + 75911 1f58 3877 .short 30520 + 75912 1f5a F878 .short 30968 + 75913 1f5c 7877 .short 30584 + 75914 1f5e F87A .short 31480 + 75915 1f60 B877 .short 30648 + 75916 1f62 F87C .short 31992 + 75917 1f64 F877 .short 30712 + 75918 1f66 F87E .short 32504 + 75919 1f68 7879 .short 31096 + 75920 1f6a 387B .short 31544 + 75921 1f6c B879 .short 31160 + 75922 1f6e 387D .short 32056 + 75923 1f70 F879 .short 31224 + 75924 1f72 387F .short 32568 + 75925 1f74 B87B .short 31672 + 75926 1f76 787D .short 32120 + 75927 1f78 F87B .short 31736 + 75928 1f7a 787F .short 32632 + 75929 1f7c F87D .short 32248 + 75930 1f7e B87F .short 32696 + 75931 .section .rodata.armBitRevIndexTable512,"a" + 75932 .align 2 + 75935 armBitRevIndexTable512: + 75936 0000 0800 .short 8 + 75937 0002 0002 .short 512 + 75938 0004 1000 .short 16 + 75939 0006 0004 .short 1024 + 75940 0008 1800 .short 24 + 75941 000a 0006 .short 1536 + 75942 000c 2000 .short 32 + 75943 000e 0008 .short 2048 + 75944 0010 2800 .short 40 + 75945 0012 000A .short 2560 + 75946 0014 3000 .short 48 + 75947 0016 000C .short 3072 + 75948 0018 3800 .short 56 + 75949 001a 000E .short 3584 + 75950 001c 4800 .short 72 + 75951 001e 4002 .short 576 + 75952 0020 5000 .short 80 + 75953 0022 4004 .short 1088 + 75954 0024 5800 .short 88 + 75955 0026 4006 .short 1600 + 75956 0028 6000 .short 96 + 75957 002a 4008 .short 2112 + 75958 002c 6800 .short 104 + 75959 002e 400A .short 2624 + 75960 0030 7000 .short 112 + 75961 0032 400C .short 3136 + 75962 0034 7800 .short 120 + 75963 0036 400E .short 3648 + 75964 0038 8800 .short 136 + ARM GAS /tmp/ccLcDeJO.s page 1333 + + + 75965 003a 8002 .short 640 + 75966 003c 9000 .short 144 + 75967 003e 8004 .short 1152 + 75968 0040 9800 .short 152 + 75969 0042 8006 .short 1664 + 75970 0044 A000 .short 160 + 75971 0046 8008 .short 2176 + 75972 0048 A800 .short 168 + 75973 004a 800A .short 2688 + 75974 004c B000 .short 176 + 75975 004e 800C .short 3200 + 75976 0050 B800 .short 184 + 75977 0052 800E .short 3712 + 75978 0054 C800 .short 200 + 75979 0056 C002 .short 704 + 75980 0058 D000 .short 208 + 75981 005a C004 .short 1216 + 75982 005c D800 .short 216 + 75983 005e C006 .short 1728 + 75984 0060 E000 .short 224 + 75985 0062 C008 .short 2240 + 75986 0064 E800 .short 232 + 75987 0066 C00A .short 2752 + 75988 0068 F000 .short 240 + 75989 006a C00C .short 3264 + 75990 006c F800 .short 248 + 75991 006e C00E .short 3776 + 75992 0070 0801 .short 264 + 75993 0072 0003 .short 768 + 75994 0074 1001 .short 272 + 75995 0076 0005 .short 1280 + 75996 0078 1801 .short 280 + 75997 007a 0007 .short 1792 + 75998 007c 2001 .short 288 + 75999 007e 0009 .short 2304 + 76000 0080 2801 .short 296 + 76001 0082 000B .short 2816 + 76002 0084 3001 .short 304 + 76003 0086 000D .short 3328 + 76004 0088 3801 .short 312 + 76005 008a 000F .short 3840 + 76006 008c 4801 .short 328 + 76007 008e 4003 .short 832 + 76008 0090 5001 .short 336 + 76009 0092 4005 .short 1344 + 76010 0094 5801 .short 344 + 76011 0096 4007 .short 1856 + 76012 0098 6001 .short 352 + 76013 009a 4009 .short 2368 + 76014 009c 6801 .short 360 + 76015 009e 400B .short 2880 + 76016 00a0 7001 .short 368 + 76017 00a2 400D .short 3392 + 76018 00a4 7801 .short 376 + 76019 00a6 400F .short 3904 + 76020 00a8 8801 .short 392 + 76021 00aa 8003 .short 896 + ARM GAS /tmp/ccLcDeJO.s page 1334 + + + 76022 00ac 9001 .short 400 + 76023 00ae 8005 .short 1408 + 76024 00b0 9801 .short 408 + 76025 00b2 8007 .short 1920 + 76026 00b4 A001 .short 416 + 76027 00b6 8009 .short 2432 + 76028 00b8 A801 .short 424 + 76029 00ba 800B .short 2944 + 76030 00bc B001 .short 432 + 76031 00be 800D .short 3456 + 76032 00c0 B801 .short 440 + 76033 00c2 800F .short 3968 + 76034 00c4 C801 .short 456 + 76035 00c6 C003 .short 960 + 76036 00c8 D001 .short 464 + 76037 00ca C005 .short 1472 + 76038 00cc D801 .short 472 + 76039 00ce C007 .short 1984 + 76040 00d0 E001 .short 480 + 76041 00d2 C009 .short 2496 + 76042 00d4 E801 .short 488 + 76043 00d6 C00B .short 3008 + 76044 00d8 F001 .short 496 + 76045 00da C00D .short 3520 + 76046 00dc F801 .short 504 + 76047 00de C00F .short 4032 + 76048 00e0 1002 .short 528 + 76049 00e2 0804 .short 1032 + 76050 00e4 1802 .short 536 + 76051 00e6 0806 .short 1544 + 76052 00e8 2002 .short 544 + 76053 00ea 0808 .short 2056 + 76054 00ec 2802 .short 552 + 76055 00ee 080A .short 2568 + 76056 00f0 3002 .short 560 + 76057 00f2 080C .short 3080 + 76058 00f4 3802 .short 568 + 76059 00f6 080E .short 3592 + 76060 00f8 5002 .short 592 + 76061 00fa 4804 .short 1096 + 76062 00fc 5802 .short 600 + 76063 00fe 4806 .short 1608 + 76064 0100 6002 .short 608 + 76065 0102 4808 .short 2120 + 76066 0104 6802 .short 616 + 76067 0106 480A .short 2632 + 76068 0108 7002 .short 624 + 76069 010a 480C .short 3144 + 76070 010c 7802 .short 632 + 76071 010e 480E .short 3656 + 76072 0110 9002 .short 656 + 76073 0112 8804 .short 1160 + 76074 0114 9802 .short 664 + 76075 0116 8806 .short 1672 + 76076 0118 A002 .short 672 + 76077 011a 8808 .short 2184 + 76078 011c A802 .short 680 + ARM GAS /tmp/ccLcDeJO.s page 1335 + + + 76079 011e 880A .short 2696 + 76080 0120 B002 .short 688 + 76081 0122 880C .short 3208 + 76082 0124 B802 .short 696 + 76083 0126 880E .short 3720 + 76084 0128 D002 .short 720 + 76085 012a C804 .short 1224 + 76086 012c D802 .short 728 + 76087 012e C806 .short 1736 + 76088 0130 E002 .short 736 + 76089 0132 C808 .short 2248 + 76090 0134 E802 .short 744 + 76091 0136 C80A .short 2760 + 76092 0138 F002 .short 752 + 76093 013a C80C .short 3272 + 76094 013c F802 .short 760 + 76095 013e C80E .short 3784 + 76096 0140 1003 .short 784 + 76097 0142 0805 .short 1288 + 76098 0144 1803 .short 792 + 76099 0146 0807 .short 1800 + 76100 0148 2003 .short 800 + 76101 014a 0809 .short 2312 + 76102 014c 2803 .short 808 + 76103 014e 080B .short 2824 + 76104 0150 3003 .short 816 + 76105 0152 080D .short 3336 + 76106 0154 3803 .short 824 + 76107 0156 080F .short 3848 + 76108 0158 5003 .short 848 + 76109 015a 4805 .short 1352 + 76110 015c 5803 .short 856 + 76111 015e 4807 .short 1864 + 76112 0160 6003 .short 864 + 76113 0162 4809 .short 2376 + 76114 0164 6803 .short 872 + 76115 0166 480B .short 2888 + 76116 0168 7003 .short 880 + 76117 016a 480D .short 3400 + 76118 016c 7803 .short 888 + 76119 016e 480F .short 3912 + 76120 0170 9003 .short 912 + 76121 0172 8805 .short 1416 + 76122 0174 9803 .short 920 + 76123 0176 8807 .short 1928 + 76124 0178 A003 .short 928 + 76125 017a 8809 .short 2440 + 76126 017c A803 .short 936 + 76127 017e 880B .short 2952 + 76128 0180 B003 .short 944 + 76129 0182 880D .short 3464 + 76130 0184 B803 .short 952 + 76131 0186 880F .short 3976 + 76132 0188 D003 .short 976 + 76133 018a C805 .short 1480 + 76134 018c D803 .short 984 + 76135 018e C807 .short 1992 + ARM GAS /tmp/ccLcDeJO.s page 1336 + + + 76136 0190 E003 .short 992 + 76137 0192 C809 .short 2504 + 76138 0194 E803 .short 1000 + 76139 0196 C80B .short 3016 + 76140 0198 F003 .short 1008 + 76141 019a C80D .short 3528 + 76142 019c F803 .short 1016 + 76143 019e C80F .short 4040 + 76144 01a0 1804 .short 1048 + 76145 01a2 1006 .short 1552 + 76146 01a4 2004 .short 1056 + 76147 01a6 1008 .short 2064 + 76148 01a8 2804 .short 1064 + 76149 01aa 100A .short 2576 + 76150 01ac 3004 .short 1072 + 76151 01ae 100C .short 3088 + 76152 01b0 3804 .short 1080 + 76153 01b2 100E .short 3600 + 76154 01b4 5804 .short 1112 + 76155 01b6 5006 .short 1616 + 76156 01b8 6004 .short 1120 + 76157 01ba 5008 .short 2128 + 76158 01bc 6804 .short 1128 + 76159 01be 500A .short 2640 + 76160 01c0 7004 .short 1136 + 76161 01c2 500C .short 3152 + 76162 01c4 7804 .short 1144 + 76163 01c6 500E .short 3664 + 76164 01c8 9804 .short 1176 + 76165 01ca 9006 .short 1680 + 76166 01cc A004 .short 1184 + 76167 01ce 9008 .short 2192 + 76168 01d0 A804 .short 1192 + 76169 01d2 900A .short 2704 + 76170 01d4 B004 .short 1200 + 76171 01d6 900C .short 3216 + 76172 01d8 B804 .short 1208 + 76173 01da 900E .short 3728 + 76174 01dc D804 .short 1240 + 76175 01de D006 .short 1744 + 76176 01e0 E004 .short 1248 + 76177 01e2 D008 .short 2256 + 76178 01e4 E804 .short 1256 + 76179 01e6 D00A .short 2768 + 76180 01e8 F004 .short 1264 + 76181 01ea D00C .short 3280 + 76182 01ec F804 .short 1272 + 76183 01ee D00E .short 3792 + 76184 01f0 1805 .short 1304 + 76185 01f2 1007 .short 1808 + 76186 01f4 2005 .short 1312 + 76187 01f6 1009 .short 2320 + 76188 01f8 2805 .short 1320 + 76189 01fa 100B .short 2832 + 76190 01fc 3005 .short 1328 + 76191 01fe 100D .short 3344 + 76192 0200 3805 .short 1336 + ARM GAS /tmp/ccLcDeJO.s page 1337 + + + 76193 0202 100F .short 3856 + 76194 0204 5805 .short 1368 + 76195 0206 5007 .short 1872 + 76196 0208 6005 .short 1376 + 76197 020a 5009 .short 2384 + 76198 020c 6805 .short 1384 + 76199 020e 500B .short 2896 + 76200 0210 7005 .short 1392 + 76201 0212 500D .short 3408 + 76202 0214 7805 .short 1400 + 76203 0216 500F .short 3920 + 76204 0218 9805 .short 1432 + 76205 021a 9007 .short 1936 + 76206 021c A005 .short 1440 + 76207 021e 9009 .short 2448 + 76208 0220 A805 .short 1448 + 76209 0222 900B .short 2960 + 76210 0224 B005 .short 1456 + 76211 0226 900D .short 3472 + 76212 0228 B805 .short 1464 + 76213 022a 900F .short 3984 + 76214 022c D805 .short 1496 + 76215 022e D007 .short 2000 + 76216 0230 E005 .short 1504 + 76217 0232 D009 .short 2512 + 76218 0234 E805 .short 1512 + 76219 0236 D00B .short 3024 + 76220 0238 F005 .short 1520 + 76221 023a D00D .short 3536 + 76222 023c F805 .short 1528 + 76223 023e D00F .short 4048 + 76224 0240 2006 .short 1568 + 76225 0242 1808 .short 2072 + 76226 0244 2806 .short 1576 + 76227 0246 180A .short 2584 + 76228 0248 3006 .short 1584 + 76229 024a 180C .short 3096 + 76230 024c 3806 .short 1592 + 76231 024e 180E .short 3608 + 76232 0250 6006 .short 1632 + 76233 0252 5808 .short 2136 + 76234 0254 6806 .short 1640 + 76235 0256 580A .short 2648 + 76236 0258 7006 .short 1648 + 76237 025a 580C .short 3160 + 76238 025c 7806 .short 1656 + 76239 025e 580E .short 3672 + 76240 0260 A006 .short 1696 + 76241 0262 9808 .short 2200 + 76242 0264 A806 .short 1704 + 76243 0266 980A .short 2712 + 76244 0268 B006 .short 1712 + 76245 026a 980C .short 3224 + 76246 026c B806 .short 1720 + 76247 026e 980E .short 3736 + 76248 0270 E006 .short 1760 + 76249 0272 D808 .short 2264 + ARM GAS /tmp/ccLcDeJO.s page 1338 + + + 76250 0274 E806 .short 1768 + 76251 0276 D80A .short 2776 + 76252 0278 F006 .short 1776 + 76253 027a D80C .short 3288 + 76254 027c F806 .short 1784 + 76255 027e D80E .short 3800 + 76256 0280 2007 .short 1824 + 76257 0282 1809 .short 2328 + 76258 0284 2807 .short 1832 + 76259 0286 180B .short 2840 + 76260 0288 3007 .short 1840 + 76261 028a 180D .short 3352 + 76262 028c 3807 .short 1848 + 76263 028e 180F .short 3864 + 76264 0290 6007 .short 1888 + 76265 0292 5809 .short 2392 + 76266 0294 6807 .short 1896 + 76267 0296 580B .short 2904 + 76268 0298 7007 .short 1904 + 76269 029a 580D .short 3416 + 76270 029c 7807 .short 1912 + 76271 029e 580F .short 3928 + 76272 02a0 A007 .short 1952 + 76273 02a2 9809 .short 2456 + 76274 02a4 A807 .short 1960 + 76275 02a6 980B .short 2968 + 76276 02a8 B007 .short 1968 + 76277 02aa 980D .short 3480 + 76278 02ac B807 .short 1976 + 76279 02ae 980F .short 3992 + 76280 02b0 E007 .short 2016 + 76281 02b2 D809 .short 2520 + 76282 02b4 E807 .short 2024 + 76283 02b6 D80B .short 3032 + 76284 02b8 F007 .short 2032 + 76285 02ba D80D .short 3544 + 76286 02bc F807 .short 2040 + 76287 02be D80F .short 4056 + 76288 02c0 2808 .short 2088 + 76289 02c2 200A .short 2592 + 76290 02c4 3008 .short 2096 + 76291 02c6 200C .short 3104 + 76292 02c8 3808 .short 2104 + 76293 02ca 200E .short 3616 + 76294 02cc 6808 .short 2152 + 76295 02ce 600A .short 2656 + 76296 02d0 7008 .short 2160 + 76297 02d2 600C .short 3168 + 76298 02d4 7808 .short 2168 + 76299 02d6 600E .short 3680 + 76300 02d8 A808 .short 2216 + 76301 02da A00A .short 2720 + 76302 02dc B008 .short 2224 + 76303 02de A00C .short 3232 + 76304 02e0 B808 .short 2232 + 76305 02e2 A00E .short 3744 + 76306 02e4 E808 .short 2280 + ARM GAS /tmp/ccLcDeJO.s page 1339 + + + 76307 02e6 E00A .short 2784 + 76308 02e8 F008 .short 2288 + 76309 02ea E00C .short 3296 + 76310 02ec F808 .short 2296 + 76311 02ee E00E .short 3808 + 76312 02f0 2809 .short 2344 + 76313 02f2 200B .short 2848 + 76314 02f4 3009 .short 2352 + 76315 02f6 200D .short 3360 + 76316 02f8 3809 .short 2360 + 76317 02fa 200F .short 3872 + 76318 02fc 6809 .short 2408 + 76319 02fe 600B .short 2912 + 76320 0300 7009 .short 2416 + 76321 0302 600D .short 3424 + 76322 0304 7809 .short 2424 + 76323 0306 600F .short 3936 + 76324 0308 A809 .short 2472 + 76325 030a A00B .short 2976 + 76326 030c B009 .short 2480 + 76327 030e A00D .short 3488 + 76328 0310 B809 .short 2488 + 76329 0312 A00F .short 4000 + 76330 0314 E809 .short 2536 + 76331 0316 E00B .short 3040 + 76332 0318 F009 .short 2544 + 76333 031a E00D .short 3552 + 76334 031c F809 .short 2552 + 76335 031e E00F .short 4064 + 76336 0320 300A .short 2608 + 76337 0322 280C .short 3112 + 76338 0324 380A .short 2616 + 76339 0326 280E .short 3624 + 76340 0328 700A .short 2672 + 76341 032a 680C .short 3176 + 76342 032c 780A .short 2680 + 76343 032e 680E .short 3688 + 76344 0330 B00A .short 2736 + 76345 0332 A80C .short 3240 + 76346 0334 B80A .short 2744 + 76347 0336 A80E .short 3752 + 76348 0338 F00A .short 2800 + 76349 033a E80C .short 3304 + 76350 033c F80A .short 2808 + 76351 033e E80E .short 3816 + 76352 0340 300B .short 2864 + 76353 0342 280D .short 3368 + 76354 0344 380B .short 2872 + 76355 0346 280F .short 3880 + 76356 0348 700B .short 2928 + 76357 034a 680D .short 3432 + 76358 034c 780B .short 2936 + 76359 034e 680F .short 3944 + 76360 0350 B00B .short 2992 + 76361 0352 A80D .short 3496 + 76362 0354 B80B .short 3000 + 76363 0356 A80F .short 4008 + ARM GAS /tmp/ccLcDeJO.s page 1340 + + + 76364 0358 F00B .short 3056 + 76365 035a E80D .short 3560 + 76366 035c F80B .short 3064 + 76367 035e E80F .short 4072 + 76368 0360 380C .short 3128 + 76369 0362 300E .short 3632 + 76370 0364 780C .short 3192 + 76371 0366 700E .short 3696 + 76372 0368 B80C .short 3256 + 76373 036a B00E .short 3760 + 76374 036c F80C .short 3320 + 76375 036e F00E .short 3824 + 76376 0370 380D .short 3384 + 76377 0372 300F .short 3888 + 76378 0374 780D .short 3448 + 76379 0376 700F .short 3952 + 76380 0378 B80D .short 3512 + 76381 037a B00F .short 4016 + 76382 037c F80D .short 3576 + 76383 037e F00F .short 4080 + 76384 .section .rodata.armBitRevIndexTable64,"a" + 76385 .align 2 + 76388 armBitRevIndexTable64: + 76389 0000 0800 .short 8 + 76390 0002 4000 .short 64 + 76391 0004 1000 .short 16 + 76392 0006 8000 .short 128 + 76393 0008 1800 .short 24 + 76394 000a C000 .short 192 + 76395 000c 2000 .short 32 + 76396 000e 0001 .short 256 + 76397 0010 2800 .short 40 + 76398 0012 4001 .short 320 + 76399 0014 3000 .short 48 + 76400 0016 8001 .short 384 + 76401 0018 3800 .short 56 + 76402 001a C001 .short 448 + 76403 001c 5000 .short 80 + 76404 001e 8800 .short 136 + 76405 0020 5800 .short 88 + 76406 0022 C800 .short 200 + 76407 0024 6000 .short 96 + 76408 0026 0801 .short 264 + 76409 0028 6800 .short 104 + 76410 002a 4801 .short 328 + 76411 002c 7000 .short 112 + 76412 002e 8801 .short 392 + 76413 0030 7800 .short 120 + 76414 0032 C801 .short 456 + 76415 0034 9800 .short 152 + 76416 0036 D000 .short 208 + 76417 0038 A000 .short 160 + 76418 003a 1001 .short 272 + 76419 003c A800 .short 168 + 76420 003e 5001 .short 336 + 76421 0040 B000 .short 176 + 76422 0042 9001 .short 400 + ARM GAS /tmp/ccLcDeJO.s page 1341 + + + 76423 0044 B800 .short 184 + 76424 0046 D001 .short 464 + 76425 0048 E000 .short 224 + 76426 004a 1801 .short 280 + 76427 004c E800 .short 232 + 76428 004e 5801 .short 344 + 76429 0050 F000 .short 240 + 76430 0052 9801 .short 408 + 76431 0054 F800 .short 248 + 76432 0056 D801 .short 472 + 76433 0058 2801 .short 296 + 76434 005a 6001 .short 352 + 76435 005c 3001 .short 304 + 76436 005e A001 .short 416 + 76437 0060 3801 .short 312 + 76438 0062 E001 .short 480 + 76439 0064 7001 .short 368 + 76440 0066 A801 .short 424 + 76441 0068 7801 .short 376 + 76442 006a E801 .short 488 + 76443 006c B801 .short 440 + 76444 006e F001 .short 496 + 76445 .section .rodata.armBitRevIndexTableF64_1024,"a" + 76446 .align 2 + 76449 armBitRevIndexTableF64_1024: + 76450 0000 0800 .short 8 + 76451 0002 0010 .short 4096 + 76452 0004 1000 .short 16 + 76453 0006 0008 .short 2048 + 76454 0008 1800 .short 24 + 76455 000a 0018 .short 6144 + 76456 000c 2000 .short 32 + 76457 000e 0004 .short 1024 + 76458 0010 2800 .short 40 + 76459 0012 0014 .short 5120 + 76460 0014 3000 .short 48 + 76461 0016 000C .short 3072 + 76462 0018 3800 .short 56 + 76463 001a 001C .short 7168 + 76464 001c 4000 .short 64 + 76465 001e 0002 .short 512 + 76466 0020 4800 .short 72 + 76467 0022 0012 .short 4608 + 76468 0024 5000 .short 80 + 76469 0026 000A .short 2560 + 76470 0028 5800 .short 88 + 76471 002a 001A .short 6656 + 76472 002c 6000 .short 96 + 76473 002e 0006 .short 1536 + 76474 0030 6800 .short 104 + 76475 0032 0016 .short 5632 + 76476 0034 7000 .short 112 + 76477 0036 000E .short 3584 + 76478 0038 7800 .short 120 + 76479 003a 001E .short 7680 + 76480 003c 8000 .short 128 + 76481 003e 0001 .short 256 + ARM GAS /tmp/ccLcDeJO.s page 1342 + + + 76482 0040 8800 .short 136 + 76483 0042 0011 .short 4352 + 76484 0044 9000 .short 144 + 76485 0046 0009 .short 2304 + 76486 0048 9800 .short 152 + 76487 004a 0019 .short 6400 + 76488 004c A000 .short 160 + 76489 004e 0005 .short 1280 + 76490 0050 A800 .short 168 + 76491 0052 0015 .short 5376 + 76492 0054 B000 .short 176 + 76493 0056 000D .short 3328 + 76494 0058 B800 .short 184 + 76495 005a 001D .short 7424 + 76496 005c C000 .short 192 + 76497 005e 0003 .short 768 + 76498 0060 C800 .short 200 + 76499 0062 0013 .short 4864 + 76500 0064 D000 .short 208 + 76501 0066 000B .short 2816 + 76502 0068 D800 .short 216 + 76503 006a 001B .short 6912 + 76504 006c E000 .short 224 + 76505 006e 0007 .short 1792 + 76506 0070 E800 .short 232 + 76507 0072 0017 .short 5888 + 76508 0074 F000 .short 240 + 76509 0076 000F .short 3840 + 76510 0078 F800 .short 248 + 76511 007a 001F .short 7936 + 76512 007c 0801 .short 264 + 76513 007e 8010 .short 4224 + 76514 0080 1001 .short 272 + 76515 0082 8008 .short 2176 + 76516 0084 1801 .short 280 + 76517 0086 8018 .short 6272 + 76518 0088 2001 .short 288 + 76519 008a 8004 .short 1152 + 76520 008c 2801 .short 296 + 76521 008e 8014 .short 5248 + 76522 0090 3001 .short 304 + 76523 0092 800C .short 3200 + 76524 0094 3801 .short 312 + 76525 0096 801C .short 7296 + 76526 0098 4001 .short 320 + 76527 009a 8002 .short 640 + 76528 009c 4801 .short 328 + 76529 009e 8012 .short 4736 + 76530 00a0 5001 .short 336 + 76531 00a2 800A .short 2688 + 76532 00a4 5801 .short 344 + 76533 00a6 801A .short 6784 + 76534 00a8 6001 .short 352 + 76535 00aa 8006 .short 1664 + 76536 00ac 6801 .short 360 + 76537 00ae 8016 .short 5760 + 76538 00b0 7001 .short 368 + ARM GAS /tmp/ccLcDeJO.s page 1343 + + + 76539 00b2 800E .short 3712 + 76540 00b4 7801 .short 376 + 76541 00b6 801E .short 7808 + 76542 00b8 8801 .short 392 + 76543 00ba 8011 .short 4480 + 76544 00bc 9001 .short 400 + 76545 00be 8009 .short 2432 + 76546 00c0 9801 .short 408 + 76547 00c2 8019 .short 6528 + 76548 00c4 A001 .short 416 + 76549 00c6 8005 .short 1408 + 76550 00c8 A801 .short 424 + 76551 00ca 8015 .short 5504 + 76552 00cc B001 .short 432 + 76553 00ce 800D .short 3456 + 76554 00d0 B801 .short 440 + 76555 00d2 801D .short 7552 + 76556 00d4 C001 .short 448 + 76557 00d6 8003 .short 896 + 76558 00d8 C801 .short 456 + 76559 00da 8013 .short 4992 + 76560 00dc D001 .short 464 + 76561 00de 800B .short 2944 + 76562 00e0 D801 .short 472 + 76563 00e2 801B .short 7040 + 76564 00e4 E001 .short 480 + 76565 00e6 8007 .short 1920 + 76566 00e8 E801 .short 488 + 76567 00ea 8017 .short 6016 + 76568 00ec F001 .short 496 + 76569 00ee 800F .short 3968 + 76570 00f0 F801 .short 504 + 76571 00f2 801F .short 8064 + 76572 00f4 0802 .short 520 + 76573 00f6 4010 .short 4160 + 76574 00f8 1002 .short 528 + 76575 00fa 4008 .short 2112 + 76576 00fc 1802 .short 536 + 76577 00fe 4018 .short 6208 + 76578 0100 2002 .short 544 + 76579 0102 4004 .short 1088 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F00E .short 3824 + 77167 059a 700F .short 3952 + 77168 059c F80E .short 3832 + 77169 059e 701F .short 8048 + 77170 05a0 080F .short 3848 + 77171 05a2 F010 .short 4336 + 77172 05a4 180F .short 3864 + 77173 05a6 F018 .short 6384 + 77174 05a8 280F .short 3880 + 77175 05aa F014 .short 5360 + 77176 05ac 380F .short 3896 + 77177 05ae F01C .short 7408 + 77178 05b0 480F .short 3912 + 77179 05b2 F012 .short 4848 + 77180 05b4 580F .short 3928 + 77181 05b6 F01A .short 6896 + 77182 05b8 680F .short 3944 + 77183 05ba F016 .short 5872 + 77184 05bc 780F .short 3960 + 77185 05be F01E .short 7920 + 77186 05c0 880F .short 3976 + 77187 05c2 F011 .short 4592 + 77188 05c4 980F .short 3992 + 77189 05c6 F019 .short 6640 + 77190 05c8 A80F .short 4008 + 77191 05ca F015 .short 5616 + 77192 05cc B80F .short 4024 + 77193 05ce F01D .short 7664 + 77194 05d0 C80F .short 4040 + 77195 05d2 F013 .short 5104 + 77196 05d4 D80F .short 4056 + 77197 05d6 F01B .short 7152 + 77198 05d8 E80F .short 4072 + 77199 05da F017 .short 6128 + 77200 05dc F80F .short 4088 + 77201 05de F01F .short 8176 + 77202 05e0 1810 .short 4120 + 77203 05e2 0818 .short 6152 + 77204 05e4 2810 .short 4136 + 77205 05e6 0814 .short 5128 + 77206 05e8 3810 .short 4152 + 77207 05ea 081C .short 7176 + 77208 05ec 4810 .short 4168 + 77209 05ee 0812 .short 4616 + 77210 05f0 5810 .short 4184 + 77211 05f2 081A .short 6664 + 77212 05f4 6810 .short 4200 + 77213 05f6 0816 .short 5640 + 77214 05f8 7810 .short 4216 + 77215 05fa 081E .short 7688 + 77216 05fc 8810 .short 4232 + 77217 05fe 0811 .short 4360 + 77218 0600 9810 .short 4248 + 77219 0602 0819 .short 6408 + 77220 0604 A810 .short 4264 + 77221 0606 0815 .short 5384 + 77222 0608 B810 .short 4280 + ARM GAS /tmp/ccLcDeJO.s page 1355 + + + 77223 060a 081D .short 7432 + 77224 060c C810 .short 4296 + 77225 060e 0813 .short 4872 + 77226 0610 D810 .short 4312 + 77227 0612 081B .short 6920 + 77228 0614 E810 .short 4328 + 77229 0616 0817 .short 5896 + 77230 0618 F810 .short 4344 + 77231 061a 081F .short 7944 + 77232 061c 1811 .short 4376 + 77233 061e 8818 .short 6280 + 77234 0620 2811 .short 4392 + 77235 0622 8814 .short 5256 + 77236 0624 3811 .short 4408 + 77237 0626 881C .short 7304 + 77238 0628 4811 .short 4424 + 77239 062a 8812 .short 4744 + 77240 062c 5811 .short 4440 + 77241 062e 881A .short 6792 + 77242 0630 6811 .short 4456 + 77243 0632 8816 .short 5768 + 77244 0634 7811 .short 4472 + 77245 0636 881E .short 7816 + 77246 0638 9811 .short 4504 + 77247 063a 8819 .short 6536 + 77248 063c A811 .short 4520 + 77249 063e 8815 .short 5512 + 77250 0640 B811 .short 4536 + 77251 0642 881D .short 7560 + 77252 0644 C811 .short 4552 + 77253 0646 8813 .short 5000 + 77254 0648 D811 .short 4568 + 77255 064a 881B .short 7048 + 77256 064c E811 .short 4584 + 77257 064e 8817 .short 6024 + 77258 0650 F811 .short 4600 + 77259 0652 881F .short 8072 + 77260 0654 1812 .short 4632 + 77261 0656 4818 .short 6216 + 77262 0658 2812 .short 4648 + 77263 065a 4814 .short 5192 + 77264 065c 3812 .short 4664 + 77265 065e 481C .short 7240 + 77266 0660 5812 .short 4696 + 77267 0662 481A .short 6728 + 77268 0664 6812 .short 4712 + 77269 0666 4816 .short 5704 + 77270 0668 7812 .short 4728 + 77271 066a 481E .short 7752 + 77272 066c 9812 .short 4760 + 77273 066e 4819 .short 6472 + 77274 0670 A812 .short 4776 + 77275 0672 4815 .short 5448 + 77276 0674 B812 .short 4792 + 77277 0676 481D .short 7496 + 77278 0678 C812 .short 4808 + 77279 067a 4813 .short 4936 + ARM GAS /tmp/ccLcDeJO.s page 1356 + + + 77280 067c D812 .short 4824 + 77281 067e 481B .short 6984 + 77282 0680 E812 .short 4840 + 77283 0682 4817 .short 5960 + 77284 0684 F812 .short 4856 + 77285 0686 481F .short 8008 + 77286 0688 1813 .short 4888 + 77287 068a C818 .short 6344 + 77288 068c 2813 .short 4904 + 77289 068e C814 .short 5320 + 77290 0690 3813 .short 4920 + 77291 0692 C81C .short 7368 + 77292 0694 5813 .short 4952 + 77293 0696 C81A .short 6856 + 77294 0698 6813 .short 4968 + 77295 069a C816 .short 5832 + 77296 069c 7813 .short 4984 + 77297 069e C81E .short 7880 + 77298 06a0 9813 .short 5016 + 77299 06a2 C819 .short 6600 + 77300 06a4 A813 .short 5032 + 77301 06a6 C815 .short 5576 + 77302 06a8 B813 .short 5048 + 77303 06aa C81D .short 7624 + 77304 06ac D813 .short 5080 + 77305 06ae C81B .short 7112 + 77306 06b0 E813 .short 5096 + 77307 06b2 C817 .short 6088 + 77308 06b4 F813 .short 5112 + 77309 06b6 C81F .short 8136 + 77310 06b8 1814 .short 5144 + 77311 06ba 2818 .short 6184 + 77312 06bc 3814 .short 5176 + 77313 06be 281C .short 7208 + 77314 06c0 5814 .short 5208 + 77315 06c2 281A .short 6696 + 77316 06c4 6814 .short 5224 + 77317 06c6 2816 .short 5672 + 77318 06c8 7814 .short 5240 + 77319 06ca 281E .short 7720 + 77320 06cc 9814 .short 5272 + 77321 06ce 2819 .short 6440 + 77322 06d0 A814 .short 5288 + 77323 06d2 2815 .short 5416 + 77324 06d4 B814 .short 5304 + 77325 06d6 281D .short 7464 + 77326 06d8 D814 .short 5336 + 77327 06da 281B .short 6952 + 77328 06dc E814 .short 5352 + 77329 06de 2817 .short 5928 + 77330 06e0 F814 .short 5368 + 77331 06e2 281F .short 7976 + 77332 06e4 1815 .short 5400 + 77333 06e6 A818 .short 6312 + 77334 06e8 3815 .short 5432 + 77335 06ea A81C .short 7336 + 77336 06ec 5815 .short 5464 + ARM GAS /tmp/ccLcDeJO.s page 1357 + + + 77337 06ee A81A .short 6824 + 77338 06f0 6815 .short 5480 + 77339 06f2 A816 .short 5800 + 77340 06f4 7815 .short 5496 + 77341 06f6 A81E .short 7848 + 77342 06f8 9815 .short 5528 + 77343 06fa A819 .short 6568 + 77344 06fc B815 .short 5560 + 77345 06fe A81D .short 7592 + 77346 0700 D815 .short 5592 + 77347 0702 A81B .short 7080 + 77348 0704 E815 .short 5608 + 77349 0706 A817 .short 6056 + 77350 0708 F815 .short 5624 + 77351 070a A81F .short 8104 + 77352 070c 1816 .short 5656 + 77353 070e 6818 .short 6248 + 77354 0710 3816 .short 5688 + 77355 0712 681C .short 7272 + 77356 0714 5816 .short 5720 + 77357 0716 681A .short 6760 + 77358 0718 7816 .short 5752 + 77359 071a 681E .short 7784 + 77360 071c 9816 .short 5784 + 77361 071e 6819 .short 6504 + 77362 0720 B816 .short 5816 + 77363 0722 681D .short 7528 + 77364 0724 D816 .short 5848 + 77365 0726 681B .short 7016 + 77366 0728 E816 .short 5864 + 77367 072a 6817 .short 5992 + 77368 072c F816 .short 5880 + 77369 072e 681F .short 8040 + 77370 0730 1817 .short 5912 + 77371 0732 E818 .short 6376 + 77372 0734 3817 .short 5944 + 77373 0736 E81C .short 7400 + 77374 0738 5817 .short 5976 + 77375 073a E81A .short 6888 + 77376 073c 7817 .short 6008 + 77377 073e E81E .short 7912 + 77378 0740 9817 .short 6040 + 77379 0742 E819 .short 6632 + 77380 0744 B817 .short 6072 + 77381 0746 E81D .short 7656 + 77382 0748 D817 .short 6104 + 77383 074a E81B .short 7144 + 77384 074c F817 .short 6136 + 77385 074e E81F .short 8168 + 77386 0750 3818 .short 6200 + 77387 0752 181C .short 7192 + 77388 0754 5818 .short 6232 + 77389 0756 181A .short 6680 + 77390 0758 7818 .short 6264 + 77391 075a 181E .short 7704 + 77392 075c 9818 .short 6296 + 77393 075e 1819 .short 6424 + ARM GAS /tmp/ccLcDeJO.s page 1358 + + + 77394 0760 B818 .short 6328 + 77395 0762 181D .short 7448 + 77396 0764 D818 .short 6360 + 77397 0766 181B .short 6936 + 77398 0768 F818 .short 6392 + 77399 076a 181F .short 7960 + 77400 076c 3819 .short 6456 + 77401 076e 981C .short 7320 + 77402 0770 5819 .short 6488 + 77403 0772 981A .short 6808 + 77404 0774 7819 .short 6520 + 77405 0776 981E .short 7832 + 77406 0778 B819 .short 6584 + 77407 077a 981D .short 7576 + 77408 077c D819 .short 6616 + 77409 077e 981B .short 7064 + 77410 0780 F819 .short 6648 + 77411 0782 981F .short 8088 + 77412 0784 381A .short 6712 + 77413 0786 581C .short 7256 + 77414 0788 781A .short 6776 + 77415 078a 581E .short 7768 + 77416 078c B81A .short 6840 + 77417 078e 581D .short 7512 + 77418 0790 D81A .short 6872 + 77419 0792 581B .short 7000 + 77420 0794 F81A .short 6904 + 77421 0796 581F .short 8024 + 77422 0798 381B .short 6968 + 77423 079a D81C .short 7384 + 77424 079c 781B .short 7032 + 77425 079e D81E .short 7896 + 77426 07a0 B81B .short 7096 + 77427 07a2 D81D .short 7640 + 77428 07a4 F81B .short 7160 + 77429 07a6 D81F .short 8152 + 77430 07a8 781C .short 7288 + 77431 07aa 381E .short 7736 + 77432 07ac B81C .short 7352 + 77433 07ae 381D .short 7480 + 77434 07b0 F81C .short 7416 + 77435 07b2 381F .short 7992 + 77436 07b4 781D .short 7544 + 77437 07b6 B81E .short 7864 + 77438 07b8 F81D .short 7672 + 77439 07ba B81F .short 8120 + 77440 07bc F81E .short 7928 + 77441 07be 781F .short 8056 + 77442 .section .rodata.armBitRevIndexTableF64_128,"a" + 77443 .align 2 + 77446 armBitRevIndexTableF64_128: + 77447 0000 0800 .short 8 + 77448 0002 0002 .short 512 + 77449 0004 1000 .short 16 + 77450 0006 0001 .short 256 + 77451 0008 1800 .short 24 + 77452 000a 0003 .short 768 + ARM GAS /tmp/ccLcDeJO.s page 1359 + + + 77453 000c 2000 .short 32 + 77454 000e 8000 .short 128 + 77455 0010 2800 .short 40 + 77456 0012 8002 .short 640 + 77457 0014 3000 .short 48 + 77458 0016 8001 .short 384 + 77459 0018 3800 .short 56 + 77460 001a 8003 .short 896 + 77461 001c 4800 .short 72 + 77462 001e 4002 .short 576 + 77463 0020 5000 .short 80 + 77464 0022 4001 .short 320 + 77465 0024 5800 .short 88 + 77466 0026 4003 .short 832 + 77467 0028 6000 .short 96 + 77468 002a C000 .short 192 + 77469 002c 6800 .short 104 + 77470 002e C002 .short 704 + 77471 0030 7000 .short 112 + 77472 0032 C001 .short 448 + 77473 0034 7800 .short 120 + 77474 0036 C003 .short 960 + 77475 0038 8800 .short 136 + 77476 003a 2002 .short 544 + 77477 003c 9000 .short 144 + 77478 003e 2001 .short 288 + 77479 0040 9800 .short 152 + 77480 0042 2003 .short 800 + 77481 0044 A800 .short 168 + 77482 0046 A002 .short 672 + 77483 0048 B000 .short 176 + 77484 004a A001 .short 416 + 77485 004c B800 .short 184 + 77486 004e A003 .short 928 + 77487 0050 C800 .short 200 + 77488 0052 6002 .short 608 + 77489 0054 D000 .short 208 + 77490 0056 6001 .short 352 + 77491 0058 D800 .short 216 + 77492 005a 6003 .short 864 + 77493 005c E800 .short 232 + 77494 005e E002 .short 736 + 77495 0060 F000 .short 240 + 77496 0062 E001 .short 480 + 77497 0064 F800 .short 248 + 77498 0066 E003 .short 992 + 77499 0068 0801 .short 264 + 77500 006a 1002 .short 528 + 77501 006c 1801 .short 280 + 77502 006e 1003 .short 784 + 77503 0070 2801 .short 296 + 77504 0072 9002 .short 656 + 77505 0074 3001 .short 304 + 77506 0076 9001 .short 400 + 77507 0078 3801 .short 312 + 77508 007a 9003 .short 912 + 77509 007c 4801 .short 328 + ARM GAS /tmp/ccLcDeJO.s page 1360 + + + 77510 007e 5002 .short 592 + 77511 0080 5801 .short 344 + 77512 0082 5003 .short 848 + 77513 0084 6801 .short 360 + 77514 0086 D002 .short 720 + 77515 0088 7001 .short 368 + 77516 008a D001 .short 464 + 77517 008c 7801 .short 376 + 77518 008e D003 .short 976 + 77519 0090 8801 .short 392 + 77520 0092 3002 .short 560 + 77521 0094 9801 .short 408 + 77522 0096 3003 .short 816 + 77523 0098 A801 .short 424 + 77524 009a B002 .short 688 + 77525 009c B801 .short 440 + 77526 009e B003 .short 944 + 77527 00a0 C801 .short 456 + 77528 00a2 7002 .short 624 + 77529 00a4 D801 .short 472 + 77530 00a6 7003 .short 880 + 77531 00a8 E801 .short 488 + 77532 00aa F002 .short 752 + 77533 00ac F801 .short 504 + 77534 00ae F003 .short 1008 + 77535 00b0 1802 .short 536 + 77536 00b2 0803 .short 776 + 77537 00b4 2802 .short 552 + 77538 00b6 8802 .short 648 + 77539 00b8 3802 .short 568 + 77540 00ba 8803 .short 904 + 77541 00bc 5802 .short 600 + 77542 00be 4803 .short 840 + 77543 00c0 6802 .short 616 + 77544 00c2 C802 .short 712 + 77545 00c4 7802 .short 632 + 77546 00c6 C803 .short 968 + 77547 00c8 9802 .short 664 + 77548 00ca 2803 .short 808 + 77549 00cc B802 .short 696 + 77550 00ce A803 .short 936 + 77551 00d0 D802 .short 728 + 77552 00d2 6803 .short 872 + 77553 00d4 F802 .short 760 + 77554 00d6 E803 .short 1000 + 77555 00d8 3803 .short 824 + 77556 00da 9803 .short 920 + 77557 00dc 7803 .short 888 + 77558 00de D803 .short 984 + 77559 .section .rodata.armBitRevIndexTableF64_16,"a" + 77560 .align 2 + 77563 armBitRevIndexTableF64_16: + 77564 0000 0800 .short 8 + 77565 0002 4000 .short 64 + 77566 0004 1000 .short 16 + 77567 0006 2000 .short 32 + 77568 0008 1800 .short 24 + ARM GAS /tmp/ccLcDeJO.s page 1361 + + + 77569 000a 6000 .short 96 + 77570 000c 2800 .short 40 + 77571 000e 5000 .short 80 + 77572 0010 3800 .short 56 + 77573 0012 7000 .short 112 + 77574 0014 5800 .short 88 + 77575 0016 6800 .short 104 + 77576 .section .rodata.armBitRevIndexTableF64_2048,"a" + 77577 .align 2 + 77580 armBitRevIndexTableF64_2048: + 77581 0000 0800 .short 8 + 77582 0002 0020 .short 8192 + 77583 0004 1000 .short 16 + 77584 0006 0010 .short 4096 + 77585 0008 1800 .short 24 + 77586 000a 0030 .short 12288 + 77587 000c 2000 .short 32 + 77588 000e 0008 .short 2048 + 77589 0010 2800 .short 40 + 77590 0012 0028 .short 10240 + 77591 0014 3000 .short 48 + 77592 0016 0018 .short 6144 + 77593 0018 3800 .short 56 + 77594 001a 0038 .short 14336 + 77595 001c 4000 .short 64 + 77596 001e 0004 .short 1024 + 77597 0020 4800 .short 72 + 77598 0022 0024 .short 9216 + 77599 0024 5000 .short 80 + 77600 0026 0014 .short 5120 + 77601 0028 5800 .short 88 + 77602 002a 0034 .short 13312 + 77603 002c 6000 .short 96 + 77604 002e 000C .short 3072 + 77605 0030 6800 .short 104 + 77606 0032 002C .short 11264 + 77607 0034 7000 .short 112 + 77608 0036 001C .short 7168 + 77609 0038 7800 .short 120 + 77610 003a 003C .short 15360 + 77611 003c 8000 .short 128 + 77612 003e 0002 .short 512 + 77613 0040 8800 .short 136 + 77614 0042 0022 .short 8704 + 77615 0044 9000 .short 144 + 77616 0046 0012 .short 4608 + 77617 0048 9800 .short 152 + 77618 004a 0032 .short 12800 + 77619 004c A000 .short 160 + 77620 004e 000A .short 2560 + 77621 0050 A800 .short 168 + 77622 0052 002A .short 10752 + 77623 0054 B000 .short 176 + 77624 0056 001A .short 6656 + 77625 0058 B800 .short 184 + 77626 005a 003A .short 14848 + 77627 005c C000 .short 192 + ARM GAS /tmp/ccLcDeJO.s page 1362 + + + 77628 005e 0006 .short 1536 + 77629 0060 C800 .short 200 + 77630 0062 0026 .short 9728 + 77631 0064 D000 .short 208 + 77632 0066 0016 .short 5632 + 77633 0068 D800 .short 216 + 77634 006a 0036 .short 13824 + 77635 006c E000 .short 224 + 77636 006e 000E .short 3584 + 77637 0070 E800 .short 232 + 77638 0072 002E .short 11776 + 77639 0074 F000 .short 240 + 77640 0076 001E .short 7680 + 77641 0078 F800 .short 248 + 77642 007a 003E .short 15872 + 77643 007c 0801 .short 264 + 77644 007e 0021 .short 8448 + 77645 0080 1001 .short 272 + 77646 0082 0011 .short 4352 + 77647 0084 1801 .short 280 + 77648 0086 0031 .short 12544 + 77649 0088 2001 .short 288 + 77650 008a 0009 .short 2304 + 77651 008c 2801 .short 296 + 77652 008e 0029 .short 10496 + 77653 0090 3001 .short 304 + 77654 0092 0019 .short 6400 + 77655 0094 3801 .short 312 + 77656 0096 0039 .short 14592 + 77657 0098 4001 .short 320 + 77658 009a 0005 .short 1280 + 77659 009c 4801 .short 328 + 77660 009e 0025 .short 9472 + 77661 00a0 5001 .short 336 + 77662 00a2 0015 .short 5376 + 77663 00a4 5801 .short 344 + 77664 00a6 0035 .short 13568 + 77665 00a8 6001 .short 352 + 77666 00aa 000D .short 3328 + 77667 00ac 6801 .short 360 + 77668 00ae 002D .short 11520 + 77669 00b0 7001 .short 368 + 77670 00b2 001D .short 7424 + 77671 00b4 7801 .short 376 + 77672 00b6 003D .short 15616 + 77673 00b8 8001 .short 384 + 77674 00ba 0003 .short 768 + 77675 00bc 8801 .short 392 + 77676 00be 0023 .short 8960 + 77677 00c0 9001 .short 400 + 77678 00c2 0013 .short 4864 + 77679 00c4 9801 .short 408 + 77680 00c6 0033 .short 13056 + 77681 00c8 A001 .short 416 + 77682 00ca 000B .short 2816 + 77683 00cc A801 .short 424 + 77684 00ce 002B .short 11008 + ARM GAS /tmp/ccLcDeJO.s page 1363 + + + 77685 00d0 B001 .short 432 + 77686 00d2 001B .short 6912 + 77687 00d4 B801 .short 440 + 77688 00d6 003B .short 15104 + 77689 00d8 C001 .short 448 + 77690 00da 0007 .short 1792 + 77691 00dc C801 .short 456 + 77692 00de 0027 .short 9984 + 77693 00e0 D001 .short 464 + 77694 00e2 0017 .short 5888 + 77695 00e4 D801 .short 472 + 77696 00e6 0037 .short 14080 + 77697 00e8 E001 .short 480 + 77698 00ea 000F .short 3840 + 77699 00ec E801 .short 488 + 77700 00ee 002F .short 12032 + 77701 00f0 F001 .short 496 + 77702 00f2 001F .short 7936 + 77703 00f4 F801 .short 504 + 77704 00f6 003F .short 16128 + 77705 00f8 0802 .short 520 + 77706 00fa 8020 .short 8320 + 77707 00fc 1002 .short 528 + 77708 00fe 8010 .short 4224 + 77709 0100 1802 .short 536 + 77710 0102 8030 .short 12416 + 77711 0104 2002 .short 544 + 77712 0106 8008 .short 2176 + 77713 0108 2802 .short 552 + 77714 010a 8028 .short 10368 + 77715 010c 3002 .short 560 + 77716 010e 8018 .short 6272 + 77717 0110 3802 .short 568 + 77718 0112 8038 .short 14464 + 77719 0114 4002 .short 576 + 77720 0116 8004 .short 1152 + 77721 0118 4802 .short 584 + 77722 011a 8024 .short 9344 + 77723 011c 5002 .short 592 + 77724 011e 8014 .short 5248 + 77725 0120 5802 .short 600 + 77726 0122 8034 .short 13440 + 77727 0124 6002 .short 608 + 77728 0126 800C .short 3200 + 77729 0128 6802 .short 616 + 77730 012a 802C .short 11392 + 77731 012c 7002 .short 624 + 77732 012e 801C .short 7296 + 77733 0130 7802 .short 632 + 77734 0132 803C .short 15488 + 77735 0134 8802 .short 648 + 77736 0136 8022 .short 8832 + 77737 0138 9002 .short 656 + 77738 013a 8012 .short 4736 + 77739 013c 9802 .short 664 + 77740 013e 8032 .short 12928 + 77741 0140 A002 .short 672 + ARM GAS /tmp/ccLcDeJO.s page 1364 + + + 77742 0142 800A .short 2688 + 77743 0144 A802 .short 680 + 77744 0146 802A .short 10880 + 77745 0148 B002 .short 688 + 77746 014a 801A .short 6784 + 77747 014c B802 .short 696 + 77748 014e 803A .short 14976 + 77749 0150 C002 .short 704 + 77750 0152 8006 .short 1664 + 77751 0154 C802 .short 712 + 77752 0156 8026 .short 9856 + 77753 0158 D002 .short 720 + 77754 015a 8016 .short 5760 + 77755 015c D802 .short 728 + 77756 015e 8036 .short 13952 + 77757 0160 E002 .short 736 + 77758 0162 800E .short 3712 + 77759 0164 E802 .short 744 + 77760 0166 802E .short 11904 + 77761 0168 F002 .short 752 + 77762 016a 801E .short 7808 + 77763 016c F802 .short 760 + 77764 016e 803E .short 16000 + 77765 0170 0803 .short 776 + 77766 0172 8021 .short 8576 + 77767 0174 1003 .short 784 + 77768 0176 8011 .short 4480 + 77769 0178 1803 .short 792 + 77770 017a 8031 .short 12672 + 77771 017c 2003 .short 800 + 77772 017e 8009 .short 2432 + 77773 0180 2803 .short 808 + 77774 0182 8029 .short 10624 + 77775 0184 3003 .short 816 + 77776 0186 8019 .short 6528 + 77777 0188 3803 .short 824 + 77778 018a 8039 .short 14720 + 77779 018c 4003 .short 832 + 77780 018e 8005 .short 1408 + 77781 0190 4803 .short 840 + 77782 0192 8025 .short 9600 + 77783 0194 5003 .short 848 + 77784 0196 8015 .short 5504 + 77785 0198 5803 .short 856 + 77786 019a 8035 .short 13696 + 77787 019c 6003 .short 864 + 77788 019e 800D .short 3456 + 77789 01a0 6803 .short 872 + 77790 01a2 802D .short 11648 + 77791 01a4 7003 .short 880 + 77792 01a6 801D .short 7552 + 77793 01a8 7803 .short 888 + 77794 01aa 803D .short 15744 + 77795 01ac 8803 .short 904 + 77796 01ae 8023 .short 9088 + 77797 01b0 9003 .short 912 + 77798 01b2 8013 .short 4992 + ARM GAS /tmp/ccLcDeJO.s page 1365 + + + 77799 01b4 9803 .short 920 + 77800 01b6 8033 .short 13184 + 77801 01b8 A003 .short 928 + 77802 01ba 800B .short 2944 + 77803 01bc A803 .short 936 + 77804 01be 802B .short 11136 + 77805 01c0 B003 .short 944 + 77806 01c2 801B .short 7040 + 77807 01c4 B803 .short 952 + 77808 01c6 803B .short 15232 + 77809 01c8 C003 .short 960 + 77810 01ca 8007 .short 1920 + 77811 01cc C803 .short 968 + 77812 01ce 8027 .short 10112 + 77813 01d0 D003 .short 976 + 77814 01d2 8017 .short 6016 + 77815 01d4 D803 .short 984 + 77816 01d6 8037 .short 14208 + 77817 01d8 E003 .short 992 + 77818 01da 800F .short 3968 + 77819 01dc E803 .short 1000 + 77820 01de 802F .short 12160 + 77821 01e0 F003 .short 1008 + 77822 01e2 801F .short 8064 + 77823 01e4 F803 .short 1016 + 77824 01e6 803F .short 16256 + 77825 01e8 0804 .short 1032 + 77826 01ea 4020 .short 8256 + 77827 01ec 1004 .short 1040 + 77828 01ee 4010 .short 4160 + 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13240 + 79500 0efe 983B .short 15256 + 79501 0f00 D833 .short 13272 + 79502 0f02 9837 .short 14232 + 79503 0f04 F833 .short 13304 + 79504 0f06 983F .short 16280 + 79505 0f08 3834 .short 13368 + 79506 0f0a 5838 .short 14424 + 79507 0f0c 7834 .short 13432 + 79508 0f0e 583C .short 15448 + ARM GAS /tmp/ccLcDeJO.s page 1395 + + + 79509 0f10 B834 .short 13496 + 79510 0f12 583A .short 14936 + 79511 0f14 D834 .short 13528 + 79512 0f16 5836 .short 13912 + 79513 0f18 F834 .short 13560 + 79514 0f1a 583E .short 15960 + 79515 0f1c 3835 .short 13624 + 79516 0f1e 5839 .short 14680 + 79517 0f20 7835 .short 13688 + 79518 0f22 583D .short 15704 + 79519 0f24 B835 .short 13752 + 79520 0f26 583B .short 15192 + 79521 0f28 D835 .short 13784 + 79522 0f2a 5837 .short 14168 + 79523 0f2c F835 .short 13816 + 79524 0f2e 583F .short 16216 + 79525 0f30 3836 .short 13880 + 79526 0f32 D838 .short 14552 + 79527 0f34 7836 .short 13944 + 79528 0f36 D83C .short 15576 + 79529 0f38 B836 .short 14008 + 79530 0f3a D83A .short 15064 + 79531 0f3c F836 .short 14072 + 79532 0f3e D83E .short 16088 + 79533 0f40 3837 .short 14136 + 79534 0f42 D839 .short 14808 + 79535 0f44 7837 .short 14200 + 79536 0f46 D83D .short 15832 + 79537 0f48 B837 .short 14264 + 79538 0f4a D83B .short 15320 + 79539 0f4c F837 .short 14328 + 79540 0f4e D83F .short 16344 + 79541 0f50 7838 .short 14456 + 79542 0f52 383C .short 15416 + 79543 0f54 B838 .short 14520 + 79544 0f56 383A .short 14904 + 79545 0f58 F838 .short 14584 + 79546 0f5a 383E .short 15928 + 79547 0f5c 7839 .short 14712 + 79548 0f5e 383D .short 15672 + 79549 0f60 B839 .short 14776 + 79550 0f62 383B .short 15160 + 79551 0f64 F839 .short 14840 + 79552 0f66 383F .short 16184 + 79553 0f68 783A .short 14968 + 79554 0f6a B83C .short 15544 + 79555 0f6c F83A .short 15096 + 79556 0f6e B83E .short 16056 + 79557 0f70 783B .short 15224 + 79558 0f72 B83D .short 15800 + 79559 0f74 F83B .short 15352 + 79560 0f76 B83F .short 16312 + 79561 0f78 F83C .short 15608 + 79562 0f7a 783E .short 15992 + 79563 0f7c F83D .short 15864 + 79564 0f7e 783F .short 16248 + 79565 .section .rodata.armBitRevIndexTableF64_256,"a" + ARM GAS /tmp/ccLcDeJO.s page 1396 + + + 79566 .align 2 + 79569 armBitRevIndexTableF64_256: + 79570 0000 0800 .short 8 + 79571 0002 0004 .short 1024 + 79572 0004 1000 .short 16 + 79573 0006 0002 .short 512 + 79574 0008 1800 .short 24 + 79575 000a 0006 .short 1536 + 79576 000c 2000 .short 32 + 79577 000e 0001 .short 256 + 79578 0010 2800 .short 40 + 79579 0012 0005 .short 1280 + 79580 0014 3000 .short 48 + 79581 0016 0003 .short 768 + 79582 0018 3800 .short 56 + 79583 001a 0007 .short 1792 + 79584 001c 4000 .short 64 + 79585 001e 8000 .short 128 + 79586 0020 4800 .short 72 + 79587 0022 8004 .short 1152 + 79588 0024 5000 .short 80 + 79589 0026 8002 .short 640 + 79590 0028 5800 .short 88 + 79591 002a 8006 .short 1664 + 79592 002c 6000 .short 96 + 79593 002e 8001 .short 384 + 79594 0030 6800 .short 104 + 79595 0032 8005 .short 1408 + 79596 0034 7000 .short 112 + 79597 0036 8003 .short 896 + 79598 0038 7800 .short 120 + 79599 003a 8007 .short 1920 + 79600 003c 8800 .short 136 + 79601 003e 4004 .short 1088 + 79602 0040 9000 .short 144 + 79603 0042 4002 .short 576 + 79604 0044 9800 .short 152 + 79605 0046 4006 .short 1600 + 79606 0048 A000 .short 160 + 79607 004a 4001 .short 320 + 79608 004c A800 .short 168 + 79609 004e 4005 .short 1344 + 79610 0050 B000 .short 176 + 79611 0052 4003 .short 832 + 79612 0054 B800 .short 184 + 79613 0056 4007 .short 1856 + 79614 0058 C800 .short 200 + 79615 005a C004 .short 1216 + 79616 005c D000 .short 208 + 79617 005e C002 .short 704 + 79618 0060 D800 .short 216 + 79619 0062 C006 .short 1728 + 79620 0064 E000 .short 224 + 79621 0066 C001 .short 448 + 79622 0068 E800 .short 232 + 79623 006a C005 .short 1472 + 79624 006c F000 .short 240 + ARM GAS /tmp/ccLcDeJO.s page 1397 + + + 79625 006e C003 .short 960 + 79626 0070 F800 .short 248 + 79627 0072 C007 .short 1984 + 79628 0074 0801 .short 264 + 79629 0076 2004 .short 1056 + 79630 0078 1001 .short 272 + 79631 007a 2002 .short 544 + 79632 007c 1801 .short 280 + 79633 007e 2006 .short 1568 + 79634 0080 2801 .short 296 + 79635 0082 2005 .short 1312 + 79636 0084 3001 .short 304 + 79637 0086 2003 .short 800 + 79638 0088 3801 .short 312 + 79639 008a 2007 .short 1824 + 79640 008c 4801 .short 328 + 79641 008e A004 .short 1184 + 79642 0090 5001 .short 336 + 79643 0092 A002 .short 672 + 79644 0094 5801 .short 344 + 79645 0096 A006 .short 1696 + 79646 0098 6001 .short 352 + 79647 009a A001 .short 416 + 79648 009c 6801 .short 360 + 79649 009e A005 .short 1440 + 79650 00a0 7001 .short 368 + 79651 00a2 A003 .short 928 + 79652 00a4 7801 .short 376 + 79653 00a6 A007 .short 1952 + 79654 00a8 8801 .short 392 + 79655 00aa 6004 .short 1120 + 79656 00ac 9001 .short 400 + 79657 00ae 6002 .short 608 + 79658 00b0 9801 .short 408 + 79659 00b2 6006 .short 1632 + 79660 00b4 A801 .short 424 + 79661 00b6 6005 .short 1376 + 79662 00b8 B001 .short 432 + 79663 00ba 6003 .short 864 + 79664 00bc B801 .short 440 + 79665 00be 6007 .short 1888 + 79666 00c0 C801 .short 456 + 79667 00c2 E004 .short 1248 + 79668 00c4 D001 .short 464 + 79669 00c6 E002 .short 736 + 79670 00c8 D801 .short 472 + 79671 00ca E006 .short 1760 + 79672 00cc E801 .short 488 + 79673 00ce E005 .short 1504 + 79674 00d0 F001 .short 496 + 79675 00d2 E003 .short 992 + 79676 00d4 F801 .short 504 + 79677 00d6 E007 .short 2016 + 79678 00d8 0802 .short 520 + 79679 00da 1004 .short 1040 + 79680 00dc 1802 .short 536 + 79681 00de 1006 .short 1552 + ARM GAS /tmp/ccLcDeJO.s page 1398 + + + 79682 00e0 2802 .short 552 + 79683 00e2 1005 .short 1296 + 79684 00e4 3002 .short 560 + 79685 00e6 1003 .short 784 + 79686 00e8 3802 .short 568 + 79687 00ea 1007 .short 1808 + 79688 00ec 4802 .short 584 + 79689 00ee 9004 .short 1168 + 79690 00f0 5002 .short 592 + 79691 00f2 9002 .short 656 + 79692 00f4 5802 .short 600 + 79693 00f6 9006 .short 1680 + 79694 00f8 6802 .short 616 + 79695 00fa 9005 .short 1424 + 79696 00fc 7002 .short 624 + 79697 00fe 9003 .short 912 + 79698 0100 7802 .short 632 + 79699 0102 9007 .short 1936 + 79700 0104 8802 .short 648 + 79701 0106 5004 .short 1104 + 79702 0108 9802 .short 664 + 79703 010a 5006 .short 1616 + 79704 010c A802 .short 680 + 79705 010e 5005 .short 1360 + 79706 0110 B002 .short 688 + 79707 0112 5003 .short 848 + 79708 0114 B802 .short 696 + 79709 0116 5007 .short 1872 + 79710 0118 C802 .short 712 + 79711 011a D004 .short 1232 + 79712 011c D802 .short 728 + 79713 011e D006 .short 1744 + 79714 0120 E802 .short 744 + 79715 0122 D005 .short 1488 + 79716 0124 F002 .short 752 + 79717 0126 D003 .short 976 + 79718 0128 F802 .short 760 + 79719 012a D007 .short 2000 + 79720 012c 0803 .short 776 + 79721 012e 3004 .short 1072 + 79722 0130 1803 .short 792 + 79723 0132 3006 .short 1584 + 79724 0134 2803 .short 808 + 79725 0136 3005 .short 1328 + 79726 0138 3803 .short 824 + 79727 013a 3007 .short 1840 + 79728 013c 4803 .short 840 + 79729 013e B004 .short 1200 + 79730 0140 5803 .short 856 + 79731 0142 B006 .short 1712 + 79732 0144 6803 .short 872 + 79733 0146 B005 .short 1456 + 79734 0148 7003 .short 880 + 79735 014a B003 .short 944 + 79736 014c 7803 .short 888 + 79737 014e B007 .short 1968 + 79738 0150 8803 .short 904 + ARM GAS /tmp/ccLcDeJO.s page 1399 + + + 79739 0152 7004 .short 1136 + 79740 0154 9803 .short 920 + 79741 0156 7006 .short 1648 + 79742 0158 A803 .short 936 + 79743 015a 7005 .short 1392 + 79744 015c B803 .short 952 + 79745 015e 7007 .short 1904 + 79746 0160 C803 .short 968 + 79747 0162 F004 .short 1264 + 79748 0164 D803 .short 984 + 79749 0166 F006 .short 1776 + 79750 0168 E803 .short 1000 + 79751 016a F005 .short 1520 + 79752 016c F803 .short 1016 + 79753 016e F007 .short 2032 + 79754 0170 1804 .short 1048 + 79755 0172 0806 .short 1544 + 79756 0174 2804 .short 1064 + 79757 0176 0805 .short 1288 + 79758 0178 3804 .short 1080 + 79759 017a 0807 .short 1800 + 79760 017c 4804 .short 1096 + 79761 017e 8804 .short 1160 + 79762 0180 5804 .short 1112 + 79763 0182 8806 .short 1672 + 79764 0184 6804 .short 1128 + 79765 0186 8805 .short 1416 + 79766 0188 7804 .short 1144 + 79767 018a 8807 .short 1928 + 79768 018c 9804 .short 1176 + 79769 018e 4806 .short 1608 + 79770 0190 A804 .short 1192 + 79771 0192 4805 .short 1352 + 79772 0194 B804 .short 1208 + 79773 0196 4807 .short 1864 + 79774 0198 D804 .short 1240 + 79775 019a C806 .short 1736 + 79776 019c E804 .short 1256 + 79777 019e C805 .short 1480 + 79778 01a0 F804 .short 1272 + 79779 01a2 C807 .short 1992 + 79780 01a4 1805 .short 1304 + 79781 01a6 2806 .short 1576 + 79782 01a8 3805 .short 1336 + 79783 01aa 2807 .short 1832 + 79784 01ac 5805 .short 1368 + 79785 01ae A806 .short 1704 + 79786 01b0 6805 .short 1384 + 79787 01b2 A805 .short 1448 + 79788 01b4 7805 .short 1400 + 79789 01b6 A807 .short 1960 + 79790 01b8 9805 .short 1432 + 79791 01ba 6806 .short 1640 + 79792 01bc B805 .short 1464 + 79793 01be 6807 .short 1896 + 79794 01c0 D805 .short 1496 + 79795 01c2 E806 .short 1768 + ARM GAS /tmp/ccLcDeJO.s page 1400 + + + 79796 01c4 F805 .short 1528 + 79797 01c6 E807 .short 2024 + 79798 01c8 3806 .short 1592 + 79799 01ca 1807 .short 1816 + 79800 01cc 5806 .short 1624 + 79801 01ce 9806 .short 1688 + 79802 01d0 7806 .short 1656 + 79803 01d2 9807 .short 1944 + 79804 01d4 B806 .short 1720 + 79805 01d6 5807 .short 1880 + 79806 01d8 F806 .short 1784 + 79807 01da D807 .short 2008 + 79808 01dc 7807 .short 1912 + 79809 01de B807 .short 1976 + 79810 .section .rodata.armBitRevIndexTableF64_32,"a" + 79811 .align 2 + 79814 armBitRevIndexTableF64_32: + 79815 0000 0800 .short 8 + 79816 0002 8000 .short 128 + 79817 0004 1000 .short 16 + 79818 0006 4000 .short 64 + 79819 0008 1800 .short 24 + 79820 000a C000 .short 192 + 79821 000c 2800 .short 40 + 79822 000e A000 .short 160 + 79823 0010 3000 .short 48 + 79824 0012 6000 .short 96 + 79825 0014 3800 .short 56 + 79826 0016 E000 .short 224 + 79827 0018 4800 .short 72 + 79828 001a 9000 .short 144 + 79829 001c 5800 .short 88 + 79830 001e D000 .short 208 + 79831 0020 6800 .short 104 + 79832 0022 B000 .short 176 + 79833 0024 7800 .short 120 + 79834 0026 F000 .short 240 + 79835 0028 9800 .short 152 + 79836 002a C800 .short 200 + 79837 002c B800 .short 184 + 79838 002e E800 .short 232 + 79839 .section .rodata.armBitRevIndexTableF64_4096,"a" + 79840 .align 2 + 79843 armBitRevIndexTableF64_4096: + 79844 0000 0800 .short 8 + 79845 0002 0040 .short 16384 + 79846 0004 1000 .short 16 + 79847 0006 0020 .short 8192 + 79848 0008 1800 .short 24 + 79849 000a 0060 .short 24576 + 79850 000c 2000 .short 32 + 79851 000e 0010 .short 4096 + 79852 0010 2800 .short 40 + 79853 0012 0050 .short 20480 + 79854 0014 3000 .short 48 + 79855 0016 0030 .short 12288 + 79856 0018 3800 .short 56 + ARM GAS /tmp/ccLcDeJO.s page 1401 + + + 79857 001a 0070 .short 28672 + 79858 001c 4000 .short 64 + 79859 001e 0008 .short 2048 + 79860 0020 4800 .short 72 + 79861 0022 0048 .short 18432 + 79862 0024 5000 .short 80 + 79863 0026 0028 .short 10240 + 79864 0028 5800 .short 88 + 79865 002a 0068 .short 26624 + 79866 002c 6000 .short 96 + 79867 002e 0018 .short 6144 + 79868 0030 6800 .short 104 + 79869 0032 0058 .short 22528 + 79870 0034 7000 .short 112 + 79871 0036 0038 .short 14336 + 79872 0038 7800 .short 120 + 79873 003a 0078 .short 30720 + 79874 003c 8000 .short 128 + 79875 003e 0004 .short 1024 + 79876 0040 8800 .short 136 + 79877 0042 0044 .short 17408 + 79878 0044 9000 .short 144 + 79879 0046 0024 .short 9216 + 79880 0048 9800 .short 152 + 79881 004a 0064 .short 25600 + 79882 004c A000 .short 160 + 79883 004e 0014 .short 5120 + 79884 0050 A800 .short 168 + 79885 0052 0054 .short 21504 + 79886 0054 B000 .short 176 + 79887 0056 0034 .short 13312 + 79888 0058 B800 .short 184 + 79889 005a 0074 .short 29696 + 79890 005c C000 .short 192 + 79891 005e 000C .short 3072 + 79892 0060 C800 .short 200 + 79893 0062 004C .short 19456 + 79894 0064 D000 .short 208 + 79895 0066 002C .short 11264 + 79896 0068 D800 .short 216 + 79897 006a 006C .short 27648 + 79898 006c E000 .short 224 + 79899 006e 001C .short 7168 + 79900 0070 E800 .short 232 + 79901 0072 005C .short 23552 + 79902 0074 F000 .short 240 + 79903 0076 003C .short 15360 + 79904 0078 F800 .short 248 + 79905 007a 007C .short 31744 + 79906 007c 0001 .short 256 + 79907 007e 0002 .short 512 + 79908 0080 0801 .short 264 + 79909 0082 0042 .short 16896 + 79910 0084 1001 .short 272 + 79911 0086 0022 .short 8704 + 79912 0088 1801 .short 280 + 79913 008a 0062 .short 25088 + ARM GAS /tmp/ccLcDeJO.s page 1402 + + + 79914 008c 2001 .short 288 + 79915 008e 0012 .short 4608 + 79916 0090 2801 .short 296 + 79917 0092 0052 .short 20992 + 79918 0094 3001 .short 304 + 79919 0096 0032 .short 12800 + 79920 0098 3801 .short 312 + 79921 009a 0072 .short 29184 + 79922 009c 4001 .short 320 + 79923 009e 000A .short 2560 + 79924 00a0 4801 .short 328 + 79925 00a2 004A .short 18944 + 79926 00a4 5001 .short 336 + 79927 00a6 002A .short 10752 + 79928 00a8 5801 .short 344 + 79929 00aa 006A .short 27136 + 79930 00ac 6001 .short 352 + 79931 00ae 001A .short 6656 + 79932 00b0 6801 .short 360 + 79933 00b2 005A .short 23040 + 79934 00b4 7001 .short 368 + 79935 00b6 003A .short 14848 + 79936 00b8 7801 .short 376 + 79937 00ba 007A .short 31232 + 79938 00bc 8001 .short 384 + 79939 00be 0006 .short 1536 + 79940 00c0 8801 .short 392 + 79941 00c2 0046 .short 17920 + 79942 00c4 9001 .short 400 + 79943 00c6 0026 .short 9728 + 79944 00c8 9801 .short 408 + 79945 00ca 0066 .short 26112 + 79946 00cc A001 .short 416 + 79947 00ce 0016 .short 5632 + 79948 00d0 A801 .short 424 + 79949 00d2 0056 .short 22016 + 79950 00d4 B001 .short 432 + 79951 00d6 0036 .short 13824 + 79952 00d8 B801 .short 440 + 79953 00da 0076 .short 30208 + 79954 00dc C001 .short 448 + 79955 00de 000E .short 3584 + 79956 00e0 C801 .short 456 + 79957 00e2 004E .short 19968 + 79958 00e4 D001 .short 464 + 79959 00e6 002E .short 11776 + 79960 00e8 D801 .short 472 + 79961 00ea 006E .short 28160 + 79962 00ec E001 .short 480 + 79963 00ee 001E .short 7680 + 79964 00f0 E801 .short 488 + 79965 00f2 005E .short 24064 + 79966 00f4 F001 .short 496 + 79967 00f6 003E .short 15872 + 79968 00f8 F801 .short 504 + 79969 00fa 007E .short 32256 + 79970 00fc 0802 .short 520 + ARM GAS /tmp/ccLcDeJO.s page 1403 + + + 79971 00fe 0041 .short 16640 + 79972 0100 1002 .short 528 + 79973 0102 0021 .short 8448 + 79974 0104 1802 .short 536 + 79975 0106 0061 .short 24832 + 79976 0108 2002 .short 544 + 79977 010a 0011 .short 4352 + 79978 010c 2802 .short 552 + 79979 010e 0051 .short 20736 + 79980 0110 3002 .short 560 + 79981 0112 0031 .short 12544 + 79982 0114 3802 .short 568 + 79983 0116 0071 .short 28928 + 79984 0118 4002 .short 576 + 79985 011a 0009 .short 2304 + 79986 011c 4802 .short 584 + 79987 011e 0049 .short 18688 + 79988 0120 5002 .short 592 + 79989 0122 0029 .short 10496 + 79990 0124 5802 .short 600 + 79991 0126 0069 .short 26880 + 79992 0128 6002 .short 608 + 79993 012a 0019 .short 6400 + 79994 012c 6802 .short 616 + 79995 012e 0059 .short 22784 + 79996 0130 7002 .short 624 + 79997 0132 0039 .short 14592 + 79998 0134 7802 .short 632 + 79999 0136 0079 .short 30976 + 80000 0138 8002 .short 640 + 80001 013a 0005 .short 1280 + 80002 013c 8802 .short 648 + 80003 013e 0045 .short 17664 + 80004 0140 9002 .short 656 + 80005 0142 0025 .short 9472 + 80006 0144 9802 .short 664 + 80007 0146 0065 .short 25856 + 80008 0148 A002 .short 672 + 80009 014a 0015 .short 5376 + 80010 014c A802 .short 680 + 80011 014e 0055 .short 21760 + 80012 0150 B002 .short 688 + 80013 0152 0035 .short 13568 + 80014 0154 B802 .short 696 + 80015 0156 0075 .short 29952 + 80016 0158 C002 .short 704 + 80017 015a 000D .short 3328 + 80018 015c C802 .short 712 + 80019 015e 004D .short 19712 + 80020 0160 D002 .short 720 + 80021 0162 002D .short 11520 + 80022 0164 D802 .short 728 + 80023 0166 006D .short 27904 + 80024 0168 E002 .short 736 + 80025 016a 001D .short 7424 + 80026 016c E802 .short 744 + 80027 016e 005D .short 23808 + ARM GAS /tmp/ccLcDeJO.s page 1404 + + + 80028 0170 F002 .short 752 + 80029 0172 003D .short 15616 + 80030 0174 F802 .short 760 + 80031 0176 007D .short 32000 + 80032 0178 0803 .short 776 + 80033 017a 0043 .short 17152 + 80034 017c 1003 .short 784 + 80035 017e 0023 .short 8960 + 80036 0180 1803 .short 792 + 80037 0182 0063 .short 25344 + 80038 0184 2003 .short 800 + 80039 0186 0013 .short 4864 + 80040 0188 2803 .short 808 + 80041 018a 0053 .short 21248 + 80042 018c 3003 .short 816 + 80043 018e 0033 .short 13056 + 80044 0190 3803 .short 824 + 80045 0192 0073 .short 29440 + 80046 0194 4003 .short 832 + 80047 0196 000B .short 2816 + 80048 0198 4803 .short 840 + 80049 019a 004B .short 19200 + 80050 019c 5003 .short 848 + 80051 019e 002B .short 11008 + 80052 01a0 5803 .short 856 + 80053 01a2 006B .short 27392 + 80054 01a4 6003 .short 864 + 80055 01a6 001B .short 6912 + 80056 01a8 6803 .short 872 + 80057 01aa 005B .short 23296 + 80058 01ac 7003 .short 880 + 80059 01ae 003B .short 15104 + 80060 01b0 7803 .short 888 + 80061 01b2 007B .short 31488 + 80062 01b4 8003 .short 896 + 80063 01b6 0007 .short 1792 + 80064 01b8 8803 .short 904 + 80065 01ba 0047 .short 18176 + 80066 01bc 9003 .short 912 + 80067 01be 0027 .short 9984 + 80068 01c0 9803 .short 920 + 80069 01c2 0067 .short 26368 + 80070 01c4 A003 .short 928 + 80071 01c6 0017 .short 5888 + 80072 01c8 A803 .short 936 + 80073 01ca 0057 .short 22272 + 80074 01cc B003 .short 944 + 80075 01ce 0037 .short 14080 + 80076 01d0 B803 .short 952 + 80077 01d2 0077 .short 30464 + 80078 01d4 C003 .short 960 + 80079 01d6 000F .short 3840 + 80080 01d8 C803 .short 968 + 80081 01da 004F .short 20224 + 80082 01dc D003 .short 976 + 80083 01de 002F .short 12032 + 80084 01e0 D803 .short 984 + ARM GAS /tmp/ccLcDeJO.s page 1405 + + + 80085 01e2 006F .short 28416 + 80086 01e4 E003 .short 992 + 80087 01e6 001F .short 7936 + 80088 01e8 E803 .short 1000 + 80089 01ea 005F .short 24320 + 80090 01ec F003 .short 1008 + 80091 01ee 003F .short 16128 + 80092 01f0 F803 .short 1016 + 80093 01f2 007F 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9004 .short 1168 + 80127 0236 8024 .short 9344 + 80128 0238 9804 .short 1176 + 80129 023a 8064 .short 25728 + 80130 023c A004 .short 1184 + 80131 023e 8014 .short 5248 + 80132 0240 A804 .short 1192 + 80133 0242 8054 .short 21632 + 80134 0244 B004 .short 1200 + 80135 0246 8034 .short 13440 + 80136 0248 B804 .short 1208 + 80137 024a 8074 .short 29824 + 80138 024c C004 .short 1216 + 80139 024e 800C .short 3200 + 80140 0250 C804 .short 1224 + 80141 0252 804C .short 19584 + ARM GAS /tmp/ccLcDeJO.s page 1406 + + + 80142 0254 D004 .short 1232 + 80143 0256 802C .short 11392 + 80144 0258 D804 .short 1240 + 80145 025a 806C .short 27776 + 80146 025c E004 .short 1248 + 80147 025e 801C .short 7296 + 80148 0260 E804 .short 1256 + 80149 0262 805C .short 23680 + 80150 0264 F004 .short 1264 + 80151 0266 803C .short 15488 + 80152 0268 F804 .short 1272 + 80153 026a 807C .short 31872 + 80154 026c 0805 .short 1288 + 80155 026e 8042 .short 17024 + 80156 0270 1005 .short 1296 + 80157 0272 8022 .short 8832 + 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80287 0376 8033 .short 13184 + 80288 0378 3807 .short 1848 + 80289 037a 8073 .short 29568 + 80290 037c 4007 .short 1856 + 80291 037e 800B .short 2944 + 80292 0380 4807 .short 1864 + 80293 0382 804B .short 19328 + 80294 0384 5007 .short 1872 + 80295 0386 802B .short 11136 + 80296 0388 5807 .short 1880 + 80297 038a 806B .short 27520 + 80298 038c 6007 .short 1888 + 80299 038e 801B .short 7040 + 80300 0390 6807 .short 1896 + 80301 0392 805B .short 23424 + 80302 0394 7007 .short 1904 + 80303 0396 803B .short 15232 + 80304 0398 7807 .short 1912 + 80305 039a 807B .short 31616 + 80306 039c 8807 .short 1928 + 80307 039e 8047 .short 18304 + 80308 03a0 9007 .short 1936 + 80309 03a2 8027 .short 10112 + 80310 03a4 9807 .short 1944 + 80311 03a6 8067 .short 26496 + 80312 03a8 A007 .short 1952 + ARM GAS /tmp/ccLcDeJO.s page 1409 + + + 80313 03aa 8017 .short 6016 + 80314 03ac A807 .short 1960 + 80315 03ae 8057 .short 22400 + 80316 03b0 B007 .short 1968 + 80317 03b2 8037 .short 14208 + 80318 03b4 B807 .short 1976 + 80319 03b6 8077 .short 30592 + 80320 03b8 C007 .short 1984 + 80321 03ba 800F .short 3968 + 80322 03bc C807 .short 1992 + 80323 03be 804F .short 20352 + 80324 03c0 D007 .short 2000 + 80325 03c2 802F .short 12160 + 80326 03c4 D807 .short 2008 + 80327 03c6 806F .short 28544 + 80328 03c8 E007 .short 2016 + 80329 03ca 801F .short 8064 + 80330 03cc E807 .short 2024 + 80331 03ce 805F .short 24448 + 80332 03d0 F007 .short 2032 + 80333 03d2 803F .short 16256 + 80334 03d4 F807 .short 2040 + 80335 03d6 807F .short 32640 + 80336 03d8 0808 .short 2056 + 80337 03da 4040 .short 16448 + 80338 03dc 1008 .short 2064 + 80339 03de 4020 .short 8256 + 80340 03e0 1808 .short 2072 + 80341 03e2 4060 .short 24640 + 80342 03e4 2008 .short 2080 + 80343 03e6 4010 .short 4160 + 80344 03e8 2808 .short 2088 + 80345 03ea 4050 .short 20544 + 80346 03ec 3008 .short 2096 + 80347 03ee 4030 .short 12352 + 80348 03f0 3808 .short 2104 + 80349 03f2 4070 .short 28736 + 80350 03f4 4808 .short 2120 + 80351 03f6 4048 .short 18496 + 80352 03f8 5008 .short 2128 + 80353 03fa 4028 .short 10304 + 80354 03fc 5808 .short 2136 + 80355 03fe 4068 .short 26688 + 80356 0400 6008 .short 2144 + 80357 0402 4018 .short 6208 + 80358 0404 6808 .short 2152 + 80359 0406 4058 .short 22592 + 80360 0408 7008 .short 2160 + 80361 040a 4038 .short 14400 + 80362 040c 7808 .short 2168 + 80363 040e 4078 .short 30784 + 80364 0410 8808 .short 2184 + 80365 0412 4044 .short 17472 + 80366 0414 9008 .short 2192 + 80367 0416 4024 .short 9280 + 80368 0418 9808 .short 2200 + 80369 041a 4064 .short 25664 + ARM GAS /tmp/ccLcDeJO.s page 1410 + + + 80370 041c A008 .short 2208 + 80371 041e 4014 .short 5184 + 80372 0420 A808 .short 2216 + 80373 0422 4054 .short 21568 + 80374 0424 B008 .short 2224 + 80375 0426 4034 .short 13376 + 80376 0428 B808 .short 2232 + 80377 042a 4074 .short 29760 + 80378 042c C008 .short 2240 + 80379 042e 400C .short 3136 + 80380 0430 C808 .short 2248 + 80381 0432 404C .short 19520 + 80382 0434 D008 .short 2256 + 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780A .short 2680 + 80481 04fa 4079 .short 31040 + 80482 04fc 880A .short 2696 + 80483 04fe 4045 .short 17728 + ARM GAS /tmp/ccLcDeJO.s page 1412 + + + 80484 0500 900A .short 2704 + 80485 0502 4025 .short 9536 + 80486 0504 980A .short 2712 + 80487 0506 4065 .short 25920 + 80488 0508 A00A .short 2720 + 80489 050a 4015 .short 5440 + 80490 050c A80A .short 2728 + 80491 050e 4055 .short 21824 + 80492 0510 B00A .short 2736 + 80493 0512 4035 .short 13632 + 80494 0514 B80A .short 2744 + 80495 0516 4075 .short 30016 + 80496 0518 C00A .short 2752 + 80497 051a 400D .short 3392 + 80498 051c C80A .short 2760 + 80499 051e 404D .short 19776 + 80500 0520 D00A .short 2768 + 80501 0522 402D .short 11584 + 80502 0524 D80A .short 2776 + 80503 0526 406D .short 27968 + 80504 0528 E00A .short 2784 + 80505 052a 401D .short 7488 + 80506 052c E80A .short 2792 + 80507 052e 405D .short 23872 + 80508 0530 F00A .short 2800 + 80509 0532 403D .short 15680 + 80510 0534 F80A .short 2808 + 80511 0536 407D .short 32064 + 80512 0538 080B .short 2824 + 80513 053a 4043 .short 17216 + 80514 053c 100B .short 2832 + 80515 053e 4023 .short 9024 + 80516 0540 180B .short 2840 + 80517 0542 4063 .short 25408 + 80518 0544 200B .short 2848 + 80519 0546 4013 .short 4928 + 80520 0548 280B .short 2856 + 80521 054a 4053 .short 21312 + 80522 054c 300B .short 2864 + 80523 054e 4033 .short 13120 + 80524 0550 380B .short 2872 + 80525 0552 4073 .short 29504 + 80526 0554 480B .short 2888 + 80527 0556 404B .short 19264 + 80528 0558 500B .short 2896 + 80529 055a 402B .short 11072 + 80530 055c 580B .short 2904 + 80531 055e 406B .short 27456 + 80532 0560 600B .short 2912 + 80533 0562 401B .short 6976 + 80534 0564 680B .short 2920 + 80535 0566 405B .short 23360 + 80536 0568 700B .short 2928 + 80537 056a 403B .short 15168 + 80538 056c 780B .short 2936 + 80539 056e 407B .short 31552 + 80540 0570 880B .short 2952 + ARM GAS /tmp/ccLcDeJO.s page 1413 + + + 80541 0572 4047 .short 18240 + 80542 0574 900B .short 2960 + 80543 0576 4027 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17a4 983F .short 16280 + 82871 17a6 F067 .short 26608 + 82872 17a8 A83F .short 16296 + 82873 17aa F057 .short 22512 + 82874 17ac B83F .short 16312 + 82875 17ae F077 .short 30704 + 82876 17b0 C83F .short 16328 + 82877 17b2 F04F .short 20464 + ARM GAS /tmp/ccLcDeJO.s page 1454 + + + 82878 17b4 D83F .short 16344 + 82879 17b6 F06F .short 28656 + 82880 17b8 E83F .short 16360 + 82881 17ba F05F .short 24560 + 82882 17bc F83F .short 16376 + 82883 17be F07F .short 32752 + 82884 17c0 1840 .short 16408 + 82885 17c2 0860 .short 24584 + 82886 17c4 2840 .short 16424 + 82887 17c6 0850 .short 20488 + 82888 17c8 3840 .short 16440 + 82889 17ca 0870 .short 28680 + 82890 17cc 4840 .short 16456 + 82891 17ce 0848 .short 18440 + 82892 17d0 5840 .short 16472 + 82893 17d2 0868 .short 26632 + 82894 17d4 6840 .short 16488 + 82895 17d6 0858 .short 22536 + 82896 17d8 7840 .short 16504 + 82897 17da 0878 .short 30728 + 82898 17dc 8840 .short 16520 + 82899 17de 0844 .short 17416 + 82900 17e0 9840 .short 16536 + 82901 17e2 0864 .short 25608 + 82902 17e4 A840 .short 16552 + 82903 17e6 0854 .short 21512 + 82904 17e8 B840 .short 16568 + 82905 17ea 0874 .short 29704 + 82906 17ec C840 .short 16584 + 82907 17ee 084C .short 19464 + 82908 17f0 D840 .short 16600 + 82909 17f2 086C .short 27656 + 82910 17f4 E840 .short 16616 + 82911 17f6 085C .short 23560 + 82912 17f8 F840 .short 16632 + 82913 17fa 087C .short 31752 + 82914 17fc 0841 .short 16648 + 82915 17fe 0842 .short 16904 + 82916 1800 1841 .short 16664 + 82917 1802 0862 .short 25096 + 82918 1804 2841 .short 16680 + 82919 1806 0852 .short 21000 + 82920 1808 3841 .short 16696 + 82921 180a 0872 .short 29192 + 82922 180c 4841 .short 16712 + 82923 180e 084A .short 18952 + 82924 1810 5841 .short 16728 + 82925 1812 086A .short 27144 + 82926 1814 6841 .short 16744 + 82927 1816 085A .short 23048 + 82928 1818 7841 .short 16760 + 82929 181a 087A .short 31240 + 82930 181c 8841 .short 16776 + 82931 181e 0846 .short 17928 + 82932 1820 9841 .short 16792 + 82933 1822 0866 .short 26120 + 82934 1824 A841 .short 16808 + ARM GAS /tmp/ccLcDeJO.s page 1455 + + + 82935 1826 0856 .short 22024 + 82936 1828 B841 .short 16824 + 82937 182a 0876 .short 30216 + 82938 182c C841 .short 16840 + 82939 182e 084E .short 19976 + 82940 1830 D841 .short 16856 + 82941 1832 086E .short 28168 + 82942 1834 E841 .short 16872 + 82943 1836 085E .short 24072 + 82944 1838 F841 .short 16888 + 82945 183a 087E .short 32264 + 82946 183c 1842 .short 16920 + 82947 183e 0861 .short 24840 + 82948 1840 2842 .short 16936 + 82949 1842 0851 .short 20744 + 82950 1844 3842 .short 16952 + 82951 1846 0871 .short 28936 + 82952 1848 4842 .short 16968 + 82953 184a 0849 .short 18696 + 82954 184c 5842 .short 16984 + 82955 184e 0869 .short 26888 + 82956 1850 6842 .short 17000 + 82957 1852 0859 .short 22792 + 82958 1854 7842 .short 17016 + 82959 1856 0879 .short 30984 + 82960 1858 8842 .short 17032 + 82961 185a 0845 .short 17672 + 82962 185c 9842 .short 17048 + 82963 185e 0865 .short 25864 + 82964 1860 A842 .short 17064 + 82965 1862 0855 .short 21768 + 82966 1864 B842 .short 17080 + 82967 1866 0875 .short 29960 + 82968 1868 C842 .short 17096 + 82969 186a 084D .short 19720 + 82970 186c D842 .short 17112 + 82971 186e 086D .short 27912 + 82972 1870 E842 .short 17128 + 82973 1872 085D .short 23816 + 82974 1874 F842 .short 17144 + 82975 1876 087D .short 32008 + 82976 1878 1843 .short 17176 + 82977 187a 0863 .short 25352 + 82978 187c 2843 .short 17192 + 82979 187e 0853 .short 21256 + 82980 1880 3843 .short 17208 + 82981 1882 0873 .short 29448 + 82982 1884 4843 .short 17224 + 82983 1886 084B .short 19208 + 82984 1888 5843 .short 17240 + 82985 188a 086B .short 27400 + 82986 188c 6843 .short 17256 + 82987 188e 085B .short 23304 + 82988 1890 7843 .short 17272 + 82989 1892 087B .short 31496 + 82990 1894 8843 .short 17288 + 82991 1896 0847 .short 18184 + ARM GAS /tmp/ccLcDeJO.s page 1456 + + + 82992 1898 9843 .short 17304 + 82993 189a 0867 .short 26376 + 82994 189c A843 .short 17320 + 82995 189e 0857 .short 22280 + 82996 18a0 B843 .short 17336 + 82997 18a2 0877 .short 30472 + 82998 18a4 C843 .short 17352 + 82999 18a6 084F .short 20232 + 83000 18a8 D843 .short 17368 + 83001 18aa 086F .short 28424 + 83002 18ac E843 .short 17384 + 83003 18ae 085F .short 24328 + 83004 18b0 F843 .short 17400 + 83005 18b2 087F .short 32520 + 83006 18b4 1844 .short 17432 + 83007 18b6 8860 .short 24712 + 83008 18b8 2844 .short 17448 + 83009 18ba 8850 .short 20616 + 83010 18bc 3844 .short 17464 + 83011 18be 8870 .short 28808 + 83012 18c0 4844 .short 17480 + 83013 18c2 8848 .short 18568 + 83014 18c4 5844 .short 17496 + 83015 18c6 8868 .short 26760 + 83016 18c8 6844 .short 17512 + 83017 18ca 8858 .short 22664 + 83018 18cc 7844 .short 17528 + 83019 18ce 8878 .short 30856 + 83020 18d0 9844 .short 17560 + 83021 18d2 8864 .short 25736 + 83022 18d4 A844 .short 17576 + 83023 18d6 8854 .short 21640 + 83024 18d8 B844 .short 17592 + 83025 18da 8874 .short 29832 + 83026 18dc C844 .short 17608 + 83027 18de 884C .short 19592 + 83028 18e0 D844 .short 17624 + 83029 18e2 886C .short 27784 + 83030 18e4 E844 .short 17640 + 83031 18e6 885C .short 23688 + 83032 18e8 F844 .short 17656 + 83033 18ea 887C .short 31880 + 83034 18ec 1845 .short 17688 + 83035 18ee 8862 .short 25224 + 83036 18f0 2845 .short 17704 + 83037 18f2 8852 .short 21128 + 83038 18f4 3845 .short 17720 + 83039 18f6 8872 .short 29320 + 83040 18f8 4845 .short 17736 + 83041 18fa 884A .short 19080 + 83042 18fc 5845 .short 17752 + 83043 18fe 886A .short 27272 + 83044 1900 6845 .short 17768 + 83045 1902 885A .short 23176 + 83046 1904 7845 .short 17784 + 83047 1906 887A .short 31368 + 83048 1908 8845 .short 17800 + ARM GAS /tmp/ccLcDeJO.s page 1457 + + + 83049 190a 8846 .short 18056 + 83050 190c 9845 .short 17816 + 83051 190e 8866 .short 26248 + 83052 1910 A845 .short 17832 + 83053 1912 8856 .short 22152 + 83054 1914 B845 .short 17848 + 83055 1916 8876 .short 30344 + 83056 1918 C845 .short 17864 + 83057 191a 884E .short 20104 + 83058 191c D845 .short 17880 + 83059 191e 886E .short 28296 + 83060 1920 E845 .short 17896 + 83061 1922 885E .short 24200 + 83062 1924 F845 .short 17912 + 83063 1926 887E .short 32392 + 83064 1928 1846 .short 17944 + 83065 192a 8861 .short 24968 + 83066 192c 2846 .short 17960 + 83067 192e 8851 .short 20872 + 83068 1930 3846 .short 17976 + 83069 1932 8871 .short 29064 + 83070 1934 4846 .short 17992 + 83071 1936 8849 .short 18824 + 83072 1938 5846 .short 18008 + 83073 193a 8869 .short 27016 + 83074 193c 6846 .short 18024 + 83075 193e 8859 .short 22920 + 83076 1940 7846 .short 18040 + 83077 1942 8879 .short 31112 + 83078 1944 9846 .short 18072 + 83079 1946 8865 .short 25992 + 83080 1948 A846 .short 18088 + 83081 194a 8855 .short 21896 + 83082 194c B846 .short 18104 + 83083 194e 8875 .short 30088 + 83084 1950 C846 .short 18120 + 83085 1952 884D .short 19848 + 83086 1954 D846 .short 18136 + 83087 1956 886D .short 28040 + 83088 1958 E846 .short 18152 + 83089 195a 885D .short 23944 + 83090 195c F846 .short 18168 + 83091 195e 887D .short 32136 + 83092 1960 1847 .short 18200 + 83093 1962 8863 .short 25480 + 83094 1964 2847 .short 18216 + 83095 1966 8853 .short 21384 + 83096 1968 3847 .short 18232 + 83097 196a 8873 .short 29576 + 83098 196c 4847 .short 18248 + 83099 196e 884B .short 19336 + 83100 1970 5847 .short 18264 + 83101 1972 886B .short 27528 + 83102 1974 6847 .short 18280 + 83103 1976 885B .short 23432 + 83104 1978 7847 .short 18296 + 83105 197a 887B .short 31624 + ARM GAS /tmp/ccLcDeJO.s page 1458 + + + 83106 197c 9847 .short 18328 + 83107 197e 8867 .short 26504 + 83108 1980 A847 .short 18344 + 83109 1982 8857 .short 22408 + 83110 1984 B847 .short 18360 + 83111 1986 8877 .short 30600 + 83112 1988 C847 .short 18376 + 83113 198a 884F .short 20360 + 83114 198c D847 .short 18392 + 83115 198e 886F .short 28552 + 83116 1990 E847 .short 18408 + 83117 1992 885F .short 24456 + 83118 1994 F847 .short 18424 + 83119 1996 887F .short 32648 + 83120 1998 1848 .short 18456 + 83121 199a 4860 .short 24648 + 83122 199c 2848 .short 18472 + 83123 199e 4850 .short 20552 + 83124 19a0 3848 .short 18488 + 83125 19a2 4870 .short 28744 + 83126 19a4 5848 .short 18520 + 83127 19a6 4868 .short 26696 + 83128 19a8 6848 .short 18536 + 83129 19aa 4858 .short 22600 + 83130 19ac 7848 .short 18552 + 83131 19ae 4878 .short 30792 + 83132 19b0 9848 .short 18584 + 83133 19b2 4864 .short 25672 + 83134 19b4 A848 .short 18600 + 83135 19b6 4854 .short 21576 + 83136 19b8 B848 .short 18616 + 83137 19ba 4874 .short 29768 + 83138 19bc C848 .short 18632 + 83139 19be 484C .short 19528 + 83140 19c0 D848 .short 18648 + 83141 19c2 486C .short 27720 + 83142 19c4 E848 .short 18664 + 83143 19c6 485C .short 23624 + 83144 19c8 F848 .short 18680 + 83145 19ca 487C .short 31816 + 83146 19cc 1849 .short 18712 + 83147 19ce 4862 .short 25160 + 83148 19d0 2849 .short 18728 + 83149 19d2 4852 .short 21064 + 83150 19d4 3849 .short 18744 + 83151 19d6 4872 .short 29256 + 83152 19d8 4849 .short 18760 + 83153 19da 484A .short 19016 + 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1a5a 4877 .short 30536 + 83218 1a5c C84B .short 19400 + 83219 1a5e 484F .short 20296 + ARM GAS /tmp/ccLcDeJO.s page 1460 + + + 83220 1a60 D84B .short 19416 + 83221 1a62 486F .short 28488 + 83222 1a64 E84B .short 19432 + 83223 1a66 485F .short 24392 + 83224 1a68 F84B .short 19448 + 83225 1a6a 487F .short 32584 + 83226 1a6c 184C .short 19480 + 83227 1a6e C860 .short 24776 + 83228 1a70 284C .short 19496 + 83229 1a72 C850 .short 20680 + 83230 1a74 384C .short 19512 + 83231 1a76 C870 .short 28872 + 83232 1a78 584C .short 19544 + 83233 1a7a C868 .short 26824 + 83234 1a7c 684C .short 19560 + 83235 1a7e C858 .short 22728 + 83236 1a80 784C .short 19576 + 83237 1a82 C878 .short 30920 + 83238 1a84 984C .short 19608 + 83239 1a86 C864 .short 25800 + 83240 1a88 A84C .short 19624 + 83241 1a8a C854 .short 21704 + 83242 1a8c B84C .short 19640 + 83243 1a8e C874 .short 29896 + 83244 1a90 D84C .short 19672 + 83245 1a92 C86C .short 27848 + 83246 1a94 E84C .short 19688 + 83247 1a96 C85C .short 23752 + 83248 1a98 F84C .short 19704 + 83249 1a9a C87C .short 31944 + 83250 1a9c 184D .short 19736 + 83251 1a9e C862 .short 25288 + 83252 1aa0 284D .short 19752 + 83253 1aa2 C852 .short 21192 + 83254 1aa4 384D .short 19768 + 83255 1aa6 C872 .short 29384 + 83256 1aa8 584D .short 19800 + 83257 1aaa C86A .short 27336 + 83258 1aac 684D .short 19816 + 83259 1aae C85A .short 23240 + 83260 1ab0 784D .short 19832 + 83261 1ab2 C87A .short 31432 + 83262 1ab4 984D .short 19864 + 83263 1ab6 C866 .short 26312 + 83264 1ab8 A84D .short 19880 + 83265 1aba C856 .short 22216 + 83266 1abc B84D .short 19896 + 83267 1abe C876 .short 30408 + 83268 1ac0 C84D .short 19912 + 83269 1ac2 C84E .short 20168 + 83270 1ac4 D84D .short 19928 + 83271 1ac6 C86E .short 28360 + 83272 1ac8 E84D .short 19944 + 83273 1aca C85E .short 24264 + 83274 1acc F84D .short 19960 + 83275 1ace C87E .short 32456 + 83276 1ad0 184E .short 19992 + ARM GAS /tmp/ccLcDeJO.s page 1461 + + + 83277 1ad2 C861 .short 25032 + 83278 1ad4 284E .short 20008 + 83279 1ad6 C851 .short 20936 + 83280 1ad8 384E .short 20024 + 83281 1ada C871 .short 29128 + 83282 1adc 584E .short 20056 + 83283 1ade C869 .short 27080 + 83284 1ae0 684E .short 20072 + 83285 1ae2 C859 .short 22984 + 83286 1ae4 784E .short 20088 + 83287 1ae6 C879 .short 31176 + 83288 1ae8 984E .short 20120 + 83289 1aea C865 .short 26056 + 83290 1aec A84E .short 20136 + 83291 1aee C855 .short 21960 + 83292 1af0 B84E .short 20152 + 83293 1af2 C875 .short 30152 + 83294 1af4 D84E .short 20184 + 83295 1af6 C86D .short 28104 + 83296 1af8 E84E .short 20200 + 83297 1afa C85D .short 24008 + 83298 1afc F84E .short 20216 + 83299 1afe C87D .short 32200 + 83300 1b00 184F .short 20248 + 83301 1b02 C863 .short 25544 + 83302 1b04 284F .short 20264 + 83303 1b06 C853 .short 21448 + 83304 1b08 384F .short 20280 + 83305 1b0a C873 .short 29640 + 83306 1b0c 584F .short 20312 + 83307 1b0e C86B .short 27592 + 83308 1b10 684F .short 20328 + 83309 1b12 C85B .short 23496 + 83310 1b14 784F .short 20344 + 83311 1b16 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.short 21080 + 83375 1b96 2869 .short 26920 + 83376 1b98 6852 .short 21096 + 83377 1b9a 2859 .short 22824 + 83378 1b9c 7852 .short 21112 + 83379 1b9e 2879 .short 31016 + 83380 1ba0 9852 .short 21144 + 83381 1ba2 2865 .short 25896 + 83382 1ba4 A852 .short 21160 + 83383 1ba6 2855 .short 21800 + 83384 1ba8 B852 .short 21176 + 83385 1baa 2875 .short 29992 + 83386 1bac D852 .short 21208 + 83387 1bae 286D .short 27944 + 83388 1bb0 E852 .short 21224 + 83389 1bb2 285D .short 23848 + 83390 1bb4 F852 .short 21240 + ARM GAS /tmp/ccLcDeJO.s page 1463 + + + 83391 1bb6 287D .short 32040 + 83392 1bb8 1853 .short 21272 + 83393 1bba 2863 .short 25384 + 83394 1bbc 3853 .short 21304 + 83395 1bbe 2873 .short 29480 + 83396 1bc0 5853 .short 21336 + 83397 1bc2 286B .short 27432 + 83398 1bc4 6853 .short 21352 + 83399 1bc6 285B .short 23336 + 83400 1bc8 7853 .short 21368 + 83401 1bca 287B .short 31528 + 83402 1bcc 9853 .short 21400 + 83403 1bce 2867 .short 26408 + 83404 1bd0 A853 .short 21416 + 83405 1bd2 2857 .short 22312 + 83406 1bd4 B853 .short 21432 + 83407 1bd6 2877 .short 30504 + 83408 1bd8 D853 .short 21464 + 83409 1bda 286F .short 28456 + 83410 1bdc E853 .short 21480 + 83411 1bde 285F .short 24360 + 83412 1be0 F853 .short 21496 + 83413 1be2 287F .short 32552 + 83414 1be4 1854 .short 21528 + 83415 1be6 A860 .short 24744 + 83416 1be8 3854 .short 21560 + 83417 1bea A870 .short 28840 + 83418 1bec 5854 .short 21592 + 83419 1bee A868 .short 26792 + 83420 1bf0 6854 .short 21608 + 83421 1bf2 A858 .short 22696 + 83422 1bf4 7854 .short 21624 + 83423 1bf6 A878 .short 30888 + 83424 1bf8 9854 .short 21656 + 83425 1bfa A864 .short 25768 + 83426 1bfc B854 .short 21688 + 83427 1bfe A874 .short 29864 + 83428 1c00 D854 .short 21720 + 83429 1c02 A86C .short 27816 + 83430 1c04 E854 .short 21736 + 83431 1c06 A85C .short 23720 + 83432 1c08 F854 .short 21752 + 83433 1c0a A87C .short 31912 + 83434 1c0c 1855 .short 21784 + 83435 1c0e A862 .short 25256 + 83436 1c10 3855 .short 21816 + 83437 1c12 A872 .short 29352 + 83438 1c14 5855 .short 21848 + 83439 1c16 A86A .short 27304 + 83440 1c18 6855 .short 21864 + 83441 1c1a A85A .short 23208 + 83442 1c1c 7855 .short 21880 + 83443 1c1e A87A .short 31400 + 83444 1c20 9855 .short 21912 + 83445 1c22 A866 .short 26280 + 83446 1c24 A855 .short 21928 + 83447 1c26 A856 .short 22184 + ARM GAS /tmp/ccLcDeJO.s page 1464 + + + 83448 1c28 B855 .short 21944 + 83449 1c2a A876 .short 30376 + 83450 1c2c D855 .short 21976 + 83451 1c2e A86E .short 28328 + 83452 1c30 E855 .short 21992 + 83453 1c32 A85E .short 24232 + 83454 1c34 F855 .short 22008 + 83455 1c36 A87E .short 32424 + 83456 1c38 1856 .short 22040 + 83457 1c3a A861 .short 25000 + 83458 1c3c 3856 .short 22072 + 83459 1c3e A871 .short 29096 + 83460 1c40 5856 .short 22104 + 83461 1c42 A869 .short 27048 + 83462 1c44 6856 .short 22120 + 83463 1c46 A859 .short 22952 + 83464 1c48 7856 .short 22136 + 83465 1c4a A879 .short 31144 + 83466 1c4c 9856 .short 22168 + 83467 1c4e A865 .short 26024 + 83468 1c50 B856 .short 22200 + 83469 1c52 A875 .short 30120 + 83470 1c54 D856 .short 22232 + 83471 1c56 A86D .short 28072 + 83472 1c58 E856 .short 22248 + 83473 1c5a A85D .short 23976 + 83474 1c5c F856 .short 22264 + 83475 1c5e A87D .short 32168 + 83476 1c60 1857 .short 22296 + 83477 1c62 A863 .short 25512 + 83478 1c64 3857 .short 22328 + 83479 1c66 A873 .short 29608 + 83480 1c68 5857 .short 22360 + 83481 1c6a A86B .short 27560 + 83482 1c6c 6857 .short 22376 + 83483 1c6e A85B .short 23464 + 83484 1c70 7857 .short 22392 + 83485 1c72 A87B .short 31656 + 83486 1c74 9857 .short 22424 + 83487 1c76 A867 .short 26536 + 83488 1c78 B857 .short 22456 + 83489 1c7a A877 .short 30632 + 83490 1c7c D857 .short 22488 + 83491 1c7e A86F .short 28584 + 83492 1c80 E857 .short 22504 + 83493 1c82 A85F .short 24488 + 83494 1c84 F857 .short 22520 + 83495 1c86 A87F .short 32680 + 83496 1c88 1858 .short 22552 + 83497 1c8a 6860 .short 24680 + 83498 1c8c 3858 .short 22584 + 83499 1c8e 6870 .short 28776 + 83500 1c90 5858 .short 22616 + 83501 1c92 6868 .short 26728 + 83502 1c94 7858 .short 22648 + 83503 1c96 6878 .short 30824 + 83504 1c98 9858 .short 22680 + ARM GAS /tmp/ccLcDeJO.s page 1465 + + + 83505 1c9a 6864 .short 25704 + 83506 1c9c B858 .short 22712 + 83507 1c9e 6874 .short 29800 + 83508 1ca0 D858 .short 22744 + 83509 1ca2 686C .short 27752 + 83510 1ca4 E858 .short 22760 + 83511 1ca6 685C .short 23656 + 83512 1ca8 F858 .short 22776 + 83513 1caa 687C .short 31848 + 83514 1cac 1859 .short 22808 + 83515 1cae 6862 .short 25192 + 83516 1cb0 3859 .short 22840 + 83517 1cb2 6872 .short 29288 + 83518 1cb4 5859 .short 22872 + 83519 1cb6 686A .short 27240 + 83520 1cb8 6859 .short 22888 + 83521 1cba 685A .short 23144 + 83522 1cbc 7859 .short 22904 + 83523 1cbe 687A .short 31336 + 83524 1cc0 9859 .short 22936 + 83525 1cc2 6866 .short 26216 + 83526 1cc4 B859 .short 22968 + 83527 1cc6 6876 .short 30312 + 83528 1cc8 D859 .short 23000 + 83529 1cca 686E .short 28264 + 83530 1ccc E859 .short 23016 + 83531 1cce 685E .short 24168 + 83532 1cd0 F859 .short 23032 + 83533 1cd2 687E .short 32360 + 83534 1cd4 185A .short 23064 + 83535 1cd6 6861 .short 24936 + 83536 1cd8 385A .short 23096 + 83537 1cda 6871 .short 29032 + 83538 1cdc 585A .short 23128 + 83539 1cde 6869 .short 26984 + 83540 1ce0 785A .short 23160 + 83541 1ce2 6879 .short 31080 + 83542 1ce4 985A .short 23192 + 83543 1ce6 6865 .short 25960 + 83544 1ce8 B85A .short 23224 + 83545 1cea 6875 .short 30056 + 83546 1cec D85A .short 23256 + 83547 1cee 686D .short 28008 + 83548 1cf0 E85A .short 23272 + 83549 1cf2 685D .short 23912 + 83550 1cf4 F85A .short 23288 + 83551 1cf6 687D .short 32104 + 83552 1cf8 185B .short 23320 + 83553 1cfa 6863 .short 25448 + 83554 1cfc 385B .short 23352 + 83555 1cfe 6873 .short 29544 + 83556 1d00 585B .short 23384 + 83557 1d02 686B .short 27496 + 83558 1d04 785B .short 23416 + 83559 1d06 687B .short 31592 + 83560 1d08 985B .short 23448 + 83561 1d0a 6867 .short 26472 + ARM GAS /tmp/ccLcDeJO.s page 1466 + + + 83562 1d0c B85B .short 23480 + 83563 1d0e 6877 .short 30568 + 83564 1d10 D85B .short 23512 + 83565 1d12 686F .short 28520 + 83566 1d14 E85B .short 23528 + 83567 1d16 685F .short 24424 + 83568 1d18 F85B .short 23544 + 83569 1d1a 687F .short 32616 + 83570 1d1c 185C .short 23576 + 83571 1d1e E860 .short 24808 + 83572 1d20 385C .short 23608 + 83573 1d22 E870 .short 28904 + 83574 1d24 585C .short 23640 + 83575 1d26 E868 .short 26856 + 83576 1d28 785C .short 23672 + 83577 1d2a E878 .short 30952 + 83578 1d2c 985C .short 23704 + 83579 1d2e E864 .short 25832 + 83580 1d30 B85C .short 23736 + 83581 1d32 E874 .short 29928 + 83582 1d34 D85C .short 23768 + 83583 1d36 E86C .short 27880 + 83584 1d38 F85C .short 23800 + 83585 1d3a E87C .short 31976 + 83586 1d3c 185D .short 23832 + 83587 1d3e E862 .short 25320 + 83588 1d40 385D .short 23864 + 83589 1d42 E872 .short 29416 + 83590 1d44 585D .short 23896 + 83591 1d46 E86A .short 27368 + 83592 1d48 785D .short 23928 + 83593 1d4a E87A .short 31464 + 83594 1d4c 985D .short 23960 + 83595 1d4e E866 .short 26344 + 83596 1d50 B85D .short 23992 + 83597 1d52 E876 .short 30440 + 83598 1d54 D85D .short 24024 + 83599 1d56 E86E .short 28392 + 83600 1d58 E85D .short 24040 + 83601 1d5a E85E .short 24296 + 83602 1d5c F85D .short 24056 + 83603 1d5e E87E .short 32488 + 83604 1d60 185E .short 24088 + 83605 1d62 E861 .short 25064 + 83606 1d64 385E .short 24120 + 83607 1d66 E871 .short 29160 + 83608 1d68 585E .short 24152 + 83609 1d6a E869 .short 27112 + 83610 1d6c 785E .short 24184 + 83611 1d6e E879 .short 31208 + 83612 1d70 985E .short 24216 + 83613 1d72 E865 .short 26088 + 83614 1d74 B85E .short 24248 + 83615 1d76 E875 .short 30184 + 83616 1d78 D85E .short 24280 + 83617 1d7a E86D .short 28136 + 83618 1d7c F85E .short 24312 + ARM GAS /tmp/ccLcDeJO.s page 1467 + + + 83619 1d7e E87D .short 32232 + 83620 1d80 185F .short 24344 + 83621 1d82 E863 .short 25576 + 83622 1d84 385F .short 24376 + 83623 1d86 E873 .short 29672 + 83624 1d88 585F .short 24408 + 83625 1d8a E86B .short 27624 + 83626 1d8c 785F .short 24440 + 83627 1d8e E87B .short 31720 + 83628 1d90 985F .short 24472 + 83629 1d92 E867 .short 26600 + 83630 1d94 B85F .short 24504 + 83631 1d96 E877 .short 30696 + 83632 1d98 D85F .short 24536 + 83633 1d9a E86F .short 28648 + 83634 1d9c F85F .short 24568 + 83635 1d9e E87F .short 32744 + 83636 1da0 3860 .short 24632 + 83637 1da2 1870 .short 28696 + 83638 1da4 5860 .short 24664 + 83639 1da6 1868 .short 26648 + 83640 1da8 7860 .short 24696 + 83641 1daa 1878 .short 30744 + 83642 1dac 9860 .short 24728 + 83643 1dae 1864 .short 25624 + 83644 1db0 B860 .short 24760 + 83645 1db2 1874 .short 29720 + 83646 1db4 D860 .short 24792 + 83647 1db6 186C .short 27672 + 83648 1db8 F860 .short 24824 + 83649 1dba 187C .short 31768 + 83650 1dbc 1861 .short 24856 + 83651 1dbe 1862 .short 25112 + 83652 1dc0 3861 .short 24888 + 83653 1dc2 1872 .short 29208 + 83654 1dc4 5861 .short 24920 + 83655 1dc6 186A .short 27160 + 83656 1dc8 7861 .short 24952 + 83657 1dca 187A .short 31256 + 83658 1dcc 9861 .short 24984 + 83659 1dce 1866 .short 26136 + 83660 1dd0 B861 .short 25016 + 83661 1dd2 1876 .short 30232 + 83662 1dd4 D861 .short 25048 + 83663 1dd6 186E .short 28184 + 83664 1dd8 F861 .short 25080 + 83665 1dda 187E .short 32280 + 83666 1ddc 3862 .short 25144 + 83667 1dde 1871 .short 28952 + 83668 1de0 5862 .short 25176 + 83669 1de2 1869 .short 26904 + 83670 1de4 7862 .short 25208 + 83671 1de6 1879 .short 31000 + 83672 1de8 9862 .short 25240 + 83673 1dea 1865 .short 25880 + 83674 1dec B862 .short 25272 + 83675 1dee 1875 .short 29976 + ARM GAS /tmp/ccLcDeJO.s page 1468 + + + 83676 1df0 D862 .short 25304 + 83677 1df2 186D .short 27928 + 83678 1df4 F862 .short 25336 + 83679 1df6 187D .short 32024 + 83680 1df8 3863 .short 25400 + 83681 1dfa 1873 .short 29464 + 83682 1dfc 5863 .short 25432 + 83683 1dfe 186B .short 27416 + 83684 1e00 7863 .short 25464 + 83685 1e02 187B .short 31512 + 83686 1e04 9863 .short 25496 + 83687 1e06 1867 .short 26392 + 83688 1e08 B863 .short 25528 + 83689 1e0a 1877 .short 30488 + 83690 1e0c D863 .short 25560 + 83691 1e0e 186F .short 28440 + 83692 1e10 F863 .short 25592 + 83693 1e12 187F .short 32536 + 83694 1e14 3864 .short 25656 + 83695 1e16 9870 .short 28824 + 83696 1e18 5864 .short 25688 + 83697 1e1a 9868 .short 26776 + 83698 1e1c 7864 .short 25720 + 83699 1e1e 9878 .short 30872 + 83700 1e20 B864 .short 25784 + 83701 1e22 9874 .short 29848 + 83702 1e24 D864 .short 25816 + 83703 1e26 986C .short 27800 + 83704 1e28 F864 .short 25848 + 83705 1e2a 987C .short 31896 + 83706 1e2c 3865 .short 25912 + 83707 1e2e 9872 .short 29336 + 83708 1e30 5865 .short 25944 + 83709 1e32 986A .short 27288 + 83710 1e34 7865 .short 25976 + 83711 1e36 987A .short 31384 + 83712 1e38 9865 .short 26008 + 83713 1e3a 9866 .short 26264 + 83714 1e3c B865 .short 26040 + 83715 1e3e 9876 .short 30360 + 83716 1e40 D865 .short 26072 + 83717 1e42 986E .short 28312 + 83718 1e44 F865 .short 26104 + 83719 1e46 987E .short 32408 + 83720 1e48 3866 .short 26168 + 83721 1e4a 9871 .short 29080 + 83722 1e4c 5866 .short 26200 + 83723 1e4e 9869 .short 27032 + 83724 1e50 7866 .short 26232 + 83725 1e52 9879 .short 31128 + 83726 1e54 B866 .short 26296 + 83727 1e56 9875 .short 30104 + 83728 1e58 D866 .short 26328 + 83729 1e5a 986D .short 28056 + 83730 1e5c F866 .short 26360 + 83731 1e5e 987D .short 32152 + 83732 1e60 3867 .short 26424 + ARM GAS /tmp/ccLcDeJO.s page 1469 + + + 83733 1e62 9873 .short 29592 + 83734 1e64 5867 .short 26456 + 83735 1e66 986B .short 27544 + 83736 1e68 7867 .short 26488 + 83737 1e6a 987B .short 31640 + 83738 1e6c B867 .short 26552 + 83739 1e6e 9877 .short 30616 + 83740 1e70 D867 .short 26584 + 83741 1e72 986F .short 28568 + 83742 1e74 F867 .short 26616 + 83743 1e76 987F .short 32664 + 83744 1e78 3868 .short 26680 + 83745 1e7a 5870 .short 28760 + 83746 1e7c 7868 .short 26744 + 83747 1e7e 5878 .short 30808 + 83748 1e80 B868 .short 26808 + 83749 1e82 5874 .short 29784 + 83750 1e84 D868 .short 26840 + 83751 1e86 586C .short 27736 + 83752 1e88 F868 .short 26872 + 83753 1e8a 587C .short 31832 + 83754 1e8c 3869 .short 26936 + 83755 1e8e 5872 .short 29272 + 83756 1e90 5869 .short 26968 + 83757 1e92 586A .short 27224 + 83758 1e94 7869 .short 27000 + 83759 1e96 587A .short 31320 + 83760 1e98 B869 .short 27064 + 83761 1e9a 5876 .short 30296 + 83762 1e9c D869 .short 27096 + 83763 1e9e 586E .short 28248 + 83764 1ea0 F869 .short 27128 + 83765 1ea2 587E .short 32344 + 83766 1ea4 386A .short 27192 + 83767 1ea6 5871 .short 29016 + 83768 1ea8 786A .short 27256 + 83769 1eaa 5879 .short 31064 + 83770 1eac B86A .short 27320 + 83771 1eae 5875 .short 30040 + 83772 1eb0 D86A .short 27352 + 83773 1eb2 586D .short 27992 + 83774 1eb4 F86A .short 27384 + 83775 1eb6 587D .short 32088 + 83776 1eb8 386B .short 27448 + 83777 1eba 5873 .short 29528 + 83778 1ebc 786B .short 27512 + 83779 1ebe 587B .short 31576 + 83780 1ec0 B86B .short 27576 + 83781 1ec2 5877 .short 30552 + 83782 1ec4 D86B .short 27608 + 83783 1ec6 586F .short 28504 + 83784 1ec8 F86B .short 27640 + 83785 1eca 587F .short 32600 + 83786 1ecc 386C .short 27704 + 83787 1ece D870 .short 28888 + 83788 1ed0 786C .short 27768 + 83789 1ed2 D878 .short 30936 + ARM GAS /tmp/ccLcDeJO.s page 1470 + + + 83790 1ed4 B86C .short 27832 + 83791 1ed6 D874 .short 29912 + 83792 1ed8 F86C .short 27896 + 83793 1eda D87C .short 31960 + 83794 1edc 386D .short 27960 + 83795 1ede D872 .short 29400 + 83796 1ee0 786D .short 28024 + 83797 1ee2 D87A .short 31448 + 83798 1ee4 B86D .short 28088 + 83799 1ee6 D876 .short 30424 + 83800 1ee8 D86D .short 28120 + 83801 1eea D86E .short 28376 + 83802 1eec F86D .short 28152 + 83803 1eee D87E .short 32472 + 83804 1ef0 386E .short 28216 + 83805 1ef2 D871 .short 29144 + 83806 1ef4 786E .short 28280 + 83807 1ef6 D879 .short 31192 + 83808 1ef8 B86E .short 28344 + 83809 1efa D875 .short 30168 + 83810 1efc F86E .short 28408 + 83811 1efe D87D .short 32216 + 83812 1f00 386F .short 28472 + 83813 1f02 D873 .short 29656 + 83814 1f04 786F .short 28536 + 83815 1f06 D87B .short 31704 + 83816 1f08 B86F .short 28600 + 83817 1f0a D877 .short 30680 + 83818 1f0c F86F .short 28664 + 83819 1f0e D87F .short 32728 + 83820 1f10 7870 .short 28792 + 83821 1f12 3878 .short 30776 + 83822 1f14 B870 .short 28856 + 83823 1f16 3874 .short 29752 + 83824 1f18 F870 .short 28920 + 83825 1f1a 387C .short 31800 + 83826 1f1c 3871 .short 28984 + 83827 1f1e 3872 .short 29240 + 83828 1f20 7871 .short 29048 + 83829 1f22 387A .short 31288 + 83830 1f24 B871 .short 29112 + 83831 1f26 3876 .short 30264 + 83832 1f28 F871 .short 29176 + 83833 1f2a 387E .short 32312 + 83834 1f2c 7872 .short 29304 + 83835 1f2e 3879 .short 31032 + 83836 1f30 B872 .short 29368 + 83837 1f32 3875 .short 30008 + 83838 1f34 F872 .short 29432 + 83839 1f36 387D .short 32056 + 83840 1f38 7873 .short 29560 + 83841 1f3a 387B .short 31544 + 83842 1f3c B873 .short 29624 + 83843 1f3e 3877 .short 30520 + 83844 1f40 F873 .short 29688 + 83845 1f42 387F .short 32568 + 83846 1f44 7874 .short 29816 + ARM GAS /tmp/ccLcDeJO.s page 1471 + + + 83847 1f46 B878 .short 30904 + 83848 1f48 F874 .short 29944 + 83849 1f4a B87C .short 31928 + 83850 1f4c 7875 .short 30072 + 83851 1f4e B87A .short 31416 + 83852 1f50 B875 .short 30136 + 83853 1f52 B876 .short 30392 + 83854 1f54 F875 .short 30200 + 83855 1f56 B87E .short 32440 + 83856 1f58 7876 .short 30328 + 83857 1f5a B879 .short 31160 + 83858 1f5c F876 .short 30456 + 83859 1f5e B87D .short 32184 + 83860 1f60 7877 .short 30584 + 83861 1f62 B87B .short 31672 + 83862 1f64 F877 .short 30712 + 83863 1f66 B87F .short 32696 + 83864 1f68 F878 .short 30968 + 83865 1f6a 787C .short 31864 + 83866 1f6c 7879 .short 31096 + 83867 1f6e 787A .short 31352 + 83868 1f70 F879 .short 31224 + 83869 1f72 787E .short 32376 + 83870 1f74 F87A .short 31480 + 83871 1f76 787D .short 32120 + 83872 1f78 F87B .short 31736 + 83873 1f7a 787F .short 32632 + 83874 1f7c F87D .short 32248 + 83875 1f7e F87E .short 32504 + 83876 .section .rodata.armBitRevIndexTableF64_512,"a" + 83877 .align 2 + 83880 armBitRevIndexTableF64_512: + 83881 0000 0800 .short 8 + 83882 0002 0008 .short 2048 + 83883 0004 1000 .short 16 + 83884 0006 0004 .short 1024 + 83885 0008 1800 .short 24 + 83886 000a 000C .short 3072 + 83887 000c 2000 .short 32 + 83888 000e 0002 .short 512 + 83889 0010 2800 .short 40 + 83890 0012 000A .short 2560 + 83891 0014 3000 .short 48 + 83892 0016 0006 .short 1536 + 83893 0018 3800 .short 56 + 83894 001a 000E .short 3584 + 83895 001c 4000 .short 64 + 83896 001e 0001 .short 256 + 83897 0020 4800 .short 72 + 83898 0022 0009 .short 2304 + 83899 0024 5000 .short 80 + 83900 0026 0005 .short 1280 + 83901 0028 5800 .short 88 + 83902 002a 000D .short 3328 + 83903 002c 6000 .short 96 + 83904 002e 0003 .short 768 + 83905 0030 6800 .short 104 + ARM GAS /tmp/ccLcDeJO.s page 1472 + + + 83906 0032 000B .short 2816 + 83907 0034 7000 .short 112 + 83908 0036 0007 .short 1792 + 83909 0038 7800 .short 120 + 83910 003a 000F .short 3840 + 83911 003c 8800 .short 136 + 83912 003e 8008 .short 2176 + 83913 0040 9000 .short 144 + 83914 0042 8004 .short 1152 + 83915 0044 9800 .short 152 + 83916 0046 800C .short 3200 + 83917 0048 A000 .short 160 + 83918 004a 8002 .short 640 + 83919 004c A800 .short 168 + 83920 004e 800A .short 2688 + 83921 0050 B000 .short 176 + 83922 0052 8006 .short 1664 + 83923 0054 B800 .short 184 + 83924 0056 800E .short 3712 + 83925 0058 C000 .short 192 + 83926 005a 8001 .short 384 + 83927 005c C800 .short 200 + 83928 005e 8009 .short 2432 + 83929 0060 D000 .short 208 + 83930 0062 8005 .short 1408 + 83931 0064 D800 .short 216 + 83932 0066 800D .short 3456 + 83933 0068 E000 .short 224 + 83934 006a 8003 .short 896 + 83935 006c E800 .short 232 + 83936 006e 800B .short 2944 + 83937 0070 F000 .short 240 + 83938 0072 8007 .short 1920 + 83939 0074 F800 .short 248 + 83940 0076 800F .short 3968 + 83941 0078 0801 .short 264 + 83942 007a 4008 .short 2112 + 83943 007c 1001 .short 272 + 83944 007e 4004 .short 1088 + 83945 0080 1801 .short 280 + 83946 0082 400C .short 3136 + 83947 0084 2001 .short 288 + 83948 0086 4002 .short 576 + 83949 0088 2801 .short 296 + 83950 008a 400A .short 2624 + 83951 008c 3001 .short 304 + 83952 008e 4006 .short 1600 + 83953 0090 3801 .short 312 + 83954 0092 400E .short 3648 + 83955 0094 4801 .short 328 + 83956 0096 4009 .short 2368 + 83957 0098 5001 .short 336 + 83958 009a 4005 .short 1344 + 83959 009c 5801 .short 344 + 83960 009e 400D .short 3392 + 83961 00a0 6001 .short 352 + 83962 00a2 4003 .short 832 + ARM GAS /tmp/ccLcDeJO.s page 1473 + + + 83963 00a4 6801 .short 360 + 83964 00a6 400B .short 2880 + 83965 00a8 7001 .short 368 + 83966 00aa 4007 .short 1856 + 83967 00ac 7801 .short 376 + 83968 00ae 400F .short 3904 + 83969 00b0 8801 .short 392 + 83970 00b2 C008 .short 2240 + 83971 00b4 9001 .short 400 + 83972 00b6 C004 .short 1216 + 83973 00b8 9801 .short 408 + 83974 00ba C00C .short 3264 + 83975 00bc A001 .short 416 + 83976 00be C002 .short 704 + 83977 00c0 A801 .short 424 + 83978 00c2 C00A .short 2752 + 83979 00c4 B001 .short 432 + 83980 00c6 C006 .short 1728 + 83981 00c8 B801 .short 440 + 83982 00ca C00E .short 3776 + 83983 00cc C801 .short 456 + 83984 00ce C009 .short 2496 + 83985 00d0 D001 .short 464 + 83986 00d2 C005 .short 1472 + 83987 00d4 D801 .short 472 + 83988 00d6 C00D .short 3520 + 83989 00d8 E001 .short 480 + 83990 00da C003 .short 960 + 83991 00dc E801 .short 488 + 83992 00de C00B .short 3008 + 83993 00e0 F001 .short 496 + 83994 00e2 C007 .short 1984 + 83995 00e4 F801 .short 504 + 83996 00e6 C00F .short 4032 + 83997 00e8 0802 .short 520 + 83998 00ea 2008 .short 2080 + 83999 00ec 1002 .short 528 + 84000 00ee 2004 .short 1056 + 84001 00f0 1802 .short 536 + 84002 00f2 200C .short 3104 + 84003 00f4 2802 .short 552 + 84004 00f6 200A .short 2592 + 84005 00f8 3002 .short 560 + 84006 00fa 2006 .short 1568 + 84007 00fc 3802 .short 568 + 84008 00fe 200E .short 3616 + 84009 0100 4802 .short 584 + 84010 0102 2009 .short 2336 + 84011 0104 5002 .short 592 + 84012 0106 2005 .short 1312 + 84013 0108 5802 .short 600 + 84014 010a 200D .short 3360 + 84015 010c 6002 .short 608 + 84016 010e 2003 .short 800 + 84017 0110 6802 .short 616 + 84018 0112 200B .short 2848 + 84019 0114 7002 .short 624 + ARM GAS /tmp/ccLcDeJO.s page 1474 + + + 84020 0116 2007 .short 1824 + 84021 0118 7802 .short 632 + 84022 011a 200F .short 3872 + 84023 011c 8802 .short 648 + 84024 011e A008 .short 2208 + 84025 0120 9002 .short 656 + 84026 0122 A004 .short 1184 + 84027 0124 9802 .short 664 + 84028 0126 A00C .short 3232 + 84029 0128 A802 .short 680 + 84030 012a A00A .short 2720 + 84031 012c B002 .short 688 + 84032 012e A006 .short 1696 + 84033 0130 B802 .short 696 + 84034 0132 A00E .short 3744 + 84035 0134 C802 .short 712 + 84036 0136 A009 .short 2464 + 84037 0138 D002 .short 720 + 84038 013a A005 .short 1440 + 84039 013c D802 .short 728 + 84040 013e A00D .short 3488 + 84041 0140 E002 .short 736 + 84042 0142 A003 .short 928 + 84043 0144 E802 .short 744 + 84044 0146 A00B .short 2976 + 84045 0148 F002 .short 752 + 84046 014a A007 .short 1952 + 84047 014c F802 .short 760 + 84048 014e A00F .short 4000 + 84049 0150 0803 .short 776 + 84050 0152 6008 .short 2144 + 84051 0154 1003 .short 784 + 84052 0156 6004 .short 1120 + 84053 0158 1803 .short 792 + 84054 015a 600C .short 3168 + 84055 015c 2803 .short 808 + 84056 015e 600A .short 2656 + 84057 0160 3003 .short 816 + 84058 0162 6006 .short 1632 + 84059 0164 3803 .short 824 + 84060 0166 600E .short 3680 + 84061 0168 4803 .short 840 + 84062 016a 6009 .short 2400 + 84063 016c 5003 .short 848 + 84064 016e 6005 .short 1376 + 84065 0170 5803 .short 856 + 84066 0172 600D .short 3424 + 84067 0174 6803 .short 872 + 84068 0176 600B .short 2912 + 84069 0178 7003 .short 880 + 84070 017a 6007 .short 1888 + 84071 017c 7803 .short 888 + 84072 017e 600F .short 3936 + 84073 0180 8803 .short 904 + 84074 0182 E008 .short 2272 + 84075 0184 9003 .short 912 + 84076 0186 E004 .short 1248 + ARM GAS /tmp/ccLcDeJO.s page 1475 + + + 84077 0188 9803 .short 920 + 84078 018a E00C .short 3296 + 84079 018c A803 .short 936 + 84080 018e E00A .short 2784 + 84081 0190 B003 .short 944 + 84082 0192 E006 .short 1760 + 84083 0194 B803 .short 952 + 84084 0196 E00E .short 3808 + 84085 0198 C803 .short 968 + 84086 019a E009 .short 2528 + 84087 019c D003 .short 976 + 84088 019e E005 .short 1504 + 84089 01a0 D803 .short 984 + 84090 01a2 E00D .short 3552 + 84091 01a4 E803 .short 1000 + 84092 01a6 E00B .short 3040 + 84093 01a8 F003 .short 1008 + 84094 01aa E007 .short 2016 + 84095 01ac F803 .short 1016 + 84096 01ae E00F .short 4064 + 84097 01b0 0804 .short 1032 + 84098 01b2 1008 .short 2064 + 84099 01b4 1804 .short 1048 + 84100 01b6 100C .short 3088 + 84101 01b8 2804 .short 1064 + 84102 01ba 100A .short 2576 + 84103 01bc 3004 .short 1072 + 84104 01be 1006 .short 1552 + 84105 01c0 3804 .short 1080 + 84106 01c2 100E .short 3600 + 84107 01c4 4804 .short 1096 + 84108 01c6 1009 .short 2320 + 84109 01c8 5004 .short 1104 + 84110 01ca 1005 .short 1296 + 84111 01cc 5804 .short 1112 + 84112 01ce 100D .short 3344 + 84113 01d0 6804 .short 1128 + 84114 01d2 100B .short 2832 + 84115 01d4 7004 .short 1136 + 84116 01d6 1007 .short 1808 + 84117 01d8 7804 .short 1144 + 84118 01da 100F .short 3856 + 84119 01dc 8804 .short 1160 + 84120 01de 9008 .short 2192 + 84121 01e0 9804 .short 1176 + 84122 01e2 900C .short 3216 + 84123 01e4 A804 .short 1192 + 84124 01e6 900A .short 2704 + 84125 01e8 B004 .short 1200 + 84126 01ea 9006 .short 1680 + 84127 01ec B804 .short 1208 + 84128 01ee 900E .short 3728 + 84129 01f0 C804 .short 1224 + 84130 01f2 9009 .short 2448 + 84131 01f4 D004 .short 1232 + 84132 01f6 9005 .short 1424 + 84133 01f8 D804 .short 1240 + ARM GAS /tmp/ccLcDeJO.s page 1476 + + + 84134 01fa 900D .short 3472 + 84135 01fc E804 .short 1256 + 84136 01fe 900B .short 2960 + 84137 0200 F004 .short 1264 + 84138 0202 9007 .short 1936 + 84139 0204 F804 .short 1272 + 84140 0206 900F .short 3984 + 84141 0208 0805 .short 1288 + 84142 020a 5008 .short 2128 + 84143 020c 1805 .short 1304 + 84144 020e 500C .short 3152 + 84145 0210 2805 .short 1320 + 84146 0212 500A .short 2640 + 84147 0214 3005 .short 1328 + 84148 0216 5006 .short 1616 + 84149 0218 3805 .short 1336 + 84150 021a 500E .short 3664 + 84151 021c 4805 .short 1352 + 84152 021e 5009 .short 2384 + 84153 0220 5805 .short 1368 + 84154 0222 500D .short 3408 + 84155 0224 6805 .short 1384 + 84156 0226 500B .short 2896 + 84157 0228 7005 .short 1392 + 84158 022a 5007 .short 1872 + 84159 022c 7805 .short 1400 + 84160 022e 500F .short 3920 + 84161 0230 8805 .short 1416 + 84162 0232 D008 .short 2256 + 84163 0234 9805 .short 1432 + 84164 0236 D00C .short 3280 + 84165 0238 A805 .short 1448 + 84166 023a D00A .short 2768 + 84167 023c B005 .short 1456 + 84168 023e D006 .short 1744 + 84169 0240 B805 .short 1464 + 84170 0242 D00E .short 3792 + 84171 0244 C805 .short 1480 + 84172 0246 D009 .short 2512 + 84173 0248 D805 .short 1496 + 84174 024a D00D .short 3536 + 84175 024c E805 .short 1512 + 84176 024e D00B .short 3024 + 84177 0250 F005 .short 1520 + 84178 0252 D007 .short 2000 + 84179 0254 F805 .short 1528 + 84180 0256 D00F .short 4048 + 84181 0258 0806 .short 1544 + 84182 025a 3008 .short 2096 + 84183 025c 1806 .short 1560 + 84184 025e 300C .short 3120 + 84185 0260 2806 .short 1576 + 84186 0262 300A .short 2608 + 84187 0264 3806 .short 1592 + 84188 0266 300E .short 3632 + 84189 0268 4806 .short 1608 + 84190 026a 3009 .short 2352 + ARM GAS /tmp/ccLcDeJO.s page 1477 + + + 84191 026c 5806 .short 1624 + 84192 026e 300D .short 3376 + 84193 0270 6806 .short 1640 + 84194 0272 300B .short 2864 + 84195 0274 7006 .short 1648 + 84196 0276 3007 .short 1840 + 84197 0278 7806 .short 1656 + 84198 027a 300F .short 3888 + 84199 027c 8806 .short 1672 + 84200 027e B008 .short 2224 + 84201 0280 9806 .short 1688 + 84202 0282 B00C .short 3248 + 84203 0284 A806 .short 1704 + 84204 0286 B00A .short 2736 + 84205 0288 B806 .short 1720 + 84206 028a B00E .short 3760 + 84207 028c C806 .short 1736 + 84208 028e B009 .short 2480 + 84209 0290 D806 .short 1752 + 84210 0292 B00D .short 3504 + 84211 0294 E806 .short 1768 + 84212 0296 B00B .short 2992 + 84213 0298 F006 .short 1776 + 84214 029a B007 .short 1968 + 84215 029c F806 .short 1784 + 84216 029e B00F .short 4016 + 84217 02a0 0807 .short 1800 + 84218 02a2 7008 .short 2160 + 84219 02a4 1807 .short 1816 + 84220 02a6 700C .short 3184 + 84221 02a8 2807 .short 1832 + 84222 02aa 700A .short 2672 + 84223 02ac 3807 .short 1848 + 84224 02ae 700E .short 3696 + 84225 02b0 4807 .short 1864 + 84226 02b2 7009 .short 2416 + 84227 02b4 5807 .short 1880 + 84228 02b6 700D .short 3440 + 84229 02b8 6807 .short 1896 + 84230 02ba 700B .short 2928 + 84231 02bc 7807 .short 1912 + 84232 02be 700F .short 3952 + 84233 02c0 8807 .short 1928 + 84234 02c2 F008 .short 2288 + 84235 02c4 9807 .short 1944 + 84236 02c6 F00C .short 3312 + 84237 02c8 A807 .short 1960 + 84238 02ca F00A .short 2800 + 84239 02cc B807 .short 1976 + 84240 02ce F00E .short 3824 + 84241 02d0 C807 .short 1992 + 84242 02d2 F009 .short 2544 + 84243 02d4 D807 .short 2008 + 84244 02d6 F00D .short 3568 + 84245 02d8 E807 .short 2024 + 84246 02da F00B .short 3056 + 84247 02dc F807 .short 2040 + ARM GAS /tmp/ccLcDeJO.s page 1478 + + + 84248 02de F00F .short 4080 + 84249 02e0 1808 .short 2072 + 84250 02e2 080C .short 3080 + 84251 02e4 2808 .short 2088 + 84252 02e6 080A .short 2568 + 84253 02e8 3808 .short 2104 + 84254 02ea 080E .short 3592 + 84255 02ec 4808 .short 2120 + 84256 02ee 0809 .short 2312 + 84257 02f0 5808 .short 2136 + 84258 02f2 080D .short 3336 + 84259 02f4 6808 .short 2152 + 84260 02f6 080B .short 2824 + 84261 02f8 7808 .short 2168 + 84262 02fa 080F .short 3848 + 84263 02fc 9808 .short 2200 + 84264 02fe 880C .short 3208 + 84265 0300 A808 .short 2216 + 84266 0302 880A .short 2696 + 84267 0304 B808 .short 2232 + 84268 0306 880E .short 3720 + 84269 0308 C808 .short 2248 + 84270 030a 8809 .short 2440 + 84271 030c D808 .short 2264 + 84272 030e 880D .short 3464 + 84273 0310 E808 .short 2280 + 84274 0312 880B .short 2952 + 84275 0314 F808 .short 2296 + 84276 0316 880F .short 3976 + 84277 0318 1809 .short 2328 + 84278 031a 480C .short 3144 + 84279 031c 2809 .short 2344 + 84280 031e 480A .short 2632 + 84281 0320 3809 .short 2360 + 84282 0322 480E .short 3656 + 84283 0324 5809 .short 2392 + 84284 0326 480D .short 3400 + 84285 0328 6809 .short 2408 + 84286 032a 480B .short 2888 + 84287 032c 7809 .short 2424 + 84288 032e 480F .short 3912 + 84289 0330 9809 .short 2456 + 84290 0332 C80C .short 3272 + 84291 0334 A809 .short 2472 + 84292 0336 C80A .short 2760 + 84293 0338 B809 .short 2488 + 84294 033a C80E .short 3784 + 84295 033c D809 .short 2520 + 84296 033e C80D .short 3528 + 84297 0340 E809 .short 2536 + 84298 0342 C80B .short 3016 + 84299 0344 F809 .short 2552 + 84300 0346 C80F .short 4040 + 84301 0348 180A .short 2584 + 84302 034a 280C .short 3112 + 84303 034c 380A .short 2616 + 84304 034e 280E .short 3624 + ARM GAS /tmp/ccLcDeJO.s page 1479 + + + 84305 0350 580A .short 2648 + 84306 0352 280D .short 3368 + 84307 0354 680A .short 2664 + 84308 0356 280B .short 2856 + 84309 0358 780A .short 2680 + 84310 035a 280F .short 3880 + 84311 035c 980A .short 2712 + 84312 035e A80C .short 3240 + 84313 0360 B80A .short 2744 + 84314 0362 A80E .short 3752 + 84315 0364 D80A .short 2776 + 84316 0366 A80D .short 3496 + 84317 0368 E80A .short 2792 + 84318 036a A80B .short 2984 + 84319 036c F80A .short 2808 + 84320 036e A80F .short 4008 + 84321 0370 180B .short 2840 + 84322 0372 680C .short 3176 + 84323 0374 380B .short 2872 + 84324 0376 680E .short 3688 + 84325 0378 580B .short 2904 + 84326 037a 680D .short 3432 + 84327 037c 780B .short 2936 + 84328 037e 680F .short 3944 + 84329 0380 980B .short 2968 + 84330 0382 E80C .short 3304 + 84331 0384 B80B .short 3000 + 84332 0386 E80E .short 3816 + 84333 0388 D80B .short 3032 + 84334 038a E80D .short 3560 + 84335 038c F80B .short 3064 + 84336 038e E80F .short 4072 + 84337 0390 380C .short 3128 + 84338 0392 180E .short 3608 + 84339 0394 580C .short 3160 + 84340 0396 180D .short 3352 + 84341 0398 780C .short 3192 + 84342 039a 180F .short 3864 + 84343 039c B80C .short 3256 + 84344 039e 980E .short 3736 + 84345 03a0 D80C .short 3288 + 84346 03a2 980D .short 3480 + 84347 03a4 F80C .short 3320 + 84348 03a6 980F .short 3992 + 84349 03a8 380D .short 3384 + 84350 03aa 580E .short 3672 + 84351 03ac 780D .short 3448 + 84352 03ae 580F .short 3928 + 84353 03b0 B80D .short 3512 + 84354 03b2 D80E .short 3800 + 84355 03b4 F80D .short 3576 + 84356 03b6 D80F .short 4056 + 84357 03b8 780E .short 3704 + 84358 03ba 380F .short 3896 + 84359 03bc F80E .short 3832 + 84360 03be B80F .short 4024 + 84361 .section .rodata.armBitRevIndexTableF64_64,"a" + ARM GAS /tmp/ccLcDeJO.s page 1480 + + + 84362 .align 2 + 84365 armBitRevIndexTableF64_64: + 84366 0000 0800 .short 8 + 84367 0002 0001 .short 256 + 84368 0004 1000 .short 16 + 84369 0006 8000 .short 128 + 84370 0008 1800 .short 24 + 84371 000a 8001 .short 384 + 84372 000c 2000 .short 32 + 84373 000e 4000 .short 64 + 84374 0010 2800 .short 40 + 84375 0012 4001 .short 320 + 84376 0014 3000 .short 48 + 84377 0016 C000 .short 192 + 84378 0018 3800 .short 56 + 84379 001a C001 .short 448 + 84380 001c 4800 .short 72 + 84381 001e 2001 .short 288 + 84382 0020 5000 .short 80 + 84383 0022 A000 .short 160 + 84384 0024 5800 .short 88 + 84385 0026 A001 .short 416 + 84386 0028 6800 .short 104 + 84387 002a 6001 .short 352 + 84388 002c 7000 .short 112 + 84389 002e E000 .short 224 + 84390 0030 7800 .short 120 + 84391 0032 E001 .short 480 + 84392 0034 8800 .short 136 + 84393 0036 1001 .short 272 + 84394 0038 9800 .short 152 + 84395 003a 9001 .short 400 + 84396 003c A800 .short 168 + 84397 003e 5001 .short 336 + 84398 0040 B000 .short 176 + 84399 0042 D000 .short 208 + 84400 0044 B800 .short 184 + 84401 0046 D001 .short 464 + 84402 0048 C800 .short 200 + 84403 004a 3001 .short 304 + 84404 004c D800 .short 216 + 84405 004e B001 .short 432 + 84406 0050 E800 .short 232 + 84407 0052 7001 .short 368 + 84408 0054 F800 .short 248 + 84409 0056 F001 .short 496 + 84410 0058 1801 .short 280 + 84411 005a 8801 .short 392 + 84412 005c 2801 .short 296 + 84413 005e 4801 .short 328 + 84414 0060 3801 .short 312 + 84415 0062 C801 .short 456 + 84416 0064 5801 .short 344 + 84417 0066 A801 .short 424 + 84418 0068 7801 .short 376 + 84419 006a E801 .short 488 + 84420 006c B801 .short 440 + ARM GAS /tmp/ccLcDeJO.s page 1481 + + + 84421 006e D801 .short 472 + 84422 .section .rodata.armBitRevIndexTable_fixed_1024,"a" + 84423 .align 2 + 84426 armBitRevIndexTable_fixed_1024: + 84427 0000 0800 .short 8 + 84428 0002 0010 .short 4096 + 84429 0004 1000 .short 16 + 84430 0006 0008 .short 2048 + 84431 0008 1800 .short 24 + 84432 000a 0018 .short 6144 + 84433 000c 2000 .short 32 + 84434 000e 0004 .short 1024 + 84435 0010 2800 .short 40 + 84436 0012 0014 .short 5120 + 84437 0014 3000 .short 48 + 84438 0016 000C .short 3072 + 84439 0018 3800 .short 56 + 84440 001a 001C .short 7168 + 84441 001c 4000 .short 64 + 84442 001e 0002 .short 512 + 84443 0020 4800 .short 72 + 84444 0022 0012 .short 4608 + 84445 0024 5000 .short 80 + 84446 0026 000A .short 2560 + 84447 0028 5800 .short 88 + 84448 002a 001A .short 6656 + 84449 002c 6000 .short 96 + 84450 002e 0006 .short 1536 + 84451 0030 6800 .short 104 + 84452 0032 0016 .short 5632 + 84453 0034 7000 .short 112 + 84454 0036 000E .short 3584 + 84455 0038 7800 .short 120 + 84456 003a 001E .short 7680 + 84457 003c 8000 .short 128 + 84458 003e 0001 .short 256 + 84459 0040 8800 .short 136 + 84460 0042 0011 .short 4352 + 84461 0044 9000 .short 144 + 84462 0046 0009 .short 2304 + 84463 0048 9800 .short 152 + 84464 004a 0019 .short 6400 + 84465 004c A000 .short 160 + 84466 004e 0005 .short 1280 + 84467 0050 A800 .short 168 + 84468 0052 0015 .short 5376 + 84469 0054 B000 .short 176 + 84470 0056 000D .short 3328 + 84471 0058 B800 .short 184 + 84472 005a 001D .short 7424 + 84473 005c C000 .short 192 + 84474 005e 0003 .short 768 + 84475 0060 C800 .short 200 + 84476 0062 0013 .short 4864 + 84477 0064 D000 .short 208 + 84478 0066 000B .short 2816 + 84479 0068 D800 .short 216 + ARM GAS /tmp/ccLcDeJO.s page 1482 + + + 84480 006a 001B .short 6912 + 84481 006c E000 .short 224 + 84482 006e 0007 .short 1792 + 84483 0070 E800 .short 232 + 84484 0072 0017 .short 5888 + 84485 0074 F000 .short 240 + 84486 0076 000F .short 3840 + 84487 0078 F800 .short 248 + 84488 007a 001F .short 7936 + 84489 007c 0801 .short 264 + 84490 007e 8010 .short 4224 + 84491 0080 1001 .short 272 + 84492 0082 8008 .short 2176 + 84493 0084 1801 .short 280 + 84494 0086 8018 .short 6272 + 84495 0088 2001 .short 288 + 84496 008a 8004 .short 1152 + 84497 008c 2801 .short 296 + 84498 008e 8014 .short 5248 + 84499 0090 3001 .short 304 + 84500 0092 800C .short 3200 + 84501 0094 3801 .short 312 + 84502 0096 801C .short 7296 + 84503 0098 4001 .short 320 + 84504 009a 8002 .short 640 + 84505 009c 4801 .short 328 + 84506 009e 8012 .short 4736 + 84507 00a0 5001 .short 336 + 84508 00a2 800A .short 2688 + 84509 00a4 5801 .short 344 + 84510 00a6 801A .short 6784 + 84511 00a8 6001 .short 352 + 84512 00aa 8006 .short 1664 + 84513 00ac 6801 .short 360 + 84514 00ae 8016 .short 5760 + 84515 00b0 7001 .short 368 + 84516 00b2 800E .short 3712 + 84517 00b4 7801 .short 376 + 84518 00b6 801E .short 7808 + 84519 00b8 8801 .short 392 + 84520 00ba 8011 .short 4480 + 84521 00bc 9001 .short 400 + 84522 00be 8009 .short 2432 + 84523 00c0 9801 .short 408 + 84524 00c2 8019 .short 6528 + 84525 00c4 A001 .short 416 + 84526 00c6 8005 .short 1408 + 84527 00c8 A801 .short 424 + 84528 00ca 8015 .short 5504 + 84529 00cc B001 .short 432 + 84530 00ce 800D .short 3456 + 84531 00d0 B801 .short 440 + 84532 00d2 801D .short 7552 + 84533 00d4 C001 .short 448 + 84534 00d6 8003 .short 896 + 84535 00d8 C801 .short 456 + 84536 00da 8013 .short 4992 + ARM GAS /tmp/ccLcDeJO.s page 1483 + + + 84537 00dc D001 .short 464 + 84538 00de 800B .short 2944 + 84539 00e0 D801 .short 472 + 84540 00e2 801B .short 7040 + 84541 00e4 E001 .short 480 + 84542 00e6 8007 .short 1920 + 84543 00e8 E801 .short 488 + 84544 00ea 8017 .short 6016 + 84545 00ec F001 .short 496 + 84546 00ee 800F .short 3968 + 84547 00f0 F801 .short 504 + 84548 00f2 801F .short 8064 + 84549 00f4 0802 .short 520 + 84550 00f6 4010 .short 4160 + 84551 00f8 1002 .short 528 + 84552 00fa 4008 .short 2112 + 84553 00fc 1802 .short 536 + 84554 00fe 4018 .short 6208 + 84555 0100 2002 .short 544 + 84556 0102 4004 .short 1088 + 84557 0104 2802 .short 552 + 84558 0106 4014 .short 5184 + 84559 0108 3002 .short 560 + 84560 010a 400C .short 3136 + 84561 010c 3802 .short 568 + 84562 010e 401C .short 7232 + 84563 0110 4802 .short 584 + 84564 0112 4012 .short 4672 + 84565 0114 5002 .short 592 + 84566 0116 400A .short 2624 + 84567 0118 5802 .short 600 + 84568 011a 401A .short 6720 + 84569 011c 6002 .short 608 + 84570 011e 4006 .short 1600 + 84571 0120 6802 .short 616 + 84572 0122 4016 .short 5696 + 84573 0124 7002 .short 624 + 84574 0126 400E .short 3648 + 84575 0128 7802 .short 632 + 84576 012a 401E .short 7744 + 84577 012c 8802 .short 648 + 84578 012e 4011 .short 4416 + 84579 0130 9002 .short 656 + 84580 0132 4009 .short 2368 + 84581 0134 9802 .short 664 + 84582 0136 4019 .short 6464 + 84583 0138 A002 .short 672 + 84584 013a 4005 .short 1344 + 84585 013c A802 .short 680 + 84586 013e 4015 .short 5440 + 84587 0140 B002 .short 688 + 84588 0142 400D .short 3392 + 84589 0144 B802 .short 696 + 84590 0146 401D .short 7488 + 84591 0148 C002 .short 704 + 84592 014a 4003 .short 832 + 84593 014c C802 .short 712 + ARM GAS /tmp/ccLcDeJO.s page 1484 + + + 84594 014e 4013 .short 4928 + 84595 0150 D002 .short 720 + 84596 0152 400B .short 2880 + 84597 0154 D802 .short 728 + 84598 0156 401B .short 6976 + 84599 0158 E002 .short 736 + 84600 015a 4007 .short 1856 + 84601 015c E802 .short 744 + 84602 015e 4017 .short 5952 + 84603 0160 F002 .short 752 + 84604 0162 400F .short 3904 + 84605 0164 F802 .short 760 + 84606 0166 401F .short 8000 + 84607 0168 0803 .short 776 + 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01ee 201C .short 7200 + 84675 01f0 4804 .short 1096 + 84676 01f2 2012 .short 4640 + 84677 01f4 5004 .short 1104 + 84678 01f6 200A .short 2592 + 84679 01f8 5804 .short 1112 + 84680 01fa 201A .short 6688 + 84681 01fc 6004 .short 1120 + 84682 01fe 2006 .short 1568 + 84683 0200 6804 .short 1128 + 84684 0202 2016 .short 5664 + 84685 0204 7004 .short 1136 + 84686 0206 200E .short 3616 + 84687 0208 7804 .short 1144 + 84688 020a 201E .short 7712 + 84689 020c 8804 .short 1160 + 84690 020e 2011 .short 4384 + 84691 0210 9004 .short 1168 + 84692 0212 2009 .short 2336 + 84693 0214 9804 .short 1176 + 84694 0216 2019 .short 6432 + 84695 0218 A004 .short 1184 + 84696 021a 2005 .short 1312 + 84697 021c A804 .short 1192 + 84698 021e 2015 .short 5408 + 84699 0220 B004 .short 1200 + 84700 0222 200D .short 3360 + 84701 0224 B804 .short 1208 + 84702 0226 201D .short 7456 + 84703 0228 C804 .short 1224 + 84704 022a 2013 .short 4896 + 84705 022c D004 .short 1232 + 84706 022e 200B .short 2848 + 84707 0230 D804 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3480 + 85098 053e B019 .short 6576 + 85099 0540 A80D .short 3496 + 85100 0542 B015 .short 5552 + 85101 0544 B80D .short 3512 + 85102 0546 B01D .short 7600 + 85103 0548 C80D .short 3528 + 85104 054a B013 .short 5040 + 85105 054c D80D .short 3544 + 85106 054e B01B .short 7088 + ARM GAS /tmp/ccLcDeJO.s page 1493 + + + 85107 0550 E80D .short 3560 + 85108 0552 B017 .short 6064 + 85109 0554 F00D .short 3568 + 85110 0556 B00F .short 4016 + 85111 0558 F80D .short 3576 + 85112 055a B01F .short 8112 + 85113 055c 080E .short 3592 + 85114 055e 7010 .short 4208 + 85115 0560 180E .short 3608 + 85116 0562 7018 .short 6256 + 85117 0564 280E .short 3624 + 85118 0566 7014 .short 5232 + 85119 0568 380E .short 3640 + 85120 056a 701C .short 7280 + 85121 056c 480E .short 3656 + 85122 056e 7012 .short 4720 + 85123 0570 580E .short 3672 + 85124 0572 701A .short 6768 + 85125 0574 680E .short 3688 + 85126 0576 7016 .short 5744 + 85127 0578 780E .short 3704 + 85128 057a 701E .short 7792 + 85129 057c 880E .short 3720 + 85130 057e 7011 .short 4464 + 85131 0580 980E .short 3736 + 85132 0582 7019 .short 6512 + 85133 0584 A80E .short 3752 + 85134 0586 7015 .short 5488 + 85135 0588 B80E .short 3768 + 85136 058a 701D .short 7536 + 85137 058c C80E .short 3784 + 85138 058e 7013 .short 4976 + 85139 0590 D80E .short 3800 + 85140 0592 701B .short 7024 + 85141 0594 E80E .short 3816 + 85142 0596 7017 .short 6000 + 85143 0598 F00E .short 3824 + 85144 059a 700F .short 3952 + 85145 059c F80E .short 3832 + 85146 059e 701F .short 8048 + 85147 05a0 080F .short 3848 + 85148 05a2 F010 .short 4336 + 85149 05a4 180F .short 3864 + 85150 05a6 F018 .short 6384 + 85151 05a8 280F .short 3880 + 85152 05aa F014 .short 5360 + 85153 05ac 380F .short 3896 + 85154 05ae F01C .short 7408 + 85155 05b0 480F .short 3912 + 85156 05b2 F012 .short 4848 + 85157 05b4 580F .short 3928 + 85158 05b6 F01A .short 6896 + 85159 05b8 680F .short 3944 + 85160 05ba F016 .short 5872 + 85161 05bc 780F .short 3960 + 85162 05be F01E .short 7920 + 85163 05c0 880F .short 3976 + ARM GAS /tmp/ccLcDeJO.s page 1494 + + + 85164 05c2 F011 .short 4592 + 85165 05c4 980F .short 3992 + 85166 05c6 F019 .short 6640 + 85167 05c8 A80F .short 4008 + 85168 05ca F015 .short 5616 + 85169 05cc B80F .short 4024 + 85170 05ce F01D .short 7664 + 85171 05d0 C80F .short 4040 + 85172 05d2 F013 .short 5104 + 85173 05d4 D80F .short 4056 + 85174 05d6 F01B .short 7152 + 85175 05d8 E80F .short 4072 + 85176 05da F017 .short 6128 + 85177 05dc F80F .short 4088 + 85178 05de F01F .short 8176 + 85179 05e0 1810 .short 4120 + 85180 05e2 0818 .short 6152 + 85181 05e4 2810 .short 4136 + 85182 05e6 0814 .short 5128 + 85183 05e8 3810 .short 4152 + 85184 05ea 081C .short 7176 + 85185 05ec 4810 .short 4168 + 85186 05ee 0812 .short 4616 + 85187 05f0 5810 .short 4184 + 85188 05f2 081A .short 6664 + 85189 05f4 6810 .short 4200 + 85190 05f6 0816 .short 5640 + 85191 05f8 7810 .short 4216 + 85192 05fa 081E .short 7688 + 85193 05fc 8810 .short 4232 + 85194 05fe 0811 .short 4360 + 85195 0600 9810 .short 4248 + 85196 0602 0819 .short 6408 + 85197 0604 A810 .short 4264 + 85198 0606 0815 .short 5384 + 85199 0608 B810 .short 4280 + 85200 060a 081D .short 7432 + 85201 060c C810 .short 4296 + 85202 060e 0813 .short 4872 + 85203 0610 D810 .short 4312 + 85204 0612 081B .short 6920 + 85205 0614 E810 .short 4328 + 85206 0616 0817 .short 5896 + 85207 0618 F810 .short 4344 + 85208 061a 081F .short 7944 + 85209 061c 1811 .short 4376 + 85210 061e 8818 .short 6280 + 85211 0620 2811 .short 4392 + 85212 0622 8814 .short 5256 + 85213 0624 3811 .short 4408 + 85214 0626 881C .short 7304 + 85215 0628 4811 .short 4424 + 85216 062a 8812 .short 4744 + 85217 062c 5811 .short 4440 + 85218 062e 881A .short 6792 + 85219 0630 6811 .short 4456 + 85220 0632 8816 .short 5768 + ARM GAS /tmp/ccLcDeJO.s page 1495 + + + 85221 0634 7811 .short 4472 + 85222 0636 881E .short 7816 + 85223 0638 9811 .short 4504 + 85224 063a 8819 .short 6536 + 85225 063c A811 .short 4520 + 85226 063e 8815 .short 5512 + 85227 0640 B811 .short 4536 + 85228 0642 881D .short 7560 + 85229 0644 C811 .short 4552 + 85230 0646 8813 .short 5000 + 85231 0648 D811 .short 4568 + 85232 064a 881B .short 7048 + 85233 064c E811 .short 4584 + 85234 064e 8817 .short 6024 + 85235 0650 F811 .short 4600 + 85236 0652 881F .short 8072 + 85237 0654 1812 .short 4632 + 85238 0656 4818 .short 6216 + 85239 0658 2812 .short 4648 + 85240 065a 4814 .short 5192 + 85241 065c 3812 .short 4664 + 85242 065e 481C .short 7240 + 85243 0660 5812 .short 4696 + 85244 0662 481A .short 6728 + 85245 0664 6812 .short 4712 + 85246 0666 4816 .short 5704 + 85247 0668 7812 .short 4728 + 85248 066a 481E .short 7752 + 85249 066c 9812 .short 4760 + 85250 066e 4819 .short 6472 + 85251 0670 A812 .short 4776 + 85252 0672 4815 .short 5448 + 85253 0674 B812 .short 4792 + 85254 0676 481D .short 7496 + 85255 0678 C812 .short 4808 + 85256 067a 4813 .short 4936 + 85257 067c D812 .short 4824 + 85258 067e 481B .short 6984 + 85259 0680 E812 .short 4840 + 85260 0682 4817 .short 5960 + 85261 0684 F812 .short 4856 + 85262 0686 481F .short 8008 + 85263 0688 1813 .short 4888 + 85264 068a C818 .short 6344 + 85265 068c 2813 .short 4904 + 85266 068e C814 .short 5320 + 85267 0690 3813 .short 4920 + 85268 0692 C81C .short 7368 + 85269 0694 5813 .short 4952 + 85270 0696 C81A .short 6856 + 85271 0698 6813 .short 4968 + 85272 069a C816 .short 5832 + 85273 069c 7813 .short 4984 + 85274 069e C81E .short 7880 + 85275 06a0 9813 .short 5016 + 85276 06a2 C819 .short 6600 + 85277 06a4 A813 .short 5032 + ARM GAS /tmp/ccLcDeJO.s page 1496 + + + 85278 06a6 C815 .short 5576 + 85279 06a8 B813 .short 5048 + 85280 06aa C81D .short 7624 + 85281 06ac D813 .short 5080 + 85282 06ae C81B .short 7112 + 85283 06b0 E813 .short 5096 + 85284 06b2 C817 .short 6088 + 85285 06b4 F813 .short 5112 + 85286 06b6 C81F .short 8136 + 85287 06b8 1814 .short 5144 + 85288 06ba 2818 .short 6184 + 85289 06bc 3814 .short 5176 + 85290 06be 281C .short 7208 + 85291 06c0 5814 .short 5208 + 85292 06c2 281A .short 6696 + 85293 06c4 6814 .short 5224 + 85294 06c6 2816 .short 5672 + 85295 06c8 7814 .short 5240 + 85296 06ca 281E .short 7720 + 85297 06cc 9814 .short 5272 + 85298 06ce 2819 .short 6440 + 85299 06d0 A814 .short 5288 + 85300 06d2 2815 .short 5416 + 85301 06d4 B814 .short 5304 + 85302 06d6 281D .short 7464 + 85303 06d8 D814 .short 5336 + 85304 06da 281B .short 6952 + 85305 06dc E814 .short 5352 + 85306 06de 2817 .short 5928 + 85307 06e0 F814 .short 5368 + 85308 06e2 281F .short 7976 + 85309 06e4 1815 .short 5400 + 85310 06e6 A818 .short 6312 + 85311 06e8 3815 .short 5432 + 85312 06ea A81C .short 7336 + 85313 06ec 5815 .short 5464 + 85314 06ee A81A .short 6824 + 85315 06f0 6815 .short 5480 + 85316 06f2 A816 .short 5800 + 85317 06f4 7815 .short 5496 + 85318 06f6 A81E .short 7848 + 85319 06f8 9815 .short 5528 + 85320 06fa A819 .short 6568 + 85321 06fc B815 .short 5560 + 85322 06fe A81D .short 7592 + 85323 0700 D815 .short 5592 + 85324 0702 A81B .short 7080 + 85325 0704 E815 .short 5608 + 85326 0706 A817 .short 6056 + 85327 0708 F815 .short 5624 + 85328 070a A81F .short 8104 + 85329 070c 1816 .short 5656 + 85330 070e 6818 .short 6248 + 85331 0710 3816 .short 5688 + 85332 0712 681C .short 7272 + 85333 0714 5816 .short 5720 + 85334 0716 681A .short 6760 + ARM GAS /tmp/ccLcDeJO.s page 1497 + + + 85335 0718 7816 .short 5752 + 85336 071a 681E .short 7784 + 85337 071c 9816 .short 5784 + 85338 071e 6819 .short 6504 + 85339 0720 B816 .short 5816 + 85340 0722 681D .short 7528 + 85341 0724 D816 .short 5848 + 85342 0726 681B .short 7016 + 85343 0728 E816 .short 5864 + 85344 072a 6817 .short 5992 + 85345 072c F816 .short 5880 + 85346 072e 681F .short 8040 + 85347 0730 1817 .short 5912 + 85348 0732 E818 .short 6376 + 85349 0734 3817 .short 5944 + 85350 0736 E81C .short 7400 + 85351 0738 5817 .short 5976 + 85352 073a E81A .short 6888 + 85353 073c 7817 .short 6008 + 85354 073e E81E .short 7912 + 85355 0740 9817 .short 6040 + 85356 0742 E819 .short 6632 + 85357 0744 B817 .short 6072 + 85358 0746 E81D .short 7656 + 85359 0748 D817 .short 6104 + 85360 074a E81B .short 7144 + 85361 074c F817 .short 6136 + 85362 074e E81F .short 8168 + 85363 0750 3818 .short 6200 + 85364 0752 181C .short 7192 + 85365 0754 5818 .short 6232 + 85366 0756 181A .short 6680 + 85367 0758 7818 .short 6264 + 85368 075a 181E .short 7704 + 85369 075c 9818 .short 6296 + 85370 075e 1819 .short 6424 + 85371 0760 B818 .short 6328 + 85372 0762 181D .short 7448 + 85373 0764 D818 .short 6360 + 85374 0766 181B .short 6936 + 85375 0768 F818 .short 6392 + 85376 076a 181F .short 7960 + 85377 076c 3819 .short 6456 + 85378 076e 981C .short 7320 + 85379 0770 5819 .short 6488 + 85380 0772 981A .short 6808 + 85381 0774 7819 .short 6520 + 85382 0776 981E .short 7832 + 85383 0778 B819 .short 6584 + 85384 077a 981D .short 7576 + 85385 077c D819 .short 6616 + 85386 077e 981B .short 7064 + 85387 0780 F819 .short 6648 + 85388 0782 981F .short 8088 + 85389 0784 381A .short 6712 + 85390 0786 581C .short 7256 + 85391 0788 781A .short 6776 + ARM GAS /tmp/ccLcDeJO.s page 1498 + + + 85392 078a 581E .short 7768 + 85393 078c B81A .short 6840 + 85394 078e 581D .short 7512 + 85395 0790 D81A .short 6872 + 85396 0792 581B .short 7000 + 85397 0794 F81A .short 6904 + 85398 0796 581F .short 8024 + 85399 0798 381B .short 6968 + 85400 079a D81C .short 7384 + 85401 079c 781B .short 7032 + 85402 079e D81E .short 7896 + 85403 07a0 B81B .short 7096 + 85404 07a2 D81D .short 7640 + 85405 07a4 F81B .short 7160 + 85406 07a6 D81F .short 8152 + 85407 07a8 781C .short 7288 + 85408 07aa 381E .short 7736 + 85409 07ac B81C .short 7352 + 85410 07ae 381D .short 7480 + 85411 07b0 F81C .short 7416 + 85412 07b2 381F .short 7992 + 85413 07b4 781D .short 7544 + 85414 07b6 B81E .short 7864 + 85415 07b8 F81D .short 7672 + 85416 07ba B81F .short 8120 + 85417 07bc F81E .short 7928 + 85418 07be 781F .short 8056 + 85419 .section .rodata.armBitRevIndexTable_fixed_128,"a" + 85420 .align 2 + 85423 armBitRevIndexTable_fixed_128: + 85424 0000 0800 .short 8 + 85425 0002 0002 .short 512 + 85426 0004 1000 .short 16 + 85427 0006 0001 .short 256 + 85428 0008 1800 .short 24 + 85429 000a 0003 .short 768 + 85430 000c 2000 .short 32 + 85431 000e 8000 .short 128 + 85432 0010 2800 .short 40 + 85433 0012 8002 .short 640 + 85434 0014 3000 .short 48 + 85435 0016 8001 .short 384 + 85436 0018 3800 .short 56 + 85437 001a 8003 .short 896 + 85438 001c 4800 .short 72 + 85439 001e 4002 .short 576 + 85440 0020 5000 .short 80 + 85441 0022 4001 .short 320 + 85442 0024 5800 .short 88 + 85443 0026 4003 .short 832 + 85444 0028 6000 .short 96 + 85445 002a C000 .short 192 + 85446 002c 6800 .short 104 + 85447 002e C002 .short 704 + 85448 0030 7000 .short 112 + 85449 0032 C001 .short 448 + 85450 0034 7800 .short 120 + ARM GAS /tmp/ccLcDeJO.s page 1499 + + + 85451 0036 C003 .short 960 + 85452 0038 8800 .short 136 + 85453 003a 2002 .short 544 + 85454 003c 9000 .short 144 + 85455 003e 2001 .short 288 + 85456 0040 9800 .short 152 + 85457 0042 2003 .short 800 + 85458 0044 A800 .short 168 + 85459 0046 A002 .short 672 + 85460 0048 B000 .short 176 + 85461 004a A001 .short 416 + 85462 004c B800 .short 184 + 85463 004e A003 .short 928 + 85464 0050 C800 .short 200 + 85465 0052 6002 .short 608 + 85466 0054 D000 .short 208 + 85467 0056 6001 .short 352 + 85468 0058 D800 .short 216 + 85469 005a 6003 .short 864 + 85470 005c E800 .short 232 + 85471 005e E002 .short 736 + 85472 0060 F000 .short 240 + 85473 0062 E001 .short 480 + 85474 0064 F800 .short 248 + 85475 0066 E003 .short 992 + 85476 0068 0801 .short 264 + 85477 006a 1002 .short 528 + 85478 006c 1801 .short 280 + 85479 006e 1003 .short 784 + 85480 0070 2801 .short 296 + 85481 0072 9002 .short 656 + 85482 0074 3001 .short 304 + 85483 0076 9001 .short 400 + 85484 0078 3801 .short 312 + 85485 007a 9003 .short 912 + 85486 007c 4801 .short 328 + 85487 007e 5002 .short 592 + 85488 0080 5801 .short 344 + 85489 0082 5003 .short 848 + 85490 0084 6801 .short 360 + 85491 0086 D002 .short 720 + 85492 0088 7001 .short 368 + 85493 008a D001 .short 464 + 85494 008c 7801 .short 376 + 85495 008e D003 .short 976 + 85496 0090 8801 .short 392 + 85497 0092 3002 .short 560 + 85498 0094 9801 .short 408 + 85499 0096 3003 .short 816 + 85500 0098 A801 .short 424 + 85501 009a B002 .short 688 + 85502 009c B801 .short 440 + 85503 009e B003 .short 944 + 85504 00a0 C801 .short 456 + 85505 00a2 7002 .short 624 + 85506 00a4 D801 .short 472 + 85507 00a6 7003 .short 880 + ARM GAS /tmp/ccLcDeJO.s page 1500 + + + 85508 00a8 E801 .short 488 + 85509 00aa F002 .short 752 + 85510 00ac F801 .short 504 + 85511 00ae F003 .short 1008 + 85512 00b0 1802 .short 536 + 85513 00b2 0803 .short 776 + 85514 00b4 2802 .short 552 + 85515 00b6 8802 .short 648 + 85516 00b8 3802 .short 568 + 85517 00ba 8803 .short 904 + 85518 00bc 5802 .short 600 + 85519 00be 4803 .short 840 + 85520 00c0 6802 .short 616 + 85521 00c2 C802 .short 712 + 85522 00c4 7802 .short 632 + 85523 00c6 C803 .short 968 + 85524 00c8 9802 .short 664 + 85525 00ca 2803 .short 808 + 85526 00cc B802 .short 696 + 85527 00ce A803 .short 936 + 85528 00d0 D802 .short 728 + 85529 00d2 6803 .short 872 + 85530 00d4 F802 .short 760 + 85531 00d6 E803 .short 1000 + 85532 00d8 3803 .short 824 + 85533 00da 9803 .short 920 + 85534 00dc 7803 .short 888 + 85535 00de D803 .short 984 + 85536 .section .rodata.armBitRevIndexTable_fixed_16,"a" + 85537 .align 2 + 85540 armBitRevIndexTable_fixed_16: + 85541 0000 0800 .short 8 + 85542 0002 4000 .short 64 + 85543 0004 1000 .short 16 + 85544 0006 2000 .short 32 + 85545 0008 1800 .short 24 + 85546 000a 6000 .short 96 + 85547 000c 2800 .short 40 + 85548 000e 5000 .short 80 + 85549 0010 3800 .short 56 + 85550 0012 7000 .short 112 + 85551 0014 5800 .short 88 + 85552 0016 6800 .short 104 + 85553 .section .rodata.armBitRevIndexTable_fixed_2048,"a" + 85554 .align 2 + 85557 armBitRevIndexTable_fixed_2048: + 85558 0000 0800 .short 8 + 85559 0002 0020 .short 8192 + 85560 0004 1000 .short 16 + 85561 0006 0010 .short 4096 + 85562 0008 1800 .short 24 + 85563 000a 0030 .short 12288 + 85564 000c 2000 .short 32 + 85565 000e 0008 .short 2048 + 85566 0010 2800 .short 40 + 85567 0012 0028 .short 10240 + 85568 0014 3000 .short 48 + ARM GAS /tmp/ccLcDeJO.s page 1501 + + + 85569 0016 0018 .short 6144 + 85570 0018 3800 .short 56 + 85571 001a 0038 .short 14336 + 85572 001c 4000 .short 64 + 85573 001e 0004 .short 1024 + 85574 0020 4800 .short 72 + 85575 0022 0024 .short 9216 + 85576 0024 5000 .short 80 + 85577 0026 0014 .short 5120 + 85578 0028 5800 .short 88 + 85579 002a 0034 .short 13312 + 85580 002c 6000 .short 96 + 85581 002e 000C .short 3072 + 85582 0030 6800 .short 104 + 85583 0032 002C .short 11264 + 85584 0034 7000 .short 112 + 85585 0036 001C .short 7168 + 85586 0038 7800 .short 120 + 85587 003a 003C .short 15360 + 85588 003c 8000 .short 128 + 85589 003e 0002 .short 512 + 85590 0040 8800 .short 136 + 85591 0042 0022 .short 8704 + 85592 0044 9000 .short 144 + 85593 0046 0012 .short 4608 + 85594 0048 9800 .short 152 + 85595 004a 0032 .short 12800 + 85596 004c A000 .short 160 + 85597 004e 000A .short 2560 + 85598 0050 A800 .short 168 + 85599 0052 002A .short 10752 + 85600 0054 B000 .short 176 + 85601 0056 001A .short 6656 + 85602 0058 B800 .short 184 + 85603 005a 003A .short 14848 + 85604 005c C000 .short 192 + 85605 005e 0006 .short 1536 + 85606 0060 C800 .short 200 + 85607 0062 0026 .short 9728 + 85608 0064 D000 .short 208 + 85609 0066 0016 .short 5632 + 85610 0068 D800 .short 216 + 85611 006a 0036 .short 13824 + 85612 006c E000 .short 224 + 85613 006e 000E .short 3584 + 85614 0070 E800 .short 232 + 85615 0072 002E .short 11776 + 85616 0074 F000 .short 240 + 85617 0076 001E .short 7680 + 85618 0078 F800 .short 248 + 85619 007a 003E .short 15872 + 85620 007c 0801 .short 264 + 85621 007e 0021 .short 8448 + 85622 0080 1001 .short 272 + 85623 0082 0011 .short 4352 + 85624 0084 1801 .short 280 + 85625 0086 0031 .short 12544 + ARM GAS /tmp/ccLcDeJO.s page 1502 + + + 85626 0088 2001 .short 288 + 85627 008a 0009 .short 2304 + 85628 008c 2801 .short 296 + 85629 008e 0029 .short 10496 + 85630 0090 3001 .short 304 + 85631 0092 0019 .short 6400 + 85632 0094 3801 .short 312 + 85633 0096 0039 .short 14592 + 85634 0098 4001 .short 320 + 85635 009a 0005 .short 1280 + 85636 009c 4801 .short 328 + 85637 009e 0025 .short 9472 + 85638 00a0 5001 .short 336 + 85639 00a2 0015 .short 5376 + 85640 00a4 5801 .short 344 + 85641 00a6 0035 .short 13568 + 85642 00a8 6001 .short 352 + 85643 00aa 000D .short 3328 + 85644 00ac 6801 .short 360 + 85645 00ae 002D .short 11520 + 85646 00b0 7001 .short 368 + 85647 00b2 001D .short 7424 + 85648 00b4 7801 .short 376 + 85649 00b6 003D .short 15616 + 85650 00b8 8001 .short 384 + 85651 00ba 0003 .short 768 + 85652 00bc 8801 .short 392 + 85653 00be 0023 .short 8960 + 85654 00c0 9001 .short 400 + 85655 00c2 0013 .short 4864 + 85656 00c4 9801 .short 408 + 85657 00c6 0033 .short 13056 + 85658 00c8 A001 .short 416 + 85659 00ca 000B .short 2816 + 85660 00cc A801 .short 424 + 85661 00ce 002B .short 11008 + 85662 00d0 B001 .short 432 + 85663 00d2 001B .short 6912 + 85664 00d4 B801 .short 440 + 85665 00d6 003B .short 15104 + 85666 00d8 C001 .short 448 + 85667 00da 0007 .short 1792 + 85668 00dc C801 .short 456 + 85669 00de 0027 .short 9984 + 85670 00e0 D001 .short 464 + 85671 00e2 0017 .short 5888 + 85672 00e4 D801 .short 472 + 85673 00e6 0037 .short 14080 + 85674 00e8 E001 .short 480 + 85675 00ea 000F .short 3840 + 85676 00ec E801 .short 488 + 85677 00ee 002F .short 12032 + 85678 00f0 F001 .short 496 + 85679 00f2 001F .short 7936 + 85680 00f4 F801 .short 504 + 85681 00f6 003F .short 16128 + 85682 00f8 0802 .short 520 + ARM GAS /tmp/ccLcDeJO.s page 1503 + + + 85683 00fa 8020 .short 8320 + 85684 00fc 1002 .short 528 + 85685 00fe 8010 .short 4224 + 85686 0100 1802 .short 536 + 85687 0102 8030 .short 12416 + 85688 0104 2002 .short 544 + 85689 0106 8008 .short 2176 + 85690 0108 2802 .short 552 + 85691 010a 8028 .short 10368 + 85692 010c 3002 .short 560 + 85693 010e 8018 .short 6272 + 85694 0110 3802 .short 568 + 85695 0112 8038 .short 14464 + 85696 0114 4002 .short 576 + 85697 0116 8004 .short 1152 + 85698 0118 4802 .short 584 + 85699 011a 8024 .short 9344 + 85700 011c 5002 .short 592 + 85701 011e 8014 .short 5248 + 85702 0120 5802 .short 600 + 85703 0122 8034 .short 13440 + 85704 0124 6002 .short 608 + 85705 0126 800C .short 3200 + 85706 0128 6802 .short 616 + 85707 012a 802C .short 11392 + 85708 012c 7002 .short 624 + 85709 012e 801C .short 7296 + 85710 0130 7802 .short 632 + 85711 0132 803C .short 15488 + 85712 0134 8802 .short 648 + 85713 0136 8022 .short 8832 + 85714 0138 9002 .short 656 + 85715 013a 8012 .short 4736 + 85716 013c 9802 .short 664 + 85717 013e 8032 .short 12928 + 85718 0140 A002 .short 672 + 85719 0142 800A .short 2688 + 85720 0144 A802 .short 680 + 85721 0146 802A .short 10880 + 85722 0148 B002 .short 688 + 85723 014a 801A .short 6784 + 85724 014c B802 .short 696 + 85725 014e 803A .short 14976 + 85726 0150 C002 .short 704 + 85727 0152 8006 .short 1664 + 85728 0154 C802 .short 712 + 85729 0156 8026 .short 9856 + 85730 0158 D002 .short 720 + 85731 015a 8016 .short 5760 + 85732 015c D802 .short 728 + 85733 015e 8036 .short 13952 + 85734 0160 E002 .short 736 + 85735 0162 800E .short 3712 + 85736 0164 E802 .short 744 + 85737 0166 802E .short 11904 + 85738 0168 F002 .short 752 + 85739 016a 801E .short 7808 + ARM GAS /tmp/ccLcDeJO.s page 1504 + + + 85740 016c F802 .short 760 + 85741 016e 803E .short 16000 + 85742 0170 0803 .short 776 + 85743 0172 8021 .short 8576 + 85744 0174 1003 .short 784 + 85745 0176 8011 .short 4480 + 85746 0178 1803 .short 792 + 85747 017a 8031 .short 12672 + 85748 017c 2003 .short 800 + 85749 017e 8009 .short 2432 + 85750 0180 2803 .short 808 + 85751 0182 8029 .short 10624 + 85752 0184 3003 .short 816 + 85753 0186 8019 .short 6528 + 85754 0188 3803 .short 824 + 85755 018a 8039 .short 14720 + 85756 018c 4003 .short 832 + 85757 018e 8005 .short 1408 + 85758 0190 4803 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D82A .short 10968 + 87337 0de6 A836 .short 13992 + 87338 0de8 E82A .short 10984 + 87339 0dea A82E .short 11944 + 87340 0dec F82A .short 11000 + 87341 0dee A83E .short 16040 + 87342 0df0 182B .short 11032 + 87343 0df2 A831 .short 12712 + 87344 0df4 382B .short 11064 + 87345 0df6 A839 .short 14760 + 87346 0df8 582B .short 11096 + 87347 0dfa A835 .short 13736 + 87348 0dfc 682B .short 11112 + 87349 0dfe A82D .short 11688 + 87350 0e00 782B .short 11128 + 87351 0e02 A83D .short 15784 + 87352 0e04 982B .short 11160 + 87353 0e06 A833 .short 13224 + 87354 0e08 B82B .short 11192 + 87355 0e0a A83B .short 15272 + 87356 0e0c D82B .short 11224 + 87357 0e0e A837 .short 14248 + 87358 0e10 E82B .short 11240 + 87359 0e12 A82F .short 12200 + 87360 0e14 F82B .short 11256 + 87361 0e16 A83F .short 16296 + 87362 0e18 182C .short 11288 + 87363 0e1a 6830 .short 12392 + 87364 0e1c 382C .short 11320 + 87365 0e1e 6838 .short 14440 + 87366 0e20 582C .short 11352 + 87367 0e22 6834 .short 13416 + 87368 0e24 782C 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.short 12520 + 87400 0e64 382E .short 11832 + 87401 0e66 E838 .short 14568 + 87402 0e68 582E .short 11864 + 87403 0e6a E834 .short 13544 + 87404 0e6c 782E .short 11896 + 87405 0e6e E83C .short 15592 + 87406 0e70 982E .short 11928 + 87407 0e72 E832 .short 13032 + 87408 0e74 B82E .short 11960 + 87409 0e76 E83A .short 15080 + 87410 0e78 D82E .short 11992 + 87411 0e7a E836 .short 14056 + 87412 0e7c F82E .short 12024 + 87413 0e7e E83E .short 16104 + 87414 0e80 182F .short 12056 + 87415 0e82 E831 .short 12776 + 87416 0e84 382F .short 12088 + 87417 0e86 E839 .short 14824 + 87418 0e88 582F .short 12120 + 87419 0e8a E835 .short 13800 + 87420 0e8c 782F .short 12152 + 87421 0e8e E83D .short 15848 + 87422 0e90 982F .short 12184 + 87423 0e92 E833 .short 13288 + 87424 0e94 B82F .short 12216 + 87425 0e96 E83B .short 15336 + 87426 0e98 D82F .short 12248 + 87427 0e9a E837 .short 14312 + 87428 0e9c F82F .short 12280 + 87429 0e9e E83F .short 16360 + 87430 0ea0 3830 .short 12344 + 87431 0ea2 1838 .short 14360 + 87432 0ea4 5830 .short 12376 + 87433 0ea6 1834 .short 13336 + 87434 0ea8 7830 .short 12408 + 87435 0eaa 183C .short 15384 + 87436 0eac 9830 .short 12440 + 87437 0eae 1832 .short 12824 + 87438 0eb0 B830 .short 12472 + 87439 0eb2 183A .short 14872 + 87440 0eb4 D830 .short 12504 + 87441 0eb6 1836 .short 13848 + 87442 0eb8 F830 .short 12536 + 87443 0eba 183E .short 15896 + 87444 0ebc 3831 .short 12600 + 87445 0ebe 1839 .short 14616 + 87446 0ec0 5831 .short 12632 + 87447 0ec2 1835 .short 13592 + 87448 0ec4 7831 .short 12664 + 87449 0ec6 183D .short 15640 + ARM GAS /tmp/ccLcDeJO.s page 1534 + + + 87450 0ec8 9831 .short 12696 + 87451 0eca 1833 .short 13080 + 87452 0ecc B831 .short 12728 + 87453 0ece 183B .short 15128 + 87454 0ed0 D831 .short 12760 + 87455 0ed2 1837 .short 14104 + 87456 0ed4 F831 .short 12792 + 87457 0ed6 183F .short 16152 + 87458 0ed8 3832 .short 12856 + 87459 0eda 9838 .short 14488 + 87460 0edc 5832 .short 12888 + 87461 0ede 9834 .short 13464 + 87462 0ee0 7832 .short 12920 + 87463 0ee2 983C .short 15512 + 87464 0ee4 B832 .short 12984 + 87465 0ee6 983A .short 15000 + 87466 0ee8 D832 .short 13016 + 87467 0eea 9836 .short 13976 + 87468 0eec F832 .short 13048 + 87469 0eee 983E .short 16024 + 87470 0ef0 3833 .short 13112 + 87471 0ef2 9839 .short 14744 + 87472 0ef4 5833 .short 13144 + 87473 0ef6 9835 .short 13720 + 87474 0ef8 7833 .short 13176 + 87475 0efa 983D .short 15768 + 87476 0efc B833 .short 13240 + 87477 0efe 983B .short 15256 + 87478 0f00 D833 .short 13272 + 87479 0f02 9837 .short 14232 + 87480 0f04 F833 .short 13304 + 87481 0f06 983F .short 16280 + 87482 0f08 3834 .short 13368 + 87483 0f0a 5838 .short 14424 + 87484 0f0c 7834 .short 13432 + 87485 0f0e 583C .short 15448 + 87486 0f10 B834 .short 13496 + 87487 0f12 583A .short 14936 + 87488 0f14 D834 .short 13528 + 87489 0f16 5836 .short 13912 + 87490 0f18 F834 .short 13560 + 87491 0f1a 583E .short 15960 + 87492 0f1c 3835 .short 13624 + 87493 0f1e 5839 .short 14680 + 87494 0f20 7835 .short 13688 + 87495 0f22 583D .short 15704 + 87496 0f24 B835 .short 13752 + 87497 0f26 583B .short 15192 + 87498 0f28 D835 .short 13784 + 87499 0f2a 5837 .short 14168 + 87500 0f2c F835 .short 13816 + 87501 0f2e 583F .short 16216 + 87502 0f30 3836 .short 13880 + 87503 0f32 D838 .short 14552 + 87504 0f34 7836 .short 13944 + 87505 0f36 D83C .short 15576 + 87506 0f38 B836 .short 14008 + ARM GAS /tmp/ccLcDeJO.s page 1535 + + + 87507 0f3a D83A .short 15064 + 87508 0f3c F836 .short 14072 + 87509 0f3e D83E .short 16088 + 87510 0f40 3837 .short 14136 + 87511 0f42 D839 .short 14808 + 87512 0f44 7837 .short 14200 + 87513 0f46 D83D .short 15832 + 87514 0f48 B837 .short 14264 + 87515 0f4a D83B .short 15320 + 87516 0f4c F837 .short 14328 + 87517 0f4e D83F .short 16344 + 87518 0f50 7838 .short 14456 + 87519 0f52 383C .short 15416 + 87520 0f54 B838 .short 14520 + 87521 0f56 383A .short 14904 + 87522 0f58 F838 .short 14584 + 87523 0f5a 383E .short 15928 + 87524 0f5c 7839 .short 14712 + 87525 0f5e 383D .short 15672 + 87526 0f60 B839 .short 14776 + 87527 0f62 383B .short 15160 + 87528 0f64 F839 .short 14840 + 87529 0f66 383F .short 16184 + 87530 0f68 783A .short 14968 + 87531 0f6a B83C .short 15544 + 87532 0f6c F83A .short 15096 + 87533 0f6e B83E .short 16056 + 87534 0f70 783B .short 15224 + 87535 0f72 B83D .short 15800 + 87536 0f74 F83B .short 15352 + 87537 0f76 B83F .short 16312 + 87538 0f78 F83C .short 15608 + 87539 0f7a 783E .short 15992 + 87540 0f7c F83D .short 15864 + 87541 0f7e 783F .short 16248 + 87542 .section .rodata.armBitRevIndexTable_fixed_256,"a" + 87543 .align 2 + 87546 armBitRevIndexTable_fixed_256: + 87547 0000 0800 .short 8 + 87548 0002 0004 .short 1024 + 87549 0004 1000 .short 16 + 87550 0006 0002 .short 512 + 87551 0008 1800 .short 24 + 87552 000a 0006 .short 1536 + 87553 000c 2000 .short 32 + 87554 000e 0001 .short 256 + 87555 0010 2800 .short 40 + 87556 0012 0005 .short 1280 + 87557 0014 3000 .short 48 + 87558 0016 0003 .short 768 + 87559 0018 3800 .short 56 + 87560 001a 0007 .short 1792 + 87561 001c 4000 .short 64 + 87562 001e 8000 .short 128 + 87563 0020 4800 .short 72 + 87564 0022 8004 .short 1152 + 87565 0024 5000 .short 80 + ARM GAS /tmp/ccLcDeJO.s page 1536 + + + 87566 0026 8002 .short 640 + 87567 0028 5800 .short 88 + 87568 002a 8006 .short 1664 + 87569 002c 6000 .short 96 + 87570 002e 8001 .short 384 + 87571 0030 6800 .short 104 + 87572 0032 8005 .short 1408 + 87573 0034 7000 .short 112 + 87574 0036 8003 .short 896 + 87575 0038 7800 .short 120 + 87576 003a 8007 .short 1920 + 87577 003c 8800 .short 136 + 87578 003e 4004 .short 1088 + 87579 0040 9000 .short 144 + 87580 0042 4002 .short 576 + 87581 0044 9800 .short 152 + 87582 0046 4006 .short 1600 + 87583 0048 A000 .short 160 + 87584 004a 4001 .short 320 + 87585 004c A800 .short 168 + 87586 004e 4005 .short 1344 + 87587 0050 B000 .short 176 + 87588 0052 4003 .short 832 + 87589 0054 B800 .short 184 + 87590 0056 4007 .short 1856 + 87591 0058 C800 .short 200 + 87592 005a C004 .short 1216 + 87593 005c D000 .short 208 + 87594 005e C002 .short 704 + 87595 0060 D800 .short 216 + 87596 0062 C006 .short 1728 + 87597 0064 E000 .short 224 + 87598 0066 C001 .short 448 + 87599 0068 E800 .short 232 + 87600 006a C005 .short 1472 + 87601 006c F000 .short 240 + 87602 006e C003 .short 960 + 87603 0070 F800 .short 248 + 87604 0072 C007 .short 1984 + 87605 0074 0801 .short 264 + 87606 0076 2004 .short 1056 + 87607 0078 1001 .short 272 + 87608 007a 2002 .short 544 + 87609 007c 1801 .short 280 + 87610 007e 2006 .short 1568 + 87611 0080 2801 .short 296 + 87612 0082 2005 .short 1312 + 87613 0084 3001 .short 304 + 87614 0086 2003 .short 800 + 87615 0088 3801 .short 312 + 87616 008a 2007 .short 1824 + 87617 008c 4801 .short 328 + 87618 008e A004 .short 1184 + 87619 0090 5001 .short 336 + 87620 0092 A002 .short 672 + 87621 0094 5801 .short 344 + 87622 0096 A006 .short 1696 + ARM GAS /tmp/ccLcDeJO.s page 1537 + + + 87623 0098 6001 .short 352 + 87624 009a A001 .short 416 + 87625 009c 6801 .short 360 + 87626 009e A005 .short 1440 + 87627 00a0 7001 .short 368 + 87628 00a2 A003 .short 928 + 87629 00a4 7801 .short 376 + 87630 00a6 A007 .short 1952 + 87631 00a8 8801 .short 392 + 87632 00aa 6004 .short 1120 + 87633 00ac 9001 .short 400 + 87634 00ae 6002 .short 608 + 87635 00b0 9801 .short 408 + 87636 00b2 6006 .short 1632 + 87637 00b4 A801 .short 424 + 87638 00b6 6005 .short 1376 + 87639 00b8 B001 .short 432 + 87640 00ba 6003 .short 864 + 87641 00bc B801 .short 440 + 87642 00be 6007 .short 1888 + 87643 00c0 C801 .short 456 + 87644 00c2 E004 .short 1248 + 87645 00c4 D001 .short 464 + 87646 00c6 E002 .short 736 + 87647 00c8 D801 .short 472 + 87648 00ca E006 .short 1760 + 87649 00cc E801 .short 488 + 87650 00ce E005 .short 1504 + 87651 00d0 F001 .short 496 + 87652 00d2 E003 .short 992 + 87653 00d4 F801 .short 504 + 87654 00d6 E007 .short 2016 + 87655 00d8 0802 .short 520 + 87656 00da 1004 .short 1040 + 87657 00dc 1802 .short 536 + 87658 00de 1006 .short 1552 + 87659 00e0 2802 .short 552 + 87660 00e2 1005 .short 1296 + 87661 00e4 3002 .short 560 + 87662 00e6 1003 .short 784 + 87663 00e8 3802 .short 568 + 87664 00ea 1007 .short 1808 + 87665 00ec 4802 .short 584 + 87666 00ee 9004 .short 1168 + 87667 00f0 5002 .short 592 + 87668 00f2 9002 .short 656 + 87669 00f4 5802 .short 600 + 87670 00f6 9006 .short 1680 + 87671 00f8 6802 .short 616 + 87672 00fa 9005 .short 1424 + 87673 00fc 7002 .short 624 + 87674 00fe 9003 .short 912 + 87675 0100 7802 .short 632 + 87676 0102 9007 .short 1936 + 87677 0104 8802 .short 648 + 87678 0106 5004 .short 1104 + 87679 0108 9802 .short 664 + ARM GAS /tmp/ccLcDeJO.s page 1538 + + + 87680 010a 5006 .short 1616 + 87681 010c A802 .short 680 + 87682 010e 5005 .short 1360 + 87683 0110 B002 .short 688 + 87684 0112 5003 .short 848 + 87685 0114 B802 .short 696 + 87686 0116 5007 .short 1872 + 87687 0118 C802 .short 712 + 87688 011a D004 .short 1232 + 87689 011c D802 .short 728 + 87690 011e D006 .short 1744 + 87691 0120 E802 .short 744 + 87692 0122 D005 .short 1488 + 87693 0124 F002 .short 752 + 87694 0126 D003 .short 976 + 87695 0128 F802 .short 760 + 87696 012a D007 .short 2000 + 87697 012c 0803 .short 776 + 87698 012e 3004 .short 1072 + 87699 0130 1803 .short 792 + 87700 0132 3006 .short 1584 + 87701 0134 2803 .short 808 + 87702 0136 3005 .short 1328 + 87703 0138 3803 .short 824 + 87704 013a 3007 .short 1840 + 87705 013c 4803 .short 840 + 87706 013e B004 .short 1200 + 87707 0140 5803 .short 856 + 87708 0142 B006 .short 1712 + 87709 0144 6803 .short 872 + 87710 0146 B005 .short 1456 + 87711 0148 7003 .short 880 + 87712 014a B003 .short 944 + 87713 014c 7803 .short 888 + 87714 014e B007 .short 1968 + 87715 0150 8803 .short 904 + 87716 0152 7004 .short 1136 + 87717 0154 9803 .short 920 + 87718 0156 7006 .short 1648 + 87719 0158 A803 .short 936 + 87720 015a 7005 .short 1392 + 87721 015c B803 .short 952 + 87722 015e 7007 .short 1904 + 87723 0160 C803 .short 968 + 87724 0162 F004 .short 1264 + 87725 0164 D803 .short 984 + 87726 0166 F006 .short 1776 + 87727 0168 E803 .short 1000 + 87728 016a F005 .short 1520 + 87729 016c F803 .short 1016 + 87730 016e F007 .short 2032 + 87731 0170 1804 .short 1048 + 87732 0172 0806 .short 1544 + 87733 0174 2804 .short 1064 + 87734 0176 0805 .short 1288 + 87735 0178 3804 .short 1080 + 87736 017a 0807 .short 1800 + ARM GAS /tmp/ccLcDeJO.s page 1539 + + + 87737 017c 4804 .short 1096 + 87738 017e 8804 .short 1160 + 87739 0180 5804 .short 1112 + 87740 0182 8806 .short 1672 + 87741 0184 6804 .short 1128 + 87742 0186 8805 .short 1416 + 87743 0188 7804 .short 1144 + 87744 018a 8807 .short 1928 + 87745 018c 9804 .short 1176 + 87746 018e 4806 .short 1608 + 87747 0190 A804 .short 1192 + 87748 0192 4805 .short 1352 + 87749 0194 B804 .short 1208 + 87750 0196 4807 .short 1864 + 87751 0198 D804 .short 1240 + 87752 019a C806 .short 1736 + 87753 019c E804 .short 1256 + 87754 019e C805 .short 1480 + 87755 01a0 F804 .short 1272 + 87756 01a2 C807 .short 1992 + 87757 01a4 1805 .short 1304 + 87758 01a6 2806 .short 1576 + 87759 01a8 3805 .short 1336 + 87760 01aa 2807 .short 1832 + 87761 01ac 5805 .short 1368 + 87762 01ae A806 .short 1704 + 87763 01b0 6805 .short 1384 + 87764 01b2 A805 .short 1448 + 87765 01b4 7805 .short 1400 + 87766 01b6 A807 .short 1960 + 87767 01b8 9805 .short 1432 + 87768 01ba 6806 .short 1640 + 87769 01bc B805 .short 1464 + 87770 01be 6807 .short 1896 + 87771 01c0 D805 .short 1496 + 87772 01c2 E806 .short 1768 + 87773 01c4 F805 .short 1528 + 87774 01c6 E807 .short 2024 + 87775 01c8 3806 .short 1592 + 87776 01ca 1807 .short 1816 + 87777 01cc 5806 .short 1624 + 87778 01ce 9806 .short 1688 + 87779 01d0 7806 .short 1656 + 87780 01d2 9807 .short 1944 + 87781 01d4 B806 .short 1720 + 87782 01d6 5807 .short 1880 + 87783 01d8 F806 .short 1784 + 87784 01da D807 .short 2008 + 87785 01dc 7807 .short 1912 + 87786 01de B807 .short 1976 + 87787 .section .rodata.armBitRevIndexTable_fixed_32,"a" + 87788 .align 2 + 87791 armBitRevIndexTable_fixed_32: + 87792 0000 0800 .short 8 + 87793 0002 8000 .short 128 + 87794 0004 1000 .short 16 + 87795 0006 4000 .short 64 + ARM GAS /tmp/ccLcDeJO.s page 1540 + + + 87796 0008 1800 .short 24 + 87797 000a C000 .short 192 + 87798 000c 2800 .short 40 + 87799 000e A000 .short 160 + 87800 0010 3000 .short 48 + 87801 0012 6000 .short 96 + 87802 0014 3800 .short 56 + 87803 0016 E000 .short 224 + 87804 0018 4800 .short 72 + 87805 001a 9000 .short 144 + 87806 001c 5800 .short 88 + 87807 001e D000 .short 208 + 87808 0020 6800 .short 104 + 87809 0022 B000 .short 176 + 87810 0024 7800 .short 120 + 87811 0026 F000 .short 240 + 87812 0028 9800 .short 152 + 87813 002a C800 .short 200 + 87814 002c B800 .short 184 + 87815 002e E800 .short 232 + 87816 .section .rodata.armBitRevIndexTable_fixed_4096,"a" + 87817 .align 2 + 87820 armBitRevIndexTable_fixed_4096: + 87821 0000 0800 .short 8 + 87822 0002 0040 .short 16384 + 87823 0004 1000 .short 16 + 87824 0006 0020 .short 8192 + 87825 0008 1800 .short 24 + 87826 000a 0060 .short 24576 + 87827 000c 2000 .short 32 + 87828 000e 0010 .short 4096 + 87829 0010 2800 .short 40 + 87830 0012 0050 .short 20480 + 87831 0014 3000 .short 48 + 87832 0016 0030 .short 12288 + 87833 0018 3800 .short 56 + 87834 001a 0070 .short 28672 + 87835 001c 4000 .short 64 + 87836 001e 0008 .short 2048 + 87837 0020 4800 .short 72 + 87838 0022 0048 .short 18432 + 87839 0024 5000 .short 80 + 87840 0026 0028 .short 10240 + 87841 0028 5800 .short 88 + 87842 002a 0068 .short 26624 + 87843 002c 6000 .short 96 + 87844 002e 0018 .short 6144 + 87845 0030 6800 .short 104 + 87846 0032 0058 .short 22528 + 87847 0034 7000 .short 112 + 87848 0036 0038 .short 14336 + 87849 0038 7800 .short 120 + 87850 003a 0078 .short 30720 + 87851 003c 8000 .short 128 + 87852 003e 0004 .short 1024 + 87853 0040 8800 .short 136 + 87854 0042 0044 .short 17408 + ARM GAS /tmp/ccLcDeJO.s page 1541 + + + 87855 0044 9000 .short 144 + 87856 0046 0024 .short 9216 + 87857 0048 9800 .short 152 + 87858 004a 0064 .short 25600 + 87859 004c A000 .short 160 + 87860 004e 0014 .short 5120 + 87861 0050 A800 .short 168 + 87862 0052 0054 .short 21504 + 87863 0054 B000 .short 176 + 87864 0056 0034 .short 13312 + 87865 0058 B800 .short 184 + 87866 005a 0074 .short 29696 + 87867 005c C000 .short 192 + 87868 005e 000C .short 3072 + 87869 0060 C800 .short 200 + 87870 0062 004C .short 19456 + 87871 0064 D000 .short 208 + 87872 0066 002C .short 11264 + 87873 0068 D800 .short 216 + 87874 006a 006C .short 27648 + 87875 006c E000 .short 224 + 87876 006e 001C .short 7168 + 87877 0070 E800 .short 232 + 87878 0072 005C .short 23552 + 87879 0074 F000 .short 240 + 87880 0076 003C .short 15360 + 87881 0078 F800 .short 248 + 87882 007a 007C .short 31744 + 87883 007c 0001 .short 256 + 87884 007e 0002 .short 512 + 87885 0080 0801 .short 264 + 87886 0082 0042 .short 16896 + 87887 0084 1001 .short 272 + 87888 0086 0022 .short 8704 + 87889 0088 1801 .short 280 + 87890 008a 0062 .short 25088 + 87891 008c 2001 .short 288 + 87892 008e 0012 .short 4608 + 87893 0090 2801 .short 296 + 87894 0092 0052 .short 20992 + 87895 0094 3001 .short 304 + 87896 0096 0032 .short 12800 + 87897 0098 3801 .short 312 + 87898 009a 0072 .short 29184 + 87899 009c 4001 .short 320 + 87900 009e 000A .short 2560 + 87901 00a0 4801 .short 328 + 87902 00a2 004A .short 18944 + 87903 00a4 5001 .short 336 + 87904 00a6 002A .short 10752 + 87905 00a8 5801 .short 344 + 87906 00aa 006A .short 27136 + 87907 00ac 6001 .short 352 + 87908 00ae 001A .short 6656 + 87909 00b0 6801 .short 360 + 87910 00b2 005A .short 23040 + 87911 00b4 7001 .short 368 + ARM GAS /tmp/ccLcDeJO.s page 1542 + + + 87912 00b6 003A .short 14848 + 87913 00b8 7801 .short 376 + 87914 00ba 007A .short 31232 + 87915 00bc 8001 .short 384 + 87916 00be 0006 .short 1536 + 87917 00c0 8801 .short 392 + 87918 00c2 0046 .short 17920 + 87919 00c4 9001 .short 400 + 87920 00c6 0026 .short 9728 + 87921 00c8 9801 .short 408 + 87922 00ca 0066 .short 26112 + 87923 00cc A001 .short 416 + 87924 00ce 0016 .short 5632 + 87925 00d0 A801 .short 424 + 87926 00d2 0056 .short 22016 + 87927 00d4 B001 .short 432 + 87928 00d6 0036 .short 13824 + 87929 00d8 B801 .short 440 + 87930 00da 0076 .short 30208 + 87931 00dc C001 .short 448 + 87932 00de 000E .short 3584 + 87933 00e0 C801 .short 456 + 87934 00e2 004E .short 19968 + 87935 00e4 D001 .short 464 + 87936 00e6 002E .short 11776 + 87937 00e8 D801 .short 472 + 87938 00ea 006E .short 28160 + 87939 00ec E001 .short 480 + 87940 00ee 001E .short 7680 + 87941 00f0 E801 .short 488 + 87942 00f2 005E .short 24064 + 87943 00f4 F001 .short 496 + 87944 00f6 003E .short 15872 + 87945 00f8 F801 .short 504 + 87946 00fa 007E .short 32256 + 87947 00fc 0802 .short 520 + 87948 00fe 0041 .short 16640 + 87949 0100 1002 .short 528 + 87950 0102 0021 .short 8448 + 87951 0104 1802 .short 536 + 87952 0106 0061 .short 24832 + 87953 0108 2002 .short 544 + 87954 010a 0011 .short 4352 + 87955 010c 2802 .short 552 + 87956 010e 0051 .short 20736 + 87957 0110 3002 .short 560 + 87958 0112 0031 .short 12544 + 87959 0114 3802 .short 568 + 87960 0116 0071 .short 28928 + 87961 0118 4002 .short 576 + 87962 011a 0009 .short 2304 + 87963 011c 4802 .short 584 + 87964 011e 0049 .short 18688 + 87965 0120 5002 .short 592 + 87966 0122 0029 .short 10496 + 87967 0124 5802 .short 600 + 87968 0126 0069 .short 26880 + ARM GAS /tmp/ccLcDeJO.s page 1543 + + + 87969 0128 6002 .short 608 + 87970 012a 0019 .short 6400 + 87971 012c 6802 .short 616 + 87972 012e 0059 .short 22784 + 87973 0130 7002 .short 624 + 87974 0132 0039 .short 14592 + 87975 0134 7802 .short 632 + 87976 0136 0079 .short 30976 + 87977 0138 8002 .short 640 + 87978 013a 0005 .short 1280 + 87979 013c 8802 .short 648 + 87980 013e 0045 .short 17664 + 87981 0140 9002 .short 656 + 87982 0142 0025 .short 9472 + 87983 0144 9802 .short 664 + 87984 0146 0065 .short 25856 + 87985 0148 A002 .short 672 + 87986 014a 0015 .short 5376 + 87987 014c A802 .short 680 + 87988 014e 0055 .short 21760 + 87989 0150 B002 .short 688 + 87990 0152 0035 .short 13568 + 87991 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/tmp/ccLcDeJO.s page 1596 + + + 90990 18c2 8848 .short 18568 + 90991 18c4 5844 .short 17496 + 90992 18c6 8868 .short 26760 + 90993 18c8 6844 .short 17512 + 90994 18ca 8858 .short 22664 + 90995 18cc 7844 .short 17528 + 90996 18ce 8878 .short 30856 + 90997 18d0 9844 .short 17560 + 90998 18d2 8864 .short 25736 + 90999 18d4 A844 .short 17576 + 91000 18d6 8854 .short 21640 + 91001 18d8 B844 .short 17592 + 91002 18da 8874 .short 29832 + 91003 18dc C844 .short 17608 + 91004 18de 884C .short 19592 + 91005 18e0 D844 .short 17624 + 91006 18e2 886C .short 27784 + 91007 18e4 E844 .short 17640 + 91008 18e6 885C .short 23688 + 91009 18e8 F844 .short 17656 + 91010 18ea 887C .short 31880 + 91011 18ec 1845 .short 17688 + 91012 18ee 8862 .short 25224 + 91013 18f0 2845 .short 17704 + 91014 18f2 8852 .short 21128 + 91015 18f4 3845 .short 17720 + 91016 18f6 8872 .short 29320 + 91017 18f8 4845 .short 17736 + 91018 18fa 884A .short 19080 + 91019 18fc 5845 .short 17752 + 91020 18fe 886A .short 27272 + 91021 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193e 8859 .short 22920 + 91053 1940 7846 .short 18040 + 91054 1942 8879 .short 31112 + 91055 1944 9846 .short 18072 + 91056 1946 8865 .short 25992 + 91057 1948 A846 .short 18088 + 91058 194a 8855 .short 21896 + 91059 194c B846 .short 18104 + 91060 194e 8875 .short 30088 + 91061 1950 C846 .short 18120 + 91062 1952 884D .short 19848 + 91063 1954 D846 .short 18136 + 91064 1956 886D .short 28040 + 91065 1958 E846 .short 18152 + 91066 195a 885D .short 23944 + 91067 195c F846 .short 18168 + 91068 195e 887D .short 32136 + 91069 1960 1847 .short 18200 + 91070 1962 8863 .short 25480 + 91071 1964 2847 .short 18216 + 91072 1966 8853 .short 21384 + 91073 1968 3847 .short 18232 + 91074 196a 8873 .short 29576 + 91075 196c 4847 .short 18248 + 91076 196e 884B .short 19336 + 91077 1970 5847 .short 18264 + 91078 1972 886B .short 27528 + 91079 1974 6847 .short 18280 + 91080 1976 885B .short 23432 + 91081 1978 7847 .short 18296 + 91082 197a 887B .short 31624 + 91083 197c 9847 .short 18328 + 91084 197e 8867 .short 26504 + 91085 1980 A847 .short 18344 + 91086 1982 8857 .short 22408 + 91087 1984 B847 .short 18360 + 91088 1986 8877 .short 30600 + 91089 1988 C847 .short 18376 + 91090 198a 884F .short 20360 + 91091 198c D847 .short 18392 + 91092 198e 886F .short 28552 + 91093 1990 E847 .short 18408 + 91094 1992 885F .short 24456 + 91095 1994 F847 .short 18424 + 91096 1996 887F .short 32648 + 91097 1998 1848 .short 18456 + 91098 199a 4860 .short 24648 + 91099 199c 2848 .short 18472 + 91100 199e 4850 .short 20552 + 91101 19a0 3848 .short 18488 + 91102 19a2 4870 .short 28744 + 91103 19a4 5848 .short 18520 + ARM GAS /tmp/ccLcDeJO.s page 1598 + + + 91104 19a6 4868 .short 26696 + 91105 19a8 6848 .short 18536 + 91106 19aa 4858 .short 22600 + 91107 19ac 7848 .short 18552 + 91108 19ae 4878 .short 30792 + 91109 19b0 9848 .short 18584 + 91110 19b2 4864 .short 25672 + 91111 19b4 A848 .short 18600 + 91112 19b6 4854 .short 21576 + 91113 19b8 B848 .short 18616 + 91114 19ba 4874 .short 29768 + 91115 19bc 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91336 1b76 2866 .short 26152 + 91337 1b78 A851 .short 20904 + 91338 1b7a 2856 .short 22056 + 91339 1b7c B851 .short 20920 + 91340 1b7e 2876 .short 30248 + 91341 1b80 D851 .short 20952 + 91342 1b82 286E .short 28200 + 91343 1b84 E851 .short 20968 + 91344 1b86 285E .short 24104 + 91345 1b88 F851 .short 20984 + 91346 1b8a 287E .short 32296 + 91347 1b8c 1852 .short 21016 + 91348 1b8e 2861 .short 24872 + 91349 1b90 3852 .short 21048 + 91350 1b92 2871 .short 28968 + 91351 1b94 5852 .short 21080 + 91352 1b96 2869 .short 26920 + 91353 1b98 6852 .short 21096 + 91354 1b9a 2859 .short 22824 + 91355 1b9c 7852 .short 21112 + 91356 1b9e 2879 .short 31016 + 91357 1ba0 9852 .short 21144 + 91358 1ba2 2865 .short 25896 + 91359 1ba4 A852 .short 21160 + 91360 1ba6 2855 .short 21800 + 91361 1ba8 B852 .short 21176 + 91362 1baa 2875 .short 29992 + 91363 1bac D852 .short 21208 + 91364 1bae 286D .short 27944 + 91365 1bb0 E852 .short 21224 + 91366 1bb2 285D .short 23848 + 91367 1bb4 F852 .short 21240 + 91368 1bb6 287D .short 32040 + 91369 1bb8 1853 .short 21272 + 91370 1bba 2863 .short 25384 + 91371 1bbc 3853 .short 21304 + 91372 1bbe 2873 .short 29480 + 91373 1bc0 5853 .short 21336 + 91374 1bc2 286B .short 27432 + 91375 1bc4 6853 .short 21352 + 91376 1bc6 285B .short 23336 + 91377 1bc8 7853 .short 21368 + 91378 1bca 287B .short 31528 + 91379 1bcc 9853 .short 21400 + 91380 1bce 2867 .short 26408 + 91381 1bd0 A853 .short 21416 + 91382 1bd2 2857 .short 22312 + 91383 1bd4 B853 .short 21432 + 91384 1bd6 2877 .short 30504 + 91385 1bd8 D853 .short 21464 + 91386 1bda 286F .short 28456 + 91387 1bdc E853 .short 21480 + 91388 1bde 285F .short 24360 + ARM GAS /tmp/ccLcDeJO.s page 1603 + + + 91389 1be0 F853 .short 21496 + 91390 1be2 287F .short 32552 + 91391 1be4 1854 .short 21528 + 91392 1be6 A860 .short 24744 + 91393 1be8 3854 .short 21560 + 91394 1bea A870 .short 28840 + 91395 1bec 5854 .short 21592 + 91396 1bee A868 .short 26792 + 91397 1bf0 6854 .short 21608 + 91398 1bf2 A858 .short 22696 + 91399 1bf4 7854 .short 21624 + 91400 1bf6 A878 .short 30888 + 91401 1bf8 9854 .short 21656 + 91402 1bfa A864 .short 25768 + 91403 1bfc B854 .short 21688 + 91404 1bfe A874 .short 29864 + 91405 1c00 D854 .short 21720 + 91406 1c02 A86C .short 27816 + 91407 1c04 E854 .short 21736 + 91408 1c06 A85C .short 23720 + 91409 1c08 F854 .short 21752 + 91410 1c0a A87C .short 31912 + 91411 1c0c 1855 .short 21784 + 91412 1c0e A862 .short 25256 + 91413 1c10 3855 .short 21816 + 91414 1c12 A872 .short 29352 + 91415 1c14 5855 .short 21848 + 91416 1c16 A86A .short 27304 + 91417 1c18 6855 .short 21864 + 91418 1c1a A85A .short 23208 + 91419 1c1c 7855 .short 21880 + 91420 1c1e A87A .short 31400 + 91421 1c20 9855 .short 21912 + 91422 1c22 A866 .short 26280 + 91423 1c24 A855 .short 21928 + 91424 1c26 A856 .short 22184 + 91425 1c28 B855 .short 21944 + 91426 1c2a A876 .short 30376 + 91427 1c2c D855 .short 21976 + 91428 1c2e A86E .short 28328 + 91429 1c30 E855 .short 21992 + 91430 1c32 A85E .short 24232 + 91431 1c34 F855 .short 22008 + 91432 1c36 A87E .short 32424 + 91433 1c38 1856 .short 22040 + 91434 1c3a A861 .short 25000 + 91435 1c3c 3856 .short 22072 + 91436 1c3e A871 .short 29096 + 91437 1c40 5856 .short 22104 + 91438 1c42 A869 .short 27048 + 91439 1c44 6856 .short 22120 + 91440 1c46 A859 .short 22952 + 91441 1c48 7856 .short 22136 + 91442 1c4a A879 .short 31144 + 91443 1c4c 9856 .short 22168 + 91444 1c4e A865 .short 26024 + 91445 1c50 B856 .short 22200 + ARM GAS /tmp/ccLcDeJO.s page 1604 + + + 91446 1c52 A875 .short 30120 + 91447 1c54 D856 .short 22232 + 91448 1c56 A86D .short 28072 + 91449 1c58 E856 .short 22248 + 91450 1c5a A85D .short 23976 + 91451 1c5c F856 .short 22264 + 91452 1c5e A87D .short 32168 + 91453 1c60 1857 .short 22296 + 91454 1c62 A863 .short 25512 + 91455 1c64 3857 .short 22328 + 91456 1c66 A873 .short 29608 + 91457 1c68 5857 .short 22360 + 91458 1c6a A86B .short 27560 + 91459 1c6c 6857 .short 22376 + 91460 1c6e A85B .short 23464 + 91461 1c70 7857 .short 22392 + 91462 1c72 A87B .short 31656 + 91463 1c74 9857 .short 22424 + 91464 1c76 A867 .short 26536 + 91465 1c78 B857 .short 22456 + 91466 1c7a A877 .short 30632 + 91467 1c7c D857 .short 22488 + 91468 1c7e A86F .short 28584 + 91469 1c80 E857 .short 22504 + 91470 1c82 A85F .short 24488 + 91471 1c84 F857 .short 22520 + 91472 1c86 A87F .short 32680 + 91473 1c88 1858 .short 22552 + 91474 1c8a 6860 .short 24680 + 91475 1c8c 3858 .short 22584 + 91476 1c8e 6870 .short 28776 + 91477 1c90 5858 .short 22616 + 91478 1c92 6868 .short 26728 + 91479 1c94 7858 .short 22648 + 91480 1c96 6878 .short 30824 + 91481 1c98 9858 .short 22680 + 91482 1c9a 6864 .short 25704 + 91483 1c9c B858 .short 22712 + 91484 1c9e 6874 .short 29800 + 91485 1ca0 D858 .short 22744 + 91486 1ca2 686C .short 27752 + 91487 1ca4 E858 .short 22760 + 91488 1ca6 685C .short 23656 + 91489 1ca8 F858 .short 22776 + 91490 1caa 687C .short 31848 + 91491 1cac 1859 .short 22808 + 91492 1cae 6862 .short 25192 + 91493 1cb0 3859 .short 22840 + 91494 1cb2 6872 .short 29288 + 91495 1cb4 5859 .short 22872 + 91496 1cb6 686A .short 27240 + 91497 1cb8 6859 .short 22888 + 91498 1cba 685A .short 23144 + 91499 1cbc 7859 .short 22904 + 91500 1cbe 687A .short 31336 + 91501 1cc0 9859 .short 22936 + 91502 1cc2 6866 .short 26216 + ARM GAS /tmp/ccLcDeJO.s page 1605 + + + 91503 1cc4 B859 .short 22968 + 91504 1cc6 6876 .short 30312 + 91505 1cc8 D859 .short 23000 + 91506 1cca 686E .short 28264 + 91507 1ccc E859 .short 23016 + 91508 1cce 685E .short 24168 + 91509 1cd0 F859 .short 23032 + 91510 1cd2 687E .short 32360 + 91511 1cd4 185A .short 23064 + 91512 1cd6 6861 .short 24936 + 91513 1cd8 385A .short 23096 + 91514 1cda 6871 .short 29032 + 91515 1cdc 585A .short 23128 + 91516 1cde 6869 .short 26984 + 91517 1ce0 785A .short 23160 + 91518 1ce2 6879 .short 31080 + 91519 1ce4 985A .short 23192 + 91520 1ce6 6865 .short 25960 + 91521 1ce8 B85A .short 23224 + 91522 1cea 6875 .short 30056 + 91523 1cec D85A .short 23256 + 91524 1cee 686D .short 28008 + 91525 1cf0 E85A .short 23272 + 91526 1cf2 685D .short 23912 + 91527 1cf4 F85A .short 23288 + 91528 1cf6 687D .short 32104 + 91529 1cf8 185B .short 23320 + 91530 1cfa 6863 .short 25448 + 91531 1cfc 385B .short 23352 + 91532 1cfe 6873 .short 29544 + 91533 1d00 585B .short 23384 + 91534 1d02 686B .short 27496 + 91535 1d04 785B .short 23416 + 91536 1d06 687B .short 31592 + 91537 1d08 985B .short 23448 + 91538 1d0a 6867 .short 26472 + 91539 1d0c B85B .short 23480 + 91540 1d0e 6877 .short 30568 + 91541 1d10 D85B .short 23512 + 91542 1d12 686F .short 28520 + 91543 1d14 E85B .short 23528 + 91544 1d16 685F .short 24424 + 91545 1d18 F85B .short 23544 + 91546 1d1a 687F .short 32616 + 91547 1d1c 185C .short 23576 + 91548 1d1e E860 .short 24808 + 91549 1d20 385C .short 23608 + 91550 1d22 E870 .short 28904 + 91551 1d24 585C .short 23640 + 91552 1d26 E868 .short 26856 + 91553 1d28 785C .short 23672 + 91554 1d2a E878 .short 30952 + 91555 1d2c 985C .short 23704 + 91556 1d2e E864 .short 25832 + 91557 1d30 B85C .short 23736 + 91558 1d32 E874 .short 29928 + 91559 1d34 D85C .short 23768 + ARM GAS /tmp/ccLcDeJO.s page 1606 + + + 91560 1d36 E86C .short 27880 + 91561 1d38 F85C .short 23800 + 91562 1d3a E87C .short 31976 + 91563 1d3c 185D .short 23832 + 91564 1d3e E862 .short 25320 + 91565 1d40 385D .short 23864 + 91566 1d42 E872 .short 29416 + 91567 1d44 585D .short 23896 + 91568 1d46 E86A .short 27368 + 91569 1d48 785D .short 23928 + 91570 1d4a E87A .short 31464 + 91571 1d4c 985D .short 23960 + 91572 1d4e E866 .short 26344 + 91573 1d50 B85D .short 23992 + 91574 1d52 E876 .short 30440 + 91575 1d54 D85D .short 24024 + 91576 1d56 E86E .short 28392 + 91577 1d58 E85D .short 24040 + 91578 1d5a E85E .short 24296 + 91579 1d5c F85D .short 24056 + 91580 1d5e E87E .short 32488 + 91581 1d60 185E .short 24088 + 91582 1d62 E861 .short 25064 + 91583 1d64 385E .short 24120 + 91584 1d66 E871 .short 29160 + 91585 1d68 585E .short 24152 + 91586 1d6a E869 .short 27112 + 91587 1d6c 785E .short 24184 + 91588 1d6e E879 .short 31208 + 91589 1d70 985E .short 24216 + 91590 1d72 E865 .short 26088 + 91591 1d74 B85E .short 24248 + 91592 1d76 E875 .short 30184 + 91593 1d78 D85E .short 24280 + 91594 1d7a E86D .short 28136 + 91595 1d7c F85E .short 24312 + 91596 1d7e E87D .short 32232 + 91597 1d80 185F .short 24344 + 91598 1d82 E863 .short 25576 + 91599 1d84 385F .short 24376 + 91600 1d86 E873 .short 29672 + 91601 1d88 585F .short 24408 + 91602 1d8a E86B .short 27624 + 91603 1d8c 785F .short 24440 + 91604 1d8e E87B .short 31720 + 91605 1d90 985F .short 24472 + 91606 1d92 E867 .short 26600 + 91607 1d94 B85F .short 24504 + 91608 1d96 E877 .short 30696 + 91609 1d98 D85F .short 24536 + 91610 1d9a E86F .short 28648 + 91611 1d9c F85F .short 24568 + 91612 1d9e E87F .short 32744 + 91613 1da0 3860 .short 24632 + 91614 1da2 1870 .short 28696 + 91615 1da4 5860 .short 24664 + 91616 1da6 1868 .short 26648 + ARM GAS /tmp/ccLcDeJO.s page 1607 + + + 91617 1da8 7860 .short 24696 + 91618 1daa 1878 .short 30744 + 91619 1dac 9860 .short 24728 + 91620 1dae 1864 .short 25624 + 91621 1db0 B860 .short 24760 + 91622 1db2 1874 .short 29720 + 91623 1db4 D860 .short 24792 + 91624 1db6 186C .short 27672 + 91625 1db8 F860 .short 24824 + 91626 1dba 187C .short 31768 + 91627 1dbc 1861 .short 24856 + 91628 1dbe 1862 .short 25112 + 91629 1dc0 3861 .short 24888 + 91630 1dc2 1872 .short 29208 + 91631 1dc4 5861 .short 24920 + 91632 1dc6 186A .short 27160 + 91633 1dc8 7861 .short 24952 + 91634 1dca 187A .short 31256 + 91635 1dcc 9861 .short 24984 + 91636 1dce 1866 .short 26136 + 91637 1dd0 B861 .short 25016 + 91638 1dd2 1876 .short 30232 + 91639 1dd4 D861 .short 25048 + 91640 1dd6 186E .short 28184 + 91641 1dd8 F861 .short 25080 + 91642 1dda 187E .short 32280 + 91643 1ddc 3862 .short 25144 + 91644 1dde 1871 .short 28952 + 91645 1de0 5862 .short 25176 + 91646 1de2 1869 .short 26904 + 91647 1de4 7862 .short 25208 + 91648 1de6 1879 .short 31000 + 91649 1de8 9862 .short 25240 + 91650 1dea 1865 .short 25880 + 91651 1dec B862 .short 25272 + 91652 1dee 1875 .short 29976 + 91653 1df0 D862 .short 25304 + 91654 1df2 186D .short 27928 + 91655 1df4 F862 .short 25336 + 91656 1df6 187D .short 32024 + 91657 1df8 3863 .short 25400 + 91658 1dfa 1873 .short 29464 + 91659 1dfc 5863 .short 25432 + 91660 1dfe 186B .short 27416 + 91661 1e00 7863 .short 25464 + 91662 1e02 187B .short 31512 + 91663 1e04 9863 .short 25496 + 91664 1e06 1867 .short 26392 + 91665 1e08 B863 .short 25528 + 91666 1e0a 1877 .short 30488 + 91667 1e0c D863 .short 25560 + 91668 1e0e 186F .short 28440 + 91669 1e10 F863 .short 25592 + 91670 1e12 187F .short 32536 + 91671 1e14 3864 .short 25656 + 91672 1e16 9870 .short 28824 + 91673 1e18 5864 .short 25688 + ARM GAS /tmp/ccLcDeJO.s page 1608 + + + 91674 1e1a 9868 .short 26776 + 91675 1e1c 7864 .short 25720 + 91676 1e1e 9878 .short 30872 + 91677 1e20 B864 .short 25784 + 91678 1e22 9874 .short 29848 + 91679 1e24 D864 .short 25816 + 91680 1e26 986C .short 27800 + 91681 1e28 F864 .short 25848 + 91682 1e2a 987C .short 31896 + 91683 1e2c 3865 .short 25912 + 91684 1e2e 9872 .short 29336 + 91685 1e30 5865 .short 25944 + 91686 1e32 986A .short 27288 + 91687 1e34 7865 .short 25976 + 91688 1e36 987A .short 31384 + 91689 1e38 9865 .short 26008 + 91690 1e3a 9866 .short 26264 + 91691 1e3c B865 .short 26040 + 91692 1e3e 9876 .short 30360 + 91693 1e40 D865 .short 26072 + 91694 1e42 986E .short 28312 + 91695 1e44 F865 .short 26104 + 91696 1e46 987E .short 32408 + 91697 1e48 3866 .short 26168 + 91698 1e4a 9871 .short 29080 + 91699 1e4c 5866 .short 26200 + 91700 1e4e 9869 .short 27032 + 91701 1e50 7866 .short 26232 + 91702 1e52 9879 .short 31128 + 91703 1e54 B866 .short 26296 + 91704 1e56 9875 .short 30104 + 91705 1e58 D866 .short 26328 + 91706 1e5a 986D .short 28056 + 91707 1e5c F866 .short 26360 + 91708 1e5e 987D .short 32152 + 91709 1e60 3867 .short 26424 + 91710 1e62 9873 .short 29592 + 91711 1e64 5867 .short 26456 + 91712 1e66 986B .short 27544 + 91713 1e68 7867 .short 26488 + 91714 1e6a 987B .short 31640 + 91715 1e6c B867 .short 26552 + 91716 1e6e 9877 .short 30616 + 91717 1e70 D867 .short 26584 + 91718 1e72 986F .short 28568 + 91719 1e74 F867 .short 26616 + 91720 1e76 987F .short 32664 + 91721 1e78 3868 .short 26680 + 91722 1e7a 5870 .short 28760 + 91723 1e7c 7868 .short 26744 + 91724 1e7e 5878 .short 30808 + 91725 1e80 B868 .short 26808 + 91726 1e82 5874 .short 29784 + 91727 1e84 D868 .short 26840 + 91728 1e86 586C .short 27736 + 91729 1e88 F868 .short 26872 + 91730 1e8a 587C .short 31832 + ARM GAS /tmp/ccLcDeJO.s page 1609 + + + 91731 1e8c 3869 .short 26936 + 91732 1e8e 5872 .short 29272 + 91733 1e90 5869 .short 26968 + 91734 1e92 586A .short 27224 + 91735 1e94 7869 .short 27000 + 91736 1e96 587A .short 31320 + 91737 1e98 B869 .short 27064 + 91738 1e9a 5876 .short 30296 + 91739 1e9c D869 .short 27096 + 91740 1e9e 586E .short 28248 + 91741 1ea0 F869 .short 27128 + 91742 1ea2 587E .short 32344 + 91743 1ea4 386A .short 27192 + 91744 1ea6 5871 .short 29016 + 91745 1ea8 786A .short 27256 + 91746 1eaa 5879 .short 31064 + 91747 1eac B86A .short 27320 + 91748 1eae 5875 .short 30040 + 91749 1eb0 D86A .short 27352 + 91750 1eb2 586D .short 27992 + 91751 1eb4 F86A .short 27384 + 91752 1eb6 587D .short 32088 + 91753 1eb8 386B .short 27448 + 91754 1eba 5873 .short 29528 + 91755 1ebc 786B .short 27512 + 91756 1ebe 587B .short 31576 + 91757 1ec0 B86B .short 27576 + 91758 1ec2 5877 .short 30552 + 91759 1ec4 D86B .short 27608 + 91760 1ec6 586F .short 28504 + 91761 1ec8 F86B .short 27640 + 91762 1eca 587F .short 32600 + 91763 1ecc 386C .short 27704 + 91764 1ece D870 .short 28888 + 91765 1ed0 786C .short 27768 + 91766 1ed2 D878 .short 30936 + 91767 1ed4 B86C .short 27832 + 91768 1ed6 D874 .short 29912 + 91769 1ed8 F86C .short 27896 + 91770 1eda D87C .short 31960 + 91771 1edc 386D .short 27960 + 91772 1ede D872 .short 29400 + 91773 1ee0 786D .short 28024 + 91774 1ee2 D87A .short 31448 + 91775 1ee4 B86D .short 28088 + 91776 1ee6 D876 .short 30424 + 91777 1ee8 D86D .short 28120 + 91778 1eea D86E .short 28376 + 91779 1eec F86D .short 28152 + 91780 1eee D87E .short 32472 + 91781 1ef0 386E .short 28216 + 91782 1ef2 D871 .short 29144 + 91783 1ef4 786E .short 28280 + 91784 1ef6 D879 .short 31192 + 91785 1ef8 B86E .short 28344 + 91786 1efa D875 .short 30168 + 91787 1efc F86E .short 28408 + ARM GAS /tmp/ccLcDeJO.s page 1610 + + + 91788 1efe D87D .short 32216 + 91789 1f00 386F .short 28472 + 91790 1f02 D873 .short 29656 + 91791 1f04 786F .short 28536 + 91792 1f06 D87B .short 31704 + 91793 1f08 B86F .short 28600 + 91794 1f0a D877 .short 30680 + 91795 1f0c F86F .short 28664 + 91796 1f0e D87F .short 32728 + 91797 1f10 7870 .short 28792 + 91798 1f12 3878 .short 30776 + 91799 1f14 B870 .short 28856 + 91800 1f16 3874 .short 29752 + 91801 1f18 F870 .short 28920 + 91802 1f1a 387C .short 31800 + 91803 1f1c 3871 .short 28984 + 91804 1f1e 3872 .short 29240 + 91805 1f20 7871 .short 29048 + 91806 1f22 387A .short 31288 + 91807 1f24 B871 .short 29112 + 91808 1f26 3876 .short 30264 + 91809 1f28 F871 .short 29176 + 91810 1f2a 387E .short 32312 + 91811 1f2c 7872 .short 29304 + 91812 1f2e 3879 .short 31032 + 91813 1f30 B872 .short 29368 + 91814 1f32 3875 .short 30008 + 91815 1f34 F872 .short 29432 + 91816 1f36 387D .short 32056 + 91817 1f38 7873 .short 29560 + 91818 1f3a 387B .short 31544 + 91819 1f3c B873 .short 29624 + 91820 1f3e 3877 .short 30520 + 91821 1f40 F873 .short 29688 + 91822 1f42 387F .short 32568 + 91823 1f44 7874 .short 29816 + 91824 1f46 B878 .short 30904 + 91825 1f48 F874 .short 29944 + 91826 1f4a B87C .short 31928 + 91827 1f4c 7875 .short 30072 + 91828 1f4e B87A .short 31416 + 91829 1f50 B875 .short 30136 + 91830 1f52 B876 .short 30392 + 91831 1f54 F875 .short 30200 + 91832 1f56 B87E .short 32440 + 91833 1f58 7876 .short 30328 + 91834 1f5a B879 .short 31160 + 91835 1f5c F876 .short 30456 + 91836 1f5e B87D .short 32184 + 91837 1f60 7877 .short 30584 + 91838 1f62 B87B .short 31672 + 91839 1f64 F877 .short 30712 + 91840 1f66 B87F .short 32696 + 91841 1f68 F878 .short 30968 + 91842 1f6a 787C .short 31864 + 91843 1f6c 7879 .short 31096 + 91844 1f6e 787A .short 31352 + ARM GAS /tmp/ccLcDeJO.s page 1611 + + + 91845 1f70 F879 .short 31224 + 91846 1f72 787E .short 32376 + 91847 1f74 F87A .short 31480 + 91848 1f76 787D .short 32120 + 91849 1f78 F87B .short 31736 + 91850 1f7a 787F .short 32632 + 91851 1f7c F87D .short 32248 + 91852 1f7e F87E .short 32504 + 91853 .section .rodata.armBitRevIndexTable_fixed_512,"a" + 91854 .align 2 + 91857 armBitRevIndexTable_fixed_512: + 91858 0000 0800 .short 8 + 91859 0002 0008 .short 2048 + 91860 0004 1000 .short 16 + 91861 0006 0004 .short 1024 + 91862 0008 1800 .short 24 + 91863 000a 000C .short 3072 + 91864 000c 2000 .short 32 + 91865 000e 0002 .short 512 + 91866 0010 2800 .short 40 + 91867 0012 000A .short 2560 + 91868 0014 3000 .short 48 + 91869 0016 0006 .short 1536 + 91870 0018 3800 .short 56 + 91871 001a 000E .short 3584 + 91872 001c 4000 .short 64 + 91873 001e 0001 .short 256 + 91874 0020 4800 .short 72 + 91875 0022 0009 .short 2304 + 91876 0024 5000 .short 80 + 91877 0026 0005 .short 1280 + 91878 0028 5800 .short 88 + 91879 002a 000D .short 3328 + 91880 002c 6000 .short 96 + 91881 002e 0003 .short 768 + 91882 0030 6800 .short 104 + 91883 0032 000B .short 2816 + 91884 0034 7000 .short 112 + 91885 0036 0007 .short 1792 + 91886 0038 7800 .short 120 + 91887 003a 000F .short 3840 + 91888 003c 8800 .short 136 + 91889 003e 8008 .short 2176 + 91890 0040 9000 .short 144 + 91891 0042 8004 .short 1152 + 91892 0044 9800 .short 152 + 91893 0046 800C .short 3200 + 91894 0048 A000 .short 160 + 91895 004a 8002 .short 640 + 91896 004c A800 .short 168 + 91897 004e 800A .short 2688 + 91898 0050 B000 .short 176 + 91899 0052 8006 .short 1664 + 91900 0054 B800 .short 184 + 91901 0056 800E .short 3712 + 91902 0058 C000 .short 192 + 91903 005a 8001 .short 384 + ARM GAS /tmp/ccLcDeJO.s page 1612 + + + 91904 005c C800 .short 200 + 91905 005e 8009 .short 2432 + 91906 0060 D000 .short 208 + 91907 0062 8005 .short 1408 + 91908 0064 D800 .short 216 + 91909 0066 800D .short 3456 + 91910 0068 E000 .short 224 + 91911 006a 8003 .short 896 + 91912 006c E800 .short 232 + 91913 006e 800B .short 2944 + 91914 0070 F000 .short 240 + 91915 0072 8007 .short 1920 + 91916 0074 F800 .short 248 + 91917 0076 800F .short 3968 + 91918 0078 0801 .short 264 + 91919 007a 4008 .short 2112 + 91920 007c 1001 .short 272 + 91921 007e 4004 .short 1088 + 91922 0080 1801 .short 280 + 91923 0082 400C .short 3136 + 91924 0084 2001 .short 288 + 91925 0086 4002 .short 576 + 91926 0088 2801 .short 296 + 91927 008a 400A .short 2624 + 91928 008c 3001 .short 304 + 91929 008e 4006 .short 1600 + 91930 0090 3801 .short 312 + 91931 0092 400E .short 3648 + 91932 0094 4801 .short 328 + 91933 0096 4009 .short 2368 + 91934 0098 5001 .short 336 + 91935 009a 4005 .short 1344 + 91936 009c 5801 .short 344 + 91937 009e 400D .short 3392 + 91938 00a0 6001 .short 352 + 91939 00a2 4003 .short 832 + 91940 00a4 6801 .short 360 + 91941 00a6 400B .short 2880 + 91942 00a8 7001 .short 368 + 91943 00aa 4007 .short 1856 + 91944 00ac 7801 .short 376 + 91945 00ae 400F .short 3904 + 91946 00b0 8801 .short 392 + 91947 00b2 C008 .short 2240 + 91948 00b4 9001 .short 400 + 91949 00b6 C004 .short 1216 + 91950 00b8 9801 .short 408 + 91951 00ba C00C .short 3264 + 91952 00bc A001 .short 416 + 91953 00be C002 .short 704 + 91954 00c0 A801 .short 424 + 91955 00c2 C00A .short 2752 + 91956 00c4 B001 .short 432 + 91957 00c6 C006 .short 1728 + 91958 00c8 B801 .short 440 + 91959 00ca C00E .short 3776 + 91960 00cc C801 .short 456 + ARM GAS /tmp/ccLcDeJO.s page 1613 + + + 91961 00ce C009 .short 2496 + 91962 00d0 D001 .short 464 + 91963 00d2 C005 .short 1472 + 91964 00d4 D801 .short 472 + 91965 00d6 C00D .short 3520 + 91966 00d8 E001 .short 480 + 91967 00da C003 .short 960 + 91968 00dc E801 .short 488 + 91969 00de C00B .short 3008 + 91970 00e0 F001 .short 496 + 91971 00e2 C007 .short 1984 + 91972 00e4 F801 .short 504 + 91973 00e6 C00F .short 4032 + 91974 00e8 0802 .short 520 + 91975 00ea 2008 .short 2080 + 91976 00ec 1002 .short 528 + 91977 00ee 2004 .short 1056 + 91978 00f0 1802 .short 536 + 91979 00f2 200C .short 3104 + 91980 00f4 2802 .short 552 + 91981 00f6 200A .short 2592 + 91982 00f8 3002 .short 560 + 91983 00fa 2006 .short 1568 + 91984 00fc 3802 .short 568 + 91985 00fe 200E .short 3616 + 91986 0100 4802 .short 584 + 91987 0102 2009 .short 2336 + 91988 0104 5002 .short 592 + 91989 0106 2005 .short 1312 + 91990 0108 5802 .short 600 + 91991 010a 200D .short 3360 + 91992 010c 6002 .short 608 + 91993 010e 2003 .short 800 + 91994 0110 6802 .short 616 + 91995 0112 200B .short 2848 + 91996 0114 7002 .short 624 + 91997 0116 2007 .short 1824 + 91998 0118 7802 .short 632 + 91999 011a 200F .short 3872 + 92000 011c 8802 .short 648 + 92001 011e A008 .short 2208 + 92002 0120 9002 .short 656 + 92003 0122 A004 .short 1184 + 92004 0124 9802 .short 664 + 92005 0126 A00C .short 3232 + 92006 0128 A802 .short 680 + 92007 012a A00A .short 2720 + 92008 012c B002 .short 688 + 92009 012e A006 .short 1696 + 92010 0130 B802 .short 696 + 92011 0132 A00E .short 3744 + 92012 0134 C802 .short 712 + 92013 0136 A009 .short 2464 + 92014 0138 D002 .short 720 + 92015 013a A005 .short 1440 + 92016 013c D802 .short 728 + 92017 013e A00D .short 3488 + ARM GAS /tmp/ccLcDeJO.s page 1614 + + + 92018 0140 E002 .short 736 + 92019 0142 A003 .short 928 + 92020 0144 E802 .short 744 + 92021 0146 A00B .short 2976 + 92022 0148 F002 .short 752 + 92023 014a A007 .short 1952 + 92024 014c F802 .short 760 + 92025 014e A00F .short 4000 + 92026 0150 0803 .short 776 + 92027 0152 6008 .short 2144 + 92028 0154 1003 .short 784 + 92029 0156 6004 .short 1120 + 92030 0158 1803 .short 792 + 92031 015a 600C .short 3168 + 92032 015c 2803 .short 808 + 92033 015e 600A .short 2656 + 92034 0160 3003 .short 816 + 92035 0162 6006 .short 1632 + 92036 0164 3803 .short 824 + 92037 0166 600E .short 3680 + 92038 0168 4803 .short 840 + 92039 016a 6009 .short 2400 + 92040 016c 5003 .short 848 + 92041 016e 6005 .short 1376 + 92042 0170 5803 .short 856 + 92043 0172 600D .short 3424 + 92044 0174 6803 .short 872 + 92045 0176 600B .short 2912 + 92046 0178 7003 .short 880 + 92047 017a 6007 .short 1888 + 92048 017c 7803 .short 888 + 92049 017e 600F .short 3936 + 92050 0180 8803 .short 904 + 92051 0182 E008 .short 2272 + 92052 0184 9003 .short 912 + 92053 0186 E004 .short 1248 + 92054 0188 9803 .short 920 + 92055 018a E00C .short 3296 + 92056 018c A803 .short 936 + 92057 018e E00A .short 2784 + 92058 0190 B003 .short 944 + 92059 0192 E006 .short 1760 + 92060 0194 B803 .short 952 + 92061 0196 E00E .short 3808 + 92062 0198 C803 .short 968 + 92063 019a E009 .short 2528 + 92064 019c D003 .short 976 + 92065 019e E005 .short 1504 + 92066 01a0 D803 .short 984 + 92067 01a2 E00D .short 3552 + 92068 01a4 E803 .short 1000 + 92069 01a6 E00B .short 3040 + 92070 01a8 F003 .short 1008 + 92071 01aa E007 .short 2016 + 92072 01ac F803 .short 1016 + 92073 01ae E00F .short 4064 + 92074 01b0 0804 .short 1032 + ARM GAS /tmp/ccLcDeJO.s page 1615 + + + 92075 01b2 1008 .short 2064 + 92076 01b4 1804 .short 1048 + 92077 01b6 100C .short 3088 + 92078 01b8 2804 .short 1064 + 92079 01ba 100A .short 2576 + 92080 01bc 3004 .short 1072 + 92081 01be 1006 .short 1552 + 92082 01c0 3804 .short 1080 + 92083 01c2 100E .short 3600 + 92084 01c4 4804 .short 1096 + 92085 01c6 1009 .short 2320 + 92086 01c8 5004 .short 1104 + 92087 01ca 1005 .short 1296 + 92088 01cc 5804 .short 1112 + 92089 01ce 100D .short 3344 + 92090 01d0 6804 .short 1128 + 92091 01d2 100B .short 2832 + 92092 01d4 7004 .short 1136 + 92093 01d6 1007 .short 1808 + 92094 01d8 7804 .short 1144 + 92095 01da 100F .short 3856 + 92096 01dc 8804 .short 1160 + 92097 01de 9008 .short 2192 + 92098 01e0 9804 .short 1176 + 92099 01e2 900C .short 3216 + 92100 01e4 A804 .short 1192 + 92101 01e6 900A .short 2704 + 92102 01e8 B004 .short 1200 + 92103 01ea 9006 .short 1680 + 92104 01ec B804 .short 1208 + 92105 01ee 900E .short 3728 + 92106 01f0 C804 .short 1224 + 92107 01f2 9009 .short 2448 + 92108 01f4 D004 .short 1232 + 92109 01f6 9005 .short 1424 + 92110 01f8 D804 .short 1240 + 92111 01fa 900D .short 3472 + 92112 01fc E804 .short 1256 + 92113 01fe 900B .short 2960 + 92114 0200 F004 .short 1264 + 92115 0202 9007 .short 1936 + 92116 0204 F804 .short 1272 + 92117 0206 900F .short 3984 + 92118 0208 0805 .short 1288 + 92119 020a 5008 .short 2128 + 92120 020c 1805 .short 1304 + 92121 020e 500C .short 3152 + 92122 0210 2805 .short 1320 + 92123 0212 500A .short 2640 + 92124 0214 3005 .short 1328 + 92125 0216 5006 .short 1616 + 92126 0218 3805 .short 1336 + 92127 021a 500E .short 3664 + 92128 021c 4805 .short 1352 + 92129 021e 5009 .short 2384 + 92130 0220 5805 .short 1368 + 92131 0222 500D .short 3408 + ARM GAS /tmp/ccLcDeJO.s page 1616 + + + 92132 0224 6805 .short 1384 + 92133 0226 500B .short 2896 + 92134 0228 7005 .short 1392 + 92135 022a 5007 .short 1872 + 92136 022c 7805 .short 1400 + 92137 022e 500F .short 3920 + 92138 0230 8805 .short 1416 + 92139 0232 D008 .short 2256 + 92140 0234 9805 .short 1432 + 92141 0236 D00C .short 3280 + 92142 0238 A805 .short 1448 + 92143 023a D00A .short 2768 + 92144 023c B005 .short 1456 + 92145 023e D006 .short 1744 + 92146 0240 B805 .short 1464 + 92147 0242 D00E .short 3792 + 92148 0244 C805 .short 1480 + 92149 0246 D009 .short 2512 + 92150 0248 D805 .short 1496 + 92151 024a D00D .short 3536 + 92152 024c E805 .short 1512 + 92153 024e D00B .short 3024 + 92154 0250 F005 .short 1520 + 92155 0252 D007 .short 2000 + 92156 0254 F805 .short 1528 + 92157 0256 D00F .short 4048 + 92158 0258 0806 .short 1544 + 92159 025a 3008 .short 2096 + 92160 025c 1806 .short 1560 + 92161 025e 300C .short 3120 + 92162 0260 2806 .short 1576 + 92163 0262 300A .short 2608 + 92164 0264 3806 .short 1592 + 92165 0266 300E .short 3632 + 92166 0268 4806 .short 1608 + 92167 026a 3009 .short 2352 + 92168 026c 5806 .short 1624 + 92169 026e 300D .short 3376 + 92170 0270 6806 .short 1640 + 92171 0272 300B .short 2864 + 92172 0274 7006 .short 1648 + 92173 0276 3007 .short 1840 + 92174 0278 7806 .short 1656 + 92175 027a 300F .short 3888 + 92176 027c 8806 .short 1672 + 92177 027e B008 .short 2224 + 92178 0280 9806 .short 1688 + 92179 0282 B00C .short 3248 + 92180 0284 A806 .short 1704 + 92181 0286 B00A .short 2736 + 92182 0288 B806 .short 1720 + 92183 028a B00E .short 3760 + 92184 028c C806 .short 1736 + 92185 028e B009 .short 2480 + 92186 0290 D806 .short 1752 + 92187 0292 B00D .short 3504 + 92188 0294 E806 .short 1768 + ARM GAS /tmp/ccLcDeJO.s page 1617 + + + 92189 0296 B00B .short 2992 + 92190 0298 F006 .short 1776 + 92191 029a B007 .short 1968 + 92192 029c F806 .short 1784 + 92193 029e B00F .short 4016 + 92194 02a0 0807 .short 1800 + 92195 02a2 7008 .short 2160 + 92196 02a4 1807 .short 1816 + 92197 02a6 700C .short 3184 + 92198 02a8 2807 .short 1832 + 92199 02aa 700A .short 2672 + 92200 02ac 3807 .short 1848 + 92201 02ae 700E .short 3696 + 92202 02b0 4807 .short 1864 + 92203 02b2 7009 .short 2416 + 92204 02b4 5807 .short 1880 + 92205 02b6 700D .short 3440 + 92206 02b8 6807 .short 1896 + 92207 02ba 700B .short 2928 + 92208 02bc 7807 .short 1912 + 92209 02be 700F .short 3952 + 92210 02c0 8807 .short 1928 + 92211 02c2 F008 .short 2288 + 92212 02c4 9807 .short 1944 + 92213 02c6 F00C .short 3312 + 92214 02c8 A807 .short 1960 + 92215 02ca F00A .short 2800 + 92216 02cc B807 .short 1976 + 92217 02ce F00E .short 3824 + 92218 02d0 C807 .short 1992 + 92219 02d2 F009 .short 2544 + 92220 02d4 D807 .short 2008 + 92221 02d6 F00D .short 3568 + 92222 02d8 E807 .short 2024 + 92223 02da F00B .short 3056 + 92224 02dc F807 .short 2040 + 92225 02de F00F .short 4080 + 92226 02e0 1808 .short 2072 + 92227 02e2 080C .short 3080 + 92228 02e4 2808 .short 2088 + 92229 02e6 080A .short 2568 + 92230 02e8 3808 .short 2104 + 92231 02ea 080E .short 3592 + 92232 02ec 4808 .short 2120 + 92233 02ee 0809 .short 2312 + 92234 02f0 5808 .short 2136 + 92235 02f2 080D .short 3336 + 92236 02f4 6808 .short 2152 + 92237 02f6 080B .short 2824 + 92238 02f8 7808 .short 2168 + 92239 02fa 080F .short 3848 + 92240 02fc 9808 .short 2200 + 92241 02fe 880C .short 3208 + 92242 0300 A808 .short 2216 + 92243 0302 880A .short 2696 + 92244 0304 B808 .short 2232 + 92245 0306 880E .short 3720 + ARM GAS /tmp/ccLcDeJO.s page 1618 + + + 92246 0308 C808 .short 2248 + 92247 030a 8809 .short 2440 + 92248 030c D808 .short 2264 + 92249 030e 880D .short 3464 + 92250 0310 E808 .short 2280 + 92251 0312 880B .short 2952 + 92252 0314 F808 .short 2296 + 92253 0316 880F .short 3976 + 92254 0318 1809 .short 2328 + 92255 031a 480C .short 3144 + 92256 031c 2809 .short 2344 + 92257 031e 480A .short 2632 + 92258 0320 3809 .short 2360 + 92259 0322 480E .short 3656 + 92260 0324 5809 .short 2392 + 92261 0326 480D .short 3400 + 92262 0328 6809 .short 2408 + 92263 032a 480B .short 2888 + 92264 032c 7809 .short 2424 + 92265 032e 480F .short 3912 + 92266 0330 9809 .short 2456 + 92267 0332 C80C .short 3272 + 92268 0334 A809 .short 2472 + 92269 0336 C80A .short 2760 + 92270 0338 B809 .short 2488 + 92271 033a C80E .short 3784 + 92272 033c D809 .short 2520 + 92273 033e C80D .short 3528 + 92274 0340 E809 .short 2536 + 92275 0342 C80B .short 3016 + 92276 0344 F809 .short 2552 + 92277 0346 C80F .short 4040 + 92278 0348 180A .short 2584 + 92279 034a 280C .short 3112 + 92280 034c 380A .short 2616 + 92281 034e 280E .short 3624 + 92282 0350 580A .short 2648 + 92283 0352 280D .short 3368 + 92284 0354 680A .short 2664 + 92285 0356 280B .short 2856 + 92286 0358 780A .short 2680 + 92287 035a 280F .short 3880 + 92288 035c 980A .short 2712 + 92289 035e A80C .short 3240 + 92290 0360 B80A .short 2744 + 92291 0362 A80E .short 3752 + 92292 0364 D80A .short 2776 + 92293 0366 A80D .short 3496 + 92294 0368 E80A .short 2792 + 92295 036a A80B .short 2984 + 92296 036c F80A .short 2808 + 92297 036e A80F .short 4008 + 92298 0370 180B .short 2840 + 92299 0372 680C .short 3176 + 92300 0374 380B .short 2872 + 92301 0376 680E .short 3688 + 92302 0378 580B .short 2904 + ARM GAS /tmp/ccLcDeJO.s page 1619 + + + 92303 037a 680D .short 3432 + 92304 037c 780B .short 2936 + 92305 037e 680F .short 3944 + 92306 0380 980B .short 2968 + 92307 0382 E80C .short 3304 + 92308 0384 B80B .short 3000 + 92309 0386 E80E .short 3816 + 92310 0388 D80B .short 3032 + 92311 038a E80D .short 3560 + 92312 038c F80B .short 3064 + 92313 038e E80F .short 4072 + 92314 0390 380C .short 3128 + 92315 0392 180E .short 3608 + 92316 0394 580C .short 3160 + 92317 0396 180D .short 3352 + 92318 0398 780C .short 3192 + 92319 039a 180F .short 3864 + 92320 039c B80C .short 3256 + 92321 039e 980E .short 3736 + 92322 03a0 D80C .short 3288 + 92323 03a2 980D .short 3480 + 92324 03a4 F80C .short 3320 + 92325 03a6 980F .short 3992 + 92326 03a8 380D .short 3384 + 92327 03aa 580E .short 3672 + 92328 03ac 780D .short 3448 + 92329 03ae 580F .short 3928 + 92330 03b0 B80D .short 3512 + 92331 03b2 D80E .short 3800 + 92332 03b4 F80D .short 3576 + 92333 03b6 D80F .short 4056 + 92334 03b8 780E .short 3704 + 92335 03ba 380F .short 3896 + 92336 03bc F80E .short 3832 + 92337 03be B80F .short 4024 + 92338 .section .rodata.armBitRevIndexTable_fixed_64,"a" + 92339 .align 2 + 92342 armBitRevIndexTable_fixed_64: + 92343 0000 0800 .short 8 + 92344 0002 0001 .short 256 + 92345 0004 1000 .short 16 + 92346 0006 8000 .short 128 + 92347 0008 1800 .short 24 + 92348 000a 8001 .short 384 + 92349 000c 2000 .short 32 + 92350 000e 4000 .short 64 + 92351 0010 2800 .short 40 + 92352 0012 4001 .short 320 + 92353 0014 3000 .short 48 + 92354 0016 C000 .short 192 + 92355 0018 3800 .short 56 + 92356 001a C001 .short 448 + 92357 001c 4800 .short 72 + 92358 001e 2001 .short 288 + 92359 0020 5000 .short 80 + 92360 0022 A000 .short 160 + 92361 0024 5800 .short 88 + ARM GAS /tmp/ccLcDeJO.s page 1620 + + + 92362 0026 A001 .short 416 + 92363 0028 6800 .short 104 + 92364 002a 6001 .short 352 + 92365 002c 7000 .short 112 + 92366 002e E000 .short 224 + 92367 0030 7800 .short 120 + 92368 0032 E001 .short 480 + 92369 0034 8800 .short 136 + 92370 0036 1001 .short 272 + 92371 0038 9800 .short 152 + 92372 003a 9001 .short 400 + 92373 003c A800 .short 168 + 92374 003e 5001 .short 336 + 92375 0040 B000 .short 176 + 92376 0042 D000 .short 208 + 92377 0044 B800 .short 184 + 92378 0046 D001 .short 464 + 92379 0048 C800 .short 200 + 92380 004a 3001 .short 304 + 92381 004c D800 .short 216 + 92382 004e B001 .short 432 + 92383 0050 E800 .short 232 + 92384 0052 7001 .short 368 + 92385 0054 F800 .short 248 + 92386 0056 F001 .short 496 + 92387 0058 1801 .short 280 + 92388 005a 8801 .short 392 + 92389 005c 2801 .short 296 + 92390 005e 4801 .short 328 + 92391 0060 3801 .short 312 + 92392 0062 C801 .short 456 + 92393 0064 5801 .short 344 + 92394 0066 A801 .short 424 + 92395 0068 7801 .short 376 + 92396 006a E801 .short 488 + 92397 006c B801 .short 440 + 92398 006e D801 .short 472 + 92399 .section .rodata.armBitRevTable,"a" + 92400 .align 2 + 92403 armBitRevTable: + 92404 0000 0004 .short 1024 + 92405 0002 0002 .short 512 + 92406 0004 0006 .short 1536 + 92407 0006 0001 .short 256 + 92408 0008 0005 .short 1280 + 92409 000a 0003 .short 768 + 92410 000c 0007 .short 1792 + 92411 000e 8000 .short 128 + 92412 0010 8004 .short 1152 + 92413 0012 8002 .short 640 + 92414 0014 8006 .short 1664 + 92415 0016 8001 .short 384 + 92416 0018 8005 .short 1408 + 92417 001a 8003 .short 896 + 92418 001c 8007 .short 1920 + 92419 001e 4000 .short 64 + 92420 0020 4004 .short 1088 + ARM GAS /tmp/ccLcDeJO.s page 1621 + + + 92421 0022 4002 .short 576 + 92422 0024 4006 .short 1600 + 92423 0026 4001 .short 320 + 92424 0028 4005 .short 1344 + 92425 002a 4003 .short 832 + 92426 002c 4007 .short 1856 + 92427 002e C000 .short 192 + 92428 0030 C004 .short 1216 + 92429 0032 C002 .short 704 + 92430 0034 C006 .short 1728 + 92431 0036 C001 .short 448 + 92432 0038 C005 .short 1472 + 92433 003a C003 .short 960 + 92434 003c C007 .short 1984 + 92435 003e 2000 .short 32 + 92436 0040 2004 .short 1056 + 92437 0042 2002 .short 544 + 92438 0044 2006 .short 1568 + 92439 0046 2001 .short 288 + 92440 0048 2005 .short 1312 + 92441 004a 2003 .short 800 + 92442 004c 2007 .short 1824 + 92443 004e A000 .short 160 + 92444 0050 A004 .short 1184 + 92445 0052 A002 .short 672 + 92446 0054 A006 .short 1696 + 92447 0056 A001 .short 416 + 92448 0058 A005 .short 1440 + 92449 005a A003 .short 928 + 92450 005c A007 .short 1952 + 92451 005e 6000 .short 96 + 92452 0060 6004 .short 1120 + 92453 0062 6002 .short 608 + 92454 0064 6006 .short 1632 + 92455 0066 6001 .short 352 + 92456 0068 6005 .short 1376 + 92457 006a 6003 .short 864 + 92458 006c 6007 .short 1888 + 92459 006e E000 .short 224 + 92460 0070 E004 .short 1248 + 92461 0072 E002 .short 736 + 92462 0074 E006 .short 1760 + 92463 0076 E001 .short 480 + 92464 0078 E005 .short 1504 + 92465 007a E003 .short 992 + 92466 007c E007 .short 2016 + 92467 007e 1000 .short 16 + 92468 0080 1004 .short 1040 + 92469 0082 1002 .short 528 + 92470 0084 1006 .short 1552 + 92471 0086 1001 .short 272 + 92472 0088 1005 .short 1296 + 92473 008a 1003 .short 784 + 92474 008c 1007 .short 1808 + 92475 008e 9000 .short 144 + 92476 0090 9004 .short 1168 + 92477 0092 9002 .short 656 + ARM GAS /tmp/ccLcDeJO.s page 1622 + + + 92478 0094 9006 .short 1680 + 92479 0096 9001 .short 400 + 92480 0098 9005 .short 1424 + 92481 009a 9003 .short 912 + 92482 009c 9007 .short 1936 + 92483 009e 5000 .short 80 + 92484 00a0 5004 .short 1104 + 92485 00a2 5002 .short 592 + 92486 00a4 5006 .short 1616 + 92487 00a6 5001 .short 336 + 92488 00a8 5005 .short 1360 + 92489 00aa 5003 .short 848 + 92490 00ac 5007 .short 1872 + 92491 00ae D000 .short 208 + 92492 00b0 D004 .short 1232 + 92493 00b2 D002 .short 720 + 92494 00b4 D006 .short 1744 + 92495 00b6 D001 .short 464 + 92496 00b8 D005 .short 1488 + 92497 00ba D003 .short 976 + 92498 00bc D007 .short 2000 + 92499 00be 3000 .short 48 + 92500 00c0 3004 .short 1072 + 92501 00c2 3002 .short 560 + 92502 00c4 3006 .short 1584 + 92503 00c6 3001 .short 304 + 92504 00c8 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.short 202 + 93068 0530 CA04 .short 1226 + 93069 0532 CA02 .short 714 + 93070 0534 CA06 .short 1738 + 93071 0536 CA01 .short 458 + 93072 0538 CA05 .short 1482 + 93073 053a CA03 .short 970 + 93074 053c CA07 .short 1994 + 93075 053e 2A00 .short 42 + 93076 0540 2A04 .short 1066 + 93077 0542 2A02 .short 554 + 93078 0544 2A06 .short 1578 + 93079 0546 2A01 .short 298 + 93080 0548 2A05 .short 1322 + 93081 054a 2A03 .short 810 + 93082 054c 2A07 .short 1834 + 93083 054e AA00 .short 170 + 93084 0550 AA04 .short 1194 + 93085 0552 AA02 .short 682 + 93086 0554 AA06 .short 1706 + 93087 0556 AA01 .short 426 + 93088 0558 AA05 .short 1450 + 93089 055a AA03 .short 938 + 93090 055c AA07 .short 1962 + 93091 055e 6A00 .short 106 + 93092 0560 6A04 .short 1130 + 93093 0562 6A02 .short 618 + 93094 0564 6A06 .short 1642 + 93095 0566 6A01 .short 362 + 93096 0568 6A05 .short 1386 + 93097 056a 6A03 .short 874 + 93098 056c 6A07 .short 1898 + 93099 056e EA00 .short 234 + 93100 0570 EA04 .short 1258 + 93101 0572 EA02 .short 746 + 93102 0574 EA06 .short 1770 + 93103 0576 EA01 .short 490 + 93104 0578 EA05 .short 1514 + ARM GAS /tmp/ccLcDeJO.s page 1633 + + + 93105 057a EA03 .short 1002 + 93106 057c EA07 .short 2026 + 93107 057e 1A00 .short 26 + 93108 0580 1A04 .short 1050 + 93109 0582 1A02 .short 538 + 93110 0584 1A06 .short 1562 + 93111 0586 1A01 .short 282 + 93112 0588 1A05 .short 1306 + 93113 058a 1A03 .short 794 + 93114 058c 1A07 .short 1818 + 93115 058e 9A00 .short 154 + 93116 0590 9A04 .short 1178 + 93117 0592 9A02 .short 666 + 93118 0594 9A06 .short 1690 + 93119 0596 9A01 .short 410 + 93120 0598 9A05 .short 1434 + 93121 059a 9A03 .short 922 + 93122 059c 9A07 .short 1946 + 93123 059e 5A00 .short 90 + 93124 05a0 5A04 .short 1114 + 93125 05a2 5A02 .short 602 + 93126 05a4 5A06 .short 1626 + 93127 05a6 5A01 .short 346 + 93128 05a8 5A05 .short 1370 + 93129 05aa 5A03 .short 858 + 93130 05ac 5A07 .short 1882 + 93131 05ae DA00 .short 218 + 93132 05b0 DA04 .short 1242 + 93133 05b2 DA02 .short 730 + 93134 05b4 DA06 .short 1754 + 93135 05b6 DA01 .short 474 + 93136 05b8 DA05 .short 1498 + 93137 05ba DA03 .short 986 + 93138 05bc DA07 .short 2010 + 93139 05be 3A00 .short 58 + 93140 05c0 3A04 .short 1082 + 93141 05c2 3A02 .short 570 + 93142 05c4 3A06 .short 1594 + 93143 05c6 3A01 .short 314 + 93144 05c8 3A05 .short 1338 + 93145 05ca 3A03 .short 826 + 93146 05cc 3A07 .short 1850 + 93147 05ce BA00 .short 186 + 93148 05d0 BA04 .short 1210 + 93149 05d2 BA02 .short 698 + 93150 05d4 BA06 .short 1722 + 93151 05d6 BA01 .short 442 + 93152 05d8 BA05 .short 1466 + 93153 05da BA03 .short 954 + 93154 05dc BA07 .short 1978 + 93155 05de 7A00 .short 122 + 93156 05e0 7A04 .short 1146 + 93157 05e2 7A02 .short 634 + 93158 05e4 7A06 .short 1658 + 93159 05e6 7A01 .short 378 + 93160 05e8 7A05 .short 1402 + 93161 05ea 7A03 .short 890 + ARM GAS /tmp/ccLcDeJO.s page 1634 + + + 93162 05ec 7A07 .short 1914 + 93163 05ee FA00 .short 250 + 93164 05f0 FA04 .short 1274 + 93165 05f2 FA02 .short 762 + 93166 05f4 FA06 .short 1786 + 93167 05f6 FA01 .short 506 + 93168 05f8 FA05 .short 1530 + 93169 05fa FA03 .short 1018 + 93170 05fc FA07 .short 2042 + 93171 05fe 0600 .short 6 + 93172 0600 0604 .short 1030 + 93173 0602 0602 .short 518 + 93174 0604 0606 .short 1542 + 93175 0606 0601 .short 262 + 93176 0608 0605 .short 1286 + 93177 060a 0603 .short 774 + 93178 060c 0607 .short 1798 + 93179 060e 8600 .short 134 + 93180 0610 8604 .short 1158 + 93181 0612 8602 .short 646 + 93182 0614 8606 .short 1670 + 93183 0616 8601 .short 390 + 93184 0618 8605 .short 1414 + 93185 061a 8603 .short 902 + 93186 061c 8607 .short 1926 + 93187 061e 4600 .short 70 + 93188 0620 4604 .short 1094 + 93189 0622 4602 .short 582 + 93190 0624 4606 .short 1606 + 93191 0626 4601 .short 326 + 93192 0628 4605 .short 1350 + 93193 062a 4603 .short 838 + 93194 062c 4607 .short 1862 + 93195 062e C600 .short 198 + 93196 0630 C604 .short 1222 + 93197 0632 C602 .short 710 + 93198 0634 C606 .short 1734 + 93199 0636 C601 .short 454 + 93200 0638 C605 .short 1478 + 93201 063a C603 .short 966 + 93202 063c C607 .short 1990 + 93203 063e 2600 .short 38 + 93204 0640 2604 .short 1062 + 93205 0642 2602 .short 550 + 93206 0644 2606 .short 1574 + 93207 0646 2601 .short 294 + 93208 0648 2605 .short 1318 + 93209 064a 2603 .short 806 + 93210 064c 2607 .short 1830 + 93211 064e A600 .short 166 + 93212 0650 A604 .short 1190 + 93213 0652 A602 .short 678 + 93214 0654 A606 .short 1702 + 93215 0656 A601 .short 422 + 93216 0658 A605 .short 1446 + 93217 065a A603 .short 934 + 93218 065c A607 .short 1958 + ARM GAS /tmp/ccLcDeJO.s page 1635 + + + 93219 065e 6600 .short 102 + 93220 0660 6604 .short 1126 + 93221 0662 6602 .short 614 + 93222 0664 6606 .short 1638 + 93223 0666 6601 .short 358 + 93224 0668 6605 .short 1382 + 93225 066a 6603 .short 870 + 93226 066c 6607 .short 1894 + 93227 066e E600 .short 230 + 93228 0670 E604 .short 1254 + 93229 0672 E602 .short 742 + 93230 0674 E606 .short 1766 + 93231 0676 E601 .short 486 + 93232 0678 E605 .short 1510 + 93233 067a E603 .short 998 + 93234 067c E607 .short 2022 + 93235 067e 1600 .short 22 + 93236 0680 1604 .short 1046 + 93237 0682 1602 .short 534 + 93238 0684 1606 .short 1558 + 93239 0686 1601 .short 278 + 93240 0688 1605 .short 1302 + 93241 068a 1603 .short 790 + 93242 068c 1607 .short 1814 + 93243 068e 9600 .short 150 + 93244 0690 9604 .short 1174 + 93245 0692 9602 .short 662 + 93246 0694 9606 .short 1686 + 93247 0696 9601 .short 406 + 93248 0698 9605 .short 1430 + 93249 069a 9603 .short 918 + 93250 069c 9607 .short 1942 + 93251 069e 5600 .short 86 + 93252 06a0 5604 .short 1110 + 93253 06a2 5602 .short 598 + 93254 06a4 5606 .short 1622 + 93255 06a6 5601 .short 342 + 93256 06a8 5605 .short 1366 + 93257 06aa 5603 .short 854 + 93258 06ac 5607 .short 1878 + 93259 06ae D600 .short 214 + 93260 06b0 D604 .short 1238 + 93261 06b2 D602 .short 726 + 93262 06b4 D606 .short 1750 + 93263 06b6 D601 .short 470 + 93264 06b8 D605 .short 1494 + 93265 06ba D603 .short 982 + 93266 06bc D607 .short 2006 + 93267 06be 3600 .short 54 + 93268 06c0 3604 .short 1078 + 93269 06c2 3602 .short 566 + 93270 06c4 3606 .short 1590 + 93271 06c6 3601 .short 310 + 93272 06c8 3605 .short 1334 + 93273 06ca 3603 .short 822 + 93274 06cc 3607 .short 1846 + 93275 06ce B600 .short 182 + ARM GAS /tmp/ccLcDeJO.s page 1636 + + + 93276 06d0 B604 .short 1206 + 93277 06d2 B602 .short 694 + 93278 06d4 B606 .short 1718 + 93279 06d6 B601 .short 438 + 93280 06d8 B605 .short 1462 + 93281 06da B603 .short 950 + 93282 06dc B607 .short 1974 + 93283 06de 7600 .short 118 + 93284 06e0 7604 .short 1142 + 93285 06e2 7602 .short 630 + 93286 06e4 7606 .short 1654 + 93287 06e6 7601 .short 374 + 93288 06e8 7605 .short 1398 + 93289 06ea 7603 .short 886 + 93290 06ec 7607 .short 1910 + 93291 06ee F600 .short 246 + 93292 06f0 F604 .short 1270 + 93293 06f2 F602 .short 758 + 93294 06f4 F606 .short 1782 + 93295 06f6 F601 .short 502 + 93296 06f8 F605 .short 1526 + 93297 06fa F603 .short 1014 + 93298 06fc F607 .short 2038 + 93299 06fe 0E00 .short 14 + 93300 0700 0E04 .short 1038 + 93301 0702 0E02 .short 526 + 93302 0704 0E06 .short 1550 + 93303 0706 0E01 .short 270 + 93304 0708 0E05 .short 1294 + 93305 070a 0E03 .short 782 + 93306 070c 0E07 .short 1806 + 93307 070e 8E00 .short 142 + 93308 0710 8E04 .short 1166 + 93309 0712 8E02 .short 654 + 93310 0714 8E06 .short 1678 + 93311 0716 8E01 .short 398 + 93312 0718 8E05 .short 1422 + 93313 071a 8E03 .short 910 + 93314 071c 8E07 .short 1934 + 93315 071e 4E00 .short 78 + 93316 0720 4E04 .short 1102 + 93317 0722 4E02 .short 590 + 93318 0724 4E06 .short 1614 + 93319 0726 4E01 .short 334 + 93320 0728 4E05 .short 1358 + 93321 072a 4E03 .short 846 + 93322 072c 4E07 .short 1870 + 93323 072e CE00 .short 206 + 93324 0730 CE04 .short 1230 + 93325 0732 CE02 .short 718 + 93326 0734 CE06 .short 1742 + 93327 0736 CE01 .short 462 + 93328 0738 CE05 .short 1486 + 93329 073a CE03 .short 974 + 93330 073c CE07 .short 1998 + 93331 073e 2E00 .short 46 + 93332 0740 2E04 .short 1070 + ARM GAS /tmp/ccLcDeJO.s page 1637 + + + 93333 0742 2E02 .short 558 + 93334 0744 2E06 .short 1582 + 93335 0746 2E01 .short 302 + 93336 0748 2E05 .short 1326 + 93337 074a 2E03 .short 814 + 93338 074c 2E07 .short 1838 + 93339 074e AE00 .short 174 + 93340 0750 AE04 .short 1198 + 93341 0752 AE02 .short 686 + 93342 0754 AE06 .short 1710 + 93343 0756 AE01 .short 430 + 93344 0758 AE05 .short 1454 + 93345 075a AE03 .short 942 + 93346 075c AE07 .short 1966 + 93347 075e 6E00 .short 110 + 93348 0760 6E04 .short 1134 + 93349 0762 6E02 .short 622 + 93350 0764 6E06 .short 1646 + 93351 0766 6E01 .short 366 + 93352 0768 6E05 .short 1390 + 93353 076a 6E03 .short 878 + 93354 076c 6E07 .short 1902 + 93355 076e EE00 .short 238 + 93356 0770 EE04 .short 1262 + 93357 0772 EE02 .short 750 + 93358 0774 EE06 .short 1774 + 93359 0776 EE01 .short 494 + 93360 0778 EE05 .short 1518 + 93361 077a EE03 .short 1006 + 93362 077c EE07 .short 2030 + 93363 077e 1E00 .short 30 + 93364 0780 1E04 .short 1054 + 93365 0782 1E02 .short 542 + 93366 0784 1E06 .short 1566 + 93367 0786 1E01 .short 286 + 93368 0788 1E05 .short 1310 + 93369 078a 1E03 .short 798 + 93370 078c 1E07 .short 1822 + 93371 078e 9E00 .short 158 + 93372 0790 9E04 .short 1182 + 93373 0792 9E02 .short 670 + 93374 0794 9E06 .short 1694 + 93375 0796 9E01 .short 414 + 93376 0798 9E05 .short 1438 + 93377 079a 9E03 .short 926 + 93378 079c 9E07 .short 1950 + 93379 079e 5E00 .short 94 + 93380 07a0 5E04 .short 1118 + 93381 07a2 5E02 .short 606 + 93382 07a4 5E06 .short 1630 + 93383 07a6 5E01 .short 350 + 93384 07a8 5E05 .short 1374 + 93385 07aa 5E03 .short 862 + 93386 07ac 5E07 .short 1886 + 93387 07ae DE00 .short 222 + 93388 07b0 DE04 .short 1246 + 93389 07b2 DE02 .short 734 + ARM GAS /tmp/ccLcDeJO.s page 1638 + + + 93390 07b4 DE06 .short 1758 + 93391 07b6 DE01 .short 478 + 93392 07b8 DE05 .short 1502 + 93393 07ba DE03 .short 990 + 93394 07bc DE07 .short 2014 + 93395 07be 3E00 .short 62 + 93396 07c0 3E04 .short 1086 + 93397 07c2 3E02 .short 574 + 93398 07c4 3E06 .short 1598 + 93399 07c6 3E01 .short 318 + 93400 07c8 3E05 .short 1342 + 93401 07ca 3E03 .short 830 + 93402 07cc 3E07 .short 1854 + 93403 07ce BE00 .short 190 + 93404 07d0 BE04 .short 1214 + 93405 07d2 BE02 .short 702 + 93406 07d4 BE06 .short 1726 + 93407 07d6 BE01 .short 446 + 93408 07d8 BE05 .short 1470 + 93409 07da BE03 .short 958 + 93410 07dc BE07 .short 1982 + 93411 07de 7E00 .short 126 + 93412 07e0 7E04 .short 1150 + 93413 07e2 7E02 .short 638 + 93414 07e4 7E06 .short 1662 + 93415 07e6 7E01 .short 382 + 93416 07e8 7E05 .short 1406 + 93417 07ea 7E03 .short 894 + 93418 07ec 7E07 .short 1918 + 93419 07ee FE00 .short 254 + 93420 07f0 FE04 .short 1278 + 93421 07f2 FE02 .short 766 + 93422 07f4 FE06 .short 1790 + 93423 07f6 FE01 .short 510 + 93424 07f8 FE05 .short 1534 + 93425 07fa FE03 .short 1022 + 93426 07fc FE07 .short 2046 + 93427 07fe 0100 .short 1 + 93428 .section .rodata.armRecipTableQ15,"a" + 93429 .align 2 + 93432 armRecipTableQ15: + 93433 0000 037F .short 32515 + 93434 0002 137D .short 32019 + 93435 0004 317B .short 31537 + 93436 0006 5E79 .short 31070 + 93437 0008 9877 .short 30616 + 93438 000a E075 .short 30176 + 93439 000c 3474 .short 29748 + 93440 000e 9472 .short 29332 + 93441 0010 FF70 .short 28927 + 93442 0012 766F .short 28534 + 93443 0014 F66D .short 28150 + 93444 0016 826C .short 27778 + 93445 0018 166B .short 27414 + 93446 001a B569 .short 27061 + 93447 001c 5C68 .short 26716 + 93448 001e 0C67 .short 26380 + ARM GAS /tmp/ccLcDeJO.s page 1639 + + + 93449 0020 C465 .short 26052 + 93450 0022 8464 .short 25732 + 93451 0024 4C63 .short 25420 + 93452 0026 1C62 .short 25116 + 93453 0028 F360 .short 24819 + 93454 002a D05F .short 24528 + 93455 002c B55E .short 24245 + 93456 002e A05D .short 23968 + 93457 0030 915C .short 23697 + 93458 0032 885B .short 23432 + 93459 0034 855A .short 23173 + 93460 0036 8859 .short 22920 + 93461 0038 9058 .short 22672 + 93462 003a 9E57 .short 22430 + 93463 003c B056 .short 22192 + 93464 003e C855 .short 21960 + 93465 0040 E454 .short 21732 + 93466 0042 0554 .short 21509 + 93467 0044 2B53 .short 21291 + 93468 0046 5552 .short 21077 + 93469 0048 8351 .short 20867 + 93470 004a B650 .short 20662 + 93471 004c EC4F .short 20460 + 93472 004e 264F .short 20262 + 93473 0050 644E .short 20068 + 93474 0052 A64D .short 19878 + 93475 0054 EC4C .short 19692 + 93476 0056 344C .short 19508 + 93477 0058 814B .short 19329 + 93478 005a D04A .short 19152 + 93479 005c 234A .short 18979 + 93480 005e 7849 .short 18808 + 93481 0060 D148 .short 18641 + 93482 0062 2D48 .short 18477 + 93483 0064 8C47 .short 18316 + 93484 0066 ED46 .short 18157 + 93485 0068 5146 .short 18001 + 93486 006a B845 .short 17848 + 93487 006c 2145 .short 17697 + 93488 006e 8D44 .short 17549 + 93489 0070 FC43 .short 17404 + 93490 0072 6C43 .short 17260 + 93491 0074 DF42 .short 17119 + 93492 0076 5542 .short 16981 + 93493 0078 CC41 .short 16844 + 93494 007a 4641 .short 16710 + 93495 007c C240 .short 16578 + 93496 007e 4040 .short 16448 + 93497 .section .rodata.armRecipTableQ31,"a" + 93498 .align 2 + 93501 armRecipTableQ31: + 93502 0000 3FF0037F .word 2130964543 + 93503 0004 2074137D .word 2098426912 + 93504 0008 39E7317B .word 2066868025 + 93505 000c 949F5E79 .word 2036244372 + 93506 0010 29FD9877 .word 2006514985 + 93507 0014 2869E075 .word 1977641256 + ARM GAS /tmp/ccLcDeJO.s page 1640 + + + 93508 0018 4D553474 .word 1949586765 + 93509 001c 4B3B9472 .word 1922317131 + 93510 0020 409CFF70 .word 1895799872 + 93511 0024 3100766F .word 1870004273 + 93512 0028 93F5F66D .word 1844901267 + 93513 002c E310826C .word 1820463331 + 93514 0030 3AEC166B .word 1796664378 + 93515 0034 F626B569 .word 1773479670 + 93516 0038 5F655C68 .word 1750885727 + 93517 003c 5D500C67 .word 1728860253 + 93518 0040 2D95C465 .word 1707382061 + 93519 0044 19E58464 .word 1686431001 + 93520 0048 3EF54C63 .word 1665987902 + 93521 004c 4F7E1C62 .word 1646034511 + 93522 0050 613CF360 .word 1626553441 + 93523 0054 B3EED05F .word 1607528115 + 93524 0058 8557B55E .word 1588942725 + 93525 005c EB3BA05D .word 1570782187 + 93526 0060 A163915C .word 1553032097 + 93527 0064 E698885B .word 1535678694 + 93528 0068 5AA8855A .word 1518708826 + 93529 006c DF608859 .word 1502109919 + 93530 0070 73939058 .word 1485869939 + 93531 0074 18139E57 .word 1469977368 + 93532 0078 B8B4B056 .word 1454421176 + 93533 007c 0B4FC855 .word 1439190795 + 93534 0080 80BAE454 .word 1424276096 + 93535 0084 24D10554 .word 1409667364 + 93536 0088 8F6E2B53 .word 1395355279 + 93537 008c D06F5552 .word 1381330896 + 93538 0090 5AB38351 .word 1367585626 + 93539 0094 F318B650 .word 1354111219 + 93540 0098 A281EC4F .word 1340899746 + 93541 009c A2CF264F .word 1327943586 + 93542 00a0 4EE6644E .word 1315235406 + 93543 00a4 1DAAA64D .word 1302768157 + 93544 00a8 8B00EC4C .word 1290535051 + 93545 00ac 10D0344C .word 1278529552 + 93546 00b0 1600814B .word 1266745366 + 93547 00b4 EF78D04A .word 1255176431 + 93548 00b8 C423234A .word 1243816900 + 93549 00bc 96EA7849 .word 1232661142 + 93550 00c0 27B8D148 .word 1221703719 + 93551 00c4 FE772D48 .word 1210939390 + 93552 00c8 57168C47 .word 1200363095 + 93553 00cc 1D80ED46 .word 1189969949 + 93554 00d0 E5A25146 .word 1179755237 + 93555 00d4 E26CB845 .word 1169714402 + 93556 00d8 E1CC2145 .word 1159843041 + 93557 00dc 44B28D44 .word 1150136900 + 93558 00e0 FA0CFC43 .word 1140591866 + 93559 00e4 78CD6C43 .word 1131203960 + 93560 00e8 B4E4DF42 .word 1121969332 + 93561 00ec 26445542 .word 1112884262 + 93562 00f0 B6DDCC41 .word 1103945142 + 93563 00f4 C6A34641 .word 1095148486 + 93564 00f8 2389C240 .word 1086490915 + ARM GAS /tmp/ccLcDeJO.s page 1641 + + + 93565 00fc 02814040 .word 1077969154 + 93566 .section .rodata.arm_cfft_sR_f32_len1024,"a" + 93567 .align 2 + 93570 arm_cfft_sR_f32_len1024: + 93571 0000 0004 .short 1024 + 93572 0002 0000 .space 2 + 93573 0004 00000000 .word twiddleCoef_1024 + 93574 0008 00000000 .word armBitRevIndexTable1024 + 93575 000c 0807 .short 1800 + 93576 000e 0000 .space 2 + 93577 .section .rodata.arm_cfft_sR_f32_len128,"a" + 93578 .align 2 + 93581 arm_cfft_sR_f32_len128: + 93582 0000 8000 .short 128 + 93583 0002 0000 .space 2 + 93584 0004 00000000 .word twiddleCoef_128 + 93585 0008 00000000 .word armBitRevIndexTable128 + 93586 000c D000 .short 208 + 93587 000e 0000 .space 2 + 93588 .section .rodata.arm_cfft_sR_f32_len16,"a" + 93589 .align 2 + 93592 arm_cfft_sR_f32_len16: + 93593 0000 1000 .short 16 + 93594 0002 0000 .space 2 + 93595 0004 00000000 .word twiddleCoef_16 + 93596 0008 00000000 .word armBitRevIndexTable16 + 93597 000c 1400 .short 20 + 93598 000e 0000 .space 2 + 93599 .section .rodata.arm_cfft_sR_f32_len2048,"a" + 93600 .align 2 + 93603 arm_cfft_sR_f32_len2048: + 93604 0000 0008 .short 2048 + 93605 0002 0000 .space 2 + 93606 0004 00000000 .word twiddleCoef_2048 + 93607 0008 00000000 .word armBitRevIndexTable2048 + 93608 000c E00E .short 3808 + 93609 000e 0000 .space 2 + 93610 .section .rodata.arm_cfft_sR_f32_len256,"a" + 93611 .align 2 + 93614 arm_cfft_sR_f32_len256: + 93615 0000 0001 .short 256 + 93616 0002 0000 .space 2 + 93617 0004 00000000 .word twiddleCoef_256 + 93618 0008 00000000 .word armBitRevIndexTable256 + 93619 000c B801 .short 440 + 93620 000e 0000 .space 2 + 93621 .section .rodata.arm_cfft_sR_f32_len32,"a" + 93622 .align 2 + 93625 arm_cfft_sR_f32_len32: + 93626 0000 2000 .short 32 + 93627 0002 0000 .space 2 + 93628 0004 00000000 .word twiddleCoef_32 + 93629 0008 00000000 .word armBitRevIndexTable32 + 93630 000c 3000 .short 48 + 93631 000e 0000 .space 2 + 93632 .section .rodata.arm_cfft_sR_f32_len4096,"a" + 93633 .align 2 + ARM GAS /tmp/ccLcDeJO.s page 1642 + + + 93636 arm_cfft_sR_f32_len4096: + 93637 0000 0010 .short 4096 + 93638 0002 0000 .space 2 + 93639 0004 00000000 .word twiddleCoef_4096 + 93640 0008 00000000 .word armBitRevIndexTable4096 + 93641 000c C00F .short 4032 + 93642 000e 0000 .space 2 + 93643 .section .rodata.arm_cfft_sR_f32_len512,"a" + 93644 .align 2 + 93647 arm_cfft_sR_f32_len512: + 93648 0000 0002 .short 512 + 93649 0002 0000 .space 2 + 93650 0004 00000000 .word twiddleCoef_512 + 93651 0008 00000000 .word armBitRevIndexTable512 + 93652 000c C001 .short 448 + 93653 000e 0000 .space 2 + 93654 .section .rodata.arm_cfft_sR_f32_len64,"a" + 93655 .align 2 + 93658 arm_cfft_sR_f32_len64: + 93659 0000 4000 .short 64 + 93660 0002 0000 .space 2 + 93661 0004 00000000 .word twiddleCoef_64 + 93662 0008 00000000 .word armBitRevIndexTable64 + 93663 000c 3800 .short 56 + 93664 000e 0000 .space 2 + 93665 .section .rodata.arm_cfft_sR_f64_len1024,"a" + 93666 .align 2 + 93669 arm_cfft_sR_f64_len1024: + 93670 0000 0004 .short 1024 + 93671 0002 0000 .space 2 + 93672 0004 00000000 .word twiddleCoefF64_1024 + 93673 0008 00000000 .word armBitRevIndexTableF64_1024 + 93674 000c E003 .short 992 + 93675 000e 0000 .space 2 + 93676 .section .rodata.arm_cfft_sR_f64_len128,"a" + 93677 .align 2 + 93680 arm_cfft_sR_f64_len128: + 93681 0000 8000 .short 128 + 93682 0002 0000 .space 2 + 93683 0004 00000000 .word twiddleCoefF64_128 + 93684 0008 00000000 .word armBitRevIndexTableF64_128 + 93685 000c 7000 .short 112 + 93686 000e 0000 .space 2 + 93687 .section .rodata.arm_cfft_sR_f64_len16,"a" + 93688 .align 2 + 93691 arm_cfft_sR_f64_len16: + 93692 0000 1000 .short 16 + 93693 0002 0000 .space 2 + 93694 0004 00000000 .word twiddleCoefF64_16 + 93695 0008 00000000 .word armBitRevIndexTableF64_16 + 93696 000c 0C00 .short 12 + 93697 000e 0000 .space 2 + 93698 .section .rodata.arm_cfft_sR_f64_len2048,"a" + 93699 .align 2 + 93702 arm_cfft_sR_f64_len2048: + 93703 0000 0008 .short 2048 + 93704 0002 0000 .space 2 + ARM GAS /tmp/ccLcDeJO.s page 1643 + + + 93705 0004 00000000 .word twiddleCoefF64_2048 + 93706 0008 00000000 .word armBitRevIndexTableF64_2048 + 93707 000c C007 .short 1984 + 93708 000e 0000 .space 2 + 93709 .section .rodata.arm_cfft_sR_f64_len256,"a" + 93710 .align 2 + 93713 arm_cfft_sR_f64_len256: + 93714 0000 0001 .short 256 + 93715 0002 0000 .space 2 + 93716 0004 00000000 .word twiddleCoefF64_256 + 93717 0008 00000000 .word armBitRevIndexTableF64_256 + 93718 000c F000 .short 240 + 93719 000e 0000 .space 2 + 93720 .section .rodata.arm_cfft_sR_f64_len32,"a" + 93721 .align 2 + 93724 arm_cfft_sR_f64_len32: + 93725 0000 2000 .short 32 + 93726 0002 0000 .space 2 + 93727 0004 00000000 .word twiddleCoefF64_32 + 93728 0008 00000000 .word armBitRevIndexTableF64_32 + 93729 000c 1800 .short 24 + 93730 000e 0000 .space 2 + 93731 .section .rodata.arm_cfft_sR_f64_len4096,"a" + 93732 .align 2 + 93735 arm_cfft_sR_f64_len4096: + 93736 0000 0010 .short 4096 + 93737 0002 0000 .space 2 + 93738 0004 00000000 .word twiddleCoefF64_4096 + 93739 0008 00000000 .word armBitRevIndexTableF64_4096 + 93740 000c C00F .short 4032 + 93741 000e 0000 .space 2 + 93742 .section .rodata.arm_cfft_sR_f64_len512,"a" + 93743 .align 2 + 93746 arm_cfft_sR_f64_len512: + 93747 0000 0002 .short 512 + 93748 0002 0000 .space 2 + 93749 0004 00000000 .word twiddleCoefF64_512 + 93750 0008 00000000 .word armBitRevIndexTableF64_512 + 93751 000c E001 .short 480 + 93752 000e 0000 .space 2 + 93753 .section .rodata.arm_cfft_sR_f64_len64,"a" + 93754 .align 2 + 93757 arm_cfft_sR_f64_len64: + 93758 0000 4000 .short 64 + 93759 0002 0000 .space 2 + 93760 0004 00000000 .word twiddleCoefF64_64 + 93761 0008 00000000 .word armBitRevIndexTableF64_64 + 93762 000c 3800 .short 56 + 93763 000e 0000 .space 2 + 93764 .section .rodata.arm_cfft_sR_q15_len1024,"a" + 93765 .align 2 + 93768 arm_cfft_sR_q15_len1024: + 93769 0000 0004 .short 1024 + 93770 0002 0000 .space 2 + 93771 0004 00000000 .word twiddleCoef_1024_q15 + 93772 0008 00000000 .word armBitRevIndexTable_fixed_1024 + 93773 000c E003 .short 992 + ARM GAS /tmp/ccLcDeJO.s page 1644 + + + 93774 000e 0000 .space 2 + 93775 .section .rodata.arm_cfft_sR_q15_len128,"a" + 93776 .align 2 + 93779 arm_cfft_sR_q15_len128: + 93780 0000 8000 .short 128 + 93781 0002 0000 .space 2 + 93782 0004 00000000 .word twiddleCoef_128_q15 + 93783 0008 00000000 .word armBitRevIndexTable_fixed_128 + 93784 000c 7000 .short 112 + 93785 000e 0000 .space 2 + 93786 .section .rodata.arm_cfft_sR_q15_len16,"a" + 93787 .align 2 + 93790 arm_cfft_sR_q15_len16: + 93791 0000 1000 .short 16 + 93792 0002 0000 .space 2 + 93793 0004 00000000 .word twiddleCoef_16_q15 + 93794 0008 00000000 .word armBitRevIndexTable_fixed_16 + 93795 000c 0C00 .short 12 + 93796 000e 0000 .space 2 + 93797 .section .rodata.arm_cfft_sR_q15_len2048,"a" + 93798 .align 2 + 93801 arm_cfft_sR_q15_len2048: + 93802 0000 0008 .short 2048 + 93803 0002 0000 .space 2 + 93804 0004 00000000 .word twiddleCoef_2048_q15 + 93805 0008 00000000 .word armBitRevIndexTable_fixed_2048 + 93806 000c C007 .short 1984 + 93807 000e 0000 .space 2 + 93808 .section .rodata.arm_cfft_sR_q15_len256,"a" + 93809 .align 2 + 93812 arm_cfft_sR_q15_len256: + 93813 0000 0001 .short 256 + 93814 0002 0000 .space 2 + 93815 0004 00000000 .word twiddleCoef_256_q15 + 93816 0008 00000000 .word armBitRevIndexTable_fixed_256 + 93817 000c F000 .short 240 + 93818 000e 0000 .space 2 + 93819 .section .rodata.arm_cfft_sR_q15_len32,"a" + 93820 .align 2 + 93823 arm_cfft_sR_q15_len32: + 93824 0000 2000 .short 32 + 93825 0002 0000 .space 2 + 93826 0004 00000000 .word twiddleCoef_32_q15 + 93827 0008 00000000 .word armBitRevIndexTable_fixed_32 + 93828 000c 1800 .short 24 + 93829 000e 0000 .space 2 + 93830 .section .rodata.arm_cfft_sR_q15_len4096,"a" + 93831 .align 2 + 93834 arm_cfft_sR_q15_len4096: + 93835 0000 0010 .short 4096 + 93836 0002 0000 .space 2 + 93837 0004 00000000 .word twiddleCoef_4096_q15 + 93838 0008 00000000 .word armBitRevIndexTable_fixed_4096 + 93839 000c C00F .short 4032 + 93840 000e 0000 .space 2 + 93841 .section .rodata.arm_cfft_sR_q15_len512,"a" + 93842 .align 2 + ARM GAS /tmp/ccLcDeJO.s page 1645 + + + 93845 arm_cfft_sR_q15_len512: + 93846 0000 0002 .short 512 + 93847 0002 0000 .space 2 + 93848 0004 00000000 .word twiddleCoef_512_q15 + 93849 0008 00000000 .word armBitRevIndexTable_fixed_512 + 93850 000c E001 .short 480 + 93851 000e 0000 .space 2 + 93852 .section .rodata.arm_cfft_sR_q15_len64,"a" + 93853 .align 2 + 93856 arm_cfft_sR_q15_len64: + 93857 0000 4000 .short 64 + 93858 0002 0000 .space 2 + 93859 0004 00000000 .word twiddleCoef_64_q15 + 93860 0008 00000000 .word armBitRevIndexTable_fixed_64 + 93861 000c 3800 .short 56 + 93862 000e 0000 .space 2 + 93863 .section .rodata.arm_cfft_sR_q31_len1024,"a" + 93864 .align 2 + 93867 arm_cfft_sR_q31_len1024: + 93868 0000 0004 .short 1024 + 93869 0002 0000 .space 2 + 93870 0004 00000000 .word twiddleCoef_1024_q31 + 93871 0008 00000000 .word armBitRevIndexTable_fixed_1024 + 93872 000c E003 .short 992 + 93873 000e 0000 .space 2 + 93874 .section .rodata.arm_cfft_sR_q31_len128,"a" + 93875 .align 2 + 93878 arm_cfft_sR_q31_len128: + 93879 0000 8000 .short 128 + 93880 0002 0000 .space 2 + 93881 0004 00000000 .word twiddleCoef_128_q31 + 93882 0008 00000000 .word armBitRevIndexTable_fixed_128 + 93883 000c 7000 .short 112 + 93884 000e 0000 .space 2 + 93885 .section .rodata.arm_cfft_sR_q31_len16,"a" + 93886 .align 2 + 93889 arm_cfft_sR_q31_len16: + 93890 0000 1000 .short 16 + 93891 0002 0000 .space 2 + 93892 0004 00000000 .word twiddleCoef_16_q31 + 93893 0008 00000000 .word armBitRevIndexTable_fixed_16 + 93894 000c 0C00 .short 12 + 93895 000e 0000 .space 2 + 93896 .section .rodata.arm_cfft_sR_q31_len2048,"a" + 93897 .align 2 + 93900 arm_cfft_sR_q31_len2048: + 93901 0000 0008 .short 2048 + 93902 0002 0000 .space 2 + 93903 0004 00000000 .word twiddleCoef_2048_q31 + 93904 0008 00000000 .word armBitRevIndexTable_fixed_2048 + 93905 000c C007 .short 1984 + 93906 000e 0000 .space 2 + 93907 .section .rodata.arm_cfft_sR_q31_len256,"a" + 93908 .align 2 + 93911 arm_cfft_sR_q31_len256: + 93912 0000 0001 .short 256 + 93913 0002 0000 .space 2 + ARM GAS /tmp/ccLcDeJO.s page 1646 + + + 93914 0004 00000000 .word twiddleCoef_256_q31 + 93915 0008 00000000 .word armBitRevIndexTable_fixed_256 + 93916 000c F000 .short 240 + 93917 000e 0000 .space 2 + 93918 .section .rodata.arm_cfft_sR_q31_len32,"a" + 93919 .align 2 + 93922 arm_cfft_sR_q31_len32: + 93923 0000 2000 .short 32 + 93924 0002 0000 .space 2 + 93925 0004 00000000 .word twiddleCoef_32_q31 + 93926 0008 00000000 .word armBitRevIndexTable_fixed_32 + 93927 000c 1800 .short 24 + 93928 000e 0000 .space 2 + 93929 .section .rodata.arm_cfft_sR_q31_len4096,"a" + 93930 .align 2 + 93933 arm_cfft_sR_q31_len4096: + 93934 0000 0010 .short 4096 + 93935 0002 0000 .space 2 + 93936 0004 00000000 .word twiddleCoef_4096_q31 + 93937 0008 00000000 .word armBitRevIndexTable_fixed_4096 + 93938 000c C00F .short 4032 + 93939 000e 0000 .space 2 + 93940 .section .rodata.arm_cfft_sR_q31_len512,"a" + 93941 .align 2 + 93944 arm_cfft_sR_q31_len512: + 93945 0000 0002 .short 512 + 93946 0002 0000 .space 2 + 93947 0004 00000000 .word twiddleCoef_512_q31 + 93948 0008 00000000 .word armBitRevIndexTable_fixed_512 + 93949 000c E001 .short 480 + 93950 000e 0000 .space 2 + 93951 .section .rodata.arm_cfft_sR_q31_len64,"a" + 93952 .align 2 + 93955 arm_cfft_sR_q31_len64: + 93956 0000 4000 .short 64 + 93957 0002 0000 .space 2 + 93958 0004 00000000 .word twiddleCoef_64_q31 + 93959 0008 00000000 .word armBitRevIndexTable_fixed_64 + 93960 000c 3800 .short 56 + 93961 000e 0000 .space 2 + 93962 .section .rodata.arm_rfft_fast_sR_f32_len1024,"a" + 93963 .align 2 + 93966 arm_rfft_fast_sR_f32_len1024: + 93967 0000 0002 .short 512 + 93968 0002 0000 .space 2 + 93969 0004 00000000 .word twiddleCoef_512 + 93970 0008 00000000 .word armBitRevIndexTable512 + 93971 000c C001 .short 448 + 93972 000e 0000 .space 2 + 93973 0010 0004 .short 1024 + 93974 0012 0000 .space 2 + 93975 0014 00000000 .word twiddleCoef_rfft_1024 + 93976 .section .rodata.arm_rfft_fast_sR_f32_len128,"a" + 93977 .align 2 + 93980 arm_rfft_fast_sR_f32_len128: + 93981 0000 4000 .short 64 + 93982 0002 0000 .space 2 + ARM GAS /tmp/ccLcDeJO.s page 1647 + + + 93983 0004 00000000 .word twiddleCoef_64 + 93984 0008 00000000 .word armBitRevIndexTable64 + 93985 000c 3800 .short 56 + 93986 000e 0000 .space 2 + 93987 0010 8000 .short 128 + 93988 0012 0000 .space 2 + 93989 0014 00000000 .word twiddleCoef_rfft_128 + 93990 .section .rodata.arm_rfft_fast_sR_f32_len2048,"a" + 93991 .align 2 + 93994 arm_rfft_fast_sR_f32_len2048: + 93995 0000 0004 .short 1024 + 93996 0002 0000 .space 2 + 93997 0004 00000000 .word twiddleCoef_1024 + 93998 0008 00000000 .word armBitRevIndexTable1024 + 93999 000c 0807 .short 1800 + 94000 000e 0000 .space 2 + 94001 0010 0008 .short 2048 + 94002 0012 0000 .space 2 + 94003 0014 00000000 .word twiddleCoef_rfft_2048 + 94004 .section .rodata.arm_rfft_fast_sR_f32_len256,"a" + 94005 .align 2 + 94008 arm_rfft_fast_sR_f32_len256: + 94009 0000 8000 .short 128 + 94010 0002 0000 .space 2 + 94011 0004 00000000 .word twiddleCoef_128 + 94012 0008 00000000 .word armBitRevIndexTable128 + 94013 000c D000 .short 208 + 94014 000e 0000 .space 2 + 94015 0010 0001 .short 256 + 94016 0012 0000 .space 2 + 94017 0014 00000000 .word twiddleCoef_rfft_256 + 94018 .section .rodata.arm_rfft_fast_sR_f32_len32,"a" + 94019 .align 2 + 94022 arm_rfft_fast_sR_f32_len32: + 94023 0000 1000 .short 16 + 94024 0002 0000 .space 2 + 94025 0004 00000000 .word twiddleCoef_16 + 94026 0008 00000000 .word armBitRevIndexTable16 + 94027 000c 1400 .short 20 + 94028 000e 0000 .space 2 + 94029 0010 2000 .short 32 + 94030 0012 0000 .space 2 + 94031 0014 00000000 .word twiddleCoef_rfft_32 + 94032 .section .rodata.arm_rfft_fast_sR_f32_len4096,"a" + 94033 .align 2 + 94036 arm_rfft_fast_sR_f32_len4096: + 94037 0000 0008 .short 2048 + 94038 0002 0000 .space 2 + 94039 0004 00000000 .word twiddleCoef_2048 + 94040 0008 00000000 .word armBitRevIndexTable2048 + 94041 000c E00E .short 3808 + 94042 000e 0000 .space 2 + 94043 0010 0010 .short 4096 + 94044 0012 0000 .space 2 + 94045 0014 00000000 .word twiddleCoef_rfft_4096 + 94046 .section .rodata.arm_rfft_fast_sR_f32_len512,"a" + 94047 .align 2 + ARM GAS /tmp/ccLcDeJO.s page 1648 + + + 94050 arm_rfft_fast_sR_f32_len512: + 94051 0000 0001 .short 256 + 94052 0002 0000 .space 2 + 94053 0004 00000000 .word twiddleCoef_256 + 94054 0008 00000000 .word armBitRevIndexTable256 + 94055 000c B801 .short 440 + 94056 000e 0000 .space 2 + 94057 0010 0002 .short 512 + 94058 0012 0000 .space 2 + 94059 0014 00000000 .word twiddleCoef_rfft_512 + 94060 .section .rodata.arm_rfft_fast_sR_f32_len64,"a" + 94061 .align 2 + 94064 arm_rfft_fast_sR_f32_len64: + 94065 0000 2000 .short 32 + 94066 0002 0000 .space 2 + 94067 0004 00000000 .word twiddleCoef_32 + 94068 0008 00000000 .word armBitRevIndexTable32 + 94069 000c 3000 .short 48 + 94070 000e 0000 .space 2 + 94071 0010 4000 .short 64 + 94072 0012 0000 .space 2 + 94073 0014 00000000 .word twiddleCoef_rfft_64 + 94074 .section .rodata.arm_rfft_fast_sR_f64_len1024,"a" + 94075 .align 2 + 94078 arm_rfft_fast_sR_f64_len1024: + 94079 0000 0002 .short 512 + 94080 0002 0000 .space 2 + 94081 0004 00000000 .word twiddleCoefF64_512 + 94082 0008 00000000 .word armBitRevIndexTableF64_512 + 94083 000c E001 .short 480 + 94084 000e 0000 .space 2 + 94085 0010 0004 .short 1024 + 94086 0012 0000 .space 2 + 94087 0014 00000000 .word twiddleCoefF64_rfft_1024 + 94088 .section .rodata.arm_rfft_fast_sR_f64_len128,"a" + 94089 .align 2 + 94092 arm_rfft_fast_sR_f64_len128: + 94093 0000 4000 .short 64 + 94094 0002 0000 .space 2 + 94095 0004 00000000 .word twiddleCoefF64_64 + 94096 0008 00000000 .word armBitRevIndexTableF64_64 + 94097 000c 3800 .short 56 + 94098 000e 0000 .space 2 + 94099 0010 8000 .short 128 + 94100 0012 0000 .space 2 + 94101 0014 00000000 .word twiddleCoefF64_rfft_128 + 94102 .section .rodata.arm_rfft_fast_sR_f64_len2048,"a" + 94103 .align 2 + 94106 arm_rfft_fast_sR_f64_len2048: + 94107 0000 0004 .short 1024 + 94108 0002 0000 .space 2 + 94109 0004 00000000 .word twiddleCoefF64_1024 + 94110 0008 00000000 .word armBitRevIndexTableF64_1024 + 94111 000c E003 .short 992 + 94112 000e 0000 .space 2 + 94113 0010 0008 .short 2048 + 94114 0012 0000 .space 2 + ARM GAS /tmp/ccLcDeJO.s page 1649 + + + 94115 0014 00000000 .word twiddleCoefF64_rfft_2048 + 94116 .section .rodata.arm_rfft_fast_sR_f64_len256,"a" + 94117 .align 2 + 94120 arm_rfft_fast_sR_f64_len256: + 94121 0000 8000 .short 128 + 94122 0002 0000 .space 2 + 94123 0004 00000000 .word twiddleCoefF64_128 + 94124 0008 00000000 .word armBitRevIndexTableF64_128 + 94125 000c 7000 .short 112 + 94126 000e 0000 .space 2 + 94127 0010 0001 .short 256 + 94128 0012 0000 .space 2 + 94129 0014 00000000 .word twiddleCoefF64_rfft_256 + 94130 .section .rodata.arm_rfft_fast_sR_f64_len32,"a" + 94131 .align 2 + 94134 arm_rfft_fast_sR_f64_len32: + 94135 0000 1000 .short 16 + 94136 0002 0000 .space 2 + 94137 0004 00000000 .word twiddleCoefF64_16 + 94138 0008 00000000 .word armBitRevIndexTableF64_16 + 94139 000c 0C00 .short 12 + 94140 000e 0000 .space 2 + 94141 0010 2000 .short 32 + 94142 0012 0000 .space 2 + 94143 0014 00000000 .word twiddleCoefF64_rfft_32 + 94144 .section .rodata.arm_rfft_fast_sR_f64_len4096,"a" + 94145 .align 2 + 94148 arm_rfft_fast_sR_f64_len4096: + 94149 0000 0008 .short 2048 + 94150 0002 0000 .space 2 + 94151 0004 00000000 .word twiddleCoefF64_2048 + 94152 0008 00000000 .word armBitRevIndexTableF64_2048 + 94153 000c C007 .short 1984 + 94154 000e 0000 .space 2 + 94155 0010 0010 .short 4096 + 94156 0012 0000 .space 2 + 94157 0014 00000000 .word twiddleCoefF64_rfft_4096 + 94158 .section .rodata.arm_rfft_fast_sR_f64_len512,"a" + 94159 .align 2 + 94162 arm_rfft_fast_sR_f64_len512: + 94163 0000 0001 .short 256 + 94164 0002 0000 .space 2 + 94165 0004 00000000 .word twiddleCoefF64_256 + 94166 0008 00000000 .word armBitRevIndexTableF64_256 + 94167 000c F000 .short 240 + 94168 000e 0000 .space 2 + 94169 0010 0002 .short 512 + 94170 0012 0000 .space 2 + 94171 0014 00000000 .word twiddleCoefF64_rfft_512 + 94172 .section .rodata.arm_rfft_fast_sR_f64_len64,"a" + 94173 .align 2 + 94176 arm_rfft_fast_sR_f64_len64: + 94177 0000 2000 .short 32 + 94178 0002 0000 .space 2 + 94179 0004 00000000 .word twiddleCoefF64_32 + 94180 0008 00000000 .word armBitRevIndexTableF64_32 + 94181 000c 1800 .short 24 + ARM GAS /tmp/ccLcDeJO.s page 1650 + + + 94182 000e 0000 .space 2 + 94183 0010 4000 .short 64 + 94184 0012 0000 .space 2 + 94185 0014 00000000 .word twiddleCoefF64_rfft_64 + 94186 .section .rodata.arm_rfft_sR_q15_len1024,"a" + 94187 .align 2 + 94190 arm_rfft_sR_q15_len1024: + 94191 0000 00040000 .word 1024 + 94192 0004 00 .byte 0 + 94193 0005 01 .byte 1 + 94194 0006 0000 .space 2 + 94195 0008 08000000 .word 8 + 94196 000c 00000000 .word realCoefAQ15 + 94197 0010 00000000 .word realCoefBQ15 + 94198 0014 00000000 .word arm_cfft_sR_q15_len512 + 94199 .section .rodata.arm_rfft_sR_q15_len128,"a" + 94200 .align 2 + 94203 arm_rfft_sR_q15_len128: + 94204 0000 80000000 .word 128 + 94205 0004 00 .byte 0 + 94206 0005 01 .byte 1 + 94207 0006 0000 .space 2 + 94208 0008 40000000 .word 64 + 94209 000c 00000000 .word realCoefAQ15 + 94210 0010 00000000 .word realCoefBQ15 + 94211 0014 00000000 .word arm_cfft_sR_q15_len64 + 94212 .section .rodata.arm_rfft_sR_q15_len2048,"a" + 94213 .align 2 + 94216 arm_rfft_sR_q15_len2048: + 94217 0000 00080000 .word 2048 + 94218 0004 00 .byte 0 + 94219 0005 01 .byte 1 + 94220 0006 0000 .space 2 + 94221 0008 04000000 .word 4 + 94222 000c 00000000 .word realCoefAQ15 + 94223 0010 00000000 .word realCoefBQ15 + 94224 0014 00000000 .word arm_cfft_sR_q15_len1024 + 94225 .section .rodata.arm_rfft_sR_q15_len256,"a" + 94226 .align 2 + 94229 arm_rfft_sR_q15_len256: + 94230 0000 00010000 .word 256 + 94231 0004 00 .byte 0 + 94232 0005 01 .byte 1 + 94233 0006 0000 .space 2 + 94234 0008 20000000 .word 32 + 94235 000c 00000000 .word realCoefAQ15 + 94236 0010 00000000 .word realCoefBQ15 + 94237 0014 00000000 .word arm_cfft_sR_q15_len128 + 94238 .section .rodata.arm_rfft_sR_q15_len32,"a" + 94239 .align 2 + 94242 arm_rfft_sR_q15_len32: + 94243 0000 20000000 .word 32 + 94244 0004 00 .byte 0 + 94245 0005 01 .byte 1 + 94246 0006 0000 .space 2 + 94247 0008 00010000 .word 256 + 94248 000c 00000000 .word realCoefAQ15 + ARM GAS /tmp/ccLcDeJO.s page 1651 + + + 94249 0010 00000000 .word realCoefBQ15 + 94250 0014 00000000 .word arm_cfft_sR_q15_len16 + 94251 .section .rodata.arm_rfft_sR_q15_len4096,"a" + 94252 .align 2 + 94255 arm_rfft_sR_q15_len4096: + 94256 0000 00100000 .word 4096 + 94257 0004 00 .byte 0 + 94258 0005 01 .byte 1 + 94259 0006 0000 .space 2 + 94260 0008 02000000 .word 2 + 94261 000c 00000000 .word realCoefAQ15 + 94262 0010 00000000 .word realCoefBQ15 + 94263 0014 00000000 .word arm_cfft_sR_q15_len2048 + 94264 .section .rodata.arm_rfft_sR_q15_len512,"a" + 94265 .align 2 + 94268 arm_rfft_sR_q15_len512: + 94269 0000 00020000 .word 512 + 94270 0004 00 .byte 0 + 94271 0005 01 .byte 1 + 94272 0006 0000 .space 2 + 94273 0008 10000000 .word 16 + 94274 000c 00000000 .word realCoefAQ15 + 94275 0010 00000000 .word realCoefBQ15 + 94276 0014 00000000 .word arm_cfft_sR_q15_len256 + 94277 .section .rodata.arm_rfft_sR_q15_len64,"a" + 94278 .align 2 + 94281 arm_rfft_sR_q15_len64: + 94282 0000 40000000 .word 64 + 94283 0004 00 .byte 0 + 94284 0005 01 .byte 1 + 94285 0006 0000 .space 2 + 94286 0008 80000000 .word 128 + 94287 000c 00000000 .word realCoefAQ15 + 94288 0010 00000000 .word realCoefBQ15 + 94289 0014 00000000 .word arm_cfft_sR_q15_len32 + 94290 .section .rodata.arm_rfft_sR_q15_len8192,"a" + 94291 .align 2 + 94294 arm_rfft_sR_q15_len8192: + 94295 0000 00200000 .word 8192 + 94296 0004 00 .byte 0 + 94297 0005 01 .byte 1 + 94298 0006 0000 .space 2 + 94299 0008 01000000 .word 1 + 94300 000c 00000000 .word realCoefAQ15 + 94301 0010 00000000 .word realCoefBQ15 + 94302 0014 00000000 .word arm_cfft_sR_q15_len4096 + 94303 .section .rodata.arm_rfft_sR_q31_len1024,"a" + 94304 .align 2 + 94307 arm_rfft_sR_q31_len1024: + 94308 0000 00040000 .word 1024 + 94309 0004 00 .byte 0 + 94310 0005 01 .byte 1 + 94311 0006 0000 .space 2 + 94312 0008 08000000 .word 8 + 94313 000c 00000000 .word realCoefAQ31 + 94314 0010 00000000 .word realCoefBQ31 + 94315 0014 00000000 .word arm_cfft_sR_q31_len512 + ARM GAS /tmp/ccLcDeJO.s page 1652 + + + 94316 .section .rodata.arm_rfft_sR_q31_len128,"a" + 94317 .align 2 + 94320 arm_rfft_sR_q31_len128: + 94321 0000 80000000 .word 128 + 94322 0004 00 .byte 0 + 94323 0005 01 .byte 1 + 94324 0006 0000 .space 2 + 94325 0008 40000000 .word 64 + 94326 000c 00000000 .word realCoefAQ31 + 94327 0010 00000000 .word realCoefBQ31 + 94328 0014 00000000 .word arm_cfft_sR_q31_len64 + 94329 .section .rodata.arm_rfft_sR_q31_len2048,"a" + 94330 .align 2 + 94333 arm_rfft_sR_q31_len2048: + 94334 0000 00080000 .word 2048 + 94335 0004 00 .byte 0 + 94336 0005 01 .byte 1 + 94337 0006 0000 .space 2 + 94338 0008 04000000 .word 4 + 94339 000c 00000000 .word realCoefAQ31 + 94340 0010 00000000 .word realCoefBQ31 + 94341 0014 00000000 .word arm_cfft_sR_q31_len1024 + 94342 .section .rodata.arm_rfft_sR_q31_len256,"a" + 94343 .align 2 + 94346 arm_rfft_sR_q31_len256: + 94347 0000 00010000 .word 256 + 94348 0004 00 .byte 0 + 94349 0005 01 .byte 1 + 94350 0006 0000 .space 2 + 94351 0008 20000000 .word 32 + 94352 000c 00000000 .word realCoefAQ31 + 94353 0010 00000000 .word realCoefBQ31 + 94354 0014 00000000 .word arm_cfft_sR_q31_len128 + 94355 .section .rodata.arm_rfft_sR_q31_len32,"a" + 94356 .align 2 + 94359 arm_rfft_sR_q31_len32: + 94360 0000 20000000 .word 32 + 94361 0004 00 .byte 0 + 94362 0005 01 .byte 1 + 94363 0006 0000 .space 2 + 94364 0008 00010000 .word 256 + 94365 000c 00000000 .word realCoefAQ31 + 94366 0010 00000000 .word realCoefBQ31 + 94367 0014 00000000 .word arm_cfft_sR_q31_len16 + 94368 .section .rodata.arm_rfft_sR_q31_len4096,"a" + 94369 .align 2 + 94372 arm_rfft_sR_q31_len4096: + 94373 0000 00100000 .word 4096 + 94374 0004 00 .byte 0 + 94375 0005 01 .byte 1 + 94376 0006 0000 .space 2 + 94377 0008 02000000 .word 2 + 94378 000c 00000000 .word realCoefAQ31 + 94379 0010 00000000 .word realCoefBQ31 + 94380 0014 00000000 .word arm_cfft_sR_q31_len2048 + 94381 .section .rodata.arm_rfft_sR_q31_len512,"a" + 94382 .align 2 + ARM GAS /tmp/ccLcDeJO.s page 1653 + + + 94385 arm_rfft_sR_q31_len512: + 94386 0000 00020000 .word 512 + 94387 0004 00 .byte 0 + 94388 0005 01 .byte 1 + 94389 0006 0000 .space 2 + 94390 0008 10000000 .word 16 + 94391 000c 00000000 .word realCoefAQ31 + 94392 0010 00000000 .word realCoefBQ31 + 94393 0014 00000000 .word arm_cfft_sR_q31_len256 + 94394 .section .rodata.arm_rfft_sR_q31_len64,"a" + 94395 .align 2 + 94398 arm_rfft_sR_q31_len64: + 94399 0000 40000000 .word 64 + 94400 0004 00 .byte 0 + 94401 0005 01 .byte 1 + 94402 0006 0000 .space 2 + 94403 0008 80000000 .word 128 + 94404 000c 00000000 .word realCoefAQ31 + 94405 0010 00000000 .word realCoefBQ31 + 94406 0014 00000000 .word arm_cfft_sR_q31_len32 + 94407 .section .rodata.arm_rfft_sR_q31_len8192,"a" + 94408 .align 2 + 94411 arm_rfft_sR_q31_len8192: + 94412 0000 00200000 .word 8192 + 94413 0004 00 .byte 0 + 94414 0005 01 .byte 1 + 94415 0006 0000 .space 2 + 94416 0008 01000000 .word 1 + 94417 000c 00000000 .word realCoefAQ31 + 94418 0010 00000000 .word realCoefBQ31 + 94419 0014 00000000 .word arm_cfft_sR_q31_len4096 + 94420 .section .rodata.cos_factorsQ15_128,"a" + 94421 .align 2 + 94424 cos_factorsQ15_128: + 94425 0000 FF7F .short 32767 + 94426 0002 FA7F .short 32762 + 94427 0004 F07F .short 32752 + 94428 0006 E17F .short 32737 + 94429 0008 CE7F .short 32718 + 94430 000a B57F .short 32693 + 94431 000c 977F .short 32663 + 94432 000e 757F .short 32629 + 94433 0010 4D7F .short 32589 + 94434 0012 217F .short 32545 + 94435 0014 F07E .short 32496 + 94436 0016 BA7E .short 32442 + 94437 0018 7F7E .short 32383 + 94438 001a 3F7E .short 32319 + 94439 001c FA7D .short 32250 + 94440 001e B07D .short 32176 + 94441 0020 627D .short 32098 + 94442 0022 0F7D .short 32015 + 94443 0024 B77C .short 31927 + 94444 0026 5A7C .short 31834 + 94445 0028 F87B .short 31736 + 94446 002a 927B .short 31634 + 94447 002c 267B .short 31526 + ARM GAS /tmp/ccLcDeJO.s page 1654 + + + 94448 002e B67A .short 31414 + 94449 0030 427A .short 31298 + 94450 0032 C879 .short 31176 + 94451 0034 4A79 .short 31050 + 94452 0036 C778 .short 30919 + 94453 0038 4078 .short 30784 + 94454 003a B477 .short 30644 + 94455 003c 2377 .short 30499 + 94456 003e 8E76 .short 30350 + 94457 0040 F475 .short 30196 + 94458 0042 5575 .short 30037 + 94459 0044 B274 .short 29874 + 94460 0046 0B74 .short 29707 + 94461 0048 5F73 .short 29535 + 94462 004a AF72 .short 29359 + 94463 004c FA71 .short 29178 + 94464 004e 4171 .short 28993 + 94465 0050 8370 .short 28803 + 94466 0052 C16F .short 28609 + 94467 0054 FB6E .short 28411 + 94468 0056 306E .short 28208 + 94469 0058 626D .short 28002 + 94470 005a 8F6C .short 27791 + 94471 005c B86B .short 27576 + 94472 005e DC6A .short 27356 + 94473 0060 FD69 .short 27133 + 94474 0062 1969 .short 26905 + 94475 0064 3268 .short 26674 + 94476 0066 4667 .short 26438 + 94477 0068 5766 .short 26199 + 94478 006a 6365 .short 25955 + 94479 006c 6C64 .short 25708 + 94480 006e 7163 .short 25457 + 94481 0070 7162 .short 25201 + 94482 0072 6F61 .short 24943 + 94483 0074 6860 .short 24680 + 94484 0076 5E5F .short 24414 + 94485 0078 505E .short 24144 + 94486 007a 3E5D .short 23870 + 94487 007c 295C .short 23593 + 94488 007e 105B .short 23312 + 94489 0080 F359 .short 23027 + 94490 0082 D458 .short 22740 + 94491 0084 B057 .short 22448 + 94492 0086 8A56 .short 22154 + 94493 0088 6055 .short 21856 + 94494 008a 3354 .short 21555 + 94495 008c 0253 .short 21250 + 94496 008e CE51 .short 20942 + 94497 0090 9750 .short 20631 + 94498 0092 5E4F .short 20318 + 94499 0094 214E .short 20001 + 94500 0096 E14C .short 19681 + 94501 0098 9E4B .short 19358 + 94502 009a 584A .short 19032 + 94503 009c 0F49 .short 18703 + 94504 009e C347 .short 18371 + ARM GAS /tmp/ccLcDeJO.s page 1655 + + + 94505 00a0 7546 .short 18037 + 94506 00a2 2445 .short 17700 + 94507 00a4 D043 .short 17360 + 94508 00a6 7A42 .short 17018 + 94509 00a8 2141 .short 16673 + 94510 00aa C53F .short 16325 + 94511 00ac 683E .short 15976 + 94512 00ae 073D .short 15623 + 94513 00b0 A53B .short 15269 + 94514 00b2 403A .short 14912 + 94515 00b4 D838 .short 14552 + 94516 00b6 6F37 .short 14191 + 94517 00b8 0436 .short 13828 + 94518 00ba 9634 .short 13462 + 94519 00bc 2633 .short 13094 + 94520 00be B531 .short 12725 + 94521 00c0 4130 .short 12353 + 94522 00c2 CC2E .short 11980 + 94523 00c4 552D .short 11605 + 94524 00c6 DC2B .short 11228 + 94525 00c8 612A .short 10849 + 94526 00ca E528 .short 10469 + 94527 00cc 6727 .short 10087 + 94528 00ce E825 .short 9704 + 94529 00d0 6724 .short 9319 + 94530 00d2 E522 .short 8933 + 94531 00d4 6121 .short 8545 + 94532 00d6 DC1F .short 8156 + 94533 00d8 561E .short 7766 + 94534 00da CF1C .short 7375 + 94535 00dc 471B .short 6983 + 94536 00de BD19 .short 6589 + 94537 00e0 3318 .short 6195 + 94538 00e2 A816 .short 5800 + 94539 00e4 1B15 .short 5403 + 94540 00e6 8E13 .short 5006 + 94541 00e8 0112 .short 4609 + 94542 00ea 7210 .short 4210 + 94543 00ec E30E .short 3811 + 94544 00ee 530D .short 3411 + 94545 00f0 C30B .short 3011 + 94546 00f2 330A .short 2611 + 94547 00f4 A208 .short 2210 + 94548 00f6 1007 .short 1808 + 94549 00f8 7F05 .short 1407 + 94550 00fa ED03 .short 1005 + 94551 00fc 5B02 .short 603 + 94552 00fe C900 .short 201 + 94553 .section .rodata.cos_factorsQ15_2048,"a" + 94554 .align 2 + 94557 cos_factorsQ15_2048: + 94558 0000 FF7F .short 32767 + 94559 0002 FF7F .short 32767 + 94560 0004 FF7F .short 32767 + 94561 0006 FF7F .short 32767 + 94562 0008 FF7F .short 32767 + 94563 000a FF7F .short 32767 + ARM GAS /tmp/ccLcDeJO.s page 1656 + + + 94564 000c FF7F .short 32767 + 94565 000e FF7F .short 32767 + 94566 0010 FF7F .short 32767 + 94567 0012 FF7F .short 32767 + 94568 0014 FE7F .short 32766 + 94569 0016 FE7F .short 32766 + 94570 0018 FE7F .short 32766 + 94571 001a FE7F .short 32766 + 94572 001c FD7F .short 32765 + 94573 001e FD7F .short 32765 + 94574 0020 FD7F .short 32765 + 94575 0022 FD7F .short 32765 + 94576 0024 FC7F .short 32764 + 94577 0026 FC7F .short 32764 + 94578 0028 FB7F .short 32763 + 94579 002a FB7F .short 32763 + 94580 002c FB7F .short 32763 + 94581 002e FA7F .short 32762 + 94582 0030 FA7F .short 32762 + 94583 0032 F97F .short 32761 + 94584 0034 F97F .short 32761 + 94585 0036 F87F .short 32760 + 94586 0038 F87F .short 32760 + 94587 003a F77F .short 32759 + 94588 003c F77F .short 32759 + 94589 003e F67F .short 32758 + 94590 0040 F57F .short 32757 + 94591 0042 F57F .short 32757 + 94592 0044 F47F .short 32756 + 94593 0046 F37F .short 32755 + 94594 0048 F37F .short 32755 + 94595 004a F27F .short 32754 + 94596 004c F17F .short 32753 + 94597 004e F07F .short 32752 + 94598 0050 F07F .short 32752 + 94599 0052 EF7F .short 32751 + 94600 0054 EE7F .short 32750 + 94601 0056 ED7F .short 32749 + 94602 0058 EC7F .short 32748 + 94603 005a EC7F .short 32748 + 94604 005c EB7F .short 32747 + 94605 005e EA7F .short 32746 + 94606 0060 E97F .short 32745 + 94607 0062 E87F .short 32744 + 94608 0064 E77F .short 32743 + 94609 0066 E67F .short 32742 + 94610 0068 E57F .short 32741 + 94611 006a E47F .short 32740 + 94612 006c E37F .short 32739 + 94613 006e E27F .short 32738 + 94614 0070 E17F .short 32737 + 94615 0072 E07F .short 32736 + 94616 0074 DF7F .short 32735 + 94617 0076 DD7F .short 32733 + 94618 0078 DC7F .short 32732 + 94619 007a DB7F .short 32731 + 94620 007c DA7F .short 32730 + ARM GAS /tmp/ccLcDeJO.s page 1657 + + + 94621 007e D97F .short 32729 + 94622 0080 D77F .short 32727 + 94623 0082 D67F .short 32726 + 94624 0084 D57F .short 32725 + 94625 0086 D47F .short 32724 + 94626 0088 D27F .short 32722 + 94627 008a D17F .short 32721 + 94628 008c D07F .short 32720 + 94629 008e CE7F .short 32718 + 94630 0090 CD7F .short 32717 + 94631 0092 CB7F .short 32715 + 94632 0094 CA7F .short 32714 + 94633 0096 C97F .short 32713 + 94634 0098 C77F .short 32711 + 94635 009a C67F .short 32710 + 94636 009c C47F .short 32708 + 94637 009e C37F .short 32707 + 94638 00a0 C17F .short 32705 + 94639 00a2 C07F .short 32704 + 94640 00a4 BE7F .short 32702 + 94641 00a6 BC7F .short 32700 + 94642 00a8 BB7F .short 32699 + 94643 00aa B97F .short 32697 + 94644 00ac B77F .short 32695 + 94645 00ae B67F .short 32694 + 94646 00b0 B47F .short 32692 + 94647 00b2 B27F .short 32690 + 94648 00b4 B17F .short 32689 + 94649 00b6 AF7F .short 32687 + 94650 00b8 AD7F .short 32685 + 94651 00ba AB7F .short 32683 + 94652 00bc A97F .short 32681 + 94653 00be A87F .short 32680 + 94654 00c0 A67F .short 32678 + 94655 00c2 A47F .short 32676 + 94656 00c4 A27F .short 32674 + 94657 00c6 A07F .short 32672 + 94658 00c8 9E7F .short 32670 + 94659 00ca 9C7F .short 32668 + 94660 00cc 9A7F .short 32666 + 94661 00ce 987F .short 32664 + 94662 00d0 967F .short 32662 + 94663 00d2 947F .short 32660 + 94664 00d4 927F .short 32658 + 94665 00d6 907F .short 32656 + 94666 00d8 8E7F .short 32654 + 94667 00da 8C7F .short 32652 + 94668 00dc 8A7F .short 32650 + 94669 00de 887F .short 32648 + 94670 00e0 867F .short 32646 + 94671 00e2 837F .short 32643 + 94672 00e4 817F .short 32641 + 94673 00e6 7F7F .short 32639 + 94674 00e8 7D7F .short 32637 + 94675 00ea 7B7F .short 32635 + 94676 00ec 787F .short 32632 + 94677 00ee 767F .short 32630 + ARM GAS /tmp/ccLcDeJO.s page 1658 + + + 94678 00f0 747F .short 32628 + 94679 00f2 717F .short 32625 + 94680 00f4 6F7F .short 32623 + 94681 00f6 6D7F .short 32621 + 94682 00f8 6A7F .short 32618 + 94683 00fa 687F .short 32616 + 94684 00fc 657F .short 32613 + 94685 00fe 637F .short 32611 + 94686 0100 607F .short 32608 + 94687 0102 5E7F .short 32606 + 94688 0104 5B7F .short 32603 + 94689 0106 597F .short 32601 + 94690 0108 567F .short 32598 + 94691 010a 547F .short 32596 + 94692 010c 517F .short 32593 + 94693 010e 4F7F .short 32591 + 94694 0110 4C7F .short 32588 + 94695 0112 497F .short 32585 + 94696 0114 477F .short 32583 + 94697 0116 447F .short 32580 + 94698 0118 417F .short 32577 + 94699 011a 3F7F .short 32575 + 94700 011c 3C7F .short 32572 + 94701 011e 397F .short 32569 + 94702 0120 367F .short 32566 + 94703 0122 347F .short 32564 + 94704 0124 317F .short 32561 + 94705 0126 2E7F .short 32558 + 94706 0128 2B7F .short 32555 + 94707 012a 287F .short 32552 + 94708 012c 257F .short 32549 + 94709 012e 237F .short 32547 + 94710 0130 207F .short 32544 + 94711 0132 1D7F .short 32541 + 94712 0134 1A7F .short 32538 + 94713 0136 177F .short 32535 + 94714 0138 147F .short 32532 + 94715 013a 117F .short 32529 + 94716 013c 0E7F .short 32526 + 94717 013e 0B7F .short 32523 + 94718 0140 087F .short 32520 + 94719 0142 047F .short 32516 + 94720 0144 017F .short 32513 + 94721 0146 FE7E .short 32510 + 94722 0148 FB7E .short 32507 + 94723 014a F87E .short 32504 + 94724 014c F57E .short 32501 + 94725 014e F17E .short 32497 + 94726 0150 EE7E .short 32494 + 94727 0152 EB7E .short 32491 + 94728 0154 E87E .short 32488 + 94729 0156 E47E .short 32484 + 94730 0158 E17E .short 32481 + 94731 015a DE7E .short 32478 + 94732 015c DA7E .short 32474 + 94733 015e D77E .short 32471 + 94734 0160 D47E .short 32468 + ARM GAS /tmp/ccLcDeJO.s page 1659 + + + 94735 0162 D07E .short 32464 + 94736 0164 CD7E .short 32461 + 94737 0166 C97E .short 32457 + 94738 0168 C67E .short 32454 + 94739 016a C37E .short 32451 + 94740 016c BF7E .short 32447 + 94741 016e BB7E .short 32443 + 94742 0170 B87E .short 32440 + 94743 0172 B47E .short 32436 + 94744 0174 B17E .short 32433 + 94745 0176 AD7E .short 32429 + 94746 0178 AA7E .short 32426 + 94747 017a A67E .short 32422 + 94748 017c A27E .short 32418 + 94749 017e 9F7E .short 32415 + 94750 0180 9B7E .short 32411 + 94751 0182 977E .short 32407 + 94752 0184 947E .short 32404 + 94753 0186 907E .short 32400 + 94754 0188 8C7E .short 32396 + 94755 018a 887E .short 32392 + 94756 018c 847E .short 32388 + 94757 018e 817E .short 32385 + 94758 0190 7D7E .short 32381 + 94759 0192 797E .short 32377 + 94760 0194 757E .short 32373 + 94761 0196 717E .short 32369 + 94762 0198 6D7E .short 32365 + 94763 019a 697E .short 32361 + 94764 019c 657E .short 32357 + 94765 019e 617E .short 32353 + 94766 01a0 5D7E .short 32349 + 94767 01a2 597E .short 32345 + 94768 01a4 557E .short 32341 + 94769 01a6 517E .short 32337 + 94770 01a8 4D7E .short 32333 + 94771 01aa 497E .short 32329 + 94772 01ac 457E .short 32325 + 94773 01ae 417E .short 32321 + 94774 01b0 3D7E .short 32317 + 94775 01b2 397E .short 32313 + 94776 01b4 347E .short 32308 + 94777 01b6 307E .short 32304 + 94778 01b8 2C7E .short 32300 + 94779 01ba 287E .short 32296 + 94780 01bc 247E .short 32292 + 94781 01be 1F7E .short 32287 + 94782 01c0 1B7E .short 32283 + 94783 01c2 177E .short 32279 + 94784 01c4 127E .short 32274 + 94785 01c6 0E7E .short 32270 + 94786 01c8 0A7E .short 32266 + 94787 01ca 057E .short 32261 + 94788 01cc 017E .short 32257 + 94789 01ce FC7D .short 32252 + 94790 01d0 F87D .short 32248 + 94791 01d2 F37D .short 32243 + ARM GAS /tmp/ccLcDeJO.s page 1660 + + + 94792 01d4 EF7D .short 32239 + 94793 01d6 EA7D .short 32234 + 94794 01d8 E67D .short 32230 + 94795 01da E17D .short 32225 + 94796 01dc DD7D .short 32221 + 94797 01de D87D .short 32216 + 94798 01e0 D47D .short 32212 + 94799 01e2 CF7D .short 32207 + 94800 01e4 CA7D .short 32202 + 94801 01e6 C67D .short 32198 + 94802 01e8 C17D .short 32193 + 94803 01ea BC7D .short 32188 + 94804 01ec B87D .short 32184 + 94805 01ee B37D .short 32179 + 94806 01f0 AE7D .short 32174 + 94807 01f2 A97D .short 32169 + 94808 01f4 A57D .short 32165 + 94809 01f6 A07D .short 32160 + 94810 01f8 9B7D .short 32155 + 94811 01fa 967D .short 32150 + 94812 01fc 917D .short 32145 + 94813 01fe 8C7D .short 32140 + 94814 0200 877D .short 32135 + 94815 0202 827D .short 32130 + 94816 0204 7E7D .short 32126 + 94817 0206 797D .short 32121 + 94818 0208 747D .short 32116 + 94819 020a 6F7D .short 32111 + 94820 020c 6A7D .short 32106 + 94821 020e 657D .short 32101 + 94822 0210 607D .short 32096 + 94823 0212 5A7D .short 32090 + 94824 0214 557D .short 32085 + 94825 0216 507D .short 32080 + 94826 0218 4B7D .short 32075 + 94827 021a 467D .short 32070 + 94828 021c 417D .short 32065 + 94829 021e 3C7D .short 32060 + 94830 0220 367D .short 32054 + 94831 0222 317D .short 32049 + 94832 0224 2C7D .short 32044 + 94833 0226 277D .short 32039 + 94834 0228 217D .short 32033 + 94835 022a 1C7D .short 32028 + 94836 022c 177D .short 32023 + 94837 022e 117D .short 32017 + 94838 0230 0C7D .short 32012 + 94839 0232 077D .short 32007 + 94840 0234 017D .short 32001 + 94841 0236 FC7C .short 31996 + 94842 0238 F67C .short 31990 + 94843 023a F17C .short 31985 + 94844 023c EC7C .short 31980 + 94845 023e E67C .short 31974 + 94846 0240 E17C .short 31969 + 94847 0242 DB7C .short 31963 + 94848 0244 D57C .short 31957 + ARM GAS /tmp/ccLcDeJO.s page 1661 + + + 94849 0246 D07C .short 31952 + 94850 0248 CA7C .short 31946 + 94851 024a C57C .short 31941 + 94852 024c BF7C .short 31935 + 94853 024e B97C .short 31929 + 94854 0250 B47C .short 31924 + 94855 0252 AE7C .short 31918 + 94856 0254 A87C .short 31912 + 94857 0256 A37C .short 31907 + 94858 0258 9D7C .short 31901 + 94859 025a 977C .short 31895 + 94860 025c 917C .short 31889 + 94861 025e 8C7C .short 31884 + 94862 0260 867C .short 31878 + 94863 0262 807C .short 31872 + 94864 0264 7A7C .short 31866 + 94865 0266 747C .short 31860 + 94866 0268 6E7C .short 31854 + 94867 026a 697C .short 31849 + 94868 026c 637C .short 31843 + 94869 026e 5D7C .short 31837 + 94870 0270 577C .short 31831 + 94871 0272 517C .short 31825 + 94872 0274 4B7C .short 31819 + 94873 0276 457C .short 31813 + 94874 0278 3F7C .short 31807 + 94875 027a 397C .short 31801 + 94876 027c 337C .short 31795 + 94877 027e 2D7C .short 31789 + 94878 0280 267C .short 31782 + 94879 0282 207C .short 31776 + 94880 0284 1A7C .short 31770 + 94881 0286 147C .short 31764 + 94882 0288 0E7C .short 31758 + 94883 028a 087C .short 31752 + 94884 028c 017C .short 31745 + 94885 028e FB7B .short 31739 + 94886 0290 F57B .short 31733 + 94887 0292 EF7B .short 31727 + 94888 0294 E87B .short 31720 + 94889 0296 E27B .short 31714 + 94890 0298 DC7B .short 31708 + 94891 029a D57B .short 31701 + 94892 029c CF7B .short 31695 + 94893 029e C97B .short 31689 + 94894 02a0 C27B .short 31682 + 94895 02a2 BC7B .short 31676 + 94896 02a4 B57B .short 31669 + 94897 02a6 AF7B .short 31663 + 94898 02a8 A87B .short 31656 + 94899 02aa A27B .short 31650 + 94900 02ac 9B7B .short 31643 + 94901 02ae 957B .short 31637 + 94902 02b0 8E7B .short 31630 + 94903 02b2 887B .short 31624 + 94904 02b4 817B .short 31617 + 94905 02b6 7A7B .short 31610 + ARM GAS /tmp/ccLcDeJO.s page 1662 + + + 94906 02b8 747B .short 31604 + 94907 02ba 6D7B .short 31597 + 94908 02bc 677B .short 31591 + 94909 02be 607B .short 31584 + 94910 02c0 597B .short 31577 + 94911 02c2 527B .short 31570 + 94912 02c4 4C7B .short 31564 + 94913 02c6 457B .short 31557 + 94914 02c8 3E7B .short 31550 + 94915 02ca 377B .short 31543 + 94916 02cc 317B .short 31537 + 94917 02ce 2A7B .short 31530 + 94918 02d0 237B .short 31523 + 94919 02d2 1C7B .short 31516 + 94920 02d4 157B .short 31509 + 94921 02d6 0E7B .short 31502 + 94922 02d8 077B .short 31495 + 94923 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187A .short 31256 + 94956 031c 117A .short 31249 + 94957 031e 097A .short 31241 + 94958 0320 027A .short 31234 + 94959 0322 FA79 .short 31226 + 94960 0324 F279 .short 31218 + 94961 0326 EB79 .short 31211 + 94962 0328 E379 .short 31203 + ARM GAS /tmp/ccLcDeJO.s page 1663 + + + 94963 032a DB79 .short 31195 + 94964 032c D479 .short 31188 + 94965 032e CC79 .short 31180 + 94966 0330 C479 .short 31172 + 94967 0332 BC79 .short 31164 + 94968 0334 B579 .short 31157 + 94969 0336 AD79 .short 31149 + 94970 0338 A579 .short 31141 + 94971 033a 9D79 .short 31133 + 94972 033c 9579 .short 31125 + 94973 033e 8E79 .short 31118 + 94974 0340 8679 .short 31110 + 94975 0342 7E79 .short 31102 + 94976 0344 7679 .short 31094 + 94977 0346 6E79 .short 31086 + 94978 0348 6679 .short 31078 + 94979 034a 5E79 .short 31070 + 94980 034c 5679 .short 31062 + 94981 034e 4E79 .short 31054 + 94982 0350 4679 .short 31046 + 94983 0352 3E79 .short 31038 + 94984 0354 3679 .short 31030 + 94985 0356 2E79 .short 31022 + 94986 0358 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5663 + 96380 0e3c 0716 .short 5639 + 96381 0e3e EE15 .short 5614 + 96382 0e40 D515 .short 5589 + 96383 0e42 BC15 .short 5564 + 96384 0e44 A415 .short 5540 + 96385 0e46 8B15 .short 5515 + 96386 0e48 7215 .short 5490 + 96387 0e4a 5915 .short 5465 + ARM GAS /tmp/ccLcDeJO.s page 1688 + + + 96388 0e4c 4115 .short 5441 + 96389 0e4e 2815 .short 5416 + 96390 0e50 0F15 .short 5391 + 96391 0e52 F614 .short 5366 + 96392 0e54 DD14 .short 5341 + 96393 0e56 C514 .short 5317 + 96394 0e58 AC14 .short 5292 + 96395 0e5a 9314 .short 5267 + 96396 0e5c 7A14 .short 5242 + 96397 0e5e 6114 .short 5217 + 96398 0e60 4914 .short 5193 + 96399 0e62 3014 .short 5168 + 96400 0e64 1714 .short 5143 + 96401 0e66 FE13 .short 5118 + 96402 0e68 E513 .short 5093 + 96403 0e6a CC13 .short 5068 + 96404 0e6c B413 .short 5044 + 96405 0e6e 9B13 .short 5019 + 96406 0e70 8213 .short 4994 + 96407 0e72 6913 .short 4969 + 96408 0e74 5013 .short 4944 + 96409 0e76 3713 .short 4919 + 96410 0e78 1F13 .short 4895 + 96411 0e7a 0613 .short 4870 + 96412 0e7c ED12 .short 4845 + 96413 0e7e D412 .short 4820 + 96414 0e80 BB12 .short 4795 + 96415 0e82 A212 .short 4770 + 96416 0e84 8912 .short 4745 + 96417 0e86 7112 .short 4721 + 96418 0e88 5812 .short 4696 + 96419 0e8a 3F12 .short 4671 + 96420 0e8c 2612 .short 4646 + 96421 0e8e 0D12 .short 4621 + 96422 0e90 F411 .short 4596 + 96423 0e92 DB11 .short 4571 + 96424 0e94 C211 .short 4546 + 96425 0e96 A911 .short 4521 + 96426 0e98 9111 .short 4497 + 96427 0e9a 7811 .short 4472 + 96428 0e9c 5F11 .short 4447 + 96429 0e9e 4611 .short 4422 + 96430 0ea0 2D11 .short 4397 + 96431 0ea2 1411 .short 4372 + 96432 0ea4 FB10 .short 4347 + 96433 0ea6 E210 .short 4322 + 96434 0ea8 C910 .short 4297 + 96435 0eaa B010 .short 4272 + 96436 0eac 9810 .short 4248 + 96437 0eae 7F10 .short 4223 + 96438 0eb0 6610 .short 4198 + 96439 0eb2 4D10 .short 4173 + 96440 0eb4 3410 .short 4148 + 96441 0eb6 1B10 .short 4123 + 96442 0eb8 0210 .short 4098 + 96443 0eba E90F .short 4073 + 96444 0ebc D00F .short 4048 + ARM GAS /tmp/ccLcDeJO.s page 1689 + + + 96445 0ebe B70F .short 4023 + 96446 0ec0 9E0F .short 3998 + 96447 0ec2 850F .short 3973 + 96448 0ec4 6C0F .short 3948 + 96449 0ec6 530F .short 3923 + 96450 0ec8 3A0F .short 3898 + 96451 0eca 210F .short 3873 + 96452 0ecc 080F .short 3848 + 96453 0ece F00E .short 3824 + 96454 0ed0 D70E .short 3799 + 96455 0ed2 BE0E .short 3774 + 96456 0ed4 A50E .short 3749 + 96457 0ed6 8C0E .short 3724 + 96458 0ed8 730E .short 3699 + 96459 0eda 5A0E .short 3674 + 96460 0edc 410E .short 3649 + 96461 0ede 280E .short 3624 + 96462 0ee0 0F0E .short 3599 + 96463 0ee2 F60D .short 3574 + 96464 0ee4 DD0D .short 3549 + 96465 0ee6 C40D .short 3524 + 96466 0ee8 AB0D .short 3499 + 96467 0eea 920D .short 3474 + 96468 0eec 790D .short 3449 + 96469 0eee 600D .short 3424 + 96470 0ef0 470D .short 3399 + 96471 0ef2 2E0D .short 3374 + 96472 0ef4 150D .short 3349 + 96473 0ef6 FC0C .short 3324 + 96474 0ef8 E30C .short 3299 + 96475 0efa CA0C .short 3274 + 96476 0efc B10C .short 3249 + 96477 0efe 980C .short 3224 + 96478 0f00 7F0C .short 3199 + 96479 0f02 660C .short 3174 + 96480 0f04 4D0C .short 3149 + 96481 0f06 340C .short 3124 + 96482 0f08 1B0C .short 3099 + 96483 0f0a 020C .short 3074 + 96484 0f0c E90B .short 3049 + 96485 0f0e D00B .short 3024 + 96486 0f10 B70B .short 2999 + 96487 0f12 9E0B .short 2974 + 96488 0f14 850B .short 2949 + 96489 0f16 6C0B .short 2924 + 96490 0f18 530B .short 2899 + 96491 0f1a 3A0B .short 2874 + 96492 0f1c 200B .short 2848 + 96493 0f1e 070B .short 2823 + 96494 0f20 EE0A .short 2798 + 96495 0f22 D50A .short 2773 + 96496 0f24 BC0A .short 2748 + 96497 0f26 A30A .short 2723 + 96498 0f28 8A0A .short 2698 + 96499 0f2a 710A .short 2673 + 96500 0f2c 580A .short 2648 + 96501 0f2e 3F0A .short 2623 + ARM GAS /tmp/ccLcDeJO.s page 1690 + + + 96502 0f30 260A .short 2598 + 96503 0f32 0D0A .short 2573 + 96504 0f34 F409 .short 2548 + 96505 0f36 DB09 .short 2523 + 96506 0f38 C209 .short 2498 + 96507 0f3a A909 .short 2473 + 96508 0f3c 9009 .short 2448 + 96509 0f3e 7709 .short 2423 + 96510 0f40 5E09 .short 2398 + 96511 0f42 4409 .short 2372 + 96512 0f44 2B09 .short 2347 + 96513 0f46 1209 .short 2322 + 96514 0f48 F908 .short 2297 + 96515 0f4a E008 .short 2272 + 96516 0f4c C708 .short 2247 + 96517 0f4e AE08 .short 2222 + 96518 0f50 9508 .short 2197 + 96519 0f52 7C08 .short 2172 + 96520 0f54 6308 .short 2147 + 96521 0f56 4A08 .short 2122 + 96522 0f58 3108 .short 2097 + 96523 0f5a 1808 .short 2072 + 96524 0f5c FE07 .short 2046 + 96525 0f5e E507 .short 2021 + 96526 0f60 CC07 .short 1996 + 96527 0f62 B307 .short 1971 + 96528 0f64 9A07 .short 1946 + 96529 0f66 8107 .short 1921 + 96530 0f68 6807 .short 1896 + 96531 0f6a 4F07 .short 1871 + 96532 0f6c 3607 .short 1846 + 96533 0f6e 1D07 .short 1821 + 96534 0f70 0407 .short 1796 + 96535 0f72 EA06 .short 1770 + 96536 0f74 D106 .short 1745 + 96537 0f76 B806 .short 1720 + 96538 0f78 9F06 .short 1695 + 96539 0f7a 8606 .short 1670 + 96540 0f7c 6D06 .short 1645 + 96541 0f7e 5406 .short 1620 + 96542 0f80 3B06 .short 1595 + 96543 0f82 2206 .short 1570 + 96544 0f84 0906 .short 1545 + 96545 0f86 EF05 .short 1519 + 96546 0f88 D605 .short 1494 + 96547 0f8a BD05 .short 1469 + 96548 0f8c A405 .short 1444 + 96549 0f8e 8B05 .short 1419 + 96550 0f90 7205 .short 1394 + 96551 0f92 5905 .short 1369 + 96552 0f94 4005 .short 1344 + 96553 0f96 2705 .short 1319 + 96554 0f98 0D05 .short 1293 + 96555 0f9a F404 .short 1268 + 96556 0f9c DB04 .short 1243 + 96557 0f9e C204 .short 1218 + 96558 0fa0 A904 .short 1193 + ARM GAS /tmp/ccLcDeJO.s page 1691 + + + 96559 0fa2 9004 .short 1168 + 96560 0fa4 7704 .short 1143 + 96561 0fa6 5E04 .short 1118 + 96562 0fa8 4504 .short 1093 + 96563 0faa 2B04 .short 1067 + 96564 0fac 1204 .short 1042 + 96565 0fae F903 .short 1017 + 96566 0fb0 E003 .short 992 + 96567 0fb2 C703 .short 967 + 96568 0fb4 AE03 .short 942 + 96569 0fb6 9503 .short 917 + 96570 0fb8 7C03 .short 892 + 96571 0fba 6203 .short 866 + 96572 0fbc 4903 .short 841 + 96573 0fbe 3003 .short 816 + 96574 0fc0 1703 .short 791 + 96575 0fc2 FE02 .short 766 + 96576 0fc4 E502 .short 741 + 96577 0fc6 CC02 .short 716 + 96578 0fc8 B302 .short 691 + 96579 0fca 9902 .short 665 + 96580 0fcc 8002 .short 640 + 96581 0fce 6702 .short 615 + 96582 0fd0 4E02 .short 590 + 96583 0fd2 3502 .short 565 + 96584 0fd4 1C02 .short 540 + 96585 0fd6 0302 .short 515 + 96586 0fd8 EA01 .short 490 + 96587 0fda D001 .short 464 + 96588 0fdc B701 .short 439 + 96589 0fde 9E01 .short 414 + 96590 0fe0 8501 .short 389 + 96591 0fe2 6C01 .short 364 + 96592 0fe4 5301 .short 339 + 96593 0fe6 3A01 .short 314 + 96594 0fe8 2101 .short 289 + 96595 0fea 0701 .short 263 + 96596 0fec EE00 .short 238 + 96597 0fee D500 .short 213 + 96598 0ff0 BC00 .short 188 + 96599 0ff2 A300 .short 163 + 96600 0ff4 8A00 .short 138 + 96601 0ff6 7100 .short 113 + 96602 0ff8 5700 .short 87 + 96603 0ffa 3E00 .short 62 + 96604 0ffc 2500 .short 37 + 96605 0ffe 0C00 .short 12 + 96606 .section .rodata.cos_factorsQ15_512,"a" + 96607 .align 2 + 96610 cos_factorsQ15_512: + 96611 0000 FF7F .short 32767 + 96612 0002 FF7F .short 32767 + 96613 0004 FF7F .short 32767 + 96614 0006 FE7F .short 32766 + 96615 0008 FC7F .short 32764 + 96616 000a FB7F .short 32763 + 96617 000c F97F .short 32761 + ARM GAS /tmp/ccLcDeJO.s page 1692 + + + 96618 000e F77F .short 32759 + 96619 0010 F47F .short 32756 + 96620 0012 F27F .short 32754 + 96621 0014 EE7F .short 32750 + 96622 0016 EB7F .short 32747 + 96623 0018 E77F .short 32743 + 96624 001a E37F .short 32739 + 96625 001c DF7F .short 32735 + 96626 001e DA7F .short 32730 + 96627 0020 D67F .short 32726 + 96628 0022 D07F .short 32720 + 96629 0024 CB7F .short 32715 + 96630 0026 C57F .short 32709 + 96631 0028 BF7F .short 32703 + 96632 002a B87F .short 32696 + 96633 002c B17F .short 32689 + 96634 002e AA7F .short 32682 + 96635 0030 A37F .short 32675 + 96636 0032 9B7F .short 32667 + 96637 0034 937F .short 32659 + 96638 0036 8B7F .short 32651 + 96639 0038 827F .short 32642 + 96640 003a 797F .short 32633 + 96641 003c 707F .short 32624 + 96642 003e 677F .short 32615 + 96643 0040 5D7F .short 32605 + 96644 0042 537F .short 32595 + 96645 0044 487F .short 32584 + 96646 0046 3D7F .short 32573 + 96647 0048 327F .short 32562 + 96648 004a 277F .short 32551 + 96649 004c 1B7F .short 32539 + 96650 004e 0F7F .short 32527 + 96651 0050 037F .short 32515 + 96652 0052 F67E .short 32502 + 96653 0054 E97E .short 32489 + 96654 0056 DC7E .short 32476 + 96655 0058 CF7E .short 32463 + 96656 005a C17E .short 32449 + 96657 005c B37E .short 32435 + 96658 005e A47E .short 32420 + 96659 0060 957E .short 32405 + 96660 0062 867E .short 32390 + 96661 0064 777E .short 32375 + 96662 0066 677E .short 32359 + 96663 0068 577E .short 32343 + 96664 006a 477E .short 32327 + 96665 006c 377E .short 32311 + 96666 006e 267E .short 32294 + 96667 0070 147E .short 32276 + 96668 0072 037E .short 32259 + 96669 0074 F17D .short 32241 + 96670 0076 DF7D .short 32223 + 96671 0078 CD7D .short 32205 + 96672 007a BA7D .short 32186 + 96673 007c A77D .short 32167 + 96674 007e 947D .short 32148 + ARM GAS /tmp/ccLcDeJO.s page 1693 + + + 96675 0080 807D .short 32128 + 96676 0082 6C7D .short 32108 + 96677 0084 587D .short 32088 + 96678 0086 437D .short 32067 + 96679 0088 2F7D .short 32047 + 96680 008a 197D .short 32025 + 96681 008c 047D .short 32004 + 96682 008e EE7C .short 31982 + 96683 0090 D87C .short 31960 + 96684 0092 C27C .short 31938 + 96685 0094 AB7C .short 31915 + 96686 0096 947C .short 31892 + 96687 0098 7D7C .short 31869 + 96688 009a 667C .short 31846 + 96689 009c 4E7C .short 31822 + 96690 009e 367C .short 31798 + 96691 00a0 1D7C .short 31773 + 96692 00a2 057C .short 31749 + 96693 00a4 EB7B .short 31723 + 96694 00a6 D27B .short 31698 + 96695 00a8 B97B .short 31673 + 96696 00aa 9F7B .short 31647 + 96697 00ac 847B .short 31620 + 96698 00ae 6A7B .short 31594 + 96699 00b0 4F7B .short 31567 + 96700 00b2 347B .short 31540 + 96701 00b4 197B .short 31513 + 96702 00b6 FD7A .short 31485 + 96703 00b8 E17A .short 31457 + 96704 00ba C57A .short 31429 + 96705 00bc A87A .short 31400 + 96706 00be 8B7A .short 31371 + 96707 00c0 6E7A .short 31342 + 96708 00c2 507A .short 31312 + 96709 00c4 337A .short 31283 + 96710 00c6 157A .short 31253 + 96711 00c8 F679 .short 31222 + 96712 00ca D879 .short 31192 + 96713 00cc B979 .short 31161 + 96714 00ce 9979 .short 31129 + 96715 00d0 7A79 .short 31098 + 96716 00d2 5A79 .short 31066 + 96717 00d4 3A79 .short 31034 + 96718 00d6 1979 .short 31001 + 96719 00d8 F978 .short 30969 + 96720 00da D878 .short 30936 + 96721 00dc B678 .short 30902 + 96722 00de 9578 .short 30869 + 96723 00e0 7378 .short 30835 + 96724 00e2 5178 .short 30801 + 96725 00e4 2E78 .short 30766 + 96726 00e6 0C78 .short 30732 + 96727 00e8 E977 .short 30697 + 96728 00ea C577 .short 30661 + 96729 00ec A277 .short 30626 + 96730 00ee 7E77 .short 30590 + 96731 00f0 5A77 .short 30554 + ARM GAS /tmp/ccLcDeJO.s page 1694 + + + 96732 00f2 3577 .short 30517 + 96733 00f4 1077 .short 30480 + 96734 00f6 EB76 .short 30443 + 96735 00f8 C676 .short 30406 + 96736 00fa A076 .short 30368 + 96737 00fc 7B76 .short 30331 + 96738 00fe 5476 .short 30292 + 96739 0100 2E76 .short 30254 + 96740 0102 0776 .short 30215 + 96741 0104 E075 .short 30176 + 96742 0106 B975 .short 30137 + 96743 0108 9175 .short 30097 + 96744 010a 6975 .short 30057 + 96745 010c 4175 .short 30017 + 96746 010e 1975 .short 29977 + 96747 0110 F074 .short 29936 + 96748 0112 C774 .short 29895 + 96749 0114 9E74 .short 29854 + 96750 0116 7474 .short 29812 + 96751 0118 4A74 .short 29770 + 96752 011a 2074 .short 29728 + 96753 011c F673 .short 29686 + 96754 011e CB73 .short 29643 + 96755 0120 A073 .short 29600 + 96756 0122 7573 .short 29557 + 96757 0124 4973 .short 29513 + 96758 0126 1D73 .short 29469 + 96759 0128 F172 .short 29425 + 96760 012a C572 .short 29381 + 96761 012c 9872 .short 29336 + 96762 012e 6B72 .short 29291 + 96763 0130 3E72 .short 29246 + 96764 0132 1172 .short 29201 + 96765 0134 E371 .short 29155 + 96766 0136 B571 .short 29109 + 96767 0138 8671 .short 29062 + 96768 013a 5871 .short 29016 + 96769 013c 2971 .short 28969 + 96770 013e FA70 .short 28922 + 96771 0140 CB70 .short 28875 + 96772 0142 9B70 .short 28827 + 96773 0144 6B70 .short 28779 + 96774 0146 3B70 .short 28731 + 96775 0148 0A70 .short 28682 + 96776 014a DA6F .short 28634 + 96777 014c A96F .short 28585 + 96778 014e 776F .short 28535 + 96779 0150 466F .short 28486 + 96780 0152 146F .short 28436 + 96781 0154 E26E .short 28386 + 96782 0156 AF6E .short 28335 + 96783 0158 7D6E .short 28285 + 96784 015a 4A6E .short 28234 + 96785 015c 176E .short 28183 + 96786 015e E36D .short 28131 + 96787 0160 B06D .short 28080 + 96788 0162 7C6D .short 28028 + ARM GAS /tmp/ccLcDeJO.s page 1695 + + + 96789 0164 486D .short 27976 + 96790 0166 136D .short 27923 + 96791 0168 DE6C .short 27870 + 96792 016a A96C .short 27817 + 96793 016c 746C .short 27764 + 96794 016e 3F6C .short 27711 + 96795 0170 096C .short 27657 + 96796 0172 D36B .short 27603 + 96797 0174 9C6B .short 27548 + 96798 0176 666B .short 27494 + 96799 0178 2F6B .short 27439 + 96800 017a F86A .short 27384 + 96801 017c C16A .short 27329 + 96802 017e 896A .short 27273 + 96803 0180 516A .short 27217 + 96804 0182 196A .short 27161 + 96805 0184 E169 .short 27105 + 96806 0186 A869 .short 27048 + 96807 0188 6F69 .short 26991 + 96808 018a 3669 .short 26934 + 96809 018c FD68 .short 26877 + 96810 018e C368 .short 26819 + 96811 0190 8968 .short 26761 + 96812 0192 4F68 .short 26703 + 96813 0194 1568 .short 26645 + 96814 0196 DA67 .short 26586 + 96815 0198 9F67 .short 26527 + 96816 019a 6467 .short 26468 + 96817 019c 2967 .short 26409 + 96818 019e ED66 .short 26349 + 96819 01a0 B166 .short 26289 + 96820 01a2 7566 .short 26229 + 96821 01a4 3966 .short 26169 + 96822 01a6 FC65 .short 26108 + 96823 01a8 BF65 .short 26047 + 96824 01aa 8265 .short 25986 + 96825 01ac 4565 .short 25925 + 96826 01ae 0765 .short 25863 + 96827 01b0 C964 .short 25801 + 96828 01b2 8B64 .short 25739 + 96829 01b4 4D64 .short 25677 + 96830 01b6 0E64 .short 25614 + 96831 01b8 CF63 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.short 32721 + 97405 022a D17F .short 32721 + 97406 022c D17F .short 32721 + 97407 022e D07F .short 32720 + 97408 0230 D07F .short 32720 + 97409 0232 D07F .short 32720 + 97410 0234 CF7F .short 32719 + 97411 0236 CF7F .short 32719 + 97412 0238 CF7F .short 32719 + 97413 023a CE7F .short 32718 + 97414 023c CE7F .short 32718 + 97415 023e CE7F .short 32718 + 97416 0240 CD7F .short 32717 + 97417 0242 CD7F .short 32717 + ARM GAS /tmp/ccLcDeJO.s page 1706 + + + 97418 0244 CD7F .short 32717 + 97419 0246 CC7F .short 32716 + 97420 0248 CC7F .short 32716 + 97421 024a CC7F .short 32716 + 97422 024c CB7F .short 32715 + 97423 024e CB7F .short 32715 + 97424 0250 CB7F .short 32715 + 97425 0252 CA7F .short 32714 + 97426 0254 CA7F .short 32714 + 97427 0256 C97F .short 32713 + 97428 0258 C97F .short 32713 + 97429 025a C97F .short 32713 + 97430 025c C87F .short 32712 + 97431 025e C87F .short 32712 + 97432 0260 C87F .short 32712 + 97433 0262 C77F .short 32711 + 97434 0264 C77F .short 32711 + 97435 0266 C77F .short 32711 + 97436 0268 C67F .short 32710 + 97437 026a C67F .short 32710 + 97438 026c C57F .short 32709 + 97439 026e C57F .short 32709 + 97440 0270 C57F .short 32709 + 97441 0272 C47F .short 32708 + 97442 0274 C47F .short 32708 + 97443 0276 C47F .short 32708 + 97444 0278 C37F .short 32707 + 97445 027a C37F .short 32707 + 97446 027c C27F .short 32706 + 97447 027e C27F .short 32706 + 97448 0280 C27F .short 32706 + 97449 0282 C17F .short 32705 + 97450 0284 C17F .short 32705 + 97451 0286 C07F .short 32704 + 97452 0288 C07F .short 32704 + 97453 028a C07F .short 32704 + 97454 028c BF7F .short 32703 + 97455 028e BF7F .short 32703 + 97456 0290 BF7F .short 32703 + 97457 0292 BE7F .short 32702 + 97458 0294 BE7F .short 32702 + 97459 0296 BD7F .short 32701 + 97460 0298 BD7F .short 32701 + 97461 029a BD7F .short 32701 + 97462 029c BC7F .short 32700 + 97463 029e BC7F .short 32700 + 97464 02a0 BB7F .short 32699 + 97465 02a2 BB7F .short 32699 + 97466 02a4 BB7F .short 32699 + 97467 02a6 BA7F .short 32698 + 97468 02a8 BA7F .short 32698 + 97469 02aa B97F .short 32697 + 97470 02ac B97F .short 32697 + 97471 02ae B87F .short 32696 + 97472 02b0 B87F .short 32696 + 97473 02b2 B87F .short 32696 + 97474 02b4 B77F .short 32695 + ARM GAS /tmp/ccLcDeJO.s page 1707 + + + 97475 02b6 B77F .short 32695 + 97476 02b8 B67F .short 32694 + 97477 02ba B67F .short 32694 + 97478 02bc B67F .short 32694 + 97479 02be B57F .short 32693 + 97480 02c0 B57F .short 32693 + 97481 02c2 B47F .short 32692 + 97482 02c4 B47F .short 32692 + 97483 02c6 B37F .short 32691 + 97484 02c8 B37F .short 32691 + 97485 02ca B37F .short 32691 + 97486 02cc B27F .short 32690 + 97487 02ce B27F .short 32690 + 97488 02d0 B17F .short 32689 + 97489 02d2 B17F .short 32689 + 97490 02d4 B07F .short 32688 + 97491 02d6 B07F .short 32688 + 97492 02d8 AF7F .short 32687 + 97493 02da AF7F .short 32687 + 97494 02dc AF7F .short 32687 + 97495 02de AE7F .short 32686 + 97496 02e0 AE7F .short 32686 + 97497 02e2 AD7F .short 32685 + 97498 02e4 AD7F .short 32685 + 97499 02e6 AC7F .short 32684 + 97500 02e8 AC7F .short 32684 + 97501 02ea AC7F .short 32684 + 97502 02ec AB7F .short 32683 + 97503 02ee AB7F .short 32683 + 97504 02f0 AA7F .short 32682 + 97505 02f2 AA7F .short 32682 + 97506 02f4 A97F .short 32681 + 97507 02f6 A97F .short 32681 + 97508 02f8 A87F .short 32680 + 97509 02fa A87F .short 32680 + 97510 02fc A77F .short 32679 + 97511 02fe A77F .short 32679 + 97512 0300 A67F .short 32678 + 97513 0302 A67F .short 32678 + 97514 0304 A67F .short 32678 + 97515 0306 A57F .short 32677 + 97516 0308 A57F .short 32677 + 97517 030a A47F .short 32676 + 97518 030c A47F .short 32676 + 97519 030e A37F .short 32675 + 97520 0310 A37F .short 32675 + 97521 0312 A27F .short 32674 + 97522 0314 A27F .short 32674 + 97523 0316 A17F .short 32673 + 97524 0318 A17F .short 32673 + 97525 031a A07F .short 32672 + 97526 031c A07F .short 32672 + 97527 031e 9F7F .short 32671 + 97528 0320 9F7F .short 32671 + 97529 0322 9E7F .short 32670 + 97530 0324 9E7F .short 32670 + 97531 0326 9D7F .short 32669 + ARM GAS /tmp/ccLcDeJO.s page 1708 + + + 97532 0328 9D7F .short 32669 + 97533 032a 9C7F .short 32668 + 97534 032c 9C7F .short 32668 + 97535 032e 9C7F .short 32668 + 97536 0330 9B7F .short 32667 + 97537 0332 9B7F .short 32667 + 97538 0334 9A7F .short 32666 + 97539 0336 9A7F .short 32666 + 97540 0338 997F .short 32665 + 97541 033a 997F .short 32665 + 97542 033c 987F .short 32664 + 97543 033e 987F .short 32664 + 97544 0340 977F .short 32663 + 97545 0342 977F .short 32663 + 97546 0344 967F .short 32662 + 97547 0346 967F .short 32662 + 97548 0348 957F .short 32661 + 97549 034a 957F .short 32661 + 97550 034c 947F .short 32660 + 97551 034e 947F .short 32660 + 97552 0350 937F .short 32659 + 97553 0352 927F .short 32658 + 97554 0354 927F .short 32658 + 97555 0356 917F .short 32657 + 97556 0358 917F .short 32657 + 97557 035a 907F .short 32656 + 97558 035c 907F .short 32656 + 97559 035e 8F7F .short 32655 + 97560 0360 8F7F .short 32655 + 97561 0362 8E7F .short 32654 + 97562 0364 8E7F .short 32654 + 97563 0366 8D7F .short 32653 + 97564 0368 8D7F .short 32653 + 97565 036a 8C7F .short 32652 + 97566 036c 8C7F .short 32652 + 97567 036e 8B7F .short 32651 + 97568 0370 8B7F .short 32651 + 97569 0372 8A7F .short 32650 + 97570 0374 8A7F .short 32650 + 97571 0376 897F .short 32649 + 97572 0378 897F .short 32649 + 97573 037a 887F .short 32648 + 97574 037c 877F .short 32647 + 97575 037e 877F .short 32647 + 97576 0380 867F .short 32646 + 97577 0382 867F .short 32646 + 97578 0384 857F .short 32645 + 97579 0386 857F .short 32645 + 97580 0388 847F .short 32644 + 97581 038a 847F .short 32644 + 97582 038c 837F .short 32643 + 97583 038e 837F .short 32643 + 97584 0390 827F .short 32642 + 97585 0392 817F .short 32641 + 97586 0394 817F .short 32641 + 97587 0396 807F .short 32640 + 97588 0398 807F .short 32640 + ARM GAS /tmp/ccLcDeJO.s page 1709 + + + 97589 039a 7F7F .short 32639 + 97590 039c 7F7F .short 32639 + 97591 039e 7E7F .short 32638 + 97592 03a0 7E7F .short 32638 + 97593 03a2 7D7F .short 32637 + 97594 03a4 7C7F .short 32636 + 97595 03a6 7C7F .short 32636 + 97596 03a8 7B7F .short 32635 + 97597 03aa 7B7F .short 32635 + 97598 03ac 7A7F .short 32634 + 97599 03ae 7A7F .short 32634 + 97600 03b0 797F .short 32633 + 97601 03b2 797F .short 32633 + 97602 03b4 787F .short 32632 + 97603 03b6 777F .short 32631 + 97604 03b8 777F .short 32631 + 97605 03ba 767F .short 32630 + 97606 03bc 767F .short 32630 + 97607 03be 757F .short 32629 + 97608 03c0 757F .short 32629 + 97609 03c2 747F .short 32628 + 97610 03c4 737F .short 32627 + 97611 03c6 737F .short 32627 + 97612 03c8 727F .short 32626 + 97613 03ca 727F .short 32626 + 97614 03cc 717F .short 32625 + 97615 03ce 707F .short 32624 + 97616 03d0 707F .short 32624 + 97617 03d2 6F7F .short 32623 + 97618 03d4 6F7F .short 32623 + 97619 03d6 6E7F .short 32622 + 97620 03d8 6D7F .short 32621 + 97621 03da 6D7F .short 32621 + 97622 03dc 6C7F .short 32620 + 97623 03de 6C7F .short 32620 + 97624 03e0 6B7F .short 32619 + 97625 03e2 6B7F .short 32619 + 97626 03e4 6A7F .short 32618 + 97627 03e6 697F .short 32617 + 97628 03e8 697F .short 32617 + 97629 03ea 687F .short 32616 + 97630 03ec 687F .short 32616 + 97631 03ee 677F .short 32615 + 97632 03f0 667F .short 32614 + 97633 03f2 667F .short 32614 + 97634 03f4 657F .short 32613 + 97635 03f6 647F .short 32612 + 97636 03f8 647F .short 32612 + 97637 03fa 637F .short 32611 + 97638 03fc 637F .short 32611 + 97639 03fe 627F .short 32610 + 97640 0400 617F .short 32609 + 97641 0402 617F .short 32609 + 97642 0404 607F .short 32608 + 97643 0406 607F .short 32608 + 97644 0408 5F7F .short 32607 + 97645 040a 5E7F .short 32606 + ARM GAS /tmp/ccLcDeJO.s page 1710 + + + 97646 040c 5E7F .short 32606 + 97647 040e 5D7F .short 32605 + 97648 0410 5C7F .short 32604 + 97649 0412 5C7F .short 32604 + 97650 0414 5B7F .short 32603 + 97651 0416 5B7F .short 32603 + 97652 0418 5A7F .short 32602 + 97653 041a 597F .short 32601 + 97654 041c 597F .short 32601 + 97655 041e 587F .short 32600 + 97656 0420 577F .short 32599 + 97657 0422 577F .short 32599 + 97658 0424 567F .short 32598 + 97659 0426 557F .short 32597 + 97660 0428 557F .short 32597 + 97661 042a 547F .short 32596 + 97662 042c 547F .short 32596 + 97663 042e 537F .short 32595 + 97664 0430 527F .short 32594 + 97665 0432 527F .short 32594 + 97666 0434 517F .short 32593 + 97667 0436 507F .short 32592 + 97668 0438 507F .short 32592 + 97669 043a 4F7F .short 32591 + 97670 043c 4E7F .short 32590 + 97671 043e 4E7F .short 32590 + 97672 0440 4D7F .short 32589 + 97673 0442 4C7F .short 32588 + 97674 0444 4C7F .short 32588 + 97675 0446 4B7F .short 32587 + 97676 0448 4A7F .short 32586 + 97677 044a 4A7F .short 32586 + 97678 044c 497F .short 32585 + 97679 044e 487F .short 32584 + 97680 0450 487F .short 32584 + 97681 0452 477F .short 32583 + 97682 0454 467F .short 32582 + 97683 0456 467F .short 32582 + 97684 0458 457F .short 32581 + 97685 045a 447F .short 32580 + 97686 045c 447F .short 32580 + 97687 045e 437F .short 32579 + 97688 0460 427F .short 32578 + 97689 0462 427F .short 32578 + 97690 0464 417F .short 32577 + 97691 0466 407F .short 32576 + 97692 0468 407F .short 32576 + 97693 046a 3F7F .short 32575 + 97694 046c 3E7F .short 32574 + 97695 046e 3E7F .short 32574 + 97696 0470 3D7F .short 32573 + 97697 0472 3C7F .short 32572 + 97698 0474 3C7F .short 32572 + 97699 0476 3B7F .short 32571 + 97700 0478 3A7F .short 32570 + 97701 047a 3A7F .short 32570 + 97702 047c 397F .short 32569 + ARM GAS /tmp/ccLcDeJO.s page 1711 + + + 97703 047e 387F .short 32568 + 97704 0480 377F .short 32567 + 97705 0482 377F .short 32567 + 97706 0484 367F .short 32566 + 97707 0486 357F .short 32565 + 97708 0488 357F .short 32565 + 97709 048a 347F .short 32564 + 97710 048c 337F .short 32563 + 97711 048e 337F .short 32563 + 97712 0490 327F .short 32562 + 97713 0492 317F .short 32561 + 97714 0494 317F .short 32561 + 97715 0496 307F .short 32560 + 97716 0498 2F7F .short 32559 + 97717 049a 2E7F .short 32558 + 97718 049c 2E7F .short 32558 + 97719 049e 2D7F .short 32557 + 97720 04a0 2C7F .short 32556 + 97721 04a2 2C7F .short 32556 + 97722 04a4 2B7F .short 32555 + 97723 04a6 2A7F .short 32554 + 97724 04a8 297F .short 32553 + 97725 04aa 297F .short 32553 + 97726 04ac 287F .short 32552 + 97727 04ae 277F .short 32551 + 97728 04b0 277F .short 32551 + 97729 04b2 267F .short 32550 + 97730 04b4 257F .short 32549 + 97731 04b6 247F .short 32548 + 97732 04b8 247F .short 32548 + 97733 04ba 237F .short 32547 + 97734 04bc 227F .short 32546 + 97735 04be 217F .short 32545 + 97736 04c0 217F .short 32545 + 97737 04c2 207F .short 32544 + 97738 04c4 1F7F .short 32543 + 97739 04c6 1F7F .short 32543 + 97740 04c8 1E7F .short 32542 + 97741 04ca 1D7F .short 32541 + 97742 04cc 1C7F .short 32540 + 97743 04ce 1C7F .short 32540 + 97744 04d0 1B7F .short 32539 + 97745 04d2 1A7F .short 32538 + 97746 04d4 197F .short 32537 + 97747 04d6 197F .short 32537 + 97748 04d8 187F .short 32536 + 97749 04da 177F .short 32535 + 97750 04dc 167F .short 32534 + 97751 04de 167F .short 32534 + 97752 04e0 157F .short 32533 + 97753 04e2 147F .short 32532 + 97754 04e4 137F .short 32531 + 97755 04e6 137F .short 32531 + 97756 04e8 127F .short 32530 + 97757 04ea 117F .short 32529 + 97758 04ec 107F .short 32528 + 97759 04ee 107F .short 32528 + ARM GAS /tmp/ccLcDeJO.s page 1712 + + + 97760 04f0 0F7F .short 32527 + 97761 04f2 0E7F .short 32526 + 97762 04f4 0D7F .short 32525 + 97763 04f6 0D7F .short 32525 + 97764 04f8 0C7F .short 32524 + 97765 04fa 0B7F .short 32523 + 97766 04fc 0A7F .short 32522 + 97767 04fe 097F .short 32521 + 97768 0500 097F .short 32521 + 97769 0502 087F .short 32520 + 97770 0504 077F .short 32519 + 97771 0506 067F .short 32518 + 97772 0508 067F .short 32518 + 97773 050a 057F .short 32517 + 97774 050c 047F .short 32516 + 97775 050e 037F .short 32515 + 97776 0510 027F .short 32514 + 97777 0512 027F .short 32514 + 97778 0514 017F .short 32513 + 97779 0516 007F .short 32512 + 97780 0518 FF7E .short 32511 + 97781 051a FF7E .short 32511 + 97782 051c FE7E .short 32510 + 97783 051e FD7E .short 32509 + 97784 0520 FC7E .short 32508 + 97785 0522 FB7E .short 32507 + 97786 0524 FB7E .short 32507 + 97787 0526 FA7E .short 32506 + 97788 0528 F97E .short 32505 + 97789 052a F87E .short 32504 + 97790 052c F77E .short 32503 + 97791 052e F77E .short 32503 + 97792 0530 F67E .short 32502 + 97793 0532 F57E .short 32501 + 97794 0534 F47E .short 32500 + 97795 0536 F37E .short 32499 + 97796 0538 F37E .short 32499 + 97797 053a F27E .short 32498 + 97798 053c F17E .short 32497 + 97799 053e F07E .short 32496 + 97800 0540 EF7E .short 32495 + 97801 0542 EF7E .short 32495 + 97802 0544 EE7E .short 32494 + 97803 0546 ED7E .short 32493 + 97804 0548 EC7E .short 32492 + 97805 054a EB7E .short 32491 + 97806 054c EB7E .short 32491 + 97807 054e EA7E .short 32490 + 97808 0550 E97E .short 32489 + 97809 0552 E87E .short 32488 + 97810 0554 E77E .short 32487 + 97811 0556 E67E .short 32486 + 97812 0558 E67E .short 32486 + 97813 055a E57E .short 32485 + 97814 055c E47E .short 32484 + 97815 055e E37E .short 32483 + 97816 0560 E27E .short 32482 + ARM GAS /tmp/ccLcDeJO.s page 1713 + + + 97817 0562 E27E .short 32482 + 97818 0564 E17E .short 32481 + 97819 0566 E07E .short 32480 + 97820 0568 DF7E .short 32479 + 97821 056a DE7E .short 32478 + 97822 056c DD7E .short 32477 + 97823 056e DD7E .short 32477 + 97824 0570 DC7E .short 32476 + 97825 0572 DB7E .short 32475 + 97826 0574 DA7E .short 32474 + 97827 0576 D97E .short 32473 + 97828 0578 D87E .short 32472 + 97829 057a D87E .short 32472 + 97830 057c D77E .short 32471 + 97831 057e D67E .short 32470 + 97832 0580 D57E .short 32469 + 97833 0582 D47E .short 32468 + 97834 0584 D37E .short 32467 + 97835 0586 D27E .short 32466 + 97836 0588 D27E .short 32466 + 97837 058a D17E .short 32465 + 97838 058c D07E .short 32464 + 97839 058e CF7E .short 32463 + 97840 0590 CE7E .short 32462 + 97841 0592 CD7E .short 32461 + 97842 0594 CC7E .short 32460 + 97843 0596 CC7E .short 32460 + 97844 0598 CB7E .short 32459 + 97845 059a CA7E .short 32458 + 97846 059c C97E .short 32457 + 97847 059e C87E .short 32456 + 97848 05a0 C77E .short 32455 + 97849 05a2 C67E .short 32454 + 97850 05a4 C67E .short 32454 + 97851 05a6 C57E .short 32453 + 97852 05a8 C47E .short 32452 + 97853 05aa C37E .short 32451 + 97854 05ac C27E .short 32450 + 97855 05ae C17E .short 32449 + 97856 05b0 C07E .short 32448 + 97857 05b2 BF7E .short 32447 + 97858 05b4 BF7E .short 32447 + 97859 05b6 BE7E .short 32446 + 97860 05b8 BD7E .short 32445 + 97861 05ba BC7E .short 32444 + 97862 05bc BB7E .short 32443 + 97863 05be BA7E .short 32442 + 97864 05c0 B97E .short 32441 + 97865 05c2 B87E .short 32440 + 97866 05c4 B87E .short 32440 + 97867 05c6 B77E .short 32439 + 97868 05c8 B67E .short 32438 + 97869 05ca B57E .short 32437 + 97870 05cc B47E .short 32436 + 97871 05ce B37E .short 32435 + 97872 05d0 B27E .short 32434 + 97873 05d2 B17E .short 32433 + ARM GAS /tmp/ccLcDeJO.s page 1714 + + + 97874 05d4 B07E .short 32432 + 97875 05d6 AF7E .short 32431 + 97876 05d8 AF7E .short 32431 + 97877 05da AE7E .short 32430 + 97878 05dc AD7E .short 32429 + 97879 05de AC7E .short 32428 + 97880 05e0 AB7E .short 32427 + 97881 05e2 AA7E .short 32426 + 97882 05e4 A97E .short 32425 + 97883 05e6 A87E .short 32424 + 97884 05e8 A77E .short 32423 + 97885 05ea A67E .short 32422 + 97886 05ec A67E .short 32422 + 97887 05ee A57E .short 32421 + 97888 05f0 A47E .short 32420 + 97889 05f2 A37E .short 32419 + 97890 05f4 A27E .short 32418 + 97891 05f6 A17E .short 32417 + 97892 05f8 A07E .short 32416 + 97893 05fa 9F7E .short 32415 + 97894 05fc 9E7E .short 32414 + 97895 05fe 9D7E .short 32413 + 97896 0600 9C7E .short 32412 + 97897 0602 9B7E .short 32411 + 97898 0604 9B7E .short 32411 + 97899 0606 9A7E .short 32410 + 97900 0608 997E .short 32409 + 97901 060a 987E .short 32408 + 97902 060c 977E .short 32407 + 97903 060e 967E .short 32406 + 97904 0610 957E .short 32405 + 97905 0612 947E .short 32404 + 97906 0614 937E .short 32403 + 97907 0616 927E .short 32402 + 97908 0618 917E .short 32401 + 97909 061a 907E .short 32400 + 97910 061c 8F7E .short 32399 + 97911 061e 8E7E .short 32398 + 97912 0620 8D7E .short 32397 + 97913 0622 8D7E .short 32397 + 97914 0624 8C7E .short 32396 + 97915 0626 8B7E .short 32395 + 97916 0628 8A7E .short 32394 + 97917 062a 897E .short 32393 + 97918 062c 887E .short 32392 + 97919 062e 877E .short 32391 + 97920 0630 867E .short 32390 + 97921 0632 857E .short 32389 + 97922 0634 847E .short 32388 + 97923 0636 837E .short 32387 + 97924 0638 827E .short 32386 + 97925 063a 817E .short 32385 + 97926 063c 807E .short 32384 + 97927 063e 7F7E .short 32383 + 97928 0640 7E7E .short 32382 + 97929 0642 7D7E .short 32381 + 97930 0644 7C7E .short 32380 + ARM GAS /tmp/ccLcDeJO.s page 1715 + + + 97931 0646 7B7E .short 32379 + 97932 0648 7A7E .short 32378 + 97933 064a 797E .short 32377 + 97934 064c 787E .short 32376 + 97935 064e 777E .short 32375 + 97936 0650 777E .short 32375 + 97937 0652 767E .short 32374 + 97938 0654 757E .short 32373 + 97939 0656 747E .short 32372 + 97940 0658 737E .short 32371 + 97941 065a 727E .short 32370 + 97942 065c 717E .short 32369 + 97943 065e 707E .short 32368 + 97944 0660 6F7E .short 32367 + 97945 0662 6E7E .short 32366 + 97946 0664 6D7E .short 32365 + 97947 0666 6C7E .short 32364 + 97948 0668 6B7E .short 32363 + 97949 066a 6A7E .short 32362 + 97950 066c 697E .short 32361 + 97951 066e 687E .short 32360 + 97952 0670 677E .short 32359 + 97953 0672 667E .short 32358 + 97954 0674 657E .short 32357 + 97955 0676 647E .short 32356 + 97956 0678 637E .short 32355 + 97957 067a 627E .short 32354 + 97958 067c 617E .short 32353 + 97959 067e 607E .short 32352 + 97960 0680 5F7E .short 32351 + 97961 0682 5E7E .short 32350 + 97962 0684 5D7E .short 32349 + 97963 0686 5C7E .short 32348 + 97964 0688 5B7E .short 32347 + 97965 068a 5A7E .short 32346 + 97966 068c 597E .short 32345 + 97967 068e 587E .short 32344 + 97968 0690 577E .short 32343 + 97969 0692 567E .short 32342 + 97970 0694 557E .short 32341 + 97971 0696 547E .short 32340 + 97972 0698 537E .short 32339 + 97973 069a 527E .short 32338 + 97974 069c 517E .short 32337 + 97975 069e 507E .short 32336 + 97976 06a0 4F7E .short 32335 + 97977 06a2 4E7E .short 32334 + 97978 06a4 4D7E .short 32333 + 97979 06a6 4C7E .short 32332 + 97980 06a8 4B7E .short 32331 + 97981 06aa 4A7E .short 32330 + 97982 06ac 497E .short 32329 + 97983 06ae 487E .short 32328 + 97984 06b0 477E .short 32327 + 97985 06b2 467E .short 32326 + 97986 06b4 457E .short 32325 + 97987 06b6 437E .short 32323 + ARM GAS /tmp/ccLcDeJO.s page 1716 + + + 97988 06b8 427E .short 32322 + 97989 06ba 417E .short 32321 + 97990 06bc 407E .short 32320 + 97991 06be 3F7E .short 32319 + 97992 06c0 3E7E .short 32318 + 97993 06c2 3D7E .short 32317 + 97994 06c4 3C7E .short 32316 + 97995 06c6 3B7E .short 32315 + 97996 06c8 3A7E .short 32314 + 97997 06ca 397E .short 32313 + 97998 06cc 387E .short 32312 + 97999 06ce 377E .short 32311 + 98000 06d0 367E .short 32310 + 98001 06d2 357E .short 32309 + 98002 06d4 347E .short 32308 + 98003 06d6 337E .short 32307 + 98004 06d8 327E .short 32306 + 98005 06da 317E .short 32305 + 98006 06dc 307E .short 32304 + 98007 06de 2F7E .short 32303 + 98008 06e0 2E7E .short 32302 + 98009 06e2 2D7E .short 32301 + 98010 06e4 2B7E .short 32299 + 98011 06e6 2A7E .short 32298 + 98012 06e8 297E .short 32297 + 98013 06ea 287E .short 32296 + 98014 06ec 277E .short 32295 + 98015 06ee 267E .short 32294 + 98016 06f0 257E .short 32293 + 98017 06f2 247E .short 32292 + 98018 06f4 237E .short 32291 + 98019 06f6 227E .short 32290 + 98020 06f8 217E .short 32289 + 98021 06fa 207E .short 32288 + 98022 06fc 1F7E .short 32287 + 98023 06fe 1E7E .short 32286 + 98024 0700 1D7E .short 32285 + 98025 0702 1B7E .short 32283 + 98026 0704 1A7E .short 32282 + 98027 0706 197E .short 32281 + 98028 0708 187E .short 32280 + 98029 070a 177E .short 32279 + 98030 070c 167E .short 32278 + 98031 070e 157E .short 32277 + 98032 0710 147E .short 32276 + 98033 0712 137E .short 32275 + 98034 0714 127E .short 32274 + 98035 0716 117E .short 32273 + 98036 0718 107E .short 32272 + 98037 071a 0E7E .short 32270 + 98038 071c 0D7E .short 32269 + 98039 071e 0C7E .short 32268 + 98040 0720 0B7E .short 32267 + 98041 0722 0A7E .short 32266 + 98042 0724 097E .short 32265 + 98043 0726 087E .short 32264 + 98044 0728 077E .short 32263 + ARM GAS /tmp/ccLcDeJO.s page 1717 + + + 98045 072a 067E .short 32262 + 98046 072c 057E .short 32261 + 98047 072e 047E .short 32260 + 98048 0730 027E .short 32258 + 98049 0732 017E .short 32257 + 98050 0734 007E .short 32256 + 98051 0736 FF7D .short 32255 + 98052 0738 FE7D .short 32254 + 98053 073a FD7D .short 32253 + 98054 073c FC7D .short 32252 + 98055 073e FB7D .short 32251 + 98056 0740 FA7D .short 32250 + 98057 0742 F87D .short 32248 + 98058 0744 F77D .short 32247 + 98059 0746 F67D .short 32246 + 98060 0748 F57D .short 32245 + 98061 074a F47D .short 32244 + 98062 074c F37D .short 32243 + 98063 074e F27D .short 32242 + 98064 0750 F17D .short 32241 + 98065 0752 EF7D .short 32239 + 98066 0754 EE7D .short 32238 + 98067 0756 ED7D .short 32237 + 98068 0758 EC7D .short 32236 + 98069 075a EB7D .short 32235 + 98070 075c EA7D .short 32234 + 98071 075e E97D .short 32233 + 98072 0760 E87D .short 32232 + 98073 0762 E67D .short 32230 + 98074 0764 E57D .short 32229 + 98075 0766 E47D .short 32228 + 98076 0768 E37D .short 32227 + 98077 076a E27D .short 32226 + 98078 076c E17D .short 32225 + 98079 076e E07D .short 32224 + 98080 0770 DE7D .short 32222 + 98081 0772 DD7D .short 32221 + 98082 0774 DC7D .short 32220 + 98083 0776 DB7D .short 32219 + 98084 0778 DA7D .short 32218 + 98085 077a D97D .short 32217 + 98086 077c D87D .short 32216 + 98087 077e D67D .short 32214 + 98088 0780 D57D .short 32213 + 98089 0782 D47D .short 32212 + 98090 0784 D37D .short 32211 + 98091 0786 D27D .short 32210 + 98092 0788 D17D .short 32209 + 98093 078a D07D .short 32208 + 98094 078c CE7D .short 32206 + 98095 078e CD7D .short 32205 + 98096 0790 CC7D .short 32204 + 98097 0792 CB7D .short 32203 + 98098 0794 CA7D .short 32202 + 98099 0796 C97D .short 32201 + 98100 0798 C77D .short 32199 + 98101 079a C67D .short 32198 + ARM GAS /tmp/ccLcDeJO.s page 1718 + + + 98102 079c C57D .short 32197 + 98103 079e C47D .short 32196 + 98104 07a0 C37D .short 32195 + 98105 07a2 C27D .short 32194 + 98106 07a4 C07D .short 32192 + 98107 07a6 BF7D .short 32191 + 98108 07a8 BE7D .short 32190 + 98109 07aa BD7D .short 32189 + 98110 07ac BC7D .short 32188 + 98111 07ae BB7D .short 32187 + 98112 07b0 B97D .short 32185 + 98113 07b2 B87D .short 32184 + 98114 07b4 B77D .short 32183 + 98115 07b6 B67D .short 32182 + 98116 07b8 B57D .short 32181 + 98117 07ba B37D .short 32179 + 98118 07bc B27D .short 32178 + 98119 07be B17D .short 32177 + 98120 07c0 B07D .short 32176 + 98121 07c2 AF7D .short 32175 + 98122 07c4 AE7D .short 32174 + 98123 07c6 AC7D .short 32172 + 98124 07c8 AB7D .short 32171 + 98125 07ca AA7D .short 32170 + 98126 07cc A97D .short 32169 + 98127 07ce A87D .short 32168 + 98128 07d0 A67D .short 32166 + 98129 07d2 A57D .short 32165 + 98130 07d4 A47D .short 32164 + 98131 07d6 A37D .short 32163 + 98132 07d8 A27D .short 32162 + 98133 07da A07D .short 32160 + 98134 07dc 9F7D .short 32159 + 98135 07de 9E7D .short 32158 + 98136 07e0 9D7D .short 32157 + 98137 07e2 9C7D .short 32156 + 98138 07e4 9A7D .short 32154 + 98139 07e6 997D .short 32153 + 98140 07e8 987D .short 32152 + 98141 07ea 977D .short 32151 + 98142 07ec 957D .short 32149 + 98143 07ee 947D .short 32148 + 98144 07f0 937D .short 32147 + 98145 07f2 927D .short 32146 + 98146 07f4 917D .short 32145 + 98147 07f6 8F7D .short 32143 + 98148 07f8 8E7D .short 32142 + 98149 07fa 8D7D .short 32141 + 98150 07fc 8C7D .short 32140 + 98151 07fe 8A7D .short 32138 + 98152 0800 897D .short 32137 + 98153 0802 887D .short 32136 + 98154 0804 877D .short 32135 + 98155 0806 867D .short 32134 + 98156 0808 847D .short 32132 + 98157 080a 837D .short 32131 + 98158 080c 827D .short 32130 + ARM GAS /tmp/ccLcDeJO.s page 1719 + + + 98159 080e 817D .short 32129 + 98160 0810 7F7D .short 32127 + 98161 0812 7E7D .short 32126 + 98162 0814 7D7D .short 32125 + 98163 0816 7C7D .short 32124 + 98164 0818 7A7D .short 32122 + 98165 081a 797D .short 32121 + 98166 081c 787D .short 32120 + 98167 081e 777D .short 32119 + 98168 0820 757D .short 32117 + 98169 0822 747D .short 32116 + 98170 0824 737D .short 32115 + 98171 0826 727D .short 32114 + 98172 0828 707D .short 32112 + 98173 082a 6F7D .short 32111 + 98174 082c 6E7D .short 32110 + 98175 082e 6D7D .short 32109 + 98176 0830 6B7D .short 32107 + 98177 0832 6A7D .short 32106 + 98178 0834 697D .short 32105 + 98179 0836 687D .short 32104 + 98180 0838 667D .short 32102 + 98181 083a 657D .short 32101 + 98182 083c 647D .short 32100 + 98183 083e 637D .short 32099 + 98184 0840 617D .short 32097 + 98185 0842 607D .short 32096 + 98186 0844 5F7D .short 32095 + 98187 0846 5E7D .short 32094 + 98188 0848 5C7D .short 32092 + 98189 084a 5B7D .short 32091 + 98190 084c 5A7D .short 32090 + 98191 084e 597D .short 32089 + 98192 0850 577D .short 32087 + 98193 0852 567D .short 32086 + 98194 0854 557D .short 32085 + 98195 0856 537D .short 32083 + 98196 0858 527D .short 32082 + 98197 085a 517D .short 32081 + 98198 085c 507D .short 32080 + 98199 085e 4E7D .short 32078 + 98200 0860 4D7D .short 32077 + 98201 0862 4C7D .short 32076 + 98202 0864 4A7D .short 32074 + 98203 0866 497D .short 32073 + 98204 0868 487D .short 32072 + 98205 086a 477D .short 32071 + 98206 086c 457D .short 32069 + 98207 086e 447D .short 32068 + 98208 0870 437D .short 32067 + 98209 0872 417D .short 32065 + 98210 0874 407D .short 32064 + 98211 0876 3F7D .short 32063 + 98212 0878 3E7D .short 32062 + 98213 087a 3C7D .short 32060 + 98214 087c 3B7D .short 32059 + 98215 087e 3A7D .short 32058 + ARM GAS /tmp/ccLcDeJO.s page 1720 + + + 98216 0880 387D .short 32056 + 98217 0882 377D .short 32055 + 98218 0884 367D .short 32054 + 98219 0886 347D .short 32052 + 98220 0888 337D .short 32051 + 98221 088a 327D .short 32050 + 98222 088c 317D .short 32049 + 98223 088e 2F7D .short 32047 + 98224 0890 2E7D .short 32046 + 98225 0892 2D7D .short 32045 + 98226 0894 2B7D .short 32043 + 98227 0896 2A7D .short 32042 + 98228 0898 297D .short 32041 + 98229 089a 277D .short 32039 + 98230 089c 267D .short 32038 + 98231 089e 257D .short 32037 + 98232 08a0 237D .short 32035 + 98233 08a2 227D .short 32034 + 98234 08a4 217D .short 32033 + 98235 08a6 1F7D .short 32031 + 98236 08a8 1E7D .short 32030 + 98237 08aa 1D7D .short 32029 + 98238 08ac 1B7D .short 32027 + 98239 08ae 1A7D .short 32026 + 98240 08b0 197D .short 32025 + 98241 08b2 177D .short 32023 + 98242 08b4 167D .short 32022 + 98243 08b6 157D .short 32021 + 98244 08b8 137D .short 32019 + 98245 08ba 127D .short 32018 + 98246 08bc 117D .short 32017 + 98247 08be 0F7D .short 32015 + 98248 08c0 0E7D .short 32014 + 98249 08c2 0D7D .short 32013 + 98250 08c4 0B7D .short 32011 + 98251 08c6 0A7D .short 32010 + 98252 08c8 097D .short 32009 + 98253 08ca 077D .short 32007 + 98254 08cc 067D .short 32006 + 98255 08ce 057D .short 32005 + 98256 08d0 037D .short 32003 + 98257 08d2 027D .short 32002 + 98258 08d4 017D .short 32001 + 98259 08d6 FF7C .short 31999 + 98260 08d8 FE7C .short 31998 + 98261 08da FD7C .short 31997 + 98262 08dc FB7C .short 31995 + 98263 08de FA7C .short 31994 + 98264 08e0 F97C .short 31993 + 98265 08e2 F77C .short 31991 + 98266 08e4 F67C .short 31990 + 98267 08e6 F47C .short 31988 + 98268 08e8 F37C .short 31987 + 98269 08ea F27C .short 31986 + 98270 08ec F07C .short 31984 + 98271 08ee EF7C .short 31983 + 98272 08f0 EE7C .short 31982 + ARM GAS /tmp/ccLcDeJO.s page 1721 + + + 98273 08f2 EC7C .short 31980 + 98274 08f4 EB7C .short 31979 + 98275 08f6 E97C .short 31977 + 98276 08f8 E87C .short 31976 + 98277 08fa E77C .short 31975 + 98278 08fc E57C .short 31973 + 98279 08fe E47C .short 31972 + 98280 0900 E37C .short 31971 + 98281 0902 E17C .short 31969 + 98282 0904 E07C .short 31968 + 98283 0906 DE7C .short 31966 + 98284 0908 DD7C .short 31965 + 98285 090a DC7C .short 31964 + 98286 090c DA7C .short 31962 + 98287 090e D97C .short 31961 + 98288 0910 D87C .short 31960 + 98289 0912 D67C .short 31958 + 98290 0914 D57C .short 31957 + 98291 0916 D37C .short 31955 + 98292 0918 D27C .short 31954 + 98293 091a D17C .short 31953 + 98294 091c CF7C .short 31951 + 98295 091e CE7C .short 31950 + 98296 0920 CC7C .short 31948 + 98297 0922 CB7C .short 31947 + 98298 0924 CA7C .short 31946 + 98299 0926 C87C .short 31944 + 98300 0928 C77C .short 31943 + 98301 092a C57C .short 31941 + 98302 092c C47C .short 31940 + 98303 092e C37C .short 31939 + 98304 0930 C17C .short 31937 + 98305 0932 C07C .short 31936 + 98306 0934 BE7C .short 31934 + 98307 0936 BD7C .short 31933 + 98308 0938 BC7C .short 31932 + 98309 093a BA7C .short 31930 + 98310 093c B97C .short 31929 + 98311 093e B77C .short 31927 + 98312 0940 B67C .short 31926 + 98313 0942 B57C .short 31925 + 98314 0944 B37C .short 31923 + 98315 0946 B27C .short 31922 + 98316 0948 B07C .short 31920 + 98317 094a AF7C .short 31919 + 98318 094c AD7C .short 31917 + 98319 094e AC7C .short 31916 + 98320 0950 AB7C .short 31915 + 98321 0952 A97C .short 31913 + 98322 0954 A87C .short 31912 + 98323 0956 A67C .short 31910 + 98324 0958 A57C .short 31909 + 98325 095a A37C .short 31907 + 98326 095c A27C .short 31906 + 98327 095e A17C .short 31905 + 98328 0960 9F7C .short 31903 + 98329 0962 9E7C .short 31902 + ARM GAS /tmp/ccLcDeJO.s page 1722 + + + 98330 0964 9C7C .short 31900 + 98331 0966 9B7C .short 31899 + 98332 0968 997C .short 31897 + 98333 096a 987C .short 31896 + 98334 096c 977C .short 31895 + 98335 096e 957C .short 31893 + 98336 0970 947C .short 31892 + 98337 0972 927C .short 31890 + 98338 0974 917C .short 31889 + 98339 0976 8F7C .short 31887 + 98340 0978 8E7C .short 31886 + 98341 097a 8C7C .short 31884 + 98342 097c 8B7C .short 31883 + 98343 097e 8A7C .short 31882 + 98344 0980 887C .short 31880 + 98345 0982 877C .short 31879 + 98346 0984 857C .short 31877 + 98347 0986 847C .short 31876 + 98348 0988 827C .short 31874 + 98349 098a 817C .short 31873 + 98350 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507C .short 31824 + 98383 09ce 4F7C .short 31823 + 98384 09d0 4D7C .short 31821 + 98385 09d2 4C7C .short 31820 + 98386 09d4 4A7C .short 31818 + ARM GAS /tmp/ccLcDeJO.s page 1723 + + + 98387 09d6 497C .short 31817 + 98388 09d8 477C .short 31815 + 98389 09da 467C .short 31814 + 98390 09dc 447C .short 31812 + 98391 09de 437C .short 31811 + 98392 09e0 417C .short 31809 + 98393 09e2 3F7C .short 31807 + 98394 09e4 3E7C .short 31806 + 98395 09e6 3C7C .short 31804 + 98396 09e8 3B7C .short 31803 + 98397 09ea 397C .short 31801 + 98398 09ec 387C .short 31800 + 98399 09ee 367C .short 31798 + 98400 09f0 357C .short 31797 + 98401 09f2 337C .short 31795 + 98402 09f4 327C .short 31794 + 98403 09f6 307C .short 31792 + 98404 09f8 2F7C .short 31791 + 98405 09fa 2D7C .short 31789 + 98406 09fc 2C7C .short 31788 + 98407 09fe 2A7C .short 31786 + 98408 0a00 297C .short 31785 + 98409 0a02 277C .short 31783 + 98410 0a04 267C .short 31782 + 98411 0a06 247C .short 31780 + 98412 0a08 237C .short 31779 + 98413 0a0a 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F17B .short 31729 + 98445 0a4a EF7B .short 31727 + 98446 0a4c EE7B .short 31726 + 98447 0a4e EC7B .short 31724 + 98448 0a50 EB7B .short 31723 + 98449 0a52 E97B .short 31721 + 98450 0a54 E87B .short 31720 + 98451 0a56 E67B .short 31718 + 98452 0a58 E47B .short 31716 + 98453 0a5a E37B .short 31715 + 98454 0a5c E17B .short 31713 + 98455 0a5e E07B .short 31712 + 98456 0a60 DE7B .short 31710 + 98457 0a62 DC7B .short 31708 + 98458 0a64 DB7B .short 31707 + 98459 0a66 D97B .short 31705 + 98460 0a68 D87B .short 31704 + 98461 0a6a D67B .short 31702 + 98462 0a6c D57B .short 31701 + 98463 0a6e D37B .short 31699 + 98464 0a70 D17B .short 31697 + 98465 0a72 D07B .short 31696 + 98466 0a74 CE7B .short 31694 + 98467 0a76 CD7B .short 31693 + 98468 0a78 CB7B .short 31691 + 98469 0a7a C97B .short 31689 + 98470 0a7c C87B .short 31688 + 98471 0a7e C67B .short 31686 + 98472 0a80 C57B .short 31685 + 98473 0a82 C37B .short 31683 + 98474 0a84 C17B .short 31681 + 98475 0a86 C07B .short 31680 + 98476 0a88 BE7B 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98603 0b86 E97A .short 31465 + 98604 0b88 E77A .short 31463 + 98605 0b8a E57A .short 31461 + 98606 0b8c E37A .short 31459 + 98607 0b8e E27A .short 31458 + 98608 0b90 E07A .short 31456 + 98609 0b92 DE7A .short 31454 + 98610 0b94 DC7A .short 31452 + 98611 0b96 DB7A .short 31451 + 98612 0b98 D97A .short 31449 + 98613 0b9a D77A .short 31447 + 98614 0b9c D57A .short 31445 + ARM GAS /tmp/ccLcDeJO.s page 1727 + + + 98615 0b9e D47A .short 31444 + 98616 0ba0 D27A .short 31442 + 98617 0ba2 D07A .short 31440 + 98618 0ba4 CE7A .short 31438 + 98619 0ba6 CD7A .short 31437 + 98620 0ba8 CB7A .short 31435 + 98621 0baa C97A .short 31433 + 98622 0bac C77A .short 31431 + 98623 0bae C57A .short 31429 + 98624 0bb0 C47A .short 31428 + 98625 0bb2 C27A .short 31426 + 98626 0bb4 C07A .short 31424 + 98627 0bb6 BE7A .short 31422 + 98628 0bb8 BD7A .short 31421 + 98629 0bba BB7A .short 31419 + 98630 0bbc B97A .short 31417 + 98631 0bbe B77A .short 31415 + 98632 0bc0 B57A .short 31413 + 98633 0bc2 B47A .short 31412 + 98634 0bc4 B27A .short 31410 + 98635 0bc6 B07A .short 31408 + 98636 0bc8 AE7A .short 31406 + 98637 0bca AC7A .short 31404 + 98638 0bcc AB7A .short 31403 + 98639 0bce A97A .short 31401 + 98640 0bd0 A77A .short 31399 + 98641 0bd2 A57A .short 31397 + 98642 0bd4 A37A .short 31395 + 98643 0bd6 A27A .short 31394 + 98644 0bd8 A07A .short 31392 + 98645 0bda 9E7A .short 31390 + 98646 0bdc 9C7A .short 31388 + 98647 0bde 9A7A .short 31386 + 98648 0be0 997A .short 31385 + 98649 0be2 977A .short 31383 + 98650 0be4 957A .short 31381 + 98651 0be6 937A .short 31379 + 98652 0be8 917A .short 31377 + 98653 0bea 907A .short 31376 + 98654 0bec 8E7A .short 31374 + 98655 0bee 8C7A .short 31372 + 98656 0bf0 8A7A .short 31370 + 98657 0bf2 887A .short 31368 + 98658 0bf4 877A .short 31367 + 98659 0bf6 857A .short 31365 + 98660 0bf8 837A .short 31363 + 98661 0bfa 817A .short 31361 + 98662 0bfc 7F7A .short 31359 + 98663 0bfe 7D7A .short 31357 + 98664 0c00 7C7A .short 31356 + 98665 0c02 7A7A .short 31354 + 98666 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0c42 3F7A .short 31295 + 98698 0c44 3D7A .short 31293 + 98699 0c46 3B7A .short 31291 + 98700 0c48 397A .short 31289 + 98701 0c4a 377A .short 31287 + 98702 0c4c 357A .short 31285 + 98703 0c4e 347A .short 31284 + 98704 0c50 327A .short 31282 + 98705 0c52 307A .short 31280 + 98706 0c54 2E7A .short 31278 + 98707 0c56 2C7A .short 31276 + 98708 0c58 2A7A .short 31274 + 98709 0c5a 287A .short 31272 + 98710 0c5c 267A .short 31270 + 98711 0c5e 257A .short 31269 + 98712 0c60 237A .short 31267 + 98713 0c62 217A .short 31265 + 98714 0c64 1F7A .short 31263 + 98715 0c66 1D7A .short 31261 + 98716 0c68 1B7A .short 31259 + 98717 0c6a 197A .short 31257 + 98718 0c6c 177A .short 31255 + 98719 0c6e 167A .short 31254 + 98720 0c70 147A .short 31252 + 98721 0c72 127A .short 31250 + 98722 0c74 107A .short 31248 + 98723 0c76 0E7A .short 31246 + 98724 0c78 0C7A .short 31244 + 98725 0c7a 0A7A .short 31242 + 98726 0c7c 087A .short 31240 + 98727 0c7e 067A .short 31238 + 98728 0c80 047A .short 31236 + ARM GAS /tmp/ccLcDeJO.s page 1729 + + + 98729 0c82 037A .short 31235 + 98730 0c84 017A .short 31233 + 98731 0c86 FF79 .short 31231 + 98732 0c88 FD79 .short 31229 + 98733 0c8a FB79 .short 31227 + 98734 0c8c F979 .short 31225 + 98735 0c8e F779 .short 31223 + 98736 0c90 F579 .short 31221 + 98737 0c92 F379 .short 31219 + 98738 0c94 F179 .short 31217 + 98739 0c96 F079 .short 31216 + 98740 0c98 EE79 .short 31214 + 98741 0c9a EC79 .short 31212 + 98742 0c9c EA79 .short 31210 + 98743 0c9e E879 .short 31208 + 98744 0ca0 E679 .short 31206 + 98745 0ca2 E479 .short 31204 + 98746 0ca4 E279 .short 31202 + 98747 0ca6 E079 .short 31200 + 98748 0ca8 DE79 .short 31198 + 98749 0caa DC79 .short 31196 + 98750 0cac DA79 .short 31194 + 98751 0cae D979 .short 31193 + 98752 0cb0 D779 .short 31191 + 98753 0cb2 D579 .short 31189 + 98754 0cb4 D379 .short 31187 + 98755 0cb6 D179 .short 31185 + 98756 0cb8 CF79 .short 31183 + 98757 0cba CD79 .short 31181 + 98758 0cbc CB79 .short 31179 + 98759 0cbe C979 .short 31177 + 98760 0cc0 C779 .short 31175 + 98761 0cc2 C579 .short 31173 + 98762 0cc4 C379 .short 31171 + 98763 0cc6 C179 .short 31169 + 98764 0cc8 BF79 .short 31167 + 98765 0cca BD79 .short 31165 + 98766 0ccc BC79 .short 31164 + 98767 0cce BA79 .short 31162 + 98768 0cd0 B879 .short 31160 + 98769 0cd2 B679 .short 31158 + 98770 0cd4 B479 .short 31156 + 98771 0cd6 B279 .short 31154 + 98772 0cd8 B079 .short 31152 + 98773 0cda AE79 .short 31150 + 98774 0cdc AC79 .short 31148 + 98775 0cde AA79 .short 31146 + 98776 0ce0 A879 .short 31144 + 98777 0ce2 A679 .short 31142 + 98778 0ce4 A479 .short 31140 + 98779 0ce6 A279 .short 31138 + 98780 0ce8 A079 .short 31136 + 98781 0cea 9E79 .short 31134 + 98782 0cec 9C79 .short 31132 + 98783 0cee 9A79 .short 31130 + 98784 0cf0 9879 .short 31128 + 98785 0cf2 9679 .short 31126 + ARM GAS /tmp/ccLcDeJO.s page 1730 + + + 98786 0cf4 9479 .short 31124 + 98787 0cf6 9279 .short 31122 + 98788 0cf8 9179 .short 31121 + 98789 0cfa 8F79 .short 31119 + 98790 0cfc 8D79 .short 31117 + 98791 0cfe 8B79 .short 31115 + 98792 0d00 8979 .short 31113 + 98793 0d02 8779 .short 31111 + 98794 0d04 8579 .short 31109 + 98795 0d06 8379 .short 31107 + 98796 0d08 8179 .short 31105 + 98797 0d0a 7F79 .short 31103 + 98798 0d0c 7D79 .short 31101 + 98799 0d0e 7B79 .short 31099 + 98800 0d10 7979 .short 31097 + 98801 0d12 7779 .short 31095 + 98802 0d14 7579 .short 31093 + 98803 0d16 7379 .short 31091 + 98804 0d18 7179 .short 31089 + 98805 0d1a 6F79 .short 31087 + 98806 0d1c 6D79 .short 31085 + 98807 0d1e 6B79 .short 31083 + 98808 0d20 6979 .short 31081 + 98809 0d22 6779 .short 31079 + 98810 0d24 6579 .short 31077 + 98811 0d26 6379 .short 31075 + 98812 0d28 6179 .short 31073 + 98813 0d2a 5F79 .short 31071 + 98814 0d2c 5D79 .short 31069 + 98815 0d2e 5B79 .short 31067 + 98816 0d30 5979 .short 31065 + 98817 0d32 5779 .short 31063 + 98818 0d34 5579 .short 31061 + 98819 0d36 5379 .short 31059 + 98820 0d38 5179 .short 31057 + 98821 0d3a 4F79 .short 31055 + 98822 0d3c 4D79 .short 31053 + 98823 0d3e 4B79 .short 31051 + 98824 0d40 4979 .short 31049 + 98825 0d42 4779 .short 31047 + 98826 0d44 4579 .short 31045 + 98827 0d46 4379 .short 31043 + 98828 0d48 4179 .short 31041 + 98829 0d4a 3F79 .short 31039 + 98830 0d4c 3D79 .short 31037 + 98831 0d4e 3B79 .short 31035 + 98832 0d50 3979 .short 31033 + 98833 0d52 3779 .short 31031 + 98834 0d54 3579 .short 31029 + 98835 0d56 3379 .short 31027 + 98836 0d58 3179 .short 31025 + 98837 0d5a 2F79 .short 31023 + 98838 0d5c 2D79 .short 31021 + 98839 0d5e 2B79 .short 31019 + 98840 0d60 2979 .short 31017 + 98841 0d62 2779 .short 31015 + 98842 0d64 2579 .short 31013 + ARM GAS /tmp/ccLcDeJO.s page 1731 + + + 98843 0d66 2379 .short 31011 + 98844 0d68 2179 .short 31009 + 98845 0d6a 1F79 .short 31007 + 98846 0d6c 1D79 .short 31005 + 98847 0d6e 1A79 .short 31002 + 98848 0d70 1879 .short 31000 + 98849 0d72 1679 .short 30998 + 98850 0d74 1479 .short 30996 + 98851 0d76 1279 .short 30994 + 98852 0d78 1079 .short 30992 + 98853 0d7a 0E79 .short 30990 + 98854 0d7c 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99013 0eba B977 .short 30649 + ARM GAS /tmp/ccLcDeJO.s page 1734 + + + 99014 0ebc B777 .short 30647 + 99015 0ebe B577 .short 30645 + 99016 0ec0 B277 .short 30642 + 99017 0ec2 B077 .short 30640 + 99018 0ec4 AE77 .short 30638 + 99019 0ec6 AC77 .short 30636 + 99020 0ec8 AA77 .short 30634 + 99021 0eca A777 .short 30631 + 99022 0ecc A577 .short 30629 + 99023 0ece A377 .short 30627 + 99024 0ed0 A177 .short 30625 + 99025 0ed2 9E77 .short 30622 + 99026 0ed4 9C77 .short 30620 + 99027 0ed6 9A77 .short 30618 + 99028 0ed8 9877 .short 30616 + 99029 0eda 9577 .short 30613 + 99030 0edc 9377 .short 30611 + 99031 0ede 9177 .short 30609 + 99032 0ee0 8F77 .short 30607 + 99033 0ee2 8C77 .short 30604 + 99034 0ee4 8A77 .short 30602 + 99035 0ee6 8877 .short 30600 + 99036 0ee8 8677 .short 30598 + 99037 0eea 8377 .short 30595 + 99038 0eec 8177 .short 30593 + 99039 0eee 7F77 .short 30591 + 99040 0ef0 7D77 .short 30589 + 99041 0ef2 7A77 .short 30586 + 99042 0ef4 7877 .short 30584 + 99043 0ef6 7677 .short 30582 + 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1c54 4762 .short 25159 + 100755 1c56 4362 .short 25155 + 100756 1c58 3F62 .short 25151 + 100757 1c5a 3B62 .short 25147 + 100758 1c5c 3762 .short 25143 + 100759 1c5e 3362 .short 25139 + 100760 1c60 2F62 .short 25135 + 100761 1c62 2B62 .short 25131 + 100762 1c64 2762 .short 25127 + 100763 1c66 2362 .short 25123 + 100764 1c68 1F62 .short 25119 + 100765 1c6a 1B62 .short 25115 + 100766 1c6c 1762 .short 25111 + 100767 1c6e 1362 .short 25107 + 100768 1c70 0F62 .short 25103 + 100769 1c72 0B62 .short 25099 + 100770 1c74 0762 .short 25095 + 100771 1c76 0362 .short 25091 + 100772 1c78 FF61 .short 25087 + 100773 1c7a FB61 .short 25083 + 100774 1c7c F761 .short 25079 + 100775 1c7e F361 .short 25075 + 100776 1c80 EE61 .short 25070 + 100777 1c82 EA61 .short 25066 + 100778 1c84 E661 .short 25062 + 100779 1c86 E261 .short 25058 + 100780 1c88 DE61 .short 25054 + ARM GAS /tmp/ccLcDeJO.s page 1765 + + + 100781 1c8a DA61 .short 25050 + 100782 1c8c D661 .short 25046 + 100783 1c8e D261 .short 25042 + 100784 1c90 CE61 .short 25038 + 100785 1c92 CA61 .short 25034 + 100786 1c94 C661 .short 25030 + 100787 1c96 C261 .short 25026 + 100788 1c98 BE61 .short 25022 + 100789 1c9a BA61 .short 25018 + 100790 1c9c B661 .short 25014 + 100791 1c9e B261 .short 25010 + 100792 1ca0 AE61 .short 25006 + 100793 1ca2 AA61 .short 25002 + 100794 1ca4 A661 .short 24998 + 100795 1ca6 A161 .short 24993 + 100796 1ca8 9D61 .short 24989 + 100797 1caa 9961 .short 24985 + 100798 1cac 9561 .short 24981 + 100799 1cae 9161 .short 24977 + 100800 1cb0 8D61 .short 24973 + 100801 1cb2 8961 .short 24969 + 100802 1cb4 8561 .short 24965 + 100803 1cb6 8161 .short 24961 + 100804 1cb8 7D61 .short 24957 + 100805 1cba 7961 .short 24953 + 100806 1cbc 7561 .short 24949 + 100807 1cbe 7161 .short 24945 + 100808 1cc0 6D61 .short 24941 + 100809 1cc2 6861 .short 24936 + 100810 1cc4 6461 .short 24932 + 100811 1cc6 6061 .short 24928 + 100812 1cc8 5C61 .short 24924 + 100813 1cca 5861 .short 24920 + 100814 1ccc 5461 .short 24916 + 100815 1cce 5061 .short 24912 + 100816 1cd0 4C61 .short 24908 + 100817 1cd2 4861 .short 24904 + 100818 1cd4 4461 .short 24900 + 100819 1cd6 4061 .short 24896 + 100820 1cd8 3C61 .short 24892 + 100821 1cda 3761 .short 24887 + 100822 1cdc 3361 .short 24883 + 100823 1cde 2F61 .short 24879 + 100824 1ce0 2B61 .short 24875 + 100825 1ce2 2761 .short 24871 + 100826 1ce4 2361 .short 24867 + 100827 1ce6 1F61 .short 24863 + 100828 1ce8 1B61 .short 24859 + 100829 1cea 1761 .short 24855 + 100830 1cec 1361 .short 24851 + 100831 1cee 0F61 .short 24847 + 100832 1cf0 0A61 .short 24842 + 100833 1cf2 0661 .short 24838 + 100834 1cf4 0261 .short 24834 + 100835 1cf6 FE60 .short 24830 + 100836 1cf8 FA60 .short 24826 + 100837 1cfa F660 .short 24822 + ARM GAS /tmp/ccLcDeJO.s page 1766 + + + 100838 1cfc F260 .short 24818 + 100839 1cfe EE60 .short 24814 + 100840 1d00 EA60 .short 24810 + 100841 1d02 E660 .short 24806 + 100842 1d04 E160 .short 24801 + 100843 1d06 DD60 .short 24797 + 100844 1d08 D960 .short 24793 + 100845 1d0a D560 .short 24789 + 100846 1d0c D160 .short 24785 + 100847 1d0e CD60 .short 24781 + 100848 1d10 C960 .short 24777 + 100849 1d12 C560 .short 24773 + 100850 1d14 C160 .short 24769 + 100851 1d16 BC60 .short 24764 + 100852 1d18 B860 .short 24760 + 100853 1d1a B460 .short 24756 + 100854 1d1c B060 .short 24752 + 100855 1d1e AC60 .short 24748 + 100856 1d20 A860 .short 24744 + 100857 1d22 A460 .short 24740 + 100858 1d24 A060 .short 24736 + 100859 1d26 9C60 .short 24732 + 100860 1d28 9760 .short 24727 + 100861 1d2a 9360 .short 24723 + 100862 1d2c 8F60 .short 24719 + 100863 1d2e 8B60 .short 24715 + 100864 1d30 8760 .short 24711 + 100865 1d32 8360 .short 24707 + 100866 1d34 7F60 .short 24703 + 100867 1d36 7B60 .short 24699 + 100868 1d38 7660 .short 24694 + 100869 1d3a 7260 .short 24690 + 100870 1d3c 6E60 .short 24686 + 100871 1d3e 6A60 .short 24682 + 100872 1d40 6660 .short 24678 + 100873 1d42 6260 .short 24674 + 100874 1d44 5E60 .short 24670 + 100875 1d46 5960 .short 24665 + 100876 1d48 5560 .short 24661 + 100877 1d4a 5160 .short 24657 + 100878 1d4c 4D60 .short 24653 + 100879 1d4e 4960 .short 24649 + 100880 1d50 4560 .short 24645 + 100881 1d52 4160 .short 24641 + 100882 1d54 3C60 .short 24636 + 100883 1d56 3860 .short 24632 + 100884 1d58 3460 .short 24628 + 100885 1d5a 3060 .short 24624 + 100886 1d5c 2C60 .short 24620 + 100887 1d5e 2860 .short 24616 + 100888 1d60 2460 .short 24612 + 100889 1d62 1F60 .short 24607 + 100890 1d64 1B60 .short 24603 + 100891 1d66 1760 .short 24599 + 100892 1d68 1360 .short 24595 + 100893 1d6a 0F60 .short 24591 + 100894 1d6c 0B60 .short 24587 + ARM GAS /tmp/ccLcDeJO.s page 1767 + + + 100895 1d6e 0760 .short 24583 + 100896 1d70 0260 .short 24578 + 100897 1d72 FE5F .short 24574 + 100898 1d74 FA5F .short 24570 + 100899 1d76 F65F .short 24566 + 100900 1d78 F25F .short 24562 + 100901 1d7a EE5F .short 24558 + 100902 1d7c E95F .short 24553 + 100903 1d7e E55F .short 24549 + 100904 1d80 E15F .short 24545 + 100905 1d82 DD5F .short 24541 + 100906 1d84 D95F .short 24537 + 100907 1d86 D55F .short 24533 + 100908 1d88 D05F .short 24528 + 100909 1d8a CC5F .short 24524 + 100910 1d8c C85F .short 24520 + 100911 1d8e C45F .short 24516 + 100912 1d90 C05F .short 24512 + 100913 1d92 BC5F .short 24508 + 100914 1d94 B75F .short 24503 + 100915 1d96 B35F .short 24499 + 100916 1d98 AF5F .short 24495 + 100917 1d9a AB5F .short 24491 + 100918 1d9c A75F .short 24487 + 100919 1d9e A35F .short 24483 + 100920 1da0 9E5F .short 24478 + 100921 1da2 9A5F .short 24474 + 100922 1da4 965F .short 24470 + 100923 1da6 925F .short 24466 + 100924 1da8 8E5F .short 24462 + 100925 1daa 8A5F .short 24458 + 100926 1dac 855F .short 24453 + 100927 1dae 815F .short 24449 + 100928 1db0 7D5F .short 24445 + 100929 1db2 795F .short 24441 + 100930 1db4 755F .short 24437 + 100931 1db6 705F .short 24432 + 100932 1db8 6C5F .short 24428 + 100933 1dba 685F .short 24424 + 100934 1dbc 645F .short 24420 + 100935 1dbe 605F .short 24416 + 100936 1dc0 5B5F .short 24411 + 100937 1dc2 575F .short 24407 + 100938 1dc4 535F .short 24403 + 100939 1dc6 4F5F .short 24399 + 100940 1dc8 4B5F .short 24395 + 100941 1dca 465F .short 24390 + 100942 1dcc 425F .short 24386 + 100943 1dce 3E5F .short 24382 + 100944 1dd0 3A5F .short 24378 + 100945 1dd2 365F .short 24374 + 100946 1dd4 315F .short 24369 + 100947 1dd6 2D5F .short 24365 + 100948 1dd8 295F .short 24361 + 100949 1dda 255F .short 24357 + 100950 1ddc 215F .short 24353 + 100951 1dde 1C5F .short 24348 + ARM GAS /tmp/ccLcDeJO.s page 1768 + + + 100952 1de0 185F .short 24344 + 100953 1de2 145F .short 24340 + 100954 1de4 105F .short 24336 + 100955 1de6 0C5F .short 24332 + 100956 1de8 075F .short 24327 + 100957 1dea 035F .short 24323 + 100958 1dec FF5E .short 24319 + 100959 1dee FB5E .short 24315 + 100960 1df0 F75E .short 24311 + 100961 1df2 F25E .short 24306 + 100962 1df4 EE5E .short 24302 + 100963 1df6 EA5E .short 24298 + 100964 1df8 E65E .short 24294 + 100965 1dfa E25E .short 24290 + 100966 1dfc DD5E .short 24285 + 100967 1dfe D95E .short 24281 + 100968 1e00 D55E .short 24277 + 100969 1e02 D15E .short 24273 + 100970 1e04 CC5E .short 24268 + 100971 1e06 C85E .short 24264 + 100972 1e08 C45E .short 24260 + 100973 1e0a C05E .short 24256 + 100974 1e0c BC5E .short 24252 + 100975 1e0e B75E .short 24247 + 100976 1e10 B35E .short 24243 + 100977 1e12 AF5E .short 24239 + 100978 1e14 AB5E .short 24235 + 100979 1e16 A65E .short 24230 + 100980 1e18 A25E .short 24226 + 100981 1e1a 9E5E .short 24222 + 100982 1e1c 9A5E .short 24218 + 100983 1e1e 955E .short 24213 + 100984 1e20 915E .short 24209 + 100985 1e22 8D5E .short 24205 + 100986 1e24 895E .short 24201 + 100987 1e26 855E .short 24197 + 100988 1e28 805E .short 24192 + 100989 1e2a 7C5E .short 24188 + 100990 1e2c 785E .short 24184 + 100991 1e2e 745E .short 24180 + 100992 1e30 6F5E .short 24175 + 100993 1e32 6B5E .short 24171 + 100994 1e34 675E .short 24167 + 100995 1e36 635E .short 24163 + 100996 1e38 5E5E .short 24158 + 100997 1e3a 5A5E .short 24154 + 100998 1e3c 565E .short 24150 + 100999 1e3e 525E .short 24146 + 101000 1e40 4D5E .short 24141 + 101001 1e42 495E .short 24137 + 101002 1e44 455E .short 24133 + 101003 1e46 415E .short 24129 + 101004 1e48 3C5E .short 24124 + 101005 1e4a 385E .short 24120 + 101006 1e4c 345E .short 24116 + 101007 1e4e 305E .short 24112 + 101008 1e50 2B5E .short 24107 + ARM GAS /tmp/ccLcDeJO.s page 1769 + + + 101009 1e52 275E .short 24103 + 101010 1e54 235E .short 24099 + 101011 1e56 1F5E .short 24095 + 101012 1e58 1A5E .short 24090 + 101013 1e5a 165E .short 24086 + 101014 1e5c 125E .short 24082 + 101015 1e5e 0E5E .short 24078 + 101016 1e60 095E .short 24073 + 101017 1e62 055E .short 24069 + 101018 1e64 015E .short 24065 + 101019 1e66 FD5D .short 24061 + 101020 1e68 F85D .short 24056 + 101021 1e6a F45D .short 24052 + 101022 1e6c F05D .short 24048 + 101023 1e6e EB5D .short 24043 + 101024 1e70 E75D .short 24039 + 101025 1e72 E35D .short 24035 + 101026 1e74 DF5D .short 24031 + 101027 1e76 DA5D .short 24026 + 101028 1e78 D65D .short 24022 + 101029 1e7a D25D .short 24018 + 101030 1e7c CE5D .short 24014 + 101031 1e7e C95D .short 24009 + 101032 1e80 C55D .short 24005 + 101033 1e82 C15D .short 24001 + 101034 1e84 BC5D .short 23996 + 101035 1e86 B85D .short 23992 + 101036 1e88 B45D .short 23988 + 101037 1e8a B05D .short 23984 + 101038 1e8c AB5D .short 23979 + 101039 1e8e A75D .short 23975 + 101040 1e90 A35D .short 23971 + 101041 1e92 9E5D .short 23966 + 101042 1e94 9A5D .short 23962 + 101043 1e96 965D .short 23958 + 101044 1e98 925D .short 23954 + 101045 1e9a 8D5D .short 23949 + 101046 1e9c 895D .short 23945 + 101047 1e9e 855D .short 23941 + 101048 1ea0 805D .short 23936 + 101049 1ea2 7C5D .short 23932 + 101050 1ea4 785D .short 23928 + 101051 1ea6 745D .short 23924 + 101052 1ea8 6F5D .short 23919 + 101053 1eaa 6B5D .short 23915 + 101054 1eac 675D .short 23911 + 101055 1eae 625D .short 23906 + 101056 1eb0 5E5D .short 23902 + 101057 1eb2 5A5D .short 23898 + 101058 1eb4 555D .short 23893 + 101059 1eb6 515D .short 23889 + 101060 1eb8 4D5D .short 23885 + 101061 1eba 495D .short 23881 + 101062 1ebc 445D .short 23876 + 101063 1ebe 405D .short 23872 + 101064 1ec0 3C5D .short 23868 + 101065 1ec2 375D .short 23863 + ARM GAS /tmp/ccLcDeJO.s page 1770 + + + 101066 1ec4 335D .short 23859 + 101067 1ec6 2F5D .short 23855 + 101068 1ec8 2A5D .short 23850 + 101069 1eca 265D .short 23846 + 101070 1ecc 225D .short 23842 + 101071 1ece 1E5D .short 23838 + 101072 1ed0 195D .short 23833 + 101073 1ed2 155D .short 23829 + 101074 1ed4 115D .short 23825 + 101075 1ed6 0C5D .short 23820 + 101076 1ed8 085D .short 23816 + 101077 1eda 045D .short 23812 + 101078 1edc FF5C .short 23807 + 101079 1ede FB5C .short 23803 + 101080 1ee0 F75C .short 23799 + 101081 1ee2 F25C .short 23794 + 101082 1ee4 EE5C .short 23790 + 101083 1ee6 EA5C .short 23786 + 101084 1ee8 E55C .short 23781 + 101085 1eea E15C .short 23777 + 101086 1eec DD5C .short 23773 + 101087 1eee D85C .short 23768 + 101088 1ef0 D45C .short 23764 + 101089 1ef2 D05C .short 23760 + 101090 1ef4 CB5C .short 23755 + 101091 1ef6 C75C .short 23751 + 101092 1ef8 C35C .short 23747 + 101093 1efa BE5C .short 23742 + 101094 1efc BA5C .short 23738 + 101095 1efe B65C .short 23734 + 101096 1f00 B15C .short 23729 + 101097 1f02 AD5C .short 23725 + 101098 1f04 A95C .short 23721 + 101099 1f06 A45C .short 23716 + 101100 1f08 A05C .short 23712 + 101101 1f0a 9C5C .short 23708 + 101102 1f0c 975C .short 23703 + 101103 1f0e 935C .short 23699 + 101104 1f10 8F5C .short 23695 + 101105 1f12 8A5C .short 23690 + 101106 1f14 865C .short 23686 + 101107 1f16 825C .short 23682 + 101108 1f18 7D5C .short 23677 + 101109 1f1a 795C .short 23673 + 101110 1f1c 755C .short 23669 + 101111 1f1e 705C .short 23664 + 101112 1f20 6C5C .short 23660 + 101113 1f22 685C .short 23656 + 101114 1f24 635C .short 23651 + 101115 1f26 5F5C .short 23647 + 101116 1f28 5B5C .short 23643 + 101117 1f2a 565C .short 23638 + 101118 1f2c 525C .short 23634 + 101119 1f2e 4E5C .short 23630 + 101120 1f30 495C .short 23625 + 101121 1f32 455C .short 23621 + 101122 1f34 415C .short 23617 + ARM GAS /tmp/ccLcDeJO.s page 1771 + + + 101123 1f36 3C5C .short 23612 + 101124 1f38 385C .short 23608 + 101125 1f3a 335C .short 23603 + 101126 1f3c 2F5C .short 23599 + 101127 1f3e 2B5C .short 23595 + 101128 1f40 265C .short 23590 + 101129 1f42 225C .short 23586 + 101130 1f44 1E5C .short 23582 + 101131 1f46 195C .short 23577 + 101132 1f48 155C .short 23573 + 101133 1f4a 115C .short 23569 + 101134 1f4c 0C5C .short 23564 + 101135 1f4e 085C .short 23560 + 101136 1f50 035C .short 23555 + 101137 1f52 FF5B .short 23551 + 101138 1f54 FB5B .short 23547 + 101139 1f56 F65B .short 23542 + 101140 1f58 F25B .short 23538 + 101141 1f5a EE5B .short 23534 + 101142 1f5c E95B .short 23529 + 101143 1f5e E55B .short 23525 + 101144 1f60 E05B .short 23520 + 101145 1f62 DC5B .short 23516 + 101146 1f64 D85B .short 23512 + 101147 1f66 D35B .short 23507 + 101148 1f68 CF5B .short 23503 + 101149 1f6a CB5B .short 23499 + 101150 1f6c C65B .short 23494 + 101151 1f6e C25B .short 23490 + 101152 1f70 BD5B .short 23485 + 101153 1f72 B95B .short 23481 + 101154 1f74 B55B .short 23477 + 101155 1f76 B05B .short 23472 + 101156 1f78 AC5B .short 23468 + 101157 1f7a A85B .short 23464 + 101158 1f7c A35B .short 23459 + 101159 1f7e 9F5B .short 23455 + 101160 1f80 9A5B .short 23450 + 101161 1f82 965B .short 23446 + 101162 1f84 925B .short 23442 + 101163 1f86 8D5B .short 23437 + 101164 1f88 895B .short 23433 + 101165 1f8a 845B .short 23428 + 101166 1f8c 805B .short 23424 + 101167 1f8e 7C5B .short 23420 + 101168 1f90 775B .short 23415 + 101169 1f92 735B .short 23411 + 101170 1f94 6E5B .short 23406 + 101171 1f96 6A5B .short 23402 + 101172 1f98 665B .short 23398 + 101173 1f9a 615B .short 23393 + 101174 1f9c 5D5B .short 23389 + 101175 1f9e 585B .short 23384 + 101176 1fa0 545B .short 23380 + 101177 1fa2 505B .short 23376 + 101178 1fa4 4B5B .short 23371 + 101179 1fa6 475B .short 23367 + ARM GAS /tmp/ccLcDeJO.s page 1772 + + + 101180 1fa8 425B .short 23362 + 101181 1faa 3E5B .short 23358 + 101182 1fac 3A5B .short 23354 + 101183 1fae 355B .short 23349 + 101184 1fb0 315B .short 23345 + 101185 1fb2 2C5B .short 23340 + 101186 1fb4 285B .short 23336 + 101187 1fb6 245B .short 23332 + 101188 1fb8 1F5B .short 23327 + 101189 1fba 1B5B .short 23323 + 101190 1fbc 165B .short 23318 + 101191 1fbe 125B .short 23314 + 101192 1fc0 0E5B .short 23310 + 101193 1fc2 095B .short 23305 + 101194 1fc4 055B .short 23301 + 101195 1fc6 005B .short 23296 + 101196 1fc8 FC5A .short 23292 + 101197 1fca F75A .short 23287 + 101198 1fcc F35A .short 23283 + 101199 1fce EF5A .short 23279 + 101200 1fd0 EA5A .short 23274 + 101201 1fd2 E65A .short 23270 + 101202 1fd4 E15A .short 23265 + 101203 1fd6 DD5A .short 23261 + 101204 1fd8 D85A .short 23256 + 101205 1fda D45A .short 23252 + 101206 1fdc D05A .short 23248 + 101207 1fde CB5A .short 23243 + 101208 1fe0 C75A .short 23239 + 101209 1fe2 C25A .short 23234 + 101210 1fe4 BE5A .short 23230 + 101211 1fe6 B95A .short 23225 + 101212 1fe8 B55A .short 23221 + 101213 1fea B15A .short 23217 + 101214 1fec AC5A .short 23212 + 101215 1fee A85A .short 23208 + 101216 1ff0 A35A .short 23203 + 101217 1ff2 9F5A .short 23199 + 101218 1ff4 9A5A .short 23194 + 101219 1ff6 965A .short 23190 + 101220 1ff8 925A .short 23186 + 101221 1ffa 8D5A .short 23181 + 101222 1ffc 895A .short 23177 + 101223 1ffe 845A .short 23172 + 101224 2000 805A .short 23168 + 101225 2002 7B5A .short 23163 + 101226 2004 775A .short 23159 + 101227 2006 725A .short 23154 + 101228 2008 6E5A .short 23150 + 101229 200a 6A5A .short 23146 + 101230 200c 655A .short 23141 + 101231 200e 615A .short 23137 + 101232 2010 5C5A .short 23132 + 101233 2012 585A .short 23128 + 101234 2014 535A .short 23123 + 101235 2016 4F5A .short 23119 + 101236 2018 4A5A .short 23114 + ARM GAS /tmp/ccLcDeJO.s page 1773 + + + 101237 201a 465A .short 23110 + 101238 201c 415A .short 23105 + 101239 201e 3D5A .short 23101 + 101240 2020 395A .short 23097 + 101241 2022 345A .short 23092 + 101242 2024 305A .short 23088 + 101243 2026 2B5A .short 23083 + 101244 2028 275A .short 23079 + 101245 202a 225A .short 23074 + 101246 202c 1E5A .short 23070 + 101247 202e 195A .short 23065 + 101248 2030 155A .short 23061 + 101249 2032 105A .short 23056 + 101250 2034 0C5A .short 23052 + 101251 2036 075A .short 23047 + 101252 2038 035A .short 23043 + 101253 203a FF59 .short 23039 + 101254 203c FA59 .short 23034 + 101255 203e F659 .short 23030 + 101256 2040 F159 .short 23025 + 101257 2042 ED59 .short 23021 + 101258 2044 E859 .short 23016 + 101259 2046 E459 .short 23012 + 101260 2048 DF59 .short 23007 + 101261 204a DB59 .short 23003 + 101262 204c D659 .short 22998 + 101263 204e D259 .short 22994 + 101264 2050 CD59 .short 22989 + 101265 2052 C959 .short 22985 + 101266 2054 C459 .short 22980 + 101267 2056 C059 .short 22976 + 101268 2058 BB59 .short 22971 + 101269 205a B759 .short 22967 + 101270 205c B259 .short 22962 + 101271 205e AE59 .short 22958 + 101272 2060 A959 .short 22953 + 101273 2062 A559 .short 22949 + 101274 2064 A159 .short 22945 + 101275 2066 9C59 .short 22940 + 101276 2068 9859 .short 22936 + 101277 206a 9359 .short 22931 + 101278 206c 8F59 .short 22927 + 101279 206e 8A59 .short 22922 + 101280 2070 8659 .short 22918 + 101281 2072 8159 .short 22913 + 101282 2074 7D59 .short 22909 + 101283 2076 7859 .short 22904 + 101284 2078 7459 .short 22900 + 101285 207a 6F59 .short 22895 + 101286 207c 6B59 .short 22891 + 101287 207e 6659 .short 22886 + 101288 2080 6259 .short 22882 + 101289 2082 5D59 .short 22877 + 101290 2084 5959 .short 22873 + 101291 2086 5459 .short 22868 + 101292 2088 5059 .short 22864 + 101293 208a 4B59 .short 22859 + ARM GAS /tmp/ccLcDeJO.s page 1774 + + + 101294 208c 4759 .short 22855 + 101295 208e 4259 .short 22850 + 101296 2090 3E59 .short 22846 + 101297 2092 3959 .short 22841 + 101298 2094 3559 .short 22837 + 101299 2096 3059 .short 22832 + 101300 2098 2C59 .short 22828 + 101301 209a 2759 .short 22823 + 101302 209c 2359 .short 22819 + 101303 209e 1E59 .short 22814 + 101304 20a0 1A59 .short 22810 + 101305 20a2 1559 .short 22805 + 101306 20a4 1159 .short 22801 + 101307 20a6 0C59 .short 22796 + 101308 20a8 0859 .short 22792 + 101309 20aa 0359 .short 22787 + 101310 20ac FE58 .short 22782 + 101311 20ae FA58 .short 22778 + 101312 20b0 F558 .short 22773 + 101313 20b2 F158 .short 22769 + 101314 20b4 EC58 .short 22764 + 101315 20b6 E858 .short 22760 + 101316 20b8 E358 .short 22755 + 101317 20ba DF58 .short 22751 + 101318 20bc DA58 .short 22746 + 101319 20be D658 .short 22742 + 101320 20c0 D158 .short 22737 + 101321 20c2 CD58 .short 22733 + 101322 20c4 C858 .short 22728 + 101323 20c6 C458 .short 22724 + 101324 20c8 BF58 .short 22719 + 101325 20ca BB58 .short 22715 + 101326 20cc B658 .short 22710 + 101327 20ce B258 .short 22706 + 101328 20d0 AD58 .short 22701 + 101329 20d2 A958 .short 22697 + 101330 20d4 A458 .short 22692 + 101331 20d6 9F58 .short 22687 + 101332 20d8 9B58 .short 22683 + 101333 20da 9658 .short 22678 + 101334 20dc 9258 .short 22674 + 101335 20de 8D58 .short 22669 + 101336 20e0 8958 .short 22665 + 101337 20e2 8458 .short 22660 + 101338 20e4 8058 .short 22656 + 101339 20e6 7B58 .short 22651 + 101340 20e8 7758 .short 22647 + 101341 20ea 7258 .short 22642 + 101342 20ec 6E58 .short 22638 + 101343 20ee 6958 .short 22633 + 101344 20f0 6458 .short 22628 + 101345 20f2 6058 .short 22624 + 101346 20f4 5B58 .short 22619 + 101347 20f6 5758 .short 22615 + 101348 20f8 5258 .short 22610 + 101349 20fa 4E58 .short 22606 + 101350 20fc 4958 .short 22601 + ARM GAS /tmp/ccLcDeJO.s page 1775 + + + 101351 20fe 4558 .short 22597 + 101352 2100 4058 .short 22592 + 101353 2102 3C58 .short 22588 + 101354 2104 3758 .short 22583 + 101355 2106 3258 .short 22578 + 101356 2108 2E58 .short 22574 + 101357 210a 2958 .short 22569 + 101358 210c 2558 .short 22565 + 101359 210e 2058 .short 22560 + 101360 2110 1C58 .short 22556 + 101361 2112 1758 .short 22551 + 101362 2114 1358 .short 22547 + 101363 2116 0E58 .short 22542 + 101364 2118 0958 .short 22537 + 101365 211a 0558 .short 22533 + 101366 211c 0058 .short 22528 + 101367 211e FC57 .short 22524 + 101368 2120 F757 .short 22519 + 101369 2122 F357 .short 22515 + 101370 2124 EE57 .short 22510 + 101371 2126 E957 .short 22505 + 101372 2128 E557 .short 22501 + 101373 212a E057 .short 22496 + 101374 212c DC57 .short 22492 + 101375 212e D757 .short 22487 + 101376 2130 D357 .short 22483 + 101377 2132 CE57 .short 22478 + 101378 2134 C957 .short 22473 + 101379 2136 C557 .short 22469 + 101380 2138 C057 .short 22464 + 101381 213a BC57 .short 22460 + 101382 213c B757 .short 22455 + 101383 213e B357 .short 22451 + 101384 2140 AE57 .short 22446 + 101385 2142 A957 .short 22441 + 101386 2144 A557 .short 22437 + 101387 2146 A057 .short 22432 + 101388 2148 9C57 .short 22428 + 101389 214a 9757 .short 22423 + 101390 214c 9357 .short 22419 + 101391 214e 8E57 .short 22414 + 101392 2150 8957 .short 22409 + 101393 2152 8557 .short 22405 + 101394 2154 8057 .short 22400 + 101395 2156 7C57 .short 22396 + 101396 2158 7757 .short 22391 + 101397 215a 7257 .short 22386 + 101398 215c 6E57 .short 22382 + 101399 215e 6957 .short 22377 + 101400 2160 6557 .short 22373 + 101401 2162 6057 .short 22368 + 101402 2164 5C57 .short 22364 + 101403 2166 5757 .short 22359 + 101404 2168 5257 .short 22354 + 101405 216a 4E57 .short 22350 + 101406 216c 4957 .short 22345 + 101407 216e 4557 .short 22341 + ARM GAS /tmp/ccLcDeJO.s page 1776 + + + 101408 2170 4057 .short 22336 + 101409 2172 3B57 .short 22331 + 101410 2174 3757 .short 22327 + 101411 2176 3257 .short 22322 + 101412 2178 2E57 .short 22318 + 101413 217a 2957 .short 22313 + 101414 217c 2457 .short 22308 + 101415 217e 2057 .short 22304 + 101416 2180 1B57 .short 22299 + 101417 2182 1757 .short 22295 + 101418 2184 1257 .short 22290 + 101419 2186 0D57 .short 22285 + 101420 2188 0957 .short 22281 + 101421 218a 0457 .short 22276 + 101422 218c FF56 .short 22271 + 101423 218e FB56 .short 22267 + 101424 2190 F656 .short 22262 + 101425 2192 F256 .short 22258 + 101426 2194 ED56 .short 22253 + 101427 2196 E856 .short 22248 + 101428 2198 E456 .short 22244 + 101429 219a DF56 .short 22239 + 101430 219c DB56 .short 22235 + 101431 219e D656 .short 22230 + 101432 21a0 D156 .short 22225 + 101433 21a2 CD56 .short 22221 + 101434 21a4 C856 .short 22216 + 101435 21a6 C456 .short 22212 + 101436 21a8 BF56 .short 22207 + 101437 21aa BA56 .short 22202 + 101438 21ac B656 .short 22198 + 101439 21ae B156 .short 22193 + 101440 21b0 AC56 .short 22188 + 101441 21b2 A856 .short 22184 + 101442 21b4 A356 .short 22179 + 101443 21b6 9F56 .short 22175 + 101444 21b8 9A56 .short 22170 + 101445 21ba 9556 .short 22165 + 101446 21bc 9156 .short 22161 + 101447 21be 8C56 .short 22156 + 101448 21c0 8756 .short 22151 + 101449 21c2 8356 .short 22147 + 101450 21c4 7E56 .short 22142 + 101451 21c6 7956 .short 22137 + 101452 21c8 7556 .short 22133 + 101453 21ca 7056 .short 22128 + 101454 21cc 6C56 .short 22124 + 101455 21ce 6756 .short 22119 + 101456 21d0 6256 .short 22114 + 101457 21d2 5E56 .short 22110 + 101458 21d4 5956 .short 22105 + 101459 21d6 5456 .short 22100 + 101460 21d8 5056 .short 22096 + 101461 21da 4B56 .short 22091 + 101462 21dc 4656 .short 22086 + 101463 21de 4256 .short 22082 + 101464 21e0 3D56 .short 22077 + ARM GAS /tmp/ccLcDeJO.s page 1777 + + + 101465 21e2 3956 .short 22073 + 101466 21e4 3456 .short 22068 + 101467 21e6 2F56 .short 22063 + 101468 21e8 2B56 .short 22059 + 101469 21ea 2656 .short 22054 + 101470 21ec 2156 .short 22049 + 101471 21ee 1D56 .short 22045 + 101472 21f0 1856 .short 22040 + 101473 21f2 1356 .short 22035 + 101474 21f4 0F56 .short 22031 + 101475 21f6 0A56 .short 22026 + 101476 21f8 0556 .short 22021 + 101477 21fa 0156 .short 22017 + 101478 21fc FC55 .short 22012 + 101479 21fe F755 .short 22007 + 101480 2200 F355 .short 22003 + 101481 2202 EE55 .short 21998 + 101482 2204 EA55 .short 21994 + 101483 2206 E555 .short 21989 + 101484 2208 E055 .short 21984 + 101485 220a DC55 .short 21980 + 101486 220c D755 .short 21975 + 101487 220e D255 .short 21970 + 101488 2210 CE55 .short 21966 + 101489 2212 C955 .short 21961 + 101490 2214 C455 .short 21956 + 101491 2216 C055 .short 21952 + 101492 2218 BB55 .short 21947 + 101493 221a B655 .short 21942 + 101494 221c B255 .short 21938 + 101495 221e AD55 .short 21933 + 101496 2220 A855 .short 21928 + 101497 2222 A455 .short 21924 + 101498 2224 9F55 .short 21919 + 101499 2226 9A55 .short 21914 + 101500 2228 9655 .short 21910 + 101501 222a 9155 .short 21905 + 101502 222c 8C55 .short 21900 + 101503 222e 8855 .short 21896 + 101504 2230 8355 .short 21891 + 101505 2232 7E55 .short 21886 + 101506 2234 7955 .short 21881 + 101507 2236 7555 .short 21877 + 101508 2238 7055 .short 21872 + 101509 223a 6B55 .short 21867 + 101510 223c 6755 .short 21863 + 101511 223e 6255 .short 21858 + 101512 2240 5D55 .short 21853 + 101513 2242 5955 .short 21849 + 101514 2244 5455 .short 21844 + 101515 2246 4F55 .short 21839 + 101516 2248 4B55 .short 21835 + 101517 224a 4655 .short 21830 + 101518 224c 4155 .short 21825 + 101519 224e 3D55 .short 21821 + 101520 2250 3855 .short 21816 + 101521 2252 3355 .short 21811 + ARM GAS /tmp/ccLcDeJO.s page 1778 + + + 101522 2254 2F55 .short 21807 + 101523 2256 2A55 .short 21802 + 101524 2258 2555 .short 21797 + 101525 225a 2055 .short 21792 + 101526 225c 1C55 .short 21788 + 101527 225e 1755 .short 21783 + 101528 2260 1255 .short 21778 + 101529 2262 0E55 .short 21774 + 101530 2264 0955 .short 21769 + 101531 2266 0455 .short 21764 + 101532 2268 0055 .short 21760 + 101533 226a FB54 .short 21755 + 101534 226c F654 .short 21750 + 101535 226e F254 .short 21746 + 101536 2270 ED54 .short 21741 + 101537 2272 E854 .short 21736 + 101538 2274 E354 .short 21731 + 101539 2276 DF54 .short 21727 + 101540 2278 DA54 .short 21722 + 101541 227a D554 .short 21717 + 101542 227c D154 .short 21713 + 101543 227e CC54 .short 21708 + 101544 2280 C754 .short 21703 + 101545 2282 C254 .short 21698 + 101546 2284 BE54 .short 21694 + 101547 2286 B954 .short 21689 + 101548 2288 B454 .short 21684 + 101549 228a B054 .short 21680 + 101550 228c AB54 .short 21675 + 101551 228e A654 .short 21670 + 101552 2290 A254 .short 21666 + 101553 2292 9D54 .short 21661 + 101554 2294 9854 .short 21656 + 101555 2296 9354 .short 21651 + 101556 2298 8F54 .short 21647 + 101557 229a 8A54 .short 21642 + 101558 229c 8554 .short 21637 + 101559 229e 8054 .short 21632 + 101560 22a0 7C54 .short 21628 + 101561 22a2 7754 .short 21623 + 101562 22a4 7254 .short 21618 + 101563 22a6 6E54 .short 21614 + 101564 22a8 6954 .short 21609 + 101565 22aa 6454 .short 21604 + 101566 22ac 5F54 .short 21599 + 101567 22ae 5B54 .short 21595 + 101568 22b0 5654 .short 21590 + 101569 22b2 5154 .short 21585 + 101570 22b4 4D54 .short 21581 + 101571 22b6 4854 .short 21576 + 101572 22b8 4354 .short 21571 + 101573 22ba 3E54 .short 21566 + 101574 22bc 3A54 .short 21562 + 101575 22be 3554 .short 21557 + 101576 22c0 3054 .short 21552 + 101577 22c2 2B54 .short 21547 + 101578 22c4 2754 .short 21543 + ARM GAS /tmp/ccLcDeJO.s page 1779 + + + 101579 22c6 2254 .short 21538 + 101580 22c8 1D54 .short 21533 + 101581 22ca 1854 .short 21528 + 101582 22cc 1454 .short 21524 + 101583 22ce 0F54 .short 21519 + 101584 22d0 0A54 .short 21514 + 101585 22d2 0654 .short 21510 + 101586 22d4 0154 .short 21505 + 101587 22d6 FC53 .short 21500 + 101588 22d8 F753 .short 21495 + 101589 22da F353 .short 21491 + 101590 22dc EE53 .short 21486 + 101591 22de E953 .short 21481 + 101592 22e0 E453 .short 21476 + 101593 22e2 E053 .short 21472 + 101594 22e4 DB53 .short 21467 + 101595 22e6 D653 .short 21462 + 101596 22e8 D153 .short 21457 + 101597 22ea CD53 .short 21453 + 101598 22ec C853 .short 21448 + 101599 22ee C353 .short 21443 + 101600 22f0 BE53 .short 21438 + 101601 22f2 BA53 .short 21434 + 101602 22f4 B553 .short 21429 + 101603 22f6 B053 .short 21424 + 101604 22f8 AB53 .short 21419 + 101605 22fa A753 .short 21415 + 101606 22fc A253 .short 21410 + 101607 22fe 9D53 .short 21405 + 101608 2300 9853 .short 21400 + 101609 2302 9453 .short 21396 + 101610 2304 8F53 .short 21391 + 101611 2306 8A53 .short 21386 + 101612 2308 8553 .short 21381 + 101613 230a 8053 .short 21376 + 101614 230c 7C53 .short 21372 + 101615 230e 7753 .short 21367 + 101616 2310 7253 .short 21362 + 101617 2312 6D53 .short 21357 + 101618 2314 6953 .short 21353 + 101619 2316 6453 .short 21348 + 101620 2318 5F53 .short 21343 + 101621 231a 5A53 .short 21338 + 101622 231c 5653 .short 21334 + 101623 231e 5153 .short 21329 + 101624 2320 4C53 .short 21324 + 101625 2322 4753 .short 21319 + 101626 2324 4353 .short 21315 + 101627 2326 3E53 .short 21310 + 101628 2328 3953 .short 21305 + 101629 232a 3453 .short 21300 + 101630 232c 2F53 .short 21295 + 101631 232e 2B53 .short 21291 + 101632 2330 2653 .short 21286 + 101633 2332 2153 .short 21281 + 101634 2334 1C53 .short 21276 + 101635 2336 1853 .short 21272 + ARM GAS /tmp/ccLcDeJO.s page 1780 + + + 101636 2338 1353 .short 21267 + 101637 233a 0E53 .short 21262 + 101638 233c 0953 .short 21257 + 101639 233e 0453 .short 21252 + 101640 2340 0053 .short 21248 + 101641 2342 FB52 .short 21243 + 101642 2344 F652 .short 21238 + 101643 2346 F152 .short 21233 + 101644 2348 EC52 .short 21228 + 101645 234a E852 .short 21224 + 101646 234c E352 .short 21219 + 101647 234e DE52 .short 21214 + 101648 2350 D952 .short 21209 + 101649 2352 D552 .short 21205 + 101650 2354 D052 .short 21200 + 101651 2356 CB52 .short 21195 + 101652 2358 C652 .short 21190 + 101653 235a C152 .short 21185 + 101654 235c BD52 .short 21181 + 101655 235e B852 .short 21176 + 101656 2360 B352 .short 21171 + 101657 2362 AE52 .short 21166 + 101658 2364 A952 .short 21161 + 101659 2366 A552 .short 21157 + 101660 2368 A052 .short 21152 + 101661 236a 9B52 .short 21147 + 101662 236c 9652 .short 21142 + 101663 236e 9152 .short 21137 + 101664 2370 8D52 .short 21133 + 101665 2372 8852 .short 21128 + 101666 2374 8352 .short 21123 + 101667 2376 7E52 .short 21118 + 101668 2378 7952 .short 21113 + 101669 237a 7552 .short 21109 + 101670 237c 7052 .short 21104 + 101671 237e 6B52 .short 21099 + 101672 2380 6652 .short 21094 + 101673 2382 6152 .short 21089 + 101674 2384 5D52 .short 21085 + 101675 2386 5852 .short 21080 + 101676 2388 5352 .short 21075 + 101677 238a 4E52 .short 21070 + 101678 238c 4952 .short 21065 + 101679 238e 4452 .short 21060 + 101680 2390 4052 .short 21056 + 101681 2392 3B52 .short 21051 + 101682 2394 3652 .short 21046 + 101683 2396 3152 .short 21041 + 101684 2398 2C52 .short 21036 + 101685 239a 2852 .short 21032 + 101686 239c 2352 .short 21027 + 101687 239e 1E52 .short 21022 + 101688 23a0 1952 .short 21017 + 101689 23a2 1452 .short 21012 + 101690 23a4 0F52 .short 21007 + 101691 23a6 0B52 .short 21003 + 101692 23a8 0652 .short 20998 + ARM GAS /tmp/ccLcDeJO.s page 1781 + + + 101693 23aa 0152 .short 20993 + 101694 23ac FC51 .short 20988 + 101695 23ae F751 .short 20983 + 101696 23b0 F351 .short 20979 + 101697 23b2 EE51 .short 20974 + 101698 23b4 E951 .short 20969 + 101699 23b6 E451 .short 20964 + 101700 23b8 DF51 .short 20959 + 101701 23ba DA51 .short 20954 + 101702 23bc D651 .short 20950 + 101703 23be D151 .short 20945 + 101704 23c0 CC51 .short 20940 + 101705 23c2 C751 .short 20935 + 101706 23c4 C251 .short 20930 + 101707 23c6 BD51 .short 20925 + 101708 23c8 B951 .short 20921 + 101709 23ca B451 .short 20916 + 101710 23cc AF51 .short 20911 + 101711 23ce AA51 .short 20906 + 101712 23d0 A551 .short 20901 + 101713 23d2 A051 .short 20896 + 101714 23d4 9C51 .short 20892 + 101715 23d6 9751 .short 20887 + 101716 23d8 9251 .short 20882 + 101717 23da 8D51 .short 20877 + 101718 23dc 8851 .short 20872 + 101719 23de 8351 .short 20867 + 101720 23e0 7E51 .short 20862 + 101721 23e2 7A51 .short 20858 + 101722 23e4 7551 .short 20853 + 101723 23e6 7051 .short 20848 + 101724 23e8 6B51 .short 20843 + 101725 23ea 6651 .short 20838 + 101726 23ec 6151 .short 20833 + 101727 23ee 5D51 .short 20829 + 101728 23f0 5851 .short 20824 + 101729 23f2 5351 .short 20819 + 101730 23f4 4E51 .short 20814 + 101731 23f6 4951 .short 20809 + 101732 23f8 4451 .short 20804 + 101733 23fa 3F51 .short 20799 + 101734 23fc 3B51 .short 20795 + 101735 23fe 3651 .short 20790 + 101736 2400 3151 .short 20785 + 101737 2402 2C51 .short 20780 + 101738 2404 2751 .short 20775 + 101739 2406 2251 .short 20770 + 101740 2408 1D51 .short 20765 + 101741 240a 1951 .short 20761 + 101742 240c 1451 .short 20756 + 101743 240e 0F51 .short 20751 + 101744 2410 0A51 .short 20746 + 101745 2412 0551 .short 20741 + 101746 2414 0051 .short 20736 + 101747 2416 FB50 .short 20731 + 101748 2418 F750 .short 20727 + 101749 241a F250 .short 20722 + ARM GAS /tmp/ccLcDeJO.s page 1782 + + + 101750 241c ED50 .short 20717 + 101751 241e E850 .short 20712 + 101752 2420 E350 .short 20707 + 101753 2422 DE50 .short 20702 + 101754 2424 D950 .short 20697 + 101755 2426 D450 .short 20692 + 101756 2428 D050 .short 20688 + 101757 242a CB50 .short 20683 + 101758 242c C650 .short 20678 + 101759 242e C150 .short 20673 + 101760 2430 BC50 .short 20668 + 101761 2432 B750 .short 20663 + 101762 2434 B250 .short 20658 + 101763 2436 AD50 .short 20653 + 101764 2438 A950 .short 20649 + 101765 243a A450 .short 20644 + 101766 243c 9F50 .short 20639 + 101767 243e 9A50 .short 20634 + 101768 2440 9550 .short 20629 + 101769 2442 9050 .short 20624 + 101770 2444 8B50 .short 20619 + 101771 2446 8650 .short 20614 + 101772 2448 8250 .short 20610 + 101773 244a 7D50 .short 20605 + 101774 244c 7850 .short 20600 + 101775 244e 7350 .short 20595 + 101776 2450 6E50 .short 20590 + 101777 2452 6950 .short 20585 + 101778 2454 6450 .short 20580 + 101779 2456 5F50 .short 20575 + 101780 2458 5A50 .short 20570 + 101781 245a 5650 .short 20566 + 101782 245c 5150 .short 20561 + 101783 245e 4C50 .short 20556 + 101784 2460 4750 .short 20551 + 101785 2462 4250 .short 20546 + 101786 2464 3D50 .short 20541 + 101787 2466 3850 .short 20536 + 101788 2468 3350 .short 20531 + 101789 246a 2E50 .short 20526 + 101790 246c 2950 .short 20521 + 101791 246e 2550 .short 20517 + 101792 2470 2050 .short 20512 + 101793 2472 1B50 .short 20507 + 101794 2474 1650 .short 20502 + 101795 2476 1150 .short 20497 + 101796 2478 0C50 .short 20492 + 101797 247a 0750 .short 20487 + 101798 247c 0250 .short 20482 + 101799 247e FD4F .short 20477 + 101800 2480 F84F .short 20472 + 101801 2482 F44F .short 20468 + 101802 2484 EF4F .short 20463 + 101803 2486 EA4F .short 20458 + 101804 2488 E54F .short 20453 + 101805 248a E04F .short 20448 + 101806 248c DB4F .short 20443 + ARM GAS /tmp/ccLcDeJO.s page 1783 + + + 101807 248e D64F .short 20438 + 101808 2490 D14F .short 20433 + 101809 2492 CC4F .short 20428 + 101810 2494 C74F .short 20423 + 101811 2496 C24F .short 20418 + 101812 2498 BE4F .short 20414 + 101813 249a B94F .short 20409 + 101814 249c B44F .short 20404 + 101815 249e AF4F .short 20399 + 101816 24a0 AA4F .short 20394 + 101817 24a2 A54F .short 20389 + 101818 24a4 A04F .short 20384 + 101819 24a6 9B4F .short 20379 + 101820 24a8 964F .short 20374 + 101821 24aa 914F .short 20369 + 101822 24ac 8C4F .short 20364 + 101823 24ae 874F .short 20359 + 101824 24b0 824F .short 20354 + 101825 24b2 7E4F .short 20350 + 101826 24b4 794F .short 20345 + 101827 24b6 744F .short 20340 + 101828 24b8 6F4F .short 20335 + 101829 24ba 6A4F .short 20330 + 101830 24bc 654F .short 20325 + 101831 24be 604F .short 20320 + 101832 24c0 5B4F .short 20315 + 101833 24c2 564F .short 20310 + 101834 24c4 514F .short 20305 + 101835 24c6 4C4F .short 20300 + 101836 24c8 474F .short 20295 + 101837 24ca 424F .short 20290 + 101838 24cc 3D4F .short 20285 + 101839 24ce 394F .short 20281 + 101840 24d0 344F .short 20276 + 101841 24d2 2F4F .short 20271 + 101842 24d4 2A4F .short 20266 + 101843 24d6 254F .short 20261 + 101844 24d8 204F .short 20256 + 101845 24da 1B4F .short 20251 + 101846 24dc 164F .short 20246 + 101847 24de 114F .short 20241 + 101848 24e0 0C4F .short 20236 + 101849 24e2 074F .short 20231 + 101850 24e4 024F .short 20226 + 101851 24e6 FD4E .short 20221 + 101852 24e8 F84E .short 20216 + 101853 24ea F34E .short 20211 + 101854 24ec EE4E .short 20206 + 101855 24ee E94E .short 20201 + 101856 24f0 E54E .short 20197 + 101857 24f2 E04E .short 20192 + 101858 24f4 DB4E .short 20187 + 101859 24f6 D64E .short 20182 + 101860 24f8 D14E .short 20177 + 101861 24fa CC4E .short 20172 + 101862 24fc C74E .short 20167 + 101863 24fe C24E .short 20162 + ARM GAS /tmp/ccLcDeJO.s page 1784 + + + 101864 2500 BD4E .short 20157 + 101865 2502 B84E .short 20152 + 101866 2504 B34E .short 20147 + 101867 2506 AE4E .short 20142 + 101868 2508 A94E .short 20137 + 101869 250a A44E .short 20132 + 101870 250c 9F4E .short 20127 + 101871 250e 9A4E .short 20122 + 101872 2510 954E .short 20117 + 101873 2512 904E .short 20112 + 101874 2514 8B4E .short 20107 + 101875 2516 864E .short 20102 + 101876 2518 814E .short 20097 + 101877 251a 7C4E .short 20092 + 101878 251c 784E .short 20088 + 101879 251e 734E .short 20083 + 101880 2520 6E4E .short 20078 + 101881 2522 694E .short 20073 + 101882 2524 644E .short 20068 + 101883 2526 5F4E .short 20063 + 101884 2528 5A4E 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19903 + 101916 2568 BA4D .short 19898 + 101917 256a B54D .short 19893 + 101918 256c B04D .short 19888 + 101919 256e AB4D .short 19883 + 101920 2570 A64D .short 19878 + ARM GAS /tmp/ccLcDeJO.s page 1785 + + + 101921 2572 A14D .short 19873 + 101922 2574 9C4D .short 19868 + 101923 2576 974D .short 19863 + 101924 2578 924D .short 19858 + 101925 257a 8D4D .short 19853 + 101926 257c 884D .short 19848 + 101927 257e 834D .short 19843 + 101928 2580 7E4D .short 19838 + 101929 2582 794D .short 19833 + 101930 2584 744D .short 19828 + 101931 2586 6F4D .short 19823 + 101932 2588 6A4D .short 19818 + 101933 258a 654D .short 19813 + 101934 258c 604D .short 19808 + 101935 258e 5B4D .short 19803 + 101936 2590 564D .short 19798 + 101937 2592 514D .short 19793 + 101938 2594 4C4D .short 19788 + 101939 2596 474D .short 19783 + 101940 2598 424D .short 19778 + 101941 259a 3D4D .short 19773 + 101942 259c 384D .short 19768 + 101943 259e 334D .short 19763 + 101944 25a0 2E4D .short 19758 + 101945 25a2 294D .short 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101977 25e2 884C .short 19592 + ARM GAS /tmp/ccLcDeJO.s page 1786 + + + 101978 25e4 834C .short 19587 + 101979 25e6 7E4C .short 19582 + 101980 25e8 794C .short 19577 + 101981 25ea 744C .short 19572 + 101982 25ec 6F4C .short 19567 + 101983 25ee 6A4C .short 19562 + 101984 25f0 654C .short 19557 + 101985 25f2 604C .short 19552 + 101986 25f4 5B4C .short 19547 + 101987 25f6 564C .short 19542 + 101988 25f8 514C .short 19537 + 101989 25fa 4C4C .short 19532 + 101990 25fc 474C .short 19527 + 101991 25fe 424C .short 19522 + 101992 2600 3D4C .short 19517 + 101993 2602 384C .short 19512 + 101994 2604 334C .short 19507 + 101995 2606 2E4C .short 19502 + 101996 2608 294C .short 19497 + 101997 260a 244C .short 19492 + 101998 260c 1F4C .short 19487 + 101999 260e 1A4C .short 19482 + 102000 2610 144C .short 19476 + 102001 2612 0F4C .short 19471 + 102002 2614 0A4C .short 19466 + 102003 2616 054C .short 19461 + 102004 2618 004C .short 19456 + 102005 261a FB4B .short 19451 + 102006 261c F64B .short 19446 + 102007 261e F14B .short 19441 + 102008 2620 EC4B .short 19436 + 102009 2622 E74B .short 19431 + 102010 2624 E24B .short 19426 + 102011 2626 DD4B .short 19421 + 102012 2628 D84B .short 19416 + 102013 262a D34B .short 19411 + 102014 262c CE4B .short 19406 + 102015 262e C94B .short 19401 + 102016 2630 C44B .short 19396 + 102017 2632 BE4B .short 19390 + 102018 2634 B94B .short 19385 + 102019 2636 B44B .short 19380 + 102020 2638 AF4B .short 19375 + 102021 263a AA4B .short 19370 + 102022 263c A54B .short 19365 + 102023 263e A04B .short 19360 + 102024 2640 9B4B .short 19355 + 102025 2642 964B .short 19350 + 102026 2644 914B .short 19345 + 102027 2646 8C4B .short 19340 + 102028 2648 874B .short 19335 + 102029 264a 824B .short 19330 + 102030 264c 7D4B .short 19325 + 102031 264e 774B .short 19319 + 102032 2650 724B .short 19314 + 102033 2652 6D4B .short 19309 + 102034 2654 684B .short 19304 + ARM GAS /tmp/ccLcDeJO.s page 1787 + + + 102035 2656 634B .short 19299 + 102036 2658 5E4B .short 19294 + 102037 265a 594B .short 19289 + 102038 265c 544B .short 19284 + 102039 265e 4F4B .short 19279 + 102040 2660 4A4B .short 19274 + 102041 2662 454B .short 19269 + 102042 2664 404B .short 19264 + 102043 2666 3B4B .short 19259 + 102044 2668 354B .short 19253 + 102045 266a 304B .short 19248 + 102046 266c 2B4B .short 19243 + 102047 266e 264B .short 19238 + 102048 2670 214B .short 19233 + 102049 2672 1C4B .short 19228 + 102050 2674 174B .short 19223 + 102051 2676 124B .short 19218 + 102052 2678 0D4B .short 19213 + 102053 267a 084B .short 19208 + 102054 267c 034B .short 19203 + 102055 267e FD4A .short 19197 + 102056 2680 F84A .short 19192 + 102057 2682 F34A .short 19187 + 102058 2684 EE4A .short 19182 + 102059 2686 E94A .short 19177 + 102060 2688 E44A .short 19172 + 102061 268a DF4A .short 19167 + 102062 268c DA4A .short 19162 + 102063 268e D54A .short 19157 + 102064 2690 D04A .short 19152 + 102065 2692 CB4A .short 19147 + 102066 2694 C54A .short 19141 + 102067 2696 C04A .short 19136 + 102068 2698 BB4A .short 19131 + 102069 269a B64A .short 19126 + 102070 269c B14A .short 19121 + 102071 269e AC4A .short 19116 + 102072 26a0 A74A .short 19111 + 102073 26a2 A24A .short 19106 + 102074 26a4 9D4A .short 19101 + 102075 26a6 974A .short 19095 + 102076 26a8 924A .short 19090 + 102077 26aa 8D4A .short 19085 + 102078 26ac 884A .short 19080 + 102079 26ae 834A .short 19075 + 102080 26b0 7E4A .short 19070 + 102081 26b2 794A .short 19065 + 102082 26b4 744A .short 19060 + 102083 26b6 6F4A .short 19055 + 102084 26b8 6A4A .short 19050 + 102085 26ba 644A .short 19044 + 102086 26bc 5F4A .short 19039 + 102087 26be 5A4A .short 19034 + 102088 26c0 554A .short 19029 + 102089 26c2 504A .short 19024 + 102090 26c4 4B4A .short 19019 + 102091 26c6 464A .short 19014 + ARM GAS /tmp/ccLcDeJO.s page 1788 + + + 102092 26c8 414A .short 19009 + 102093 26ca 3B4A .short 19003 + 102094 26cc 364A .short 18998 + 102095 26ce 314A .short 18993 + 102096 26d0 2C4A .short 18988 + 102097 26d2 274A .short 18983 + 102098 26d4 224A .short 18978 + 102099 26d6 1D4A .short 18973 + 102100 26d8 184A .short 18968 + 102101 26da 124A .short 18962 + 102102 26dc 0D4A .short 18957 + 102103 26de 084A .short 18952 + 102104 26e0 034A .short 18947 + 102105 26e2 FE49 .short 18942 + 102106 26e4 F949 .short 18937 + 102107 26e6 F449 .short 18932 + 102108 26e8 EF49 .short 18927 + 102109 26ea E949 .short 18921 + 102110 26ec E449 .short 18916 + 102111 26ee DF49 .short 18911 + 102112 26f0 DA49 .short 18906 + 102113 26f2 D549 .short 18901 + 102114 26f4 D049 .short 18896 + 102115 26f6 CB49 .short 18891 + 102116 26f8 C649 .short 18886 + 102117 26fa C049 .short 18880 + 102118 26fc BB49 .short 18875 + 102119 26fe B649 .short 18870 + 102120 2700 B149 .short 18865 + 102121 2702 AC49 .short 18860 + 102122 2704 A749 .short 18855 + 102123 2706 A249 .short 18850 + 102124 2708 9C49 .short 18844 + 102125 270a 9749 .short 18839 + 102126 270c 9249 .short 18834 + 102127 270e 8D49 .short 18829 + 102128 2710 8849 .short 18824 + 102129 2712 8349 .short 18819 + 102130 2714 7E49 .short 18814 + 102131 2716 7849 .short 18808 + 102132 2718 7349 .short 18803 + 102133 271a 6E49 .short 18798 + 102134 271c 6949 .short 18793 + 102135 271e 6449 .short 18788 + 102136 2720 5F49 .short 18783 + 102137 2722 5A49 .short 18778 + 102138 2724 5449 .short 18772 + 102139 2726 4F49 .short 18767 + 102140 2728 4A49 .short 18762 + 102141 272a 4549 .short 18757 + 102142 272c 4049 .short 18752 + 102143 272e 3B49 .short 18747 + 102144 2730 3649 .short 18742 + 102145 2732 3049 .short 18736 + 102146 2734 2B49 .short 18731 + 102147 2736 2649 .short 18726 + 102148 2738 2149 .short 18721 + ARM GAS /tmp/ccLcDeJO.s page 1789 + + + 102149 273a 1C49 .short 18716 + 102150 273c 1749 .short 18711 + 102151 273e 1149 .short 18705 + 102152 2740 0C49 .short 18700 + 102153 2742 0749 .short 18695 + 102154 2744 0249 .short 18690 + 102155 2746 FD48 .short 18685 + 102156 2748 F848 .short 18680 + 102157 274a F248 .short 18674 + 102158 274c ED48 .short 18669 + 102159 274e E848 .short 18664 + 102160 2750 E348 .short 18659 + 102161 2752 DE48 .short 18654 + 102162 2754 D948 .short 18649 + 102163 2756 D348 .short 18643 + 102164 2758 CE48 .short 18638 + 102165 275a C948 .short 18633 + 102166 275c C448 .short 18628 + 102167 275e BF48 .short 18623 + 102168 2760 BA48 .short 18618 + 102169 2762 B448 .short 18612 + 102170 2764 AF48 .short 18607 + 102171 2766 AA48 .short 18602 + 102172 2768 A548 .short 18597 + 102173 276a A048 .short 18592 + 102174 276c 9B48 .short 18587 + 102175 276e 9548 .short 18581 + 102176 2770 9048 .short 18576 + 102177 2772 8B48 .short 18571 + 102178 2774 8648 .short 18566 + 102179 2776 8148 .short 18561 + 102180 2778 7C48 .short 18556 + 102181 277a 7648 .short 18550 + 102182 277c 7148 .short 18545 + 102183 277e 6C48 .short 18540 + 102184 2780 6748 .short 18535 + 102185 2782 6248 .short 18530 + 102186 2784 5C48 .short 18524 + 102187 2786 5748 .short 18519 + 102188 2788 5248 .short 18514 + 102189 278a 4D48 .short 18509 + 102190 278c 4848 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28fc 8244 .short 17538 + 102375 28fe 7D44 .short 17533 + 102376 2900 7844 .short 17528 + ARM GAS /tmp/ccLcDeJO.s page 1793 + + + 102377 2902 7244 .short 17522 + 102378 2904 6D44 .short 17517 + 102379 2906 6844 .short 17512 + 102380 2908 6244 .short 17506 + 102381 290a 5D44 .short 17501 + 102382 290c 5844 .short 17496 + 102383 290e 5244 .short 17490 + 102384 2910 4D44 .short 17485 + 102385 2912 4844 .short 17480 + 102386 2914 4344 .short 17475 + 102387 2916 3D44 .short 17469 + 102388 2918 3844 .short 17464 + 102389 291a 3344 .short 17459 + 102390 291c 2D44 .short 17453 + 102391 291e 2844 .short 17448 + 102392 2920 2344 .short 17443 + 102393 2922 1D44 .short 17437 + 102394 2924 1844 .short 17432 + 102395 2926 1344 .short 17427 + 102396 2928 0D44 .short 17421 + 102397 292a 0844 .short 17416 + 102398 292c 0344 .short 17411 + 102399 292e FD43 .short 17405 + 102400 2930 F843 .short 17400 + 102401 2932 F343 .short 17395 + 102402 2934 ED43 .short 17389 + 102403 2936 E843 .short 17384 + 102404 2938 E343 .short 17379 + 102405 293a DD43 .short 17373 + 102406 293c D843 .short 17368 + 102407 293e D343 .short 17363 + 102408 2940 CD43 .short 17357 + 102409 2942 C843 .short 17352 + 102410 2944 C343 .short 17347 + 102411 2946 BD43 .short 17341 + 102412 2948 B843 .short 17336 + 102413 294a B343 .short 17331 + 102414 294c AD43 .short 17325 + 102415 294e A843 .short 17320 + 102416 2950 A343 .short 17315 + 102417 2952 9D43 .short 17309 + 102418 2954 9843 .short 17304 + 102419 2956 9343 .short 17299 + 102420 2958 8D43 .short 17293 + 102421 295a 8843 .short 17288 + 102422 295c 8343 .short 17283 + 102423 295e 7D43 .short 17277 + 102424 2960 7843 .short 17272 + 102425 2962 7343 .short 17267 + 102426 2964 6D43 .short 17261 + 102427 2966 6843 .short 17256 + 102428 2968 6343 .short 17251 + 102429 296a 5D43 .short 17245 + 102430 296c 5843 .short 17240 + 102431 296e 5343 .short 17235 + 102432 2970 4D43 .short 17229 + 102433 2972 4843 .short 17224 + ARM GAS /tmp/ccLcDeJO.s page 1794 + + + 102434 2974 4343 .short 17219 + 102435 2976 3D43 .short 17213 + 102436 2978 3843 .short 17208 + 102437 297a 3343 .short 17203 + 102438 297c 2D43 .short 17197 + 102439 297e 2843 .short 17192 + 102440 2980 2343 .short 17187 + 102441 2982 1D43 .short 17181 + 102442 2984 1843 .short 17176 + 102443 2986 1343 .short 17171 + 102444 2988 0D43 .short 17165 + 102445 298a 0843 .short 17160 + 102446 298c 0243 .short 17154 + 102447 298e FD42 .short 17149 + 102448 2990 F842 .short 17144 + 102449 2992 F242 .short 17138 + 102450 2994 ED42 .short 17133 + 102451 2996 E842 .short 17128 + 102452 2998 E242 .short 17122 + 102453 299a DD42 .short 17117 + 102454 299c D842 .short 17112 + 102455 299e D242 .short 17106 + 102456 29a0 CD42 .short 17101 + 102457 29a2 C842 .short 17096 + 102458 29a4 C242 .short 17090 + 102459 29a6 BD42 .short 17085 + 102460 29a8 B742 .short 17079 + 102461 29aa B242 .short 17074 + 102462 29ac AD42 .short 17069 + 102463 29ae A742 .short 17063 + 102464 29b0 A242 .short 17058 + 102465 29b2 9D42 .short 17053 + 102466 29b4 9742 .short 17047 + 102467 29b6 9242 .short 17042 + 102468 29b8 8D42 .short 17037 + 102469 29ba 8742 .short 17031 + 102470 29bc 8242 .short 17026 + 102471 29be 7C42 .short 17020 + 102472 29c0 7742 .short 17015 + 102473 29c2 7242 .short 17010 + 102474 29c4 6C42 .short 17004 + 102475 29c6 6742 .short 16999 + 102476 29c8 6242 .short 16994 + 102477 29ca 5C42 .short 16988 + 102478 29cc 5742 .short 16983 + 102479 29ce 5142 .short 16977 + 102480 29d0 4C42 .short 16972 + 102481 29d2 4742 .short 16967 + 102482 29d4 4142 .short 16961 + 102483 29d6 3C42 .short 16956 + 102484 29d8 3742 .short 16951 + 102485 29da 3142 .short 16945 + 102486 29dc 2C42 .short 16940 + 102487 29de 2642 .short 16934 + 102488 29e0 2142 .short 16929 + 102489 29e2 1C42 .short 16924 + 102490 29e4 1642 .short 16918 + ARM GAS /tmp/ccLcDeJO.s page 1795 + + + 102491 29e6 1142 .short 16913 + 102492 29e8 0C42 .short 16908 + 102493 29ea 0642 .short 16902 + 102494 29ec 0142 .short 16897 + 102495 29ee FB41 .short 16891 + 102496 29f0 F641 .short 16886 + 102497 29f2 F141 .short 16881 + 102498 29f4 EB41 .short 16875 + 102499 29f6 E641 .short 16870 + 102500 29f8 E041 .short 16864 + 102501 29fa DB41 .short 16859 + 102502 29fc D641 .short 16854 + 102503 29fe D041 .short 16848 + 102504 2a00 CB41 .short 16843 + 102505 2a02 C641 .short 16838 + 102506 2a04 C041 .short 16832 + 102507 2a06 BB41 .short 16827 + 102508 2a08 B541 .short 16821 + 102509 2a0a B041 .short 16816 + 102510 2a0c AB41 .short 16811 + 102511 2a0e A541 .short 16805 + 102512 2a10 A041 .short 16800 + 102513 2a12 9A41 .short 16794 + 102514 2a14 9541 .short 16789 + 102515 2a16 9041 .short 16784 + 102516 2a18 8A41 .short 16778 + 102517 2a1a 8541 .short 16773 + 102518 2a1c 7F41 .short 16767 + 102519 2a1e 7A41 .short 16762 + 102520 2a20 7541 .short 16757 + 102521 2a22 6F41 .short 16751 + 102522 2a24 6A41 .short 16746 + 102523 2a26 6441 .short 16740 + 102524 2a28 5F41 .short 16735 + 102525 2a2a 5A41 .short 16730 + 102526 2a2c 5441 .short 16724 + 102527 2a2e 4F41 .short 16719 + 102528 2a30 4941 .short 16713 + 102529 2a32 4441 .short 16708 + 102530 2a34 3F41 .short 16703 + 102531 2a36 3941 .short 16697 + 102532 2a38 3441 .short 16692 + 102533 2a3a 2E41 .short 16686 + 102534 2a3c 2941 .short 16681 + 102535 2a3e 2441 .short 16676 + 102536 2a40 1E41 .short 16670 + 102537 2a42 1941 .short 16665 + 102538 2a44 1341 .short 16659 + 102539 2a46 0E41 .short 16654 + 102540 2a48 0841 .short 16648 + 102541 2a4a 0341 .short 16643 + 102542 2a4c FE40 .short 16638 + 102543 2a4e F840 .short 16632 + 102544 2a50 F340 .short 16627 + 102545 2a52 ED40 .short 16621 + 102546 2a54 E840 .short 16616 + 102547 2a56 E340 .short 16611 + ARM GAS /tmp/ccLcDeJO.s page 1796 + + + 102548 2a58 DD40 .short 16605 + 102549 2a5a D840 .short 16600 + 102550 2a5c D240 .short 16594 + 102551 2a5e CD40 .short 16589 + 102552 2a60 C840 .short 16584 + 102553 2a62 C240 .short 16578 + 102554 2a64 BD40 .short 16573 + 102555 2a66 B740 .short 16567 + 102556 2a68 B240 .short 16562 + 102557 2a6a AC40 .short 16556 + 102558 2a6c A740 .short 16551 + 102559 2a6e A240 .short 16546 + 102560 2a70 9C40 .short 16540 + 102561 2a72 9740 .short 16535 + 102562 2a74 9140 .short 16529 + 102563 2a76 8C40 .short 16524 + 102564 2a78 8640 .short 16518 + 102565 2a7a 8140 .short 16513 + 102566 2a7c 7C40 .short 16508 + 102567 2a7e 7640 .short 16502 + 102568 2a80 7140 .short 16497 + 102569 2a82 6B40 .short 16491 + 102570 2a84 6640 .short 16486 + 102571 2a86 6040 .short 16480 + 102572 2a88 5B40 .short 16475 + 102573 2a8a 5640 .short 16470 + 102574 2a8c 5040 .short 16464 + 102575 2a8e 4B40 .short 16459 + 102576 2a90 4540 .short 16453 + 102577 2a92 4040 .short 16448 + 102578 2a94 3A40 .short 16442 + 102579 2a96 3540 .short 16437 + 102580 2a98 3040 .short 16432 + 102581 2a9a 2A40 .short 16426 + 102582 2a9c 2540 .short 16421 + 102583 2a9e 1F40 .short 16415 + 102584 2aa0 1A40 .short 16410 + 102585 2aa2 1440 .short 16404 + 102586 2aa4 0F40 .short 16399 + 102587 2aa6 0940 .short 16393 + 102588 2aa8 0440 .short 16388 + 102589 2aaa FF3F .short 16383 + 102590 2aac F93F .short 16377 + 102591 2aae F43F .short 16372 + 102592 2ab0 EE3F .short 16366 + 102593 2ab2 E93F .short 16361 + 102594 2ab4 E33F .short 16355 + 102595 2ab6 DE3F .short 16350 + 102596 2ab8 D83F .short 16344 + 102597 2aba D33F .short 16339 + 102598 2abc CE3F .short 16334 + 102599 2abe C83F .short 16328 + 102600 2ac0 C33F .short 16323 + 102601 2ac2 BD3F .short 16317 + 102602 2ac4 B83F .short 16312 + 102603 2ac6 B23F .short 16306 + 102604 2ac8 AD3F .short 16301 + ARM GAS /tmp/ccLcDeJO.s page 1797 + + + 102605 2aca A73F .short 16295 + 102606 2acc A23F .short 16290 + 102607 2ace 9D3F .short 16285 + 102608 2ad0 973F .short 16279 + 102609 2ad2 923F .short 16274 + 102610 2ad4 8C3F .short 16268 + 102611 2ad6 873F .short 16263 + 102612 2ad8 813F .short 16257 + 102613 2ada 7C3F .short 16252 + 102614 2adc 763F .short 16246 + 102615 2ade 713F .short 16241 + 102616 2ae0 6B3F .short 16235 + 102617 2ae2 663F .short 16230 + 102618 2ae4 613F .short 16225 + 102619 2ae6 5B3F .short 16219 + 102620 2ae8 563F .short 16214 + 102621 2aea 503F .short 16208 + 102622 2aec 4B3F .short 16203 + 102623 2aee 453F .short 16197 + 102624 2af0 403F .short 16192 + 102625 2af2 3A3F .short 16186 + 102626 2af4 353F .short 16181 + 102627 2af6 2F3F .short 16175 + 102628 2af8 2A3F .short 16170 + 102629 2afa 243F .short 16164 + 102630 2afc 1F3F .short 16159 + 102631 2afe 1A3F .short 16154 + 102632 2b00 143F .short 16148 + 102633 2b02 0F3F .short 16143 + 102634 2b04 093F .short 16137 + 102635 2b06 043F .short 16132 + 102636 2b08 FE3E .short 16126 + 102637 2b0a F93E .short 16121 + 102638 2b0c F33E .short 16115 + 102639 2b0e EE3E .short 16110 + 102640 2b10 E83E .short 16104 + 102641 2b12 E33E .short 16099 + 102642 2b14 DD3E .short 16093 + 102643 2b16 D83E .short 16088 + 102644 2b18 D23E .short 16082 + 102645 2b1a CD3E .short 16077 + 102646 2b1c C73E .short 16071 + 102647 2b1e C23E .short 16066 + 102648 2b20 BD3E .short 16061 + 102649 2b22 B73E .short 16055 + 102650 2b24 B23E .short 16050 + 102651 2b26 AC3E .short 16044 + 102652 2b28 A73E .short 16039 + 102653 2b2a A13E .short 16033 + 102654 2b2c 9C3E .short 16028 + 102655 2b2e 963E .short 16022 + 102656 2b30 913E .short 16017 + 102657 2b32 8B3E .short 16011 + 102658 2b34 863E .short 16006 + 102659 2b36 803E .short 16000 + 102660 2b38 7B3E .short 15995 + 102661 2b3a 753E .short 15989 + ARM GAS /tmp/ccLcDeJO.s page 1798 + + + 102662 2b3c 703E .short 15984 + 102663 2b3e 6A3E .short 15978 + 102664 2b40 653E .short 15973 + 102665 2b42 5F3E .short 15967 + 102666 2b44 5A3E .short 15962 + 102667 2b46 543E .short 15956 + 102668 2b48 4F3E .short 15951 + 102669 2b4a 493E .short 15945 + 102670 2b4c 443E .short 15940 + 102671 2b4e 3E3E .short 15934 + 102672 2b50 393E .short 15929 + 102673 2b52 333E .short 15923 + 102674 2b54 2E3E .short 15918 + 102675 2b56 283E .short 15912 + 102676 2b58 233E .short 15907 + 102677 2b5a 1D3E .short 15901 + 102678 2b5c 183E .short 15896 + 102679 2b5e 123E .short 15890 + 102680 2b60 0D3E .short 15885 + 102681 2b62 073E .short 15879 + 102682 2b64 023E .short 15874 + 102683 2b66 FC3D .short 15868 + 102684 2b68 F73D .short 15863 + 102685 2b6a F13D .short 15857 + 102686 2b6c EC3D .short 15852 + 102687 2b6e E63D .short 15846 + 102688 2b70 E13D .short 15841 + 102689 2b72 DB3D .short 15835 + 102690 2b74 D63D .short 15830 + 102691 2b76 D03D .short 15824 + 102692 2b78 CB3D .short 15819 + 102693 2b7a C53D .short 15813 + 102694 2b7c C03D .short 15808 + 102695 2b7e BA3D .short 15802 + 102696 2b80 B53D .short 15797 + 102697 2b82 AF3D .short 15791 + 102698 2b84 AA3D .short 15786 + 102699 2b86 A43D .short 15780 + 102700 2b88 9F3D .short 15775 + 102701 2b8a 993D .short 15769 + 102702 2b8c 943D .short 15764 + 102703 2b8e 8E3D .short 15758 + 102704 2b90 893D .short 15753 + 102705 2b92 833D .short 15747 + 102706 2b94 7E3D .short 15742 + 102707 2b96 783D .short 15736 + 102708 2b98 733D .short 15731 + 102709 2b9a 6D3D .short 15725 + 102710 2b9c 683D .short 15720 + 102711 2b9e 623D .short 15714 + 102712 2ba0 5D3D .short 15709 + 102713 2ba2 573D .short 15703 + 102714 2ba4 523D .short 15698 + 102715 2ba6 4C3D .short 15692 + 102716 2ba8 473D .short 15687 + 102717 2baa 413D .short 15681 + 102718 2bac 3C3D .short 15676 + ARM GAS /tmp/ccLcDeJO.s page 1799 + + + 102719 2bae 363D .short 15670 + 102720 2bb0 313D .short 15665 + 102721 2bb2 2B3D .short 15659 + 102722 2bb4 263D .short 15654 + 102723 2bb6 203D .short 15648 + 102724 2bb8 1B3D .short 15643 + 102725 2bba 153D .short 15637 + 102726 2bbc 103D .short 15632 + 102727 2bbe 0A3D .short 15626 + 102728 2bc0 043D .short 15620 + 102729 2bc2 FF3C .short 15615 + 102730 2bc4 F93C .short 15609 + 102731 2bc6 F43C .short 15604 + 102732 2bc8 EE3C .short 15598 + 102733 2bca E93C .short 15593 + 102734 2bcc E33C .short 15587 + 102735 2bce DE3C .short 15582 + 102736 2bd0 D83C .short 15576 + 102737 2bd2 D33C .short 15571 + 102738 2bd4 CD3C .short 15565 + 102739 2bd6 C83C .short 15560 + 102740 2bd8 C23C .short 15554 + 102741 2bda BD3C .short 15549 + 102742 2bdc B73C .short 15543 + 102743 2bde B23C .short 15538 + 102744 2be0 AC3C .short 15532 + 102745 2be2 A73C .short 15527 + 102746 2be4 A13C .short 15521 + 102747 2be6 9B3C .short 15515 + 102748 2be8 963C .short 15510 + 102749 2bea 903C .short 15504 + 102750 2bec 8B3C .short 15499 + 102751 2bee 853C .short 15493 + 102752 2bf0 803C .short 15488 + 102753 2bf2 7A3C .short 15482 + 102754 2bf4 753C .short 15477 + 102755 2bf6 6F3C .short 15471 + 102756 2bf8 6A3C .short 15466 + 102757 2bfa 643C .short 15460 + 102758 2bfc 5F3C .short 15455 + 102759 2bfe 593C .short 15449 + 102760 2c00 533C .short 15443 + 102761 2c02 4E3C .short 15438 + 102762 2c04 483C .short 15432 + 102763 2c06 433C .short 15427 + 102764 2c08 3D3C .short 15421 + 102765 2c0a 383C .short 15416 + 102766 2c0c 323C .short 15410 + 102767 2c0e 2D3C .short 15405 + 102768 2c10 273C .short 15399 + 102769 2c12 223C .short 15394 + 102770 2c14 1C3C .short 15388 + 102771 2c16 163C .short 15382 + 102772 2c18 113C .short 15377 + 102773 2c1a 0B3C .short 15371 + 102774 2c1c 063C .short 15366 + 102775 2c1e 003C .short 15360 + ARM GAS /tmp/ccLcDeJO.s page 1800 + + + 102776 2c20 FB3B .short 15355 + 102777 2c22 F53B .short 15349 + 102778 2c24 F03B .short 15344 + 102779 2c26 EA3B .short 15338 + 102780 2c28 E53B .short 15333 + 102781 2c2a DF3B .short 15327 + 102782 2c2c D93B .short 15321 + 102783 2c2e D43B .short 15316 + 102784 2c30 CE3B .short 15310 + 102785 2c32 C93B .short 15305 + 102786 2c34 C33B .short 15299 + 102787 2c36 BE3B .short 15294 + 102788 2c38 B83B .short 15288 + 102789 2c3a B33B .short 15283 + 102790 2c3c AD3B .short 15277 + 102791 2c3e A73B .short 15271 + 102792 2c40 A23B .short 15266 + 102793 2c42 9C3B .short 15260 + 102794 2c44 973B .short 15255 + 102795 2c46 913B .short 15249 + 102796 2c48 8C3B .short 15244 + 102797 2c4a 863B .short 15238 + 102798 2c4c 803B .short 15232 + 102799 2c4e 7B3B .short 15227 + 102800 2c50 753B .short 15221 + 102801 2c52 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.short 15043 + ARM GAS /tmp/ccLcDeJO.s page 1801 + + + 102833 2c92 BD3A .short 15037 + 102834 2c94 B83A .short 15032 + 102835 2c96 B23A .short 15026 + 102836 2c98 AD3A .short 15021 + 102837 2c9a A73A .short 15015 + 102838 2c9c A23A .short 15010 + 102839 2c9e 9C3A .short 15004 + 102840 2ca0 963A .short 14998 + 102841 2ca2 913A .short 14993 + 102842 2ca4 8B3A .short 14987 + 102843 2ca6 863A .short 14982 + 102844 2ca8 803A .short 14976 + 102845 2caa 7A3A .short 14970 + 102846 2cac 753A .short 14965 + 102847 2cae 6F3A .short 14959 + 102848 2cb0 6A3A .short 14954 + 102849 2cb2 643A .short 14948 + 102850 2cb4 5E3A .short 14942 + 102851 2cb6 593A .short 14937 + 102852 2cb8 533A .short 14931 + 102853 2cba 4E3A .short 14926 + 102854 2cbc 483A .short 14920 + 102855 2cbe 423A .short 14914 + 102856 2cc0 3D3A .short 14909 + 102857 2cc2 373A .short 14903 + 102858 2cc4 323A .short 14898 + 102859 2cc6 2C3A .short 14892 + 102860 2cc8 263A .short 14886 + 102861 2cca 213A .short 14881 + 102862 2ccc 1B3A .short 14875 + 102863 2cce 163A .short 14870 + 102864 2cd0 103A .short 14864 + 102865 2cd2 0B3A .short 14859 + 102866 2cd4 053A .short 14853 + 102867 2cd6 FF39 .short 14847 + 102868 2cd8 FA39 .short 14842 + 102869 2cda F439 .short 14836 + 102870 2cdc EE39 .short 14830 + 102871 2cde E939 .short 14825 + 102872 2ce0 E339 .short 14819 + 102873 2ce2 DE39 .short 14814 + 102874 2ce4 D839 .short 14808 + 102875 2ce6 D239 .short 14802 + 102876 2ce8 CD39 .short 14797 + 102877 2cea C739 .short 14791 + 102878 2cec C239 .short 14786 + 102879 2cee BC39 .short 14780 + 102880 2cf0 B639 .short 14774 + 102881 2cf2 B139 .short 14769 + 102882 2cf4 AB39 .short 14763 + 102883 2cf6 A639 .short 14758 + 102884 2cf8 A039 .short 14752 + 102885 2cfa 9A39 .short 14746 + 102886 2cfc 9539 .short 14741 + 102887 2cfe 8F39 .short 14735 + 102888 2d00 8A39 .short 14730 + 102889 2d02 8439 .short 14724 + ARM GAS /tmp/ccLcDeJO.s page 1802 + + + 102890 2d04 7E39 .short 14718 + 102891 2d06 7939 .short 14713 + 102892 2d08 7339 .short 14707 + 102893 2d0a 6D39 .short 14701 + 102894 2d0c 6839 .short 14696 + 102895 2d0e 6239 .short 14690 + 102896 2d10 5D39 .short 14685 + 102897 2d12 5739 .short 14679 + 102898 2d14 5139 .short 14673 + 102899 2d16 4C39 .short 14668 + 102900 2d18 4639 .short 14662 + 102901 2d1a 4139 .short 14657 + 102902 2d1c 3B39 .short 14651 + 102903 2d1e 3539 .short 14645 + 102904 2d20 3039 .short 14640 + 102905 2d22 2A39 .short 14634 + 102906 2d24 2439 .short 14628 + 102907 2d26 1F39 .short 14623 + 102908 2d28 1939 .short 14617 + 102909 2d2a 1439 .short 14612 + 102910 2d2c 0E39 .short 14606 + 102911 2d2e 0839 .short 14600 + 102912 2d30 0339 .short 14595 + 102913 2d32 FD38 .short 14589 + 102914 2d34 F738 .short 14583 + 102915 2d36 F238 .short 14578 + 102916 2d38 EC38 .short 14572 + 102917 2d3a E738 .short 14567 + 102918 2d3c E138 .short 14561 + 102919 2d3e DB38 .short 14555 + 102920 2d40 D638 .short 14550 + 102921 2d42 D038 .short 14544 + 102922 2d44 CA38 .short 14538 + 102923 2d46 C538 .short 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104885 3c9a A60A .short 2726 + 104886 3c9c A00A .short 2720 + 104887 3c9e 9A0A .short 2714 + 104888 3ca0 940A .short 2708 + 104889 3ca2 8D0A .short 2701 + 104890 3ca4 870A .short 2695 + 104891 3ca6 810A .short 2689 + 104892 3ca8 7B0A .short 2683 + 104893 3caa 740A .short 2676 + 104894 3cac 6E0A .short 2670 + 104895 3cae 680A .short 2664 + 104896 3cb0 620A .short 2658 + 104897 3cb2 5B0A .short 2651 + 104898 3cb4 550A .short 2645 + 104899 3cb6 4F0A .short 2639 + 104900 3cb8 480A .short 2632 + 104901 3cba 420A .short 2626 + 104902 3cbc 3C0A .short 2620 + 104903 3cbe 360A .short 2614 + 104904 3cc0 2F0A .short 2607 + 104905 3cc2 290A .short 2601 + 104906 3cc4 230A .short 2595 + 104907 3cc6 1D0A .short 2589 + 104908 3cc8 160A .short 2582 + 104909 3cca 100A .short 2576 + 104910 3ccc 0A0A .short 2570 + 104911 3cce 040A .short 2564 + 104912 3cd0 FD09 .short 2557 + 104913 3cd2 F709 .short 2551 + 104914 3cd4 F109 .short 2545 + 104915 3cd6 EB09 .short 2539 + 104916 3cd8 E409 .short 2532 + 104917 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9107 .short 1937 + 105012 3d98 8A07 .short 1930 + 105013 3d9a 8407 .short 1924 + 105014 3d9c 7E07 .short 1918 + 105015 3d9e 7807 .short 1912 + 105016 3da0 7107 .short 1905 + 105017 3da2 6B07 .short 1899 + 105018 3da4 6507 .short 1893 + 105019 3da6 5F07 .short 1887 + 105020 3da8 5807 .short 1880 + 105021 3daa 5207 .short 1874 + 105022 3dac 4C07 .short 1868 + 105023 3dae 4507 .short 1861 + 105024 3db0 3F07 .short 1855 + 105025 3db2 3907 .short 1849 + 105026 3db4 3307 .short 1843 + 105027 3db6 2C07 .short 1836 + 105028 3db8 2607 .short 1830 + 105029 3dba 2007 .short 1824 + 105030 3dbc 1A07 .short 1818 + 105031 3dbe 1307 .short 1811 + 105032 3dc0 0D07 .short 1805 + 105033 3dc2 0707 .short 1799 + 105034 3dc4 0007 .short 1792 + 105035 3dc6 FA06 .short 1786 + 105036 3dc8 F406 .short 1780 + 105037 3dca EE06 .short 1774 + 105038 3dcc E706 .short 1767 + 105039 3dce E106 .short 1761 + 105040 3dd0 DB06 .short 1755 + 105041 3dd2 D506 .short 1749 + 105042 3dd4 CE06 .short 1742 + 105043 3dd6 C806 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1341 + 105107 3e56 3605 .short 1334 + 105108 3e58 3005 .short 1328 + 105109 3e5a 2A05 .short 1322 + 105110 3e5c 2305 .short 1315 + 105111 3e5e 1D05 .short 1309 + 105112 3e60 1705 .short 1303 + ARM GAS /tmp/ccLcDeJO.s page 1841 + + + 105113 3e62 1105 .short 1297 + 105114 3e64 0A05 .short 1290 + 105115 3e66 0405 .short 1284 + 105116 3e68 FE04 .short 1278 + 105117 3e6a F804 .short 1272 + 105118 3e6c F104 .short 1265 + 105119 3e6e EB04 .short 1259 + 105120 3e70 E504 .short 1253 + 105121 3e72 DE04 .short 1246 + 105122 3e74 D804 .short 1240 + 105123 3e76 D204 .short 1234 + 105124 3e78 CC04 .short 1228 + 105125 3e7a C504 .short 1221 + 105126 3e7c BF04 .short 1215 + 105127 3e7e B904 .short 1209 + 105128 3e80 B204 .short 1202 + 105129 3e82 AC04 .short 1196 + 105130 3e84 A604 .short 1190 + 105131 3e86 A004 .short 1184 + 105132 3e88 9904 .short 1177 + 105133 3e8a 9304 .short 1171 + 105134 3e8c 8D04 .short 1165 + 105135 3e8e 8704 .short 1159 + 105136 3e90 8004 .short 1152 + 105137 3e92 7A04 .short 1146 + 105138 3e94 7404 .short 1140 + 105139 3e96 6D04 .short 1133 + 105140 3e98 6704 .short 1127 + 105141 3e9a 6104 .short 1121 + 105142 3e9c 5B04 .short 1115 + 105143 3e9e 5404 .short 1108 + 105144 3ea0 4E04 .short 1102 + 105145 3ea2 4804 .short 1096 + 105146 3ea4 4104 .short 1089 + 105147 3ea6 3B04 .short 1083 + 105148 3ea8 3504 .short 1077 + 105149 3eaa 2F04 .short 1071 + 105150 3eac 2804 .short 1064 + 105151 3eae 2204 .short 1058 + 105152 3eb0 1C04 .short 1052 + 105153 3eb2 1504 .short 1045 + 105154 3eb4 0F04 .short 1039 + 105155 3eb6 0904 .short 1033 + 105156 3eb8 0304 .short 1027 + 105157 3eba FC03 .short 1020 + 105158 3ebc F603 .short 1014 + 105159 3ebe F003 .short 1008 + 105160 3ec0 EA03 .short 1002 + 105161 3ec2 E303 .short 995 + 105162 3ec4 DD03 .short 989 + 105163 3ec6 D703 .short 983 + 105164 3ec8 D003 .short 976 + 105165 3eca CA03 .short 970 + 105166 3ecc C403 .short 964 + 105167 3ece BE03 .short 958 + 105168 3ed0 B703 .short 951 + 105169 3ed2 B103 .short 945 + ARM GAS /tmp/ccLcDeJO.s page 1842 + + + 105170 3ed4 AB03 .short 939 + 105171 3ed6 A403 .short 932 + 105172 3ed8 9E03 .short 926 + 105173 3eda 9803 .short 920 + 105174 3edc 9203 .short 914 + 105175 3ede 8B03 .short 907 + 105176 3ee0 8503 .short 901 + 105177 3ee2 7F03 .short 895 + 105178 3ee4 7803 .short 888 + 105179 3ee6 7203 .short 882 + 105180 3ee8 6C03 .short 876 + 105181 3eea 6603 .short 870 + 105182 3eec 5F03 .short 863 + 105183 3eee 5903 .short 857 + 105184 3ef0 5303 .short 851 + 105185 3ef2 4C03 .short 844 + 105186 3ef4 4603 .short 838 + 105187 3ef6 4003 .short 832 + 105188 3ef8 3A03 .short 826 + 105189 3efa 3303 .short 819 + 105190 3efc 2D03 .short 813 + 105191 3efe 2703 .short 807 + 105192 3f00 2103 .short 801 + 105193 3f02 1A03 .short 794 + 105194 3f04 1403 .short 788 + 105195 3f06 0E03 .short 782 + 105196 3f08 0703 .short 775 + 105197 3f0a 0103 .short 769 + 105198 3f0c FB02 .short 763 + 105199 3f0e F502 .short 757 + 105200 3f10 EE02 .short 750 + 105201 3f12 E802 .short 744 + 105202 3f14 E202 .short 738 + 105203 3f16 DB02 .short 731 + 105204 3f18 D502 .short 725 + 105205 3f1a CF02 .short 719 + 105206 3f1c C902 .short 713 + 105207 3f1e C202 .short 706 + 105208 3f20 BC02 .short 700 + 105209 3f22 B602 .short 694 + 105210 3f24 AF02 .short 687 + 105211 3f26 A902 .short 681 + 105212 3f28 A302 .short 675 + 105213 3f2a 9D02 .short 669 + 105214 3f2c 9602 .short 662 + 105215 3f2e 9002 .short 656 + 105216 3f30 8A02 .short 650 + 105217 3f32 8302 .short 643 + 105218 3f34 7D02 .short 637 + 105219 3f36 7702 .short 631 + 105220 3f38 7102 .short 625 + 105221 3f3a 6A02 .short 618 + 105222 3f3c 6402 .short 612 + 105223 3f3e 5E02 .short 606 + 105224 3f40 5802 .short 600 + 105225 3f42 5102 .short 593 + 105226 3f44 4B02 .short 587 + ARM GAS /tmp/ccLcDeJO.s page 1843 + + + 105227 3f46 4502 .short 581 + 105228 3f48 3E02 .short 574 + 105229 3f4a 3802 .short 568 + 105230 3f4c 3202 .short 562 + 105231 3f4e 2C02 .short 556 + 105232 3f50 2502 .short 549 + 105233 3f52 1F02 .short 543 + 105234 3f54 1902 .short 537 + 105235 3f56 1202 .short 530 + 105236 3f58 0C02 .short 524 + 105237 3f5a 0602 .short 518 + 105238 3f5c 0002 .short 512 + 105239 3f5e F901 .short 505 + 105240 3f60 F301 .short 499 + 105241 3f62 ED01 .short 493 + 105242 3f64 E601 .short 486 + 105243 3f66 E001 .short 480 + 105244 3f68 DA01 .short 474 + 105245 3f6a D401 .short 468 + 105246 3f6c CD01 .short 461 + 105247 3f6e C701 .short 455 + 105248 3f70 C101 .short 449 + 105249 3f72 BA01 .short 442 + 105250 3f74 B401 .short 436 + 105251 3f76 AE01 .short 430 + 105252 3f78 A801 .short 424 + 105253 3f7a A101 .short 417 + 105254 3f7c 9B01 .short 411 + 105255 3f7e 9501 .short 405 + 105256 3f80 8E01 .short 398 + 105257 3f82 8801 .short 392 + 105258 3f84 8201 .short 386 + 105259 3f86 7C01 .short 380 + 105260 3f88 7501 .short 373 + 105261 3f8a 6F01 .short 367 + 105262 3f8c 6901 .short 361 + 105263 3f8e 6201 .short 354 + 105264 3f90 5C01 .short 348 + 105265 3f92 5601 .short 342 + 105266 3f94 5001 .short 336 + 105267 3f96 4901 .short 329 + 105268 3f98 4301 .short 323 + 105269 3f9a 3D01 .short 317 + 105270 3f9c 3701 .short 311 + 105271 3f9e 3001 .short 304 + 105272 3fa0 2A01 .short 298 + 105273 3fa2 2401 .short 292 + 105274 3fa4 1D01 .short 285 + 105275 3fa6 1701 .short 279 + 105276 3fa8 1101 .short 273 + 105277 3faa 0B01 .short 267 + 105278 3fac 0401 .short 260 + 105279 3fae FE00 .short 254 + 105280 3fb0 F800 .short 248 + 105281 3fb2 F100 .short 241 + 105282 3fb4 EB00 .short 235 + 105283 3fb6 E500 .short 229 + ARM GAS /tmp/ccLcDeJO.s page 1844 + + + 105284 3fb8 DF00 .short 223 + 105285 3fba D800 .short 216 + 105286 3fbc D200 .short 210 + 105287 3fbe CC00 .short 204 + 105288 3fc0 C500 .short 197 + 105289 3fc2 BF00 .short 191 + 105290 3fc4 B900 .short 185 + 105291 3fc6 B300 .short 179 + 105292 3fc8 AC00 .short 172 + 105293 3fca A600 .short 166 + 105294 3fcc A000 .short 160 + 105295 3fce 9900 .short 153 + 105296 3fd0 9300 .short 147 + 105297 3fd2 8D00 .short 141 + 105298 3fd4 8700 .short 135 + 105299 3fd6 8000 .short 128 + 105300 3fd8 7A00 .short 122 + 105301 3fda 7400 .short 116 + 105302 3fdc 6D00 .short 109 + 105303 3fde 6700 .short 103 + 105304 3fe0 6100 .short 97 + 105305 3fe2 5B00 .short 91 + 105306 3fe4 5400 .short 84 + 105307 3fe6 4E00 .short 78 + 105308 3fe8 4800 .short 72 + 105309 3fea 4100 .short 65 + 105310 3fec 3B00 .short 59 + 105311 3fee 3500 .short 53 + 105312 3ff0 2F00 .short 47 + 105313 3ff2 2800 .short 40 + 105314 3ff4 2200 .short 34 + 105315 3ff6 1C00 .short 28 + 105316 3ff8 1500 .short 21 + 105317 3ffa 0F00 .short 15 + 105318 3ffc 0900 .short 9 + 105319 3ffe 0300 .short 3 + 105320 .section .rodata.cos_factorsQ31_128,"a" + 105321 .align 2 + 105324 cos_factorsQ31_128: + 105325 0000 1662FF7F .word 2147443222 + 105326 0004 D172FA7F .word 2147119825 + 105327 0008 7894F07F .word 2146473080 + 105328 000c 6BC7E17F .word 2145503083 + 105329 0010 3E0CCE7F .word 2144209982 + 105330 0014 B363B57F .word 2142593971 + 105331 0018 BDCE977F .word 2140655293 + 105332 001c 804E757F .word 2138394240 + 105333 0020 51E44D7F .word 2135811153 + 105334 0024 B491217F .word 2132906420 + 105335 0028 6058F07E .word 2129680480 + 105336 002c 393ABA7E .word 2126133817 + 105337 0030 57397F7E .word 2122266967 + 105338 0034 FF573F7E .word 2118080511 + 105339 0038 A898FA7D .word 2113575080 + 105340 003c F8FDB07D .word 2108751352 + 105341 0040 C68A627D .word 2103610054 + 105342 0044 18420F7D .word 2098151960 + ARM GAS /tmp/ccLcDeJO.s page 1845 + + + 105343 0048 2427B77C .word 2092377892 + 105344 004c 503D5A7C .word 2086288720 + 105345 0050 3088F87B .word 2079885360 + 105346 0054 890B927B .word 2073168777 + 105347 0058 4FCB267B .word 2066139983 + 105348 005c A4CBB67A .word 2058800036 + 105349 0060 D810427A .word 2051150040 + 105350 0064 6E9FC879 .word 2043191150 + 105351 0068 127C4A79 .word 2034924562 + 105352 006c A2ABC778 .word 2026351522 + 105353 0070 29334078 .word 2017473321 + 105354 0074 DF17B477 .word 2008291295 + 105355 0078 2D5F2377 .word 1998806829 + 105356 007c A60E8E76 .word 1989021350 + 105357 0080 0B2CF475 .word 1978936331 + 105358 0084 4CBD5575 .word 1968553292 + 105359 0088 84C8B274 .word 1957873796 + 105360 008c FB530B74 .word 1946899451 + 105361 0090 26665F73 .word 1935631910 + 105362 0094 A705AF72 .word 1924072871 + 105363 0098 4939FA71 .word 1912224073 + 105364 009c 05084171 .word 1900087301 + 105365 00a0 FF788370 .word 1887664383 + 105366 00a4 8593C16F .word 1874957189 + 105367 00a8 125FFB6E .word 1861967634 + 105368 00ac 4AE3306E .word 1848697674 + 105369 00b0 FA27626D .word 1835149306 + 105370 00b4 1C358F6C .word 1821324572 + 105371 00b8 D112B86B .word 1807225553 + 105372 00bc 64C9DC6A .word 1792854372 + 105373 00c0 4A61FD69 .word 1778213194 + 105374 00c4 20E31969 .word 1763304224 + 105375 00c8 AB573268 .word 1748129707 + 105376 00cc D8C74667 .word 1732691928 + 105377 00d0 BB3C5766 .word 1716993211 + 105378 00d4 92BF6365 .word 1701035922 + 105379 00d8 BF596C64 .word 1684822463 + 105380 00dc CC147163 .word 1668355276 + 105381 00e0 69FA7162 .word 1651636841 + 105382 00e4 6C146F61 .word 1634669676 + 105383 00e8 CF6C6860 .word 1617456335 + 105384 00ec B30D5E5F .word 1599999411 + 105385 00f0 5D01505E .word 1582301533 + 105386 00f4 37523E5D .word 1564365367 + 105387 00f8 CC0A295C .word 1546193612 + 105388 00fc CF35105B .word 1527789007 + 105389 0100 12DEF359 .word 1509154322 + 105390 0104 8C0ED458 .word 1490292364 + 105391 0108 56D2B057 .word 1471205974 + 105392 010c A9348A56 .word 1451898025 + 105393 0110 E2406055 .word 1432371426 + 105394 0114 7D023354 .word 1412629117 + 105395 0118 18850253 .word 1392674072 + 105396 011c 6ED4CE51 .word 1372509294 + 105397 0120 5EFC9750 .word 1352137822 + 105398 0124 E3085E4F .word 1331562723 + 105399 0128 1706214E .word 1310787095 + ARM GAS /tmp/ccLcDeJO.s page 1846 + + + 105400 012c 3400E14C .word 1289814068 + 105401 0130 90039E4B .word 1268646800 + 105402 0134 9E1C584A .word 1247288478 + 105403 0138 EE570F49 .word 1225742318 + 105404 013c 2FC2C347 .word 1204011567 + 105405 0140 28687546 .word 1182099496 + 105406 0144 BD562445 .word 1160009405 + 105407 0148 ED9AD043 .word 1137744621 + 105408 014c D0417A42 .word 1115308496 + 105409 0150 9B582141 .word 1092704411 + 105410 0154 98ECC53F .word 1069935768 + 105411 0158 2C0B683E .word 1047005996 + 105412 015c D6C1073D .word 1023918550 + 105413 0160 291EA53B .word 1000676905 + 105414 0164 D22D403A .word 977284562 + 105415 0168 93FED838 .word 953745043 + 105416 016c 469E6F37 .word 930061894 + 105417 0170 D91A0436 .word 906238681 + 105418 0174 50829634 .word 882278992 + 105419 0178 C3E22633 .word 858186435 + 105420 017c 5E4AB531 .word 833964638 + 105421 0180 61C74130 .word 809617249 + 105422 0184 1E68CC2E .word 785147934 + 105423 0188 FC3A552D .word 760560380 + 105424 018c 6F4EDC2B .word 735858287 + 105425 0190 01B1612A .word 711045377 + 105426 0194 4B71E528 .word 686125387 + 105427 0198 F49D6727 .word 661102068 + 105428 019c B645E825 .word 635979190 + 105429 01a0 58776724 .word 610760536 + 105430 01a4 AF41E522 .word 585449903 + 105431 01a8 A0B36121 .word 560051104 + 105432 01ac 1BDCDC1F .word 534567963 + 105433 01b0 1ECA561E .word 509004318 + 105434 01b4 B38CCF1C .word 483364019 + 105435 01b8 EF32471B .word 457650927 + 105436 01bc F3CBBD19 .word 431868915 + 105437 01c0 E9663318 .word 406021865 + 105438 01c4 0513A816 .word 380113669 + 105439 01c8 86DF1B15 .word 354148230 + 105440 01cc B1DB8E13 .word 328129457 + 105441 01d0 D5160112 .word 302061269 + 105442 01d4 48A07210 .word 275947592 + 105443 01d8 6687E30E .word 249792358 + 105444 01dc 92DB530D .word 223599506 + 105445 01e0 35ACC30B .word 197372981 + 105446 01e4 BD08330A .word 171116733 + 105447 01e8 9A00A208 .word 144834714 + 105448 01ec 45A31007 .word 118530885 + 105449 01f0 35007F05 .word 92209205 + 105450 01f4 E626ED03 .word 65873638 + 105451 01f8 D7265B02 .word 39528151 + 105452 01fc 880FC900 .word 13176712 + 105453 .section .rodata.cos_factorsQ31_2048,"a" + 105454 .align 2 + 105457 cos_factorsQ31_2048: + 105458 0000 62FFFF7F .word 2147483490 + ARM GAS /tmp/ccLcDeJO.s page 1847 + + + 105459 0004 73FAFF7F .word 2147482227 + 105460 0008 94F0FF7F .word 2147479700 + 105461 000c C6E1FF7F .word 2147475910 + 105462 0010 09CEFF7F .word 2147470857 + 105463 0014 5CB5FF7F .word 2147464540 + 105464 0018 C197FF7F .word 2147456961 + 105465 001c 3675FF7F .word 2147448118 + 105466 0020 BB4DFF7F .word 2147438011 + 105467 0024 5121FF7F .word 2147426641 + 105468 0028 F8EFFE7F .word 2147414008 + 105469 002c B0B9FE7F .word 2147400112 + 105470 0030 797EFE7F .word 2147384953 + 105471 0034 523EFE7F .word 2147368530 + 105472 0038 3CF9FD7F .word 2147350844 + 105473 003c 37AFFD7F .word 2147331895 + 105474 0040 4260FD7F .word 2147311682 + 105475 0044 5F0CFD7F .word 2147290207 + 105476 0048 8CB3FC7F .word 2147267468 + 105477 004c CA55FC7F .word 2147243466 + 105478 0050 19F3FB7F .word 2147218201 + 105479 0054 788BFB7F .word 2147191672 + 105480 0058 E91EFB7F .word 2147163881 + 105481 005c 6AADFA7F .word 2147134826 + 105482 0060 FC36FA7F .word 2147104508 + 105483 0064 A0BBF97F .word 2147072928 + 105484 0068 543BF97F .word 2147040084 + 105485 006c 19B6F87F .word 2147005977 + 105486 0070 EF2BF87F .word 2146970607 + 105487 0074 D69CF77F .word 2146933974 + 105488 0078 CE08F77F .word 2146896078 + 105489 007c D76FF67F .word 2146856919 + 105490 0080 F1D1F57F .word 2146816497 + 105491 0084 1D2FF57F .word 2146774813 + 105492 0088 5987F47F .word 2146731865 + 105493 008c A6DAF37F .word 2146687654 + 105494 0090 0529F37F .word 2146642181 + 105495 0094 7572F27F .word 2146595445 + 105496 0098 F6B6F17F .word 2146547446 + 105497 009c 88F6F07F .word 2146498184 + 105498 00a0 2C31F07F .word 2146447660 + 105499 00a4 E166EF7F .word 2146395873 + 105500 00a8 A797EE7F .word 2146342823 + 105501 00ac 7EC3ED7F .word 2146288510 + 105502 00b0 67EAEC7F .word 2146232935 + 105503 00b4 620CEC7F .word 2146176098 + 105504 00b8 6D29EB7F .word 2146117997 + 105505 00bc 8B41EA7F .word 2146058635 + 105506 00c0 BA54E97F .word 2145998010 + 105507 00c4 FA62E87F .word 2145936122 + 105508 00c8 4C6CE77F .word 2145872972 + 105509 00cc B070E67F .word 2145808560 + 105510 00d0 2570E57F .word 2145742885 + 105511 00d4 AC6AE47F .word 2145675948 + 105512 00d8 4560E37F .word 2145607749 + 105513 00dc EF50E27F .word 2145538287 + 105514 00e0 AC3CE17F .word 2145467564 + 105515 00e4 7A23E07F .word 2145395578 + ARM GAS /tmp/ccLcDeJO.s page 1848 + + + 105516 00e8 5A05DF7F .word 2145322330 + 105517 00ec 4DE2DD7F .word 2145247821 + 105518 00f0 51BADC7F .word 2145172049 + 105519 00f4 678DDB7F .word 2145095015 + 105520 00f8 8F5BDA7F .word 2145016719 + 105521 00fc CA24D97F .word 2144937162 + 105522 0100 17E9D77F .word 2144856343 + 105523 0104 75A8D67F .word 2144774261 + 105524 0108 E762D57F .word 2144690919 + 105525 010c 6A18D47F .word 2144606314 + 105526 0110 00C9D27F .word 2144520448 + 105527 0114 A874D17F .word 2144433320 + 105528 0118 631BD07F .word 2144344931 + 105529 011c 31BDCE7F .word 2144255281 + 105530 0120 115ACD7F .word 2144164369 + 105531 0124 03F2CB7F .word 2144072195 + 105532 0128 0885CA7F .word 2143978760 + 105533 012c 2013C97F .word 2143884064 + 105534 0130 4B9CC77F .word 2143788107 + 105535 0134 8920C67F .word 2143690889 + 105536 0138 DA9FC47F .word 2143592410 + 105537 013c 3D1AC37F .word 2143492669 + 105538 0140 B48FC17F .word 2143391668 + 105539 0144 3E00C07F .word 2143289406 + 105540 0148 DB6BBE7F .word 2143185883 + 105541 014c 8BD2BC7F .word 2143081099 + 105542 0150 4E34BB7F .word 2142975054 + 105543 0154 2591B97F .word 2142867749 + 105544 0158 0FE9B77F .word 2142759183 + 105545 015c 0D3CB67F .word 2142649357 + 105546 0160 1E8AB47F .word 2142538270 + 105547 0164 43D3B27F .word 2142425923 + 105548 0168 7B17B17F .word 2142312315 + 105549 016c C756AF7F .word 2142197447 + 105550 0170 2791AD7F .word 2142081319 + 105551 0174 9BC6AB7F .word 2141963931 + 105552 0178 23F7A97F .word 2141845283 + 105553 017c BF22A87F .word 2141725375 + 105554 0180 6E49A67F .word 2141604206 + 105555 0184 326BA47F .word 2141481778 + 105556 0188 0B88A27F .word 2141358091 + 105557 018c F79FA07F .word 2141233143 + 105558 0190 F8B29E7F .word 2141106936 + 105559 0194 0DC19C7F .word 2140979469 + 105560 0198 37CA9A7F .word 2140850743 + 105561 019c 76CE987F .word 2140720758 + 105562 01a0 C9CD967F .word 2140589513 + 105563 01a4 31C8947F .word 2140457009 + 105564 01a8 ADBD927F .word 2140323245 + 105565 01ac 3FAE907F .word 2140188223 + 105566 01b0 E6998E7F .word 2140051942 + 105567 01b4 A1808C7F .word 2139914401 + 105568 01b8 72628A7F .word 2139775602 + 105569 01bc 583F887F .word 2139635544 + 105570 01c0 5317867F .word 2139494227 + 105571 01c4 64EA837F .word 2139351652 + 105572 01c8 8AB8817F .word 2139207818 + ARM GAS /tmp/ccLcDeJO.s page 1849 + + + 105573 01cc C6817F7F .word 2139062726 + 105574 01d0 17467D7F .word 2138916375 + 105575 01d4 7E057B7F .word 2138768766 + 105576 01d8 FBBF787F .word 2138619899 + 105577 01dc 8E75767F .word 2138469774 + 105578 01e0 3726747F .word 2138318391 + 105579 01e4 F6D1717F .word 2138165750 + 105580 01e8 CB786F7F .word 2138011851 + 105581 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24911819 + 116160 7f10 67D77501 .word 24500071 + 116161 7f14 038F6F01 .word 24088323 + 116162 7f18 9D466901 .word 23676573 + 116163 7f1c 37FE6201 .word 23264823 + 116164 7f20 D0B55C01 .word 22853072 + 116165 7f24 686D5601 .word 22441320 + 116166 7f28 FF245001 .word 22029567 + 116167 7f2c 96DC4901 .word 21617814 + 116168 7f30 2B944301 .word 21206059 + 116169 7f34 C04B3D01 .word 20794304 + 116170 7f38 54033701 .word 20382548 + 116171 7f3c E7BA3001 .word 19970791 + 116172 7f40 7A722A01 .word 19559034 + 116173 7f44 0C2A2401 .word 19147276 + 116174 7f48 9DE11D01 .word 18735517 + 116175 7f4c 2E991701 .word 18323758 + 116176 7f50 BE501101 .word 17911998 + 116177 7f54 4D080B01 .word 17500237 + 116178 7f58 DBBF0401 .word 17088475 + ARM GAS /tmp/ccLcDeJO.s page 2035 + + + 116179 7f5c 6977FE00 .word 16676713 + 116180 7f60 F62EF800 .word 16264950 + 116181 7f64 83E6F100 .word 15853187 + 116182 7f68 0F9EEB00 .word 15441423 + 116183 7f6c 9B55E500 .word 15029659 + 116184 7f70 260DDF00 .word 14617894 + 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3500085 + 116212 7fe0 B61F2F00 .word 3088310 + 116213 7fe4 38D72800 .word 2676536 + 116214 7fe8 B98E2200 .word 2264761 + 116215 7fec 3B461C00 .word 1852987 + 116216 7ff0 BCFD1500 .word 1441212 + 116217 7ff4 3DB50F00 .word 1029437 + 116218 7ff8 BE6C0900 .word 617662 + 116219 7ffc 3F240300 .word 205887 + 116220 .section .rodata.cos_factors_128,"a" + 116221 .align 2 + 116224 cos_factors_128: + 116225 0000 C4FE7F3F .word 1065352900 + 116226 0004 E6F47F3F .word 1065350374 + 116227 0008 29E17F3F .word 1065345321 + 116228 000c 8FC37F3F .word 1065337743 + 116229 0010 189C7F3F .word 1065327640 + 116230 0014 C76A7F3F .word 1065315015 + 116231 0018 9D2F7F3F .word 1065299869 + 116232 001c 9DEA7E3F .word 1065282205 + 116233 0020 C99B7E3F .word 1065262025 + 116234 0024 23437E3F .word 1065239331 + 116235 0028 B1E07D3F .word 1065214129 + 116236 002c 74747D3F .word 1065186420 + 116237 0030 73FE7C3F .word 1065156211 + ARM GAS /tmp/ccLcDeJO.s page 2036 + + + 116238 0034 B07E7C3F .word 1065123504 + 116239 0038 31F57B3F .word 1065088305 + 116240 003c FC617B3F .word 1065050620 + 116241 0040 16C57A3F .word 1065010454 + 116242 0044 841E7A3F .word 1064967812 + 116243 0048 4E6E793F .word 1064922702 + 116244 004c 7BB4783F .word 1064875131 + 116245 0050 10F1773F .word 1064825104 + 116246 0054 1724773F .word 1064772631 + 116247 0058 974D763F .word 1064717719 + 116248 005c 976D753F .word 1064660375 + 116249 0060 2284743F .word 1064600610 + 116250 0064 3F91733F .word 1064538431 + 116251 0068 F894723F .word 1064473848 + 116252 006c 578F713F .word 1064406871 + 116253 0070 6680703F .word 1064337510 + 116254 0074 30686F3F .word 1064265776 + 116255 0078 BE466E3F .word 1064191678 + 116256 007c 1D1C6D3F .word 1064115229 + 116257 0080 58E86B3F .word 1064036440 + 116258 0084 7BAB6A3F .word 1063955323 + 116259 0088 9165693F .word 1063871889 + 116260 008c A816683F .word 1063786152 + 116261 0090 CCBE663F .word 1063698124 + 116262 0094 0B5E653F .word 1063607819 + 116263 0098 73F4633F .word 1063515251 + 116264 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0100 BCE7333F .word 1060366268 + 116290 0104 1DA8313F .word 1060218909 + 116291 0108 A5612F3F .word 1060069797 + 116292 010c 69142D3F .word 1059918953 + 116293 0110 82C02A3F .word 1059766402 + 116294 0114 0566283F .word 1059612165 + ARM GAS /tmp/ccLcDeJO.s page 2037 + + + 116295 0118 0A05263F .word 1059456266 + 116296 011c A99D233F .word 1059298729 + 116297 0120 F92F213F .word 1059139577 + 116298 0124 12BC1E3F .word 1058978834 + 116299 0128 0C421C3F .word 1058816524 + 116300 012c 00C2193F .word 1058652672 + 116301 0130 073C173F .word 1058487303 + 116302 0134 39B0143F .word 1058320441 + 116303 0138 B01E123F .word 1058152112 + 116304 013c 84870F3F .word 1057982340 + 116305 0140 D0EA0C3F .word 1057811152 + 116306 0144 AD480A3F .word 1057638573 + 116307 0148 36A1073F .word 1057464630 + 116308 014c 84F4043F .word 1057289348 + 116309 0150 B142023F .word 1057112753 + 116310 0154 B217FF3E .word 1056905138 + 116311 0158 2DA0F93E .word 1056546861 + 116312 015c 071FF43E .word 1056186119 + 116313 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01c4 9840353E .word 1043677336 + 116339 01c8 FCDE283E .word 1042865916 + 116340 01cc DE761C3E .word 1042052830 + 116341 01d0 B708103E .word 1041238199 + 116342 01d4 0295033E .word 1040422146 + 116343 01d8 7638EE3D .word 1039022198 + 116344 01dc B93DD53D .word 1037385145 + 116345 01e0 C33ABC3D .word 1035745987 + 116346 01e4 8C30A33D .word 1034104972 + 116347 01e8 0A208A3D .word 1032462346 + 116348 01ec 6914623D .word 1029837929 + 116349 01f0 07E02F3D .word 1026547719 + 116350 01f4 BA49FB3C .word 1023101370 + 116351 01f8 B6C9963C .word 1016514998 + ARM GAS /tmp/ccLcDeJO.s page 2038 + + + 116352 01fc 880FC93B .word 1003032456 + 116353 .section .rodata.cos_factors_2048,"a" + 116354 .align 2 + 116357 cos_factors_2048: + 116358 0000 FFFF7F3F .word 1065353215 + 116359 0004 F5FF7F3F .word 1065353205 + 116360 0008 E1FF7F3F .word 1065353185 + 116361 000c C4FF7F3F .word 1065353156 + 116362 0010 9CFF7F3F .word 1065353116 + 116363 0014 6BFF7F3F .word 1065353067 + 116364 0018 30FF7F3F .word 1065353008 + 116365 001c EAFE7F3F .word 1065352938 + 116366 0020 9BFE7F3F .word 1065352859 + 116367 0024 43FE7F3F .word 1065352771 + 116368 0028 E0FD7F3F .word 1065352672 + 116369 002c 73FD7F3F .word 1065352563 + 116370 0030 FDFC7F3F .word 1065352445 + 116371 0034 7DFC7F3F .word 1065352317 + 116372 0038 F2FB7F3F .word 1065352178 + 116373 003c 5EFB7F3F .word 1065352030 + 116374 0040 C1FA7F3F .word 1065351873 + 116375 0044 19FA7F3F .word 1065351705 + 116376 0048 67F97F3F .word 1065351527 + 116377 004c ACF87F3F .word 1065351340 + 116378 0050 E6F77F3F .word 1065351142 + 116379 0054 17F77F3F .word 1065350935 + 116380 0058 3EF67F3F .word 1065350718 + 116381 005c 5BF57F3F .word 1065350491 + 116382 0060 6EF47F3F .word 1065350254 + 116383 0064 77F37F3F .word 1065350007 + 116384 0068 77F27F3F .word 1065349751 + 116385 006c 6CF17F3F .word 1065349484 + 116386 0070 58F07F3F .word 1065349208 + 116387 0074 3AEF7F3F .word 1065348922 + 116388 0078 12EE7F3F .word 1065348626 + 116389 007c E0EC7F3F .word 1065348320 + 116390 0080 A4EB7F3F .word 1065348004 + 116391 0084 5EEA7F3F .word 1065347678 + 116392 0088 0FE97F3F .word 1065347343 + 116393 008c B5E77F3F .word 1065346997 + 116394 0090 52E67F3F .word 1065346642 + 116395 0094 E5E47F3F .word 1065346277 + 116396 0098 6EE37F3F .word 1065345902 + 116397 009c EDE17F3F .word 1065345517 + 116398 00a0 62E07F3F .word 1065345122 + 116399 00a4 CEDE7F3F .word 1065344718 + 116400 00a8 2FDD7F3F .word 1065344303 + 116401 00ac 87DB7F3F .word 1065343879 + 116402 00b0 D5D97F3F .word 1065343445 + 116403 00b4 19D87F3F .word 1065343001 + 116404 00b8 53D67F3F .word 1065342547 + 116405 00bc 83D47F3F .word 1065342083 + 116406 00c0 A9D27F3F .word 1065341609 + 116407 00c4 C6D07F3F .word 1065341126 + 116408 00c8 D9CE7F3F .word 1065340633 + 116409 00cc E1CC7F3F .word 1065340129 + 116410 00d0 E0CA7F3F .word 1065339616 + ARM GAS /tmp/ccLcDeJO.s page 2039 + + + 116411 00d4 D5C87F3F .word 1065339093 + 116412 00d8 C1C67F3F .word 1065338561 + 116413 00dc A2C47F3F .word 1065338018 + 116414 00e0 79C27F3F .word 1065337465 + 116415 00e4 47C07F3F .word 1065336903 + 116416 00e8 0BBE7F3F .word 1065336331 + 116417 00ec C5BB7F3F .word 1065335749 + 116418 00f0 75B97F3F .word 1065335157 + 116419 00f4 1BB77F3F .word 1065334555 + 116420 00f8 B7B47F3F .word 1065333943 + 116421 00fc 4AB27F3F .word 1065333322 + 116422 0100 D2AF7F3F .word 1065332690 + 116423 0104 51AD7F3F .word 1065332049 + 116424 0108 C6AA7F3F .word 1065331398 + 116425 010c 31A87F3F .word 1065330737 + 116426 0110 92A57F3F .word 1065330066 + 116427 0114 E9A27F3F .word 1065329385 + 116428 0118 37A07F3F .word 1065328695 + 116429 011c 7A9D7F3F .word 1065327994 + 116430 0120 B49A7F3F .word 1065327284 + 116431 0124 E4977F3F .word 1065326564 + 116432 0128 0A957F3F .word 1065325834 + 116433 012c 26927F3F .word 1065325094 + 116434 0130 398F7F3F .word 1065324345 + 116435 0134 418C7F3F .word 1065323585 + 116436 0138 40897F3F .word 1065322816 + 116437 013c 34867F3F .word 1065322036 + 116438 0140 1F837F3F .word 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1065298320 + 116464 01a8 7B257F3F .word 1065297275 + 116465 01ac 5C217F3F .word 1065296220 + 116466 01b0 341D7F3F .word 1065295156 + 116467 01b4 01197F3F .word 1065294081 + ARM GAS /tmp/ccLcDeJO.s page 2040 + + + 116468 01b8 C5147F3F .word 1065292997 + 116469 01bc 7F107F3F .word 1065291903 + 116470 01c0 2F0C7F3F .word 1065290799 + 116471 01c4 D5077F3F .word 1065289685 + 116472 01c8 71037F3F .word 1065288561 + 116473 01cc 04FF7E3F .word 1065287428 + 116474 01d0 8CFA7E3F .word 1065286284 + 116475 01d4 0BF67E3F .word 1065285131 + 116476 01d8 80F17E3F .word 1065283968 + 116477 01dc EBEC7E3F .word 1065282795 + 116478 01e0 4CE87E3F .word 1065281612 + 116479 01e4 A4E37E3F .word 1065280420 + 116480 01e8 F2DE7E3F .word 1065279218 + 116481 01ec 35DA7E3F .word 1065278005 + 116482 01f0 6FD57E3F .word 1065276783 + 116483 01f4 A0D07E3F .word 1065275552 + 116484 01f8 C6CB7E3F .word 1065274310 + 116485 01fc E3C67E3F .word 1065273059 + 116486 0200 F5C17E3F .word 1065271797 + 116487 0204 FEBC7E3F .word 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2b3e 8821 .short 8584 + 140858 2b40 8309 .short 2435 + 140859 2b42 9321 .short 8595 + 140860 2b44 8A09 .short 2442 + 140861 2b46 9E21 .short 8606 + 140862 2b48 9109 .short 2449 + 140863 2b4a A821 .short 8616 + 140864 2b4c 9709 .short 2455 + 140865 2b4e B321 .short 8627 + 140866 2b50 9E09 .short 2462 + 140867 2b52 BE21 .short 8638 + 140868 2b54 A409 .short 2468 + 140869 2b56 C821 .short 8648 + 140870 2b58 AB09 .short 2475 + 140871 2b5a D321 .short 8659 + ARM GAS /tmp/ccLcDeJO.s page 2468 + + + 140872 2b5c B209 .short 2482 + 140873 2b5e DE21 .short 8670 + 140874 2b60 B809 .short 2488 + 140875 2b62 E821 .short 8680 + 140876 2b64 BF09 .short 2495 + 140877 2b66 F321 .short 8691 + 140878 2b68 C609 .short 2502 + 140879 2b6a FE21 .short 8702 + 140880 2b6c CC09 .short 2508 + 140881 2b6e 0822 .short 8712 + 140882 2b70 D309 .short 2515 + 140883 2b72 1322 .short 8723 + 140884 2b74 DA09 .short 2522 + 140885 2b76 1E22 .short 8734 + 140886 2b78 E009 .short 2528 + 140887 2b7a 2822 .short 8744 + 140888 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540A .short 2644 + 140921 2bbe DC22 .short 8924 + 140922 2bc0 5B0A .short 2651 + 140923 2bc2 E722 .short 8935 + 140924 2bc4 610A .short 2657 + 140925 2bc6 F122 .short 8945 + 140926 2bc8 680A .short 2664 + 140927 2bca FC22 .short 8956 + 140928 2bcc 6F0A .short 2671 + ARM GAS /tmp/ccLcDeJO.s page 2469 + + + 140929 2bce 0623 .short 8966 + 140930 2bd0 760A .short 2678 + 140931 2bd2 1123 .short 8977 + 140932 2bd4 7D0A .short 2685 + 140933 2bd6 1B23 .short 8987 + 140934 2bd8 840A .short 2692 + 140935 2bda 2623 .short 8998 + 140936 2bdc 8B0A .short 2699 + 140937 2bde 3023 .short 9008 + 140938 2be0 920A .short 2706 + 140939 2be2 3B23 .short 9019 + 140940 2be4 990A .short 2713 + 140941 2be6 4523 .short 9029 + 140942 2be8 9F0A .short 2719 + 140943 2bea 5023 .short 9040 + 140944 2bec A60A .short 2726 + 140945 2bee 5A23 .short 9050 + 140946 2bf0 AD0A .short 2733 + 140947 2bf2 6523 .short 9061 + 140948 2bf4 B40A .short 2740 + 140949 2bf6 6F23 .short 9071 + 140950 2bf8 BB0A .short 2747 + 140951 2bfa 7A23 .short 9082 + 140952 2bfc C20A .short 2754 + 140953 2bfe 8423 .short 9092 + 140954 2c00 C90A .short 2761 + 140955 2c02 8E23 .short 9102 + 140956 2c04 D00A .short 2768 + 140957 2c06 9923 .short 9113 + 140958 2c08 D70A .short 2775 + 140959 2c0a A323 .short 9123 + 140960 2c0c DE0A .short 2782 + 140961 2c0e AE23 .short 9134 + 140962 2c10 E50A .short 2789 + 140963 2c12 B823 .short 9144 + 140964 2c14 EC0A .short 2796 + 140965 2c16 C323 .short 9155 + 140966 2c18 F30A .short 2803 + 140967 2c1a CD23 .short 9165 + 140968 2c1c FA0A .short 2810 + 140969 2c1e D723 .short 9175 + 140970 2c20 010B .short 2817 + 140971 2c22 E223 .short 9186 + 140972 2c24 080B .short 2824 + 140973 2c26 EC23 .short 9196 + 140974 2c28 0F0B .short 2831 + 140975 2c2a F723 .short 9207 + 140976 2c2c 160B .short 2838 + 140977 2c2e 0124 .short 9217 + 140978 2c30 1E0B .short 2846 + 140979 2c32 0B24 .short 9227 + 140980 2c34 250B .short 2853 + 140981 2c36 1624 .short 9238 + 140982 2c38 2C0B .short 2860 + 140983 2c3a 2024 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.short 2974 + 141015 2c7a C524 .short 9413 + 141016 2c7c A50B .short 2981 + 141017 2c7e D024 .short 9424 + 141018 2c80 AD0B .short 2989 + 141019 2c82 DA24 .short 9434 + 141020 2c84 B40B .short 2996 + 141021 2c86 E424 .short 9444 + 141022 2c88 BB0B .short 3003 + 141023 2c8a EF24 .short 9455 + 141024 2c8c C20B .short 3010 + 141025 2c8e F924 .short 9465 + 141026 2c90 CA0B .short 3018 + 141027 2c92 0325 .short 9475 + 141028 2c94 D10B .short 3025 + 141029 2c96 0D25 .short 9485 + 141030 2c98 D80B .short 3032 + 141031 2c9a 1825 .short 9496 + 141032 2c9c E00B .short 3040 + 141033 2c9e 2225 .short 9506 + 141034 2ca0 E70B .short 3047 + 141035 2ca2 2C25 .short 9516 + 141036 2ca4 EE0B .short 3054 + 141037 2ca6 3625 .short 9526 + 141038 2ca8 F50B .short 3061 + 141039 2caa 4125 .short 9537 + 141040 2cac FD0B .short 3069 + 141041 2cae 4B25 .short 9547 + 141042 2cb0 040C .short 3076 + ARM GAS /tmp/ccLcDeJO.s page 2471 + + + 141043 2cb2 5525 .short 9557 + 141044 2cb4 0B0C .short 3083 + 141045 2cb6 5F25 .short 9567 + 141046 2cb8 130C .short 3091 + 141047 2cba 6925 .short 9577 + 141048 2cbc 1A0C .short 3098 + 141049 2cbe 7425 .short 9588 + 141050 2cc0 210C .short 3105 + 141051 2cc2 7E25 .short 9598 + 141052 2cc4 290C .short 3113 + 141053 2cc6 8825 .short 9608 + 141054 2cc8 300C .short 3120 + 141055 2cca 9225 .short 9618 + 141056 2ccc 380C .short 3128 + 141057 2cce 9C25 .short 9628 + 141058 2cd0 3F0C .short 3135 + 141059 2cd2 A625 .short 9638 + 141060 2cd4 460C .short 3142 + 141061 2cd6 B125 .short 9649 + 141062 2cd8 4E0C .short 3150 + 141063 2cda BB25 .short 9659 + 141064 2cdc 550C .short 3157 + 141065 2cde C525 .short 9669 + 141066 2ce0 5D0C .short 3165 + 141067 2ce2 CF25 .short 9679 + 141068 2ce4 640C .short 3172 + 141069 2ce6 D925 .short 9689 + 141070 2ce8 6B0C .short 3179 + 141071 2cea E325 .short 9699 + 141072 2cec 730C .short 3187 + 141073 2cee ED25 .short 9709 + 141074 2cf0 7A0C .short 3194 + 141075 2cf2 F825 .short 9720 + 141076 2cf4 820C .short 3202 + 141077 2cf6 0226 .short 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3322 + 141109 2d36 A326 .short 9891 + 141110 2d38 020D .short 3330 + 141111 2d3a AD26 .short 9901 + 141112 2d3c 090D .short 3337 + 141113 2d3e B726 .short 9911 + 141114 2d40 110D .short 3345 + 141115 2d42 C126 .short 9921 + 141116 2d44 190D .short 3353 + 141117 2d46 CB26 .short 9931 + 141118 2d48 200D .short 3360 + 141119 2d4a D526 .short 9941 + 141120 2d4c 280D .short 3368 + 141121 2d4e DF26 .short 9951 + 141122 2d50 300D .short 3376 + 141123 2d52 E926 .short 9961 + 141124 2d54 370D .short 3383 + 141125 2d56 F326 .short 9971 + 141126 2d58 3F0D .short 3391 + 141127 2d5a FD26 .short 9981 + 141128 2d5c 460D .short 3398 + 141129 2d5e 0727 .short 9991 + 141130 2d60 4E0D .short 3406 + 141131 2d62 1127 .short 10001 + 141132 2d64 560D .short 3414 + 141133 2d66 1A27 .short 10010 + 141134 2d68 5D0D .short 3421 + 141135 2d6a 2427 .short 10020 + 141136 2d6c 650D .short 3429 + 141137 2d6e 2E27 .short 10030 + 141138 2d70 6D0D .short 3437 + 141139 2d72 3827 .short 10040 + 141140 2d74 750D .short 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2db2 D627 .short 10198 + 141172 2db4 F10D .short 3569 + 141173 2db6 E027 .short 10208 + 141174 2db8 F90D .short 3577 + 141175 2dba EA27 .short 10218 + 141176 2dbc 010E .short 3585 + 141177 2dbe F427 .short 10228 + 141178 2dc0 080E .short 3592 + 141179 2dc2 FE27 .short 10238 + 141180 2dc4 100E .short 3600 + 141181 2dc6 0828 .short 10248 + 141182 2dc8 180E .short 3608 + 141183 2dca 1128 .short 10257 + 141184 2dcc 200E .short 3616 + 141185 2dce 1B28 .short 10267 + 141186 2dd0 280E .short 3624 + 141187 2dd2 2528 .short 10277 + 141188 2dd4 300E .short 3632 + 141189 2dd6 2F28 .short 10287 + 141190 2dd8 380E .short 3640 + 141191 2dda 3828 .short 10296 + 141192 2ddc 400E .short 3648 + 141193 2dde 4228 .short 10306 + 141194 2de0 470E .short 3655 + 141195 2de2 4C28 .short 10316 + 141196 2de4 4F0E .short 3663 + 141197 2de6 5628 .short 10326 + 141198 2de8 570E .short 3671 + 141199 2dea 6028 .short 10336 + 141200 2dec 5F0E .short 3679 + 141201 2dee 6928 .short 10345 + 141202 2df0 670E .short 3687 + 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0925 .short 9481 + 142381 3726 0B3A .short 14859 + 142382 3728 1525 .short 9493 + 142383 372a 103A .short 14864 + 142384 372c 2025 .short 9504 + 142385 372e 163A .short 14870 + 142386 3730 2C25 .short 9516 + 142387 3732 1B3A .short 14875 + 142388 3734 3725 .short 9527 + 142389 3736 203A .short 14880 + 142390 3738 4225 .short 9538 + 142391 373a 253A .short 14885 + 142392 373c 4E25 .short 9550 + 142393 373e 2B3A .short 14891 + 142394 3740 5925 .short 9561 + 142395 3742 303A .short 14896 + 142396 3744 6525 .short 9573 + 142397 3746 353A .short 14901 + 142398 3748 7025 .short 9584 + 142399 374a 3A3A .short 14906 + 142400 374c 7C25 .short 9596 + 142401 374e 3F3A .short 14911 + 142402 3750 8725 .short 9607 + 142403 3752 453A .short 14917 + 142404 3754 9225 .short 9618 + 142405 3756 4A3A .short 14922 + 142406 3758 9E25 .short 9630 + 142407 375a 4F3A .short 14927 + 142408 375c A925 .short 9641 + 142409 375e 543A .short 14932 + 142410 3760 B525 .short 9653 + ARM GAS /tmp/ccLcDeJO.s page 2495 + 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3af8 5B30 .short 12379 + 142871 3afa 0F3E .short 15887 + 142872 3afc 6730 .short 12391 + 142873 3afe 123E .short 15890 + 142874 3b00 7330 .short 12403 + 142875 3b02 153E .short 15893 + 142876 3b04 7F30 .short 12415 + 142877 3b06 183E .short 15896 + 142878 3b08 8B30 .short 12427 + 142879 3b0a 1B3E .short 15899 + 142880 3b0c 9830 .short 12440 + 142881 3b0e 1E3E .short 15902 + 142882 3b10 A430 .short 12452 + 142883 3b12 213E .short 15905 + 142884 3b14 B030 .short 12464 + 142885 3b16 243E .short 15908 + 142886 3b18 BC30 .short 12476 + 142887 3b1a 273E .short 15911 + 142888 3b1c C830 .short 12488 + 142889 3b1e 2A3E .short 15914 + 142890 3b20 D530 .short 12501 + 142891 3b22 2D3E .short 15917 + 142892 3b24 E130 .short 12513 + 142893 3b26 303E .short 15920 + 142894 3b28 ED30 .short 12525 + 142895 3b2a 333E .short 15923 + 142896 3b2c F930 .short 12537 + 142897 3b2e 363E .short 15926 + 142898 3b30 0531 .short 12549 + 142899 3b32 393E .short 15929 + 142900 3b34 1231 .short 12562 + 142901 3b36 3C3E .short 15932 + 142902 3b38 1E31 .short 12574 + 142903 3b3a 3F3E .short 15935 + 142904 3b3c 2A31 .short 12586 + 142905 3b3e 423E .short 15938 + 142906 3b40 3631 .short 12598 + 142907 3b42 453E .short 15941 + 142908 3b44 4331 .short 12611 + 142909 3b46 483E .short 15944 + 142910 3b48 4F31 .short 12623 + 142911 3b4a 4A3E .short 15946 + 142912 3b4c 5B31 .short 12635 + 142913 3b4e 4D3E .short 15949 + 142914 3b50 6731 .short 12647 + 142915 3b52 503E .short 15952 + 142916 3b54 7431 .short 12660 + 142917 3b56 533E .short 15955 + 142918 3b58 8031 .short 12672 + 142919 3b5a 563E .short 15958 + 142920 3b5c 8C31 .short 12684 + 142921 3b5e 593E .short 15961 + 142922 3b60 9831 .short 12696 + 142923 3b62 5C3E .short 15964 + ARM GAS /tmp/ccLcDeJO.s page 2504 + + + 142924 3b64 A431 .short 12708 + 142925 3b66 5E3E .short 15966 + 142926 3b68 B131 .short 12721 + 142927 3b6a 613E .short 15969 + 142928 3b6c BD31 .short 12733 + 142929 3b6e 643E .short 15972 + 142930 3b70 C931 .short 12745 + 142931 3b72 673E .short 15975 + 142932 3b74 D531 .short 12757 + 142933 3b76 6A3E .short 15978 + 142934 3b78 E231 .short 12770 + 142935 3b7a 6C3E .short 15980 + 142936 3b7c EE31 .short 12782 + 142937 3b7e 6F3E .short 15983 + 142938 3b80 FA31 .short 12794 + 142939 3b82 723E .short 15986 + 142940 3b84 0732 .short 12807 + 142941 3b86 753E .short 15989 + 142942 3b88 1332 .short 12819 + 142943 3b8a 773E .short 15991 + 142944 3b8c 1F32 .short 12831 + 142945 3b8e 7A3E .short 15994 + 142946 3b90 2B32 .short 12843 + 142947 3b92 7D3E .short 15997 + 142948 3b94 3832 .short 12856 + 142949 3b96 803E .short 16000 + 142950 3b98 4432 .short 12868 + 142951 3b9a 823E .short 16002 + 142952 3b9c 5032 .short 12880 + 142953 3b9e 853E .short 16005 + 142954 3ba0 5C32 .short 12892 + 142955 3ba2 883E .short 16008 + 142956 3ba4 6932 .short 12905 + 142957 3ba6 8A3E .short 16010 + 142958 3ba8 7532 .short 12917 + 142959 3baa 8D3E .short 16013 + 142960 3bac 8132 .short 12929 + 142961 3bae 903E .short 16016 + 142962 3bb0 8E32 .short 12942 + 142963 3bb2 923E .short 16018 + 142964 3bb4 9A32 .short 12954 + 142965 3bb6 953E .short 16021 + 142966 3bb8 A632 .short 12966 + 142967 3bba 983E .short 16024 + 142968 3bbc B232 .short 12978 + 142969 3bbe 9A3E .short 16026 + 142970 3bc0 BF32 .short 12991 + 142971 3bc2 9D3E .short 16029 + 142972 3bc4 CB32 .short 13003 + 142973 3bc6 9F3E .short 16031 + 142974 3bc8 D732 .short 13015 + 142975 3bca A23E .short 16034 + 142976 3bcc E432 .short 13028 + 142977 3bce A53E .short 16037 + 142978 3bd0 F032 .short 13040 + 142979 3bd2 A73E .short 16039 + 142980 3bd4 FC32 .short 13052 + ARM GAS /tmp/ccLcDeJO.s page 2505 + + + 142981 3bd6 AA3E .short 16042 + 142982 3bd8 0833 .short 13064 + 142983 3bda AC3E .short 16044 + 142984 3bdc 1533 .short 13077 + 142985 3bde AF3E .short 16047 + 142986 3be0 2133 .short 13089 + 142987 3be2 B13E .short 16049 + 142988 3be4 2D33 .short 13101 + 142989 3be6 B43E .short 16052 + 142990 3be8 3A33 .short 13114 + 142991 3bea B63E .short 16054 + 142992 3bec 4633 .short 13126 + 142993 3bee B93E .short 16057 + 142994 3bf0 5233 .short 13138 + 142995 3bf2 BB3E .short 16059 + 142996 3bf4 5F33 .short 13151 + 142997 3bf6 BE3E .short 16062 + 142998 3bf8 6B33 .short 13163 + 142999 3bfa C03E .short 16064 + 143000 3bfc 7733 .short 13175 + 143001 3bfe C33E .short 16067 + 143002 3c00 8433 .short 13188 + 143003 3c02 C53E .short 16069 + 143004 3c04 9033 .short 13200 + 143005 3c06 C83E .short 16072 + 143006 3c08 9C33 .short 13212 + 143007 3c0a CA3E .short 16074 + 143008 3c0c A933 .short 13225 + 143009 3c0e CC3E .short 16076 + 143010 3c10 B533 .short 13237 + 143011 3c12 CF3E .short 16079 + 143012 3c14 C133 .short 13249 + 143013 3c16 D13E .short 16081 + 143014 3c18 CE33 .short 13262 + 143015 3c1a D43E .short 16084 + 143016 3c1c DA33 .short 13274 + 143017 3c1e D63E .short 16086 + 143018 3c20 E633 .short 13286 + 143019 3c22 D83E .short 16088 + 143020 3c24 F333 .short 13299 + 143021 3c26 DB3E .short 16091 + 143022 3c28 FF33 .short 13311 + 143023 3c2a DD3E .short 16093 + 143024 3c2c 0B34 .short 13323 + 143025 3c2e E03E .short 16096 + 143026 3c30 1834 .short 13336 + 143027 3c32 E23E .short 16098 + 143028 3c34 2434 .short 13348 + 143029 3c36 E43E .short 16100 + 143030 3c38 3034 .short 13360 + 143031 3c3a E73E .short 16103 + 143032 3c3c 3D34 .short 13373 + 143033 3c3e E93E .short 16105 + 143034 3c40 4934 .short 13385 + 143035 3c42 EB3E .short 16107 + 143036 3c44 5534 .short 13397 + 143037 3c46 ED3E .short 16109 + ARM GAS /tmp/ccLcDeJO.s page 2506 + + + 143038 3c48 6234 .short 13410 + 143039 3c4a F03E .short 16112 + 143040 3c4c 6E34 .short 13422 + 143041 3c4e F23E .short 16114 + 143042 3c50 7B34 .short 13435 + 143043 3c52 F43E .short 16116 + 143044 3c54 8734 .short 13447 + 143045 3c56 F73E .short 16119 + 143046 3c58 9334 .short 13459 + 143047 3c5a F93E .short 16121 + 143048 3c5c A034 .short 13472 + 143049 3c5e FB3E .short 16123 + 143050 3c60 AC34 .short 13484 + 143051 3c62 FD3E .short 16125 + 143052 3c64 B834 .short 13496 + 143053 3c66 003F .short 16128 + 143054 3c68 C534 .short 13509 + 143055 3c6a 023F .short 16130 + 143056 3c6c D134 .short 13521 + 143057 3c6e 043F .short 16132 + 143058 3c70 DD34 .short 13533 + 143059 3c72 063F .short 16134 + 143060 3c74 EA34 .short 13546 + 143061 3c76 083F .short 16136 + 143062 3c78 F634 .short 13558 + 143063 3c7a 0A3F .short 16138 + 143064 3c7c 0335 .short 13571 + 143065 3c7e 0D3F .short 16141 + 143066 3c80 0F35 .short 13583 + 143067 3c82 0F3F .short 16143 + 143068 3c84 1B35 .short 13595 + 143069 3c86 113F .short 16145 + 143070 3c88 2835 .short 13608 + 143071 3c8a 133F .short 16147 + 143072 3c8c 3435 .short 13620 + 143073 3c8e 153F .short 16149 + 143074 3c90 4035 .short 13632 + 143075 3c92 173F .short 16151 + 143076 3c94 4D35 .short 13645 + 143077 3c96 193F .short 16153 + 143078 3c98 5935 .short 13657 + 143079 3c9a 1C3F .short 16156 + 143080 3c9c 6635 .short 13670 + 143081 3c9e 1E3F .short 16158 + 143082 3ca0 7235 .short 13682 + 143083 3ca2 203F .short 16160 + 143084 3ca4 7E35 .short 13694 + 143085 3ca6 223F .short 16162 + 143086 3ca8 8B35 .short 13707 + 143087 3caa 243F .short 16164 + 143088 3cac 9735 .short 13719 + 143089 3cae 263F .short 16166 + 143090 3cb0 A435 .short 13732 + 143091 3cb2 283F .short 16168 + 143092 3cb4 B035 .short 13744 + 143093 3cb6 2A3F .short 16170 + 143094 3cb8 BC35 .short 13756 + ARM GAS /tmp/ccLcDeJO.s page 2507 + + + 143095 3cba 2C3F .short 16172 + 143096 3cbc C935 .short 13769 + 143097 3cbe 2E3F .short 16174 + 143098 3cc0 D535 .short 13781 + 143099 3cc2 303F .short 16176 + 143100 3cc4 E235 .short 13794 + 143101 3cc6 323F .short 16178 + 143102 3cc8 EE35 .short 13806 + 143103 3cca 343F .short 16180 + 143104 3ccc FA35 .short 13818 + 143105 3cce 363F .short 16182 + 143106 3cd0 0736 .short 13831 + 143107 3cd2 383F .short 16184 + 143108 3cd4 1336 .short 13843 + 143109 3cd6 3A3F .short 16186 + 143110 3cd8 2036 .short 13856 + 143111 3cda 3C3F .short 16188 + 143112 3cdc 2C36 .short 13868 + 143113 3cde 3E3F .short 16190 + 143114 3ce0 3936 .short 13881 + 143115 3ce2 403F .short 16192 + 143116 3ce4 4536 .short 13893 + 143117 3ce6 423F .short 16194 + 143118 3ce8 5136 .short 13905 + 143119 3cea 433F .short 16195 + 143120 3cec 5E36 .short 13918 + 143121 3cee 453F .short 16197 + 143122 3cf0 6A36 .short 13930 + 143123 3cf2 473F .short 16199 + 143124 3cf4 7736 .short 13943 + 143125 3cf6 493F .short 16201 + 143126 3cf8 8336 .short 13955 + 143127 3cfa 4B3F .short 16203 + 143128 3cfc 9036 .short 13968 + 143129 3cfe 4D3F .short 16205 + 143130 3d00 9C36 .short 13980 + 143131 3d02 4F3F .short 16207 + 143132 3d04 A836 .short 13992 + 143133 3d06 513F .short 16209 + 143134 3d08 B536 .short 14005 + 143135 3d0a 523F .short 16210 + 143136 3d0c C136 .short 14017 + 143137 3d0e 543F .short 16212 + 143138 3d10 CE36 .short 14030 + 143139 3d12 563F .short 16214 + 143140 3d14 DA36 .short 14042 + 143141 3d16 583F .short 16216 + 143142 3d18 E736 .short 14055 + 143143 3d1a 5A3F .short 16218 + 143144 3d1c F336 .short 14067 + 143145 3d1e 5B3F .short 16219 + 143146 3d20 FF36 .short 14079 + 143147 3d22 5D3F .short 16221 + 143148 3d24 0C37 .short 14092 + 143149 3d26 5F3F .short 16223 + 143150 3d28 1837 .short 14104 + 143151 3d2a 613F .short 16225 + ARM GAS /tmp/ccLcDeJO.s page 2508 + + + 143152 3d2c 2537 .short 14117 + 143153 3d2e 623F .short 16226 + 143154 3d30 3137 .short 14129 + 143155 3d32 643F .short 16228 + 143156 3d34 3E37 .short 14142 + 143157 3d36 663F .short 16230 + 143158 3d38 4A37 .short 14154 + 143159 3d3a 683F .short 16232 + 143160 3d3c 5737 .short 14167 + 143161 3d3e 693F .short 16233 + 143162 3d40 6337 .short 14179 + 143163 3d42 6B3F .short 16235 + 143164 3d44 6F37 .short 14191 + 143165 3d46 6D3F .short 16237 + 143166 3d48 7C37 .short 14204 + 143167 3d4a 6E3F .short 16238 + 143168 3d4c 8837 .short 14216 + 143169 3d4e 703F .short 16240 + 143170 3d50 9537 .short 14229 + 143171 3d52 723F .short 16242 + 143172 3d54 A137 .short 14241 + 143173 3d56 733F .short 16243 + 143174 3d58 AE37 .short 14254 + 143175 3d5a 753F .short 16245 + 143176 3d5c BA37 .short 14266 + 143177 3d5e 773F .short 16247 + 143178 3d60 C737 .short 14279 + 143179 3d62 783F .short 16248 + 143180 3d64 D337 .short 14291 + 143181 3d66 7A3F .short 16250 + 143182 3d68 E037 .short 14304 + 143183 3d6a 7B3F .short 16251 + 143184 3d6c EC37 .short 14316 + 143185 3d6e 7D3F .short 16253 + 143186 3d70 F937 .short 14329 + 143187 3d72 7F3F .short 16255 + 143188 3d74 0538 .short 14341 + 143189 3d76 803F .short 16256 + 143190 3d78 1138 .short 14353 + 143191 3d7a 823F .short 16258 + 143192 3d7c 1E38 .short 14366 + 143193 3d7e 833F .short 16259 + 143194 3d80 2A38 .short 14378 + 143195 3d82 853F .short 16261 + 143196 3d84 3738 .short 14391 + 143197 3d86 863F .short 16262 + 143198 3d88 4338 .short 14403 + 143199 3d8a 883F .short 16264 + 143200 3d8c 5038 .short 14416 + 143201 3d8e 893F .short 16265 + 143202 3d90 5C38 .short 14428 + 143203 3d92 8B3F .short 16267 + 143204 3d94 6938 .short 14441 + 143205 3d96 8C3F .short 16268 + 143206 3d98 7538 .short 14453 + 143207 3d9a 8E3F .short 16270 + 143208 3d9c 8238 .short 14466 + ARM GAS /tmp/ccLcDeJO.s page 2509 + + + 143209 3d9e 8F3F .short 16271 + 143210 3da0 8E38 .short 14478 + 143211 3da2 913F .short 16273 + 143212 3da4 9B38 .short 14491 + 143213 3da6 923F .short 16274 + 143214 3da8 A738 .short 14503 + 143215 3daa 943F .short 16276 + 143216 3dac B438 .short 14516 + 143217 3dae 953F .short 16277 + 143218 3db0 C038 .short 14528 + 143219 3db2 973F .short 16279 + 143220 3db4 CD38 .short 14541 + 143221 3db6 983F .short 16280 + 143222 3db8 D938 .short 14553 + 143223 3dba 993F .short 16281 + 143224 3dbc E638 .short 14566 + 143225 3dbe 9B3F .short 16283 + 143226 3dc0 F238 .short 14578 + 143227 3dc2 9C3F .short 16284 + 143228 3dc4 FF38 .short 14591 + 143229 3dc6 9E3F .short 16286 + 143230 3dc8 0B39 .short 14603 + 143231 3dca 9F3F .short 16287 + 143232 3dcc 1839 .short 14616 + 143233 3dce A03F .short 16288 + 143234 3dd0 2439 .short 14628 + 143235 3dd2 A23F .short 16290 + 143236 3dd4 3139 .short 14641 + 143237 3dd6 A33F .short 16291 + 143238 3dd8 3D39 .short 14653 + 143239 3dda A43F .short 16292 + 143240 3ddc 4A39 .short 14666 + 143241 3dde A63F .short 16294 + 143242 3de0 5639 .short 14678 + 143243 3de2 A73F .short 16295 + 143244 3de4 6339 .short 14691 + 143245 3de6 A83F .short 16296 + 143246 3de8 6F39 .short 14703 + 143247 3dea AA3F .short 16298 + 143248 3dec 7C39 .short 14716 + 143249 3dee AB3F .short 16299 + 143250 3df0 8839 .short 14728 + 143251 3df2 AC3F .short 16300 + 143252 3df4 9539 .short 14741 + 143253 3df6 AD3F .short 16301 + 143254 3df8 A139 .short 14753 + 143255 3dfa AF3F .short 16303 + 143256 3dfc AE39 .short 14766 + 143257 3dfe B03F .short 16304 + 143258 3e00 BA39 .short 14778 + 143259 3e02 B13F .short 16305 + 143260 3e04 C739 .short 14791 + 143261 3e06 B23F .short 16306 + 143262 3e08 D339 .short 14803 + 143263 3e0a B43F .short 16308 + 143264 3e0c E039 .short 14816 + 143265 3e0e B53F .short 16309 + ARM GAS /tmp/ccLcDeJO.s page 2510 + + + 143266 3e10 EC39 .short 14828 + 143267 3e12 B63F .short 16310 + 143268 3e14 F939 .short 14841 + 143269 3e16 B73F .short 16311 + 143270 3e18 053A .short 14853 + 143271 3e1a B83F .short 16312 + 143272 3e1c 123A .short 14866 + 143273 3e1e B93F .short 16313 + 143274 3e20 1E3A .short 14878 + 143275 3e22 BB3F .short 16315 + 143276 3e24 2B3A .short 14891 + 143277 3e26 BC3F .short 16316 + 143278 3e28 373A .short 14903 + 143279 3e2a BD3F .short 16317 + 143280 3e2c 443A .short 14916 + 143281 3e2e BE3F .short 16318 + 143282 3e30 503A .short 14928 + 143283 3e32 BF3F .short 16319 + 143284 3e34 5D3A .short 14941 + 143285 3e36 C03F .short 16320 + 143286 3e38 693A .short 14953 + 143287 3e3a C13F .short 16321 + 143288 3e3c 763A .short 14966 + 143289 3e3e C33F .short 16323 + 143290 3e40 823A .short 14978 + 143291 3e42 C43F .short 16324 + 143292 3e44 8F3A .short 14991 + 143293 3e46 C53F .short 16325 + 143294 3e48 9B3A .short 15003 + 143295 3e4a C63F .short 16326 + 143296 3e4c A83A .short 15016 + 143297 3e4e C73F .short 16327 + 143298 3e50 B43A .short 15028 + 143299 3e52 C83F .short 16328 + 143300 3e54 C13A .short 15041 + 143301 3e56 C93F .short 16329 + 143302 3e58 CD3A .short 15053 + 143303 3e5a CA3F .short 16330 + 143304 3e5c DA3A .short 15066 + 143305 3e5e CB3F .short 16331 + 143306 3e60 E63A .short 15078 + 143307 3e62 CC3F .short 16332 + 143308 3e64 F33A .short 15091 + 143309 3e66 CD3F .short 16333 + 143310 3e68 003B .short 15104 + 143311 3e6a CE3F .short 16334 + 143312 3e6c 0C3B .short 15116 + 143313 3e6e CF3F .short 16335 + 143314 3e70 193B .short 15129 + 143315 3e72 D03F .short 16336 + 143316 3e74 253B .short 15141 + 143317 3e76 D13F .short 16337 + 143318 3e78 323B .short 15154 + 143319 3e7a D23F .short 16338 + 143320 3e7c 3E3B .short 15166 + 143321 3e7e D33F .short 16339 + 143322 3e80 4B3B .short 15179 + ARM GAS /tmp/ccLcDeJO.s page 2511 + + + 143323 3e82 D43F .short 16340 + 143324 3e84 573B .short 15191 + 143325 3e86 D53F .short 16341 + 143326 3e88 643B .short 15204 + 143327 3e8a D53F .short 16341 + 143328 3e8c 703B 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9A3E .short 16026 + 160461 0448 5A4D .short 19802 + 160462 044a 983E .short 16024 + 160463 044c 664D .short 19814 + 160464 044e 953E .short 16021 + 160465 0450 724D .short 19826 + 160466 0452 923E .short 16018 + 160467 0454 7F4D .short 19839 + 160468 0456 903E .short 16016 + 160469 0458 8B4D .short 19851 + 160470 045a 8D3E .short 16013 + 160471 045c 974D .short 19863 + 160472 045e 8A3E .short 16010 + 160473 0460 A44D .short 19876 + 160474 0462 883E .short 16008 + 160475 0464 B04D .short 19888 + 160476 0466 853E .short 16005 + 160477 0468 BC4D .short 19900 + 160478 046a 823E .short 16002 + 160479 046c C84D .short 19912 + 160480 046e 803E .short 16000 + 160481 0470 D54D .short 19925 + 160482 0472 7D3E .short 15997 + 160483 0474 E14D .short 19937 + 160484 0476 7A3E .short 15994 + 160485 0478 ED4D .short 19949 + ARM GAS /tmp/ccLcDeJO.s page 2812 + + + 160486 047a 773E .short 15991 + 160487 047c F94D .short 19961 + 160488 047e 753E .short 15989 + 160489 0480 064E .short 19974 + 160490 0482 723E .short 15986 + 160491 0484 124E .short 19986 + 160492 0486 6F3E .short 15983 + 160493 0488 1E4E .short 19998 + 160494 048a 6C3E .short 15980 + 160495 048c 2B4E .short 20011 + 160496 048e 6A3E .short 15978 + 160497 0490 374E .short 20023 + 160498 0492 673E .short 15975 + 160499 0494 434E .short 20035 + 160500 0496 643E .short 15972 + 160501 0498 4F4E .short 20047 + 160502 049a 613E .short 15969 + 160503 049c 5C4E .short 20060 + 160504 049e 5E3E .short 15966 + 160505 04a0 684E .short 20072 + 160506 04a2 5C3E .short 15964 + 160507 04a4 744E .short 20084 + 160508 04a6 593E .short 15961 + 160509 04a8 804E .short 20096 + 160510 04aa 563E .short 15958 + 160511 04ac 8C4E .short 20108 + 160512 04ae 533E .short 15955 + 160513 04b0 994E .short 20121 + 160514 04b2 503E .short 15952 + 160515 04b4 A54E .short 20133 + 160516 04b6 4D3E .short 15949 + 160517 04b8 B14E .short 20145 + 160518 04ba 4A3E .short 15946 + 160519 04bc BD4E .short 20157 + 160520 04be 483E .short 15944 + 160521 04c0 CA4E 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9F16 .short 5791 + 163069 18a8 E37B .short 31715 + 163070 18aa 9316 .short 5779 + 163071 18ac E77B .short 31719 + 163072 18ae 8716 .short 5767 + 163073 18b0 EC7B .short 31724 + 163074 18b2 7C16 .short 5756 + 163075 18b4 F07B .short 31728 + 163076 18b6 7016 .short 5744 + 163077 18b8 F57B .short 31733 + 163078 18ba 6416 .short 5732 + 163079 18bc F97B .short 31737 + 163080 18be 5816 .short 5720 + 163081 18c0 FD7B .short 31741 + 163082 18c2 4C16 .short 5708 + 163083 18c4 027C .short 31746 + 163084 18c6 4116 .short 5697 + 163085 18c8 067C .short 31750 + 163086 18ca 3516 .short 5685 + 163087 18cc 0A7C .short 31754 + 163088 18ce 2916 .short 5673 + 163089 18d0 0F7C .short 31759 + 163090 18d2 1D16 .short 5661 + 163091 18d4 137C .short 31763 + 163092 18d6 1216 .short 5650 + 163093 18d8 177C .short 31767 + 163094 18da 0616 .short 5638 + 163095 18dc 1C7C .short 31772 + 163096 18de FA15 .short 5626 + 163097 18e0 207C .short 31776 + 163098 18e2 EE15 .short 5614 + 163099 18e4 247C .short 31780 + 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3115 .short 5425 + 163131 1924 687C .short 31848 + 163132 1926 2515 .short 5413 + 163133 1928 6C7C .short 31852 + 163134 192a 1915 .short 5401 + 163135 192c 707C .short 31856 + 163136 192e 0D15 .short 5389 + 163137 1930 747C .short 31860 + 163138 1932 0115 .short 5377 + 163139 1934 797C .short 31865 + 163140 1936 F614 .short 5366 + 163141 1938 7D7C .short 31869 + 163142 193a EA14 .short 5354 + 163143 193c 817C .short 31873 + 163144 193e DE14 .short 5342 + 163145 1940 857C .short 31877 + 163146 1942 D214 .short 5330 + 163147 1944 897C .short 31881 + 163148 1946 C614 .short 5318 + 163149 1948 8D7C .short 31885 + 163150 194a BA14 .short 5306 + 163151 194c 917C .short 31889 + 163152 194e AE14 .short 5294 + 163153 1950 957C .short 31893 + 163154 1952 A214 .short 5282 + 163155 1954 997C .short 31897 + 163156 1956 9614 .short 5270 + 163157 1958 9D7C .short 31901 + 163158 195a 8B14 .short 5259 + 163159 195c A17C .short 31905 + 163160 195e 7F14 .short 5247 + 163161 1960 A57C .short 31909 + 163162 1962 7314 .short 5235 + 163163 1964 A97C .short 31913 + 163164 1966 6714 .short 5223 + ARM GAS /tmp/ccLcDeJO.s page 2859 + + + 163165 1968 AD7C .short 31917 + 163166 196a 5B14 .short 5211 + 163167 196c B17C .short 31921 + 163168 196e 4F14 .short 5199 + 163169 1970 B57C .short 31925 + 163170 1972 4314 .short 5187 + 163171 1974 B97C .short 31929 + 163172 1976 3714 .short 5175 + 163173 1978 BD7C .short 31933 + 163174 197a 2B14 .short 5163 + 163175 197c C17C .short 31937 + 163176 197e 1F14 .short 5151 + 163177 1980 C57C .short 31941 + 163178 1982 1314 .short 5139 + 163179 1984 C97C .short 31945 + 163180 1986 0714 .short 5127 + 163181 1988 CD7C .short 31949 + 163182 198a FB13 .short 5115 + 163183 198c D17C .short 31953 + 163184 198e F013 .short 5104 + 163185 1990 D57C .short 31957 + 163186 1992 E413 .short 5092 + 163187 1994 D97C .short 31961 + 163188 1996 D813 .short 5080 + 163189 1998 DD7C .short 31965 + 163190 199a CC13 .short 5068 + 163191 199c E07C .short 31968 + 163192 199e C013 .short 5056 + 163193 19a0 E47C .short 31972 + 163194 19a2 B413 .short 5044 + 163195 19a4 E87C .short 31976 + 163196 19a6 A813 .short 5032 + 163197 19a8 EC7C .short 31980 + 163198 19aa 9C13 .short 5020 + 163199 19ac F07C .short 31984 + 163200 19ae 9013 .short 5008 + 163201 19b0 F47C .short 31988 + 163202 19b2 8413 .short 4996 + 163203 19b4 F87C .short 31992 + 163204 19b6 7813 .short 4984 + 163205 19b8 FB7C .short 31995 + 163206 19ba 6C13 .short 4972 + 163207 19bc FF7C .short 31999 + 163208 19be 6013 .short 4960 + 163209 19c0 037D .short 32003 + 163210 19c2 5413 .short 4948 + 163211 19c4 077D .short 32007 + 163212 19c6 4813 .short 4936 + 163213 19c8 0B7D .short 32011 + 163214 19ca 3C13 .short 4924 + 163215 19cc 0E7D .short 32014 + 163216 19ce 3013 .short 4912 + 163217 19d0 127D .short 32018 + 163218 19d2 2413 .short 4900 + 163219 19d4 167D .short 32022 + 163220 19d6 1813 .short 4888 + 163221 19d8 1A7D .short 32026 + ARM GAS /tmp/ccLcDeJO.s page 2860 + + + 163222 19da 0C13 .short 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A57E .short 32421 + 163472 1bce 1C0D .short 3356 + 163473 1bd0 A77E .short 32423 + 163474 1bd2 100D .short 3344 + 163475 1bd4 AA7E .short 32426 + 163476 1bd6 040D .short 3332 + 163477 1bd8 AC7E .short 32428 + 163478 1bda F80C .short 3320 + 163479 1bdc AF7E .short 32431 + 163480 1bde EB0C .short 3307 + 163481 1be0 B17E .short 32433 + 163482 1be2 DF0C .short 3295 + 163483 1be4 B47E .short 32436 + 163484 1be6 D30C .short 3283 + 163485 1be8 B67E .short 32438 + 163486 1bea C60C .short 3270 + 163487 1bec B97E .short 32441 + 163488 1bee BA0C .short 3258 + 163489 1bf0 BB7E .short 32443 + 163490 1bf2 AE0C .short 3246 + 163491 1bf4 BE7E .short 32446 + 163492 1bf6 A10C .short 3233 + 163493 1bf8 C07E .short 32448 + 163494 1bfa 950C .short 3221 + 163495 1bfc C37E .short 32451 + 163496 1bfe 890C .short 3209 + 163497 1c00 C57E .short 32453 + 163498 1c02 7C0C .short 3196 + 163499 1c04 C87E .short 32456 + 163500 1c06 700C .short 3184 + 163501 1c08 CA7E .short 32458 + 163502 1c0a 640C .short 3172 + 163503 1c0c CC7E .short 32460 + 163504 1c0e 570C .short 3159 + 163505 1c10 CF7E .short 32463 + 163506 1c12 4B0C .short 3147 + ARM GAS /tmp/ccLcDeJO.s page 2865 + + + 163507 1c14 D17E .short 32465 + 163508 1c16 3F0C .short 3135 + 163509 1c18 D47E .short 32468 + 163510 1c1a 320C .short 3122 + 163511 1c1c D67E .short 32470 + 163512 1c1e 260C .short 3110 + 163513 1c20 D87E .short 32472 + 163514 1c22 1A0C .short 3098 + 163515 1c24 DB7E .short 32475 + 163516 1c26 0D0C .short 3085 + 163517 1c28 DD7E .short 32477 + 163518 1c2a 010C .short 3073 + 163519 1c2c E07E .short 32480 + 163520 1c2e F50B .short 3061 + 163521 1c30 E27E .short 32482 + 163522 1c32 E80B .short 3048 + 163523 1c34 E47E .short 32484 + 163524 1c36 DC0B .short 3036 + 163525 1c38 E77E .short 32487 + 163526 1c3a D00B .short 3024 + 163527 1c3c E97E .short 32489 + 163528 1c3e C30B .short 3011 + 163529 1c40 EB7E .short 32491 + 163530 1c42 B70B .short 2999 + 163531 1c44 ED7E .short 32493 + 163532 1c46 AB0B .short 2987 + 163533 1c48 F07E .short 32496 + 163534 1c4a 9E0B .short 2974 + 163535 1c4c F27E .short 32498 + 163536 1c4e 920B .short 2962 + 163537 1c50 F47E .short 32500 + 163538 1c52 850B .short 2949 + 163539 1c54 F77E .short 32503 + 163540 1c56 790B .short 2937 + 163541 1c58 F97E .short 32505 + 163542 1c5a 6D0B .short 2925 + 163543 1c5c FB7E .short 32507 + 163544 1c5e 600B .short 2912 + 163545 1c60 FD7E .short 32509 + 163546 1c62 540B .short 2900 + 163547 1c64 007F .short 32512 + 163548 1c66 480B .short 2888 + 163549 1c68 027F .short 32514 + 163550 1c6a 3B0B .short 2875 + 163551 1c6c 047F .short 32516 + 163552 1c6e 2F0B .short 2863 + 163553 1c70 067F .short 32518 + 163554 1c72 230B .short 2851 + 163555 1c74 087F .short 32520 + 163556 1c76 160B .short 2838 + 163557 1c78 0A7F .short 32522 + 163558 1c7a 0A0B .short 2826 + 163559 1c7c 0D7F .short 32525 + 163560 1c7e FD0A .short 2813 + 163561 1c80 0F7F .short 32527 + 163562 1c82 F10A .short 2801 + 163563 1c84 117F .short 32529 + ARM GAS /tmp/ccLcDeJO.s page 2866 + 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.short 32562 + 163596 1cc6 1E0A .short 2590 + 163597 1cc8 347F .short 32564 + 163598 1cca 120A .short 2578 + 163599 1ccc 367F .short 32566 + 163600 1cce 060A .short 2566 + 163601 1cd0 387F .short 32568 + 163602 1cd2 F909 .short 2553 + 163603 1cd4 3A7F .short 32570 + 163604 1cd6 ED09 .short 2541 + 163605 1cd8 3C7F .short 32572 + 163606 1cda E009 .short 2528 + 163607 1cdc 3E7F .short 32574 + 163608 1cde D409 .short 2516 + 163609 1ce0 407F .short 32576 + 163610 1ce2 C709 .short 2503 + 163611 1ce4 427F .short 32578 + 163612 1ce6 BB09 .short 2491 + 163613 1ce8 437F .short 32579 + 163614 1cea AF09 .short 2479 + 163615 1cec 457F .short 32581 + 163616 1cee A209 .short 2466 + 163617 1cf0 477F .short 32583 + 163618 1cf2 9609 .short 2454 + 163619 1cf4 497F .short 32585 + 163620 1cf6 8909 .short 2441 + ARM GAS /tmp/ccLcDeJO.s page 2867 + + + 163621 1cf8 4B7F .short 32587 + 163622 1cfa 7D09 .short 2429 + 163623 1cfc 4D7F .short 32589 + 163624 1cfe 7009 .short 2416 + 163625 1d00 4F7F .short 32591 + 163626 1d02 6409 .short 2404 + 163627 1d04 517F .short 32593 + 163628 1d06 5809 .short 2392 + 163629 1d08 527F .short 32594 + 163630 1d0a 4B09 .short 2379 + 163631 1d0c 547F .short 32596 + 163632 1d0e 3F09 .short 2367 + 163633 1d10 567F .short 32598 + 163634 1d12 3209 .short 2354 + 163635 1d14 587F .short 32600 + 163636 1d16 2609 .short 2342 + 163637 1d18 5A7F .short 32602 + 163638 1d1a 1909 .short 2329 + 163639 1d1c 5B7F .short 32603 + 163640 1d1e 0D09 .short 2317 + 163641 1d20 5D7F .short 32605 + 163642 1d22 0109 .short 2305 + 163643 1d24 5F7F .short 32607 + 163644 1d26 F408 .short 2292 + 163645 1d28 617F .short 32609 + 163646 1d2a E808 .short 2280 + 163647 1d2c 627F .short 32610 + 163648 1d2e DB08 .short 2267 + 163649 1d30 647F .short 32612 + 163650 1d32 CF08 .short 2255 + 163651 1d34 667F .short 32614 + 163652 1d36 C208 .short 2242 + 163653 1d38 687F .short 32616 + 163654 1d3a B608 .short 2230 + 163655 1d3c 697F .short 32617 + 163656 1d3e A908 .short 2217 + 163657 1d40 6B7F .short 32619 + 163658 1d42 9D08 .short 2205 + 163659 1d44 6D7F .short 32621 + 163660 1d46 9108 .short 2193 + 163661 1d48 6E7F .short 32622 + 163662 1d4a 8408 .short 2180 + 163663 1d4c 707F .short 32624 + 163664 1d4e 7808 .short 2168 + 163665 1d50 727F .short 32626 + 163666 1d52 6B08 .short 2155 + 163667 1d54 737F .short 32627 + 163668 1d56 5F08 .short 2143 + 163669 1d58 757F .short 32629 + 163670 1d5a 5208 .short 2130 + 163671 1d5c 777F .short 32631 + 163672 1d5e 4608 .short 2118 + 163673 1d60 787F .short 32632 + 163674 1d62 3908 .short 2105 + 163675 1d64 7A7F .short 32634 + 163676 1d66 2D08 .short 2093 + 163677 1d68 7B7F .short 32635 + ARM GAS /tmp/ccLcDeJO.s page 2868 + + + 163678 1d6a 2008 .short 2080 + 163679 1d6c 7D7F .short 32637 + 163680 1d6e 1408 .short 2068 + 163681 1d70 7F7F .short 32639 + 163682 1d72 0708 .short 2055 + 163683 1d74 807F .short 32640 + 163684 1d76 FB07 .short 2043 + 163685 1d78 827F .short 32642 + 163686 1d7a EF07 .short 2031 + 163687 1d7c 837F .short 32643 + 163688 1d7e E207 .short 2018 + 163689 1d80 857F .short 32645 + 163690 1d82 D607 .short 2006 + 163691 1d84 867F .short 32646 + 163692 1d86 C907 .short 1993 + 163693 1d88 887F .short 32648 + 163694 1d8a BD07 .short 1981 + 163695 1d8c 897F .short 32649 + 163696 1d8e B007 .short 1968 + 163697 1d90 8B7F .short 32651 + 163698 1d92 A407 .short 1956 + 163699 1d94 8C7F .short 32652 + 163700 1d96 9707 .short 1943 + 163701 1d98 8E7F .short 32654 + 163702 1d9a 8B07 .short 1931 + 163703 1d9c 8F7F .short 32655 + 163704 1d9e 7E07 .short 1918 + 163705 1da0 917F .short 32657 + 163706 1da2 7207 .short 1906 + 163707 1da4 927F .short 32658 + 163708 1da6 6507 .short 1893 + 163709 1da8 947F .short 32660 + 163710 1daa 5907 .short 1881 + 163711 1dac 957F .short 32661 + 163712 1dae 4C07 .short 1868 + 163713 1db0 977F .short 32663 + 163714 1db2 4007 .short 1856 + 163715 1db4 987F .short 32664 + 163716 1db6 3307 .short 1843 + 163717 1db8 997F .short 32665 + 163718 1dba 2707 .short 1831 + 163719 1dbc 9B7F .short 32667 + 163720 1dbe 1A07 .short 1818 + 163721 1dc0 9C7F .short 32668 + 163722 1dc2 0E07 .short 1806 + 163723 1dc4 9E7F .short 32670 + 163724 1dc6 0107 .short 1793 + 163725 1dc8 9F7F .short 32671 + 163726 1dca F506 .short 1781 + 163727 1dcc A07F .short 32672 + 163728 1dce E806 .short 1768 + 163729 1dd0 A27F .short 32674 + 163730 1dd2 DC06 .short 1756 + 163731 1dd4 A37F .short 32675 + 163732 1dd6 CF06 .short 1743 + 163733 1dd8 A47F .short 32676 + 163734 1dda C306 .short 1731 + ARM GAS /tmp/ccLcDeJO.s page 2869 + + + 163735 1ddc A67F .short 32678 + 163736 1dde B606 .short 1718 + 163737 1de0 A77F .short 32679 + 163738 1de2 AA06 .short 1706 + 163739 1de4 A87F .short 32680 + 163740 1de6 9D06 .short 1693 + 163741 1de8 AA7F .short 32682 + 163742 1dea 9106 .short 1681 + 163743 1dec AB7F .short 32683 + 163744 1dee 8406 .short 1668 + 163745 1df0 AC7F .short 32684 + 163746 1df2 7806 .short 1656 + 163747 1df4 AD7F .short 32685 + 163748 1df6 6B06 .short 1643 + 163749 1df8 AF7F .short 32687 + 163750 1dfa 5F06 .short 1631 + 163751 1dfc B07F .short 32688 + 163752 1dfe 5206 .short 1618 + 163753 1e00 B17F .short 32689 + 163754 1e02 4606 .short 1606 + 163755 1e04 B27F .short 32690 + 163756 1e06 3906 .short 1593 + 163757 1e08 B47F .short 32692 + 163758 1e0a 2D06 .short 1581 + 163759 1e0c B57F .short 32693 + 163760 1e0e 2006 .short 1568 + 163761 1e10 B67F .short 32694 + 163762 1e12 1406 .short 1556 + 163763 1e14 B77F .short 32695 + 163764 1e16 0706 .short 1543 + 163765 1e18 B87F .short 32696 + 163766 1e1a FB05 .short 1531 + 163767 1e1c B97F .short 32697 + 163768 1e1e EE05 .short 1518 + 163769 1e20 BB7F .short 32699 + 163770 1e22 E205 .short 1506 + 163771 1e24 BC7F .short 32700 + 163772 1e26 D505 .short 1493 + 163773 1e28 BD7F .short 32701 + 163774 1e2a C905 .short 1481 + 163775 1e2c BE7F .short 32702 + 163776 1e2e BC05 .short 1468 + 163777 1e30 BF7F .short 32703 + 163778 1e32 B005 .short 1456 + 163779 1e34 C07F .short 32704 + 163780 1e36 A305 .short 1443 + 163781 1e38 C17F .short 32705 + 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.short -16382 + 168063 3fac 0841 .short 16648 + 168064 3fae 02C0 .short -16382 + 168065 3fb0 FB40 .short 16635 + 168066 3fb2 02C0 .short -16382 + ARM GAS /tmp/ccLcDeJO.s page 2945 + + + 168067 3fb4 EF40 .short 16623 + 168068 3fb6 02C0 .short -16382 + 168069 3fb8 E240 .short 16610 + 168070 3fba 02C0 .short -16382 + 168071 3fbc D640 .short 16598 + 168072 3fbe 01C0 .short -16383 + 168073 3fc0 C940 .short 16585 + 168074 3fc2 01C0 .short -16383 + 168075 3fc4 BC40 .short 16572 + 168076 3fc6 01C0 .short -16383 + 168077 3fc8 B040 .short 16560 + 168078 3fca 01C0 .short -16383 + 168079 3fcc A340 .short 16547 + 168080 3fce 01C0 .short -16383 + 168081 3fd0 9740 .short 16535 + 168082 3fd2 01C0 .short -16383 + 168083 3fd4 8A40 .short 16522 + 168084 3fd6 01C0 .short -16383 + 168085 3fd8 7E40 .short 16510 + 168086 3fda 00C0 .short -16384 + 168087 3fdc 7140 .short 16497 + 168088 3fde 00C0 .short -16384 + 168089 3fe0 6540 .short 16485 + 168090 3fe2 00C0 .short -16384 + 168091 3fe4 5840 .short 16472 + 168092 3fe6 00C0 .short -16384 + 168093 3fe8 4B40 .short 16459 + 168094 3fea 00C0 .short -16384 + 168095 3fec 3F40 .short 16447 + 168096 3fee 00C0 .short -16384 + 168097 3ff0 3240 .short 16434 + 168098 3ff2 00C0 .short -16384 + 168099 3ff4 2640 .short 16422 + 168100 3ff6 00C0 .short -16384 + 168101 3ff8 1940 .short 16409 + 168102 3ffa 00C0 .short -16384 + 168103 3ffc 0D40 .short 16397 + 168104 3ffe 00C0 .short -16384 + 168105 .section .rodata.realCoefBQ31,"a" + 168106 .align 2 + 168109 realCoefBQ31: + 168110 0000 00000040 .word 1073741824 + 168111 0004 00000040 .word 1073741824 + 168112 0008 FE900C40 .word 1074565374 + 168113 000c C4FEFF3F .word 1073741508 + 168114 0010 FB211940 .word 1075388923 + 168115 0014 11FBFF3F .word 1073740561 + 168116 0018 F7B22540 .word 1076212471 + 168117 001c E6F4FF3F .word 1073738982 + 168118 0020 F1433240 .word 1077036017 + 168119 0024 43ECFF3F .word 1073736771 + 168120 0028 EAD43E40 .word 1077859562 + 168121 002c 28E1FF3F .word 1073733928 + 168122 0030 E1654B40 .word 1078683105 + 168123 0034 96D3FF3F .word 1073730454 + 168124 0038 D4F65740 .word 1079506644 + 168125 003c 8CC3FF3F .word 1073726348 + ARM GAS /tmp/ccLcDeJO.s page 2946 + + + 168126 0040 C4876440 .word 1080330180 + 168127 0044 0BB1FF3F .word 1073721611 + 168128 0048 B0187140 .word 1081153712 + 168129 004c 129CFF3F .word 1073716242 + 168130 0050 98A97D40 .word 1081977240 + 168131 0054 A184FF3F .word 1073710241 + 168132 0058 7B3A8A40 .word 1082800763 + 168133 005c B96AFF3F .word 1073703609 + 168134 0060 58CB9640 .word 1083624280 + 168135 0064 594EFF3F .word 1073696345 + 168136 0068 305CA340 .word 1084447792 + 168137 006c 822FFF3F .word 1073688450 + 168138 0070 02EDAF40 .word 1085271298 + 168139 0074 320EFF3F .word 1073679922 + 168140 0078 CC7DBC40 .word 1086094796 + 168141 007c 6CEAFE3F .word 1073670764 + 168142 0080 900EC940 .word 1086918288 + 168143 0084 2DC4FE3F .word 1073660973 + 168144 0088 4C9FD540 .word 1087741772 + 168145 008c 779BFE3F .word 1073650551 + 168146 0090 FF2FE240 .word 1088565247 + 168147 0094 4A70FE3F .word 1073639498 + 168148 0098 AAC0EE40 .word 1089388714 + 168149 009c A442FE3F .word 1073627812 + 168150 00a0 4B51FB40 .word 1090212171 + 168151 00a4 8812FE3F .word 1073615496 + 168152 00a8 E3E10741 .word 1091035619 + 168153 00ac F3DFFD3F .word 1073602547 + 168154 00b0 71721441 .word 1091859057 + 168155 00b4 E7AAFD3F .word 1073588967 + 168156 00b8 F4022141 .word 1092682484 + 168157 00bc 6473FD3F .word 1073574756 + 168158 00c0 6C932D41 .word 1093505900 + 168159 00c4 6939FD3F .word 1073559913 + 168160 00c8 D8233A41 .word 1094329304 + 168161 00cc F6FCFC3F .word 1073544438 + 168162 00d0 38B44641 .word 1095152696 + 168163 00d4 0CBEFC3F .word 1073528332 + 168164 00d8 8C445341 .word 1095976076 + 168165 00dc AA7CFC3F .word 1073511594 + 168166 00e0 D2D45F41 .word 1096799442 + 168167 00e4 D138FC3F .word 1073494225 + 168168 00e8 0B656C41 .word 1097622795 + 168169 00ec 80F2FB3F .word 1073476224 + 168170 00f0 36F57841 .word 1098446134 + 168171 00f4 B8A9FB3F .word 1073457592 + 168172 00f8 52858541 .word 1099269458 + 168173 00fc 785EFB3F .word 1073438328 + 168174 0100 5F159241 .word 1100092767 + 168175 0104 C110FB3F .word 1073418433 + 168176 0108 5DA59E41 .word 1100916061 + 168177 010c 92C0FA3F .word 1073397906 + 168178 0110 4B35AB41 .word 1101739339 + 168179 0114 EC6DFA3F .word 1073376748 + 168180 0118 28C5B741 .word 1102562600 + 168181 011c CF18FA3F .word 1073354959 + 168182 0120 F554C441 .word 1103385845 + ARM GAS /tmp/ccLcDeJO.s page 2947 + + + 168183 0124 3AC1F93F .word 1073332538 + 168184 0128 B0E4D041 .word 1104209072 + 168185 012c 2D67F93F .word 1073309485 + 168186 0130 5974DD41 .word 1105032281 + 168187 0134 AA0AF93F .word 1073285802 + 168188 0138 EF03EA41 .word 1105855471 + 168189 013c AEABF83F .word 1073261486 + 168190 0140 7393F641 .word 1106678643 + 168191 0144 3C4AF83F .word 1073236540 + 168192 0148 E3220342 .word 1107501795 + 168193 014c 52E6F73F .word 1073210962 + 168194 0150 40B20F42 .word 1108324928 + 168195 0154 F17FF73F .word 1073184753 + 168196 0158 88411C42 .word 1109148040 + 168197 015c 1817F73F .word 1073157912 + 168198 0160 BBD02842 .word 1109971131 + 168199 0164 C8ABF63F .word 1073130440 + 168200 0168 D95F3542 .word 1110794201 + 168201 016c 013EF63F .word 1073102337 + 168202 0170 E2EE4142 .word 1111617250 + 168203 0174 C3CDF53F .word 1073073603 + 168204 0178 D47D4E42 .word 1112440276 + 168205 017c 0D5BF53F .word 1073044237 + 168206 0180 AF0C5B42 .word 1113263279 + 168207 0184 E0E5F43F .word 1073014240 + 168208 0188 739B6742 .word 1114086259 + 168209 018c 3C6EF43F .word 1072983612 + 168210 0190 1F2A7442 .word 1114909215 + 168211 0194 20F4F33F .word 1072952352 + 168212 0198 B3B88042 .word 1115732147 + 168213 019c 8E77F33F .word 1072920462 + 168214 01a0 2E478D42 .word 1116555054 + 168215 01a4 84F8F23F .word 1072887940 + 168216 01a8 90D59942 .word 1117377936 + 168217 01ac 0377F23F .word 1072854787 + 168218 01b0 D863A642 .word 1118200792 + 168219 01b4 0BF3F13F .word 1072821003 + 168220 01b8 07F2B242 .word 1119023623 + 168221 01bc 9C6CF13F .word 1072786588 + 168222 01c0 1A80BF42 .word 1119846426 + 168223 01c4 B6E3F03F .word 1072751542 + 168224 01c8 130ECC42 .word 1120669203 + 168225 01cc 5858F03F .word 1072715864 + 168226 01d0 F09BD842 .word 1121491952 + 168227 01d4 84CAEF3F .word 1072679556 + 168228 01d8 B029E542 .word 1122314672 + 168229 01dc 393AEF3F .word 1072642617 + 168230 01e0 55B7F142 .word 1123137365 + 168231 01e4 76A7EE3F .word 1072605046 + 168232 01e8 DC44FE42 .word 1123960028 + 168233 01ec 3D12EE3F .word 1072566845 + 168234 01f0 45D20A43 .word 1124782661 + 168235 01f4 8C7AED3F .word 1072528012 + 168236 01f8 915F1743 .word 1125605265 + 168237 01fc 65E0EC3F .word 1072488549 + 168238 0200 BEEC2343 .word 1126427838 + 168239 0204 C743EC3F .word 1072448455 + ARM GAS /tmp/ccLcDeJO.s page 2948 + + + 168240 0208 CC793043 .word 1127250380 + 168241 020c B2A4EB3F .word 1072407730 + 168242 0210 BB063D43 .word 1128072891 + 168243 0214 2603EB3F .word 1072366374 + 168244 0218 89934943 .word 1128895369 + 168245 021c 235FEA3F .word 1072324387 + 168246 0220 38205643 .word 1129717816 + 168247 0224 A9B8E93F .word 1072281769 + 168248 0228 C5AC6243 .word 1130540229 + 168249 022c B90FE93F .word 1072238521 + 168250 0230 31396F43 .word 1131362609 + 168251 0234 5264E83F .word 1072194642 + 168252 0238 7BC57B43 .word 1132184955 + 168253 023c 74B6E73F .word 1072150132 + 168254 0240 A2518843 .word 1133007266 + 168255 0244 1F06E73F .word 1072104991 + 168256 0248 A7DD9443 .word 1133829543 + 168257 024c 5453E63F .word 1072059220 + 168258 0250 8869A143 .word 1134651784 + 168259 0254 129EE53F .word 1072012818 + 168260 0258 46F5AD43 .word 1135473990 + 168261 025c 59E6E43F .word 1071965785 + 168262 0260 DF80BA43 .word 1136296159 + 168263 0264 2A2CE43F .word 1071918122 + 168264 0268 540CC743 .word 1137118292 + 168265 026c 846FE33F .word 1071869828 + 168266 0270 A397D343 .word 1137940387 + 168267 0274 67B0E23F .word 1071820903 + 168268 0278 CC22E043 .word 1138762444 + 168269 027c D5EEE13F .word 1071771349 + 168270 0280 CFADEC43 .word 1139584463 + 168271 0284 CB2AE13F .word 1071721163 + 168272 0288 AC38F943 .word 1140406444 + 168273 028c 4B64E03F .word 1071670347 + 168274 0290 61C30544 .word 1141228385 + 168275 0294 559BDF3F .word 1071618901 + 168276 0298 EE4D1244 .word 1142050286 + 168277 029c E8CFDE3F .word 1071566824 + 168278 02a0 54D81E44 .word 1142872148 + 168279 02a4 0502DE3F .word 1071514117 + 168280 02a8 90622B44 .word 1143693968 + 168281 02ac AC31DD3F .word 1071460780 + 168282 02b0 A4EC3744 .word 1144515748 + 168283 02b4 DC5EDC3F .word 1071406812 + 168284 02b8 8D764444 .word 1145337485 + 168285 02bc 9689DB3F .word 1071352214 + 168286 02c0 4D005144 .word 1146159181 + 168287 02c4 D9B1DA3F .word 1071296985 + 168288 02c8 E2895D44 .word 1146980834 + 168289 02cc A7D7D93F .word 1071241127 + 168290 02d0 4C136A44 .word 1147802444 + 168291 02d4 FEFAD83F .word 1071184638 + 168292 02d8 8B9C7644 .word 1148624011 + 168293 02dc DF1BD83F .word 1071127519 + 168294 02e0 9D258344 .word 1149445533 + 168295 02e4 4A3AD73F .word 1071069770 + 168296 02e8 83AE8F44 .word 1150267011 + ARM GAS /tmp/ccLcDeJO.s page 2949 + + + 168297 02ec 3F56D63F .word 1071011391 + 168298 02f0 3C379C44 .word 1151088444 + 168299 02f4 BE6FD53F .word 1070952382 + 168300 02f8 C7BFA844 .word 1151909831 + 168301 02fc C786D43F .word 1070892743 + 168302 0300 2548B544 .word 1152731173 + 168303 0304 5A9BD33F .word 1070832474 + 168304 0308 54D0C144 .word 1153552468 + 168305 030c 77ADD23F .word 1070771575 + 168306 0310 5458CE44 .word 1154373716 + 168307 0314 1EBDD13F .word 1070710046 + 168308 0318 24E0DA44 .word 1155194916 + 168309 031c 4FCAD03F .word 1070647887 + 168310 0320 C567E744 .word 1156016069 + 168311 0324 0BD5CF3F .word 1070585099 + 168312 0328 35EFF344 .word 1156837173 + 168313 032c 50DDCE3F .word 1070521680 + 168314 0330 74760045 .word 1157658228 + 168315 0334 20E3CD3F .word 1070457632 + 168316 0338 82FD0C45 .word 1158479234 + 168317 033c 7AE6CC3F .word 1070392954 + 168318 0340 5E841945 .word 1159300190 + 168319 0344 5EE7CB3F .word 1070327646 + 168320 0348 080B2645 .word 1160121096 + 168321 034c CDE5CA3F .word 1070261709 + 168322 0350 7F913245 .word 1160941951 + 168323 0354 C6E1C93F .word 1070195142 + 168324 0358 C3173F45 .word 1161762755 + 168325 035c 4ADBC83F .word 1070127946 + 168326 0360 D39D4B45 .word 1162583507 + 168327 0364 58D2C73F .word 1070060120 + 168328 0368 AE235845 .word 1163404206 + 168329 036c F0C6C63F .word 1069991664 + 168330 0370 55A96445 .word 1164224853 + 168331 0374 13B9C53F .word 1069922579 + 168332 0378 C72E7145 .word 1165045447 + 168333 037c C1A8C43F .word 1069852865 + 168334 0380 03B47D45 .word 1165865987 + 168335 0384 F995C33F .word 1069782521 + 168336 0388 08398A45 .word 1166686472 + 168337 038c BC80C23F .word 1069711548 + 168338 0390 D7BD9645 .word 1167506903 + 168339 0394 0A69C13F .word 1069639946 + 168340 0398 6F42A345 .word 1168327279 + 168341 039c E34EC03F .word 1069567715 + 168342 03a0 D0C6AF45 .word 1169147600 + 168343 03a4 4632BF3F .word 1069494854 + 168344 03a8 F84ABC45 .word 1169967864 + 168345 03ac 3413BE3F .word 1069421364 + 168346 03b0 E7CEC845 .word 1170788071 + 168347 03b4 ADF1BC3F .word 1069347245 + 168348 03b8 9E52D545 .word 1171608222 + 168349 03bc B1CDBB3F .word 1069272497 + 168350 03c0 1BD6E145 .word 1172428315 + 168351 03c4 40A7BA3F .word 1069197120 + 168352 03c8 5D59EE45 .word 1173248349 + 168353 03cc 5A7EB93F .word 1069121114 + ARM GAS /tmp/ccLcDeJO.s page 2950 + + + 168354 03d0 66DCFA45 .word 1174068326 + 168355 03d4 FF52B83F .word 1069044479 + 168356 03d8 335F0746 .word 1174888243 + 168357 03dc 2F25B73F .word 1068967215 + 168358 03e0 C5E11346 .word 1175708101 + 168359 03e4 EAF4B53F .word 1068889322 + 168360 03e8 1A642046 .word 1176527898 + 168361 03ec 31C2B43F .word 1068810801 + 168362 03f0 34E62C46 .word 1177347636 + 168363 03f4 028DB33F .word 1068731650 + 168364 03f8 10683946 .word 1178167312 + 168365 03fc 5F55B23F .word 1068651871 + 168366 0400 AFE94546 .word 1178986927 + 168367 0404 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.word 1070765062 + 182372 0668 DA2DC656 .word 1455828442 + 182373 066c 419FEEBF .word -1074880703 + 182374 0670 DD1FAB75 .word 1974149085 + 182375 0674 9A8FD53F .word 1070960538 + 182376 0678 E586F604 .word 83265253 + 182377 067c 2121EEBF .word -1074912991 + 182378 0680 63A9AEA6 .word -1498502813 + 182379 0684 E27DD83F .word 1071152610 + 182380 0688 468D32CF .word -818770618 + 182381 068c 6B90EDBF .word -1074950037 + 182382 0690 C05CE109 .word 165764288 + 182383 0694 105DDB3F .word 1071340816 + 182384 0698 73C73CF4 .word -197343373 + 182385 069c 7AEDECBF .word -1074991750 + ARM GAS /tmp/ccLcDeJO.s page 3196 + + + 182386 06a0 3BF60638 .word 939980347 + 182387 06a4 5D2BDE3F .word 1071524701 + 182388 06a8 B1BD80F1 .word -243221071 + 182389 06ac B238ECBF .word -1075038030 + 182390 06b0 EDFF2299 .word -1725759507 + 182391 06b4 8773E03F .word 1071674247 + 182392 06b8 3E6E1945 .word 1159294526 + 182393 06bc 8372EBBF .word -1075088765 + 182394 06c0 C868AE39 .word 967731400 + 182395 06c4 3BC7E13F .word 1071761211 + 182396 06c8 A3A10E29 .word 688824739 + 182397 06cc 669BEABF .word -1075143834 + 182398 06d0 3570E1FC .word -52334539 + 182399 06d4 F70FE33F .word 1071845367 + 182400 06d8 4187F347 .word 1207142209 + 182401 06dc E0B3E9BF .word -1075203104 + 182402 06e0 D61D0925 .word 621354454 + 182403 06e4 F34CE43F .word 1071926515 + 182404 06e8 4117156B .word 1796544321 + 182405 06ec 80BCE8BF .word -1075266432 + 182406 06f0 9FEC8C34 .word 881650847 + 182407 06f4 697DE53F .word 1072004457 + 182408 06f8 B0AF6A22 .word 577417136 + 182409 06fc DFB5E7BF .word -1075333665 + 182410 0700 CC3B7F66 .word 1719614412 + 182411 0704 9EA0E63F .word 1072079006 + 182412 0708 CC3B7F66 .word 1719614412 + 182413 070c 9EA0E6BF .word -1075404642 + 182414 0710 B0AF6A22 .word 577417136 + 182415 0714 DFB5E73F .word 1072149983 + 182416 0718 9FEC8C34 .word 881650847 + 182417 071c 697DE5BF .word -1075479191 + 182418 0720 4117156B .word 1796544321 + 182419 0724 80BCE83F .word 1072217216 + 182420 0728 D61D0925 .word 621354454 + 182421 072c F34CE4BF .word -1075557133 + 182422 0730 4187F347 .word 1207142209 + 182423 0734 E0B3E93F .word 1072280544 + 182424 0738 3570E1FC .word -52334539 + 182425 073c F70FE3BF .word -1075638281 + 182426 0740 A3A10E29 .word 688824739 + 182427 0744 669BEA3F .word 1072339814 + 182428 0748 C868AE39 .word 967731400 + 182429 074c 3BC7E1BF .word -1075722437 + 182430 0750 3E6E1945 .word 1159294526 + 182431 0754 8372EB3F .word 1072394883 + 182432 0758 EDFF2299 .word -1725759507 + 182433 075c 8773E0BF .word -1075809401 + 182434 0760 B1BD80F1 .word -243221071 + 182435 0764 B238EC3F .word 1072445618 + 182436 0768 3BF60638 .word 939980347 + 182437 076c 5D2BDEBF .word -1075958947 + 182438 0770 73C73CF4 .word -197343373 + 182439 0774 7AEDEC3F .word 1072491898 + 182440 0778 C05CE109 .word 165764288 + 182441 077c 105DDBBF .word -1076142832 + 182442 0780 468D32CF .word -818770618 + ARM GAS /tmp/ccLcDeJO.s page 3197 + + + 182443 0784 6B90ED3F .word 1072533611 + 182444 0788 63A9AEA6 .word -1498502813 + 182445 078c E27DD8BF .word -1076331038 + 182446 0790 E586F604 .word 83265253 + 182447 0794 2121EE3F .word 1072570657 + 182448 0798 DD1FAB75 .word 1974149085 + 182449 079c 9A8FD5BF .word -1076523110 + 182450 07a0 DA2DC656 .word 1455828442 + 182451 07a4 419FEE3F .word 1072602945 + 182452 07a8 059FD52E .word 785751813 + 182453 07ac 0694D2BF .word -1076718586 + 182454 07b0 D73092FB .word -74305321 + 182455 07b4 7E0AEF3F .word 1072630398 + 182456 07b8 1A5F217B .word 2065784602 + 182457 07bc F919CFBF .word -1076946439 + 182458 07c0 B05CF7CF .word -805872464 + 182459 07c4 9762EF3F .word 1072652951 + 182460 07c8 0AA6693C .word 1013556746 + 182461 07cc B8F8C8BF .word -1077348168 + 182462 07d0 17A5087F .word 2131272983 + 182463 07d4 55A7EF3F .word 1072670549 + 182464 07d8 3A618E6E .word 1854824762 + 182465 07dc 10C8C2BF .word -1077753840 + 182466 07e0 2625D1A3 .word -1546574554 + 182467 07e4 8DD8EF3F .word 1072683149 + 182468 07e8 2CB429BC .word -1138117588 + 182469 07ec A617B9BF .word -1078388826 + 182470 07f0 7E6D79E3 .word -478581378 + 182471 07f4 21F6EF3F .word 1072690721 + 182472 07f8 14D80DF1 .word -250750956 + 182473 07fc 651FA9BF .word -1079435419 + 182474 .section .rodata.twiddleCoefF64_16,"a" + 182475 .align 3 + 182478 twiddleCoefF64_16: + 182479 0000 00000000 .word 0 + 182480 0004 0000F03F .word 1072693248 + 182481 0008 00000000 .word 0 + 182482 000c 00000000 .word 0 + 182483 0010 468D32CF .word -818770618 + 182484 0014 6B90ED3F .word 1072533611 + 182485 0018 63A9AEA6 .word -1498502813 + 182486 001c E27DD83F .word 1071152610 + 182487 0020 CC3B7F66 .word 1719614412 + 182488 0024 9EA0E63F .word 1072079006 + 182489 0028 CC3B7F66 .word 1719614412 + 182490 002c 9EA0E63F .word 1072079006 + 182491 0030 63A9AEA6 .word -1498502813 + 182492 0034 E27DD83F .word 1071152610 + 182493 0038 468D32CF .word -818770618 + 182494 003c 6B90ED3F .word 1072533611 + 182495 0040 00000000 .word 0 + 182496 0044 00000000 .word 0 + 182497 0048 00000000 .word 0 + 182498 004c 0000F03F .word 1072693248 + 182499 0050 63A9AEA6 .word -1498502813 + 182500 0054 E27DD8BF .word -1076331038 + 182501 0058 468D32CF .word -818770618 + ARM GAS /tmp/ccLcDeJO.s page 3198 + + + 182502 005c 6B90ED3F .word 1072533611 + 182503 0060 CC3B7F66 .word 1719614412 + 182504 0064 9EA0E6BF .word -1075404642 + 182505 0068 CC3B7F66 .word 1719614412 + 182506 006c 9EA0E63F .word 1072079006 + 182507 0070 468D32CF .word -818770618 + 182508 0074 6B90EDBF .word -1074950037 + 182509 0078 63A9AEA6 .word -1498502813 + 182510 007c E27DD83F .word 1071152610 + 182511 0080 00000000 .word 0 + 182512 0084 0000F0BF .word -1074790400 + 182513 0088 00000000 .word 0 + 182514 008c 00000000 .word 0 + 182515 0090 468D32CF .word -818770618 + 182516 0094 6B90EDBF .word -1074950037 + 182517 0098 63A9AEA6 .word -1498502813 + 182518 009c E27DD8BF .word -1076331038 + 182519 00a0 CC3B7F66 .word 1719614412 + 182520 00a4 9EA0E6BF .word -1075404642 + 182521 00a8 CC3B7F66 .word 1719614412 + 182522 00ac 9EA0E6BF .word -1075404642 + 182523 00b0 63A9AEA6 .word -1498502813 + 182524 00b4 E27DD8BF .word -1076331038 + 182525 00b8 468D32CF .word -818770618 + 182526 00bc 6B90EDBF .word -1074950037 + 182527 00c0 00000000 .word 0 + 182528 00c4 00000000 .word 0 + 182529 00c8 00000000 .word 0 + 182530 00cc 0000F0BF .word -1074790400 + 182531 00d0 63A9AEA6 .word -1498502813 + 182532 00d4 E27DD83F .word 1071152610 + 182533 00d8 468D32CF .word -818770618 + 182534 00dc 6B90EDBF .word -1074950037 + 182535 00e0 CC3B7F66 .word 1719614412 + 182536 00e4 9EA0E63F .word 1072079006 + 182537 00e8 CC3B7F66 .word 1719614412 + 182538 00ec 9EA0E6BF .word -1075404642 + 182539 00f0 468D32CF .word -818770618 + 182540 00f4 6B90ED3F .word 1072533611 + 182541 00f8 63A9AEA6 .word -1498502813 + 182542 00fc E27DD8BF .word -1076331038 + 182543 .section .rodata.twiddleCoefF64_2048,"a" + 182544 .align 3 + 182547 twiddleCoefF64_2048: + 182548 0000 00000000 .word 0 + 182549 0004 0000F03F .word 1072693248 + 182550 0008 00000000 .word 0 + 182551 000c 00000000 .word 0 + 182552 0010 021D6221 .word 560078082 + 182553 0014 F6FFEF3F .word 1072693238 + 182554 0018 BAA4CCBE .word -1093884742 + 182555 001c F821693F .word 1063854584 + 182556 0020 928A8E85 .word -2054255982 + 182557 0024 D8FFEF3F .word 1072693208 + 182558 0028 710067FE .word -26804111 + 182559 002c F021793F .word 1064903152 + 182560 0030 4F8C972C .word 748129359 + ARM GAS /tmp/ccLcDeJO.s page 3199 + + + 182561 0034 A7FFEF3F .word 1072693159 + 182562 0038 0397500E .word 240162563 + 182563 003c 6BD9823F .word 1065539947 + 182564 0040 DB929B16 .word 379294427 + 182565 0044 62FFEF3F .word 1072693090 + 182566 0048 84C7DEFC .word -52508796 + 182567 004c D121893F .word 1065951697 + 182568 0050 D13BC543 .word 1136999377 + 182569 0054 09FFEF3F .word 1072693001 + 182570 0058 CA97B96A .word 1790547914 + 182571 005c 296A8F3F .word 1066363433 + 182572 0060 A1514BB4 .word -1270132319 + 182573 0064 9CFEEF3F .word 1072692892 + 182574 0068 FD0EE3BB .word -1142747395 + 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9EA0E6BF .word -1075404642 + ARM GAS /tmp/ccLcDeJO.s page 3362 + + + 191856 0148 CC3B7F66 .word 1719614412 + 191857 014c 9EA0E6BF .word -1075404642 + 191858 0150 C868AE39 .word 967731400 + 191859 0154 3BC7E1BF .word -1075722437 + 191860 0158 A3A10E29 .word 688824739 + 191861 015c 669BEABF .word -1075143834 + 191862 0160 63A9AEA6 .word -1498502813 + 191863 0164 E27DD8BF .word -1076331038 + 191864 0168 468D32CF .word -818770618 + 191865 016c 6B90EDBF .word -1074950037 + 191866 0170 0AA6693C .word 1013556746 + 191867 0174 B8F8C8BF .word -1077348168 + 191868 0178 B05CF7CF .word -805872464 + 191869 017c 9762EFBF .word -1074830697 + 191870 0180 00000000 .word 0 + 191871 0184 00000000 .word 0 + 191872 0188 00000000 .word 0 + 191873 018c 0000F0BF .word -1074790400 + 191874 0190 0AA6693C .word 1013556746 + 191875 0194 B8F8C83F .word 1070135480 + 191876 0198 B05CF7CF .word -805872464 + 191877 019c 9762EFBF .word -1074830697 + 191878 01a0 63A9AEA6 .word -1498502813 + 191879 01a4 E27DD83F .word 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.word -1081531951 + 210344 .section .rodata.twiddleCoefF64_64,"a" + 210345 .align 3 + 210348 twiddleCoefF64_64: + 210349 0000 00000000 .word 0 + 210350 0004 0000F03F .word 1072693248 + 210351 0008 00000000 .word 0 + 210352 000c 00000000 .word 0 + 210353 0010 2625D1A3 .word -1546574554 + 210354 0014 8DD8EF3F .word 1072683149 + 210355 0018 2CB429BC .word -1138117588 + 210356 001c A617B93F .word 1069094822 + 210357 0020 B05CF7CF .word -805872464 + 210358 0024 9762EF3F .word 1072652951 + 210359 0028 0AA6693C .word 1013556746 + 210360 002c B8F8C83F .word 1070135480 + 210361 0030 DA2DC656 .word 1455828442 + 210362 0034 419FEE3F .word 1072602945 + 210363 0038 059FD52E .word 785751813 + 210364 003c 0694D23F .word 1070765062 + 210365 0040 468D32CF .word -818770618 + 210366 0044 6B90ED3F .word 1072533611 + 210367 0048 63A9AEA6 .word -1498502813 + 210368 004c E27DD83F .word 1071152610 + 210369 0050 B1BD80F1 .word -243221071 + 210370 0054 B238EC3F .word 1072445618 + 210371 0058 3BF60638 .word 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217509 0790 C63F8B44 .word 1149976518 + 217510 0794 14E2C53F .word 1069933076 + 217511 0798 A94B71FA .word -93238359 + 217512 079c 6487EFBF .word -1074821276 + 217513 07a0 3A618E6E .word 1854824762 + 217514 07a4 10C8C23F .word 1069729808 + 217515 07a8 17A5087F .word 2131272983 + 217516 07ac 55A7EFBF .word -1074813099 + 217517 07b0 0E73A956 .word 1453945614 + 217518 07b4 4E56BF3F .word 1069504078 + 217519 07b8 D39FE170 .word 1893834707 + ARM GAS /tmp/ccLcDeJO.s page 3812 + + + 217520 07bc 64C2EFBF .word -1074806172 + 217521 07c0 2CB429BC .word -1138117588 + 217522 07c4 A617B93F .word 1069094822 + 217523 07c8 2625D1A3 .word -1546574554 + 217524 07cc 8DD8EFBF .word -1074800499 + 217525 07d0 F619CE92 .word -1831986698 + 217526 07d4 20D5B23F .word 1068684576 + 217527 07d8 3A8801AD .word -1392408518 + 217528 07dc CDE9EFBF .word -1074796083 + 217529 07e0 14D80DF1 .word -250750956 + 217530 07e4 651FA93F .word 1068048229 + 217531 07e8 7E6D79E3 .word -478581378 + 217532 07ec 21F6EFBF .word -1074792927 + 217533 07f0 7E66A3F7 .word -140286338 + 217534 07f4 5521993F .word 1067000149 + 217535 07f8 0DCD8460 .word 1619315981 + 217536 07fc 88FDEFBF .word -1074791032 + 217537 .section .rodata.twiddleCoefF64_rfft_32,"a" + 217538 .align 3 + 217541 twiddleCoefF64_rfft_32: + 217542 0000 00000000 .word 0 + 217543 0004 00000000 .word 0 + 217544 0008 00000000 .word 0 + 217545 000c 0000F03F .word 1072693248 + 217546 0010 0AA6693C .word 1013556746 + 217547 0014 B8F8C83F .word 1070135480 + 217548 0018 B05CF7CF .word -805872464 + 217549 001c 9762EF3F .word 1072652951 + 217550 0020 63A9AEA6 .word -1498502813 + 217551 0024 E27DD83F .word 1071152610 + 217552 0028 468D32CF .word -818770618 + 217553 002c 6B90ED3F .word 1072533611 + 217554 0030 C868AE39 .word 967731400 + 217555 0034 3BC7E13F .word 1071761211 + 217556 0038 A3A10E29 .word 688824739 + 217557 003c 669BEA3F .word 1072339814 + 217558 0040 CC3B7F66 .word 1719614412 + 217559 0044 9EA0E63F .word 1072079006 + 217560 0048 CC3B7F66 .word 1719614412 + 217561 004c 9EA0E63F .word 1072079006 + 217562 0050 A3A10E29 .word 688824739 + 217563 0054 669BEA3F .word 1072339814 + 217564 0058 C868AE39 .word 967731400 + 217565 005c 3BC7E13F .word 1071761211 + 217566 0060 468D32CF .word -818770618 + 217567 0064 6B90ED3F .word 1072533611 + 217568 0068 63A9AEA6 .word -1498502813 + 217569 006c E27DD83F .word 1071152610 + 217570 0070 B05CF7CF .word -805872464 + 217571 0074 9762EF3F .word 1072652951 + 217572 0078 0AA6693C .word 1013556746 + 217573 007c B8F8C83F .word 1070135480 + 217574 0080 00000000 .word 0 + 217575 0084 0000F03F .word 1072693248 + 217576 0088 00000000 .word 0 + 217577 008c 00000000 .word 0 + 217578 0090 B05CF7CF .word -805872464 + ARM GAS /tmp/ccLcDeJO.s page 3813 + + + 217579 0094 9762EF3F .word 1072652951 + 217580 0098 0AA6693C .word 1013556746 + 217581 009c B8F8C8BF .word -1077348168 + 217582 00a0 468D32CF .word -818770618 + 217583 00a4 6B90ED3F .word 1072533611 + 217584 00a8 63A9AEA6 .word -1498502813 + 217585 00ac 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217613 0008 00000000 .word 0 + 217614 000c 0000F03F .word 1072693248 + 217615 0010 2D47E6AE .word -1360640211 + 217616 0014 FA21593F .word 1062806010 + 217617 0018 E66E5888 .word -2007470362 + 217618 001c FDFFEF3F .word 1072693245 + 217619 0020 BAA4CCBE .word -1093884742 + 217620 0024 F821693F .word 1063854584 + 217621 0028 021D6221 .word 560078082 + 217622 002c F6FFEF3F .word 1072693238 + 217623 0030 BC96F922 .word 586782396 + 217624 0034 78D9723F .word 1064491384 + 217625 0038 8D2E1ECB .word -887214451 + 217626 003c E9FFEF3F .word 1072693225 + 217627 0040 710067FE .word -26804111 + 217628 0044 F021793F .word 1064903152 + 217629 0048 928A8E85 .word -2054255982 + 217630 004c D8FFEF3F .word 1072693208 + 217631 0050 C5A3A2F9 .word -106781755 + 217632 0054 656A7F3F .word 1065314917 + 217633 0058 EFDAB550 .word 1354095343 + 217634 005c C2FFEF3F .word 1072693186 + 217635 0060 0397500E .word 240162563 + 217636 0064 6BD9823F .word 1065539947 + 217637 0068 4F8C972C .word 748129359 + ARM GAS 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.section .rodata.twiddleCoefF64_rfft_512,"a" + 225804 .align 3 + 225807 twiddleCoefF64_rfft_512: + 225808 0000 00000000 .word 0 + 225809 0004 00000000 .word 0 + 225810 0008 00000000 .word 0 + 225811 000c 0000F03F .word 1072693248 + 225812 0010 84C7DEFC .word -52508796 + 225813 0014 D121893F .word 1065951697 + 225814 0018 DB929B16 .word 379294427 + 225815 001c 62FFEF3F .word 1072693090 + 225816 0020 7E66A3F7 .word -140286338 + 225817 0024 5521993F .word 1067000149 + 225818 0028 0DCD8460 .word 1619315981 + 225819 002c 88FDEF3F .word 1072692616 + 225820 0030 CD559475 .word 1972655565 + 225821 0034 65D8A23F .word 1067636837 + 225822 0038 5DF7FEEF .word -268503203 + 225823 003c 72FAEF3F .word 1072691826 + 225824 0040 14D80DF1 .word -250750956 + 225825 0044 651FA93F .word 1068048229 + 225826 0048 7E6D79E3 .word -478581378 + 225827 004c 21F6EF3F .word 1072690721 + 225828 0050 E020F879 .word 2046304480 + 225829 0054 6E65AF3F .word 1068459374 + 225830 0058 AD718E65 .word 1703834029 + 225831 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.word 1594061409 + 226591 0c3c E771E7BF .word -1075351065 + 226592 0c40 9FEC8C34 .word 881650847 + 226593 0c44 697DE53F .word 1072004457 + 226594 0c48 B0AF6A22 .word 577417136 + 226595 0c4c DFB5E7BF .word -1075333665 + 226596 0c50 9655A392 .word -1834789482 + 226597 0c54 8232E53F .word 1071985282 + 226598 0c58 711757E3 .word -480831631 + 226599 0c5c ECF8E7BF .word -1075316500 + 226600 0c60 E9E5E3BB .word -1142692375 + 226601 0c64 CAE6E43F .word 1071965898 + 226602 0c68 6E97FF0B .word 201299822 + 226603 0c6c 0E3BE8BF .word -1075299570 + 226604 0c70 38099B9B .word -1684338376 + 226605 0c74 449AE43F .word 1071946308 + 226606 0c78 BF2EBA0F .word 263859903 + 226607 0c7c 407CE8BF .word -1075282880 + 226608 0c80 D61D0925 .word 621354454 + 226609 0c84 F34CE43F .word 1071926515 + 226610 0c88 4117156B .word 1796544321 + 226611 0c8c 80BCE8BF .word -1075266432 + 226612 0c90 D4564553 .word 1397053140 + 226613 0c94 D9FEE33F .word 1071906521 + 226614 0c98 0D94EFA3 .word -1544580083 + 226615 0c9c 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0d00 C868AE39 .word 967731400 + 226641 0d04 3BC7E13F .word 1071761211 + 226642 0d08 A3A10E29 .word 688824739 + 226643 0d0c 669BEABF .word -1075143834 + 226644 0d10 49DBDE63 .word 1675549513 + 226645 0d14 4D73E13F .word 1071739725 + ARM GAS /tmp/ccLcDeJO.s page 3972 + + + 226646 0d18 11D5219E .word -1641949935 + 226647 0d1c BCD2EABF .word -1075129668 + 226648 0d20 224B1B54 .word 1411074850 + 226649 0d24 B31EE13F .word 1071718067 + 226650 0d28 00021558 .word 1477771776 + 226651 0d2c 0A09EBBF .word -1075115766 + 226652 0d30 8F895D4D .word 1297975695 + 226653 0d34 70C9E03F .word 1071696240 + 226654 0d38 1257F53E .word 1056266002 + 226655 0d3c 4D3EEBBF .word -1075102131 + 226656 0d40 EDFF2299 .word -1725759507 + 226657 0d44 8773E03F .word 1071674247 + 226658 0d48 3E6E1945 .word 1159294526 + 226659 0d4c 8372EBBF .word -1075088765 + 226660 0d50 B73E4C87 .word -2025046345 + 226661 0d54 FC1CE03F .word 1071652092 + 226662 0d58 D2903567 .word 1731563730 + 226663 0d5c AAA5EBBF .word -1075075670 + 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821708190 + 226713 0e24 8508D73F .word 1071057029 + 226714 0e28 3DC2CCB6 .word -1228094915 + 226715 0e2c 13DBEDBF .word -1074930925 + 226716 0e30 C6273FDD .word -583063610 + 226717 0e34 7D4CD63F .word 1071008893 + 226718 0e38 2BBE2D62 .word 1647164971 + 226719 0e3c AEFEEDBF .word -1074921810 + 226720 0e40 DD1FAB75 .word 1974149085 + 226721 0e44 9A8FD53F .word 1070960538 + 226722 0e48 E586F604 .word 83265253 + 226723 0e4c 2121EEBF .word -1074912991 + 226724 0e50 6AE77842 .word 1115219818 + 226725 0e54 E2D1D43F .word 1070911970 + 226726 0e58 7EC12B4B .word 1261158782 + 226727 0e5c 6A42EEBF .word -1074904470 + 226728 0e60 02661794 .word -1810405886 + 226729 0e64 5C13D43F .word 1070863196 + 226730 0e68 12E148EC .word -330768110 + 226731 0e6c 8862EEBF .word -1074896248 + 226732 0e70 5281E1C2 .word -1025408686 + 226733 0e74 1054D33F .word 1070814224 + 226734 0e78 0DD14CAB .word -1421029107 + 226735 0e7c 7B81EEBF .word -1074888325 + 226736 0e80 059FD52E .word 785751813 + 226737 0e84 0694D23F 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820BCC3F .word 1070336898 + 226762 0ee8 89E564AC .word -1402673783 + 226763 0eec F338EFBF .word -1074841357 + 226764 0ef0 5104B025 .word 632292433 + 226765 0ef4 A082CA3F .word 1070236320 + 226766 0ef8 2D2F0B3B .word 990588717 + 226767 0efc 604EEFBF .word -1074835872 + 226768 0f00 0AA6693C .word 1013556746 + 226769 0f04 B8F8C83F .word 1070135480 + 226770 0f08 B05CF7CF .word -805872464 + 226771 0f0c 9762EFBF .word -1074830697 + 226772 0f10 31BF50DE .word -565133519 + 226773 0f14 D96DC73F .word 1070034393 + 226774 0f18 7720A1A3 .word -1549721481 + 226775 0f1c 9975EFBF .word -1074825831 + 226776 0f20 C63F8B44 .word 1149976518 + 226777 0f24 14E2C53F .word 1069933076 + 226778 0f28 A94B71FA .word -93238359 + 226779 0f2c 6487EFBF .word -1074821276 + 226780 0f30 5A3E29B1 .word -1322697126 + 226781 0f34 7655C43F .word 1069831542 + 226782 0f38 9B09C924 .word 617154971 + 226783 0f3c F997EFBF .word -1074817031 + 226784 0f40 3A618E6E .word 1854824762 + 226785 0f44 10C8C23F .word 1069729808 + 226786 0f48 17A5087F .word 2131272983 + 226787 0f4c 55A7EFBF .word -1074813099 + 226788 0f50 76F5DACE .word -824511114 + 226789 0f54 F039C13F .word 1069627888 + 226790 0f58 41D79571 .word 1905645377 + 226791 0f5c 79B5EFBF .word -1074809479 + 226792 0f60 0E73A956 .word 1453945614 + 226793 0f64 4E56BF3F .word 1069504078 + 226794 0f68 D39FE170 .word 1893834707 + 226795 0f6c 64C2EFBF .word -1074806172 + 226796 0f70 D5C29EC7 .word -945896747 + 226797 0f74 8537BC3F .word 1069299589 + 226798 0f78 7BA66DFD .word -43145605 + 226799 0f7c 15CEEFBF .word -1074803179 + 226800 0f80 2CB429BC .word -1138117588 + 226801 0f84 A617B93F .word 1069094822 + 226802 0f88 2625D1A3 .word -1546574554 + 226803 0f8c 8DD8EFBF .word -1074800499 + 226804 0f90 19A49A0A .word 177906713 + 226805 0f94 D0F6B53F .word 1068889808 + 226806 0f98 095BBDFC .word -54699255 + 226807 0f9c CAE1EFBF .word -1074798134 + 226808 0fa0 F619CE92 .word -1831986698 + 226809 0fa4 20D5B23F .word 1068684576 + 226810 0fa8 3A8801AD .word -1392408518 + 226811 0fac CDE9EFBF .word -1074796083 + 226812 0fb0 E020F879 .word 2046304480 + 226813 0fb4 6E65AF3F .word 1068459374 + 226814 0fb8 AD718E65 .word 1703834029 + 226815 0fbc 95F0EFBF .word -1074794347 + 226816 0fc0 14D80DF1 .word -250750956 + ARM GAS /tmp/ccLcDeJO.s page 3975 + + + 226817 0fc4 651FA93F .word 1068048229 + 226818 0fc8 7E6D79E3 .word -478581378 + 226819 0fcc 21F6EFBF .word -1074792927 + 226820 0fd0 CD559475 .word 1972655565 + 226821 0fd4 65D8A23F .word 1067636837 + 226822 0fd8 5DF7FEEF .word -268503203 + 226823 0fdc 72FAEFBF .word -1074791822 + 226824 0fe0 7E66A3F7 .word -140286338 + 226825 0fe4 5521993F .word 1067000149 + 226826 0fe8 0DCD8460 .word 1619315981 + 226827 0fec 88FDEFBF .word -1074791032 + 226828 0ff0 84C7DEFC .word -52508796 + 226829 0ff4 D121893F .word 1065951697 + 226830 0ff8 DB929B16 .word 379294427 + 226831 0ffc 62FFEFBF .word -1074790558 + 226832 .section .rodata.twiddleCoefF64_rfft_64,"a" + 226833 .align 3 + 226836 twiddleCoefF64_rfft_64: + 226837 0000 00000000 .word 0 + 226838 0004 00000000 .word 0 + 226839 0008 00000000 .word 0 + 226840 000c 0000F03F .word 1072693248 + 226841 0010 2CB429BC .word -1138117588 + 226842 0014 A617B93F .word 1069094822 + 226843 0018 2625D1A3 .word -1546574554 + 226844 001c 8DD8EF3F .word 1072683149 + 226845 0020 0AA6693C .word 1013556746 + 226846 0024 B8F8C83F .word 1070135480 + 226847 0028 B05CF7CF .word -805872464 + 226848 002c 9762EF3F .word 1072652951 + 226849 0030 059FD52E .word 785751813 + 226850 0034 0694D23F .word 1070765062 + 226851 0038 DA2DC656 .word 1455828442 + 226852 003c 419FEE3F .word 1072602945 + 226853 0040 63A9AEA6 .word -1498502813 + 226854 0044 E27DD83F .word 1071152610 + 226855 0048 468D32CF .word -818770618 + 226856 004c 6B90ED3F .word 1072533611 + 226857 0050 3BF60638 .word 939980347 + 226858 0054 5D2BDE3F .word 1071524701 + 226859 0058 B1BD80F1 .word -243221071 + 226860 005c B238EC3F .word 1072445618 + 226861 0060 C868AE39 .word 967731400 + 226862 0064 3BC7E13F .word 1071761211 + 226863 0068 A3A10E29 .word 688824739 + 226864 006c 669BEA3F .word 1072339814 + 226865 0070 D61D0925 .word 621354454 + 226866 0074 F34CE43F .word 1071926515 + 226867 0078 4117156B .word 1796544321 + 226868 007c 80BCE83F .word 1072217216 + 226869 0080 CC3B7F66 .word 1719614412 + 226870 0084 9EA0E63F .word 1072079006 + 226871 0088 CC3B7F66 .word 1719614412 + 226872 008c 9EA0E63F .word 1072079006 + 226873 0090 4117156B .word 1796544321 + 226874 0094 80BCE83F .word 1072217216 + 226875 0098 D61D0925 .word 621354454 + ARM GAS /tmp/ccLcDeJO.s page 3976 + + + 226876 009c F34CE43F .word 1071926515 + 226877 00a0 A3A10E29 .word 688824739 + 226878 00a4 669BEA3F .word 1072339814 + 226879 00a8 C868AE39 .word 967731400 + 226880 00ac 3BC7E13F .word 1071761211 + 226881 00b0 B1BD80F1 .word -243221071 + 226882 00b4 B238EC3F .word 1072445618 + 226883 00b8 3BF60638 .word 939980347 + 226884 00bc 5D2BDE3F .word 1071524701 + 226885 00c0 468D32CF .word -818770618 + 226886 00c4 6B90ED3F .word 1072533611 + 226887 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31A094BE .word -1097555919 + 232286 02d4 0BFA74BF .word -1082852853 + 232287 02d8 CCCF78BE .word -1099378740 + 232288 02dc F85378BF .word -1082633224 + 232289 02e0 C2C547BE .word -1102592574 + 232290 02e4 BE147BBF .word -1082452802 + 232291 02e8 834016BE .word -1105837949 + 232292 02ec AC3A7DBF .word -1082312020 + 232293 02f0 36BDC8BD .word -1110917834 + 232294 02f4 6DC47EBF .word -1082211219 + 232295 02f8 2FFB48BD .word -1119290577 + 232296 02fc 0FB17FBF .word -1082150641 + 232297 0300 00000080 .word -2147483648 + 232298 0304 000080BF .word -1082130432 + ARM GAS /tmp/ccLcDeJO.s page 4071 + + + 232299 0308 2FFB483D .word 1028193071 + 232300 030c 0FB17FBF .word -1082150641 + 232301 0310 36BDC83D .word 1036565814 + 232302 0314 6DC47EBF .word -1082211219 + 232303 0318 8340163E .word 1041645699 + 232304 031c AC3A7DBF .word -1082312020 + 232305 0320 C2C5473E .word 1044891074 + 232306 0324 BE147BBF .word -1082452802 + 232307 0328 CCCF783E .word 1048104908 + 232308 032c F85378BF .word -1082633224 + 232309 0330 31A0943E .word 1049927729 + 232310 0334 0BFA74BF .word -1082852853 + 232311 0338 D47CAC3E .word 1051491540 + 232312 033c 080971BF .word -1083111160 + 232313 0340 15EFC33E .word 1053028117 + 232314 0344 5E836CBF .word -1083407522 + 232315 0348 80E8DA3E .word 1054533760 + 232316 034c D86B67BF .word -1083741224 + 232317 0350 EA5AF13E .word 1056004842 + 232318 0354 98C561BF .word -1084111464 + 232319 0358 3D9C033F .word 1057201213 + 232320 035c 1A945BBF .word -1084517350 + 232321 0360 DA390E3F .word 1057896922 + 232322 0364 31DB54BF .word -1084957903 + 232323 0368 C07F183F .word 1058570176 + 232324 036c 029F4DBF .word -1085432062 + 232325 0370 9967223F .word 1059219353 + 232326 0374 03E445BF .word -1085938685 + 232327 0378 4AEB2B3F .word 1059842890 + 232328 037c F9AE3DBF .word -1086476551 + 232329 0380 F304353F .word 1060439283 + 232330 0384 F30435BF .word -1087044365 + 232331 0388 F9AE3D3F .word 1061007097 + 232332 038c 4AEB2BBF .word -1087640758 + 232333 0390 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232357 03f0 6DC47E3F .word 1065272429 + 232358 03f4 36BDC8BD .word -1110917834 + 232359 03f8 0FB17F3F .word 1065333007 + 232360 03fc 2FFB48BD .word -1119290577 + 232361 .section .rodata.twiddleCoef_128_q15,"a" + 232362 .align 2 + 232365 twiddleCoef_128_q15: + 232366 0000 FF7F .short 32767 + 232367 0002 0000 .short 0 + 232368 0004 D87F .short 32728 + 232369 0006 4706 .short 1607 + 232370 0008 627F .short 32610 + 232371 000a 8B0C .short 3211 + 232372 000c 9D7E .short 32413 + 232373 000e C812 .short 4808 + 232374 0010 8A7D .short 32138 + 232375 0012 F818 .short 6392 + 232376 0014 297C .short 31785 + 232377 0016 191F .short 7961 + 232378 0018 7D7A .short 31357 + 232379 001a 2825 .short 9512 + 232380 001c 8478 .short 30852 + 232381 001e 1F2B .short 11039 + 232382 0020 4176 .short 30273 + 232383 0022 FB30 .short 12539 + 232384 0024 B573 .short 29621 + 232385 0026 BA36 .short 14010 + 232386 0028 E270 .short 28898 + 232387 002a 563C .short 15446 + 232388 002c CA6D .short 28106 + 232389 002e CE41 .short 16846 + 232390 0030 6D6A .short 27245 + 232391 0032 1C47 .short 18204 + 232392 0034 CF66 .short 26319 + 232393 0036 3F4C .short 19519 + 232394 0038 F262 .short 25330 + 232395 003a 3351 .short 20787 + 232396 003c D75E .short 24279 + 232397 003e F555 .short 22005 + 232398 0040 825A .short 23170 + 232399 0042 825A .short 23170 + 232400 0044 F555 .short 22005 + 232401 0046 D75E .short 24279 + 232402 0048 3351 .short 20787 + 232403 004a F262 .short 25330 + 232404 004c 3F4C .short 19519 + 232405 004e CF66 .short 26319 + 232406 0050 1C47 .short 18204 + 232407 0052 6D6A .short 27245 + 232408 0054 CE41 .short 16846 + 232409 0056 CA6D .short 28106 + 232410 0058 563C .short 15446 + 232411 005a E270 .short 28898 + 232412 005c BA36 .short 14010 + 232413 005e B573 .short 29621 + 232414 0060 FB30 .short 12539 + ARM GAS /tmp/ccLcDeJO.s page 4073 + + + 232415 0062 4176 .short 30273 + 232416 0064 1F2B .short 11039 + 232417 0066 8478 .short 30852 + 232418 0068 2825 .short 9512 + 232419 006a 7D7A .short 31357 + 232420 006c 191F .short 7961 + 232421 006e 297C .short 31785 + 232422 0070 F818 .short 6392 + 232423 0072 8A7D .short 32138 + 232424 0074 C812 .short 4808 + 232425 0076 9D7E .short 32413 + 232426 0078 8B0C .short 3211 + 232427 007a 627F .short 32610 + 232428 007c 4706 .short 1607 + 232429 007e D87F .short 32728 + 232430 0080 0000 .short 0 + 232431 0082 FF7F .short 32767 + 232432 0084 B8F9 .short -1608 + 232433 0086 D87F .short 32728 + 232434 0088 74F3 .short -3212 + 232435 008a 627F .short 32610 + 232436 008c 37ED .short -4809 + 232437 008e 9D7E .short 32413 + 232438 0090 07E7 .short -6393 + 232439 0092 8A7D .short 32138 + 232440 0094 E6E0 .short -7962 + 232441 0096 297C .short 31785 + 232442 0098 D7DA .short -9513 + 232443 009a 7D7A .short 31357 + 232444 009c E0D4 .short -11040 + 232445 009e 8478 .short 30852 + 232446 00a0 04CF .short -12540 + 232447 00a2 4176 .short 30273 + 232448 00a4 45C9 .short -14011 + 232449 00a6 B573 .short 29621 + 232450 00a8 A9C3 .short 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00e4 7B87 .short -30853 + 232481 00e6 1F2B .short 11039 + 232482 00e8 8285 .short -31358 + 232483 00ea 2825 .short 9512 + 232484 00ec D683 .short -31786 + 232485 00ee 191F .short 7961 + 232486 00f0 7582 .short -32139 + 232487 00f2 F818 .short 6392 + 232488 00f4 6281 .short -32414 + 232489 00f6 C812 .short 4808 + 232490 00f8 9D80 .short -32611 + 232491 00fa 8B0C .short 3211 + 232492 00fc 2780 .short -32729 + 232493 00fe 4706 .short 1607 + 232494 0100 0080 .short -32768 + 232495 0102 0000 .short 0 + 232496 0104 2780 .short -32729 + 232497 0106 B8F9 .short -1608 + 232498 0108 9D80 .short -32611 + 232499 010a 74F3 .short -3212 + 232500 010c 6281 .short -32414 + 232501 010e 37ED .short -4809 + 232502 0110 7582 .short -32139 + 232503 0112 07E7 .short -6393 + 232504 0114 D683 .short -31786 + 232505 0116 E6E0 .short -7962 + 232506 0118 8285 .short -31358 + 232507 011a D7DA .short -9513 + 232508 011c 7B87 .short -30853 + 232509 011e E0D4 .short -11040 + 232510 0120 BE89 .short -30274 + 232511 0122 04CF .short -12540 + 232512 0124 4A8C .short -29622 + 232513 0126 45C9 .short -14011 + 232514 0128 1D8F .short -28899 + 232515 012a A9C3 .short -15447 + 232516 012c 3592 .short -28107 + 232517 012e 31BE .short -16847 + 232518 0130 9295 .short -27246 + 232519 0132 E3B8 .short -18205 + 232520 0134 3099 .short -26320 + 232521 0136 C0B3 .short -19520 + 232522 0138 0D9D .short -25331 + 232523 013a CCAE .short -20788 + 232524 013c 28A1 .short -24280 + 232525 013e 0AAA .short -22006 + 232526 0140 7DA5 .short -23171 + 232527 0142 7DA5 .short -23171 + 232528 0144 0AAA .short -22006 + ARM GAS /tmp/ccLcDeJO.s page 4075 + + + 232529 0146 28A1 .short -24280 + 232530 0148 CCAE .short -20788 + 232531 014a 0D9D .short -25331 + 232532 014c C0B3 .short -19520 + 232533 014e 3099 .short -26320 + 232534 0150 E3B8 .short -18205 + 232535 0152 9295 .short -27246 + 232536 0154 31BE .short -16847 + 232537 0156 3592 .short -28107 + 232538 0158 A9C3 .short -15447 + 232539 015a 1D8F .short -28899 + 232540 015c 45C9 .short -14011 + 232541 015e 4A8C .short -29622 + 232542 0160 04CF .short -12540 + 232543 0162 BE89 .short -30274 + 232544 0164 E0D4 .short -11040 + 232545 0166 7B87 .short -30853 + 232546 0168 D7DA .short -9513 + 232547 016a 8285 .short -31358 + 232548 016c E6E0 .short -7962 + 232549 016e D683 .short -31786 + 232550 0170 07E7 .short -6393 + 232551 0172 7582 .short -32139 + 232552 0174 37ED .short -4809 + 232553 0176 6281 .short -32414 + 232554 0178 74F3 .short -3212 + 232555 017a 9D80 .short -32611 + 232556 017c B8F9 .short -1608 + 232557 017e 2780 .short -32729 + 232558 .section .rodata.twiddleCoef_128_q31,"a" + 232559 .align 2 + 232562 twiddleCoef_128_q31: + 232563 0000 FFFFFF7F .word 2147483647 + 232564 0004 00000000 .word 0 + 232565 0008 8D87D87F .word 2144896909 + 232566 000c 7CD94706 .word 105372028 + 232567 0010 8F36627F .word 2137142927 + 232568 0014 5ED38B0C .word 210490206 + 232569 0018 FC559D7E .word 2124240380 + 232570 001c 6E10C812 .word 315101294 + 232571 0020 3F5F8A7D .word 2106220351 + 232572 0024 3CB8F818 .word 418953276 + 232573 0028 EEFB297C .word 2083126254 + 232574 002c 7BF9191F .word 521795963 + 232575 0030 5B057D7A .word 2055013723 + 232576 0034 5D0C2825 .word 623381597 + 232577 0038 13848478 .word 2021950483 + 232578 003c EB341F2B .word 723465451 + 232579 0040 3CAF4176 .word 1984016188 + 232580 0044 4DC5FB30 .word 821806413 + 232581 0048 D0EBB573 .word 1941302224 + 232582 004c 1320BA36 .word 918167571 + 232583 0050 C6CBE270 .word 1893911494 + 232584 0054 70BA563C .word 1012316784 + 232585 0058 140DCA6D .word 1841958164 + 232586 005c 641ECE41 .word 1104027236 + 232587 0060 A4986D6A .word 1785567396 + ARM GAS /tmp/ccLcDeJO.s page 4076 + + + 232588 0064 E6EC1C47 .word 1193077990 + 232589 0068 1F81CF66 .word 1724875039 + 232590 006c F3DF3F4C .word 1279254515 + 232591 0070 AC01F262 .word 1660027308 + 232592 0074 94CC3351 .word 1362349204 + 232593 0078 897CD75E .word 1591180425 + 232594 007c D2A4F555 .word 1442161874 + 232595 0080 9A79825A .word 1518500250 + 232596 0084 9A79825A .word 1518500250 + 232597 0088 D2A4F555 .word 1442161874 + 232598 008c 897CD75E .word 1591180425 + 232599 0090 94CC3351 .word 1362349204 + 232600 0094 AC01F262 .word 1660027308 + 232601 0098 F3DF3F4C .word 1279254515 + 232602 009c 1F81CF66 .word 1724875039 + 232603 00a0 E6EC1C47 .word 1193077990 + 232604 00a4 A4986D6A .word 1785567396 + 232605 00a8 641ECE41 .word 1104027236 + 232606 00ac 140DCA6D .word 1841958164 + 232607 00b0 70BA563C .word 1012316784 + 232608 00b4 C6CBE270 .word 1893911494 + 232609 00b8 1320BA36 .word 918167571 + 232610 00bc D0EBB573 .word 1941302224 + 232611 00c0 4DC5FB30 .word 821806413 + 232612 00c4 3CAF4176 .word 1984016188 + 232613 00c8 EB341F2B .word 723465451 + 232614 00cc 13848478 .word 2021950483 + 232615 00d0 5D0C2825 .word 623381597 + 232616 00d4 5B057D7A .word 2055013723 + 232617 00d8 7BF9191F .word 521795963 + 232618 00dc EEFB297C .word 2083126254 + 232619 00e0 3CB8F818 .word 418953276 + 232620 00e4 3F5F8A7D .word 2106220351 + 232621 00e8 6E10C812 .word 315101294 + 232622 00ec FC559D7E .word 2124240380 + 232623 00f0 5ED38B0C .word 210490206 + 232624 00f4 8F36627F .word 2137142927 + 232625 00f8 7CD94706 .word 105372028 + 232626 00fc 8D87D87F .word 2144896909 + 232627 0100 00000000 .word 0 + 232628 0104 FFFFFF7F .word 2147483647 + 232629 0108 8326B8F9 .word -105372029 + 232630 010c 8D87D87F .word 2144896909 + 232631 0110 A12C74F3 .word -210490207 + 232632 0114 8F36627F .word 2137142927 + 232633 0118 91EF37ED .word -315101295 + 232634 011c FC559D7E .word 2124240380 + 232635 0120 C34707E7 .word -418953277 + 232636 0124 3F5F8A7D .word 2106220351 + 232637 0128 8406E6E0 .word -521795964 + 232638 012c EEFB297C .word 2083126254 + 232639 0130 A2F3D7DA .word -623381598 + 232640 0134 5B057D7A .word 2055013723 + 232641 0138 14CBE0D4 .word -723465452 + 232642 013c 13848478 .word 2021950483 + 232643 0140 B23A04CF .word -821806414 + 232644 0144 3CAF4176 .word 1984016188 + ARM GAS /tmp/ccLcDeJO.s page 4077 + + + 232645 0148 ECDF45C9 .word -918167572 + 232646 014c D0EBB573 .word 1941302224 + 232647 0150 8F45A9C3 .word -1012316785 + 232648 0154 C6CBE270 .word 1893911494 + 232649 0158 9BE131BE .word -1104027237 + 232650 015c 140DCA6D .word 1841958164 + 232651 0160 1913E3B8 .word -1193077991 + 232652 0164 A4986D6A .word 1785567396 + 232653 0168 0C20C0B3 .word -1279254516 + 232654 016c 1F81CF66 .word 1724875039 + 232655 0170 6B33CCAE .word -1362349205 + 232656 0174 AC01F262 .word 1660027308 + 232657 0178 2D5B0AAA .word -1442161875 + 232658 017c 897CD75E .word 1591180425 + 232659 0180 66867DA5 .word -1518500250 + 232660 0184 9A79825A .word 1518500250 + 232661 0188 768328A1 .word -1591180426 + 232662 018c D2A4F555 .word 1442161874 + 232663 0190 53FE0D9D .word -1660027309 + 232664 0194 94CC3351 .word 1362349204 + 232665 0198 E07E3099 .word -1724875040 + 232666 019c F3DF3F4C .word 1279254515 + 232667 01a0 5B679295 .word -1785567397 + 232668 01a4 E6EC1C47 .word 1193077990 + 232669 01a8 EBF23592 .word -1841958165 + 232670 01ac 641ECE41 .word 1104027236 + 232671 01b0 3A341D8F .word -1893911494 + 232672 01b4 70BA563C .word 1012316784 + 232673 01b8 2F144A8C .word -1941302225 + 232674 01bc 1320BA36 .word 918167571 + 232675 01c0 C350BE89 .word -1984016189 + 232676 01c4 4DC5FB30 .word 821806413 + 232677 01c8 EC7B7B87 .word -2021950484 + 232678 01cc EB341F2B .word 723465451 + 232679 01d0 A4FA8285 .word -2055013724 + 232680 01d4 5D0C2825 .word 623381597 + 232681 01d8 1104D683 .word -2083126255 + 232682 01dc 7BF9191F .word 521795963 + 232683 01e0 C0A07582 .word -2106220352 + 232684 01e4 3CB8F818 .word 418953276 + 232685 01e8 03AA6281 .word -2124240381 + 232686 01ec 6E10C812 .word 315101294 + 232687 01f0 70C99D80 .word -2137142928 + 232688 01f4 5ED38B0C .word 210490206 + 232689 01f8 72782780 .word -2144896910 + 232690 01fc 7CD94706 .word 105372028 + 232691 0200 00000080 .word -2147483648 + 232692 0204 00000000 .word 0 + 232693 0208 72782780 .word -2144896910 + 232694 020c 8326B8F9 .word -105372029 + 232695 0210 70C99D80 .word -2137142928 + 232696 0214 A12C74F3 .word -210490207 + 232697 0218 03AA6281 .word -2124240381 + 232698 021c 91EF37ED .word -315101295 + 232699 0220 C0A07582 .word -2106220352 + 232700 0224 C34707E7 .word -418953277 + 232701 0228 1104D683 .word -2083126255 + ARM GAS /tmp/ccLcDeJO.s page 4078 + + + 232702 022c 8406E6E0 .word -521795964 + 232703 0230 A4FA8285 .word -2055013724 + 232704 0234 A2F3D7DA .word -623381598 + 232705 0238 EC7B7B87 .word -2021950484 + 232706 023c 14CBE0D4 .word -723465452 + 232707 0240 C350BE89 .word -1984016189 + 232708 0244 B23A04CF .word -821806414 + 232709 0248 2F144A8C .word -1941302225 + 232710 024c ECDF45C9 .word -918167572 + 232711 0250 3A341D8F .word -1893911494 + 232712 0254 8F45A9C3 .word -1012316785 + 232713 0258 EBF23592 .word -1841958165 + 232714 025c 9BE131BE .word -1104027237 + 232715 0260 5B679295 .word -1785567397 + 232716 0264 1913E3B8 .word -1193077991 + 232717 0268 E07E3099 .word -1724875040 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EC7B7B87 .word -2021950484 + 232743 02d0 A2F3D7DA .word -623381598 + 232744 02d4 A4FA8285 .word -2055013724 + 232745 02d8 8406E6E0 .word -521795964 + 232746 02dc 1104D683 .word -2083126255 + 232747 02e0 C34707E7 .word -418953277 + 232748 02e4 C0A07582 .word -2106220352 + 232749 02e8 91EF37ED .word -315101295 + 232750 02ec 03AA6281 .word -2124240381 + 232751 02f0 A12C74F3 .word -210490207 + 232752 02f4 70C99D80 .word -2137142928 + 232753 02f8 8326B8F9 .word -105372029 + 232754 02fc 72782780 .word -2144896910 + 232755 .section .rodata.twiddleCoef_16,"a" + 232756 .align 2 + 232759 twiddleCoef_16: + 232760 0000 0000803F .word 1065353216 + ARM GAS /tmp/ccLcDeJO.s page 4079 + + + 232761 0004 00000000 .word 0 + 232762 0008 5E836C3F .word 1064076126 + 232763 000c 15EFC33E .word 1053028117 + 232764 0010 F304353F .word 1060439283 + 232765 0014 F304353F .word 1060439283 + 232766 0018 15EFC33E .word 1053028117 + 232767 001c 5E836C3F .word 1064076126 + 232768 0020 00000000 .word 0 + 232769 0024 0000803F .word 1065353216 + 232770 0028 15EFC3BE .word -1094455531 + 232771 002c 5E836C3F .word 1064076126 + 232772 0030 F30435BF .word -1087044365 + 232773 0034 F304353F .word 1060439283 + 232774 0038 5E836CBF .word -1083407522 + 232775 003c 15EFC33E .word 1053028117 + 232776 0040 000080BF .word -1082130432 + 232777 0044 00000000 .word 0 + 232778 0048 5E836CBF .word -1083407522 + 232779 004c 15EFC3BE .word -1094455531 + 232780 0050 F30435BF .word -1087044365 + 232781 0054 F30435BF .word -1087044365 + 232782 0058 15EFC3BE .word -1094455531 + 232783 005c 5E836CBF .word -1083407522 + 232784 0060 00000080 .word -2147483648 + 232785 0064 000080BF .word -1082130432 + 232786 0068 15EFC33E .word 1053028117 + 232787 006c 5E836CBF .word -1083407522 + 232788 0070 F304353F .word 1060439283 + 232789 0074 F30435BF .word -1087044365 + 232790 0078 5E836C3F .word 1064076126 + 232791 007c 15EFC3BE .word -1094455531 + 232792 .section .rodata.twiddleCoef_16_q15,"a" + 232793 .align 2 + 232796 twiddleCoef_16_q15: + 232797 0000 FF7F .short 32767 + 232798 0002 0000 .short 0 + 232799 0004 4176 .short 30273 + 232800 0006 FB30 .short 12539 + 232801 0008 825A .short 23170 + 232802 000a 825A .short 23170 + 232803 000c FB30 .short 12539 + 232804 000e 4176 .short 30273 + 232805 0010 0000 .short 0 + 232806 0012 FF7F .short 32767 + 232807 0014 04CF .short -12540 + 232808 0016 4176 .short 30273 + 232809 0018 7DA5 .short -23171 + 232810 001a 825A .short 23170 + 232811 001c BE89 .short -30274 + 232812 001e FB30 .short 12539 + 232813 0020 0080 .short -32768 + 232814 0022 0000 .short 0 + 232815 0024 BE89 .short -30274 + 232816 0026 04CF .short -12540 + 232817 0028 7DA5 .short -23171 + 232818 002a 7DA5 .short -23171 + 232819 002c 04CF .short -12540 + ARM GAS /tmp/ccLcDeJO.s page 4080 + + + 232820 002e BE89 .short -30274 + 232821 .section .rodata.twiddleCoef_16_q31,"a" + 232822 .align 2 + 232825 twiddleCoef_16_q31: + 232826 0000 FFFFFF7F .word 2147483647 + 232827 0004 00000000 .word 0 + 232828 0008 3CAF4176 .word 1984016188 + 232829 000c 4DC5FB30 .word 821806413 + 232830 0010 9A79825A .word 1518500250 + 232831 0014 9A79825A .word 1518500250 + 232832 0018 4DC5FB30 .word 821806413 + 232833 001c 3CAF4176 .word 1984016188 + 232834 0020 00000000 .word 0 + 232835 0024 FFFFFF7F .word 2147483647 + 232836 0028 B23A04CF .word -821806414 + 232837 002c 3CAF4176 .word 1984016188 + 232838 0030 66867DA5 .word -1518500250 + 232839 0034 9A79825A .word 1518500250 + 232840 0038 C350BE89 .word -1984016189 + 232841 003c 4DC5FB30 .word 821806413 + 232842 0040 00000080 .word -2147483648 + 232843 0044 00000000 .word 0 + 232844 0048 C350BE89 .word -1984016189 + 232845 004c B23A04CF .word -821806414 + 232846 0050 66867DA5 .word -1518500250 + 232847 0054 66867DA5 .word -1518500250 + 232848 0058 B23A04CF .word -821806414 + 232849 005c C350BE89 .word -1984016189 + 232850 .section .rodata.twiddleCoef_2048,"a" + 232851 .align 2 + 232854 twiddleCoef_2048: + 232855 0000 0000803F .word 1065353216 + 232856 0004 00000000 .word 0 + 232857 0008 B1FF7F3F .word 1065353137 + 232858 000c C70F493B .word 994643911 + 232859 0010 C4FE7F3F .word 1065352900 + 232860 0014 890FC93B .word 1003032457 + 232861 0018 39FD7F3F .word 1065352505 + 232862 001c 59CB163C .word 1008126809 + 232863 0020 11FB7F3F .word 1065351953 + 232864 0024 900E493C .word 1011420816 + 232865 0028 4AF87F3F .word 1065351242 + 232866 002c 4B517B3C .word 1014714699 + 232867 0030 E6F47F3F .word 1065350374 + 232868 0034 B6C9963C .word 1016514998 + 232869 0038 E3F07F3F .word 1065349347 + 232870 003c 69EAAF3C .word 1018161769 + 232871 0040 43EC7F3F .word 1065348163 + 232872 0044 B00AC93C .word 1019808432 + 232873 0048 05E77F3F .word 1065346821 + 232874 004c 7B2AE23C .word 1021454971 + 232875 0050 29E17F3F .word 1065345321 + 232876 0054 B949FB3C .word 1023101369 + 232877 0058 AFDA7F3F .word 1065343663 + 232878 005c 2F340A3D .word 1024078895 + 232879 0060 98D37F3F .word 1065341848 + 232880 0064 2CC3163D .word 1024901932 + ARM GAS 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4152 + + + 236928 3fa4 2CC316BD .word -1122581716 + 236929 3fa8 AFDA7F3F .word 1065343663 + 236930 3fac 2F340ABD .word -1123404753 + 236931 3fb0 29E17F3F .word 1065345321 + 236932 3fb4 B949FBBC .word -1124382279 + 236933 3fb8 05E77F3F .word 1065346821 + 236934 3fbc 7B2AE2BC .word -1126028677 + 236935 3fc0 43EC7F3F .word 1065348163 + 236936 3fc4 B00AC9BC .word -1127675216 + 236937 3fc8 E3F07F3F .word 1065349347 + 236938 3fcc 69EAAFBC .word -1129321879 + 236939 3fd0 E6F47F3F .word 1065350374 + 236940 3fd4 B6C996BC .word -1130968650 + 236941 3fd8 4AF87F3F .word 1065351242 + 236942 3fdc 4B517BBC .word -1132768949 + 236943 3fe0 11FB7F3F .word 1065351953 + 236944 3fe4 900E49BC .word -1136062832 + 236945 3fe8 39FD7F3F .word 1065352505 + 236946 3fec 59CB16BC .word -1139356839 + 236947 3ff0 C4FE7F3F .word 1065352900 + 236948 3ff4 890FC9BB .word -1144451191 + 236949 3ff8 B1FF7F3F .word 1065353137 + 236950 3ffc C70F49BB .word -1152839737 + 236951 .section .rodata.twiddleCoef_2048_q15,"a" + 236952 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32733 + ARM GAS /tmp/ccLcDeJO.s page 4153 + + + 236987 003e E305 .short 1507 + 236988 0040 D87F .short 32728 + 236989 0042 4706 .short 1607 + 236990 0044 D37F .short 32723 + 236991 0046 AC06 .short 1708 + 236992 0048 CE7F .short 32718 + 236993 004a 1007 .short 1808 + 236994 004c C87F .short 32712 + 236995 004e 7507 .short 1909 + 236996 0050 C27F .short 32706 + 236997 0052 D907 .short 2009 + 236998 0054 BC7F .short 32700 + 236999 0056 3D08 .short 2109 + 237000 0058 B57F .short 32693 + 237001 005a A208 .short 2210 + 237002 005c AE7F .short 32686 + 237003 005e 0609 .short 2310 + 237004 0060 A77F .short 32679 + 237005 0062 6A09 .short 2410 + 237006 0064 9F7F .short 32671 + 237007 0066 CE09 .short 2510 + 237008 0068 977F .short 32663 + 237009 006a 330A .short 2611 + 237010 006c 8F7F .short 32655 + 237011 006e 970A .short 2711 + 237012 0070 877F .short 32647 + 237013 0072 FB0A .short 2811 + 237014 0074 7E7F .short 32638 + 237015 0076 5F0B .short 2911 + 237016 0078 757F .short 32629 + 237017 007a C30B .short 3011 + 237018 007c 6B7F .short 32619 + 237019 007e 270C .short 3111 + 237020 0080 627F .short 32610 + 237021 0082 8B0C .short 3211 + 237022 0084 587F .short 32600 + 237023 0086 EF0C .short 3311 + 237024 0088 4D7F .short 32589 + 237025 008a 530D .short 3411 + 237026 008c 437F .short 32579 + 237027 008e B70D .short 3511 + 237028 0090 387F .short 32568 + 237029 0092 1B0E .short 3611 + 237030 0094 2D7F .short 32557 + 237031 0096 7F0E .short 3711 + 237032 0098 217F .short 32545 + 237033 009a E30E .short 3811 + 237034 009c 157F .short 32533 + 237035 009e 470F .short 3911 + 237036 00a0 097F .short 32521 + 237037 00a2 AB0F .short 4011 + 237038 00a4 FD7E .short 32509 + 237039 00a6 0E10 .short 4110 + 237040 00a8 F07E .short 32496 + 237041 00aa 7210 .short 4210 + 237042 00ac E37E .short 32483 + 237043 00ae D610 .short 4310 + ARM GAS /tmp/ccLcDeJO.s page 4154 + + + 237044 00b0 D57E .short 32469 + 237045 00b2 3911 .short 4409 + 237046 00b4 C87E .short 32456 + 237047 00b6 9D11 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05fc 7DDE0980 .word -2146836867 + 244400 .section .rodata.twiddleCoef_32,"a" + 244401 .align 2 + 244404 twiddleCoef_32: + 244405 0000 0000803F .word 1065353216 + 244406 0004 00000000 .word 0 + ARM GAS /tmp/ccLcDeJO.s page 4283 + + + 244407 0008 BE147B3F .word 1065030846 + 244408 000c C2C5473E .word 1044891074 + 244409 0010 5E836C3F .word 1064076126 + 244410 0014 15EFC33E .word 1053028117 + 244411 0018 31DB543F .word 1062525745 + 244412 001c DA390E3F .word 1057896922 + 244413 0020 F304353F .word 1060439283 + 244414 0024 F304353F .word 1060439283 + 244415 0028 DA390E3F .word 1057896922 + 244416 002c 31DB543F .word 1062525745 + 244417 0030 15EFC33E .word 1053028117 + 244418 0034 5E836C3F .word 1064076126 + 244419 0038 C2C5473E .word 1044891074 + 244420 003c BE147B3F .word 1065030846 + 244421 0040 00000000 .word 0 + 244422 0044 0000803F .word 1065353216 + 244423 0048 C2C547BE .word -1102592574 + 244424 004c BE147B3F .word 1065030846 + 244425 0050 15EFC3BE .word -1094455531 + 244426 0054 5E836C3F .word 1064076126 + 244427 0058 DA390EBF .word -1089586726 + 244428 005c 31DB543F .word 1062525745 + 244429 0060 F30435BF .word -1087044365 + 244430 0064 F304353F .word 1060439283 + 244431 0068 31DB54BF .word -1084957903 + 244432 006c DA390E3F .word 1057896922 + 244433 0070 5E836CBF .word -1083407522 + 244434 0074 15EFC33E .word 1053028117 + 244435 0078 BE147BBF .word -1082452802 + 244436 007c C2C5473E .word 1044891074 + 244437 0080 000080BF .word -1082130432 + 244438 0084 00000000 .word 0 + 244439 0088 BE147BBF .word -1082452802 + 244440 008c C2C547BE .word -1102592574 + 244441 0090 5E836CBF .word -1083407522 + 244442 0094 15EFC3BE .word -1094455531 + 244443 0098 31DB54BF .word -1084957903 + 244444 009c DA390EBF .word -1089586726 + 244445 00a0 F30435BF .word -1087044365 + 244446 00a4 F30435BF .word -1087044365 + 244447 00a8 DA390EBF .word -1089586726 + 244448 00ac 31DB54BF .word -1084957903 + 244449 00b0 15EFC3BE .word -1094455531 + 244450 00b4 5E836CBF .word -1083407522 + 244451 00b8 C2C547BE .word -1102592574 + 244452 00bc BE147BBF .word -1082452802 + 244453 00c0 00000080 .word -2147483648 + 244454 00c4 000080BF .word -1082130432 + 244455 00c8 C2C5473E .word 1044891074 + 244456 00cc BE147BBF .word -1082452802 + 244457 00d0 15EFC33E .word 1053028117 + 244458 00d4 5E836CBF .word -1083407522 + 244459 00d8 DA390E3F .word 1057896922 + 244460 00dc 31DB54BF .word -1084957903 + 244461 00e0 F304353F .word 1060439283 + 244462 00e4 F30435BF .word -1087044365 + 244463 00e8 31DB543F .word 1062525745 + ARM GAS /tmp/ccLcDeJO.s page 4284 + + + 244464 00ec DA390EBF .word -1089586726 + 244465 00f0 5E836C3F .word 1064076126 + 244466 00f4 15EFC3BE .word -1094455531 + 244467 00f8 BE147B3F .word 1065030846 + 244468 00fc C2C547BE .word -1102592574 + 244469 .section .rodata.twiddleCoef_32_q15,"a" + 244470 .align 2 + 244473 twiddleCoef_32_q15: + 244474 0000 FF7F .short 32767 + 244475 0002 0000 .short 0 + 244476 0004 8A7D .short 32138 + 244477 0006 F818 .short 6392 + 244478 0008 4176 .short 30273 + 244479 000a FB30 .short 12539 + 244480 000c 6D6A .short 27245 + 244481 000e 1C47 .short 18204 + 244482 0010 825A .short 23170 + 244483 0012 825A .short 23170 + 244484 0014 1C47 .short 18204 + 244485 0016 6D6A .short 27245 + 244486 0018 FB30 .short 12539 + 244487 001a 4176 .short 30273 + 244488 001c F818 .short 6392 + 244489 001e 8A7D .short 32138 + 244490 0020 0000 .short 0 + 244491 0022 FF7F .short 32767 + 244492 0024 07E7 .short -6393 + 244493 0026 8A7D .short 32138 + 244494 0028 04CF .short -12540 + 244495 002a 4176 .short 30273 + 244496 002c E3B8 .short -18205 + 244497 002e 6D6A .short 27245 + 244498 0030 7DA5 .short -23171 + 244499 0032 825A .short 23170 + 244500 0034 9295 .short -27246 + 244501 0036 1C47 .short 18204 + 244502 0038 BE89 .short -30274 + 244503 003a FB30 .short 12539 + 244504 003c 7582 .short -32139 + 244505 003e F818 .short 6392 + 244506 0040 0080 .short -32768 + 244507 0042 0000 .short 0 + 244508 0044 7582 .short -32139 + 244509 0046 07E7 .short -6393 + 244510 0048 BE89 .short -30274 + 244511 004a 04CF .short -12540 + 244512 004c 9295 .short -27246 + 244513 004e E3B8 .short -18205 + 244514 0050 7DA5 .short -23171 + 244515 0052 7DA5 .short -23171 + 244516 0054 E3B8 .short -18205 + 244517 0056 9295 .short -27246 + 244518 0058 04CF .short -12540 + 244519 005a BE89 .short -30274 + 244520 005c 07E7 .short -6393 + 244521 005e 7582 .short -32139 + 244522 .section .rodata.twiddleCoef_32_q31,"a" + ARM GAS /tmp/ccLcDeJO.s page 4285 + + + 244523 .align 2 + 244526 twiddleCoef_32_q31: + 244527 0000 FFFFFF7F .word 2147483647 + 244528 0004 00000000 .word 0 + 244529 0008 3F5F8A7D .word 2106220351 + 244530 000c 3CB8F818 .word 418953276 + 244531 0010 3CAF4176 .word 1984016188 + 244532 0014 4DC5FB30 .word 821806413 + 244533 0018 A4986D6A .word 1785567396 + 244534 001c E6EC1C47 .word 1193077990 + 244535 0020 9A79825A .word 1518500250 + 244536 0024 9A79825A .word 1518500250 + 244537 0028 E6EC1C47 .word 1193077990 + 244538 002c A4986D6A .word 1785567396 + 244539 0030 4DC5FB30 .word 821806413 + 244540 0034 3CAF4176 .word 1984016188 + 244541 0038 3CB8F818 .word 418953276 + 244542 003c 3F5F8A7D .word 2106220351 + 244543 0040 00000000 .word 0 + 244544 0044 FFFFFF7F .word 2147483647 + 244545 0048 C34707E7 .word -418953277 + 244546 004c 3F5F8A7D .word 2106220351 + 244547 0050 B23A04CF .word -821806414 + 244548 0054 3CAF4176 .word 1984016188 + 244549 0058 1913E3B8 .word -1193077991 + 244550 005c A4986D6A .word 1785567396 + 244551 0060 66867DA5 .word -1518500250 + 244552 0064 9A79825A .word 1518500250 + 244553 0068 5B679295 .word -1785567397 + 244554 006c E6EC1C47 .word 1193077990 + 244555 0070 C350BE89 .word -1984016189 + 244556 0074 4DC5FB30 .word 821806413 + 244557 0078 C0A07582 .word -2106220352 + 244558 007c 3CB8F818 .word 418953276 + 244559 0080 00000080 .word -2147483648 + 244560 0084 00000000 .word 0 + 244561 0088 C0A07582 .word -2106220352 + 244562 008c C34707E7 .word -418953277 + 244563 0090 C350BE89 .word -1984016189 + 244564 0094 B23A04CF .word -821806414 + 244565 0098 5B679295 .word -1785567397 + 244566 009c 1913E3B8 .word -1193077991 + 244567 00a0 66867DA5 .word -1518500250 + 244568 00a4 66867DA5 .word -1518500250 + 244569 00a8 1913E3B8 .word -1193077991 + 244570 00ac 5B679295 .word -1785567397 + 244571 00b0 B23A04CF .word -821806414 + 244572 00b4 C350BE89 .word -1984016189 + 244573 00b8 C34707E7 .word -418953277 + 244574 00bc C0A07582 .word -2106220352 + 244575 .section .rodata.twiddleCoef_4096,"a" + 244576 .align 2 + 244579 twiddleCoef_4096: + 244580 0000 0000803F .word 1065353216 + 244581 0004 00000000 .word 0 + 244582 0008 ECFF7F3F .word 1065353196 + 244583 000c D40FC93A .word 986255316 + ARM GAS /tmp/ccLcDeJO.s page 4286 + + + 244584 0010 B1FF7F3F .word 1065353137 + 244585 0014 C70F493B .word 994643911 + 244586 0018 4EFF7F3F .word 1065353038 + 244587 001c C1CB963B .word 999738305 + 244588 0020 C4FE7F3F .word 1065352900 + 244589 0024 890FC93B .word 1003032457 + 244590 0028 13FE7F3F .word 1065352723 + 244591 002c 3053FB3B .word 1006326576 + 244592 0030 39FD7F3F .word 1065352505 + 244593 0034 59CB163C .word 1008126809 + 244594 0038 39FC7F3F .word 1065352249 + 244595 003c 02ED2F3C .word 1009773826 + 244596 0040 11FB7F3F .word 1065351953 + 244597 0044 900E493C .word 1011420816 + 244598 0048 C1F97F3F .word 1065351617 + 244599 004c 0030623C .word 1013067776 + 244600 0050 4AF87F3F .word 1065351242 + 244601 0054 4B517B3C .word 1014714699 + 244602 0058 ACF67F3F .word 1065350828 + 244603 005c 38398A3C .word 1015691576 + 244604 0060 E6F47F3F .word 1065350374 + 244605 0064 B6C9963C .word 1016514998 + 244606 0068 F8F27F3F .word 1065349880 + 244607 006c 1C5AA33C .word 1017338396 + 244608 0070 E3F07F3F .word 1065349347 + 244609 0074 69EAAF3C .word 1018161769 + 244610 0078 A7EE7F3F .word 1065348775 + 244611 007c 9B7ABC3C .word 1018985115 + 244612 0080 43EC7F3F .word 1065348163 + 244613 0084 B00AC93C .word 1019808432 + 244614 0088 B8E97F3F .word 1065347512 + 244615 008c A69AD53C .word 1020631718 + 244616 0090 05E77F3F .word 1065346821 + 244617 0094 7B2AE23C .word 1021454971 + 244618 0098 2BE47F3F .word 1065346091 + 244619 009c 2DBAEE3C .word 1022278189 + 244620 00a0 29E17F3F .word 1065345321 + 244621 00a4 B949FB3C .word 1023101369 + 244622 00a8 00DE7F3F .word 1065344512 + 244623 00ac 90EC033D .word 1023667344 + 244624 00b0 AFDA7F3F .word 1065343663 + 244625 00b4 2F340A3D .word 1024078895 + 244626 00b8 37D77F3F .word 1065342775 + 244627 00bc B87B103D .word 1024490424 + 244628 00c0 98D37F3F .word 1065341848 + 244629 00c4 2CC3163D .word 1024901932 + 244630 00c8 D1CF7F3F .word 1065340881 + 244631 00cc 880A1D3D .word 1025313416 + 244632 00d0 E2CB7F3F .word 1065339874 + 244633 00d4 CC51233D .word 1025724876 + 244634 00d8 CCC77F3F .word 1065338828 + 244635 00dc F698293D .word 1026136310 + 244636 00e0 8FC37F3F .word 1065337743 + 244637 00e4 07E02F3D .word 1026547719 + 244638 00e8 2ABF7F3F .word 1065336618 + 244639 00ec FC26363D .word 1026959100 + 244640 00f0 9EBA7F3F .word 1065335454 + ARM GAS /tmp/ccLcDeJO.s page 4287 + + + 244641 00f4 D56D3C3D .word 1027370453 + 244642 00f8 EAB57F3F .word 1065334250 + 244643 00fc 91B4423D .word 1027781777 + 244644 0100 0FB17F3F .word 1065333007 + 244645 0104 2FFB483D .word 1028193071 + 244646 0108 0DAC7F3F .word 1065331725 + 244647 010c AF414F3D .word 1028604335 + 244648 0110 E3A67F3F .word 1065330403 + 244649 0114 0E88553D .word 1029015566 + 244650 0118 91A17F3F .word 1065329041 + 244651 011c 4CCE5B3D .word 1029426764 + 244652 0120 189C7F3F .word 1065327640 + 244653 0124 6814623D .word 1029837928 + 244654 0128 78967F3F .word 1065326200 + 244655 012c 625A683D .word 1030249058 + 244656 0130 B1907F3F .word 1065324721 + 244657 0134 38A06E3D .word 1030660152 + 244658 0138 C28A7F3F .word 1065323202 + 244659 013c E9E5743D .word 1031071209 + 244660 0140 AB847F3F .word 1065321643 + 244661 0144 742B7B3D .word 1031482228 + 244662 0148 6D7E7F3F .word 1065320045 + 244663 014c 6CB8803D .word 1031845996 + 244664 0150 08787F3F .word 1065318408 + 244665 0154 0ADB833D .word 1032051466 + 244666 0158 7B717F3F .word 1065316731 + 244667 015c 94FD863D .word 1032256916 + 244668 0160 C76A7F3F .word 1065315015 + 244669 0164 0A208A3D .word 1032462346 + 244670 0168 EC637F3F .word 1065313260 + 244671 016c 6A428D3D .word 1032667754 + 244672 0170 E95C7F3F .word 1065311465 + 244673 0174 B464903D .word 1032873140 + 244674 0178 BF557F3F .word 1065309631 + 244675 017c E786933D .word 1033078503 + 244676 0180 6D4E7F3F .word 1065307757 + 244677 0184 05A9963D .word 1033283845 + 244678 0188 F4467F3F .word 1065305844 + 244679 018c 0ACB993D .word 1033489162 + 244680 0190 543F7F3F .word 1065303892 + 244681 0194 F9EC9C3D .word 1033694457 + 244682 0198 8D377F3F .word 1065301901 + 244683 019c CF0EA03D .word 1033899727 + 244684 01a0 9D2F7F3F .word 1065299869 + 244685 01a4 8C30A33D .word 1034104972 + 244686 01a8 87277F3F .word 1065297799 + 244687 01ac 3052A63D .word 1034310192 + 244688 01b0 491F7F3F .word 1065295689 + 244689 01b4 BA73A93D .word 1034515386 + 244690 01b8 E4167F3F .word 1065293540 + 244691 01bc 2B95AC3D .word 1034720555 + 244692 01c0 580E7F3F .word 1065291352 + 244693 01c4 80B6AF3D .word 1034925696 + 244694 01c8 A4057F3F .word 1065289124 + 244695 01cc BBD7B23D .word 1035130811 + 244696 01d0 C9FC7E3F .word 1065286857 + 244697 01d4 DAF8B53D .word 1035335898 + ARM GAS /tmp/ccLcDeJO.s page 4288 + + + 244698 01d8 C7F37E3F .word 1065284551 + 244699 01dc DD19B93D .word 1035540957 + 244700 01e0 9DEA7E3F .word 1065282205 + 244701 01e4 C33ABC3D .word 1035745987 + 244702 01e8 4CE17E3F .word 1065279820 + 244703 01ec 8D5BBF3D .word 1035950989 + 244704 01f0 D4D77E3F .word 1065277396 + 244705 01f4 397CC23D .word 1036155961 + 244706 01f8 34CE7E3F .word 1065274932 + 244707 01fc C69CC53D .word 1036360902 + 244708 0200 6DC47E3F .word 1065272429 + 244709 0204 36BDC83D .word 1036565814 + 244710 0208 7FBA7E3F .word 1065269887 + 244711 020c 86DDCB3D .word 1036770694 + 244712 0210 69B07E3F .word 1065267305 + 244713 0214 B7FDCE3D .word 1036975543 + 244714 0218 2DA67E3F .word 1065264685 + 244715 021c C81DD23D .word 1037180360 + 244716 0220 C99B7E3F .word 1065262025 + 244717 0224 B93DD53D .word 1037385145 + 244718 0228 3D917E3F .word 1065259325 + 244719 022c 895DD83D .word 1037589897 + 244720 0230 8B867E3F .word 1065256587 + 244721 0234 377DDB3D .word 1037794615 + 244722 0238 B17B7E3F .word 1065253809 + 244723 023c C49CDE3D .word 1037999300 + 244724 0240 B0707E3F .word 1065250992 + 244725 0244 2EBCE13D .word 1038203950 + 244726 0248 88657E3F .word 1065248136 + 244727 024c 76DBE43D .word 1038408566 + 244728 0250 385A7E3F .word 1065245240 + 244729 0254 9AFAE73D .word 1038613146 + 244730 0258 C14E7E3F .word 1065242305 + 244731 025c 9A19EB3D .word 1038817690 + 244732 0260 23437E3F .word 1065239331 + 244733 0264 7638EE3D .word 1039022198 + 244734 0268 5E377E3F .word 1065236318 + 244735 026c 2E57F13D .word 1039226670 + 244736 0270 722B7E3F .word 1065233266 + 244737 0274 C075F43D .word 1039431104 + 244738 0278 5E1F7E3F .word 1065230174 + 244739 027c 2C94F73D .word 1039635500 + 244740 0280 24137E3F .word 1065227044 + 244741 0284 73B2FA3D .word 1039839859 + 244742 0288 C2067E3F .word 1065223874 + 244743 028c 92D0FD3D .word 1040044178 + 244744 0290 38FA7D3F .word 1065220664 + 244745 0294 4577003E .word 1040217925 + 244746 0298 88ED7D3F .word 1065217416 + 244747 029c 2E06023E .word 1040320046 + 244748 02a0 B1E07D3F .word 1065214129 + 244749 02a4 0295033E .word 1040422146 + 244750 02a8 B2D37D3F .word 1065210802 + 244751 02ac C223053E .word 1040524226 + 244752 02b0 8CC67D3F .word 1065207436 + 244753 02b4 6EB2063E .word 1040626286 + 244754 02b8 40B97D3F .word 1065204032 + ARM GAS /tmp/ccLcDeJO.s page 4289 + + + 244755 02bc 0541083E .word 1040728325 + 244756 02c0 CCAB7D3F .word 1065200588 + 244757 02c4 86CF093E .word 1040830342 + 244758 02c8 309E7D3F .word 1065197104 + 244759 02cc F35D0B3E .word 1040932339 + 244760 02d0 6E907D3F .word 1065193582 + 244761 02d4 4AEC0C3E .word 1041034314 + 244762 02d8 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A851 .short 20904 + 253681 0710 7162 .short 25201 + 253682 0712 CE51 .short 20942 + 253683 0714 5162 .short 25169 + 253684 0716 F551 .short 20981 + 253685 0718 3162 .short 25137 + 253686 071a 1C52 .short 21020 + 253687 071c 1162 .short 25105 + 253688 071e 4252 .short 21058 + 253689 0720 F161 .short 25073 + 253690 0722 6952 .short 21097 + 253691 0724 D061 .short 25040 + 253692 0726 8F52 .short 21135 + 253693 0728 B061 .short 25008 + 253694 072a B552 .short 21173 + 253695 072c 8F61 .short 24975 + 253696 072e DC52 .short 21212 + 253697 0730 6F61 .short 24943 + 253698 0732 0253 .short 21250 + 253699 0734 4E61 .short 24910 + 253700 0736 2853 .short 21288 + 253701 0738 2D61 .short 24877 + 253702 073a 4E53 .short 21326 + 253703 073c 0D61 .short 24845 + 253704 073e 7553 .short 21365 + 253705 0740 EC60 .short 24812 + ARM GAS /tmp/ccLcDeJO.s page 4446 + + + 253706 0742 9B53 .short 21403 + 253707 0744 CB60 .short 24779 + 253708 0746 C153 .short 21441 + 253709 0748 AA60 .short 24746 + 253710 074a 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267613 0b80 C34707E7 .word -418953277 + 267614 0b84 C0A07582 .word -2106220352 + 267615 0b88 212692E8 .word -393075167 + 267616 0b8c 71992982 .word -2111202959 + 267617 0b90 BBEB1DEA .word -367137861 + 267618 0b94 166CE281 .word -2115867626 + 267619 0b98 4E89AAEB .word -341145266 + 267620 0b9c 6C1BA081 .word -2120213652 + 267621 0ba0 91EF37ED .word -315101295 + ARM GAS /tmp/ccLcDeJO.s page 4690 + + + 267622 0ba4 03AA6281 .word -2124240381 + 267623 0ba8 310FC6EE .word -289009871 + 267624 0bac 391A2A81 .word -2127947207 + 267625 0bb0 D4D854F0 .word -262874924 + 267626 0bb4 3C6EF680 .word -2131333572 + 267627 0bb8 1C3DE4F1 .word -236700388 + 267628 0bbc 0AA8C780 .word -2134398966 + 267629 0bc0 A12C74F3 .word -210490207 + 267630 0bc4 70C99D80 .word -2137142928 + 267631 0bc8 FA9704F5 .word -184248326 + 267632 0bcc 0DD47880 .word -2139565043 + 267633 0bd0 B66F95F6 .word -157978698 + 267634 0bd4 4CC95880 .word -2141664948 + 267635 0bd8 61A426F8 .word -131685279 + 267636 0bdc 69AA3D80 .word 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1061544963 + 267665 003c 9967223F .word 1059219353 + 267666 0040 F304353F .word 1060439283 + 267667 0044 F304353F .word 1060439283 + 267668 0048 9967223F .word 1059219353 + 267669 004c 03E4453F .word 1061544963 + 267670 0050 DA390E3F .word 1057896922 + 267671 0054 31DB543F .word 1062525745 + 267672 0058 EA5AF13E .word 1056004842 + 267673 005c 98C5613F .word 1063372184 + 267674 0060 15EFC33E .word 1053028117 + 267675 0064 5E836C3F .word 1064076126 + 267676 0068 31A0943E .word 1049927729 + 267677 006c 0BFA743F .word 1064630795 + 267678 0070 C2C5473E .word 1044891074 + 267679 0074 BE147B3F .word 1065030846 + 267680 0078 36BDC83D .word 1036565814 + ARM GAS /tmp/ccLcDeJO.s page 4691 + + + 267681 007c 6DC47E3F .word 1065272429 + 267682 0080 00000000 .word 0 + 267683 0084 0000803F .word 1065353216 + 267684 0088 36BDC8BD .word -1110917834 + 267685 008c 6DC47E3F .word 1065272429 + 267686 0090 C2C547BE .word -1102592574 + 267687 0094 BE147B3F .word 1065030846 + 267688 0098 31A094BE .word -1097555919 + 267689 009c 0BFA743F .word 1064630795 + 267690 00a0 15EFC3BE .word -1094455531 + 267691 00a4 5E836C3F .word 1064076126 + 267692 00a8 EA5AF1BE .word -1091478806 + 267693 00ac 98C5613F .word 1063372184 + 267694 00b0 DA390EBF .word -1089586726 + 267695 00b4 31DB543F .word 1062525745 + 267696 00b8 996722BF .word -1088264295 + 267697 00bc 03E4453F .word 1061544963 + 267698 00c0 F30435BF .word -1087044365 + 267699 00c4 F304353F .word 1060439283 + 267700 00c8 03E445BF .word -1085938685 + 267701 00cc 9967223F .word 1059219353 + 267702 00d0 31DB54BF .word -1084957903 + 267703 00d4 DA390E3F .word 1057896922 + 267704 00d8 98C561BF .word -1084111464 + 267705 00dc EA5AF13E .word 1056004842 + 267706 00e0 5E836CBF .word -1083407522 + 267707 00e4 15EFC33E .word 1053028117 + 267708 00e8 0BFA74BF .word -1082852853 + 267709 00ec 31A0943E .word 1049927729 + 267710 00f0 BE147BBF .word -1082452802 + 267711 00f4 C2C5473E .word 1044891074 + 267712 00f8 6DC47EBF .word -1082211219 + 267713 00fc 36BDC83D .word 1036565814 + 267714 0100 000080BF .word -1082130432 + 267715 0104 00000000 .word 0 + 267716 0108 6DC47EBF .word -1082211219 + 267717 010c 36BDC8BD .word -1110917834 + 267718 0110 BE147BBF .word -1082452802 + 267719 0114 C2C547BE .word -1102592574 + 267720 0118 0BFA74BF .word -1082852853 + 267721 011c 31A094BE .word -1097555919 + 267722 0120 5E836CBF .word -1083407522 + 267723 0124 15EFC3BE .word -1094455531 + 267724 0128 98C561BF .word -1084111464 + 267725 012c EA5AF1BE .word -1091478806 + 267726 0130 31DB54BF .word -1084957903 + 267727 0134 DA390EBF .word -1089586726 + 267728 0138 03E445BF .word -1085938685 + 267729 013c 996722BF .word -1088264295 + 267730 0140 F30435BF .word -1087044365 + 267731 0144 F30435BF .word -1087044365 + 267732 0148 996722BF .word -1088264295 + 267733 014c 03E445BF .word -1085938685 + 267734 0150 DA390EBF .word -1089586726 + 267735 0154 31DB54BF .word -1084957903 + 267736 0158 EA5AF1BE .word -1091478806 + 267737 015c 98C561BF .word -1084111464 + ARM GAS /tmp/ccLcDeJO.s page 4692 + + + 267738 0160 15EFC3BE .word -1094455531 + 267739 0164 5E836CBF .word -1083407522 + 267740 0168 31A094BE .word -1097555919 + 267741 016c 0BFA74BF .word -1082852853 + 267742 0170 C2C547BE .word -1102592574 + 267743 0174 BE147BBF .word -1082452802 + 267744 0178 36BDC8BD .word -1110917834 + 267745 017c 6DC47EBF .word -1082211219 + 267746 0180 00000080 .word -2147483648 + 267747 0184 000080BF .word -1082130432 + 267748 0188 36BDC83D .word 1036565814 + 267749 018c 6DC47EBF .word -1082211219 + 267750 0190 C2C5473E .word 1044891074 + 267751 0194 BE147BBF .word -1082452802 + 267752 0198 31A0943E .word 1049927729 + 267753 019c 0BFA74BF .word -1082852853 + 267754 01a0 15EFC33E .word 1053028117 + 267755 01a4 5E836CBF .word -1083407522 + 267756 01a8 EA5AF13E .word 1056004842 + 267757 01ac 98C561BF .word -1084111464 + 267758 01b0 DA390E3F .word 1057896922 + 267759 01b4 31DB54BF .word -1084957903 + 267760 01b8 9967223F .word 1059219353 + 267761 01bc 03E445BF .word -1085938685 + 267762 01c0 F304353F .word 1060439283 + 267763 01c4 F30435BF .word -1087044365 + 267764 01c8 03E4453F .word 1061544963 + 267765 01cc 996722BF .word -1088264295 + 267766 01d0 31DB543F .word 1062525745 + 267767 01d4 DA390EBF .word -1089586726 + 267768 01d8 98C5613F .word 1063372184 + 267769 01dc EA5AF1BE .word -1091478806 + 267770 01e0 5E836C3F .word 1064076126 + 267771 01e4 15EFC3BE .word -1094455531 + 267772 01e8 0BFA743F .word 1064630795 + 267773 01ec 31A094BE .word -1097555919 + 267774 01f0 BE147B3F .word 1065030846 + 267775 01f4 C2C547BE .word -1102592574 + 267776 01f8 6DC47E3F .word 1065272429 + 267777 01fc 36BDC8BD .word -1110917834 + 267778 .section .rodata.twiddleCoef_64_q15,"a" + 267779 .align 2 + 267782 twiddleCoef_64_q15: + 267783 0000 FF7F .short 32767 + 267784 0002 0000 .short 0 + 267785 0004 627F .short 32610 + 267786 0006 8B0C .short 3211 + 267787 0008 8A7D .short 32138 + 267788 000a F818 .short 6392 + 267789 000c 7D7A .short 31357 + 267790 000e 2825 .short 9512 + 267791 0010 4176 .short 30273 + 267792 0012 FB30 .short 12539 + 267793 0014 E270 .short 28898 + 267794 0016 563C .short 15446 + 267795 0018 6D6A .short 27245 + 267796 001a 1C47 .short 18204 + ARM GAS /tmp/ccLcDeJO.s page 4693 + + + 267797 001c F262 .short 25330 + 267798 001e 3351 .short 20787 + 267799 0020 825A .short 23170 + 267800 0022 825A .short 23170 + 267801 0024 3351 .short 20787 + 267802 0026 F262 .short 25330 + 267803 0028 1C47 .short 18204 + 267804 002a 6D6A .short 27245 + 267805 002c 563C .short 15446 + 267806 002e E270 .short 28898 + 267807 0030 FB30 .short 12539 + 267808 0032 4176 .short 30273 + 267809 0034 2825 .short 9512 + 267810 0036 7D7A .short 31357 + 267811 0038 F818 .short 6392 + 267812 003a 8A7D .short 32138 + 267813 003c 8B0C .short 3211 + 267814 003e 627F .short 32610 + 267815 0040 0000 .short 0 + 267816 0042 FF7F .short 32767 + 267817 0044 74F3 .short -3212 + 267818 0046 627F .short 32610 + 267819 0048 07E7 .short -6393 + 267820 004a 8A7D .short 32138 + 267821 004c D7DA .short -9513 + 267822 004e 7D7A .short 31357 + 267823 0050 04CF .short -12540 + 267824 0052 4176 .short 30273 + 267825 0054 A9C3 .short -15447 + 267826 0056 E270 .short 28898 + 267827 0058 E3B8 .short -18205 + 267828 005a 6D6A .short 27245 + 267829 005c CCAE .short -20788 + 267830 005e F262 .short 25330 + 267831 0060 7DA5 .short -23171 + 267832 0062 825A .short 23170 + 267833 0064 0D9D .short -25331 + 267834 0066 3351 .short 20787 + 267835 0068 9295 .short -27246 + 267836 006a 1C47 .short 18204 + 267837 006c 1D8F .short -28899 + 267838 006e 563C .short 15446 + 267839 0070 BE89 .short -30274 + 267840 0072 FB30 .short 12539 + 267841 0074 8285 .short -31358 + 267842 0076 2825 .short 9512 + 267843 0078 7582 .short -32139 + 267844 007a F818 .short 6392 + 267845 007c 9D80 .short -32611 + 267846 007e 8B0C .short 3211 + 267847 0080 0080 .short -32768 + 267848 0082 0000 .short 0 + 267849 0084 9D80 .short -32611 + 267850 0086 74F3 .short -3212 + 267851 0088 7582 .short -32139 + 267852 008a 07E7 .short -6393 + 267853 008c 8285 .short -31358 + ARM GAS /tmp/ccLcDeJO.s page 4694 + + + 267854 008e D7DA .short -9513 + 267855 0090 BE89 .short -30274 + 267856 0092 04CF .short -12540 + 267857 0094 1D8F .short -28899 + 267858 0096 A9C3 .short -15447 + 267859 0098 9295 .short -27246 + 267860 009a E3B8 .short -18205 + 267861 009c 0D9D .short -25331 + 267862 009e CCAE .short -20788 + 267863 00a0 7DA5 .short -23171 + 267864 00a2 7DA5 .short -23171 + 267865 00a4 CCAE .short -20788 + 267866 00a6 0D9D .short -25331 + 267867 00a8 E3B8 .short -18205 + 267868 00aa 9295 .short -27246 + 267869 00ac A9C3 .short -15447 + 267870 00ae 1D8F .short -28899 + 267871 00b0 04CF .short -12540 + 267872 00b2 BE89 .short -30274 + 267873 00b4 D7DA .short -9513 + 267874 00b6 8285 .short -31358 + 267875 00b8 07E7 .short -6393 + 267876 00ba 7582 .short -32139 + 267877 00bc 74F3 .short -3212 + 267878 00be 9D80 .short -32611 + 267879 .section .rodata.twiddleCoef_64_q31,"a" + 267880 .align 2 + 267883 twiddleCoef_64_q31: + 267884 0000 FFFFFF7F .word 2147483647 + 267885 0004 00000000 .word 0 + 267886 0008 8F36627F .word 2137142927 + 267887 000c 5ED38B0C .word 210490206 + 267888 0010 3F5F8A7D .word 2106220351 + 267889 0014 3CB8F818 .word 418953276 + 267890 0018 5B057D7A .word 2055013723 + 267891 001c 5D0C2825 .word 623381597 + 267892 0020 3CAF4176 .word 1984016188 + 267893 0024 4DC5FB30 .word 821806413 + 267894 0028 C6CBE270 .word 1893911494 + 267895 002c 70BA563C .word 1012316784 + 267896 0030 A4986D6A .word 1785567396 + 267897 0034 E6EC1C47 .word 1193077990 + 267898 0038 AC01F262 .word 1660027308 + 267899 003c 94CC3351 .word 1362349204 + 267900 0040 9A79825A .word 1518500250 + 267901 0044 9A79825A .word 1518500250 + 267902 0048 94CC3351 .word 1362349204 + 267903 004c AC01F262 .word 1660027308 + 267904 0050 E6EC1C47 .word 1193077990 + 267905 0054 A4986D6A .word 1785567396 + 267906 0058 70BA563C .word 1012316784 + 267907 005c C6CBE270 .word 1893911494 + 267908 0060 4DC5FB30 .word 821806413 + 267909 0064 3CAF4176 .word 1984016188 + 267910 0068 5D0C2825 .word 623381597 + 267911 006c 5B057D7A .word 2055013723 + 267912 0070 3CB8F818 .word 418953276 + ARM GAS /tmp/ccLcDeJO.s page 4695 + + + 267913 0074 3F5F8A7D .word 2106220351 + 267914 0078 5ED38B0C .word 210490206 + 267915 007c 8F36627F .word 2137142927 + 267916 0080 00000000 .word 0 + 267917 0084 FFFFFF7F .word 2147483647 + 267918 0088 A12C74F3 .word -210490207 + 267919 008c 8F36627F .word 2137142927 + 267920 0090 C34707E7 .word -418953277 + 267921 0094 3F5F8A7D .word 2106220351 + 267922 0098 A2F3D7DA .word -623381598 + 267923 009c 5B057D7A .word 2055013723 + 267924 00a0 B23A04CF .word -821806414 + 267925 00a4 3CAF4176 .word 1984016188 + 267926 00a8 8F45A9C3 .word -1012316785 + 267927 00ac C6CBE270 .word 1893911494 + 267928 00b0 1913E3B8 .word -1193077991 + 267929 00b4 A4986D6A .word 1785567396 + 267930 00b8 6B33CCAE .word -1362349205 + 267931 00bc AC01F262 .word 1660027308 + 267932 00c0 66867DA5 .word -1518500250 + 267933 00c4 9A79825A .word 1518500250 + 267934 00c8 53FE0D9D .word -1660027309 + 267935 00cc 94CC3351 .word 1362349204 + 267936 00d0 5B679295 .word -1785567397 + 267937 00d4 E6EC1C47 .word 1193077990 + 267938 00d8 3A341D8F .word -1893911494 + 267939 00dc 70BA563C .word 1012316784 + 267940 00e0 C350BE89 .word -1984016189 + 267941 00e4 4DC5FB30 .word 821806413 + 267942 00e8 A4FA8285 .word -2055013724 + 267943 00ec 5D0C2825 .word 623381597 + 267944 00f0 C0A07582 .word -2106220352 + 267945 00f4 3CB8F818 .word 418953276 + 267946 00f8 70C99D80 .word -2137142928 + 267947 00fc 5ED38B0C .word 210490206 + 267948 0100 00000080 .word -2147483648 + 267949 0104 00000000 .word 0 + 267950 0108 70C99D80 .word -2137142928 + 267951 010c A12C74F3 .word -210490207 + 267952 0110 C0A07582 .word -2106220352 + 267953 0114 C34707E7 .word -418953277 + 267954 0118 A4FA8285 .word -2055013724 + 267955 011c A2F3D7DA .word -623381598 + 267956 0120 C350BE89 .word -1984016189 + 267957 0124 B23A04CF .word -821806414 + 267958 0128 3A341D8F .word -1893911494 + 267959 012c 8F45A9C3 .word -1012316785 + 267960 0130 5B679295 .word -1785567397 + 267961 0134 1913E3B8 .word -1193077991 + 267962 0138 53FE0D9D .word -1660027309 + 267963 013c 6B33CCAE .word -1362349205 + 267964 0140 66867DA5 .word -1518500250 + 267965 0144 66867DA5 .word -1518500250 + 267966 0148 6B33CCAE .word -1362349205 + 267967 014c 53FE0D9D .word -1660027309 + 267968 0150 1913E3B8 .word -1193077991 + 267969 0154 5B679295 .word -1785567397 + ARM GAS /tmp/ccLcDeJO.s page 4696 + + + 267970 0158 8F45A9C3 .word -1012316785 + 267971 015c 3A341D8F .word -1893911494 + 267972 0160 B23A04CF .word -821806414 + 267973 0164 C350BE89 .word -1984016189 + 267974 0168 A2F3D7DA .word -623381598 + 267975 016c A4FA8285 .word -2055013724 + 267976 0170 C34707E7 .word -418953277 + 267977 0174 C0A07582 .word -2106220352 + 267978 0178 A12C74F3 .word -210490207 + 267979 017c 70C99D80 .word -2137142928 + 267980 .section .rodata.twiddleCoef_rfft_1024,"a" + 267981 .align 2 + 267984 twiddleCoef_rfft_1024: + 267985 0000 00000000 .word 0 + 267986 0004 0000803F .word 1065353216 + 267987 0008 890FC93B .word 1003032457 + 267988 000c C4FE7F3F .word 1065352900 + 267989 0010 900E493C .word 1011420816 + 267990 0014 11FB7F3F .word 1065351953 + 267991 0018 B6C9963C .word 1016514998 + 267992 001c E6F47F3F .word 1065350374 + 267993 0020 B00AC93C .word 1019808432 + 267994 0024 43EC7F3F .word 1065348163 + 267995 0028 B949FB3C .word 1023101369 + 267996 002c 29E17F3F .word 1065345321 + 267997 0030 2CC3163D .word 1024901932 + 267998 0034 98D37F3F .word 1065341848 + 267999 0038 07E02F3D .word 1026547719 + 268000 003c 8FC37F3F .word 1065337743 + 268001 0040 2FFB483D .word 1028193071 + 268002 0044 0FB17F3F .word 1065333007 + 268003 0048 6814623D .word 1029837928 + 268004 004c 189C7F3F .word 1065327640 + 268005 0050 742B7B3D .word 1031482228 + 268006 0054 AB847F3F .word 1065321643 + 268007 0058 0A208A3D .word 1032462346 + 268008 005c C76A7F3F .word 1065315015 + 268009 0060 05A9963D .word 1033283845 + 268010 0064 6D4E7F3F .word 1065307757 + 268011 0068 8C30A33D .word 1034104972 + 268012 006c 9D2F7F3F .word 1065299869 + 268013 0070 80B6AF3D .word 1034925696 + 268014 0074 580E7F3F .word 1065291352 + 268015 0078 C33ABC3D .word 1035745987 + 268016 007c 9DEA7E3F .word 1065282205 + 268017 0080 36BDC83D .word 1036565814 + 268018 0084 6DC47E3F .word 1065272429 + 268019 0088 B93DD53D .word 1037385145 + 268020 008c C99B7E3F .word 1065262025 + 268021 0090 2EBCE13D .word 1038203950 + 268022 0094 B0707E3F .word 1065250992 + 268023 0098 7638EE3D .word 1039022198 + 268024 009c 23437E3F .word 1065239331 + 268025 00a0 73B2FA3D .word 1039839859 + 268026 00a4 24137E3F .word 1065227044 + 268027 00a8 0295033E .word 1040422146 + 268028 00ac B1E07D3F .word 1065214129 + ARM GAS /tmp/ccLcDeJO.s page 4697 + + + 268029 00b0 86CF093E .word 1040830342 + 268030 00b4 CCAB7D3F .word 1065200588 + 268031 00b8 B708103E .word 1041238199 + 268032 00bc 74747D3F .word 1065186420 + 268033 00c0 8340163E .word 1041645699 + 268034 00c4 AC3A7D3F .word 1065171628 + 268035 00c8 DE761C3E .word 1042052830 + 268036 00cc 73FE7C3F .word 1065156211 + 268037 00d0 B6AB223E .word 1042459574 + 268038 00d4 C9BF7C3F .word 1065140169 + 268039 00d8 FCDE283E .word 1042865916 + 268040 00dc B07E7C3F .word 1065123504 + 268041 00e0 A2102F3E .word 1043271842 + 268042 00e4 283B7C3F .word 1065106216 + 268043 00e8 9840353E .word 1043677336 + 268044 00ec 31F57B3F .word 1065088305 + 268045 00f0 CF6E3B3E .word 1044082383 + 268046 00f4 CDAC7B3F .word 1065069773 + 268047 00f8 379B413E .word 1044486967 + 268048 00fc FC617B3F .word 1065050620 + 268049 0100 C2C5473E .word 1044891074 + 268050 0104 BE147B3F .word 1065030846 + 268051 0108 60EE4D3E .word 1045294688 + 268052 010c 16C57A3F .word 1065010454 + 268053 0110 0115543E .word 1045697793 + 268054 0114 02737A3F .word 1064989442 + 268055 0118 97395A3E .word 1046100375 + 268056 011c 841E7A3F .word 1064967812 + 268057 0120 135C603E .word 1046502419 + 268058 0124 9DC7793F .word 1064945565 + 268059 0128 667C663E .word 1046903910 + 268060 012c 4E6E793F .word 1064922702 + 268061 0130 7F9A6C3E .word 1047304831 + 268062 0134 9812793F .word 1064899224 + 268063 0138 51B6723E .word 1047705169 + 268064 013c 7BB4783F .word 1064875131 + 268065 0140 CCCF783E .word 1048104908 + 268066 0144 F853783F .word 1064850424 + 268067 0148 E1E67E3E .word 1048504033 + 268068 014c 10F1773F .word 1064825104 + 268069 0150 C07D823E .word 1048739264 + 268070 0154 C58B773F .word 1064799173 + 268071 0158 CE86853E .word 1048938190 + 268072 015c 1724773F .word 1064772631 + 268073 0160 938E883E .word 1049136787 + 268074 0164 07BA763F .word 1064745479 + 268075 0168 07958B3E .word 1049335047 + 268076 016c 974D763F .word 1064717719 + 268077 0170 229A8E3E .word 1049532962 + 268078 0174 C6DE753F .word 1064689350 + 268079 0178 DD9D913E .word 1049730525 + 268080 017c 976D753F .word 1064660375 + 268081 0180 31A0943E .word 1049927729 + 268082 0184 0BFA743F .word 1064630795 + 268083 0188 17A1973E .word 1050124567 + 268084 018c 2284743F .word 1064600610 + 268085 0190 86A09A3E .word 1050321030 + ARM GAS /tmp/ccLcDeJO.s page 4698 + + + 268086 0194 DD0B743F .word 1064569821 + 268087 0198 789E9D3E .word 1050517112 + 268088 019c 3F91733F .word 1064538431 + 268089 01a0 E59AA03E .word 1050712805 + 268090 01a4 4714733F .word 1064506439 + 268091 01a8 C595A33E .word 1050908101 + 268092 01ac F894723F .word 1064473848 + 268093 01b0 128FA63E .word 1051102994 + 268094 01b4 5213723F .word 1064440658 + 268095 01b8 C486A93E .word 1051297476 + 268096 01bc 578F713F .word 1064406871 + 268097 01c0 D47CAC3E .word 1051491540 + 268098 01c4 0809713F .word 1064372488 + 268099 01c8 3A71AF3E .word 1051685178 + 268100 01cc 6680703F .word 1064337510 + 268101 01d0 EF63B23E .word 1051878383 + 268102 01d4 73F56F3F .word 1064301939 + 268103 01d8 EC54B53E .word 1052071148 + 268104 01dc 30686F3F .word 1064265776 + 268105 01e0 2A44B83E .word 1052263466 + 268106 01e4 9ED86E3F .word 1064229022 + 268107 01e8 A031BB3E .word 1052455328 + 268108 01ec BE466E3F .word 1064191678 + 268109 01f0 4A1DBE3E .word 1052646730 + 268110 01f4 93B26D3F .word 1064153747 + 268111 01f8 1E07C13E .word 1052837662 + 268112 01fc 1D1C6D3F .word 1064115229 + 268113 0200 15EFC33E .word 1053028117 + 268114 0204 5E836C3F .word 1064076126 + 268115 0208 29D5C63E .word 1053218089 + 268116 020c 58E86B3F .word 1064036440 + 268117 0210 53B9C93E .word 1053407571 + 268118 0214 0C4B6B3F .word 1063996172 + 268119 0218 8B9BCC3E .word 1053596555 + 268120 021c 7BAB6A3F .word 1063955323 + 268121 0220 CA7BCF3E .word 1053785034 + 268122 0224 A7096A3F .word 1063913895 + 268123 0228 095AD23E .word 1053973001 + 268124 022c 9165693F .word 1063871889 + 268125 0230 4136D53E .word 1054160449 + 268126 0234 3CBF683F .word 1063829308 + 268127 0238 6B10D83E .word 1054347371 + 268128 023c A816683F .word 1063786152 + 268129 0240 80E8DA3E .word 1054533760 + 268130 0244 D86B673F .word 1063742424 + 268131 0248 79BEDD3E .word 1054719609 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228474BF .word -1082883038 + 268913 0e80 31A0943E .word 1049927729 + 268914 0e84 0BFA74BF .word -1082852853 + 268915 0e88 DD9D913E .word 1049730525 + 268916 0e8c 976D75BF .word -1082823273 + 268917 0e90 229A8E3E .word 1049532962 + 268918 0e94 C6DE75BF .word -1082794298 + 268919 0e98 07958B3E .word 1049335047 + 268920 0e9c 974D76BF .word -1082765929 + 268921 0ea0 938E883E .word 1049136787 + 268922 0ea4 07BA76BF .word -1082738169 + 268923 0ea8 CE86853E .word 1048938190 + 268924 0eac 172477BF .word -1082711017 + 268925 0eb0 C07D823E .word 1048739264 + 268926 0eb4 C58B77BF .word -1082684475 + 268927 0eb8 E1E67E3E .word 1048504033 + 268928 0ebc 10F177BF .word -1082658544 + 268929 0ec0 CCCF783E .word 1048104908 + 268930 0ec4 F85378BF .word -1082633224 + 268931 0ec8 51B6723E .word 1047705169 + 268932 0ecc 7BB478BF .word -1082608517 + 268933 0ed0 7F9A6C3E .word 1047304831 + 268934 0ed4 981279BF .word -1082584424 + 268935 0ed8 667C663E .word 1046903910 + 268936 0edc 4E6E79BF .word -1082560946 + 268937 0ee0 135C603E .word 1046502419 + 268938 0ee4 9DC779BF .word -1082538083 + 268939 0ee8 97395A3E .word 1046100375 + 268940 0eec 841E7ABF .word -1082515836 + ARM GAS /tmp/ccLcDeJO.s page 4713 + + + 268941 0ef0 0115543E .word 1045697793 + 268942 0ef4 02737ABF .word -1082494206 + 268943 0ef8 60EE4D3E .word 1045294688 + 268944 0efc 16C57ABF .word -1082473194 + 268945 0f00 C2C5473E .word 1044891074 + 268946 0f04 BE147BBF .word -1082452802 + 268947 0f08 379B413E .word 1044486967 + 268948 0f0c FC617BBF .word -1082433028 + 268949 0f10 CF6E3B3E .word 1044082383 + 268950 0f14 CDAC7BBF .word -1082413875 + 268951 0f18 9840353E .word 1043677336 + 268952 0f1c 31F57BBF .word -1082395343 + 268953 0f20 A2102F3E .word 1043271842 + 268954 0f24 283B7CBF .word -1082377432 + 268955 0f28 FCDE283E .word 1042865916 + 268956 0f2c B07E7CBF .word -1082360144 + 268957 0f30 B6AB223E .word 1042459574 + 268958 0f34 C9BF7CBF .word -1082343479 + 268959 0f38 DE761C3E .word 1042052830 + 268960 0f3c 73FE7CBF .word -1082327437 + 268961 0f40 8340163E .word 1041645699 + 268962 0f44 AC3A7DBF .word -1082312020 + 268963 0f48 B708103E .word 1041238199 + 268964 0f4c 74747DBF .word -1082297228 + 268965 0f50 86CF093E .word 1040830342 + 268966 0f54 CCAB7DBF .word -1082283060 + 268967 0f58 0295033E .word 1040422146 + 268968 0f5c B1E07DBF .word -1082269519 + 268969 0f60 73B2FA3D .word 1039839859 + 268970 0f64 24137EBF .word -1082256604 + 268971 0f68 7638EE3D .word 1039022198 + 268972 0f6c 23437EBF .word -1082244317 + 268973 0f70 2EBCE13D .word 1038203950 + 268974 0f74 B0707EBF .word -1082232656 + 268975 0f78 B93DD53D .word 1037385145 + 268976 0f7c C99B7EBF .word -1082221623 + 268977 0f80 36BDC83D .word 1036565814 + 268978 0f84 6DC47EBF .word -1082211219 + 268979 0f88 C33ABC3D .word 1035745987 + 268980 0f8c 9DEA7EBF .word -1082201443 + 268981 0f90 80B6AF3D .word 1034925696 + 268982 0f94 580E7FBF .word -1082192296 + 268983 0f98 8C30A33D .word 1034104972 + 268984 0f9c 9D2F7FBF .word -1082183779 + 268985 0fa0 05A9963D .word 1033283845 + 268986 0fa4 6D4E7FBF .word -1082175891 + 268987 0fa8 0A208A3D .word 1032462346 + 268988 0fac C76A7FBF .word -1082168633 + 268989 0fb0 742B7B3D .word 1031482228 + 268990 0fb4 AB847FBF .word -1082162005 + 268991 0fb8 6814623D .word 1029837928 + 268992 0fbc 189C7FBF .word -1082156008 + 268993 0fc0 2FFB483D .word 1028193071 + 268994 0fc4 0FB17FBF .word -1082150641 + 268995 0fc8 07E02F3D .word 1026547719 + 268996 0fcc 8FC37FBF .word -1082145905 + 268997 0fd0 2CC3163D .word 1024901932 + ARM GAS /tmp/ccLcDeJO.s page 4714 + + + 268998 0fd4 98D37FBF .word -1082141800 + 268999 0fd8 B949FB3C .word 1023101369 + 269000 0fdc 29E17FBF .word -1082138327 + 269001 0fe0 B00AC93C .word 1019808432 + 269002 0fe4 43EC7FBF .word -1082135485 + 269003 0fe8 B6C9963C .word 1016514998 + 269004 0fec E6F47FBF .word -1082133274 + 269005 0ff0 900E493C .word 1011420816 + 269006 0ff4 11FB7FBF .word -1082131695 + 269007 0ff8 890FC93B .word 1003032457 + 269008 0ffc C4FE7FBF .word -1082130748 + 269009 .section .rodata.twiddleCoef_rfft_128,"a" + 269010 .align 2 + 269013 twiddleCoef_rfft_128: + 269014 0000 00000000 .word 0 + 269015 0004 0000803F .word 1065353216 + 269016 0008 2FFB483D .word 1028193071 + 269017 000c 0FB17F3F .word 1065333007 + 269018 0010 36BDC83D .word 1036565814 + 269019 0014 6DC47E3F .word 1065272429 + 269020 0018 8340163E .word 1041645699 + 269021 001c AC3A7D3F .word 1065171628 + 269022 0020 C2C5473E .word 1044891074 + 269023 0024 BE147B3F .word 1065030846 + 269024 0028 CCCF783E .word 1048104908 + 269025 002c F853783F .word 1064850424 + 269026 0030 31A0943E .word 1049927729 + 269027 0034 0BFA743F .word 1064630795 + 269028 0038 D47CAC3E .word 1051491540 + 269029 003c 0809713F .word 1064372488 + 269030 0040 15EFC33E .word 1053028117 + 269031 0044 5E836C3F .word 1064076126 + 269032 0048 80E8DA3E .word 1054533760 + 269033 004c D86B673F .word 1063742424 + 269034 0050 EA5AF13E .word 1056004842 + 269035 0054 98C5613F .word 1063372184 + 269036 0058 3D9C033F .word 1057201213 + 269037 005c 1A945B3F .word 1062966298 + 269038 0060 DA390E3F .word 1057896922 + 269039 0064 31DB543F .word 1062525745 + 269040 0068 C07F183F .word 1058570176 + 269041 006c 029F4D3F .word 1062051586 + 269042 0070 9967223F .word 1059219353 + 269043 0074 03E4453F .word 1061544963 + 269044 0078 4AEB2B3F .word 1059842890 + 269045 007c F9AE3D3F .word 1061007097 + 269046 0080 F304353F .word 1060439283 + 269047 0084 F304353F .word 1060439283 + 269048 0088 F9AE3D3F .word 1061007097 + 269049 008c 4AEB2B3F .word 1059842890 + 269050 0090 03E4453F .word 1061544963 + 269051 0094 9967223F .word 1059219353 + 269052 0098 029F4D3F .word 1062051586 + 269053 009c C07F183F .word 1058570176 + 269054 00a0 31DB543F .word 1062525745 + 269055 00a4 DA390E3F .word 1057896922 + 269056 00a8 1A945B3F .word 1062966298 + ARM GAS /tmp/ccLcDeJO.s page 4715 + + + 269057 00ac 3D9C033F .word 1057201213 + 269058 00b0 98C5613F .word 1063372184 + 269059 00b4 EA5AF13E .word 1056004842 + 269060 00b8 D86B673F .word 1063742424 + 269061 00bc 80E8DA3E .word 1054533760 + 269062 00c0 5E836C3F .word 1064076126 + 269063 00c4 15EFC33E .word 1053028117 + 269064 00c8 0809713F .word 1064372488 + 269065 00cc D47CAC3E .word 1051491540 + 269066 00d0 0BFA743F .word 1064630795 + 269067 00d4 31A0943E .word 1049927729 + 269068 00d8 F853783F .word 1064850424 + 269069 00dc CCCF783E .word 1048104908 + 269070 00e0 BE147B3F .word 1065030846 + 269071 00e4 C2C5473E .word 1044891074 + 269072 00e8 AC3A7D3F .word 1065171628 + 269073 00ec 8340163E .word 1041645699 + 269074 00f0 6DC47E3F .word 1065272429 + 269075 00f4 36BDC83D .word 1036565814 + 269076 00f8 0FB17F3F .word 1065333007 + 269077 00fc 2FFB483D .word 1028193071 + 269078 0100 0000803F .word 1065353216 + 269079 0104 00000000 .word 0 + 269080 0108 0FB17F3F .word 1065333007 + 269081 010c 2FFB48BD .word -1119290577 + 269082 0110 6DC47E3F .word 1065272429 + 269083 0114 36BDC8BD .word -1110917834 + 269084 0118 AC3A7D3F .word 1065171628 + 269085 011c 834016BE .word -1105837949 + 269086 0120 BE147B3F .word 1065030846 + 269087 0124 C2C547BE .word -1102592574 + 269088 0128 F853783F .word 1064850424 + 269089 012c CCCF78BE .word -1099378740 + 269090 0130 0BFA743F .word 1064630795 + 269091 0134 31A094BE .word -1097555919 + 269092 0138 0809713F .word 1064372488 + 269093 013c D47CACBE .word -1095992108 + 269094 0140 5E836C3F .word 1064076126 + 269095 0144 15EFC3BE .word -1094455531 + 269096 0148 D86B673F .word 1063742424 + 269097 014c 80E8DABE .word -1092949888 + 269098 0150 98C5613F .word 1063372184 + 269099 0154 EA5AF1BE .word -1091478806 + 269100 0158 1A945B3F .word 1062966298 + 269101 015c 3D9C03BF .word -1090282435 + 269102 0160 31DB543F .word 1062525745 + 269103 0164 DA390EBF .word -1089586726 + 269104 0168 029F4D3F .word 1062051586 + 269105 016c C07F18BF .word -1088913472 + 269106 0170 03E4453F .word 1061544963 + 269107 0174 996722BF .word -1088264295 + 269108 0178 F9AE3D3F .word 1061007097 + 269109 017c 4AEB2BBF .word -1087640758 + 269110 0180 F304353F .word 1060439283 + 269111 0184 F30435BF .word -1087044365 + 269112 0188 4AEB2B3F .word 1059842890 + 269113 018c F9AE3DBF .word -1086476551 + ARM GAS /tmp/ccLcDeJO.s page 4716 + + + 269114 0190 9967223F .word 1059219353 + 269115 0194 03E445BF .word -1085938685 + 269116 0198 C07F183F .word 1058570176 + 269117 019c 029F4DBF .word -1085432062 + 269118 01a0 DA390E3F .word 1057896922 + 269119 01a4 31DB54BF .word -1084957903 + 269120 01a8 3D9C033F .word 1057201213 + 269121 01ac 1A945BBF .word -1084517350 + 269122 01b0 EA5AF13E .word 1056004842 + 269123 01b4 98C561BF .word -1084111464 + 269124 01b8 80E8DA3E .word 1054533760 + 269125 01bc D86B67BF .word -1083741224 + 269126 01c0 15EFC33E .word 1053028117 + 269127 01c4 5E836CBF .word -1083407522 + 269128 01c8 D47CAC3E .word 1051491540 + 269129 01cc 080971BF .word -1083111160 + 269130 01d0 31A0943E .word 1049927729 + 269131 01d4 0BFA74BF .word -1082852853 + 269132 01d8 CCCF783E .word 1048104908 + 269133 01dc F85378BF .word -1082633224 + 269134 01e0 C2C5473E .word 1044891074 + 269135 01e4 BE147BBF .word -1082452802 + 269136 01e8 8340163E .word 1041645699 + 269137 01ec AC3A7DBF .word -1082312020 + 269138 01f0 36BDC83D .word 1036565814 + 269139 01f4 6DC47EBF .word -1082211219 + 269140 01f8 2FFB483D .word 1028193071 + 269141 01fc 0FB17FBF .word -1082150641 + 269142 .section .rodata.twiddleCoef_rfft_2048,"a" + 269143 .align 2 + 269146 twiddleCoef_rfft_2048: + 269147 0000 00000000 .word 0 + 269148 0004 0000803F .word 1065353216 + 269149 0008 C70F493B .word 994643911 + 269150 000c B1FF7F3F .word 1065353137 + 269151 0010 890FC93B .word 1003032457 + 269152 0014 C4FE7F3F .word 1065352900 + 269153 0018 59CB163C .word 1008126809 + 269154 001c 39FD7F3F .word 1065352505 + 269155 0020 900E493C .word 1011420816 + 269156 0024 11FB7F3F .word 1065351953 + 269157 0028 4B517B3C .word 1014714699 + 269158 002c 4AF87F3F .word 1065351242 + 269159 0030 B6C9963C .word 1016514998 + 269160 0034 E6F47F3F .word 1065350374 + 269161 0038 69EAAF3C .word 1018161769 + 269162 003c E3F07F3F .word 1065349347 + 269163 0040 B00AC93C .word 1019808432 + 269164 0044 43EC7F3F .word 1065348163 + 269165 0048 7B2AE23C .word 1021454971 + 269166 004c 05E77F3F .word 1065346821 + 269167 0050 B949FB3C .word 1023101369 + 269168 0054 29E17F3F .word 1065345321 + 269169 0058 2F340A3D .word 1024078895 + 269170 005c AFDA7F3F .word 1065343663 + 269171 0060 2CC3163D .word 1024901932 + 269172 0064 98D37F3F .word 1065341848 + ARM GAS /tmp/ccLcDeJO.s page 4717 + + + 269173 0068 CC51233D .word 1025724876 + 269174 006c E2CB7F3F .word 1065339874 + 269175 0070 07E02F3D .word 1026547719 + 269176 0074 8FC37F3F .word 1065337743 + 269177 0078 D56D3C3D .word 1027370453 + 269178 007c 9EBA7F3F .word 1065335454 + 269179 0080 2FFB483D .word 1028193071 + 269180 0084 0FB17F3F .word 1065333007 + 269181 0088 0E88553D .word 1029015566 + 269182 008c E3A67F3F .word 1065330403 + 269183 0090 6814623D .word 1029837928 + 269184 0094 189C7F3F .word 1065327640 + 269185 0098 38A06E3D .word 1030660152 + 269186 009c B1907F3F .word 1065324721 + 269187 00a0 742B7B3D .word 1031482228 + 269188 00a4 AB847F3F .word 1065321643 + 269189 00a8 0ADB833D .word 1032051466 + 269190 00ac 08787F3F .word 1065318408 + 269191 00b0 0A208A3D .word 1032462346 + 269192 00b4 C76A7F3F .word 1065315015 + 269193 00b8 B464903D .word 1032873140 + 269194 00bc E95C7F3F .word 1065311465 + 269195 00c0 05A9963D .word 1033283845 + 269196 00c4 6D4E7F3F .word 1065307757 + 269197 00c8 F9EC9C3D .word 1033694457 + 269198 00cc 543F7F3F .word 1065303892 + 269199 00d0 8C30A33D .word 1034104972 + 269200 00d4 9D2F7F3F .word 1065299869 + 269201 00d8 BA73A93D .word 1034515386 + 269202 00dc 491F7F3F .word 1065295689 + 269203 00e0 80B6AF3D .word 1034925696 + 269204 00e4 580E7F3F .word 1065291352 + 269205 00e8 DAF8B53D .word 1035335898 + 269206 00ec C9FC7E3F .word 1065286857 + 269207 00f0 C33ABC3D .word 1035745987 + 269208 00f4 9DEA7E3F .word 1065282205 + 269209 00f8 397CC23D .word 1036155961 + 269210 00fc D4D77E3F .word 1065277396 + 269211 0100 36BDC83D .word 1036565814 + 269212 0104 6DC47E3F .word 1065272429 + 269213 0108 B7FDCE3D .word 1036975543 + 269214 010c 69B07E3F .word 1065267305 + 269215 0110 B93DD53D .word 1037385145 + 269216 0114 C99B7E3F .word 1065262025 + 269217 0118 377DDB3D .word 1037794615 + 269218 011c 8B867E3F .word 1065256587 + 269219 0120 2EBCE13D .word 1038203950 + 269220 0124 B0707E3F .word 1065250992 + 269221 0128 9AFAE73D .word 1038613146 + 269222 012c 385A7E3F .word 1065245240 + 269223 0130 7638EE3D .word 1039022198 + 269224 0134 23437E3F .word 1065239331 + 269225 0138 C075F43D .word 1039431104 + 269226 013c 722B7E3F .word 1065233266 + 269227 0140 73B2FA3D .word 1039839859 + 269228 0144 24137E3F .word 1065227044 + 269229 0148 4577003E .word 1040217925 + ARM GAS /tmp/ccLcDeJO.s page 4718 + + + 269230 014c 38FA7D3F .word 1065220664 + 269231 0150 0295033E .word 1040422146 + 269232 0154 B1E07D3F .word 1065214129 + 269233 0158 6EB2063E .word 1040626286 + 269234 015c 8CC67D3F .word 1065207436 + 269235 0160 86CF093E .word 1040830342 + 269236 0164 CCAB7D3F .word 1065200588 + 269237 0168 4AEC0C3E .word 1041034314 + 269238 016c 6E907D3F .word 1065193582 + 269239 0170 B708103E .word 1041238199 + 269240 0174 74747D3F .word 1065186420 + 269241 0178 CA24133E .word 1041441994 + 269242 017c DE577D3F .word 1065179102 + 269243 0180 8340163E .word 1041645699 + 269244 0184 AC3A7D3F .word 1065171628 + 269245 0188 E05B193E .word 1041849312 + 269246 018c DD1C7D3F .word 1065163997 + 269247 0190 DE761C3E .word 1042052830 + 269248 0194 73FE7C3F .word 1065156211 + 269249 0198 7B911F3E .word 1042256251 + 269250 019c 6CDF7C3F .word 1065148268 + 269251 01a0 B6AB223E .word 1042459574 + 269252 01a4 C9BF7C3F .word 1065140169 + 269253 01a8 8CC5253E .word 1042662796 + 269254 01ac 8A9F7C3F .word 1065131914 + 269255 01b0 FCDE283E .word 1042865916 + 269256 01b4 B07E7C3F .word 1065123504 + 269257 01b8 04F82B3E .word 1043068932 + 269258 01bc 3A5D7C3F .word 1065114938 + 269259 01c0 A2102F3E .word 1043271842 + 269260 01c4 283B7C3F .word 1065106216 + 269261 01c8 D428323E .word 1043474644 + 269262 01cc 7A187C3F .word 1065097338 + 269263 01d0 9840353E .word 1043677336 + 269264 01d4 31F57B3F .word 1065088305 + 269265 01d8 EC57383E .word 1043879916 + 269266 01dc 4DD17B3F .word 1065079117 + 269267 01e0 CF6E3B3E .word 1044082383 + 269268 01e4 CDAC7B3F .word 1065069773 + 269269 01e8 3E853E3E .word 1044284734 + 269270 01ec B2877B3F .word 1065060274 + 269271 01f0 379B413E .word 1044486967 + 269272 01f4 FC617B3F .word 1065050620 + 269273 01f8 B9B0443E .word 1044689081 + 269274 01fc AB3B7B3F .word 1065040811 + 269275 0200 C2C5473E .word 1044891074 + 269276 0204 BE147B3F .word 1065030846 + 269277 0208 4FDA4A3E .word 1045092943 + 269278 020c 37ED7A3F .word 1065020727 + 269279 0210 60EE4D3E .word 1045294688 + 269280 0214 16C57A3F .word 1065010454 + 269281 0218 F101513E .word 1045496305 + 269282 021c 599C7A3F .word 1065000025 + 269283 0220 0115543E .word 1045697793 + 269284 0224 02737A3F .word 1064989442 + 269285 0228 8F27573E .word 1045899151 + 269286 022c 10497A3F .word 1064978704 + ARM GAS /tmp/ccLcDeJO.s page 4719 + + + 269287 0230 97395A3E .word 1046100375 + 269288 0234 841E7A3F .word 1064967812 + 269289 0238 1A4B5D3E .word 1046301466 + 269290 023c 5EF3793F .word 1064956766 + 269291 0240 135C603E .word 1046502419 + 269292 0244 9DC7793F .word 1064945565 + 269293 0248 836C633E .word 1046703235 + 269294 024c 439B793F .word 1064934211 + 269295 0250 667C663E .word 1046903910 + 269296 0254 4E6E793F .word 1064922702 + 269297 0258 BA8B693E .word 1047104442 + 269298 025c C040793F .word 1064911040 + 269299 0260 7F9A6C3E .word 1047304831 + 269300 0264 9812793F .word 1064899224 + 269301 0268 B2A86F3E .word 1047505074 + 269302 026c D6E3783F .word 1064887254 + 269303 0270 51B6723E .word 1047705169 + 269304 0274 7BB4783F .word 1064875131 + 269305 0278 5AC3753E .word 1047905114 + 269306 027c 8684783F .word 1064862854 + 269307 0280 CCCF783E .word 1048104908 + 269308 0284 F853783F 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271457 .align 2 + 271460 twiddleCoef_rfft_32: + 271461 0000 00000000 .word 0 + 271462 0004 0000803F .word 1065353216 + 271463 0008 C2C5473E .word 1044891074 + 271464 000c BE147B3F .word 1065030846 + 271465 0010 15EFC33E .word 1053028117 + 271466 0014 5E836C3F .word 1064076126 + 271467 0018 DA390E3F .word 1057896922 + 271468 001c 31DB543F .word 1062525745 + 271469 0020 F304353F .word 1060439283 + 271470 0024 F304353F .word 1060439283 + 271471 0028 31DB543F .word 1062525745 + 271472 002c DA390E3F .word 1057896922 + 271473 0030 5E836C3F .word 1064076126 + 271474 0034 15EFC33E .word 1053028117 + 271475 0038 BE147B3F .word 1065030846 + 271476 003c C2C5473E .word 1044891074 + 271477 0040 0000803F .word 1065353216 + 271478 0044 00000000 .word 0 + 271479 0048 BE147B3F .word 1065030846 + 271480 004c C2C547BE .word -1102592574 + 271481 0050 5E836C3F .word 1064076126 + 271482 0054 15EFC3BE .word -1094455531 + 271483 0058 31DB543F .word 1062525745 + 271484 005c DA390EBF .word -1089586726 + 271485 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© Copyright (c) 2019 STMicroelectronics. - * All rights reserved.
+ * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -94,7 +93,7 @@ LoopFillZerobss: cmp r2, r4 bcc FillZerobss -/* Call the clock system initialization function.*/ +/* Call the clock system intitialization function.*/ bl SystemInit /* Call static constructors */ bl __libc_init_array @@ -496,4 +495,3 @@ g_pfnVectors: .weak FMAC_IRQHandler .thumb_set FMAC_IRQHandler,Default_Handler -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/note.txt b/note.txt new file mode 100644 index 0000000..31f6e7e --- /dev/null +++ b/note.txt @@ -0,0 +1,278 @@ +######## HW ########### + +# guadagni +3,3 / (2 * 2 * 64) +evince Documenti/tech/docs/dsheet/boards/dm00493601-stm32g4-nucleo32-board-mb1430-stmicroelectronics.pdf +da modificare su MB1430: SB9 and SB10 ON + +# direct sampling +http://armradio.weaksignals.com/ +https://hackaday.io/project/171053-arm-radio-for-system-workbench + +### 2200m +http://www.strobbe.eu/on7yd/136ant/ +http://www.strobbe.eu/on7yd/136ant/#Loops + +### 630m +http://www.472khz.org/ +http://njdtechnologies.net/ +https://www.g0mrf.com/630m.htm P-P, con rosmetro +http://njdtechnologies.net/wb4jwm-630-meter-non-linear-amplifier/ S-E + +# ferrite antenna +http://www.saunalahti.fi/hohtola/ham/active-ferrite-rod-antenna/active-ferrite-rod-antenna.html + +### filtri: +https://www.changpuak.ch/electronics/ceramic_bandpass_filter.php +materiale #2, #3 o #8 (µ 35), #52 (µ75), #18 o #19 (55µ) +https://cdn-reichelt.de/documents/datenblatt/B400/Amidon%23AMI.pdf # Q toroidi amidon +https://52ebad10ee97eea25d5e-d7d40819259e7d3022d9ad53e3694148.ssl.cf3.rackcdn.com/UK_MIS_Q%20Curve%20for%20iron%20powder%20cores_TN.pdf +http://www.w1tag.com/518%20Filter.htm 518 kHz Elliptical 50 Ohm Low-Pass Filter +qrp-labs 630m lpf: 2.2n//2.2n + 10n + 10n + 2.2n//2.2n - 64@T50-2 (20uH) + 70@T50-2 (24uH) + +filtro IF http://sim.okawa-denshi.jp/en/OPttool.php +100khz, gain -2 +150lhz + + + +### trafo: +N49 + +### oscillatore +https://www.rfzero.net/tutorials/si5351a/ + +### oscillatore locale +https://www.ti.com/lit/szza043 - Use of the CMOS Unbuffered Inverter in Oscillator Circuits + +# encoding +http://www.472khz.org/pages/technical-topics/weak-signal-modes.php + +# preamp +https://www.qsl.net/ik2pii/lf/prea136.htm +https://i.stack.imgur.com/eS0fJ.png +https://electronics.stackexchange.com/questions/299396/i-am-looking-for-recommendations-how-to-lower-the-noise-in-this-preamplifier-cir +http://www.u-electronique.com/annuaire/montages/cache/1777/preamplis-rf.html +https://www.sv1afn.com/en/product-category-5/2x-j310-push-pull-low-noise-hf-pre-amplifier-500-khz-54-mhz-diy-kit-2-1.html +https://radioaficionsdr.es.tl/Amplificadores-de-Bajo-Ruido.htm +https://www.okdxf.eu/files/preamp_r60.pdf + +https://www.qsl.net/ko6bb/lf-preamp-1.html j310 2n3904 s-e +3.3 poche per j310 +meglio j113 +j201 ha -1,5 +https://rezzonics.blogspot.com/2016/09/dirty-little-secret-3v3-clone-ltspice.html jfet per basse tensioni + +# audio amp +http://techlib.com/electronics/audioamps.html + +# oscillatore test +https://leap.tardate.com/electronics101/oscillators/colpitts/ 2n3904 5v + +# PA +http://www.k3pgp.org/Notebook/Wd5cvg/Classetx/classetx.htm + + +######## SW ########### + +https://www.eevblog.com/forum/projects/digital-clock-source-for-simple-diy-sdr-radio-with-tayloe-mixer/25/ +https://mightydevices.com/index.php/2020/02/stm32l4-discovery-radio-receiver/ + + +https://www.st.com/resource/en/application_note/dm00607955-guideline-for-using-analog-features-of-stm32g4-series-versus-stm32f3-series-devices-stmicroelectronics.pdf +https://www.st.com/resource/en/application_note/dm00625282-stm32g4-adc-use-tips-and-recommendations-stmicroelectronics.pdf +https://www.st.com/resource/en/datasheet/stm32g431kb.pdf + +# DAC DMA +https://elastic-notes.blogspot.com/p/blog-page_1.html +https://controllerstech.com/dac-in-stm32/ +https://www.programmersought.com/article/32934896275/ +https://electronics.stackexchange.com/questions/510050/stm32g474-signal-generation-with-dma-dac-using-stm32cubemx-hal + +make clean && make -j4 && udisksctl mount -b /dev/sda && cp build/codice.bin /media/$USER/NOD_G431KB + +# decimazione +http://www.ws.binghamton.edu/fowler/fowler%20personal%20page/EE521_files/IV-06%20Multistage%20Schemes_2007.pdf +https://dspguru.com/dsp/faqs/multirate/decimation/ +https://github.com/cHemingway/CM4_CIC_Filter +http://www.radiopassioni.it/pdf/Renon2013_I2PHD.pdf +https://www.dsprelated.com/showarticle/903.php + +# fir +https://www.theunterminatedstring.com/cmsis-arm-fir-comparison/ +https://github.com/ARM-software/CMSIS/blob/master/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c + +# iir +https://hackernoon.com/fast-iir-filtering-on-arm-cortex-m-with-cmsis-dsp-and-gnu-octave-qk1n3y66 + +# fir coeffs +http://www.labbookpages.co.uk/audio/firWindowing.html + +https://dsp.stackexchange.com/questions/31066/how-many-taps-does-an-fir-filter-need/31077 +// 2st +--- octave --- +pkg load signal +coeff = fir1(127, 0.02); +printf ("%d, %d, %d, %d,\n",round(coeff * 2^32)) +freqz(coeff); %Plot filter response +-------------- + +https://www.dsprelated.com/showarticle/1113.php +--- half band fir --- +pkg load signal +ntaps= 15; +N= ntaps-1; +n= -N/2:N/2; +sinc= sin(n*pi/2)./(n*pi+eps); % truncated impulse response; eps= 2E-16 +sinc(N/2 +1)= 1/2; % value for n --> 0 +win= kaiser(ntaps,6); % window function +b= sinc.*win'; +printf ("%d, %d, %d, %d,\n",round(b * 2^30)) +freqz(b) +-------------- + +https://dsp.stackexchange.com/questions/36190/designing-a-half-band-fir-filter-with-scilab/36847#36847 +---- + +# --- +# calcolo coeff onboard +https://github.com/kvdijken/fir_filters +http://www.iowahills.com/A7ExampleCodePage.html +https://www.dsprelated.com/freebooks/sasp/FIR_Digital_Filter_Design.html + +# percorso guadagni +adc in 14bit * 16bit nco => 30bit +30bit/16 => 26bit +fir => 32bit + +1450965318 236khz +1561345318 254khz + +arm-none-eabi-objdump -d -marm build/codice.elf |less + + +https://www.changpuak.ch/electronics/Deliyannis_Bandpass.php 100khz 560pf +fig 12 in https://www.changpuak.ch/electronics/downloads/FilterDesignIn3oSeconds.pdf + + + +############ + LUT: + http://amarkham.com/?p=49 + https://www.daycounter.com/Calculators/Sine-Generator-Calculator.phtml + sin (x+h) ≈ sin x + h*cos x + CORDIC: + https://www.st.com/resource/en/application_note/dm00614795-getting-started-with-the-cordic-accelerator-using-stm32cubeg4-mcu-package-stmicroelectronics.pdf + https://community.st.com/s/question/0D50X0000BJ2FP5/cordic-configuration-stm32g4 + https://brushless.zone/stm32g4-cordic-vs-sinf-for-motor-control/ + https://www.youtube.com/watch?v=SeDyNtKRDMU CORDIC in Practice, Part 2: Cosine and Sine + https://st-onlinetraining.s3.amazonaws.com/STM32G4-Peripheral-Cordic_Coprocessor_%28CORDIC%29/index.html + https://community.st.com/s/question/0D50X0000BJ2FP5/cordic-configuration-stm32g4 + + DEMOD: + https://github.com/df8oe/UHSDR/wiki/How-does-your-UHSDR-software-DSP-work + https://forum.pjrc.com/attachment.php?attachmentid=9746&d=1487439697 Weaver SSB Modulation/Demodulation - A Tutorial + http://science.lpnu.ua/sites/default/files/journal-paper/2018/sep/14625/5.pdf DIGITAL METHOD OF SSB MODULATION + http://www.microtelecom.it/ssbdex/ssbdex-e.htm + FIR: + arm_fir_decimate_init_q15 + https://stackoverflow.com/questions/38264429/cmsis-fir-bandpass-filter + DAC + https://community.st.com/s/question/0D53W000006rVnHSAU/stm32g431kb-dac-dma-not-working + FMAC + https://st-onlinetraining.s3.amazonaws.com/STM32G4-Peripheral-Filter_Math_Accelerator_%28FMAC%29/index.html + +### DEV +make clean && make && udisksctl mount -b /dev/sda && cp build/bassofono.bin /media/fra/NOD_G431KB/ + + +## +precisione +13 * 16 -> 29 +29 / 33 + + +# si5351 +http://www.simonsdialogs.com/2018/11/si5351a-any-frequency-cmos-clock-generator-and-vco-specifications-myths-and-truth/ + +# ottimizzazione +vuole almeno O2 + +# memoria byte +1 id +4 freq +2 rit +16 nome +2 fc +2 fbw +1 fbeta + + +# filtro pre-adc +TSV7722 + +https://electronics.stackexchange.com/questions/20528/calculating-symbolic-input-impedance-of-multiple-feedback-low-pass-filters + +http://sim.okawa-denshi.jp/en/OPttool.php + +fc = 116660[Hz] +R1 = 3.3kΩ +R2 = 12kΩ +R3 = 3.3kΩ +C1 = 470pF +C2 = 100pF + +fc = 138909[Hz] +R1 = 3.9kΩ +R2 = 15kΩ +R3 = 3.9kΩ +C1 = 330pF +C2 = 68pF + +fc = 168834[Hz] +R1 = 3.3kΩ +R2 = 12kΩ +R3 = 3.3kΩ +C1 = 330pF +C2 = 68pF + +# LC +qrp-labs 2200m +2.2n+10n 4.7n+22n 4.7n+22n 2.2n+10n +105T (54uH) 105T (54uH) T50-2 (red) + +# opamp +https://stompville.co.uk/?p=470 +http://www.ko4bb.com/getsimple/index.php?id=isolation-amplifiers +https://www.analog.com/en/analog-dialogue/articles/avoiding-op-amp-instability-problems.html # sul mid-rail + +# +git pull + +git add +git add * +git commit -m "Commit message" +git push origin master + +git push origin --force + +# undersampling +fc = 700 +nyq 350 700 1050 +0 - 350 +350 - 700 +700 - 1050 + +centri: 175, 525, 875 +oversampling = 2 + + +ok 0 - 175 +med 175 - 350 +med 350 - 525 +ok 525 - + +passabasso 175 350 525 +525 700 + +M24C32-RMN6P diff --git a/schemi/bassofono-backups/bassofono-2022-01-10_191923.zip b/schemi/bassofono-backups/bassofono-2022-01-10_191923.zip new file mode 100644 index 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+80,21 @@ X Pin_6 6 -200 -300 150 R 50 50 1 1 P ENDDRAW ENDDEF # -# Connector_Generic_Conn_01x14 +# Connector_Generic_Conn_01x22 # -DEF Connector_Generic_Conn_01x14 J 0 40 Y N 1 F N -F0 "J" 0 700 50 H V C CNN -F1 "Connector_Generic_Conn_01x14" 0 -800 50 H V C CNN +DEF Connector_Generic_Conn_01x22 J 0 40 Y N 1 F N +F0 "J" 0 1100 50 H V C CNN +F1 "Connector_Generic_Conn_01x22" 0 -1200 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST Connector*:*_1x??_* $ENDFPLIST DRAW +S -50 -1095 0 -1105 1 1 6 N +S -50 -995 0 -1005 1 1 6 N +S -50 -895 0 -905 1 1 6 N +S -50 -795 0 -805 1 1 6 N S -50 -695 0 -705 1 1 6 N S -50 -595 0 -605 1 1 6 N S -50 -495 0 -505 1 1 6 N @@ -105,21 +109,33 @@ S -50 305 0 295 1 1 6 N S -50 405 0 395 1 1 6 N S -50 505 0 495 1 1 6 N S -50 605 0 595 1 1 6 N -S -50 650 50 -750 1 1 10 f -X Pin_1 1 -200 600 150 R 50 50 1 1 P -X Pin_10 10 -200 -300 150 R 50 50 1 1 P -X Pin_11 11 -200 -400 150 R 50 50 1 1 P -X Pin_12 12 -200 -500 150 R 50 50 1 1 P -X Pin_13 13 -200 -600 150 R 50 50 1 1 P -X Pin_14 14 -200 -700 150 R 50 50 1 1 P -X Pin_2 2 -200 500 150 R 50 50 1 1 P -X Pin_3 3 -200 400 150 R 50 50 1 1 P -X Pin_4 4 -200 300 150 R 50 50 1 1 P -X Pin_5 5 -200 200 150 R 50 50 1 1 P -X Pin_6 6 -200 100 150 R 50 50 1 1 P -X Pin_7 7 -200 0 150 R 50 50 1 1 P -X Pin_8 8 -200 -100 150 R 50 50 1 1 P -X Pin_9 9 -200 -200 150 R 50 50 1 1 P +S -50 705 0 695 1 1 6 N +S -50 805 0 795 1 1 6 N +S -50 905 0 895 1 1 6 N +S -50 1005 0 995 1 1 6 N +S -50 1050 50 -1150 1 1 10 f +X Pin_1 1 -200 1000 150 R 50 50 1 1 P +X Pin_10 10 -200 100 150 R 50 50 1 1 P +X Pin_11 11 -200 0 150 R 50 50 1 1 P +X Pin_12 12 -200 -100 150 R 50 50 1 1 P +X Pin_13 13 -200 -200 150 R 50 50 1 1 P +X Pin_14 14 -200 -300 150 R 50 50 1 1 P +X Pin_15 15 -200 -400 150 R 50 50 1 1 P +X Pin_16 16 -200 -500 150 R 50 50 1 1 P +X Pin_17 17 -200 -600 150 R 50 50 1 1 P +X Pin_18 18 -200 -700 150 R 50 50 1 1 P +X Pin_19 19 -200 -800 150 R 50 50 1 1 P +X Pin_2 2 -200 900 150 R 50 50 1 1 P +X Pin_20 20 -200 -900 150 R 50 50 1 1 P +X Pin_21 21 -200 -1000 150 R 50 50 1 1 P +X Pin_22 22 -200 -1100 150 R 50 50 1 1 P +X Pin_3 3 -200 800 150 R 50 50 1 1 P +X Pin_4 4 -200 700 150 R 50 50 1 1 P +X Pin_5 5 -200 600 150 R 50 50 1 1 P +X Pin_6 6 -200 500 150 R 50 50 1 1 P +X Pin_7 7 -200 400 150 R 50 50 1 1 P +X Pin_8 8 -200 300 150 R 50 50 1 1 P +X Pin_9 9 -200 200 150 R 50 50 1 1 P ENDDRAW ENDDEF # diff --git a/schemi/bassofono.kicad_pcb b/schemi/bassofono.kicad_pcb index 40ba261..fccca81 100644 --- a/schemi/bassofono.kicad_pcb +++ b/schemi/bassofono.kicad_pcb @@ -1,76 +1,58 @@ -(kicad_pcb (version 20171130) (host pcbnew 5.99.0+really5.1.12+dfsg1-1) +(kicad_pcb (version 20211014) (generator pcbnew) (general (thickness 1.6) - (drawings 4) - (tracks 337) - (zones 0) - (modules 52) - (nets 38) ) - (page A4) + (paper "A4") (layers - (0 F.Cu signal) - (31 B.Cu signal hide) - (32 B.Adhes user) - (33 F.Adhes user hide) - (34 B.Paste user hide) - (35 F.Paste user hide) - (36 B.SilkS user hide) - (37 F.SilkS user hide) - (38 B.Mask user hide) - (39 F.Mask user hide) - (40 Dwgs.User user hide) - (41 Cmts.User user hide) - (42 Eco1.User user hide) - (43 Eco2.User user) - (44 Edge.Cuts user) - (45 Margin user) - (46 B.CrtYd user) - (47 F.CrtYd user) - (48 B.Fab user) - (49 F.Fab user) + (0 "F.Cu" signal) + (31 "B.Cu" signal) + (32 "B.Adhes" user "B.Adhesive") + (33 "F.Adhes" user "F.Adhesive") + (34 "B.Paste" user) + (35 "F.Paste" user) + (36 "B.SilkS" user "B.Silkscreen") + (37 "F.SilkS" user "F.Silkscreen") + (38 "B.Mask" user) + (39 "F.Mask" user) + (40 "Dwgs.User" user "User.Drawings") + (41 "Cmts.User" user "User.Comments") + (42 "Eco1.User" user "User.Eco1") + (43 "Eco2.User" user "User.Eco2") + (44 "Edge.Cuts" user) + (45 "Margin" user) + (46 "B.CrtYd" user "B.Courtyard") + (47 "F.CrtYd" user "F.Courtyard") + (48 "B.Fab" user) + (49 "F.Fab" user) ) (setup - (last_trace_width 0.25) - (user_trace_width 0.2) - (user_trace_width 0.5) - (user_trace_width 1) - (trace_clearance 0.2) - (zone_clearance 0.508) - (zone_45_only no) - (trace_min 0.2) - (via_size 0.8) - (via_drill 0.4) - (via_min_size 0.4) - (via_min_drill 0.3) - (uvia_size 0.3) - (uvia_drill 0.1) - (uvias_allowed no) - (uvia_min_size 0.2) - (uvia_min_drill 0.1) - (edge_width 0.05) - (segment_width 0.2) - (pcb_text_width 0.3) - (pcb_text_size 1.5 1.5) - (mod_edge_width 0.12) - (mod_text_size 1 1) - (mod_text_width 0.15) - (pad_size 1.524 1.524) - (pad_drill 0.762) + (stackup + (layer "F.SilkS" (type "Top Silk Screen")) + (layer "F.Paste" (type "Top Solder Paste")) + (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01)) + (layer "F.Cu" (type "copper") (thickness 0.035)) + (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02)) + (layer "B.Cu" (type "copper") (thickness 0.035)) + (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01)) + (layer "B.Paste" (type "Bottom Solder Paste")) + (layer "B.SilkS" (type "Bottom Silk Screen")) + (copper_finish "None") + (dielectric_constraints no) + ) (pad_to_mask_clearance 0) - (aux_axis_origin 0 0) - (visible_elements FFFFFF7F) (pcbplotparams - (layerselection 0x010fc_ffffffff) + (layerselection 0x00010fc_ffffffff) + (disableapertmacros false) (usegerberextensions false) (usegerberattributes true) (usegerberadvancedattributes true) (creategerberjobfile true) + (svguseinch false) + (svgprecision 6) (excludeedgelayer true) - (linewidth 0.100000) (plotframeref false) (viasonmask false) (mode 1) @@ -78,2556 +60,2600 @@ (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15.000000) + (dxfpolygonmode true) + (dxfimperialunits true) + (dxfusepcbnewfont true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotinvisibletext false) - (padsonsilk false) + (sketchpadsonfab false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) - (outputdirectory "")) + (outputdirectory "") + ) ) (net 0 "") (net 1 "Net-(C3-Pad2)") (net 2 "Net-(C2-Pad1)") - (net 3 GND) + (net 3 "GND") (net 4 "Net-(C4-Pad1)") (net 5 "Net-(C5-Pad1)") - (net 6 +3V3) + (net 6 "+3V3") (net 7 "Net-(C8-Pad2)") (net 8 "Net-(C8-Pad1)") - (net 9 "Net-(J2-Pad1)") - (net 10 "Net-(C1-Pad1)") - (net 11 "Net-(C2-Pad2)") - (net 12 "Net-(C7-Pad1)") - (net 13 "Net-(Q2-Pad1)") - (net 14 "Net-(Q1-Pad1)") - (net 15 "Net-(R9-Pad2)") - (net 16 "Net-(R10-Pad2)") - (net 17 +12V) - (net 18 "Net-(C12-Pad2)") - (net 19 "Net-(C12-Pad1)") - (net 20 "Net-(C3-Pad1)") - (net 21 "Net-(C13-Pad1)") - (net 22 "Net-(C14-Pad1)") - (net 23 "Net-(R1-Pad2)") - (net 24 "Net-(R11-Pad1)") - (net 25 GNDA) - (net 26 +3.3VA) - (net 27 "Net-(J9-Pad1)") - (net 28 "Net-(J11-Pad1)") - (net 29 "Net-(J2-Pad8)") - (net 30 "Net-(J2-Pad6)") - (net 31 "Net-(J2-Pad7)") - (net 32 "Net-(J2-Pad5)") - (net 33 "Net-(J2-Pad9)") - (net 34 "Net-(J2-Pad4)") - (net 35 "Net-(C15-Pad1)") - (net 36 "Net-(C17-Pad2)") - (net 37 "Net-(C17-Pad1)") + (net 9 "Net-(C1-Pad1)") + (net 10 "Net-(C2-Pad2)") + (net 11 "Net-(C7-Pad1)") + (net 12 "+12V") + (net 13 "Net-(C12-Pad2)") + (net 14 "Net-(C12-Pad1)") + (net 15 "Net-(C3-Pad1)") + (net 16 "Net-(C13-Pad1)") + (net 17 "Net-(C14-Pad1)") + (net 18 "Net-(R1-Pad2)") + (net 19 "Net-(R11-Pad1)") + (net 20 "GNDA") + (net 21 "+3.3VA") + (net 22 "Net-(C17-Pad2)") + (net 23 "Net-(C17-Pad1)") + (net 24 "unconnected-(U2-Pad4)") + (net 25 "unconnected-(U2-Pad5)") + (net 26 "unconnected-(U2-Pad7)") + (net 27 "unconnected-(U2-Pad10)") + (net 28 "unconnected-(U2-Pad11)") + (net 29 "unconnected-(U2-Pad13)") + (net 30 "unconnected-(U4-Pad3)") + (net 31 "unconnected-(U5-Pad1)") + (net 32 "unconnected-(U5-Pad2)") + (net 33 "unconnected-(U5-Pad3)") + (net 34 "unconnected-(U5-Pad7)") + (net 35 "Net-(R9-Pad2)") + (net 36 "Net-(R10-Pad2)") + (net 37 "Net-(U2-Pad19)") + (net 38 "Net-(U2-Pad20)") + (net 39 "Net-(U2-Pad21)") + (net 40 "Net-(U2-Pad22)") + (net 41 "Net-(U2-Pad23)") + (net 42 "Net-(U2-Pad24)") + (net 43 "Net-(U2-Pad25)") + (net 44 "Net-(U2-Pad26)") + (net 45 "Net-(U2-Pad27)") + (net 46 "Net-(U2-Pad28)") + (net 47 "Net-(U2-Pad29)") + (net 48 "Net-(U4-Pad6)") + (net 49 "Net-(U4-Pad9)") + (net 50 "Net-(U4-Pad10)") + (net 51 "Net-(D3-Pad1)") - (net_class Default "Questo è il gruppo di collegamenti predefinito" - (clearance 0.2) - (trace_width 0.25) - (via_dia 0.8) - (via_drill 0.4) - (uvia_dia 0.3) - (uvia_drill 0.1) - (add_net +12V) - (add_net +3.3VA) - (add_net +3V3) - (add_net GND) - (add_net GNDA) - (add_net "Net-(C1-Pad1)") - (add_net "Net-(C12-Pad1)") - (add_net "Net-(C12-Pad2)") - (add_net "Net-(C13-Pad1)") - (add_net "Net-(C14-Pad1)") - (add_net "Net-(C15-Pad1)") - (add_net "Net-(C17-Pad1)") - (add_net "Net-(C17-Pad2)") - (add_net "Net-(C2-Pad1)") - (add_net "Net-(C2-Pad2)") - (add_net "Net-(C3-Pad1)") - (add_net "Net-(C3-Pad2)") - (add_net "Net-(C4-Pad1)") - (add_net "Net-(C5-Pad1)") - (add_net "Net-(C7-Pad1)") - (add_net "Net-(C8-Pad1)") - (add_net "Net-(C8-Pad2)") - (add_net "Net-(J11-Pad1)") - (add_net "Net-(J2-Pad1)") - (add_net "Net-(J2-Pad4)") - (add_net "Net-(J2-Pad5)") - (add_net "Net-(J2-Pad6)") - (add_net "Net-(J2-Pad7)") - (add_net "Net-(J2-Pad8)") - (add_net "Net-(J2-Pad9)") - (add_net "Net-(J9-Pad1)") - (add_net "Net-(Q1-Pad1)") - (add_net "Net-(Q2-Pad1)") - (add_net "Net-(R1-Pad2)") - (add_net "Net-(R10-Pad2)") - (add_net "Net-(R11-Pad1)") - (add_net "Net-(R9-Pad2)") - (add_net "Net-(U1-Pad4)") - (add_net "Net-(U2-Pad10)") - (add_net "Net-(U2-Pad12)") - (add_net "Net-(U2-Pad13)") - (add_net "Net-(U2-Pad25)") - (add_net "Net-(U2-Pad26)") - (add_net "Net-(U2-Pad27)") - (add_net "Net-(U2-Pad28)") - (add_net "Net-(U2-Pad29)") - (add_net "Net-(U2-Pad4)") - (add_net "Net-(U2-Pad5)") - (add_net "Net-(U2-Pad7)") - (add_net "Net-(U4-Pad3)") - (add_net "Net-(U5-Pad1)") - (add_net "Net-(U5-Pad2)") - (add_net "Net-(U5-Pad3)") - (add_net "Net-(U5-Pad7)") - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B45) - (at 100.6 90 90) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /60E41D4B) - (attr smd) - (fp_text reference R3 (at 0 -1.65 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 15K (at 0 1.65 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 90) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 10 "Net-(C1-Pad1)")) - (pad 1 smd roundrect (at -1 0 90) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 11 "Net-(C2-Pad2)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A02545) - (at 102.6 90.0375 270) + (footprint "Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEF) (tstamp 00000000-0000-0000-0000-000061a009fb) + (at 112.1195 81.407 180) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") - (path /60E41D57) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e53518") (attr smd) - (fp_text reference C2 (at 0 -1.68 90) (layer F.SilkS) + (fp_text reference "C4" (at 0 -1.68) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 6b25f522-8e2d-4cd8-9d5d-a2b80f60133b) ) - (fp_text value 68p (at 0 1.68 90) (layer F.Fab) + (fp_text value "18p" (at 0 1.68) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp dabe541b-b164-4180-97a4-5ca761b86800) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp 3172f2e2-18d2-4a80-ae30-5707b3409798) ) - (pad 2 smd roundrect (at 1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 11 "Net-(C2-Pad2)")) - (pad 1 smd roundrect (at -1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 2 "Net-(C2-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer "F.SilkS") (width 0.12) (tstamp 0088d107-13d8-496c-8da6-7bbeb9d096b0)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 6a780180-586a-4241-a52d-dc7a5ffcc966)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp 417f13e4-c121-485a-a6b5-8b55e70350b8)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 9dab0cb7-2557-4419-963b-5ae736517f62)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp c201e1b2-fc01-4110-bdaa-a33290468c83)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer "F.CrtYd") (width 0.05) (tstamp e12e827e-36be-4503-8eef-6fc7e8bc5d49)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 128e34ce-eee7-477d-b905-a493e98db783)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp 67621f9e-0a6a-4778-ad69-04dcf300659c)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp 68e09be7-3bbc-4443-a838-209ce20b2bef)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp c801d42e-dd94-493e-bd2f-6c3ddad43f55)) + (pad "1" smd roundrect locked (at -1.0375 0 180) (size 1.175 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.212766) + (net 4 "Net-(C4-Pad1)") (pintype "passive") (tstamp b3d08afa-f296-4e3b-8825-73b6331d35bf)) + (pad "2" smd roundrect locked (at 1.0375 0 180) (size 1.175 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.212766) + (net 3 "GND") (pintype "passive") (tstamp 712d6a7d-2b62-464f-b745-fd2a6b0187f6)) + (model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CF724E) - (at 117.9625 95 180) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61E8255F) - (attr smd) - (fp_text reference C17 (at 0 -1.85) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 1µ (at 0 1.85) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 36 "Net-(C17-Pad2)")) - (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 37 "Net-(C17-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C57C5C) - (at 123.0375 94.996 180) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /6197A0B3) - (attr smd) - (fp_text reference C9 (at 0 -1.85) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value C_Small (at 0 1.85) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 26 +3.3VA)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A00A50) - (at 126.8 91.9625 270) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61984C0D) - (attr smd) - (fp_text reference C10 (at 0 -1.85 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 100n (at 0 1.85 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 6 +3V3)) - (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 3 GND)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61CF81A1) - (at 127 103.6) - (descr "SMD rectangular pad as test Point, square 2.5mm side length") - (tags "test point SMD pad rectangle square") - (path /61DD78FE) - (attr virtual) - (fp_text reference J4 (at 0 -2.148) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value T1 (at 0 2.25) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 -2.15) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) - (net 3 GND)) - ) - - (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 61C65A00) - (at 124.15 82.275 270) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags capacitor) - (path /61CA4AF4) - (attr smd) - (fp_text reference C12 (at 0 -1.85 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 100n (at 0 1.85 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.475 0 270) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) - (net 18 "Net-(C12-Pad2)")) - (pad 1 smd roundrect (at -1.475 0 270) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) - (net 19 "Net-(C12-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Package_TO_SOT_SMD:SOT-23-5 (layer F.Cu) (tedit 5A02FF57) (tstamp 61CF4945) - (at 127.15 99.7 90) - (descr "5-pin SOT23 package") - (tags SOT-23-5) - (path /61CF6A59) - (attr smd) - (fp_text reference U1 (at 0 -2.9 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value LP2985-3.3 (at 0 2.9 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.075))) - ) - (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.9 -1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.9 -1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.9 1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.9 1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) - (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) - (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1)) - (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1)) - (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1)) - (pad 5 smd rect (at 1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 6 +3V3)) - (pad 4 smd rect (at 1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) - (pad 3 smd rect (at -1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 35 "Net-(C15-Pad1)")) - (pad 2 smd rect (at -1.1 0 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 1 smd rect (at -1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) - (net 35 "Net-(C15-Pad1)")) - (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B89) - (at 108.6 96.6 270) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61AFC66D) - (attr smd) - (fp_text reference R7 (at 0 -1.65 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 22k (at 0 1.65 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 270) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1 0 270) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 22 "Net-(C14-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Package_SO:SO-8_3.9x4.9mm_P1.27mm (layer F.Cu) (tedit 5D9F72B1) (tstamp 61C383AE) - (at 109.425 89.905) - (descr "SO, 8 Pin (https://www.nxp.com/docs/en/data-sheet/PCF8523.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") - (tags "SO SO") - (path /61CD40EF) - (attr smd) - (fp_text reference U6 (at 0 -3.4) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value TL082 (at 0 3.4) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.98 0.98) (thickness 0.15))) - ) - (pad 8 smd roundrect (at 2.575 -1.905) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 26 +3.3VA)) - (pad 7 smd roundrect (at 2.575 -0.635) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 2 "Net-(C2-Pad1)")) - (pad 6 smd roundrect (at 2.575 0.635) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 22 "Net-(C14-Pad1)")) - (pad 5 smd roundrect (at 2.575 1.905) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 11 "Net-(C2-Pad2)")) - (pad 4 smd roundrect (at -2.575 1.905) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 25 GNDA)) - (pad 3 smd roundrect (at -2.575 0.635) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 20 "Net-(C3-Pad1)")) - (pad 2 smd roundrect (at -2.575 -0.635) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 "Net-(R11-Pad1)")) - (pad 1 smd roundrect (at -2.575 -1.905) (size 1.75 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 "Net-(R1-Pad2)")) - (model ${KISYS3DMOD}/Package_SO.3dshapes/SO-8_3.9x4.9mm_P1.27mm.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CFA4C9) - (at 114.4 93 180) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61E7FA69) - (attr smd) - (fp_text reference R14 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10k (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 22 "Net-(C14-Pad1)")) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 37 "Net-(C17-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61CF5953) - (at 131.6875 103.6) - (descr "Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags "diode handsolder") - (path /61E592A1) - (attr smd) - (fp_text reference D3 (at 0 -2.28) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value D (at 0 2.28) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.4875 0) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 17 +12V)) - (pad 1 smd roundrect (at -1.4875 0) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 35 "Net-(C15-Pad1)")) - (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_1210_3225Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61CF41C7) - (at 136.8 103.4) - (descr "SMD rectangular pad as test Point, square 2.5mm side length") - (tags "test point SMD pad rectangle square") - (path /61E46F2E) - (attr virtual) - (fp_text reference J3 (at 0 -2.148) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value T1 (at 0 2.25) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_text user %R (at 0 -2.15) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) - (net 17 +12V)) - ) - - (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 61CF0C87) - (at 134 75.946) - (descr "SOT-23, Standard") - (tags SOT-23) - (path /61BFB2BF) - (attr smd) - (fp_text reference Q1 (at 0 -2.5) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value AO3400A (at 0 2.5) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.075))) - ) - (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 27 "Net-(J9-Pad1)")) - (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 14 "Net-(Q1-Pad1)")) - (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 61CF0C4B) - (at 134 79.568) - (descr "SOT-23, Standard") - (tags SOT-23) - (path /61BFCDBB) - (attr smd) - (fp_text reference Q2 (at 0 -2.5) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value AO3400A (at 0 2.5) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.075))) - ) - (pad 3 smd rect (at 1 0) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 28 "Net-(J11-Pad1)")) - (pad 2 smd rect (at -1 0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 1 smd rect (at -1 -0.95) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 13 "Net-(Q2-Pad1)")) - (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CEF4AF) - (at 125.2 76.4 180) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61E0787F) - (attr smd) - (fp_text reference C16 (at 0 -1.85) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 100n (at 0 1.85) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 3 GND)) - (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 6 +3V3)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CF0BCF) - (at 130.4 78.4) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61DD6B28) - (attr smd) - (fp_text reference R13 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 1k (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 3 GND)) - (pad 1 smd roundrect (at -1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 13 "Net-(Q2-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CF0B8D) - (at 130.4 76.4 180) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61DB9882) - (attr smd) - (fp_text reference R12 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 1k (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 14 "Net-(Q1-Pad1)")) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 3 GND)) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61C3819C) - (at 107.6 93.6 180) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61D8745A) - (attr smd) - (fp_text reference R4 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10k (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 22 "Net-(C14-Pad1)")) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 20 "Net-(C3-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CF8DB0) - (at 106.6 96.6 90) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61AFC673) - (attr smd) - (fp_text reference R6 (at 0 -1.65 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 22k (at 0 1.65 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 90) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 22 "Net-(C14-Pad1)")) - (pad 1 smd roundrect (at -1 0 90) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 26 +3.3VA)) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C37FBB) - (at 109.8 101.0375 270) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61D7B29D) - (attr smd) - (fp_text reference C14 (at 0 -1.85 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 1uF (at 0 1.85 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 22 "Net-(C14-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Connector_PinHeader_1.27mm:PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Right (layer F.Cu) (tedit 59FED6E3) (tstamp 61C7179D) - (at 115.443 102.084 270) - (descr "surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 2 (pin 1 right)") - (tags "Surface mounted pin header SMD 1x06 1.27mm single row style2 pin1 right") - (path /61D46357) - (attr smd) - (fp_text reference J1 (at 0 -4.87 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Conn_01x06 (at 0 4.87 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 3.5 -4.35) (end -3.5 -4.35) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.5 4.35) (end 3.5 -4.35) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.5 4.35) (end 3.5 4.35) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.5 -4.35) (end -3.5 4.35) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.11 1.22) (end -1.11 2.59) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -1.32) (end -1.11 0.05) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 3.76) (end -1.11 3.87) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -3.87) (end 1.11 -3.76) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -3.76) (end 2.94 -3.76) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -3.86) (end -1.11 -2.49) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 2.49) (end 1.11 3.86) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -0.05) (end 1.11 1.32) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -2.59) (end 1.11 -1.22) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 3.87) (end 1.11 3.87) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -3.87) (end 1.11 -3.87) (layer F.SilkS) (width 0.12)) - (fp_line (start 2.5 2.105) (end 1.05 2.105) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 1.705) (end 2.5 2.105) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 1.705) (end 2.5 1.705) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -0.435) (end 1.05 -0.435) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -0.835) (end 2.5 -0.435) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -0.835) (end 2.5 -0.835) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -2.975) (end 1.05 -2.975) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -3.375) (end 2.5 -2.975) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -3.375) (end 2.5 -3.375) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 3.375) (end -1.05 3.375) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 2.975) (end -2.5 3.375) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 2.975) (end -2.5 2.975) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 0.835) (end -1.05 0.835) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 0.435) (end -2.5 0.835) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 0.435) (end -2.5 0.435) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -1.705) (end -1.05 -1.705) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -2.105) (end -2.5 -1.705) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -2.105) (end -2.5 -2.105) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -3.81) (end -1.05 3.81) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -3.375) (end 0.615 -3.81) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 3.81) (end 1.05 -3.375) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -3.81) (end 0.615 -3.81) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 3.81) (end -1.05 3.81) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 5 smd rect (at 1.5 1.905 270) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 25 GNDA)) - (pad 3 smd rect (at 1.5 -0.635 270) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 25 GNDA)) - (pad 1 smd rect (at 1.5 -3.175 270) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 26 +3.3VA)) - (pad 6 smd rect (at -1.5 3.175 270) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 12 "Net-(C7-Pad1)")) - (pad 4 smd rect (at -1.5 0.635 270) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 36 "Net-(C17-Pad2)")) - (pad 2 smd rect (at -1.5 -1.905 270) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 25 GNDA)) - (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Right.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1210_3225Metric_Pad1.33x2.70mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C6D2DA) - (at 130.048 94.1955 270) - (descr "Capacitor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61A40FCE) - (attr smd) - (fp_text reference C11 (at 0 -2.3 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10µF (at 0 2.3 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.48 1.6) (end -2.48 1.6) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.6) (end 2.48 1.6) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.6) (end 2.48 -1.6) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.6) (end -2.48 -1.6) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 1.36) (end 0.711252 1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -1.36) (end 0.711252 -1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 3 GND)) - (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 2.7) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 6 +3V3)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1210_3225Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Connector_PinHeader_1.27mm:PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Left (layer F.Cu) (tedit 59FED6E3) (tstamp 61CE7609) - (at 135.152 90.805) - (descr "surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 1 (pin 1 left)") - (tags "Surface mounted pin header SMD 1x14 1.27mm single row style1 pin1 left") - (path /61CE3044) - (attr smd) - (fp_text reference J2 (at 0 -9.95) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Conn_01x14 (at 0 9.95) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 3.5 -9.4) (end -3.5 -9.4) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.5 9.4) (end 3.5 -9.4) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.5 9.4) (end 3.5 9.4) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.5 -9.4) (end -3.5 9.4) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.11 7.57) (end -1.11 8.94) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 5.03) (end -1.11 6.4) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 2.49) (end -1.11 3.86) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -0.05) (end -1.11 1.32) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -2.59) (end -1.11 -1.22) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -5.13) (end -1.11 -3.76) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -7.67) (end -1.11 -6.3) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 6.3) (end 1.11 7.67) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 3.76) (end 1.11 5.13) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 1.22) (end 1.11 2.59) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -1.32) (end 1.11 0.05) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -3.86) (end 1.11 -2.49) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -6.4) (end 1.11 -5.03) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 8.84) (end 1.11 8.95) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -8.95) (end -1.11 -8.84) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -8.84) (end -2.94 -8.84) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.11 -8.94) (end 1.11 -7.57) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 8.95) (end 1.11 8.95) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.11 -8.95) (end 1.11 -8.95) (layer F.SilkS) (width 0.12)) - (fp_line (start 2.5 8.455) (end 1.05 8.455) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 8.055) (end 2.5 8.455) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 8.055) (end 2.5 8.055) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 5.915) (end 1.05 5.915) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 5.515) (end 2.5 5.915) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 5.515) (end 2.5 5.515) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 3.375) (end 1.05 3.375) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 2.975) (end 2.5 3.375) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 2.975) (end 2.5 2.975) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 0.835) (end 1.05 0.835) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 0.435) (end 2.5 0.835) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 0.435) (end 2.5 0.435) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -1.705) (end 1.05 -1.705) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -2.105) (end 2.5 -1.705) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -2.105) (end 2.5 -2.105) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -4.245) (end 1.05 -4.245) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -4.645) (end 2.5 -4.245) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -4.645) (end 2.5 -4.645) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -6.785) (end 1.05 -6.785) (layer F.Fab) (width 0.1)) - (fp_line (start 2.5 -7.185) (end 2.5 -6.785) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -7.185) (end 2.5 -7.185) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 7.185) (end -1.05 7.185) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 6.785) (end -2.5 7.185) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 6.785) (end -2.5 6.785) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 4.645) (end -1.05 4.645) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 4.245) (end -2.5 4.645) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 4.245) (end -2.5 4.245) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 2.105) (end -1.05 2.105) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 1.705) (end -2.5 2.105) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 1.705) (end -2.5 1.705) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -0.435) (end -1.05 -0.435) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -0.835) (end -2.5 -0.435) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -0.835) (end -2.5 -0.835) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -2.975) (end -1.05 -2.975) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -3.375) (end -2.5 -2.975) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -3.375) (end -2.5 -3.375) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -5.515) (end -1.05 -5.515) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -5.915) (end -2.5 -5.515) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -5.915) (end -2.5 -5.915) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -8.055) (end -1.05 -8.055) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -8.455) (end -2.5 -8.055) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -8.455) (end -2.5 -8.455) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 -8.89) (end 1.05 8.89) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 -8.455) (end -0.615 -8.89) (layer F.Fab) (width 0.1)) - (fp_line (start -1.05 8.89) (end -1.05 -8.455) (layer F.Fab) (width 0.1)) - (fp_line (start -0.615 -8.89) (end 1.05 -8.89) (layer F.Fab) (width 0.1)) - (fp_line (start 1.05 8.89) (end -1.05 8.89) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 14 smd rect (at 1.5 8.255) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 17 +12V)) - (pad 12 smd rect (at 1.5 5.715) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 10 smd rect (at 1.5 3.175) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 6 +3V3)) - (pad 8 smd rect (at 1.5 0.635) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 29 "Net-(J2-Pad8)")) - (pad 6 smd rect (at 1.5 -1.905) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 30 "Net-(J2-Pad6)")) - (pad 4 smd rect (at 1.5 -4.445) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 34 "Net-(J2-Pad4)")) - (pad 2 smd rect (at 1.5 -6.985) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 13 smd rect (at -1.5 6.985) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 11 smd rect (at -1.5 4.445) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 9 smd rect (at -1.5 1.905) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 33 "Net-(J2-Pad9)")) - (pad 7 smd rect (at -1.5 -0.635) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 31 "Net-(J2-Pad7)")) - (pad 5 smd rect (at -1.5 -3.175) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 32 "Net-(J2-Pad5)")) - (pad 3 smd rect (at -1.5 -5.715) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 6 +3V3)) - (pad 1 smd rect (at -1.5 -8.255) (size 3 0.65) (layers F.Cu F.Paste F.Mask) - (net 9 "Net-(J2-Pad1)")) - (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Left.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Package_SO:MSOP-10_3x3mm_P0.5mm (layer F.Cu) (tedit 5A02F25C) (tstamp 61C63E2B) - (at 128.37 81.69) - (descr "10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf)") - (tags "SSOP 0.5") - (path /61BE85B0) - (attr smd) - (fp_text reference U4 (at 0 -2.6) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Si5351A-B-GT (at 0 2.6) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.675 -1.45) (end -2.9 -1.45) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 1.675) (end 1.675 1.675) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 -1.675) (end 1.675 -1.675) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 1.675) (end -1.675 1.375) (layer F.SilkS) (width 0.15)) - (fp_line (start 1.675 1.675) (end 1.675 1.375) (layer F.SilkS) (width 0.15)) - (fp_line (start 1.675 -1.675) (end 1.675 -1.375) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 -1.675) (end -1.675 -1.45) (layer F.SilkS) (width 0.15)) - (fp_line (start -3.15 1.85) (end 3.15 1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.15 -1.85) (end 3.15 -1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.15 -1.85) (end 3.15 1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.15 -1.85) (end -3.15 1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.5 -0.5) (end -0.5 -1.5) (layer F.Fab) (width 0.15)) - (fp_line (start -1.5 1.5) (end -1.5 -0.5) (layer F.Fab) (width 0.15)) - (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.15)) - (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15)) - (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.6 0.6) (thickness 0.15))) - ) - (pad 10 smd rect (at 2.2 -1) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 14 "Net-(Q1-Pad1)")) - (pad 9 smd rect (at 2.2 -0.5) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 13 "Net-(Q2-Pad1)")) - (pad 8 smd rect (at 2.2 0) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 7 smd rect (at 2.2 0.5) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 6 +3V3)) - (pad 6 smd rect (at 2.2 1) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 9 "Net-(J2-Pad1)")) - (pad 5 smd rect (at -2.2 1) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 15 "Net-(R9-Pad2)")) - (pad 4 smd rect (at -2.2 0.5) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 16 "Net-(R10-Pad2)")) - (pad 3 smd rect (at -2.2 0) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask)) - (pad 2 smd rect (at -2.2 -0.5) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 19 "Net-(C12-Pad1)")) - (pad 1 smd rect (at -2.2 -1) (size 1.4 0.3) (layers F.Cu F.Paste F.Mask) - (net 6 +3V3)) - (model ${KISYS3DMOD}/Package_SO.3dshapes/MSOP-10_3x3mm_P0.5mm.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61BF9D34) - (at 124.69 78.68 180) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61C09569) - (attr smd) - (fp_text reference R10 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value R (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 6 +3V3)) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 16 "Net-(R10-Pad2)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Package_SO:SOIC-8_3.9x4.9mm_P1.27mm (layer F.Cu) (tedit 5D9F72B1) (tstamp 61C650EA) - (at 119.905 78.475 270) - (descr "SOIC, 8 Pin (JEDEC MS-012AA, https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/soic_narrow-r/r_8.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py") - (tags "SOIC SO") - (path /61C5D959) - (attr smd) - (fp_text reference U5 (at 0 -3.4 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value M24C02-RMN (at 0 3.4 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.98 0.98) (thickness 0.15))) - ) - (pad 8 smd roundrect (at 2.475 -1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 6 +3V3)) - (pad 7 smd roundrect (at 2.475 -0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) - (pad 6 smd roundrect (at 2.475 0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 16 "Net-(R10-Pad2)")) - (pad 5 smd roundrect (at 2.475 1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 15 "Net-(R9-Pad2)")) - (pad 4 smd roundrect (at -2.475 1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 3 GND)) - (pad 3 smd roundrect (at -2.475 0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) - (pad 2 smd roundrect (at -2.475 -0.635 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) - (pad 1 smd roundrect (at -2.475 -1.905 270) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) - (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61CF0C1D) - (at 137.4 79.6) - (descr "SMD rectangular pad as test Point, square 2.5mm side length") - (tags "test point SMD pad rectangle square") - (path /61D77A37) - (attr virtual) - (fp_text reference J11 (at 0 -2.148) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value T1 (at 0 2.25) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 -2.15) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) - (net 28 "Net-(J11-Pad1)")) - ) - - (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61CF0CBC) - (at 137.4 75.946) - (descr "SMD rectangular pad as test Point, square 2.5mm side length") - (tags "test point SMD pad rectangle square") - (path /61D7A7DD) - (attr virtual) - (fp_text reference J9 (at 0 -2.148) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value T1 (at 0 2.25) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 -2.15) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) - (net 27 "Net-(J9-Pad1)")) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CF8934) - (at 130.302 99.2755 90) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61E9EC64) - (attr smd) - (fp_text reference C15 (at 0 -1.85 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 10µF (at 0 1.85 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 90) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 3 GND)) - (pad 1 smd roundrect (at -1.5625 0 90) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 35 "Net-(C15-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Crystal:Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm_HandSoldering (layer F.Cu) (tedit 5A0FD1B2) (tstamp 61C6BE79) - (at 110.95 84.5875 180) - (descr "crystal Epson Toyocom TSX-3225 series https://support.epson.biz/td/api/doc_check.php?dl=brief_fa-238v_en.pdf, hand-soldering, 3.2x2.5mm^2 package") - (tags "SMD SMT crystal hand-soldering") - (path /61D5AC95) - (attr smd) - (fp_text reference Y1 (at 0 -2.95) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Crystal_GND24 (at 0 2.95) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.5 -1.25) (end 1.5 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.5 -1.25) (end 1.6 -1.15) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.15) (end 1.6 1.15) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.15) (end 1.5 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.5 1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.5 1.25) (end -1.6 1.15) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.15) (end -1.6 -1.15) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.15) (end -1.5 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -2.7 -2.15) (end -2.7 2.15) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.7 2.15) (end 2.7 2.15) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.8 -2.2) (end -2.8 2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.8 2.2) (end 2.8 2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.8 2.2) (end 2.8 -2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.8 -2.2) (end -2.8 -2.2) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.7 0.7) (thickness 0.105))) - ) - (pad 4 smd rect (at -1.45 -1.0875 180) (size 2.1 1.725) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 3 smd rect (at 1.45 -1.0875 180) (size 2.1 1.725) (layers F.Cu F.Paste F.Mask) - (net 5 "Net-(C5-Pad1)")) - (pad 2 smd rect (at 1.45 1.0875 180) (size 2.1 1.725) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (pad 1 smd rect (at -1.45 1.0875 180) (size 2.1 1.725) (layers F.Cu F.Paste F.Mask) - (net 4 "Net-(C4-Pad1)")) - (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm_HandSoldering.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A02534) - (at 101.6 82.6) + (footprint "Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEF) (tstamp 00000000-0000-0000-0000-000061a00a0c) + (at 107.475 84.7625 90) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") - (path /60E41D5D) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e53d52") (attr smd) - (fp_text reference C1 (at 0 -1.68) (layer F.SilkS) + (fp_text reference "C5" (at 0 -1.68 90) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp f674b8e7-203d-419e-988a-58e0f9ae4fad) ) - (fp_text value 330p (at 0 1.68) (layer F.Fab) + (fp_text value "22p" (at 0 1.68 90) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp d767f2ff-12ec-4778-96cb-3fdd7a473d60) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab") (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp 6ae963fb-e34f-4e11-9adf-78839a5b2ef1) ) - (pad 2 smd roundrect (at 1.0375 0) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.0375 0) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 10 "Net-(C1-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 35fb7c56-dc85-43f7-b954-81b8040a8500)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer "F.SilkS") (width 0.12) (tstamp 4e677390-a246-4ca0-954c-746e0870f88f)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 25c663ff-96b6-4263-a06e-d1829409cf73)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 34ce7009-187e-4541-a14e-708b3a2903d9)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp 637e9edf-ffed-49a2-8408-fa110c9a4c79)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp b456cffc-d9d7-4c91-91f2-36ec9a65dd1b)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp 291935ec-f8ff-41f0-8717-e68b8af7b8c1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 49a65079-57a9-46fc-8711-1d7f2cab8dbf)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp 73ee7e03-97a8-4121-b568-c25f3934a935)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 87ba184f-bff5-4989-8217-6af375cc3dd8)) + (pad "1" smd roundrect locked (at -1.0375 0 90) (size 1.175 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.212766) + (net 5 "Net-(C5-Pad1)") (pintype "passive") (tstamp f203116d-f256-4611-a03e-9536bbedaf2f)) + (pad "2" smd roundrect locked (at 1.0375 0 90) (size 1.175 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.212766) + (net 3 "GND") (pintype "passive") (tstamp d45d1afe-78e6-4045-862c-b274469da903)) + (model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A009FB) - (at 110.5375 81 180) - (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /60E53518) - (attr smd) - (fp_text reference C4 (at 0 -1.68) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 18p (at 0 1.68) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1.0375 0 180) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 3 GND)) - (pad 1 smd roundrect (at -1.0375 0 180) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 4 "Net-(C4-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A00A1D) - (at 115.062 81.5725 270) + (footprint "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEF) (tstamp 00000000-0000-0000-0000-000061a00a1d) + (at 116.5475 81.026 180) (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "capacitor handsolder") - (path /61989412) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000061989412") (attr smd) - (fp_text reference C6 (at 0 -1.85 90) (layer F.SilkS) + (fp_text reference "C6" (at 0 -1.85) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 9e1b837f-0d34-4a18-9644-9ee68f141f46) ) - (fp_text value 100n (at 0 1.85 90) (layer F.Fab) + (fp_text value "100n" (at 0 1.85) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 63ff1c93-3f96-4c33-b498-5dd8c33bccc0) ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") (effects (font (size 0.8 0.8) (thickness 0.12))) + (tstamp 24f7628d-681d-4f0e-8409-40a129e929d9) ) - (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 6 +3V3)) - (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 3 GND)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer "F.SilkS") (width 0.12) (tstamp 0217dfc4-fc13-4699-99ad-d9948522648e)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer "F.SilkS") (width 0.12) (tstamp bd5408e4-362d-4e43-9d39-78fb99eb52c8)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer "F.CrtYd") (width 0.05) (tstamp 2f215f15-3d52-4c91-93e6-3ea03a95622f)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer "F.CrtYd") (width 0.05) (tstamp 61fe293f-6808-4b7f-9340-9aaac7054a97)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer "F.CrtYd") (width 0.05) (tstamp 8da933a9-35f8-42e6-8504-d1bab7264306)) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer "F.CrtYd") (width 0.05) (tstamp b88717bd-086f-46cd-9d3f-0396009d0996)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 1d9cdadc-9036-4a95-b6db-fa7b3b74c869)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 3a7648d8-121a-4921-9b92-9b35b76ce39b)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp 6bfe5804-2ef9-4c65-b2a7-f01e4014370a)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp c0eca5ed-bc5e-4618-9bcd-80945bea41ed)) + (pad "1" smd roundrect locked (at -1.5625 0 180) (size 1.325 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.188679) + (net 3 "GND") (pintype "passive") (tstamp 75ffc65c-7132-4411-9f2a-ae0c73d79338)) + (pad "2" smd roundrect locked (at 1.5625 0 180) (size 1.325 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.188679) + (net 6 "+3V3") (pintype "passive") (tstamp 3e903008-0276-4a73-8edb-5d9dfde6297c)) + (model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Inductor_SMD:L_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61C3C2A3) - (at 122.3915 101.346 180) - (descr "Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags "inductor handsolder") - (path /61E962FD) - (attr smd) - (fp_text reference L2 (at 0 -2.28) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value L (at 0 2.28) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.602064 1.36) (end 0.602064 1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.602064 -1.36) (end 0.602064 -1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.4875 0 180) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.4875 0 180) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 3 GND)) - (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_1210_3225Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61C3A1EF) - (at 99.8 104) - (descr "SMD rectangular pad as test Point, square 2.5mm side length") - (tags "test point SMD pad rectangle square") - (path /61DF1A37) - (attr virtual) - (fp_text reference J6 (at 0 -2.148) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value RF_GND (at 0 2.25) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_text user %R (at 0 -2.15) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) - (net 25 GNDA)) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CFC450) - (at 104.6 91.8 270) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61CDE9AE) - (attr smd) - (fp_text reference R11 (at 0 -1.65 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 220 (at 0 1.65 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 270) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 21 "Net-(C13-Pad1)")) - (pad 1 smd roundrect (at -1 0 270) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 24 "Net-(R11-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CFC4C4) - (at 104.6 88 270) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /61CD99F8) - (attr smd) - (fp_text reference R5 (at 0 -1.65 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 4k7 (at 0 1.65 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 270) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 24 "Net-(R11-Pad1)")) - (pad 1 smd roundrect (at -1 0 270) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 23 "Net-(R1-Pad2)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61C380BB) - (at 99.8 100.2 270) - (descr "SMD rectangular pad as test Point, square 2.5mm side length") - (tags "test point SMD pad rectangle square") - (path /61D31443) - (attr virtual) - (fp_text reference J5 (at 0 -2.148 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value RF_IN (at 0 2.25 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_text user %R (at 0 -2.15 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 1 smd rect (at 0 0 270) (size 2.5 2.5) (layers F.Cu F.Mask) - (net 1 "Net-(C3-Pad2)")) - ) - - (module Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61C37FE1) - (at 106.4 101.0875 270) - (descr "Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags "diode handsolder") - (path /61D403D1) - (attr smd) - (fp_text reference D2 (at 0 -2.28 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value D (at 0 2.28 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.4875 0 270) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.4875 0 270) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 20 "Net-(C3-Pad1)")) - (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_1210_3225Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61C37FCE) - (at 103.2 101.0875 90) - (descr "Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags "diode handsolder") - (path /61D3F32C) - (attr smd) - (fp_text reference D1 (at 0 -2.28 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value D (at 0 2.28 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.4875 0 90) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 20 "Net-(C3-Pad1)")) - (pad 1 smd roundrect (at -1.4875 0 90) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 26 +3.3VA)) - (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_1210_3225Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C37FAA) - (at 104.4 95.7625 270) - (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61D6FFE6) - (attr smd) - (fp_text reference C13 (at 0 -1.68 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 100n (at 0 1.68 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (pad 1 smd roundrect (at -1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 21 "Net-(C13-Pad1)")) - (pad 2 smd roundrect (at 1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 25 GNDA)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C37E4B) - (at 100.7625 97 180) + (footprint "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEF) (tstamp 00000000-0000-0000-0000-000061a00a50) + (at 125.9625 92.6 180) (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "capacitor handsolder") - (path /61D9EA3F) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000061984c0d") (attr smd) - (fp_text reference C3 (at 0 -1.85) (layer F.SilkS) + (fp_text reference "C10" (at 0 -1.85) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 4e315e69-0417-463a-8b7f-469a08d1496e) ) - (fp_text value 220n (at 0 1.85) (layer F.Fab) + (fp_text value "100n" (at 0 1.85) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 071522c0-d0ed-49b9-906e-6295f67fb0dc) ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") (effects (font (size 0.8 0.8) (thickness 0.12))) + (tstamp 37f31dec-63fc-4634-a141-5dc5d2b60fe4) ) - (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 1 "Net-(C3-Pad2)")) - (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 20 "Net-(C3-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer "F.SilkS") (width 0.12) (tstamp b1ddb058-f7b2-429c-9489-f4e2242ad7e5)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer "F.SilkS") (width 0.12) (tstamp eee16674-2d21-45b6-ab5e-d669125df26c)) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer "F.CrtYd") (width 0.05) (tstamp 88668202-3f0b-4d07-84d4-dcd790f57272)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer "F.CrtYd") (width 0.05) (tstamp c106154f-d948-43e5-abfa-e1b96055d91b)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer "F.CrtYd") (width 0.05) (tstamp c24d6ac8-802d-4df3-a210-9cb1f693e865)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer "F.CrtYd") (width 0.05) (tstamp f449bd37-cc90-4487-aee6-2a20b8d2843a)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 2846428d-39de-4eae-8ce2-64955d56c493)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer "F.Fab") (width 0.1) (tstamp 4fa10683-33cd-4dcd-8acc-2415cd63c62a)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp 8bc2c25a-a1f1-4ce8-b96a-a4f8f4c35079)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer "F.Fab") (width 0.1) (tstamp 9cbf35b8-f4d3-42a3-bb16-04ffd03fd8fd)) + (pad "1" smd roundrect locked (at -1.5625 0 180) (size 1.325 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.188679) + (net 6 "+3V3") (pintype "passive") (tstamp 91c1eb0a-67ae-4ef0-95ce-d060a03a7313)) + (pad "2" smd roundrect locked (at 1.5625 0 180) (size 1.325 1.8) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.188679) + (net 3 "GND") (pintype "passive") (tstamp 009a4fb4-fcc0-4623-ae5d-c1bae3219583)) + (model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61BF9D23) - (at 127.27 84.582 180) + (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEE) (tstamp 00000000-0000-0000-0000-000061a00b23) + (at 100.324 82.477) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") - (path /61C0A1F0) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e41d45") (attr smd) - (fp_text reference R9 (at 0 -1.65) (layer F.SilkS) + (fp_text reference "R1" (at 0 -1.65) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 456c5e47-d71e-4708-b061-1e61634d8648) ) - (fp_text value R (at 0 1.65) (layer F.Fab) + (fp_text value "3k9" (at 0 1.65) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 162e5bdd-61a8-46a3-8485-826b5d58e1a1) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp 0fb27e11-fde6-4a25-adbb-e9684771b369) ) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 15 "Net-(R9-Pad2)")) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 6 +3V3)) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 4346fe55-f906-453a-b81a-1c013104a598)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer "F.SilkS") (width 0.12) (tstamp 5e6153e6-2c19-46de-9a8e-b310a2a07861)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 0f0f7bb5-ade7-4a81-82b4-43be6a8ad05c)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 2f3fba7a-cf45-4bd8-9035-07e6fa0b4732)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 319c683d-aed6-4e7d-aee2-ff9871746d52)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp cb1a49ef-0a06-4f40-9008-61d1d1c36198)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 09bbea88-8bd7-48ec-baae-1b4a9a11a40e)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 41c18011-40db-4384-9ba4-c0158d0d9d6a)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp 56d2bc5d-fd72-4542-ab0f-053a5fd60efa)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp c512fed3-9770-476b-b048-e781b4f3cd72)) + (pad "1" smd roundrect locked (at -1 0) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 9 "Net-(C1-Pad1)") (pintype "passive") (tstamp 2eea20e6-112c-411a-b615-885ae773135a)) + (pad "2" smd roundrect locked (at 1 0) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 18 "Net-(R1-Pad2)") (pintype "passive") (tstamp 08ec951f-e7eb-41cf-9589-697107a98e88)) + (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Inductor_SMD:L_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61BF9BE8) - (at 122.3915 98.044 180) - (descr "Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") - (tags "inductor handsolder") - (path /61A9517F) - (attr smd) - (fp_text reference L1 (at 0 -2.28) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value L (at 0 2.28) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.602064 1.36) (end 0.602064 1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.602064 -1.36) (end 0.602064 -1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.4875 0 180) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 26 +3.3VA)) - (pad 1 smd roundrect (at -1.4875 0 180) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 6 +3V3)) - (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_1210_3225Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A01F7F) - (at 114.062 97.428 180) + (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEE) (tstamp 00000000-0000-0000-0000-000061a00b34) + (at 100.324 84.477 180) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") - (path /60E49D2D) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e41d51") (attr smd) - (fp_text reference R8 (at 0 -1.65) (layer F.SilkS) + (fp_text reference "R2" (at 0 -1.65) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp aa23bfe3-454b-4a2b-bfe1-101c747eb84e) ) - (fp_text value 470 (at 0 1.65) (layer F.Fab) + (fp_text value "3.9K" (at 0 1.65) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 1de61170-5337-44c5-ba28-bd477db4bff1) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp a3fab380-991d-404b-95d5-1c209b047b6e) ) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 7 "Net-(C8-Pad2)")) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 12 "Net-(C7-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 113ffcdf-4c54-4e37-81dc-f91efa934ba7)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer "F.SilkS") (width 0.12) (tstamp ceb12634-32ca-4cbf-9ff5-5e8b53ab18ad)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 000b46d6-b833-4804-8f56-56d539f76d09)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 3a1a39fc-8030-4c93-9d9c-d79ba6824099)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 49b5f540-e128-4e08-bb09-f321f8e64056)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp dd70858b-2f9a-4b3f-9af5-ead3a9ba57e9)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp 2102c637-9f11-48f1-aae6-b4139dc22be2)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 272c2a78-b5f5-4b61-aed3-ec69e0e92729)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 3f2a6679-91d7-4b6c-bf5c-c4d5abb2bc44)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp c7cd39db-931a-4d86-96b8-57e6b39f58f9)) + (pad "1" smd roundrect locked (at -1 0 180) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 2 "Net-(C2-Pad1)") (pintype "passive") (tstamp 62f15a9a-9893-486e-9ad0-ea43f88fc9e7)) + (pad "2" smd roundrect locked (at 1 0 180) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 9 "Net-(C1-Pad1)") (pintype "passive") (tstamp 7273dd21-e834-41d3-b279-d7de727709ca)) + (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A01CB0) - (at 117.8775 97.428) - (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /60E4B819) + (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEE) (tstamp 00000000-0000-0000-0000-000061a00b45) + (at 99.324 87.477 90) + (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags "resistor handsolder") + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e41d4b") (attr smd) - (fp_text reference C7 (at 0 -1.68) (layer F.SilkS) + (fp_text reference "R3" (at 0 -1.65 90) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 101ef598-601d-400e-9ef6-d655fbb1dbfa) ) - (fp_text value C (at 0 1.68) (layer F.Fab) + (fp_text value "15K" (at 0 1.65 90) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp c8029a4c-945d-42ca-871a-dd73ff50a1a3) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab") (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp 82be7aae-5d06-4178-8c3e-98760c41b054) ) - (pad 2 smd roundrect (at 1.0375 0) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.0375 0) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 12 "Net-(C7-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 9b3c58a7-a9b9-4498-abc0-f9f43e4f0292)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer "F.SilkS") (width 0.12) (tstamp c094494a-f6f7-43fc-a007-4951484ddf3a)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 35a9f71f-ba35-47f6-814e-4106ac36c51e)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 5b34a16c-5a14-4291-8242-ea6d6ac54372)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 6781326c-6e0d-4753-8f28-0f5c687e01f9)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp c701ee8e-1214-4781-a973-17bef7b6e3eb)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp 15fe8f3d-6077-4e0e-81d0-8ec3f4538981)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 814763c2-92e5-4a2c-941c-9bbd073f6e87)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp e40e8cef-4fb0-4fc3-be09-3875b2cc8469)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp e65b62be-e01b-4688-a999-1d1be370c4ae)) + (pad "1" smd roundrect locked (at -1 0 90) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 10 "Net-(C2-Pad2)") (pintype "passive") (tstamp d9c6d5d2-0b49-49ba-a970-cd2c32f74c54)) + (pad "2" smd roundrect locked (at 1 0 90) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 9 "Net-(C1-Pad1)") (pintype "passive") (tstamp e1535036-5d36-405f-bb86-3819621c4f23)) + (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Package_QFP:LQFP-32_7x7mm_P0.8mm (layer F.Cu) (tedit 5D9F72AF) (tstamp 61A014F0) + (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEE) (tstamp 00000000-0000-0000-0000-000061a00b89) + (at 107.457 96.6 -90) + (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags "resistor handsolder") + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000061afc66d") + (attr smd) + (fp_text reference "R7" (at 0 -1.65 90) (layer "F.SilkS") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp 0fdc6f30-77bc-4e9b-8665-c8aa9acf5bf9) + ) + (fp_text value "22k" (at 0 1.65 90) (layer "F.Fab") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp 0ae82096-0994-4fb0-9a2a-d4ac4804abac) + ) + (fp_text user "${REFERENCE}" (at 0 0 90) (layer "F.Fab") + (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp 9f80220c-1612-4589-b9ca-a5579617bdb8) + ) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer "F.SilkS") (width 0.12) (tstamp 0f324b67-75ef-407f-8dbc-3c1fc5c2abba)) + (fp_line (start -0.227064 -0.735) (end 0.227064 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(fp_line (start 5.18 3.3) (end 5.18 0) (layer "F.CrtYd") (width 0.05) (tstamp 278a91dc-d57d-4a5c-a045-34b6bd84131f)) + (fp_line (start -3.75 -3.75) (end -3.75 -3.3) (layer "F.CrtYd") (width 0.05) (tstamp 4bbde53d-6894-4e18-9480-84a6a26d5f6b)) + (fp_line (start -3.3 5.18) (end -3.3 3.75) (layer "F.CrtYd") (width 0.05) (tstamp 4cfd9a02-97ef-4af4-a6b8-db9be1a8fda5)) + (fp_line (start 3.3 -3.75) (end 3.75 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp 54ed3ee1-891b-418e-ab9c-6a18747d7388)) + (fp_line (start 3.3 5.18) (end 3.3 3.75) (layer "F.CrtYd") (width 0.05) (tstamp 631c7be5-8dc2-4df4-ab73-737bb928e763)) + (fp_line (start 3.3 3.75) (end 3.75 3.75) (layer "F.CrtYd") (width 0.05) (tstamp 6d2a06fb-0b1e-452a-ab38-11a5f45e1b32)) + (fp_line (start 3.75 -3.75) (end 3.75 -3.3) (layer "F.CrtYd") (width 0.05) (tstamp 749d9ed0-2ff2-4b55-abc5-f7231ec3aa28)) + (fp_line (start -3.3 3.75) (end -3.75 3.75) (layer "F.CrtYd") (width 0.05) (tstamp 751d823e-1d7b-4501-9658-d06d459b0e16)) + (fp_line (start 3.75 -3.3) (end 5.18 -3.3) (layer "F.CrtYd") (width 0.05) (tstamp 8a8c373f-9bc3-4cf7-8f41-4802da916698)) + (fp_line (start 0 -5.18) (end -3.3 -5.18) (layer "F.CrtYd") (width 0.05) (tstamp 9112ddd5-10d5-48b8-954f-f1d5adcacbd9)) + (fp_line (start 5.18 -3.3) (end 5.18 0) (layer "F.CrtYd") (width 0.05) (tstamp 92761c09-a591-4c8e-af4d-e0e2262cb01d)) + (fp_line (start 0 5.18) (end 3.3 5.18) (layer "F.CrtYd") (width 0.05) (tstamp 929a9b03-e99e-4b88-8e16-759f8c6b59a5)) + (fp_line (start 0 5.18) (end -3.3 5.18) (layer "F.CrtYd") (width 0.05) (tstamp aadc3df5-0e2d-4f3d-b72e-6f184da74c89)) + (fp_line (start 0 -5.18) (end 3.3 -5.18) (layer "F.CrtYd") (width 0.05) (tstamp af76ce95-feca-41fb-bf31-edaa26d6766a)) + (fp_line (start -3.75 3.3) (end -5.18 3.3) (layer "F.CrtYd") (width 0.05) (tstamp b21299b9-3c4d-43df-b399-7f9b08eb5470)) + (fp_line (start -5.18 3.3) (end -5.18 0) (layer "F.CrtYd") (width 0.05) (tstamp c210293b-1d7a-4e96-92e9-058784106727)) + (fp_line (start -3.3 -5.18) (end -3.3 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp c3d5daf8-d359-42b2-a7c2-0d080ba7e212)) + (fp_line (start -3.3 -3.75) (end -3.75 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp d3dd7cdb-b730-487d-804d-99150ba318ef)) + (fp_line (start -5.18 -3.3) (end -5.18 0) (layer "F.CrtYd") (width 0.05) (tstamp e11ae5a5-aa10-4f10-b346-f16e33c7899a)) + (fp_line (start -3.75 -3.3) (end -5.18 -3.3) (layer "F.CrtYd") (width 0.05) (tstamp f23ac723-a36d-491d-9473-7ec0ffed332d)) + (fp_line (start -3.75 3.75) (end -3.75 3.3) (layer "F.CrtYd") (width 0.05) (tstamp fc2e9f96-3bed-4896-b995-f56e799f1c77)) + (fp_line (start 3.3 -5.18) (end 3.3 -3.75) (layer "F.CrtYd") (width 0.05) (tstamp fd60415a-f01a-46c5-9369-ea970e435e5b)) + (fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer "F.Fab") (width 0.1) (tstamp 099473f1-6598-46ff-a50f-4c520832170d)) + (fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer "F.Fab") (width 0.1) (tstamp 1876c30c-72b2-4a8d-9f32-bf8b213530b4)) + (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer "F.Fab") (width 0.1) (tstamp 199124ca-dd64-45cf-a063-97cc545cbea7)) + (fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer "F.Fab") (width 0.1) (tstamp c346b00c-b5e0-4939-beb4-7f48172ef334)) + (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer "F.Fab") (width 0.1) (tstamp ca9b74ce-0dee-401c-9544-f599f4cf538d)) + (pad "1" smd roundrect locked (at -4.175 -2.8) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 6 "+3V3") (pinfunction "VDD") (pintype "power_in") (tstamp db6412d3-e6c3-4bdd-abf4-a8f55d56df31)) + (pad "2" smd roundrect locked (at -4.175 -2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 4 "Net-(C4-Pad1)") (pinfunction "PF0") (pintype "bidirectional") (tstamp 83184391-76ed-44f0-8cd0-01f89f157bdb)) + (pad "3" smd roundrect locked (at -4.175 -1.2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 5 "Net-(C5-Pad1)") (pinfunction "PF1") (pintype "bidirectional") (tstamp 966ee9ec-860e-45bb-af89-30bda72b2032)) + (pad "4" smd roundrect locked (at -4.175 -0.4) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 24 "unconnected-(U2-Pad4)") (pinfunction "PG10") (pintype "bidirectional") (tstamp 247ebffd-2cb6-4379-ba6e-21861fea3913)) + (pad "5" smd roundrect locked (at -4.175 0.4) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 25 "unconnected-(U2-Pad5)") (pinfunction "PA0") (pintype "bidirectional") (tstamp 94d24676-7ae3-483c-8bd6-88d31adf00b4)) + (pad "6" smd roundrect locked (at -4.175 1.2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 2 "Net-(C2-Pad1)") (pinfunction "PA1") (pintype "bidirectional") (tstamp e45aa7d8-0254-4176-afd9-766820762e19)) + (pad "7" smd roundrect locked (at -4.175 2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 26 "unconnected-(U2-Pad7)") (pinfunction "PA2") (pintype "bidirectional") (tstamp 1bf7d0f9-0dcf-4d7c-b58c-318e3dc42bc9)) + (pad "8" smd roundrect locked (at -4.175 2.8) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 17 "Net-(C14-Pad1)") (pinfunction "PA3") (pintype "bidirectional") (tstamp 9208ea78-8dde-4b3d-91e9-5755ab5efd9a)) + (pad "9" smd roundrect locked (at -2.8 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 8 "Net-(C8-Pad1)") (pinfunction "PA4") (pintype "bidirectional") (tstamp 58390862-1833-41dd-9c4e-98073ea0da33)) + (pad "10" smd roundrect locked (at -2 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 27 "unconnected-(U2-Pad10)") (pinfunction "PA5") (pintype "bidirectional") (tstamp 5e755161-24a5-4650-a6e3-9836bf074412)) + (pad "11" smd roundrect locked (at -1.2 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 28 "unconnected-(U2-Pad11)") (pinfunction "PA6") (pintype "bidirectional") (tstamp e86e4fae-9ca7-4857-a93c-bc6a3048f887)) + (pad "12" smd roundrect locked (at -0.4 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 23 "Net-(C17-Pad1)") (pinfunction "PA7") (pintype "bidirectional") (tstamp 3457afc5-3e4f-4220-81d1-b079f653a722)) + (pad "13" smd roundrect locked (at 0.4 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 29 "unconnected-(U2-Pad13)") (pinfunction "PB0") (pintype "bidirectional") (tstamp 1855ca44-ab48-4b76-a210-97fc81d916c4)) + (pad "14" smd roundrect locked (at 1.2 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 20 "GNDA") (pinfunction "VSSA") (pintype "power_in") (tstamp 5f48b0f2-82cf-40ce-afac-440f97643c36)) + (pad "15" smd roundrect locked (at 2 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 21 "+3.3VA") (pinfunction "VDDA") (pintype "power_in") (tstamp 254f7cc6-cee1-44ca-9afe-939b318201aa)) + (pad "16" smd roundrect locked (at 2.8 4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 3 "GND") (pinfunction "VSS") (pintype "power_in") (tstamp ca56e1ad-54bf-4df5-a4f7-99f5d61d0de9)) + (pad "17" smd roundrect locked (at 4.175 2.8) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 6 "+3V3") (pinfunction "VDD") (pintype "power_in") (tstamp 0c5dddf1-38df-43d2-b49c-e7b691dab0ab)) + (pad "18" smd roundrect locked (at 4.175 2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 13 "Net-(C12-Pad2)") (pinfunction "PA8") (pintype "bidirectional") (tstamp 0ce1dd44-f307-4f98-9f0d-478fd87daa64)) + (pad "19" smd roundrect locked (at 4.175 1.2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 37 "Net-(U2-Pad19)") (pinfunction "PA9") (pintype "bidirectional") (tstamp f8b47531-6c06-4e54-9fc9-cd9d0f3dd69f)) + (pad "20" smd roundrect locked (at 4.175 0.4) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 38 "Net-(U2-Pad20)") (pinfunction "PA10") (pintype "bidirectional") (tstamp 4970ec6e-3725-4619-b57d-dc2c2cb86ed0)) + (pad "21" smd roundrect locked (at 4.175 -0.4) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 39 "Net-(U2-Pad21)") (pinfunction "PA11") (pintype "bidirectional") (tstamp 755f94aa-38f0-4a64-a7c7-6c71cb18cddf)) + (pad "22" smd roundrect locked (at 4.175 -1.2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 40 "Net-(U2-Pad22)") (pinfunction "PA12") (pintype "bidirectional") (tstamp 9c2999b2-1cf1-4204-9d23-243401b77aa3)) + (pad "23" smd roundrect locked (at 4.175 -2) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 41 "Net-(U2-Pad23)") (pinfunction "PA13") (pintype "bidirectional") (tstamp 6150c02b-beb5-4af1-951e-3666a285a6ea)) + (pad "24" smd roundrect locked (at 4.175 -2.8) (size 1.5 0.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 42 "Net-(U2-Pad24)") (pinfunction "PA14") (pintype "bidirectional") (tstamp 4a53fa56-d65b-42a4-a4be-8f49c4c015bb)) + (pad "25" smd roundrect locked (at 2.8 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 43 "Net-(U2-Pad25)") (pinfunction "PA15") (pintype "bidirectional") (tstamp 3bbbbb7d-391c-4fee-ac81-3c47878edc38)) + (pad "26" smd roundrect locked (at 2 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 44 "Net-(U2-Pad26)") (pinfunction "PB3") (pintype "bidirectional") (tstamp 9ed09117-33cf-45a3-85a7-2606522feaf8)) + (pad "27" smd roundrect locked (at 1.2 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 45 "Net-(U2-Pad27)") (pinfunction "PB4") (pintype "bidirectional") (tstamp eb391a95-1c1d-4613-b508-c76b8bc13a73)) + (pad "28" smd roundrect locked (at 0.4 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 46 "Net-(U2-Pad28)") (pinfunction "PB5") (pintype "bidirectional") (tstamp 706c1cb9-5d96-4282-9efc-6147f0125147)) + (pad "29" smd roundrect locked (at -0.4 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 47 "Net-(U2-Pad29)") (pinfunction "PB6") (pintype "bidirectional") (tstamp 5bab6a37-1fdf-4cf8-b571-44c962ed86e9)) + (pad "30" smd roundrect locked (at -1.2 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 35 "Net-(R9-Pad2)") (pinfunction "PB7") (pintype "bidirectional") (tstamp 92f063a3-7cce-4a96-8a3a-cf5767f700c6)) + (pad "31" smd roundrect locked (at -2 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 36 "Net-(R10-Pad2)") (pinfunction "PB8") (pintype "bidirectional") (tstamp ad4d05f5-6957-42f8-b65c-c657b9a26485)) + (pad "32" smd roundrect locked (at -2.8 -4.175) (size 0.5 1.5) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.25) + (net 3 "GND") (pinfunction "VSS") (pintype "power_in") (tstamp 88deea08-baa5-4041-beb7-01c299cf00e6)) + (model "${KISYS3DMOD}/Package_QFP.3dshapes/LQFP-32_7x7mm_P0.8mm.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B34) - (at 101.6 87 180) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /60E41D51) - (attr smd) - (fp_text reference R2 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 3.9K (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 10 "Net-(C1-Pad1)")) - (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 2 "Net-(C2-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B23) - (at 101.6 85) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /60E41D45) - (attr smd) - (fp_text reference R1 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 3k9 (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 23 "Net-(R1-Pad2)")) - (pad 1 smd roundrect (at -1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 10 "Net-(C1-Pad1)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CE9E1C) - (at 111 95.3625 270) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61B07F9F) - (attr smd) - (fp_text reference C8 (at 0 -1.85 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 1µ (at 0 1.85 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 7 "Net-(C8-Pad2)")) - (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 8 "Net-(C8-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A00A0C) - (at 106.807 84.8575 90) + (footprint "Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEF) (tstamp 00000000-0000-0000-0000-000061a01cb0) + (at 117.8775 97.428) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") - (path /60E53D52) + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e4b819") (attr smd) - (fp_text reference C5 (at 0 -1.68 90) (layer F.SilkS) + (fp_text reference "C7" (at 0 -1.68) (layer "F.SilkS") (effects (font (size 1 1) (thickness 0.15))) + (tstamp 4086cbd7-6ba7-4e63-8da9-17e60627ee17) ) - (fp_text value 22p (at 0 1.68 90) (layer F.Fab) + (fp_text value "C" (at 0 1.68) (layer "F.Fab") (effects (font (size 1 1) (thickness 0.15))) + (tstamp bb8162f0-99c8-4884-be5b-c0d0c7e81ff6) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp 8d063f79-9282-4820-bcf4-1ff3c006cf08) ) - (pad 2 smd roundrect (at 1.0375 0 90) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 3 GND)) - (pad 1 smd roundrect (at -1.0375 0 90) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 5 "Net-(C5-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 8eb98c56-17e4-4de6-a3e3-06dcfa392040)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer "F.SilkS") (width 0.12) (tstamp c66a19ed-90c0-4502-ae75-6a4c4ab9f297)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 275b6416-db29-42cc-9307-bf426917c3b4)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp 3c22d605-7855-4cc6-8ad2-906cadbd02dc)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer "F.CrtYd") (width 0.05) (tstamp 91fc5800-6029-46b1-848d-ca0091f97267)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer "F.CrtYd") (width 0.05) (tstamp bd085057-7c0e-463a-982b-968a2dc1f0f8)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 0554bea0-89b2-4e25-9ea3-4c73921c94cb)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp 22962957-1efd-404d-83db-5b233b6c15b0)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 88606262-3ac5-44a1-aacc-18b26cf4d396)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp cd1cff81-9d8a-4511-96d6-4ddb79484001)) + (pad "1" smd roundrect locked (at -1.0375 0) (size 1.175 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.212766) + (net 11 "Net-(C7-Pad1)") (pintype "passive") (tstamp 29126f72-63f7-4275-8b12-6b96a71c6f17)) + (pad "2" smd roundrect locked (at 1.0375 0) (size 1.175 1.45) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.212766) + (net 20 "GNDA") (pintype "passive") (tstamp af186015-d283-4209-aade-a247e5de01df)) + (model "${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) (scale (xyz 1 1 1)) (rotate (xyz 0 0 0)) ) ) - (gr_line (start 98 74) (end 139.4 74) (layer Edge.Cuts) (width 0.05) (tstamp 61CF0BF3)) - (gr_line (start 98 106) (end 98 74) (layer Edge.Cuts) (width 0.05)) - (gr_line (start 139.4 106) (end 98 106) (layer Edge.Cuts) (width 0.05)) - (gr_line (start 139.4 74) (end 139.4 106) (layer Edge.Cuts) (width 0.05) (tstamp 61CF0BB1)) + (footprint "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" (layer "F.Cu") + (tedit 5F68FEEE) (tstamp 00000000-0000-0000-0000-000061a01f7f) + (at 114.062 97.428 180) + (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags "resistor handsolder") + (property "Sheetfile" "bassofono.kicad_sch") + (property "Sheetname" "") + (path "/00000000-0000-0000-0000-000060e49d2d") + (attr smd) + (fp_text reference "R8" (at 0 -1.65) (layer "F.SilkS") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp 63caf46e-0228-40de-b819-c6bd29dd1711) + ) + (fp_text value "470" (at 0 1.65) (layer "F.Fab") + (effects (font (size 1 1) (thickness 0.15))) + (tstamp a7fc0812-140f-4d96-9cd8-ead8c1c610b1) + ) + (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab") + (effects (font (size 0.5 0.5) (thickness 0.08))) + (tstamp d1c19c11-0a13-4237-b6b4-fb2ef1db7c6d) + ) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer "F.SilkS") (width 0.12) (tstamp 7233cb6b-d8fd-4fcd-9b4f-8b0ed19b1b12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer "F.SilkS") (width 0.12) (tstamp e50c80c5-80c4-46a3-8c1e-c9c3a71a0934)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 0ba17a9b-d889-426c-b4fe-048bed6b6be8)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer "F.CrtYd") (width 0.05) (tstamp 761c8e29-382a-475c-a37a-7201cc9cd0f5)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp 94a10cae-6ef2-4b64-9d98-fb22aa3306cc)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer "F.CrtYd") (width 0.05) (tstamp f33ec0db-ef0f-4576-8054-2833161a8f30)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 3ed2c840-383d-4cbd-bc3b-c4ea4c97b333)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer "F.Fab") (width 0.1) (tstamp 653a86ba-a1ae-4175-9d4c-c788087956d0)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer "F.Fab") (width 0.1) (tstamp 6a0919c2-460c-4229-b872-14e318e1ba8b)) + (fp_line (start 1 0.625) (end -1 0.625) (layer "F.Fab") (width 0.1) (tstamp df83f395-2d18-47e2-a370-952ca41c2b3a)) + (pad "1" smd roundrect locked (at -1 0 180) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 11 "Net-(C7-Pad1)") (pintype "passive") (tstamp c401e9c6-1deb-4979-99be-7c801c952098)) + (pad "2" smd roundrect locked (at 1 0 180) (size 1.2 1.4) (layers "F.Cu" "F.Paste" "F.Mask") (roundrect_rratio 0.208333) + (net 7 "Net-(C8-Pad2)") (pintype "passive") (tstamp 29cbb0bc-f66b-4d11-80e7-5bb270e42496)) + (model "${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl" + (offset (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) - (segment (start 99.2 99.6) (end 99.8 100.2) (width 0.25) (layer F.Cu) (net 1)) - (segment (start 99.2 97) (end 99.2 99.6) (width 0.25) (layer F.Cu) (net 1)) - (segment (start 115.391 89.27) (end 115.459 89.338) (width 0.5) (layer F.Cu) (net 2)) - (segment (start 112 89.27) (end 115.391 89.27) (width 0.5) (layer F.Cu) (net 2)) - (segment (start 102.6 89) (end 102.6 87) (width 0.25) (layer F.Cu) (net 2)) - (segment (start 111.37499 88.64499) (end 112 89.27) (width 0.25) (layer F.Cu) (net 2)) - (segment (start 105.85818 88.64499) (end 111.37499 88.64499) (width 0.25) (layer F.Cu) (net 2)) - (segment (start 105.28818 88.07499) (end 105.85818 88.64499) (width 0.25) (layer F.Cu) (net 2)) - (segment (start 103.52501 88.07499) (end 105.28818 88.07499) (width 0.25) (layer F.Cu) (net 2)) - (segment (start 102.6 89) (end 103.52501 88.07499) (width 0.25) (layer F.Cu) (net 2)) - (segment (start 109.4155 83.82) (end 109.4315 83.804) (width 0.5) (layer F.Cu) (net 3)) - (segment (start 106.807 83.82) (end 109.4155 83.82) (width 0.5) (layer F.Cu) (net 3)) - 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9a2eab07-4344-4cc7-980e-cf30fd0b2059)) ) diff --git a/schemi/bassofono.kicad_pcb-bak b/schemi/bassofono.kicad_pcb-bak index f036785..36f01a5 100644 --- a/schemi/bassofono.kicad_pcb-bak +++ b/schemi/bassofono.kicad_pcb-bak @@ -3,10 +3,10 @@ (general (thickness 1.6) (drawings 4) - (tracks 231) + (tracks 339) (zones 0) - (modules 51) - (nets 39) + (modules 52) + (nets 38) ) (page A4) @@ -34,7 +34,7 @@ ) (setup - (last_trace_width 0.5) + (last_trace_width 0.25) (user_trace_width 0.2) (user_trace_width 0.5) (user_trace_width 1) @@ -127,10 +127,9 @@ (net 32 "Net-(J2-Pad5)") (net 33 "Net-(J2-Pad9)") (net 34 "Net-(J2-Pad4)") - (net 35 "Net-(J1-Pad4)") - (net 36 "Net-(C15-Pad1)") - (net 37 "Net-(C17-Pad2)") - (net 38 "Net-(C17-Pad1)") + (net 35 "Net-(C15-Pad1)") + (net 36 "Net-(C17-Pad2)") + (net 37 "Net-(C17-Pad1)") (net_class Default "Questo è il gruppo di collegamenti predefinito" (clearance 0.2) @@ -161,7 +160,6 @@ (add_net "Net-(C7-Pad1)") (add_net "Net-(C8-Pad1)") (add_net "Net-(C8-Pad2)") - (add_net "Net-(J1-Pad4)") (add_net "Net-(J11-Pad1)") (add_net "Net-(J2-Pad1)") (add_net "Net-(J2-Pad4)") @@ -177,8 +175,9 @@ (add_net "Net-(R10-Pad2)") (add_net "Net-(R11-Pad1)") (add_net "Net-(R9-Pad2)") + (add_net "Net-(U1-Pad4)") (add_net "Net-(U2-Pad10)") - (add_net "Net-(U2-Pad12)") + (add_net "Net-(U2-Pad11)") (add_net "Net-(U2-Pad13)") (add_net "Net-(U2-Pad25)") (add_net "Net-(U2-Pad26)") @@ -195,21 +194,126 @@ (add_net "Net-(U5-Pad7)") ) - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A00A50) - (at 126.2 91.9625 270) + (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B45) + (at 100.6 90 90) + (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags "resistor handsolder") + (path /60E41D4B) + (attr smd) + (fp_text reference R3 (at 0 -1.65 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 15K (at 0 1.65 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 2 smd roundrect (at 1 0 90) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) + (net 10 "Net-(C1-Pad1)")) + (pad 1 smd roundrect (at -1 0 90) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) + (net 11 "Net-(C2-Pad2)")) + (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A02545) + (at 102.6 90.0375 270) + (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") + (tags "capacitor handsolder") + (path /60E41D57) + (attr smd) + (fp_text reference C2 (at 0 -1.68 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 68p (at 0 1.68 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 0.5 0.5) (thickness 0.08))) + ) + (pad 2 smd roundrect (at 1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) + (net 11 "Net-(C2-Pad2)")) + (pad 1 smd roundrect (at -1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) + (net 2 "Net-(C2-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CF724E) + (at 117.9625 95 180) (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "capacitor handsolder") - (path /61984C0D) + (path /61E8255F) (attr smd) - (fp_text reference C10 (at 0 -1.85 90) (layer F.SilkS) + (fp_text reference C17 (at 0 -1.85) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100n (at 0 1.85 90) (layer F.Fab) + (fp_text value 1µ (at 0 1.85) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text user %R (at 0 0 90) (layer F.Fab) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) + (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) + (net 36 "Net-(C17-Pad2)")) + (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) + (net 37 "Net-(C17-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C57C5C) + (at 123.0375 94.996 180) + (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags "capacitor handsolder") + (path /6197A0B3) + (attr smd) + (fp_text reference C9 (at 0 -1.85) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value C_Small (at 0 1.85) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) @@ -220,6 +324,45 @@ (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.8 0.8) (thickness 0.12))) + ) + (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) + (net 25 GNDA)) + (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) + (net 26 +3.3VA)) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A00A50) + (at 126.8 91.9625 270) + (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags "capacitor handsolder") + (path /61984C0D) + (attr smd) + (fp_text reference C10 (at 0 -1.85 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.85 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 0.8 0.8) (thickness 0.12))) + ) (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) (net 6 +3V3)) (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) @@ -231,6 +374,111 @@ ) ) + (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61CF81A1) + (at 127 103.6) + (descr "SMD rectangular pad as test Point, square 2.5mm side length") + (tags "test point SMD pad rectangle square") + (path /61DD78FE) + (attr virtual) + (fp_text reference J4 (at 0 -2.148) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value T1 (at 0 2.25) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_text user %R (at 0 -2.15) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) + (net 3 GND)) + ) + + (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 61C65A00) + (at 124.15 82.275 270) + (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") + (tags capacitor) + (path /61CA4AF4) + (attr smd) + (fp_text reference C12 (at 0 -1.85 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value 100n (at 0 1.85 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0 90) (layer F.Fab) + (effects (font (size 0.8 0.8) (thickness 0.12))) + ) + (pad 2 smd roundrect (at 1.475 0 270) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) + (net 18 "Net-(C12-Pad2)")) + (pad 1 smd roundrect (at -1.475 0 270) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) + (net 19 "Net-(C12-Pad1)")) + (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + + (module Package_TO_SOT_SMD:SOT-23-5 (layer F.Cu) (tedit 5A02FF57) (tstamp 61CF4945) + (at 127.15 99.7 90) + (descr "5-pin SOT23 package") + (tags SOT-23-5) + (path /61CF6A59) + (attr smd) + (fp_text reference U1 (at 0 -2.9 90) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value LP2985-3.3 (at 0 2.9 90) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start -0.9 1.61) (end 0.9 1.61) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.9 -1.61) (end -1.55 -1.61) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.9 -1.8) (end 1.9 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.9 -1.8) (end 1.9 1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.9 1.8) (end -1.9 1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.9 1.8) (end -1.9 -1.8) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.9 -0.9) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) + (fp_line (start 0.9 -1.55) (end -0.25 -1.55) (layer F.Fab) (width 0.1)) + (fp_line (start -0.9 -0.9) (end -0.9 1.55) (layer F.Fab) (width 0.1)) + (fp_line (start 0.9 1.55) (end -0.9 1.55) (layer F.Fab) (width 0.1)) + (fp_line (start 0.9 -1.55) (end 0.9 1.55) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 0.5 0.5) (thickness 0.075))) + ) + (pad 5 smd rect (at 1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 6 +3V3)) + (pad 4 smd rect (at 1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)) + (pad 3 smd rect (at -1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 35 "Net-(C15-Pad1)")) + (pad 2 smd rect (at -1.1 0 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 3 GND)) + (pad 1 smd rect (at -1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask) + (net 35 "Net-(C15-Pad1)")) + (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B89) (at 108.6 96.6 270) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") @@ -243,16 +491,16 @@ (fp_text value 22k (at 0 1.65 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -279,19 +527,19 @@ (fp_text value TL082 (at 0 3.4) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) - (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.98 0.98) (thickness 0.15))) ) @@ -318,44 +566,8 @@ ) ) - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CF724E) - (at 117.9625 94.8) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /61E8255F) - (attr smd) - (fp_text reference C17 (at 0 -1.85) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 1µ (at 0 1.85) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (pad 2 smd roundrect (at 1.5625 0) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 37 "Net-(C17-Pad2)")) - (pad 1 smd roundrect (at -1.5625 0) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 38 "Net-(C17-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CF768D) - (at 105 99.8) + (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CFA4C9) + (at 114.4 93 180) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") (path /61E7FA69) @@ -366,23 +578,23 @@ (fp_text value 10k (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (pad 2 smd roundrect (at 1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) + (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) (net 22 "Net-(C14-Pad1)")) - (pad 1 smd roundrect (at -1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 38 "Net-(C17-Pad1)")) + (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) + (net 37 "Net-(C17-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -402,25 +614,25 @@ (fp_text value D (at 0 2.28) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) - (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) (pad 2 smd roundrect (at 1.4875 0) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) (net 17 +12V)) (pad 1 smd roundrect (at -1.4875 0) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) - (net 36 "Net-(C15-Pad1)")) + (net 35 "Net-(C15-Pad1)")) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_1210_3225Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -440,17 +652,17 @@ (fp_text value T1 (at 0 2.25) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) (fp_text user %R (at 0 -2.15) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) (pad 1 smd rect (at 0 0) (size 2.5 2.5) (layers F.Cu F.Mask) (net 17 +12V)) ) @@ -467,19 +679,19 @@ (fp_text value AO3400A (at 0 2.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) - (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.075))) ) @@ -508,19 +720,19 @@ (fp_text value AO3400A (at 0 2.5) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) - (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) + (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.075))) ) @@ -549,19 +761,19 @@ (fp_text value 100n (at 0 1.85) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) (net 3 GND)) (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) @@ -585,19 +797,19 @@ (fp_text value 1k (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd roundrect (at 1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) (net 3 GND)) (pad 1 smd roundrect (at -1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) @@ -621,19 +833,19 @@ (fp_text value 1k (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) (net 14 "Net-(Q1-Pad1)")) (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) @@ -657,16 +869,16 @@ (fp_text value 10k (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -693,16 +905,16 @@ (fp_text value 22k (at 0 1.65 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -718,33 +930,33 @@ ) (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C37FBB) - (at 96.1625 103) + (at 109.8 101.0375 270) (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /61D7B29D) (attr smd) - (fp_text reference C14 (at 0 -1.85) (layer F.SilkS) + (fp_text reference C14 (at 0 -1.85 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 1uF (at 0 1.85) (layer F.Fab) + (fp_text value 1uF (at 0 1.85 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 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0.05)) - (fp_line (start 3.5 9.4) (end 3.5 -9.4) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.5 -9.4) (end -3.5 -9.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.5 9.4) (end 3.5 -9.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.5 9.4) (end 3.5 9.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.5 -9.4) (end -3.5 9.4) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.11 7.57) (end -1.11 8.94) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 5.03) (end -1.11 6.4) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 2.49) (end -1.11 3.86) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -0.05) (end -1.11 1.32) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -2.59) (end -1.11 -1.22) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -5.13) (end -1.11 -3.76) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -7.67) (end -1.11 -6.3) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 6.3) (end 1.11 7.67) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 3.76) (end 1.11 5.13) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 1.22) (end 1.11 2.59) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 -1.32) (end 1.11 0.05) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 -3.86) (end 1.11 -2.49) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 -6.4) (end 1.11 -5.03) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 8.84) (end 1.11 8.95) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -8.95) (end -1.11 -8.84) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -8.84) (end -2.94 -8.84) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.11 -8.94) (end 1.11 -7.57) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 8.95) (end 1.11 8.95) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.11 -8.95) (end 1.11 -8.95) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.5 8.455) (end 1.05 8.455) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 8.055) (end 2.5 8.455) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 8.055) (end 2.5 8.055) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 5.915) (end 1.05 5.915) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 5.515) (end 2.5 5.915) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 5.515) (end 2.5 5.515) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 3.375) (end 1.05 3.375) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 2.975) (end 2.5 3.375) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 2.975) (end 2.5 2.975) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 0.835) (end 1.05 0.835) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 0.435) (end 2.5 0.835) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 0.435) (end 2.5 0.435) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 -1.705) (end 1.05 -1.705) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 -2.105) (end 2.5 -1.705) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 -2.105) (end 2.5 -2.105) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 -4.245) (end 1.05 -4.245) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 -4.645) (end 2.5 -4.245) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 -4.645) (end 2.5 -4.645) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 -6.785) (end 1.05 -6.785) (layer F.Fab) (width 0.1)) + (fp_line (start 2.5 -7.185) (end 2.5 -6.785) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 -7.185) (end 2.5 -7.185) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 7.185) (end -1.05 7.185) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 6.785) (end -2.5 7.185) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 6.785) (end -2.5 6.785) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 4.645) (end -1.05 4.645) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 4.245) (end -2.5 4.645) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 4.245) (end -2.5 4.245) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 2.105) (end -1.05 2.105) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 1.705) (end -2.5 2.105) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 1.705) (end -2.5 1.705) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -0.435) (end -1.05 -0.435) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -0.835) (end -2.5 -0.435) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -0.835) (end -2.5 -0.835) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -2.975) (end -1.05 -2.975) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -3.375) (end -2.5 -2.975) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -3.375) (end -2.5 -3.375) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -5.515) (end -1.05 -5.515) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -5.915) (end -2.5 -5.515) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -5.915) (end -2.5 -5.915) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -8.055) (end -1.05 -8.055) (layer F.Fab) (width 0.1)) + (fp_line (start -2.5 -8.455) (end -2.5 -8.055) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -8.455) (end -2.5 -8.455) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 -8.89) (end 1.05 8.89) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 -8.455) (end -0.615 -8.89) (layer F.Fab) (width 0.1)) + (fp_line (start -1.05 8.89) (end -1.05 -8.455) (layer F.Fab) (width 0.1)) + (fp_line (start -0.615 -8.89) (end 1.05 -8.89) (layer F.Fab) (width 0.1)) + (fp_line (start 1.05 8.89) (end -1.05 8.89) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) @@ -981,42 +1193,6 @@ ) ) - (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 61C65A00) - (at 124.15 82.475 270) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags capacitor) - (path /61CA4AF4) - (attr smd) - (fp_text reference C12 (at 0 -1.85 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 100n (at 0 1.85 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.475 0 270) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) - (net 18 "Net-(C12-Pad2)")) - (pad 1 smd roundrect (at -1.475 0 270) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391) - (net 19 "Net-(C12-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Package_SO:MSOP-10_3x3mm_P0.5mm (layer F.Cu) (tedit 5A02F25C) (tstamp 61C63E2B) (at 128.37 81.69) (descr "10-Lead Plastic Micro Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf)") @@ -1029,22 +1205,22 @@ (fp_text value Si5351A-B-GT (at 0 2.6) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15)) - (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15)) - (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.15)) - (fp_line (start -1.5 1.5) (end -1.5 -0.5) (layer F.Fab) (width 0.15)) - (fp_line (start -1.5 -0.5) (end -0.5 -1.5) (layer F.Fab) (width 0.15)) - (fp_line (start -3.15 -1.85) (end -3.15 1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.15 -1.85) (end 3.15 1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.15 -1.85) (end 3.15 -1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.15 1.85) (end 3.15 1.85) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.675 -1.675) (end -1.675 -1.45) (layer F.SilkS) (width 0.15)) - (fp_line (start 1.675 -1.675) (end 1.675 -1.375) (layer F.SilkS) (width 0.15)) - (fp_line (start 1.675 1.675) (end 1.675 1.375) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 1.675) (end -1.675 1.375) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 -1.675) (end 1.675 -1.675) (layer F.SilkS) (width 0.15)) - (fp_line (start -1.675 1.675) (end 1.675 1.675) (layer F.SilkS) (width 0.15)) (fp_line (start -1.675 -1.45) (end -2.9 -1.45) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.675 1.675) (end 1.675 1.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.675 -1.675) (end 1.675 -1.675) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.675 1.675) (end -1.675 1.375) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.675 1.675) (end 1.675 1.375) (layer F.SilkS) (width 0.15)) + (fp_line (start 1.675 -1.675) (end 1.675 -1.375) (layer F.SilkS) (width 0.15)) + (fp_line (start -1.675 -1.675) (end -1.675 -1.45) (layer F.SilkS) (width 0.15)) + (fp_line (start -3.15 1.85) (end 3.15 1.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.15 -1.85) (end 3.15 -1.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.15 -1.85) (end 3.15 1.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.15 -1.85) (end -3.15 1.85) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.5 -0.5) (end -0.5 -1.5) (layer F.Fab) (width 0.15)) + (fp_line (start -1.5 1.5) (end -1.5 -0.5) (layer F.Fab) (width 0.15)) + (fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.15)) + (fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.15)) + (fp_line (start -0.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.15)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.6 0.6) (thickness 0.15))) ) @@ -1086,16 +1262,16 @@ (fp_text value R (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1122,19 +1298,19 @@ (fp_text value M24C02-RMN (at 0 3.4 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) - (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) - (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) (fp_line (start 3.7 -2.7) (end -3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.7 2.7) (end 3.7 -2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 2.7) (end 3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.7 -2.7) (end -3.7 2.7) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.95 -1.475) (end -0.975 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -1.95 2.45) (end -1.95 -1.475) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 2.45) (end -1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 1.95 -2.45) (end 1.95 2.45) (layer F.Fab) (width 0.1)) + (fp_line (start -0.975 -2.45) (end 1.95 -2.45) (layer F.Fab) (width 0.1)) + (fp_line (start 0 -2.56) (end -3.45 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 -2.56) (end 1.95 -2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end -1.95 2.56) (layer F.SilkS) (width 0.12)) + (fp_line (start 0 2.56) (end 1.95 2.56) (layer F.SilkS) (width 0.12)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.98 0.98) (thickness 0.15))) ) @@ -1169,14 +1345,14 @@ (fp_text value T1 (at 0 2.25) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 -2.15) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) @@ -1196,14 +1372,14 @@ (fp_text value T1 (at 0 2.25) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 -2.15) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) @@ -1223,23 +1399,23 @@ (fp_text value 10µF (at 0 1.85 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) (pad 2 smd roundrect (at 1.5625 0 90) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) (net 3 GND)) (pad 1 smd roundrect (at -1.5625 0 90) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 36 "Net-(C15-Pad1)")) + (net 35 "Net-(C15-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1259,21 +1435,21 @@ (fp_text value Crystal_GND24 (at 0 2.95) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 2.8 -2.2) (end -2.8 -2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.8 2.2) (end 2.8 -2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.8 2.2) (end 2.8 2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.8 -2.2) (end -2.8 2.2) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.7 2.15) (end 2.7 2.15) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.7 -2.15) (end -2.7 2.15) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.15) (end -1.5 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.15) (end -1.6 -1.15) (layer F.Fab) (width 0.1)) - (fp_line (start -1.5 1.25) (end -1.6 1.15) (layer F.Fab) (width 0.1)) - (fp_line (start 1.5 1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.15) (end 1.5 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.15) (end 1.6 1.15) (layer F.Fab) (width 0.1)) - (fp_line (start 1.5 -1.25) (end 1.6 -1.15) (layer F.Fab) (width 0.1)) (fp_line (start -1.5 -1.25) (end 1.5 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.5 -1.25) (end 1.6 -1.15) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -1.15) (end 1.6 1.15) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 1.15) (end 1.5 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.5 1.25) (end -1.5 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.5 1.25) (end -1.6 1.15) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.15) (end -1.6 -1.15) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -1.15) (end -1.5 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -2.7 -2.15) (end -2.7 2.15) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.7 2.15) (end 2.7 2.15) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.8 -2.2) (end -2.8 2.2) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.8 2.2) (end 2.8 2.2) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.8 2.2) (end 2.8 -2.2) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.8 -2.2) (end -2.8 -2.2) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.7 0.7) (thickness 0.105))) ) @@ -1293,7 +1469,7 @@ ) (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A02534) - (at 86.3146 80.6688) + (at 101.6 82.6) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /60E41D5D) @@ -1304,16 +1480,16 @@ (fp_text value 330p (at 0 1.68) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1328,42 +1504,6 @@ ) ) - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A02545) - (at 86.3146 83.6788) - (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /60E41D57) - (attr smd) - (fp_text reference C2 (at 0 -1.68) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 68p (at 0 1.68) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1.0375 0) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 11 "Net-(C2-Pad2)")) - (pad 1 smd roundrect (at -1.0375 0) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 2 "Net-(C2-Pad1)")) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A009FB) (at 110.5375 81 180) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") @@ -1376,16 +1516,16 @@ (fp_text value 18p (at 0 1.68) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1412,16 +1552,16 @@ (fp_text value 100n (at 0 1.85 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) @@ -1448,16 +1588,16 @@ (fp_text value L (at 0 2.28) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.602064 -1.36) (end 0.602064 -1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.602064 1.36) (end 0.602064 1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.602064 1.36) (end 0.602064 1.36) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.602064 -1.36) (end 0.602064 -1.36) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) @@ -1473,7 +1613,7 @@ ) (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61C3A1EF) - (at 89.136 99.158) + (at 99.8 104) (descr "SMD rectangular pad as test Point, square 2.5mm side length") (tags "test point SMD pad rectangle square") (path /61DF1A37) @@ -1484,14 +1624,14 @@ (fp_text value RF_GND (at 0 2.25) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) (fp_text user %R (at 0 -2.15) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) @@ -1499,8 +1639,8 @@ (net 25 GNDA)) ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61C3823E) - (at 93.962 94.856 270) + (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CFC450) + (at 104.6 91.8 270) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") (path /61CDE9AE) @@ -1511,16 +1651,16 @@ (fp_text value 220 (at 0 1.65 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1535,8 +1675,8 @@ ) ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61C381AD) - (at 93.962 91.046 270) + (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61CFC4C4) + (at 104.6 88 270) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") (path /61CD99F8) @@ -1547,16 +1687,16 @@ (fp_text value 4k7 (at 0 1.65 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1572,7 +1712,7 @@ ) (module TestPoint:TestPoint_Pad_2.5x2.5mm (layer F.Cu) (tedit 5A0F774F) (tstamp 61C380BB) - (at 85.326 99.158 270) + (at 99.8 100.2 270) (descr "SMD rectangular pad as test Point, square 2.5mm side length") (tags "test point SMD pad rectangle square") (path /61D31443) @@ -1583,14 +1723,14 @@ (fp_text value RF_IN (at 0 2.25 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.75 1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.75 1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.45 1.45) (end -1.45 -1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 1.45) (end -1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.45 -1.45) (end 1.45 1.45) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.45 -1.45) (end 1.45 -1.45) (layer F.SilkS) (width 0.12)) (fp_text user %R (at 0 -2.15 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) @@ -1599,7 +1739,7 @@ ) (module Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61C37FE1) - (at 88.882 94.1145 270) + (at 106.4 101.0875 270) (descr "Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags "diode handsolder") (path /61D403D1) @@ -1610,18 +1750,18 @@ (fp_text value D (at 0 2.28 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) @@ -1637,7 +1777,7 @@ ) (module Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder (layer F.Cu) (tedit 5F68FEF0) (tstamp 61C37FCE) - (at 88.882 88.7805 270) + (at 103.2 101.0875 90) (descr "Diode SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags "diode handsolder") (path /61D3F32C) @@ -1648,24 +1788,24 @@ (fp_text value D (at 0 2.28 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.46 1.585) (end 1.6 1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.46 -1.585) (end -2.46 1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 -1.585) (end -2.46 -1.585) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.625) (end -1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -0.975 -1.25) (end -1.6 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -1.25) (end -0.975 -1.25) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) - (pad 2 smd roundrect (at 1.4875 0 270) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) + (pad 2 smd roundrect (at 1.4875 0 90) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) (net 20 "Net-(C3-Pad1)")) - (pad 1 smd roundrect (at -1.4875 0 270) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) + (pad 1 smd roundrect (at -1.4875 0 90) (size 1.425 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.175439) (net 26 +3.3VA)) (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_1210_3225Metric.wrl (at (xyz 0 0 0)) @@ -1675,15 +1815,15 @@ ) (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C37FAA) - (at 93.1785 98.65 180) + (at 104.4 95.7625 270) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /61D6FFE6) (attr smd) - (fp_text reference C13 (at 0 -1.68) (layer F.SilkS) + (fp_text reference C13 (at 0 -1.68 90) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 100n (at 0 1.68) (layer F.Fab) + (fp_text value 100n (at 0 1.68 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) @@ -1696,13 +1836,13 @@ (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0) (layer F.Fab) + (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) - (pad 2 smd roundrect (at 1.0375 0 180) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.0375 0 180) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) + (pad 1 smd roundrect (at -1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) (net 21 "Net-(C13-Pad1)")) + (pad 2 smd roundrect (at 1.0375 0 270) (size 1.175 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.212766) + (net 25 GNDA)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1711,33 +1851,33 @@ ) (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C37E4B) - (at 85.326 91.792 270) + (at 100.7625 97 180) (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /61D9EA3F) (attr smd) - (fp_text reference C3 (at 0 -1.85 90) (layer F.SilkS) + (fp_text reference C3 (at 0 -1.85) (layer F.SilkS) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_text value 220n (at 0 1.85 90) (layer F.Fab) + (fp_text value 220n (at 0 1.85) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_text user %R (at 0 0 90) (layer F.Fab) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) - (pad 2 smd roundrect (at 1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) + (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) (net 1 "Net-(C3-Pad2)")) - (pad 1 smd roundrect (at -1.5625 0 270) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) + (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) (net 20 "Net-(C3-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl (at (xyz 0 0 0)) @@ -1758,16 +1898,16 @@ (fp_text value R (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1794,16 +1934,16 @@ (fp_text value L (at 0 2.28) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) - (fp_line (start -0.602064 -1.36) (end 0.602064 -1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.602064 1.36) (end 0.602064 1.36) (layer F.SilkS) (width 0.12)) - (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) (fp_line (start 2.45 1.58) (end -2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.45 -1.58) (end 2.45 1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 -1.58) (end 2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.45 1.58) (end -2.45 -1.58) (layer F.CrtYd) (width 0.05)) + (fp_line (start -0.602064 1.36) (end 0.602064 1.36) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.602064 -1.36) (end 0.602064 -1.36) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.6 1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) @@ -1818,49 +1958,8 @@ ) ) - (module Package_TO_SOT_SMD:SOT-23 (layer F.Cu) (tedit 5A02FF57) (tstamp 61A037EB) - (at 127 98.536 270) - (descr "SOT-23, Standard") - (tags SOT-23) - (path /61A3E66B) - (attr smd) - (fp_text reference U3 (at 0 -2.5 90) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value AZ1117-3.3 (at 0 2.5 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 0.76 1.58) (end -0.7 1.58) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 -1.58) (end -1.4 -1.58) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.7 1.75) (end -1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 1.75) (end -1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.7 -1.75) (end 1.7 1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.7 -1.75) (end 1.7 -1.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0.76 -1.58) (end 0.76 -0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start 0.76 1.58) (end 0.76 0.65) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.7 1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start 0.7 -1.52) (end 0.7 1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.15 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.15 -1.52) (end 0.7 -1.52) (layer F.Fab) (width 0.1)) - (fp_line (start -0.7 -0.95) (end -0.7 1.5) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.075))) - ) - (pad 3 smd rect (at 1 0 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 36 "Net-(C15-Pad1)")) - (pad 2 smd rect (at -1 0.95 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 6 +3V3)) - (pad 1 smd rect (at -1 -0.95 270) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask) - (net 3 GND)) - (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A01F7F) - (at 114.062 97.028 180) + (at 114.062 97.428 180) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") (path /60E49D2D) @@ -1871,16 +1970,16 @@ (fp_text value 470 (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1896,7 +1995,7 @@ ) (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A01CB0) - (at 117.8775 97.028) + (at 117.8775 97.428) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /60E4B819) @@ -1907,16 +2006,16 @@ (fp_text value C (at 0 1.68) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -1943,44 +2042,44 @@ (fp_text value STM32G431KBTx (at 0 5.88) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 5.18 3.3) (end 5.18 0) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.75 3.3) (end 5.18 3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.75 3.75) (end 3.75 3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.3 3.75) (end 3.75 3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.3 5.18) (end 3.3 3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0 5.18) (end 3.3 5.18) (layer F.CrtYd) (width 0.05)) - (fp_line (start -5.18 3.3) (end -5.18 0) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.75 3.3) (end -5.18 3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.75 3.75) (end -3.75 3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.3 3.75) (end -3.75 3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.3 5.18) (end -3.3 3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0 5.18) (end -3.3 5.18) (layer F.CrtYd) (width 0.05)) - (fp_line (start 5.18 -3.3) (end 5.18 0) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.75 -3.3) (end 5.18 -3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.75 -3.75) (end 3.75 -3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.3 -3.75) (end 3.75 -3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 3.3 -5.18) (end 3.3 -3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0 -5.18) (end 3.3 -5.18) (layer F.CrtYd) (width 0.05)) - (fp_line (start -5.18 -3.3) (end -5.18 0) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.75 -3.3) (end -5.18 -3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.75 -3.75) (end -3.75 -3.3) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.3 -3.75) (end -3.75 -3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.3 -5.18) (end -3.3 -3.75) (layer F.CrtYd) (width 0.05)) - (fp_line (start 0 -5.18) (end -3.3 -5.18) (layer F.CrtYd) (width 0.05)) - (fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer F.Fab) (width 0.1)) - (fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer F.Fab) (width 0.1)) - (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.1)) - (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.1)) - (fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.1)) - (fp_line (start -3.61 -3.31) (end -4.925 -3.31) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.61 -3.61) (end -3.61 -3.31) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.31 -3.61) (end -3.61 -3.61) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.61 -3.61) (end 3.61 -3.31) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.31 -3.61) (end 3.61 -3.61) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.61 3.61) (end -3.61 3.31) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.31 3.61) (end -3.61 3.61) (layer F.SilkS) (width 0.12)) - (fp_line (start 3.61 3.61) (end 3.61 3.31) (layer F.SilkS) (width 0.12)) (fp_line (start 3.31 3.61) (end 3.61 3.61) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.61 3.61) (end 3.61 3.31) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.31 3.61) (end -3.61 3.61) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.61 3.61) (end -3.61 3.31) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.31 -3.61) (end 3.61 -3.61) (layer F.SilkS) (width 0.12)) + (fp_line (start 3.61 -3.61) (end 3.61 -3.31) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.31 -3.61) (end -3.61 -3.61) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.61 -3.61) (end -3.61 -3.31) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.61 -3.31) (end -4.925 -3.31) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.5 -3.5) (end 3.5 -3.5) (layer F.Fab) (width 0.1)) + (fp_line (start 3.5 -3.5) (end 3.5 3.5) (layer F.Fab) (width 0.1)) + (fp_line (start 3.5 3.5) (end -3.5 3.5) (layer F.Fab) (width 0.1)) + (fp_line (start -3.5 3.5) (end -3.5 -2.5) (layer F.Fab) (width 0.1)) + (fp_line (start -3.5 -2.5) (end -2.5 -3.5) (layer F.Fab) (width 0.1)) + (fp_line (start 0 -5.18) (end -3.3 -5.18) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.3 -5.18) (end -3.3 -3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.3 -3.75) (end -3.75 -3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.75 -3.75) (end -3.75 -3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.75 -3.3) (end -5.18 -3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5.18 -3.3) (end -5.18 0) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 -5.18) (end 3.3 -5.18) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.3 -5.18) (end 3.3 -3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.3 -3.75) (end 3.75 -3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.75 -3.75) (end 3.75 -3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.75 -3.3) (end 5.18 -3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 5.18 -3.3) (end 5.18 0) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 5.18) (end -3.3 5.18) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.3 5.18) (end -3.3 3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.3 3.75) (end -3.75 3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.75 3.75) (end -3.75 3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -3.75 3.3) (end -5.18 3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start -5.18 3.3) (end -5.18 0) (layer F.CrtYd) (width 0.05)) + (fp_line (start 0 5.18) (end 3.3 5.18) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.3 5.18) (end 3.3 3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.3 3.75) (end 3.75 3.75) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.75 3.75) (end 3.75 3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 3.75 3.3) (end 5.18 3.3) (layer F.CrtYd) (width 0.05)) + (fp_line (start 5.18 3.3) (end 5.18 0) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) @@ -2018,9 +2117,9 @@ (pad 14 smd roundrect (at 1.2 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 25 GNDA)) (pad 13 smd roundrect (at 0.4 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) - (pad 12 smd roundrect (at -0.4 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) - (pad 11 smd roundrect (at -1.2 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 38 "Net-(C17-Pad1)")) + (pad 12 smd roundrect (at -0.4 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) + (net 37 "Net-(C17-Pad1)")) + (pad 11 smd roundrect (at -1.2 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad 10 smd roundrect (at -2 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) (pad 9 smd roundrect (at -2.8 4.175) (size 0.5 1.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 8 "Net-(C8-Pad1)")) @@ -2044,44 +2143,8 @@ ) ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B45) - (at 107.742 75.14) - (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "resistor handsolder") - (path /60E41D4B) - (attr smd) - (fp_text reference R3 (at 0 -1.65) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value 15K (at 0 1.65) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.5 0.5) (thickness 0.08))) - ) - (pad 2 smd roundrect (at 1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 10 "Net-(C1-Pad1)")) - (pad 1 smd roundrect (at -1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) - (net 11 "Net-(C2-Pad2)")) - (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B34) - (at 106.132 72.19) + (at 101.6 87 180) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") (path /60E41D51) @@ -2092,22 +2155,22 @@ (fp_text value 3.9K (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) - (pad 2 smd roundrect (at 1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) + (pad 2 smd roundrect (at 1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) (net 10 "Net-(C1-Pad1)")) - (pad 1 smd roundrect (at -1 0) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) + (pad 1 smd roundrect (at -1 0 180) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.208333) (net 2 "Net-(C2-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl (at (xyz 0 0 0)) @@ -2117,7 +2180,7 @@ ) (module Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder (layer F.Cu) (tedit 5F68FEEE) (tstamp 61A00B23) - (at 99.332 78.89) + (at 101.6 85) (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "resistor handsolder") (path /60E41D45) @@ -2128,16 +2191,16 @@ (fp_text value 3k9 (at 0 1.65) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.227064 -0.735) (end 0.227064 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.227064 0.735) (end 0.227064 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.85 0.95) (end -1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.85 -0.95) (end 1.85 -0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 -0.95) (end 1.85 0.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.85 0.95) (end -1.85 0.95) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -2152,44 +2215,8 @@ ) ) - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61C57C5C) - (at 122.326 94.996 180) - (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") - (tags "capacitor handsolder") - (path /6197A0B3) - (attr smd) - (fp_text reference C9 (at 0 -1.85) (layer F.SilkS) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value C_Small (at 0 1.85) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) - (effects (font (size 0.8 0.8) (thickness 0.12))) - ) - (pad 2 smd roundrect (at 1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 25 GNDA)) - (pad 1 smd roundrect (at -1.5625 0 180) (size 1.325 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.188679) - (net 26 +3.3VA)) - (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61CE9E1C) - (at 114.4 94 270) + (at 111 95.3625 270) (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /61B07F9F) @@ -2200,16 +2227,16 @@ (fp_text value 1µ (at 0 1.85 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) - (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1)) + (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12)) + (fp_line (start -2.48 1.15) (end -2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start -2.48 -1.15) (end 2.48 -1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 -1.15) (end 2.48 1.15) (layer F.CrtYd) (width 0.05)) + (fp_line (start 2.48 1.15) (end -2.48 1.15) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.8 0.8) (thickness 0.12))) ) @@ -2225,7 +2252,7 @@ ) (module Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder (layer F.Cu) (tedit 5F68FEEF) (tstamp 61A00A0C) - (at 106.807 84.8575 90) + (at 106.8 84.6375 90) (descr "Capacitor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf, https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator") (tags "capacitor handsolder") (path /60E53D52) @@ -2236,16 +2263,16 @@ (fp_text value 22p (at 0 1.68 90) (layer F.Fab) (effects (font (size 1 1) (thickness 0.15))) ) - (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) - (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) - (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) - (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) (fp_line (start -1 0.625) (end -1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -1 -0.625) (end 1 -0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 -0.625) (end 1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start 1 0.625) (end -1 0.625) (layer F.Fab) (width 0.1)) + (fp_line (start -0.261252 -0.735) (end 0.261252 -0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -0.261252 0.735) (end 0.261252 0.735) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.88 0.98) (end -1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start -1.88 -0.98) (end 1.88 -0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 -0.98) (end 1.88 0.98) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.88 0.98) (end -1.88 0.98) (layer F.CrtYd) (width 0.05)) (fp_text user %R (at 0 0 90) (layer F.Fab) (effects (font (size 0.5 0.5) (thickness 0.08))) ) @@ -2265,20 +2292,22 @@ (gr_line (start 139.4 106) (end 98 106) (layer Edge.Cuts) (width 0.05)) (gr_line (start 139.4 74) (end 139.4 106) (layer Edge.Cuts) (width 0.05) (tstamp 61CF0BB1)) + (segment (start 99.2 99.6) (end 99.8 100.2) (width 0.25) (layer F.Cu) (net 1)) + (segment (start 99.2 97) (end 99.2 99.6) (width 0.25) (layer F.Cu) (net 1)) (segment (start 115.391 89.27) (end 115.459 89.338) (width 0.5) (layer F.Cu) (net 2)) (segment (start 112 89.27) (end 115.391 89.27) (width 0.5) (layer F.Cu) (net 2)) + (segment (start 102.6 89) (end 102.6 87) (width 0.25) (layer F.Cu) (net 2)) + (segment (start 111.37499 88.64499) (end 112 89.27) (width 0.25) (layer F.Cu) (net 2)) + (segment (start 105.85818 88.64499) (end 111.37499 88.64499) (width 0.25) (layer F.Cu) (net 2)) + (segment (start 105.28818 88.07499) (end 105.85818 88.64499) (width 0.25) (layer F.Cu) (net 2)) + (segment (start 103.52501 88.07499) (end 105.28818 88.07499) (width 0.25) (layer F.Cu) (net 2)) + (segment (start 102.6 89) (end 103.52501 88.07499) (width 0.25) (layer F.Cu) (net 2)) (segment (start 109.4155 83.82) (end 109.4315 83.804) (width 0.5) (layer F.Cu) (net 3)) (segment (start 106.807 83.82) (end 109.4155 83.82) (width 0.5) (layer F.Cu) (net 3)) (segment (start 109.4315 81.513) (end 109.474 81.4705) (width 0.5) (layer F.Cu) (net 3)) (segment (start 116.834 82.854534) (end 116.834 83.963) (width 0.5) (layer F.Cu) (net 3)) (segment (start 115.062 81.082534) (end 116.834 82.854534) (width 0.5) (layer F.Cu) (net 3)) (segment (start 115.062 80.01) (end 115.062 81.082534) (width 0.5) (layer F.Cu) (net 3)) - (segment (start 127.049999 98.436001) (end 127.95 97.536) (width 0.5) (layer F.Cu) (net 3)) - (segment (start 126.607999 98.436001) (end 127.049999 98.436001) (width 0.5) (layer F.Cu) (net 3)) - (segment (start 123.879 101.165) (end 126.607999 98.436001) (width 0.5) (layer F.Cu) (net 3)) - (segment (start 123.879 101.346) (end 123.879 101.165) (width 0.5) (layer F.Cu) (net 3)) - (segment (start 130.125 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"Package_SO:SO-8_3.9x4.9mm_P1.27mm") + ) + (path "/00000000-0000-0000-0000-000061d5ac95" + (reference "Y1") (unit 1) (value "Crystal_GND24") (footprint "Crystal:Crystal_SMD_SeikoEpson_TSX3225-4Pin_3.2x2.5mm_HandSoldering") + ) + ) +) diff --git a/schemi/bassofono.sch b/schemi/bassofono.sch index 88c085e..5805ae6 100644 --- a/schemi/bassofono.sch +++ b/schemi/bassofono.sch @@ -374,7 +374,6 @@ Wire Wire Line 5550 3700 5550 3600 Wire Wire Line 5550 3600 6100 3600 -Connection ~ 6100 3600 $Comp L power:+3.3V #PWR0102 U 1 1 61A3FADC @@ -438,125 +437,72 @@ $EndComp $Comp L Oscillator:Si5351A-B-GT U4 U 1 1 61BE85B0 -P 8600 2700 -F 0 "U4" H 8600 2111 50 0000 C CNN -F 1 "Si5351A-B-GT" H 8600 2020 50 0000 C CNN -F 2 "Package_SO:MSOP-10_3x3mm_P0.5mm" H 8600 1900 50 0001 C CNN -F 3 "https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdf" H 8250 2600 50 0001 C CNN - 1 8600 2700 +P 8450 1950 +F 0 "U4" H 8450 1361 50 0000 C CNN +F 1 "Si5351A-B-GT" H 8450 1270 50 0000 C CNN +F 2 "Package_SO:MSOP-10_3x3mm_P0.5mm" H 8450 1150 50 0001 C CNN +F 3 "https://www.silabs.com/documents/public/data-sheets/Si5351-B.pdf" H 8100 1850 50 0001 C CNN + 1 8450 1950 1 0 0 -1 $EndComp Wire Wire Line - 6400 3600 6400 3000 -Wire Wire Line - 7150 2900 7750 2900 + 7000 2150 7600 2150 $Comp L Device:R R10 U 1 1 61C09569 -P 7150 2750 -F 0 "R10" H 7220 2796 50 0000 L CNN -F 1 "R" H 7220 2705 50 0000 L CNN -F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 7080 2750 50 0001 C CNN -F 3 "~" H 7150 2750 50 0001 C CNN - 1 7150 2750 +P 7000 2000 +F 0 "R10" H 7070 2046 50 0000 L CNN +F 1 "R" H 7070 1955 50 0000 L CNN +F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 6930 2000 50 0001 C CNN +F 3 "~" H 7000 2000 50 0001 C CNN + 1 7000 2000 1 0 0 -1 $EndComp $Comp L Device:R R9 U 1 1 61C0A1F0 -P 6400 2750 -F 0 "R9" H 6470 2796 50 0000 L CNN -F 1 "R" H 6470 2705 50 0000 L CNN -F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 6330 2750 50 0001 C CNN -F 3 "~" H 6400 2750 50 0001 C CNN - 1 6400 2750 +P 6400 2000 +F 0 "R9" H 6470 2046 50 0000 L CNN +F 1 "R" H 6470 1955 50 0000 L CNN +F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 6330 2000 50 0001 C CNN +F 3 "~" H 6400 2000 50 0001 C CNN + 1 6400 2000 1 0 0 -1 $EndComp -Wire Wire Line - 6400 2900 6400 3000 -Connection ~ 6400 3000 $Comp L power:+3.3V #PWR0101 U 1 1 61C0BFE1 -P 6400 2600 -F 0 "#PWR0101" H 6400 2450 50 0001 C CNN -F 1 "+3.3V" V 6415 2728 50 0000 L CNN -F 2 "" H 6400 2600 50 0001 C CNN -F 3 "" H 6400 2600 50 0001 C CNN - 1 6400 2600 +P 6400 1850 +F 0 "#PWR0101" H 6400 1700 50 0001 C CNN +F 1 "+3.3V" V 6415 1978 50 0000 L CNN +F 2 "" H 6400 1850 50 0001 C CNN +F 3 "" H 6400 1850 50 0001 C CNN + 1 6400 1850 1 0 0 -1 $EndComp $Comp L power:+3.3V #PWR0106 U 1 1 61C0CD45 -P 7150 2600 -F 0 "#PWR0106" H 7150 2450 50 0001 C CNN -F 1 "+3.3V" V 7165 2728 50 0000 L CNN -F 2 "" H 7150 2600 50 0001 C CNN -F 3 "" H 7150 2600 50 0001 C CNN - 1 7150 2600 +P 7000 1850 +F 0 "#PWR0106" H 7000 1700 50 0001 C CNN +F 1 "+3.3V" V 7015 1978 50 0000 L CNN +F 2 "" H 7000 1850 50 0001 C CNN +F 3 "" H 7000 1850 50 0001 C CNN + 1 7000 1850 1 0 0 -1 $EndComp -$Comp -L Transistor_FET:AO3400A Q1 -U 1 1 61BFB2BF -P 9600 2250 -F 0 "Q1" H 9805 2296 50 0000 L CNN -F 1 "AO3400A" H 9805 2205 50 0000 L CNN -F 2 "Package_TO_SOT_SMD:SOT-23" H 9800 2175 50 0001 L CIN -F 3 "http://www.aosmd.com/pdfs/datasheet/AO3400A.pdf" H 9600 2250 50 0001 L CNN - 1 9600 2250 - 1 0 0 -1 -$EndComp -$Comp -L Transistor_FET:AO3400A Q2 -U 1 1 61BFCDBB -P 9600 2750 -F 0 "Q2" H 9805 2704 50 0000 L CNN -F 1 "AO3400A" H 9805 2795 50 0000 L CNN -F 2 "Package_TO_SOT_SMD:SOT-23" H 9800 2675 50 0001 L CIN -F 3 "http://www.aosmd.com/pdfs/datasheet/AO3400A.pdf" H 9600 2750 50 0001 L CNN - 1 9600 2750 - 1 0 0 1 -$EndComp Wire Wire Line - 9100 2500 9300 2500 + 8950 1750 9150 1750 Wire Wire Line - 9300 2500 9300 2250 + 9150 1750 9150 1500 Wire Wire Line - 9300 2250 9400 2250 + 9150 1500 9250 1500 Wire Wire Line - 9100 2700 9300 2700 + 8950 1950 9150 1950 Wire Wire Line - 9300 2700 9300 2750 + 9150 1950 9150 2000 Wire Wire Line - 9300 2750 9400 2750 -$Comp -L power:GND #PWR0107 -U 1 1 61C1568E -P 9650 2500 -F 0 "#PWR0107" H 9650 2250 50 0001 C CNN -F 1 "GND" V 9655 2372 50 0000 R CNN -F 2 "" H 9650 2500 50 0001 C CNN -F 3 "" H 9650 2500 50 0001 C CNN - 1 9650 2500 - 0 1 1 0 -$EndComp -Wire Wire Line - 9700 2450 9700 2500 -Wire Wire Line - 9650 2500 9700 2500 -Connection ~ 9700 2500 -Wire Wire Line - 9700 2500 9700 2550 -Wire Wire Line - 9700 2050 10050 2050 -Wire Wire Line - 10050 2050 10050 2300 -Wire Wire Line - 9700 2950 10050 2950 -Wire Wire Line - 10050 2950 10050 2700 + 9150 2000 9250 2000 $Comp L power:+12V #PWR0105 U 1 1 61C8D2AC @@ -568,70 +514,64 @@ F 3 "" H 10900 5850 50 0001 C CNN 1 10900 5850 0 1 -1 0 $EndComp -Wire Wire Line - 7700 5000 7950 5000 $Comp L Device:C C12 U 1 1 61CA4AF4 -P 7950 2650 -F 0 "C12" H 8065 2696 50 0000 L CNN -F 1 "100n" H 8065 2605 50 0000 L CNN -F 2 "Capacitor_SMD:C_1206_3216Metric" H 7988 2500 50 0001 C CNN -F 3 "~" H 7950 2650 50 0001 C CNN - 1 7950 2650 +P 7800 1900 +F 0 "C12" H 7915 1946 50 0000 L CNN +F 1 "100n" H 7915 1855 50 0000 L CNN +F 2 "Capacitor_SMD:C_1206_3216Metric" H 7838 1750 50 0001 C CNN +F 3 "~" H 7800 1900 50 0001 C CNN + 1 7800 1900 1 0 0 -1 $EndComp Wire Wire Line - 8100 2400 7950 2400 + 7950 1650 7800 1650 Wire Wire Line - 7950 2400 7950 2500 + 7800 1650 7800 1750 $Comp L Memory_EEPROM:M24C02-RMN U5 U 1 1 61C5D959 -P 9850 3750 -F 0 "U5" H 9850 4231 50 0000 C CNN -F 1 "M24C02-RMN" H 9850 4140 50 0000 C CNN -F 2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" H 9850 4100 50 0001 C CNN -F 3 "http://www.st.com/content/ccc/resource/technical/document/datasheet/b0/d8/50/40/5a/85/49/6f/DM00071904.pdf/files/DM00071904.pdf/jcr:content/translations/en.DM00071904.pdf" H 9900 3250 50 0001 C CNN - 1 9850 3750 +P 9700 3000 +F 0 "U5" H 9700 3481 50 0000 C CNN +F 1 "M24C02-RMN" H 9700 3390 50 0000 C CNN +F 2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" H 9700 3350 50 0001 C CNN +F 3 "http://www.st.com/content/ccc/resource/technical/document/datasheet/b0/d8/50/40/5a/85/49/6f/DM00071904.pdf/files/DM00071904.pdf/jcr:content/translations/en.DM00071904.pdf" H 9750 2500 50 0001 C CNN + 1 9700 3000 -1 0 0 -1 $EndComp Wire Wire Line - 7750 2900 7750 3750 + 7600 2150 7600 3000 +Connection ~ 7600 2150 Wire Wire Line - 7750 3750 9450 3750 -Connection ~ 7750 2900 + 7600 2150 7950 2150 Wire Wire Line - 7750 2900 8100 2900 + 7450 2250 7450 2900 Wire Wire Line - 6400 3000 7600 3000 + 7450 2900 8150 2900 +Connection ~ 7450 2250 Wire Wire Line - 7600 3000 7600 3650 -Wire Wire Line - 7600 3650 9450 3650 -Connection ~ 7600 3000 -Wire Wire Line - 7600 3000 8100 3000 + 7450 2250 7950 2250 $Comp L power:+3.3V #PWR0109 U 1 1 61C91AA9 -P 9850 3450 -F 0 "#PWR0109" H 9850 3300 50 0001 C CNN -F 1 "+3.3V" V 9865 3578 50 0000 L CNN -F 2 "" H 9850 3450 50 0001 C CNN -F 3 "" H 9850 3450 50 0001 C CNN - 1 9850 3450 +P 9700 2700 +F 0 "#PWR0109" H 9700 2550 50 0001 C CNN +F 1 "+3.3V" V 9715 2828 50 0000 L CNN +F 2 "" H 9700 2700 50 0001 C CNN +F 3 "" H 9700 2700 50 0001 C CNN + 1 9700 2700 1 0 0 -1 $EndComp $Comp L power:GND #PWR0110 U 1 1 61C94598 -P 9850 4050 -F 0 "#PWR0110" H 9850 3800 50 0001 C CNN -F 1 "GND" H 9855 3877 50 0000 C CNN -F 2 "" H 9850 4050 50 0001 C CNN -F 3 "" H 9850 4050 50 0001 C CNN - 1 9850 4050 +P 9700 3300 +F 0 "#PWR0110" H 9700 3050 50 0001 C CNN +F 1 "GND" H 9705 3127 50 0000 C CNN +F 2 "" H 9700 3300 50 0001 C CNN +F 3 "" H 9700 3300 50 0001 C CNN + 1 9700 3300 1 0 0 -1 $EndComp $Comp @@ -1052,34 +992,34 @@ $EndComp $Comp L power:GND #PWR0129 U 1 1 61D54088 -P 8600 3200 -F 0 "#PWR0129" H 8600 2950 50 0001 C CNN -F 1 "GND" H 8605 3027 50 0000 C CNN -F 2 "" H 8600 3200 50 0001 C CNN -F 3 "" H 8600 3200 50 0001 C CNN - 1 8600 3200 +P 8450 2450 +F 0 "#PWR0129" H 8450 2200 50 0001 C CNN +F 1 "GND" H 8455 2277 50 0000 C CNN +F 2 "" H 8450 2450 50 0001 C CNN +F 3 "" H 8450 2450 50 0001 C CNN + 1 8450 2450 1 0 0 -1 $EndComp $Comp L power:+3.3V #PWR0130 U 1 1 61D54D68 -P 8500 1900 -F 0 "#PWR0130" H 8500 1750 50 0001 C CNN -F 1 "+3.3V" V 8515 2028 50 0000 L CNN -F 2 "" H 8500 1900 50 0001 C CNN -F 3 "" H 8500 1900 50 0001 C CNN - 1 8500 1900 +P 8350 1150 +F 0 "#PWR0130" H 8350 1000 50 0001 C CNN +F 1 "+3.3V" V 8365 1278 50 0000 L CNN +F 2 "" H 8350 1150 50 0001 C CNN +F 3 "" H 8350 1150 50 0001 C CNN + 1 8350 1150 1 0 0 -1 $EndComp $Comp L power:+3.3V #PWR0131 U 1 1 61D55B34 -P 8700 2200 -F 0 "#PWR0131" H 8700 2050 50 0001 C CNN -F 1 "+3.3V" V 8715 2328 50 0000 L CNN -F 2 "" H 8700 2200 50 0001 C CNN -F 3 "" H 8700 2200 50 0001 C CNN - 1 8700 2200 +P 8550 1450 +F 0 "#PWR0131" H 8550 1300 50 0001 C CNN +F 1 "+3.3V" V 8565 1578 50 0000 L CNN +F 2 "" H 8550 1450 50 0001 C CNN +F 3 "" H 8550 1450 50 0001 C CNN + 1 8550 1450 1 0 0 -1 $EndComp $Comp @@ -1112,37 +1052,9 @@ Wire Wire Line Wire Wire Line 4600 4600 4600 4450 Connection ~ 4600 4450 -$Comp -L Connector:Conn_01x01_Female J11 -U 1 1 61D77A37 -P 10250 2700 -F 0 "J11" V 10188 2612 50 0000 R CNN -F 1 "T1" V 10097 2612 50 0000 R CNN -F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 10250 2700 50 0001 C CNN -F 3 "~" H 10250 2700 50 0001 C CNN - 1 10250 2700 - 1 0 0 -1 -$EndComp -$Comp -L Connector:Conn_01x01_Female J9 -U 1 1 61D7A7DD -P 10250 2300 -F 0 "J9" V 10188 2212 50 0000 R CNN -F 1 "T1" V 10097 2212 50 0000 R CNN -F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 10250 2300 50 0001 C CNN -F 3 "~" H 10250 2300 50 0001 C CNN - 1 10250 2300 - 1 0 0 -1 -$EndComp Wire Wire Line - 7150 2900 7150 3200 -Wire Wire Line - 7150 3200 6250 3200 -Wire Wire Line - 6250 3200 6250 3600 -Connection ~ 7150 2900 -Wire Wire Line - 7700 4550 7700 4600 + 7000 2150 7000 2450 +Connection ~ 7000 2150 Wire Wire Line 7700 4600 8250 4600 Wire Wire Line @@ -1151,25 +1063,6 @@ Wire Wire Line 7900 4500 7900 4400 Wire Wire Line 7900 4400 7700 4400 -Wire Wire Line - 7950 5000 7950 2800 -$Comp -L Connector_Generic:Conn_01x14 J2 -U 1 1 61CE3044 -P 8450 4600 -F 0 "J2" H 8530 4592 50 0000 L CNN -F 1 "Conn_01x14" H 8530 4501 50 0000 L CNN -F 2 "Connector_PinHeader_1.27mm:PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Left" H 8450 4600 50 0001 C CNN -F 3 "~" H 8450 4600 50 0001 C CNN - 1 8450 4600 - 1 0 0 -1 -$EndComp -Wire Wire Line - 8250 4000 8250 3400 -Wire Wire Line - 8250 3400 9100 3400 -Wire Wire Line - 9100 3400 9100 2900 $Comp L power:GND #PWR018 U 1 1 61AED744 @@ -1181,8 +1074,6 @@ F 3 "" H 8250 4100 50 0001 C CNN 1 8250 4100 0 1 1 0 $EndComp -Wire Wire Line - 7700 4250 8000 4250 Wire Wire Line 8000 4250 8000 4400 Wire Wire Line @@ -1215,10 +1106,6 @@ F 3 "~" H 6450 7400 50 0001 C CNN 1 6450 7400 0 1 1 0 $EndComp -Wire Wire Line - 6350 5950 6450 5950 -Wire Wire Line - 6450 5950 6450 5650 $Comp L power:GNDA #PWR0133 U 1 1 61D5CD97 @@ -1263,76 +1150,76 @@ $EndComp $Comp L Device:R R12 U 1 1 61DB9882 -P 9300 2100 -F 0 "R12" H 9370 2146 50 0000 L CNN -F 1 "1k" H 9370 2055 50 0000 L CNN -F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 9230 2100 50 0001 C CNN -F 3 "~" H 9300 2100 50 0001 C CNN - 1 9300 2100 +P 9150 1350 +F 0 "R12" H 9220 1396 50 0000 L CNN +F 1 "1k" H 9220 1305 50 0000 L CNN +F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 9080 1350 50 0001 C CNN +F 3 "~" H 9150 1350 50 0001 C CNN + 1 9150 1350 1 0 0 -1 $EndComp -Connection ~ 9300 2250 +Connection ~ 9150 1500 $Comp L Device:R R13 U 1 1 61DD6B28 -P 9300 2900 -F 0 "R13" H 9370 2946 50 0000 L CNN -F 1 "1k" H 9370 2855 50 0000 L CNN -F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 9230 2900 50 0001 C CNN -F 3 "~" H 9300 2900 50 0001 C CNN - 1 9300 2900 +P 9150 2150 +F 0 "R13" H 9220 2196 50 0000 L CNN +F 1 "1k" H 9220 2105 50 0000 L CNN +F 2 "Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder" V 9080 2150 50 0001 C CNN +F 3 "~" H 9150 2150 50 0001 C CNN + 1 9150 2150 1 0 0 -1 $EndComp -Connection ~ 9300 2750 +Connection ~ 9150 2000 $Comp L power:GND #PWR0135 U 1 1 61DD8893 -P 9300 3050 -F 0 "#PWR0135" H 9300 2800 50 0001 C CNN -F 1 "GND" H 9305 2877 50 0000 C CNN -F 2 "" H 9300 3050 50 0001 C CNN -F 3 "" H 9300 3050 50 0001 C CNN - 1 9300 3050 +P 9150 2300 +F 0 "#PWR0135" H 9150 2050 50 0001 C CNN +F 1 "GND" H 9155 2127 50 0000 C CNN +F 2 "" H 9150 2300 50 0001 C CNN +F 3 "" H 9150 2300 50 0001 C CNN + 1 9150 2300 1 0 0 -1 $EndComp $Comp L power:GND #PWR0136 U 1 1 61DDA012 -P 9300 1950 -F 0 "#PWR0136" H 9300 1700 50 0001 C CNN -F 1 "GND" H 9305 1777 50 0000 C CNN -F 2 "" H 9300 1950 50 0001 C CNN -F 3 "" H 9300 1950 50 0001 C CNN - 1 9300 1950 +P 9150 1200 +F 0 "#PWR0136" H 9150 950 50 0001 C CNN +F 1 "GND" H 9155 1027 50 0000 C CNN +F 2 "" H 9150 1200 50 0001 C CNN +F 3 "" H 9150 1200 50 0001 C CNN + 1 9150 1200 -1 0 0 1 $EndComp $Comp L Device:C_Small C16 U 1 1 61E0787F -P 8300 2050 -F 0 "C16" H 8392 2096 50 0000 L CNN -F 1 "100n" H 8392 2005 50 0000 L CNN -F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 8300 2050 50 0001 C CNN -F 3 "~" H 8300 2050 50 0001 C CNN - 1 8300 2050 +P 8150 1300 +F 0 "C16" H 8242 1346 50 0000 L CNN +F 1 "100n" H 8242 1255 50 0000 L CNN +F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 8150 1300 50 0001 C CNN +F 3 "~" H 8150 1300 50 0001 C CNN + 1 8150 1300 0 1 1 0 $EndComp Wire Wire Line - 8500 1900 8500 2050 + 8350 1150 8350 1300 Wire Wire Line - 8400 2050 8500 2050 -Connection ~ 8500 2050 + 8250 1300 8350 1300 +Connection ~ 8350 1300 Wire Wire Line - 8500 2050 8500 2200 + 8350 1300 8350 1450 $Comp L power:GND #PWR0137 U 1 1 61E2133B -P 8200 2050 -F 0 "#PWR0137" H 8200 1800 50 0001 C CNN -F 1 "GND" V 8205 1922 50 0000 R CNN -F 2 "" H 8200 2050 50 0001 C CNN -F 3 "" H 8200 2050 50 0001 C CNN - 1 8200 2050 +P 8050 1300 +F 0 "#PWR0137" H 8050 1050 50 0001 C CNN +F 1 "GND" V 8055 1172 50 0000 R CNN +F 2 "" H 8050 1300 50 0001 C CNN +F 3 "" H 8050 1300 50 0001 C CNN + 1 8050 1300 0 1 1 0 $EndComp $Comp @@ -1359,7 +1246,6 @@ F 3 "~" H 8450 5550 50 0001 C CNN $EndComp Wire Wire Line 8250 5550 8250 5300 -Connection ~ 8250 5300 $Comp L Device:D D3 U 1 1 61E592A1 @@ -1420,25 +1306,226 @@ Wire Wire Line 9950 5950 9950 5850 Connection ~ 9950 5850 $Comp -L Connector:Conn_01x01_Female J4 +L Connector:Conn_01x01_Female SQGND1 U 1 1 61DD78FE -P 9300 5350 -F 0 "J4" V 9238 5262 50 0000 R CNN -F 1 "T1" V 9147 5262 50 0000 R CNN -F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 9300 5350 50 0001 C CNN -F 3 "~" H 9300 5350 50 0001 C CNN - 1 9300 5350 +P 9950 850 +F 0 "SQGND1" V 9888 762 50 0000 R CNN +F 1 "T1" V 9797 762 50 0000 R CNN +F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 9950 850 50 0001 C CNN +F 3 "~" H 9950 850 50 0001 C CNN + 1 9950 850 1 0 0 -1 $EndComp $Comp L power:GND #PWR0139 U 1 1 61DD87C2 -P 9100 5350 -F 0 "#PWR0139" H 9100 5100 50 0001 C CNN -F 1 "GND" H 9105 5177 50 0000 C CNN -F 2 "" H 9100 5350 50 0001 C CNN -F 3 "" H 9100 5350 50 0001 C CNN - 1 9100 5350 +P 9750 850 +F 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Line + 8950 2800 8050 2800 +Wire Wire Line + 8050 2800 8050 3300 +Wire Wire Line + 8050 3300 8250 3300 +Wire Wire Line + 8950 2150 8950 2800 +$Comp +L power:GND #PWR0140 +U 1 1 61EE0FFF +P 8250 3200 +F 0 "#PWR0140" H 8250 2950 50 0001 C CNN +F 1 "GND" H 8255 3027 50 0000 C CNN +F 2 "" H 8250 3200 50 0001 C CNN +F 3 "" H 8250 3200 50 0001 C CNN + 1 8250 3200 + -1 0 0 1 +$EndComp +Wire Wire Line + 6400 2150 6400 2250 +$Comp +L Connector:Conn_01x01_Female J9 +U 1 1 61D7A7DD +P 10100 1950 +F 0 "J9" V 10038 1862 50 0000 R CNN +F 1 "T1" V 9947 1862 50 0000 R CNN +F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 10100 1950 50 0001 C CNN +F 3 "~" H 10100 1950 50 0001 C CNN + 1 10100 1950 + 1 0 0 1 +$EndComp +$Comp +L Connector:Conn_01x01_Female J11 +U 1 1 61D77A37 +P 10100 1550 +F 0 "J11" V 10038 1462 50 0000 R CNN +F 1 "T1" V 9947 1462 50 0000 R CNN +F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 10100 1550 50 0001 C CNN +F 3 "~" H 10100 1550 50 0001 C CNN + 1 10100 1550 + 1 0 0 1 +$EndComp +Wire Wire Line + 9900 1300 9900 1550 +Wire Wire Line + 9550 1300 9900 1300 +Wire Wire Line + 9900 2200 9900 1950 +Wire Wire Line + 9550 2200 9900 2200 +Wire Wire Line + 9550 1750 9550 1700 +Connection ~ 9550 1750 +Wire Wire Line + 9500 1750 9550 1750 +Wire Wire Line + 9550 1800 9550 1750 +$Comp +L power:GND #PWR0107 +U 1 1 61C1568E +P 9500 1750 +F 0 "#PWR0107" H 9500 1500 50 0001 C CNN +F 1 "GND" V 9505 1622 50 0000 R CNN +F 2 "" H 9500 1750 50 0001 C CNN +F 3 "" H 9500 1750 50 0001 C CNN + 1 9500 1750 + 0 1 -1 0 +$EndComp +$Comp +L Transistor_FET:AO3400A Q2 +U 1 1 61BFCDBB +P 9450 1500 +F 0 "Q2" H 9655 1454 50 0000 L CNN +F 1 "AO3400A" H 9655 1545 50 0000 L CNN +F 2 "Package_TO_SOT_SMD:SOT-23" H 9650 1425 50 0001 L CIN +F 3 "http://www.aosmd.com/pdfs/datasheet/AO3400A.pdf" H 9450 1500 50 0001 L CNN + 1 9450 1500 + 1 0 0 -1 +$EndComp +$Comp +L Transistor_FET:AO3400A Q1 +U 1 1 61BFB2BF +P 9450 2000 +F 0 "Q1" H 9655 2046 50 0000 L CNN +F 1 "AO3400A" H 9655 1955 50 0000 L CNN +F 2 "Package_TO_SOT_SMD:SOT-23" H 9650 1925 50 0001 L CIN +F 3 "http://www.aosmd.com/pdfs/datasheet/AO3400A.pdf" H 9450 2000 50 0001 L CNN + 1 9450 2000 + 1 0 0 1 +$EndComp +$Comp +L Connector:Conn_01x01_Female PWGND1 +U 1 1 62008ECB +P 7800 5850 +F 0 "PWGND1" V 7738 5762 50 0000 R CNN +F 1 "T1" V 7647 5762 50 0000 R CNN +F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 7800 5850 50 0001 C CNN +F 3 "~" H 7800 5850 50 0001 C CNN + 1 7800 5850 + 1 0 0 -1 +$EndComp +$Comp +L power:GND #PWR0141 +U 1 1 62008ED1 +P 7600 5850 +F 0 "#PWR0141" H 7600 5600 50 0001 C CNN +F 1 "GND" H 7605 5677 50 0000 C CNN +F 2 "" H 7600 5850 50 0001 C CNN +F 3 "" H 7600 5850 50 0001 C CNN + 1 7600 5850 0 1 -1 0 $EndComp $EndSCHEMATC diff --git a/schemi/bassofono.sch-bak b/schemi/bassofono.sch-bak index e50ae73..92d2ac9 100644 --- a/schemi/bassofono.sch-bak +++ b/schemi/bassofono.sch-bak @@ -378,62 +378,62 @@ Connection ~ 6100 3600 $Comp L power:+3.3V #PWR0102 U 1 1 61A3FADC -P 5300 2800 -F 0 "#PWR0102" H 5300 2650 50 0001 C CNN -F 1 "+3.3V" V 5315 2928 50 0000 L CNN -F 2 "" H 5300 2800 50 0001 C CNN -F 3 "" H 5300 2800 50 0001 C CNN - 1 5300 2800 - 0 1 1 0 +P 8300 5850 +F 0 "#PWR0102" H 8300 5700 50 0001 C CNN +F 1 "+3.3V" V 8315 5978 50 0000 L CNN +F 2 "" H 8300 5850 50 0001 C CNN +F 3 "" H 8300 5850 50 0001 C CNN + 1 8300 5850 + 0 -1 1 0 $EndComp $Comp L Device:C C11 U 1 1 61A40FCE -P 4600 2950 -F 0 "C11" H 4715 2996 50 0000 L CNN -F 1 "10µF" H 4715 2905 50 0000 L CNN -F 2 "Capacitor_SMD:C_1210_3225Metric_Pad1.33x2.70mm_HandSolder" H 4638 2800 50 0001 C CNN -F 3 "~" H 4600 2950 50 0001 C CNN - 1 4600 2950 - 1 0 0 -1 +P 9000 6000 +F 0 "C11" H 9115 6046 50 0000 L CNN +F 1 "10µF" H 9115 5955 50 0000 L CNN +F 2 "Capacitor_SMD:C_1210_3225Metric_Pad1.33x2.70mm_HandSolder" H 9038 5850 50 0001 C CNN +F 3 "~" H 9000 6000 50 0001 C CNN + 1 9000 6000 + -1 0 0 -1 $EndComp Wire Wire Line - 4450 2800 4600 2800 -Connection ~ 4600 2800 + 9150 5850 9000 5850 +Connection ~ 9000 5850 Wire Wire Line - 4600 2800 5050 2800 + 9000 5850 8550 5850 $Comp L power:GND #PWR0103 U 1 1 61A426E0 -P 4600 3100 -F 0 "#PWR0103" H 4600 2850 50 0001 C CNN -F 1 "GND" H 4605 2927 50 0000 C CNN -F 2 "" H 4600 3100 50 0001 C CNN -F 3 "" H 4600 3100 50 0001 C CNN - 1 4600 3100 - 1 0 0 -1 +P 9000 6150 +F 0 "#PWR0103" H 9000 5900 50 0001 C CNN +F 1 "GND" H 9005 5977 50 0000 C CNN +F 2 "" H 9000 6150 50 0001 C CNN +F 3 "" H 9000 6150 50 0001 C CNN + 1 9000 6150 + -1 0 0 -1 $EndComp $Comp L power:GND #PWR0104 U 1 1 61A42D16 -P 4150 3100 -F 0 "#PWR0104" H 4150 2850 50 0001 C CNN -F 1 "GND" H 4155 2927 50 0000 C CNN -F 2 "" H 4150 3100 50 0001 C CNN -F 3 "" H 4150 3100 50 0001 C CNN - 1 4150 3100 - 1 0 0 -1 +P 9550 6250 +F 0 "#PWR0104" H 9550 6000 50 0001 C CNN +F 1 "GND" H 9555 6077 50 0000 C CNN +F 2 "" H 9550 6250 50 0001 C CNN +F 3 "" H 9550 6250 50 0001 C CNN + 1 9550 6250 + -1 0 0 -1 $EndComp $Comp L Device:L L1 U 1 1 61A9517F -P 5050 2950 -F 0 "L1" H 5103 2996 50 0000 L CNN -F 1 "L" H 5103 2905 50 0000 L CNN -F 2 "Inductor_SMD:L_1210_3225Metric_Pad1.42x2.65mm_HandSolder" H 5050 2950 50 0001 C CNN -F 3 "~" H 5050 2950 50 0001 C CNN - 1 5050 2950 - 1 0 0 -1 +P 8550 6000 +F 0 "L1" H 8603 6046 50 0000 L CNN +F 1 "L" H 8603 5955 50 0000 L CNN +F 2 "Inductor_SMD:L_1210_3225Metric_Pad1.42x2.65mm_HandSolder" H 8550 6000 50 0001 C CNN +F 3 "~" H 8550 6000 50 0001 C CNN + 1 8550 6000 + -1 0 0 -1 $EndComp $Comp L Oscillator:Si5351A-B-GT U4 @@ -560,13 +560,13 @@ Wire Wire Line $Comp L power:+12V #PWR0105 U 1 1 61C8D2AC -P 3250 2800 -F 0 "#PWR0105" H 3250 2650 50 0001 C CNN -F 1 "+12V" V 3265 2928 50 0000 L CNN -F 2 "" H 3250 2800 50 0001 C CNN -F 3 "" H 3250 2800 50 0001 C CNN - 1 3250 2800 - 0 -1 -1 0 +P 10900 5850 +F 0 "#PWR0105" H 10900 5700 50 0001 C CNN +F 1 "+12V" V 10915 5978 50 0000 L CNN +F 2 "" H 10900 5850 50 0001 C CNN +F 3 "" H 10900 5850 50 0001 C CNN + 1 10900 5850 + 0 1 -1 0 $EndComp Wire Wire Line 7700 5000 7950 5000 @@ -975,79 +975,79 @@ F 3 "" H 2750 5300 50 0001 C CNN 1 2750 5300 1 0 0 -1 $EndComp -Connection ~ 5050 2800 +Connection ~ 8550 5850 Wire Wire Line - 5050 2800 5300 2800 + 8550 5850 8300 5850 $Comp L power:+3.3VA #PWR0125 U 1 1 61E9587E -P 5050 3100 -F 0 "#PWR0125" H 5050 2950 50 0001 C CNN -F 1 "+3.3VA" H 5065 3273 50 0000 C CNN -F 2 "" H 5050 3100 50 0001 C CNN -F 3 "" H 5050 3100 50 0001 C CNN - 1 5050 3100 - -1 0 0 1 +P 8550 6150 +F 0 "#PWR0125" H 8550 6000 50 0001 C CNN +F 1 "+3.3VA" H 8565 6323 50 0000 C CNN +F 2 "" H 8550 6150 50 0001 C CNN +F 3 "" H 8550 6150 50 0001 C CNN + 1 8550 6150 + 1 0 0 1 $EndComp $Comp L Device:L L2 U 1 1 61E962FD -P 5550 3150 -F 0 "L2" H 5603 3196 50 0000 L CNN -F 1 "L" H 5603 3105 50 0000 L CNN -F 2 "Inductor_SMD:L_1210_3225Metric_Pad1.42x2.65mm_HandSolder" H 5550 3150 50 0001 C CNN -F 3 "~" H 5550 3150 50 0001 C CNN - 1 5550 3150 - 0 -1 -1 0 +P 8050 6200 +F 0 "L2" H 8103 6246 50 0000 L CNN +F 1 "L" H 8103 6155 50 0000 L CNN +F 2 "Inductor_SMD:L_1210_3225Metric_Pad1.42x2.65mm_HandSolder" H 8050 6200 50 0001 C CNN +F 3 "~" H 8050 6200 50 0001 C CNN + 1 8050 6200 + 0 1 -1 0 $EndComp $Comp L power:GND #PWR0126 U 1 1 61E96E2C -P 5400 3150 -F 0 "#PWR0126" H 5400 2900 50 0001 C CNN -F 1 "GND" H 5405 2977 50 0000 C CNN -F 2 "" H 5400 3150 50 0001 C CNN -F 3 "" H 5400 3150 50 0001 C CNN - 1 5400 3150 - 1 0 0 -1 +P 8200 6200 +F 0 "#PWR0126" H 8200 5950 50 0001 C CNN +F 1 "GND" H 8205 6027 50 0000 C CNN +F 2 "" H 8200 6200 50 0001 C CNN +F 3 "" H 8200 6200 50 0001 C CNN + 1 8200 6200 + -1 0 0 -1 $EndComp $Comp L power:GNDA #PWR0127 U 1 1 61E97DC7 -P 5700 3150 -F 0 "#PWR0127" H 5700 2900 50 0001 C CNN -F 1 "GNDA" H 5705 2977 50 0000 C CNN -F 2 "" H 5700 3150 50 0001 C CNN -F 3 "" H 5700 3150 50 0001 C CNN - 1 5700 3150 - 1 0 0 -1 +P 7900 6200 +F 0 "#PWR0127" H 7900 5950 50 0001 C CNN +F 1 "GNDA" H 7905 6027 50 0000 C CNN +F 2 "" H 7900 6200 50 0001 C CNN +F 3 "" H 7900 6200 50 0001 C CNN + 1 7900 6200 + -1 0 0 -1 $EndComp Wire Wire Line - 3550 2800 3700 2800 + 10600 5850 10400 5850 $Comp L Device:C C15 U 1 1 61E9EC64 -P 3700 2950 -F 0 "C15" H 3815 2996 50 0000 L CNN -F 1 "10µF" H 3815 2905 50 0000 L CNN -F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 3738 2800 50 0001 C CNN -F 3 "~" H 3700 2950 50 0001 C CNN - 1 3700 2950 - 1 0 0 -1 +P 10400 6000 +F 0 "C15" H 10515 6046 50 0000 L CNN +F 1 "10µF" H 10515 5955 50 0000 L CNN +F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 10438 5850 50 0001 C CNN +F 3 "~" H 10400 6000 50 0001 C CNN + 1 10400 6000 + -1 0 0 -1 $EndComp -Connection ~ 3700 2800 +Connection ~ 10400 5850 Wire Wire Line - 3700 2800 3850 2800 + 10400 5850 9950 5850 $Comp L power:GND #PWR0128 U 1 1 61E9F25F -P 3700 3100 -F 0 "#PWR0128" H 3700 2850 50 0001 C CNN -F 1 "GND" H 3705 2927 50 0000 C CNN -F 2 "" H 3700 3100 50 0001 C CNN -F 3 "" H 3700 3100 50 0001 C CNN - 1 3700 3100 - 1 0 0 -1 +P 10400 6150 +F 0 "#PWR0128" H 10400 5900 50 0001 C CNN +F 1 "GND" H 10405 5977 50 0000 C CNN +F 2 "" H 10400 6150 50 0001 C CNN +F 3 "" H 10400 6150 50 0001 C CNN + 1 10400 6150 + -1 0 0 -1 $EndComp $Comp L power:GND #PWR0129 @@ -1215,10 +1215,6 @@ F 3 "~" H 6450 7400 50 0001 C CNN 1 6450 7400 0 1 1 0 $EndComp -Wire Wire Line - 6350 5950 6450 5950 -Wire Wire Line - 6450 5950 6450 5650 $Comp L power:GNDA #PWR0133 U 1 1 61D5CD97 @@ -1363,13 +1359,13 @@ Connection ~ 8250 5300 $Comp L Device:D D3 U 1 1 61E592A1 -P 3400 2800 -F 0 "D3" V 3354 2880 50 0000 L CNN -F 1 "D" V 3445 2880 50 0000 L CNN -F 2 "Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder" H 3400 2800 50 0001 C CNN -F 3 "~" H 3400 2800 50 0001 C CNN - 1 3400 2800 - -1 0 0 1 +P 10750 5850 +F 0 "D3" V 10704 5930 50 0000 L CNN +F 1 "D" V 10795 5930 50 0000 L CNN +F 2 "Diode_SMD:D_1210_3225Metric_Pad1.42x2.65mm_HandSolder" H 10750 5850 50 0001 C CNN +F 3 "~" H 10750 5850 50 0001 C CNN + 1 10750 5850 + 1 0 0 1 $EndComp $Comp L Device:R R14 @@ -1406,14 +1402,43 @@ Connection ~ 6350 6600 Wire Wire Line 6350 6600 6350 6650 $Comp -L Regulator_Linear:AZ1117-3.3 U3 -U 1 1 61A3E66B -P 4150 2800 -F 0 "U3" H 4150 3042 50 0000 C CNN -F 1 "AZ1117-3.3" H 4150 2951 50 0000 C CNN -F 2 "Package_TO_SOT_SMD:SOT-23" H 4150 3050 50 0001 C CIN -F 3 "https://www.diodes.com/assets/Datasheets/AZ1117.pdf" H 4150 2800 50 0001 C CNN - 1 4150 2800 +L Regulator_Linear:LP2985-3.3 U1 +U 1 1 61CF6A59 +P 9550 5950 +F 0 "U1" H 9550 6292 50 0000 C CNN +F 1 "LP2985-3.3" H 9550 6201 50 0000 C CNN +F 2 "Package_TO_SOT_SMD:SOT-23-5" H 9550 6275 50 0001 C CNN +F 3 "http://www.ti.com/lit/ds/symlink/lp2985.pdf" H 9550 5950 50 0001 C CNN + 1 9550 5950 + -1 0 0 -1 +$EndComp +Wire Wire Line + 9950 5950 9950 5850 +Connection ~ 9950 5850 +$Comp +L Connector:Conn_01x01_Female J4 +U 1 1 61DD78FE +P 9300 5350 +F 0 "J4" V 9238 5262 50 0000 R CNN +F 1 "T1" V 9147 5262 50 0000 R CNN +F 2 "TestPoint:TestPoint_Pad_2.5x2.5mm" H 9300 5350 50 0001 C CNN +F 3 "~" H 9300 5350 50 0001 C CNN + 1 9300 5350 1 0 0 -1 $EndComp +$Comp +L power:GND #PWR0139 +U 1 1 61DD87C2 +P 9100 5350 +F 0 "#PWR0139" H 9100 5100 50 0001 C CNN +F 1 "GND" H 9105 5177 50 0000 C CNN +F 2 "" H 9100 5350 50 0001 C CNN +F 3 "" H 9100 5350 50 0001 C CNN + 1 9100 5350 + 0 1 -1 0 +$EndComp +Wire Wire Line + 6600 5950 6600 5650 +Wire Wire Line + 6350 5950 6600 5950 $EndSCHEMATC diff --git a/schemi/fp-info-cache b/schemi/fp-info-cache index 41d7354..d4316ad 100644 --- a/schemi/fp-info-cache +++ b/schemi/fp-info-cache @@ -1,1947 +1,1541 @@ -454531924040427 -Connector_PinHeader_1.27mm -PinHeader_1x01_P1.27mm_Horizontal -Through hole angled pin header, 1x01, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x01 1.27mm single row -0 -1 -1 -Connector_PinHeader_1.27mm -PinHeader_1x01_P1.27mm_Vertical -Through hole straight pin header, 1x01, 1.27mm pitch, single row -Through hole pin header THT 1x01 1.27mm single row -0 -1 -1 -Connector_PinHeader_1.27mm -PinHeader_1x02_P1.27mm_Horizontal -Through hole angled pin header, 1x02, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x02 1.27mm single row +360753397034833 +Inductor_SMD +L_6.3x6.3_H3 +Choke, SMD, 6.3x6.3mm 3mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_1x02_P1.27mm_Vertical -Through hole straight pin header, 1x02, 1.27mm pitch, single row -Through hole pin header THT 1x02 1.27mm single row +Inductor_SMD +L_7.3x7.3_H3.5 +Choke, SMD, 7.3x7.3mm 3.5mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_1x02_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x02, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x02 1.27mm single row style1 pin1 left +Inductor_SMD +L_7.3x7.3_H4.5 +Choke, SMD, 7.3x7.3mm 4.5mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_1x02_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x02, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x02 1.27mm single row style2 pin1 right +Inductor_SMD +L_10.4x10.4_H4.8 +Choke, SMD, 10.4x10.4mm 4.8mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_1x03_P1.27mm_Horizontal -Through hole angled pin header, 1x03, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x03 1.27mm single row -0 -3 -3 -Connector_PinHeader_1.27mm -PinHeader_1x03_P1.27mm_Vertical -Through hole straight pin header, 1x03, 1.27mm pitch, single row -Through hole pin header THT 1x03 1.27mm single row -0 -3 -3 -Connector_PinHeader_1.27mm -PinHeader_1x03_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x03, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x03 1.27mm single row style1 pin1 left -0 -3 -3 -Connector_PinHeader_1.27mm -PinHeader_1x03_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x03, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x03 1.27mm single row style2 pin1 right -0 -3 -3 -Connector_PinHeader_1.27mm -PinHeader_1x04_P1.27mm_Horizontal -Through hole angled pin header, 1x04, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x04 1.27mm single row -0 -4 -4 -Connector_PinHeader_1.27mm -PinHeader_1x04_P1.27mm_Vertical -Through hole straight pin header, 1x04, 1.27mm pitch, single row -Through hole pin header THT 1x04 1.27mm single row -0 -4 -4 -Connector_PinHeader_1.27mm -PinHeader_1x04_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x04, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x04 1.27mm single row style1 pin1 left -0 -4 -4 -Connector_PinHeader_1.27mm -PinHeader_1x04_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x04, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x04 1.27mm single row style2 pin1 right -0 -4 -4 -Connector_PinHeader_1.27mm -PinHeader_1x05_P1.27mm_Horizontal -Through hole angled pin header, 1x05, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x05 1.27mm single row -0 -5 -5 -Connector_PinHeader_1.27mm -PinHeader_1x05_P1.27mm_Vertical -Through hole straight pin header, 1x05, 1.27mm pitch, single row -Through hole pin header THT 1x05 1.27mm single row -0 -5 -5 -Connector_PinHeader_1.27mm -PinHeader_1x05_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x05, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x05 1.27mm single row style1 pin1 left -0 -5 -5 -Connector_PinHeader_1.27mm -PinHeader_1x05_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x05, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x05 1.27mm single row style2 pin1 right -0 -5 -5 -Connector_PinHeader_1.27mm -PinHeader_1x06_P1.27mm_Horizontal -Through hole angled pin header, 1x06, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x06 1.27mm single row -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_1x06_P1.27mm_Vertical -Through hole straight pin header, 1x06, 1.27mm pitch, single row -Through hole pin header THT 1x06 1.27mm single row -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x06 1.27mm single row style1 pin1 left -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_1x06_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x06, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x06 1.27mm single row style2 pin1 right -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_1x07_P1.27mm_Horizontal -Through hole angled pin header, 1x07, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x07 1.27mm single row -0 -7 -7 -Connector_PinHeader_1.27mm -PinHeader_1x07_P1.27mm_Vertical -Through hole straight pin header, 1x07, 1.27mm pitch, single row -Through hole pin header THT 1x07 1.27mm single row -0 -7 -7 -Connector_PinHeader_1.27mm -PinHeader_1x07_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x07, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x07 1.27mm single row style1 pin1 left -0 -7 -7 -Connector_PinHeader_1.27mm -PinHeader_1x07_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x07, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x07 1.27mm single row style2 pin1 right -0 -7 -7 -Connector_PinHeader_1.27mm -PinHeader_1x08_P1.27mm_Horizontal -Through hole angled pin header, 1x08, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x08 1.27mm single row -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_1x08_P1.27mm_Vertical -Through hole straight pin header, 1x08, 1.27mm pitch, single row -Through hole pin header THT 1x08 1.27mm single row -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_1x08_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x08, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x08 1.27mm single row style1 pin1 left -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_1x08_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x08, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x08 1.27mm single row style2 pin1 right -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_1x09_P1.27mm_Horizontal -Through hole angled pin header, 1x09, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x09 1.27mm single row -0 -9 -9 -Connector_PinHeader_1.27mm -PinHeader_1x09_P1.27mm_Vertical -Through hole straight pin header, 1x09, 1.27mm pitch, single row -Through hole pin header THT 1x09 1.27mm single row -0 -9 -9 -Connector_PinHeader_1.27mm -PinHeader_1x09_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x09, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x09 1.27mm single row style1 pin1 left -0 -9 -9 -Connector_PinHeader_1.27mm -PinHeader_1x09_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x09, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x09 1.27mm single row style2 pin1 right -0 -9 -9 -Connector_PinHeader_1.27mm -PinHeader_1x10_P1.27mm_Horizontal -Through hole angled pin header, 1x10, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x10 1.27mm single row -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_1x10_P1.27mm_Vertical -Through hole straight pin header, 1x10, 1.27mm pitch, single row -Through hole pin header THT 1x10 1.27mm single row -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_1x10_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x10, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x10 1.27mm single row style1 pin1 left -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_1x10_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x10, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x10 1.27mm single row style2 pin1 right -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_1x11_P1.27mm_Horizontal -Through hole angled pin header, 1x11, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x11 1.27mm single row -0 -11 -11 -Connector_PinHeader_1.27mm -PinHeader_1x11_P1.27mm_Vertical -Through hole straight pin header, 1x11, 1.27mm pitch, single row -Through hole pin header THT 1x11 1.27mm single row -0 -11 -11 -Connector_PinHeader_1.27mm -PinHeader_1x11_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x11, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x11 1.27mm single row style1 pin1 left -0 -11 -11 -Connector_PinHeader_1.27mm -PinHeader_1x11_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x11, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x11 1.27mm single row style2 pin1 right -0 -11 -11 -Connector_PinHeader_1.27mm -PinHeader_1x12_P1.27mm_Horizontal -Through hole angled pin header, 1x12, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x12 1.27mm single row -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_1x12_P1.27mm_Vertical -Through hole straight pin header, 1x12, 1.27mm pitch, single row -Through hole pin header THT 1x12 1.27mm single row -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_1x12_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x12, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x12 1.27mm single row style1 pin1 left -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_1x12_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x12, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x12 1.27mm single row style2 pin1 right -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_1x13_P1.27mm_Horizontal -Through hole angled pin header, 1x13, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x13 1.27mm single row -0 -13 -13 -Connector_PinHeader_1.27mm -PinHeader_1x13_P1.27mm_Vertical -Through hole straight pin header, 1x13, 1.27mm pitch, single row -Through hole pin header THT 1x13 1.27mm single row -0 -13 -13 -Connector_PinHeader_1.27mm -PinHeader_1x13_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x13, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x13 1.27mm single row style1 pin1 left -0 -13 -13 -Connector_PinHeader_1.27mm -PinHeader_1x13_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x13, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x13 1.27mm single row style2 pin1 right -0 -13 -13 -Connector_PinHeader_1.27mm -PinHeader_1x14_P1.27mm_Horizontal -Through hole angled pin header, 1x14, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x14 1.27mm single row -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_1x14_P1.27mm_Vertical -Through hole straight pin header, 1x14, 1.27mm pitch, single row -Through hole pin header THT 1x14 1.27mm single row -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x14 1.27mm single row style1 pin1 left -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_1x14_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x14, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x14 1.27mm single row style2 pin1 right -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_1x15_P1.27mm_Horizontal -Through hole angled pin header, 1x15, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x15 1.27mm single row -0 -15 -15 -Connector_PinHeader_1.27mm -PinHeader_1x15_P1.27mm_Vertical -Through hole straight pin header, 1x15, 1.27mm pitch, single row -Through hole pin header THT 1x15 1.27mm single row -0 -15 -15 -Connector_PinHeader_1.27mm -PinHeader_1x15_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x15, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x15 1.27mm single row style1 pin1 left -0 -15 -15 -Connector_PinHeader_1.27mm -PinHeader_1x15_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x15, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x15 1.27mm single row style2 pin1 right -0 -15 -15 -Connector_PinHeader_1.27mm -PinHeader_1x16_P1.27mm_Horizontal -Through hole angled pin header, 1x16, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x16 1.27mm single row -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_1x16_P1.27mm_Vertical -Through hole straight pin header, 1x16, 1.27mm pitch, single row -Through hole pin header THT 1x16 1.27mm single row -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_1x16_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x16, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x16 1.27mm single row style1 pin1 left -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_1x16_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x16, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x16 1.27mm single row style2 pin1 right -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_1x17_P1.27mm_Horizontal -Through hole angled pin header, 1x17, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x17 1.27mm single row -0 -17 -17 -Connector_PinHeader_1.27mm -PinHeader_1x17_P1.27mm_Vertical -Through hole straight pin header, 1x17, 1.27mm pitch, single row -Through hole pin header THT 1x17 1.27mm single row -0 -17 -17 -Connector_PinHeader_1.27mm -PinHeader_1x17_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x17, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x17 1.27mm single row style1 pin1 left -0 -17 -17 -Connector_PinHeader_1.27mm -PinHeader_1x17_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x17, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x17 1.27mm single row style2 pin1 right -0 -17 -17 -Connector_PinHeader_1.27mm -PinHeader_1x18_P1.27mm_Horizontal -Through hole angled pin header, 1x18, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x18 1.27mm single row -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_1x18_P1.27mm_Vertical -Through hole straight pin header, 1x18, 1.27mm pitch, single row -Through hole pin header THT 1x18 1.27mm single row -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_1x18_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x18, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x18 1.27mm single row style1 pin1 left -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_1x18_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x18, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x18 1.27mm single row style2 pin1 right -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_1x19_P1.27mm_Horizontal -Through hole angled pin header, 1x19, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x19 1.27mm single row -0 -19 -19 -Connector_PinHeader_1.27mm -PinHeader_1x19_P1.27mm_Vertical -Through hole straight pin header, 1x19, 1.27mm pitch, single row -Through hole pin header THT 1x19 1.27mm single row -0 -19 -19 -Connector_PinHeader_1.27mm -PinHeader_1x19_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x19, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x19 1.27mm single row style1 pin1 left -0 -19 -19 -Connector_PinHeader_1.27mm -PinHeader_1x19_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x19, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x19 1.27mm single row style2 pin1 right -0 -19 -19 -Connector_PinHeader_1.27mm -PinHeader_1x20_P1.27mm_Horizontal -Through hole angled pin header, 1x20, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x20 1.27mm single row -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_1x20_P1.27mm_Vertical -Through hole straight pin header, 1x20, 1.27mm pitch, single row -Through hole pin header THT 1x20 1.27mm single row -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_1x20_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x20, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x20 1.27mm single row style1 pin1 left -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_1x20_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x20, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x20 1.27mm single row style2 pin1 right -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_1x21_P1.27mm_Horizontal -Through hole angled pin header, 1x21, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x21 1.27mm single row -0 -21 -21 -Connector_PinHeader_1.27mm -PinHeader_1x21_P1.27mm_Vertical -Through hole straight pin header, 1x21, 1.27mm pitch, single row -Through hole pin header THT 1x21 1.27mm single row -0 -21 -21 -Connector_PinHeader_1.27mm -PinHeader_1x21_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x21, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x21 1.27mm single row style1 pin1 left -0 -21 -21 -Connector_PinHeader_1.27mm -PinHeader_1x21_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x21, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x21 1.27mm single row style2 pin1 right -0 -21 -21 -Connector_PinHeader_1.27mm -PinHeader_1x22_P1.27mm_Horizontal -Through hole angled pin header, 1x22, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x22 1.27mm single row -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_1x22_P1.27mm_Vertical -Through hole straight pin header, 1x22, 1.27mm pitch, single row -Through hole pin header THT 1x22 1.27mm single row -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_1x22_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x22, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x22 1.27mm single row style1 pin1 left -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_1x22_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x22, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x22 1.27mm single row style2 pin1 right -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_1x23_P1.27mm_Horizontal -Through hole angled pin header, 1x23, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x23 1.27mm single row -0 -23 -23 -Connector_PinHeader_1.27mm -PinHeader_1x23_P1.27mm_Vertical -Through hole straight pin header, 1x23, 1.27mm pitch, single row -Through hole pin header THT 1x23 1.27mm single row -0 -23 -23 -Connector_PinHeader_1.27mm -PinHeader_1x23_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x23, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x23 1.27mm single row style1 pin1 left -0 -23 -23 -Connector_PinHeader_1.27mm -PinHeader_1x23_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x23, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x23 1.27mm single row style2 pin1 right -0 -23 -23 -Connector_PinHeader_1.27mm -PinHeader_1x24_P1.27mm_Horizontal -Through hole angled pin header, 1x24, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x24 1.27mm single row -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_1x24_P1.27mm_Vertical -Through hole straight pin header, 1x24, 1.27mm pitch, single row -Through hole pin header THT 1x24 1.27mm single row -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_1x24_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x24, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x24 1.27mm single row style1 pin1 left -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_1x24_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x24, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x24 1.27mm single row style2 pin1 right -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_1x25_P1.27mm_Horizontal -Through hole angled pin header, 1x25, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x25 1.27mm single row -0 -25 -25 -Connector_PinHeader_1.27mm -PinHeader_1x25_P1.27mm_Vertical -Through hole straight pin header, 1x25, 1.27mm pitch, single row -Through hole pin header THT 1x25 1.27mm single row -0 -25 -25 -Connector_PinHeader_1.27mm -PinHeader_1x25_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x25, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x25 1.27mm single row style1 pin1 left -0 -25 -25 -Connector_PinHeader_1.27mm -PinHeader_1x25_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x25, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x25 1.27mm single row style2 pin1 right -0 -25 -25 -Connector_PinHeader_1.27mm -PinHeader_1x26_P1.27mm_Horizontal -Through hole angled pin header, 1x26, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x26 1.27mm single row -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_1x26_P1.27mm_Vertical -Through hole straight pin header, 1x26, 1.27mm pitch, single row -Through hole pin header THT 1x26 1.27mm single row -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_1x26_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x26, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x26 1.27mm single row style1 pin1 left -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_1x26_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x26, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x26 1.27mm single row style2 pin1 right -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_1x27_P1.27mm_Horizontal -Through hole angled pin header, 1x27, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x27 1.27mm single row -0 -27 -27 -Connector_PinHeader_1.27mm -PinHeader_1x27_P1.27mm_Vertical -Through hole straight pin header, 1x27, 1.27mm pitch, single row -Through hole pin header THT 1x27 1.27mm single row -0 -27 -27 -Connector_PinHeader_1.27mm -PinHeader_1x27_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x27, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x27 1.27mm single row style1 pin1 left -0 -27 -27 -Connector_PinHeader_1.27mm -PinHeader_1x27_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x27, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x27 1.27mm single row style2 pin1 right -0 -27 -27 -Connector_PinHeader_1.27mm -PinHeader_1x28_P1.27mm_Horizontal -Through hole angled pin header, 1x28, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x28 1.27mm single row -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_1x28_P1.27mm_Vertical -Through hole straight pin header, 1x28, 1.27mm pitch, single row -Through hole pin header THT 1x28 1.27mm single row -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_1x28_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x28, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x28 1.27mm single row style1 pin1 left -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_1x28_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x28, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x28 1.27mm single row style2 pin1 right -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_1x29_P1.27mm_Horizontal -Through hole angled pin header, 1x29, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x29 1.27mm single row -0 -29 -29 -Connector_PinHeader_1.27mm -PinHeader_1x29_P1.27mm_Vertical -Through hole straight pin header, 1x29, 1.27mm pitch, single row -Through hole pin header THT 1x29 1.27mm single row -0 -29 -29 -Connector_PinHeader_1.27mm -PinHeader_1x29_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x29, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x29 1.27mm single row style1 pin1 left -0 -29 -29 -Connector_PinHeader_1.27mm -PinHeader_1x29_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x29, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x29 1.27mm single row style2 pin1 right -0 -29 -29 -Connector_PinHeader_1.27mm -PinHeader_1x30_P1.27mm_Horizontal -Through hole angled pin header, 1x30, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x30 1.27mm single row -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_1x30_P1.27mm_Vertical -Through hole straight pin header, 1x30, 1.27mm pitch, single row -Through hole pin header THT 1x30 1.27mm single row -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_1x30_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x30, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x30 1.27mm single row style1 pin1 left -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_1x30_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x30, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x30 1.27mm single row style2 pin1 right -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_1x31_P1.27mm_Horizontal -Through hole angled pin header, 1x31, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x31 1.27mm single row -0 -31 -31 -Connector_PinHeader_1.27mm -PinHeader_1x31_P1.27mm_Vertical -Through hole straight pin header, 1x31, 1.27mm pitch, single row -Through hole pin header THT 1x31 1.27mm single row -0 -31 -31 -Connector_PinHeader_1.27mm -PinHeader_1x31_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x31, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x31 1.27mm single row style1 pin1 left -0 -31 -31 -Connector_PinHeader_1.27mm -PinHeader_1x31_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x31, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x31 1.27mm single row style2 pin1 right -0 -31 -31 -Connector_PinHeader_1.27mm -PinHeader_1x32_P1.27mm_Horizontal -Through hole angled pin header, 1x32, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x32 1.27mm single row -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_1x32_P1.27mm_Vertical -Through hole straight pin header, 1x32, 1.27mm pitch, single row -Through hole pin header THT 1x32 1.27mm single row -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_1x32_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x32, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x32 1.27mm single row style1 pin1 left -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_1x32_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x32, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x32 1.27mm single row style2 pin1 right -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_1x33_P1.27mm_Horizontal -Through hole angled pin header, 1x33, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x33 1.27mm single row -0 -33 -33 -Connector_PinHeader_1.27mm -PinHeader_1x33_P1.27mm_Vertical -Through hole straight pin header, 1x33, 1.27mm pitch, single row -Through hole pin header THT 1x33 1.27mm single row -0 -33 -33 -Connector_PinHeader_1.27mm -PinHeader_1x33_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x33, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x33 1.27mm single row style1 pin1 left -0 -33 -33 -Connector_PinHeader_1.27mm -PinHeader_1x33_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x33, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x33 1.27mm single row style2 pin1 right -0 -33 -33 -Connector_PinHeader_1.27mm -PinHeader_1x34_P1.27mm_Horizontal -Through hole angled pin header, 1x34, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x34 1.27mm single row -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_1x34_P1.27mm_Vertical -Through hole straight pin header, 1x34, 1.27mm pitch, single row -Through hole pin header THT 1x34 1.27mm single row -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_1x34_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x34, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x34 1.27mm single row style1 pin1 left -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_1x34_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x34, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x34 1.27mm single row style2 pin1 right -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_1x35_P1.27mm_Horizontal -Through hole angled pin header, 1x35, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x35 1.27mm single row -0 -35 -35 -Connector_PinHeader_1.27mm -PinHeader_1x35_P1.27mm_Vertical -Through hole straight pin header, 1x35, 1.27mm pitch, single row -Through hole pin header THT 1x35 1.27mm single row -0 -35 -35 -Connector_PinHeader_1.27mm -PinHeader_1x35_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x35, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x35 1.27mm single row style1 pin1 left -0 -35 -35 -Connector_PinHeader_1.27mm -PinHeader_1x35_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x35, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x35 1.27mm single row style2 pin1 right -0 -35 -35 -Connector_PinHeader_1.27mm -PinHeader_1x36_P1.27mm_Horizontal -Through hole angled pin header, 1x36, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x36 1.27mm single row -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_1x36_P1.27mm_Vertical -Through hole straight pin header, 1x36, 1.27mm pitch, single row -Through hole pin header THT 1x36 1.27mm single row -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_1x36_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x36, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x36 1.27mm single row style1 pin1 left -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_1x36_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x36, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x36 1.27mm single row style2 pin1 right -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_1x37_P1.27mm_Horizontal -Through hole angled pin header, 1x37, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x37 1.27mm single row -0 -37 -37 -Connector_PinHeader_1.27mm -PinHeader_1x37_P1.27mm_Vertical -Through hole straight pin header, 1x37, 1.27mm pitch, single row -Through hole pin header THT 1x37 1.27mm single row -0 -37 -37 -Connector_PinHeader_1.27mm -PinHeader_1x37_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x37, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x37 1.27mm single row style1 pin1 left -0 -37 -37 -Connector_PinHeader_1.27mm -PinHeader_1x37_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x37, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x37 1.27mm single row style2 pin1 right -0 -37 -37 -Connector_PinHeader_1.27mm -PinHeader_1x38_P1.27mm_Horizontal -Through hole angled pin header, 1x38, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x38 1.27mm single row -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_1x38_P1.27mm_Vertical -Through hole straight pin header, 1x38, 1.27mm pitch, single row -Through hole pin header THT 1x38 1.27mm single row -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_1x38_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x38, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x38 1.27mm single row style1 pin1 left -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_1x38_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x38, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x38 1.27mm single row style2 pin1 right -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_1x39_P1.27mm_Horizontal -Through hole angled pin header, 1x39, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x39 1.27mm single row -0 -39 -39 -Connector_PinHeader_1.27mm -PinHeader_1x39_P1.27mm_Vertical -Through hole straight pin header, 1x39, 1.27mm pitch, single row -Through hole pin header THT 1x39 1.27mm single row -0 -39 -39 -Connector_PinHeader_1.27mm -PinHeader_1x39_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x39, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x39 1.27mm single row style1 pin1 left -0 -39 -39 -Connector_PinHeader_1.27mm -PinHeader_1x39_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x39, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x39 1.27mm single row style2 pin1 right -0 -39 -39 -Connector_PinHeader_1.27mm -PinHeader_1x40_P1.27mm_Horizontal -Through hole angled pin header, 1x40, 1.27mm pitch, 4.0mm pin length, single row -Through hole angled pin header THT 1x40 1.27mm single row -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_1x40_P1.27mm_Vertical -Through hole straight pin header, 1x40, 1.27mm pitch, single row -Through hole pin header THT 1x40 1.27mm single row -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_1x40_P1.27mm_Vertical_SMD_Pin1Left -surface-mounted straight pin header, 1x40, 1.27mm pitch, single row, style 1 (pin 1 left) -Surface mounted pin header SMD 1x40 1.27mm single row style1 pin1 left -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_1x40_P1.27mm_Vertical_SMD_Pin1Right -surface-mounted straight pin header, 1x40, 1.27mm pitch, single row, style 2 (pin 1 right) -Surface mounted pin header SMD 1x40 1.27mm single row style2 pin1 right -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_2x01_P1.27mm_Horizontal -Through hole angled pin header, 2x01, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x01 1.27mm double row +Inductor_SMD +L_12x12mm_H4.5mm +Choke, SMD, 12x12mm 4.5mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_2x01_P1.27mm_Vertical -Through hole straight pin header, 2x01, 1.27mm pitch, double rows -Through hole pin header THT 2x01 1.27mm double row +Inductor_SMD +L_12x12mm_H6mm +Choke, SMD, 12x12mm 6mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_2x01_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x01, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x01 1.27mm double row +Inductor_SMD +L_12x12mm_H8mm +Choke, SMD, 12x12mm 8mm height +Choke SMD 0 2 2 -Connector_PinHeader_1.27mm -PinHeader_2x02_P1.27mm_Horizontal -Through hole angled pin header, 2x02, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x02 1.27mm double row +Inductor_SMD +L_0201_0603Metric +Inductor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +inductor +0 +4 +2 +Inductor_SMD +L_0201_0603Metric_Pad0.64x0.40mm_HandSolder +Inductor SMD 0201 (0603 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.vishay.com/docs/20052/crcw0201e3.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +4 +2 +Inductor_SMD +L_0402_1005Metric +Inductor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0402_1005Metric_Pad0.77x0.64mm_HandSolder +Inductor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0603_1608Metric +Inductor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0603_1608Metric_Pad1.05x0.95mm_HandSolder +Inductor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0805_2012Metric +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_0805_2012Metric_Pad1.05x1.20mm_HandSolder +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_0805_2012Metric_Pad1.15x1.40mm_HandSolder +Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_01005_0402Metric +Inductor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +inductor +0 +4 +2 +Inductor_SMD +L_01005_0402Metric_Pad0.57x0.30mm_HandSolder +Inductor SMD 01005 (0402 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.vishay.com/docs/20056/crcw01005e3.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +4 +2 +Inductor_SMD +L_1008_2520Metric +Inductor SMD 1008 (2520 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://ecsxtal.com/store/pdf/ECS-MPI2520-SMD-POWER-INDUCTOR.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1008_2520Metric_Pad1.43x2.20mm_HandSolder +Inductor SMD 1008 (2520 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://ecsxtal.com/store/pdf/ECS-MPI2520-SMD-POWER-INDUCTOR.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1206_3216Metric +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1206_3216Metric_Pad1.22x1.90mm_HandSolder +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1206_3216Metric_Pad1.42x1.75mm_HandSolder +Inductor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1210_3225Metric +Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1210_3225Metric_Pad1.42x2.65mm_HandSolder +Inductor SMD 1210 (3225 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1806_4516Metric +Inductor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1806_4516Metric_Pad1.45x1.90mm_HandSolder +Inductor SMD 1806 (4516 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: IPC-SM-782 page 80, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_1812_4532Metric +Inductor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_1812_4532Metric_Pad1.30x3.40mm_HandSolder +Inductor SMD 1812 (4532 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2010_5025Metric +Inductor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2010_5025Metric_Pad1.52x2.65mm_HandSolder +Inductor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_2512_6332Metric +Inductor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor +0 +2 +2 +Inductor_SMD +L_2512_6332Metric_Pad1.52x3.35mm_HandSolder +Inductor SMD 2512 (6332 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator +inductor handsolder +0 +2 +2 +Inductor_SMD +L_Abracon_ASPI-0630LR +smd shielded power inductor https://abracon.com/Magnetics/power/ASPI-0630LR.pdf +inductor abracon smd shielded +0 +2 +2 +Inductor_SMD +L_Abracon_ASPI-3012S +smd shielded power inductor http://www.abracon.com/Magnetics/power/ASPI-3012S.pdf +inductor abracon smd shielded +0 +2 +2 +Inductor_SMD +L_Bourns-SRN1060 +Bourns SRN1060 series SMD inductor https://www.bourns.com/docs/Product-Datasheets/SRN1060.pdf +Bourns SRN1060 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN4018 +Bourns SRN4018 series SMD inductor, https://www.bourns.com/docs/Product-Datasheets/SRN4018.pdf +Bourns SRN4018 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN6028 +Bourns SRN6028 series SMD inductor +Bourns SRN6028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRN8040_8x8.15mm +Bourns SRN8040 series SMD inductor 8x8.15mm, https://www.bourns.com/docs/Product-Datasheets/SRN8040.pdf +Bourns SRN8040 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRR1005 +Bourns SRR1005 series SMD inductor +Bourns SRR1005 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU1028_10.0x10.0mm +Bourns SRU1028 series SMD inductor, https://www.bourns.com/docs/Product-Datasheets/SRU1028.pdf +Bourns SRU1028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU8028_8.0x8.0mm +Bourns SRU8028 series SMD inductor +Bourns SRU8028 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns-SRU8043 +Bourns SRU8043 series SMD inductor +Bourns SRU8043 SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SDR1806 +https://www.bourns.com/docs/Product-Datasheets/SDR1806.pdf +Bourns SDR1806 +0 +2 +2 +Inductor_SMD +L_Bourns_SRF1260 +Inductor, Bourns, SRF1260, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://www.bourns.com/docs/Product-Datasheets/SRF1260.pdf) +Inductor Bourns_SRF1260 0 4 4 -Connector_PinHeader_1.27mm -PinHeader_2x02_P1.27mm_Vertical -Through hole straight pin header, 2x02, 1.27mm pitch, double rows -Through hole pin header THT 2x02 1.27mm double row +Inductor_SMD +L_Bourns_SRN6045TA +http://www.bourns.com/docs/product-datasheets/srn6045ta.pdf +Semi-shielded Power Inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRN8040TA +https://www.bourns.com/docs/product-datasheets/srn8040ta.pdf +Inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP1245A +Bourns SRP1245A series SMD inductor http://www.bourns.com/docs/Product-Datasheets/SRP1245A.pdf +Bourns SRP1245A SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP1770TA_16.9x16.9mm +Bourns SRP1770TA series SMD Inductor http://www.bourns.com/docs/Product-Datasheets/SRP1770TA.pdf +Bourns SRP1770TA series SMD Inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRP2313AA +Bourns SRR1260 series SMD inductor http://www.bourns.com/docs/product-datasheets/srp2313aa.pdf +Bourns SRR1260 SMD inductor +0 +4 +2 +Inductor_SMD +L_Bourns_SRP5030T +Inductor, Bourns, SRP5030T, 5.7mmx5.2mm (Script generated with StandardBox.py) (https://www.bourns.com/data/global/pdfs/SRP5030T.pdf) +Inductor Bourns_SRP5030T +0 +2 +2 +Inductor_SMD +L_Bourns_SRP7028A_7.3x6.6mm +Shielded Power Inductors (https://www.bourns.com/docs/product-datasheets/srp7028a.pdf) +Shielded Inductors Bourns SMD SRP7028A +0 +2 +2 +Inductor_SMD +L_Bourns_SRR1210A +Bourns SRR1210A series SMD inductor https://www.bourns.com/docs/Product-Datasheets/SRR1210A.pdf +Bourns SRR1210A SMD inductor +0 +2 +2 +Inductor_SMD +L_Bourns_SRR1260 +Bourns SRR1260 series SMD inductor http://www.bourns.com/docs/Product-Datasheets/SRR1260.pdf +Bourns SRR1260 SMD inductor +0 +2 +2 +Inductor_SMD +L_Coilcraft_LPS4018 +SMD Inductor Coilcraft LPS4018 https://www.coilcraft.com/pdfs/lps4018.pdf +L Coilcraft LPS4018 +0 +2 +2 +Inductor_SMD +L_Coilcraft_LPS5030 +Shielded Power Inductor SMD, Coilcraft LPS5030, https://www.coilcraft.com/pdfs/lps5030.pdf, StepUp generated footprint +inductor +0 +2 +2 +Inductor_SMD +L_Coilcraft_XAL60xx_6.36x6.56mm +Coilcraft XAL60xx series, https://www.coilcraft.com/pdfs/xal60xx.pdf +L Coilcraft XAL60xx +0 +2 +2 +Inductor_SMD +L_Coilcraft_XAL5030 +L_Coilcraft_XAL5030 +L Coilcraft XAL5030 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4020 +L_Coilcraft_XxL4020 https://www.coilcraft.com/pdfs/xfl4020.pdf +L Coilcraft XxL4020 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4030 +L_Coilcraft_XxL4030 https://www.coilcraft.com/pdfs/xfl4030.pdf +L Coilcraft XxL4030 +0 +2 +2 +Inductor_SMD +L_Coilcraft_XxL4040 +L_Coilcraft_XxL4040 https://www.coilcraft.com/pdfs/xal4000.pdf +L Coilcraft XxL4040 +0 +2 +2 +Inductor_SMD +L_CommonModeChoke_Coilcraft_0603USB +Coilcraft 0603USB Series Common Mode Choke, https://www.coilcraft.com/pdfs/0603usb.pdf +surface mount common mode bead 0 4 4 -Connector_PinHeader_1.27mm -PinHeader_2x02_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x02, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x02 1.27mm double row +Inductor_SMD +L_CommonModeChoke_Coilcraft_0805USB +Coilcraft 0805USB Series Common Mode Choke, https://www.coilcraft.com/pdfs/0805usb.pdf +surface mount common mode bead 0 4 4 -Connector_PinHeader_1.27mm -PinHeader_2x03_P1.27mm_Horizontal -Through hole angled pin header, 2x03, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x03 1.27mm double row -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_2x03_P1.27mm_Vertical -Through hole straight pin header, 2x03, 1.27mm pitch, double rows -Through hole pin header THT 2x03 1.27mm double row -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_2x03_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x03, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x03 1.27mm double row -0 -6 -6 -Connector_PinHeader_1.27mm -PinHeader_2x04_P1.27mm_Horizontal -Through hole angled pin header, 2x04, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x04 1.27mm double row -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_2x04_P1.27mm_Vertical -Through hole straight pin header, 2x04, 1.27mm pitch, double rows -Through hole pin header THT 2x04 1.27mm double row -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_2x04_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x04, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x04 1.27mm double row -0 -8 -8 -Connector_PinHeader_1.27mm -PinHeader_2x05_P1.27mm_Horizontal -Through hole angled pin header, 2x05, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x05 1.27mm double row -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_2x05_P1.27mm_Vertical -Through hole straight pin header, 2x05, 1.27mm pitch, double rows -Through hole pin header THT 2x05 1.27mm double row -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_2x05_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x05, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x05 1.27mm double row -0 -10 -10 -Connector_PinHeader_1.27mm -PinHeader_2x06_P1.27mm_Horizontal -Through hole angled pin header, 2x06, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x06 1.27mm double row -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_2x06_P1.27mm_Vertical -Through hole straight pin header, 2x06, 1.27mm pitch, double rows -Through hole pin header THT 2x06 1.27mm double row -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_2x06_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x06, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x06 1.27mm double row -0 -12 -12 -Connector_PinHeader_1.27mm -PinHeader_2x07_P1.27mm_Horizontal -Through hole angled pin header, 2x07, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x07 1.27mm double row -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_2x07_P1.27mm_Vertical -Through hole straight pin header, 2x07, 1.27mm pitch, double rows -Through hole pin header THT 2x07 1.27mm double row -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_2x07_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x07, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x07 1.27mm double row -0 -14 -14 -Connector_PinHeader_1.27mm -PinHeader_2x08_P1.27mm_Horizontal -Through hole angled pin header, 2x08, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x08 1.27mm double row -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_2x08_P1.27mm_Vertical -Through hole straight pin header, 2x08, 1.27mm pitch, double rows -Through hole pin header THT 2x08 1.27mm double row -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_2x08_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x08, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x08 1.27mm double row -0 -16 -16 -Connector_PinHeader_1.27mm -PinHeader_2x09_P1.27mm_Horizontal -Through hole angled pin header, 2x09, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x09 1.27mm double row -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_2x09_P1.27mm_Vertical -Through hole straight pin header, 2x09, 1.27mm pitch, double rows -Through hole pin header THT 2x09 1.27mm double row -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_2x09_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x09, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x09 1.27mm double row -0 -18 -18 -Connector_PinHeader_1.27mm -PinHeader_2x10_P1.27mm_Horizontal -Through hole angled pin header, 2x10, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x10 1.27mm double row -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_2x10_P1.27mm_Vertical -Through hole straight pin header, 2x10, 1.27mm pitch, double rows -Through hole pin header THT 2x10 1.27mm double row -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_2x10_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x10, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x10 1.27mm double row -0 -20 -20 -Connector_PinHeader_1.27mm -PinHeader_2x11_P1.27mm_Horizontal -Through hole angled pin header, 2x11, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x11 1.27mm double row -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_2x11_P1.27mm_Vertical -Through hole straight pin header, 2x11, 1.27mm pitch, double rows -Through hole pin header THT 2x11 1.27mm double row -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_2x11_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x11, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x11 1.27mm double row -0 -22 -22 -Connector_PinHeader_1.27mm -PinHeader_2x12_P1.27mm_Horizontal -Through hole angled pin header, 2x12, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x12 1.27mm double row -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_2x12_P1.27mm_Vertical -Through hole straight pin header, 2x12, 1.27mm pitch, double rows -Through hole pin header THT 2x12 1.27mm double row -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_2x12_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x12, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x12 1.27mm double row -0 -24 -24 -Connector_PinHeader_1.27mm -PinHeader_2x13_P1.27mm_Horizontal -Through hole angled pin header, 2x13, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x13 1.27mm double row -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_2x13_P1.27mm_Vertical -Through hole straight pin header, 2x13, 1.27mm pitch, double rows -Through hole pin header THT 2x13 1.27mm double row -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_2x13_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x13, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x13 1.27mm double row -0 -26 -26 -Connector_PinHeader_1.27mm -PinHeader_2x14_P1.27mm_Horizontal -Through hole angled pin header, 2x14, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x14 1.27mm double row -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_2x14_P1.27mm_Vertical -Through hole straight pin header, 2x14, 1.27mm pitch, double rows -Through hole pin header THT 2x14 1.27mm double row -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_2x14_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x14, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x14 1.27mm double row -0 -28 -28 -Connector_PinHeader_1.27mm -PinHeader_2x15_P1.27mm_Horizontal -Through hole angled pin header, 2x15, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x15 1.27mm double row -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_2x15_P1.27mm_Vertical -Through hole straight pin header, 2x15, 1.27mm pitch, double rows -Through hole pin header THT 2x15 1.27mm double row -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_2x15_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x15, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x15 1.27mm double row -0 -30 -30 -Connector_PinHeader_1.27mm -PinHeader_2x16_P1.27mm_Horizontal -Through hole angled pin header, 2x16, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x16 1.27mm double row -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_2x16_P1.27mm_Vertical -Through hole straight pin header, 2x16, 1.27mm pitch, double rows -Through hole pin header THT 2x16 1.27mm double row -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_2x16_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x16, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x16 1.27mm double row -0 -32 -32 -Connector_PinHeader_1.27mm -PinHeader_2x17_P1.27mm_Horizontal -Through hole angled pin header, 2x17, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x17 1.27mm double row -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_2x17_P1.27mm_Vertical -Through hole straight pin header, 2x17, 1.27mm pitch, double rows -Through hole pin header THT 2x17 1.27mm double row -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_2x17_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x17, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x17 1.27mm double row -0 -34 -34 -Connector_PinHeader_1.27mm -PinHeader_2x18_P1.27mm_Horizontal -Through hole angled pin header, 2x18, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x18 1.27mm double row -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_2x18_P1.27mm_Vertical -Through hole straight pin header, 2x18, 1.27mm pitch, double rows -Through hole pin header THT 2x18 1.27mm double row -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_2x18_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x18, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x18 1.27mm double row -0 -36 -36 -Connector_PinHeader_1.27mm -PinHeader_2x19_P1.27mm_Horizontal -Through hole angled pin header, 2x19, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x19 1.27mm double row -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_2x19_P1.27mm_Vertical -Through hole straight pin header, 2x19, 1.27mm pitch, double rows -Through hole pin header THT 2x19 1.27mm double row -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_2x19_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x19, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x19 1.27mm double row -0 -38 -38 -Connector_PinHeader_1.27mm -PinHeader_2x20_P1.27mm_Horizontal -Through hole angled pin header, 2x20, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x20 1.27mm double row -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_2x20_P1.27mm_Vertical -Through hole straight pin header, 2x20, 1.27mm pitch, double rows -Through hole pin header THT 2x20 1.27mm double row -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_2x20_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x20, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x20 1.27mm double row -0 -40 -40 -Connector_PinHeader_1.27mm -PinHeader_2x21_P1.27mm_Horizontal -Through hole angled pin header, 2x21, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x21 1.27mm double row -0 -42 -42 -Connector_PinHeader_1.27mm -PinHeader_2x21_P1.27mm_Vertical -Through hole straight pin header, 2x21, 1.27mm pitch, double rows -Through hole pin header THT 2x21 1.27mm double row -0 -42 -42 -Connector_PinHeader_1.27mm -PinHeader_2x21_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x21, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x21 1.27mm double row -0 -42 -42 -Connector_PinHeader_1.27mm -PinHeader_2x22_P1.27mm_Horizontal -Through hole angled pin header, 2x22, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x22 1.27mm double row -0 -44 -44 -Connector_PinHeader_1.27mm -PinHeader_2x22_P1.27mm_Vertical -Through hole straight pin header, 2x22, 1.27mm pitch, double rows -Through hole pin header THT 2x22 1.27mm double row -0 -44 -44 -Connector_PinHeader_1.27mm -PinHeader_2x22_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x22, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x22 1.27mm double row -0 -44 -44 -Connector_PinHeader_1.27mm -PinHeader_2x23_P1.27mm_Horizontal -Through hole angled pin header, 2x23, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x23 1.27mm double row -0 -46 -46 -Connector_PinHeader_1.27mm -PinHeader_2x23_P1.27mm_Vertical -Through hole straight pin header, 2x23, 1.27mm pitch, double rows -Through hole pin header THT 2x23 1.27mm double row -0 -46 -46 -Connector_PinHeader_1.27mm -PinHeader_2x23_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x23, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x23 1.27mm double row -0 -46 -46 -Connector_PinHeader_1.27mm -PinHeader_2x24_P1.27mm_Horizontal -Through hole angled pin header, 2x24, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x24 1.27mm double row -0 -48 -48 -Connector_PinHeader_1.27mm -PinHeader_2x24_P1.27mm_Vertical -Through hole straight pin header, 2x24, 1.27mm pitch, double rows -Through hole pin header THT 2x24 1.27mm double row -0 -48 -48 -Connector_PinHeader_1.27mm -PinHeader_2x24_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x24, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x24 1.27mm double row -0 -48 -48 -Connector_PinHeader_1.27mm -PinHeader_2x25_P1.27mm_Horizontal -Through hole angled pin header, 2x25, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x25 1.27mm double row -0 -50 -50 -Connector_PinHeader_1.27mm -PinHeader_2x25_P1.27mm_Vertical -Through hole straight pin header, 2x25, 1.27mm pitch, double rows -Through hole pin header THT 2x25 1.27mm double row -0 -50 -50 -Connector_PinHeader_1.27mm -PinHeader_2x25_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x25, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x25 1.27mm double row -0 -50 -50 -Connector_PinHeader_1.27mm -PinHeader_2x26_P1.27mm_Horizontal -Through hole angled pin header, 2x26, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x26 1.27mm double row -0 -52 -52 -Connector_PinHeader_1.27mm -PinHeader_2x26_P1.27mm_Vertical -Through hole straight pin header, 2x26, 1.27mm pitch, double rows -Through hole pin header THT 2x26 1.27mm double row -0 -52 -52 -Connector_PinHeader_1.27mm -PinHeader_2x26_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x26, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x26 1.27mm double row -0 -52 -52 -Connector_PinHeader_1.27mm -PinHeader_2x27_P1.27mm_Horizontal -Through hole angled pin header, 2x27, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x27 1.27mm double row -0 -54 -54 -Connector_PinHeader_1.27mm -PinHeader_2x27_P1.27mm_Vertical -Through hole straight pin header, 2x27, 1.27mm pitch, double rows -Through hole pin header THT 2x27 1.27mm double row -0 -54 -54 -Connector_PinHeader_1.27mm -PinHeader_2x27_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x27, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x27 1.27mm double row -0 -54 -54 -Connector_PinHeader_1.27mm -PinHeader_2x28_P1.27mm_Horizontal -Through hole angled pin header, 2x28, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x28 1.27mm double row -0 -56 -56 -Connector_PinHeader_1.27mm -PinHeader_2x28_P1.27mm_Vertical -Through hole straight pin header, 2x28, 1.27mm pitch, double rows -Through hole pin header THT 2x28 1.27mm double row -0 -56 -56 -Connector_PinHeader_1.27mm -PinHeader_2x28_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x28, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x28 1.27mm double row -0 -56 -56 -Connector_PinHeader_1.27mm -PinHeader_2x29_P1.27mm_Horizontal -Through hole angled pin header, 2x29, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x29 1.27mm double row -0 -58 -58 -Connector_PinHeader_1.27mm -PinHeader_2x29_P1.27mm_Vertical -Through hole straight pin header, 2x29, 1.27mm pitch, double rows -Through hole pin header THT 2x29 1.27mm double row -0 -58 -58 -Connector_PinHeader_1.27mm -PinHeader_2x29_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x29, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x29 1.27mm double row -0 -58 -58 -Connector_PinHeader_1.27mm -PinHeader_2x30_P1.27mm_Horizontal -Through hole angled pin header, 2x30, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x30 1.27mm double row -0 -60 -60 -Connector_PinHeader_1.27mm -PinHeader_2x30_P1.27mm_Vertical -Through hole straight pin header, 2x30, 1.27mm pitch, double rows -Through hole pin header THT 2x30 1.27mm double row -0 -60 -60 -Connector_PinHeader_1.27mm -PinHeader_2x30_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x30, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x30 1.27mm double row -0 -60 -60 -Connector_PinHeader_1.27mm -PinHeader_2x31_P1.27mm_Horizontal -Through hole angled pin header, 2x31, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x31 1.27mm double row -0 -62 -62 -Connector_PinHeader_1.27mm -PinHeader_2x31_P1.27mm_Vertical -Through hole straight pin header, 2x31, 1.27mm pitch, double rows -Through hole pin header THT 2x31 1.27mm double row -0 -62 -62 -Connector_PinHeader_1.27mm -PinHeader_2x31_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x31, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x31 1.27mm double row -0 -62 -62 -Connector_PinHeader_1.27mm -PinHeader_2x32_P1.27mm_Horizontal -Through hole angled pin header, 2x32, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x32 1.27mm double row -0 -64 -64 -Connector_PinHeader_1.27mm -PinHeader_2x32_P1.27mm_Vertical -Through hole straight pin header, 2x32, 1.27mm pitch, double rows -Through hole pin header THT 2x32 1.27mm double row -0 -64 -64 -Connector_PinHeader_1.27mm -PinHeader_2x32_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x32, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x32 1.27mm double row -0 -64 -64 -Connector_PinHeader_1.27mm -PinHeader_2x33_P1.27mm_Horizontal -Through hole angled pin header, 2x33, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x33 1.27mm double row -0 -66 -66 -Connector_PinHeader_1.27mm -PinHeader_2x33_P1.27mm_Vertical -Through hole straight pin header, 2x33, 1.27mm pitch, double rows -Through hole pin header THT 2x33 1.27mm double row -0 -66 -66 -Connector_PinHeader_1.27mm -PinHeader_2x33_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x33, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x33 1.27mm double row -0 -66 -66 -Connector_PinHeader_1.27mm -PinHeader_2x34_P1.27mm_Horizontal -Through hole angled pin header, 2x34, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x34 1.27mm double row -0 -68 -68 -Connector_PinHeader_1.27mm -PinHeader_2x34_P1.27mm_Vertical -Through hole straight pin header, 2x34, 1.27mm pitch, double rows -Through hole pin header THT 2x34 1.27mm double row -0 -68 -68 -Connector_PinHeader_1.27mm -PinHeader_2x34_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x34, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x34 1.27mm double row -0 -68 -68 -Connector_PinHeader_1.27mm -PinHeader_2x35_P1.27mm_Horizontal -Through hole angled pin header, 2x35, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x35 1.27mm double row -0 -70 -70 -Connector_PinHeader_1.27mm -PinHeader_2x35_P1.27mm_Vertical -Through hole straight pin header, 2x35, 1.27mm pitch, double rows -Through hole pin header THT 2x35 1.27mm double row -0 -70 -70 -Connector_PinHeader_1.27mm -PinHeader_2x35_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x35, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x35 1.27mm double row -0 -70 -70 -Connector_PinHeader_1.27mm -PinHeader_2x36_P1.27mm_Horizontal -Through hole angled pin header, 2x36, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x36 1.27mm double row -0 -72 -72 -Connector_PinHeader_1.27mm -PinHeader_2x36_P1.27mm_Vertical -Through hole straight pin header, 2x36, 1.27mm pitch, double rows -Through hole pin header THT 2x36 1.27mm double row -0 -72 -72 -Connector_PinHeader_1.27mm -PinHeader_2x36_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x36, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x36 1.27mm double row -0 -72 -72 -Connector_PinHeader_1.27mm -PinHeader_2x37_P1.27mm_Horizontal -Through hole angled pin header, 2x37, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x37 1.27mm double row -0 -74 -74 -Connector_PinHeader_1.27mm -PinHeader_2x37_P1.27mm_Vertical -Through hole straight pin header, 2x37, 1.27mm pitch, double rows -Through hole pin header THT 2x37 1.27mm double row -0 -74 -74 -Connector_PinHeader_1.27mm -PinHeader_2x37_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x37, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x37 1.27mm double row -0 -74 -74 -Connector_PinHeader_1.27mm -PinHeader_2x38_P1.27mm_Horizontal -Through hole angled pin header, 2x38, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x38 1.27mm double row -0 -76 -76 -Connector_PinHeader_1.27mm -PinHeader_2x38_P1.27mm_Vertical -Through hole straight pin header, 2x38, 1.27mm pitch, double rows -Through hole pin header THT 2x38 1.27mm double row -0 -76 -76 -Connector_PinHeader_1.27mm -PinHeader_2x38_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x38, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x38 1.27mm double row -0 -76 -76 -Connector_PinHeader_1.27mm -PinHeader_2x39_P1.27mm_Horizontal -Through hole angled pin header, 2x39, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x39 1.27mm double row -0 -78 -78 -Connector_PinHeader_1.27mm -PinHeader_2x39_P1.27mm_Vertical -Through hole straight pin header, 2x39, 1.27mm pitch, double rows -Through hole pin header THT 2x39 1.27mm double row -0 -78 -78 -Connector_PinHeader_1.27mm -PinHeader_2x39_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x39, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x39 1.27mm double row -0 -78 -78 -Connector_PinHeader_1.27mm -PinHeader_2x40_P1.27mm_Horizontal -Through hole angled pin header, 2x40, 1.27mm pitch, 4.0mm pin length, double rows -Through hole angled pin header THT 2x40 1.27mm double row -0 -80 -80 -Connector_PinHeader_1.27mm -PinHeader_2x40_P1.27mm_Vertical -Through hole straight pin header, 2x40, 1.27mm pitch, double rows -Through hole pin header THT 2x40 1.27mm double row -0 -80 -80 -Connector_PinHeader_1.27mm -PinHeader_2x40_P1.27mm_Vertical_SMD -surface-mounted straight pin header, 2x40, 1.27mm pitch, double rows -Surface mounted pin header SMD 2x40 1.27mm double row -0 -80 -80 +Inductor_SMD +L_CommonModeChoke_Coilcraft_1812CAN +Coilcraft 1812CAN Series Common Mode Choke, https://www.coilcraft.com/pdfs/1812can.pdf +surface mount common mode bead +0 +4 +4 +Inductor_SMD +L_CommonModeChoke_Wuerth_WE-SL5 +WE-SL5 SMT Common Mode Line Filter, https://www.we-online.de/katalog/en/WE-SL5/, https://www.we-online.de/katalog/datasheet/744272471.pdf +SMT Common Mode Line Filter +0 +4 +4 +Inductor_SMD +L_CommonMode_Delevan_4222 +API Delevan, Surface Mount Common Mode Bead, 4222 4222R, http://www.delevan.com/seriesPDFs/4222.pdf +surface mount common mode bead +0 +4 +4 +Inductor_SMD +L_CommonMode_Wuerth_WE-SL2 +http://katalog.we-online.de/en/pbs/WE-SL2?sid=5fbec16187#vs_t1:c1_ct:1 +Wuerth WE-SL2 +0 +4 +4 +Inductor_SMD +L_Fastron_PISN +Choke, Drossel, PISN, SMD, Fastron, +Choke Drossel PISN SMD Fastron +0 +2 +2 +Inductor_SMD +L_Fastron_PISN_Handsoldering +Choke, Drossel, PISN, SMD, Fastron, +Choke Drossel PISN SMD Fastron +0 +2 +2 +Inductor_SMD +L_Fastron_PISR +Choke, Drossel, PISR, Fastron, SMD, +Choke Drossel PISR Fastron SMD +0 +2 +2 +Inductor_SMD +L_Fastron_PISR_Handsoldering +Choke, Drossel, PISR, Fastron, SMD, +Choke Drossel PISR Fastron SMD +0 +2 +2 +Inductor_SMD +L_Murata_DEM35xxC +https://www.murata.com/~/media/webrenewal/products/inductor/chip/tokoproducts/wirewoundferritetypeforpl/m_dem3518c.ashx +Inductor SMD DEM35xxC +0 +2 +2 +Inductor_SMD +L_Murata_LQH2MCNxxxx02_2.0x1.6mm +Inductor, Murata, LQH2MCN_02 series, 1.6x2.0x0.9mm (https://search.murata.co.jp/Ceramy/image/img/P02/JELF243A-0053.pdf) +chip coil inductor Murata LQH2MC +0 +2 +2 +Inductor_SMD +L_Murata_LQH55DN_5.7x5.0mm +Inductor, SMD, 5.7x5.0x4.7mm, https://search.murata.co.jp/Ceramy/image/img/P02/JELF243A-0045.pdf +inductor smd +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_1turn_HDM0131A +Neosid, Air-Coil, SML, 1turn, HDM0131A, +Neosid Air-Coil SML 1turn HDM0131A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_2turn_HAM0231A +Neosid, Air-Coil, SML, 2turn, HAM0231A, +Neosid Air-Coil SML 2turn HAM0231A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_2turn_HDM0231A +Neosid, Air-Coil, SML, 2turn, HDM0231A, +Neosid Air-Coil SML 2turn HDM0231A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_3turn_HAM0331A +Neosid, Air-Coil, SML, 2turn, HAM0331A, +Neosid Air-Coil SML 3turn HAM0331A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_3turn_HDM0331A +Neosid, Air-Coil, SML, 3turn, HDM0331A, +Neosid Air-Coil SML 3turn HDM0331A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_4turn_HAM0431A +Neosid, Air-Coil, SML, 4turn, HAM0431A, +Neosid Air-Coil SML 4turn HAM0431A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_4turn_HDM0431A +Neosid, Air-Coil, SML, 4turn, HDM0431A, +Neosid Air-Coil SML 4turn HDM0431A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_5turn_HAM0531A +Neosid, Air-Coil, SML, 5turn, HAM0531A, +Neosid Air-Coil SML 5turn HAM0531A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_5turn_HDM0531A +Neosid, Air-Coil, SML, 5turn, HDM0531A, +Neosid Air-Coil SML 5turn HDM0531A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6-10turn_HAM0631A-HAM1031A +Neosid, Air-Coil, SML, 6-10turn, HAM0631A-HAM1031A, +Neosid Air-Coil SML 6-10turn HAM0631A-HAM1031A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6-10turn_HDM0431A-HDM1031A +Neosid, Air-Coil, SML, 6-10turn, HDM0431A-HDM1031A, +Neosid Air-Coil SML 6-10turn HDM0431A-HDM1031A +0 +2 +2 +Inductor_SMD +L_Neosid_Air-Coil_SML_6turn_HAM0631A +Neosid, Air-Coil, SML, 6turn, HAM0631A, +Neosid Air-Coil SML 6turn HAM0631A +0 +2 +2 +Inductor_SMD +L_Neosid_MicroCoil_Ms36-L +Neosid, Micro Coil, Inductor, Ms36-L, SMD, Fixed inductor, anti clockwise, https://neosid.de/en/products/inductors/rod-core-chokes/smd-rod-core-chokes/52026/ms-36/7-h?c=94 +Neosid Micro Coil Inductor Ms36-L SMD Fixed inductor anti clockwise +0 +2 +2 +Inductor_SMD +L_Neosid_Ms42 +Neosid, Inductor, SMs42, Fixed inductor, SMD, magneticaly shielded, https://neosid.de/import-data/product-pdf/neoFestind_Ms42.pdf +Neosid Inductor SMs42 Fixed inductor SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_Ms50 +Neosid, Power Inductor, Ms50, SMD, Fixed inductor, https://neosid.de/import-data/product-pdf/neoFestind_Ms50.pdf +Neosid Power Inductor Ms50 SMD Fixed inductor +0 +2 +2 +Inductor_SMD +L_Neosid_Ms50T +Neosid, Power Inductor, Ms50T, SMD, Fixed inductor, high temperature, https://neosid.de/import-data/product-pdf/neoFestind_Ms50T.pdf +Neosid Power Inductor Ms50T SMD Fixed inductor high temperature +0 +2 +2 +Inductor_SMD +L_Neosid_Ms85 +Neosid, Ms85, Ms85T, SMD Inductor, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms85.pdf +Neosid Ms85 Ms85T SMD Inductor Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms85T +Neosid, Ms85, Ms85T, SMD Inductor, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms85T.pdf +Neosid Ms85 Ms85T SMD Inductor Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95 +Neosid,Inductor,Ms95, Ms95a, Ms95T, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms95.pdf +NeosidInductorMs95 Ms95a Ms95T Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95T +Neosid,Inductor,Ms95, Ms95a, Ms95T, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms95T.pdf +NeosidInductorMs95 Ms95a Ms95T Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_Ms95a +Neosid,Inductor,Ms95, Ms95a, Ms95T, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_Ms95a.pdf +NeosidInductorMs95 Ms95a Ms95T Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE95H +Neosid, Inductor,SM-NE95H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE95H.pdf +Neosid Inductor SM-NE95H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE127 +Neosid, Inductor, SM-NE127, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE127.pdf +Neosid Inductor SM-NE127 Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE127_HandSoldering +Neosid, Inductor, SM-NE127, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE127.pdf +Neosid Inductor SM-NE127 Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-NE150 +Neosid, Inductor, SM-NE150, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMNE150.pdf +Neosid Inductor SM-NE150 Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0512H +Neosid, Inductor, PIC0512H, Power Inductor, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC0512H.pdf +Neosid Inductor PIC0512H Power Inductor Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0602H +Neosid, Power Inductor, SM-PIC0602H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC0602H.pdf +Neosid Power Inductor SM-PIC0602H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC0612H +Neosid, Power Inductor, SM-PIC0612H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC0612H.pdf +Neosid Power Inductor SM-PIC0612H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SM-PIC1004H +Neosid, Inductor, SM-PIC1004H, Fixed inductor, SMD, https://neosid.de/import-data/product-pdf/neoFestind_SMPIC1004H.pdf +Neosid Inductor SM-PIC1004H Fixed inductor SMD +0 +2 +2 +Inductor_SMD +L_Neosid_SMS-ME3010 +Neosid, Inductor, SMS-ME3010, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_SMSME3010.pdf +Neosid Inductor SMS-ME3010 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMS-ME3015 +Neosid, Power Inductor, SMS-ME3015, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_SMSME3015.pdf +Neosid Power Inductor SMS-ME3015 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs42 +Neosid, Inductor, SMs42, Fixed inductor, SMD, magneticaly shielded, https://neosid.de/import-data/product-pdf/neoFestind_ma_SMs42.pdf +Neosid Inductor SMs42 Fixed inductor SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs50 +Neosid, Inductor, SMs50, Fixed inductor, SMD, magneticaly shielded, https://neosid.de/import-data/product-pdf/neoFestind_ma_SMs50.pdf +Neosid Inductor SMs50 Fixed inductor SMD magneticaly shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs85 +Neosid, Inductor, SMs85, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_ma_SMs85.pdf +Neosid Inductor SMs85 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Neosid_SMs95_SMs95p +Neosid, Inductor, SMs95, Fixed inductor, SMD, magnetically shielded, https://neosid.de/import-data/product-pdf/neoFestind_SMs95SMs95p.pdf +Neosid Inductor SMs95 Fixed inductor SMD magnetically shielded +0 +2 +2 +Inductor_SMD +L_Pulse_PA4320 +Inductor SMD Pulse PA4320 http://productfinder.pulseeng.com/products/datasheets/P787.pdf +Inductor SMD Pulse PA4320 +0 +2 +2 +Inductor_SMD +L_Pulse_PA4344 +Pulse PA4344 / PM4344 Series SMD Inductors https://productfinder.pulseelectronics.com/api/public/uploads/product-attachments/datasheet_p771_1608107700.pdf +Pulse PA4344 PM4344 Series SMD Inductors +0 +2 +2 +Inductor_SMD +L_Sagami_CER1242B +Inductor, Sagami, h=4.5mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CER1257B +Inductor, Sagami, h=6.0mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CER1277B +Inductor, Sagami, h=8.0mm, http://www.sagami-elec.co.jp/file/CER1242B-CER1257B-CER1277B.pdf +inductor sagami cer12xxb smd +0 +2 +2 +Inductor_SMD +L_Sagami_CWR1242C +Sagami power inductor, CWR1242C, H=4.5mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_Sagami_CWR1257C +Sagami power inductor, CWR1242C, H=6.0mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_Sagami_CWR1277C +Sagami power inductor, CWR1242C, H=7.7mm (http://www.sagami-elec.co.jp/file/16Car_SMDCwr.pdf) +inductor sagami cwr12xx smd +0 +4 +2 +Inductor_SMD +L_SigTra_SC3316F +http://www.signaltransformer.com/sites/all/pdf/smd/P080_SC3316F.pdf +Choke +0 +2 +2 +Inductor_SMD +L_Sumida_CDMC6D28_7.25x6.5mm +SMD Power Inductor (http://products.sumida.com/products/pdf/CDMC6D28.pdf) +Inductor Sumida SMD CDMC6D28 +0 +2 +2 +Inductor_SMD +L_Sumida_CR75 +Inductor, Sumida, 8.1mm × 7.3mm × 5.5 mm, Unshielded, http://products.sumida.com/products/pdf/CR75.pdf +Inductor SMD CR75 Unshielded +0 +2 +2 +Inductor_SMD +L_Sunlord_MWSA0518_5.4x5.2mm +Inductor, Sunlord, MWSA0518, 5.4mmx5.2mm +inductor Sunlord smd +0 +2 +2 +Inductor_SMD +L_TDK_NLV25_2.5x2.0mm +TDK NLV25, 2.5x2.0x1.8mm, https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_standard_nlv25-ef_en.pdf +tdk nlv25 nlcv25 nlfv25 +0 +2 +2 +Inductor_SMD +L_TDK_NLV32_3.2x2.5mm +TDK NLV32, 3.2x2.5x2.2mm, https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_standard_nlv32-ef_en.pdf +tdk nlv32 nlcv32 nlfv32 +0 +2 +2 +Inductor_SMD +L_TDK_SLF6025 +Inductor, TDK, SLF6025, 6.0mmx6.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6025_en.pdf) +Inductor TDK_SLF6025 +0 +2 +2 +Inductor_SMD +L_TDK_SLF6028 +Inductor, TDK, SLF6028, 6.0mmx6.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6028_en.pdf) +Inductor TDK_SLF6028 +0 +2 +2 +Inductor_SMD +L_TDK_SLF6045 +Inductor, TDK, SLF6045, 6.0mmx6.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6045_en.pdf) +Inductor TDK_SLF6045 +0 +2 +2 +Inductor_SMD +L_TDK_SLF7032 +Inductor, TDK, SLF7032, 7.0mmx7.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7032_en.pdf) +Inductor TDK_SLF7032 +0 +2 +2 +Inductor_SMD +L_TDK_SLF7045 +Inductor, TDK, SLF7045, 7.0mmx7.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7045_en.pdf) +Inductor TDK_SLF7045 +0 +2 +2 +Inductor_SMD +L_TDK_SLF7055 +Inductor, TDK, SLF7055, 7.0mmx7.0mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf7055_en.pdf) +Inductor TDK_SLF7055 +0 +2 +2 +Inductor_SMD +L_TDK_SLF10145 +Inductor, TDK, SLF10145, 10.1mmx10.1mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_automotive_power_slf10145-h_en.pdf) +Inductor TDK_SLF10145 +0 +2 +2 +Inductor_SMD +L_TDK_SLF10165 +Inductor, TDK, SLF10165, 10.1mmx10.1mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_power_slf10165_en.pdf) +Inductor TDK_SLF10165 +0 +2 +2 +Inductor_SMD +L_TDK_SLF12555 +Inductor, TDK, SLF12555, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_commercial_power_slf12555_en.pdf) +Inductor SLF12555 +0 +2 +2 +Inductor_SMD +L_TDK_SLF12565 +Inductor, TDK, SLF12565, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_automotive_power_slf12565-h_en.pdf) +Inductor SLF12565 +0 +2 +2 +Inductor_SMD +L_TDK_SLF12575 +Inductor, TDK, SLF12575, 12.5mmx12.5mm (Script generated with StandardBox.py) (https://product.tdk.com/info/en/catalog/datasheets/inductor_automotive_power_slf12575-h_en.pdf) +Inductor SLF12575 +0 +2 +2 +Inductor_SMD +L_TDK_VLF10040 +Inductor,TDK, TDK-VLP-8040, 8.6mmx8.6mm +inductor TDK VLP smd VLF10040 +0 +2 +2 +Inductor_SMD +L_TDK_VLP8040 +Inductor,TDK, TDK-VLP-8040, 8.6mmx8.6mm +inductor TDK VLP smd VLP8040 +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-1616 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-1616, 1.6mmx1.6mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-2020 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-2020, 2.0mmx2.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-3030 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-3030, 3.0mmx3.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-4040 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-4040, 4.0mmx4.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_MD-5050 +Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-5050, 5.0mmx5.0mm +inductor taiyo-yuden md smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-20xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-20xx, 2.0mmx2.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-20xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-20xx, 2.0mmx2.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-24xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-24xx, 2.4mmx2.4mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-24xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-24xx, 2.4mmx2.4mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-30xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-30xx, 3.0mmx3.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-30xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-30xx, 3.0mmx3.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-40xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-40xx, 4.0mmx4.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-40xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-40xx, 4.0mmx4.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-50xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-50xx, 4.9mmx4.9mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-50xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-50xx, 4.9mmx4.9mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-60xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-60xx, 6.0mmx6.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-60xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-60xx, 6.0mmx6.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-80xx +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-80xx, 8.0mmx8.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-80xx_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-80xx, 8.0mmx8.0mm +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-10050_9.8x10.0mm +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-10050, 9.8mmx10.0mm, https://ds.yuden.co.jp/TYCOMPAS/or/specSheet?pn=NR10050T1R3N +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_Taiyo-Yuden_NR-10050_9.8x10.0mm_HandSoldering +Inductor, Taiyo Yuden, NR series, Taiyo-Yuden_NR-10050, 9.8mmx10.0mm, https://ds.yuden.co.jp/TYCOMPAS/or/specSheet?pn=NR10050T1R3N +inductor taiyo-yuden nr smd +0 +2 +2 +Inductor_SMD +L_TracoPower_TCK-047_5.2x5.8mm +Inductor, Traco, TCK-047, 5.2x5.8mm, https://www.tracopower.com/products/tck047.pdf +inductor smd traco +0 +2 +2 +Inductor_SMD +L_TracoPower_TCK-141 +Choke, SMD, 4.0x4.0mm 2.1mm height, https://www.tracopower.com/products/tck141.pdf +Choke SMD +0 +2 +2 +Inductor_SMD +L_Vishay_IFSC-1515AH_4x4x1.8mm +Low Profile, High Current Inductors (https://www.vishay.com/docs/34295/sc15ah01.pdf) +SMD Vishay Inductor Low Profile +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-1212 +Inductor, Vishay, IHLP series, 3.0mmx3.0mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-1616 +Inductor, Vishay, IHLP series, 4.1mmx4.1mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-2020 +Inductor, Vishay, IHLP series, 5.1mmx5.1mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-2525 +Inductor, Vishay, IHLP series, 6.3mmx6.3mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-4040 +Inductor, Vishay, IHLP series, 10.2mmx10.2mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-5050 +Inductor, Vishay, IHLP series, 12.7mmx12.7mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHLP-6767 +Inductor, Vishay, IHLP series, 17.0mmx17.0mm +inductor vishay ihlp smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-3825 +Inductor, Vishay, Vishay_IHSM-3825, http://www.vishay.com/docs/34018/ihsm3825.pdf, 11.2mmx6.3mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-4825 +Inductor, Vishay, Vishay_IHSM-4825, http://www.vishay.com/docs/34019/ihsm4825.pdf, 13.7mmx6.3mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-5832 +Inductor, Vishay, Vishay_IHSM-5832, http://www.vishay.com/docs/34020/ihsm5832.pdf, 16.3mmx8.1mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Vishay_IHSM-7832 +Inductor, Vishay, Vishay_IHSM-7832, http://www.vishay.com/docs/34021/ihsm7832.pdf, 19.8mmx8.1mm +inductor vishay icsm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1030 +Inductor, Wuerth Elektronik, Wuerth_HCI-1030, 10.6mmx10.6mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1040 +Inductor, Wuerth Elektronik, Wuerth_HCI-1040, 10.2mmx10.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1050 +Inductor, Wuerth Elektronik, Wuerth_HCI-1050, 10.2mmx10.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1335 +Inductor, Wuerth Elektronik, Wuerth_HCI-1335, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1350 +Inductor, Wuerth Elektronik, Wuerth_HCI-1350, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1365 +Inductor, Wuerth Elektronik, Wuerth_HCI-1365, 12.8mmx12.8mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-1890 +Inductor, Wuerth Elektronik, Wuerth_HCI-1890, 18.2mmx18.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-2212 +Inductor, Wuerth Elektronik, Wuerth_HCI-2212, 22.5mmx22.0mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-5040 +Inductor, Wuerth Elektronik, Wuerth_HCI-5040, 5.5mmx5.2mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7030 +Inductor, Wuerth Elektronik, Wuerth_HCI-7030, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7040 +Inductor, Wuerth Elektronik, Wuerth_HCI-7040, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCI-7050 +Inductor, Wuerth Elektronik, Wuerth_HCI-7050, 6.9mmx6.9mm +inductor Wuerth hci smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1050 +Inductor, Wuerth Elektronik, Wuerth_HCM-1050, 10.2mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1052 +Inductor, Wuerth Elektronik, Wuerth_HCM-1052, 10.5mmx10.3mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1070 +Inductor, Wuerth Elektronik, Wuerth_HCM-1070, 10.1mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1078 +Inductor, Wuerth Elektronik, Wuerth_HCM-1078, 9.4mmx6.2mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1190 +Inductor, Wuerth Elektronik, Wuerth_HCM-1190, 10.5mmx11.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1240 +Inductor, Wuerth Elektronik, Wuerth_HCM-1240, 10.0mmx11.8mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1350 +Inductor, Wuerth Elektronik, Wuerth_HCM-1350, 13.5mmx13.3mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-1390 +Inductor, Wuerth Elektronik, Wuerth_HCM-1390, 12.5mmx13.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-7050 +Inductor, Wuerth Elektronik, Wuerth_HCM-7050, 7.2mmx7.0mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_HCM-7070 +Inductor, Wuerth Elektronik, Wuerth_HCM-7070, 7.4mmx7.2mm +inductor Wuerth hcm smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-1610 +Inductor, Wuerth Elektronik, Wuerth_MAPI-1610, 1.6mmx1.6mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2010 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2010, 2.0mmx1.6mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2506 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2506, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2508 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2508, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2510 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2510, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-2512 +Inductor, Wuerth Elektronik, Wuerth_MAPI-2512, 2.5mmx2.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3010 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3010, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3012 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3012, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3015 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3015, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-3020 +Inductor, Wuerth Elektronik, Wuerth_MAPI-3020, 3.0mmx3.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-4020 +Inductor, Wuerth Elektronik, Wuerth_MAPI-4020, 4.0mmx4.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_MAPI-4030 +Inductor, Wuerth Elektronik, Wuerth_MAPI-4030, 4.0mmx4.0mm +inductor Wuerth smd +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-DD-Typ-L-Typ-XL-Typ-XXL +Shielded Coupled Inductor, Wuerth Elektronik, WE-DD, SMD, Typ L, Typ XL, Typ XXL, https://katalog.we-online.com/pbs/datasheet/744874001.pdf +Choke Coupled Double Inductor SMD Wuerth WE-DD TypL TypXL TypXXL +0 +4 +4 +Inductor_SMD +L_Wuerth_WE-DD-Typ-M-Typ-S +Shielded Coupled Inductor, Wuerth Elektronik, WE-DD, SMD, Typ M, Typ S, https://katalog.we-online.com/pbs/datasheet/744878001.pdf, https://katalog.we-online.de/pbs/datasheet/744877001.pdf +Choke Coupled Double Inductor SMD Wuerth WE-DD TypM TypS +0 +4 +4 +Inductor_SMD +L_Wuerth_WE-GF-1210 +Unshielded Inductor, Wuerth Elektronik, WE-GF, SMD, 1210, https://www.we-online.de/katalog/datasheet/74476401.pdf +Unshielded Inductor WE-GF 1210 Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-7345 +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMD, 7345, https://katalog.we-online.com/pbs/datasheet/744777001.pdf +Choke Shielded Power Inductor WE-PD 7345 Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-LS +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMD, Typ LS, https://katalog.we-online.com/pbs/datasheet/7447715906.pdf +Choke Shielded Power Inductor WE-PD TypLS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-LS_Handsoldering +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMD, Typ LS, Handsoldering, https://katalog.we-online.com/pbs/datasheet/7447715906.pdf +Choke Shielded Power Inductor WE-PD TypLS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-M-Typ-S +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMT, Typ M, Typ S, https://katalog.we-online.com/pbs/datasheet/744778005.pdf +Choke Shielded Power Inductor WE-PD TypM TypS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD-Typ-M-Typ-S_Handsoldering +Shielded Power Inductor, Wuerth Elektronik, WE-PD, SMT, Typ M, Typ S, Handsoldering, https://katalog.we-online.com/pbs/datasheet/744778005.pdf +Choke Shielded Power Inductor WE-PD TypM TypS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-L +Power Inductor, Wuerth Elektronik, WE-PD2, SMD, Typ L, , https://katalog.we-online.com/pbs/datasheet/74477510.pdf +Choke Power Inductor WE-PD2 TypL Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-MS +Power Inductor, Wuerth Elektronik, WE-PD2, SMD, Typ MS, https://katalog.we-online.com/pbs/datasheet/744774022.pdf +Choke Power Inductor WE-PD2 TypMS Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD2-Typ-XL +Power Inductor, Wuerth Elektronik, WE-PD2, SMT, Typ XL, https://katalog.we-online.com/pbs/datasheet/744776012.pdf +Choke Power Inductor WE-PD2 TypXL Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PD4-Typ-X +Power Inductor, Wuerth Elektronik, WE-PD4, SMT, Typ X, https://katalog.we-online.de/pbs/datasheet/74458001.pdf +Choke Power Inductor WE-PD4 TypX Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PDF +Shielded Power Inductor, Wuerth Elektronik, WE-PDF, SMD, https://katalog.we-online.de/pbs/datasheet/7447797022.pdf +Choke Shielded Power Inductor WE-PDF Wuerth +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-PDF_Handsoldering +Shielded Power Inductor, Wuerth Elektronik, WE-PDF, SMD, Handsoldering, https://katalog.we-online.de/pbs/datasheet/7447797022.pdf +Choke Shielded Power Inductor WE-PDF Wuerth Handsoldering +0 +2 +2 +Inductor_SMD +L_Wuerth_WE-TPC-3816 +L_Wuerth_WE-TPC-3816 StepUp generated footprint, http://katalog.we-online.de/pbs/datasheet/7440310047.pdf +wurth wuerth smd inductor +0 +2 +2 diff --git a/tools/FFTCode.c b/tools/FFTCode.c new file mode 100644 index 0000000..2e86fdc --- /dev/null +++ b/tools/FFTCode.c @@ -0,0 +1,827 @@ + +/* + By Daniel Klostermann + Iowa Hills Software, LLC IowaHills.com + If you find a problem, please leave a note at: + http://www.iowahills.com/feedbackcomments.html + June 6, 2016 + + ShowMessage is a C++ Builder function, and it usage has been commented out. + If you are using C++ Builder, include vcl.h for ShowMessage. + Otherwise replace ShowMessage with something appropriate for your compiler. +*/ + +#include "FFTCode.h" +// #include // For the new operator. +#include +#include + +//--------------------------------------------------------------------------- +// This calculates the required FFT size for a given number of points. +int RequiredFFTSize(int NumPts) +{ + int N = MINIMUM_FFT_SIZE; + while(N < NumPts && N < MAXIMUM_FFT_SIZE) + { + N *= 2; + } + return N; +} + +//--------------------------------------------------------------------------- + +// This verifies that the FFT Size N = 2^M. M is returned +// N must be >= 8 for the Twiddle calculations +int IsValidFFTSize(int N) +{ + if(N < MINIMUM_FFT_SIZE || N > MAXIMUM_FFT_SIZE || (N & (N - 1)) != 0)return(0); // N & (N - 1) ensures a power of 2 + return ( (int)( log((double)N) / M_LN2 + 0.5 ) ); // return M where N = 2^M +} + +//--------------------------------------------------------------------------- + +// Fast Fourier Transform +// This code puts DC in bin 0 and scales the output of a forward transform by 1/N. +// InputR and InputI are the real and imaginary input arrays of length N. +// The output values are returned in the Input arrays. +// TTransFormType is either FORWARD or INVERSE (defined in the header file) +// 256 pts in 50 us +void FFT(double *InputR, double *InputI, int N, TTransFormType Type) +{ + int j, LogTwoOfN, *RevBits; + double *BufferR, *BufferI, *TwiddleR, *TwiddleI; + double OneOverN; + + // Verify the FFT size and type. + LogTwoOfN = IsValidFFTSize(N); + if(LogTwoOfN == 0 || (Type != FORWARD && Type != INVERSE) ) + { + // ShowMessage("Invalid FFT type or size."); + return; + } + +/* + // Memory allocation for all the arrays. + BufferR = new(std::nothrow) double[N]; + BufferI = new(std::nothrow) double[N]; + TwiddleR = new(std::nothrow) double[N/2]; + TwiddleI = new(std::nothrow) double[N/2]; + RevBits = new(std::nothrow) int[N]; +*/ + + BufferR = (double *) malloc(sizeof(double) * (N)); + BufferI = (double *) malloc(sizeof(double) * (N)); + TwiddleR = (double *) malloc(sizeof(double) * (N/2)); + TwiddleI = (double *) malloc(sizeof(double) * (N/2)); + RevBits = (int *) malloc(sizeof(int) * (N)); + + if(BufferR == NULL || BufferI == NULL || + TwiddleR == NULL || TwiddleI == NULL || RevBits == NULL) + { + // ShowMessage("FFT Memory Allocation Error"); + return; + } + + ReArrangeInput(InputR, InputI, BufferR, BufferI, RevBits, N); + FillTwiddleArray(TwiddleR, TwiddleI, N, Type); + Transform(InputR, InputI, BufferR, BufferI, TwiddleR, TwiddleI, N); + + + // The ReArrangeInput function swapped Input[] and Buffer[]. Then Transform() + // swapped them again, LogTwoOfN times. Ultimately, these swaps must be done + // an even number of times, or the pointer to Buffer gets returned. + // So we must do one more swap here, for N = 16, 64, 256, 1024, ... + OneOverN = 1.0; + if(Type == FORWARD) OneOverN = 1.0 / (double)N; + + if(LogTwoOfN % 2 == 1) + { + for(j=0; j= 1) + { + for(k=0; k 0) // Loops Log2(N) times. + { + // Swap pointers, instead doing this: for(j=0; j 0.0)Mag = sqrt(Mag); + else Mag = 1.0E-12; + + return(Mag); +} + +//--------------------------------------------------------------------------- + +/* + These are the window definitions. These windows can be used for either + FIR filter design or with an FFT for spectral analysis. + For definitions, see this article: http://en.wikipedia.org/wiki/Window_function + + This function has 6 inputs + Data is the array, of length N, containing the data to to be windowed. + This data is either an FIR filter sinc pulse, or the data to be analyzed by an fft. + + WindowType is an enum defined in the header file. + e.g. wtKAISER, wtSINC, wtHANNING, wtHAMMING, wtBLACKMAN, ... + + Alpha sets the width of the flat top. + Windows such as the Tukey and Trapezoid are defined to have a variably wide flat top. + As can be seen by its definition, the Tukey is just a Hanning window with a flat top. + Alpha can be used to give any of these windows a partial flat top, except the Flattop and Kaiser. + Alpha = 0 gives the original window. (i.e. no flat top) + To generate a Tukey window, use a Hanning with 0 < Alpha < 1 + To generate a Bartlett window (triangular), use a Trapezoid window with Alpha = 0. + Alpha = 1 generates a rectangular window in all cases. (except the Flattop and Kaiser) + + + Beta is used with the Kaiser, Sinc, and Sine windows only. + These three windows are used primarily for FIR filter design. Then + Beta controls the filter's transition bandwidth and the sidelobe levels. + All other windows ignore Beta. + + UnityGain controls whether the gain of these windows is set to unity. + Only the Flattop window has unity gain by design. The Hanning window, for example, has a gain + of 1/2. UnityGain = true sets the gain to 1, which preserves the signal's energy level + when these windows are used for spectral analysis. + + Don't use this with FIR filter design however. Since most of the enegy in an FIR sinc pulse + is in the middle of the window, the window needs a peak amplitude of one, not unity gain. + Setting UnityGain = true will simply cause the resulting FIR filter to have excess gain. + + If using these windows for FIR filters, start with the Kaiser, Sinc, or Sine windows and + adjust Beta for the desired transition BW and sidelobe levels (set Alpha = 0). + While the FlatTop is an excellent window for spectral analysis, don't use it for FIR filter design. + It has a peak amplitude of ~ 4.7 which causes the resulting FIR filter to have about this much gain. + It works poorly for FIR filters even if you adjust its peak amplitude. + The Trapezoid also works poorly for FIR filter design. + + If using these windows with an fft for spectral analysis, start with the Hanning, Gauss, or Flattop. + When choosing a window for spectral analysis, you must trade off between resolution and amplitude + accuracy. The Hanning has the best resolution while the Flatop has the best amplitude accuracy. + The Gauss is midway between these two for both accuracy and resolution. These three were + the only windows available in the HP 89410A Vector Signal Analyzer. Which is to say, these three + are the probably the best windows for general purpose signal analysis. +*/ + +void WindowData(double *Data, int N, TWindowType WindowType, double Alpha, double Beta, bool UnityGain) +{ + if(WindowType == wtNONE) return; + + int j, M, TopWidth; + double dM, *WinCoeff; + + if(WindowType == wtKAISER || WindowType == wtFLATTOP )Alpha = 0.0; + + if(Alpha < 0.0)Alpha = 0.0; + if(Alpha > 1.0)Alpha = 1.0; + + if(Beta < 0.0)Beta = 0.0; + if(Beta > 10.0)Beta = 10.0; + +// WinCoeff = new(std::nothrow) double[N+2]; + WinCoeff = (double *) malloc(sizeof(double) * (N+2)); + + if(WinCoeff == NULL) + { + // ShowMessage("Failed to allocate memory in WindowData() "); + return; + } + + TopWidth = (int)( Alpha * (double)N ); + if(TopWidth%2 != 0)TopWidth++; + if(TopWidth > N)TopWidth = N; + M = N - TopWidth; + dM = M + 1; + + + // Calculate the window for N/2 points, then fold the window over (at the bottom). + // TopWidth points will be set to 1. + if(WindowType == wtKAISER) + { + double Arg; + for(j=0; j 0. Cannot be applied to a Kaiser or Flat Top. + if(WindowType != wtKAISER && WindowType != wtFLATTOP) + { + for(j=M/2; j -1.0E-5 && x < 1.0E-5)return(1.0); + return(sin(x)/x); +} + +//--------------------------------------------------------------------------- + + + diff --git a/tools/a.out b/tools/a.out new file mode 100755 index 0000000000000000000000000000000000000000..8913d7b1fb47a9bbd09c49853f5b9ef8ff78f129 GIT binary patch literal 16760 zcmeHOZ){sv6+gC{HtAYBX_Jw)8+|Q}NGWmCe_2YG)=rc51*L!J+VZDsU!B;FJsdmO zFJ00h(Jk9FGcxu8iAo3wZ4%lfBnlr^J|LFTs+37Ui$GL@i86IkwlOVZP-URSoOACv z?(>U--~;gGT`B(E^E-d;z31KMyz6)GS9<&R`h7l-5`bMm(xH0IL|8GqgDVIT=!CoQ z^P_MdEJk^e;D%cQfTV{K!d9c>-k!i8LTiyAk@C)<4oj;b!v{Nhkb--t4Cq(5% z@L=+tmisn7GCeMNrx~&S_0rNFT>FI!xd^&3l8)pBPFP>_q;^{ymvoHgP02kRi{Z;arwIEp1xWkhcs3#v%Yc`G|9=L|i9gqx&(yrO z3BY`E%J!G8nG=_5FO@r1+WtDKN-ekWGqfgxHIh@LfAeMuOUn;YPCh3No8RdxUO#CT zUpFUi%^W(?KUwnyd<-@xm%oos;pSx5MKmlmCDG@vp*1~yg0qv^j$Hp&)JO_pos(2mTo3hJK}$~ zs}EH$y6LDn(RDkFRkQepz07>3YZda-Z8)Oo6nInq-l9*q`1jN*)F z8QBPM)SPT1e6WAR8#D)}3m=wB=EV;K_Ug^Q53Paz;@|s=w|k23MoW!#v%Yc^wF9Ti%ybO35 zaAd&8Z>b8g;gL+Dt|b$%%MV!T_*h+ws-2Eyu(lL@s{=df9WcG?ntiuadK$5Lrc^qQ z*oyc$#O3dmN>>p(|ALEX#B+%4{PK<7zf$p?ISjtBdf)10OKP9n7AA) zm+JNa>(PSjQ)q9Hb+CSKu=&%WyB?`M3%ghC{KVGv>UAjjdH`x4apf_ktF6s@oeyzp~wm-Gl z40cW|*%ypF9PEq++oQqO?x4{fY)1R;V6A$;c^TbLVH{2YMe~Z60WSky2D}V-8SpaT zWx&gTmjN#WUIzZ_87S|gtk+G+nnZA!^nmrtS-#AhSMOn2_GhkUS=LsoSeAX7w9cX; z`oGPUa!Te+m$H}g2FtRCvYq9n${RqxMFiY$u1hmx6QcmT0Yo$-doRUa)|0d^lgdXl zz#;C4@XsyM3hDP0+uV0M{`f9b$&z1OZYud9)_=fqx!)ZB ze+{y)+}&;m&jaCQU+um2f_9O<S<-WqOi>)4E`U4yW&SwKao_i1kat~`=H0L#Fr$}fjVRX$igk5L&v1af~?@)*Q$GP)jshVnjtr#65))KgXMSAyK{ zmG+Gw_jx7X1l8tK0PY6ak6mexcVWcI=z0K}!KljL1Cgq{eEZyqMfcqzc&~Ja(KY&> z^Ft8My7G*>A{2k##jj;v_M7V{0QY0X2Y31-_xWDM&(9AX9-wyRdsyO(EBpC*K8Jj@ z{x3AH=T)2)kf9E{O0_uWmCed|*YP6qKA3+UUuApue0WXq^XJu!iZlQEp2q?B>D%0u z=f%jc!2C?{{~Hulxf?46*PTG;ZHy}OWDD{QcwJ6Kw6&j|wjp1S_U+6w4fV*c@Xx=G zb`mc}4m`L3pXK<5EB>R%8xDV|eiiu!e>2GUs_@?=o|3~({O}@CF;rq94!DBDgjOffv+KT1#v2iPrwe#bU z%*TckR(y1LcpP0El7*Ibg(?1+ZYK&h_R6yM9**wswR#WqSa@ot(licM&*u+B_xJ6o z)TrY*Na3+1tJmZRX3t@;_Vpj^j`mvz_wIeL_lR{Q+TGtvQPrWI!NREO^uIjD^DtP6 zc+8IR`JhOo;{1>MbdXz3p85z7Hd=We$ch(oRw|Z_(^;XugJ=~`XRXmf0tb1gf0QY} zlSxAZqjWZDpitm&>MRnygUH4cW2nKiN0Ku-lvMSkQRUgD%D(D18ypV8h4EoKHh^g7 zHKwG7r=$}35eR2fomff8^S6HVXTISawyt~G5n>OR>FeVtnINgVF3Rk(W{!@yc|M3>Z?{Zz_xlT}?|5>eUrB3)U z{Bxd>lIK4`gNz(Sz6XWEJ(Lyx@|-BRUJM!C{yoUw#%FNpzdTP0iodK=WIZ5Z4`7AX zB;qg6oq{j2A+2jDPvS4@hhxamBdqw#^QqtysB;#I;VdUnpf!g0%X6$CJ6j5;c8|+s`r!m%D;o%!D{|FlhN`EDc$b#Q?`OE)f!7oW- zIe@e;@m_HG%Q`?%)~jOg9{)@1Uv9==OU70f1*G31{{SnLKk;uhv_|j&EtWss?Z1K= zr+>=Orh>JkbQE{{KSv$Saajh+bE%vwcH4_A_*?W1Is9ckGsEYu#STqW5n1q0$kN=C z_GR58=eBQh|7CuPpIk?Jz9$p$m-W$&O-N#C)lmKvf5Ep<#O2@;;h!-ZbRPf! literal 0 HcmV?d00001 diff --git a/tools/fir_generate.c b/tools/fir_generate.c new file mode 100644 index 0000000..92f366a --- /dev/null +++ b/tools/fir_generate.c @@ -0,0 +1,24 @@ +#include +#include + +uint16_t size, i; + +// occhio che usi SMLAL +// https://community.arm.com/developer/tools-software/tools/f/keil-forum/28937/can-t-efficiently-use-smlal-instruction-in-cortex-m4 +int main(void){ + size = 7; + i = 0; + printf("inline q31_t hb_fir%d(q31_t * samples_ringbuf, uint8_t sample_index, uint8_t buff_size_mask, q31_t * coefficients){\n",size); + printf("\tq63_t sum0 = 0;\n"); + while(i <= (size/2)){ + if((!(i%2)) || (i==(size/2))) { + printf("\tsum0 += (q63_t) samples_ringbuf[(sample_index - %d) & buff_size_mask] * coefficients[%d];\n", i, i); + if(i != (size/2)) printf("\tsum0 += (q63_t) samples_ringbuf[(sample_index - %d) & buff_size_mask] * coefficients[%d];\n", (size - (i+1)), i); +// printf("\tsum0 += (q63_t) samples_ringbuf[(sample_index - %d)] * coefficients[%d];\n", i, i); +// if(i != (size/2)) printf("\tsum0 += (q63_t) samples_ringbuf[(sample_index - %d)] * coefficients[%d];\n", (size - (i+1)), i); + } + i++; + } + printf("\treturn (q31_t) (sum0 >> 31);\n"); + printf("}\n"); +} diff --git a/tools/rb_test.c b/tools/rb_test.c new file mode 100644 index 0000000..a60d27a --- /dev/null +++ b/tools/rb_test.c @@ -0,0 +1,30 @@ +#include +#include + +#define NET_PACKET_RINGBUF_SIZE (256) +#define NET_PACKET_RINGBUF_SIZE_MASK (NET_PACKET_RINGBUF_SIZE - 1) +#define FILTER_SIZE (16) + +uint16_t i, j, rb_index, sample_index; +uint16_t ringbuf[NET_PACKET_RINGBUF_SIZE]; + + +int main(void){ + i = 0; + j = 512; + while(i < NET_PACKET_RINGBUF_SIZE){ + ringbuf[i] = i; + i++; + } + + while(j){ + i = 0; + while(i < FILTER_SIZE){ + rb_index = (sample_index - i) & NET_PACKET_RINGBUF_SIZE_MASK; + printf("sample\t%ld\trb_idx\t%d\trb_val\t%d\n", sample_index, rb_index, ringbuf[rb_index]); + i++; + } + sample_index++; + j--; + } +} diff --git a/tools/test_firgen.c b/tools/test_firgen.c new file mode 100644 index 0000000..a7c3fbe --- /dev/null +++ b/tools/test_firgen.c @@ -0,0 +1,37 @@ +#include +#include +#include +#include +#include "FIRFilterCode.h" +// #include "FFTCode.h" +#define NUMTAPS 128 +uint16_t size, i; + +#define q31_float_to_int(x) ( (int32_t) ( (double)(x)*(double)0x7FFFFFFF ) ) +#define DAC_SAMPLE_RATE 21875 + +uint32_t centerfreq; +uint32_t bw; + +int main(void){ + double FirCoeff[NUMTAPS + 1]; +// buff[0] = '\0'; + centerfreq = 1500; + bw = 500; + double normalized_center_freq, normalized_bw; + + normalized_center_freq = (double)(centerfreq*2)/DAC_SAMPLE_RATE; + normalized_bw = (double)(bw*2)/DAC_SAMPLE_RATE; + + TWindowType WindowType; + RectWinFIR(FirCoeff, NUMTAPS, firBPF, normalized_center_freq, normalized_bw); + printf("freq %f, bw %f", normalized_center_freq, normalized_bw); + FIRFilterWindow(FirCoeff, NUMTAPS, wtKAISER, 3.2); + printf("coeff = ["); + for( int index = 0; index < NUMTAPS; index++){ +// printf("%d, ", q31_float_to_int(FirCoeff[index])); + printf("%f, ", FirCoeff[index]); + } + printf("]"); + +} diff --git a/tools/tone_generator.c b/tools/tone_generator.c new file mode 100644 index 0000000..83172d7 --- /dev/null +++ b/tools/tone_generator.c @@ -0,0 +1 @@ +// (700000/(2×2×2×4))/32

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Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c: diff --git a/codice/build/ComplexMathFunctions.lst b/codice/build/ComplexMathFunctions.lst new file mode 100644 index 0000000..1815e08 --- /dev/null +++ b/codice/build/ComplexMathFunctions.lst @@ -0,0 +1,789 @@ +ARM GAS /tmp/cc7q8FXd.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "ComplexMathFunctions.c" + 14 .text + 15 .section .text.arm_cmplx_conj_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_cmplx_conj_f32 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_cmplx_conj_f32: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 82B1 cbz r2, .L1 + 30 0002 0830 adds r0, r0, #8 + 31 0004 0831 adds r1, r1, #8 + 32 .L3: + 33 0006 0831 adds r1, r1, #8 + 34 0008 50F8083C ldr r3, [r0, #-8] @ float + 35 000c 41F8103C str r3, [r1, #-16] @ float + 36 0010 50ED017A vldr.32 s15, [r0, #-4] + 37 0014 013A subs r2, r2, #1 + 38 0016 F1EE677A vneg.f32 s15, s15 + 39 001a 00F10800 add r0, r0, #8 + 40 001e 41ED037A vstr.32 s15, [r1, #-12] + 41 0022 F0D1 bne .L3 + 42 .L1: + 43 0024 7047 bx lr + 45 0026 00BF .section .text.arm_cmplx_conj_q15,"ax",%progbits + 46 .align 1 + 47 .p2align 2,,3 + 48 .global arm_cmplx_conj_q15 + 49 .syntax unified + 50 .thumb + 51 .thumb_func + 52 .fpu fpv4-sp-d16 + 54 arm_cmplx_conj_q15: + 55 @ args = 0, pretend = 0, frame = 0 + 56 @ frame_needed = 0, uses_anonymous_args = 0 + 57 0000 A2B1 cbz r2, .L17 + 58 0002 10B5 push {r4, lr} + 59 0004 0023 movs r3, #0 + 60 0006 841C adds r4, r0, #2 + ARM GAS /tmp/cc7q8FXd.s page 2 + + + 61 0008 01F1020E add lr, r1, #2 + 62 .L11: + 63 000c 30F923C0 ldrsh ip, [r0, r3, lsl #2] + 64 0010 21F823C0 strh ip, [r1, r3, lsl #2] @ movhi + 65 0014 34F923C0 ldrsh ip, [r4, r3, lsl #2] + 66 0018 CCF1000C rsb ip, ip, #0 + 67 .syntax unified + 68 @ 193 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c + 69 001c 0CF30F0C ssat ip, #16, ip + 70 @ 0 "" 2 + 71 .thumb + 72 .syntax unified + 73 0020 2EF823C0 strh ip, [lr, r3, lsl #2] @ movhi + 74 0024 0133 adds r3, r3, #1 + 75 0026 9342 cmp r3, r2 + 76 0028 F0D1 bne .L11 + 77 002a 10BD pop {r4, pc} + 78 .L17: + 79 002c 7047 bx lr + 81 002e 00BF .section .text.arm_cmplx_conj_q31,"ax",%progbits + 82 .align 1 + 83 .p2align 2,,3 + 84 .global arm_cmplx_conj_q31 + 85 .syntax unified + 86 .thumb + 87 .thumb_func + 88 .fpu fpv4-sp-d16 + 90 arm_cmplx_conj_q31: + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 0000 9AB1 cbz r2, .L28 + 94 0002 0023 movs r3, #0 + 95 0004 30B5 push {r4, r5, lr} + 96 0006 9C46 mov ip, r3 + 97 0008 051D adds r5, r0, #4 + 98 000a 01F1040E add lr, r1, #4 + 99 .L22: + 100 000e 50F83340 ldr r4, [r0, r3, lsl #3] + 101 0012 41F83340 str r4, [r1, r3, lsl #3] + 102 0016 55F83340 ldr r4, [r5, r3, lsl #3] + 103 .syntax unified + 104 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 105 001a 84FAACF4 qsub r4, ip, r4 + 106 @ 0 "" 2 + 107 .thumb + 108 .syntax unified + 109 001e 4EF83340 str r4, [lr, r3, lsl #3] + 110 0022 0133 adds r3, r3, #1 + 111 0024 9342 cmp r3, r2 + 112 0026 F2D1 bne .L22 + 113 0028 30BD pop {r4, r5, pc} + 114 .L28: + 115 002a 7047 bx lr + 117 .section .text.arm_cmplx_dot_prod_f32,"ax",%progbits + 118 .align 1 + 119 .p2align 2,,3 + 120 .global arm_cmplx_dot_prod_f32 + ARM GAS /tmp/cc7q8FXd.s page 3 + + + 121 .syntax unified + 122 .thumb + 123 .thumb_func + 124 .fpu fpv4-sp-d16 + 126 arm_cmplx_dot_prod_f32: + 127 @ args = 4, pretend = 0, frame = 0 + 128 @ frame_needed = 0, uses_anonymous_args = 0 + 129 @ link register save eliminated. + 130 0000 DFED157A vldr.32 s15, .L36 + 131 0004 FAB1 cbz r2, .L34 + 132 0006 0830 adds r0, r0, #8 + 133 0008 B0EE677A vmov.f32 s14, s15 + 134 000c 0831 adds r1, r1, #8 + 135 .L33: + 136 000e 10ED026A vldr.32 s12, [r0, #-8] + 137 0012 51ED026A vldr.32 s13, [r1, #-8] + 138 0016 51ED015A vldr.32 s11, [r1, #-4] + 139 001a A6EE267A vfma.f32 s14, s12, s13 + 140 001e 013A subs r2, r2, #1 + 141 0020 01F10801 add r1, r1, #8 + 142 0024 E6EE257A vfma.f32 s15, s12, s11 + 143 0028 00F10800 add r0, r0, #8 + 144 002c 10ED036A vldr.32 s12, [r0, #-12] + 145 0030 A6EE657A vfms.f32 s14, s12, s11 + 146 0034 E6EE267A vfma.f32 s15, s12, s13 + 147 0038 E9D1 bne .L33 + 148 003a 83ED007A vstr.32 s14, [r3] + 149 003e 009B ldr r3, [sp] + 150 0040 C3ED007A vstr.32 s15, [r3] + 151 0044 7047 bx lr + 152 .L34: + 153 0046 B0EE677A vmov.f32 s14, s15 + 154 004a 83ED007A vstr.32 s14, [r3] + 155 004e 009B ldr r3, [sp] + 156 0050 C3ED007A vstr.32 s15, [r3] + 157 0054 7047 bx lr + 158 .L37: + 159 0056 00BF .align 2 + 160 .L36: + 161 0058 00000000 .word 0 + 163 .section .text.arm_cmplx_dot_prod_q15,"ax",%progbits + 164 .align 1 + 165 .p2align 2,,3 + 166 .global arm_cmplx_dot_prod_q15 + 167 .syntax unified + 168 .thumb + 169 .thumb_func + 170 .fpu fpv4-sp-d16 + 172 arm_cmplx_dot_prod_q15: + 173 @ args = 4, pretend = 0, frame = 16 + 174 @ frame_needed = 0, uses_anonymous_args = 0 + 175 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 176 0004 85B0 sub sp, sp, #20 + 177 0006 0393 str r3, [sp, #12] + 178 0008 C2B3 cbz r2, .L41 + 179 000a 0024 movs r4, #0 + 180 000c 0025 movs r5, #0 + ARM GAS /tmp/cc7q8FXd.s page 4 + + + 181 000e CDE90045 strd r4, [sp] + 182 0012 8F1C adds r7, r1, #2 + 183 0014 0023 movs r3, #0 + 184 0016 00F10208 add r8, r0, #2 + 185 001a A246 mov r10, r4 + 186 001c AB46 mov fp, r5 + 187 001e BE46 mov lr, r7 + 188 .L40: + 189 0020 DDE90067 ldrd r6, [sp] + 190 0024 30F923C0 ldrsh ip, [r0, r3, lsl #2] + 191 0028 3EF92340 ldrsh r4, [lr, r3, lsl #2] + 192 002c 38F92390 ldrsh r9, [r8, r3, lsl #2] + 193 0030 31F92350 ldrsh r5, [r1, r3, lsl #2] + 194 0034 CCFB8467 smlalbb r6, r7, ip, r4 + 195 0038 C5FB8967 smlalbb r6, r7, r5, r9 + 196 003c CDE90067 strd r6, [sp] + 197 0040 5646 mov r6, r10 + 198 0042 5F46 mov r7, fp + 199 0044 04FB09F4 mul r4, r4, r9 + 200 0048 CCFB8567 smlalbb r6, r7, ip, r5 + 201 004c B6EB040A subs r10, r6, r4 + 202 0050 03F10103 add r3, r3, #1 + 203 0054 67EBE47B sbc fp, r7, r4, asr #31 + 204 0058 9A42 cmp r2, r3 + 205 005a E1D1 bne .L40 + 206 005c DDE90001 ldrd r0, [sp] + 207 0060 4FEA9A13 lsr r3, r10, #6 + 208 0064 8209 lsrs r2, r0, #6 + 209 0066 43EA8B63 orr r3, r3, fp, lsl #26 + 210 006a 42EA8162 orr r2, r2, r1, lsl #26 + 211 .L39: + 212 006e 0399 ldr r1, [sp, #12] + 213 0070 0B60 str r3, [r1] + 214 0072 0E9B ldr r3, [sp, #56] + 215 0074 1A60 str r2, [r3] + 216 0076 05B0 add sp, sp, #20 + 217 @ sp needed + 218 0078 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 219 .L41: + 220 007c 1346 mov r3, r2 + 221 007e F6E7 b .L39 + 223 .section .text.arm_cmplx_dot_prod_q31,"ax",%progbits + 224 .align 1 + 225 .p2align 2,,3 + 226 .global arm_cmplx_dot_prod_q31 + 227 .syntax unified + 228 .thumb + 229 .thumb_func + 230 .fpu fpv4-sp-d16 + 232 arm_cmplx_dot_prod_q31: + 233 @ args = 4, pretend = 0, frame = 16 + 234 @ frame_needed = 0, uses_anonymous_args = 0 + 235 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 236 0004 85B0 sub sp, sp, #20 + 237 0006 0393 str r3, [sp, #12] + 238 0008 002A cmp r2, #0 + 239 000a 46D0 beq .L47 + ARM GAS /tmp/cc7q8FXd.s page 5 + + + 240 000c 031D adds r3, r0, #4 + 241 000e 4FF0000C mov ip, #0 + 242 0012 0193 str r3, [sp, #4] + 243 0014 0B1D adds r3, r1, #4 + 244 0016 6446 mov r4, ip + 245 0018 E046 mov r8, ip + 246 001a 6646 mov r6, ip + 247 001c E646 mov lr, ip + 248 001e 0293 str r3, [sp, #8] + 249 .L46: + 250 0020 50F83C90 ldr r9, [r0, ip, lsl #3] + 251 0024 51F83C30 ldr r3, [r1, ip, lsl #3] + 252 0028 029D ldr r5, [sp, #8] + 253 002a 019F ldr r7, [sp, #4] + 254 002c 55F83C50 ldr r5, [r5, ip, lsl #3] + 255 0030 57F83C70 ldr r7, [r7, ip, lsl #3] + 256 0034 89FB03BA smull fp, r10, r9, r3 + 257 0038 4FEA9B3B lsr fp, fp, #14 + 258 003c 4BEA8A4B orr fp, fp, r10, lsl #18 + 259 0040 1BEB0606 adds r6, fp, r6 + 260 0044 4EEBAA3E adc lr, lr, r10, asr #14 + 261 0048 89FB059A smull r9, r10, r9, r5 + 262 004c 4FEA9939 lsr r9, r9, #14 + 263 0050 49EA8A49 orr r9, r9, r10, lsl #18 + 264 0054 19EB0404 adds r4, r9, r4 + 265 0058 85FB0759 smull r5, r9, r5, r7 + 266 005c 4FEA9535 lsr r5, r5, #14 + 267 0060 83FB0737 smull r3, r7, r3, r7 + 268 0064 45EA8945 orr r5, r5, r9, lsl #18 + 269 0068 4FEA9333 lsr r3, r3, #14 + 270 006c 48EBAA38 adc r8, r8, r10, asr #14 + 271 0070 43EA8743 orr r3, r3, r7, lsl #18 + 272 0074 761B subs r6, r6, r5 + 273 0076 0CF1010C add ip, ip, #1 + 274 007a 6EEBA93E sbc lr, lr, r9, asr #14 + 275 007e 1C19 adds r4, r3, r4 + 276 0080 48EBA738 adc r8, r8, r7, asr #14 + 277 0084 6245 cmp r2, ip + 278 0086 CBD1 bne .L46 + 279 .L45: + 280 0088 039B ldr r3, [sp, #12] + 281 008a C3E9006E strd r6, lr, [r3] + 282 008e 0E9B ldr r3, [sp, #56] + 283 0090 C3E90048 strd r4, r8, [r3] + 284 0094 05B0 add sp, sp, #20 + 285 @ sp needed + 286 0096 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 287 .L47: + 288 009a 1446 mov r4, r2 + 289 009c 9046 mov r8, r2 + 290 009e 1646 mov r6, r2 + 291 00a0 9646 mov lr, r2 + 292 00a2 F1E7 b .L45 + 294 .section .text.arm_cmplx_mag_f32,"ax",%progbits + 295 .align 1 + 296 .p2align 2,,3 + 297 .global arm_cmplx_mag_f32 + ARM GAS /tmp/cc7q8FXd.s page 6 + + + 298 .syntax unified + 299 .thumb + 300 .thumb_func + 301 .fpu fpv4-sp-d16 + 303 arm_cmplx_mag_f32: + 304 @ args = 0, pretend = 0, frame = 16 + 305 @ frame_needed = 0, uses_anonymous_args = 0 + 306 0000 1AB3 cbz r2, .L68 + 307 0002 10B5 push {r4, lr} + 308 0004 0830 adds r0, r0, #8 + 309 0006 84B0 sub sp, sp, #16 + 310 0008 0024 movs r4, #0 + 311 .L58: + 312 000a 10ED010A vldr.32 s0, [r0, #-4] + 313 000e 50ED027A vldr.32 s15, [r0, #-8] + 314 0012 20EE000A vmul.f32 s0, s0, s0 + 315 0016 0431 adds r1, r1, #4 + 316 0018 A7EEA70A vfma.f32 s0, s15, s15 + 317 001c B5EEC00A vcmpe.f32 s0, #0 + 318 0020 F1EE10FA vmrs APSR_nzcv, FPSCR + 319 0024 0EDB blt .L65 + 320 0026 B5EE400A vcmp.f32 s0, #0 + 321 002a F1EE10FA vmrs APSR_nzcv, FPSCR + 322 002e 0DD4 bmi .L66 + 323 0030 F1EEC07A vsqrt.f32 s15, s0 + 324 .L56: + 325 0034 41ED017A vstr.32 s15, [r1, #-4] + 326 .L57: + 327 0038 013A subs r2, r2, #1 + 328 003a 00F10800 add r0, r0, #8 + 329 003e E4D1 bne .L58 + 330 0040 04B0 add sp, sp, #16 + 331 @ sp needed + 332 0042 10BD pop {r4, pc} + 333 .L65: + 334 0044 41F8044C str r4, [r1, #-4] @ float + 335 0048 F6E7 b .L57 + 336 .L68: + 337 004a 7047 bx lr + 338 .L66: + 339 004c CDE90212 strd r1, r2, [sp, #8] + 340 0050 0190 str r0, [sp, #4] + 341 0052 FFF7FEFF bl sqrtf + 342 0056 DDE90212 ldrd r1, r2, [sp, #8] + 343 005a 0198 ldr r0, [sp, #4] + 344 005c F0EE407A vmov.f32 s15, s0 + 345 0060 E8E7 b .L56 + 347 0062 00BF .section .text.arm_cmplx_mag_q15,"ax",%progbits + 348 .align 1 + 349 .p2align 2,,3 + 350 .global arm_cmplx_mag_q15 + 351 .syntax unified + 352 .thumb + 353 .thumb_func + 354 .fpu fpv4-sp-d16 + 356 arm_cmplx_mag_q15: + 357 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc7q8FXd.s page 7 + + + 358 @ frame_needed = 0, uses_anonymous_args = 0 + 359 0000 82B1 cbz r2, .L79 + 360 0002 70B5 push {r4, r5, r6, lr} + 361 0004 0646 mov r6, r0 + 362 0006 0D46 mov r5, r1 + 363 0008 1446 mov r4, r2 + 364 .L73: + 365 000a 56F8043B ldr r3, [r6], #4 @ unaligned + 366 .syntax unified + 367 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 368 000e 23FB03F3 smuad r3, r3, r3 + 369 @ 0 "" 2 + 370 .thumb + 371 .syntax unified + 372 0012 2946 mov r1, r5 + 373 0014 5814 asrs r0, r3, #17 + 374 0016 FFF7FEFF bl arm_sqrt_q15 + 375 001a 013C subs r4, r4, #1 + 376 001c 05F10205 add r5, r5, #2 + 377 0020 F3D1 bne .L73 + 378 0022 70BD pop {r4, r5, r6, pc} + 379 .L79: + 380 0024 7047 bx lr + 382 0026 00BF .section .text.arm_cmplx_mag_q31,"ax",%progbits + 383 .align 1 + 384 .p2align 2,,3 + 385 .global arm_cmplx_mag_q31 + 386 .syntax unified + 387 .thumb + 388 .thumb_func + 389 .fpu fpv4-sp-d16 + 391 arm_cmplx_mag_q31: + 392 @ args = 0, pretend = 0, frame = 0 + 393 @ frame_needed = 0, uses_anonymous_args = 0 + 394 0000 C2B1 cbz r2, .L90 + 395 0002 70B5 push {r4, r5, r6, lr} + 396 0004 0E46 mov r6, r1 + 397 0006 1546 mov r5, r2 + 398 0008 00F10804 add r4, r0, #8 + 399 .L84: + 400 000c 54E90203 ldrd r0, r3, [r4, #-8] + 401 0010 83FB033C smull r3, ip, r3, r3 + 402 0014 80FB0002 smull r0, r2, r0, r0 + 403 0018 4FEA6C00 asr r0, ip, #1 + 404 001c 3146 mov r1, r6 + 405 001e 00EB6200 add r0, r0, r2, asr #1 + 406 0022 FFF7FEFF bl arm_sqrt_q31 + 407 0026 013D subs r5, r5, #1 + 408 0028 06F10406 add r6, r6, #4 + 409 002c 04F10804 add r4, r4, #8 + 410 0030 ECD1 bne .L84 + 411 0032 70BD pop {r4, r5, r6, pc} + 412 .L90: + 413 0034 7047 bx lr + 415 0036 00BF .section .text.arm_cmplx_mag_squared_f32,"ax",%progbits + 416 .align 1 + 417 .p2align 2,,3 + ARM GAS /tmp/cc7q8FXd.s page 8 + + + 418 .global arm_cmplx_mag_squared_f32 + 419 .syntax unified + 420 .thumb + 421 .thumb_func + 422 .fpu fpv4-sp-d16 + 424 arm_cmplx_mag_squared_f32: + 425 @ args = 0, pretend = 0, frame = 0 + 426 @ frame_needed = 0, uses_anonymous_args = 0 + 427 @ link register save eliminated. + 428 0000 72B1 cbz r2, .L93 + 429 0002 0830 adds r0, r0, #8 + 430 .L95: + 431 0004 50ED017A vldr.32 s15, [r0, #-4] + 432 0008 10ED027A vldr.32 s14, [r0, #-8] + 433 000c 67EEA77A vmul.f32 s15, s15, s15 + 434 0010 013A subs r2, r2, #1 + 435 0012 E7EE077A vfma.f32 s15, s14, s14 + 436 0016 00F10800 add r0, r0, #8 + 437 001a E1EC017A vstmia.32 r1!, {s15} + 438 001e F1D1 bne .L95 + 439 .L93: + 440 0020 7047 bx lr + 442 0022 00BF .section .text.arm_cmplx_mag_squared_q15,"ax",%progbits + 443 .align 1 + 444 .p2align 2,,3 + 445 .global arm_cmplx_mag_squared_q15 + 446 .syntax unified + 447 .thumb + 448 .thumb_func + 449 .fpu fpv4-sp-d16 + 451 arm_cmplx_mag_squared_q15: + 452 @ args = 0, pretend = 0, frame = 0 + 453 @ frame_needed = 0, uses_anonymous_args = 0 + 454 @ link register save eliminated. + 455 0000 42B1 cbz r2, .L100 + 456 .L102: + 457 0002 50F8043B ldr r3, [r0], #4 @ unaligned + 458 .syntax unified + 459 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 460 0006 23FB03F3 smuad r3, r3, r3 + 461 @ 0 "" 2 + 462 .thumb + 463 .syntax unified + 464 000a 5B14 asrs r3, r3, #17 + 465 000c 013A subs r2, r2, #1 + 466 000e 21F8023B strh r3, [r1], #2 @ movhi + 467 0012 F6D1 bne .L102 + 468 .L100: + 469 0014 7047 bx lr + 471 0016 00BF .section .text.arm_cmplx_mag_squared_q31,"ax",%progbits + 472 .align 1 + 473 .p2align 2,,3 + 474 .global arm_cmplx_mag_squared_q31 + 475 .syntax unified + 476 .thumb + 477 .thumb_func + 478 .fpu fpv4-sp-d16 + ARM GAS /tmp/cc7q8FXd.s page 9 + + + 480 arm_cmplx_mag_squared_q31: + 481 @ args = 0, pretend = 0, frame = 0 + 482 @ frame_needed = 0, uses_anonymous_args = 0 + 483 0000 9AB1 cbz r2, .L115 + 484 0002 00B5 push {lr} + 485 0004 00F1080E add lr, r0, #8 + 486 .L109: + 487 0008 5EE90203 ldrd r0, r3, [lr, #-8] + 488 000c 83FB03C3 smull ip, r3, r3, r3 + 489 0010 5B10 asrs r3, r3, #1 + 490 0012 80FB000C smull r0, ip, r0, r0 + 491 0016 03EB6C03 add r3, r3, ip, asr #1 + 492 001a 013A subs r2, r2, #1 + 493 001c 41F8043B str r3, [r1], #4 + 494 0020 0EF1080E add lr, lr, #8 + 495 0024 F0D1 bne .L109 + 496 0026 5DF804FB ldr pc, [sp], #4 + 497 .L115: + 498 002a 7047 bx lr + 500 .section .text.arm_cmplx_mult_cmplx_f32,"ax",%progbits + 501 .align 1 + 502 .p2align 2,,3 + 503 .global arm_cmplx_mult_cmplx_f32 + 504 .syntax unified + 505 .thumb + 506 .thumb_func + 507 .fpu fpv4-sp-d16 + 509 arm_cmplx_mult_cmplx_f32: + 510 @ args = 0, pretend = 0, frame = 0 + 511 @ frame_needed = 0, uses_anonymous_args = 0 + 512 @ link register save eliminated. + 513 0000 F3B1 cbz r3, .L118 + 514 0002 0830 adds r0, r0, #8 + 515 0004 0831 adds r1, r1, #8 + 516 0006 0832 adds r2, r2, #8 + 517 .L120: + 518 0008 50ED017A vldr.32 s15, [r0, #-4] + 519 000c 51ED025A vldr.32 s11, [r1, #-8] + 520 0010 51ED016A vldr.32 s13, [r1, #-4] + 521 0014 10ED026A vldr.32 s12, [r0, #-8] + 522 0018 26EEE77A vnmul.f32 s14, s13, s15 + 523 001c 67EEA57A vmul.f32 s15, s15, s11 + 524 0020 A6EE257A vfma.f32 s14, s12, s11 + 525 0024 013B subs r3, r3, #1 + 526 0026 00F10800 add r0, r0, #8 + 527 002a E6EE267A vfma.f32 s15, s12, s13 + 528 002e 01F10801 add r1, r1, #8 + 529 0032 02F10802 add r2, r2, #8 + 530 0036 02ED047A vstr.32 s14, [r2, #-16] + 531 003a 42ED037A vstr.32 s15, [r2, #-12] + 532 003e E3D1 bne .L120 + 533 .L118: + 534 0040 7047 bx lr + 536 0042 00BF .section .text.arm_cmplx_mult_cmplx_q15,"ax",%progbits + 537 .align 1 + 538 .p2align 2,,3 + 539 .global arm_cmplx_mult_cmplx_q15 + ARM GAS /tmp/cc7q8FXd.s page 10 + + + 540 .syntax unified + 541 .thumb + 542 .thumb_func + 543 .fpu fpv4-sp-d16 + 545 arm_cmplx_mult_cmplx_q15: + 546 @ args = 0, pretend = 0, frame = 0 + 547 @ frame_needed = 0, uses_anonymous_args = 0 + 548 0000 3BB3 cbz r3, .L133 + 549 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 550 0006 4FF0000C mov ip, #0 + 551 000a 871C adds r7, r0, #2 + 552 000c 8E1C adds r6, r1, #2 + 553 000e 951C adds r5, r2, #2 + 554 .L127: + 555 0010 37F92CE0 ldrsh lr, [r7, ip, lsl #2] + 556 0014 31F92C40 ldrsh r4, [r1, ip, lsl #2] + 557 0018 36F92C80 ldrsh r8, [r6, ip, lsl #2] + 558 001c 30F92CA0 ldrsh r10, [r0, ip, lsl #2] + 559 0020 0AFB04F9 mul r9, r10, r4 + 560 0024 04FB0EF4 mul r4, r4, lr + 561 0028 0EFB08FE mul lr, lr, r8 + 562 002c 4FEA6E4E asr lr, lr, #17 + 563 0030 0AFB08F8 mul r8, r10, r8 + 564 0034 6414 asrs r4, r4, #17 + 565 0036 CEEB694E rsb lr, lr, r9, asr #17 + 566 003a 04EB6844 add r4, r4, r8, asr #17 + 567 003e 22F82CE0 strh lr, [r2, ip, lsl #2] @ movhi + 568 0042 25F82C40 strh r4, [r5, ip, lsl #2] @ movhi + 569 0046 0CF1010C add ip, ip, #1 + 570 004a 6345 cmp r3, ip + 571 004c E0D1 bne .L127 + 572 004e BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 573 .L133: + 574 0052 7047 bx lr + 576 .section .text.arm_cmplx_mult_cmplx_q31,"ax",%progbits + 577 .align 1 + 578 .p2align 2,,3 + 579 .global arm_cmplx_mult_cmplx_q31 + 580 .syntax unified + 581 .thumb + 582 .thumb_func + 583 .fpu fpv4-sp-d16 + 585 arm_cmplx_mult_cmplx_q31: + 586 @ args = 0, pretend = 0, frame = 0 + 587 @ frame_needed = 0, uses_anonymous_args = 0 + 588 0000 3BB3 cbz r3, .L144 + 589 0002 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 590 0006 4FF0000C mov ip, #0 + 591 000a 00F10408 add r8, r0, #4 + 592 000e 0F1D adds r7, r1, #4 + 593 0010 161D adds r6, r2, #4 + 594 .L138: + 595 0012 58F83C50 ldr r5, [r8, ip, lsl #3] + 596 0016 51F83C40 ldr r4, [r1, ip, lsl #3] + 597 001a 57F83CA0 ldr r10, [r7, ip, lsl #3] + 598 001e 50F83CE0 ldr lr, [r0, ip, lsl #3] + 599 0022 8EFB04B9 smull fp, r9, lr, r4 + ARM GAS /tmp/cc7q8FXd.s page 11 + + + 600 0026 84FB05B4 smull fp, r4, r4, r5 + 601 002a 85FB0AB5 smull fp, r5, r5, r10 + 602 002e 6D10 asrs r5, r5, #1 + 603 0030 8EFB0AAE smull r10, lr, lr, r10 + 604 0034 6410 asrs r4, r4, #1 + 605 0036 C5EB6905 rsb r5, r5, r9, asr #1 + 606 003a 04EB6E04 add r4, r4, lr, asr #1 + 607 003e 42F83C50 str r5, [r2, ip, lsl #3] + 608 0042 46F83C40 str r4, [r6, ip, lsl #3] + 609 0046 0CF1010C add ip, ip, #1 + 610 004a 6345 cmp r3, ip + 611 004c E1D1 bne .L138 + 612 004e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 613 .L144: + 614 0052 7047 bx lr + 616 .section .text.arm_cmplx_mult_real_f32,"ax",%progbits + 617 .align 1 + 618 .p2align 2,,3 + 619 .global arm_cmplx_mult_real_f32 + 620 .syntax unified + 621 .thumb + 622 .thumb_func + 623 .fpu fpv4-sp-d16 + 625 arm_cmplx_mult_real_f32: + 626 @ args = 0, pretend = 0, frame = 0 + 627 @ frame_needed = 0, uses_anonymous_args = 0 + 628 @ link register save eliminated. + 629 0000 A3B1 cbz r3, .L147 + 630 0002 0830 adds r0, r0, #8 + 631 0004 0832 adds r2, r2, #8 + 632 .L149: + 633 0006 10ED027A vldr.32 s14, [r0, #-8] + 634 000a F1EC016A vldmia.32 r1!, {s13} + 635 000e 27EE267A vmul.f32 s14, s14, s13 + 636 0012 0830 adds r0, r0, #8 + 637 0014 02ED027A vstr.32 s14, [r2, #-8] + 638 0018 50ED037A vldr.32 s15, [r0, #-12] + 639 001c 67EEA67A vmul.f32 s15, s15, s13 + 640 0020 013B subs r3, r3, #1 + 641 0022 02F10802 add r2, r2, #8 + 642 0026 42ED037A vstr.32 s15, [r2, #-12] + 643 002a ECD1 bne .L149 + 644 .L147: + 645 002c 7047 bx lr + 647 002e 00BF .section .text.arm_cmplx_mult_real_q15,"ax",%progbits + 648 .align 1 + 649 .p2align 2,,3 + 650 .global arm_cmplx_mult_real_q15 + 651 .syntax unified + 652 .thumb + 653 .thumb_func + 654 .fpu fpv4-sp-d16 + 656 arm_cmplx_mult_real_q15: + 657 @ args = 0, pretend = 0, frame = 0 + 658 @ frame_needed = 0, uses_anonymous_args = 0 + 659 0000 EBB1 cbz r3, .L162 + 660 0002 F0B5 push {r4, r5, r6, r7, lr} + ARM GAS /tmp/cc7q8FXd.s page 12 + + + 661 0004 0024 movs r4, #0 + 662 0006 861C adds r6, r0, #2 + 663 0008 951C adds r5, r2, #2 + 664 .L156: + 665 000a 31F9027B ldrsh r7, [r1], #2 + 666 000e 30F824E0 ldrh lr, [r0, r4, lsl #2] + 667 0012 1EFB07FE smulbb lr, lr, r7 + 668 0016 4FEAEE3E asr lr, lr, #15 + 669 .syntax unified + 670 @ 226 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_ + 671 001a 0EF30F0E ssat lr, #16, lr + 672 @ 0 "" 2 + 673 .thumb + 674 .syntax unified + 675 001e 22F824E0 strh lr, [r2, r4, lsl #2] @ movhi + 676 0022 36F824C0 ldrh ip, [r6, r4, lsl #2] + 677 0026 1CFB07FC smulbb ip, ip, r7 + 678 002a 4FEAEC3C asr ip, ip, #15 + 679 .syntax unified + 680 @ 227 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_ + 681 002e 0CF30F0C ssat ip, #16, ip + 682 @ 0 "" 2 + 683 .thumb + 684 .syntax unified + 685 0032 25F824C0 strh ip, [r5, r4, lsl #2] @ movhi + 686 0036 0134 adds r4, r4, #1 + 687 0038 A342 cmp r3, r4 + 688 003a E6D1 bne .L156 + 689 003c F0BD pop {r4, r5, r6, r7, pc} + 690 .L162: + 691 003e 7047 bx lr + 693 .section .text.arm_cmplx_mult_real_q31,"ax",%progbits + 694 .align 1 + 695 .p2align 2,,3 + 696 .global arm_cmplx_mult_real_q31 + 697 .syntax unified + 698 .thumb + 699 .thumb_func + 700 .fpu fpv4-sp-d16 + 702 arm_cmplx_mult_real_q31: + 703 @ args = 0, pretend = 0, frame = 0 + 704 @ frame_needed = 0, uses_anonymous_args = 0 + 705 0000 EBB1 cbz r3, .L173 + 706 0002 F0B5 push {r4, r5, r6, r7, lr} + 707 0004 4FF0000C mov ip, #0 + 708 0008 061D adds r6, r0, #4 + 709 000a 151D adds r5, r2, #4 + 710 .L167: + 711 000c 51F8044B ldr r4, [r1], #4 + 712 0010 50F83C70 ldr r7, [r0, ip, lsl #3] + 713 0014 84FB07E7 smull lr, r7, r4, r7 + 714 .syntax unified + 715 @ 187 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_ + 716 0018 07F31E07 ssat r7, #31, r7 + 717 @ 0 "" 2 + 718 .thumb + 719 .syntax unified + ARM GAS /tmp/cc7q8FXd.s page 13 + + + 720 001c 7F00 lsls r7, r7, #1 + 721 001e 42F83C70 str r7, [r2, ip, lsl #3] + 722 0022 56F83C70 ldr r7, [r6, ip, lsl #3] + 723 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+ Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c: diff --git a/codice/build/DistanceFunctions.lst b/codice/build/DistanceFunctions.lst new file mode 100644 index 0000000..63e8c87 --- /dev/null +++ b/codice/build/DistanceFunctions.lst @@ -0,0 +1,1364 @@ +ARM GAS /tmp/ccLiIsYO.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "DistanceFunctions.c" + 14 .text + 15 .section .text.arm_boolean_distance_TT_TF_FT,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_boolean_distance_TT_TF_FT + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_boolean_distance_TT_TF_FT: + 26 @ args = 8, pretend = 0, frame = 8 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 29 0004 83B0 sub sp, sp, #12 + 30 0006 1F2A cmp r2, #31 + 31 0008 1646 mov r6, r2 + 32 000a 0746 mov r7, r0 + 33 000c 8A46 mov r10, r1 + 34 000e 0193 str r3, [sp, #4] + 35 0010 57D9 bls .L15 + 36 0012 A2F12009 sub r9, r2, #32 + 37 0016 4FEA5919 lsr r9, r9, #5 + 38 001a 09F10109 add r9, r9, #1 + 39 001e 4FF0000C mov ip, #0 + 40 0022 4FEA890B lsl fp, r9, #2 + 41 0026 8846 mov r8, r1 + 42 0028 00EB8909 add r9, r0, r9, lsl #2 + 43 002c E646 mov lr, ip + 44 002e 6546 mov r5, ip + 45 .L8: + 46 0030 57F8041B ldr r1, [r7], #4 + 47 0034 58F8042B ldr r2, [r8], #4 + 48 0038 2023 movs r3, #32 + 49 003a 04E0 b .L7 + 50 .L31: + 51 003c 0CB1 cbz r4, .L5 + 52 003e 0CF1010C add ip, ip, #1 + 53 .L5: + 54 0042 013B subs r3, r3, #1 + 55 0044 0CD0 beq .L30 + 56 .L7: + 57 0046 01F00100 and r0, r1, #1 + 58 004a 02F00104 and r4, r2, #1 + ARM GAS /tmp/ccLiIsYO.s page 2 + + + 59 004e 4908 lsrs r1, r1, #1 + 60 0050 5208 lsrs r2, r2, #1 + 61 0052 0028 cmp r0, #0 + 62 0054 F2D0 beq .L31 + 63 0056 7CBB cbnz r4, .L6 + 64 0058 013B subs r3, r3, #1 + 65 005a 0EF1010E add lr, lr, #1 + 66 005e F2D1 bne .L7 + 67 .L30: + 68 0060 4F45 cmp r7, r9 + 69 0062 E5D1 bne .L8 + 70 0064 DA44 add r10, r10, fp + 71 0066 06F01F06 and r6, r6, #31 + 72 .L2: + 73 006a D9F80020 ldr r2, [r9] + 74 006e DAF80030 ldr r3, [r10] + 75 0072 C6F12001 rsb r1, r6, #32 + 76 0076 CA40 lsrs r2, r2, r1 + 77 0078 CB40 lsrs r3, r3, r1 + 78 007a 26B9 cbnz r6, .L14 + 79 007c 11E0 b .L9 + 80 .L32: + 81 007e E9B1 cbz r1, .L11 + 82 0080 0135 adds r5, r5, #1 + 83 .L13: + 84 0082 013E subs r6, r6, #1 + 85 0084 0DD0 beq .L9 + 86 .L14: + 87 0086 02F00100 and r0, r2, #1 + 88 008a 03F00101 and r1, r3, #1 + 89 008e 5208 lsrs r2, r2, #1 + 90 0090 5B08 lsrs r3, r3, #1 + 91 0092 0028 cmp r0, #0 + 92 0094 F3D1 bne .L32 + 93 0096 0029 cmp r1, #0 + 94 0098 F3D0 beq .L13 + 95 009a 013E subs r6, r6, #1 + 96 009c 0CF1010C add ip, ip, #1 + 97 00a0 F1D1 bne .L14 + 98 .L9: + 99 00a2 019B ldr r3, [sp, #4] + 100 00a4 1D60 str r5, [r3] + 101 00a6 0C9B ldr r3, [sp, #48] + 102 00a8 C3F800E0 str lr, [r3] + 103 00ac 0D9B ldr r3, [sp, #52] + 104 00ae C3F800C0 str ip, [r3] + 105 00b2 03B0 add sp, sp, #12 + 106 @ sp needed + 107 00b4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 108 .L6: + 109 00b8 0135 adds r5, r5, #1 + 110 00ba C2E7 b .L5 + 111 .L11: + 112 00bc 0EF1010E add lr, lr, #1 + 113 00c0 DFE7 b .L13 + 114 .L15: + 115 00c2 4FF0000C mov ip, #0 + ARM GAS /tmp/ccLiIsYO.s page 3 + + + 116 00c6 8146 mov r9, r0 + 117 00c8 E646 mov lr, ip + 118 00ca 6546 mov r5, ip + 119 00cc CDE7 b .L2 + 121 00ce 00BF .section .text.arm_boolean_distance_TF_FT,"ax",%progbits + 122 .align 1 + 123 .p2align 2,,3 + 124 .global arm_boolean_distance_TF_FT + 125 .syntax unified + 126 .thumb + 127 .thumb_func + 128 .fpu fpv4-sp-d16 + 130 arm_boolean_distance_TF_FT: + 131 @ args = 4, pretend = 0, frame = 0 + 132 @ frame_needed = 0, uses_anonymous_args = 0 + 133 0000 1F2A cmp r2, #31 + 134 0002 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 135 0006 1546 mov r5, r2 + 136 0008 8946 mov r9, r1 + 137 000a 9A46 mov r10, r3 + 138 000c 4AD9 bls .L43 + 139 000e A2F12008 sub r8, r2, #32 + 140 0012 4FEA5818 lsr r8, r8, #5 + 141 0016 08F10108 add r8, r8, #1 + 142 001a 4FF0000E mov lr, #0 + 143 001e 4FEA880B lsl fp, r8, #2 + 144 0022 0F46 mov r7, r1 + 145 0024 00EB8808 add r8, r0, r8, lsl #2 + 146 0028 7446 mov r4, lr + 147 002a 8446 mov ip, r0 + 148 .L38: + 149 002c 5CF8041B ldr r1, [ip], #4 + 150 0030 57F8042B ldr r2, [r7], #4 + 151 0034 2023 movs r3, #32 + 152 0036 02E0 b .L37 + 153 .L52: + 154 0038 B644 add lr, lr, r6 + 155 .L36: + 156 003a 013B subs r3, r3, #1 + 157 003c 0DD0 beq .L51 + 158 .L37: + 159 003e 01F00100 and r0, r1, #1 + 160 0042 02F00106 and r6, r2, #1 + 161 0046 4908 lsrs r1, r1, #1 + 162 0048 5208 lsrs r2, r2, #1 + 163 004a 0028 cmp r0, #0 + 164 004c F4D0 beq .L52 + 165 004e 002E cmp r6, #0 + 166 0050 F3D1 bne .L36 + 167 0052 013B subs r3, r3, #1 + 168 0054 04F10104 add r4, r4, #1 + 169 0058 F1D1 bne .L37 + 170 .L51: + 171 005a C445 cmp ip, r8 + 172 005c E6D1 bne .L38 + 173 005e D944 add r9, r9, fp + 174 0060 05F01F05 and r5, r5, #31 + ARM GAS /tmp/ccLiIsYO.s page 4 + + + 175 .L34: + 176 0064 D8F80020 ldr r2, [r8] + 177 0068 D9F80030 ldr r3, [r9] + 178 006c C5F12001 rsb r1, r5, #32 + 179 0070 CA40 lsrs r2, r2, r1 + 180 0072 CB40 lsrs r3, r3, r1 + 181 0074 25B9 cbnz r5, .L42 + 182 0076 0EE0 b .L39 + 183 .L53: + 184 0078 01B9 cbnz r1, .L41 + 185 007a 0134 adds r4, r4, #1 + 186 .L41: + 187 007c 013D subs r5, r5, #1 + 188 007e 0AD0 beq .L39 + 189 .L42: + 190 0080 02F00100 and r0, r2, #1 + 191 0084 03F00101 and r1, r3, #1 + 192 0088 5208 lsrs r2, r2, #1 + 193 008a 5B08 lsrs r3, r3, #1 + 194 008c 0028 cmp r0, #0 + 195 008e F3D1 bne .L53 + 196 0090 013D subs r5, r5, #1 + 197 0092 8E44 add lr, lr, r1 + 198 0094 F4D1 bne .L42 + 199 .L39: + 200 0096 099B ldr r3, [sp, #36] + 201 0098 CAF80040 str r4, [r10] + 202 009c C3F800E0 str lr, [r3] + 203 00a0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 204 .L43: + 205 00a4 4FF0000E mov lr, #0 + 206 00a8 8046 mov r8, r0 + 207 00aa 7446 mov r4, lr + 208 00ac DAE7 b .L34 + 210 00ae 00BF .section .text.arm_boolean_distance_TT_FF_TF_FT,"ax",%progbits + 211 .align 1 + 212 .p2align 2,,3 + 213 .global arm_boolean_distance_TT_FF_TF_FT + 214 .syntax unified + 215 .thumb + 216 .thumb_func + 217 .fpu fpv4-sp-d16 + 219 arm_boolean_distance_TT_FF_TF_FT: + 220 @ args = 12, pretend = 0, frame = 8 + 221 @ frame_needed = 0, uses_anonymous_args = 0 + 222 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 223 0004 83B0 sub sp, sp, #12 + 224 0006 1F2A cmp r2, #31 + 225 0008 1746 mov r7, r2 + 226 000a 8046 mov r8, r0 + 227 000c 8B46 mov fp, r1 + 228 000e 0193 str r3, [sp, #4] + 229 0010 61D9 bls .L68 + 230 0012 A2F1200A sub r10, r2, #32 + 231 0016 4FEA5A1A lsr r10, r10, #5 + 232 001a 0AF1010A add r10, r10, #1 + 233 001e 4FF0000C mov ip, #0 + ARM GAS /tmp/ccLiIsYO.s page 5 + + + 234 0022 4FEA8A03 lsl r3, r10, #2 + 235 0026 0093 str r3, [sp] + 236 0028 00EB8A0A add r10, r0, r10, lsl #2 + 237 002c 8946 mov r9, r1 + 238 002e E646 mov lr, ip + 239 0030 6546 mov r5, ip + 240 0032 6646 mov r6, ip + 241 .L61: + 242 0034 58F8041B ldr r1, [r8], #4 + 243 0038 59F8042B ldr r2, [r9], #4 + 244 003c 2023 movs r3, #32 + 245 003e 05E0 b .L60 + 246 .L77: + 247 0040 002C cmp r4, #0 + 248 0042 3ED0 beq .L57 + 249 0044 0CF1010C add ip, ip, #1 + 250 .L58: + 251 0048 013B subs r3, r3, #1 + 252 004a 0CD0 beq .L76 + 253 .L60: + 254 004c 01F00100 and r0, r1, #1 + 255 0050 02F00104 and r4, r2, #1 + 256 0054 4908 lsrs r1, r1, #1 + 257 0056 5208 lsrs r2, r2, #1 + 258 0058 0028 cmp r0, #0 + 259 005a F1D0 beq .L77 + 260 005c 9CBB cbnz r4, .L59 + 261 005e 013B subs r3, r3, #1 + 262 0060 0EF1010E add lr, lr, #1 + 263 0064 F2D1 bne .L60 + 264 .L76: + 265 0066 D045 cmp r8, r10 + 266 0068 E4D1 bne .L61 + 267 006a 009B ldr r3, [sp] + 268 006c 07F01F07 and r7, r7, #31 + 269 0070 9B44 add fp, fp, r3 + 270 .L55: + 271 0072 DAF80020 ldr r2, [r10] + 272 0076 DBF80030 ldr r3, [fp] + 273 007a C7F12001 rsb r1, r7, #32 + 274 007e CA40 lsrs r2, r2, r1 + 275 0080 CB40 lsrs r3, r3, r1 + 276 0082 27B9 cbnz r7, .L67 + 277 0084 10E0 b .L62 + 278 .L78: + 279 0086 01B3 cbz r1, .L64 + 280 0088 0136 adds r6, r6, #1 + 281 .L65: + 282 008a 013F subs r7, r7, #1 + 283 008c 0CD0 beq .L62 + 284 .L67: + 285 008e 02F00100 and r0, r2, #1 + 286 0092 03F00101 and r1, r3, #1 + 287 0096 5208 lsrs r2, r2, #1 + 288 0098 5B08 lsrs r3, r3, #1 + 289 009a 0028 cmp r0, #0 + 290 009c F3D1 bne .L78 + ARM GAS /tmp/ccLiIsYO.s page 6 + + + 291 009e B9B9 cbnz r1, .L66 + 292 00a0 013F subs r7, r7, #1 + 293 00a2 05F10105 add r5, r5, #1 + 294 00a6 F2D1 bne .L67 + 295 .L62: + 296 00a8 019B ldr r3, [sp, #4] + 297 00aa 1E60 str r6, [r3] + 298 00ac 0C9B ldr r3, [sp, #48] + 299 00ae 1D60 str r5, [r3] + 300 00b0 0D9B ldr r3, [sp, #52] + 301 00b2 C3F800E0 str lr, [r3] + 302 00b6 0E9B ldr r3, [sp, #56] + 303 00b8 C3F800C0 str ip, [r3] + 304 00bc 03B0 add sp, sp, #12 + 305 @ sp needed + 306 00be BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 307 .L57: + 308 00c2 0135 adds r5, r5, #1 + 309 00c4 C0E7 b .L58 + 310 .L59: + 311 00c6 0136 adds r6, r6, #1 + 312 00c8 BEE7 b .L58 + 313 .L64: + 314 00ca 0EF1010E add lr, lr, #1 + 315 00ce DCE7 b .L65 + 316 .L66: + 317 00d0 0CF1010C add ip, ip, #1 + 318 00d4 D9E7 b .L65 + 319 .L68: + 320 00d6 4FF0000C mov ip, #0 + 321 00da 8246 mov r10, r0 + 322 00dc E646 mov lr, ip + 323 00de 6546 mov r5, ip + 324 00e0 6646 mov r6, ip + 325 00e2 C6E7 b .L55 + 327 .section .text.arm_boolean_distance_TT,"ax",%progbits + 328 .align 1 + 329 .p2align 2,,3 + 330 .global arm_boolean_distance_TT + 331 .syntax unified + 332 .thumb + 333 .thumb_func + 334 .fpu fpv4-sp-d16 + 336 arm_boolean_distance_TT: + 337 @ args = 0, pretend = 0, frame = 0 + 338 @ frame_needed = 0, uses_anonymous_args = 0 + 339 0000 1F2A cmp r2, #31 + 340 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 341 0006 1446 mov r4, r2 + 342 0008 0546 mov r5, r0 + 343 000a 8946 mov r9, r1 + 344 000c 1F46 mov r7, r3 + 345 000e 3AD9 bls .L87 + 346 0010 A2F12008 sub r8, r2, #32 + 347 0014 4FEA5818 lsr r8, r8, #5 + 348 0018 08F10108 add r8, r8, #1 + 349 001c 4FEA880A lsl r10, r8, #2 + ARM GAS /tmp/ccLiIsYO.s page 7 + + + 350 0020 0E46 mov r6, r1 + 351 0022 00EB8808 add r8, r0, r8, lsl #2 + 352 0026 0020 movs r0, #0 + 353 .L83: + 354 0028 55F8042B ldr r2, [r5], #4 + 355 002c 56F8043B ldr r3, [r6], #4 + 356 0030 4FF0200C mov ip, #32 + 357 .L82: + 358 0034 02F00101 and r1, r2, #1 + 359 0038 9E46 mov lr, r3 + 360 003a 5208 lsrs r2, r2, #1 + 361 003c 5B08 lsrs r3, r3, #1 + 362 003e 19B1 cbz r1, .L81 + 363 0040 1EF0010F tst lr, #1 + 364 0044 18BF it ne + 365 0046 0130 addne r0, r0, #1 + 366 .L81: + 367 0048 BCF1010C subs ip, ip, #1 + 368 004c F2D1 bne .L82 + 369 004e 4545 cmp r5, r8 + 370 0050 EAD1 bne .L83 + 371 0052 D144 add r9, r9, r10 + 372 0054 04F01F04 and r4, r4, #31 + 373 .L80: + 374 0058 D8F80010 ldr r1, [r8] + 375 005c D9F80020 ldr r2, [r9] + 376 0060 C4F12003 rsb r3, r4, #32 + 377 0064 D940 lsrs r1, r1, r3 + 378 0066 DA40 lsrs r2, r2, r3 + 379 0068 54B1 cbz r4, .L84 + 380 .L86: + 381 006a 01F00103 and r3, r1, #1 + 382 006e 1546 mov r5, r2 + 383 0070 4908 lsrs r1, r1, #1 + 384 0072 5208 lsrs r2, r2, #1 + 385 0074 13B1 cbz r3, .L85 + 386 0076 EB07 lsls r3, r5, #31 + 387 0078 48BF it mi + 388 007a 0130 addmi r0, r0, #1 + 389 .L85: + 390 007c 013C subs r4, r4, #1 + 391 007e F4D1 bne .L86 + 392 .L84: + 393 0080 3860 str r0, [r7] + 394 0082 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 395 .L87: + 396 0086 8046 mov r8, r0 + 397 0088 0020 movs r0, #0 + 398 008a E5E7 b .L80 + 400 .section .text.arm_braycurtis_distance_f32,"ax",%progbits + 401 .align 1 + 402 .p2align 2,,3 + 403 .global arm_braycurtis_distance_f32 + 404 .syntax unified + 405 .thumb + 406 .thumb_func + 407 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccLiIsYO.s page 8 + + + 409 arm_braycurtis_distance_f32: + 410 @ args = 0, pretend = 0, frame = 0 + 411 @ frame_needed = 0, uses_anonymous_args = 0 + 412 @ link register save eliminated. + 413 0000 9FED0C6A vldr.32 s12, .L112 + 414 0004 B0EE460A vmov.f32 s0, s12 + 415 0008 8AB1 cbz r2, .L108 + 416 .L109: + 417 000a F0EC017A vldmia.32 r0!, {s15} + 418 000e F1EC016A vldmia.32 r1!, {s13} + 419 0012 37EEE67A vsub.f32 s14, s15, s13 + 420 0016 77EEA67A vadd.f32 s15, s15, s13 + 421 001a B0EEC77A vabs.f32 s14, s14 + 422 001e F0EEE77A vabs.f32 s15, s15 + 423 0022 013A subs r2, r2, #1 + 424 0024 30EE070A vadd.f32 s0, s0, s14 + 425 0028 36EE276A vadd.f32 s12, s12, s15 + 426 002c EDD1 bne .L109 + 427 .L108: + 428 002e 80EE060A vdiv.f32 s0, s0, s12 + 429 0032 7047 bx lr + 430 .L113: + 431 .align 2 + 432 .L112: + 433 0034 00000000 .word 0 + 435 .section .text.arm_canberra_distance_f32,"ax",%progbits + 436 .align 1 + 437 .p2align 2,,3 + 438 .global arm_canberra_distance_f32 + 439 .syntax unified + 440 .thumb + 441 .thumb_func + 442 .fpu fpv4-sp-d16 + 444 arm_canberra_distance_f32: + 445 @ args = 0, pretend = 0, frame = 0 + 446 @ frame_needed = 0, uses_anonymous_args = 0 + 447 @ link register save eliminated. + 448 0000 9FED110A vldr.32 s0, .L121 + 449 0004 F2B1 cbz r2, .L119 + 450 .L118: + 451 0006 F0EC017A vldmia.32 r0!, {s15} + 452 000a B1EC016A vldmia.32 r1!, {s12} + 453 000e F5EE407A vcmp.f32 s15, #0 + 454 0012 77EEC66A vsub.f32 s13, s15, s12 + 455 0016 F0EEC65A vabs.f32 s11, s12 + 456 001a B0EEE77A vabs.f32 s14, s15 + 457 001e F1EE10FA vmrs APSR_nzcv, FPSCR + 458 0022 37EE257A vadd.f32 s14, s14, s11 + 459 0026 F0EEE66A vabs.f32 s13, s13 + 460 002a 04D1 bne .L116 + 461 002c B5EE406A vcmp.f32 s12, #0 + 462 0030 F1EE10FA vmrs APSR_nzcv, FPSCR + 463 0034 03D0 beq .L117 + 464 .L116: + 465 0036 C6EE877A vdiv.f32 s15, s13, s14 + 466 003a 30EE270A vadd.f32 s0, s0, s15 + 467 .L117: + ARM GAS /tmp/ccLiIsYO.s page 9 + + + 468 003e 013A subs r2, r2, #1 + 469 0040 E1D1 bne .L118 + 470 0042 7047 bx lr + 471 .L119: + 472 0044 7047 bx lr + 473 .L122: + 474 0046 00BF .align 2 + 475 .L121: + 476 0048 00000000 .word 0 + 478 .section .text.arm_chebyshev_distance_f32,"ax",%progbits + 479 .align 1 + 480 .p2align 2,,3 + 481 .global arm_chebyshev_distance_f32 + 482 .syntax unified + 483 .thumb + 484 .thumb_func + 485 .fpu fpv4-sp-d16 + 487 arm_chebyshev_distance_f32: + 488 @ args = 0, pretend = 0, frame = 0 + 489 @ frame_needed = 0, uses_anonymous_args = 0 + 490 @ link register save eliminated. + 491 0000 B0EC010A vldmia.32 r0!, {s0} + 492 0004 F1EC017A vldmia.32 r1!, {s15} + 493 0008 30EE670A vsub.f32 s0, s0, s15 + 494 000c 013A subs r2, r2, #1 + 495 000e B0EEC00A vabs.f32 s0, s0 + 496 0012 10D0 beq .L123 + 497 .L126: + 498 0014 F0EC017A vldmia.32 r0!, {s15} + 499 0018 B1EC017A vldmia.32 r1!, {s14} + 500 001c 77EEC77A vsub.f32 s15, s15, s14 + 501 0020 F0EEE77A vabs.f32 s15, s15 + 502 0024 B4EE670A vcmp.f32 s0, s15 + 503 0028 F1EE10FA vmrs APSR_nzcv, FPSCR + 504 002c 48BF it mi + 505 002e B0EE670A vmovmi.f32 s0, s15 + 506 0032 013A subs r2, r2, #1 + 507 0034 EED1 bne .L126 + 508 .L123: + 509 0036 7047 bx lr + 511 .section .text.arm_cityblock_distance_f32,"ax",%progbits + 512 .align 1 + 513 .p2align 2,,3 + 514 .global arm_cityblock_distance_f32 + 515 .syntax unified + 516 .thumb + 517 .thumb_func + 518 .fpu fpv4-sp-d16 + 520 arm_cityblock_distance_f32: + 521 @ args = 0, pretend = 0, frame = 0 + 522 @ frame_needed = 0, uses_anonymous_args = 0 + 523 @ link register save eliminated. + 524 0000 9FED080A vldr.32 s0, .L137 + 525 0004 62B1 cbz r2, .L135 + 526 .L134: + 527 0006 F0EC017A vldmia.32 r0!, {s15} + 528 000a B1EC017A vldmia.32 r1!, {s14} + ARM GAS /tmp/ccLiIsYO.s page 10 + + + 529 000e 77EEC77A vsub.f32 s15, s15, s14 + 530 0012 013A subs r2, r2, #1 + 531 0014 F0EEE77A vabs.f32 s15, s15 + 532 0018 30EE270A vadd.f32 s0, s0, s15 + 533 001c F3D1 bne .L134 + 534 001e 7047 bx lr + 535 .L135: + 536 0020 7047 bx lr + 537 .L138: + 538 0022 00BF .align 2 + 539 .L137: + 540 0024 00000000 .word 0 + 542 .section .text.arm_correlation_distance_f32,"ax",%progbits + 543 .align 1 + 544 .p2align 2,,3 + 545 .global arm_correlation_distance_f32 + 546 .syntax unified + 547 .thumb + 548 .thumb_func + 549 .fpu fpv4-sp-d16 + 551 arm_correlation_distance_f32: + 552 @ args = 0, pretend = 0, frame = 24 + 553 @ frame_needed = 0, uses_anonymous_args = 0 + 554 0000 70B5 push {r4, r5, r6, lr} + 555 0002 1446 mov r4, r2 + 556 0004 86B0 sub sp, sp, #24 + 557 0006 0D46 mov r5, r1 + 558 0008 01AA add r2, sp, #4 + 559 000a 2146 mov r1, r4 + 560 000c 0646 mov r6, r0 + 561 000e FFF7FEFF bl arm_mean_f32 + 562 0012 02AA add r2, sp, #8 + 563 0014 2146 mov r1, r4 + 564 0016 2846 mov r0, r5 + 565 0018 FFF7FEFF bl arm_mean_f32 + 566 001c 9DED010A vldr.32 s0, [sp, #4] + 567 0020 2246 mov r2, r4 + 568 0022 3146 mov r1, r6 + 569 0024 B1EE400A vneg.f32 s0, s0 + 570 0028 3046 mov r0, r6 + 571 002a FFF7FEFF bl arm_offset_f32 + 572 002e 9DED020A vldr.32 s0, [sp, #8] + 573 0032 2246 mov r2, r4 + 574 0034 B1EE400A vneg.f32 s0, s0 + 575 0038 2946 mov r1, r5 + 576 003a 2846 mov r0, r5 + 577 003c FFF7FEFF bl arm_offset_f32 + 578 0040 03AA add r2, sp, #12 + 579 0042 2146 mov r1, r4 + 580 0044 3046 mov r0, r6 + 581 0046 FFF7FEFF bl arm_power_f32 + 582 004a 04AA add r2, sp, #16 + 583 004c 2146 mov r1, r4 + 584 004e 2846 mov r0, r5 + 585 0050 FFF7FEFF bl arm_power_f32 + 586 0054 05AB add r3, sp, #20 + 587 0056 2246 mov r2, r4 + ARM GAS /tmp/ccLiIsYO.s page 11 + + + 588 0058 2946 mov r1, r5 + 589 005a 3046 mov r0, r6 + 590 005c FFF7FEFF bl arm_dot_prod_f32 + 591 0060 07EE904A vmov s15, r4 @ int + 592 0064 DDED036A vldr.32 s13, [sp, #12] + 593 0068 9DED047A vldr.32 s14, [sp, #16] + 594 006c 9DED056A vldr.32 s12, [sp, #20] + 595 0070 F8EE677A vcvt.f32.u32 s15, s15 + 596 0074 86EEA70A vdiv.f32 s0, s13, s15 + 597 0078 C7EE276A vdiv.f32 s13, s14, s15 + 598 007c 86EE277A vdiv.f32 s14, s12, s15 + 599 0080 8DED030A vstr.32 s0, [sp, #12] + 600 0084 20EE260A vmul.f32 s0, s0, s13 + 601 0088 CDED046A vstr.32 s13, [sp, #16] + 602 008c B5EEC00A vcmpe.f32 s0, #0 + 603 0090 F1EE10FA vmrs APSR_nzcv, FPSCR + 604 0094 8DED057A vstr.32 s14, [sp, #20] + 605 0098 0EDB blt .L147 + 606 009a B5EE400A vcmp.f32 s0, #0 + 607 009e F1EE10FA vmrs APSR_nzcv, FPSCR + 608 00a2 0CD4 bmi .L148 + 609 00a4 F1EEC07A vsqrt.f32 s15, s0 + 610 .L140: + 611 00a8 C7EE276A vdiv.f32 s13, s14, s15 + 612 00ac B7EE000A vmov.f32 s0, #1.0e+0 + 613 00b0 30EE660A vsub.f32 s0, s0, s13 + 614 00b4 06B0 add sp, sp, #24 + 615 @ sp needed + 616 00b6 70BD pop {r4, r5, r6, pc} + 617 .L147: + 618 00b8 DFED047A vldr.32 s15, .L150 + 619 00bc F4E7 b .L140 + 620 .L148: + 621 00be FFF7FEFF bl sqrtf + 622 00c2 9DED057A vldr.32 s14, [sp, #20] + 623 00c6 F0EE407A vmov.f32 s15, s0 + 624 00ca EDE7 b .L140 + 625 .L151: + 626 .align 2 + 627 .L150: + 628 00cc 00000000 .word 0 + 630 .section .text.arm_cosine_distance_f32,"ax",%progbits + 631 .align 1 + 632 .p2align 2,,3 + 633 .global arm_cosine_distance_f32 + 634 .syntax unified + 635 .thumb + 636 .thumb_func + 637 .fpu fpv4-sp-d16 + 639 arm_cosine_distance_f32: + 640 @ args = 0, pretend = 0, frame = 16 + 641 @ frame_needed = 0, uses_anonymous_args = 0 + 642 0000 70B5 push {r4, r5, r6, lr} + 643 0002 1446 mov r4, r2 + 644 0004 84B0 sub sp, sp, #16 + 645 0006 0D46 mov r5, r1 + 646 0008 01AA add r2, sp, #4 + ARM GAS /tmp/ccLiIsYO.s page 12 + + + 647 000a 2146 mov r1, r4 + 648 000c 0646 mov r6, r0 + 649 000e FFF7FEFF bl arm_power_f32 + 650 0012 02AA add r2, sp, #8 + 651 0014 2146 mov r1, r4 + 652 0016 2846 mov r0, r5 + 653 0018 FFF7FEFF bl arm_power_f32 + 654 001c 03AB add r3, sp, #12 + 655 001e 2246 mov r2, r4 + 656 0020 2946 mov r1, r5 + 657 0022 3046 mov r0, r6 + 658 0024 FFF7FEFF bl arm_dot_prod_f32 + 659 0028 9DED010A vldr.32 s0, [sp, #4] + 660 002c DDED027A vldr.32 s15, [sp, #8] + 661 0030 20EE270A vmul.f32 s0, s0, s15 + 662 0034 B5EEC00A vcmpe.f32 s0, #0 + 663 0038 F1EE10FA vmrs APSR_nzcv, FPSCR + 664 003c 10DB blt .L160 + 665 003e B5EE400A vcmp.f32 s0, #0 + 666 0042 F1EE10FA vmrs APSR_nzcv, FPSCR + 667 0046 0ED4 bmi .L161 + 668 0048 F1EEC07A vsqrt.f32 s15, s0 + 669 .L153: + 670 004c DDED036A vldr.32 s13, [sp, #12] + 671 0050 86EEA77A vdiv.f32 s14, s13, s15 + 672 0054 B7EE000A vmov.f32 s0, #1.0e+0 + 673 0058 30EE470A vsub.f32 s0, s0, s14 + 674 005c 04B0 add sp, sp, #16 + 675 @ sp needed + 676 005e 70BD pop {r4, r5, r6, pc} + 677 .L160: + 678 0060 DFED037A vldr.32 s15, .L163 + 679 0064 F2E7 b .L153 + 680 .L161: + 681 0066 FFF7FEFF bl sqrtf + 682 006a F0EE407A vmov.f32 s15, s0 + 683 006e EDE7 b .L153 + 684 .L164: + 685 .align 2 + 686 .L163: + 687 0070 00000000 .word 0 + 689 .global __aeabi_ui2d + 690 .global __aeabi_dadd + 691 .global __aeabi_ddiv + 692 .global __aeabi_d2f + 693 .section .text.arm_dice_distance,"ax",%progbits + 694 .align 1 + 695 .p2align 2,,3 + 696 .global arm_dice_distance + 697 .syntax unified + 698 .thumb + 699 .thumb_func + 700 .fpu fpv4-sp-d16 + 702 arm_dice_distance: + 703 @ args = 0, pretend = 0, frame = 16 + 704 @ frame_needed = 0, uses_anonymous_args = 0 + 705 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + ARM GAS /tmp/ccLiIsYO.s page 13 + + + 706 0004 86B0 sub sp, sp, #24 + 707 0006 05AD add r5, sp, #20 + 708 0008 04AB add r3, sp, #16 + 709 000a CDE90035 strd r3, r5, [sp] + 710 000e 0024 movs r4, #0 + 711 0010 03AB add r3, sp, #12 + 712 0012 CDE90344 strd r4, r4, [sp, #12] + 713 0016 0594 str r4, [sp, #20] + 714 0018 FFF7FEFF bl arm_boolean_distance_TT_TF_FT + 715 001c DDE90487 ldrd r8, r7, [sp, #16] + 716 0020 08EB0700 add r0, r8, r7 + 717 0024 FFF7FEFF bl __aeabi_ui2d + 718 0028 0446 mov r4, r0 + 719 002a 0398 ldr r0, [sp, #12] + 720 002c 0D46 mov r5, r1 + 721 002e FFF7FEFF bl __aeabi_ui2d + 722 0032 0B46 mov r3, r1 + 723 0034 0246 mov r2, r0 + 724 0036 FFF7FEFF bl __aeabi_dadd + 725 003a 0246 mov r2, r0 + 726 003c 3846 mov r0, r7 + 727 003e 1646 mov r6, r2 + 728 0040 0F46 mov r7, r1 + 729 0042 FFF7FEFF bl __aeabi_ui2d + 730 0046 0246 mov r2, r0 + 731 0048 0B46 mov r3, r1 + 732 004a 3046 mov r0, r6 + 733 004c 3946 mov r1, r7 + 734 004e FFF7FEFF bl __aeabi_dadd + 735 0052 0646 mov r6, r0 + 736 0054 4046 mov r0, r8 + 737 0056 0F46 mov r7, r1 + 738 0058 FFF7FEFF bl __aeabi_ui2d + 739 005c 0246 mov r2, r0 + 740 005e 0B46 mov r3, r1 + 741 0060 3046 mov r0, r6 + 742 0062 3946 mov r1, r7 + 743 0064 FFF7FEFF bl __aeabi_dadd + 744 0068 0246 mov r2, r0 + 745 006a 0B46 mov r3, r1 + 746 006c 2046 mov r0, r4 + 747 006e 2946 mov r1, r5 + 748 0070 FFF7FEFF bl __aeabi_ddiv + 749 0074 FFF7FEFF bl __aeabi_d2f + 750 0078 00EE100A vmov s0, r0 + 751 007c 06B0 add sp, sp, #24 + 752 @ sp needed + 753 007e BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 755 0082 00BF .section .text.arm_euclidean_distance_f32,"ax",%progbits + 756 .align 1 + 757 .p2align 2,,3 + 758 .global arm_euclidean_distance_f32 + 759 .syntax unified + 760 .thumb + 761 .thumb_func + 762 .fpu fpv4-sp-d16 + 764 arm_euclidean_distance_f32: + ARM GAS /tmp/ccLiIsYO.s page 14 + + + 765 @ args = 0, pretend = 0, frame = 0 + 766 @ frame_needed = 0, uses_anonymous_args = 0 + 767 @ link register save eliminated. + 768 0000 9FED107A vldr.32 s14, .L181 + 769 0004 9AB1 cbz r2, .L168 + 770 .L169: + 771 0006 F0EC017A vldmia.32 r0!, {s15} + 772 000a F1EC016A vldmia.32 r1!, {s13} + 773 000e 77EEE67A vsub.f32 s15, s15, s13 + 774 0012 013A subs r2, r2, #1 + 775 0014 A7EEA77A vfma.f32 s14, s15, s15 + 776 0018 F5D1 bne .L169 + 777 001a B5EEC07A vcmpe.f32 s14, #0 + 778 001e F1EE10FA vmrs APSR_nzcv, FPSCR + 779 0022 07DB blt .L178 + 780 0024 B5EE407A vcmp.f32 s14, #0 + 781 0028 F1EE10FA vmrs APSR_nzcv, FPSCR + 782 002c 05D4 bmi .L180 + 783 .L168: + 784 002e B1EEC70A vsqrt.f32 s0, s14 + 785 0032 7047 bx lr + 786 .L178: + 787 0034 9FED030A vldr.32 s0, .L181 + 788 0038 7047 bx lr + 789 .L180: + 790 003a B0EE470A vmov.f32 s0, s14 + 791 003e FFF7FEBF b sqrtf + 792 .L182: + 793 0042 00BF .align 2 + 794 .L181: + 795 0044 00000000 .word 0 + 797 .section .text.arm_hamming_distance,"ax",%progbits + 798 .align 1 + 799 .p2align 2,,3 + 800 .global arm_hamming_distance + 801 .syntax unified + 802 .thumb + 803 .thumb_func + 804 .fpu fpv4-sp-d16 + 806 arm_hamming_distance: + 807 @ args = 0, pretend = 0, frame = 8 + 808 @ frame_needed = 0, uses_anonymous_args = 0 + 809 0000 70B5 push {r4, r5, r6, lr} + 810 0002 0023 movs r3, #0 + 811 0004 84B0 sub sp, sp, #16 + 812 0006 CDE90233 strd r3, r3, [sp, #8] + 813 000a 03AB add r3, sp, #12 + 814 000c 0093 str r3, [sp] + 815 000e 02AB add r3, sp, #8 + 816 0010 1646 mov r6, r2 + 817 0012 FFF7FEFF bl arm_boolean_distance_TF_FT + 818 0016 DDE90203 ldrd r0, r3, [sp, #8] + 819 001a 1844 add r0, r0, r3 + 820 001c FFF7FEFF bl __aeabi_ui2d + 821 0020 0446 mov r4, r0 + 822 0022 3046 mov r0, r6 + 823 0024 0D46 mov r5, r1 + ARM GAS /tmp/ccLiIsYO.s page 15 + + + 824 0026 FFF7FEFF bl __aeabi_ui2d + 825 002a 0246 mov r2, r0 + 826 002c 0B46 mov r3, r1 + 827 002e 2046 mov r0, r4 + 828 0030 2946 mov r1, r5 + 829 0032 FFF7FEFF bl __aeabi_ddiv + 830 0036 FFF7FEFF bl __aeabi_d2f + 831 003a 00EE100A vmov s0, r0 + 832 003e 04B0 add sp, sp, #16 + 833 @ sp needed + 834 0040 70BD pop {r4, r5, r6, pc} + 836 0042 00BF .section .text.arm_jaccard_distance,"ax",%progbits + 837 .align 1 + 838 .p2align 2,,3 + 839 .global arm_jaccard_distance + 840 .syntax unified + 841 .thumb + 842 .thumb_func + 843 .fpu fpv4-sp-d16 + 845 arm_jaccard_distance: + 846 @ args = 0, pretend = 0, frame = 16 + 847 @ frame_needed = 0, uses_anonymous_args = 0 + 848 0000 D0B5 push {r4, r6, r7, lr} + 849 0002 86B0 sub sp, sp, #24 + 850 0004 05AE add r6, sp, #20 + 851 0006 04AB add r3, sp, #16 + 852 0008 CDE90036 strd r3, r6, [sp] + 853 000c 0024 movs r4, #0 + 854 000e 03AB add r3, sp, #12 + 855 0010 CDE90344 strd r4, r4, [sp, #12] + 856 0014 0594 str r4, [sp, #20] + 857 0016 FFF7FEFF bl arm_boolean_distance_TT_TF_FT + 858 001a DDE90443 ldrd r4, r3, [sp, #16] + 859 001e 1C44 add r4, r4, r3 + 860 0020 2046 mov r0, r4 + 861 0022 FFF7FEFF bl __aeabi_ui2d + 862 0026 039B ldr r3, [sp, #12] + 863 0028 0646 mov r6, r0 + 864 002a E018 adds r0, r4, r3 + 865 002c 0F46 mov r7, r1 + 866 002e FFF7FEFF bl __aeabi_ui2d + 867 0032 0246 mov r2, r0 + 868 0034 0B46 mov r3, r1 + 869 0036 3046 mov r0, r6 + 870 0038 3946 mov r1, r7 + 871 003a FFF7FEFF bl __aeabi_ddiv + 872 003e FFF7FEFF bl __aeabi_d2f + 873 0042 00EE100A vmov s0, r0 + 874 0046 06B0 add sp, sp, #24 + 875 @ sp needed + 876 0048 D0BD pop {r4, r6, r7, pc} + 878 004a 00BF .section .text.arm_jensenshannon_distance_f32,"ax",%progbits + 879 .align 1 + 880 .p2align 2,,3 + 881 .global arm_jensenshannon_distance_f32 + 882 .syntax unified + 883 .thumb + ARM GAS /tmp/ccLiIsYO.s page 16 + + + 884 .thumb_func + 885 .fpu fpv4-sp-d16 + 887 arm_jensenshannon_distance_f32: + 888 @ args = 0, pretend = 0, frame = 0 + 889 @ frame_needed = 0, uses_anonymous_args = 0 + 890 0000 70B5 push {r4, r5, r6, lr} + 891 0002 2DED068B vpush.64 {d8, d9, d10} + 892 0006 A2B3 cbz r2, .L194 + 893 0008 9FED21AA vldr.32 s20, .L202 + 894 000c 0446 mov r4, r0 + 895 000e F0EE4A9A vmov.f32 s19, s20 + 896 0012 0D46 mov r5, r1 + 897 0014 00EB8206 add r6, r0, r2, lsl #2 + 898 0018 F6EE00AA vmov.f32 s21, #5.0e-1 + 899 .L189: + 900 001c F4EC018A vldmia.32 r4!, {s17} + 901 0020 95ED008A vldr.32 s16, [r5] + 902 0024 38EE888A vadd.f32 s16, s17, s16 + 903 0028 28EE2A8A vmul.f32 s16, s16, s21 + 904 002c 88EE880A vdiv.f32 s0, s17, s16 + 905 0030 FFF7FEFF bl logf + 906 0034 B5EC019A vldmia.32 r5!, {s18} + 907 0038 E8EE809A vfma.f32 s19, s17, s0 + 908 003c 89EE080A vdiv.f32 s0, s18, s16 + 909 0040 FFF7FEFF bl logf + 910 0044 B442 cmp r4, r6 + 911 0046 A9EE00AA vfma.f32 s20, s18, s0 + 912 004a E7D1 bne .L189 + 913 004c 79EE8A9A vadd.f32 s19, s19, s20 + 914 0050 69EEAA9A vmul.f32 s19, s19, s21 + 915 0054 F5EEC09A vcmpe.f32 s19, #0 + 916 0058 F1EE10FA vmrs APSR_nzcv, FPSCR + 917 005c 0CDB blt .L198 + 918 005e F5EE409A vcmp.f32 s19, #0 + 919 0062 F1EE10FA vmrs APSR_nzcv, FPSCR + 920 0066 0AD4 bmi .L201 + 921 .L188: + 922 0068 B1EEE90A vsqrt.f32 s0, s19 + 923 .L187: + 924 006c BDEC068B vldm sp!, {d8-d10} + 925 0070 70BD pop {r4, r5, r6, pc} + 926 .L194: + 927 0072 DFED079A vldr.32 s19, .L202 + 928 0076 F7E7 b .L188 + 929 .L198: + 930 0078 9FED050A vldr.32 s0, .L202 + 931 007c F6E7 b .L187 + 932 .L201: + 933 007e B0EE690A vmov.f32 s0, s19 + 934 0082 BDEC068B vldm sp!, {d8-d10} + 935 0086 BDE87040 pop {r4, r5, r6, lr} + 936 008a FFF7FEBF b sqrtf + 937 .L203: + 938 008e 00BF .align 2 + 939 .L202: + 940 0090 00000000 .word 0 + 942 .section .text.arm_kulsinski_distance,"ax",%progbits + ARM GAS /tmp/ccLiIsYO.s page 17 + + + 943 .align 1 + 944 .p2align 2,,3 + 945 .global arm_kulsinski_distance + 946 .syntax unified + 947 .thumb + 948 .thumb_func + 949 .fpu fpv4-sp-d16 + 951 arm_kulsinski_distance: + 952 @ args = 0, pretend = 0, frame = 16 + 953 @ frame_needed = 0, uses_anonymous_args = 0 + 954 0000 30B5 push {r4, r5, lr} + 955 0002 87B0 sub sp, sp, #28 + 956 0004 0023 movs r3, #0 + 957 0006 CDE90333 strd r3, r3, [sp, #12] + 958 000a 0593 str r3, [sp, #20] + 959 000c 05AB add r3, sp, #20 + 960 000e 0193 str r3, [sp, #4] + 961 0010 04AB add r3, sp, #16 + 962 0012 0093 str r3, [sp] + 963 0014 03AB add r3, sp, #12 + 964 0016 1446 mov r4, r2 + 965 0018 FFF7FEFF bl arm_boolean_distance_TT_TF_FT + 966 001c DDE90453 ldrd r5, r3, [sp, #16] + 967 0020 0398 ldr r0, [sp, #12] + 968 0022 1D44 add r5, r5, r3 + 969 0024 281A subs r0, r5, r0 + 970 0026 2044 add r0, r0, r4 + 971 0028 FFF7FEFF bl __aeabi_ui2d + 972 002c 0246 mov r2, r0 + 973 002e 2819 adds r0, r5, r4 + 974 0030 1446 mov r4, r2 + 975 0032 0D46 mov r5, r1 + 976 0034 FFF7FEFF bl __aeabi_ui2d + 977 0038 0246 mov r2, r0 + 978 003a 0B46 mov r3, r1 + 979 003c 2046 mov r0, r4 + 980 003e 2946 mov r1, r5 + 981 0040 FFF7FEFF bl __aeabi_ddiv + 982 0044 FFF7FEFF bl __aeabi_d2f + 983 0048 00EE100A vmov s0, r0 + 984 004c 07B0 add sp, sp, #28 + 985 @ sp needed + 986 004e 30BD pop {r4, r5, pc} + 988 .section .text.arm_minkowski_distance_f32,"ax",%progbits + 989 .align 1 + 990 .p2align 2,,3 + 991 .global arm_minkowski_distance_f32 + 992 .syntax unified + 993 .thumb + 994 .thumb_func + 995 .fpu fpv4-sp-d16 + 997 arm_minkowski_distance_f32: + 998 @ args = 0, pretend = 0, frame = 0 + 999 @ frame_needed = 0, uses_anonymous_args = 0 + 1000 0000 70B5 push {r4, r5, r6, lr} + 1001 0002 2DED028B vpush.64 {d8} + 1002 0006 08EE902A vmov s17, r2 @ int + ARM GAS /tmp/ccLiIsYO.s page 18 + + + 1003 000a 1BB3 cbz r3, .L207 + 1004 000c F8EEE88A vcvt.f32.s32 s17, s17 + 1005 0010 9FED138A vldr.32 s16, .L212 + 1006 0014 0446 mov r4, r0 + 1007 0016 0D46 mov r5, r1 + 1008 0018 00EB8306 add r6, r0, r3, lsl #2 + 1009 .L208: + 1010 001c B4EC010A vldmia.32 r4!, {s0} + 1011 0020 F5EC017A vldmia.32 r5!, {s15} + 1012 0024 30EE670A vsub.f32 s0, s0, s15 + 1013 0028 F0EE680A vmov.f32 s1, s17 + 1014 002c B0EEC00A vabs.f32 s0, s0 + 1015 0030 FFF7FEFF bl powf + 1016 0034 B442 cmp r4, r6 + 1017 0036 38EE008A vadd.f32 s16, s16, s0 + 1018 003a EFD1 bne .L208 + 1019 .L209: + 1020 003c F7EE000A vmov.f32 s1, #1.0e+0 + 1021 0040 C0EEA80A vdiv.f32 s1, s1, s17 + 1022 0044 B0EE480A vmov.f32 s0, s16 + 1023 0048 BDEC028B vldm sp!, {d8} + 1024 004c BDE87040 pop {r4, r5, r6, lr} + 1025 0050 FFF7FEBF b powf + 1026 .L207: + 1027 0054 F8EEE88A vcvt.f32.s32 s17, s17 + 1028 0058 9FED018A vldr.32 s16, .L212 + 1029 005c EEE7 b .L209 + 1030 .L213: + 1031 005e 00BF .align 2 + 1032 .L212: + 1033 0060 00000000 .word 0 + 1035 .section .text.arm_rogerstanimoto_distance,"ax",%progbits + 1036 .align 1 + 1037 .p2align 2,,3 + 1038 .global arm_rogerstanimoto_distance + 1039 .syntax unified + 1040 .thumb + 1041 .thumb_func + 1042 .fpu fpv4-sp-d16 + 1044 arm_rogerstanimoto_distance: + 1045 @ args = 0, pretend = 0, frame = 16 + 1046 @ frame_needed = 0, uses_anonymous_args = 0 + 1047 0000 D0B5 push {r4, r6, r7, lr} + 1048 0002 88B0 sub sp, sp, #32 + 1049 0004 07AE add r6, sp, #28 + 1050 0006 06AB add r3, sp, #24 + 1051 0008 CDE90136 strd r3, r6, [sp, #4] + 1052 000c 05AB add r3, sp, #20 + 1053 000e 0024 movs r4, #0 + 1054 0010 0093 str r3, [sp] + 1055 0012 04AB add r3, sp, #16 + 1056 0014 CDE90444 strd r4, r4, [sp, #16] + 1057 0018 CDE90644 strd r4, r4, [sp, #24] + 1058 001c FFF7FEFF bl arm_boolean_distance_TT_FF_TF_FT + 1059 0020 DDE90643 ldrd r4, r3, [sp, #24] + 1060 0024 1C44 add r4, r4, r3 + 1061 0026 6400 lsls r4, r4, #1 + ARM GAS /tmp/ccLiIsYO.s page 19 + + + 1062 0028 2046 mov r0, r4 + 1063 002a FFF7FEFF bl __aeabi_ui2d + 1064 002e DDE90432 ldrd r3, r2, [sp, #16] + 1065 0032 0646 mov r6, r0 + 1066 0034 9818 adds r0, r3, r2 + 1067 0036 2044 add r0, r0, r4 + 1068 0038 0F46 mov r7, r1 + 1069 003a FFF7FEFF bl __aeabi_ui2d + 1070 003e 0246 mov r2, r0 + 1071 0040 0B46 mov r3, r1 + 1072 0042 3046 mov r0, r6 + 1073 0044 3946 mov r1, r7 + 1074 0046 FFF7FEFF bl __aeabi_ddiv + 1075 004a FFF7FEFF bl __aeabi_d2f + 1076 004e 00EE100A vmov s0, r0 + 1077 0052 08B0 add sp, sp, #32 + 1078 @ sp needed + 1079 0054 D0BD pop {r4, r6, r7, pc} + 1081 .global __aeabi_f2d + 1082 0056 00BF .section .text.arm_russellrao_distance,"ax",%progbits + 1083 .align 1 + 1084 .p2align 2,,3 + 1085 .global arm_russellrao_distance + 1086 .syntax unified + 1087 .thumb + 1088 .thumb_func + 1089 .fpu fpv4-sp-d16 + 1091 arm_russellrao_distance: + 1092 @ args = 0, pretend = 0, frame = 8 + 1093 @ frame_needed = 0, uses_anonymous_args = 0 + 1094 0000 30B5 push {r4, r5, lr} + 1095 0002 83B0 sub sp, sp, #12 + 1096 0004 0023 movs r3, #0 + 1097 0006 0193 str r3, [sp, #4] + 1098 0008 01AB add r3, sp, #4 + 1099 000a 1446 mov r4, r2 + 1100 000c FFF7FEFF bl arm_boolean_distance_TT + 1101 0010 0198 ldr r0, [sp, #4] + 1102 0012 201A subs r0, r4, r0 + 1103 0014 FFF7FEFF bl __aeabi_ui2d + 1104 0018 07EE904A vmov s15, r4 @ int + 1105 001c F8EE677A vcvt.f32.u32 s15, s15 + 1106 0020 0246 mov r2, r0 + 1107 0022 17EE900A vmov r0, s15 + 1108 0026 1446 mov r4, r2 + 1109 0028 0D46 mov r5, r1 + 1110 002a FFF7FEFF bl __aeabi_f2d + 1111 002e 0246 mov r2, r0 + 1112 0030 0B46 mov r3, r1 + 1113 0032 2046 mov r0, r4 + 1114 0034 2946 mov r1, r5 + 1115 0036 FFF7FEFF bl __aeabi_ddiv + 1116 003a FFF7FEFF bl __aeabi_d2f + 1117 003e 00EE100A vmov s0, r0 + 1118 0042 03B0 add sp, sp, #12 + 1119 @ sp needed + 1120 0044 30BD pop {r4, r5, pc} + ARM GAS /tmp/ccLiIsYO.s page 20 + + + 1122 0046 00BF .section .text.arm_sokalmichener_distance,"ax",%progbits + 1123 .align 1 + 1124 .p2align 2,,3 + 1125 .global arm_sokalmichener_distance + 1126 .syntax unified + 1127 .thumb + 1128 .thumb_func + 1129 .fpu fpv4-sp-d16 + 1131 arm_sokalmichener_distance: + 1132 @ args = 0, pretend = 0, frame = 16 + 1133 @ frame_needed = 0, uses_anonymous_args = 0 + 1134 0000 30B5 push {r4, r5, lr} + 1135 0002 2DED028B vpush.64 {d8} + 1136 0006 89B0 sub sp, sp, #36 + 1137 0008 07AB add r3, sp, #28 + 1138 000a 06AD add r5, sp, #24 + 1139 000c CDE90135 strd r3, r5, [sp, #4] + 1140 0010 05AB add r3, sp, #20 + 1141 0012 0024 movs r4, #0 + 1142 0014 0093 str r3, [sp] + 1143 0016 04AB add r3, sp, #16 + 1144 0018 CDE90444 strd r4, r4, [sp, #16] + 1145 001c CDE90644 strd r4, r4, [sp, #24] + 1146 0020 FFF7FEFF bl arm_boolean_distance_TT_FF_TF_FT + 1147 0024 DDE90630 ldrd r3, r0, [sp, #24] + 1148 0028 1844 add r0, r0, r3 + 1149 002a FFF7FEFF bl __aeabi_ui2d + 1150 002e 0246 mov r2, r0 + 1151 0030 0B46 mov r3, r1 + 1152 0032 FFF7FEFF bl __aeabi_dadd + 1153 0036 FFF7FEFF bl __aeabi_d2f + 1154 003a DDE90432 ldrd r3, r2, [sp, #16] + 1155 003e 08EE100A vmov s16, r0 + 1156 0042 D018 adds r0, r2, r3 + 1157 0044 FFF7FEFF bl __aeabi_ui2d + 1158 0048 FFF7FEFF bl __aeabi_d2f + 1159 004c 07EE900A vmov s15, r0 + 1160 0050 37EE880A vadd.f32 s0, s15, s16 + 1161 0054 88EE000A vdiv.f32 s0, s16, s0 + 1162 0058 09B0 add sp, sp, #36 + 1163 @ sp needed + 1164 005a BDEC028B vldm sp!, {d8} + 1165 005e 30BD pop {r4, r5, pc} + 1167 .section .text.arm_sokalsneath_distance,"ax",%progbits + 1168 .align 1 + 1169 .p2align 2,,3 + 1170 .global arm_sokalsneath_distance + 1171 .syntax unified + 1172 .thumb + 1173 .thumb_func + 1174 .fpu fpv4-sp-d16 + 1176 arm_sokalsneath_distance: + 1177 @ args = 0, pretend = 0, frame = 16 + 1178 @ frame_needed = 0, uses_anonymous_args = 0 + 1179 0000 30B5 push {r4, r5, lr} + 1180 0002 87B0 sub sp, sp, #28 + 1181 0004 05AB add r3, sp, #20 + ARM GAS /tmp/ccLiIsYO.s page 21 + + + 1182 0006 04AD add r5, sp, #16 + 1183 0008 CDE90035 strd r3, r5, [sp] + 1184 000c 0024 movs r4, #0 + 1185 000e 03AB add r3, sp, #12 + 1186 0010 CDE90344 strd r4, r4, [sp, #12] + 1187 0014 0594 str r4, [sp, #20] + 1188 0016 FFF7FEFF bl arm_boolean_distance_TT_TF_FT + 1189 001a DDE90430 ldrd r3, r0, [sp, #16] + 1190 001e 1844 add r0, r0, r3 + 1191 0020 FFF7FEFF bl __aeabi_ui2d + 1192 0024 0246 mov r2, r0 + 1193 0026 0B46 mov r3, r1 + 1194 0028 FFF7FEFF bl __aeabi_dadd + 1195 002c FFF7FEFF bl __aeabi_d2f + 1196 0030 DDED037A vldr.32 s15, [sp, #12] @ int + 1197 0034 00EE100A vmov s0, r0 + 1198 0038 F8EE677A vcvt.f32.u32 s15, s15 + 1199 003c 77EE807A vadd.f32 s15, s15, s0 + 1200 0040 80EE270A vdiv.f32 s0, s0, s15 + 1201 0044 07B0 add sp, sp, #28 + 1202 @ sp needed + 1203 0046 30BD pop {r4, r5, pc} + 1205 .global __aeabi_dmul + 1206 .section .text.arm_yule_distance,"ax",%progbits + 1207 .align 1 + 1208 .p2align 2,,3 + 1209 .global arm_yule_distance + 1210 .syntax unified + 1211 .thumb + 1212 .thumb_func + 1213 .fpu fpv4-sp-d16 + 1215 arm_yule_distance: + 1216 @ args = 0, pretend = 0, frame = 16 + 1217 @ frame_needed = 0, uses_anonymous_args = 0 + 1218 0000 F0B5 push {r4, r5, r6, r7, lr} + 1219 0002 89B0 sub sp, sp, #36 + 1220 0004 07AD add r5, sp, #28 + 1221 0006 06AB add r3, sp, #24 + 1222 0008 CDE90135 strd r3, r5, [sp, #4] + 1223 000c 05AB add r3, sp, #20 + 1224 000e 0024 movs r4, #0 + 1225 0010 0093 str r3, [sp] + 1226 0012 04AB add r3, sp, #16 + 1227 0014 CDE90444 strd r4, r4, [sp, #16] + 1228 0018 CDE90644 strd r4, r4, [sp, #24] + 1229 001c FFF7FEFF bl arm_boolean_distance_TT_FF_TF_FT + 1230 0020 DDE90603 ldrd r0, r3, [sp, #24] + 1231 0024 03FB00F0 mul r0, r3, r0 + 1232 0028 4000 lsls r0, r0, #1 + 1233 002a FFF7FEFF bl __aeabi_ui2d + 1234 002e DDE90432 ldrd r3, r2, [sp, #16] + 1235 0032 0446 mov r4, r0 + 1236 0034 02FB03F0 mul r0, r2, r3 + 1237 0038 0D46 mov r5, r1 + 1238 003a FFF7FEFF bl __aeabi_ui2d + 1239 003e 0D4B ldr r3, .L224 + 1240 0040 0646 mov r6, r0 + ARM GAS /tmp/ccLiIsYO.s page 22 + + + 1241 0042 0F46 mov r7, r1 + 1242 0044 0022 movs r2, #0 + 1243 0046 2046 mov r0, r4 + 1244 0048 2946 mov r1, r5 + 1245 004a FFF7FEFF bl __aeabi_dmul + 1246 004e 0246 mov r2, r0 + 1247 0050 0B46 mov r3, r1 + 1248 0052 3046 mov r0, r6 + 1249 0054 3946 mov r1, r7 + 1250 0056 FFF7FEFF bl __aeabi_dadd + 1251 005a 0246 mov r2, r0 + 1252 005c 0B46 mov r3, r1 + 1253 005e 2046 mov r0, r4 + 1254 0060 2946 mov r1, r5 + 1255 0062 FFF7FEFF bl __aeabi_ddiv + 1256 0066 FFF7FEFF bl __aeabi_d2f + 1257 006a 00EE100A vmov s0, r0 + 1258 006e 09B0 add sp, sp, #36 + 1259 @ sp needed + 1260 0070 F0BD pop {r4, r5, r6, r7, pc} + 1261 .L225: + 1262 0072 00BF .align 2 + 1263 .L224: + 1264 0074 0000E03F .word 1071644672 + 1266 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccLiIsYO.s page 23 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 DistanceFunctions.c + /tmp/ccLiIsYO.s:16 .text.arm_boolean_distance_TT_TF_FT:0000000000000000 $t + /tmp/ccLiIsYO.s:25 .text.arm_boolean_distance_TT_TF_FT:0000000000000000 arm_boolean_distance_TT_TF_FT + /tmp/ccLiIsYO.s:122 .text.arm_boolean_distance_TF_FT:0000000000000000 $t + /tmp/ccLiIsYO.s:130 .text.arm_boolean_distance_TF_FT:0000000000000000 arm_boolean_distance_TF_FT + /tmp/ccLiIsYO.s:211 .text.arm_boolean_distance_TT_FF_TF_FT:0000000000000000 $t + /tmp/ccLiIsYO.s:219 .text.arm_boolean_distance_TT_FF_TF_FT:0000000000000000 arm_boolean_distance_TT_FF_TF_FT + /tmp/ccLiIsYO.s:328 .text.arm_boolean_distance_TT:0000000000000000 $t + /tmp/ccLiIsYO.s:336 .text.arm_boolean_distance_TT:0000000000000000 arm_boolean_distance_TT + /tmp/ccLiIsYO.s:401 .text.arm_braycurtis_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:409 .text.arm_braycurtis_distance_f32:0000000000000000 arm_braycurtis_distance_f32 + /tmp/ccLiIsYO.s:433 .text.arm_braycurtis_distance_f32:0000000000000034 $d + /tmp/ccLiIsYO.s:436 .text.arm_canberra_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:444 .text.arm_canberra_distance_f32:0000000000000000 arm_canberra_distance_f32 + /tmp/ccLiIsYO.s:476 .text.arm_canberra_distance_f32:0000000000000048 $d + /tmp/ccLiIsYO.s:479 .text.arm_chebyshev_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:487 .text.arm_chebyshev_distance_f32:0000000000000000 arm_chebyshev_distance_f32 + /tmp/ccLiIsYO.s:512 .text.arm_cityblock_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:520 .text.arm_cityblock_distance_f32:0000000000000000 arm_cityblock_distance_f32 + /tmp/ccLiIsYO.s:540 .text.arm_cityblock_distance_f32:0000000000000024 $d + /tmp/ccLiIsYO.s:543 .text.arm_correlation_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:551 .text.arm_correlation_distance_f32:0000000000000000 arm_correlation_distance_f32 + /tmp/ccLiIsYO.s:628 .text.arm_correlation_distance_f32:00000000000000cc $d + /tmp/ccLiIsYO.s:631 .text.arm_cosine_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:639 .text.arm_cosine_distance_f32:0000000000000000 arm_cosine_distance_f32 + /tmp/ccLiIsYO.s:687 .text.arm_cosine_distance_f32:0000000000000070 $d + /tmp/ccLiIsYO.s:694 .text.arm_dice_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:702 .text.arm_dice_distance:0000000000000000 arm_dice_distance + /tmp/ccLiIsYO.s:756 .text.arm_euclidean_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:764 .text.arm_euclidean_distance_f32:0000000000000000 arm_euclidean_distance_f32 + /tmp/ccLiIsYO.s:795 .text.arm_euclidean_distance_f32:0000000000000044 $d + /tmp/ccLiIsYO.s:798 .text.arm_hamming_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:806 .text.arm_hamming_distance:0000000000000000 arm_hamming_distance + /tmp/ccLiIsYO.s:837 .text.arm_jaccard_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:845 .text.arm_jaccard_distance:0000000000000000 arm_jaccard_distance + /tmp/ccLiIsYO.s:879 .text.arm_jensenshannon_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:887 .text.arm_jensenshannon_distance_f32:0000000000000000 arm_jensenshannon_distance_f32 + /tmp/ccLiIsYO.s:940 .text.arm_jensenshannon_distance_f32:0000000000000090 $d + /tmp/ccLiIsYO.s:943 .text.arm_kulsinski_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:951 .text.arm_kulsinski_distance:0000000000000000 arm_kulsinski_distance + /tmp/ccLiIsYO.s:989 .text.arm_minkowski_distance_f32:0000000000000000 $t + /tmp/ccLiIsYO.s:997 .text.arm_minkowski_distance_f32:0000000000000000 arm_minkowski_distance_f32 + /tmp/ccLiIsYO.s:1033 .text.arm_minkowski_distance_f32:0000000000000060 $d + /tmp/ccLiIsYO.s:1036 .text.arm_rogerstanimoto_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:1044 .text.arm_rogerstanimoto_distance:0000000000000000 arm_rogerstanimoto_distance + /tmp/ccLiIsYO.s:1083 .text.arm_russellrao_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:1091 .text.arm_russellrao_distance:0000000000000000 arm_russellrao_distance + /tmp/ccLiIsYO.s:1123 .text.arm_sokalmichener_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:1131 .text.arm_sokalmichener_distance:0000000000000000 arm_sokalmichener_distance + /tmp/ccLiIsYO.s:1168 .text.arm_sokalsneath_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:1176 .text.arm_sokalsneath_distance:0000000000000000 arm_sokalsneath_distance + /tmp/ccLiIsYO.s:1207 .text.arm_yule_distance:0000000000000000 $t + /tmp/ccLiIsYO.s:1215 .text.arm_yule_distance:0000000000000000 arm_yule_distance + /tmp/ccLiIsYO.s:1264 .text.arm_yule_distance:0000000000000074 $d + +UNDEFINED SYMBOLS + ARM GAS /tmp/ccLiIsYO.s page 24 + + +arm_mean_f32 +arm_offset_f32 +arm_power_f32 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0000000..c5b2d1b --- /dev/null +++ b/codice/build/FIRFilterCode.d @@ -0,0 +1,2 @@ +build/FIRFilterCode.o: Core/Src/FIRFilterCode.c Core/Inc/FIRFilterCode.h +Core/Inc/FIRFilterCode.h: diff --git a/codice/build/FIRFilterCode.lst b/codice/build/FIRFilterCode.lst new file mode 100644 index 0000000..2c8c5c8 --- /dev/null +++ b/codice/build/FIRFilterCode.lst @@ -0,0 +1,2472 @@ +ARM GAS /tmp/ccAag610.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "FIRFilterCode.c" + 14 .text + 15 .global __aeabi_i2d + 16 .global __aeabi_dmul + 17 .global __aeabi_dsub + 18 .global __aeabi_dcmpgt + 19 .global __aeabi_dcmplt + 20 .global __aeabi_ddiv + 21 .global __aeabi_dcmpeq + 22 .global __aeabi_dadd + 23 .section .text.RectWinFIR,"ax",%progbits + 24 .align 1 + 25 .p2align 2,,3 + 26 .global RectWinFIR + 27 .arch armv7e-m + 28 .syntax unified + 29 .thumb + 30 .thumb_func + 31 .fpu fpv4-sp-d16 + 33 RectWinFIR: + 34 @ args = 0, pretend = 0, frame = 16 + 35 @ frame_needed = 0, uses_anonymous_args = 0 + 36 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 37 0004 2DED088B vpush.64 {d8, d9, d10, d11} + 38 0008 85B0 sub sp, sp, #20 + 39 000a 0446 mov r4, r0 + 40 000c 0091 str r1, [sp] + 41 000e 5BEC10AB vmov r10, fp, d0 + 42 0012 51EC110B vmov r0, r1, d1 + 43 0016 042A cmp r2, #4 + 44 0018 1BD8 bhi .L1 + 45 001a DFE812F0 tbh [pc, r2, lsl #1] + 46 .L4: + 47 001e 1F00 .2byte (.L8-.L4)/2 + 48 0020 DC00 .2byte (.L7-.L4)/2 + 49 0022 6600 .2byte (.L6-.L4)/2 + 50 0024 4301 .2byte (.L5-.L4)/2 + 51 0026 0500 .2byte (.L3-.L4)/2 + 52 .p2align 1 + 53 .L3: + 54 0028 009B ldr r3, [sp] + 55 002a 002B cmp r3, #0 + 56 002c 04DD ble .L43 + 57 002e DA00 lsls r2, r3, #3 + 58 0030 0021 movs r1, #0 + ARM GAS /tmp/ccAag610.s page 2 + + + 59 0032 2046 mov r0, r4 + 60 0034 FFF7FEFF bl memset + 61 .L43: + 62 0038 009B ldr r3, [sp] + 63 003a 03F1FF3B add fp, r3, #-1 + 64 003e 0BEBDB7B add fp, fp, fp, lsr #31 + 65 0042 B74B ldr r3, .L69+32 + 66 0044 4FEA6B0B asr fp, fp, #1 + 67 0048 0022 movs r2, #0 + 68 004a 04EBCB04 add r4, r4, fp, lsl #3 + 69 004e C4E90023 strd r2, [r4] + 70 .L1: + 71 0052 05B0 add sp, sp, #20 + 72 @ sp needed + 73 0054 BDEC088B vldm sp!, {d8-d11} + 74 0058 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 75 .L8: + 76 005c 009B ldr r3, [sp] + 77 005e 002B cmp r3, #0 + 78 0060 F7DD ble .L1 + 79 0062 581E subs r0, r3, #1 + 80 0064 FFF7FEFF bl __aeabi_i2d + 81 0068 AE4B ldr r3, .L69+36 + 82 006a 0022 movs r2, #0 + 83 006c FFF7FEFF bl __aeabi_dmul + 84 0070 0025 movs r5, #0 + 85 0072 8046 mov r8, r0 + 86 0074 8946 mov r9, r1 + 87 0076 13E0 b .L14 + 88 .L11: + 89 0078 47EC106B vmov d0, r6, r7 + 90 007c FFF7FEFF bl sin + 91 0080 3246 mov r2, r6 + 92 0082 3B46 mov r3, r7 + 93 0084 51EC100B vmov r0, r1, d0 + 94 0088 FFF7FEFF bl __aeabi_ddiv + 95 008c 5246 mov r2, r10 + 96 008e 5B46 mov r3, fp + 97 0090 FFF7FEFF bl __aeabi_dmul + 98 .L13: + 99 0094 009B ldr r3, [sp] + 100 0096 0135 adds r5, r5, #1 + 101 0098 AB42 cmp r3, r5 + 102 009a E4E80201 strd r0, [r4], #8 + 103 009e D8D0 beq .L1 + 104 .L14: + 105 00a0 2846 mov r0, r5 + 106 00a2 FFF7FEFF bl __aeabi_i2d + 107 00a6 4246 mov r2, r8 + 108 00a8 4B46 mov r3, r9 + 109 00aa FFF7FEFF bl __aeabi_dsub + 110 00ae 5246 mov r2, r10 + 111 00b0 5B46 mov r3, fp + 112 00b2 FFF7FEFF bl __aeabi_dmul + 113 00b6 92A3 adr r3, .L69 + 114 00b8 D3E90023 ldrd r2, [r3] + 115 00bc FFF7FEFF bl __aeabi_dmul + ARM GAS /tmp/ccAag610.s page 3 + + + 116 00c0 91A3 adr r3, .L69+8 + 117 00c2 D3E90023 ldrd r2, [r3] + 118 00c6 0646 mov r6, r0 + 119 00c8 0F46 mov r7, r1 + 120 00ca FFF7FEFF bl __aeabi_dcmpgt + 121 00ce 0028 cmp r0, #0 + 122 00d0 D2D0 beq .L11 + 123 00d2 8FA3 adr r3, .L69+16 + 124 00d4 D3E90023 ldrd r2, [r3] + 125 00d8 3046 mov r0, r6 + 126 00da 3946 mov r1, r7 + 127 00dc FFF7FEFF bl __aeabi_dcmplt + 128 00e0 0028 cmp r0, #0 + 129 00e2 C9D0 beq .L11 + 130 00e4 5046 mov r0, r10 + 131 00e6 5946 mov r1, fp + 132 00e8 D4E7 b .L13 + 133 .L6: + 134 00ea 8E4B ldr r3, .L69+36 + 135 00ec 0022 movs r2, #0 + 136 00ee FFF7FEFF bl __aeabi_dmul + 137 00f2 0646 mov r6, r0 + 138 00f4 0F46 mov r7, r1 + 139 00f6 3246 mov r2, r6 + 140 00f8 3B46 mov r3, r7 + 141 00fa 5046 mov r0, r10 + 142 00fc 5946 mov r1, fp + 143 00fe FFF7FEFF bl __aeabi_dsub + 144 0102 5B46 mov r3, fp + 145 0104 8046 mov r8, r0 + 146 0106 8946 mov r9, r1 + 147 0108 5246 mov r2, r10 + 148 010a 3046 mov r0, r6 + 149 010c 3946 mov r1, r7 + 150 010e FFF7FEFF bl __aeabi_dadd + 151 0112 009B ldr r3, [sp] + 152 0114 002B cmp r3, #0 + 153 0116 49EC198B vmov d9, r8, r9 + 154 011a 41EC1A0B vmov d10, r0, r1 + 155 011e 98DD ble .L1 + 156 0120 581E subs r0, r3, #1 + 157 0122 FFF7FEFF bl __aeabi_i2d + 158 0126 7F4B ldr r3, .L69+36 + 159 0128 0022 movs r2, #0 + 160 012a FFF7FEFF bl __aeabi_dmul + 161 012e 0025 movs r5, #0 + 162 0130 2346 mov r3, r4 + 163 0132 9FED798B vldr.64 d8, .L69+24 + 164 0136 2C46 mov r4, r5 + 165 0138 0FF2C41B adr fp, .L69 + 166 013c DBE900AB ldrd r10, [fp] + 167 0140 8046 mov r8, r0 + 168 0142 8946 mov r9, r1 + 169 0144 1D46 mov r5, r3 + 170 0146 08E0 b .L32 + 171 .L67: + 172 0148 85ED008B vstr.64 d8, [r5] + ARM GAS /tmp/ccAag610.s page 4 + + + 173 .L31: + 174 014c 009B ldr r3, [sp] + 175 014e 0134 adds r4, r4, #1 + 176 0150 A342 cmp r3, r4 + 177 0152 05F10805 add r5, r5, #8 + 178 0156 3FF47CAF beq .L1 + 179 .L32: + 180 015a 2046 mov r0, r4 + 181 015c FFF7FEFF bl __aeabi_i2d + 182 0160 4246 mov r2, r8 + 183 0162 4B46 mov r3, r9 + 184 0164 FFF7FEFF bl __aeabi_dsub + 185 0168 0022 movs r2, #0 + 186 016a 0023 movs r3, #0 + 187 016c 0646 mov r6, r0 + 188 016e 0F46 mov r7, r1 + 189 0170 FFF7FEFF bl __aeabi_dcmpeq + 190 0174 0028 cmp r0, #0 + 191 0176 E7D1 bne .L67 + 192 0178 3246 mov r2, r6 + 193 017a 3B46 mov r3, r7 + 194 017c 51EC190B vmov r0, r1, d9 + 195 0180 FFF7FEFF bl __aeabi_dmul + 196 0184 5246 mov r2, r10 + 197 0186 5B46 mov r3, fp + 198 0188 FFF7FEFF bl __aeabi_dmul + 199 018c 41EC100B vmov d0, r0, r1 + 200 0190 FFF7FEFF bl cos + 201 0194 3246 mov r2, r6 + 202 0196 3B46 mov r3, r7 + 203 0198 51EC1A0B vmov r0, r1, d10 + 204 019c 8DED020B vstr.64 d0, [sp, #8] + 205 01a0 FFF7FEFF bl __aeabi_dmul + 206 01a4 5246 mov r2, r10 + 207 01a6 5B46 mov r3, fp + 208 01a8 FFF7FEFF bl __aeabi_dmul + 209 01ac 41EC100B vmov d0, r0, r1 + 210 01b0 FFF7FEFF bl cos + 211 01b4 DDE90201 ldrd r0, [sp, #8] + 212 01b8 53EC102B vmov r2, r3, d0 + 213 01bc FFF7FEFF bl __aeabi_dsub + 214 01c0 5246 mov r2, r10 + 215 01c2 5B46 mov r3, fp + 216 01c4 FFF7FEFF bl __aeabi_ddiv + 217 01c8 3246 mov r2, r6 + 218 01ca 3B46 mov r3, r7 + 219 01cc FFF7FEFF bl __aeabi_ddiv + 220 01d0 C5E90001 strd r0, [r5] + 221 01d4 BAE7 b .L31 + 222 .L7: + 223 01d6 009A ldr r2, [sp] + 224 01d8 002A cmp r2, #0 + 225 01da 02F00103 and r3, r2, #1 + 226 01de B8BF it lt + 227 01e0 5B42 rsblt r3, r3, #0 + 228 01e2 012B cmp r3, #1 + 229 01e4 00F04281 beq .L16 + ARM GAS /tmp/ccAag610.s page 5 + + + 230 01e8 002A cmp r2, #0 + 231 01ea 7FF732AF ble .L1 + 232 01ee 501E subs r0, r2, #1 + 233 01f0 1746 mov r7, r2 + 234 01f2 FFF7FEFF bl __aeabi_i2d + 235 01f6 4B4B ldr r3, .L69+36 + 236 01f8 0022 movs r2, #0 + 237 01fa FFF7FEFF bl __aeabi_dmul + 238 01fe 0025 movs r5, #0 + 239 0200 4BEC1AAB vmov d10, r10, fp + 240 0204 9FED448B vldr.64 d8, .L69+24 + 241 0208 0FF2F409 adr r9, .L69 + 242 020c D9E90089 ldrd r8, [r9] + 243 0210 41EC190B vmov d9, r0, r1 + 244 0214 2646 mov r6, r4 + 245 0216 AB46 mov fp, r5 + 246 0218 08E0 b .L28 + 247 .L68: + 248 021a 86ED008B vstr.64 d8, [r6] + 249 .L27: + 250 021e 0BF1010B add fp, fp, #1 + 251 0222 5F45 cmp r7, fp + 252 0224 06F10806 add r6, r6, #8 + 253 0228 3FF413AF beq .L1 + 254 .L28: + 255 022c 5846 mov r0, fp + 256 022e FFF7FEFF bl __aeabi_i2d + 257 0232 53EC192B vmov r2, r3, d9 + 258 0236 FFF7FEFF bl __aeabi_dsub + 259 023a 0022 movs r2, #0 + 260 023c 0023 movs r3, #0 + 261 023e 0446 mov r4, r0 + 262 0240 0D46 mov r5, r1 + 263 0242 FFF7FEFF bl __aeabi_dcmpeq + 264 0246 0028 cmp r0, #0 + 265 0248 E7D1 bne .L68 + 266 024a 2246 mov r2, r4 + 267 024c 2B46 mov r3, r5 + 268 024e 51EC1A0B vmov r0, r1, d10 + 269 0252 FFF7FEFF bl __aeabi_dmul + 270 0256 4246 mov r2, r8 + 271 0258 4B46 mov r3, r9 + 272 025a FFF7FEFF bl __aeabi_dmul + 273 025e 41EC100B vmov d0, r0, r1 + 274 0262 FFF7FEFF bl cos + 275 0266 4246 mov r2, r8 + 276 0268 4B46 mov r3, r9 + 277 026a 2046 mov r0, r4 + 278 026c 2946 mov r1, r5 + 279 026e 8DED000B vstr.64 d0, [sp] + 280 0272 FFF7FEFF bl __aeabi_dmul + 281 0276 41EC100B vmov d0, r0, r1 + 282 027a FFF7FEFF bl cos + 283 027e DDE90001 ldrd r0, [sp] + 284 0282 4246 mov r2, r8 + 285 0284 4B46 mov r3, r9 + 286 0286 8DED000B vstr.64 d0, [sp] + ARM GAS /tmp/ccAag610.s page 6 + + + 287 028a FFF7FEFF bl __aeabi_ddiv + 288 028e 2246 mov r2, r4 + 289 0290 2B46 mov r3, r5 + 290 0292 FFF7FEFF bl __aeabi_ddiv + 291 0296 DDE90023 ldrd r2, [sp] + 292 029a FFF7FEFF bl __aeabi_dadd + 293 029e C6E90001 strd r0, [r6] + 294 02a2 BCE7 b .L27 + 295 .L5: + 296 02a4 1F4B ldr r3, .L69+36 + 297 02a6 0022 movs r2, #0 + 298 02a8 FFF7FEFF bl __aeabi_dmul + 299 02ac 0646 mov r6, r0 + 300 02ae 0F46 mov r7, r1 + 301 02b0 3246 mov r2, r6 + 302 02b2 3B46 mov r3, r7 + 303 02b4 5046 mov r0, r10 + 304 02b6 5946 mov r1, fp + 305 02b8 FFF7FEFF bl __aeabi_dsub + 306 02bc 5B46 mov r3, fp + 307 02be 8046 mov r8, r0 + 308 02c0 8946 mov r9, r1 + 309 02c2 5246 mov r2, r10 + 310 02c4 3046 mov r0, r6 + 311 02c6 3946 mov r1, r7 + 312 02c8 FFF7FEFF bl __aeabi_dadd + 313 02cc 009B ldr r3, [sp] + 314 02ce 002B cmp r3, #0 + 315 02d0 49EC188B vmov d8, r8, r9 + 316 02d4 41EC190B vmov d9, r0, r1 + 317 02d8 7FF7BBAE ble .L1 + 318 02dc 581E subs r0, r3, #1 + 319 02de FFF7FEFF bl __aeabi_i2d + 320 02e2 104B ldr r3, .L69+36 + 321 02e4 0022 movs r2, #0 + 322 02e6 FFF7FEFF bl __aeabi_dmul + 323 02ea 0FF21C09 adr r9, .L69+8 + 324 02ee D9E90089 ldrd r8, [r9] + 325 02f2 41EC1B0B vmov d11, r0, r1 + 326 02f6 4FF0000A mov r10, #0 + 327 02fa A346 mov fp, r4 + 328 02fc 88E0 b .L42 + 329 .L70: + 330 02fe 00BF .align 3 + 331 .L69: + 332 0300 182D4454 .word 1413754136 + 333 0304 FB210940 .word 1074340347 + 334 0308 F168E388 .word -1998362383 + 335 030c B5F8E4BE .word -1092290379 + 336 0310 F168E388 .word -1998362383 + 337 0314 B5F8E43E .word 1055193269 + 338 0318 00000000 .word 0 + 339 031c 00000000 .word 0 + 340 0320 0000F03F .word 1072693248 + 341 0324 0000E03F .word 1071644672 + 342 .L33: + 343 0328 45EC104B vmov d0, r4, r5 + ARM GAS /tmp/ccAag610.s page 7 + + + 344 032c FFF7FEFF bl sin + 345 0330 2246 mov r2, r4 + 346 0332 51EC100B vmov r0, r1, d0 + 347 0336 2B46 mov r3, r5 + 348 0338 FFF7FEFF bl __aeabi_ddiv + 349 033c 41EC1A0B vmov d10, r0, r1 + 350 .L35: + 351 0340 3246 mov r2, r6 + 352 0342 3B46 mov r3, r7 + 353 0344 51EC190B vmov r0, r1, d9 + 354 0348 FFF7FEFF bl __aeabi_dmul + 355 034c 88A3 adr r3, .L71+8 + 356 034e D3E90023 ldrd r2, [r3] + 357 0352 FFF7FEFF bl __aeabi_dmul + 358 0356 4246 mov r2, r8 + 359 0358 4B46 mov r3, r9 + 360 035a 0446 mov r4, r0 + 361 035c 0D46 mov r5, r1 + 362 035e FFF7FEFF bl __aeabi_dcmpgt + 363 0362 40B1 cbz r0, .L36 + 364 0364 86A3 adr r3, .L71+24 + 365 0366 D3E90023 ldrd r2, [r3] + 366 036a 2046 mov r0, r4 + 367 036c 2946 mov r1, r5 + 368 036e FFF7FEFF bl __aeabi_dcmplt + 369 0372 0028 cmp r0, #0 + 370 0374 74D1 bne .L48 + 371 .L36: + 372 0376 45EC104B vmov d0, r4, r5 + 373 037a FFF7FEFF bl sin + 374 037e 2246 mov r2, r4 + 375 0380 51EC100B vmov r0, r1, d0 + 376 0384 2B46 mov r3, r5 + 377 0386 FFF7FEFF bl __aeabi_ddiv + 378 038a 53EC192B vmov r2, r3, d9 + 379 038e FFF7FEFF bl __aeabi_dmul + 380 0392 0246 mov r2, r0 + 381 0394 0B46 mov r3, r1 + 382 .L38: + 383 0396 51EC1A0B vmov r0, r1, d10 + 384 039a FFF7FEFF bl __aeabi_dsub + 385 039e 3246 mov r2, r6 + 386 03a0 3B46 mov r3, r7 + 387 03a2 0646 mov r6, r0 + 388 03a4 0F46 mov r7, r1 + 389 03a6 51EC180B vmov r0, r1, d8 + 390 03aa FFF7FEFF bl __aeabi_dmul + 391 03ae 70A3 adr r3, .L71+8 + 392 03b0 D3E90023 ldrd r2, [r3] + 393 03b4 FFF7FEFF bl __aeabi_dmul + 394 03b8 4246 mov r2, r8 + 395 03ba 4B46 mov r3, r9 + 396 03bc 0446 mov r4, r0 + 397 03be 0D46 mov r5, r1 + 398 03c0 FFF7FEFF bl __aeabi_dcmpgt + 399 03c4 40B1 cbz r0, .L39 + 400 03c6 6EA3 adr r3, .L71+24 + ARM GAS /tmp/ccAag610.s page 8 + + + 401 03c8 D3E90023 ldrd r2, [r3] + 402 03cc 2046 mov r0, r4 + 403 03ce 2946 mov r1, r5 + 404 03d0 FFF7FEFF bl __aeabi_dcmplt + 405 03d4 0028 cmp r0, #0 + 406 03d6 46D1 bne .L49 + 407 .L39: + 408 03d8 45EC104B vmov d0, r4, r5 + 409 03dc FFF7FEFF bl sin + 410 03e0 2246 mov r2, r4 + 411 03e2 51EC100B vmov r0, r1, d0 + 412 03e6 2B46 mov r3, r5 + 413 03e8 FFF7FEFF bl __aeabi_ddiv + 414 03ec 53EC182B vmov r2, r3, d8 + 415 03f0 FFF7FEFF bl __aeabi_dmul + 416 03f4 0246 mov r2, r0 + 417 03f6 0B46 mov r3, r1 + 418 .L41: + 419 03f8 3046 mov r0, r6 + 420 03fa 3946 mov r1, r7 + 421 03fc FFF7FEFF bl __aeabi_dsub + 422 0400 009B ldr r3, [sp] + 423 0402 0AF1010A add r10, r10, #1 + 424 0406 5345 cmp r3, r10 + 425 0408 EBE80201 strd r0, [fp], #8 + 426 040c 3FF421AE beq .L1 + 427 .L42: + 428 0410 5046 mov r0, r10 + 429 0412 FFF7FEFF bl __aeabi_i2d + 430 0416 53EC1B2B vmov r2, r3, d11 + 431 041a FFF7FEFF bl __aeabi_dsub + 432 041e 54A3 adr r3, .L71+8 + 433 0420 D3E90023 ldrd r2, [r3] + 434 0424 0646 mov r6, r0 + 435 0426 0F46 mov r7, r1 + 436 0428 FFF7FEFF bl __aeabi_dmul + 437 042c 4246 mov r2, r8 + 438 042e 4B46 mov r3, r9 + 439 0430 0446 mov r4, r0 + 440 0432 0D46 mov r5, r1 + 441 0434 FFF7FEFF bl __aeabi_dcmpgt + 442 0438 0028 cmp r0, #0 + 443 043a 3FF475AF beq .L33 + 444 043e 50A3 adr r3, .L71+24 + 445 0440 D3E90023 ldrd r2, [r3] + 446 0444 2046 mov r0, r4 + 447 0446 2946 mov r1, r5 + 448 0448 FFF7FEFF bl __aeabi_dcmplt + 449 044c 0028 cmp r0, #0 + 450 044e 3FF46BAF beq .L33 + 451 0452 9FED457B vldr.64 d7, .L71 + 452 0456 B0EE47AA vmov.f32 s20, s14 + 453 045a F0EE67AA vmov.f32 s21, s15 + 454 045e 6FE7 b .L35 + 455 .L48: + 456 0460 53EC192B vmov r2, r3, d9 + 457 0464 97E7 b .L38 + ARM GAS /tmp/ccAag610.s page 9 + + + 458 .L49: + 459 0466 53EC182B vmov r2, r3, d8 + 460 046a C5E7 b .L41 + 461 .L16: + 462 046c 002A cmp r2, #0 + 463 046e 7FF7F0AD ble .L1 + 464 0472 501E subs r0, r2, #1 + 465 0474 FFF7FEFF bl __aeabi_i2d + 466 0478 434B ldr r3, .L71+32 + 467 047a 0022 movs r2, #0 + 468 047c FFF7FEFF bl __aeabi_dmul + 469 0480 2746 mov r7, r4 + 470 0482 41EC190B vmov d9, r0, r1 + 471 0486 0026 movs r6, #0 + 472 0488 42E0 b .L24 + 473 .L18: + 474 048a 45EC104B vmov d0, r4, r5 + 475 048e FFF7FEFF bl sin + 476 0492 2246 mov r2, r4 + 477 0494 51EC100B vmov r0, r1, d0 + 478 0498 2B46 mov r3, r5 + 479 049a FFF7FEFF bl __aeabi_ddiv + 480 049e 8046 mov r8, r0 + 481 04a0 8946 mov r9, r1 + 482 .L20: + 483 04a2 53EC182B vmov r2, r3, d8 + 484 04a6 5046 mov r0, r10 + 485 04a8 5946 mov r1, fp + 486 04aa FFF7FEFF bl __aeabi_dmul + 487 04ae 30A3 adr r3, .L71+8 + 488 04b0 D3E90023 ldrd r2, [r3] + 489 04b4 FFF7FEFF bl __aeabi_dmul + 490 04b8 2FA3 adr r3, .L71+16 + 491 04ba D3E90023 ldrd r2, [r3] + 492 04be 0446 mov r4, r0 + 493 04c0 0D46 mov r5, r1 + 494 04c2 FFF7FEFF bl __aeabi_dcmpgt + 495 04c6 40B1 cbz r0, .L21 + 496 04c8 2DA3 adr r3, .L71+24 + 497 04ca D3E90023 ldrd r2, [r3] + 498 04ce 2046 mov r0, r4 + 499 04d0 2946 mov r1, r5 + 500 04d2 FFF7FEFF bl __aeabi_dcmplt + 501 04d6 0028 cmp r0, #0 + 502 04d8 41D1 bne .L46 + 503 .L21: + 504 04da 45EC104B vmov d0, r4, r5 + 505 04de FFF7FEFF bl sin + 506 04e2 2246 mov r2, r4 + 507 04e4 51EC100B vmov r0, r1, d0 + 508 04e8 2B46 mov r3, r5 + 509 04ea FFF7FEFF bl __aeabi_ddiv + 510 04ee 5246 mov r2, r10 + 511 04f0 5B46 mov r3, fp + 512 04f2 FFF7FEFF bl __aeabi_dmul + 513 04f6 0246 mov r2, r0 + 514 04f8 0B46 mov r3, r1 + ARM GAS /tmp/ccAag610.s page 10 + + + 515 .L23: + 516 04fa 4046 mov r0, r8 + 517 04fc 4946 mov r1, r9 + 518 04fe FFF7FEFF bl __aeabi_dsub + 519 0502 009B ldr r3, [sp] + 520 0504 0136 adds r6, r6, #1 + 521 0506 B342 cmp r3, r6 + 522 0508 E7E80201 strd r0, [r7], #8 + 523 050c 3FF4A1AD beq .L1 + 524 .L24: + 525 0510 3046 mov r0, r6 + 526 0512 FFF7FEFF bl __aeabi_i2d + 527 0516 53EC192B vmov r2, r3, d9 + 528 051a FFF7FEFF bl __aeabi_dsub + 529 051e 0246 mov r2, r0 + 530 0520 0B46 mov r3, r1 + 531 0522 43EC182B vmov d8, r2, r3 + 532 0526 12A3 adr r3, .L71+8 + 533 0528 D3E90023 ldrd r2, [r3] + 534 052c FFF7FEFF bl __aeabi_dmul + 535 0530 11A3 adr r3, .L71+16 + 536 0532 D3E90023 ldrd r2, [r3] + 537 0536 0446 mov r4, r0 + 538 0538 0D46 mov r5, r1 + 539 053a FFF7FEFF bl __aeabi_dcmpgt + 540 053e 0028 cmp r0, #0 + 541 0540 A3D0 beq .L18 + 542 0542 0FA3 adr r3, .L71+24 + 543 0544 D3E90023 ldrd r2, [r3] + 544 0548 2046 mov r0, r4 + 545 054a 2946 mov r1, r5 + 546 054c FFF7FEFF bl __aeabi_dcmplt + 547 0550 0028 cmp r0, #0 + 548 0552 9AD0 beq .L18 + 549 0554 DFF83490 ldr r9, .L71+36 + 550 0558 4FF00008 mov r8, #0 + 551 055c A1E7 b .L20 + 552 .L46: + 553 055e 5246 mov r2, r10 + 554 0560 5B46 mov r3, fp + 555 0562 CAE7 b .L23 + 556 .L72: + 557 0564 AFF30080 .align 3 + 558 .L71: + 559 0568 00000000 .word 0 + 560 056c 0000F03F .word 1072693248 + 561 0570 182D4454 .word 1413754136 + 562 0574 FB210940 .word 1074340347 + 563 0578 F168E388 .word -1998362383 + 564 057c B5F8E4BE .word -1092290379 + 565 0580 F168E388 .word -1998362383 + 566 0584 B5F8E43E .word 1055193269 + 567 0588 0000E03F .word 1071644672 + 568 058c 0000F03F .word 1072693248 + 570 .section .text.Sinc,"ax",%progbits + 571 .align 1 + 572 .p2align 2,,3 + ARM GAS /tmp/ccAag610.s page 11 + + + 573 .global Sinc + 574 .syntax unified + 575 .thumb + 576 .thumb_func + 577 .fpu fpv4-sp-d16 + 579 Sinc: + 580 @ args = 0, pretend = 0, frame = 0 + 581 @ frame_needed = 0, uses_anonymous_args = 0 + 582 0000 38B5 push {r3, r4, r5, lr} + 583 0002 55EC104B vmov r4, r5, d0 + 584 0006 12A3 adr r3, .L80+8 + 585 0008 D3E90023 ldrd r2, [r3] + 586 000c 10EE100A vmov r0, s0 @ int + 587 0010 2946 mov r1, r5 + 588 0012 FFF7FEFF bl __aeabi_dcmpgt + 589 0016 38B1 cbz r0, .L74 + 590 0018 0FA3 adr r3, .L80+16 + 591 001a D3E90023 ldrd r2, [r3] + 592 001e 2046 mov r0, r4 + 593 0020 2946 mov r1, r5 + 594 0022 FFF7FEFF bl __aeabi_dcmplt + 595 0026 60B9 cbnz r0, .L77 + 596 .L74: + 597 0028 45EC104B vmov d0, r4, r5 + 598 002c FFF7FEFF bl sin + 599 0030 2246 mov r2, r4 + 600 0032 51EC100B vmov r0, r1, d0 + 601 0036 2B46 mov r3, r5 + 602 0038 FFF7FEFF bl __aeabi_ddiv + 603 003c 41EC100B vmov d0, r0, r1 + 604 0040 38BD pop {r3, r4, r5, pc} + 605 .L77: + 606 0042 9FED010B vldr.64 d0, .L80 + 607 0046 38BD pop {r3, r4, r5, pc} + 608 .L81: + 609 .align 3 + 610 .L80: + 611 0048 00000000 .word 0 + 612 004c 0000F03F .word 1072693248 + 613 0050 F168E388 .word -1998362383 + 614 0054 B5F8E4BE .word -1092290379 + 615 0058 F168E388 .word -1998362383 + 616 005c B5F8E43E .word 1055193269 + 618 .section .text.Bessel,"ax",%progbits + 619 .align 1 + 620 .p2align 2,,3 + 621 .global Bessel + 622 .syntax unified + 623 .thumb + 624 .thumb_func + 625 .fpu fpv4-sp-d16 + 627 Bessel: + 628 @ args = 0, pretend = 0, frame = 0 + 629 @ frame_needed = 0, uses_anonymous_args = 0 + 630 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 631 0004 51EC100B vmov r0, r1, d0 + 632 0008 2DED028B vpush.64 {d8} + ARM GAS /tmp/ccAag610.s page 12 + + + 633 000c 2C4B ldr r3, .L97 + 634 000e 2D4D ldr r5, .L97+4 + 635 0010 0022 movs r2, #0 + 636 0012 FFF7FEFF bl __aeabi_dmul + 637 0016 0026 movs r6, #0 + 638 0018 41EC180B vmov d8, r0, r1 + 639 001c 0027 movs r7, #0 + 640 001e 0124 movs r4, #1 + 641 0020 27E0 b .L84 + 642 .L96: + 643 0022 022C cmp r4, #2 + 644 0024 34D0 beq .L86 + 645 0026 032C cmp r4, #3 + 646 0028 3ED0 beq .L87 + 647 002a 042C cmp r4, #4 + 648 002c 3ED0 beq .L88 + 649 002e 052C cmp r4, #5 + 650 0030 3ED0 beq .L89 + 651 0032 062C cmp r4, #6 + 652 0034 3ED0 beq .L90 + 653 0036 072C cmp r4, #7 + 654 0038 3FD0 beq .L91 + 655 003a 49F68050 movw r0, #40320 + 656 003e 092C cmp r4, #9 + 657 0040 08BF it eq + 658 0042 2846 moveq r0, r5 + 659 .L83: + 660 0044 FFF7FEFF bl __aeabi_i2d + 661 0048 0246 mov r2, r0 + 662 004a 0B46 mov r3, r1 + 663 004c 4046 mov r0, r8 + 664 004e 4946 mov r1, r9 + 665 0050 FFF7FEFF bl __aeabi_ddiv + 666 0054 0246 mov r2, r0 + 667 0056 0B46 mov r3, r1 + 668 0058 FFF7FEFF bl __aeabi_dmul + 669 005c 0246 mov r2, r0 + 670 005e 0B46 mov r3, r1 + 671 0060 3046 mov r0, r6 + 672 0062 3946 mov r1, r7 + 673 0064 FFF7FEFF bl __aeabi_dadd + 674 0068 0134 adds r4, r4, #1 + 675 006a 0A2C cmp r4, #10 + 676 006c 0646 mov r6, r0 + 677 006e 0F46 mov r7, r1 + 678 0070 10D0 beq .L95 + 679 .L84: + 680 0072 2046 mov r0, r4 + 681 0074 FFF7FEFF bl __aeabi_i2d + 682 0078 B0EE480A vmov.f32 s0, s16 + 683 007c F0EE680A vmov.f32 s1, s17 + 684 0080 41EC110B vmov d1, r0, r1 + 685 0084 FFF7FEFF bl pow + 686 0088 012C cmp r4, #1 + 687 008a 59EC108B vmov r8, r9, d0 + 688 008e C8D1 bne .L96 + 689 .L86: + ARM GAS /tmp/ccAag610.s page 13 + + + 690 0090 2046 mov r0, r4 + 691 0092 D7E7 b .L83 + 692 .L95: + 693 0094 0C4B ldr r3, .L97+8 + 694 0096 0022 movs r2, #0 + 695 0098 FFF7FEFF bl __aeabi_dadd + 696 009c BDEC028B vldm sp!, {d8} + 697 00a0 41EC100B vmov d0, r0, r1 + 698 00a4 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 699 .L87: + 700 00a8 0620 movs r0, #6 + 701 00aa CBE7 b .L83 + 702 .L88: + 703 00ac 1820 movs r0, #24 + 704 00ae C9E7 b .L83 + 705 .L89: + 706 00b0 7820 movs r0, #120 + 707 00b2 C7E7 b .L83 + 708 .L90: + 709 00b4 4FF43470 mov r0, #720 + 710 00b8 C4E7 b .L83 + 711 .L91: + 712 00ba 41F2B030 movw r0, #5040 + 713 00be C1E7 b .L83 + 714 .L98: + 715 .align 2 + 716 .L97: + 717 00c0 0000E03F .word 1071644672 + 718 00c4 80890500 .word 362880 + 719 00c8 0000F03F .word 1072693248 + 721 .section .text.FIRFilterWindow,"ax",%progbits + 722 .align 1 + 723 .p2align 2,,3 + 724 .global FIRFilterWindow + 725 .syntax unified + 726 .thumb + 727 .thumb_func + 728 .fpu fpv4-sp-d16 + 730 FIRFilterWindow: + 731 @ args = 0, pretend = 0, frame = 32 + 732 @ frame_needed = 0, uses_anonymous_args = 0 + 733 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 734 0004 2DED088B vpush.64 {d8, d9, d10, d11} + 735 0008 89B0 sub sp, sp, #36 + 736 000a 012A cmp r2, #1 + 737 000c 0790 str r0, [sp, #28] + 738 000e 0391 str r1, [sp, #12] + 739 0010 00F0BA81 beq .L99 + 740 0014 B0EE409A vmov.f32 s18, s0 + 741 0018 F0EE609A vmov.f32 s19, s1 + 742 001c 56EC105B vmov r5, r6, d0 + 743 0020 1446 mov r4, r2 + 744 0022 10EE100A vmov r0, s0 @ int + 745 0026 0022 movs r2, #0 + 746 0028 0023 movs r3, #0 + 747 002a 3146 mov r1, r6 + 748 002c FFF7FEFF bl __aeabi_dcmplt + ARM GAS /tmp/ccAag610.s page 14 + + + 749 0030 0028 cmp r0, #0 + 750 0032 7FD1 bne .L127 + 751 0034 C64B ldr r3, .L169+24 + 752 0036 0022 movs r2, #0 + 753 0038 2846 mov r0, r5 + 754 003a 3146 mov r1, r6 + 755 003c FFF7FEFF bl __aeabi_dcmpgt + 756 0040 28B1 cbz r0, .L102 + 757 0042 9FEDBD7B vldr.64 d7, .L169 + 758 0046 B0EE479A vmov.f32 s18, s14 + 759 004a F0EE679A vmov.f32 s19, s15 + 760 .L102: + 761 004e 039D ldr r5, [sp, #12] + 762 0050 AB1C adds r3, r5, #2 + 763 0052 DB00 lsls r3, r3, #3 + 764 0054 1846 mov r0, r3 + 765 0056 0693 str r3, [sp, #24] + 766 0058 FFF7FEFF bl malloc + 767 005c 0290 str r0, [sp, #8] + 768 005e 0028 cmp r0, #0 + 769 0060 00F09281 beq .L99 + 770 0064 681C adds r0, r5, #1 + 771 0066 FFF7FEFF bl __aeabi_i2d + 772 006a 022C cmp r4, #2 + 773 006c 41EC1B0B vmov d11, r0, r1 + 774 0070 67D0 beq .L161 + 775 0072 032C cmp r4, #3 + 776 0074 00F08D81 beq .L162 + 777 0078 0E2C cmp r4, #14 + 778 007a 53D1 bne .L106 + 779 007c 039B ldr r3, [sp, #12] + 780 007e 03EBD374 add r4, r3, r3, lsr #31 + 781 0082 012B cmp r3, #1 + 782 0084 4FEA6404 asr r4, r4, #1 + 783 0088 38DD ble .L121 + 784 008a DDF80890 ldr r9, [sp, #8] + 785 008e ACA7 adr r7, .L169+8 + 786 0090 D7E90067 ldrd r6, [r7] + 787 0094 C846 mov r8, r9 + 788 0096 0025 movs r5, #0 + 789 0098 8246 mov r10, r0 + 790 009a 8B46 mov fp, r1 + 791 .L122: + 792 009c 0135 adds r5, r5, #1 + 793 009e 2846 mov r0, r5 + 794 00a0 FFF7FEFF bl __aeabi_i2d + 795 00a4 3246 mov r2, r6 + 796 00a6 3B46 mov r3, r7 + 797 00a8 FFF7FEFF bl __aeabi_dmul + 798 00ac 5246 mov r2, r10 + 799 00ae 5B46 mov r3, fp + 800 00b0 FFF7FEFF bl __aeabi_ddiv + 801 00b4 41EC100B vmov d0, r0, r1 + 802 00b8 FFF7FEFF bl sin + 803 00bc A542 cmp r5, r4 + 804 00be A9EC020B vstmia.64 r9!, {d0} + 805 00c2 EBDB blt .L122 + ARM GAS /tmp/ccAag610.s page 15 + + + 806 00c4 57EC196B vmov r6, r7, d9 + 807 00c8 0025 movs r5, #0 + 808 .L123: + 809 00ca 98ED000B vldr.64 d0, [r8] + 810 00ce 47EC116B vmov d1, r6, r7 + 811 00d2 FFF7FEFF bl pow + 812 00d6 0135 adds r5, r5, #1 + 813 00d8 A542 cmp r5, r4 + 814 00da A8EC020B vstmia.64 r8!, {d0} + 815 00de F4DB blt .L123 + 816 00e0 069B ldr r3, [sp, #24] + 817 00e2 103B subs r3, r3, #16 + 818 00e4 0593 str r3, [sp, #20] + 819 .L124: + 820 00e6 0599 ldr r1, [sp, #20] + 821 00e8 029A ldr r2, [sp, #8] + 822 00ea 0023 movs r3, #0 + 823 00ec 1144 add r1, r1, r2 + 824 .L125: + 825 00ee F2E80267 ldrd r6, [r2], #8 + 826 00f2 0133 adds r3, r3, #1 + 827 00f4 9C42 cmp r4, r3 + 828 00f6 61E90267 strd r6, [r1, #-8]! + 829 00fa F8DC bgt .L125 + 830 .L121: + 831 00fc 039B ldr r3, [sp, #12] + 832 00fe 002B cmp r3, #0 + 833 0100 10DD ble .L106 + 834 0102 069B ldr r3, [sp, #24] + 835 0104 103B subs r3, r3, #16 + 836 0106 0593 str r3, [sp, #20] + 837 0108 1E46 mov r6, r3 + 838 .L113: + 839 010a 079C ldr r4, [sp, #28] + 840 010c 029D ldr r5, [sp, #8] + 841 010e 2644 add r6, r6, r4 + 842 .L126: + 843 0110 D4E90001 ldrd r0, [r4] + 844 0114 F5E80223 ldrd r2, [r5], #8 + 845 0118 FFF7FEFF bl __aeabi_dmul + 846 011c E4E80201 strd r0, [r4], #8 + 847 0120 A642 cmp r6, r4 + 848 0122 F5D1 bne .L126 + 849 .L106: + 850 0124 0298 ldr r0, [sp, #8] + 851 0126 09B0 add sp, sp, #36 + 852 @ sp needed + 853 0128 BDEC088B vldm sp!, {d8-d11} + 854 012c BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 855 0130 FFF7FEBF b free + 856 .L127: + 857 0134 9FED847B vldr.64 d7, .L169+16 + 858 0138 B0EE479A vmov.f32 s18, s14 + 859 013c F0EE679A vmov.f32 s19, s15 + 860 0140 85E7 b .L102 + 861 .L161: + 862 0142 039B ldr r3, [sp, #12] + ARM GAS /tmp/ccAag610.s page 16 + + + 863 0144 002B cmp r3, #0 + 864 0146 EDDD ble .L106 + 865 0148 069B ldr r3, [sp, #24] + 866 014a 029A ldr r2, [sp, #8] + 867 014c DFF80CB2 ldr fp, .L169+36 + 868 0150 0192 str r2, [sp, #4] + 869 0152 103B subs r3, r3, #16 + 870 0154 0593 str r3, [sp, #20] + 871 0156 D318 adds r3, r2, r3 + 872 0158 A146 mov r9, r4 + 873 015a 0493 str r3, [sp, #16] + 874 .L111: + 875 015c 55EC1B4B vmov r4, r5, d11 + 876 0160 4846 mov r0, r9 + 877 0162 FFF7FEFF bl __aeabi_i2d + 878 0166 2B46 mov r3, r5 + 879 0168 1BEE102A vmov r2, s22 @ int + 880 016c FFF7FEFF bl __aeabi_dsub + 881 0170 2B46 mov r3, r5 + 882 0172 1BEE102A vmov r2, s22 @ int + 883 0176 FFF7FEFF bl __aeabi_ddiv + 884 017a 0246 mov r2, r0 + 885 017c 0B46 mov r3, r1 + 886 017e FFF7FEFF bl __aeabi_dmul + 887 0182 0246 mov r2, r0 + 888 0184 0B46 mov r3, r1 + 889 0186 0020 movs r0, #0 + 890 0188 7249 ldr r1, .L169+28 + 891 018a FFF7FEFF bl __aeabi_dsub + 892 018e 41EC100B vmov d0, r0, r1 + 893 0192 FFF7FEFF bl sqrt + 894 0196 53EC192B vmov r2, r3, d9 + 895 019a 51EC100B vmov r0, r1, d0 + 896 019e FFF7FEFF bl __aeabi_dmul + 897 01a2 6D4B ldr r3, .L169+32 + 898 01a4 0022 movs r2, #0 + 899 01a6 FFF7FEFF bl __aeabi_dmul + 900 01aa 4FF00108 mov r8, #1 + 901 01ae 41EC180B vmov d8, r0, r1 + 902 01b2 0024 movs r4, #0 + 903 01b4 0025 movs r5, #0 + 904 01b6 35E0 b .L108 + 905 .L164: + 906 01b8 B8F1020F cmp r8, #2 + 907 01bc 42D0 beq .L129 + 908 01be B8F1030F cmp r8, #3 + 909 01c2 00F0B580 beq .L130 + 910 01c6 B8F1040F cmp r8, #4 + 911 01ca 00F0CB80 beq .L131 + 912 01ce B8F1050F cmp r8, #5 + 913 01d2 00F0C980 beq .L132 + 914 01d6 B8F1060F cmp r8, #6 + 915 01da 00F0CC80 beq .L133 + 916 01de B8F1070F cmp r8, #7 + 917 01e2 00F0CE80 beq .L134 + 918 01e6 49F68050 movw r0, #40320 + 919 01ea B8F1090F cmp r8, #9 + ARM GAS /tmp/ccAag610.s page 17 + + + 920 01ee 08BF it eq + 921 01f0 5846 moveq r0, fp + 922 .L107: + 923 01f2 FFF7FEFF bl __aeabi_i2d + 924 01f6 0246 mov r2, r0 + 925 01f8 0B46 mov r3, r1 + 926 01fa 3046 mov r0, r6 + 927 01fc 3946 mov r1, r7 + 928 01fe FFF7FEFF bl __aeabi_ddiv + 929 0202 0246 mov r2, r0 + 930 0204 0B46 mov r3, r1 + 931 0206 FFF7FEFF bl __aeabi_dmul + 932 020a 0246 mov r2, r0 + 933 020c 0B46 mov r3, r1 + 934 020e 2046 mov r0, r4 + 935 0210 2946 mov r1, r5 + 936 0212 FFF7FEFF bl __aeabi_dadd + 937 0216 08F10108 add r8, r8, #1 + 938 021a B8F10A0F cmp r8, #10 + 939 021e 0446 mov r4, r0 + 940 0220 0D46 mov r5, r1 + 941 0222 11D0 beq .L163 + 942 .L108: + 943 0224 4046 mov r0, r8 + 944 0226 FFF7FEFF bl __aeabi_i2d + 945 022a B0EE480A vmov.f32 s0, s16 + 946 022e F0EE680A vmov.f32 s1, s17 + 947 0232 41EC110B vmov d1, r0, r1 + 948 0236 FFF7FEFF bl pow + 949 023a B8F1010F cmp r8, #1 + 950 023e 57EC106B vmov r6, r7, d0 + 951 0242 B9D1 bne .L164 + 952 .L129: + 953 0244 4046 mov r0, r8 + 954 0246 D4E7 b .L107 + 955 .L163: + 956 0248 424B ldr r3, .L169+28 + 957 024a 0022 movs r2, #0 + 958 024c FFF7FEFF bl __aeabi_dadd + 959 0250 414B ldr r3, .L169+32 + 960 0252 41EC1A0B vmov d10, r0, r1 + 961 0256 0022 movs r2, #0 + 962 0258 51EC190B vmov r0, r1, d9 + 963 025c FFF7FEFF bl __aeabi_dmul + 964 0260 4FF0010A mov r10, #1 + 965 0264 41EC180B vmov d8, r0, r1 + 966 0268 0024 movs r4, #0 + 967 026a 0025 movs r5, #0 + 968 026c 30E0 b .L110 + 969 .L166: + 970 026e BAF1020F cmp r10, #2 + 971 0272 3DD0 beq .L137 + 972 0274 BAF1030F cmp r10, #3 + 973 0278 5CD0 beq .L138 + 974 027a BAF1040F cmp r10, #4 + 975 027e 6FD0 beq .L139 + 976 0280 BAF1050F cmp r10, #5 + ARM GAS /tmp/ccAag610.s page 18 + + + 977 0284 72D0 beq .L140 + 978 0286 BAF1060F cmp r10, #6 + 979 028a 71D0 beq .L141 + 980 028c BAF1070F cmp r10, #7 + 981 0290 74D0 beq .L142 + 982 0292 49F68050 movw r0, #40320 + 983 0296 BAF1090F cmp r10, #9 + 984 029a 08BF it eq + 985 029c 5846 moveq r0, fp + 986 .L109: + 987 029e FFF7FEFF bl __aeabi_i2d + 988 02a2 0246 mov r2, r0 + 989 02a4 0B46 mov r3, r1 + 990 02a6 3046 mov r0, r6 + 991 02a8 3946 mov r1, r7 + 992 02aa FFF7FEFF bl __aeabi_ddiv + 993 02ae 0246 mov r2, r0 + 994 02b0 0B46 mov r3, r1 + 995 02b2 FFF7FEFF bl __aeabi_dmul + 996 02b6 0246 mov r2, r0 + 997 02b8 0B46 mov r3, r1 + 998 02ba 2046 mov r0, r4 + 999 02bc 2946 mov r1, r5 + 1000 02be FFF7FEFF bl __aeabi_dadd + 1001 02c2 0AF1010A add r10, r10, #1 + 1002 02c6 BAF10A0F cmp r10, #10 + 1003 02ca 0446 mov r4, r0 + 1004 02cc 0D46 mov r5, r1 + 1005 02ce 11D0 beq .L165 + 1006 .L110: + 1007 02d0 5046 mov r0, r10 + 1008 02d2 FFF7FEFF bl __aeabi_i2d + 1009 02d6 B0EE480A vmov.f32 s0, s16 + 1010 02da F0EE680A vmov.f32 s1, s17 + 1011 02de 41EC110B vmov d1, r0, r1 + 1012 02e2 FFF7FEFF bl pow + 1013 02e6 BAF1010F cmp r10, #1 + 1014 02ea 57EC106B vmov r6, r7, d0 + 1015 02ee BED1 bne .L166 + 1016 .L137: + 1017 02f0 5046 mov r0, r10 + 1018 02f2 D4E7 b .L109 + 1019 .L165: + 1020 02f4 174B ldr r3, .L169+28 + 1021 02f6 0022 movs r2, #0 + 1022 02f8 FFF7FEFF bl __aeabi_dadd + 1023 02fc 0246 mov r2, r0 + 1024 02fe 0B46 mov r3, r1 + 1025 0300 51EC1A0B vmov r0, r1, d10 + 1026 0304 FFF7FEFF bl __aeabi_ddiv + 1027 0308 019B ldr r3, [sp, #4] + 1028 030a 049A ldr r2, [sp, #16] + 1029 030c E3E80201 strd r0, [r3], #8 + 1030 0310 9A42 cmp r2, r3 + 1031 0312 09F10209 add r9, r9, #2 + 1032 0316 0193 str r3, [sp, #4] + 1033 0318 7FF420AF bne .L111 + ARM GAS /tmp/ccAag610.s page 19 + + + 1034 031c 039B ldr r3, [sp, #12] + 1035 031e 03EBD374 add r4, r3, r3, lsr #31 + 1036 0322 012B cmp r3, #1 + 1037 0324 4FEA6404 asr r4, r4, #1 + 1038 0328 3FF7DDAE bgt .L124 + 1039 .L168: + 1040 032c 059E ldr r6, [sp, #20] + 1041 032e ECE6 b .L113 + 1042 .L130: + 1043 0330 0620 movs r0, #6 + 1044 0332 5EE7 b .L107 + 1045 .L138: + 1046 0334 0620 movs r0, #6 + 1047 0336 B2E7 b .L109 + 1048 .L170: + 1049 .align 3 + 1050 .L169: + 1051 0338 00000000 .word 0 + 1052 033c 00002440 .word 1076101120 + 1053 0340 182D4454 .word 1413754136 + 1054 0344 FB210940 .word 1074340347 + 1055 0348 00000000 .word 0 + 1056 034c 00000000 .word 0 + 1057 0350 00002440 .word 1076101120 + 1058 0354 0000F03F .word 1072693248 + 1059 0358 0000E03F .word 1071644672 + 1060 035c 80890500 .word 362880 + 1061 .L139: + 1062 0360 1820 movs r0, #24 + 1063 0362 9CE7 b .L109 + 1064 .L131: + 1065 0364 1820 movs r0, #24 + 1066 0366 44E7 b .L107 + 1067 .L132: + 1068 0368 7820 movs r0, #120 + 1069 036a 42E7 b .L107 + 1070 .L140: + 1071 036c 7820 movs r0, #120 + 1072 036e 96E7 b .L109 + 1073 .L141: + 1074 0370 4FF43470 mov r0, #720 + 1075 0374 93E7 b .L109 + 1076 .L133: + 1077 0376 4FF43470 mov r0, #720 + 1078 037a 3AE7 b .L107 + 1079 .L142: + 1080 037c 41F2B030 movw r0, #5040 + 1081 0380 8DE7 b .L109 + 1082 .L134: + 1083 0382 41F2B030 movw r0, #5040 + 1084 0386 34E7 b .L107 + 1085 .L99: + 1086 0388 09B0 add sp, sp, #36 + 1087 @ sp needed + 1088 038a BDEC088B vldm sp!, {d8-d11} + 1089 038e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1090 .L162: + ARM GAS /tmp/ccAag610.s page 20 + + + 1091 0392 039B ldr r3, [sp, #12] + 1092 0394 002B cmp r3, #0 + 1093 0396 7FF7C5AE ble .L106 + 1094 039a 069A ldr r2, [sp, #24] + 1095 039c 029F ldr r7, [sp, #8] + 1096 039e 0497 str r7, [sp, #16] + 1097 03a0 103A subs r2, r2, #16 + 1098 03a2 07EB0209 add r9, r7, r2 + 1099 03a6 C3F10108 rsb r8, r3, #1 + 1100 03aa CDF80490 str r9, [sp, #4] + 1101 03ae 0FF2B00B adr fp, .L171+8 + 1102 03b2 DBE900AB ldrd r10, [fp] + 1103 03b6 C146 mov r9, r8 + 1104 03b8 9FED278B vldr.64 d8, .L171 + 1105 03bc B846 mov r8, r7 + 1106 03be 0592 str r2, [sp, #20] + 1107 03c0 0646 mov r6, r0 + 1108 03c2 0F46 mov r7, r1 + 1109 03c4 10E0 b .L118 + 1110 .L115: + 1111 03c6 45EC104B vmov d0, r4, r5 + 1112 03ca FFF7FEFF bl sin + 1113 03ce 2246 mov r2, r4 + 1114 03d0 51EC100B vmov r0, r1, d0 + 1115 03d4 2B46 mov r3, r5 + 1116 03d6 FFF7FEFF bl __aeabi_ddiv + 1117 .L117: + 1118 03da E8E80201 strd r0, [r8], #8 + 1119 03de 019B ldr r3, [sp, #4] + 1120 03e0 4345 cmp r3, r8 + 1121 03e2 09F10209 add r9, r9, #2 + 1122 03e6 1FD0 beq .L167 + 1123 .L118: + 1124 03e8 4846 mov r0, r9 + 1125 03ea FFF7FEFF bl __aeabi_i2d + 1126 03ee 3246 mov r2, r6 + 1127 03f0 3B46 mov r3, r7 + 1128 03f2 FFF7FEFF bl __aeabi_ddiv + 1129 03f6 5246 mov r2, r10 + 1130 03f8 5B46 mov r3, fp + 1131 03fa FFF7FEFF bl __aeabi_dmul + 1132 03fe 1AA3 adr r3, .L171+16 + 1133 0400 D3E90023 ldrd r2, [r3] + 1134 0404 0446 mov r4, r0 + 1135 0406 0D46 mov r5, r1 + 1136 0408 FFF7FEFF bl __aeabi_dcmpgt + 1137 040c 0028 cmp r0, #0 + 1138 040e DAD0 beq .L115 + 1139 0410 17A3 adr r3, .L171+24 + 1140 0412 D3E90023 ldrd r2, [r3] + 1141 0416 2046 mov r0, r4 + 1142 0418 2946 mov r1, r5 + 1143 041a FFF7FEFF bl __aeabi_dcmplt + 1144 041e 0028 cmp r0, #0 + 1145 0420 D1D0 beq .L115 + 1146 0422 51EC180B vmov r0, r1, d8 + 1147 0426 D8E7 b .L117 + ARM GAS /tmp/ccAag610.s page 21 + + + 1148 .L167: + 1149 0428 049E ldr r6, [sp, #16] + 1150 042a 55EC194B vmov r4, r5, d9 + 1151 042e 9946 mov r9, r3 + 1152 .L119: + 1153 0430 96ED000B vldr.64 d0, [r6] + 1154 0434 45EC114B vmov d1, r4, r5 + 1155 0438 FFF7FEFF bl pow + 1156 043c A6EC020B vstmia.64 r6!, {d0} + 1157 0440 B145 cmp r9, r6 + 1158 0442 F5D1 bne .L119 + 1159 0444 039B ldr r3, [sp, #12] + 1160 0446 03EBD374 add r4, r3, r3, lsr #31 + 1161 044a 012B cmp r3, #1 + 1162 044c 4FEA6404 asr r4, r4, #1 + 1163 0450 3FF749AE bgt .L124 + 1164 0454 6AE7 b .L168 + 1165 .L172: + 1166 0456 00BF .align 3 + 1167 .L171: + 1168 0458 00000000 .word 0 + 1169 045c 0000F03F .word 1072693248 + 1170 0460 182D4454 .word 1413754136 + 1171 0464 FB210940 .word 1074340347 + 1172 0468 F168E388 .word -1998362383 + 1173 046c B5F8E4BE .word -1092290379 + 1174 0470 F168E388 .word -1998362383 + 1175 0474 B5F8E43E .word 1055193269 + 1177 .global __aeabi_d2iz + 1178 .global __aeabi_dcmple + 1179 .section .text.FIRFreqError,"ax",%progbits + 1180 .align 1 + 1181 .p2align 2,,3 + 1182 .global FIRFreqError + 1183 .syntax unified + 1184 .thumb + 1185 .thumb_func + 1186 .fpu fpv4-sp-d16 + 1188 FIRFreqError: + 1189 @ args = 4, pretend = 0, frame = 24 + 1190 @ frame_needed = 0, uses_anonymous_args = 0 + 1191 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1192 0004 2DED048B vpush.64 {d8, d9} + 1193 0008 87B0 sub sp, sp, #28 + 1194 000a CDE90010 strd r1, r0, [sp] + 1195 000e 0493 str r3, [sp, #16] + 1196 0010 0292 str r2, [sp, #8] + 1197 0012 002A cmp r2, #0 + 1198 0014 40F0CD80 bne .L174 + 1199 0018 0A23 movs r3, #10 + 1200 001a 0393 str r3, [sp, #12] + 1201 001c 904B ldr r3, .L290+40 + 1202 001e 00EBC10B add fp, r0, r1, lsl #3 + 1203 0022 0022 movs r2, #0 + 1204 .L181: + 1205 0024 1946 mov r1, r3 + 1206 0026 1046 mov r0, r2 + ARM GAS /tmp/ccAag610.s page 22 + + + 1207 0028 FFF7FEFF bl __aeabi_dadd + 1208 002c 009B ldr r3, [sp] + 1209 002e 002B cmp r3, #0 + 1210 0030 41EC180B vmov d8, r0, r1 + 1211 0034 40F3B680 ble .L237 + 1212 0038 0026 movs r6, #0 + 1213 003a 0027 movs r7, #0 + 1214 003c DDF804A0 ldr r10, [sp, #4] + 1215 0040 3446 mov r4, r6 + 1216 0042 3D46 mov r5, r7 + 1217 0044 01E0 b .L176 + 1218 .L238: + 1219 0046 4446 mov r4, r8 + 1220 0048 4D46 mov r5, r9 + 1221 .L176: + 1222 004a FAE80289 ldrd r8, [r10], #8 + 1223 004e 53EC182B vmov r2, r3, d8 + 1224 0052 2046 mov r0, r4 + 1225 0054 2946 mov r1, r5 + 1226 0056 FFF7FEFF bl __aeabi_dmul + 1227 005a 4246 mov r2, r8 + 1228 005c 4B46 mov r3, r9 + 1229 005e FFF7FEFF bl __aeabi_dadd + 1230 0062 3246 mov r2, r6 + 1231 0064 3B46 mov r3, r7 + 1232 0066 FFF7FEFF bl __aeabi_dsub + 1233 006a D345 cmp fp, r10 + 1234 006c 2646 mov r6, r4 + 1235 006e 2F46 mov r7, r5 + 1236 0070 8046 mov r8, r0 + 1237 0072 8946 mov r9, r1 + 1238 0074 E7D1 bne .L238 + 1239 0076 2246 mov r2, r4 + 1240 0078 2B46 mov r3, r5 + 1241 007a 2046 mov r0, r4 + 1242 007c 2946 mov r1, r5 + 1243 007e FFF7FEFF bl __aeabi_dmul + 1244 0082 4246 mov r2, r8 + 1245 0084 0646 mov r6, r0 + 1246 0086 0F46 mov r7, r1 + 1247 0088 4B46 mov r3, r9 + 1248 008a 4046 mov r0, r8 + 1249 008c 4946 mov r1, r9 + 1250 008e FFF7FEFF bl __aeabi_dmul + 1251 0092 0246 mov r2, r0 + 1252 0094 0B46 mov r3, r1 + 1253 0096 3046 mov r0, r6 + 1254 0098 3946 mov r1, r7 + 1255 009a FFF7FEFF bl __aeabi_dadd + 1256 009e 0646 mov r6, r0 + 1257 00a0 0F46 mov r7, r1 + 1258 .L175: + 1259 00a2 53EC182B vmov r2, r3, d8 + 1260 00a6 4046 mov r0, r8 + 1261 00a8 4946 mov r1, r9 + 1262 00aa FFF7FEFF bl __aeabi_dmul + 1263 00ae 2246 mov r2, r4 + ARM GAS /tmp/ccAag610.s page 23 + + + 1264 00b0 2B46 mov r3, r5 + 1265 00b2 FFF7FEFF bl __aeabi_dmul + 1266 00b6 0246 mov r2, r0 + 1267 00b8 0B46 mov r3, r1 + 1268 00ba 3046 mov r0, r6 + 1269 00bc 3946 mov r1, r7 + 1270 00be FFF7FEFF bl __aeabi_dsub + 1271 00c2 0246 mov r2, r0 + 1272 00c4 0B46 mov r3, r1 + 1273 00c6 43EC182B vmov d8, r2, r3 + 1274 00ca 0022 movs r2, #0 + 1275 00cc 0023 movs r3, #0 + 1276 00ce FFF7FEFF bl __aeabi_dcmpgt + 1277 00d2 80BB cbnz r0, .L282 + 1278 .L186: + 1279 00d4 0398 ldr r0, [sp, #12] + 1280 00d6 FFF7FEFF bl __aeabi_i2d + 1281 00da 624B ldr r3, .L290+44 + 1282 00dc 0022 movs r2, #0 + 1283 00de FFF7FEFF bl __aeabi_ddiv + 1284 00e2 049B ldr r3, [sp, #16] + 1285 00e4 D3E90023 ldrd r2, [r3] + 1286 00e8 0446 mov r4, r0 + 1287 00ea 0D46 mov r5, r1 + 1288 00ec 1046 mov r0, r2 + 1289 00ee 1946 mov r1, r3 + 1290 00f0 FFF7FEFF bl __aeabi_dadd + 1291 00f4 2246 mov r2, r4 + 1292 00f6 2B46 mov r3, r5 + 1293 00f8 FFF7FEFF bl __aeabi_dsub + 1294 00fc 4EA3 adr r3, .L290 + 1295 00fe D3E90023 ldrd r2, [r3] + 1296 0102 0446 mov r4, r0 + 1297 0104 0D46 mov r5, r1 + 1298 0106 FFF7FEFF bl __aeabi_dcmplt + 1299 010a 0028 cmp r0, #0 + 1300 010c 40F0C781 bne .L252 + 1301 0110 4BA3 adr r3, .L290+8 + 1302 0112 D3E90023 ldrd r2, [r3] + 1303 0116 2046 mov r0, r4 + 1304 0118 2946 mov r1, r5 + 1305 011a FFF7FEFF bl __aeabi_dcmpgt + 1306 011e 10B1 cbz r0, .L225 + 1307 0120 47A5 adr r5, .L290+8 + 1308 0122 D5E90045 ldrd r4, [r5] + 1309 .L225: + 1310 0126 049B ldr r3, [sp, #16] + 1311 0128 C3E90045 strd r4, [r3] + 1312 012c 07B0 add sp, sp, #28 + 1313 @ sp needed + 1314 012e BDEC048B vldm sp!, {d8-d9} + 1315 0132 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1316 .L282: + 1317 0136 B0EE480A vmov.f32 s0, s16 + 1318 013a F0EE680A vmov.f32 s1, s17 + 1319 013e FFF7FEFF bl sqrt + 1320 0142 55EC104B vmov r4, r5, d0 + ARM GAS /tmp/ccAag610.s page 24 + + + 1321 0146 40A3 adr r3, .L290+16 + 1322 0148 D3E90023 ldrd r2, [r3] + 1323 014c 2946 mov r1, r5 + 1324 014e 10EE100A vmov r0, s0 @ int + 1325 0152 FFF7FEFF bl __aeabi_dcmpgt + 1326 0156 DDE90263 ldrd r6, r3, [sp, #8] + 1327 015a 0028 cmp r0, #0 + 1328 015c 18BF it ne + 1329 015e 3346 movne r3, r6 + 1330 0160 0393 str r3, [sp, #12] + 1331 0162 2046 mov r0, r4 + 1332 0164 3AA3 adr r3, .L290+24 + 1333 0166 D3E90023 ldrd r2, [r3] + 1334 016a 2946 mov r1, r5 + 1335 016c FFF7FEFF bl __aeabi_dcmplt + 1336 0170 0028 cmp r0, #0 + 1337 0172 AFD1 bne .L186 + 1338 0174 0136 adds r6, r6, #1 + 1339 0176 B6F57A7F cmp r6, #1000 + 1340 017a 0296 str r6, [sp, #8] + 1341 017c AAD0 beq .L186 + 1342 017e 3046 mov r0, r6 + 1343 0180 FFF7FEFF bl __aeabi_i2d + 1344 0184 374B ldr r3, .L290+44 + 1345 0186 0022 movs r2, #0 + 1346 0188 FFF7FEFF bl __aeabi_ddiv + 1347 018c 32A3 adr r3, .L290+32 + 1348 018e D3E90023 ldrd r2, [r3] + 1349 0192 FFF7FEFF bl __aeabi_dmul + 1350 0196 41EC100B vmov d0, r0, r1 + 1351 019a FFF7FEFF bl cos + 1352 019e 53EC102B vmov r2, r3, d0 + 1353 01a2 3FE7 b .L181 + 1354 .L237: + 1355 01a4 0026 movs r6, #0 + 1356 01a6 0027 movs r7, #0 + 1357 01a8 3446 mov r4, r6 + 1358 01aa 3D46 mov r5, r7 + 1359 01ac B046 mov r8, r6 + 1360 01ae B946 mov r9, r7 + 1361 01b0 77E7 b .L175 + 1362 .L174: + 1363 01b2 012A cmp r2, #1 + 1364 01b4 1346 mov r3, r2 + 1365 01b6 00F0D181 beq .L283 + 1366 01ba 0499 ldr r1, [sp, #16] + 1367 01bc 022B cmp r3, #2 + 1368 01be D1E90001 ldrd r0, [r1] + 1369 01c2 284B ldr r3, .L290+44 + 1370 01c4 4FF00002 mov r2, #0 + 1371 01c8 00F09082 beq .L284 + 1372 01cc FFF7FEFF bl __aeabi_dmul + 1373 01d0 FFF7FEFF bl __aeabi_d2iz + 1374 01d4 031E subs r3, r0, #0 + 1375 01d6 0393 str r3, [sp, #12] + 1376 01d8 C0F2E183 blt .L208 + 1377 01dc 009A ldr r2, [sp] + ARM GAS /tmp/ccAag610.s page 25 + + + 1378 01de 0493 str r3, [sp, #16] + 1379 01e0 D100 lsls r1, r2, #3 + 1380 01e2 0591 str r1, [sp, #20] + 1381 01e4 0199 ldr r1, [sp, #4] + 1382 01e6 0293 str r3, [sp, #8] + 1383 01e8 01EBC20B add fp, r1, r2, lsl #3 + 1384 .L216: + 1385 01ec 0298 ldr r0, [sp, #8] + 1386 01ee FFF7FEFF bl __aeabi_i2d + 1387 01f2 1C4B ldr r3, .L290+44 + 1388 01f4 0022 movs r2, #0 + 1389 01f6 FFF7FEFF bl __aeabi_ddiv + 1390 01fa 17A3 adr r3, .L290+32 + 1391 01fc D3E90023 ldrd r2, [r3] + 1392 0200 FFF7FEFF bl __aeabi_dmul + 1393 0204 41EC100B vmov d0, r0, r1 + 1394 0208 FFF7FEFF bl cos + 1395 020c 53EC102B vmov r2, r3, d0 + 1396 0210 10EE100A vmov r0, s0 @ int + 1397 0214 1946 mov r1, r3 + 1398 0216 FFF7FEFF bl __aeabi_dadd + 1399 021a 009B ldr r3, [sp] + 1400 021c 002B cmp r3, #0 + 1401 021e 41EC180B vmov d8, r0, r1 + 1402 0222 40F38D81 ble .L245 + 1403 0226 0026 movs r6, #0 + 1404 0228 0027 movs r7, #0 + 1405 022a DDF804A0 ldr r10, [sp, #4] + 1406 022e 3446 mov r4, r6 + 1407 0230 3D46 mov r5, r7 + 1408 0232 1BE0 b .L210 + 1409 .L291: + 1410 0234 AFF30080 .align 3 + 1411 .L290: + 1412 0238 FCA9F1D2 .word -755914244 + 1413 023c 4D62503F .word 1062232653 + 1414 0240 AE47E17A .word 2061584302 + 1415 0244 14AEEF3F .word 1072672276 + 1416 0248 39B4C876 .word 1992864825 + 1417 024c BE9FE63F .word 1072078782 + 1418 0250 9A999999 .word -1717986918 + 1419 0254 9999B93F .word 1069128089 + 1420 0258 182D4454 .word 1413754136 + 1421 025c FB210940 .word 1074340347 + 1422 0260 0000F03F .word 1072693248 + 1423 0264 00408F40 .word 1083129856 + 1424 .L246: + 1425 0268 4446 mov r4, r8 + 1426 026a 4D46 mov r5, r9 + 1427 .L210: + 1428 026c FAE80289 ldrd r8, [r10], #8 + 1429 0270 53EC182B vmov r2, r3, d8 + 1430 0274 2046 mov r0, r4 + 1431 0276 2946 mov r1, r5 + 1432 0278 FFF7FEFF bl __aeabi_dmul + 1433 027c 4246 mov r2, r8 + 1434 027e 4B46 mov r3, r9 + ARM GAS /tmp/ccAag610.s page 26 + + + 1435 0280 FFF7FEFF bl __aeabi_dadd + 1436 0284 3246 mov r2, r6 + 1437 0286 3B46 mov r3, r7 + 1438 0288 FFF7FEFF bl __aeabi_dsub + 1439 028c D345 cmp fp, r10 + 1440 028e 2646 mov r6, r4 + 1441 0290 2F46 mov r7, r5 + 1442 0292 8046 mov r8, r0 + 1443 0294 8946 mov r9, r1 + 1444 0296 E7D1 bne .L246 + 1445 0298 2246 mov r2, r4 + 1446 029a 2B46 mov r3, r5 + 1447 029c 2046 mov r0, r4 + 1448 029e 2946 mov r1, r5 + 1449 02a0 FFF7FEFF bl __aeabi_dmul + 1450 02a4 4246 mov r2, r8 + 1451 02a6 0646 mov r6, r0 + 1452 02a8 0F46 mov r7, r1 + 1453 02aa 4B46 mov r3, r9 + 1454 02ac 4046 mov r0, r8 + 1455 02ae 4946 mov r1, r9 + 1456 02b0 FFF7FEFF bl __aeabi_dmul + 1457 02b4 0246 mov r2, r0 + 1458 02b6 0B46 mov r3, r1 + 1459 02b8 3046 mov r0, r6 + 1460 02ba 3946 mov r1, r7 + 1461 02bc FFF7FEFF bl __aeabi_dadd + 1462 02c0 0646 mov r6, r0 + 1463 02c2 0F46 mov r7, r1 + 1464 .L209: + 1465 02c4 53EC182B vmov r2, r3, d8 + 1466 02c8 4046 mov r0, r8 + 1467 02ca 4946 mov r1, r9 + 1468 02cc FFF7FEFF bl __aeabi_dmul + 1469 02d0 2246 mov r2, r4 + 1470 02d2 2B46 mov r3, r5 + 1471 02d4 FFF7FEFF bl __aeabi_dmul + 1472 02d8 0246 mov r2, r0 + 1473 02da 0B46 mov r3, r1 + 1474 02dc 3046 mov r0, r6 + 1475 02de 3946 mov r1, r7 + 1476 02e0 FFF7FEFF bl __aeabi_dsub + 1477 02e4 0246 mov r2, r0 + 1478 02e6 0B46 mov r3, r1 + 1479 02e8 43EC182B vmov d8, r2, r3 + 1480 02ec 0022 movs r2, #0 + 1481 02ee 0023 movs r3, #0 + 1482 02f0 FFF7FEFF bl __aeabi_dcmpgt + 1483 02f4 0028 cmp r0, #0 + 1484 02f6 40F0E180 bne .L285 + 1485 02fa 029B ldr r3, [sp, #8] + 1486 02fc 0493 str r3, [sp, #16] + 1487 .L211: + 1488 02fe 029B ldr r3, [sp, #8] + 1489 0300 013B subs r3, r3, #1 + 1490 0302 0293 str r3, [sp, #8] + 1491 0304 0133 adds r3, r3, #1 + ARM GAS /tmp/ccAag610.s page 27 + + + 1492 0306 7FF471AF bne .L216 + 1493 .L215: + 1494 030a 0498 ldr r0, [sp, #16] + 1495 030c FFF7FEFF bl __aeabi_i2d + 1496 0310 AF4B ldr r3, .L292+56 + 1497 0312 0022 movs r2, #0 + 1498 0314 FFF7FEFF bl __aeabi_ddiv + 1499 0318 039B ldr r3, [sp, #12] + 1500 031a B3F57A7F cmp r3, #1000 + 1501 031e 41EC190B vmov d9, r0, r1 + 1502 0322 79DA bge .L217 + 1503 .L236: + 1504 0324 059B ldr r3, [sp, #20] + 1505 0326 019A ldr r2, [sp, #4] + 1506 0328 1344 add r3, r3, r2 + 1507 032a 9B46 mov fp, r3 + 1508 032c 039B ldr r3, [sp, #12] + 1509 032e 0293 str r3, [sp, #8] + 1510 .L224: + 1511 0330 0298 ldr r0, [sp, #8] + 1512 0332 FFF7FEFF bl __aeabi_i2d + 1513 0336 A64B ldr r3, .L292+56 + 1514 0338 0022 movs r2, #0 + 1515 033a FFF7FEFF bl __aeabi_ddiv + 1516 033e 96A3 adr r3, .L292 + 1517 0340 D3E90023 ldrd r2, [r3] + 1518 0344 FFF7FEFF bl __aeabi_dmul + 1519 0348 41EC100B vmov d0, r0, r1 + 1520 034c FFF7FEFF bl cos + 1521 0350 53EC102B vmov r2, r3, d0 + 1522 0354 10EE100A vmov r0, s0 @ int + 1523 0358 1946 mov r1, r3 + 1524 035a FFF7FEFF bl __aeabi_dadd + 1525 035e 009B ldr r3, [sp] + 1526 0360 002B cmp r3, #0 + 1527 0362 41EC180B vmov d8, r0, r1 + 1528 0366 40F3F280 ble .L248 + 1529 036a 0026 movs r6, #0 + 1530 036c 0027 movs r7, #0 + 1531 036e DDF804A0 ldr r10, [sp, #4] + 1532 0372 3446 mov r4, r6 + 1533 0374 3D46 mov r5, r7 + 1534 0376 01E0 b .L219 + 1535 .L249: + 1536 0378 4446 mov r4, r8 + 1537 037a 4D46 mov r5, r9 + 1538 .L219: + 1539 037c FAE80289 ldrd r8, [r10], #8 + 1540 0380 2246 mov r2, r4 + 1541 0382 2B46 mov r3, r5 + 1542 0384 51EC180B vmov r0, r1, d8 + 1543 0388 FFF7FEFF bl __aeabi_dmul + 1544 038c 4246 mov r2, r8 + 1545 038e 4B46 mov r3, r9 + 1546 0390 FFF7FEFF bl __aeabi_dadd + 1547 0394 3246 mov r2, r6 + 1548 0396 3B46 mov r3, r7 + ARM GAS /tmp/ccAag610.s page 28 + + + 1549 0398 FFF7FEFF bl __aeabi_dsub + 1550 039c D345 cmp fp, r10 + 1551 039e 2646 mov r6, r4 + 1552 03a0 2F46 mov r7, r5 + 1553 03a2 8046 mov r8, r0 + 1554 03a4 8946 mov r9, r1 + 1555 03a6 E7D1 bne .L249 + 1556 03a8 2246 mov r2, r4 + 1557 03aa 2B46 mov r3, r5 + 1558 03ac 2046 mov r0, r4 + 1559 03ae 2946 mov r1, r5 + 1560 03b0 FFF7FEFF bl __aeabi_dmul + 1561 03b4 4246 mov r2, r8 + 1562 03b6 0646 mov r6, r0 + 1563 03b8 0F46 mov r7, r1 + 1564 03ba 4B46 mov r3, r9 + 1565 03bc 4046 mov r0, r8 + 1566 03be 4946 mov r1, r9 + 1567 03c0 FFF7FEFF bl __aeabi_dmul + 1568 03c4 0246 mov r2, r0 + 1569 03c6 0B46 mov r3, r1 + 1570 03c8 3046 mov r0, r6 + 1571 03ca 3946 mov r1, r7 + 1572 03cc FFF7FEFF bl __aeabi_dadd + 1573 03d0 0646 mov r6, r0 + 1574 03d2 0F46 mov r7, r1 + 1575 .L218: + 1576 03d4 53EC182B vmov r2, r3, d8 + 1577 03d8 4046 mov r0, r8 + 1578 03da 4946 mov r1, r9 + 1579 03dc FFF7FEFF bl __aeabi_dmul + 1580 03e0 2246 mov r2, r4 + 1581 03e2 2B46 mov r3, r5 + 1582 03e4 FFF7FEFF bl __aeabi_dmul + 1583 03e8 0246 mov r2, r0 + 1584 03ea 0B46 mov r3, r1 + 1585 03ec 3046 mov r0, r6 + 1586 03ee 3946 mov r1, r7 + 1587 03f0 FFF7FEFF bl __aeabi_dsub + 1588 03f4 0246 mov r2, r0 + 1589 03f6 0B46 mov r3, r1 + 1590 03f8 43EC182B vmov d8, r2, r3 + 1591 03fc 0022 movs r2, #0 + 1592 03fe 0023 movs r3, #0 + 1593 0400 FFF7FEFF bl __aeabi_dcmpgt + 1594 0404 0028 cmp r0, #0 + 1595 0406 7AD1 bne .L286 + 1596 0408 029B ldr r3, [sp, #8] + 1597 040a 0393 str r3, [sp, #12] + 1598 .L220: + 1599 040c 029B ldr r3, [sp, #8] + 1600 040e 0133 adds r3, r3, #1 + 1601 0410 B3F57A7F cmp r3, #1000 + 1602 0414 0293 str r3, [sp, #8] + 1603 0416 8BD1 bne .L224 + 1604 .L217: + 1605 0418 0398 ldr r0, [sp, #12] + ARM GAS /tmp/ccAag610.s page 29 + + + 1606 041a FFF7FEFF bl __aeabi_i2d + 1607 041e 6C4B ldr r3, .L292+56 + 1608 0420 0022 movs r2, #0 + 1609 0422 FFF7FEFF bl __aeabi_ddiv + 1610 0426 149B ldr r3, [sp, #80] + 1611 0428 D3E90023 ldrd r2, [r3] + 1612 042c 0446 mov r4, r0 + 1613 042e 0D46 mov r5, r1 + 1614 0430 1046 mov r0, r2 + 1615 0432 1946 mov r1, r3 + 1616 0434 FFF7FEFF bl __aeabi_dadd + 1617 0438 53EC192B vmov r2, r3, d9 + 1618 043c 0646 mov r6, r0 + 1619 043e 0F46 mov r7, r1 + 1620 0440 2046 mov r0, r4 + 1621 0442 2946 mov r1, r5 + 1622 0444 FFF7FEFF bl __aeabi_dsub + 1623 0448 0246 mov r2, r0 + 1624 044a 0B46 mov r3, r1 + 1625 044c 3046 mov r0, r6 + 1626 044e 3946 mov r1, r7 + 1627 0450 FFF7FEFF bl __aeabi_dsub + 1628 0454 52A3 adr r3, .L292+8 + 1629 0456 D3E90023 ldrd r2, [r3] + 1630 045a 0446 mov r4, r0 + 1631 045c 0D46 mov r5, r1 + 1632 045e FFF7FEFF bl __aeabi_dcmplt + 1633 0462 00B3 cbz r0, .L287 + 1634 0464 4EA3 adr r3, .L292+8 + 1635 0466 D3E90023 ldrd r2, [r3] + 1636 046a 3046 mov r0, r6 + 1637 046c 3946 mov r1, r7 + 1638 046e FFF7FEFF bl __aeabi_dcmplt + 1639 0472 0028 cmp r0, #0 + 1640 0474 00F02F81 beq .L288 + 1641 .L228: + 1642 0478 4BA3 adr r3, .L292+16 + 1643 047a D3E90023 ldrd r2, [r3] + 1644 047e 3046 mov r0, r6 + 1645 0480 3946 mov r1, r7 + 1646 0482 FFF7FEFF bl __aeabi_dcmpgt + 1647 0486 10B1 cbz r0, .L230 + 1648 0488 47A7 adr r7, .L292+16 + 1649 048a D7E90067 ldrd r6, [r7] + 1650 .L230: + 1651 048e 149B ldr r3, [sp, #80] + 1652 0490 C3E90067 strd r6, [r3] + 1653 0494 07B0 add sp, sp, #28 + 1654 @ sp needed + 1655 0496 BDEC048B vldm sp!, {d8-d9} + 1656 049a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1657 .L252: + 1658 049e 44A5 adr r5, .L292+24 + 1659 04a0 D5E90045 ldrd r4, [r5] + 1660 04a4 3FE6 b .L225 + 1661 .L287: + 1662 04a6 2246 mov r2, r4 + ARM GAS /tmp/ccAag610.s page 30 + + + 1663 04a8 2B46 mov r3, r5 + 1664 04aa 3046 mov r0, r6 + 1665 04ac 3946 mov r1, r7 + 1666 04ae FFF7FEFF bl __aeabi_dcmplt + 1667 04b2 0028 cmp r0, #0 + 1668 04b4 E0D1 bne .L228 + 1669 04b6 2646 mov r6, r4 + 1670 04b8 2F46 mov r7, r5 + 1671 04ba DDE7 b .L228 + 1672 .L285: + 1673 04bc B0EE480A vmov.f32 s0, s16 + 1674 04c0 F0EE680A vmov.f32 s1, s17 + 1675 04c4 FFF7FEFF bl sqrt + 1676 04c8 55EC104B vmov r4, r5, d0 + 1677 04cc 3AA3 adr r3, .L292+32 + 1678 04ce D3E90023 ldrd r2, [r3] + 1679 04d2 2946 mov r1, r5 + 1680 04d4 10EE100A vmov r0, s0 @ int + 1681 04d8 FFF7FEFF bl __aeabi_dcmple + 1682 04dc 049B ldr r3, [sp, #16] + 1683 04de 029A ldr r2, [sp, #8] + 1684 04e0 0028 cmp r0, #0 + 1685 04e2 18BF it ne + 1686 04e4 1346 movne r3, r2 + 1687 04e6 0493 str r3, [sp, #16] + 1688 04e8 2046 mov r0, r4 + 1689 04ea 35A3 adr r3, .L292+40 + 1690 04ec D3E90023 ldrd r2, [r3] + 1691 04f0 2946 mov r1, r5 + 1692 04f2 FFF7FEFF bl __aeabi_dcmpgt + 1693 04f6 0028 cmp r0, #0 + 1694 04f8 3FF401AF beq .L211 + 1695 04fc 05E7 b .L215 + 1696 .L286: + 1697 04fe B0EE480A vmov.f32 s0, s16 + 1698 0502 F0EE680A vmov.f32 s1, s17 + 1699 0506 FFF7FEFF bl sqrt + 1700 050a 55EC104B vmov r4, r5, d0 + 1701 050e 2AA3 adr r3, .L292+32 + 1702 0510 D3E90023 ldrd r2, [r3] + 1703 0514 2946 mov r1, r5 + 1704 0516 10EE100A vmov r0, s0 @ int + 1705 051a FFF7FEFF bl __aeabi_dcmple + 1706 051e DDE90223 ldrd r2, r3, [sp, #8] + 1707 0522 0028 cmp r0, #0 + 1708 0524 18BF it ne + 1709 0526 1346 movne r3, r2 + 1710 0528 0393 str r3, [sp, #12] + 1711 052a 2046 mov r0, r4 + 1712 052c 24A3 adr r3, .L292+40 + 1713 052e D3E90023 ldrd r2, [r3] + 1714 0532 2946 mov r1, r5 + 1715 0534 FFF7FEFF bl __aeabi_dcmpgt + 1716 0538 0028 cmp r0, #0 + 1717 053a 3FF467AF beq .L220 + 1718 053e 6BE7 b .L217 + 1719 .L245: + ARM GAS /tmp/ccAag610.s page 31 + + + 1720 0540 0026 movs r6, #0 + 1721 0542 0027 movs r7, #0 + 1722 0544 3446 mov r4, r6 + 1723 0546 3D46 mov r5, r7 + 1724 0548 B046 mov r8, r6 + 1725 054a B946 mov r9, r7 + 1726 054c BAE6 b .L209 + 1727 .L248: + 1728 054e 0026 movs r6, #0 + 1729 0550 0027 movs r7, #0 + 1730 0552 3446 mov r4, r6 + 1731 0554 3D46 mov r5, r7 + 1732 0556 B046 mov r8, r6 + 1733 0558 B946 mov r9, r7 + 1734 055a 3BE7 b .L218 + 1735 .L283: + 1736 055c 00EBC10B add fp, r0, r1, lsl #3 + 1737 0560 40F2E731 movw r1, #999 + 1738 0564 40F2DE30 movw r0, #990 + 1739 0568 17A3 adr r3, .L292+48 + 1740 056a D3E90023 ldrd r2, [r3] + 1741 056e CDE90210 strd r1, r0, [sp, #8] + 1742 .L190: + 1743 0572 1946 mov r1, r3 + 1744 0574 1046 mov r0, r2 + 1745 0576 FFF7FEFF bl __aeabi_dadd + 1746 057a 009B ldr r3, [sp] + 1747 057c 002B cmp r3, #0 + 1748 057e 41EC180B vmov d8, r0, r1 + 1749 0582 40F3AC80 ble .L239 + 1750 0586 0026 movs r6, #0 + 1751 0588 0027 movs r7, #0 + 1752 058a DDF804A0 ldr r10, [sp, #4] + 1753 058e 3446 mov r4, r6 + 1754 0590 3D46 mov r5, r7 + 1755 0592 21E0 b .L185 + 1756 .L293: + 1757 0594 AFF30080 .align 3 + 1758 .L292: + 1759 0598 182D4454 .word 1413754136 + 1760 059c FB210940 .word 1074340347 + 1761 05a0 7B14AE47 .word 1202590843 + 1762 05a4 E17A843F .word 1065646817 + 1763 05a8 5C8FC2F5 .word -171798692 + 1764 05ac 285CEF3F .word 1072651304 + 1765 05b0 FCA9F1D2 .word -755914244 + 1766 05b4 4D62503F .word 1062232653 + 1767 05b8 39B4C876 .word 1992864825 + 1768 05bc BE9FE63F .word 1072078782 + 1769 05c0 AE47E17A .word 2061584302 + 1770 05c4 14AEEF3F .word 1072672276 + 1771 05c8 FF81A6A6 .word -1499037185 + 1772 05cc F5FFEFBF .word -1074790411 + 1773 05d0 00408F40 .word 1083129856 + 1774 .L240: + 1775 05d4 4446 mov r4, r8 + 1776 05d6 4D46 mov r5, r9 + ARM GAS /tmp/ccAag610.s page 32 + + + 1777 .L185: + 1778 05d8 FAE80289 ldrd r8, [r10], #8 + 1779 05dc 53EC182B vmov r2, r3, d8 + 1780 05e0 2046 mov r0, r4 + 1781 05e2 2946 mov r1, r5 + 1782 05e4 FFF7FEFF bl __aeabi_dmul + 1783 05e8 4246 mov r2, r8 + 1784 05ea 4B46 mov r3, r9 + 1785 05ec FFF7FEFF bl __aeabi_dadd + 1786 05f0 3246 mov r2, r6 + 1787 05f2 3B46 mov r3, r7 + 1788 05f4 FFF7FEFF bl __aeabi_dsub + 1789 05f8 D345 cmp fp, r10 + 1790 05fa 2646 mov r6, r4 + 1791 05fc 2F46 mov r7, r5 + 1792 05fe 8046 mov r8, r0 + 1793 0600 8946 mov r9, r1 + 1794 0602 E7D1 bne .L240 + 1795 0604 2246 mov r2, r4 + 1796 0606 2B46 mov r3, r5 + 1797 0608 2046 mov r0, r4 + 1798 060a 2946 mov r1, r5 + 1799 060c FFF7FEFF bl __aeabi_dmul + 1800 0610 4246 mov r2, r8 + 1801 0612 0646 mov r6, r0 + 1802 0614 0F46 mov r7, r1 + 1803 0616 4B46 mov r3, r9 + 1804 0618 4046 mov r0, r8 + 1805 061a 4946 mov r1, r9 + 1806 061c FFF7FEFF bl __aeabi_dmul + 1807 0620 0246 mov r2, r0 + 1808 0622 0B46 mov r3, r1 + 1809 0624 3046 mov r0, r6 + 1810 0626 3946 mov r1, r7 + 1811 0628 FFF7FEFF bl __aeabi_dadd + 1812 062c 0646 mov r6, r0 + 1813 062e 0F46 mov r7, r1 + 1814 .L184: + 1815 0630 53EC182B vmov r2, r3, d8 + 1816 0634 4046 mov r0, r8 + 1817 0636 4946 mov r1, r9 + 1818 0638 FFF7FEFF bl __aeabi_dmul + 1819 063c 2246 mov r2, r4 + 1820 063e 2B46 mov r3, r5 + 1821 0640 FFF7FEFF bl __aeabi_dmul + 1822 0644 0246 mov r2, r0 + 1823 0646 0B46 mov r3, r1 + 1824 0648 3046 mov r0, r6 + 1825 064a 3946 mov r1, r7 + 1826 064c FFF7FEFF bl __aeabi_dsub + 1827 0650 0246 mov r2, r0 + 1828 0652 0B46 mov r3, r1 + 1829 0654 43EC182B vmov d8, r2, r3 + 1830 0658 0022 movs r2, #0 + 1831 065a 0023 movs r3, #0 + 1832 065c FFF7FEFF bl __aeabi_dcmpgt + 1833 0660 0028 cmp r0, #0 + ARM GAS /tmp/ccAag610.s page 33 + + + 1834 0662 3FF437AD beq .L186 + 1835 0666 B0EE480A vmov.f32 s0, s16 + 1836 066a F0EE680A vmov.f32 s1, s17 + 1837 066e FFF7FEFF bl sqrt + 1838 0672 55EC104B vmov r4, r5, d0 + 1839 0676 DAA3 adr r3, .L294+16 + 1840 0678 D3E90023 ldrd r2, [r3] + 1841 067c 2946 mov r1, r5 + 1842 067e 10EE100A vmov r0, s0 @ int + 1843 0682 FFF7FEFF bl __aeabi_dcmpgt + 1844 0686 DDE90263 ldrd r6, r3, [sp, #8] + 1845 068a 0028 cmp r0, #0 + 1846 068c 18BF it ne + 1847 068e 3346 movne r3, r6 + 1848 0690 0393 str r3, [sp, #12] + 1849 0692 2046 mov r0, r4 + 1850 0694 D4A3 adr r3, .L294+24 + 1851 0696 D3E90023 ldrd r2, [r3] + 1852 069a 2946 mov r1, r5 + 1853 069c FFF7FEFF bl __aeabi_dcmplt + 1854 06a0 0028 cmp r0, #0 + 1855 06a2 7FF417AD bne .L186 + 1856 06a6 731E subs r3, r6, #1 + 1857 06a8 5A1C adds r2, r3, #1 + 1858 06aa 0293 str r3, [sp, #8] + 1859 06ac 3FF412AD beq .L186 + 1860 06b0 1846 mov r0, r3 + 1861 06b2 FFF7FEFF bl __aeabi_i2d + 1862 06b6 CE4B ldr r3, .L294+32 + 1863 06b8 0022 movs r2, #0 + 1864 06ba FFF7FEFF bl __aeabi_ddiv + 1865 06be C4A3 adr r3, .L294 + 1866 06c0 D3E90023 ldrd r2, [r3] + 1867 06c4 FFF7FEFF bl __aeabi_dmul + 1868 06c8 41EC100B vmov d0, r0, r1 + 1869 06cc FFF7FEFF bl cos + 1870 06d0 53EC102B vmov r2, r3, d0 + 1871 06d4 4DE7 b .L190 + 1872 .L288: + 1873 06d6 C0A7 adr r7, .L294+8 + 1874 06d8 D7E90067 ldrd r6, [r7] + 1875 06dc D7E6 b .L230 + 1876 .L239: + 1877 06de 0026 movs r6, #0 + 1878 06e0 0027 movs r7, #0 + 1879 06e2 3446 mov r4, r6 + 1880 06e4 3D46 mov r5, r7 + 1881 06e6 B046 mov r8, r6 + 1882 06e8 B946 mov r9, r7 + 1883 06ea A1E7 b .L184 + 1884 .L284: + 1885 06ec FFF7FEFF bl __aeabi_dmul + 1886 06f0 FFF7FEFF bl __aeabi_d2iz + 1887 06f4 031E subs r3, r0, #0 + 1888 06f6 0393 str r3, [sp, #12] + 1889 06f8 C0F25D81 blt .L192 + 1890 06fc 009A ldr r2, [sp] + ARM GAS /tmp/ccAag610.s page 34 + + + 1891 06fe 0493 str r3, [sp, #16] + 1892 0700 D100 lsls r1, r2, #3 + 1893 0702 0591 str r1, [sp, #20] + 1894 0704 0199 ldr r1, [sp, #4] + 1895 0706 0293 str r3, [sp, #8] + 1896 0708 01EBC20B add fp, r1, r2, lsl #3 + 1897 .L199: + 1898 070c 0298 ldr r0, [sp, #8] + 1899 070e FFF7FEFF bl __aeabi_i2d + 1900 0712 B74B ldr r3, .L294+32 + 1901 0714 0022 movs r2, #0 + 1902 0716 FFF7FEFF bl __aeabi_ddiv + 1903 071a ADA3 adr r3, .L294 + 1904 071c D3E90023 ldrd r2, [r3] + 1905 0720 FFF7FEFF bl __aeabi_dmul + 1906 0724 41EC100B vmov d0, r0, r1 + 1907 0728 FFF7FEFF bl cos + 1908 072c 53EC102B vmov r2, r3, d0 + 1909 0730 10EE100A vmov r0, s0 @ int + 1910 0734 1946 mov r1, r3 + 1911 0736 FFF7FEFF bl __aeabi_dadd + 1912 073a 009B ldr r3, [sp] + 1913 073c 002B cmp r3, #0 + 1914 073e 41EC180B vmov d8, r0, r1 + 1915 0742 40F32581 ble .L241 + 1916 0746 0026 movs r6, #0 + 1917 0748 0027 movs r7, #0 + 1918 074a DDF804A0 ldr r10, [sp, #4] + 1919 074e 3446 mov r4, r6 + 1920 0750 3D46 mov r5, r7 + 1921 0752 01E0 b .L194 + 1922 .L242: + 1923 0754 4446 mov r4, r8 + 1924 0756 4D46 mov r5, r9 + 1925 .L194: + 1926 0758 FAE80289 ldrd r8, [r10], #8 + 1927 075c 53EC182B vmov r2, r3, d8 + 1928 0760 2046 mov r0, r4 + 1929 0762 2946 mov r1, r5 + 1930 0764 FFF7FEFF bl __aeabi_dmul + 1931 0768 4246 mov r2, r8 + 1932 076a 4B46 mov r3, r9 + 1933 076c FFF7FEFF bl __aeabi_dadd + 1934 0770 3246 mov r2, r6 + 1935 0772 3B46 mov r3, r7 + 1936 0774 FFF7FEFF bl __aeabi_dsub + 1937 0778 D345 cmp fp, r10 + 1938 077a 2646 mov r6, r4 + 1939 077c 2F46 mov r7, r5 + 1940 077e 8046 mov r8, r0 + 1941 0780 8946 mov r9, r1 + 1942 0782 E7D1 bne .L242 + 1943 0784 2246 mov r2, r4 + 1944 0786 2B46 mov r3, r5 + 1945 0788 2046 mov r0, r4 + 1946 078a 2946 mov r1, r5 + 1947 078c FFF7FEFF bl __aeabi_dmul + ARM GAS /tmp/ccAag610.s page 35 + + + 1948 0790 4246 mov r2, r8 + 1949 0792 0646 mov r6, r0 + 1950 0794 0F46 mov r7, r1 + 1951 0796 4B46 mov r3, r9 + 1952 0798 4046 mov r0, r8 + 1953 079a 4946 mov r1, r9 + 1954 079c FFF7FEFF bl __aeabi_dmul + 1955 07a0 0246 mov r2, r0 + 1956 07a2 0B46 mov r3, r1 + 1957 07a4 3046 mov r0, r6 + 1958 07a6 3946 mov r1, r7 + 1959 07a8 FFF7FEFF bl __aeabi_dadd + 1960 07ac 0646 mov r6, r0 + 1961 07ae 0F46 mov r7, r1 + 1962 .L193: + 1963 07b0 53EC182B vmov r2, r3, d8 + 1964 07b4 4046 mov r0, r8 + 1965 07b6 4946 mov r1, r9 + 1966 07b8 FFF7FEFF bl __aeabi_dmul + 1967 07bc 2246 mov r2, r4 + 1968 07be 2B46 mov r3, r5 + 1969 07c0 FFF7FEFF bl __aeabi_dmul + 1970 07c4 0246 mov r2, r0 + 1971 07c6 0B46 mov r3, r1 + 1972 07c8 3046 mov r0, r6 + 1973 07ca 3946 mov r1, r7 + 1974 07cc FFF7FEFF bl __aeabi_dsub + 1975 07d0 0246 mov r2, r0 + 1976 07d2 0B46 mov r3, r1 + 1977 07d4 43EC182B vmov d8, r2, r3 + 1978 07d8 0022 movs r2, #0 + 1979 07da 0023 movs r3, #0 + 1980 07dc FFF7FEFF bl __aeabi_dcmpgt + 1981 07e0 0028 cmp r0, #0 + 1982 07e2 40F0A880 bne .L289 + 1983 .L195: + 1984 07e6 0498 ldr r0, [sp, #16] + 1985 07e8 FFF7FEFF bl __aeabi_i2d + 1986 07ec 804B ldr r3, .L294+32 + 1987 07ee 0022 movs r2, #0 + 1988 07f0 FFF7FEFF bl __aeabi_ddiv + 1989 07f4 039B ldr r3, [sp, #12] + 1990 07f6 B3F57A7F cmp r3, #1000 + 1991 07fa 41EC190B vmov d9, r0, r1 + 1992 07fe BFF60BAE bge .L217 + 1993 .L235: + 1994 0802 059B ldr r3, [sp, #20] + 1995 0804 019A ldr r2, [sp, #4] + 1996 0806 1344 add r3, r3, r2 + 1997 0808 9B46 mov fp, r3 + 1998 080a 039B ldr r3, [sp, #12] + 1999 080c 0293 str r3, [sp, #8] + 2000 .L206: + 2001 080e 0298 ldr r0, [sp, #8] + 2002 0810 FFF7FEFF bl __aeabi_i2d + 2003 0814 764B ldr r3, .L294+32 + 2004 0816 0022 movs r2, #0 + ARM GAS /tmp/ccAag610.s page 36 + + + 2005 0818 FFF7FEFF bl __aeabi_ddiv + 2006 081c 6CA3 adr r3, .L294 + 2007 081e D3E90023 ldrd r2, [r3] + 2008 0822 FFF7FEFF bl __aeabi_dmul + 2009 0826 41EC100B vmov d0, r0, r1 + 2010 082a FFF7FEFF bl cos + 2011 082e 53EC102B vmov r2, r3, d0 + 2012 0832 10EE100A vmov r0, s0 @ int + 2013 0836 1946 mov r1, r3 + 2014 0838 FFF7FEFF bl __aeabi_dadd + 2015 083c 009B ldr r3, [sp] + 2016 083e 002B cmp r3, #0 + 2017 0840 41EC180B vmov d8, r0, r1 + 2018 0844 40F39D80 ble .L243 + 2019 0848 0026 movs r6, #0 + 2020 084a 0027 movs r7, #0 + 2021 084c DDF804A0 ldr r10, [sp, #4] + 2022 0850 3446 mov r4, r6 + 2023 0852 3D46 mov r5, r7 + 2024 0854 01E0 b .L202 + 2025 .L244: + 2026 0856 4446 mov r4, r8 + 2027 0858 4D46 mov r5, r9 + 2028 .L202: + 2029 085a FAE80289 ldrd r8, [r10], #8 + 2030 085e 2246 mov r2, r4 + 2031 0860 2B46 mov r3, r5 + 2032 0862 51EC180B vmov r0, r1, d8 + 2033 0866 FFF7FEFF bl __aeabi_dmul + 2034 086a 4246 mov r2, r8 + 2035 086c 4B46 mov r3, r9 + 2036 086e FFF7FEFF bl __aeabi_dadd + 2037 0872 3246 mov r2, r6 + 2038 0874 3B46 mov r3, r7 + 2039 0876 FFF7FEFF bl __aeabi_dsub + 2040 087a D345 cmp fp, r10 + 2041 087c 2646 mov r6, r4 + 2042 087e 2F46 mov r7, r5 + 2043 0880 8046 mov r8, r0 + 2044 0882 8946 mov r9, r1 + 2045 0884 E7D1 bne .L244 + 2046 0886 2246 mov r2, r4 + 2047 0888 2B46 mov r3, r5 + 2048 088a 2046 mov r0, r4 + 2049 088c 2946 mov r1, r5 + 2050 088e FFF7FEFF bl __aeabi_dmul + 2051 0892 4246 mov r2, r8 + 2052 0894 0646 mov r6, r0 + 2053 0896 0F46 mov r7, r1 + 2054 0898 4B46 mov r3, r9 + 2055 089a 4046 mov r0, r8 + 2056 089c 4946 mov r1, r9 + 2057 089e FFF7FEFF bl __aeabi_dmul + 2058 08a2 0246 mov r2, r0 + 2059 08a4 0B46 mov r3, r1 + 2060 08a6 3046 mov r0, r6 + 2061 08a8 3946 mov r1, r7 + ARM GAS /tmp/ccAag610.s page 37 + + + 2062 08aa FFF7FEFF bl __aeabi_dadd + 2063 08ae 0646 mov r6, r0 + 2064 08b0 0F46 mov r7, r1 + 2065 .L201: + 2066 08b2 51EC180B vmov r0, r1, d8 + 2067 08b6 4246 mov r2, r8 + 2068 08b8 4B46 mov r3, r9 + 2069 08ba FFF7FEFF bl __aeabi_dmul + 2070 08be 2246 mov r2, r4 + 2071 08c0 2B46 mov r3, r5 + 2072 08c2 FFF7FEFF bl __aeabi_dmul + 2073 08c6 0246 mov r2, r0 + 2074 08c8 0B46 mov r3, r1 + 2075 08ca 3046 mov r0, r6 + 2076 08cc 3946 mov r1, r7 + 2077 08ce FFF7FEFF bl __aeabi_dsub + 2078 08d2 0246 mov r2, r0 + 2079 08d4 0B46 mov r3, r1 + 2080 08d6 43EC182B vmov d8, r2, r3 + 2081 08da 0022 movs r2, #0 + 2082 08dc 0023 movs r3, #0 + 2083 08de FFF7FEFF bl __aeabi_dcmpgt + 2084 08e2 0028 cmp r0, #0 + 2085 08e4 3FF498AD beq .L217 + 2086 08e8 B0EE480A vmov.f32 s0, s16 + 2087 08ec F0EE680A vmov.f32 s1, s17 + 2088 08f0 FFF7FEFF bl sqrt + 2089 08f4 55EC104B vmov r4, r5, d0 + 2090 08f8 39A3 adr r3, .L294+16 + 2091 08fa D3E90023 ldrd r2, [r3] + 2092 08fe 2946 mov r1, r5 + 2093 0900 10EE100A vmov r0, s0 @ int + 2094 0904 FFF7FEFF bl __aeabi_dcmpgt + 2095 0908 DDE90263 ldrd r6, r3, [sp, #8] + 2096 090c 0028 cmp r0, #0 + 2097 090e 18BF it ne + 2098 0910 3346 movne r3, r6 + 2099 0912 0393 str r3, [sp, #12] + 2100 0914 2046 mov r0, r4 + 2101 0916 34A3 adr r3, .L294+24 + 2102 0918 D3E90023 ldrd r2, [r3] + 2103 091c 2946 mov r1, r5 + 2104 091e FFF7FEFF bl __aeabi_dcmplt + 2105 0922 0028 cmp r0, #0 + 2106 0924 7FF478AD bne .L217 + 2107 0928 0136 adds r6, r6, #1 + 2108 092a B6F57A7F cmp r6, #1000 + 2109 092e 0296 str r6, [sp, #8] + 2110 0930 7FF46DAF bne .L206 + 2111 0934 70E5 b .L217 + 2112 .L289: + 2113 0936 B0EE480A vmov.f32 s0, s16 + 2114 093a F0EE680A vmov.f32 s1, s17 + 2115 093e FFF7FEFF bl sqrt + 2116 0942 55EC104B vmov r4, r5, d0 + 2117 0946 26A3 adr r3, .L294+16 + 2118 0948 D3E90023 ldrd r2, [r3] + ARM GAS /tmp/ccAag610.s page 38 + + + 2119 094c 2946 mov r1, r5 + 2120 094e 10EE100A vmov r0, s0 @ int + 2121 0952 FFF7FEFF bl __aeabi_dcmpgt + 2122 0956 049B ldr r3, [sp, #16] + 2123 0958 029E ldr r6, [sp, #8] + 2124 095a 0028 cmp r0, #0 + 2125 095c 18BF it ne + 2126 095e 3346 movne r3, r6 + 2127 0960 0493 str r3, [sp, #16] + 2128 0962 2046 mov r0, r4 + 2129 0964 20A3 adr r3, .L294+24 + 2130 0966 D3E90023 ldrd r2, [r3] + 2131 096a 2946 mov r1, r5 + 2132 096c FFF7FEFF bl __aeabi_dcmplt + 2133 0970 0028 cmp r0, #0 + 2134 0972 7FF438AF bne .L195 + 2135 0976 731E subs r3, r6, #1 + 2136 0978 0293 str r3, [sp, #8] + 2137 097a 0133 adds r3, r3, #1 + 2138 097c 7FF4C6AE bne .L199 + 2139 0980 31E7 b .L195 + 2140 .L243: + 2141 0982 0026 movs r6, #0 + 2142 0984 0027 movs r7, #0 + 2143 0986 3446 mov r4, r6 + 2144 0988 3D46 mov r5, r7 + 2145 098a B046 mov r8, r6 + 2146 098c B946 mov r9, r7 + 2147 098e 90E7 b .L201 + 2148 .L241: + 2149 0990 0026 movs r6, #0 + 2150 0992 0027 movs r7, #0 + 2151 0994 3446 mov r4, r6 + 2152 0996 3D46 mov r5, r7 + 2153 0998 B046 mov r8, r6 + 2154 099a B946 mov r9, r7 + 2155 099c 08E7 b .L193 + 2156 .L208: + 2157 099e FFF7FEFF bl __aeabi_i2d + 2158 09a2 009B ldr r3, [sp] + 2159 09a4 DB00 lsls r3, r3, #3 + 2160 09a6 0593 str r3, [sp, #20] + 2161 09a8 0022 movs r2, #0 + 2162 09aa 114B ldr r3, .L294+32 + 2163 09ac FFF7FEFF bl __aeabi_ddiv + 2164 09b0 41EC190B vmov d9, r0, r1 + 2165 09b4 B6E4 b .L236 + 2166 .L192: + 2167 09b6 FFF7FEFF bl __aeabi_i2d + 2168 09ba 009B ldr r3, [sp] + 2169 09bc DB00 lsls r3, r3, #3 + 2170 09be 0593 str r3, [sp, #20] + 2171 09c0 0022 movs r2, #0 + 2172 09c2 0B4B ldr r3, .L294+32 + 2173 09c4 FFF7FEFF bl __aeabi_ddiv + 2174 09c8 41EC190B vmov d9, r0, r1 + 2175 09cc 19E7 b .L235 + ARM GAS /tmp/ccAag610.s page 39 + + + 2176 .L295: + 2177 09ce 00BF .align 3 + 2178 .L294: + 2179 09d0 182D4454 .word 1413754136 + 2180 09d4 FB210940 .word 1074340347 + 2181 09d8 7B14AE47 .word 1202590843 + 2182 09dc E17A843F .word 1065646817 + 2183 09e0 39B4C876 .word 1992864825 + 2184 09e4 BE9FE63F .word 1072078782 + 2185 09e8 9A999999 .word -1717986918 + 2186 09ec 9999B93F .word 1069128089 + 2187 09f0 00408F40 .word 1083129856 + 2189 .section .text.Goertzel,"ax",%progbits + 2190 .align 1 + 2191 .p2align 2,,3 + 2192 .global Goertzel + 2193 .syntax unified + 2194 .thumb + 2195 .thumb_func + 2196 .fpu fpv4-sp-d16 + 2198 Goertzel: + 2199 @ args = 0, pretend = 0, frame = 0 + 2200 @ frame_needed = 0, uses_anonymous_args = 0 + 2201 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2202 0004 42A3 adr r3, .L307+8 + 2203 0006 D3E90023 ldrd r2, [r3] + 2204 000a 2DED028B vpush.64 {d8} + 2205 000e 0F46 mov r7, r1 + 2206 0010 0646 mov r6, r0 + 2207 0012 51EC100B vmov r0, r1, d0 + 2208 0016 FFF7FEFF bl __aeabi_dmul + 2209 001a 41EC100B vmov d0, r0, r1 + 2210 001e FFF7FEFF bl cos + 2211 0022 53EC102B vmov r2, r3, d0 + 2212 0026 10EE100A vmov r0, s0 @ int + 2213 002a 1946 mov r1, r3 + 2214 002c FFF7FEFF bl __aeabi_dadd + 2215 0030 002F cmp r7, #0 + 2216 0032 41EC180B vmov d8, r0, r1 + 2217 0036 5FDD ble .L301 + 2218 0038 4FF0000A mov r10, #0 + 2219 003c 4FF0000B mov fp, #0 + 2220 0040 06EBC707 add r7, r6, r7, lsl #3 + 2221 0044 D046 mov r8, r10 + 2222 0046 D946 mov r9, fp + 2223 0048 01E0 b .L298 + 2224 .L302: + 2225 004a A046 mov r8, r4 + 2226 004c A946 mov r9, r5 + 2227 .L298: + 2228 004e F6E80245 ldrd r4, [r6], #8 + 2229 0052 4246 mov r2, r8 + 2230 0054 4B46 mov r3, r9 + 2231 0056 51EC180B vmov r0, r1, d8 + 2232 005a FFF7FEFF bl __aeabi_dmul + 2233 005e 2246 mov r2, r4 + 2234 0060 2B46 mov r3, r5 + ARM GAS /tmp/ccAag610.s page 40 + + + 2235 0062 FFF7FEFF bl __aeabi_dadd + 2236 0066 5246 mov r2, r10 + 2237 0068 5B46 mov r3, fp + 2238 006a FFF7FEFF bl __aeabi_dsub + 2239 006e B742 cmp r7, r6 + 2240 0070 C246 mov r10, r8 + 2241 0072 CB46 mov fp, r9 + 2242 0074 0446 mov r4, r0 + 2243 0076 0D46 mov r5, r1 + 2244 0078 E7D1 bne .L302 + 2245 007a 4246 mov r2, r8 + 2246 007c 4B46 mov r3, r9 + 2247 007e 4046 mov r0, r8 + 2248 0080 4946 mov r1, r9 + 2249 0082 FFF7FEFF bl __aeabi_dmul + 2250 0086 2246 mov r2, r4 + 2251 0088 0646 mov r6, r0 + 2252 008a 0F46 mov r7, r1 + 2253 008c 2B46 mov r3, r5 + 2254 008e 2046 mov r0, r4 + 2255 0090 2946 mov r1, r5 + 2256 0092 FFF7FEFF bl __aeabi_dmul + 2257 0096 0246 mov r2, r0 + 2258 0098 0B46 mov r3, r1 + 2259 009a 3046 mov r0, r6 + 2260 009c 3946 mov r1, r7 + 2261 009e FFF7FEFF bl __aeabi_dadd + 2262 00a2 0646 mov r6, r0 + 2263 00a4 0F46 mov r7, r1 + 2264 .L297: + 2265 00a6 51EC180B vmov r0, r1, d8 + 2266 00aa 2246 mov r2, r4 + 2267 00ac 2B46 mov r3, r5 + 2268 00ae FFF7FEFF bl __aeabi_dmul + 2269 00b2 4246 mov r2, r8 + 2270 00b4 4B46 mov r3, r9 + 2271 00b6 FFF7FEFF bl __aeabi_dmul + 2272 00ba 0246 mov r2, r0 + 2273 00bc 0B46 mov r3, r1 + 2274 00be 3046 mov r0, r6 + 2275 00c0 3946 mov r1, r7 + 2276 00c2 FFF7FEFF bl __aeabi_dsub + 2277 00c6 0246 mov r2, r0 + 2278 00c8 0B46 mov r3, r1 + 2279 00ca 43EC182B vmov d8, r2, r3 + 2280 00ce 0022 movs r2, #0 + 2281 00d0 0023 movs r3, #0 + 2282 00d2 FFF7FEFF bl __aeabi_dcmpgt + 2283 00d6 28B9 cbnz r0, .L306 + 2284 00d8 BDEC028B vldm sp!, {d8} + 2285 00dc 9FED0A0B vldr.64 d0, .L307 + 2286 00e0 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2287 .L306: + 2288 00e4 B0EE480A vmov.f32 s0, s16 + 2289 00e8 F0EE680A vmov.f32 s1, s17 + 2290 00ec BDEC028B vldm sp!, {d8} + 2291 00f0 BDE8F84F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + ARM GAS /tmp/ccAag610.s page 41 + + + 2292 00f4 FFF7FEBF b sqrt + 2293 .L301: + 2294 00f8 0026 movs r6, #0 + 2295 00fa 0027 movs r7, #0 + 2296 00fc B046 mov r8, r6 + 2297 00fe B946 mov r9, r7 + 2298 0100 3446 mov r4, r6 + 2299 0102 3D46 mov r5, r7 + 2300 0104 CFE7 b .L297 + 2301 .L308: + 2302 0106 00BF .align 3 + 2303 .L307: + 2304 0108 11EA2D81 .word -2127697391 + 2305 010c 9997713D .word 1030854553 + 2306 0110 182D4454 .word 1413754136 + 2307 0114 FB210940 .word 1074340347 + 2309 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccAag610.s page 42 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 FIRFilterCode.c + /tmp/ccAag610.s:24 .text.RectWinFIR:0000000000000000 $t + /tmp/ccAag610.s:33 .text.RectWinFIR:0000000000000000 RectWinFIR + /tmp/ccAag610.s:47 .text.RectWinFIR:000000000000001e $d + /tmp/ccAag610.s:52 .text.RectWinFIR:0000000000000028 $t + /tmp/ccAag610.s:332 .text.RectWinFIR:0000000000000300 $d + /tmp/ccAag610.s:343 .text.RectWinFIR:0000000000000328 $t + /tmp/ccAag610.s:559 .text.RectWinFIR:0000000000000568 $d + /tmp/ccAag610.s:571 .text.Sinc:0000000000000000 $t + /tmp/ccAag610.s:579 .text.Sinc:0000000000000000 Sinc + /tmp/ccAag610.s:611 .text.Sinc:0000000000000048 $d + /tmp/ccAag610.s:619 .text.Bessel:0000000000000000 $t + /tmp/ccAag610.s:627 .text.Bessel:0000000000000000 Bessel + /tmp/ccAag610.s:717 .text.Bessel:00000000000000c0 $d + /tmp/ccAag610.s:722 .text.FIRFilterWindow:0000000000000000 $t + /tmp/ccAag610.s:730 .text.FIRFilterWindow:0000000000000000 FIRFilterWindow + /tmp/ccAag610.s:1051 .text.FIRFilterWindow:0000000000000338 $d + /tmp/ccAag610.s:1062 .text.FIRFilterWindow:0000000000000360 $t + /tmp/ccAag610.s:1168 .text.FIRFilterWindow:0000000000000458 $d + /tmp/ccAag610.s:1180 .text.FIRFreqError:0000000000000000 $t + /tmp/ccAag610.s:1188 .text.FIRFreqError:0000000000000000 FIRFreqError + /tmp/ccAag610.s:1412 .text.FIRFreqError:0000000000000238 $d + /tmp/ccAag610.s:1425 .text.FIRFreqError:0000000000000268 $t + /tmp/ccAag610.s:1759 .text.FIRFreqError:0000000000000598 $d + /tmp/ccAag610.s:1775 .text.FIRFreqError:00000000000005d4 $t + /tmp/ccAag610.s:2179 .text.FIRFreqError:00000000000009d0 $d + /tmp/ccAag610.s:2190 .text.Goertzel:0000000000000000 $t + /tmp/ccAag610.s:2198 .text.Goertzel:0000000000000000 Goertzel + /tmp/ccAag610.s:2304 .text.Goertzel:0000000000000108 $d + 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H(3JacHlL@H literal 0 HcmV?d00001 diff --git a/codice/build/FastMathFunctions.d b/codice/build/FastMathFunctions.d new file mode 100644 index 0000000..0b31337 --- /dev/null +++ b/codice/build/FastMathFunctions.d @@ -0,0 +1,31 @@ +build/FastMathFunctions.o: \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c: diff --git a/codice/build/FastMathFunctions.lst b/codice/build/FastMathFunctions.lst new file mode 100644 index 0000000..9b03cfe --- /dev/null +++ b/codice/build/FastMathFunctions.lst @@ -0,0 +1,569 @@ +ARM GAS /tmp/ccl5zrdd.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "FastMathFunctions.c" + 14 .text + 15 .section .text.arm_cos_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_cos_f32 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_cos_f32: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 9FED207A vldr.32 s14, .L8 + 30 0004 F5EE007A vmov.f32 s15, #2.5e-1 + 31 0008 E0EE077A vfma.f32 s15, s0, s14 + 32 000c F5EEC07A vcmpe.f32 s15, #0 + 33 0010 F1EE10FA vmrs APSR_nzcv, FPSCR + 34 0014 BDEEE70A vcvt.s32.f32 s0, s15 + 35 0018 04D5 bpl .L2 + 36 001a 10EE103A vmov r3, s0 @ int + 37 001e 013B subs r3, r3, #1 + 38 0020 00EE103A vmov s0, r3 @ int + 39 .L2: + 40 0024 B8EEC00A vcvt.f32.s32 s0, s0 + 41 0028 DFED176A vldr.32 s13, .L8+4 + 42 002c 37EEC00A vsub.f32 s0, s15, s0 + 43 0030 20EE260A vmul.f32 s0, s0, s13 + 44 0034 BCEEC07A vcvt.u32.f32 s14, s0 + 45 0038 17EE103A vmov r3, s14 @ int + 46 003c 9BB2 uxth r3, r3 + 47 003e B3F5007F cmp r3, #512 + 48 0042 19D2 bcs .L4 + 49 0044 07EE903A vmov s15, r3 @ int + 50 0048 F8EE677A vcvt.f32.u32 s15, s15 + 51 004c 591C adds r1, r3, #1 + 52 004e 30EE670A vsub.f32 s0, s0, s15 + 53 0052 89B2 uxth r1, r1 + 54 .L5: + 55 0054 0D4A ldr r2, .L8+8 + 56 0056 02EB8101 add r1, r2, r1, lsl #2 + 57 005a 91ED007A vldr.32 s14, [r1] + 58 005e 02EB8303 add r3, r2, r3, lsl #2 + ARM GAS /tmp/ccl5zrdd.s page 2 + + + 59 0062 F7EE007A vmov.f32 s15, #1.0e+0 + 60 0066 77EEC07A vsub.f32 s15, s15, s0 + 61 006a 20EE070A vmul.f32 s0, s0, s14 + 62 006e 93ED007A vldr.32 s14, [r3] + 63 0072 A7EE870A vfma.f32 s0, s15, s14 + 64 0076 7047 bx lr + 65 .L4: + 66 0078 30EE660A vsub.f32 s0, s0, s13 + 67 007c 0121 movs r1, #1 + 68 007e 0023 movs r3, #0 + 69 0080 E8E7 b .L5 + 70 .L9: + 71 0082 00BF .align 2 + 72 .L8: + 73 0084 83F9223E .word 1042479491 + 74 0088 00000044 .word 1140850688 + 75 008c 00000000 .word sinTable_f32 + 77 .section .text.arm_cos_q15,"ax",%progbits + 78 .align 1 + 79 .p2align 2,,3 + 80 .global arm_cos_q15 + 81 .syntax unified + 82 .thumb + 83 .thumb_func + 84 .fpu fpv4-sp-d16 + 86 arm_cos_q15: + 87 @ args = 0, pretend = 0, frame = 0 + 88 @ frame_needed = 0, uses_anonymous_args = 0 + 89 @ link register save eliminated. + 90 0000 80B2 uxth r0, r0 + 91 0002 00F50053 add r3, r0, #8192 + 92 0006 1BB2 sxth r3, r3 + 93 0008 002B cmp r3, #0 + 94 000a BCBF itt lt + 95 000c A0F5C040 sublt r0, r0, #24576 + 96 0010 03B2 sxthlt r3, r0 + 97 0012 9909 lsrs r1, r3, #6 + 98 0014 0A4A ldr r2, .L12 + 99 0016 481C adds r0, r1, #1 + 100 0018 03F03F03 and r3, r3, #63 + 101 001c 32F91110 ldrsh r1, [r2, r1, lsl #1] + 102 0020 32F81020 ldrh r2, [r2, r0, lsl #1] + 103 0024 5B02 lsls r3, r3, #9 + 104 0026 C3F50040 rsb r0, r3, #32768 + 105 002a 01FB00F0 mul r0, r1, r0 + 106 002e 000C lsrs r0, r0, #16 + 107 0030 0004 lsls r0, r0, #16 + 108 0032 13FB0203 smlabb r3, r3, r2, r0 + 109 0036 43F3CF30 sbfx r0, r3, #15, #16 + 110 003a 20F00100 bic r0, r0, #1 + 111 003e 7047 bx lr + 112 .L13: + 113 .align 2 + 114 .L12: + 115 0040 00000000 .word sinTable_q15 + 117 .section .text.arm_cos_q31,"ax",%progbits + 118 .align 1 + ARM GAS /tmp/ccl5zrdd.s page 3 + + + 119 .p2align 2,,3 + 120 .global arm_cos_q31 + 121 .syntax unified + 122 .thumb + 123 .thumb_func + 124 .fpu fpv4-sp-d16 + 126 arm_cos_q31: + 127 @ args = 0, pretend = 0, frame = 0 + 128 @ frame_needed = 0, uses_anonymous_args = 0 + 129 0000 10F10052 adds r2, r0, #536870912 + 130 0004 48BF it mi + 131 0006 00F12042 addmi r2, r0, #-1610612736 + 132 000a 0C49 ldr r1, .L17 + 133 000c 0C4B ldr r3, .L17+4 + 134 000e 900D lsrs r0, r2, #22 + 135 0010 03EA4223 and r3, r3, r2, lsl #9 + 136 0014 10B5 push {r4, lr} + 137 0016 441C adds r4, r0, #1 + 138 0018 51F82000 ldr r0, [r1, r0, lsl #2] + 139 001c 51F82440 ldr r4, [r1, r4, lsl #2] + 140 0020 C3F1004C rsb ip, r3, #-2147483648 + 141 0024 4FEAE07E asr lr, r0, #31 + 142 0028 ACFB0020 umull r2, r0, ip, r0 + 143 002c 0CFB0E00 mla r0, ip, lr, r0 + 144 0030 0021 movs r1, #0 + 145 0032 C3FB0410 smlal r1, r0, r3, r4 + 146 0036 4000 lsls r0, r0, #1 + 147 0038 10BD pop {r4, pc} + 148 .L18: + 149 003a 00BF .align 2 + 150 .L17: + 151 003c 00000000 .word sinTable_q31 + 152 0040 00FEFF7F .word 2147483136 + 154 .section .text.arm_sin_f32,"ax",%progbits + 155 .align 1 + 156 .p2align 2,,3 + 157 .global arm_sin_f32 + 158 .syntax unified + 159 .thumb + 160 .thumb_func + 161 .fpu fpv4-sp-d16 + 163 arm_sin_f32: + 164 @ args = 0, pretend = 0, frame = 0 + 165 @ frame_needed = 0, uses_anonymous_args = 0 + 166 @ link register save eliminated. + 167 0000 DFED1F7A vldr.32 s15, .L25 + 168 0004 20EE270A vmul.f32 s0, s0, s15 + 169 0008 B5EEC00A vcmpe.f32 s0, #0 + 170 000c F1EE10FA vmrs APSR_nzcv, FPSCR + 171 0010 FDEEC07A vcvt.s32.f32 s15, s0 + 172 0014 04D5 bpl .L20 + 173 0016 17EE903A vmov r3, s15 @ int + 174 001a 013B subs r3, r3, #1 + 175 001c 07EE903A vmov s15, r3 @ int + 176 .L20: + 177 0020 F8EEE77A vcvt.f32.s32 s15, s15 + 178 0024 9FED177A vldr.32 s14, .L25+4 + ARM GAS /tmp/ccl5zrdd.s page 4 + + + 179 0028 30EE670A vsub.f32 s0, s0, s15 + 180 002c 20EE070A vmul.f32 s0, s0, s14 + 181 0030 FCEEC07A vcvt.u32.f32 s15, s0 + 182 0034 17EE903A vmov r3, s15 @ int + 183 0038 9BB2 uxth r3, r3 + 184 003a B3F5007F cmp r3, #512 + 185 003e 19D2 bcs .L22 + 186 0040 07EE903A vmov s15, r3 @ int + 187 0044 F8EE677A vcvt.f32.u32 s15, s15 + 188 0048 591C adds r1, r3, #1 + 189 004a 30EE670A vsub.f32 s0, s0, s15 + 190 004e 89B2 uxth r1, r1 + 191 .L23: + 192 0050 0D4A ldr r2, .L25+8 + 193 0052 02EB8101 add r1, r2, r1, lsl #2 + 194 0056 91ED007A vldr.32 s14, [r1] + 195 005a 02EB8303 add r3, r2, r3, lsl #2 + 196 005e F7EE007A vmov.f32 s15, #1.0e+0 + 197 0062 77EEC07A vsub.f32 s15, s15, s0 + 198 0066 20EE070A vmul.f32 s0, s0, s14 + 199 006a 93ED007A vldr.32 s14, [r3] + 200 006e A7EE870A vfma.f32 s0, s15, s14 + 201 0072 7047 bx lr + 202 .L22: + 203 0074 30EE470A vsub.f32 s0, s0, s14 + 204 0078 0121 movs r1, #1 + 205 007a 0023 movs r3, #0 + 206 007c E8E7 b .L23 + 207 .L26: + 208 007e 00BF .align 2 + 209 .L25: + 210 0080 83F9223E .word 1042479491 + 211 0084 00000044 .word 1140850688 + 212 0088 00000000 .word sinTable_f32 + 214 .section .text.arm_sin_q15,"ax",%progbits + 215 .align 1 + 216 .p2align 2,,3 + 217 .global arm_sin_q15 + 218 .syntax unified + 219 .thumb + 220 .thumb_func + 221 .fpu fpv4-sp-d16 + 223 arm_sin_q15: + 224 @ args = 0, pretend = 0, frame = 0 + 225 @ frame_needed = 0, uses_anonymous_args = 0 + 226 @ link register save eliminated. + 227 0000 0028 cmp r0, #0 + 228 0002 BCBF itt lt + 229 0004 A0F50040 sublt r0, r0, #32768 + 230 0008 00B2 sxthlt r0, r0 + 231 000a 8309 lsrs r3, r0, #6 + 232 000c 0B4A ldr r2, .L29 + 233 000e 00F03F00 and r0, r0, #63 + 234 0012 32F91310 ldrsh r1, [r2, r3, lsl #1] + 235 0016 4002 lsls r0, r0, #9 + 236 0018 03F1010C add ip, r3, #1 + 237 001c C0F50043 rsb r3, r0, #32768 + ARM GAS /tmp/ccl5zrdd.s page 5 + + + 238 0020 01FB03F3 mul r3, r1, r3 + 239 0024 32F81C20 ldrh r2, [r2, ip, lsl #1] + 240 0028 1B0C lsrs r3, r3, #16 + 241 002a 1B04 lsls r3, r3, #16 + 242 002c 10FB0230 smlabb r0, r0, r2, r3 + 243 0030 40F3CF30 sbfx r0, r0, #15, #16 + 244 0034 20F00100 bic r0, r0, #1 + 245 0038 7047 bx lr + 246 .L30: + 247 003a 00BF .align 2 + 248 .L29: + 249 003c 00000000 .word sinTable_q15 + 251 .section .text.arm_sin_q31,"ax",%progbits + 252 .align 1 + 253 .p2align 2,,3 + 254 .global arm_sin_q31 + 255 .syntax unified + 256 .thumb + 257 .thumb_func + 258 .fpu fpv4-sp-d16 + 260 arm_sin_q31: + 261 @ args = 0, pretend = 0, frame = 0 + 262 @ frame_needed = 0, uses_anonymous_args = 0 + 263 0000 0028 cmp r0, #0 + 264 0002 B6BF itet lt + 265 0004 00F10042 addlt r2, r0, #-2147483648 + 266 0008 0246 movge r2, r0 + 267 000a 1046 movlt r0, r2 + 268 000c 0B49 ldr r1, .L35 + 269 000e 0C4B ldr r3, .L35+4 + 270 0010 920D lsrs r2, r2, #22 + 271 0012 03EA4023 and r3, r3, r0, lsl #9 + 272 0016 10B5 push {r4, lr} + 273 0018 541C adds r4, r2, #1 + 274 001a 51F82220 ldr r2, [r1, r2, lsl #2] + 275 001e 51F82440 ldr r4, [r1, r4, lsl #2] + 276 0022 C3F1004C rsb ip, r3, #-2147483648 + 277 0026 4FEAE27E asr lr, r2, #31 + 278 002a ACFB0220 umull r2, r0, ip, r2 + 279 002e 0CFB0E00 mla r0, ip, lr, r0 + 280 0032 0021 movs r1, #0 + 281 0034 C3FB0410 smlal r1, r0, r3, r4 + 282 0038 4000 lsls r0, r0, #1 + 283 003a 10BD pop {r4, pc} + 284 .L36: + 285 .align 2 + 286 .L35: + 287 003c 00000000 .word sinTable_q31 + 288 0040 00FEFF7F .word 2147483136 + 290 .section .text.arm_sqrt_q15,"ax",%progbits + 291 .align 1 + 292 .p2align 2,,3 + 293 .global arm_sqrt_q15 + 294 .syntax unified + 295 .thumb + 296 .thumb_func + 297 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccl5zrdd.s page 6 + + + 299 arm_sqrt_q15: + 300 @ args = 0, pretend = 0, frame = 0 + 301 @ frame_needed = 0, uses_anonymous_args = 0 + 302 0000 0028 cmp r0, #0 + 303 0002 63DD ble .L38 + 304 0004 B0FA80F2 clz r2, r0 + 305 0008 113A subs r2, r2, #17 + 306 000a 1FFA82FC uxth ip, r2 + 307 000e 12F00102 ands r2, r2, #1 + 308 0012 10B5 push {r4, lr} + 309 0014 16BF itet ne + 310 0016 0CF1FF3E addne lr, ip, #-1 + 311 001a 00FA0CF0 lsleq r0, r0, ip + 312 001e 00FA0EF0 lslne r0, r0, lr + 313 0022 0FFA80FE sxth lr, r0 + 314 0026 07EE90EA vmov s15, lr @ int + 315 002a FAEEE87A vcvt.f32.s32 s15, s15, #15 + 316 002e 2A4B ldr r3, .L49 + 317 0030 17EE900A vmov r0, s15 @ int + 318 0034 A3EB6003 sub r3, r3, r0, asr #1 + 319 0038 07EE903A vmov s15, r3 @ int + 320 003c FEEEC97A vcvt.s32.f32 s15, s15, #14 + 321 0040 4FEA6E04 asr r4, lr, #1 + 322 0044 17EE903A vmov r3, s15 @ int + 323 0048 1BB2 sxth r3, r3 + 324 004a 03FB03F0 mul r0, r3, r3 + 325 004e C013 asrs r0, r0, #15 + 326 0050 10FB04F0 smulbb r0, r0, r4 + 327 0054 C013 asrs r0, r0, #15 + 328 0056 C0F54050 rsb r0, r0, #12288 + 329 005a 03FB00F0 mul r0, r3, r0 + 330 005e 40F34F30 sbfx r0, r0, #13, #16 + 331 0062 20F00303 bic r3, r0, #3 + 332 0066 03FB03F0 mul r0, r3, r3 + 333 006a C013 asrs r0, r0, #15 + 334 006c 10FB04F0 smulbb r0, r0, r4 + 335 0070 C013 asrs r0, r0, #15 + 336 0072 C0F54050 rsb r0, r0, #12288 + 337 0076 03FB00F0 mul r0, r3, r0 + 338 007a 40F34F30 sbfx r0, r0, #13, #16 + 339 007e 20F00300 bic r0, r0, #3 + 340 0082 00FB00F3 mul r3, r0, r0 + 341 0086 DB13 asrs r3, r3, #15 + 342 0088 13FB04F3 smulbb r3, r3, r4 + 343 008c DB13 asrs r3, r3, #15 + 344 008e C3F54053 rsb r3, r3, #12288 + 345 0092 00FB03F3 mul r3, r0, r3 + 346 0096 DB13 asrs r3, r3, #15 + 347 0098 9B00 lsls r3, r3, #2 + 348 009a 13FB0EF3 smulbb r3, r3, lr + 349 009e 43F38F33 sbfx r3, r3, #14, #16 + 350 00a2 23F00103 bic r3, r3, #1 + 351 00a6 4AB1 cbz r2, .L48 + 352 00a8 0CF1FF3C add ip, ip, #-1 + 353 00ac 4FEA6C0C asr ip, ip, #1 + 354 00b0 43FA0CF3 asr r3, r3, ip + 355 00b4 1BB2 sxth r3, r3 + ARM GAS /tmp/ccl5zrdd.s page 7 + + + 356 00b6 0B80 strh r3, [r1] @ movhi + 357 00b8 0020 movs r0, #0 + 358 00ba 10BD pop {r4, pc} + 359 .L48: + 360 00bc 4CF34E0C sbfx ip, ip, #1, #15 + 361 00c0 43FA0CF3 asr r3, r3, ip + 362 00c4 1BB2 sxth r3, r3 + 363 00c6 0B80 strh r3, [r1] @ movhi + 364 00c8 0020 movs r0, #0 + 365 00ca 10BD pop {r4, pc} + 366 .L38: + 367 00cc 0023 movs r3, #0 + 368 00ce 0B80 strh r3, [r1] @ movhi + 369 00d0 4FF0FF30 mov r0, #-1 + 370 00d4 7047 bx lr + 371 .L50: + 372 00d6 00BF .align 2 + 373 .L49: + 374 00d8 DF59375F .word 1597463007 + 376 .section .text.arm_sqrt_q31,"ax",%progbits + 377 .align 1 + 378 .p2align 2,,3 + 379 .global arm_sqrt_q31 + 380 .syntax unified + 381 .thumb + 382 .thumb_func + 383 .fpu fpv4-sp-d16 + 385 arm_sqrt_q31: + 386 @ args = 0, pretend = 0, frame = 0 + 387 @ frame_needed = 0, uses_anonymous_args = 0 + 388 0000 021E subs r2, r0, #0 + 389 0002 6CDD ble .L52 + 390 0004 B2FA82FC clz ip, r2 + 391 0008 F0B5 push {r4, r5, r6, r7, lr} + 392 000a 0CF1FF3E add lr, ip, #-1 + 393 000e 1EF00104 ands r4, lr, #1 + 394 0012 16BF itet ne + 395 0014 ACF10206 subne r6, ip, #2 + 396 0018 02FA0EF6 lsleq r6, r2, lr + 397 001c 02FA06F6 lslne r6, r2, r6 + 398 0020 07EE906A vmov s15, r6 @ int + 399 0024 FAEEE07A vcvt.f32.s32 s15, s15, #31 + 400 0028 2F4B ldr r3, .L63 + 401 002a 17EE900A vmov r0, s15 + 402 002e A3EB6000 sub r0, r3, r0, asr #1 + 403 0032 07EE900A vmov s15, r0 + 404 0036 FEEEC17A vcvt.s32.f32 s15, s15, #30 + 405 003a 7310 asrs r3, r6, #1 + 406 003c 17EE900A vmov r0, s15 @ int + 407 0040 80FB0057 smull r5, r7, r0, r0 + 408 0044 EA0F lsrs r2, r5, #31 + 409 0046 42EA4702 orr r2, r2, r7, lsl #1 + 410 004a 83FB0257 smull r5, r7, r3, r2 + 411 004e EA0F lsrs r2, r5, #31 + 412 0050 42EA4702 orr r2, r2, r7, lsl #1 + 413 0054 C2F14052 rsb r2, r2, #805306368 + 414 0058 82FB0002 smull r0, r2, r2, r0 + ARM GAS /tmp/ccl5zrdd.s page 8 + + + 415 005c C00F lsrs r0, r0, #31 + 416 005e 40EA4200 orr r0, r0, r2, lsl #1 + 417 0062 8000 lsls r0, r0, #2 + 418 0064 80FB0052 smull r5, r2, r0, r0 + 419 0068 ED0F lsrs r5, r5, #31 + 420 006a 45EA4205 orr r5, r5, r2, lsl #1 + 421 006e 83FB0552 smull r5, r2, r3, r5 + 422 0072 ED0F lsrs r5, r5, #31 + 423 0074 45EA4205 orr r5, r5, r2, lsl #1 + 424 0078 C5F14055 rsb r5, r5, #805306368 + 425 007c 85FB0005 smull r0, r5, r5, r0 + 426 0080 C00F lsrs r0, r0, #31 + 427 0082 40EA4500 orr r0, r0, r5, lsl #1 + 428 0086 8200 lsls r2, r0, #2 + 429 0088 82FB0205 smull r0, r5, r2, r2 + 430 008c C00F lsrs r0, r0, #31 + 431 008e 40EA4500 orr r0, r0, r5, lsl #1 + 432 0092 83FB0035 smull r3, r5, r3, r0 + 433 0096 D80F lsrs r0, r3, #31 + 434 0098 40EA4500 orr r0, r0, r5, lsl #1 + 435 009c C0F14050 rsb r0, r0, #805306368 + 436 00a0 80FB0203 smull r0, r3, r0, r2 + 437 00a4 C20F lsrs r2, r0, #31 + 438 00a6 42EA4302 orr r2, r2, r3, lsl #1 + 439 00aa 9200 lsls r2, r2, #2 + 440 00ac 82FB0626 smull r2, r6, r2, r6 + 441 00b0 D30F lsrs r3, r2, #31 + 442 00b2 43EA4603 orr r3, r3, r6, lsl #1 + 443 00b6 5B00 lsls r3, r3, #1 + 444 00b8 54B1 cbz r4, .L62 + 445 00ba ACF1020C sub ip, ip, #2 + 446 00be 0CEBDC7C add ip, ip, ip, lsr #31 + 447 00c2 4FEA6C0C asr ip, ip, #1 + 448 00c6 43FA0CF3 asr r3, r3, ip + 449 00ca 0B60 str r3, [r1] + 450 00cc 0020 movs r0, #0 + 451 00ce F0BD pop {r4, r5, r6, r7, pc} + 452 .L62: + 453 00d0 4FEA6E0E asr lr, lr, #1 + 454 00d4 43FA0EF3 asr r3, r3, lr + 455 00d8 0B60 str r3, [r1] + 456 00da 0020 movs r0, #0 + 457 00dc F0BD pop {r4, r5, r6, r7, pc} + 458 .L52: + 459 00de 0023 movs r3, #0 + 460 00e0 0B60 str r3, [r1] + 461 00e2 4FF0FF30 mov r0, #-1 + 462 00e6 7047 bx lr + 463 .L64: + 464 .align 2 + 465 .L63: + 466 00e8 DF59375F .word 1597463007 + 468 .section .text.arm_vexp_f32,"ax",%progbits + 469 .align 1 + 470 .p2align 2,,3 + 471 .global arm_vexp_f32 + 472 .syntax unified + ARM GAS /tmp/ccl5zrdd.s page 9 + + + 473 .thumb + 474 .thumb_func + 475 .fpu fpv4-sp-d16 + 477 arm_vexp_f32: + 478 @ args = 0, pretend = 0, frame = 0 + 479 @ frame_needed = 0, uses_anonymous_args = 0 + 480 0000 62B1 cbz r2, .L73 + 481 0002 70B5 push {r4, r5, r6, lr} + 482 0004 0646 mov r6, r0 + 483 0006 0D46 mov r5, r1 + 484 0008 1446 mov r4, r2 + 485 .L67: + 486 000a B6EC010A vldmia.32 r6!, {s0} + 487 000e FFF7FEFF bl expf + 488 0012 013C subs r4, r4, #1 + 489 0014 A5EC010A vstmia.32 r5!, {s0} + 490 0018 F7D1 bne .L67 + 491 001a 70BD pop {r4, r5, r6, pc} + 492 .L73: + 493 001c 7047 bx lr + 495 001e 00BF .section .text.arm_vlog_f32,"ax",%progbits + 496 .align 1 + 497 .p2align 2,,3 + 498 .global arm_vlog_f32 + 499 .syntax unified + 500 .thumb + 501 .thumb_func + 502 .fpu fpv4-sp-d16 + 504 arm_vlog_f32: + 505 @ args = 0, pretend = 0, frame = 0 + 506 @ frame_needed = 0, uses_anonymous_args = 0 + 507 0000 62B1 cbz r2, .L84 + 508 0002 70B5 push {r4, r5, r6, lr} + 509 0004 0646 mov r6, r0 + 510 0006 0D46 mov r5, r1 + 511 0008 1446 mov r4, r2 + 512 .L78: + 513 000a B6EC010A vldmia.32 r6!, {s0} + 514 000e FFF7FEFF bl logf + 515 0012 013C subs r4, r4, #1 + 516 0014 A5EC010A vstmia.32 r5!, {s0} + 517 0018 F7D1 bne .L78 + 518 001a 70BD pop {r4, r5, r6, pc} + 519 .L84: + 520 001c 7047 bx lr + 522 001e 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccl5zrdd.s page 10 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 FastMathFunctions.c + /tmp/ccl5zrdd.s:16 .text.arm_cos_f32:0000000000000000 $t + /tmp/ccl5zrdd.s:25 .text.arm_cos_f32:0000000000000000 arm_cos_f32 + /tmp/ccl5zrdd.s:73 .text.arm_cos_f32:0000000000000084 $d + /tmp/ccl5zrdd.s:78 .text.arm_cos_q15:0000000000000000 $t + /tmp/ccl5zrdd.s:86 .text.arm_cos_q15:0000000000000000 arm_cos_q15 + /tmp/ccl5zrdd.s:115 .text.arm_cos_q15:0000000000000040 $d + /tmp/ccl5zrdd.s:118 .text.arm_cos_q31:0000000000000000 $t + /tmp/ccl5zrdd.s:126 .text.arm_cos_q31:0000000000000000 arm_cos_q31 + /tmp/ccl5zrdd.s:151 .text.arm_cos_q31:000000000000003c $d + /tmp/ccl5zrdd.s:155 .text.arm_sin_f32:0000000000000000 $t + /tmp/ccl5zrdd.s:163 .text.arm_sin_f32:0000000000000000 arm_sin_f32 + /tmp/ccl5zrdd.s:210 .text.arm_sin_f32:0000000000000080 $d + /tmp/ccl5zrdd.s:215 .text.arm_sin_q15:0000000000000000 $t + /tmp/ccl5zrdd.s:223 .text.arm_sin_q15:0000000000000000 arm_sin_q15 + /tmp/ccl5zrdd.s:249 .text.arm_sin_q15:000000000000003c $d + /tmp/ccl5zrdd.s:252 .text.arm_sin_q31:0000000000000000 $t + /tmp/ccl5zrdd.s:260 .text.arm_sin_q31:0000000000000000 arm_sin_q31 + /tmp/ccl5zrdd.s:287 .text.arm_sin_q31:000000000000003c $d + /tmp/ccl5zrdd.s:291 .text.arm_sqrt_q15:0000000000000000 $t + /tmp/ccl5zrdd.s:299 .text.arm_sqrt_q15:0000000000000000 arm_sqrt_q15 + /tmp/ccl5zrdd.s:374 .text.arm_sqrt_q15:00000000000000d8 $d + /tmp/ccl5zrdd.s:377 .text.arm_sqrt_q31:0000000000000000 $t + /tmp/ccl5zrdd.s:385 .text.arm_sqrt_q31:0000000000000000 arm_sqrt_q31 + /tmp/ccl5zrdd.s:466 .text.arm_sqrt_q31:00000000000000e8 $d + /tmp/ccl5zrdd.s:469 .text.arm_vexp_f32:0000000000000000 $t + /tmp/ccl5zrdd.s:477 .text.arm_vexp_f32:0000000000000000 arm_vexp_f32 + /tmp/ccl5zrdd.s:496 .text.arm_vlog_f32:0000000000000000 $t + /tmp/ccl5zrdd.s:504 .text.arm_vlog_f32:0000000000000000 arm_vlog_f32 + +UNDEFINED SYMBOLS +sinTable_f32 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Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c: 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+Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c: diff --git a/codice/build/FilteringFunctions.lst b/codice/build/FilteringFunctions.lst new file mode 100644 index 0000000..3bca8cd --- /dev/null +++ b/codice/build/FilteringFunctions.lst @@ -0,0 +1,16905 @@ +ARM GAS /tmp/ccdao7B1.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "FilteringFunctions.c" + 14 .text + 15 .section .text.arm_biquad_cas_df1_32x64_init_q31,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_biquad_cas_df1_32x64_init_q31 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_biquad_cas_df1_32x64_init_q31: + 26 @ args = 4, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 10B5 push {r4, lr} + 29 0002 0446 mov r4, r0 + 30 0004 9DF80800 ldrb r0, [sp, #8] @ zero_extendqisi2 + 31 0008 2170 strb r1, [r4] + 32 000a 2073 strb r0, [r4, #12] + 33 000c A260 str r2, [r4, #8] + 34 000e 1846 mov r0, r3 + 35 0010 4A01 lsls r2, r1, #5 + 36 0012 0021 movs r1, #0 + 37 0014 FFF7FEFF bl memset + 38 0018 6060 str r0, [r4, #4] + 39 001a 10BD pop {r4, pc} + 41 .section .text.arm_biquad_cas_df1_32x64_q31,"ax",%progbits + 42 .align 1 + 43 .p2align 2,,3 + 44 .global arm_biquad_cas_df1_32x64_q31 + 45 .syntax unified + 46 .thumb + 47 .thumb_func + 48 .fpu fpv4-sp-d16 + 50 arm_biquad_cas_df1_32x64_q31: + 51 @ args = 0, pretend = 0, frame = 96 + 52 @ frame_needed = 0, uses_anonymous_args = 0 + 53 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 54 0004 99B0 sub sp, sp, #100 + 55 0006 CDE91623 strd r2, r3, [sp, #88] + 56 000a 8368 ldr r3, [r0, #8] + 57 000c 047B ldrb r4, [r0, #12] @ zero_extendqisi2 + 58 000e 0278 ldrb r2, [r0] @ zero_extendqisi2 + 59 0010 1592 str r2, [sp, #84] + 60 0012 1433 adds r3, r3, #20 + ARM GAS /tmp/ccdao7B1.s page 2 + + + 61 0014 1493 str r3, [sp, #80] + 62 0016 4368 ldr r3, [r0, #4] + 63 0018 0291 str r1, [sp, #8] + 64 001a 2033 adds r3, r3, #32 + 65 001c 1393 str r3, [sp, #76] + 66 001e C4F11F03 rsb r3, r4, #31 + 67 0022 04F10109 add r9, r4, #1 + 68 0026 1093 str r3, [sp, #64] + 69 0028 A4F11F03 sub r3, r4, #31 + 70 002c CDE91139 strd r3, r9, [sp, #68] + 71 0030 149B ldr r3, [sp, #80] + 72 .L8: + 73 0032 53F8142C ldr r2, [r3, #-20] + 74 0036 0A92 str r2, [sp, #40] + 75 0038 53F8102C ldr r2, [r3, #-16] + 76 003c 0B92 str r2, [sp, #44] + 77 003e 53F80C2C ldr r2, [r3, #-12] + 78 0042 0C92 str r2, [sp, #48] + 79 0044 53E902A2 ldrd r10, r2, [r3, #-8] + 80 0048 139B ldr r3, [sp, #76] + 81 004a 0D92 str r2, [sp, #52] + 82 004c 53F8201C ldr r1, [r3, #-32] + 83 0050 0091 str r1, [sp] + 84 0052 53F8181C ldr r1, [r3, #-24] + 85 0056 53F8046C ldr r6, [r3, #-4] + 86 005a 0191 str r1, [sp, #4] + 87 005c 53E9049E ldrd r9, lr, [r3, #-16] + 88 0060 53F8081C ldr r1, [r3, #-8] + 89 0064 179B ldr r3, [sp, #92] + 90 0066 0C46 mov r4, r1 + 91 0068 002B cmp r3, #0 + 92 006a 00F08580 beq .L5 + 93 006e D217 asrs r2, r2, #31 + 94 0070 0E92 str r2, [sp, #56] + 95 0072 0493 str r3, [sp, #16] + 96 0074 4FEAEA72 asr r2, r10, #31 + 97 0078 169B ldr r3, [sp, #88] + 98 007a 0F92 str r2, [sp, #60] + 99 007c 0393 str r3, [sp, #12] + 100 007e 8846 mov r8, r1 + 101 0080 01E0 b .L6 + 102 .L9: + 103 0082 8946 mov r9, r1 + 104 0084 8646 mov lr, r0 + 105 .L6: + 106 0086 029B ldr r3, [sp, #8] + 107 0088 0D9A ldr r2, [sp, #52] + 108 008a 53F8045B ldr r5, [r3], #4 + 109 008e 0293 str r3, [sp, #8] + 110 0090 A9FB0A37 umull r3, r7, r9, r10 + 111 0094 0F9B ldr r3, [sp, #60] + 112 0096 0E99 ldr r1, [sp, #56] + 113 0098 09FB0377 mla r7, r9, r3, r7 + 114 009c 4FEAEE7B asr fp, lr, #31 + 115 00a0 0EFB03F3 mul r3, lr, r3 + 116 00a4 0AFB0B33 mla r3, r10, fp, r3 + 117 00a8 DDF800B0 ldr fp, [sp] + ARM GAS /tmp/ccdao7B1.s page 3 + + + 118 00ac 0693 str r3, [sp, #24] + 119 00ae A8FB0234 umull r3, r4, r8, r2 + 120 00b2 08FB0144 mla r4, r8, r1, r4 + 121 00b6 06FB01F0 mul r0, r6, r1 + 122 00ba 4FEAEB71 asr r1, fp, #31 + 123 00be 0991 str r1, [sp, #36] + 124 00c0 E917 asrs r1, r5, #31 + 125 00c2 0891 str r1, [sp, #32] + 126 00c4 0A99 ldr r1, [sp, #40] + 127 00c6 0597 str r7, [sp, #20] + 128 00c8 F317 asrs r3, r6, #31 + 129 00ca 02FB0300 mla r0, r2, r3, r0 + 130 00ce 85FB013C smull r3, ip, r5, r1 + 131 00d2 0B99 ldr r1, [sp, #44] + 132 00d4 0C9F ldr r7, [sp, #48] + 133 00d6 CBFB013C smlal r3, ip, fp, r1 + 134 00da 0199 ldr r1, [sp, #4] + 135 00dc C1FB073C smlal r3, ip, r1, r7 + 136 00e0 069F ldr r7, [sp, #24] + 137 00e2 0793 str r3, [sp, #28] + 138 00e4 AEFB0A13 umull r1, r3, lr, r10 + 139 00e8 3B44 add r3, r3, r7 + 140 00ea 059F ldr r7, [sp, #20] + 141 00ec 7918 adds r1, r7, r1 + 142 00ee 43EBE773 adc r3, r3, r7, asr #31 + 143 00f2 079F ldr r7, [sp, #28] + 144 00f4 A6FB0226 umull r2, r6, r6, r2 + 145 00f8 C919 adds r1, r1, r7 + 146 00fa 3044 add r0, r0, r6 + 147 00fc 4CEB0303 adc r3, ip, r3 + 148 0100 A218 adds r2, r4, r2 + 149 0102 40EBE470 adc r0, r0, r4, asr #31 + 150 0106 5118 adds r1, r2, r1 + 151 0108 129C ldr r4, [sp, #72] + 152 010a 109A ldr r2, [sp, #64] + 153 010c 039F ldr r7, [sp, #12] + 154 010e 43EB0003 adc r3, r3, r0 + 155 0112 03FA04F0 lsl r0, r3, r4 + 156 0116 21FA02F2 lsr r2, r1, r2 + 157 011a 0346 mov r3, r0 + 158 011c 1343 orrs r3, r3, r2 + 159 011e 47F8043B str r3, [r7], #4 + 160 0122 119B ldr r3, [sp, #68] + 161 0124 0397 str r7, [sp, #12] + 162 0126 01FA03F3 lsl r3, r1, r3 + 163 012a 1843 orrs r0, r0, r3 + 164 012c 049B ldr r3, [sp, #16] + 165 012e 013B subs r3, r3, #1 + 166 0130 CDE9005B strd r5, fp, [sp] + 167 0134 C846 mov r8, r9 + 168 0136 7646 mov r6, lr + 169 0138 40EA0200 orr r0, r0, r2 + 170 013c 01FA04F1 lsl r1, r1, r4 + 171 0140 0493 str r3, [sp, #16] + 172 0142 9ED1 bne .L9 + 173 .L7: + 174 0144 139B ldr r3, [sp, #76] + ARM GAS /tmp/ccdao7B1.s page 4 + + + 175 0146 089A ldr r2, [sp, #32] + 176 0148 43F8205C str r5, [r3, #-32] + 177 014c 43E9072B strd r2, fp, [r3, #-28] + 178 0150 099A ldr r2, [sp, #36] + 179 0152 43F804EC str lr, [r3, #-4] + 180 0156 43E90521 strd r2, r1, [r3, #-20] + 181 015a 43E90309 strd r0, r9, [r3, #-12] + 182 015e 2033 adds r3, r3, #32 + 183 0160 149A ldr r2, [sp, #80] + 184 0162 1393 str r3, [sp, #76] + 185 0164 159B ldr r3, [sp, #84] + 186 0166 1432 adds r2, r2, #20 + 187 0168 013B subs r3, r3, #1 + 188 016a 1492 str r2, [sp, #80] + 189 016c 1593 str r3, [sp, #84] + 190 016e 10D0 beq .L12 + 191 0170 169B ldr r3, [sp, #88] + 192 0172 0293 str r3, [sp, #8] + 193 0174 1346 mov r3, r2 + 194 0176 5CE7 b .L8 + 195 .L5: + 196 0178 009D ldr r5, [sp] + 197 017a DDF804B0 ldr fp, [sp, #4] + 198 017e EB17 asrs r3, r5, #31 + 199 0180 0893 str r3, [sp, #32] + 200 0182 4FEAEB73 asr r3, fp, #31 + 201 0186 4946 mov r1, r9 + 202 0188 7046 mov r0, lr + 203 018a A146 mov r9, r4 + 204 018c B646 mov lr, r6 + 205 018e 0993 str r3, [sp, #36] + 206 0190 D8E7 b .L7 + 207 .L12: + 208 0192 19B0 add sp, sp, #100 + 209 @ sp needed + 210 0194 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 212 .section .text.arm_biquad_cascade_df1_f32,"ax",%progbits + 213 .align 1 + 214 .p2align 2,,3 + 215 .global arm_biquad_cascade_df1_f32 + 216 .syntax unified + 217 .thumb + 218 .thumb_func + 219 .fpu fpv4-sp-d16 + 221 arm_biquad_cascade_df1_f32: + 222 @ args = 0, pretend = 0, frame = 0 + 223 @ frame_needed = 0, uses_anonymous_args = 0 + 224 0000 30B5 push {r4, r5, lr} + 225 0002 0568 ldr r5, [r0] + 226 0004 D0E90104 ldrd r0, r4, [r0, #4] + 227 0008 1434 adds r4, r4, #20 + 228 000a 00F1100E add lr, r0, #16 + 229 .L16: + 230 000e 54ED054A vldr.32 s9, [r4, #-20] + 231 0012 14ED044A vldr.32 s8, [r4, #-16] + 232 0016 54ED033A vldr.32 s7, [r4, #-12] + 233 001a 14ED023A vldr.32 s6, [r4, #-8] + ARM GAS /tmp/ccdao7B1.s page 5 + + + 234 001e 54ED012A vldr.32 s5, [r4, #-4] + 235 0022 5EED046A vldr.32 s13, [lr, #-16] + 236 0026 5EED035A vldr.32 s11, [lr, #-12] + 237 002a 1EED027A vldr.32 s14, [lr, #-8] + 238 002e 1EED015A vldr.32 s10, [lr, #-4] + 239 0032 53B3 cbz r3, .L17 + 240 0034 1846 mov r0, r3 + 241 0036 9446 mov ip, r2 + 242 0038 03E0 b .L15 + 243 .L18: + 244 003a B0EE677A vmov.f32 s14, s15 + 245 003e F0EE466A vmov.f32 s13, s12 + 246 .L15: + 247 0042 B1EC016A vldmia.32 r1!, {s12} + 248 0046 64EE267A vmul.f32 s15, s8, s13 + 249 004a 0138 subs r0, r0, #1 + 250 004c E4EE867A vfma.f32 s15, s9, s12 + 251 0050 E3EEA57A vfma.f32 s15, s7, s11 + 252 0054 F0EE665A vmov.f32 s11, s13 + 253 0058 E3EE077A vfma.f32 s15, s6, s14 + 254 005c E2EE857A vfma.f32 s15, s5, s10 + 255 0060 B0EE475A vmov.f32 s10, s14 + 256 0064 ECEC017A vstmia.32 ip!, {s15} + 257 0068 E7D1 bne .L18 + 258 .L14: + 259 006a 013D subs r5, r5, #1 + 260 006c 0EED046A vstr.32 s12, [lr, #-16] + 261 0070 4EED036A vstr.32 s13, [lr, #-12] + 262 0074 4EED027A vstr.32 s15, [lr, #-8] + 263 0078 0EED017A vstr.32 s14, [lr, #-4] + 264 007c 04F11404 add r4, r4, #20 + 265 0080 0EF1100E add lr, lr, #16 + 266 0084 0AD0 beq .L21 + 267 0086 1146 mov r1, r2 + 268 0088 C1E7 b .L16 + 269 .L17: + 270 008a F0EE477A vmov.f32 s15, s14 + 271 008e B0EE666A vmov.f32 s12, s13 + 272 0092 B0EE457A vmov.f32 s14, s10 + 273 0096 F0EE656A vmov.f32 s13, s11 + 274 009a E6E7 b .L14 + 275 .L21: + 276 009c 30BD pop {r4, r5, pc} + 278 009e 00BF .section .text.arm_biquad_cascade_df1_fast_q15,"ax",%progbits + 279 .align 1 + 280 .p2align 2,,3 + 281 .global arm_biquad_cascade_df1_fast_q15 + 282 .syntax unified + 283 .thumb + 284 .thumb_func + 285 .fpu fpv4-sp-d16 + 287 arm_biquad_cascade_df1_fast_q15: + 288 @ args = 0, pretend = 0, frame = 8 + 289 @ frame_needed = 0, uses_anonymous_args = 0 + 290 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 291 0004 83B0 sub sp, sp, #12 + 292 0006 90F90C80 ldrsb r8, [r0, #12] + ARM GAS /tmp/ccdao7B1.s page 6 + + + 293 000a D0F80490 ldr r9, [r0, #4] + 294 000e D0F808A0 ldr r10, [r0, #8] + 295 0012 90F900B0 ldrsb fp, [r0] + 296 0016 CDE90023 strd r2, r3, [sp] + 297 001a C8F10F08 rsb r8, r8, #15 + 298 .L25: + 299 001e D9F80000 ldr r0, [r9] @ unaligned + 300 0022 D9F80440 ldr r4, [r9, #4] @ unaligned + 301 0026 019D ldr r5, [sp, #4] + 302 0028 DAF800E0 ldr lr, [r10] @ unaligned + 303 002c DAF804C0 ldr ip, [r10, #4] @ unaligned + 304 0030 DAF80870 ldr r7, [r10, #8] @ unaligned + 305 0034 0246 mov r2, r0 + 306 0036 0AF10C0A add r10, r10, #12 + 307 003a 2346 mov r3, r4 + 308 003c C5B1 cbz r5, .L23 + 309 003e 009E ldr r6, [sp] + 310 .L24: + 311 0040 31F9022B ldrsh r2, [r1], #2 + 312 .syntax unified + 313 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 314 0044 2EFB02F3 smuad r3, lr, r2 + 315 @ 0 "" 2 + 316 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 317 0048 2CFB0033 smlad r3, ip, r0, r3 + 318 @ 0 "" 2 + 319 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 320 004c 27FB0433 smlad r3, r7, r4, r3 + 321 @ 0 "" 2 + 322 .thumb + 323 .syntax unified + 324 0050 92B2 uxth r2, r2 + 325 0052 43FA08F3 asr r3, r3, r8 + 326 .syntax unified + 327 @ 206 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 + 328 0056 03F30F03 ssat r3, #16, r3 + 329 @ 0 "" 2 + 330 .thumb + 331 .syntax unified + 332 005a 26F8023B strh r3, [r6], #2 @ movhi + 333 005e 9BB2 uxth r3, r3 + 334 0060 42EA0040 orr r0, r2, r0, lsl #16 + 335 0064 43EA0444 orr r4, r3, r4, lsl #16 + 336 0068 013D subs r5, r5, #1 + 337 006a 0246 mov r2, r0 + 338 006c 2346 mov r3, r4 + 339 006e E7D1 bne .L24 + 340 .L23: + 341 0070 BBF1010B subs fp, fp, #1 + 342 0074 C9F80020 str r2, [r9] @ unaligned + 343 0078 C9F80430 str r3, [r9, #4] @ unaligned + 344 007c 09F10809 add r9, r9, #8 + 345 0080 01D0 beq .L32 + 346 0082 0099 ldr r1, [sp] + 347 0084 CBE7 b .L25 + 348 .L32: + 349 0086 03B0 add sp, sp, #12 + ARM GAS /tmp/ccdao7B1.s page 7 + + + 350 @ sp needed + 351 0088 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 353 .section .text.arm_biquad_cascade_df1_fast_q31,"ax",%progbits + 354 .align 1 + 355 .p2align 2,,3 + 356 .global arm_biquad_cascade_df1_fast_q31 + 357 .syntax unified + 358 .thumb + 359 .thumb_func + 360 .fpu fpv4-sp-d16 + 362 arm_biquad_cascade_df1_fast_q31: + 363 @ args = 0, pretend = 0, frame = 32 + 364 @ frame_needed = 0, uses_anonymous_args = 0 + 365 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 366 0004 047B ldrb r4, [r0, #12] @ zero_extendqisi2 + 367 0006 89B0 sub sp, sp, #36 + 368 0008 CDE90623 strd r2, r3, [sp, #24] + 369 000c 631C adds r3, r4, #1 + 370 000e 0293 str r3, [sp, #8] + 371 0010 8368 ldr r3, [r0, #8] + 372 0012 1433 adds r3, r3, #20 + 373 0014 0493 str r3, [sp, #16] + 374 0016 D0E90023 ldrd r2, r3, [r0] + 375 001a 1033 adds r3, r3, #16 + 376 001c 0393 str r3, [sp, #12] + 377 001e 049B ldr r3, [sp, #16] + 378 0020 0592 str r2, [sp, #20] + 379 0022 8846 mov r8, r1 + 380 0024 4FF0000E mov lr, #0 + 381 .L36: + 382 0028 53E903C2 ldrd ip, r2, [r3, #-12] + 383 002c 53E905A9 ldrd r10, r9, [r3, #-20] + 384 0030 53F8043C ldr r3, [r3, #-4] + 385 0034 0193 str r3, [sp, #4] + 386 0036 079E ldr r6, [sp, #28] + 387 0038 039B ldr r3, [sp, #12] + 388 003a 0092 str r2, [sp] + 389 003c 53E90414 ldrd r1, r4, [r3, #-16] + 390 0040 53E90225 ldrd r2, r5, [r3, #-8] + 391 0044 002E cmp r6, #0 + 392 0046 47D0 beq .L37 + 393 0048 069F ldr r7, [sp, #24] + 394 004a 01E0 b .L35 + 395 .L38: + 396 004c 1A46 mov r2, r3 + 397 004e 0146 mov r1, r0 + 398 .L35: + 399 0050 58F8040B ldr r0, [r8], #4 + 400 0054 4FF0004B mov fp, #-2147483648 + 401 0058 7346 mov r3, lr + 402 005a C0FB0AB3 smlal fp, r3, r0, r10 + 403 005e F346 mov fp, lr + 404 0060 C1FB09B3 smlal fp, r3, r1, r9 + 405 0064 1BF1004B adds fp, fp, #-2147483648 + 406 0068 43F10003 adc r3, r3, #0 + 407 006c F346 mov fp, lr + 408 006e C4FB0CB3 smlal fp, r3, r4, ip + ARM GAS /tmp/ccdao7B1.s page 8 + + + 409 0072 1BF1004B adds fp, fp, #-2147483648 + 410 0076 009C ldr r4, [sp] + 411 0078 43F10003 adc r3, r3, #0 + 412 007c F346 mov fp, lr + 413 007e C2FB04B3 smlal fp, r3, r2, r4 + 414 0082 5C46 mov r4, fp + 415 0084 14F10044 adds r4, r4, #-2147483648 + 416 0088 019C ldr r4, [sp, #4] + 417 008a 43F10003 adc r3, r3, #0 + 418 008e F346 mov fp, lr + 419 0090 C5FB04B3 smlal fp, r3, r5, r4 + 420 0094 5C46 mov r4, fp + 421 0096 14F10044 adds r4, r4, #-2147483648 + 422 009a 029C ldr r4, [sp, #8] + 423 009c 43F10003 adc r3, r3, #0 + 424 00a0 A340 lsls r3, r3, r4 + 425 00a2 013E subs r6, r6, #1 + 426 00a4 47F8043B str r3, [r7], #4 + 427 00a8 0C46 mov r4, r1 + 428 00aa 1546 mov r5, r2 + 429 00ac CED1 bne .L38 + 430 .L34: + 431 00ae 039C ldr r4, [sp, #12] + 432 00b0 44F8083C str r3, [r4, #-8] + 433 00b4 2346 mov r3, r4 + 434 00b6 1033 adds r3, r3, #16 + 435 00b8 44F8042C str r2, [r4, #-4] + 436 00bc 0393 str r3, [sp, #12] + 437 00be 049A ldr r2, [sp, #16] + 438 00c0 059B ldr r3, [sp, #20] + 439 00c2 1432 adds r2, r2, #20 + 440 00c4 013B subs r3, r3, #1 + 441 00c6 44E90401 strd r0, r1, [r4, #-16] + 442 00ca 0492 str r2, [sp, #16] + 443 00cc 0593 str r3, [sp, #20] + 444 00ce 08D0 beq .L41 + 445 00d0 DDF81880 ldr r8, [sp, #24] + 446 00d4 1346 mov r3, r2 + 447 00d6 A7E7 b .L36 + 448 .L37: + 449 00d8 1346 mov r3, r2 + 450 00da 0846 mov r0, r1 + 451 00dc 2A46 mov r2, r5 + 452 00de 2146 mov r1, r4 + 453 00e0 E5E7 b .L34 + 454 .L41: + 455 00e2 09B0 add sp, sp, #36 + 456 @ sp needed + 457 00e4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 459 .section .text.arm_biquad_cascade_df1_init_f32,"ax",%progbits + 460 .align 1 + 461 .p2align 2,,3 + 462 .global arm_biquad_cascade_df1_init_f32 + 463 .syntax unified + 464 .thumb + 465 .thumb_func + 466 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccdao7B1.s page 9 + + + 468 arm_biquad_cascade_df1_init_f32: + 469 @ args = 0, pretend = 0, frame = 0 + 470 @ frame_needed = 0, uses_anonymous_args = 0 + 471 0000 10B5 push {r4, lr} + 472 0002 0160 str r1, [r0] + 473 0004 8260 str r2, [r0, #8] + 474 0006 0446 mov r4, r0 + 475 0008 0A01 lsls r2, r1, #4 + 476 000a 1846 mov r0, r3 + 477 000c 0021 movs r1, #0 + 478 000e FFF7FEFF bl memset + 479 0012 6060 str r0, [r4, #4] + 480 0014 10BD pop {r4, pc} + 482 0016 00BF .section .text.arm_biquad_cascade_df1_init_q15,"ax",%progbits + 483 .align 1 + 484 .p2align 2,,3 + 485 .global arm_biquad_cascade_df1_init_q15 + 486 .syntax unified + 487 .thumb + 488 .thumb_func + 489 .fpu fpv4-sp-d16 + 491 arm_biquad_cascade_df1_init_q15: + 492 @ args = 4, pretend = 0, frame = 0 + 493 @ frame_needed = 0, uses_anonymous_args = 0 + 494 0000 10B5 push {r4, lr} + 495 0002 0446 mov r4, r0 + 496 0004 9DF90800 ldrsb r0, [sp, #8] + 497 0008 2170 strb r1, [r4] + 498 000a 2073 strb r0, [r4, #12] + 499 000c A260 str r2, [r4, #8] + 500 000e 1846 mov r0, r3 + 501 0010 CA00 lsls r2, r1, #3 + 502 0012 0021 movs r1, #0 + 503 0014 FFF7FEFF bl memset + 504 0018 6060 str r0, [r4, #4] + 505 001a 10BD pop {r4, pc} + 507 .section .text.arm_biquad_cascade_df1_init_q31,"ax",%progbits + 508 .align 1 + 509 .p2align 2,,3 + 510 .global arm_biquad_cascade_df1_init_q31 + 511 .syntax unified + 512 .thumb + 513 .thumb_func + 514 .fpu fpv4-sp-d16 + 516 arm_biquad_cascade_df1_init_q31: + 517 @ args = 4, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 0000 10B5 push {r4, lr} + 520 0002 0446 mov r4, r0 + 521 0004 9DF90800 ldrsb r0, [sp, #8] + 522 0008 2160 str r1, [r4] + 523 000a 2073 strb r0, [r4, #12] + 524 000c A260 str r2, [r4, #8] + 525 000e 1846 mov r0, r3 + 526 0010 0A01 lsls r2, r1, #4 + 527 0012 0021 movs r1, #0 + 528 0014 FFF7FEFF bl memset + ARM GAS /tmp/ccdao7B1.s page 10 + + + 529 0018 6060 str r0, [r4, #4] + 530 001a 10BD pop {r4, pc} + 532 .section .text.arm_biquad_cascade_df1_q15,"ax",%progbits + 533 .align 1 + 534 .p2align 2,,3 + 535 .global arm_biquad_cascade_df1_q15 + 536 .syntax unified + 537 .thumb + 538 .thumb_func + 539 .fpu fpv4-sp-d16 + 541 arm_biquad_cascade_df1_q15: + 542 @ args = 0, pretend = 0, frame = 32 + 543 @ frame_needed = 0, uses_anonymous_args = 0 + 544 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 545 0004 89B0 sub sp, sp, #36 + 546 0006 90F90C60 ldrsb r6, [r0, #12] + 547 000a 0091 str r1, [sp] + 548 000c 5908 lsrs r1, r3, #1 + 549 000e 03F00103 and r3, r3, #1 + 550 0012 0493 str r3, [sp, #16] + 551 0014 8368 ldr r3, [r0, #8] + 552 0016 0193 str r3, [sp, #4] + 553 0018 90F90030 ldrsb r3, [r0] + 554 001c 0293 str r3, [sp, #8] + 555 001e 8B00 lsls r3, r1, #2 + 556 0020 C6F10F09 rsb r9, r6, #15 + 557 0024 0793 str r3, [sp, #28] + 558 0026 1136 adds r6, r6, #17 + 559 0028 02EB8103 add r3, r2, r1, lsl #2 + 560 002c D0F804A0 ldr r10, [r0, #4] + 561 0030 0392 str r2, [sp, #12] + 562 0032 0591 str r1, [sp, #20] + 563 0034 0693 str r3, [sp, #24] + 564 0036 B346 mov fp, r6 + 565 .L54: + 566 0038 019A ldr r2, [sp, #4] + 567 003a DAF80010 ldr r1, [r10] @ unaligned + 568 003e DAF80430 ldr r3, [r10, #4] @ unaligned + 569 0042 059E ldr r6, [sp, #20] + 570 0044 1768 ldr r7, [r2] @ unaligned + 571 0046 5568 ldr r5, [r2, #4] @ unaligned + 572 0048 9468 ldr r4, [r2, #8] @ unaligned + 573 004a 0C32 adds r2, r2, #12 + 574 004c 0192 str r2, [sp, #4] + 575 004e 0846 mov r0, r1 + 576 0050 1A46 mov r2, r3 + 577 0052 002E cmp r6, #0 + 578 0054 78D0 beq .L55 + 579 0056 DDF80C80 ldr r8, [sp, #12] + 580 005a DDF800E0 ldr lr, [sp] + 581 005e B446 mov ip, r6 + 582 0060 5E46 mov r6, fp + 583 .L50: + 584 0062 5EF8040B ldr r0, [lr], #4 @ unaligned + 585 .syntax unified + 586 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 587 0066 27FB00FB smuad fp, r7, r0 + ARM GAS /tmp/ccdao7B1.s page 11 + + + 588 @ 0 "" 2 + 589 .thumb + 590 .syntax unified + 591 006a 4FEAEB72 asr r2, fp, #31 + 592 .syntax unified + 593 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 594 006e C5FBC1B2 smlald fp, r2, r5, r1 + 595 @ 0 "" 2 + 596 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 597 0072 C4FBC3B2 smlald fp, r2, r4, r3 + 598 @ 0 "" 2 + 599 .thumb + 600 .syntax unified + 601 0076 B240 lsls r2, r2, r6 + 602 0078 2BFA09FB lsr fp, fp, r9 + 603 007c 42EA0B02 orr r2, r2, fp + 604 .syntax unified + 605 @ 389 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 + 606 0080 02F30F02 ssat r2, #16, r2 + 607 @ 0 "" 2 + 608 .thumb + 609 .syntax unified + 610 0084 92B2 uxth r2, r2 + 611 0086 42EA0343 orr r3, r2, r3, lsl #16 + 612 008a 82B2 uxth r2, r0 + 613 008c 42EA0141 orr r1, r2, r1, lsl #16 + 614 .syntax unified + 615 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 616 0090 27FB10F2 smuadx r2, r7, r0 + 617 @ 0 "" 2 + 618 .thumb + 619 .syntax unified + 620 0094 4FEAE27B asr fp, r2, #31 + 621 .syntax unified + 622 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 623 0098 C5FBC12B smlald r2, fp, r5, r1 + 624 @ 0 "" 2 + 625 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 626 009c C4FBC32B smlald r2, fp, r4, r3 + 627 @ 0 "" 2 + 628 .thumb + 629 .syntax unified + 630 00a0 0904 lsls r1, r1, #16 + 631 00a2 41EA1040 orr r0, r1, r0, lsr #16 + 632 00a6 0BFA06FB lsl fp, fp, r6 + 633 00aa 99B2 uxth r1, r3 + 634 00ac 22FA09F2 lsr r2, r2, r9 + 635 00b0 4BEA0202 orr r2, fp, r2 + 636 .syntax unified + 637 @ 425 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 + 638 00b4 02F30F02 ssat r2, #16, r2 + 639 @ 0 "" 2 + 640 .thumb + 641 .syntax unified + 642 00b8 41EA0241 orr r1, r1, r2, lsl #16 + 643 00bc 92B2 uxth r2, r2 + 644 00be 42EA0342 orr r2, r2, r3, lsl #16 + ARM GAS /tmp/ccdao7B1.s page 12 + + + 645 00c2 BCF1010C subs ip, ip, #1 + 646 00c6 48F8041B str r1, [r8], #4 @ unaligned + 647 00ca 1346 mov r3, r2 + 648 00cc 0146 mov r1, r0 + 649 00ce C8D1 bne .L50 + 650 00d0 009B ldr r3, [sp] + 651 00d2 0799 ldr r1, [sp, #28] + 652 00d4 0B44 add r3, r3, r1 + 653 00d6 0093 str r3, [sp] + 654 00d8 069B ldr r3, [sp, #24] + 655 00da B346 mov fp, r6 + 656 .L49: + 657 00dc 0499 ldr r1, [sp, #16] + 658 00de 31B3 cbz r1, .L51 + 659 00e0 0099 ldr r1, [sp] + 660 00e2 B1F90010 ldrsh r1, [r1] + 661 .syntax unified + 662 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 663 00e6 27FB01F7 smuad r7, r7, r1 + 664 @ 0 "" 2 + 665 .thumb + 666 .syntax unified + 667 00ea 4FEAE77C asr ip, r7, #31 + 668 .syntax unified + 669 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 670 00ee C5FBC07C smlald r7, ip, r5, r0 + 671 @ 0 "" 2 + 672 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 673 00f2 C4FBC27C smlald r7, ip, r4, r2 + 674 @ 0 "" 2 + 675 .thumb + 676 .syntax unified + 677 00f6 0CFA0BFC lsl ip, ip, fp + 678 00fa 27FA09F7 lsr r7, r7, r9 + 679 00fe 4CEA0707 orr r7, ip, r7 + 680 .syntax unified + 681 @ 484 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1 + 682 0102 07F30F07 ssat r7, #16, r7 + 683 @ 0 "" 2 + 684 .thumb + 685 .syntax unified + 686 0106 1F80 strh r7, [r3] @ movhi + 687 0108 BFB2 uxth r7, r7 + 688 010a 47EA0243 orr r3, r7, r2, lsl #16 + 689 010e CAF80430 str r3, [r10, #4] @ unaligned + 690 0112 029B ldr r3, [sp, #8] + 691 0114 89B2 uxth r1, r1 + 692 0116 41EA0041 orr r1, r1, r0, lsl #16 + 693 011a 013B subs r3, r3, #1 + 694 011c CAF80010 str r1, [r10] @ unaligned + 695 0120 0293 str r3, [sp, #8] + 696 0122 0AF1080A add r10, r10, #8 + 697 0126 0CD0 beq .L48 + 698 .L62: + 699 0128 039B ldr r3, [sp, #12] + 700 012a 0093 str r3, [sp] + 701 012c 84E7 b .L54 + ARM GAS /tmp/ccdao7B1.s page 13 + + + 702 .L51: + 703 012e 029B ldr r3, [sp, #8] + 704 0130 CAF80000 str r0, [r10] @ unaligned + 705 0134 013B subs r3, r3, #1 + 706 0136 CAF80420 str r2, [r10, #4] @ unaligned + 707 013a 0293 str r3, [sp, #8] + 708 013c 0AF1080A add r10, r10, #8 + 709 0140 F2D1 bne .L62 + 710 .L48: + 711 0142 09B0 add sp, sp, #36 + 712 @ sp needed + 713 0144 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 714 .L55: + 715 0148 039B ldr r3, [sp, #12] + 716 014a C7E7 b .L49 + 718 .section .text.arm_biquad_cascade_df1_q31,"ax",%progbits + 719 .align 1 + 720 .p2align 2,,3 + 721 .global arm_biquad_cascade_df1_q31 + 722 .syntax unified + 723 .thumb + 724 .thumb_func + 725 .fpu fpv4-sp-d16 + 727 arm_biquad_cascade_df1_q31: + 728 @ args = 0, pretend = 0, frame = 40 + 729 @ frame_needed = 0, uses_anonymous_args = 0 + 730 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 731 0004 8BB0 sub sp, sp, #44 + 732 0006 047B ldrb r4, [r0, #12] @ zero_extendqisi2 + 733 0008 0993 str r3, [sp, #36] + 734 000a 8368 ldr r3, [r0, #8] + 735 000c 0792 str r2, [sp, #28] + 736 000e 1433 adds r3, r3, #20 + 737 0010 0593 str r3, [sp, #20] + 738 0012 D0E90023 ldrd r2, r3, [r0] + 739 0016 03F11009 add r9, r3, #16 + 740 001a 631C adds r3, r4, #1 + 741 001c 8A46 mov r10, r1 + 742 001e 0692 str r2, [sp, #24] + 743 0020 C4F11F08 rsb r8, r4, #31 + 744 0024 0493 str r3, [sp, #16] + 745 .L67: + 746 0026 059B ldr r3, [sp, #20] + 747 0028 53F80C2C ldr r2, [r3, #-12] + 748 002c 0192 str r2, [sp, #4] + 749 002e 53E9050E ldrd r0, lr, [r3, #-20] + 750 0032 53F8082C ldr r2, [r3, #-8] + 751 0036 53F8043C ldr r3, [r3, #-4] + 752 003a 0393 str r3, [sp, #12] + 753 003c 099B ldr r3, [sp, #36] + 754 003e 0292 str r2, [sp, #8] + 755 0040 59E90415 ldrd r1, r5, [r9, #-16] + 756 0044 59E90226 ldrd r2, r6, [r9, #-8] + 757 0048 002B cmp r3, #0 + 758 004a 41D0 beq .L68 + 759 004c CDF82090 str r9, [sp, #32] + 760 0050 079F ldr r7, [sp, #28] + ARM GAS /tmp/ccdao7B1.s page 14 + + + 761 0052 0096 str r6, [sp] + 762 0054 9C46 mov ip, r3 + 763 0056 8146 mov r9, r0 + 764 0058 01E0 b .L66 + 765 .L69: + 766 005a 1A46 mov r2, r3 + 767 005c 0146 mov r1, r0 + 768 .L66: + 769 005e 5AF8040B ldr r0, [r10], #4 + 770 0062 019E ldr r6, [sp, #4] + 771 0064 81FB0E3B smull r3, fp, r1, lr + 772 0068 C0FB093B smlal r3, fp, r0, r9 + 773 006c C5FB063B smlal r3, fp, r5, r6 + 774 0070 029D ldr r5, [sp, #8] + 775 0072 009E ldr r6, [sp] + 776 0074 0092 str r2, [sp] + 777 0076 C2FB053B smlal r3, fp, r2, r5 + 778 007a 039D ldr r5, [sp, #12] + 779 007c C6FB053B smlal r3, fp, r6, r5 + 780 0080 049D ldr r5, [sp, #16] + 781 0082 B8F12004 subs r4, r8, #32 + 782 0086 4BFA04F4 asr r4, fp, r4 + 783 008a 23FA08F3 lsr r3, r3, r8 + 784 008e 0BFA05FB lsl fp, fp, r5 + 785 0092 43EA0B03 orr r3, r3, fp + 786 0096 07F10407 add r7, r7, #4 + 787 009a 58BF it pl + 788 009c 2343 orrpl r3, r3, r4 + 789 009e BCF1010C subs ip, ip, #1 + 790 00a2 47F8043C str r3, [r7, #-4] + 791 00a6 0D46 mov r5, r1 + 792 00a8 1C46 mov r4, r3 + 793 00aa D6D1 bne .L69 + 794 00ac DDF82090 ldr r9, [sp, #32] + 795 .L64: + 796 00b0 059B ldr r3, [sp, #20] + 797 00b2 1433 adds r3, r3, #20 + 798 00b4 0593 str r3, [sp, #20] + 799 00b6 069B ldr r3, [sp, #24] + 800 00b8 013B subs r3, r3, #1 + 801 00ba 49E90401 strd r0, r1, [r9, #-16] + 802 00be 49E90242 strd r4, r2, [r9, #-8] + 803 00c2 0693 str r3, [sp, #24] + 804 00c4 09F11009 add r9, r9, #16 + 805 00c8 07D0 beq .L72 + 806 00ca DDF81CA0 ldr r10, [sp, #28] + 807 00ce AAE7 b .L67 + 808 .L68: + 809 00d0 1446 mov r4, r2 + 810 00d2 0846 mov r0, r1 + 811 00d4 3246 mov r2, r6 + 812 00d6 2946 mov r1, r5 + 813 00d8 EAE7 b .L64 + 814 .L72: + 815 00da 0BB0 add sp, sp, #44 + 816 @ sp needed + 817 00dc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + ARM GAS /tmp/ccdao7B1.s page 15 + + + 819 .section .text.arm_biquad_cascade_df2T_f32,"ax",%progbits + 820 .align 1 + 821 .p2align 2,,3 + 822 .global arm_biquad_cascade_df2T_f32 + 823 .syntax unified + 824 .thumb + 825 .thumb_func + 826 .fpu fpv4-sp-d16 + 828 arm_biquad_cascade_df2T_f32: + 829 @ args = 0, pretend = 0, frame = 0 + 830 @ frame_needed = 0, uses_anonymous_args = 0 + 831 0000 70B5 push {r4, r5, r6, lr} + 832 0002 1646 mov r6, r2 + 833 0004 1D46 mov r5, r3 + 834 0006 0278 ldrb r2, [r0] @ zero_extendqisi2 + 835 0008 8368 ldr r3, [r0, #8] + 836 000a 03F1140E add lr, r3, #20 + 837 000e 4368 ldr r3, [r0, #4] + 838 0010 0833 adds r3, r3, #8 + 839 .L76: + 840 0012 5EED055A vldr.32 s11, [lr, #-20] + 841 0016 1EED045A vldr.32 s10, [lr, #-16] + 842 001a 5EED034A vldr.32 s9, [lr, #-12] + 843 001e 1EED024A vldr.32 s8, [lr, #-8] + 844 0022 5EED013A vldr.32 s7, [lr, #-4] + 845 0026 1C46 mov r4, r3 + 846 0028 13ED026A vldr.32 s12, [r3, #-8] + 847 002c 53ED016A vldr.32 s13, [r3, #-4] + 848 0030 CDB1 cbz r5, .L74 + 849 0032 2846 mov r0, r5 + 850 0034 B446 mov ip, r6 + 851 .L75: + 852 0036 B1EC017A vldmia.32 r1!, {s14} + 853 003a 65EE877A vmul.f32 s15, s11, s14 + 854 003e 77EE867A vadd.f32 s15, s15, s12 + 855 0042 25EE076A vmul.f32 s12, s10, s14 + 856 0046 76EE266A vadd.f32 s13, s12, s13 + 857 004a 24EE276A vmul.f32 s12, s8, s15 + 858 004e 36EE266A vadd.f32 s12, s12, s13 + 859 0052 24EE877A vmul.f32 s14, s9, s14 + 860 0056 63EEA76A vmul.f32 s13, s7, s15 + 861 005a 76EE876A vadd.f32 s13, s13, s14 + 862 005e ECEC017A vstmia.32 ip!, {s15} + 863 0062 0138 subs r0, r0, #1 + 864 0064 E7D1 bne .L75 + 865 .L74: + 866 0066 04ED026A vstr.32 s12, [r4, #-8] + 867 006a 44ED016A vstr.32 s13, [r4, #-4] + 868 006e 0EF1140E add lr, lr, #20 + 869 0072 0833 adds r3, r3, #8 + 870 0074 013A subs r2, r2, #1 + 871 0076 01D0 beq .L80 + 872 0078 3146 mov r1, r6 + 873 007a CAE7 b .L76 + 874 .L80: + 875 007c 70BD pop {r4, r5, r6, pc} + 877 .global __aeabi_dmul + ARM GAS /tmp/ccdao7B1.s page 16 + + + 878 .global __aeabi_dadd + 879 007e 00BF .section .text.arm_biquad_cascade_df2T_f64,"ax",%progbits + 880 .align 1 + 881 .p2align 2,,3 + 882 .global arm_biquad_cascade_df2T_f64 + 883 .syntax unified + 884 .thumb + 885 .thumb_func + 886 .fpu fpv4-sp-d16 + 888 arm_biquad_cascade_df2T_f64: + 889 @ args = 0, pretend = 0, frame = 80 + 890 @ frame_needed = 0, uses_anonymous_args = 0 + 891 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 892 0004 95B0 sub sp, sp, #84 + 893 0006 8A46 mov r10, r1 + 894 0008 1292 str r2, [sp, #72] + 895 000a 1393 str r3, [sp, #76] + 896 000c 0378 ldrb r3, [r0] @ zero_extendqisi2 + 897 000e 1093 str r3, [sp, #64] + 898 0010 8368 ldr r3, [r0, #8] + 899 0012 03F12802 add r2, r3, #40 + 900 0016 4368 ldr r3, [r0, #4] + 901 0018 1033 adds r3, r3, #16 + 902 001a 0F93 str r3, [sp, #60] + 903 001c 9346 mov fp, r2 + 904 .L84: + 905 001e 1BED0A7B vldr.64 d7, [fp, #-40] + 906 0022 8DED047B vstr.64 d7, [sp, #16] + 907 0026 1BED087B vldr.64 d7, [fp, #-32] + 908 002a 8DED067B vstr.64 d7, [sp, #24] + 909 002e 1BED067B vldr.64 d7, [fp, #-24] + 910 0032 8DED087B vstr.64 d7, [sp, #32] + 911 0036 1BED047B vldr.64 d7, [fp, #-16] + 912 003a 8DED0A7B vstr.64 d7, [sp, #40] + 913 003e 1BED027B vldr.64 d7, [fp, #-8] + 914 0042 8DED0C7B vstr.64 d7, [sp, #48] + 915 0046 0F9B ldr r3, [sp, #60] + 916 0048 1193 str r3, [sp, #68] + 917 004a 13ED047B vldr.64 d7, [r3, #-16] + 918 004e 8DED007B vstr.64 d7, [sp] + 919 0052 13ED027B vldr.64 d7, [r3, #-8] + 920 0056 8DED027B vstr.64 d7, [sp, #8] + 921 005a 139B ldr r3, [sp, #76] + 922 005c 002B cmp r3, #0 + 923 005e 41D0 beq .L82 + 924 0060 9846 mov r8, r3 + 925 0062 DDF84890 ldr r9, [sp, #72] + 926 .L83: + 927 0066 FAE80245 ldrd r4, [r10], #8 + 928 006a 2246 mov r2, r4 + 929 006c 2B46 mov r3, r5 + 930 006e DDE90401 ldrd r0, [sp, #16] + 931 0072 FFF7FEFF bl __aeabi_dmul + 932 0076 DDE90023 ldrd r2, [sp] + 933 007a FFF7FEFF bl __aeabi_dadd + 934 007e 0646 mov r6, r0 + 935 0080 0F46 mov r7, r1 + ARM GAS /tmp/ccdao7B1.s page 17 + + + 936 0082 2246 mov r2, r4 + 937 0084 2B46 mov r3, r5 + 938 0086 DDE90601 ldrd r0, [sp, #24] + 939 008a FFF7FEFF bl __aeabi_dmul + 940 008e DDE90223 ldrd r2, [sp, #8] + 941 0092 FFF7FEFF bl __aeabi_dadd + 942 0096 CDE90001 strd r0, [sp] + 943 009a 3246 mov r2, r6 + 944 009c 3B46 mov r3, r7 + 945 009e DDE90A01 ldrd r0, [sp, #40] + 946 00a2 FFF7FEFF bl __aeabi_dmul + 947 00a6 DDE90023 ldrd r2, [sp] + 948 00aa FFF7FEFF bl __aeabi_dadd + 949 00ae CDE90001 strd r0, [sp] + 950 00b2 2246 mov r2, r4 + 951 00b4 2B46 mov r3, r5 + 952 00b6 DDE90801 ldrd r0, [sp, #32] + 953 00ba FFF7FEFF bl __aeabi_dmul + 954 00be 0446 mov r4, r0 + 955 00c0 0D46 mov r5, r1 + 956 00c2 3246 mov r2, r6 + 957 00c4 3B46 mov r3, r7 + 958 00c6 DDE90C01 ldrd r0, [sp, #48] + 959 00ca FFF7FEFF bl __aeabi_dmul + 960 00ce 2246 mov r2, r4 + 961 00d0 2B46 mov r3, r5 + 962 00d2 FFF7FEFF bl __aeabi_dadd + 963 00d6 CDE90201 strd r0, [sp, #8] + 964 00da E9E80267 strd r6, [r9], #8 + 965 00de B8F10108 subs r8, r8, #1 + 966 00e2 C0D1 bne .L83 + 967 .L82: + 968 00e4 119B ldr r3, [sp, #68] + 969 00e6 9DED007B vldr.64 d7, [sp] + 970 00ea 03ED047B vstr.64 d7, [r3, #-16] + 971 00ee 9DED027B vldr.64 d7, [sp, #8] + 972 00f2 03ED027B vstr.64 d7, [r3, #-8] + 973 00f6 0BF1280B add fp, fp, #40 + 974 00fa 0F9B ldr r3, [sp, #60] + 975 00fc 1033 adds r3, r3, #16 + 976 00fe 0F93 str r3, [sp, #60] + 977 0100 109B ldr r3, [sp, #64] + 978 0102 013B subs r3, r3, #1 + 979 0104 1093 str r3, [sp, #64] + 980 0106 02D0 beq .L88 + 981 0108 DDF848A0 ldr r10, [sp, #72] + 982 010c 87E7 b .L84 + 983 .L88: + 984 010e 15B0 add sp, sp, #84 + 985 @ sp needed + 986 0110 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 988 .section .text.arm_biquad_cascade_df2T_init_f32,"ax",%progbits + 989 .align 1 + 990 .p2align 2,,3 + 991 .global arm_biquad_cascade_df2T_init_f32 + 992 .syntax unified + 993 .thumb + ARM GAS /tmp/ccdao7B1.s page 18 + + + 994 .thumb_func + 995 .fpu fpv4-sp-d16 + 997 arm_biquad_cascade_df2T_init_f32: + 998 @ args = 0, pretend = 0, frame = 0 + 999 @ frame_needed = 0, uses_anonymous_args = 0 + 1000 0000 10B5 push {r4, lr} + 1001 0002 0170 strb r1, [r0] + 1002 0004 8260 str r2, [r0, #8] + 1003 0006 0446 mov r4, r0 + 1004 0008 CA00 lsls r2, r1, #3 + 1005 000a 1846 mov r0, r3 + 1006 000c 0021 movs r1, #0 + 1007 000e FFF7FEFF bl memset + 1008 0012 6060 str r0, [r4, #4] + 1009 0014 10BD pop {r4, pc} + 1011 0016 00BF .section .text.arm_biquad_cascade_df2T_init_f64,"ax",%progbits + 1012 .align 1 + 1013 .p2align 2,,3 + 1014 .global arm_biquad_cascade_df2T_init_f64 + 1015 .syntax unified + 1016 .thumb + 1017 .thumb_func + 1018 .fpu fpv4-sp-d16 + 1020 arm_biquad_cascade_df2T_init_f64: + 1021 @ args = 0, pretend = 0, frame = 0 + 1022 @ frame_needed = 0, uses_anonymous_args = 0 + 1023 0000 10B5 push {r4, lr} + 1024 0002 0170 strb r1, [r0] + 1025 0004 8260 str r2, [r0, #8] + 1026 0006 0446 mov r4, r0 + 1027 0008 0A01 lsls r2, r1, #4 + 1028 000a 1846 mov r0, r3 + 1029 000c 0021 movs r1, #0 + 1030 000e FFF7FEFF bl memset + 1031 0012 6060 str r0, [r4, #4] + 1032 0014 10BD pop {r4, pc} + 1034 0016 00BF .section .text.arm_biquad_cascade_stereo_df2T_f32,"ax",%progbits + 1035 .align 1 + 1036 .p2align 2,,3 + 1037 .global arm_biquad_cascade_stereo_df2T_f32 + 1038 .syntax unified + 1039 .thumb + 1040 .thumb_func + 1041 .fpu fpv4-sp-d16 + 1043 arm_biquad_cascade_stereo_df2T_f32: + 1044 @ args = 0, pretend = 0, frame = 0 + 1045 @ frame_needed = 0, uses_anonymous_args = 0 + 1046 0000 70B5 push {r4, r5, r6, lr} + 1047 0002 1646 mov r6, r2 + 1048 0004 1D46 mov r5, r3 + 1049 0006 0478 ldrb r4, [r0] @ zero_extendqisi2 + 1050 0008 8368 ldr r3, [r0, #8] + 1051 000a 1433 adds r3, r3, #20 + 1052 000c 4068 ldr r0, [r0, #4] + 1053 000e 00F1100E add lr, r0, #16 + 1054 .L96: + 1055 0012 53ED053A vldr.32 s7, [r3, #-20] + ARM GAS /tmp/ccdao7B1.s page 19 + + + 1056 0016 13ED043A vldr.32 s6, [r3, #-16] + 1057 001a 53ED032A vldr.32 s5, [r3, #-12] + 1058 001e 13ED022A vldr.32 s4, [r3, #-8] + 1059 0022 53ED011A vldr.32 s3, [r3, #-4] + 1060 0026 7246 mov r2, lr + 1061 0028 1EED046A vldr.32 s12, [lr, #-16] + 1062 002c 1EED034A vldr.32 s8, [lr, #-12] + 1063 0030 5EED026A vldr.32 s13, [lr, #-8] + 1064 0034 5EED014A vldr.32 s9, [lr, #-4] + 1065 0038 A5B3 cbz r5, .L94 + 1066 003a 0831 adds r1, r1, #8 + 1067 003c 06F10800 add r0, r6, #8 + 1068 0040 AC46 mov ip, r5 + 1069 .L95: + 1070 0042 11ED025A vldr.32 s10, [r1, #-8] + 1071 0046 51ED015A vldr.32 s11, [r1, #-4] + 1072 004a 23EE857A vmul.f32 s14, s7, s10 + 1073 004e 37EE067A vadd.f32 s14, s14, s12 + 1074 0052 63EEA57A vmul.f32 s15, s7, s11 + 1075 0056 77EEA67A vadd.f32 s15, s15, s13 + 1076 005a 00ED027A vstr.32 s14, [r0, #-8] + 1077 005e 40ED017A vstr.32 s15, [r0, #-4] + 1078 0062 23EE056A vmul.f32 s12, s6, s10 + 1079 0066 62EE076A vmul.f32 s13, s4, s14 + 1080 006a 36EE266A vadd.f32 s12, s12, s13 + 1081 006e 36EE046A vadd.f32 s12, s12, s8 + 1082 0072 63EE256A vmul.f32 s13, s6, s11 + 1083 0076 22EE274A vmul.f32 s8, s4, s15 + 1084 007a 76EE846A vadd.f32 s13, s13, s8 + 1085 007e 76EEA46A vadd.f32 s13, s13, s9 + 1086 0082 22EE855A vmul.f32 s10, s5, s10 + 1087 0086 21EE877A vmul.f32 s14, s3, s14 + 1088 008a 35EE074A vadd.f32 s8, s10, s14 + 1089 008e 62EEA55A vmul.f32 s11, s5, s11 + 1090 0092 61EEA77A vmul.f32 s15, s3, s15 + 1091 0096 75EEA74A vadd.f32 s9, s11, s15 + 1092 009a 0831 adds r1, r1, #8 + 1093 009c 0830 adds r0, r0, #8 + 1094 009e BCF1010C subs ip, ip, #1 + 1095 00a2 CED1 bne .L95 + 1096 .L94: + 1097 00a4 02ED046A vstr.32 s12, [r2, #-16] + 1098 00a8 02ED034A vstr.32 s8, [r2, #-12] + 1099 00ac 42ED026A vstr.32 s13, [r2, #-8] + 1100 00b0 42ED014A vstr.32 s9, [r2, #-4] + 1101 00b4 1433 adds r3, r3, #20 + 1102 00b6 0EF1100E add lr, lr, #16 + 1103 00ba 013C subs r4, r4, #1 + 1104 00bc 01D0 beq .L100 + 1105 00be 3146 mov r1, r6 + 1106 00c0 A7E7 b .L96 + 1107 .L100: + 1108 00c2 70BD pop {r4, r5, r6, pc} + 1110 .section .text.arm_biquad_cascade_stereo_df2T_init_f32,"ax",%progbits + 1111 .align 1 + 1112 .p2align 2,,3 + 1113 .global arm_biquad_cascade_stereo_df2T_init_f32 + ARM GAS /tmp/ccdao7B1.s page 20 + + + 1114 .syntax unified + 1115 .thumb + 1116 .thumb_func + 1117 .fpu fpv4-sp-d16 + 1119 arm_biquad_cascade_stereo_df2T_init_f32: + 1120 @ args = 0, pretend = 0, frame = 0 + 1121 @ frame_needed = 0, uses_anonymous_args = 0 + 1122 0000 10B5 push {r4, lr} + 1123 0002 0170 strb r1, [r0] + 1124 0004 8260 str r2, [r0, #8] + 1125 0006 0446 mov r4, r0 + 1126 0008 0A01 lsls r2, r1, #4 + 1127 000a 1846 mov r0, r3 + 1128 000c 0021 movs r1, #0 + 1129 000e FFF7FEFF bl memset + 1130 0012 6060 str r0, [r4, #4] + 1131 0014 10BD pop {r4, pc} + 1133 0016 00BF .section .text.arm_conv_f32,"ax",%progbits + 1134 .align 1 + 1135 .p2align 2,,3 + 1136 .global arm_conv_f32 + 1137 .syntax unified + 1138 .thumb + 1139 .thumb_func + 1140 .fpu fpv4-sp-d16 + 1142 arm_conv_f32: + 1143 @ args = 4, pretend = 0, frame = 0 + 1144 @ frame_needed = 0, uses_anonymous_args = 0 + 1145 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1146 0004 9942 cmp r1, r3 + 1147 0006 099E ldr r6, [sp, #36] + 1148 0008 05D2 bcs .L104 + 1149 000a 0546 mov r5, r0 + 1150 000c 0C46 mov r4, r1 + 1151 000e 1046 mov r0, r2 + 1152 0010 1946 mov r1, r3 + 1153 0012 2A46 mov r2, r5 + 1154 0014 2346 mov r3, r4 + 1155 .L104: + 1156 0016 0131 adds r1, r1, #1 + 1157 0018 5D1E subs r5, r3, #1 + 1158 001a A1EB030A sub r10, r1, r3 + 1159 001e 00F08880 beq .L105 + 1160 0022 03F18049 add r9, r3, #1073741824 + 1161 0026 09F1FF39 add r9, r9, #-1 + 1162 002a 00F10408 add r8, r0, #4 + 1163 002e 4FEA890B lsl fp, r9, #2 + 1164 0032 C646 mov lr, r8 + 1165 0034 06EB8909 add r9, r6, r9, lsl #2 + 1166 0038 1446 mov r4, r2 + 1167 003a 3746 mov r7, r6 + 1168 .L107: + 1169 003c 0434 adds r4, r4, #4 + 1170 003e DFED437A vldr.32 s15, .L145 + 1171 0042 A446 mov ip, r4 + 1172 0044 0146 mov r1, r0 + 1173 .L106: + ARM GAS /tmp/ccdao7B1.s page 21 + + + 1174 0046 F1EC016A vldmia.32 r1!, {s13} + 1175 004a 3CED017A vldmdb.32 ip!, {s14} + 1176 004e 7145 cmp r1, lr + 1177 0050 E6EE877A vfma.f32 s15, s13, s14 + 1178 0054 F7D1 bne .L106 + 1179 0056 E7EC017A vstmia.32 r7!, {s15} + 1180 005a B945 cmp r9, r7 + 1181 005c 01F1040E add lr, r1, #4 + 1182 0060 ECD1 bne .L107 + 1183 0062 032B cmp r3, #3 + 1184 0064 5A44 add r2, r2, fp + 1185 0066 06EB8506 add r6, r6, r5, lsl #2 + 1186 006a 32D9 bls .L142 + 1187 006c BAF1000F cmp r10, #0 + 1188 0070 64D0 beq .L123 + 1189 0072 171D adds r7, r2, #4 + 1190 0074 4FEA8A08 lsl r8, r10, #2 + 1191 0078 06EB8A04 add r4, r6, r10, lsl #2 + 1192 007c 8646 mov lr, r0 + 1193 .L113: + 1194 007e DFED337A vldr.32 s15, .L145 + 1195 0082 BC46 mov ip, r7 + 1196 0084 1A46 mov r2, r3 + 1197 0086 7146 mov r1, lr + 1198 .L112: + 1199 0088 F1EC016A vldmia.32 r1!, {s13} + 1200 008c 3CED017A vldmdb.32 ip!, {s14} + 1201 0090 013A subs r2, r2, #1 + 1202 0092 E6EE877A vfma.f32 s15, s13, s14 + 1203 0096 F7D1 bne .L112 + 1204 0098 E6EC017A vstmia.32 r6!, {s15} + 1205 009c A642 cmp r6, r4 + 1206 009e 0EF1040E add lr, lr, #4 + 1207 00a2 ECD1 bne .L113 + 1208 .L111: + 1209 00a4 4044 add r0, r0, r8 + 1210 00a6 00F10408 add r8, r0, #4 + 1211 .L120: + 1212 00aa DFED287A vldr.32 s15, .L145 + 1213 00ae 3A46 mov r2, r7 + 1214 00b0 2B46 mov r3, r5 + 1215 .L119: + 1216 00b2 F0EC016A vldmia.32 r0!, {s13} + 1217 00b6 32ED017A vldmdb.32 r2!, {s14} + 1218 00ba 013B subs r3, r3, #1 + 1219 00bc E6EE877A vfma.f32 s15, s13, s14 + 1220 00c0 F7D1 bne .L119 + 1221 00c2 013D subs r5, r5, #1 + 1222 00c4 E4EC017A vstmia.32 r4!, {s15} + 1223 00c8 4046 mov r0, r8 + 1224 00ca 35D0 beq .L103 + 1225 00cc 08F10408 add r8, r8, #4 + 1226 00d0 EBE7 b .L120 + 1227 .L142: + 1228 00d2 BAF1000F cmp r10, #0 + 1229 00d6 35D0 beq .L143 + 1230 .L121: + ARM GAS /tmp/ccdao7B1.s page 22 + + + 1231 00d8 9FED1C6A vldr.32 s12, .L145 + 1232 00dc 4FEA8A08 lsl r8, r10, #2 + 1233 00e0 06EB8A04 add r4, r6, r10, lsl #2 + 1234 00e4 0146 mov r1, r0 + 1235 .L110: + 1236 00e6 0BB3 cbz r3, .L144 + 1237 00e8 91ED007A vldr.32 s14, [r1] + 1238 00ec D2ED006A vldr.32 s13, [r2] + 1239 00f0 F0EE467A vmov.f32 s15, s12 + 1240 00f4 E6EE877A vfma.f32 s15, s13, s14 + 1241 00f8 6DB1 cbz r5, .L117 + 1242 00fa 91ED017A vldr.32 s14, [r1, #4] + 1243 00fe 52ED016A vldr.32 s13, [r2, #-4] + 1244 0102 022B cmp r3, #2 + 1245 0104 E6EE877A vfma.f32 s15, s13, s14 + 1246 0108 05D0 beq .L117 + 1247 010a D1ED026A vldr.32 s13, [r1, #8] + 1248 010e 12ED027A vldr.32 s14, [r2, #-8] + 1249 0112 E6EE877A vfma.f32 s15, s13, s14 + 1250 .L117: + 1251 0116 0431 adds r1, r1, #4 + 1252 0118 E6EC017A vstmia.32 r6!, {s15} + 1253 011c A642 cmp r6, r4 + 1254 011e E2D1 bne .L110 + 1255 0120 4044 add r0, r0, r8 + 1256 0122 4DB1 cbz r5, .L103 + 1257 0124 00F10408 add r8, r0, #4 + 1258 0128 171D adds r7, r2, #4 + 1259 012a BEE7 b .L120 + 1260 .L144: + 1261 012c DFED077A vldr.32 s15, .L145 + 1262 0130 F1E7 b .L117 + 1263 .L105: + 1264 0132 BAF1000F cmp r10, #0 + 1265 0136 CFD1 bne .L121 + 1266 .L103: + 1267 0138 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1268 .L123: + 1269 013c 3446 mov r4, r6 + 1270 013e D046 mov r8, r10 + 1271 0140 171D adds r7, r2, #4 + 1272 0142 AFE7 b .L111 + 1273 .L143: + 1274 0144 3446 mov r4, r6 + 1275 0146 171D adds r7, r2, #4 + 1276 0148 AFE7 b .L120 + 1277 .L146: + 1278 014a 00BF .align 2 + 1279 .L145: + 1280 014c 00000000 .word 0 + 1282 .section .text.arm_conv_fast_opt_q15,"ax",%progbits + 1283 .align 1 + 1284 .p2align 2,,3 + 1285 .global arm_conv_fast_opt_q15 + 1286 .syntax unified + 1287 .thumb + 1288 .thumb_func + ARM GAS /tmp/ccdao7B1.s page 23 + + + 1289 .fpu fpv4-sp-d16 + 1291 arm_conv_fast_opt_q15: + 1292 @ args = 12, pretend = 0, frame = 0 + 1293 @ frame_needed = 0, uses_anonymous_args = 0 + 1294 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1295 0004 9942 cmp r1, r3 + 1296 0006 DDE90B95 ldrd r9, r5, [sp, #44] + 1297 000a 0A9E ldr r6, [sp, #40] + 1298 000c 8846 mov r8, r1 + 1299 000e 1F46 mov r7, r3 + 1300 0010 8246 mov r10, r0 + 1301 0012 04D2 bcs .L148 + 1302 0014 4346 mov r3, r8 + 1303 0016 9246 mov r10, r2 + 1304 0018 B846 mov r8, r7 + 1305 001a 0246 mov r2, r0 + 1306 001c 1F46 mov r7, r3 + 1307 .L148: + 1308 001e 07F10043 add r3, r7, #-2147483648 + 1309 0022 013B subs r3, r3, #1 + 1310 0024 5900 lsls r1, r3, #1 + 1311 0026 4FB1 cbz r7, .L149 + 1312 0028 01F1020C add ip, r1, #2 + 1313 002c AC44 add ip, ip, r5 + 1314 002e 3C46 mov r4, r7 + 1315 .L150: + 1316 0030 32F9023B ldrsh r3, [r2], #2 + 1317 0034 2CF8023D strh r3, [ip, #-2]! @ movhi + 1318 0038 013C subs r4, r4, #1 + 1319 003a F9D1 bne .L150 + 1320 .L149: + 1321 003c 07F1FF3B add fp, r7, #-1 + 1322 0040 09EB0104 add r4, r9, r1 + 1323 0044 5A46 mov r2, fp + 1324 0046 4946 mov r1, r9 + 1325 0048 0020 movs r0, #0 + 1326 004a FFF7FEFF bl arm_fill_q15 + 1327 004e 5046 mov r0, r10 + 1328 0050 2146 mov r1, r4 + 1329 0052 4246 mov r2, r8 + 1330 0054 FFF7FEFF bl arm_copy_q15 + 1331 0058 5A46 mov r2, fp + 1332 005a 04EB4801 add r1, r4, r8, lsl #1 + 1333 005e 0020 movs r0, #0 + 1334 0060 FFF7FEFF bl arm_fill_q15 + 1335 0064 08EB070E add lr, r8, r7 + 1336 0068 BEF1010E subs lr, lr, #1 + 1337 006c 2FD0 beq .L147 + 1338 006e 7C08 lsrs r4, r7, #1 + 1339 0070 4FEA8408 lsl r8, r4, #2 + 1340 0074 09F10200 add r0, r9, #2 + 1341 0078 07F00107 and r7, r7, #1 + 1342 007c A8F10208 sub r8, r8, #2 + 1343 0080 05EB8409 add r9, r5, r4, lsl #2 + 1344 0084 05F1020C add ip, r5, #2 + 1345 .L156: + 1346 0088 A0F1020A sub r10, r0, #2 + ARM GAS /tmp/ccdao7B1.s page 24 + + + 1347 008c ACB3 cbz r4, .L157 + 1348 .L172: + 1349 008e 0023 movs r3, #0 + 1350 0090 1A46 mov r2, r3 + 1351 .L153: + 1352 0092 3AF82310 ldrh r1, [r10, r3, lsl #2] + 1353 0096 35F823B0 ldrh fp, [r5, r3, lsl #2] + 1354 009a 11FB0B22 smlabb r2, r1, fp, r2 + 1355 009e 3CF82310 ldrh r1, [ip, r3, lsl #2] + 1356 00a2 30F823B0 ldrh fp, [r0, r3, lsl #2] + 1357 00a6 0133 adds r3, r3, #1 + 1358 00a8 9C42 cmp r4, r3 + 1359 00aa 1BFB0122 smlabb r2, fp, r1, r2 + 1360 00ae F0D1 bne .L153 + 1361 00b0 08EB000A add r10, r8, r0 + 1362 00b4 4946 mov r1, r9 + 1363 .L152: + 1364 00b6 67B9 cbnz r7, .L171 + 1365 00b8 BEF1010E subs lr, lr, #1 + 1366 00bc 4FEAE233 asr r3, r2, #15 + 1367 00c0 00F10200 add r0, r0, #2 + 1368 .syntax unified + 1369 @ 354 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15. + 1370 00c4 03F30F03 ssat r3, #16, r3 + 1371 @ 0 "" 2 + 1372 .thumb + 1373 .syntax unified + 1374 00c8 26F8023B strh r3, [r6], #2 @ movhi + 1375 00cc DCD1 bne .L156 + 1376 .L147: + 1377 00ce BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1378 .L171: + 1379 00d2 BAF80030 ldrh r3, [r10] + 1380 00d6 0988 ldrh r1, [r1] + 1381 00d8 BEF1010E subs lr, lr, #1 + 1382 00dc 13FB0122 smlabb r2, r3, r1, r2 + 1383 00e0 4FEAE232 asr r2, r2, #15 + 1384 00e4 00F10200 add r0, r0, #2 + 1385 .syntax unified + 1386 @ 354 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15. + 1387 00e8 02F30F02 ssat r2, #16, r2 + 1388 @ 0 "" 2 + 1389 .thumb + 1390 .syntax unified + 1391 00ec 26F8022B strh r2, [r6], #2 @ movhi + 1392 00f0 EDD0 beq .L147 + 1393 00f2 A0F1020A sub r10, r0, #2 + 1394 00f6 002C cmp r4, #0 + 1395 00f8 C9D1 bne .L172 + 1396 .L157: + 1397 00fa 2946 mov r1, r5 + 1398 00fc 2246 mov r2, r4 + 1399 00fe DAE7 b .L152 + 1401 .section .text.arm_conv_fast_q15,"ax",%progbits + 1402 .align 1 + 1403 .p2align 2,,3 + 1404 .global arm_conv_fast_q15 + ARM GAS /tmp/ccdao7B1.s page 25 + + + 1405 .syntax unified + 1406 .thumb + 1407 .thumb_func + 1408 .fpu fpv4-sp-d16 + 1410 arm_conv_fast_q15: + 1411 @ args = 4, pretend = 0, frame = 48 + 1412 @ frame_needed = 0, uses_anonymous_args = 0 + 1413 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1414 0004 8DB0 sub sp, sp, #52 + 1415 0006 9942 cmp r1, r3 + 1416 0008 169C ldr r4, [sp, #88] + 1417 000a 0593 str r3, [sp, #20] + 1418 000c 8346 mov fp, r0 + 1419 000e 05D2 bcs .L174 + 1420 0010 1D46 mov r5, r3 + 1421 0012 0B46 mov r3, r1 + 1422 0014 9346 mov fp, r2 + 1423 0016 2946 mov r1, r5 + 1424 0018 0246 mov r2, r0 + 1425 001a 0593 str r3, [sp, #20] + 1426 .L174: + 1427 001c 059E ldr r6, [sp, #20] + 1428 001e 0131 adds r1, r1, #1 + 1429 0020 8B1B subs r3, r1, r6 + 1430 0022 B6F10109 subs r9, r6, #1 + 1431 0026 0893 str r3, [sp, #32] + 1432 0028 00F08981 beq .L212 + 1433 002c BBF90030 ldrsh r3, [fp] + 1434 0030 B2F90000 ldrsh r0, [r2] + 1435 0034 0021 movs r1, #0 + 1436 .syntax unified + 1437 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1438 0036 23FB0013 smlad r3, r3, r0, r1 + 1439 @ 0 "" 2 + 1440 .thumb + 1441 .syntax unified + 1442 003a 2046 mov r0, r4 + 1443 003c DB13 asrs r3, r3, #15 + 1444 003e 20F8023B strh r3, [r0], #2 @ movhi + 1445 0042 022E cmp r6, #2 + 1446 0044 0190 str r0, [sp, #4] + 1447 0046 00F07B81 beq .L175 + 1448 004a BBF90030 ldrsh r3, [fp] + 1449 004e B2F90200 ldrsh r0, [r2, #2] + 1450 .syntax unified + 1451 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1452 0052 23FB0010 smlad r0, r3, r0, r1 + 1453 @ 0 "" 2 + 1454 .thumb + 1455 .syntax unified + 1456 0056 9446 mov ip, r2 + 1457 0058 BBF90230 ldrsh r3, [fp, #2] + 1458 005c 3CF9045B ldrsh r5, [ip], #4 + 1459 .syntax unified + 1460 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1461 0060 23FB0503 smlad r3, r3, r5, r0 + 1462 @ 0 "" 2 + ARM GAS /tmp/ccdao7B1.s page 26 + + + 1463 .thumb + 1464 .syntax unified + 1465 0064 DB13 asrs r3, r3, #15 + 1466 0066 6380 strh r3, [r4, #2] @ movhi + 1467 0068 032E cmp r6, #3 + 1468 006a 04F10403 add r3, r4, #4 + 1469 006e 0193 str r3, [sp, #4] + 1470 0070 00F06681 beq .L175 + 1471 0074 BBF90000 ldrsh r0, [fp] + 1472 0078 B2F90430 ldrsh r3, [r2, #4] + 1473 .syntax unified + 1474 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1475 007c 20FB0311 smlad r1, r0, r3, r1 + 1476 @ 0 "" 2 + 1477 .thumb + 1478 .syntax unified + 1479 0080 BBF90230 ldrsh r3, [fp, #2] + 1480 0084 B2F90200 ldrsh r0, [r2, #2] + 1481 .syntax unified + 1482 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1483 0088 23FB0010 smlad r0, r3, r0, r1 + 1484 @ 0 "" 2 + 1485 .thumb + 1486 .syntax unified + 1487 008c 1146 mov r1, r2 + 1488 008e BBF90430 ldrsh r3, [fp, #4] + 1489 0092 31F9065B ldrsh r5, [r1], #6 + 1490 .syntax unified + 1491 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1492 0096 23FB0503 smlad r3, r3, r5, r0 + 1493 @ 0 "" 2 + 1494 .thumb + 1495 .syntax unified + 1496 009a DB13 asrs r3, r3, #15 + 1497 009c A380 strh r3, [r4, #4] @ movhi + 1498 009e A01D adds r0, r4, #6 + 1499 00a0 341F subs r4, r6, #4 + 1500 00a2 0190 str r0, [sp, #4] + 1501 00a4 3346 mov r3, r6 + 1502 00a6 0094 str r4, [sp] + 1503 00a8 00F01F82 beq .L176 + 1504 00ac 02F10808 add r8, r2, #8 + 1505 00b0 CDF80890 str r9, [sp, #8] + 1506 00b4 A8EB0108 sub r8, r8, r1 + 1507 00b8 8646 mov lr, r0 + 1508 00ba 0426 movs r6, #4 + 1509 00bc 9946 mov r9, r3 + 1510 .L180: + 1511 00be B708 lsrs r7, r6, #2 + 1512 00c0 6046 mov r0, ip + 1513 00c2 5946 mov r1, fp + 1514 00c4 3D46 mov r5, r7 + 1515 00c6 0023 movs r3, #0 + 1516 .L177: + 1517 00c8 0C68 ldr r4, [r1] @ unaligned + 1518 00ca D0F800A0 ldr r10, [r0] @ unaligned + 1519 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 27 + + + 1520 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1521 00ce 24FB1A33 smladx r3, r4, r10, r3 + 1522 @ 0 "" 2 + 1523 .thumb + 1524 .syntax unified + 1525 00d2 4C68 ldr r4, [r1, #4] @ unaligned + 1526 00d4 50F804AC ldr r10, [r0, #-4] @ unaligned + 1527 00d8 0831 adds r1, r1, #8 + 1528 00da 0838 subs r0, r0, #8 + 1529 .syntax unified + 1530 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1531 00dc 24FB1A33 smladx r3, r4, r10, r3 + 1532 @ 0 "" 2 + 1533 .thumb + 1534 .syntax unified + 1535 00e0 013D subs r5, r5, #1 + 1536 00e2 F1D1 bne .L177 + 1537 00e4 C7EB4771 rsb r1, r7, r7, lsl #29 + 1538 00e8 16F00300 ands r0, r6, #3 + 1539 00ec 0CEBC101 add r1, ip, r1, lsl #3 + 1540 00f0 0BEBC704 add r4, fp, r7, lsl #3 + 1541 00f4 15D0 beq .L178 + 1542 00f6 3BF93750 ldrsh r5, [fp, r7, lsl #3] + 1543 00fa B1F90270 ldrsh r7, [r1, #2] + 1544 .syntax unified + 1545 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1546 00fe 25FB0733 smlad r3, r5, r7, r3 + 1547 @ 0 "" 2 + 1548 .thumb + 1549 .syntax unified + 1550 0102 0138 subs r0, r0, #1 + 1551 0104 0DD0 beq .L178 + 1552 0106 B4F90250 ldrsh r5, [r4, #2] + 1553 010a B1F90070 ldrsh r7, [r1] + 1554 .syntax unified + 1555 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1556 010e 25FB0733 smlad r3, r5, r7, r3 + 1557 @ 0 "" 2 + 1558 .thumb + 1559 .syntax unified + 1560 0112 0128 cmp r0, #1 + 1561 0114 05D0 beq .L178 + 1562 0116 B4F90400 ldrsh r0, [r4, #4] + 1563 011a 31F9021C ldrsh r1, [r1, #-2] + 1564 .syntax unified + 1565 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1566 011e 20FB0133 smlad r3, r0, r1, r3 + 1567 @ 0 "" 2 + 1568 .thumb + 1569 .syntax unified + 1570 .L178: + 1571 0122 0136 adds r6, r6, #1 + 1572 0124 DB13 asrs r3, r3, #15 + 1573 0126 B145 cmp r9, r6 + 1574 0128 2EF8023B strh r3, [lr], #2 @ movhi + 1575 012c C444 add ip, ip, r8 + 1576 012e C6D1 bne .L180 + ARM GAS /tmp/ccdao7B1.s page 28 + + + 1577 0130 DDE90139 ldrd r3, r9, [sp, #4] + 1578 0134 0099 ldr r1, [sp] + 1579 0136 03EB4103 add r3, r3, r1, lsl #1 + 1580 013a 0599 ldr r1, [sp, #20] + 1581 013c 0193 str r3, [sp, #4] + 1582 013e 01F10043 add r3, r1, #-2147483648 + 1583 0142 013B subs r3, r3, #1 + 1584 0144 02EB4303 add r3, r2, r3, lsl #1 + 1585 0148 0329 cmp r1, #3 + 1586 014a 0793 str r3, [sp, #28] + 1587 014c 40F2FF80 bls .L211 + 1588 .L181: + 1589 0150 089B ldr r3, [sp, #32] + 1590 0152 9908 lsrs r1, r3, #2 + 1591 0154 0991 str r1, [sp, #36] + 1592 0156 00F0B781 beq .L184 + 1593 015a 0598 ldr r0, [sp, #20] + 1594 015c 079B ldr r3, [sp, #28] + 1595 015e CDF82890 str r9, [sp, #40] + 1596 0162 8208 lsrs r2, r0, #2 + 1597 0164 9C1E subs r4, r3, #2 + 1598 0166 C2EB4273 rsb r3, r2, r2, lsl #29 + 1599 016a 04EBC303 add r3, r4, r3, lsl #3 + 1600 016e 0833 adds r3, r3, #8 + 1601 0170 0393 str r3, [sp, #12] + 1602 0172 D300 lsls r3, r2, #3 + 1603 0174 0433 adds r3, r3, #4 + 1604 0176 0493 str r3, [sp, #16] + 1605 0178 00F00303 and r3, r0, #3 + 1606 017c 0093 str r3, [sp] + 1607 017e 019B ldr r3, [sp, #4] + 1608 0180 CDF82CB0 str fp, [sp, #44] + 1609 0184 DA46 mov r10, fp + 1610 0186 0692 str r2, [sp, #24] + 1611 0188 0294 str r4, [sp, #8] + 1612 018a 9946 mov r9, r3 + 1613 018c 8B46 mov fp, r1 + 1614 .L190: + 1615 018e 0023 movs r3, #0 + 1616 0190 DAF80020 ldr r2, [r10] @ unaligned + 1617 0194 DAF80260 ldr r6, [r10, #2] @ unaligned + 1618 0198 DDF808E0 ldr lr, [sp, #8] + 1619 019c DDF81880 ldr r8, [sp, #24] + 1620 01a0 0AF10400 add r0, r10, #4 + 1621 01a4 9C46 mov ip, r3 + 1622 01a6 1D46 mov r5, r3 + 1623 01a8 1C46 mov r4, r3 + 1624 .L185: + 1625 01aa DEF80010 ldr r1, [lr] @ unaligned + 1626 .syntax unified + 1627 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1628 01ae 22FB1142 smladx r2, r2, r1, r4 + 1629 @ 0 "" 2 + 1630 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1631 01b2 26FB1155 smladx r5, r6, r1, r5 + 1632 @ 0 "" 2 + 1633 .thumb + ARM GAS /tmp/ccdao7B1.s page 29 + + + 1634 .syntax unified + 1635 01b6 0468 ldr r4, [r0] @ unaligned + 1636 01b8 D0F80270 ldr r7, [r0, #2] @ unaligned + 1637 .syntax unified + 1638 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1639 01bc 24FB11CC smladx ip, r4, r1, ip + 1640 @ 0 "" 2 + 1641 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1642 01c0 27FB1133 smladx r3, r7, r1, r3 + 1643 @ 0 "" 2 + 1644 .thumb + 1645 .syntax unified + 1646 01c4 5EF8041C ldr r1, [lr, #-4] @ unaligned + 1647 01c8 AEF1080E sub lr, lr, #8 + 1648 .syntax unified + 1649 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1650 01cc 24FB1124 smladx r4, r4, r1, r2 + 1651 @ 0 "" 2 + 1652 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1653 01d0 27FB1155 smladx r5, r7, r1, r5 + 1654 @ 0 "" 2 + 1655 .thumb + 1656 .syntax unified + 1657 01d4 4268 ldr r2, [r0, #4] @ unaligned + 1658 01d6 D0F80660 ldr r6, [r0, #6] @ unaligned + 1659 01da 0830 adds r0, r0, #8 + 1660 .syntax unified + 1661 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1662 01dc 22FB11CC smladx ip, r2, r1, ip + 1663 @ 0 "" 2 + 1664 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1665 01e0 26FB1133 smladx r3, r6, r1, r3 + 1666 @ 0 "" 2 + 1667 .thumb + 1668 .syntax unified + 1669 01e4 B8F10108 subs r8, r8, #1 + 1670 01e8 DFD1 bne .L185 + 1671 01ea 0098 ldr r0, [sp] + 1672 01ec 0499 ldr r1, [sp, #16] + 1673 01ee 0128 cmp r0, #1 + 1674 01f0 5144 add r1, r10, r1 + 1675 01f2 00F03D81 beq .L270 + 1676 01f6 0228 cmp r0, #2 + 1677 01f8 00F02B81 beq .L188 + 1678 01fc 0328 cmp r0, #3 + 1679 01fe 1AD1 bne .L187 + 1680 0200 0398 ldr r0, [sp, #12] + 1681 0202 D1F80270 ldr r7, [r1, #2] @ unaligned + 1682 0206 50F8080C ldr r0, [r0, #-8] @ unaligned + 1683 .syntax unified + 1684 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1685 020a 22FB1044 smladx r4, r2, r0, r4 + 1686 @ 0 "" 2 + 1687 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1688 020e 26FB1055 smladx r5, r6, r0, r5 + 1689 @ 0 "" 2 + 1690 .thumb + ARM GAS /tmp/ccdao7B1.s page 30 + + + 1691 .syntax unified + 1692 0212 0A68 ldr r2, [r1] @ unaligned + 1693 .syntax unified + 1694 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1695 0214 22FB10CC smladx ip, r2, r0, ip + 1696 @ 0 "" 2 + 1697 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1698 0218 27FB1033 smladx r3, r7, r0, r3 + 1699 @ 0 "" 2 + 1700 .thumb + 1701 .syntax unified + 1702 021c 0398 ldr r0, [sp, #12] + 1703 021e 30F90A0C ldrsh r0, [r0, #-10] + 1704 0222 80B2 uxth r0, r0 + 1705 .syntax unified + 1706 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1707 0224 26FB1044 smladx r4, r6, r0, r4 + 1708 @ 0 "" 2 + 1709 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1710 0228 27FB0055 smlad r5, r7, r0, r5 + 1711 @ 0 "" 2 + 1712 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1713 022c 27FB10CC smladx ip, r7, r0, ip + 1714 @ 0 "" 2 + 1715 .thumb + 1716 .syntax unified + 1717 0230 4A68 ldr r2, [r1, #4] @ unaligned + 1718 .syntax unified + 1719 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1720 0232 22FB1033 smladx r3, r2, r0, r3 + 1721 @ 0 "" 2 + 1722 .thumb + 1723 .syntax unified + 1724 .L187: + 1725 0236 C4F3CF34 ubfx r4, r4, #15, #16 + 1726 023a ED13 asrs r5, r5, #15 + 1727 023c CCF3CF3C ubfx ip, ip, #15, #16 + 1728 0240 DB13 asrs r3, r3, #15 + 1729 0242 44EA0544 orr r4, r4, r5, lsl #16 + 1730 0246 4CEA0343 orr r3, ip, r3, lsl #16 + 1731 024a BBF1010B subs fp, fp, #1 + 1732 024e C9F80040 str r4, [r9] @ unaligned + 1733 0252 C9F80430 str r3, [r9, #4] @ unaligned + 1734 0256 0AF1080A add r10, r10, #8 + 1735 025a 09F10809 add r9, r9, #8 + 1736 025e 96D1 bne .L190 + 1737 0260 099B ldr r3, [sp, #36] + 1738 0262 019A ldr r2, [sp, #4] + 1739 0264 DDE90A9B ldrd r9, fp, [sp, #40] + 1740 0268 02EBC302 add r2, r2, r3, lsl #3 + 1741 026c 0192 str r2, [sp, #4] + 1742 026e 1A46 mov r2, r3 + 1743 0270 0BEBC205 add r5, fp, r2, lsl #3 + 1744 0274 9B00 lsls r3, r3, #2 + 1745 .L191: + 1746 0276 089A ldr r2, [sp, #32] + 1747 0278 12F00300 ands r0, r2, #3 + ARM GAS /tmp/ccdao7B1.s page 31 + + + 1748 027c 00F03081 beq .L213 + 1749 0280 059A ldr r2, [sp, #20] + 1750 0282 CDF80CB0 str fp, [sp, #12] + 1751 0286 4FEA920A lsr r10, r2, #2 + 1752 028a 0133 adds r3, r3, #1 + 1753 028c 02F00307 and r7, r2, #3 + 1754 0290 079A ldr r2, [sp, #28] + 1755 0292 0BEB430E add lr, fp, r3, lsl #1 + 1756 0296 CAEB4A76 rsb r6, r10, r10, lsl #29 + 1757 029a 019B ldr r3, [sp, #4] + 1758 029c CDF80490 str r9, [sp, #4] + 1759 02a0 02EBC606 add r6, r2, r6, lsl #3 + 1760 02a4 083A subs r2, r2, #8 + 1761 02a6 03EB4000 add r0, r3, r0, lsl #1 + 1762 02aa 4FEACA08 lsl r8, r10, #3 + 1763 02ae 9C46 mov ip, r3 + 1764 02b0 9146 mov r9, r2 + 1765 .L196: + 1766 02b2 05F10801 add r1, r5, #8 + 1767 02b6 4A46 mov r2, r9 + 1768 02b8 5446 mov r4, r10 + 1769 02ba 0023 movs r3, #0 + 1770 02bc 0090 str r0, [sp] + 1771 .L193: + 1772 02be 31F808BC ldrh fp, [r1, #-8] + 1773 02c2 1089 ldrh r0, [r2, #8] + 1774 02c4 1BFB0033 smlabb r3, fp, r0, r3 + 1775 02c8 31F806BC ldrh fp, [r1, #-6] + 1776 02cc D088 ldrh r0, [r2, #6] + 1777 02ce 1BFB0033 smlabb r3, fp, r0, r3 + 1778 02d2 31F804BC ldrh fp, [r1, #-4] + 1779 02d6 9088 ldrh r0, [r2, #4] + 1780 02d8 1BFB0033 smlabb r3, fp, r0, r3 + 1781 02dc 31F802BC ldrh fp, [r1, #-2] + 1782 02e0 5088 ldrh r0, [r2, #2] + 1783 02e2 013C subs r4, r4, #1 + 1784 02e4 01F10801 add r1, r1, #8 + 1785 02e8 1BFB0033 smlabb r3, fp, r0, r3 + 1786 02ec A2F10802 sub r2, r2, #8 + 1787 02f0 E5D1 bne .L193 + 1788 02f2 0098 ldr r0, [sp] + 1789 02f4 05EB0802 add r2, r5, r8 + 1790 02f8 97B1 cbz r7, .L194 + 1791 02fa 35F80810 ldrh r1, [r5, r8] + 1792 02fe 3488 ldrh r4, [r6] + 1793 0300 012F cmp r7, #1 + 1794 0302 14FB0133 smlabb r3, r4, r1, r3 + 1795 0306 0BD0 beq .L194 + 1796 0308 36F8024C ldrh r4, [r6, #-2] + 1797 030c 5188 ldrh r1, [r2, #2] + 1798 030e 022F cmp r7, #2 + 1799 0310 14FB0133 smlabb r3, r4, r1, r3 + 1800 0314 04D0 beq .L194 + 1801 0316 9188 ldrh r1, [r2, #4] + 1802 0318 36F8042C ldrh r2, [r6, #-4] + 1803 031c 11FB0233 smlabb r3, r1, r2, r3 + 1804 .L194: + ARM GAS /tmp/ccdao7B1.s page 32 + + + 1805 0320 DB13 asrs r3, r3, #15 + 1806 0322 2CF8023B strh r3, [ip], #2 @ movhi + 1807 0326 8445 cmp ip, r0 + 1808 0328 7546 mov r5, lr + 1809 032a 0EF1020E add lr, lr, #2 + 1810 032e C0D1 bne .L196 + 1811 0330 089B ldr r3, [sp, #32] + 1812 0332 DDF80490 ldr r9, [sp, #4] + 1813 0336 DDF80CB0 ldr fp, [sp, #12] + 1814 033a 5C00 lsls r4, r3, #1 + 1815 033c 36E0 b .L192 + 1816 .L212: + 1817 033e 0194 str r4, [sp, #4] + 1818 .L175: + 1819 0340 059B ldr r3, [sp, #20] + 1820 0342 03F10043 add r3, r3, #-2147483648 + 1821 0346 013B subs r3, r3, #1 + 1822 0348 02EB4303 add r3, r2, r3, lsl #1 + 1823 034c 0793 str r3, [sp, #28] + 1824 .L211: + 1825 034e 089B ldr r3, [sp, #32] + 1826 0350 002B cmp r3, #0 + 1827 0352 00F0BF80 beq .L271 + 1828 0356 0199 ldr r1, [sp, #4] + 1829 0358 079E ldr r6, [sp, #28] + 1830 035a 059D ldr r5, [sp, #20] + 1831 035c 5C00 lsls r4, r3, #1 + 1832 035e A646 mov lr, r4 + 1833 0360 01EB4300 add r0, r1, r3, lsl #1 + 1834 0364 5A46 mov r2, fp + 1835 0366 4C46 mov r4, r9 + 1836 .L198: + 1837 0368 002D cmp r5, #0 + 1838 036a 00F09180 beq .L272 + 1839 036e 1788 ldrh r7, [r2] + 1840 0370 3388 ldrh r3, [r6] + 1841 0372 13FB07F3 smulbb r3, r3, r7 + 1842 0376 64B1 cbz r4, .L197 + 1843 0378 5788 ldrh r7, [r2, #2] + 1844 037a 36F802CC ldrh ip, [r6, #-2] + 1845 037e 022D cmp r5, #2 + 1846 0380 1CFB0733 smlabb r3, ip, r7, r3 + 1847 0384 05D0 beq .L197 + 1848 0386 B2F804C0 ldrh ip, [r2, #4] + 1849 038a 36F8047C ldrh r7, [r6, #-4] + 1850 038e 1CFB0733 smlabb r3, ip, r7, r3 + 1851 .L197: + 1852 0392 43F3CF33 sbfx r3, r3, #15, #16 + 1853 .L200: + 1854 0396 21F8023B strh r3, [r1], #2 @ movhi + 1855 039a 8142 cmp r1, r0 + 1856 039c 02F10202 add r2, r2, #2 + 1857 03a0 E2D1 bne .L198 + 1858 03a2 079B ldr r3, [sp, #28] + 1859 03a4 023B subs r3, r3, #2 + 1860 03a6 A146 mov r9, r4 + 1861 03a8 0293 str r3, [sp, #8] + ARM GAS /tmp/ccdao7B1.s page 33 + + + 1862 03aa 7446 mov r4, lr + 1863 .L192: + 1864 03ac 5FEA990C lsrs ip, r9, #2 + 1865 03b0 5C44 add r4, r4, fp + 1866 03b2 00F09880 beq .L214 + 1867 03b6 A9EB0C05 sub r5, r9, ip + 1868 03ba 8046 mov r8, r0 + 1869 03bc 4846 mov r0, r9 + 1870 03be DDF80890 ldr r9, [sp, #8] + 1871 03c2 BCF1000F cmp ip, #0 + 1872 03c6 40D0 beq .L215 + 1873 .L274: + 1874 03c8 4E46 mov r6, r9 + 1875 03ca 2146 mov r1, r4 + 1876 03cc 6746 mov r7, ip + 1877 03ce 0023 movs r3, #0 + 1878 .L203: + 1879 03d0 0A68 ldr r2, [r1] @ unaligned + 1880 03d2 D6F800E0 ldr lr, [r6] @ unaligned + 1881 .syntax unified + 1882 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1883 03d6 22FB1E33 smladx r3, r2, lr, r3 + 1884 @ 0 "" 2 + 1885 .thumb + 1886 .syntax unified + 1887 03da 4A68 ldr r2, [r1, #4] @ unaligned + 1888 03dc 56F804EC ldr lr, [r6, #-4] @ unaligned + 1889 03e0 0831 adds r1, r1, #8 + 1890 03e2 083E subs r6, r6, #8 + 1891 .syntax unified + 1892 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1893 03e4 22FB1E33 smladx r3, r2, lr, r3 + 1894 @ 0 "" 2 + 1895 .thumb + 1896 .syntax unified + 1897 03e8 013F subs r7, r7, #1 + 1898 03ea F1D1 bne .L203 + 1899 03ec CCEB4C72 rsb r2, ip, ip, lsl #29 + 1900 03f0 09EBC202 add r2, r9, r2, lsl #3 + 1901 03f4 04EBCC0C add ip, r4, ip, lsl #3 + 1902 03f8 0232 adds r2, r2, #2 + 1903 .L202: + 1904 03fa 10F00301 ands r1, r0, #3 + 1905 03fe 15D0 beq .L204 + 1906 0400 BCF90060 ldrsh r6, [ip] + 1907 0404 B2F90070 ldrsh r7, [r2] + 1908 .syntax unified + 1909 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1910 0408 26FB0733 smlad r3, r6, r7, r3 + 1911 @ 0 "" 2 + 1912 .thumb + 1913 .syntax unified + 1914 040c 0139 subs r1, r1, #1 + 1915 040e 0DD0 beq .L204 + 1916 0410 BCF90260 ldrsh r6, [ip, #2] + 1917 0414 32F9027C ldrsh r7, [r2, #-2] + 1918 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 34 + + + 1919 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1920 0418 26FB0733 smlad r3, r6, r7, r3 + 1921 @ 0 "" 2 + 1922 .thumb + 1923 .syntax unified + 1924 041c 0129 cmp r1, #1 + 1925 041e 05D0 beq .L204 + 1926 0420 BCF90410 ldrsh r1, [ip, #4] + 1927 0424 32F9042C ldrsh r2, [r2, #-4] + 1928 .syntax unified + 1929 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1930 0428 21FB0233 smlad r3, r1, r2, r3 + 1931 @ 0 "" 2 + 1932 .thumb + 1933 .syntax unified + 1934 .L204: + 1935 042c 0138 subs r0, r0, #1 + 1936 042e DB13 asrs r3, r3, #15 + 1937 0430 8542 cmp r5, r0 + 1938 0432 28F8023B strh r3, [r8], #2 @ movhi + 1939 0436 04F10204 add r4, r4, #2 + 1940 043a 2BD0 beq .L273 + 1941 043c 0028 cmp r0, #0 + 1942 043e 40D0 beq .L173 + 1943 0440 4FEA900C lsr ip, r0, #2 + 1944 0444 BCF1000F cmp ip, #0 + 1945 0448 BED1 bne .L274 + 1946 .L215: + 1947 044a 6346 mov r3, ip + 1948 044c 079A ldr r2, [sp, #28] + 1949 044e A446 mov ip, r4 + 1950 0450 D3E7 b .L202 + 1951 .L188: + 1952 0452 0398 ldr r0, [sp, #12] + 1953 0454 50F8080C ldr r0, [r0, #-8] @ unaligned + 1954 .syntax unified + 1955 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1956 0458 22FB1044 smladx r4, r2, r0, r4 + 1957 @ 0 "" 2 + 1958 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1959 045c 26FB1055 smladx r5, r6, r0, r5 + 1960 @ 0 "" 2 + 1961 .thumb + 1962 .syntax unified + 1963 0460 0A68 ldr r2, [r1] @ unaligned + 1964 .syntax unified + 1965 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1966 0462 22FB10CC smladx ip, r2, r0, ip + 1967 @ 0 "" 2 + 1968 .thumb + 1969 .syntax unified + 1970 0466 D1F80220 ldr r2, [r1, #2] @ unaligned + 1971 .syntax unified + 1972 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1973 046a 22FB1033 smladx r3, r2, r0, r3 + 1974 @ 0 "" 2 + 1975 .thumb + ARM GAS /tmp/ccdao7B1.s page 35 + + + 1976 .syntax unified + 1977 046e E2E6 b .L187 + 1978 .L270: + 1979 0470 0399 ldr r1, [sp, #12] + 1980 0472 31F9061C ldrsh r1, [r1, #-6] + 1981 0476 89B2 uxth r1, r1 + 1982 .syntax unified + 1983 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1984 0478 22FB0144 smlad r4, r2, r1, r4 + 1985 @ 0 "" 2 + 1986 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1987 047c 26FB0155 smlad r5, r6, r1, r5 + 1988 @ 0 "" 2 + 1989 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1990 0480 26FB11CC smladx ip, r6, r1, ip + 1991 @ 0 "" 2 + 1992 .thumb + 1993 .syntax unified + 1994 0484 049A ldr r2, [sp, #16] + 1995 0486 5AF80220 ldr r2, [r10, r2] @ unaligned + 1996 .syntax unified + 1997 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1998 048a 22FB1133 smladx r3, r2, r1, r3 + 1999 @ 0 "" 2 + 2000 .thumb + 2001 .syntax unified + 2002 048e D2E6 b .L187 + 2003 .L272: + 2004 0490 2B46 mov r3, r5 + 2005 0492 80E7 b .L200 + 2006 .L273: + 2007 0494 4046 mov r0, r8 + 2008 .L201: + 2009 0496 A5B1 cbz r5, .L173 + 2010 0498 DDF81CE0 ldr lr, [sp, #28] + 2011 .L207: + 2012 049c 7646 mov r6, lr + 2013 049e 2146 mov r1, r4 + 2014 04a0 2B46 mov r3, r5 + 2015 04a2 0022 movs r2, #0 + 2016 .L210: + 2017 04a4 31F9027B ldrsh r7, [r1], #2 + 2018 04a8 36F902C9 ldrsh ip, [r6], #-2 + 2019 .syntax unified + 2020 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2021 04ac 27FB0C22 smlad r2, r7, ip, r2 + 2022 @ 0 "" 2 + 2023 .thumb + 2024 .syntax unified + 2025 04b0 013B subs r3, r3, #1 + 2026 04b2 F7D1 bne .L210 + 2027 04b4 D213 asrs r2, r2, #15 + 2028 04b6 013D subs r5, r5, #1 + 2029 04b8 20F8022B strh r2, [r0], #2 @ movhi + 2030 04bc 04F10204 add r4, r4, #2 + 2031 04c0 ECD1 bne .L207 + 2032 .L173: + ARM GAS /tmp/ccdao7B1.s page 36 + + + 2033 04c2 0DB0 add sp, sp, #52 + 2034 @ sp needed + 2035 04c4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2036 .L184: + 2037 04c8 079A ldr r2, [sp, #28] + 2038 04ca 023A subs r2, r2, #2 + 2039 04cc 0B46 mov r3, r1 + 2040 04ce 0292 str r2, [sp, #8] + 2041 04d0 5D46 mov r5, fp + 2042 04d2 D0E6 b .L191 + 2043 .L271: + 2044 04d4 1C46 mov r4, r3 + 2045 04d6 079B ldr r3, [sp, #28] + 2046 04d8 0198 ldr r0, [sp, #4] + 2047 04da 023B subs r3, r3, #2 + 2048 04dc 0293 str r3, [sp, #8] + 2049 04de 65E7 b .L192 + 2050 .L213: + 2051 04e0 0198 ldr r0, [sp, #4] + 2052 04e2 5400 lsls r4, r2, #1 + 2053 04e4 62E7 b .L192 + 2054 .L214: + 2055 04e6 4D46 mov r5, r9 + 2056 04e8 D5E7 b .L201 + 2057 .L176: + 2058 04ea 059B ldr r3, [sp, #20] + 2059 04ec 03F10043 add r3, r3, #-2147483648 + 2060 04f0 013B subs r3, r3, #1 + 2061 04f2 02EB4303 add r3, r2, r3, lsl #1 + 2062 04f6 0793 str r3, [sp, #28] + 2063 04f8 2AE6 b .L181 + 2065 04fa 00BF .section .text.arm_conv_fast_q31,"ax",%progbits + 2066 .align 1 + 2067 .p2align 2,,3 + 2068 .global arm_conv_fast_q31 + 2069 .syntax unified + 2070 .thumb + 2071 .thumb_func + 2072 .fpu fpv4-sp-d16 + 2074 arm_conv_fast_q31: + 2075 @ args = 4, pretend = 0, frame = 72 + 2076 @ frame_needed = 0, uses_anonymous_args = 0 + 2077 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2078 0004 93B0 sub sp, sp, #76 + 2079 0006 9942 cmp r1, r3 + 2080 0008 DDF870B0 ldr fp, [sp, #112] + 2081 000c 0890 str r0, [sp, #32] + 2082 000e 9E46 mov lr, r3 + 2083 0010 0A92 str r2, [sp, #40] + 2084 0012 04D2 bcs .L276 + 2085 0014 0B46 mov r3, r1 + 2086 0016 0892 str r2, [sp, #32] + 2087 0018 7146 mov r1, lr + 2088 001a 0A90 str r0, [sp, #40] + 2089 001c 9E46 mov lr, r3 + 2090 .L276: + 2091 001e 0131 adds r1, r1, #1 + ARM GAS /tmp/ccdao7B1.s page 37 + + + 2092 0020 A1EB0E03 sub r3, r1, lr + 2093 0024 0E93 str r3, [sp, #56] + 2094 0026 BEF10103 subs r3, lr, #1 + 2095 002a 0D93 str r3, [sp, #52] + 2096 002c 00F05382 beq .L277 + 2097 0030 0A98 ldr r0, [sp, #40] + 2098 0032 DDF820A0 ldr r10, [sp, #32] + 2099 0036 CDF804E0 str lr, [sp, #4] + 2100 003a 4FF00009 mov r9, #0 + 2101 003e 071D adds r7, r0, #4 + 2102 0040 D846 mov r8, fp + 2103 0042 0124 movs r4, #1 + 2104 0044 4B46 mov r3, r9 + 2105 0046 D646 mov lr, r10 + 2106 0048 CDF870B0 str fp, [sp, #112] + 2107 .L278: + 2108 004c 14F00305 ands r5, r4, #3 + 2109 0050 17D0 beq .L281 + 2110 0052 0168 ldr r1, [r0] + 2111 0054 DEF80020 ldr r2, [lr] + 2112 0058 1E46 mov r6, r3 + 2113 005a 013D subs r5, r5, #1 + 2114 005c C1FB0269 smlal r6, r9, r1, r2 + 2115 0060 0FD0 beq .L281 + 2116 0062 50F8041C ldr r1, [r0, #-4] + 2117 0066 DEF80420 ldr r2, [lr, #4] + 2118 006a 1E46 mov r6, r3 + 2119 006c 012D cmp r5, #1 + 2120 006e C1FB0269 smlal r6, r9, r1, r2 + 2121 0072 06D0 beq .L281 + 2122 0074 50F8082C ldr r2, [r0, #-8] + 2123 0078 DEF80810 ldr r1, [lr, #8] + 2124 007c 1846 mov r0, r3 + 2125 007e C1FB0209 smlal r0, r9, r1, r2 + 2126 .L281: + 2127 0082 4FEA4902 lsl r2, r9, #1 + 2128 0086 48F8042B str r2, [r8], #4 + 2129 008a 019A ldr r2, [sp, #4] + 2130 008c 661C adds r6, r4, #1 + 2131 008e B242 cmp r2, r6 + 2132 0090 3846 mov r0, r7 + 2133 0092 32D0 beq .L366 + 2134 0094 5FEA960C lsrs ip, r6, #2 + 2135 0098 00F02482 beq .L310 + 2136 009c 0AF11002 add r2, r10, #16 + 2137 00a0 A7F11001 sub r1, r7, #16 + 2138 00a4 4FEA0C1E lsl lr, ip, #4 + 2139 00a8 02EB0C15 add r5, r2, ip, lsl #4 + 2140 00ac 4FF00009 mov r9, #0 + 2141 .L280: + 2142 00b0 52F8104C ldr r4, [r2, #-16] + 2143 00b4 0869 ldr r0, [r1, #16] + 2144 00b6 9B46 mov fp, r3 + 2145 00b8 C4FB00B9 smlal fp, r9, r4, r0 + 2146 00bc 52F80C4C ldr r4, [r2, #-12] + 2147 00c0 C868 ldr r0, [r1, #12] + 2148 00c2 9B46 mov fp, r3 + ARM GAS /tmp/ccdao7B1.s page 38 + + + 2149 00c4 C4FB00B9 smlal fp, r9, r4, r0 + 2150 00c8 52F8084C ldr r4, [r2, #-8] + 2151 00cc 8868 ldr r0, [r1, #8] + 2152 00ce 9B46 mov fp, r3 + 2153 00d0 C4FB00B9 smlal fp, r9, r4, r0 + 2154 00d4 1032 adds r2, r2, #16 + 2155 00d6 52F8144C ldr r4, [r2, #-20] + 2156 00da 4868 ldr r0, [r1, #4] + 2157 00dc 9B46 mov fp, r3 + 2158 00de 9542 cmp r5, r2 + 2159 00e0 C4FB00B9 smlal fp, r9, r4, r0 + 2160 00e4 A1F11001 sub r1, r1, #16 + 2161 00e8 E2D1 bne .L280 + 2162 00ea CCEB0C7C rsb ip, ip, ip, lsl #28 + 2163 00ee D644 add lr, lr, r10 + 2164 00f0 07EB0C10 add r0, r7, ip, lsl #4 + 2165 .L279: + 2166 00f4 0437 adds r7, r7, #4 + 2167 00f6 3446 mov r4, r6 + 2168 00f8 A8E7 b .L278 + 2169 .L366: + 2170 00fa 0A9B ldr r3, [sp, #40] + 2171 00fc DDF870B0 ldr fp, [sp, #112] + 2172 0100 0F96 str r6, [sp, #60] + 2173 0102 03EB8403 add r3, r3, r4, lsl #2 + 2174 0106 0A93 str r3, [sp, #40] + 2175 0108 0D9B ldr r3, [sp, #52] + 2176 010a 032A cmp r2, #3 + 2177 010c 9646 mov lr, r2 + 2178 010e 0BEB830B add fp, fp, r3, lsl #2 + 2179 0112 40F2DA80 bls .L367 + 2180 0116 0E9B ldr r3, [sp, #56] + 2181 0118 9A08 lsrs r2, r3, #2 + 2182 011a 1092 str r2, [sp, #64] + 2183 011c 00F0E081 beq .L311 + 2184 0120 B108 lsrs r1, r6, #2 + 2185 0122 0A9C ldr r4, [sp, #40] + 2186 0124 0C91 str r1, [sp, #48] + 2187 0126 C1EB0173 rsb r3, r1, r1, lsl #28 + 2188 012a 04EB0313 add r3, r4, r3, lsl #4 + 2189 012e 0793 str r3, [sp, #28] + 2190 0130 06F00303 and r3, r6, #3 + 2191 0134 0593 str r3, [sp, #20] + 2192 0136 0BF11003 add r3, fp, #16 + 2193 013a 0693 str r3, [sp, #24] + 2194 013c 0BEB0213 add r3, fp, r2, lsl #4 + 2195 0140 0B93 str r3, [sp, #44] + 2196 0142 089B ldr r3, [sp, #32] + 2197 0144 03EB0111 add r1, r3, r1, lsl #4 + 2198 0148 0C33 adds r3, r3, #12 + 2199 014a 0493 str r3, [sp, #16] + 2200 014c 1301 lsls r3, r2, #4 + 2201 014e 1193 str r3, [sp, #68] + 2202 0150 A4F11003 sub r3, r4, #16 + 2203 0154 0391 str r1, [sp, #12] + 2204 0156 0993 str r3, [sp, #36] + 2205 0158 4FF0000A mov r10, #0 + ARM GAS /tmp/ccdao7B1.s page 39 + + + 2206 .L292: + 2207 015c 049B ldr r3, [sp, #16] + 2208 015e DDF824C0 ldr ip, [sp, #36] + 2209 0162 53E90389 ldrd r8, r9, [r3, #-12] + 2210 0166 53E901B0 ldrd fp, r0, [r3, #-4] + 2211 016a 0022 movs r2, #0 + 2212 016c 9E46 mov lr, r3 + 2213 016e 0C9B ldr r3, [sp, #48] + 2214 0170 0193 str r3, [sp, #4] + 2215 0172 4446 mov r4, r8 + 2216 0174 4946 mov r1, r9 + 2217 0176 1546 mov r5, r2 + 2218 0178 1646 mov r6, r2 + 2219 017a 1746 mov r7, r2 + 2220 017c 9046 mov r8, r2 + 2221 017e 8146 mov r9, r0 + 2222 0180 5B46 mov r3, fp + 2223 0182 01E0 b .L289 + 2224 .L368: + 2225 0184 5EF8109F ldr r9, [lr, #16]! + 2226 .L289: + 2227 0188 DCE90320 ldrd r2, r0, [ip, #12] + 2228 018c D346 mov fp, r10 + 2229 018e C4FB00B7 smlal fp, r7, r4, r0 + 2230 0192 D346 mov fp, r10 + 2231 0194 C0FB01B6 smlal fp, r6, r0, r1 + 2232 0198 D346 mov fp, r10 + 2233 019a C0FB03B5 smlal fp, r5, r0, r3 + 2234 019e 0295 str r5, [sp, #8] + 2235 01a0 5546 mov r5, r10 + 2236 01a2 C0FB0958 smlal r5, r8, r0, r9 + 2237 01a6 5546 mov r5, r10 + 2238 01a8 C3FB0256 smlal r5, r6, r3, r2 + 2239 01ac 5046 mov r0, r10 + 2240 01ae DCF80850 ldr r5, [ip, #8] + 2241 01b2 DEF80440 ldr r4, [lr, #4] + 2242 01b6 C1FB0207 smlal r0, r7, r1, r2 + 2243 01ba D346 mov fp, r10 + 2244 01bc C3FB05B7 smlal fp, r7, r3, r5 + 2245 01c0 029D ldr r5, [sp, #8] + 2246 01c2 DEF80810 ldr r1, [lr, #8] + 2247 01c6 DCF80400 ldr r0, [ip, #4] + 2248 01ca 5346 mov r3, r10 + 2249 01cc C9FB0235 smlal r3, r5, r9, r2 + 2250 01d0 5346 mov r3, r10 + 2251 01d2 C2FB0438 smlal r3, r8, r2, r4 + 2252 01d6 DCF80830 ldr r3, [ip, #8] + 2253 01da 5246 mov r2, r10 + 2254 01dc C9FB0326 smlal r2, r6, r9, r3 + 2255 01e0 5246 mov r2, r10 + 2256 01e2 C4FB0325 smlal r2, r5, r4, r3 + 2257 01e6 5246 mov r2, r10 + 2258 01e8 C3FB0128 smlal r2, r8, r3, r1 + 2259 01ec 5346 mov r3, r10 + 2260 01ee C9FB0037 smlal r3, r7, r9, r0 + 2261 01f2 5346 mov r3, r10 + 2262 01f4 C4FB0036 smlal r3, r6, r4, r0 + ARM GAS /tmp/ccdao7B1.s page 40 + + + 2263 01f8 5346 mov r3, r10 + 2264 01fa C1FB0035 smlal r3, r5, r1, r0 + 2265 01fe DEF80C30 ldr r3, [lr, #12] + 2266 0202 5246 mov r2, r10 + 2267 0204 C0FB0328 smlal r2, r8, r0, r3 + 2268 0208 019A ldr r2, [sp, #4] + 2269 020a 013A subs r2, r2, #1 + 2270 020c ACF1100C sub ip, ip, #16 + 2271 0210 0192 str r2, [sp, #4] + 2272 0212 B7D1 bne .L368 + 2273 0214 9B46 mov fp, r3 + 2274 0216 059B ldr r3, [sp, #20] + 2275 0218 4246 mov r2, r8 + 2276 021a 8946 mov r9, r1 + 2277 021c A046 mov r8, r4 + 2278 021e 002B cmp r3, #0 + 2279 0220 37D0 beq .L290 + 2280 0222 0799 ldr r1, [sp, #28] + 2281 0224 0198 ldr r0, [sp, #4] + 2282 0226 0C68 ldr r4, [r1] + 2283 0228 0146 mov r1, r0 + 2284 022a C8FB0417 smlal r1, r7, r8, r4 + 2285 022e 0146 mov r1, r0 + 2286 0230 C9FB0416 smlal r1, r6, r9, r4 + 2287 0234 0146 mov r1, r0 + 2288 0236 CBFB0415 smlal r1, r5, fp, r4 + 2289 023a 0399 ldr r1, [sp, #12] + 2290 023c C968 ldr r1, [r1, #12] + 2291 023e 0346 mov r3, r0 + 2292 0240 C1FB0432 smlal r3, r2, r1, r4 + 2293 0244 059B ldr r3, [sp, #20] + 2294 0246 012B cmp r3, #1 + 2295 0248 23D0 beq .L290 + 2296 024a 079C ldr r4, [sp, #28] + 2297 024c 54F804CC ldr ip, [r4, #-4] + 2298 0250 0346 mov r3, r0 + 2299 0252 0446 mov r4, r0 + 2300 0254 C9FB0C37 smlal r3, r7, r9, ip + 2301 0258 0346 mov r3, r0 + 2302 025a CCFB0105 smlal r0, r5, ip, r1 + 2303 025e 0398 ldr r0, [sp, #12] + 2304 0260 0069 ldr r0, [r0, #16] + 2305 0262 CBFB0C36 smlal r3, r6, fp, ip + 2306 0266 2346 mov r3, r4 + 2307 0268 C0FB0C32 smlal r3, r2, r0, ip + 2308 026c 059B ldr r3, [sp, #20] + 2309 026e 022B cmp r3, #2 + 2310 0270 0FD0 beq .L290 + 2311 0272 079B ldr r3, [sp, #28] + 2312 0274 53F808CC ldr ip, [r3, #-8] + 2313 0278 2346 mov r3, r4 + 2314 027a CBFB0C37 smlal r3, r7, fp, ip + 2315 027e 2346 mov r3, r4 + 2316 0280 CCFB0136 smlal r3, r6, ip, r1 + 2317 0284 2346 mov r3, r4 + 2318 0286 CCFB0035 smlal r3, r5, ip, r0 + 2319 028a 0398 ldr r0, [sp, #12] + ARM GAS /tmp/ccdao7B1.s page 41 + + + 2320 028c 4369 ldr r3, [r0, #20] + 2321 028e CCFB0342 smlal r4, r2, ip, r3 + 2322 .L290: + 2323 0292 069B ldr r3, [sp, #24] + 2324 0294 0B99 ldr r1, [sp, #44] + 2325 0296 5200 lsls r2, r2, #1 + 2326 0298 43F8042C str r2, [r3, #-4] + 2327 029c 039A ldr r2, [sp, #12] + 2328 029e 1032 adds r2, r2, #16 + 2329 02a0 0392 str r2, [sp, #12] + 2330 02a2 049A ldr r2, [sp, #16] + 2331 02a4 1032 adds r2, r2, #16 + 2332 02a6 0492 str r2, [sp, #16] + 2333 02a8 1A46 mov r2, r3 + 2334 02aa 7F00 lsls r7, r7, #1 + 2335 02ac 7600 lsls r6, r6, #1 + 2336 02ae 6D00 lsls r5, r5, #1 + 2337 02b0 9142 cmp r1, r2 + 2338 02b2 43F8107C str r7, [r3, #-16] + 2339 02b6 43F80C6C str r6, [r3, #-12] + 2340 02ba 43F8085C str r5, [r3, #-8] + 2341 02be 03F11003 add r3, r3, #16 + 2342 02c2 00F09480 beq .L369 + 2343 02c6 0693 str r3, [sp, #24] + 2344 02c8 48E7 b .L292 + 2345 .L367: + 2346 02ca 0E9B ldr r3, [sp, #56] + 2347 02cc 5D46 mov r5, fp + 2348 02ce 73B3 cbz r3, .L302 + 2349 .L309: + 2350 02d0 0E9B ldr r3, [sp, #56] + 2351 02d2 089A ldr r2, [sp, #32] + 2352 02d4 0A9C ldr r4, [sp, #40] + 2353 02d6 DDF83480 ldr r8, [sp, #52] + 2354 02da 9F00 lsls r7, r3, #2 + 2355 02dc 0BEB8305 add r5, fp, r3, lsl #2 + 2356 02e0 0026 movs r6, #0 + 2357 02e2 7046 mov r0, lr + 2358 02e4 BC46 mov ip, r7 + 2359 .L286: + 2360 02e6 0028 cmp r0, #0 + 2361 02e8 7BD0 beq .L370 + 2362 02ea 1368 ldr r3, [r2] + 2363 02ec 2168 ldr r1, [r4] + 2364 02ee 81FB0313 smull r1, r3, r1, r3 + 2365 02f2 B8F1000F cmp r8, #0 + 2366 02f6 0DD0 beq .L298 + 2367 02f8 54F8041C ldr r1, [r4, #-4] + 2368 02fc 5768 ldr r7, [r2, #4] + 2369 02fe B646 mov lr, r6 + 2370 0300 0228 cmp r0, #2 + 2371 0302 C1FB07E3 smlal lr, r3, r1, r7 + 2372 0306 05D0 beq .L298 + 2373 0308 9168 ldr r1, [r2, #8] + 2374 030a 54F8087C ldr r7, [r4, #-8] + 2375 030e B646 mov lr, r6 + 2376 0310 C1FB07E3 smlal lr, r3, r1, r7 + ARM GAS /tmp/ccdao7B1.s page 42 + + + 2377 .L298: + 2378 0314 5B00 lsls r3, r3, #1 + 2379 .L301: + 2380 0316 4BF8043B str r3, [fp], #4 + 2381 031a AB45 cmp fp, r5 + 2382 031c 02F10402 add r2, r2, #4 + 2383 0320 E1D1 bne .L286 + 2384 0322 089B ldr r3, [sp, #32] + 2385 0324 6344 add r3, r3, ip + 2386 0326 0893 str r3, [sp, #32] + 2387 0328 0D9B ldr r3, [sp, #52] + 2388 032a 002B cmp r3, #0 + 2389 032c 56D0 beq .L275 + 2390 .L302: + 2391 032e DDF834C0 ldr ip, [sp, #52] + 2392 0332 DDF820E0 ldr lr, [sp, #32] + 2393 0336 DDF82880 ldr r8, [sp, #40] + 2394 033a 0023 movs r3, #0 + 2395 033c AB46 mov fp, r5 + 2396 .L307: + 2397 033e 5FEA9C07 lsrs r7, ip, #2 + 2398 0342 50D0 beq .L314 + 2399 0344 0EF11001 add r1, lr, #16 + 2400 0348 A8F11002 sub r2, r8, #16 + 2401 034c 3846 mov r0, r7 + 2402 034e 4FF00009 mov r9, #0 + 2403 .L304: + 2404 0352 51F8106C ldr r6, [r1, #-16] + 2405 0356 1469 ldr r4, [r2, #16] + 2406 0358 1D46 mov r5, r3 + 2407 035a C6FB0459 smlal r5, r9, r6, r4 + 2408 035e D468 ldr r4, [r2, #12] + 2409 0360 51F80C6C ldr r6, [r1, #-12] + 2410 0364 1D46 mov r5, r3 + 2411 0366 C6FB0459 smlal r5, r9, r6, r4 + 2412 036a 9468 ldr r4, [r2, #8] + 2413 036c 51F8085C ldr r5, [r1, #-8] + 2414 0370 51F8046C ldr r6, [r1, #-4] + 2415 0374 9A46 mov r10, r3 + 2416 0376 C5FB04A9 smlal r10, r9, r5, r4 + 2417 037a 5468 ldr r4, [r2, #4] + 2418 037c 1D46 mov r5, r3 + 2419 037e 0138 subs r0, r0, #1 + 2420 0380 01F11001 add r1, r1, #16 + 2421 0384 C6FB0459 smlal r5, r9, r6, r4 + 2422 0388 A2F11002 sub r2, r2, #16 + 2423 038c E1D1 bne .L304 + 2424 038e C7EB0770 rsb r0, r7, r7, lsl #28 + 2425 0392 08EB0010 add r0, r8, r0, lsl #4 + 2426 0396 0EEB0717 add r7, lr, r7, lsl #4 + 2427 .L303: + 2428 039a 1CF00304 ands r4, ip, #3 + 2429 039e 14D0 beq .L305 + 2430 03a0 0168 ldr r1, [r0] + 2431 03a2 3A68 ldr r2, [r7] + 2432 03a4 1D46 mov r5, r3 + 2433 03a6 013C subs r4, r4, #1 + ARM GAS /tmp/ccdao7B1.s page 43 + + + 2434 03a8 C1FB0259 smlal r5, r9, r1, r2 + 2435 03ac 0DD0 beq .L305 + 2436 03ae 50F8041C ldr r1, [r0, #-4] + 2437 03b2 7A68 ldr r2, [r7, #4] + 2438 03b4 1D46 mov r5, r3 + 2439 03b6 012C cmp r4, #1 + 2440 03b8 C1FB0259 smlal r5, r9, r1, r2 + 2441 03bc 05D0 beq .L305 + 2442 03be 50F8082C ldr r2, [r0, #-8] + 2443 03c2 B968 ldr r1, [r7, #8] + 2444 03c4 1846 mov r0, r3 + 2445 03c6 C1FB0209 smlal r0, r9, r1, r2 + 2446 .L305: + 2447 03ca 4FEA4902 lsl r2, r9, #1 + 2448 03ce BCF1010C subs ip, ip, #1 + 2449 03d2 4BF8042B str r2, [fp], #4 + 2450 03d6 0EF1040E add lr, lr, #4 + 2451 03da B0D1 bne .L307 + 2452 .L275: + 2453 03dc 13B0 add sp, sp, #76 + 2454 @ sp needed + 2455 03de BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2456 .L370: + 2457 03e2 0346 mov r3, r0 + 2458 03e4 97E7 b .L301 + 2459 .L314: + 2460 03e6 B946 mov r9, r7 + 2461 03e8 4046 mov r0, r8 + 2462 03ea 7746 mov r7, lr + 2463 03ec D5E7 b .L303 + 2464 .L369: + 2465 03ee 089B ldr r3, [sp, #32] + 2466 03f0 119F ldr r7, [sp, #68] + 2467 03f2 1F44 add r7, r7, r3 + 2468 03f4 109B ldr r3, [sp, #64] + 2469 03f6 9B00 lsls r3, r3, #2 + 2470 03f8 8B46 mov fp, r1 + 2471 03fa 1093 str r3, [sp, #64] + 2472 .L287: + 2473 03fc 0E9B ldr r3, [sp, #56] + 2474 03fe 13F00305 ands r5, r3, #3 + 2475 0402 66D0 beq .L313 + 2476 0404 109B ldr r3, [sp, #64] + 2477 0406 0F9A ldr r2, [sp, #60] + 2478 0408 03F10109 add r9, r3, #1 + 2479 040c 089B ldr r3, [sp, #32] + 2480 040e 02F0030A and r10, r2, #3 + 2481 0412 03EB8909 add r9, r3, r9, lsl #2 + 2482 0416 9308 lsrs r3, r2, #2 + 2483 0418 0A9A ldr r2, [sp, #40] + 2484 041a 0193 str r3, [sp, #4] + 2485 041c C3EB0378 rsb r8, r3, r3, lsl #28 + 2486 0420 1B01 lsls r3, r3, #4 + 2487 0422 0BEB8505 add r5, fp, r5, lsl #2 + 2488 0426 0293 str r3, [sp, #8] + 2489 0428 A2F11003 sub r3, r2, #16 + 2490 042c 0993 str r3, [sp, #36] + ARM GAS /tmp/ccdao7B1.s page 44 + + + 2491 042e 02EB0818 add r8, r2, r8, lsl #4 + 2492 0432 0023 movs r3, #0 + 2493 0434 AC46 mov ip, r5 + 2494 .L297: + 2495 0436 099A ldr r2, [sp, #36] + 2496 0438 0198 ldr r0, [sp, #4] + 2497 043a 07F11001 add r1, r7, #16 + 2498 043e 0026 movs r6, #0 + 2499 .L294: + 2500 0440 51F8105C ldr r5, [r1, #-16] + 2501 0444 1469 ldr r4, [r2, #16] + 2502 0446 9E46 mov lr, r3 + 2503 0448 C5FB04E6 smlal lr, r6, r5, r4 + 2504 044c 51F80C5C ldr r5, [r1, #-12] + 2505 0450 D468 ldr r4, [r2, #12] + 2506 0452 9E46 mov lr, r3 + 2507 0454 C5FB04E6 smlal lr, r6, r5, r4 + 2508 0458 51F8085C ldr r5, [r1, #-8] + 2509 045c 9468 ldr r4, [r2, #8] + 2510 045e 9E46 mov lr, r3 + 2511 0460 C5FB04E6 smlal lr, r6, r5, r4 + 2512 0464 51F8045C ldr r5, [r1, #-4] + 2513 0468 5468 ldr r4, [r2, #4] + 2514 046a 9E46 mov lr, r3 + 2515 046c 0138 subs r0, r0, #1 + 2516 046e 01F11001 add r1, r1, #16 + 2517 0472 C5FB04E6 smlal lr, r6, r5, r4 + 2518 0476 A2F11002 sub r2, r2, #16 + 2519 047a E1D1 bne .L294 + 2520 047c 029A ldr r2, [sp, #8] + 2521 047e BC18 adds r4, r7, r2 + 2522 0480 BAF1000F cmp r10, #0 + 2523 0484 16D0 beq .L295 + 2524 0486 B958 ldr r1, [r7, r2] + 2525 0488 D8F80020 ldr r2, [r8] + 2526 048c 0546 mov r5, r0 + 2527 048e BAF1010F cmp r10, #1 + 2528 0492 C2FB0156 smlal r5, r6, r2, r1 + 2529 0496 0DD0 beq .L295 + 2530 0498 58F8041C ldr r1, [r8, #-4] + 2531 049c 6268 ldr r2, [r4, #4] + 2532 049e 0546 mov r5, r0 + 2533 04a0 BAF1020F cmp r10, #2 + 2534 04a4 C1FB0256 smlal r5, r6, r1, r2 + 2535 04a8 04D0 beq .L295 + 2536 04aa A168 ldr r1, [r4, #8] + 2537 04ac 58F8082C ldr r2, [r8, #-8] + 2538 04b0 C1FB0206 smlal r0, r6, r1, r2 + 2539 .L295: + 2540 04b4 7600 lsls r6, r6, #1 + 2541 04b6 4BF8046B str r6, [fp], #4 + 2542 04ba E345 cmp fp, ip + 2543 04bc 4F46 mov r7, r9 + 2544 04be 09F10409 add r9, r9, #4 + 2545 04c2 B8D1 bne .L297 + 2546 04c4 6546 mov r5, ip + 2547 .L293: + ARM GAS /tmp/ccdao7B1.s page 45 + + + 2548 04c6 089B ldr r3, [sp, #32] + 2549 04c8 0E9A ldr r2, [sp, #56] + 2550 04ca 03EB8203 add r3, r3, r2, lsl #2 + 2551 04ce 0893 str r3, [sp, #32] + 2552 04d0 2DE7 b .L302 + 2553 .L313: + 2554 04d2 5D46 mov r5, fp + 2555 04d4 F7E7 b .L293 + 2556 .L277: + 2557 04d6 0E9B ldr r3, [sp, #56] + 2558 04d8 002B cmp r3, #0 + 2559 04da 7FF4F9AE bne .L309 + 2560 04de 7DE7 b .L275 + 2561 .L311: + 2562 04e0 089F ldr r7, [sp, #32] + 2563 04e2 8BE7 b .L287 + 2564 .L310: + 2565 04e4 E146 mov r9, ip + 2566 04e6 D646 mov lr, r10 + 2567 04e8 04E6 b .L279 + 2569 04ea 00BF .section .text.arm_conv_opt_q15,"ax",%progbits + 2570 .align 1 + 2571 .p2align 2,,3 + 2572 .global arm_conv_opt_q15 + 2573 .syntax unified + 2574 .thumb + 2575 .thumb_func + 2576 .fpu fpv4-sp-d16 + 2578 arm_conv_opt_q15: + 2579 @ args = 12, pretend = 0, frame = 8 + 2580 @ frame_needed = 0, uses_anonymous_args = 0 + 2581 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2582 0004 83B0 sub sp, sp, #12 + 2583 0006 9942 cmp r1, r3 + 2584 0008 DDE90DA4 ldrd r10, r4, [sp, #52] + 2585 000c 0C9D ldr r5, [sp, #48] + 2586 000e 8846 mov r8, r1 + 2587 0010 9946 mov r9, r3 + 2588 0012 8346 mov fp, r0 + 2589 0014 04D2 bcs .L372 + 2590 0016 4346 mov r3, r8 + 2591 0018 9346 mov fp, r2 + 2592 001a C846 mov r8, r9 + 2593 001c 0246 mov r2, r0 + 2594 001e 9946 mov r9, r3 + 2595 .L372: + 2596 0020 09F10043 add r3, r9, #-2147483648 + 2597 0024 013B subs r3, r3, #1 + 2598 0026 5900 lsls r1, r3, #1 + 2599 0028 B9F1000F cmp r9, #0 + 2600 002c 08D0 beq .L373 + 2601 002e 8F1C adds r7, r1, #2 + 2602 0030 2744 add r7, r7, r4 + 2603 0032 4E46 mov r6, r9 + 2604 .L374: + 2605 0034 32F9023B ldrsh r3, [r2], #2 + 2606 0038 27F8023D strh r3, [r7, #-2]! @ movhi + ARM GAS /tmp/ccdao7B1.s page 46 + + + 2607 003c 013E subs r6, r6, #1 + 2608 003e F9D1 bne .L374 + 2609 .L373: + 2610 0040 09F1FF37 add r7, r9, #-1 + 2611 0044 0AEB0106 add r6, r10, r1 + 2612 0048 3A46 mov r2, r7 + 2613 004a 5146 mov r1, r10 + 2614 004c 0020 movs r0, #0 + 2615 004e FFF7FEFF bl arm_fill_q15 + 2616 0052 5846 mov r0, fp + 2617 0054 3146 mov r1, r6 + 2618 0056 4246 mov r2, r8 + 2619 0058 FFF7FEFF bl arm_copy_q15 + 2620 005c 3A46 mov r2, r7 + 2621 005e 06EB4801 add r1, r6, r8, lsl #1 + 2622 0062 0020 movs r0, #0 + 2623 0064 08EB0907 add r7, r8, r9 + 2624 0068 FFF7FEFF bl arm_fill_q15 + 2625 006c 013F subs r7, r7, #1 + 2626 006e 42D0 beq .L371 + 2627 0070 4FEA5906 lsr r6, r9, #1 + 2628 0074 0AF1020C add ip, r10, #2 + 2629 0078 09F00109 and r9, r9, #1 + 2630 007c 4FEA860A lsl r10, r6, #2 + 2631 0080 AAF1020A sub r10, r10, #2 + 2632 0084 04EB860B add fp, r4, r6, lsl #2 + 2633 0088 04F1020E add lr, r4, #2 + 2634 008c C846 mov r8, r9 + 2635 .L380: + 2636 008e ACF10209 sub r9, ip, #2 + 2637 0092 9EB3 cbz r6, .L381 + 2638 0094 CDF80480 str r8, [sp, #4] + 2639 0098 0023 movs r3, #0 + 2640 009a 0020 movs r0, #0 + 2641 009c 0021 movs r1, #0 + 2642 009e B846 mov r8, r7 + 2643 .L377: + 2644 00a0 39F82370 ldrh r7, [r9, r3, lsl #2] + 2645 00a4 34F82320 ldrh r2, [r4, r3, lsl #2] + 2646 00a8 C7FB8201 smlalbb r0, r1, r7, r2 + 2647 00ac 3CF82370 ldrh r7, [ip, r3, lsl #2] + 2648 00b0 3EF82320 ldrh r2, [lr, r3, lsl #2] + 2649 00b4 0133 adds r3, r3, #1 + 2650 00b6 9E42 cmp r6, r3 + 2651 00b8 C7FB8201 smlalbb r0, r1, r7, r2 + 2652 00bc F0D1 bne .L377 + 2653 00be 4746 mov r7, r8 + 2654 00c0 DDF80480 ldr r8, [sp, #4] + 2655 00c4 0AEB0C09 add r9, r10, ip + 2656 00c8 5B46 mov r3, fp + 2657 .L376: + 2658 00ca B8F1000F cmp r8, #0 + 2659 00ce 02D1 bne .L395 + 2660 00d0 0CF1020C add ip, ip, #2 + 2661 00d4 06E0 b .L394 + 2662 .L395: + 2663 00d6 B9F80020 ldrh r2, [r9] + ARM GAS /tmp/ccdao7B1.s page 47 + + + 2664 00da 1B88 ldrh r3, [r3] + 2665 00dc 0CF1020C add ip, ip, #2 + 2666 00e0 C2FB8301 smlalbb r0, r1, r2, r3 + 2667 .L394: + 2668 00e4 C30B lsrs r3, r0, #15 + 2669 00e6 013F subs r7, r7, #1 + 2670 00e8 43EA4143 orr r3, r3, r1, lsl #17 + 2671 .syntax unified + 2672 @ 350 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c" 1 + 2673 00ec 03F30F03 ssat r3, #16, r3 + 2674 @ 0 "" 2 + 2675 .thumb + 2676 .syntax unified + 2677 00f0 25F8023B strh r3, [r5], #2 @ movhi + 2678 00f4 CBD1 bne .L380 + 2679 .L371: + 2680 00f6 03B0 add sp, sp, #12 + 2681 @ sp needed + 2682 00f8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2683 .L381: + 2684 00fc 2346 mov r3, r4 + 2685 00fe 0020 movs r0, #0 + 2686 0100 0021 movs r1, #0 + 2687 0102 E2E7 b .L376 + 2689 .section .text.arm_conv_opt_q7,"ax",%progbits + 2690 .align 1 + 2691 .p2align 2,,3 + 2692 .global arm_conv_opt_q7 + 2693 .syntax unified + 2694 .thumb + 2695 .thumb_func + 2696 .fpu fpv4-sp-d16 + 2698 arm_conv_opt_q7: + 2699 @ args = 12, pretend = 0, frame = 40 + 2700 @ frame_needed = 0, uses_anonymous_args = 0 + 2701 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2702 0004 8BB0 sub sp, sp, #44 + 2703 0006 9942 cmp r1, r3 + 2704 0008 DDF858A0 ldr r10, [sp, #88] + 2705 000c 0793 str r3, [sp, #28] + 2706 000e 0E46 mov r6, r1 + 2707 0010 0746 mov r7, r0 + 2708 0012 1446 mov r4, r2 + 2709 0014 05D2 bcs .L397 + 2710 0016 1946 mov r1, r3 + 2711 0018 3346 mov r3, r6 + 2712 001a 1746 mov r7, r2 + 2713 001c 0E46 mov r6, r1 + 2714 001e 0446 mov r4, r0 + 2715 0020 0793 str r3, [sp, #28] + 2716 .L397: + 2717 0022 079B ldr r3, [sp, #28] + 2718 0024 5A1E subs r2, r3, #1 + 2719 0026 9808 lsrs r0, r3, #2 + 2720 0028 1444 add r4, r4, r2 + 2721 002a 0190 str r0, [sp, #4] + 2722 002c 00F08881 beq .L417 + ARM GAS /tmp/ccdao7B1.s page 48 + + + 2723 0030 0AF10801 add r1, r10, #8 + 2724 0034 231F subs r3, r4, #4 + 2725 0036 A4EB8005 sub r5, r4, r0, lsl #2 + 2726 .L399: + 2727 003a 93F904C0 ldrsb ip, [r3, #4] + 2728 003e 21F808CC strh ip, [r1, #-8] @ movhi + 2729 0042 93F903C0 ldrsb ip, [r3, #3] + 2730 0046 21F806CC strh ip, [r1, #-6] @ movhi + 2731 004a 93F902C0 ldrsb ip, [r3, #2] + 2732 004e 21F804CC strh ip, [r1, #-4] @ movhi + 2733 0052 93F901C0 ldrsb ip, [r3, #1] + 2734 0056 21F802CC strh ip, [r1, #-2] @ movhi + 2735 005a 9D42 cmp r5, r3 + 2736 005c 01F10801 add r1, r1, #8 + 2737 0060 A3F10403 sub r3, r3, #4 + 2738 0064 E9D1 bne .L399 + 2739 0066 0199 ldr r1, [sp, #4] + 2740 0068 C1EB8173 rsb r3, r1, r1, lsl #30 + 2741 006c 04EB8304 add r4, r4, r3, lsl #2 + 2742 0070 0AEBC103 add r3, r10, r1, lsl #3 + 2743 .L398: + 2744 0074 0799 ldr r1, [sp, #28] + 2745 0076 11F00301 ands r1, r1, #3 + 2746 007a 0846 mov r0, r1 + 2747 007c 0391 str r1, [sp, #12] + 2748 007e 0CD0 beq .L400 + 2749 0080 94F90010 ldrsb r1, [r4] + 2750 0084 1980 strh r1, [r3] @ movhi + 2751 0086 411E subs r1, r0, #1 + 2752 0088 07D0 beq .L400 + 2753 008a 14F9010C ldrsb r0, [r4, #-1] + 2754 008e 5880 strh r0, [r3, #2] @ movhi + 2755 0090 0129 cmp r1, #1 + 2756 0092 1CBF itt ne + 2757 0094 14F9021C ldrsbne r1, [r4, #-2] + 2758 0098 9980 strhne r1, [r3, #4] @ movhi + 2759 .L400: + 2760 009a 1599 ldr r1, [sp, #84] + 2761 009c 0092 str r2, [sp] + 2762 009e 0020 movs r0, #0 + 2763 00a0 FFF7FEFF bl arm_fill_q15 + 2764 00a4 079B ldr r3, [sp, #28] + 2765 00a6 009A ldr r2, [sp] + 2766 00a8 03F10041 add r1, r3, #-2147483648 + 2767 00ac 159B ldr r3, [sp, #84] + 2768 00ae 0139 subs r1, r1, #1 + 2769 00b0 5FEA960C lsrs ip, r6, #2 + 2770 00b4 03EB4101 add r1, r3, r1, lsl #1 + 2771 00b8 1ED0 beq .L401 + 2772 00ba 3B1D adds r3, r7, #4 + 2773 00bc 01F10804 add r4, r1, #8 + 2774 00c0 4FEA8C0E lsl lr, ip, #2 + 2775 00c4 03EB8C00 add r0, r3, ip, lsl #2 + 2776 .L402: + 2777 00c8 13F9045C ldrsb r5, [r3, #-4] + 2778 00cc 24F8085C strh r5, [r4, #-8] @ movhi + 2779 00d0 13F9035C ldrsb r5, [r3, #-3] + ARM GAS /tmp/ccdao7B1.s page 49 + + + 2780 00d4 24F8065C strh r5, [r4, #-6] @ movhi + 2781 00d8 13F9025C ldrsb r5, [r3, #-2] + 2782 00dc 24F8045C strh r5, [r4, #-4] @ movhi + 2783 00e0 13F9015C ldrsb r5, [r3, #-1] + 2784 00e4 24F8025C strh r5, [r4, #-2] @ movhi + 2785 00e8 0433 adds r3, r3, #4 + 2786 00ea 8342 cmp r3, r0 + 2787 00ec 04F10804 add r4, r4, #8 + 2788 00f0 EAD1 bne .L402 + 2789 00f2 7744 add r7, r7, lr + 2790 00f4 01EBCC01 add r1, r1, ip, lsl #3 + 2791 .L401: + 2792 00f8 16F00303 ands r3, r6, #3 + 2793 00fc 0ED0 beq .L403 + 2794 00fe 97F90000 ldrsb r0, [r7] + 2795 0102 0880 strh r0, [r1] @ movhi + 2796 0104 581E subs r0, r3, #1 + 2797 0106 07D0 beq .L404 + 2798 0108 97F90140 ldrsb r4, [r7, #1] + 2799 010c 4C80 strh r4, [r1, #2] @ movhi + 2800 010e 0128 cmp r0, #1 + 2801 0110 1CBF itt ne + 2802 0112 97F90200 ldrsbne r0, [r7, #2] + 2803 0116 8880 strhne r0, [r1, #4] @ movhi + 2804 .L404: + 2805 0118 01EB4301 add r1, r1, r3, lsl #1 + 2806 .L403: + 2807 011c 0020 movs r0, #0 + 2808 011e FFF7FEFF bl arm_fill_q15 + 2809 0122 079B ldr r3, [sp, #28] + 2810 0124 1E44 add r6, r6, r3 + 2811 0126 731E subs r3, r6, #1 + 2812 0128 9A08 lsrs r2, r3, #2 + 2813 012a 0893 str r3, [sp, #32] + 2814 012c 0992 str r2, [sp, #36] + 2815 012e 00F00481 beq .L418 + 2816 0132 0199 ldr r1, [sp, #4] + 2817 0134 DFF80CB2 ldr fp, .L463 + 2818 0138 CDF858A0 str r10, [sp, #88] + 2819 013c CB00 lsls r3, r1, #3 + 2820 013e 0833 adds r3, r3, #8 + 2821 0140 0693 str r3, [sp, #24] + 2822 0142 149B ldr r3, [sp, #80] + 2823 0144 03EB8203 add r3, r3, r2, lsl #2 + 2824 0148 0493 str r3, [sp, #16] + 2825 014a 0AEBC103 add r3, r10, r1, lsl #3 + 2826 014e 0593 str r3, [sp, #20] + 2827 0150 039B ldr r3, [sp, #12] + 2828 0152 013B subs r3, r3, #1 + 2829 0154 0293 str r3, [sp, #8] + 2830 0156 159B ldr r3, [sp, #84] + 2831 0158 9A46 mov r10, r3 + 2832 .L410: + 2833 015a 019A ldr r2, [sp, #4] + 2834 015c DAF80000 ldr r0, [r10] @ unaligned + 2835 0160 DAF80460 ldr r6, [r10, #4] @ unaligned + 2836 0164 0AF10803 add r3, r10, #8 + ARM GAS /tmp/ccdao7B1.s page 50 + + + 2837 0168 0093 str r3, [sp] + 2838 016a 1F46 mov r7, r3 + 2839 016c 002A cmp r2, #0 + 2840 016e 00F0DE80 beq .L419 + 2841 0172 0023 movs r3, #0 + 2842 0174 DDF858C0 ldr ip, [sp, #88] + 2843 0178 9846 mov r8, r3 + 2844 017a 1946 mov r1, r3 + 2845 017c 1D46 mov r5, r3 + 2846 017e 9146 mov r9, r2 + 2847 .L407: + 2848 0180 DCF80020 ldr r2, [ip] @ unaligned + 2849 .syntax unified + 2850 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2851 0184 20FB0255 smlad r5, r0, r2, r5 + 2852 @ 0 "" 2 + 2853 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2854 0188 26FB0288 smlad r8, r6, r2, r8 + 2855 @ 0 "" 2 + 2856 .thumb + 2857 .syntax unified + 2858 018c 00EA0B04 and r4, r0, fp + 2859 0190 B0B2 uxth r0, r6 + 2860 0192 2043 orrs r0, r0, r4 + 2861 .syntax unified + 2862 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2863 0194 20FB1211 smladx r1, r0, r2, r1 + 2864 @ 0 "" 2 + 2865 .thumb + 2866 .syntax unified + 2867 0198 3868 ldr r0, [r7] @ unaligned + 2868 019a 06EA0B04 and r4, r6, fp + 2869 019e 1FFA80FE uxth lr, r0 + 2870 01a2 4EEA040E orr lr, lr, r4 + 2871 .syntax unified + 2872 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2873 01a6 2EFB1232 smladx r2, lr, r2, r3 + 2874 @ 0 "" 2 + 2875 .thumb + 2876 .syntax unified + 2877 01aa DCF80440 ldr r4, [ip, #4] @ unaligned + 2878 01ae 0CF1080C add ip, ip, #8 + 2879 .syntax unified + 2880 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2881 01b2 26FB0455 smlad r5, r6, r4, r5 + 2882 @ 0 "" 2 + 2883 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2884 01b6 20FB0488 smlad r8, r0, r4, r8 + 2885 @ 0 "" 2 + 2886 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2887 01ba 2EFB1411 smladx r1, lr, r4, r1 + 2888 @ 0 "" 2 + 2889 .thumb + 2890 .syntax unified + 2891 01be 7E68 ldr r6, [r7, #4] @ unaligned + 2892 01c0 00EA0B0E and lr, r0, fp + 2893 01c4 B3B2 uxth r3, r6 + ARM GAS /tmp/ccdao7B1.s page 51 + + + 2894 01c6 0837 adds r7, r7, #8 + 2895 01c8 43EA0E03 orr r3, r3, lr + 2896 .syntax unified + 2897 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2898 01cc 23FB1423 smladx r3, r3, r4, r2 + 2899 @ 0 "" 2 + 2900 .thumb + 2901 .syntax unified + 2902 01d0 B9F10109 subs r9, r9, #1 + 2903 01d4 D4D1 bne .L407 + 2904 01d6 069A ldr r2, [sp, #24] + 2905 01d8 0598 ldr r0, [sp, #20] + 2906 01da 0AEB0207 add r7, r10, r2 + 2907 .L406: + 2908 01de 039A ldr r2, [sp, #12] + 2909 01e0 6AB3 cbz r2, .L408 + 2910 01e2 B0F90020 ldrsh r2, [r0] + 2911 01e6 37F8084C ldrh r4, [r7, #-8] + 2912 01ea 37F906CC ldrsh ip, [r7, #-6] + 2913 01ee 37F9046C ldrsh r6, [r7, #-4] + 2914 01f2 14FB0255 smlabb r5, r4, r2, r5 + 2915 01f6 37F9024C ldrsh r4, [r7, #-2] + 2916 01fa 02FB0C11 mla r1, r2, ip, r1 + 2917 01fe 02FB0688 mla r8, r2, r6, r8 + 2918 0202 04FB0233 mla r3, r4, r2, r3 + 2919 0206 029A ldr r2, [sp, #8] + 2920 0208 CAB1 cbz r2, .L408 + 2921 020a B0F90220 ldrsh r2, [r0, #2] + 2922 020e 0CFB0255 mla r5, ip, r2, r5 + 2923 0212 B7F900C0 ldrsh ip, [r7] + 2924 0216 06FB0211 mla r1, r6, r2, r1 + 2925 021a 04FB0288 mla r8, r4, r2, r8 + 2926 021e 02FB0C33 mla r3, r2, ip, r3 + 2927 0222 029A ldr r2, [sp, #8] + 2928 0224 012A cmp r2, #1 + 2929 0226 0AD0 beq .L408 + 2930 0228 B0F90420 ldrsh r2, [r0, #4] + 2931 022c 7888 ldrh r0, [r7, #2] + 2932 022e 06FB0255 mla r5, r6, r2, r5 + 2933 0232 04FB0211 mla r1, r4, r2, r1 + 2934 0236 02FB0C88 mla r8, r2, ip, r8 + 2935 023a 10FB0233 smlabb r3, r0, r2, r3 + 2936 .L408: + 2937 023e ED11 asrs r5, r5, #7 + 2938 0240 C911 asrs r1, r1, #7 + 2939 .syntax unified + 2940 @ 298 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 + 2941 0242 05F30705 ssat r5, #8, r5 + 2942 @ 0 "" 2 + 2943 @ 299 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 + 2944 0246 01F30701 ssat r1, #8, r1 + 2945 @ 0 "" 2 + 2946 .thumb + 2947 .syntax unified + 2948 024a EDB2 uxtb r5, r5 + 2949 024c 0902 lsls r1, r1, #8 + 2950 024e 4FEAE818 asr r8, r8, #7 + ARM GAS /tmp/ccdao7B1.s page 52 + + + 2951 0252 DB11 asrs r3, r3, #7 + 2952 0254 01F47F41 and r1, r1, #65280 + 2953 .syntax unified + 2954 @ 301 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 + 2955 0258 03F30703 ssat r3, #8, r3 + 2956 @ 0 "" 2 + 2957 @ 300 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 + 2958 025c 08F30708 ssat r8, #8, r8 + 2959 @ 0 "" 2 + 2960 .thumb + 2961 .syntax unified + 2962 0260 45EA0365 orr r5, r5, r3, lsl #24 + 2963 0264 4FEA0848 lsl r8, r8, #16 + 2964 0268 149A ldr r2, [sp, #80] + 2965 026a DDF800A0 ldr r10, [sp] + 2966 026e 2943 orrs r1, r1, r5 + 2967 0270 08F47F03 and r3, r8, #16711680 + 2968 0274 0B43 orrs r3, r3, r1 + 2969 0276 42F8043B str r3, [r2], #4 @ unaligned + 2970 027a 1346 mov r3, r2 + 2971 027c 1492 str r2, [sp, #80] + 2972 027e 049A ldr r2, [sp, #16] + 2973 0280 9342 cmp r3, r2 + 2974 0282 7FF46AAF bne .L410 + 2975 0286 DDE9153A ldrd r3, r10, [sp, #84] + 2976 028a 099A ldr r2, [sp, #36] + 2977 028c 03EBC203 add r3, r3, r2, lsl #3 + 2978 0290 1593 str r3, [sp, #84] + 2979 .L405: + 2980 0292 089B ldr r3, [sp, #32] + 2981 0294 13F00306 ands r6, r3, #3 + 2982 0298 31D0 beq .L396 + 2983 029a 159B ldr r3, [sp, #84] + 2984 029c 079A ldr r2, [sp, #28] + 2985 029e 981C adds r0, r3, #2 + 2986 02a0 5408 lsrs r4, r2, #1 + 2987 02a2 049B ldr r3, [sp, #16] + 2988 02a4 A700 lsls r7, r4, #2 + 2989 02a6 1E44 add r6, r6, r3 + 2990 02a8 02F0010C and ip, r2, #1 + 2991 02ac 023F subs r7, r7, #2 + 2992 02ae 0AEB840E add lr, r10, r4, lsl #2 + 2993 02b2 0AF10205 add r5, r10, #2 + 2994 02b6 9846 mov r8, r3 + 2995 .L416: + 2996 02b8 A0F10209 sub r9, r0, #2 + 2997 02bc A4B3 cbz r4, .L420 + 2998 .L462: + 2999 02be 0023 movs r3, #0 + 3000 02c0 1A46 mov r2, r3 + 3001 .L413: + 3002 02c2 39F82310 ldrh r1, [r9, r3, lsl #2] + 3003 02c6 3AF823B0 ldrh fp, [r10, r3, lsl #2] + 3004 02ca 11FB0B22 smlabb r2, r1, fp, r2 + 3005 02ce 30F823B0 ldrh fp, [r0, r3, lsl #2] + 3006 02d2 35F82310 ldrh r1, [r5, r3, lsl #2] + 3007 02d6 0133 adds r3, r3, #1 + ARM GAS /tmp/ccdao7B1.s page 53 + + + 3008 02d8 9C42 cmp r4, r3 + 3009 02da 1BFB0122 smlabb r2, fp, r1, r2 + 3010 02de F0D1 bne .L413 + 3011 02e0 07EB0009 add r9, r7, r0 + 3012 02e4 7146 mov r1, lr + 3013 .L412: + 3014 02e6 BCF1000F cmp ip, #0 + 3015 02ea 0BD1 bne .L461 + 3016 02ec D311 asrs r3, r2, #7 + 3017 .syntax unified + 3018 @ 348 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 + 3019 02ee 03F30703 ssat r3, #8, r3 + 3020 @ 0 "" 2 + 3021 .thumb + 3022 .syntax unified + 3023 02f2 08F8013B strb r3, [r8], #1 + 3024 02f6 B045 cmp r8, r6 + 3025 02f8 00F10200 add r0, r0, #2 + 3026 02fc DCD1 bne .L416 + 3027 .L396: + 3028 02fe 0BB0 add sp, sp, #44 + 3029 @ sp needed + 3030 0300 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 3031 .L461: + 3032 0304 B9F80030 ldrh r3, [r9] + 3033 0308 0988 ldrh r1, [r1] + 3034 030a 13FB0123 smlabb r3, r3, r1, r2 + 3035 030e DB11 asrs r3, r3, #7 + 3036 .syntax unified + 3037 @ 348 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c" 1 + 3038 0310 03F30703 ssat r3, #8, r3 + 3039 @ 0 "" 2 + 3040 .thumb + 3041 .syntax unified + 3042 0314 08F8013B strb r3, [r8], #1 + 3043 0318 4645 cmp r6, r8 + 3044 031a 00F10200 add r0, r0, #2 + 3045 031e EED0 beq .L396 + 3046 0320 A0F10209 sub r9, r0, #2 + 3047 0324 002C cmp r4, #0 + 3048 0326 CAD1 bne .L462 + 3049 .L420: + 3050 0328 5146 mov r1, r10 + 3051 032a 2246 mov r2, r4 + 3052 032c DBE7 b .L412 + 3053 .L419: + 3054 032e 1698 ldr r0, [sp, #88] + 3055 0330 1546 mov r5, r2 + 3056 0332 1346 mov r3, r2 + 3057 0334 9046 mov r8, r2 + 3058 0336 1146 mov r1, r2 + 3059 0338 51E7 b .L406 + 3060 .L418: + 3061 033a 149B ldr r3, [sp, #80] + 3062 033c 0493 str r3, [sp, #16] + 3063 033e A8E7 b .L405 + 3064 .L417: + ARM GAS /tmp/ccdao7B1.s page 54 + + + 3065 0340 5346 mov r3, r10 + 3066 0342 97E6 b .L398 + 3067 .L464: + 3068 .align 2 + 3069 .L463: + 3070 0344 0000FFFF .word -65536 + 3072 .section .text.arm_conv_partial_f32,"ax",%progbits + 3073 .align 1 + 3074 .p2align 2,,3 + 3075 .global arm_conv_partial_f32 + 3076 .syntax unified + 3077 .thumb + 3078 .thumb_func + 3079 .fpu fpv4-sp-d16 + 3081 arm_conv_partial_f32: + 3082 @ args = 12, pretend = 0, frame = 8 + 3083 @ frame_needed = 0, uses_anonymous_args = 0 + 3084 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 3085 0004 83B0 sub sp, sp, #12 + 3086 0006 4C1E subs r4, r1, #1 + 3087 0008 0D9F ldr r7, [sp, #52] + 3088 000a 0E9D ldr r5, [sp, #56] + 3089 000c 0090 str r0, [sp] + 3090 000e 0646 mov r6, r0 + 3091 0010 7D19 adds r5, r7, r5 + 3092 0012 E018 adds r0, r4, r3 + 3093 0014 8542 cmp r5, r0 + 3094 0016 00F2DD80 bhi .L492 + 3095 001a 8B42 cmp r3, r1 + 3096 001c 06D8 bhi .L467 + 3097 001e 1046 mov r0, r2 + 3098 0020 0090 str r0, [sp] + 3099 0022 1846 mov r0, r3 + 3100 0024 5C1E subs r4, r3, #1 + 3101 0026 3246 mov r2, r6 + 3102 0028 0B46 mov r3, r1 + 3103 002a 0146 mov r1, r0 + 3104 .L467: + 3105 002c 9D42 cmp r5, r3 + 3106 002e D4BF ite le + 3107 0030 4FF0000A movle r10, #0 + 3108 0034 A5EB030A subgt r10, r5, r3 + 3109 0038 BB42 cmp r3, r7 + 3110 003a DCBF itt le + 3111 003c D81B suble r0, r3, r7 + 3112 003e 8244 addle r10, r10, r0 + 3113 0040 F843 mvns r0, r7 + 3114 0042 4018 adds r0, r0, r1 + 3115 0044 65D1 bne .L470 + 3116 0046 0E98 ldr r0, [sp, #56] + 3117 0048 A0EB0A00 sub r0, r0, r10 + 3118 004c 0190 str r0, [sp, #4] + 3119 004e 0C98 ldr r0, [sp, #48] + 3120 0050 00EB8708 add r8, r0, r7, lsl #2 + 3121 .L471: + 3122 0054 781A subs r0, r7, r1 + 3123 0056 0028 cmp r0, #0 + ARM GAS /tmp/ccdao7B1.s page 55 + + + 3124 0058 A8BF it ge + 3125 005a 07F1010E addge lr, r7, #1 + 3126 005e 0098 ldr r0, [sp] + 3127 0060 A8BF it ge + 3128 0062 AEEB010E subge lr, lr, r1 + 3129 0066 01F18047 add r7, r1, #1073741824 + 3130 006a ACBF ite ge + 3131 006c 02EB8E0E addge lr, r2, lr, lsl #2 + 3132 0070 9646 movlt lr, r2 + 3133 0072 013F subs r7, r7, #1 + 3134 0074 0329 cmp r1, #3 + 3135 0076 00EB8707 add r7, r0, r7, lsl #2 + 3136 007a 0198 ldr r0, [sp, #4] + 3137 007c 00F28180 bhi .L479 + 3138 0080 0028 cmp r0, #0 + 3139 0082 00F0A580 beq .L496 + 3140 0086 9FED556A vldr.32 s12, .L518 + 3141 008a 08EB800C add ip, r8, r0, lsl #2 + 3142 .L481: + 3143 008e 0029 cmp r1, #0 + 3144 0090 6AD0 beq .L515 + 3145 0092 9EED007A vldr.32 s14, [lr] + 3146 0096 D7ED006A vldr.32 s13, [r7] + 3147 009a F0EE467A vmov.f32 s15, s12 + 3148 009e 0129 cmp r1, #1 + 3149 00a0 E6EE877A vfma.f32 s15, s13, s14 + 3150 00a4 0DD0 beq .L486 + 3151 00a6 9EED017A vldr.32 s14, [lr, #4] + 3152 00aa 57ED016A vldr.32 s13, [r7, #-4] + 3153 00ae 0229 cmp r1, #2 + 3154 00b0 E6EE877A vfma.f32 s15, s13, s14 + 3155 00b4 05D0 beq .L486 + 3156 00b6 DEED026A vldr.32 s13, [lr, #8] + 3157 00ba 17ED027A vldr.32 s14, [r7, #-8] + 3158 00be E6EE877A vfma.f32 s15, s13, s14 + 3159 .L486: + 3160 00c2 0EF1040E add lr, lr, #4 + 3161 00c6 E8EC017A vstmia.32 r8!, {s15} + 3162 00ca C445 cmp ip, r8 + 3163 00cc DFD1 bne .L481 + 3164 .L480: + 3165 00ce 0133 adds r3, r3, #1 + 3166 00d0 591A subs r1, r3, r1 + 3167 00d2 02EB8100 add r0, r2, r1, lsl #2 + 3168 00d6 BAF1000F cmp r10, #0 + 3169 00da 16D0 beq .L487 + 3170 00dc A4EB0A0A sub r10, r4, r10 + 3171 .L488: + 3172 00e0 DFED3E7A vldr.32 s15, .L518 + 3173 00e4 54B1 cbz r4, .L491 + 3174 00e6 391D adds r1, r7, #4 + 3175 00e8 2346 mov r3, r4 + 3176 00ea 0246 mov r2, r0 + 3177 .L489: + 3178 00ec F2EC016A vldmia.32 r2!, {s13} + 3179 00f0 31ED017A vldmdb.32 r1!, {s14} + 3180 00f4 013B subs r3, r3, #1 + ARM GAS /tmp/ccdao7B1.s page 56 + + + 3181 00f6 E6EE877A vfma.f32 s15, s13, s14 + 3182 00fa F7D1 bne .L489 + 3183 .L491: + 3184 00fc 013C subs r4, r4, #1 + 3185 00fe 5445 cmp r4, r10 + 3186 0100 ECEC017A vstmia.32 ip!, {s15} + 3187 0104 00F10400 add r0, r0, #4 + 3188 0108 EAD1 bne .L488 + 3189 .L487: + 3190 010a 0020 movs r0, #0 + 3191 .L512: + 3192 010c 03B0 add sp, sp, #12 + 3193 @ sp needed + 3194 010e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 3195 .L470: + 3196 0112 A542 cmp r5, r4 + 3197 0114 4ED8 bhi .L472 + 3198 0116 CAF10000 rsb r0, r10, #0 + 3199 011a 0190 str r0, [sp, #4] + 3200 011c 0C98 ldr r0, [sp, #48] + 3201 011e 00EB8708 add r8, r0, r7, lsl #2 + 3202 0122 0098 ldr r0, [sp] + 3203 0124 00EB8706 add r6, r0, r7, lsl #2 + 3204 0128 0E98 ldr r0, [sp, #56] + 3205 012a 7D1C adds r5, r7, #1 + 3206 012c 0028 cmp r0, #0 + 3207 012e 91D0 beq .L471 + 3208 .L473: + 3209 0130 0E98 ldr r0, [sp, #56] + 3210 0132 C146 mov r9, r8 + 3211 0134 00EB050B add fp, r0, r5 + 3212 .L475: + 3213 0138 CDB1 cbz r5, .L516 + 3214 013a 0436 adds r6, r6, #4 + 3215 013c DFED277A vldr.32 s15, .L518 + 3216 0140 B646 mov lr, r6 + 3217 0142 2846 mov r0, r5 + 3218 0144 9446 mov ip, r2 + 3219 .L474: + 3220 0146 FCEC016A vldmia.32 ip!, {s13} + 3221 014a 3EED017A vldmdb.32 lr!, {s14} + 3222 014e 0138 subs r0, r0, #1 + 3223 0150 E6EE877A vfma.f32 s15, s13, s14 + 3224 0154 F7D1 bne .L474 + 3225 0156 0135 adds r5, r5, #1 + 3226 0158 AB45 cmp fp, r5 + 3227 015a E9EC017A vstmia.32 r9!, {s15} + 3228 015e EBD1 bne .L475 + 3229 .L517: + 3230 0160 0E98 ldr r0, [sp, #56] + 3231 0162 08EB8008 add r8, r8, r0, lsl #2 + 3232 0166 75E7 b .L471 + 3233 .L515: + 3234 0168 DFED1C7A vldr.32 s15, .L518 + 3235 016c A9E7 b .L486 + 3236 .L516: + 3237 016e DFED1B7A vldr.32 s15, .L518 + ARM GAS /tmp/ccdao7B1.s page 57 + + + 3238 0172 0135 adds r5, r5, #1 + 3239 0174 AB45 cmp fp, r5 + 3240 0176 06F10406 add r6, r6, #4 + 3241 017a E9EC017A vstmia.32 r9!, {s15} + 3242 017e DBD1 bne .L475 + 3243 0180 EEE7 b .L517 + 3244 .L479: + 3245 0182 28B3 cbz r0, .L496 + 3246 0184 08EB800C add ip, r8, r0, lsl #2 + 3247 0188 07F10409 add r9, r7, #4 + 3248 .L483: + 3249 018c DFED137A vldr.32 s15, .L518 + 3250 0190 4E46 mov r6, r9 + 3251 0192 0846 mov r0, r1 + 3252 0194 7546 mov r5, lr + 3253 .L482: + 3254 0196 F5EC016A vldmia.32 r5!, {s13} + 3255 019a 36ED017A vldmdb.32 r6!, {s14} + 3256 019e 0138 subs r0, r0, #1 + 3257 01a0 E6EE877A vfma.f32 s15, s13, s14 + 3258 01a4 F7D1 bne .L482 + 3259 01a6 E8EC017A vstmia.32 r8!, {s15} + 3260 01aa C445 cmp ip, r8 + 3261 01ac 0EF1040E add lr, lr, #4 + 3262 01b0 ECD1 bne .L483 + 3263 01b2 8CE7 b .L480 + 3264 .L472: + 3265 01b4 0E9D ldr r5, [sp, #56] + 3266 01b6 0E90 str r0, [sp, #56] + 3267 01b8 2D1A subs r5, r5, r0 + 3268 01ba 0C98 ldr r0, [sp, #48] + 3269 01bc 00EB8708 add r8, r0, r7, lsl #2 + 3270 01c0 0098 ldr r0, [sp] + 3271 01c2 A5EB0A05 sub r5, r5, r10 + 3272 01c6 0195 str r5, [sp, #4] + 3273 01c8 00EB8706 add r6, r0, r7, lsl #2 + 3274 01cc 7D1C adds r5, r7, #1 + 3275 01ce AFE7 b .L473 + 3276 .L496: + 3277 01d0 C446 mov ip, r8 + 3278 01d2 7CE7 b .L480 + 3279 .L492: + 3280 01d4 4FF0FF30 mov r0, #-1 + 3281 01d8 98E7 b .L512 + 3282 .L519: + 3283 01da 00BF .align 2 + 3284 .L518: + 3285 01dc 00000000 .word 0 + 3287 .section .text.arm_conv_partial_fast_opt_q15,"ax",%progbits + 3288 .align 1 + 3289 .p2align 2,,3 + 3290 .global arm_conv_partial_fast_opt_q15 + 3291 .syntax unified + 3292 .thumb + 3293 .thumb_func + 3294 .fpu fpv4-sp-d16 + 3296 arm_conv_partial_fast_opt_q15: + ARM GAS /tmp/ccdao7B1.s page 58 + + + 3297 @ args = 20, pretend = 0, frame = 8 + 3298 @ frame_needed = 0, uses_anonymous_args = 0 + 3299 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 3300 0004 83B0 sub sp, sp, #12 + 3301 0006 DDE90D65 ldrd r6, r5, [sp, #52] + 3302 000a 9A46 mov r10, r3 + 3303 000c 4B1E subs r3, r1, #1 + 3304 000e 0F46 mov r7, r1 + 3305 0010 9346 mov fp, r2 + 3306 0012 7119 adds r1, r6, r5 + 3307 0014 0AEB0302 add r2, r10, r3 + 3308 0018 9142 cmp r1, r2 + 3309 001a DDE90F48 ldrd r4, r8, [sp, #60] + 3310 001e 6ED8 bhi .L533 + 3311 0020 BA45 cmp r10, r7 + 3312 0022 63D9 bls .L542 + 3313 .L522: + 3314 0024 07F10049 add r9, r7, #-2147483648 + 3315 0028 09F1FF39 add r9, r9, #-1 + 3316 002c 4FEA4909 lsl r9, r9, #1 + 3317 0030 4FB1 cbz r7, .L527 + 3318 0032 09F10201 add r1, r9, #2 + 3319 0036 4144 add r1, r1, r8 + 3320 0038 3A46 mov r2, r7 + 3321 .L526: + 3322 003a 30F902CB ldrsh ip, [r0], #2 + 3323 003e 21F802CD strh ip, [r1, #-2]! @ movhi + 3324 0042 013A subs r2, r2, #1 + 3325 0044 F9D1 bne .L526 + 3326 .L527: + 3327 0046 1A46 mov r2, r3 + 3328 0048 A144 add r9, r9, r4 + 3329 004a 2146 mov r1, r4 + 3330 004c 0020 movs r0, #0 + 3331 004e 0193 str r3, [sp, #4] + 3332 0050 FFF7FEFF bl arm_fill_q15 + 3333 0054 5846 mov r0, fp + 3334 0056 4946 mov r1, r9 + 3335 0058 5246 mov r2, r10 + 3336 005a FFF7FEFF bl arm_copy_q15 + 3337 005e 019B ldr r3, [sp, #4] + 3338 0060 09EB4A01 add r1, r9, r10, lsl #1 + 3339 0064 1A46 mov r2, r3 + 3340 0066 0020 movs r0, #0 + 3341 0068 FFF7FEFF bl arm_fill_q15 + 3342 006c 0C9B ldr r3, [sp, #48] + 3343 006e 04EB4604 add r4, r4, r6, lsl #1 + 3344 0072 03EB460C add ip, r3, r6, lsl #1 + 3345 0076 0DB3 cbz r5, .L525 + 3346 0078 7E08 lsrs r6, r7, #1 + 3347 007a 4FEA8609 lsl r9, r6, #2 + 3348 007e 07F00107 and r7, r7, #1 + 3349 0082 08EB860E add lr, r8, r6, lsl #2 + 3350 .L532: + 3351 0086 6EB3 cbz r6, .L534 + 3352 .L544: + 3353 0088 4046 mov r0, r8 + ARM GAS /tmp/ccdao7B1.s page 59 + + + 3354 008a 2146 mov r1, r4 + 3355 008c 3346 mov r3, r6 + 3356 008e 0022 movs r2, #0 + 3357 .L529: + 3358 0090 51F804AB ldr r10, [r1], #4 @ unaligned + 3359 0094 50F804BB ldr fp, [r0], #4 @ unaligned + 3360 .syntax unified + 3361 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3362 0098 2AFB0B22 smlad r2, r10, fp, r2 + 3363 @ 0 "" 2 + 3364 .thumb + 3365 .syntax unified + 3366 009c 013B subs r3, r3, #1 + 3367 009e F7D1 bne .L529 + 3368 00a0 04EB0903 add r3, r4, r9 + 3369 00a4 7146 mov r1, lr + 3370 .L528: + 3371 00a6 6FB9 cbnz r7, .L543 + 3372 00a8 013D subs r5, r5, #1 + 3373 00aa 4FEAE233 asr r3, r2, #15 + 3374 00ae 04F10204 add r4, r4, #2 + 3375 .syntax unified + 3376 @ 368 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_ + 3377 00b2 03F30F03 ssat r3, #16, r3 + 3378 @ 0 "" 2 + 3379 .thumb + 3380 .syntax unified + 3381 00b6 2CF8023B strh r3, [ip], #2 @ movhi + 3382 00ba E4D1 bne .L532 + 3383 .L525: + 3384 00bc 0020 movs r0, #0 + 3385 .L521: + 3386 00be 03B0 add sp, sp, #12 + 3387 @ sp needed + 3388 00c0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 3389 .L543: + 3390 00c4 1B88 ldrh r3, [r3] + 3391 00c6 0988 ldrh r1, [r1] + 3392 00c8 013D subs r5, r5, #1 + 3393 00ca 13FB0122 smlabb r2, r3, r1, r2 + 3394 00ce 4FEAE232 asr r2, r2, #15 + 3395 00d2 04F10204 add r4, r4, #2 + 3396 .syntax unified + 3397 @ 368 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_ + 3398 00d6 02F30F02 ssat r2, #16, r2 + 3399 @ 0 "" 2 + 3400 .thumb + 3401 .syntax unified + 3402 00da 2CF8022B strh r2, [ip], #2 @ movhi + 3403 00de EDD0 beq .L525 + 3404 00e0 002E cmp r6, #0 + 3405 00e2 D1D1 bne .L544 + 3406 .L534: + 3407 00e4 4146 mov r1, r8 + 3408 00e6 2346 mov r3, r4 + 3409 00e8 3246 mov r2, r6 + 3410 00ea DCE7 b .L528 + ARM GAS /tmp/ccdao7B1.s page 60 + + + 3411 .L542: + 3412 00ec 5B46 mov r3, fp + 3413 00ee 5246 mov r2, r10 + 3414 00f0 8346 mov fp, r0 + 3415 00f2 1846 mov r0, r3 + 3416 00f4 0AF1FF33 add r3, r10, #-1 + 3417 00f8 BA46 mov r10, r7 + 3418 00fa 1746 mov r7, r2 + 3419 00fc 92E7 b .L522 + 3420 .L533: + 3421 00fe 4FF0FF30 mov r0, #-1 + 3422 0102 DCE7 b .L521 + 3424 .section .text.arm_conv_partial_fast_q15,"ax",%progbits + 3425 .align 1 + 3426 .p2align 2,,3 + 3427 .global arm_conv_partial_fast_q15 + 3428 .syntax unified + 3429 .thumb + 3430 .thumb_func + 3431 .fpu fpv4-sp-d16 + 3433 arm_conv_partial_fast_q15: + 3434 @ args = 12, pretend = 0, frame = 64 + 3435 @ frame_needed = 0, uses_anonymous_args = 0 + 3436 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 3437 0004 91B0 sub sp, sp, #68 + 3438 0006 0C46 mov r4, r1 + 3439 0008 1B9E ldr r6, [sp, #108] + 3440 000a 0291 str r1, [sp, #8] + 3441 000c 1C99 ldr r1, [sp, #112] + 3442 000e 0993 str r3, [sp, #36] + 3443 0010 04F1FF3A add r10, r4, #-1 + 3444 0014 1D46 mov r5, r3 + 3445 0016 1746 mov r7, r2 + 3446 0018 0192 str r2, [sp, #4] + 3447 001a 5344 add r3, r10, r3 + 3448 001c 7218 adds r2, r6, r1 + 3449 001e 9A42 cmp r2, r3 + 3450 0020 0490 str r0, [sp, #16] + 3451 0022 00F25A83 bhi .L601 + 3452 0026 A542 cmp r5, r4 + 3453 0028 05D8 bhi .L547 + 3454 002a 0190 str r0, [sp, #4] + 3455 002c 0497 str r7, [sp, #16] + 3456 002e 05F1FF3A add r10, r5, #-1 + 3457 0032 0994 str r4, [sp, #36] + 3458 0034 0295 str r5, [sp, #8] + 3459 .L547: + 3460 0036 099B ldr r3, [sp, #36] + 3461 0038 0998 ldr r0, [sp, #36] + 3462 003a 9A42 cmp r2, r3 + 3463 003c CCBF ite gt + 3464 003e D31A subgt r3, r2, r3 + 3465 0040 0023 movle r3, #0 + 3466 0042 0693 str r3, [sp, #24] + 3467 0044 1B9B ldr r3, [sp, #108] + 3468 0046 9842 cmp r0, r3 + 3469 0048 40F39D80 ble .L676 + ARM GAS /tmp/ccdao7B1.s page 61 + + + 3470 .L549: + 3471 004c 1B9B ldr r3, [sp, #108] + 3472 004e 0298 ldr r0, [sp, #8] + 3473 0050 DB43 mvns r3, r3 + 3474 0052 0344 add r3, r3, r0 + 3475 0054 002B cmp r3, #0 + 3476 0056 40F39382 ble .L550 + 3477 005a 5245 cmp r2, r10 + 3478 005c 00F29980 bhi .L551 + 3479 0060 069B ldr r3, [sp, #24] + 3480 0062 1B98 ldr r0, [sp, #108] + 3481 0064 0B44 add r3, r3, r1 + 3482 0066 0344 add r3, r3, r0 + 3483 0068 D21A subs r2, r2, r3 + 3484 006a 22EAE273 bic r3, r2, r2, asr #31 + 3485 006e 421C adds r2, r0, #1 + 3486 0070 DDE91A04 ldrd r0, r4, [sp, #104] + 3487 0074 00EB4405 add r5, r0, r4, lsl #1 + 3488 0078 0498 ldr r0, [sp, #16] + 3489 007a 0B93 str r3, [sp, #44] + 3490 007c 032A cmp r2, #3 + 3491 007e 0592 str r2, [sp, #20] + 3492 0080 0B46 mov r3, r1 + 3493 0082 00EB4407 add r7, r0, r4, lsl #1 + 3494 0086 00F21583 bhi .L552 + 3495 008a 0029 cmp r1, #0 + 3496 008c 40F32883 ble .L603 + 3497 .L597: + 3498 0090 059E ldr r6, [sp, #20] + 3499 0092 002E cmp r6, #0 + 3500 0094 00F00183 beq .L554 + 3501 0098 019A ldr r2, [sp, #4] + 3502 009a B7F90010 ldrsh r1, [r7] + 3503 009e B2F90020 ldrsh r2, [r2] + 3504 00a2 0020 movs r0, #0 + 3505 .syntax unified + 3506 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3507 00a4 22FB0102 smlad r2, r2, r1, r0 + 3508 @ 0 "" 2 + 3509 .thumb + 3510 .syntax unified + 3511 00a8 741E subs r4, r6, #1 + 3512 00aa 1046 mov r0, r2 + 3513 00ac 00F07782 beq .L555 + 3514 00b0 0199 ldr r1, [sp, #4] + 3515 00b2 37F9020C ldrsh r0, [r7, #-2] + 3516 00b6 B1F90210 ldrsh r1, [r1, #2] + 3517 .syntax unified + 3518 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3519 00ba 21FB0022 smlad r2, r1, r0, r2 + 3520 @ 0 "" 2 + 3521 .thumb + 3522 .syntax unified + 3523 00be 012C cmp r4, #1 + 3524 00c0 1046 mov r0, r2 + 3525 00c2 00F06C82 beq .L555 + 3526 00c6 0199 ldr r1, [sp, #4] + ARM GAS /tmp/ccdao7B1.s page 62 + + + 3527 00c8 37F9040C ldrsh r0, [r7, #-4] + 3528 00cc B1F90410 ldrsh r1, [r1, #4] + 3529 .syntax unified + 3530 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3531 00d0 21FB0022 smlad r2, r1, r0, r2 + 3532 @ 0 "" 2 + 3533 .thumb + 3534 .syntax unified + 3535 00d4 2946 mov r1, r5 + 3536 00d6 D213 asrs r2, r2, #15 + 3537 00d8 21F8022B strh r2, [r1], #2 @ movhi + 3538 00dc 013B subs r3, r3, #1 + 3539 00de 0391 str r1, [sp, #12] + 3540 00e0 07F1020C add ip, r7, #2 + 3541 00e4 0136 adds r6, r6, #1 + 3542 .L556: + 3543 00e6 002B cmp r3, #0 + 3544 00e8 40F3F082 ble .L606 + 3545 .L598: + 3546 00ec B508 lsrs r5, r6, #2 + 3547 00ee DDF80C80 ldr r8, [sp, #12] + 3548 00f2 DDF80490 ldr r9, [sp, #4] + 3549 00f6 CDF81CA0 str r10, [sp, #28] + 3550 00fa 4FEA430B lsl fp, r3, #1 + 3551 00fe 0CEB430E add lr, ip, r3, lsl #1 + 3552 0102 3DD0 beq .L607 + 3553 .L678: + 3554 0104 3946 mov r1, r7 + 3555 0106 4A46 mov r2, r9 + 3556 0108 2C46 mov r4, r5 + 3557 010a 0023 movs r3, #0 + 3558 .L561: + 3559 010c 1068 ldr r0, [r2] @ unaligned + 3560 010e D1F800A0 ldr r10, [r1] @ unaligned + 3561 .syntax unified + 3562 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3563 0112 20FB1A33 smladx r3, r0, r10, r3 + 3564 @ 0 "" 2 + 3565 .thumb + 3566 .syntax unified + 3567 0116 5068 ldr r0, [r2, #4] @ unaligned + 3568 0118 51F804AC ldr r10, [r1, #-4] @ unaligned + 3569 011c 0832 adds r2, r2, #8 + 3570 011e 0839 subs r1, r1, #8 + 3571 .syntax unified + 3572 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3573 0120 20FB1A33 smladx r3, r0, r10, r3 + 3574 @ 0 "" 2 + 3575 .thumb + 3576 .syntax unified + 3577 0124 013C subs r4, r4, #1 + 3578 0126 F1D1 bne .L561 + 3579 0128 C5EB4572 rsb r2, r5, r5, lsl #29 + 3580 012c 07EBC207 add r7, r7, r2, lsl #3 + 3581 0130 09EBC505 add r5, r9, r5, lsl #3 + 3582 .L560: + 3583 0134 16F00302 ands r2, r6, #3 + ARM GAS /tmp/ccdao7B1.s page 63 + + + 3584 0138 15D0 beq .L562 + 3585 013a B5F90010 ldrsh r1, [r5] + 3586 013e B7F90200 ldrsh r0, [r7, #2] + 3587 .syntax unified + 3588 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3589 0142 21FB0033 smlad r3, r1, r0, r3 + 3590 @ 0 "" 2 + 3591 .thumb + 3592 .syntax unified + 3593 0146 013A subs r2, r2, #1 + 3594 0148 0DD0 beq .L562 + 3595 014a B5F90210 ldrsh r1, [r5, #2] + 3596 014e B7F90000 ldrsh r0, [r7] + 3597 .syntax unified + 3598 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3599 0152 21FB0033 smlad r3, r1, r0, r3 + 3600 @ 0 "" 2 + 3601 .thumb + 3602 .syntax unified + 3603 0156 012A cmp r2, #1 + 3604 0158 05D0 beq .L562 + 3605 015a B5F90420 ldrsh r2, [r5, #4] + 3606 015e 37F9021C ldrsh r1, [r7, #-2] + 3607 .syntax unified + 3608 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3609 0162 22FB0133 smlad r3, r2, r1, r3 + 3610 @ 0 "" 2 + 3611 .thumb + 3612 .syntax unified + 3613 .L562: + 3614 0166 DB13 asrs r3, r3, #15 + 3615 0168 28F8023B strh r3, [r8], #2 @ movhi + 3616 016c 0CF10203 add r3, ip, #2 + 3617 0170 7345 cmp r3, lr + 3618 0172 06F10106 add r6, r6, #1 + 3619 0176 6746 mov r7, ip + 3620 0178 24D0 beq .L677 + 3621 017a B508 lsrs r5, r6, #2 + 3622 017c 9C46 mov ip, r3 + 3623 017e C1D1 bne .L678 + 3624 .L607: + 3625 0180 2B46 mov r3, r5 + 3626 0182 4D46 mov r5, r9 + 3627 0184 D6E7 b .L560 + 3628 .L676: + 3629 0186 1C46 mov r4, r3 + 3630 0188 069B ldr r3, [sp, #24] + 3631 018a 1B1B subs r3, r3, r4 + 3632 018c 0344 add r3, r3, r0 + 3633 018e 0693 str r3, [sp, #24] + 3634 0190 5CE7 b .L549 + 3635 .L551: + 3636 0192 0699 ldr r1, [sp, #24] + 3637 0194 1B98 ldr r0, [sp, #108] + 3638 0196 1944 add r1, r1, r3 + 3639 0198 0144 add r1, r1, r0 + 3640 019a 521A subs r2, r2, r1 + ARM GAS /tmp/ccdao7B1.s page 64 + + + 3641 019c 22EAE272 bic r2, r2, r2, asr #31 + 3642 01a0 1A99 ldr r1, [sp, #104] + 3643 01a2 0B92 str r2, [sp, #44] + 3644 01a4 0246 mov r2, r0 + 3645 01a6 0132 adds r2, r2, #1 + 3646 01a8 01EB4005 add r5, r1, r0, lsl #1 + 3647 01ac 0499 ldr r1, [sp, #16] + 3648 01ae 0592 str r2, [sp, #20] + 3649 01b0 032A cmp r2, #3 + 3650 01b2 01EB4007 add r7, r1, r0, lsl #1 + 3651 01b6 7FF66BAF bls .L597 + 3652 01ba BC46 mov ip, r7 + 3653 01bc 0395 str r5, [sp, #12] + 3654 01be 023F subs r7, r7, #2 + 3655 01c0 1646 mov r6, r2 + 3656 01c2 93E7 b .L598 + 3657 .L677: + 3658 01c4 039B ldr r3, [sp, #12] + 3659 01c6 DDF81CA0 ldr r10, [sp, #28] + 3660 01ca 5B44 add r3, r3, fp + 3661 01cc 9B46 mov fp, r3 + 3662 .L559: + 3663 01ce 1B9B ldr r3, [sp, #108] + 3664 01d0 029A ldr r2, [sp, #8] + 3665 01d2 9B1A subs r3, r3, r2 + 3666 01d4 002B cmp r3, #0 + 3667 01d6 C0F2D081 blt .L609 + 3668 01da 059B ldr r3, [sp, #20] + 3669 01dc 9B1A subs r3, r3, r2 + 3670 01de 019A ldr r2, [sp, #4] + 3671 01e0 02EB4303 add r3, r2, r3, lsl #1 + 3672 01e4 0C93 str r3, [sp, #48] + 3673 .L565: + 3674 01e6 029A ldr r2, [sp, #8] + 3675 01e8 0499 ldr r1, [sp, #16] + 3676 01ea 02F10043 add r3, r2, #-2147483648 + 3677 01ee 013B subs r3, r3, #1 + 3678 01f0 01EB4303 add r3, r1, r3, lsl #1 + 3679 01f4 032A cmp r2, #3 + 3680 01f6 0A93 str r3, [sp, #40] + 3681 01f8 40F29581 bls .L566 + 3682 01fc 0B99 ldr r1, [sp, #44] + 3683 01fe 8908 lsrs r1, r1, #2 + 3684 0200 0D91 str r1, [sp, #52] + 3685 0202 00F05382 beq .L567 + 3686 0206 9008 lsrs r0, r2, #2 + 3687 0208 9C1E subs r4, r3, #2 + 3688 020a C0EB4073 rsb r3, r0, r0, lsl #29 + 3689 020e 04EBC303 add r3, r4, r3, lsl #3 + 3690 0212 0833 adds r3, r3, #8 + 3691 0214 0393 str r3, [sp, #12] + 3692 0216 C300 lsls r3, r0, #3 + 3693 0218 0433 adds r3, r3, #4 + 3694 021a 0593 str r3, [sp, #20] + 3695 021c 02F00303 and r3, r2, #3 + 3696 0220 CA00 lsls r2, r1, #3 + 3697 0222 0E92 str r2, [sp, #56] + ARM GAS /tmp/ccdao7B1.s page 65 + + + 3698 0224 DDF83090 ldr r9, [sp, #48] + 3699 0228 CDF83CA0 str r10, [sp, #60] + 3700 022c 0BEBC102 add r2, fp, r1, lsl #3 + 3701 0230 0790 str r0, [sp, #28] + 3702 0232 0494 str r4, [sp, #16] + 3703 0234 0892 str r2, [sp, #32] + 3704 0236 9A46 mov r10, r3 + 3705 .L573: + 3706 0238 0023 movs r3, #0 + 3707 023a D9F80020 ldr r2, [r9] @ unaligned + 3708 023e D9F80260 ldr r6, [r9, #2] @ unaligned + 3709 0242 DDF810E0 ldr lr, [sp, #16] + 3710 0246 DDF81C80 ldr r8, [sp, #28] + 3711 024a 09F10400 add r0, r9, #4 + 3712 024e 9C46 mov ip, r3 + 3713 0250 1D46 mov r5, r3 + 3714 0252 1C46 mov r4, r3 + 3715 .L568: + 3716 0254 DEF80010 ldr r1, [lr] @ unaligned + 3717 .syntax unified + 3718 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3719 0258 22FB1142 smladx r2, r2, r1, r4 + 3720 @ 0 "" 2 + 3721 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3722 025c 26FB1155 smladx r5, r6, r1, r5 + 3723 @ 0 "" 2 + 3724 .thumb + 3725 .syntax unified + 3726 0260 0468 ldr r4, [r0] @ unaligned + 3727 0262 D0F80270 ldr r7, [r0, #2] @ unaligned + 3728 .syntax unified + 3729 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3730 0266 24FB11CC smladx ip, r4, r1, ip + 3731 @ 0 "" 2 + 3732 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3733 026a 27FB1133 smladx r3, r7, r1, r3 + 3734 @ 0 "" 2 + 3735 .thumb + 3736 .syntax unified + 3737 026e 5EF8041C ldr r1, [lr, #-4] @ unaligned + 3738 0272 AEF1080E sub lr, lr, #8 + 3739 .syntax unified + 3740 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3741 0276 24FB1124 smladx r4, r4, r1, r2 + 3742 @ 0 "" 2 + 3743 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3744 027a 27FB1155 smladx r5, r7, r1, r5 + 3745 @ 0 "" 2 + 3746 .thumb + 3747 .syntax unified + 3748 027e 4268 ldr r2, [r0, #4] @ unaligned + 3749 0280 D0F80660 ldr r6, [r0, #6] @ unaligned + 3750 0284 0830 adds r0, r0, #8 + 3751 .syntax unified + 3752 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3753 0286 22FB11CC smladx ip, r2, r1, ip + 3754 @ 0 "" 2 + ARM GAS /tmp/ccdao7B1.s page 66 + + + 3755 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3756 028a 26FB1133 smladx r3, r6, r1, r3 + 3757 @ 0 "" 2 + 3758 .thumb + 3759 .syntax unified + 3760 028e B8F10108 subs r8, r8, #1 + 3761 0292 DFD1 bne .L568 + 3762 0294 0599 ldr r1, [sp, #20] + 3763 0296 BAF1010F cmp r10, #1 + 3764 029a 4944 add r1, r9, r1 + 3765 029c 00F00F81 beq .L679 + 3766 02a0 BAF1020F cmp r10, #2 + 3767 02a4 00F0FC80 beq .L571 + 3768 02a8 BAF1030F cmp r10, #3 + 3769 02ac 1AD1 bne .L570 + 3770 02ae 0398 ldr r0, [sp, #12] + 3771 02b0 D1F80270 ldr r7, [r1, #2] @ unaligned + 3772 02b4 50F8080C ldr r0, [r0, #-8] @ unaligned + 3773 .syntax unified + 3774 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3775 02b8 22FB1044 smladx r4, r2, r0, r4 + 3776 @ 0 "" 2 + 3777 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3778 02bc 26FB1055 smladx r5, r6, r0, r5 + 3779 @ 0 "" 2 + 3780 .thumb + 3781 .syntax unified + 3782 02c0 0A68 ldr r2, [r1] @ unaligned + 3783 .syntax unified + 3784 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3785 02c2 22FB10CC smladx ip, r2, r0, ip + 3786 @ 0 "" 2 + 3787 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3788 02c6 27FB1033 smladx r3, r7, r0, r3 + 3789 @ 0 "" 2 + 3790 .thumb + 3791 .syntax unified + 3792 02ca 0398 ldr r0, [sp, #12] + 3793 02cc 30F90A0C ldrsh r0, [r0, #-10] + 3794 02d0 80B2 uxth r0, r0 + 3795 .syntax unified + 3796 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3797 02d2 26FB1044 smladx r4, r6, r0, r4 + 3798 @ 0 "" 2 + 3799 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3800 02d6 27FB0055 smlad r5, r7, r0, r5 + 3801 @ 0 "" 2 + 3802 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3803 02da 27FB10CC smladx ip, r7, r0, ip + 3804 @ 0 "" 2 + 3805 .thumb + 3806 .syntax unified + 3807 02de 4A68 ldr r2, [r1, #4] @ unaligned + 3808 .syntax unified + 3809 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3810 02e0 22FB1033 smladx r3, r2, r0, r3 + 3811 @ 0 "" 2 + ARM GAS /tmp/ccdao7B1.s page 67 + + + 3812 .thumb + 3813 .syntax unified + 3814 .L570: + 3815 02e4 CCF3CF3C ubfx ip, ip, #15, #16 + 3816 02e8 DB13 asrs r3, r3, #15 + 3817 02ea 4CEA0343 orr r3, ip, r3, lsl #16 + 3818 02ee C4F3CF34 ubfx r4, r4, #15, #16 + 3819 02f2 ED13 asrs r5, r5, #15 + 3820 02f4 CBF80430 str r3, [fp, #4] @ unaligned + 3821 02f8 44EA0544 orr r4, r4, r5, lsl #16 + 3822 02fc 089B ldr r3, [sp, #32] + 3823 02fe CBF80040 str r4, [fp] @ unaligned + 3824 0302 0BF1080B add fp, fp, #8 + 3825 0306 5B45 cmp r3, fp + 3826 0308 09F10809 add r9, r9, #8 + 3827 030c 94D1 bne .L573 + 3828 030e 0D9B ldr r3, [sp, #52] + 3829 0310 0E9D ldr r5, [sp, #56] + 3830 0312 DDF83CA0 ldr r10, [sp, #60] + 3831 0316 9B00 lsls r3, r3, #2 + 3832 0318 0D93 str r3, [sp, #52] + 3833 031a 0C9B ldr r3, [sp, #48] + 3834 031c 1D44 add r5, r5, r3 + 3835 .L574: + 3836 031e 0B9B ldr r3, [sp, #44] + 3837 0320 13F00300 ands r0, r3, #3 + 3838 0324 00F0C081 beq .L610 + 3839 0328 0D9B ldr r3, [sp, #52] + 3840 032a 0C9A ldr r2, [sp, #48] + 3841 032c CDF814A0 str r10, [sp, #20] + 3842 0330 0133 adds r3, r3, #1 + 3843 0332 02EB4307 add r7, r2, r3, lsl #1 + 3844 0336 029B ldr r3, [sp, #8] + 3845 0338 0A9A ldr r2, [sp, #40] + 3846 033a 4FEA9309 lsr r9, r3, #2 + 3847 033e C9EB4976 rsb r6, r9, r9, lsl #29 + 3848 0342 03F0030E and lr, r3, #3 + 3849 0346 02EBC606 add r6, r2, r6, lsl #3 + 3850 034a A2F10803 sub r3, r2, #8 + 3851 034e B446 mov ip, r6 + 3852 0350 0BEB4000 add r0, fp, r0, lsl #1 + 3853 0354 7646 mov r6, lr + 3854 0356 4FEAC908 lsl r8, r9, #3 + 3855 035a 9E46 mov lr, r3 + 3856 .L579: + 3857 035c 05F10801 add r1, r5, #8 + 3858 0360 7246 mov r2, lr + 3859 0362 4C46 mov r4, r9 + 3860 0364 0023 movs r3, #0 + 3861 0366 0390 str r0, [sp, #12] + 3862 .L576: + 3863 0368 31F808AC ldrh r10, [r1, #-8] + 3864 036c 1089 ldrh r0, [r2, #8] + 3865 036e 1AFB0033 smlabb r3, r10, r0, r3 + 3866 0372 31F806AC ldrh r10, [r1, #-6] + 3867 0376 D088 ldrh r0, [r2, #6] + 3868 0378 1AFB0033 smlabb r3, r10, r0, r3 + ARM GAS /tmp/ccdao7B1.s page 68 + + + 3869 037c 31F804AC ldrh r10, [r1, #-4] + 3870 0380 9088 ldrh r0, [r2, #4] + 3871 0382 1AFB0033 smlabb r3, r10, r0, r3 + 3872 0386 31F802AC ldrh r10, [r1, #-2] + 3873 038a 5088 ldrh r0, [r2, #2] + 3874 038c 013C subs r4, r4, #1 + 3875 038e 01F10801 add r1, r1, #8 + 3876 0392 1AFB0033 smlabb r3, r10, r0, r3 + 3877 0396 A2F10802 sub r2, r2, #8 + 3878 039a E5D1 bne .L576 + 3879 039c 0398 ldr r0, [sp, #12] + 3880 039e 05EB0802 add r2, r5, r8 + 3881 03a2 9EB1 cbz r6, .L577 + 3882 03a4 35F80810 ldrh r1, [r5, r8] + 3883 03a8 BCF80040 ldrh r4, [ip] + 3884 03ac 012E cmp r6, #1 + 3885 03ae 14FB0133 smlabb r3, r4, r1, r3 + 3886 03b2 0BD0 beq .L577 + 3887 03b4 3CF8024C ldrh r4, [ip, #-2] + 3888 03b8 5188 ldrh r1, [r2, #2] + 3889 03ba 022E cmp r6, #2 + 3890 03bc 14FB0133 smlabb r3, r4, r1, r3 + 3891 03c0 04D0 beq .L577 + 3892 03c2 9188 ldrh r1, [r2, #4] + 3893 03c4 3CF8042C ldrh r2, [ip, #-4] + 3894 03c8 11FB0233 smlabb r3, r1, r2, r3 + 3895 .L577: + 3896 03cc DB13 asrs r3, r3, #15 + 3897 03ce 2BF8023B strh r3, [fp], #2 @ movhi + 3898 03d2 8345 cmp fp, r0 + 3899 03d4 3D46 mov r5, r7 + 3900 03d6 07F10207 add r7, r7, #2 + 3901 03da BFD1 bne .L579 + 3902 03dc DDF814A0 ldr r10, [sp, #20] + 3903 .L575: + 3904 03e0 099D ldr r5, [sp, #36] + 3905 03e2 029B ldr r3, [sp, #8] + 3906 03e4 0135 adds r5, r5, #1 + 3907 03e6 ED1A subs r5, r5, r3 + 3908 03e8 019B ldr r3, [sp, #4] + 3909 03ea 5FEA9A0C lsrs ip, r10, #2 + 3910 03ee 03EB4505 add r5, r3, r5, lsl #1 + 3911 03f2 00F06981 beq .L611 + 3912 03f6 069B ldr r3, [sp, #24] + 3913 03f8 002B cmp r3, #0 + 3914 03fa 40F39080 ble .L592 + 3915 03fe 8646 mov lr, r0 + 3916 0400 DDF81080 ldr r8, [sp, #16] + 3917 0404 0698 ldr r0, [sp, #24] + 3918 0406 AAEB0C06 sub r6, r10, ip + 3919 040a BCF1000F cmp ip, #0 + 3920 040e 43D0 beq .L612 + 3921 .L681: + 3922 0410 4446 mov r4, r8 + 3923 0412 2946 mov r1, r5 + 3924 0414 6746 mov r7, ip + 3925 0416 0023 movs r3, #0 + ARM GAS /tmp/ccdao7B1.s page 69 + + + 3926 .L588: + 3927 0418 0A68 ldr r2, [r1] @ unaligned + 3928 041a D4F80090 ldr r9, [r4] @ unaligned + 3929 .syntax unified + 3930 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3931 041e 22FB1933 smladx r3, r2, r9, r3 + 3932 @ 0 "" 2 + 3933 .thumb + 3934 .syntax unified + 3935 0422 4A68 ldr r2, [r1, #4] @ unaligned + 3936 0424 54F8049C ldr r9, [r4, #-4] @ unaligned + 3937 0428 0831 adds r1, r1, #8 + 3938 042a 083C subs r4, r4, #8 + 3939 .syntax unified + 3940 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3941 042c 22FB1933 smladx r3, r2, r9, r3 + 3942 @ 0 "" 2 + 3943 .thumb + 3944 .syntax unified + 3945 0430 013F subs r7, r7, #1 + 3946 0432 F1D1 bne .L588 + 3947 0434 CCEB4C72 rsb r2, ip, ip, lsl #29 + 3948 0438 08EBC202 add r2, r8, r2, lsl #3 + 3949 043c 05EBCC0C add ip, r5, ip, lsl #3 + 3950 0440 0232 adds r2, r2, #2 + 3951 .L587: + 3952 0442 1AF00301 ands r1, r10, #3 + 3953 0446 15D0 beq .L589 + 3954 0448 BCF90040 ldrsh r4, [ip] + 3955 044c B2F90070 ldrsh r7, [r2] + 3956 .syntax unified + 3957 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3958 0450 24FB0733 smlad r3, r4, r7, r3 + 3959 @ 0 "" 2 + 3960 .thumb + 3961 .syntax unified + 3962 0454 0139 subs r1, r1, #1 + 3963 0456 0DD0 beq .L589 + 3964 0458 BCF90240 ldrsh r4, [ip, #2] + 3965 045c 32F9027C ldrsh r7, [r2, #-2] + 3966 .syntax unified + 3967 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3968 0460 24FB0733 smlad r3, r4, r7, r3 + 3969 @ 0 "" 2 + 3970 .thumb + 3971 .syntax unified + 3972 0464 0129 cmp r1, #1 + 3973 0466 05D0 beq .L589 + 3974 0468 BCF90410 ldrsh r1, [ip, #4] + 3975 046c 32F9042C ldrsh r2, [r2, #-4] + 3976 .syntax unified + 3977 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3978 0470 21FB0233 smlad r3, r1, r2, r3 + 3979 @ 0 "" 2 + 3980 .thumb + 3981 .syntax unified + 3982 .L589: + ARM GAS /tmp/ccdao7B1.s page 70 + + + 3983 0474 0AF1FF3A add r10, r10, #-1 + 3984 0478 DB13 asrs r3, r3, #15 + 3985 047a B245 cmp r10, r6 + 3986 047c 2EF8023B strh r3, [lr], #2 @ movhi + 3987 0480 05F10205 add r5, r5, #2 + 3988 0484 00F1FF30 add r0, r0, #-1 + 3989 0488 29D0 beq .L680 + 3990 048a 0028 cmp r0, #0 + 3991 048c 47D0 beq .L592 + 3992 048e 4FEA9A0C lsr ip, r10, #2 + 3993 0492 BCF1000F cmp ip, #0 + 3994 0496 BBD1 bne .L681 + 3995 .L612: + 3996 0498 6346 mov r3, ip + 3997 049a 0A9A ldr r2, [sp, #40] + 3998 049c AC46 mov ip, r5 + 3999 049e D0E7 b .L587 + 4000 .L571: + 4001 04a0 0398 ldr r0, [sp, #12] + 4002 04a2 50F8080C ldr r0, [r0, #-8] @ unaligned + 4003 .syntax unified + 4004 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4005 04a6 22FB1044 smladx r4, r2, r0, r4 + 4006 @ 0 "" 2 + 4007 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4008 04aa 26FB1055 smladx r5, r6, r0, r5 + 4009 @ 0 "" 2 + 4010 .thumb + 4011 .syntax unified + 4012 04ae 0A68 ldr r2, [r1] @ unaligned + 4013 .syntax unified + 4014 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4015 04b0 22FB10CC smladx ip, r2, r0, ip + 4016 @ 0 "" 2 + 4017 .thumb + 4018 .syntax unified + 4019 04b4 D1F80220 ldr r2, [r1, #2] @ unaligned + 4020 .syntax unified + 4021 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4022 04b8 22FB1033 smladx r3, r2, r0, r3 + 4023 @ 0 "" 2 + 4024 .thumb + 4025 .syntax unified + 4026 04bc 12E7 b .L570 + 4027 .L679: + 4028 04be 0399 ldr r1, [sp, #12] + 4029 04c0 31F9061C ldrsh r1, [r1, #-6] + 4030 04c4 89B2 uxth r1, r1 + 4031 .syntax unified + 4032 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4033 04c6 22FB0144 smlad r4, r2, r1, r4 + 4034 @ 0 "" 2 + 4035 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4036 04ca 26FB0155 smlad r5, r6, r1, r5 + 4037 @ 0 "" 2 + 4038 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4039 04ce 26FB11CC smladx ip, r6, r1, ip + ARM GAS /tmp/ccdao7B1.s page 71 + + + 4040 @ 0 "" 2 + 4041 .thumb + 4042 .syntax unified + 4043 04d2 059A ldr r2, [sp, #20] + 4044 04d4 59F80220 ldr r2, [r9, r2] @ unaligned + 4045 .syntax unified + 4046 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4047 04d8 22FB1133 smladx r3, r2, r1, r3 + 4048 @ 0 "" 2 + 4049 .thumb + 4050 .syntax unified + 4051 04dc 02E7 b .L570 + 4052 .L680: + 4053 04de 0690 str r0, [sp, #24] + 4054 04e0 7046 mov r0, lr + 4055 .L585: + 4056 04e2 069B ldr r3, [sp, #24] + 4057 04e4 002B cmp r3, #0 + 4058 04e6 1ADD ble .L592 + 4059 04e8 DDF82880 ldr r8, [sp, #40] + 4060 04ec 05EB430E add lr, r5, r3, lsl #1 + 4061 .L593: + 4062 04f0 3246 mov r2, r6 + 4063 04f2 6EB1 cbz r6, .L596 + 4064 04f4 4446 mov r4, r8 + 4065 04f6 2946 mov r1, r5 + 4066 04f8 3346 mov r3, r6 + 4067 04fa 0022 movs r2, #0 + 4068 .L595: + 4069 04fc 31F9027B ldrsh r7, [r1], #2 + 4070 0500 34F902C9 ldrsh ip, [r4], #-2 + 4071 .syntax unified + 4072 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4073 0504 27FB0C22 smlad r2, r7, ip, r2 + 4074 @ 0 "" 2 + 4075 .thumb + 4076 .syntax unified + 4077 0508 013B subs r3, r3, #1 + 4078 050a F7D1 bne .L595 + 4079 050c 42F3CF32 sbfx r2, r2, #15, #16 + 4080 .L596: + 4081 0510 0235 adds r5, r5, #2 + 4082 0512 7545 cmp r5, lr + 4083 0514 20F8022B strh r2, [r0], #2 @ movhi + 4084 0518 06F1FF36 add r6, r6, #-1 + 4085 051c E8D1 bne .L593 + 4086 .L592: + 4087 051e 0020 movs r0, #0 + 4088 .L674: + 4089 0520 11B0 add sp, sp, #68 + 4090 @ sp needed + 4091 0522 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4092 .L566: + 4093 0526 0B9B ldr r3, [sp, #44] + 4094 0528 002B cmp r3, #0 + 4095 052a 00F0C880 beq .L682 + 4096 052e 1146 mov r1, r2 + ARM GAS /tmp/ccdao7B1.s page 72 + + + 4097 0530 0A9C ldr r4, [sp, #40] + 4098 0532 0C9A ldr r2, [sp, #48] + 4099 0534 0BEB4300 add r0, fp, r3, lsl #1 + 4100 .L582: + 4101 0538 E9B1 cbz r1, .L683 + 4102 053a 1588 ldrh r5, [r2] + 4103 053c 2388 ldrh r3, [r4] + 4104 053e 0129 cmp r1, #1 + 4105 0540 13FB05F3 smulbb r3, r3, r5 + 4106 0544 0BD0 beq .L581 + 4107 0546 5588 ldrh r5, [r2, #2] + 4108 0548 34F8026C ldrh r6, [r4, #-2] + 4109 054c 0229 cmp r1, #2 + 4110 054e 16FB0533 smlabb r3, r6, r5, r3 + 4111 0552 04D0 beq .L581 + 4112 0554 9688 ldrh r6, [r2, #4] + 4113 0556 34F8045C ldrh r5, [r4, #-4] + 4114 055a 16FB0533 smlabb r3, r6, r5, r3 + 4115 .L581: + 4116 055e 43F3CF33 sbfx r3, r3, #15, #16 + 4117 .L584: + 4118 0562 2BF8023B strh r3, [fp], #2 @ movhi + 4119 0566 5845 cmp r0, fp + 4120 0568 02F10202 add r2, r2, #2 + 4121 056c E4D1 bne .L582 + 4122 056e 0A9B ldr r3, [sp, #40] + 4123 0570 023B subs r3, r3, #2 + 4124 0572 0493 str r3, [sp, #16] + 4125 0574 34E7 b .L575 + 4126 .L683: + 4127 0576 0B46 mov r3, r1 + 4128 0578 F3E7 b .L584 + 4129 .L609: + 4130 057a 019B ldr r3, [sp, #4] + 4131 057c 0C93 str r3, [sp, #48] + 4132 057e 32E6 b .L565 + 4133 .L550: + 4134 0580 1B9B ldr r3, [sp, #108] + 4135 0582 0699 ldr r1, [sp, #24] + 4136 0584 0B44 add r3, r3, r1 + 4137 0586 D21A subs r2, r2, r3 + 4138 0588 22EAE273 bic r3, r2, r2, asr #31 + 4139 058c 0B93 str r3, [sp, #44] + 4140 058e DDE91A32 ldrd r3, r2, [sp, #104] + 4141 0592 03EB420B add fp, r3, r2, lsl #1 + 4142 0596 1346 mov r3, r2 + 4143 0598 0133 adds r3, r3, #1 + 4144 059a 0593 str r3, [sp, #20] + 4145 059c 17E6 b .L559 + 4146 .L555: + 4147 059e AB46 mov fp, r5 + 4148 05a0 C013 asrs r0, r0, #15 + 4149 05a2 591E subs r1, r3, #1 + 4150 05a4 059B ldr r3, [sp, #20] + 4151 05a6 2BF8020B strh r0, [fp], #2 @ movhi + 4152 05aa BA1C adds r2, r7, #2 + 4153 05ac 5E1C adds r6, r3, #1 + ARM GAS /tmp/ccdao7B1.s page 73 + + + 4154 .L600: + 4155 05ae 0029 cmp r1, #0 + 4156 05b0 3FF40DAE beq .L559 + 4157 05b4 019F ldr r7, [sp, #4] + 4158 05b6 B2F90000 ldrsh r0, [r2] + 4159 05ba B7F90030 ldrsh r3, [r7] + 4160 05be 0024 movs r4, #0 + 4161 .syntax unified + 4162 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4163 05c0 23FB0043 smlad r3, r3, r0, r4 + 4164 @ 0 "" 2 + 4165 .thumb + 4166 .syntax unified + 4167 05c4 741E subs r4, r6, #1 + 4168 05c6 1D46 mov r5, r3 + 4169 05c8 19D0 beq .L557 + 4170 05ca B7F90200 ldrsh r0, [r7, #2] + 4171 05ce 32F9025C ldrsh r5, [r2, #-2] + 4172 .syntax unified + 4173 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4174 05d2 20FB0533 smlad r3, r0, r5, r3 + 4175 @ 0 "" 2 + 4176 .thumb + 4177 .syntax unified + 4178 05d6 012C cmp r4, #1 + 4179 05d8 1D46 mov r5, r3 + 4180 05da 10D0 beq .L557 + 4181 05dc B7F90400 ldrsh r0, [r7, #4] + 4182 05e0 32F9044C ldrsh r4, [r2, #-4] + 4183 .syntax unified + 4184 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4185 05e4 20FB0433 smlad r3, r0, r4, r3 + 4186 @ 0 "" 2 + 4187 .thumb + 4188 .syntax unified + 4189 05e8 5846 mov r0, fp + 4190 05ea DB13 asrs r3, r3, #15 + 4191 05ec 20F8023B strh r3, [r0], #2 @ movhi + 4192 05f0 0136 adds r6, r6, #1 + 4193 05f2 0390 str r0, [sp, #12] + 4194 05f4 4B1E subs r3, r1, #1 + 4195 05f6 02F1020C add ip, r2, #2 + 4196 05fa 1746 mov r7, r2 + 4197 05fc 73E5 b .L556 + 4198 .L557: + 4199 05fe 5B46 mov r3, fp + 4200 0600 ED13 asrs r5, r5, #15 + 4201 0602 23F8025B strh r5, [r3], #2 @ movhi + 4202 0606 0129 cmp r1, #1 + 4203 0608 02F1020E add lr, r2, #2 + 4204 060c 06F10104 add r4, r6, #1 + 4205 0610 08BF it eq + 4206 0612 9B46 moveq fp, r3 + 4207 0614 3FF4DBAD beq .L559 + 4208 0618 019F ldr r7, [sp, #4] + 4209 061a B2F90230 ldrsh r3, [r2, #2] + 4210 061e B7F90000 ldrsh r0, [r7] + ARM GAS /tmp/ccdao7B1.s page 74 + + + 4211 0622 0025 movs r5, #0 + 4212 .syntax unified + 4213 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4214 0624 20FB0350 smlad r0, r0, r3, r5 + 4215 @ 0 "" 2 + 4216 .thumb + 4217 .syntax unified + 4218 0628 B7F90230 ldrsh r3, [r7, #2] + 4219 062c B2F90050 ldrsh r5, [r2] + 4220 .syntax unified + 4221 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4222 0630 23FB0503 smlad r3, r3, r5, r0 + 4223 @ 0 "" 2 + 4224 .thumb + 4225 .syntax unified + 4226 0634 022C cmp r4, #2 + 4227 0636 05D0 beq .L558 + 4228 0638 B7F90400 ldrsh r0, [r7, #4] + 4229 063c 32F9024C ldrsh r4, [r2, #-2] + 4230 .syntax unified + 4231 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4232 0640 20FB0433 smlad r3, r0, r4, r3 + 4233 @ 0 "" 2 + 4234 .thumb + 4235 .syntax unified + 4236 .L558: + 4237 0644 DB13 asrs r3, r3, #15 + 4238 0646 ABF80230 strh r3, [fp, #2] @ movhi + 4239 064a 012E cmp r6, #1 + 4240 064c 0BF10403 add r3, fp, #4 + 4241 0650 0393 str r3, [sp, #12] + 4242 0652 02F10407 add r7, r2, #4 + 4243 0656 A1F10203 sub r3, r1, #2 + 4244 065a 3AD1 bne .L604 + 4245 065c B3B3 cbz r3, .L606 + 4246 065e 019D ldr r5, [sp, #4] + 4247 0660 B2F90400 ldrsh r0, [r2, #4] + 4248 0664 B5F90030 ldrsh r3, [r5] + 4249 0668 0024 movs r4, #0 + 4250 .syntax unified + 4251 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4252 066a 23FB0043 smlad r3, r3, r0, r4 + 4253 @ 0 "" 2 + 4254 .thumb + 4255 .syntax unified + 4256 066e B5F90200 ldrsh r0, [r5, #2] + 4257 0672 B2F90240 ldrsh r4, [r2, #2] + 4258 .syntax unified + 4259 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4260 0676 20FB0430 smlad r0, r0, r4, r3 + 4261 @ 0 "" 2 + 4262 .thumb + 4263 .syntax unified + 4264 067a 9446 mov ip, r2 + 4265 067c B5F90430 ldrsh r3, [r5, #4] + 4266 0680 3CF9062B ldrsh r2, [ip], #6 + 4267 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 75 + + + 4268 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4269 0684 23FB0203 smlad r3, r3, r2, r0 + 4270 @ 0 "" 2 + 4271 .thumb + 4272 .syntax unified + 4273 0688 DB13 asrs r3, r3, #15 + 4274 068a ABF80430 strh r3, [fp, #4] @ movhi + 4275 068e 0BF10603 add r3, fp, #6 + 4276 0692 0393 str r3, [sp, #12] + 4277 0694 0426 movs r6, #4 + 4278 0696 CB1E subs r3, r1, #3 + 4279 0698 25E5 b .L556 + 4280 .L554: + 4281 069a AB46 mov fp, r5 + 4282 069c BA1C adds r2, r7, #2 + 4283 069e 2BF8026B strh r6, [fp], #2 @ movhi + 4284 06a2 591E subs r1, r3, #1 + 4285 06a4 0126 movs r6, #1 + 4286 06a6 82E7 b .L600 + 4287 .L610: + 4288 06a8 5846 mov r0, fp + 4289 06aa 99E6 b .L575 + 4290 .L567: + 4291 06ac 023B subs r3, r3, #2 + 4292 06ae 0C9D ldr r5, [sp, #48] + 4293 06b0 0493 str r3, [sp, #16] + 4294 06b2 34E6 b .L574 + 4295 .L552: + 4296 06b4 BC46 mov ip, r7 + 4297 06b6 1646 mov r6, r2 + 4298 06b8 0395 str r5, [sp, #12] + 4299 06ba 023F subs r7, r7, #2 + 4300 06bc 13E5 b .L556 + 4301 .L682: + 4302 06be 0A9B ldr r3, [sp, #40] + 4303 06c0 023B subs r3, r3, #2 + 4304 06c2 5846 mov r0, fp + 4305 06c4 0493 str r3, [sp, #16] + 4306 06c6 8BE6 b .L575 + 4307 .L611: + 4308 06c8 5646 mov r6, r10 + 4309 06ca 0AE7 b .L585 + 4310 .L606: + 4311 06cc DDF80CB0 ldr fp, [sp, #12] + 4312 06d0 7DE5 b .L559 + 4313 .L604: + 4314 06d2 BC46 mov ip, r7 + 4315 06d4 0426 movs r6, #4 + 4316 06d6 7746 mov r7, lr + 4317 06d8 05E5 b .L556 + 4318 .L601: + 4319 06da 4FF0FF30 mov r0, #-1 + 4320 06de 1FE7 b .L674 + 4321 .L603: + 4322 06e0 AB46 mov fp, r5 + 4323 06e2 74E5 b .L559 + 4325 .section .text.arm_conv_partial_fast_q31,"ax",%progbits + ARM GAS /tmp/ccdao7B1.s page 76 + + + 4326 .align 1 + 4327 .p2align 2,,3 + 4328 .global arm_conv_partial_fast_q31 + 4329 .syntax unified + 4330 .thumb + 4331 .thumb_func + 4332 .fpu fpv4-sp-d16 + 4334 arm_conv_partial_fast_q31: + 4335 @ args = 12, pretend = 0, frame = 32 + 4336 @ frame_needed = 0, uses_anonymous_args = 0 + 4337 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4338 0004 89B0 sub sp, sp, #36 + 4339 0006 DDE91357 ldrd r5, r7, [sp, #76] + 4340 000a 4E1E subs r6, r1, #1 + 4341 000c 1C46 mov r4, r3 + 4342 000e 0193 str r3, [sp, #4] + 4343 0010 9446 mov ip, r2 + 4344 0012 0292 str r2, [sp, #8] + 4345 0014 F318 adds r3, r6, r3 + 4346 0016 EA19 adds r2, r5, r7 + 4347 0018 9A42 cmp r2, r3 + 4348 001a 0490 str r0, [sp, #16] + 4349 001c 00F2F780 bhi .L710 + 4350 0020 8C42 cmp r4, r1 + 4351 0022 05D8 bhi .L686 + 4352 0024 0191 str r1, [sp, #4] + 4353 0026 0290 str r0, [sp, #8] + 4354 0028 CDF810C0 str ip, [sp, #16] + 4355 002c 661E subs r6, r4, #1 + 4356 002e 2146 mov r1, r4 + 4357 .L686: + 4358 0030 019B ldr r3, [sp, #4] + 4359 0032 1398 ldr r0, [sp, #76] + 4360 0034 9A42 cmp r2, r3 + 4361 0036 CCBF ite gt + 4362 0038 D31A subgt r3, r2, r3 + 4363 003a 0023 movle r3, #0 + 4364 003c 0393 str r3, [sp, #12] + 4365 003e 019B ldr r3, [sp, #4] + 4366 0040 8342 cmp r3, r0 + 4367 0042 03DC bgt .L688 + 4368 0044 1B1A subs r3, r3, r0 + 4369 0046 0398 ldr r0, [sp, #12] + 4370 0048 1844 add r0, r0, r3 + 4371 004a 0390 str r0, [sp, #12] + 4372 .L688: + 4373 004c 139B ldr r3, [sp, #76] + 4374 004e DB43 mvns r3, r3 + 4375 0050 5B18 adds r3, r3, r1 + 4376 0052 40D0 beq .L737 + 4377 0054 B242 cmp r2, r6 + 4378 0056 00F2C680 bhi .L691 + 4379 005a 039B ldr r3, [sp, #12] + 4380 005c 5B42 rsbs r3, r3, #0 + 4381 005e 0593 str r3, [sp, #20] + 4382 0060 DDE91232 ldrd r3, r2, [sp, #72] + 4383 0064 03EB8207 add r7, r3, r2, lsl #2 + ARM GAS /tmp/ccdao7B1.s page 77 + + + 4384 0068 049B ldr r3, [sp, #16] + 4385 006a 03EB820A add r10, r3, r2, lsl #2 + 4386 006e 149B ldr r3, [sp, #80] + 4387 0070 02F10109 add r9, r2, #1 + 4388 0074 BBB3 cbz r3, .L690 + 4389 .L692: + 4390 0076 149B ldr r3, [sp, #80] + 4391 0078 DDF80880 ldr r8, [sp, #8] + 4392 007c 4B44 add r3, r9, r3 + 4393 007e CDE90667 strd r6, r7, [sp, #24] + 4394 0082 9E46 mov lr, r3 + 4395 0084 0B46 mov r3, r1 + 4396 0086 BB46 mov fp, r7 + 4397 0088 4946 mov r1, r9 + 4398 008a 0025 movs r5, #0 + 4399 008c 9946 mov r9, r3 + 4400 .L694: + 4401 008e 0C46 mov r4, r1 + 4402 0090 69B1 cbz r1, .L696 + 4403 0092 0B46 mov r3, r1 + 4404 0094 5746 mov r7, r10 + 4405 0096 4646 mov r6, r8 + 4406 0098 0024 movs r4, #0 + 4407 .L693: + 4408 009a 56F8040B ldr r0, [r6], #4 + 4409 009e 57F80429 ldr r2, [r7], #-4 + 4410 00a2 AC46 mov ip, r5 + 4411 00a4 013B subs r3, r3, #1 + 4412 00a6 C0FB02C4 smlal ip, r4, r0, r2 + 4413 00aa F6D1 bne .L693 + 4414 00ac 6400 lsls r4, r4, #1 + 4415 .L696: + 4416 00ae 0131 adds r1, r1, #1 + 4417 00b0 7145 cmp r1, lr + 4418 00b2 4BF8044B str r4, [fp], #4 + 4419 00b6 0AF1040A add r10, r10, #4 + 4420 00ba E8D1 bne .L694 + 4421 00bc DDE90667 ldrd r6, r7, [sp, #24] + 4422 00c0 149B ldr r3, [sp, #80] + 4423 00c2 07EB8307 add r7, r7, r3, lsl #2 + 4424 00c6 139B ldr r3, [sp, #76] + 4425 00c8 4946 mov r1, r9 + 4426 00ca 5B1A subs r3, r3, r1 + 4427 00cc 002B cmp r3, #0 + 4428 00ce 0EDA bge .L738 + 4429 .L713: + 4430 00d0 DDF80890 ldr r9, [sp, #8] + 4431 00d4 13E0 b .L697 + 4432 .L737: + 4433 00d6 039A ldr r2, [sp, #12] + 4434 00d8 149B ldr r3, [sp, #80] + 4435 00da 9B1A subs r3, r3, r2 + 4436 00dc 0593 str r3, [sp, #20] + 4437 00de DDE91232 ldrd r3, r2, [sp, #72] + 4438 00e2 03EB8207 add r7, r3, r2, lsl #2 + 4439 .L690: + 4440 00e6 139B ldr r3, [sp, #76] + ARM GAS /tmp/ccdao7B1.s page 78 + + + 4441 00e8 5B1A subs r3, r3, r1 + 4442 00ea 002B cmp r3, #0 + 4443 00ec F0DB blt .L713 + 4444 .L738: + 4445 00ee 139B ldr r3, [sp, #76] + 4446 00f0 03F10109 add r9, r3, #1 + 4447 00f4 029B ldr r3, [sp, #8] + 4448 00f6 A9EB0109 sub r9, r9, r1 + 4449 00fa 03EB8909 add r9, r3, r9, lsl #2 + 4450 .L697: + 4451 00fe 049B ldr r3, [sp, #16] + 4452 0100 01F1804B add fp, r1, #1073741824 + 4453 0104 0BF1FF3B add fp, fp, #-1 + 4454 0108 0329 cmp r1, #3 + 4455 010a 03EB8B0B add fp, r3, fp, lsl #2 + 4456 010e 059B ldr r3, [sp, #20] + 4457 0110 4FD8 bhi .L698 + 4458 0112 002B cmp r3, #0 + 4459 0114 79D0 beq .L715 + 4460 0116 07EB830A add r10, r7, r3, lsl #2 + 4461 011a 0025 movs r5, #0 + 4462 .L700: + 4463 011c 0029 cmp r1, #0 + 4464 011e 46D0 beq .L739 + 4465 0120 D9F80030 ldr r3, [r9] + 4466 0124 DBF80020 ldr r2, [fp] + 4467 0128 0129 cmp r1, #1 + 4468 012a 82FB0323 smull r2, r3, r2, r3 + 4469 012e 0FD0 beq .L703 + 4470 0130 D9F80420 ldr r2, [r9, #4] + 4471 0134 5BF8040C ldr r0, [fp, #-4] + 4472 0138 2C46 mov r4, r5 + 4473 013a 0229 cmp r1, #2 + 4474 013c C0FB0243 smlal r4, r3, r0, r2 + 4475 0140 06D0 beq .L703 + 4476 0142 D9F80800 ldr r0, [r9, #8] + 4477 0146 5BF8082C ldr r2, [fp, #-8] + 4478 014a 2C46 mov r4, r5 + 4479 014c C0FB0243 smlal r4, r3, r0, r2 + 4480 .L703: + 4481 0150 5B00 lsls r3, r3, #1 + 4482 .L705: + 4483 0152 47F8043B str r3, [r7], #4 + 4484 0156 5745 cmp r7, r10 + 4485 0158 09F10409 add r9, r9, #4 + 4486 015c DED1 bne .L700 + 4487 .L699: + 4488 015e 019B ldr r3, [sp, #4] + 4489 0160 03F1010E add lr, r3, #1 + 4490 0164 029B ldr r3, [sp, #8] + 4491 0166 AEEB0101 sub r1, lr, r1 + 4492 016a 03EB810E add lr, r3, r1, lsl #2 + 4493 016e 039B ldr r3, [sp, #12] + 4494 0170 CBB1 cbz r3, .L706 + 4495 0172 A6EB0308 sub r8, r6, r3 + 4496 0176 0027 movs r7, #0 + 4497 .L707: + ARM GAS /tmp/ccdao7B1.s page 79 + + + 4498 0178 3046 mov r0, r6 + 4499 017a 6EB1 cbz r6, .L709 + 4500 017c 3346 mov r3, r6 + 4501 017e 5D46 mov r5, fp + 4502 0180 7446 mov r4, lr + 4503 0182 0020 movs r0, #0 + 4504 .L708: + 4505 0184 54F8041B ldr r1, [r4], #4 + 4506 0188 55F80429 ldr r2, [r5], #-4 + 4507 018c BC46 mov ip, r7 + 4508 018e 013B subs r3, r3, #1 + 4509 0190 C1FB02C0 smlal ip, r0, r1, r2 + 4510 0194 F6D1 bne .L708 + 4511 0196 4000 lsls r0, r0, #1 + 4512 .L709: + 4513 0198 013E subs r6, r6, #1 + 4514 019a 4645 cmp r6, r8 + 4515 019c 4AF8040B str r0, [r10], #4 + 4516 01a0 0EF1040E add lr, lr, #4 + 4517 01a4 E8D1 bne .L707 + 4518 .L706: + 4519 01a6 0020 movs r0, #0 + 4520 .L733: + 4521 01a8 09B0 add sp, sp, #36 + 4522 @ sp needed + 4523 01aa BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4524 .L739: + 4525 01ae 0B46 mov r3, r1 + 4526 01b0 CFE7 b .L705 + 4527 .L698: + 4528 01b2 53B3 cbz r3, .L715 + 4529 01b4 07EB830A add r10, r7, r3, lsl #2 + 4530 01b8 4FF0000E mov lr, #0 + 4531 .L702: + 4532 01bc 0B46 mov r3, r1 + 4533 01be DC46 mov ip, fp + 4534 01c0 4D46 mov r5, r9 + 4535 01c2 0024 movs r4, #0 + 4536 .L701: + 4537 01c4 55F8040B ldr r0, [r5], #4 + 4538 01c8 5CF80429 ldr r2, [ip], #-4 + 4539 01cc F046 mov r8, lr + 4540 01ce 013B subs r3, r3, #1 + 4541 01d0 C0FB0284 smlal r8, r4, r0, r2 + 4542 01d4 F6D1 bne .L701 + 4543 01d6 6400 lsls r4, r4, #1 + 4544 01d8 47F8044B str r4, [r7], #4 + 4545 01dc 5745 cmp r7, r10 + 4546 01de 09F10409 add r9, r9, #4 + 4547 01e2 EBD1 bne .L702 + 4548 01e4 BBE7 b .L699 + 4549 .L691: + 4550 01e6 149A ldr r2, [sp, #80] + 4551 01e8 1493 str r3, [sp, #80] + 4552 01ea A2EB030A sub r10, r2, r3 + 4553 01ee 039A ldr r2, [sp, #12] + 4554 01f0 AAEB0202 sub r2, r10, r2 + ARM GAS /tmp/ccdao7B1.s page 80 + + + 4555 01f4 0592 str r2, [sp, #20] + 4556 01f6 DDE91232 ldrd r3, r2, [sp, #72] + 4557 01fa 03EB8207 add r7, r3, r2, lsl #2 + 4558 01fe 049B ldr r3, [sp, #16] + 4559 0200 02F10109 add r9, r2, #1 + 4560 0204 03EB820A add r10, r3, r2, lsl #2 + 4561 0208 35E7 b .L692 + 4562 .L715: + 4563 020a BA46 mov r10, r7 + 4564 020c A7E7 b .L699 + 4565 .L710: + 4566 020e 4FF0FF30 mov r0, #-1 + 4567 0212 C9E7 b .L733 + 4569 .section .text.arm_conv_partial_opt_q15,"ax",%progbits + 4570 .align 1 + 4571 .p2align 2,,3 + 4572 .global arm_conv_partial_opt_q15 + 4573 .syntax unified + 4574 .thumb + 4575 .thumb_func + 4576 .fpu fpv4-sp-d16 + 4578 arm_conv_partial_opt_q15: + 4579 @ args = 20, pretend = 0, frame = 16 + 4580 @ frame_needed = 0, uses_anonymous_args = 0 + 4581 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4582 0004 85B0 sub sp, sp, #20 + 4583 0006 DDE90F96 ldrd r9, r6, [sp, #60] + 4584 000a 01F1FF3B add fp, r1, #-1 + 4585 000e 1F46 mov r7, r3 + 4586 0010 9246 mov r10, r2 + 4587 0012 5B44 add r3, r3, fp + 4588 0014 09EB0602 add r2, r9, r6 + 4589 0018 9A42 cmp r2, r3 + 4590 001a DDF84480 ldr r8, [sp, #68] + 4591 001e 00F28980 bhi .L753 + 4592 0022 8F42 cmp r7, r1 + 4593 0024 0C46 mov r4, r1 + 4594 0026 7CD9 bls .L762 + 4595 .L742: + 4596 0028 04F10045 add r5, r4, #-2147483648 + 4597 002c 013D subs r5, r5, #1 + 4598 002e 6D00 lsls r5, r5, #1 + 4599 0030 4CB1 cbz r4, .L747 + 4600 0032 129B ldr r3, [sp, #72] + 4601 0034 AA1C adds r2, r5, #2 + 4602 0036 1A44 add r2, r2, r3 + 4603 0038 2346 mov r3, r4 + 4604 .L746: + 4605 003a 30F9021B ldrsh r1, [r0], #2 + 4606 003e 22F8021D strh r1, [r2, #-2]! @ movhi + 4607 0042 013B subs r3, r3, #1 + 4608 0044 F9D1 bne .L746 + 4609 .L747: + 4610 0046 4544 add r5, r5, r8 + 4611 0048 4146 mov r1, r8 + 4612 004a 5A46 mov r2, fp + 4613 004c 0020 movs r0, #0 + ARM GAS /tmp/ccdao7B1.s page 81 + + + 4614 004e FFF7FEFF bl arm_fill_q15 + 4615 0052 5046 mov r0, r10 + 4616 0054 2946 mov r1, r5 + 4617 0056 3A46 mov r2, r7 + 4618 0058 FFF7FEFF bl arm_copy_q15 + 4619 005c 5A46 mov r2, fp + 4620 005e 05EB4701 add r1, r5, r7, lsl #1 + 4621 0062 0020 movs r0, #0 + 4622 0064 FFF7FEFF bl arm_fill_q15 + 4623 0068 0E9B ldr r3, [sp, #56] + 4624 006a 08EB4908 add r8, r8, r9, lsl #1 + 4625 006e 03EB4909 add r9, r3, r9, lsl #1 + 4626 0072 AEB3 cbz r6, .L745 + 4627 0074 4FEA540B lsr fp, r4, #1 + 4628 0078 04F00103 and r3, r4, #1 + 4629 007c 0293 str r3, [sp, #8] + 4630 007e 4FEA8B03 lsl r3, fp, #2 + 4631 0082 0393 str r3, [sp, #12] + 4632 0084 129B ldr r3, [sp, #72] + 4633 0086 03EB8B0A add r10, r3, fp, lsl #2 + 4634 .L752: + 4635 008a BBF1000F cmp fp, #0 + 4636 008e 41D0 beq .L754 + 4637 .L764: + 4638 0090 DDF848E0 ldr lr, [sp, #72] + 4639 0094 C446 mov ip, r8 + 4640 0096 5C46 mov r4, fp + 4641 0098 0022 movs r2, #0 + 4642 009a 0023 movs r3, #0 + 4643 .L749: + 4644 009c 5CF8045B ldr r5, [ip], #4 @ unaligned + 4645 00a0 5EF8047B ldr r7, [lr], #4 @ unaligned + 4646 00a4 1046 mov r0, r2 + 4647 00a6 1946 mov r1, r3 + 4648 .syntax unified + 4649 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4650 00a8 C5FBC701 smlald r0, r1, r5, r7 + 4651 @ 0 "" 2 + 4652 .thumb + 4653 .syntax unified + 4654 00ac 013C subs r4, r4, #1 + 4655 00ae 0246 mov r2, r0 + 4656 00b0 0B46 mov r3, r1 + 4657 00b2 F3D1 bne .L749 + 4658 00b4 CDE90023 strd r2, [sp] + 4659 00b8 039B ldr r3, [sp, #12] + 4660 00ba 5146 mov r1, r10 + 4661 00bc 08EB0300 add r0, r8, r3 + 4662 .L748: + 4663 00c0 029B ldr r3, [sp, #8] + 4664 00c2 8BB9 cbnz r3, .L763 + 4665 00c4 DDE90001 ldrd r0, [sp] + 4666 00c8 013E subs r6, r6, #1 + 4667 00ca 4FEAD032 lsr r2, r0, #15 + 4668 00ce 42EA4142 orr r2, r2, r1, lsl #17 + 4669 00d2 08F10208 add r8, r8, #2 + 4670 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 82 + + + 4671 @ 367 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 4672 00d6 02F30F02 ssat r2, #16, r2 + 4673 @ 0 "" 2 + 4674 .thumb + 4675 .syntax unified + 4676 00da 29F8022B strh r2, [r9], #2 @ movhi + 4677 00de D4D1 bne .L752 + 4678 .L745: + 4679 00e0 0020 movs r0, #0 + 4680 .L741: + 4681 00e2 05B0 add sp, sp, #20 + 4682 @ sp needed + 4683 00e4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4684 .L763: + 4685 00e8 DDE90023 ldrd r2, [sp] + 4686 00ec 0C88 ldrh r4, [r1] + 4687 00ee 0588 ldrh r5, [r0] + 4688 00f0 C5FB8423 smlalbb r2, r3, r5, r4 + 4689 00f4 1946 mov r1, r3 + 4690 00f6 013E subs r6, r6, #1 + 4691 00f8 4FEAD233 lsr r3, r2, #15 + 4692 00fc 43EA4143 orr r3, r3, r1, lsl #17 + 4693 0100 08F10208 add r8, r8, #2 + 4694 .syntax unified + 4695 @ 367 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 4696 0104 03F30F03 ssat r3, #16, r3 + 4697 @ 0 "" 2 + 4698 .thumb + 4699 .syntax unified + 4700 0108 29F8023B strh r3, [r9], #2 @ movhi + 4701 010c E8D0 beq .L745 + 4702 010e BBF1000F cmp fp, #0 + 4703 0112 BDD1 bne .L764 + 4704 .L754: + 4705 0114 0023 movs r3, #0 + 4706 0116 0024 movs r4, #0 + 4707 0118 CDE90034 strd r3, [sp] + 4708 011c 1299 ldr r1, [sp, #72] + 4709 011e 4046 mov r0, r8 + 4710 0120 CEE7 b .L748 + 4711 .L762: + 4712 0122 5346 mov r3, r10 + 4713 0124 8246 mov r10, r0 + 4714 0126 1846 mov r0, r3 + 4715 0128 3B46 mov r3, r7 + 4716 012a 07F1FF3B add fp, r7, #-1 + 4717 012e 1C46 mov r4, r3 + 4718 0130 0F46 mov r7, r1 + 4719 0132 79E7 b .L742 + 4720 .L753: + 4721 0134 4FF0FF30 mov r0, #-1 + 4722 0138 D3E7 b .L741 + 4724 013a 00BF .section .text.arm_conv_partial_opt_q7,"ax",%progbits + 4725 .align 1 + 4726 .p2align 2,,3 + 4727 .global arm_conv_partial_opt_q7 + 4728 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 83 + + + 4729 .thumb + 4730 .thumb_func + 4731 .fpu fpv4-sp-d16 + 4733 arm_conv_partial_opt_q7: + 4734 @ args = 20, pretend = 0, frame = 48 + 4735 @ frame_needed = 0, uses_anonymous_args = 0 + 4736 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4737 0004 8DB0 sub sp, sp, #52 + 4738 0006 1F46 mov r7, r3 + 4739 0008 DDF85CA0 ldr r10, [sp, #92] + 4740 000c 189B ldr r3, [sp, #96] + 4741 000e 199E ldr r6, [sp, #100] + 4742 0010 0991 str r1, [sp, #36] + 4743 0012 01F1FF39 add r9, r1, #-1 + 4744 0016 9046 mov r8, r2 + 4745 0018 0AEB0302 add r2, r10, r3 + 4746 001c 07EB0903 add r3, r7, r9 + 4747 0020 9A42 cmp r2, r3 + 4748 0022 00F29481 bhi .L791 + 4749 0026 8F42 cmp r7, r1 + 4750 0028 40F27F81 bls .L824 + 4751 002c 099B ldr r3, [sp, #36] + 4752 002e 9908 lsrs r1, r3, #2 + 4753 0030 4844 add r0, r0, r9 + 4754 0032 0391 str r1, [sp, #12] + 4755 0034 00F08781 beq .L792 + 4756 .L827: + 4757 0038 1A9A ldr r2, [sp, #104] + 4758 003a 031F subs r3, r0, #4 + 4759 003c 0832 adds r2, r2, #8 + 4760 003e A3EB8104 sub r4, r3, r1, lsl #2 + 4761 .L769: + 4762 0042 93F90410 ldrsb r1, [r3, #4] + 4763 0046 22F8081C strh r1, [r2, #-8] @ movhi + 4764 004a 93F90310 ldrsb r1, [r3, #3] + 4765 004e 22F8061C strh r1, [r2, #-6] @ movhi + 4766 0052 93F90210 ldrsb r1, [r3, #2] + 4767 0056 22F8041C strh r1, [r2, #-4] @ movhi + 4768 005a 93F90110 ldrsb r1, [r3, #1] + 4769 005e 22F8021C strh r1, [r2, #-2] @ movhi + 4770 0062 043B subs r3, r3, #4 + 4771 0064 A342 cmp r3, r4 + 4772 0066 02F10802 add r2, r2, #8 + 4773 006a EAD1 bne .L769 + 4774 006c 039A ldr r2, [sp, #12] + 4775 006e C2EB8273 rsb r3, r2, r2, lsl #30 + 4776 0072 00EB8300 add r0, r0, r3, lsl #2 + 4777 0076 1A9B ldr r3, [sp, #104] + 4778 0078 03EBC203 add r3, r3, r2, lsl #3 + 4779 .L768: + 4780 007c 099A ldr r2, [sp, #36] + 4781 007e 12F00302 ands r2, r2, #3 + 4782 0082 0592 str r2, [sp, #20] + 4783 0084 0DD0 beq .L773 + 4784 0086 90F90020 ldrsb r2, [r0] + 4785 008a 1A80 strh r2, [r3] @ movhi + 4786 008c 059A ldr r2, [sp, #20] + ARM GAS /tmp/ccdao7B1.s page 84 + + + 4787 008e 013A subs r2, r2, #1 + 4788 0090 07D0 beq .L773 + 4789 0092 10F9011C ldrsb r1, [r0, #-1] + 4790 0096 5980 strh r1, [r3, #2] @ movhi + 4791 0098 012A cmp r2, #1 + 4792 009a 02D0 beq .L773 + 4793 009c 10F9022C ldrsb r2, [r0, #-2] + 4794 00a0 9A80 strh r2, [r3, #4] @ movhi + 4795 .L773: + 4796 00a2 4A46 mov r2, r9 + 4797 00a4 3146 mov r1, r6 + 4798 00a6 0020 movs r0, #0 + 4799 00a8 FFF7FEFF bl arm_fill_q15 + 4800 00ac 099B ldr r3, [sp, #36] + 4801 00ae 03F10041 add r1, r3, #-2147483648 + 4802 00b2 0139 subs r1, r1, #1 + 4803 00b4 BA08 lsrs r2, r7, #2 + 4804 00b6 06EB4101 add r1, r6, r1, lsl #1 + 4805 00ba 1FD0 beq .L772 + 4806 00bc 08F10400 add r0, r8, #4 + 4807 00c0 01F10804 add r4, r1, #8 + 4808 00c4 4FEA820C lsl ip, r2, #2 + 4809 00c8 00EB8203 add r3, r0, r2, lsl #2 + 4810 .L774: + 4811 00cc 10F9045C ldrsb r5, [r0, #-4] + 4812 00d0 24F8085C strh r5, [r4, #-8] @ movhi + 4813 00d4 10F9035C ldrsb r5, [r0, #-3] + 4814 00d8 24F8065C strh r5, [r4, #-6] @ movhi + 4815 00dc 10F9025C ldrsb r5, [r0, #-2] + 4816 00e0 24F8045C strh r5, [r4, #-4] @ movhi + 4817 00e4 10F9015C ldrsb r5, [r0, #-1] + 4818 00e8 24F8025C strh r5, [r4, #-2] @ movhi + 4819 00ec 0430 adds r0, r0, #4 + 4820 00ee 9842 cmp r0, r3 + 4821 00f0 04F10804 add r4, r4, #8 + 4822 00f4 EAD1 bne .L774 + 4823 00f6 01EBC201 add r1, r1, r2, lsl #3 + 4824 00fa E044 add r8, r8, ip + 4825 .L772: + 4826 00fc 17F00307 ands r7, r7, #3 + 4827 0100 0ED0 beq .L775 + 4828 0102 98F90030 ldrsb r3, [r8] + 4829 0106 0B80 strh r3, [r1] @ movhi + 4830 0108 7B1E subs r3, r7, #1 + 4831 010a 07D0 beq .L776 + 4832 010c 98F90120 ldrsb r2, [r8, #1] + 4833 0110 4A80 strh r2, [r1, #2] @ movhi + 4834 0112 012B cmp r3, #1 + 4835 0114 1CBF itt ne + 4836 0116 98F90230 ldrsbne r3, [r8, #2] + 4837 011a 8B80 strhne r3, [r1, #4] @ movhi + 4838 .L776: + 4839 011c 01EB4701 add r1, r1, r7, lsl #1 + 4840 .L775: + 4841 0120 4A46 mov r2, r9 + 4842 0122 0020 movs r0, #0 + 4843 0124 FFF7FEFF bl arm_fill_q15 + ARM GAS /tmp/ccdao7B1.s page 85 + + + 4844 0128 169B ldr r3, [sp, #88] + 4845 012a 03EB0A02 add r2, r3, r10 + 4846 012e 189B ldr r3, [sp, #96] + 4847 0130 0192 str r2, [sp, #4] + 4848 0132 06EB4A01 add r1, r6, r10, lsl #1 + 4849 0136 9808 lsrs r0, r3, #2 + 4850 0138 0A91 str r1, [sp, #40] + 4851 013a 0B90 str r0, [sp, #44] + 4852 013c 00F00581 beq .L793 + 4853 0140 039C ldr r4, [sp, #12] + 4854 0142 DFF810B2 ldr fp, .L828 + 4855 0146 E300 lsls r3, r4, #3 + 4856 0148 0833 adds r3, r3, #8 + 4857 014a 0893 str r3, [sp, #32] + 4858 014c 02EB8003 add r3, r2, r0, lsl #2 + 4859 0150 0693 str r3, [sp, #24] + 4860 0152 1A9B ldr r3, [sp, #104] + 4861 0154 03EBC403 add r3, r3, r4, lsl #3 + 4862 0158 0793 str r3, [sp, #28] + 4863 015a 059B ldr r3, [sp, #20] + 4864 015c 013B subs r3, r3, #1 + 4865 015e 0493 str r3, [sp, #16] + 4866 0160 8A46 mov r10, r1 + 4867 .L783: + 4868 0162 039A ldr r2, [sp, #12] + 4869 0164 DAF80000 ldr r0, [r10] @ unaligned + 4870 0168 DAF80460 ldr r6, [r10, #4] @ unaligned + 4871 016c 0AF10803 add r3, r10, #8 + 4872 0170 0293 str r3, [sp, #8] + 4873 0172 1F46 mov r7, r3 + 4874 0174 002A cmp r2, #0 + 4875 0176 00F0D280 beq .L794 + 4876 017a 0023 movs r3, #0 + 4877 017c DDF868C0 ldr ip, [sp, #104] + 4878 0180 9846 mov r8, r3 + 4879 0182 1946 mov r1, r3 + 4880 0184 1D46 mov r5, r3 + 4881 0186 9146 mov r9, r2 + 4882 .L779: + 4883 0188 DCF80020 ldr r2, [ip] @ unaligned + 4884 .syntax unified + 4885 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4886 018c 20FB0255 smlad r5, r0, r2, r5 + 4887 @ 0 "" 2 + 4888 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4889 0190 26FB0288 smlad r8, r6, r2, r8 + 4890 @ 0 "" 2 + 4891 .thumb + 4892 .syntax unified + 4893 0194 00EA0B04 and r4, r0, fp + 4894 0198 B0B2 uxth r0, r6 + 4895 019a 2043 orrs r0, r0, r4 + 4896 .syntax unified + 4897 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4898 019c 20FB1211 smladx r1, r0, r2, r1 + 4899 @ 0 "" 2 + 4900 .thumb + ARM GAS /tmp/ccdao7B1.s page 86 + + + 4901 .syntax unified + 4902 01a0 3868 ldr r0, [r7] @ unaligned + 4903 01a2 06EA0B04 and r4, r6, fp + 4904 01a6 1FFA80FE uxth lr, r0 + 4905 01aa 4EEA040E orr lr, lr, r4 + 4906 .syntax unified + 4907 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4908 01ae 2EFB1232 smladx r2, lr, r2, r3 + 4909 @ 0 "" 2 + 4910 .thumb + 4911 .syntax unified + 4912 01b2 DCF80440 ldr r4, [ip, #4] @ unaligned + 4913 01b6 0CF1080C add ip, ip, #8 + 4914 .syntax unified + 4915 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4916 01ba 26FB0455 smlad r5, r6, r4, r5 + 4917 @ 0 "" 2 + 4918 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4919 01be 20FB0488 smlad r8, r0, r4, r8 + 4920 @ 0 "" 2 + 4921 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4922 01c2 2EFB1411 smladx r1, lr, r4, r1 + 4923 @ 0 "" 2 + 4924 .thumb + 4925 .syntax unified + 4926 01c6 7E68 ldr r6, [r7, #4] @ unaligned + 4927 01c8 00EA0B0E and lr, r0, fp + 4928 01cc B3B2 uxth r3, r6 + 4929 01ce 0837 adds r7, r7, #8 + 4930 01d0 43EA0E03 orr r3, r3, lr + 4931 .syntax unified + 4932 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4933 01d4 23FB1423 smladx r3, r3, r4, r2 + 4934 @ 0 "" 2 + 4935 .thumb + 4936 .syntax unified + 4937 01d8 B9F10109 subs r9, r9, #1 + 4938 01dc D4D1 bne .L779 + 4939 01de 089A ldr r2, [sp, #32] + 4940 01e0 0798 ldr r0, [sp, #28] + 4941 01e2 0AEB0207 add r7, r10, r2 + 4942 .L778: + 4943 01e6 059A ldr r2, [sp, #20] + 4944 01e8 6AB3 cbz r2, .L781 + 4945 01ea B0F90020 ldrsh r2, [r0] + 4946 01ee 37F8084C ldrh r4, [r7, #-8] + 4947 01f2 37F906CC ldrsh ip, [r7, #-6] + 4948 01f6 37F9046C ldrsh r6, [r7, #-4] + 4949 01fa 14FB0255 smlabb r5, r4, r2, r5 + 4950 01fe 37F9024C ldrsh r4, [r7, #-2] + 4951 0202 02FB0C11 mla r1, r2, ip, r1 + 4952 0206 02FB0688 mla r8, r2, r6, r8 + 4953 020a 02FB0433 mla r3, r2, r4, r3 + 4954 020e 049A ldr r2, [sp, #16] + 4955 0210 CAB1 cbz r2, .L781 + 4956 0212 B0F90220 ldrsh r2, [r0, #2] + 4957 0216 0CFB0255 mla r5, ip, r2, r5 + ARM GAS /tmp/ccdao7B1.s page 87 + + + 4958 021a B7F900C0 ldrsh ip, [r7] + 4959 021e 06FB0211 mla r1, r6, r2, r1 + 4960 0222 04FB0288 mla r8, r4, r2, r8 + 4961 0226 02FB0C33 mla r3, r2, ip, r3 + 4962 022a 049A ldr r2, [sp, #16] + 4963 022c 012A cmp r2, #1 + 4964 022e 0AD0 beq .L781 + 4965 0230 B0F90420 ldrsh r2, [r0, #4] + 4966 0234 7888 ldrh r0, [r7, #2] + 4967 0236 06FB0255 mla r5, r6, r2, r5 + 4968 023a 02FB0411 mla r1, r2, r4, r1 + 4969 023e 02FB0C88 mla r8, r2, ip, r8 + 4970 0242 10FB0233 smlabb r3, r0, r2, r3 + 4971 .L781: + 4972 0246 ED11 asrs r5, r5, #7 + 4973 0248 C911 asrs r1, r1, #7 + 4974 .syntax unified + 4975 @ 316 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 4976 024a 05F30705 ssat r5, #8, r5 + 4977 @ 0 "" 2 + 4978 @ 317 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 4979 024e 01F30701 ssat r1, #8, r1 + 4980 @ 0 "" 2 + 4981 .thumb + 4982 .syntax unified + 4983 0252 EDB2 uxtb r5, r5 + 4984 0254 0902 lsls r1, r1, #8 + 4985 0256 4FEAE818 asr r8, r8, #7 + 4986 025a DB11 asrs r3, r3, #7 + 4987 025c 01F47F41 and r1, r1, #65280 + 4988 .syntax unified + 4989 @ 319 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 4990 0260 03F30703 ssat r3, #8, r3 + 4991 @ 0 "" 2 + 4992 @ 318 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 4993 0264 08F30708 ssat r8, #8, r8 + 4994 @ 0 "" 2 + 4995 .thumb + 4996 .syntax unified + 4997 0268 45EA0365 orr r5, r5, r3, lsl #24 + 4998 026c 4FEA0848 lsl r8, r8, #16 + 4999 0270 019A ldr r2, [sp, #4] + 5000 0272 DDF808A0 ldr r10, [sp, #8] + 5001 0276 2943 orrs r1, r1, r5 + 5002 0278 08F47F03 and r3, r8, #16711680 + 5003 027c 0B43 orrs r3, r3, r1 + 5004 027e 42F8043B str r3, [r2], #4 @ unaligned + 5005 0282 1346 mov r3, r2 + 5006 0284 0192 str r2, [sp, #4] + 5007 0286 069A ldr r2, [sp, #24] + 5008 0288 9342 cmp r3, r2 + 5009 028a 7FF46AAF bne .L783 + 5010 028e DDE90A32 ldrd r3, r2, [sp, #40] + 5011 0292 03EBC203 add r3, r3, r2, lsl #3 + 5012 0296 0A93 str r3, [sp, #40] + 5013 .L777: + 5014 0298 189B ldr r3, [sp, #96] + ARM GAS /tmp/ccdao7B1.s page 88 + + + 5015 029a 13F00304 ands r4, r3, #3 + 5016 029e 27D0 beq .L789 + 5017 02a0 099A ldr r2, [sp, #36] + 5018 02a2 069B ldr r3, [sp, #24] + 5019 02a4 DDF82880 ldr r8, [sp, #40] + 5020 02a8 5508 lsrs r5, r2, #1 + 5021 02aa 02F00106 and r6, r2, #1 + 5022 02ae 1A9A ldr r2, [sp, #104] + 5023 02b0 1C44 add r4, r4, r3 + 5024 02b2 4FEA850C lsl ip, r5, #2 + 5025 02b6 02EB8507 add r7, r2, r5, lsl #2 + 5026 02ba 9946 mov r9, r3 + 5027 .L790: + 5028 02bc 5DB3 cbz r5, .L795 + 5029 .L826: + 5030 02be 1A99 ldr r1, [sp, #104] + 5031 02c0 4046 mov r0, r8 + 5032 02c2 2B46 mov r3, r5 + 5033 02c4 0022 movs r2, #0 + 5034 .L786: + 5035 02c6 50F804EB ldr lr, [r0], #4 @ unaligned + 5036 02ca 51F804AB ldr r10, [r1], #4 @ unaligned + 5037 .syntax unified + 5038 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5039 02ce 2EFB0A22 smlad r2, lr, r10, r2 + 5040 @ 0 "" 2 + 5041 .thumb + 5042 .syntax unified + 5043 02d2 013B subs r3, r3, #1 + 5044 02d4 F7D1 bne .L786 + 5045 02d6 08EB0C03 add r3, r8, ip + 5046 02da 3946 mov r1, r7 + 5047 .L785: + 5048 02dc 66B9 cbnz r6, .L825 + 5049 02de D311 asrs r3, r2, #7 + 5050 .syntax unified + 5051 @ 373 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 5052 02e0 03F30703 ssat r3, #8, r3 + 5053 @ 0 "" 2 + 5054 .thumb + 5055 .syntax unified + 5056 02e4 09F8013B strb r3, [r9], #1 + 5057 02e8 A145 cmp r9, r4 + 5058 02ea 08F10208 add r8, r8, #2 + 5059 02ee E5D1 bne .L790 + 5060 .L789: + 5061 02f0 0020 movs r0, #0 + 5062 .L766: + 5063 02f2 0DB0 add sp, sp, #52 + 5064 @ sp needed + 5065 02f4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5066 .L825: + 5067 02f8 1B88 ldrh r3, [r3] + 5068 02fa 0988 ldrh r1, [r1] + 5069 02fc 13FB0123 smlabb r3, r3, r1, r2 + 5070 0300 DB11 asrs r3, r3, #7 + 5071 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 89 + + + 5072 @ 373 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q + 5073 0302 03F30703 ssat r3, #8, r3 + 5074 @ 0 "" 2 + 5075 .thumb + 5076 .syntax unified + 5077 0306 09F8013B strb r3, [r9], #1 + 5078 030a 4C45 cmp r4, r9 + 5079 030c 08F10208 add r8, r8, #2 + 5080 0310 EED0 beq .L789 + 5081 0312 002D cmp r5, #0 + 5082 0314 D3D1 bne .L826 + 5083 .L795: + 5084 0316 1A99 ldr r1, [sp, #104] + 5085 0318 4346 mov r3, r8 + 5086 031a 2A46 mov r2, r5 + 5087 031c DEE7 b .L785 + 5088 .L794: + 5089 031e 1A98 ldr r0, [sp, #104] + 5090 0320 1546 mov r5, r2 + 5091 0322 1346 mov r3, r2 + 5092 0324 9046 mov r8, r2 + 5093 0326 1146 mov r1, r2 + 5094 0328 5DE7 b .L778 + 5095 .L824: + 5096 032a 4346 mov r3, r8 + 5097 032c 8046 mov r8, r0 + 5098 032e 1846 mov r0, r3 + 5099 0330 3B46 mov r3, r7 + 5100 0332 0993 str r3, [sp, #36] + 5101 0334 099B ldr r3, [sp, #36] + 5102 0336 07F1FF39 add r9, r7, #-1 + 5103 033a 0F46 mov r7, r1 + 5104 033c 9908 lsrs r1, r3, #2 + 5105 033e 4844 add r0, r0, r9 + 5106 0340 0391 str r1, [sp, #12] + 5107 0342 7FF479AE bne .L827 + 5108 .L792: + 5109 0346 1A9B ldr r3, [sp, #104] + 5110 0348 98E6 b .L768 + 5111 .L793: + 5112 034a 0692 str r2, [sp, #24] + 5113 034c A4E7 b .L777 + 5114 .L791: + 5115 034e 4FF0FF30 mov r0, #-1 + 5116 0352 CEE7 b .L766 + 5117 .L829: + 5118 .align 2 + 5119 .L828: + 5120 0354 0000FFFF .word -65536 + 5122 .section .text.arm_conv_partial_q15,"ax",%progbits + 5123 .align 1 + 5124 .p2align 2,,3 + 5125 .global arm_conv_partial_q15 + 5126 .syntax unified + 5127 .thumb + 5128 .thumb_func + 5129 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccdao7B1.s page 90 + + + 5131 arm_conv_partial_q15: + 5132 @ args = 12, pretend = 0, frame = 88 + 5133 @ frame_needed = 0, uses_anonymous_args = 0 + 5134 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5135 0004 97B0 sub sp, sp, #92 + 5136 0006 1C46 mov r4, r3 + 5137 0008 DDF888B0 ldr fp, [sp, #136] + 5138 000c 219E ldr r6, [sp, #132] + 5139 000e 1093 str r3, [sp, #64] + 5140 0010 4D1E subs r5, r1, #1 + 5141 0012 1746 mov r7, r2 + 5142 0014 0592 str r2, [sp, #20] + 5143 0016 06EB0B03 add r3, r6, fp + 5144 001a 2A19 adds r2, r5, r4 + 5145 001c 9342 cmp r3, r2 + 5146 001e 0891 str r1, [sp, #32] + 5147 0020 0490 str r0, [sp, #16] + 5148 0022 0D95 str r5, [sp, #52] + 5149 0024 00F2D483 bhi .L886 + 5150 0028 8C42 cmp r4, r1 + 5151 002a 05D8 bhi .L832 + 5152 002c CDE90470 strd r7, r0, [sp, #16] + 5153 0030 601E subs r0, r4, #1 + 5154 0032 0D90 str r0, [sp, #52] + 5155 0034 1091 str r1, [sp, #64] + 5156 0036 0894 str r4, [sp, #32] + 5157 .L832: + 5158 0038 109A ldr r2, [sp, #64] + 5159 003a 2199 ldr r1, [sp, #132] + 5160 003c 9342 cmp r3, r2 + 5161 003e CCBF ite gt + 5162 0040 9A1A subgt r2, r3, r2 + 5163 0042 0022 movle r2, #0 + 5164 0044 0C92 str r2, [sp, #48] + 5165 0046 109A ldr r2, [sp, #64] + 5166 0048 8A42 cmp r2, r1 + 5167 004a 03DC bgt .L834 + 5168 004c 521A subs r2, r2, r1 + 5169 004e 0C99 ldr r1, [sp, #48] + 5170 0050 1144 add r1, r1, r2 + 5171 0052 0C91 str r1, [sp, #48] + 5172 .L834: + 5173 0054 219A ldr r2, [sp, #132] + 5174 0056 D143 mvns r1, r2 + 5175 0058 089A ldr r2, [sp, #32] + 5176 005a 8918 adds r1, r1, r2 + 5177 005c 40F0C380 bne .L966 + 5178 0060 0C9B ldr r3, [sp, #48] + 5179 0062 ABEB0303 sub r3, fp, r3 + 5180 0066 1393 str r3, [sp, #76] + 5181 0068 DDE92032 ldrd r3, r2, [sp, #128] + 5182 006c 03EB4203 add r3, r3, r2, lsl #1 + 5183 0070 0B93 str r3, [sp, #44] + 5184 0072 1346 mov r3, r2 + 5185 0074 0133 adds r3, r3, #1 + 5186 0076 0093 str r3, [sp] + 5187 .L838: + ARM GAS /tmp/ccdao7B1.s page 91 + + + 5188 0078 219B ldr r3, [sp, #132] + 5189 007a 089A ldr r2, [sp, #32] + 5190 007c 9B1A subs r3, r3, r2 + 5191 007e 002B cmp r3, #0 + 5192 0080 C0F2D082 blt .L894 + 5193 0084 009B ldr r3, [sp] + 5194 0086 9B1A subs r3, r3, r2 + 5195 0088 059A ldr r2, [sp, #20] + 5196 008a 02EB4303 add r3, r2, r3, lsl #1 + 5197 008e 1493 str r3, [sp, #80] + 5198 .L849: + 5199 0090 089A ldr r2, [sp, #32] + 5200 0092 0499 ldr r1, [sp, #16] + 5201 0094 02F10043 add r3, r2, #-2147483648 + 5202 0098 013B subs r3, r3, #1 + 5203 009a 01EB4303 add r3, r1, r3, lsl #1 + 5204 009e 032A cmp r2, #3 + 5205 00a0 1293 str r3, [sp, #72] + 5206 00a2 139B ldr r3, [sp, #76] + 5207 00a4 00F27B81 bhi .L850 + 5208 00a8 002B cmp r3, #0 + 5209 00aa 00F08883 beq .L967 + 5210 00ae 0B9E ldr r6, [sp, #44] + 5211 00b0 DDF848C0 ldr ip, [sp, #72] + 5212 00b4 1746 mov r7, r2 + 5213 00b6 06EB4301 add r1, r6, r3, lsl #1 + 5214 00ba 149A ldr r2, [sp, #80] + 5215 00bc 8E46 mov lr, r1 + 5216 .L867: + 5217 00be 002F cmp r7, #0 + 5218 00c0 00F04181 beq .L968 + 5219 00c4 B2F80080 ldrh r8, [r2] + 5220 00c8 BCF80030 ldrh r3, [ip] + 5221 00cc 13FB08F3 smulbb r3, r3, r8 + 5222 00d0 4FEAE378 asr r8, r3, #31 + 5223 00d4 012F cmp r7, #1 + 5224 00d6 1846 mov r0, r3 + 5225 00d8 4146 mov r1, r8 + 5226 00da 0DD0 beq .L866 + 5227 00dc B2F80290 ldrh r9, [r2, #2] + 5228 00e0 3CF802AC ldrh r10, [ip, #-2] + 5229 00e4 022F cmp r7, #2 + 5230 00e6 CAFB8901 smlalbb r0, r1, r10, r9 + 5231 00ea 05D0 beq .L866 + 5232 00ec B2F80480 ldrh r8, [r2, #4] + 5233 00f0 3CF8043C ldrh r3, [ip, #-4] + 5234 00f4 C8FB8301 smlalbb r0, r1, r8, r3 + 5235 .L866: + 5236 00f8 C30B lsrs r3, r0, #15 + 5237 00fa 43EA4143 orr r3, r3, r1, lsl #17 + 5238 .L869: + 5239 .syntax unified + 5240 @ 552 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5241 00fe 03F30F03 ssat r3, #16, r3 + 5242 @ 0 "" 2 + 5243 .thumb + 5244 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 92 + + + 5245 0102 26F8023B strh r3, [r6], #2 @ movhi + 5246 0106 7645 cmp r6, lr + 5247 0108 02F10202 add r2, r2, #2 + 5248 010c D7D1 bne .L867 + 5249 010e 129B ldr r3, [sp, #72] + 5250 0110 023B subs r3, r3, #2 + 5251 0112 7146 mov r1, lr + 5252 0114 0993 str r3, [sp, #36] + 5253 .L861: + 5254 0116 109F ldr r7, [sp, #64] + 5255 0118 089B ldr r3, [sp, #32] + 5256 011a 0137 adds r7, r7, #1 + 5257 011c FF1A subs r7, r7, r3 + 5258 011e 059B ldr r3, [sp, #20] + 5259 0120 03EB4707 add r7, r3, r7, lsl #1 + 5260 0124 0D9B ldr r3, [sp, #52] + 5261 0126 9E08 lsrs r6, r3, #2 + 5262 0128 00F04183 beq .L896 + 5263 012c 0C9B ldr r3, [sp, #48] + 5264 012e 002B cmp r3, #0 + 5265 0130 00F03181 beq .L877 + 5266 0134 8846 mov r8, r1 + 5267 0136 DDF82490 ldr r9, [sp, #36] + 5268 013a DDE90C1E ldrd r1, lr, [sp, #48] + 5269 013e 07EB460C add ip, r7, r6, lsl #1 + 5270 0142 002E cmp r6, #0 + 5271 0144 4AD0 beq .L897 + 5272 .L970: + 5273 0146 0023 movs r3, #0 + 5274 0148 4C46 mov r4, r9 + 5275 014a 3846 mov r0, r7 + 5276 014c 3546 mov r5, r6 + 5277 014e 1A46 mov r2, r3 + 5278 .L873: + 5279 0150 D0F800A0 ldr r10, [r0] @ unaligned + 5280 0154 D4F800B0 ldr fp, [r4] @ unaligned + 5281 .syntax unified + 5282 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5283 0158 CAFBDB32 smlaldx r3, r2, r10, fp + 5284 @ 0 "" 2 + 5285 .thumb + 5286 .syntax unified + 5287 015c D0F804A0 ldr r10, [r0, #4] @ unaligned + 5288 0160 54F804BC ldr fp, [r4, #-4] @ unaligned + 5289 0164 0830 adds r0, r0, #8 + 5290 0166 083C subs r4, r4, #8 + 5291 .syntax unified + 5292 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5293 0168 CAFBDB32 smlaldx r3, r2, r10, fp + 5294 @ 0 "" 2 + 5295 .thumb + 5296 .syntax unified + 5297 016c 013D subs r5, r5, #1 + 5298 016e EFD1 bne .L873 + 5299 0170 C6EB4670 rsb r0, r6, r6, lsl #29 + 5300 0174 09EBC000 add r0, r9, r0, lsl #3 + 5301 0178 07EBC606 add r6, r7, r6, lsl #3 + ARM GAS /tmp/ccdao7B1.s page 93 + + + 5302 017c 0230 adds r0, r0, #2 + 5303 .L872: + 5304 017e 1EF00304 ands r4, lr, #3 + 5305 0182 15D0 beq .L874 + 5306 0184 B6F90050 ldrsh r5, [r6] + 5307 0188 B0F900A0 ldrsh r10, [r0] + 5308 .syntax unified + 5309 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5310 018c C5FBCA32 smlald r3, r2, r5, r10 + 5311 @ 0 "" 2 + 5312 .thumb + 5313 .syntax unified + 5314 0190 013C subs r4, r4, #1 + 5315 0192 0DD0 beq .L874 + 5316 0194 B6F90250 ldrsh r5, [r6, #2] + 5317 0198 30F902AC ldrsh r10, [r0, #-2] + 5318 .syntax unified + 5319 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5320 019c C5FBCA32 smlald r3, r2, r5, r10 + 5321 @ 0 "" 2 + 5322 .thumb + 5323 .syntax unified + 5324 01a0 012C cmp r4, #1 + 5325 01a2 05D0 beq .L874 + 5326 01a4 B6F90440 ldrsh r4, [r6, #4] + 5327 01a8 30F9040C ldrsh r0, [r0, #-4] + 5328 .syntax unified + 5329 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5330 01ac C4FBC032 smlald r3, r2, r4, r0 + 5331 @ 0 "" 2 + 5332 .thumb + 5333 .syntax unified + 5334 .L874: + 5335 01b0 0237 adds r7, r7, #2 + 5336 01b2 DB0B lsrs r3, r3, #15 + 5337 01b4 6745 cmp r7, ip + 5338 01b6 43EA4243 orr r3, r3, r2, lsl #17 + 5339 01ba 0EF1FF3E add lr, lr, #-1 + 5340 .syntax unified + 5341 @ 643 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5342 01be 03F30F03 ssat r3, #16, r3 + 5343 @ 0 "" 2 + 5344 .thumb + 5345 .syntax unified + 5346 01c2 01F1FF31 add r1, r1, #-1 + 5347 01c6 28F8023B strh r3, [r8], #2 @ movhi + 5348 01ca 00F0BE80 beq .L969 + 5349 01ce 0029 cmp r1, #0 + 5350 01d0 00F0E180 beq .L877 + 5351 01d4 4FEA9E06 lsr r6, lr, #2 + 5352 01d8 002E cmp r6, #0 + 5353 01da B4D1 bne .L970 + 5354 .L897: + 5355 01dc 3346 mov r3, r6 + 5356 01de 1298 ldr r0, [sp, #72] + 5357 01e0 3E46 mov r6, r7 + 5358 01e2 1A46 mov r2, r3 + ARM GAS /tmp/ccdao7B1.s page 94 + + + 5359 01e4 CBE7 b .L872 + 5360 .L966: + 5361 01e6 0D9A ldr r2, [sp, #52] + 5362 01e8 9342 cmp r3, r2 + 5363 01ea 00F21E82 bhi .L836 + 5364 01ee 0C9A ldr r2, [sp, #48] + 5365 01f0 219B ldr r3, [sp, #132] + 5366 01f2 5242 rsbs r2, r2, #0 + 5367 01f4 1392 str r2, [sp, #76] + 5368 01f6 DDE92021 ldrd r2, r1, [sp, #128] + 5369 01fa 0133 adds r3, r3, #1 + 5370 01fc 02EB4100 add r0, r2, r1, lsl #1 + 5371 0200 049A ldr r2, [sp, #16] + 5372 0202 0093 str r3, [sp] + 5373 0204 032B cmp r3, #3 + 5374 0206 02EB4107 add r7, r2, r1, lsl #1 + 5375 020a 00F2C682 bhi .L837 + 5376 020e BBF1000F cmp fp, #0 + 5377 0212 00F0E082 beq .L888 + 5378 0216 009E ldr r6, [sp] + 5379 0218 5946 mov r1, fp + 5380 021a 002E cmp r6, #0 + 5381 021c 40F01D82 bne .L971 + 5382 .L839: + 5383 .syntax unified + 5384 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5385 0220 06F30F03 ssat r3, #16, r6 + 5386 @ 0 "" 2 + 5387 .thumb + 5388 .syntax unified + 5389 0224 01F1FF3E add lr, r1, #-1 + 5390 0228 0146 mov r1, r0 + 5391 022a BA1C adds r2, r7, #2 + 5392 022c 21F8023B strh r3, [r1], #2 @ movhi + 5393 0230 0125 movs r5, #1 + 5394 0232 0B91 str r1, [sp, #44] + 5395 .L885: + 5396 0234 BEF1000F cmp lr, #0 + 5397 0238 3FF41EAF beq .L838 + 5398 023c 059F ldr r7, [sp, #20] + 5399 023e B2F90040 ldrsh r4, [r2] + 5400 0242 B7F90010 ldrsh r1, [r7] + 5401 0246 0023 movs r3, #0 + 5402 0248 1846 mov r0, r3 + 5403 .syntax unified + 5404 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5405 024a C1FBC430 smlald r3, r0, r1, r4 + 5406 @ 0 "" 2 + 5407 .thumb + 5408 .syntax unified + 5409 024e 6E1E subs r6, r5, #1 + 5410 0250 1946 mov r1, r3 + 5411 0252 0446 mov r4, r0 + 5412 0254 00F04682 beq .L842 + 5413 0258 B7F90210 ldrsh r1, [r7, #2] + 5414 025c 32F9024C ldrsh r4, [r2, #-2] + 5415 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 95 + + + 5416 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5417 0260 C1FBC430 smlald r3, r0, r1, r4 + 5418 @ 0 "" 2 + 5419 .thumb + 5420 .syntax unified + 5421 0264 012E cmp r6, #1 + 5422 0266 1946 mov r1, r3 + 5423 0268 0446 mov r4, r0 + 5424 026a 00F03B82 beq .L842 + 5425 026e B7F90410 ldrsh r1, [r7, #4] + 5426 0272 32F9044C ldrsh r4, [r2, #-4] + 5427 .syntax unified + 5428 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5429 0276 C1FBC430 smlald r3, r0, r1, r4 + 5430 @ 0 "" 2 + 5431 .thumb + 5432 .syntax unified + 5433 027a 0B99 ldr r1, [sp, #44] + 5434 027c DB0B lsrs r3, r3, #15 + 5435 027e 43EA4043 orr r3, r3, r0, lsl #17 + 5436 .syntax unified + 5437 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5438 0282 03F30F03 ssat r3, #16, r3 + 5439 @ 0 "" 2 + 5440 .thumb + 5441 .syntax unified + 5442 0286 21F8023B strh r3, [r1], #2 @ movhi + 5443 028a 0135 adds r5, r5, #1 + 5444 028c 0191 str r1, [sp, #4] + 5445 028e 0EF1FF3B add fp, lr, #-1 + 5446 0292 02F1020C add ip, r2, #2 + 5447 0296 1746 mov r7, r2 + 5448 .L841: + 5449 0298 BBF1000F cmp fp, #0 + 5450 029c 00F08482 beq .L891 + 5451 .L883: + 5452 02a0 AE08 lsrs r6, r5, #2 + 5453 02a2 DDF804E0 ldr lr, [sp, #4] + 5454 02a6 DDF81490 ldr r9, [sp, #20] + 5455 02aa CDF888B0 str fp, [sp, #136] + 5456 02ae 0BEB0508 add r8, fp, r5 + 5457 02b2 44D0 beq .L892 + 5458 .L973: + 5459 02b4 0023 movs r3, #0 + 5460 02b6 3846 mov r0, r7 + 5461 02b8 4946 mov r1, r9 + 5462 02ba 3446 mov r4, r6 + 5463 02bc 1A46 mov r2, r3 + 5464 .L845: + 5465 02be D1F800A0 ldr r10, [r1] @ unaligned + 5466 02c2 D0F800B0 ldr fp, [r0] @ unaligned + 5467 .syntax unified + 5468 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5469 02c6 CAFBDB32 smlaldx r3, r2, r10, fp + 5470 @ 0 "" 2 + 5471 .thumb + 5472 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 96 + + + 5473 02ca D1F804A0 ldr r10, [r1, #4] @ unaligned + 5474 02ce 50F804BC ldr fp, [r0, #-4] @ unaligned + 5475 02d2 0831 adds r1, r1, #8 + 5476 02d4 0838 subs r0, r0, #8 + 5477 .syntax unified + 5478 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5479 02d6 CAFBDB32 smlaldx r3, r2, r10, fp + 5480 @ 0 "" 2 + 5481 .thumb + 5482 .syntax unified + 5483 02da 013C subs r4, r4, #1 + 5484 02dc EFD1 bne .L845 + 5485 02de C6EB4671 rsb r1, r6, r6, lsl #29 + 5486 02e2 07EBC107 add r7, r7, r1, lsl #3 + 5487 02e6 09EBC606 add r6, r9, r6, lsl #3 + 5488 .L844: + 5489 02ea 15F00301 ands r1, r5, #3 + 5490 02ee 15D0 beq .L846 + 5491 02f0 B6F90000 ldrsh r0, [r6] + 5492 02f4 B7F90240 ldrsh r4, [r7, #2] + 5493 .syntax unified + 5494 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5495 02f8 C0FBC432 smlald r3, r2, r0, r4 + 5496 @ 0 "" 2 + 5497 .thumb + 5498 .syntax unified + 5499 02fc 0139 subs r1, r1, #1 + 5500 02fe 0DD0 beq .L846 + 5501 0300 B6F90200 ldrsh r0, [r6, #2] + 5502 0304 B7F90040 ldrsh r4, [r7] + 5503 .syntax unified + 5504 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5505 0308 C0FBC432 smlald r3, r2, r0, r4 + 5506 @ 0 "" 2 + 5507 .thumb + 5508 .syntax unified + 5509 030c 0129 cmp r1, #1 + 5510 030e 05D0 beq .L846 + 5511 0310 B6F90410 ldrsh r1, [r6, #4] + 5512 0314 37F9020C ldrsh r0, [r7, #-2] + 5513 .syntax unified + 5514 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5515 0318 C1FBC032 smlald r3, r2, r1, r0 + 5516 @ 0 "" 2 + 5517 .thumb + 5518 .syntax unified + 5519 .L846: + 5520 031c 0135 adds r5, r5, #1 + 5521 031e DB0B lsrs r3, r3, #15 + 5522 0320 4545 cmp r5, r8 + 5523 0322 43EA4243 orr r3, r3, r2, lsl #17 + 5524 0326 6746 mov r7, ip + 5525 .syntax unified + 5526 @ 249 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5527 0328 03F30F03 ssat r3, #16, r3 + 5528 @ 0 "" 2 + 5529 .thumb + ARM GAS /tmp/ccdao7B1.s page 97 + + + 5530 .syntax unified + 5531 032c 2EF8023B strh r3, [lr], #2 @ movhi + 5532 0330 0CF10203 add r3, ip, #2 + 5533 0334 00F0C081 beq .L972 + 5534 0338 AE08 lsrs r6, r5, #2 + 5535 033a 9C46 mov ip, r3 + 5536 033c BAD1 bne .L973 + 5537 .L892: + 5538 033e 3346 mov r3, r6 + 5539 0340 1A46 mov r2, r3 + 5540 0342 4E46 mov r6, r9 + 5541 0344 D1E7 b .L844 + 5542 .L968: + 5543 0346 3B46 mov r3, r7 + 5544 0348 D9E6 b .L869 + 5545 .L969: + 5546 034a CDE90C1E strd r1, lr, [sp, #48] + 5547 034e 4146 mov r1, r8 + 5548 .L870: + 5549 0350 0C9B ldr r3, [sp, #48] + 5550 0352 03B3 cbz r3, .L877 + 5551 0354 0D9F ldr r7, [sp, #52] + 5552 0356 DDF848E0 ldr lr, [sp, #72] + 5553 035a FE1A subs r6, r7, r3 + 5554 .L878: + 5555 035c 3B46 mov r3, r7 + 5556 035e 8FB1 cbz r7, .L881 + 5557 0360 0023 movs r3, #0 + 5558 0362 F246 mov r10, lr + 5559 0364 E146 mov r9, ip + 5560 0366 3C46 mov r4, r7 + 5561 0368 1846 mov r0, r3 + 5562 .L880: + 5563 036a 39F9025B ldrsh r5, [r9], #2 + 5564 036e 3AF90289 ldrsh r8, [r10], #-2 + 5565 0372 0246 mov r2, r0 + 5566 .syntax unified + 5567 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5568 0374 C5FBC832 smlald r3, r2, r5, r8 + 5569 @ 0 "" 2 + 5570 .thumb + 5571 .syntax unified + 5572 0378 013C subs r4, r4, #1 + 5573 037a 1046 mov r0, r2 + 5574 037c F5D1 bne .L880 + 5575 037e DA0B lsrs r2, r3, #15 + 5576 0380 42EA4043 orr r3, r2, r0, lsl #17 + 5577 .L881: + 5578 0384 013F subs r7, r7, #1 + 5579 0386 B742 cmp r7, r6 + 5580 .syntax unified + 5581 @ 682 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5582 0388 03F30F03 ssat r3, #16, r3 + 5583 @ 0 "" 2 + 5584 .thumb + 5585 .syntax unified + 5586 038c 0CF1020C add ip, ip, #2 + ARM GAS /tmp/ccdao7B1.s page 98 + + + 5587 0390 21F8023B strh r3, [r1], #2 @ movhi + 5588 0394 E2D1 bne .L878 + 5589 .L877: + 5590 0396 0020 movs r0, #0 + 5591 .L963: + 5592 0398 17B0 add sp, sp, #92 + 5593 @ sp needed + 5594 039a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5595 .L850: + 5596 039e 9908 lsrs r1, r3, #2 + 5597 03a0 1591 str r1, [sp, #84] + 5598 03a2 00F00682 beq .L853 + 5599 03a6 129B ldr r3, [sp, #72] + 5600 03a8 0191 str r1, [sp, #4] + 5601 03aa 1046 mov r0, r2 + 5602 03ac 9208 lsrs r2, r2, #2 + 5603 03ae 9C1E subs r4, r3, #2 + 5604 03b0 C2EB4273 rsb r3, r2, r2, lsl #29 + 5605 03b4 04EBC303 add r3, r4, r3, lsl #3 + 5606 03b8 0833 adds r3, r3, #8 + 5607 03ba 0E93 str r3, [sp, #56] + 5608 03bc D300 lsls r3, r2, #3 + 5609 03be 0433 adds r3, r3, #4 + 5610 03c0 0A93 str r3, [sp, #40] + 5611 03c2 00F00303 and r3, r0, #3 + 5612 03c6 0693 str r3, [sp, #24] + 5613 03c8 149B ldr r3, [sp, #80] + 5614 03ca 0093 str r3, [sp] + 5615 03cc 0B9B ldr r3, [sp, #44] + 5616 03ce 0F92 str r2, [sp, #60] + 5617 03d0 0994 str r4, [sp, #36] + 5618 03d2 0493 str r3, [sp, #16] + 5619 .L859: + 5620 03d4 009A ldr r2, [sp] + 5621 03d6 DDF82490 ldr r9, [sp, #36] + 5622 03da DDF83CA0 ldr r10, [sp, #60] + 5623 03de 1468 ldr r4, [r2] @ unaligned + 5624 03e0 D2F80280 ldr r8, [r2, #2] @ unaligned + 5625 03e4 0023 movs r3, #0 + 5626 03e6 02F1040C add ip, r2, #4 + 5627 03ea 9B46 mov fp, r3 + 5628 03ec 1846 mov r0, r3 + 5629 03ee 1946 mov r1, r3 + 5630 03f0 1D46 mov r5, r3 + 5631 03f2 9E46 mov lr, r3 + 5632 03f4 1A46 mov r2, r3 + 5633 03f6 1E46 mov r6, r3 + 5634 .L854: + 5635 03f8 D9F80070 ldr r7, [r9] @ unaligned + 5636 .syntax unified + 5637 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5638 03fc C4FBD726 smlaldx r2, r6, r4, r7 + 5639 @ 0 "" 2 + 5640 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5641 0400 C8FBD75E smlaldx r5, lr, r8, r7 + 5642 @ 0 "" 2 + 5643 .thumb + ARM GAS /tmp/ccdao7B1.s page 99 + + + 5644 .syntax unified + 5645 0404 DCF80080 ldr r8, [ip] @ unaligned + 5646 0408 DCF80240 ldr r4, [ip, #2] @ unaligned + 5647 .syntax unified + 5648 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5649 040c C8FBD701 smlaldx r0, r1, r8, r7 + 5650 @ 0 "" 2 + 5651 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5652 0410 C4FBD73B smlaldx r3, fp, r4, r7 + 5653 @ 0 "" 2 + 5654 .thumb + 5655 .syntax unified + 5656 0414 59F8047C ldr r7, [r9, #-4] @ unaligned + 5657 0418 A9F10809 sub r9, r9, #8 + 5658 .syntax unified + 5659 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5660 041c C8FBD726 smlaldx r2, r6, r8, r7 + 5661 @ 0 "" 2 + 5662 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5663 0420 C4FBD75E smlaldx r5, lr, r4, r7 + 5664 @ 0 "" 2 + 5665 .thumb + 5666 .syntax unified + 5667 0424 DCF80440 ldr r4, [ip, #4] @ unaligned + 5668 0428 DCF80680 ldr r8, [ip, #6] @ unaligned + 5669 042c 0CF1080C add ip, ip, #8 + 5670 .syntax unified + 5671 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5672 0430 C4FBD701 smlaldx r0, r1, r4, r7 + 5673 @ 0 "" 2 + 5674 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5675 0434 C8FBD73B smlaldx r3, fp, r8, r7 + 5676 @ 0 "" 2 + 5677 .thumb + 5678 .syntax unified + 5679 0438 BAF1010A subs r10, r10, #1 + 5680 043c DCD1 bne .L854 + 5681 043e 009F ldr r7, [sp] + 5682 0440 0294 str r4, [sp, #8] + 5683 0442 0A9C ldr r4, [sp, #40] + 5684 0444 2744 add r7, r7, r4 + 5685 0446 069C ldr r4, [sp, #24] + 5686 0448 012C cmp r4, #1 + 5687 044a 00F0D780 beq .L974 + 5688 044e 022C cmp r4, #2 + 5689 0450 00F0C180 beq .L857 + 5690 0454 032C cmp r4, #3 + 5691 0456 20D1 bne .L856 + 5692 0458 0E9C ldr r4, [sp, #56] + 5693 045a 1194 str r4, [sp, #68] + 5694 045c 54F8089C ldr r9, [r4, #-8] @ unaligned + 5695 0460 D7F800C0 ldr ip, [r7] @ unaligned + 5696 0464 D7F802A0 ldr r10, [r7, #2] @ unaligned + 5697 0468 029C ldr r4, [sp, #8] + 5698 .syntax unified + 5699 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5700 046a C4FBD926 smlaldx r2, r6, r4, r9 + ARM GAS /tmp/ccdao7B1.s page 100 + + + 5701 @ 0 "" 2 + 5702 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5703 046e C8FBD95E smlaldx r5, lr, r8, r9 + 5704 @ 0 "" 2 + 5705 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5706 0472 CCFBD901 smlaldx r0, r1, ip, r9 + 5707 @ 0 "" 2 + 5708 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5709 0476 CAFBD93B smlaldx r3, fp, r10, r9 + 5710 @ 0 "" 2 + 5711 .thumb + 5712 .syntax unified + 5713 047a 119C ldr r4, [sp, #68] + 5714 047c 7F68 ldr r7, [r7, #4] @ unaligned + 5715 047e 34F90ACC ldrsh ip, [r4, #-10] + 5716 0482 1FFA8CFC uxth ip, ip + 5717 .syntax unified + 5718 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5719 0486 C8FBDC26 smlaldx r2, r6, r8, ip + 5720 @ 0 "" 2 + 5721 .thumb + 5722 .syntax unified + 5723 048a 7446 mov r4, lr + 5724 .syntax unified + 5725 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5726 048c CAFBCC54 smlald r5, r4, r10, ip + 5727 @ 0 "" 2 + 5728 .thumb + 5729 .syntax unified + 5730 0490 A646 mov lr, r4 + 5731 .syntax unified + 5732 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5733 0492 CAFBDC01 smlaldx r0, r1, r10, ip + 5734 @ 0 "" 2 + 5735 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5736 0496 C7FBDC3B smlaldx r3, fp, r7, ip + 5737 @ 0 "" 2 + 5738 .thumb + 5739 .syntax unified + 5740 .L856: + 5741 049a D20B lsrs r2, r2, #15 + 5742 049c 42EA4642 orr r2, r2, r6, lsl #17 + 5743 04a0 C00B lsrs r0, r0, #15 + 5744 04a2 ED0B lsrs r5, r5, #15 + 5745 .syntax unified + 5746 @ 457 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5747 04a4 02F30F02 ssat r2, #16, r2 + 5748 @ 0 "" 2 + 5749 .thumb + 5750 .syntax unified + 5751 04a8 92B2 uxth r2, r2 + 5752 04aa 40EA4140 orr r0, r0, r1, lsl #17 + 5753 04ae 45EA4E45 orr r5, r5, lr, lsl #17 + 5754 04b2 DB0B lsrs r3, r3, #15 + 5755 .syntax unified + 5756 @ 458 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5757 04b4 00F30F00 ssat r0, #16, r0 + ARM GAS /tmp/ccdao7B1.s page 101 + + + 5758 @ 0 "" 2 + 5759 @ 457 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5760 04b8 05F30F05 ssat r5, #16, r5 + 5761 @ 0 "" 2 + 5762 .thumb + 5763 .syntax unified + 5764 04bc 80B2 uxth r0, r0 + 5765 04be 42EA0545 orr r5, r2, r5, lsl #16 + 5766 04c2 049A ldr r2, [sp, #16] + 5767 04c4 43EA4B43 orr r3, r3, fp, lsl #17 + 5768 .syntax unified + 5769 @ 458 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5770 04c8 03F30F03 ssat r3, #16, r3 + 5771 @ 0 "" 2 + 5772 .thumb + 5773 .syntax unified + 5774 04cc 40EA0343 orr r3, r0, r3, lsl #16 + 5775 04d0 5360 str r3, [r2, #4] @ unaligned + 5776 04d2 009B ldr r3, [sp] + 5777 04d4 1560 str r5, [r2] @ unaligned + 5778 04d6 0833 adds r3, r3, #8 + 5779 04d8 0093 str r3, [sp] + 5780 04da 02F10803 add r3, r2, #8 + 5781 04de 0493 str r3, [sp, #16] + 5782 04e0 019B ldr r3, [sp, #4] + 5783 04e2 013B subs r3, r3, #1 + 5784 04e4 0193 str r3, [sp, #4] + 5785 04e6 7FF475AF bne .L859 + 5786 04ea 159B ldr r3, [sp, #84] + 5787 04ec 0B9A ldr r2, [sp, #44] + 5788 04ee 1499 ldr r1, [sp, #80] + 5789 04f0 02EBC302 add r2, r2, r3, lsl #3 + 5790 04f4 0B92 str r2, [sp, #44] + 5791 04f6 1A46 mov r2, r3 + 5792 04f8 01EBC200 add r0, r1, r2, lsl #3 + 5793 04fc 9B00 lsls r3, r3, #2 + 5794 .L860: + 5795 04fe 139A ldr r2, [sp, #76] + 5796 0500 12F00301 ands r1, r2, #3 + 5797 0504 00F04E81 beq .L895 + 5798 0508 149A ldr r2, [sp, #80] + 5799 050a 129C ldr r4, [sp, #72] + 5800 050c 0133 adds r3, r3, #1 + 5801 050e 02EB4308 add r8, r2, r3, lsl #1 + 5802 0512 089A ldr r2, [sp, #32] + 5803 0514 0B9B ldr r3, [sp, #44] + 5804 0516 4FEA920B lsr fp, r2, #2 + 5805 051a CBEB4B77 rsb r7, fp, fp, lsl #29 + 5806 051e A4F1080C sub ip, r4, #8 + 5807 0522 03EB4101 add r1, r3, r1, lsl #1 + 5808 0526 02F00309 and r9, r2, #3 + 5809 052a 4FEACB0A lsl r10, fp, #3 + 5810 052e DE46 mov lr, fp + 5811 0530 CDF804C0 str ip, [sp, #4] + 5812 0534 04EBC707 add r7, r4, r7, lsl #3 + 5813 0538 8B46 mov fp, r1 + 5814 053a 4E46 mov r6, r9 + ARM GAS /tmp/ccdao7B1.s page 102 + + + 5815 053c 9C46 mov ip, r3 + 5816 .L865: + 5817 053e 019B ldr r3, [sp, #4] + 5818 0540 0090 str r0, [sp] + 5819 0542 B146 mov r9, r6 + 5820 0544 00F10802 add r2, r0, #8 + 5821 0548 5E46 mov r6, fp + 5822 054a 7146 mov r1, lr + 5823 054c 0024 movs r4, #0 + 5824 054e 0025 movs r5, #0 + 5825 0550 F346 mov fp, lr + 5826 .L862: + 5827 0552 32F808EC ldrh lr, [r2, #-8] + 5828 0556 1889 ldrh r0, [r3, #8] + 5829 0558 CEFB8045 smlalbb r4, r5, lr, r0 + 5830 055c 32F806EC ldrh lr, [r2, #-6] + 5831 0560 D888 ldrh r0, [r3, #6] + 5832 0562 CEFB8045 smlalbb r4, r5, lr, r0 + 5833 0566 32F804EC ldrh lr, [r2, #-4] + 5834 056a 9888 ldrh r0, [r3, #4] + 5835 056c CEFB8045 smlalbb r4, r5, lr, r0 + 5836 0570 32F802EC ldrh lr, [r2, #-2] + 5837 0574 5888 ldrh r0, [r3, #2] + 5838 0576 0139 subs r1, r1, #1 + 5839 0578 02F10802 add r2, r2, #8 + 5840 057c CEFB8045 smlalbb r4, r5, lr, r0 + 5841 0580 A3F10803 sub r3, r3, #8 + 5842 0584 E5D1 bne .L862 + 5843 0586 0098 ldr r0, [sp] + 5844 0588 DE46 mov lr, fp + 5845 058a B346 mov fp, r6 + 5846 058c 4E46 mov r6, r9 + 5847 058e 00EB0A03 add r3, r0, r10 + 5848 0592 96B1 cbz r6, .L863 + 5849 0594 30F80A20 ldrh r2, [r0, r10] + 5850 0598 3988 ldrh r1, [r7] + 5851 059a 012E cmp r6, #1 + 5852 059c C1FB8245 smlalbb r4, r5, r1, r2 + 5853 05a0 0BD0 beq .L863 + 5854 05a2 37F8021C ldrh r1, [r7, #-2] + 5855 05a6 5A88 ldrh r2, [r3, #2] + 5856 05a8 022E cmp r6, #2 + 5857 05aa C1FB8245 smlalbb r4, r5, r1, r2 + 5858 05ae 04D0 beq .L863 + 5859 05b0 9A88 ldrh r2, [r3, #4] + 5860 05b2 37F8043C ldrh r3, [r7, #-4] + 5861 05b6 C2FB8345 smlalbb r4, r5, r2, r3 + 5862 .L863: + 5863 05ba E30B lsrs r3, r4, #15 + 5864 05bc 43EA4543 orr r3, r3, r5, lsl #17 + 5865 .syntax unified + 5866 @ 515 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 5867 05c0 03F30F03 ssat r3, #16, r3 + 5868 @ 0 "" 2 + 5869 .thumb + 5870 .syntax unified + 5871 05c4 2CF8023B strh r3, [ip], #2 @ movhi + ARM GAS /tmp/ccdao7B1.s page 103 + + + 5872 05c8 DC45 cmp ip, fp + 5873 05ca 4046 mov r0, r8 + 5874 05cc 08F10208 add r8, r8, #2 + 5875 05d0 B5D1 bne .L865 + 5876 05d2 5946 mov r1, fp + 5877 05d4 9FE5 b .L861 + 5878 .L857: + 5879 05d6 0E9C ldr r4, [sp, #56] + 5880 05d8 D7F800C0 ldr ip, [r7] @ unaligned + 5881 05dc 54F8089C ldr r9, [r4, #-8] @ unaligned + 5882 05e0 D7F80270 ldr r7, [r7, #2] @ unaligned + 5883 05e4 029C ldr r4, [sp, #8] + 5884 .syntax unified + 5885 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5886 05e6 C4FBD926 smlaldx r2, r6, r4, r9 + 5887 @ 0 "" 2 + 5888 .thumb + 5889 .syntax unified + 5890 05ea 7446 mov r4, lr + 5891 .syntax unified + 5892 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5893 05ec C8FBD954 smlaldx r5, r4, r8, r9 + 5894 @ 0 "" 2 + 5895 .thumb + 5896 .syntax unified + 5897 05f0 A646 mov lr, r4 + 5898 .syntax unified + 5899 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5900 05f2 CCFBD901 smlaldx r0, r1, ip, r9 + 5901 @ 0 "" 2 + 5902 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5903 05f6 C7FBD93B smlaldx r3, fp, r7, r9 + 5904 @ 0 "" 2 + 5905 .thumb + 5906 .syntax unified + 5907 05fa 4EE7 b .L856 + 5908 .L974: + 5909 05fc 0E9C ldr r4, [sp, #56] + 5910 05fe 0A9F ldr r7, [sp, #40] + 5911 0600 34F906CC ldrsh ip, [r4, #-6] + 5912 0604 009C ldr r4, [sp] + 5913 0606 1FFA8CFC uxth ip, ip + 5914 060a E759 ldr r7, [r4, r7] @ unaligned + 5915 060c 029C ldr r4, [sp, #8] + 5916 .syntax unified + 5917 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5918 060e C4FBCC26 smlald r2, r6, r4, ip + 5919 @ 0 "" 2 + 5920 .thumb + 5921 .syntax unified + 5922 0612 7446 mov r4, lr + 5923 .syntax unified + 5924 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5925 0614 C8FBCC54 smlald r5, r4, r8, ip + 5926 @ 0 "" 2 + 5927 .thumb + 5928 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 104 + + + 5929 0618 A646 mov lr, r4 + 5930 .syntax unified + 5931 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5932 061a C8FBDC01 smlaldx r0, r1, r8, ip + 5933 @ 0 "" 2 + 5934 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5935 061e C7FBDC3B smlaldx r3, fp, r7, ip + 5936 @ 0 "" 2 + 5937 .thumb + 5938 .syntax unified + 5939 0622 3AE7 b .L856 + 5940 .L894: + 5941 0624 059B ldr r3, [sp, #20] + 5942 0626 1493 str r3, [sp, #80] + 5943 0628 32E5 b .L849 + 5944 .L836: + 5945 062a 0C9B ldr r3, [sp, #48] + 5946 062c 219C ldr r4, [sp, #132] + 5947 062e ABEB010B sub fp, fp, r1 + 5948 0632 DDE92020 ldrd r2, r0, [sp, #128] + 5949 0636 ABEB0303 sub r3, fp, r3 + 5950 063a 1393 str r3, [sp, #76] + 5951 063c 219B ldr r3, [sp, #132] + 5952 063e 02EB4000 add r0, r2, r0, lsl #1 + 5953 0642 0133 adds r3, r3, #1 + 5954 0644 049A ldr r2, [sp, #16] + 5955 0646 0093 str r3, [sp] + 5956 0648 032B cmp r3, #3 + 5957 064a 02EB4407 add r7, r2, r4, lsl #1 + 5958 064e 00F2C480 bhi .L975 + 5959 0652 009E ldr r6, [sp] + 5960 0654 002E cmp r6, #0 + 5961 0656 3FF4E3AD beq .L839 + 5962 .L971: + 5963 065a 059A ldr r2, [sp, #20] + 5964 065c B7F90050 ldrsh r5, [r7] + 5965 0660 B2F90040 ldrsh r4, [r2] + 5966 0664 0023 movs r3, #0 + 5967 0666 1A46 mov r2, r3 + 5968 .syntax unified + 5969 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5970 0668 C4FBC532 smlald r3, r2, r4, r5 + 5971 @ 0 "" 2 + 5972 .thumb + 5973 .syntax unified + 5974 066c 013E subs r6, r6, #1 + 5975 066e 1C46 mov r4, r3 + 5976 0670 1546 mov r5, r2 + 5977 0672 28D0 beq .L840 + 5978 0674 059C ldr r4, [sp, #20] + 5979 0676 37F9025C ldrsh r5, [r7, #-2] + 5980 067a B4F90240 ldrsh r4, [r4, #2] + 5981 .syntax unified + 5982 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5983 067e C4FBC532 smlald r3, r2, r4, r5 + 5984 @ 0 "" 2 + 5985 .thumb + ARM GAS /tmp/ccdao7B1.s page 105 + + + 5986 .syntax unified + 5987 0682 012E cmp r6, #1 + 5988 0684 1C46 mov r4, r3 + 5989 0686 1546 mov r5, r2 + 5990 0688 1DD0 beq .L840 + 5991 068a 059C ldr r4, [sp, #20] + 5992 068c 37F9045C ldrsh r5, [r7, #-4] + 5993 0690 B4F90440 ldrsh r4, [r4, #4] + 5994 .syntax unified + 5995 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5996 0694 C4FBC532 smlald r3, r2, r4, r5 + 5997 @ 0 "" 2 + 5998 .thumb + 5999 .syntax unified + 6000 0698 DB0B lsrs r3, r3, #15 + 6001 069a 43EA4243 orr r3, r3, r2, lsl #17 + 6002 069e 0246 mov r2, r0 + 6003 06a0 009E ldr r6, [sp] + 6004 .syntax unified + 6005 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 6006 06a2 03F30F03 ssat r3, #16, r3 + 6007 @ 0 "" 2 + 6008 .thumb + 6009 .syntax unified + 6010 06a6 22F8023B strh r3, [r2], #2 @ movhi + 6011 06aa 01F1FF3B add fp, r1, #-1 + 6012 06ae 0192 str r2, [sp, #4] + 6013 06b0 07F1020C add ip, r7, #2 + 6014 06b4 751C adds r5, r6, #1 + 6015 06b6 EFE5 b .L841 + 6016 .L972: + 6017 06b8 DDF888B0 ldr fp, [sp, #136] + 6018 06bc 019B ldr r3, [sp, #4] + 6019 06be 03EB4B03 add r3, r3, fp, lsl #1 + 6020 06c2 0B93 str r3, [sp, #44] + 6021 06c4 D8E4 b .L838 + 6022 .L840: + 6023 06c6 0346 mov r3, r0 + 6024 06c8 E40B lsrs r4, r4, #15 + 6025 06ca 44EA4544 orr r4, r4, r5, lsl #17 + 6026 .syntax unified + 6027 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 6028 06ce 04F30F04 ssat r4, #16, r4 + 6029 @ 0 "" 2 + 6030 .thumb + 6031 .syntax unified + 6032 06d2 23F8024B strh r4, [r3], #2 @ movhi + 6033 06d6 0B93 str r3, [sp, #44] + 6034 06d8 009B ldr r3, [sp] + 6035 06da BA1C adds r2, r7, #2 + 6036 06dc 01F1FF3E add lr, r1, #-1 + 6037 06e0 5D1C adds r5, r3, #1 + 6038 06e2 A7E5 b .L885 + 6039 .L842: + 6040 06e4 0B9B ldr r3, [sp, #44] + 6041 06e6 C90B lsrs r1, r1, #15 + 6042 06e8 BEF1010F cmp lr, #1 + ARM GAS /tmp/ccdao7B1.s page 106 + + + 6043 06ec 41EA4441 orr r1, r1, r4, lsl #17 + 6044 06f0 02F10208 add r8, r2, #2 + 6045 .syntax unified + 6046 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 6047 06f4 01F30F01 ssat r1, #16, r1 + 6048 @ 0 "" 2 + 6049 .thumb + 6050 .syntax unified + 6051 06f8 05F10100 add r0, r5, #1 + 6052 06fc 23F8021B strh r1, [r3], #2 @ movhi + 6053 0700 53D0 beq .L965 + 6054 0702 059F ldr r7, [sp, #20] + 6055 0704 B2F90260 ldrsh r6, [r2, #2] + 6056 0708 B7F90040 ldrsh r4, [r7] + 6057 070c 0021 movs r1, #0 + 6058 070e 0B46 mov r3, r1 + 6059 .syntax unified + 6060 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6061 0710 C4FBC613 smlald r1, r3, r4, r6 + 6062 @ 0 "" 2 + 6063 .thumb + 6064 .syntax unified + 6065 0714 B7F90240 ldrsh r4, [r7, #2] + 6066 0718 B2F90060 ldrsh r6, [r2] + 6067 .syntax unified + 6068 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6069 071c C4FBC613 smlald r1, r3, r4, r6 + 6070 @ 0 "" 2 + 6071 .thumb + 6072 .syntax unified + 6073 0720 0228 cmp r0, #2 + 6074 0722 05D0 beq .L843 + 6075 0724 B7F90400 ldrsh r0, [r7, #4] + 6076 0728 32F9024C ldrsh r4, [r2, #-2] + 6077 .syntax unified + 6078 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6079 072c C0FBC413 smlald r1, r3, r0, r4 + 6080 @ 0 "" 2 + 6081 .thumb + 6082 .syntax unified + 6083 .L843: + 6084 0730 0B9E ldr r6, [sp, #44] + 6085 0732 C90B lsrs r1, r1, #15 + 6086 0734 41EA4341 orr r1, r1, r3, lsl #17 + 6087 0738 012D cmp r5, #1 + 6088 073a 06F10403 add r3, r6, #4 + 6089 .syntax unified + 6090 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 6091 073e 01F30F01 ssat r1, #16, r1 + 6092 @ 0 "" 2 + 6093 .thumb + 6094 .syntax unified + 6095 0742 0193 str r3, [sp, #4] + 6096 0744 7180 strh r1, [r6, #2] @ movhi + 6097 0746 02F10407 add r7, r2, #4 + 6098 074a AEF1020B sub fp, lr, #2 + 6099 074e 3BD1 bne .L889 + ARM GAS /tmp/ccdao7B1.s page 107 + + + 6100 0750 BBF1000F cmp fp, #0 + 6101 0754 29D0 beq .L965 + 6102 0756 059D ldr r5, [sp, #20] + 6103 0758 B2F90440 ldrsh r4, [r2, #4] + 6104 075c B5F90000 ldrsh r0, [r5] + 6105 0760 0021 movs r1, #0 + 6106 0762 0B46 mov r3, r1 + 6107 .syntax unified + 6108 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6109 0764 C0FBC413 smlald r1, r3, r0, r4 + 6110 @ 0 "" 2 + 6111 .thumb + 6112 .syntax unified + 6113 0768 B5F90200 ldrsh r0, [r5, #2] + 6114 076c B2F90240 ldrsh r4, [r2, #2] + 6115 .syntax unified + 6116 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6117 0770 C0FBC413 smlald r1, r3, r0, r4 + 6118 @ 0 "" 2 + 6119 .thumb + 6120 .syntax unified + 6121 0774 9446 mov ip, r2 + 6122 0776 B5F90420 ldrsh r2, [r5, #4] + 6123 077a 3CF9060B ldrsh r0, [ip], #6 + 6124 .syntax unified + 6125 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6126 077e C2FBC013 smlald r1, r3, r2, r0 + 6127 @ 0 "" 2 + 6128 .thumb + 6129 .syntax unified + 6130 0782 C90B lsrs r1, r1, #15 + 6131 0784 41EA4341 orr r1, r1, r3, lsl #17 + 6132 0788 B31D adds r3, r6, #6 + 6133 .syntax unified + 6134 @ 190 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c + 6135 078a 01F30F01 ssat r1, #16, r1 + 6136 @ 0 "" 2 + 6137 .thumb + 6138 .syntax unified + 6139 078e AEF1030B sub fp, lr, #3 + 6140 0792 B180 strh r1, [r6, #4] @ movhi + 6141 0794 0193 str r3, [sp, #4] + 6142 0796 0425 movs r5, #4 + 6143 0798 7EE5 b .L841 + 6144 .L837: + 6145 079a BC46 mov ip, r7 + 6146 079c 1D46 mov r5, r3 + 6147 079e 0190 str r0, [sp, #4] + 6148 07a0 023F subs r7, r7, #2 + 6149 07a2 79E5 b .L841 + 6150 .L895: + 6151 07a4 0B99 ldr r1, [sp, #44] + 6152 07a6 B6E4 b .L861 + 6153 .L891: + 6154 07a8 019B ldr r3, [sp, #4] + 6155 .L965: + 6156 07aa 0B93 str r3, [sp, #44] + ARM GAS /tmp/ccdao7B1.s page 108 + + + 6157 07ac 64E4 b .L838 + 6158 .L896: + 6159 07ae BC46 mov ip, r7 + 6160 07b0 CEE5 b .L870 + 6161 .L853: + 6162 07b2 129A ldr r2, [sp, #72] + 6163 07b4 1498 ldr r0, [sp, #80] + 6164 07b6 023A subs r2, r2, #2 + 6165 07b8 0B46 mov r3, r1 + 6166 07ba 0992 str r2, [sp, #36] + 6167 07bc 9FE6 b .L860 + 6168 .L967: + 6169 07be 129B ldr r3, [sp, #72] + 6170 07c0 0B99 ldr r1, [sp, #44] + 6171 07c2 023B subs r3, r3, #2 + 6172 07c4 0993 str r3, [sp, #36] + 6173 07c6 A6E4 b .L861 + 6174 .L889: + 6175 07c8 BC46 mov ip, r7 + 6176 07ca 0425 movs r5, #4 + 6177 07cc 4746 mov r7, r8 + 6178 07ce 63E5 b .L841 + 6179 .L886: + 6180 07d0 4FF0FF30 mov r0, #-1 + 6181 07d4 E0E5 b .L963 + 6182 .L888: + 6183 07d6 0B90 str r0, [sp, #44] + 6184 07d8 4EE4 b .L838 + 6185 .L975: + 6186 07da BC46 mov ip, r7 + 6187 07dc 0190 str r0, [sp, #4] + 6188 07de 8B46 mov fp, r1 + 6189 07e0 023F subs r7, r7, #2 + 6190 07e2 1D46 mov r5, r3 + 6191 07e4 5CE5 b .L883 + 6193 07e6 00BF .section .text.arm_conv_partial_q31,"ax",%progbits + 6194 .align 1 + 6195 .p2align 2,,3 + 6196 .global arm_conv_partial_q31 + 6197 .syntax unified + 6198 .thumb + 6199 .thumb_func + 6200 .fpu fpv4-sp-d16 + 6202 arm_conv_partial_q31: + 6203 @ args = 12, pretend = 0, frame = 24 + 6204 @ frame_needed = 0, uses_anonymous_args = 0 + 6205 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 6206 0004 87B0 sub sp, sp, #28 + 6207 0006 9346 mov fp, r2 + 6208 0008 DDE91125 ldrd r2, r5, [sp, #68] + 6209 000c 4F1E subs r7, r1, #1 + 6210 000e 1C46 mov r4, r3 + 6211 0010 0193 str r3, [sp, #4] + 6212 0012 2A44 add r2, r2, r5 + 6213 0014 FB18 adds r3, r7, r3 + 6214 0016 9A42 cmp r2, r3 + 6215 0018 0390 str r0, [sp, #12] + ARM GAS /tmp/ccdao7B1.s page 109 + + + 6216 001a 00F2E480 bhi .L1002 + 6217 001e 8C42 cmp r4, r1 + 6218 0020 05D8 bhi .L978 + 6219 0022 5B46 mov r3, fp + 6220 0024 0191 str r1, [sp, #4] + 6221 0026 8346 mov fp, r0 + 6222 0028 0393 str r3, [sp, #12] + 6223 002a 671E subs r7, r4, #1 + 6224 002c 2146 mov r1, r4 + 6225 .L978: + 6226 002e 019B ldr r3, [sp, #4] + 6227 0030 1198 ldr r0, [sp, #68] + 6228 0032 9A42 cmp r2, r3 + 6229 0034 CCBF ite gt + 6230 0036 D31A subgt r3, r2, r3 + 6231 0038 0023 movle r3, #0 + 6232 003a 0293 str r3, [sp, #8] + 6233 003c 019B ldr r3, [sp, #4] + 6234 003e 8342 cmp r3, r0 + 6235 0040 03DC bgt .L980 + 6236 0042 1B1A subs r3, r3, r0 + 6237 0044 0298 ldr r0, [sp, #8] + 6238 0046 1844 add r0, r0, r3 + 6239 0048 0290 str r0, [sp, #8] + 6240 .L980: + 6241 004a 119B ldr r3, [sp, #68] + 6242 004c DB43 mvns r3, r3 + 6243 004e 5B18 adds r3, r3, r1 + 6244 0050 38D0 beq .L1029 + 6245 0052 BA42 cmp r2, r7 + 6246 0054 00F2B580 bhi .L983 + 6247 0058 029B ldr r3, [sp, #8] + 6248 005a 1198 ldr r0, [sp, #68] + 6249 005c 5B42 rsbs r3, r3, #0 + 6250 005e 0493 str r3, [sp, #16] + 6251 0060 DDE91032 ldrd r3, r2, [sp, #64] + 6252 0064 03EB8208 add r8, r3, r2, lsl #2 + 6253 0068 039B ldr r3, [sp, #12] + 6254 006a 03EB8009 add r9, r3, r0, lsl #2 + 6255 006e 129B ldr r3, [sp, #72] + 6256 0070 0132 adds r2, r2, #1 + 6257 0072 7BB3 cbz r3, .L982 + 6258 .L984: + 6259 0074 129B ldr r3, [sp, #72] + 6260 0076 0597 str r7, [sp, #20] + 6261 0078 D318 adds r3, r2, r3 + 6262 007a C246 mov r10, r8 + 6263 007c 9E46 mov lr, r3 + 6264 .L986: + 6265 007e 1646 mov r6, r2 + 6266 0080 7AB1 cbz r2, .L988 + 6267 0082 0023 movs r3, #0 + 6268 0084 1046 mov r0, r2 + 6269 0086 CC46 mov ip, r9 + 6270 0088 5F46 mov r7, fp + 6271 008a 1E46 mov r6, r3 + 6272 .L985: + ARM GAS /tmp/ccdao7B1.s page 110 + + + 6273 008c 57F8045B ldr r5, [r7], #4 + 6274 0090 5CF80449 ldr r4, [ip], #-4 + 6275 0094 0138 subs r0, r0, #1 + 6276 0096 C5FB0436 smlal r3, r6, r5, r4 + 6277 009a F7D1 bne .L985 + 6278 009c DB0F lsrs r3, r3, #31 + 6279 009e 43EA4606 orr r6, r3, r6, lsl #1 + 6280 .L988: + 6281 00a2 0132 adds r2, r2, #1 + 6282 00a4 7245 cmp r2, lr + 6283 00a6 4AF8046B str r6, [r10], #4 + 6284 00aa 09F10409 add r9, r9, #4 + 6285 00ae E6D1 bne .L986 + 6286 00b0 129B ldr r3, [sp, #72] + 6287 00b2 059F ldr r7, [sp, #20] + 6288 00b4 08EB8308 add r8, r8, r3, lsl #2 + 6289 00b8 119B ldr r3, [sp, #68] + 6290 00ba 5B1A subs r3, r3, r1 + 6291 00bc 002B cmp r3, #0 + 6292 00be 0DDA bge .L1030 + 6293 .L1005: + 6294 00c0 5A46 mov r2, fp + 6295 00c2 10E0 b .L989 + 6296 .L1029: + 6297 00c4 029A ldr r2, [sp, #8] + 6298 00c6 129B ldr r3, [sp, #72] + 6299 00c8 9B1A subs r3, r3, r2 + 6300 00ca 0493 str r3, [sp, #16] + 6301 00cc DDE91032 ldrd r3, r2, [sp, #64] + 6302 00d0 03EB8208 add r8, r3, r2, lsl #2 + 6303 .L982: + 6304 00d4 119B ldr r3, [sp, #68] + 6305 00d6 5B1A subs r3, r3, r1 + 6306 00d8 002B cmp r3, #0 + 6307 00da F1DB blt .L1005 + 6308 .L1030: + 6309 00dc 119B ldr r3, [sp, #68] + 6310 00de 5A1C adds r2, r3, #1 + 6311 00e0 521A subs r2, r2, r1 + 6312 00e2 0BEB8202 add r2, fp, r2, lsl #2 + 6313 .L989: + 6314 00e6 039B ldr r3, [sp, #12] + 6315 00e8 01F1804C add ip, r1, #1073741824 + 6316 00ec 0CF1FF3C add ip, ip, #-1 + 6317 00f0 0329 cmp r1, #3 + 6318 00f2 03EB8C0C add ip, r3, ip, lsl #2 + 6319 00f6 049B ldr r3, [sp, #16] + 6320 00f8 49D8 bhi .L990 + 6321 00fa 002B cmp r3, #0 + 6322 00fc 71D0 beq .L1007 + 6323 00fe 08EB8300 add r0, r8, r3, lsl #2 + 6324 .L992: + 6325 0102 0029 cmp r1, #0 + 6326 0104 41D0 beq .L1031 + 6327 0106 1468 ldr r4, [r2] + 6328 0108 DCF80030 ldr r3, [ip] + 6329 010c 0129 cmp r1, #1 + ARM GAS /tmp/ccdao7B1.s page 111 + + + 6330 010e 83FB0434 smull r3, r4, r3, r4 + 6331 0112 0BD0 beq .L995 + 6332 0114 5568 ldr r5, [r2, #4] + 6333 0116 5CF8046C ldr r6, [ip, #-4] + 6334 011a 0229 cmp r1, #2 + 6335 011c C6FB0534 smlal r3, r4, r6, r5 + 6336 0120 04D0 beq .L995 + 6337 0122 9668 ldr r6, [r2, #8] + 6338 0124 5CF8085C ldr r5, [ip, #-8] + 6339 0128 C6FB0534 smlal r3, r4, r6, r5 + 6340 .L995: + 6341 012c DB0F lsrs r3, r3, #31 + 6342 012e 43EA4403 orr r3, r3, r4, lsl #1 + 6343 .L997: + 6344 0132 48F8043B str r3, [r8], #4 + 6345 0136 8045 cmp r8, r0 + 6346 0138 02F10402 add r2, r2, #4 + 6347 013c E1D1 bne .L992 + 6348 .L991: + 6349 013e 019B ldr r3, [sp, #4] + 6350 0140 0133 adds r3, r3, #1 + 6351 0142 591A subs r1, r3, r1 + 6352 0144 029B ldr r3, [sp, #8] + 6353 0146 0BEB810B add fp, fp, r1, lsl #2 + 6354 014a D3B1 cbz r3, .L998 + 6355 014c A7EB0308 sub r8, r7, r3 + 6356 .L999: + 6357 0150 3B46 mov r3, r7 + 6358 0152 7FB1 cbz r7, .L1001 + 6359 0154 0023 movs r3, #0 + 6360 0156 3A46 mov r2, r7 + 6361 0158 E646 mov lr, ip + 6362 015a 5E46 mov r6, fp + 6363 015c 1D46 mov r5, r3 + 6364 .L1000: + 6365 015e 56F8044B ldr r4, [r6], #4 + 6366 0162 5EF80419 ldr r1, [lr], #-4 + 6367 0166 013A subs r2, r2, #1 + 6368 0168 C4FB0135 smlal r3, r5, r4, r1 + 6369 016c F7D1 bne .L1000 + 6370 016e DB0F lsrs r3, r3, #31 + 6371 0170 43EA4503 orr r3, r3, r5, lsl #1 + 6372 .L1001: + 6373 0174 013F subs r7, r7, #1 + 6374 0176 4745 cmp r7, r8 + 6375 0178 40F8043B str r3, [r0], #4 + 6376 017c 0BF1040B add fp, fp, #4 + 6377 0180 E6D1 bne .L999 + 6378 .L998: + 6379 0182 0020 movs r0, #0 + 6380 .L1025: + 6381 0184 07B0 add sp, sp, #28 + 6382 @ sp needed + 6383 0186 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 6384 .L1031: + 6385 018a 0B46 mov r3, r1 + 6386 018c D1E7 b .L997 + ARM GAS /tmp/ccdao7B1.s page 112 + + + 6387 .L990: + 6388 018e 43B3 cbz r3, .L1007 + 6389 0190 08EB8300 add r0, r8, r3, lsl #2 + 6390 .L994: + 6391 0194 0023 movs r3, #0 + 6392 0196 0C46 mov r4, r1 + 6393 0198 E246 mov r10, ip + 6394 019a 9146 mov r9, r2 + 6395 019c 9E46 mov lr, r3 + 6396 .L993: + 6397 019e 59F8046B ldr r6, [r9], #4 + 6398 01a2 5AF80459 ldr r5, [r10], #-4 + 6399 01a6 013C subs r4, r4, #1 + 6400 01a8 C6FB053E smlal r3, lr, r6, r5 + 6401 01ac F7D1 bne .L993 + 6402 01ae DB0F lsrs r3, r3, #31 + 6403 01b0 43EA4E03 orr r3, r3, lr, lsl #1 + 6404 01b4 48F8043B str r3, [r8], #4 + 6405 01b8 8045 cmp r8, r0 + 6406 01ba 02F10402 add r2, r2, #4 + 6407 01be E9D1 bne .L994 + 6408 01c0 BDE7 b .L991 + 6409 .L983: + 6410 01c2 129A ldr r2, [sp, #72] + 6411 01c4 1293 str r3, [sp, #72] + 6412 01c6 D01A subs r0, r2, r3 + 6413 01c8 029A ldr r2, [sp, #8] + 6414 01ca 821A subs r2, r0, r2 + 6415 01cc 0492 str r2, [sp, #16] + 6416 01ce DDE91032 ldrd r3, r2, [sp, #64] + 6417 01d2 1198 ldr r0, [sp, #68] + 6418 01d4 03EB8208 add r8, r3, r2, lsl #2 + 6419 01d8 039B ldr r3, [sp, #12] + 6420 01da 0132 adds r2, r2, #1 + 6421 01dc 03EB8009 add r9, r3, r0, lsl #2 + 6422 01e0 48E7 b .L984 + 6423 .L1007: + 6424 01e2 4046 mov r0, r8 + 6425 01e4 ABE7 b .L991 + 6426 .L1002: + 6427 01e6 4FF0FF30 mov r0, #-1 + 6428 01ea CBE7 b .L1025 + 6430 .section .text.arm_conv_partial_q7,"ax",%progbits + 6431 .align 1 + 6432 .p2align 2,,3 + 6433 .global arm_conv_partial_q7 + 6434 .syntax unified + 6435 .thumb + 6436 .thumb_func + 6437 .fpu fpv4-sp-d16 + 6439 arm_conv_partial_q7: + 6440 @ args = 12, pretend = 0, frame = 16 + 6441 @ frame_needed = 0, uses_anonymous_args = 0 + 6442 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 6443 0004 85B0 sub sp, sp, #20 + 6444 0006 DDE90F46 ldrd r4, r6, [sp, #60] + 6445 000a 4D1E subs r5, r1, #1 + ARM GAS /tmp/ccdao7B1.s page 113 + + + 6446 000c 0746 mov r7, r0 + 6447 000e 0290 str r0, [sp, #8] + 6448 0010 3444 add r4, r4, r6 + 6449 0012 5819 adds r0, r3, r5 + 6450 0014 8442 cmp r4, r0 + 6451 0016 0095 str r5, [sp] + 6452 0018 00F2E880 bhi .L1059 + 6453 001c 8B42 cmp r3, r1 + 6454 001e 07D8 bhi .L1034 + 6455 0020 1046 mov r0, r2 + 6456 0022 0290 str r0, [sp, #8] + 6457 0024 1846 mov r0, r3 + 6458 0026 013B subs r3, r3, #1 + 6459 0028 0093 str r3, [sp] + 6460 002a 3A46 mov r2, r7 + 6461 002c 0B46 mov r3, r1 + 6462 002e 0146 mov r1, r0 + 6463 .L1034: + 6464 0030 9C42 cmp r4, r3 + 6465 0032 CCBF ite gt + 6466 0034 E01A subgt r0, r4, r3 + 6467 0036 0020 movle r0, #0 + 6468 0038 0190 str r0, [sp, #4] + 6469 003a 0F98 ldr r0, [sp, #60] + 6470 003c 8342 cmp r3, r0 + 6471 003e 03DC bgt .L1036 + 6472 0040 019D ldr r5, [sp, #4] + 6473 0042 181A subs r0, r3, r0 + 6474 0044 0544 add r5, r5, r0 + 6475 0046 0195 str r5, [sp, #4] + 6476 .L1036: + 6477 0048 0F98 ldr r0, [sp, #60] + 6478 004a C043 mvns r0, r0 + 6479 004c 4018 adds r0, r0, r1 + 6480 004e 39D0 beq .L1084 + 6481 0050 009D ldr r5, [sp] + 6482 0052 AC42 cmp r4, r5 + 6483 0054 00F2B680 bhi .L1039 + 6484 0058 0198 ldr r0, [sp, #4] + 6485 005a 4042 rsbs r0, r0, #0 + 6486 005c 0390 str r0, [sp, #12] + 6487 005e DDE90E04 ldrd r0, r4, [sp, #56] + 6488 0062 00EB0408 add r8, r0, r4 + 6489 0066 0298 ldr r0, [sp, #8] + 6490 0068 00EB040B add fp, r0, r4 + 6491 006c 1098 ldr r0, [sp, #64] + 6492 006e 04F1010A add r10, r4, #1 + 6493 0072 78B3 cbz r0, .L1038 + 6494 .L1040: + 6495 0074 1098 ldr r0, [sp, #64] + 6496 0076 5746 mov r7, r10 + 6497 0078 ABEB0A0B sub fp, fp, r10 + 6498 007c 02EB0A06 add r6, r2, r10 + 6499 0080 C146 mov r9, r8 + 6500 0082 8244 add r10, r10, r0 + 6501 .L1042: + 6502 0084 0BEB0705 add r5, fp, r7 + ARM GAS /tmp/ccdao7B1.s page 114 + + + 6503 0088 3C46 mov r4, r7 + 6504 008a 57B1 cbz r7, .L1044 + 6505 008c 1046 mov r0, r2 + 6506 008e 0024 movs r4, #0 + 6507 .L1041: + 6508 0090 10F901EB ldrsb lr, [r0], #1 + 6509 0094 15F901C9 ldrsb ip, [r5], #-1 + 6510 0098 B042 cmp r0, r6 + 6511 009a 1EFB0C44 smlabb r4, lr, ip, r4 + 6512 009e F7D1 bne .L1041 + 6513 00a0 E411 asrs r4, r4, #7 + 6514 .L1044: + 6515 00a2 0137 adds r7, r7, #1 + 6516 00a4 BA45 cmp r10, r7 + 6517 .syntax unified + 6518 @ 235 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" + 6519 00a6 04F30704 ssat r4, #8, r4 + 6520 @ 0 "" 2 + 6521 .thumb + 6522 .syntax unified + 6523 00aa 06F10106 add r6, r6, #1 + 6524 00ae 09F8014B strb r4, [r9], #1 + 6525 00b2 E7D1 bne .L1042 + 6526 00b4 1098 ldr r0, [sp, #64] + 6527 00b6 8044 add r8, r8, r0 + 6528 00b8 0F98 ldr r0, [sp, #60] + 6529 00ba 401A subs r0, r0, r1 + 6530 00bc 0028 cmp r0, #0 + 6531 00be 0DDA bge .L1085 + 6532 .L1062: + 6533 00c0 9146 mov r9, r2 + 6534 00c2 11E0 b .L1045 + 6535 .L1084: + 6536 00c4 019C ldr r4, [sp, #4] + 6537 00c6 1098 ldr r0, [sp, #64] + 6538 00c8 001B subs r0, r0, r4 + 6539 00ca 0390 str r0, [sp, #12] + 6540 00cc DDE90E04 ldrd r0, r4, [sp, #56] + 6541 00d0 00EB0408 add r8, r0, r4 + 6542 .L1038: + 6543 00d4 0F98 ldr r0, [sp, #60] + 6544 00d6 401A subs r0, r0, r1 + 6545 00d8 0028 cmp r0, #0 + 6546 00da F1DB blt .L1062 + 6547 .L1085: + 6548 00dc 0F98 ldr r0, [sp, #60] + 6549 00de 00F10109 add r9, r0, #1 + 6550 00e2 A9EB0109 sub r9, r9, r1 + 6551 00e6 9144 add r9, r9, r2 + 6552 .L1045: + 6553 00e8 0298 ldr r0, [sp, #8] + 6554 00ea 009C ldr r4, [sp] + 6555 00ec 0329 cmp r1, #3 + 6556 00ee 2044 add r0, r0, r4 + 6557 00f0 8246 mov r10, r0 + 6558 00f2 0398 ldr r0, [sp, #12] + 6559 00f4 4AD8 bhi .L1046 + ARM GAS /tmp/ccdao7B1.s page 115 + + + 6560 00f6 0028 cmp r0, #0 + 6561 00f8 76D0 beq .L1064 + 6562 00fa 4044 add r0, r0, r8 + 6563 00fc 8646 mov lr, r0 + 6564 .L1048: + 6565 00fe 0029 cmp r1, #0 + 6566 0100 42D0 beq .L1086 + 6567 0102 99F90040 ldrsb r4, [r9] + 6568 0106 9AF90000 ldrsb r0, [r10] + 6569 010a 0129 cmp r1, #1 + 6570 010c 10FB04F0 smulbb r0, r0, r4 + 6571 0110 0DD0 beq .L1051 + 6572 0112 99F90140 ldrsb r4, [r9, #1] + 6573 0116 1AF9015C ldrsb r5, [r10, #-1] + 6574 011a 0229 cmp r1, #2 + 6575 011c 15FB0400 smlabb r0, r5, r4, r0 + 6576 0120 05D0 beq .L1051 + 6577 0122 99F90250 ldrsb r5, [r9, #2] + 6578 0126 1AF9024C ldrsb r4, [r10, #-2] + 6579 012a 15FB0400 smlabb r0, r5, r4, r0 + 6580 .L1051: + 6581 012e C011 asrs r0, r0, #7 + 6582 .L1053: + 6583 .syntax unified + 6584 @ 574 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" + 6585 0130 00F30700 ssat r0, #8, r0 + 6586 @ 0 "" 2 + 6587 .thumb + 6588 .syntax unified + 6589 0134 08F8010B strb r0, [r8], #1 + 6590 0138 C645 cmp lr, r8 + 6591 013a 09F10109 add r9, r9, #1 + 6592 013e DED1 bne .L1048 + 6593 .L1047: + 6594 0140 0133 adds r3, r3, #1 + 6595 0142 591A subs r1, r3, r1 + 6596 0144 019B ldr r3, [sp, #4] + 6597 0146 1144 add r1, r1, r2 + 6598 0148 D3B1 cbz r3, .L1054 + 6599 014a 009E ldr r6, [sp] + 6600 014c 7344 add r3, r3, lr + 6601 014e 9C46 mov ip, r3 + 6602 0150 8F19 adds r7, r1, r6 + 6603 .L1055: + 6604 0152 BB1B subs r3, r7, r6 + 6605 0154 3246 mov r2, r6 + 6606 0156 5EB1 cbz r6, .L1058 + 6607 0158 9D19 adds r5, r3, r6 + 6608 015a 5146 mov r1, r10 + 6609 015c 0022 movs r2, #0 + 6610 .L1056: + 6611 015e 13F9014B ldrsb r4, [r3], #1 + 6612 0162 11F90109 ldrsb r0, [r1], #-1 + 6613 0166 AB42 cmp r3, r5 + 6614 0168 14FB0022 smlabb r2, r4, r0, r2 + 6615 016c F7D1 bne .L1056 + 6616 016e D211 asrs r2, r2, #7 + ARM GAS /tmp/ccdao7B1.s page 116 + + + 6617 .L1058: + 6618 .syntax unified + 6619 @ 681 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" + 6620 0170 02F30702 ssat r2, #8, r2 + 6621 @ 0 "" 2 + 6622 .thumb + 6623 .syntax unified + 6624 0174 0EF8012B strb r2, [lr], #1 + 6625 0178 E645 cmp lr, ip + 6626 017a 06F1FF36 add r6, r6, #-1 + 6627 017e E8D1 bne .L1055 + 6628 .L1054: + 6629 0180 0020 movs r0, #0 + 6630 .L1081: + 6631 0182 05B0 add sp, sp, #20 + 6632 @ sp needed + 6633 0184 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 6634 .L1086: + 6635 0188 0846 mov r0, r1 + 6636 018a D1E7 b .L1053 + 6637 .L1046: + 6638 018c 60B3 cbz r0, .L1064 + 6639 018e 4044 add r0, r0, r8 + 6640 0190 8646 mov lr, r0 + 6641 0192 09EB010C add ip, r9, r1 + 6642 .L1050: + 6643 0196 5546 mov r5, r10 + 6644 0198 4846 mov r0, r9 + 6645 019a 0024 movs r4, #0 + 6646 .L1049: + 6647 019c 10F9017B ldrsb r7, [r0], #1 + 6648 01a0 15F90169 ldrsb r6, [r5], #-1 + 6649 01a4 6045 cmp r0, ip + 6650 01a6 17FB0644 smlabb r4, r7, r6, r4 + 6651 01aa F7D1 bne .L1049 + 6652 01ac E411 asrs r4, r4, #7 + 6653 .syntax unified + 6654 @ 537 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c" + 6655 01ae 04F30704 ssat r4, #8, r4 + 6656 @ 0 "" 2 + 6657 .thumb + 6658 .syntax unified + 6659 01b2 08F8014B strb r4, [r8], #1 + 6660 01b6 F045 cmp r8, lr + 6661 01b8 09F10109 add r9, r9, #1 + 6662 01bc 0CF1010C add ip, ip, #1 + 6663 01c0 E9D1 bne .L1050 + 6664 01c2 BDE7 b .L1047 + 6665 .L1039: + 6666 01c4 109C ldr r4, [sp, #64] + 6667 01c6 1090 str r0, [sp, #64] + 6668 01c8 A4EB000E sub lr, r4, r0 + 6669 01cc 019C ldr r4, [sp, #4] + 6670 01ce AEEB0404 sub r4, lr, r4 + 6671 01d2 0394 str r4, [sp, #12] + 6672 01d4 DDE90E04 ldrd r0, r4, [sp, #56] + 6673 01d8 00EB0408 add r8, r0, r4 + ARM GAS /tmp/ccdao7B1.s page 117 + + + 6674 01dc 0298 ldr r0, [sp, #8] + 6675 01de 04F1010A add r10, r4, #1 + 6676 01e2 00EB040B add fp, r0, r4 + 6677 01e6 45E7 b .L1040 + 6678 .L1064: + 6679 01e8 C646 mov lr, r8 + 6680 01ea A9E7 b .L1047 + 6681 .L1059: + 6682 01ec 4FF0FF30 mov r0, #-1 + 6683 01f0 C7E7 b .L1081 + 6685 01f2 00BF .section .text.arm_conv_q15,"ax",%progbits + 6686 .align 1 + 6687 .p2align 2,,3 + 6688 .global arm_conv_q15 + 6689 .syntax unified + 6690 .thumb + 6691 .thumb_func + 6692 .fpu fpv4-sp-d16 + 6694 arm_conv_q15: + 6695 @ args = 4, pretend = 0, frame = 80 + 6696 @ frame_needed = 0, uses_anonymous_args = 0 + 6697 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 6698 0004 95B0 sub sp, sp, #84 + 6699 0006 9942 cmp r1, r3 + 6700 0008 1E9C ldr r4, [sp, #120] + 6701 000a 0793 str r3, [sp, #28] + 6702 000c 0C90 str r0, [sp, #48] + 6703 000e 05D2 bcs .L1088 + 6704 0010 1D46 mov r5, r3 + 6705 0012 0B46 mov r3, r1 + 6706 0014 0C92 str r2, [sp, #48] + 6707 0016 2946 mov r1, r5 + 6708 0018 0246 mov r2, r0 + 6709 001a 0793 str r3, [sp, #28] + 6710 .L1088: + 6711 001c 079B ldr r3, [sp, #28] + 6712 001e 0131 adds r1, r1, #1 + 6713 0020 C91A subs r1, r1, r3 + 6714 0022 581E subs r0, r3, #1 + 6715 0024 1291 str r1, [sp, #72] + 6716 0026 1190 str r0, [sp, #68] + 6717 0028 00F0CA81 beq .L1126 + 6718 002c 0C9F ldr r7, [sp, #48] + 6719 002e B2F90050 ldrsh r5, [r2] + 6720 0032 B7F90000 ldrsh r0, [r7] + 6721 0036 0023 movs r3, #0 + 6722 0038 1946 mov r1, r3 + 6723 003a 1E46 mov r6, r3 + 6724 .syntax unified + 6725 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6726 003c C0FBC516 smlald r1, r6, r0, r5 + 6727 @ 0 "" 2 + 6728 .thumb + 6729 .syntax unified + 6730 0040 2046 mov r0, r4 + 6731 0042 C90B lsrs r1, r1, #15 + 6732 0044 41EA4641 orr r1, r1, r6, lsl #17 + ARM GAS /tmp/ccdao7B1.s page 118 + + + 6733 .syntax unified + 6734 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 6735 0048 01F30F01 ssat r1, #16, r1 + 6736 @ 0 "" 2 + 6737 .thumb + 6738 .syntax unified + 6739 004c 20F8021B strh r1, [r0], #2 @ movhi + 6740 0050 0799 ldr r1, [sp, #28] + 6741 0052 0990 str r0, [sp, #36] + 6742 0054 0229 cmp r1, #2 + 6743 0056 00F0B481 beq .L1089 + 6744 005a B7F90050 ldrsh r5, [r7] + 6745 005e B2F90260 ldrsh r6, [r2, #2] + 6746 0062 1946 mov r1, r3 + 6747 0064 1846 mov r0, r3 + 6748 .syntax unified + 6749 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6750 0066 C5FBC610 smlald r1, r0, r5, r6 + 6751 @ 0 "" 2 + 6752 .thumb + 6753 .syntax unified + 6754 006a 9446 mov ip, r2 + 6755 006c B7F90250 ldrsh r5, [r7, #2] + 6756 0070 3CF9046B ldrsh r6, [ip], #4 + 6757 .syntax unified + 6758 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6759 0074 C5FBC610 smlald r1, r0, r5, r6 + 6760 @ 0 "" 2 + 6761 .thumb + 6762 .syntax unified + 6763 0078 C90B lsrs r1, r1, #15 + 6764 007a 41EA4041 orr r1, r1, r0, lsl #17 + 6765 .syntax unified + 6766 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 6767 007e 01F30F01 ssat r1, #16, r1 + 6768 @ 0 "" 2 + 6769 .thumb + 6770 .syntax unified + 6771 0082 6180 strh r1, [r4, #2] @ movhi + 6772 0084 0799 ldr r1, [sp, #28] + 6773 0086 201D adds r0, r4, #4 + 6774 0088 0329 cmp r1, #3 + 6775 008a 0990 str r0, [sp, #36] + 6776 008c 00F09981 beq .L1089 + 6777 0090 B7F90000 ldrsh r0, [r7] + 6778 0094 B2F90450 ldrsh r5, [r2, #4] + 6779 0098 1E46 mov r6, r3 + 6780 .syntax unified + 6781 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6782 009a C0FBC536 smlald r3, r6, r0, r5 + 6783 @ 0 "" 2 + 6784 .thumb + 6785 .syntax unified + 6786 009e B7F90200 ldrsh r0, [r7, #2] + 6787 00a2 B2F90250 ldrsh r5, [r2, #2] + 6788 00a6 3146 mov r1, r6 + 6789 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 119 + + + 6790 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6791 00a8 C0FBC531 smlald r3, r1, r0, r5 + 6792 @ 0 "" 2 + 6793 .thumb + 6794 .syntax unified + 6795 00ac 1046 mov r0, r2 + 6796 00ae B7F90450 ldrsh r5, [r7, #4] + 6797 00b2 30F9066B ldrsh r6, [r0], #6 + 6798 .syntax unified + 6799 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6800 00b6 C5FBC631 smlald r3, r1, r5, r6 + 6801 @ 0 "" 2 + 6802 .thumb + 6803 .syntax unified + 6804 00ba DB0B lsrs r3, r3, #15 + 6805 00bc 43EA4143 orr r3, r3, r1, lsl #17 + 6806 .syntax unified + 6807 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 6808 00c0 03F30F03 ssat r3, #16, r3 + 6809 @ 0 "" 2 + 6810 .thumb + 6811 .syntax unified + 6812 00c4 A380 strh r3, [r4, #4] @ movhi + 6813 00c6 079B ldr r3, [sp, #28] + 6814 00c8 0634 adds r4, r4, #6 + 6815 00ca B3F1040B subs fp, r3, #4 + 6816 00ce 0994 str r4, [sp, #36] + 6817 00d0 00F06D82 beq .L1090 + 6818 00d4 02F10808 add r8, r2, #8 + 6819 00d8 A8EB0008 sub r8, r8, r0 + 6820 00dc A646 mov lr, r4 + 6821 00de 0426 movs r6, #4 + 6822 00e0 CDF804B0 str fp, [sp, #4] + 6823 00e4 0692 str r2, [sp, #24] + 6824 00e6 9946 mov r9, r3 + 6825 .L1094: + 6826 00e8 B508 lsrs r5, r6, #2 + 6827 00ea 0023 movs r3, #0 + 6828 00ec 6046 mov r0, ip + 6829 00ee 3946 mov r1, r7 + 6830 00f0 2C46 mov r4, r5 + 6831 00f2 1A46 mov r2, r3 + 6832 .L1091: + 6833 00f4 D1F800A0 ldr r10, [r1] @ unaligned + 6834 00f8 D0F800B0 ldr fp, [r0] @ unaligned + 6835 .syntax unified + 6836 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6837 00fc CAFBDB32 smlaldx r3, r2, r10, fp + 6838 @ 0 "" 2 + 6839 .thumb + 6840 .syntax unified + 6841 0100 D1F804A0 ldr r10, [r1, #4] @ unaligned + 6842 0104 50F804BC ldr fp, [r0, #-4] @ unaligned + 6843 0108 0831 adds r1, r1, #8 + 6844 010a 0838 subs r0, r0, #8 + 6845 .syntax unified + 6846 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccdao7B1.s page 120 + + + 6847 010c CAFBDB32 smlaldx r3, r2, r10, fp + 6848 @ 0 "" 2 + 6849 .thumb + 6850 .syntax unified + 6851 0110 013C subs r4, r4, #1 + 6852 0112 EFD1 bne .L1091 + 6853 0114 C5EB4571 rsb r1, r5, r5, lsl #29 + 6854 0118 16F00300 ands r0, r6, #3 + 6855 011c 0CEBC101 add r1, ip, r1, lsl #3 + 6856 0120 07EBC504 add r4, r7, r5, lsl #3 + 6857 0124 15D0 beq .L1092 + 6858 0126 37F93550 ldrsh r5, [r7, r5, lsl #3] + 6859 012a B1F902A0 ldrsh r10, [r1, #2] + 6860 .syntax unified + 6861 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6862 012e C5FBCA32 smlald r3, r2, r5, r10 + 6863 @ 0 "" 2 + 6864 .thumb + 6865 .syntax unified + 6866 0132 0138 subs r0, r0, #1 + 6867 0134 0DD0 beq .L1092 + 6868 0136 B4F90250 ldrsh r5, [r4, #2] + 6869 013a B1F900A0 ldrsh r10, [r1] + 6870 .syntax unified + 6871 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6872 013e C5FBCA32 smlald r3, r2, r5, r10 + 6873 @ 0 "" 2 + 6874 .thumb + 6875 .syntax unified + 6876 0142 0128 cmp r0, #1 + 6877 0144 05D0 beq .L1092 + 6878 0146 B4F90400 ldrsh r0, [r4, #4] + 6879 014a 31F9021C ldrsh r1, [r1, #-2] + 6880 .syntax unified + 6881 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6882 014e C0FBC132 smlald r3, r2, r0, r1 + 6883 @ 0 "" 2 + 6884 .thumb + 6885 .syntax unified + 6886 .L1092: + 6887 0152 0136 adds r6, r6, #1 + 6888 0154 DB0B lsrs r3, r3, #15 + 6889 0156 B145 cmp r9, r6 + 6890 0158 43EA4243 orr r3, r3, r2, lsl #17 + 6891 015c C444 add ip, ip, r8 + 6892 .syntax unified + 6893 @ 390 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 6894 015e 03F30F03 ssat r3, #16, r3 + 6895 @ 0 "" 2 + 6896 .thumb + 6897 .syntax unified + 6898 0162 2EF8023B strh r3, [lr], #2 @ movhi + 6899 0166 BFD1 bne .L1094 + 6900 0168 099B ldr r3, [sp, #36] + 6901 016a DDF804B0 ldr fp, [sp, #4] + 6902 016e 0799 ldr r1, [sp, #28] + 6903 0170 069A ldr r2, [sp, #24] + ARM GAS /tmp/ccdao7B1.s page 121 + + + 6904 0172 03EB4B03 add r3, r3, fp, lsl #1 + 6905 0176 0993 str r3, [sp, #36] + 6906 0178 01F10043 add r3, r1, #-2147483648 + 6907 017c 013B subs r3, r3, #1 + 6908 017e 02EB4303 add r3, r2, r3, lsl #1 + 6909 0182 0329 cmp r1, #3 + 6910 0184 1093 str r3, [sp, #64] + 6911 0186 40F22381 bls .L1125 + 6912 .L1095: + 6913 018a 129B ldr r3, [sp, #72] + 6914 018c 9908 lsrs r1, r3, #2 + 6915 018e 1391 str r1, [sp, #76] + 6916 0190 00F0FC81 beq .L1098 + 6917 0194 0798 ldr r0, [sp, #28] + 6918 0196 109B ldr r3, [sp, #64] + 6919 0198 0691 str r1, [sp, #24] + 6920 019a 8208 lsrs r2, r0, #2 + 6921 019c 9C1E subs r4, r3, #2 + 6922 019e C2EB4273 rsb r3, r2, r2, lsl #29 + 6923 01a2 04EBC303 add r3, r4, r3, lsl #3 + 6924 01a6 0833 adds r3, r3, #8 + 6925 01a8 0D93 str r3, [sp, #52] + 6926 01aa D300 lsls r3, r2, #3 + 6927 01ac 0433 adds r3, r3, #4 + 6928 01ae 0B93 str r3, [sp, #44] + 6929 01b0 00F00303 and r3, r0, #3 + 6930 01b4 0893 str r3, [sp, #32] + 6931 01b6 0C9B ldr r3, [sp, #48] + 6932 01b8 0193 str r3, [sp, #4] + 6933 01ba 099B ldr r3, [sp, #36] + 6934 01bc 0E92 str r2, [sp, #56] + 6935 01be 0A94 str r4, [sp, #40] + 6936 01c0 0293 str r3, [sp, #8] + 6937 .L1104: + 6938 01c2 019A ldr r2, [sp, #4] + 6939 01c4 DDF82890 ldr r9, [sp, #40] + 6940 01c8 DDF838A0 ldr r10, [sp, #56] + 6941 01cc 1468 ldr r4, [r2] @ unaligned + 6942 01ce D2F80280 ldr r8, [r2, #2] @ unaligned + 6943 01d2 0023 movs r3, #0 + 6944 01d4 02F1040C add ip, r2, #4 + 6945 01d8 9B46 mov fp, r3 + 6946 01da 1846 mov r0, r3 + 6947 01dc 1946 mov r1, r3 + 6948 01de 1D46 mov r5, r3 + 6949 01e0 9E46 mov lr, r3 + 6950 01e2 1A46 mov r2, r3 + 6951 01e4 1E46 mov r6, r3 + 6952 .L1099: + 6953 01e6 D9F80070 ldr r7, [r9] @ unaligned + 6954 .syntax unified + 6955 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6956 01ea C4FBD726 smlaldx r2, r6, r4, r7 + 6957 @ 0 "" 2 + 6958 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6959 01ee C8FBD75E smlaldx r5, lr, r8, r7 + 6960 @ 0 "" 2 + ARM GAS /tmp/ccdao7B1.s page 122 + + + 6961 .thumb + 6962 .syntax unified + 6963 01f2 DCF80080 ldr r8, [ip] @ unaligned + 6964 01f6 DCF80240 ldr r4, [ip, #2] @ unaligned + 6965 .syntax unified + 6966 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6967 01fa C8FBD701 smlaldx r0, r1, r8, r7 + 6968 @ 0 "" 2 + 6969 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6970 01fe C4FBD73B smlaldx r3, fp, r4, r7 + 6971 @ 0 "" 2 + 6972 .thumb + 6973 .syntax unified + 6974 0202 59F8047C ldr r7, [r9, #-4] @ unaligned + 6975 0206 A9F10809 sub r9, r9, #8 + 6976 .syntax unified + 6977 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6978 020a C8FBD726 smlaldx r2, r6, r8, r7 + 6979 @ 0 "" 2 + 6980 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6981 020e C4FBD75E smlaldx r5, lr, r4, r7 + 6982 @ 0 "" 2 + 6983 .thumb + 6984 .syntax unified + 6985 0212 DCF80440 ldr r4, [ip, #4] @ unaligned + 6986 0216 DCF80680 ldr r8, [ip, #6] @ unaligned + 6987 021a 0CF1080C add ip, ip, #8 + 6988 .syntax unified + 6989 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6990 021e C4FBD701 smlaldx r0, r1, r4, r7 + 6991 @ 0 "" 2 + 6992 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6993 0222 C8FBD73B smlaldx r3, fp, r8, r7 + 6994 @ 0 "" 2 + 6995 .thumb + 6996 .syntax unified + 6997 0226 BAF1010A subs r10, r10, #1 + 6998 022a DCD1 bne .L1099 + 6999 022c 019F ldr r7, [sp, #4] + 7000 022e 0494 str r4, [sp, #16] + 7001 0230 0B9C ldr r4, [sp, #44] + 7002 0232 2744 add r7, r7, r4 + 7003 0234 089C ldr r4, [sp, #32] + 7004 0236 012C cmp r4, #1 + 7005 0238 00F07081 beq .L1184 + 7006 023c 022C cmp r4, #2 + 7007 023e 00F05A81 beq .L1102 + 7008 0242 032C cmp r4, #3 + 7009 0244 20D1 bne .L1101 + 7010 0246 0D9C ldr r4, [sp, #52] + 7011 0248 0F94 str r4, [sp, #60] + 7012 024a 54F8089C ldr r9, [r4, #-8] @ unaligned + 7013 024e D7F800C0 ldr ip, [r7] @ unaligned + 7014 0252 D7F802A0 ldr r10, [r7, #2] @ unaligned + 7015 0256 049C ldr r4, [sp, #16] + 7016 .syntax unified + 7017 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccdao7B1.s page 123 + + + 7018 0258 C4FBD926 smlaldx r2, r6, r4, r9 + 7019 @ 0 "" 2 + 7020 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7021 025c C8FBD95E smlaldx r5, lr, r8, r9 + 7022 @ 0 "" 2 + 7023 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7024 0260 CCFBD901 smlaldx r0, r1, ip, r9 + 7025 @ 0 "" 2 + 7026 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7027 0264 CAFBD93B smlaldx r3, fp, r10, r9 + 7028 @ 0 "" 2 + 7029 .thumb + 7030 .syntax unified + 7031 0268 0F9C ldr r4, [sp, #60] + 7032 026a 7F68 ldr r7, [r7, #4] @ unaligned + 7033 026c 34F90ACC ldrsh ip, [r4, #-10] + 7034 0270 1FFA8CFC uxth ip, ip + 7035 .syntax unified + 7036 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7037 0274 C8FBDC26 smlaldx r2, r6, r8, ip + 7038 @ 0 "" 2 + 7039 .thumb + 7040 .syntax unified + 7041 0278 7446 mov r4, lr + 7042 .syntax unified + 7043 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7044 027a CAFBCC54 smlald r5, r4, r10, ip + 7045 @ 0 "" 2 + 7046 .thumb + 7047 .syntax unified + 7048 027e A646 mov lr, r4 + 7049 .syntax unified + 7050 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7051 0280 CAFBDC01 smlaldx r0, r1, r10, ip + 7052 @ 0 "" 2 + 7053 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7054 0284 C7FBDC3B smlaldx r3, fp, r7, ip + 7055 @ 0 "" 2 + 7056 .thumb + 7057 .syntax unified + 7058 .L1101: + 7059 0288 D20B lsrs r2, r2, #15 + 7060 028a 42EA4642 orr r2, r2, r6, lsl #17 + 7061 028e C00B lsrs r0, r0, #15 + 7062 0290 ED0B lsrs r5, r5, #15 + 7063 .syntax unified + 7064 @ 590 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7065 0292 02F30F02 ssat r2, #16, r2 + 7066 @ 0 "" 2 + 7067 .thumb + 7068 .syntax unified + 7069 0296 92B2 uxth r2, r2 + 7070 0298 40EA4140 orr r0, r0, r1, lsl #17 + 7071 029c 45EA4E45 orr r5, r5, lr, lsl #17 + 7072 02a0 DB0B lsrs r3, r3, #15 + 7073 .syntax unified + 7074 @ 591 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + ARM GAS /tmp/ccdao7B1.s page 124 + + + 7075 02a2 00F30F00 ssat r0, #16, r0 + 7076 @ 0 "" 2 + 7077 @ 590 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7078 02a6 05F30F05 ssat r5, #16, r5 + 7079 @ 0 "" 2 + 7080 .thumb + 7081 .syntax unified + 7082 02aa 80B2 uxth r0, r0 + 7083 02ac 42EA0545 orr r5, r2, r5, lsl #16 + 7084 02b0 029A ldr r2, [sp, #8] + 7085 02b2 43EA4B43 orr r3, r3, fp, lsl #17 + 7086 .syntax unified + 7087 @ 591 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7088 02b6 03F30F03 ssat r3, #16, r3 + 7089 @ 0 "" 2 + 7090 .thumb + 7091 .syntax unified + 7092 02ba 40EA0343 orr r3, r0, r3, lsl #16 + 7093 02be 5360 str r3, [r2, #4] @ unaligned + 7094 02c0 019B ldr r3, [sp, #4] + 7095 02c2 1560 str r5, [r2] @ unaligned + 7096 02c4 0833 adds r3, r3, #8 + 7097 02c6 0193 str r3, [sp, #4] + 7098 02c8 02F10803 add r3, r2, #8 + 7099 02cc 0293 str r3, [sp, #8] + 7100 02ce 069B ldr r3, [sp, #24] + 7101 02d0 013B subs r3, r3, #1 + 7102 02d2 0693 str r3, [sp, #24] + 7103 02d4 7FF475AF bne .L1104 + 7104 02d8 139B ldr r3, [sp, #76] + 7105 02da 099A ldr r2, [sp, #36] + 7106 02dc 0C99 ldr r1, [sp, #48] + 7107 02de 02EBC302 add r2, r2, r3, lsl #3 + 7108 02e2 0992 str r2, [sp, #36] + 7109 02e4 1A46 mov r2, r3 + 7110 02e6 01EBC206 add r6, r1, r2, lsl #3 + 7111 02ea 9B00 lsls r3, r3, #2 + 7112 .L1105: + 7113 02ec 129A ldr r2, [sp, #72] + 7114 02ee 12F00301 ands r1, r2, #3 + 7115 02f2 00F05681 beq .L1127 + 7116 02f6 0C9A ldr r2, [sp, #48] + 7117 02f8 0133 adds r3, r3, #1 + 7118 02fa 02EB4308 add r8, r2, r3, lsl #1 + 7119 02fe 079A ldr r2, [sp, #28] + 7120 0300 099B ldr r3, [sp, #36] + 7121 0302 4FEA920B lsr fp, r2, #2 + 7122 0306 02F00309 and r9, r2, #3 + 7123 030a 109A ldr r2, [sp, #64] + 7124 030c CBEB4B77 rsb r7, fp, fp, lsl #29 + 7125 0310 A2F1080C sub ip, r2, #8 + 7126 0314 03EB4101 add r1, r3, r1, lsl #1 + 7127 0318 4FEACB0A lsl r10, fp, #3 + 7128 031c DE46 mov lr, fp + 7129 031e CDF818C0 str ip, [sp, #24] + 7130 0322 02EBC707 add r7, r2, r7, lsl #3 + 7131 0326 8B46 mov fp, r1 + ARM GAS /tmp/ccdao7B1.s page 125 + + + 7132 0328 4846 mov r0, r9 + 7133 032a 9C46 mov ip, r3 + 7134 .L1110: + 7135 032c 069B ldr r3, [sp, #24] + 7136 032e 0190 str r0, [sp, #4] + 7137 0330 06F10802 add r2, r6, #8 + 7138 0334 7146 mov r1, lr + 7139 0336 0024 movs r4, #0 + 7140 0338 0025 movs r5, #0 + 7141 033a F146 mov r9, lr + 7142 .L1107: + 7143 033c 32F808EC ldrh lr, [r2, #-8] + 7144 0340 1889 ldrh r0, [r3, #8] + 7145 0342 CEFB8045 smlalbb r4, r5, lr, r0 + 7146 0346 32F806EC ldrh lr, [r2, #-6] + 7147 034a D888 ldrh r0, [r3, #6] + 7148 034c CEFB8045 smlalbb r4, r5, lr, r0 + 7149 0350 32F804EC ldrh lr, [r2, #-4] + 7150 0354 9888 ldrh r0, [r3, #4] + 7151 0356 CEFB8045 smlalbb r4, r5, lr, r0 + 7152 035a 32F802EC ldrh lr, [r2, #-2] + 7153 035e 5888 ldrh r0, [r3, #2] + 7154 0360 0139 subs r1, r1, #1 + 7155 0362 02F10802 add r2, r2, #8 + 7156 0366 CEFB8045 smlalbb r4, r5, lr, r0 + 7157 036a A3F10803 sub r3, r3, #8 + 7158 036e E5D1 bne .L1107 + 7159 0370 0198 ldr r0, [sp, #4] + 7160 0372 CE46 mov lr, r9 + 7161 0374 06EB0A03 add r3, r6, r10 + 7162 0378 90B1 cbz r0, .L1108 + 7163 037a 36F80A20 ldrh r2, [r6, r10] + 7164 037e 3988 ldrh r1, [r7] + 7165 0380 0128 cmp r0, #1 + 7166 0382 C1FB8245 smlalbb r4, r5, r1, r2 + 7167 0386 0BD0 beq .L1108 + 7168 0388 37F8021C ldrh r1, [r7, #-2] + 7169 038c 5A88 ldrh r2, [r3, #2] + 7170 038e 0228 cmp r0, #2 + 7171 0390 C1FB8245 smlalbb r4, r5, r1, r2 + 7172 0394 04D0 beq .L1108 + 7173 0396 9A88 ldrh r2, [r3, #4] + 7174 0398 37F8043C ldrh r3, [r7, #-4] + 7175 039c C2FB8345 smlalbb r4, r5, r2, r3 + 7176 .L1108: + 7177 03a0 E30B lsrs r3, r4, #15 + 7178 03a2 43EA4543 orr r3, r3, r5, lsl #17 + 7179 .syntax unified + 7180 @ 648 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7181 03a6 03F30F03 ssat r3, #16, r3 + 7182 @ 0 "" 2 + 7183 .thumb + 7184 .syntax unified + 7185 03aa 2CF8023B strh r3, [ip], #2 @ movhi + 7186 03ae DC45 cmp ip, fp + 7187 03b0 4646 mov r6, r8 + 7188 03b2 08F10208 add r8, r8, #2 + ARM GAS /tmp/ccdao7B1.s page 126 + + + 7189 03b6 B9D1 bne .L1110 + 7190 03b8 129B ldr r3, [sp, #72] + 7191 03ba 5946 mov r1, fp + 7192 03bc 5B00 lsls r3, r3, #1 + 7193 03be 40E0 b .L1106 + 7194 .L1126: + 7195 03c0 0994 str r4, [sp, #36] + 7196 .L1089: + 7197 03c2 079B ldr r3, [sp, #28] + 7198 03c4 03F10043 add r3, r3, #-2147483648 + 7199 03c8 013B subs r3, r3, #1 + 7200 03ca 02EB4303 add r3, r2, r3, lsl #1 + 7201 03ce 1093 str r3, [sp, #64] + 7202 .L1125: + 7203 03d0 129B ldr r3, [sp, #72] + 7204 03d2 002B cmp r3, #0 + 7205 03d4 00F0E080 beq .L1185 + 7206 03d8 099D ldr r5, [sp, #36] + 7207 03da 0C98 ldr r0, [sp, #48] + 7208 03dc 079F ldr r7, [sp, #28] + 7209 03de DDE910CE ldrd ip, lr, [sp, #64] + 7210 03e2 1A46 mov r2, r3 + 7211 03e4 5B00 lsls r3, r3, #1 + 7212 03e6 05EB4201 add r1, r5, r2, lsl #1 + 7213 03ea 9B46 mov fp, r3 + 7214 .L1112: + 7215 03ec 002F cmp r7, #0 + 7216 03ee 00F0A980 beq .L1186 + 7217 03f2 BCF80060 ldrh r6, [ip] + 7218 03f6 0488 ldrh r4, [r0] + 7219 03f8 16FB04F4 smulbb r4, r6, r4 + 7220 03fc E617 asrs r6, r4, #31 + 7221 03fe 2246 mov r2, r4 + 7222 0400 3346 mov r3, r6 + 7223 0402 BEF1000F cmp lr, #0 + 7224 0406 0DD0 beq .L1111 + 7225 0408 2246 mov r2, r4 + 7226 040a 3CF802AC ldrh r10, [ip, #-2] + 7227 040e 4488 ldrh r4, [r0, #2] + 7228 0410 3346 mov r3, r6 + 7229 0412 022F cmp r7, #2 + 7230 0414 CAFB8423 smlalbb r2, r3, r10, r4 + 7231 0418 04D0 beq .L1111 + 7232 041a 8688 ldrh r6, [r0, #4] + 7233 041c 3CF8044C ldrh r4, [ip, #-4] + 7234 0420 C6FB8423 smlalbb r2, r3, r6, r4 + 7235 .L1111: + 7236 0424 D40B lsrs r4, r2, #15 + 7237 0426 44EA4344 orr r4, r4, r3, lsl #17 + 7238 .L1114: + 7239 .syntax unified + 7240 @ 685 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7241 042a 04F30F04 ssat r4, #16, r4 + 7242 @ 0 "" 2 + 7243 .thumb + 7244 .syntax unified + 7245 042e 25F8024B strh r4, [r5], #2 @ movhi + ARM GAS /tmp/ccdao7B1.s page 127 + + + 7246 0432 8D42 cmp r5, r1 + 7247 0434 00F10200 add r0, r0, #2 + 7248 0438 D8D1 bne .L1112 + 7249 043a 109A ldr r2, [sp, #64] + 7250 043c 023A subs r2, r2, #2 + 7251 043e 5B46 mov r3, fp + 7252 0440 0A92 str r2, [sp, #40] + 7253 .L1106: + 7254 0442 0C9A ldr r2, [sp, #48] + 7255 0444 119F ldr r7, [sp, #68] + 7256 0446 1A44 add r2, r2, r3 + 7257 0448 BB08 lsrs r3, r7, #2 + 7258 044a 9446 mov ip, r2 + 7259 044c 00F0AC80 beq .L1128 + 7260 0450 DDF828E0 ldr lr, [sp, #40] + 7261 0454 02EB4304 add r4, r2, r3, lsl #1 + 7262 0458 002B cmp r3, #0 + 7263 045a 47D0 beq .L1129 + 7264 .L1188: + 7265 045c 0020 movs r0, #0 + 7266 045e 7646 mov r6, lr + 7267 0460 6546 mov r5, ip + 7268 0462 9846 mov r8, r3 + 7269 0464 0246 mov r2, r0 + 7270 .L1117: + 7271 0466 D5F80090 ldr r9, [r5] @ unaligned + 7272 046a D6F800A0 ldr r10, [r6] @ unaligned + 7273 .syntax unified + 7274 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7275 046e C9FBDA02 smlaldx r0, r2, r9, r10 + 7276 @ 0 "" 2 + 7277 .thumb + 7278 .syntax unified + 7279 0472 D5F80490 ldr r9, [r5, #4] @ unaligned + 7280 0476 56F804AC ldr r10, [r6, #-4] @ unaligned + 7281 047a 0835 adds r5, r5, #8 + 7282 047c 083E subs r6, r6, #8 + 7283 .syntax unified + 7284 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7285 047e C9FBDA02 smlaldx r0, r2, r9, r10 + 7286 @ 0 "" 2 + 7287 .thumb + 7288 .syntax unified + 7289 0482 B8F10108 subs r8, r8, #1 + 7290 0486 EED1 bne .L1117 + 7291 0488 C3EB4375 rsb r5, r3, r3, lsl #29 + 7292 048c 0EEBC505 add r5, lr, r5, lsl #3 + 7293 0490 0CEBC303 add r3, ip, r3, lsl #3 + 7294 0494 0235 adds r5, r5, #2 + 7295 .L1116: + 7296 0496 17F00306 ands r6, r7, #3 + 7297 049a 15D0 beq .L1118 + 7298 049c B3F90080 ldrsh r8, [r3] + 7299 04a0 B5F90090 ldrsh r9, [r5] + 7300 .syntax unified + 7301 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7302 04a4 C8FBC902 smlald r0, r2, r8, r9 + ARM GAS /tmp/ccdao7B1.s page 128 + + + 7303 @ 0 "" 2 + 7304 .thumb + 7305 .syntax unified + 7306 04a8 013E subs r6, r6, #1 + 7307 04aa 0DD0 beq .L1118 + 7308 04ac B3F90280 ldrsh r8, [r3, #2] + 7309 04b0 35F9029C ldrsh r9, [r5, #-2] + 7310 .syntax unified + 7311 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7312 04b4 C8FBC902 smlald r0, r2, r8, r9 + 7313 @ 0 "" 2 + 7314 .thumb + 7315 .syntax unified + 7316 04b8 012E cmp r6, #1 + 7317 04ba 05D0 beq .L1118 + 7318 04bc B3F90430 ldrsh r3, [r3, #4] + 7319 04c0 35F9045C ldrsh r5, [r5, #-4] + 7320 .syntax unified + 7321 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7322 04c4 C3FBC502 smlald r0, r2, r3, r5 + 7323 @ 0 "" 2 + 7324 .thumb + 7325 .syntax unified + 7326 .L1118: + 7327 04c8 0CF1020C add ip, ip, #2 + 7328 04cc C00B lsrs r0, r0, #15 + 7329 04ce A445 cmp ip, r4 + 7330 04d0 40EA4240 orr r0, r0, r2, lsl #17 + 7331 04d4 07F1FF37 add r7, r7, #-1 + 7332 .syntax unified + 7333 @ 777 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7334 04d8 00F30F00 ssat r0, #16, r0 + 7335 @ 0 "" 2 + 7336 .thumb + 7337 .syntax unified + 7338 04dc 21F8020B strh r0, [r1], #2 @ movhi + 7339 04e0 32D0 beq .L1187 + 7340 04e2 002F cmp r7, #0 + 7341 04e4 4FD0 beq .L1087 + 7342 04e6 BB08 lsrs r3, r7, #2 + 7343 04e8 002B cmp r3, #0 + 7344 04ea B7D1 bne .L1188 + 7345 .L1129: + 7346 04ec 1846 mov r0, r3 + 7347 04ee 109D ldr r5, [sp, #64] + 7348 04f0 6346 mov r3, ip + 7349 04f2 0246 mov r2, r0 + 7350 04f4 CFE7 b .L1116 + 7351 .L1102: + 7352 04f6 0D9C ldr r4, [sp, #52] + 7353 04f8 D7F800C0 ldr ip, [r7] @ unaligned + 7354 04fc 54F8089C ldr r9, [r4, #-8] @ unaligned + 7355 0500 D7F80270 ldr r7, [r7, #2] @ unaligned + 7356 0504 049C ldr r4, [sp, #16] + 7357 .syntax unified + 7358 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7359 0506 C4FBD926 smlaldx r2, r6, r4, r9 + ARM GAS /tmp/ccdao7B1.s page 129 + + + 7360 @ 0 "" 2 + 7361 .thumb + 7362 .syntax unified + 7363 050a 7446 mov r4, lr + 7364 .syntax unified + 7365 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7366 050c C8FBD954 smlaldx r5, r4, r8, r9 + 7367 @ 0 "" 2 + 7368 .thumb + 7369 .syntax unified + 7370 0510 A646 mov lr, r4 + 7371 .syntax unified + 7372 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7373 0512 CCFBD901 smlaldx r0, r1, ip, r9 + 7374 @ 0 "" 2 + 7375 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7376 0516 C7FBD93B smlaldx r3, fp, r7, r9 + 7377 @ 0 "" 2 + 7378 .thumb + 7379 .syntax unified + 7380 051a B5E6 b .L1101 + 7381 .L1184: + 7382 051c 0D9C ldr r4, [sp, #52] + 7383 051e 0B9F ldr r7, [sp, #44] + 7384 0520 34F906CC ldrsh ip, [r4, #-6] + 7385 0524 019C ldr r4, [sp, #4] + 7386 0526 1FFA8CFC uxth ip, ip + 7387 052a E759 ldr r7, [r4, r7] @ unaligned + 7388 052c 049C ldr r4, [sp, #16] + 7389 .syntax unified + 7390 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7391 052e C4FBCC26 smlald r2, r6, r4, ip + 7392 @ 0 "" 2 + 7393 .thumb + 7394 .syntax unified + 7395 0532 7446 mov r4, lr + 7396 .syntax unified + 7397 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7398 0534 C8FBCC54 smlald r5, r4, r8, ip + 7399 @ 0 "" 2 + 7400 .thumb + 7401 .syntax unified + 7402 0538 A646 mov lr, r4 + 7403 .syntax unified + 7404 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7405 053a C8FBDC01 smlaldx r0, r1, r8, ip + 7406 @ 0 "" 2 + 7407 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7408 053e C7FBDC3B smlaldx r3, fp, r7, ip + 7409 @ 0 "" 2 + 7410 .thumb + 7411 .syntax unified + 7412 0542 A1E6 b .L1101 + 7413 .L1186: + 7414 0544 3C46 mov r4, r7 + 7415 0546 70E7 b .L1114 + 7416 .L1187: + ARM GAS /tmp/ccdao7B1.s page 130 + + + 7417 0548 1197 str r7, [sp, #68] + 7418 054a 3B46 mov r3, r7 + 7419 .L1115: + 7420 054c DBB1 cbz r3, .L1087 + 7421 054e DDF840E0 ldr lr, [sp, #64] + 7422 0552 9C46 mov ip, r3 + 7423 .L1121: + 7424 0554 0023 movs r3, #0 + 7425 0556 F046 mov r8, lr + 7426 0558 2746 mov r7, r4 + 7427 055a 6046 mov r0, ip + 7428 055c 1A46 mov r2, r3 + 7429 .L1124: + 7430 055e 37F9025B ldrsh r5, [r7], #2 + 7431 0562 38F90269 ldrsh r6, [r8], #-2 + 7432 .syntax unified + 7433 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7434 0566 C5FBC632 smlald r3, r2, r5, r6 + 7435 @ 0 "" 2 + 7436 .thumb + 7437 .syntax unified + 7438 056a 0138 subs r0, r0, #1 + 7439 056c F7D1 bne .L1124 + 7440 056e DB0B lsrs r3, r3, #15 + 7441 0570 BCF1010C subs ip, ip, #1 + 7442 0574 43EA4243 orr r3, r3, r2, lsl #17 + 7443 0578 04F10204 add r4, r4, #2 + 7444 .syntax unified + 7445 @ 813 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c" 1 + 7446 057c 03F30F03 ssat r3, #16, r3 + 7447 @ 0 "" 2 + 7448 .thumb + 7449 .syntax unified + 7450 0580 21F8023B strh r3, [r1], #2 @ movhi + 7451 0584 E6D1 bne .L1121 + 7452 .L1087: + 7453 0586 15B0 add sp, sp, #84 + 7454 @ sp needed + 7455 0588 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 7456 .L1098: + 7457 058c 109A ldr r2, [sp, #64] + 7458 058e 0C9E ldr r6, [sp, #48] + 7459 0590 023A subs r2, r2, #2 + 7460 0592 0B46 mov r3, r1 + 7461 0594 0A92 str r2, [sp, #40] + 7462 0596 A9E6 b .L1105 + 7463 .L1185: + 7464 0598 109A ldr r2, [sp, #64] + 7465 059a 0999 ldr r1, [sp, #36] + 7466 059c 023A subs r2, r2, #2 + 7467 059e 0A92 str r2, [sp, #40] + 7468 05a0 4FE7 b .L1106 + 7469 .L1127: + 7470 05a2 0999 ldr r1, [sp, #36] + 7471 05a4 5300 lsls r3, r2, #1 + 7472 05a6 4CE7 b .L1106 + 7473 .L1128: + ARM GAS /tmp/ccdao7B1.s page 131 + + + 7474 05a8 1446 mov r4, r2 + 7475 05aa 3B46 mov r3, r7 + 7476 05ac CEE7 b .L1115 + 7477 .L1090: + 7478 05ae 079B ldr r3, [sp, #28] + 7479 05b0 03F10043 add r3, r3, #-2147483648 + 7480 05b4 013B subs r3, r3, #1 + 7481 05b6 02EB4303 add r3, r2, r3, lsl #1 + 7482 05ba 1093 str r3, [sp, #64] + 7483 05bc E5E5 b .L1095 + 7485 05be 00BF .section .text.arm_conv_q31,"ax",%progbits + 7486 .align 1 + 7487 .p2align 2,,3 + 7488 .global arm_conv_q31 + 7489 .syntax unified + 7490 .thumb + 7491 .thumb_func + 7492 .fpu fpv4-sp-d16 + 7494 arm_conv_q31: + 7495 @ args = 4, pretend = 0, frame = 16 + 7496 @ frame_needed = 0, uses_anonymous_args = 0 + 7497 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 7498 0004 85B0 sub sp, sp, #20 + 7499 0006 9942 cmp r1, r3 + 7500 0008 DDF83880 ldr r8, [sp, #56] + 7501 000c 0093 str r3, [sp] + 7502 000e 06D2 bcs .L1190 + 7503 0010 1D46 mov r5, r3 + 7504 0012 0446 mov r4, r0 + 7505 0014 0B46 mov r3, r1 + 7506 0016 1046 mov r0, r2 + 7507 0018 2946 mov r1, r5 + 7508 001a 2246 mov r2, r4 + 7509 001c 0093 str r3, [sp] + 7510 .L1190: + 7511 001e 009B ldr r3, [sp] + 7512 0020 0131 adds r1, r1, #1 + 7513 0022 C91A subs r1, r1, r3 + 7514 0024 5F1E subs r7, r3, #1 + 7515 0026 0191 str r1, [sp, #4] + 7516 0028 00F09680 beq .L1191 + 7517 002c 03F18043 add r3, r3, #1073741824 + 7518 0030 013B subs r3, r3, #1 + 7519 0032 9900 lsls r1, r3, #2 + 7520 0034 00F1040B add fp, r0, #4 + 7521 0038 08EB8303 add r3, r8, r3, lsl #2 + 7522 003c 5E46 mov r6, fp + 7523 003e 0291 str r1, [sp, #8] + 7524 0040 9246 mov r10, r2 + 7525 0042 C146 mov r9, r8 + 7526 0044 0397 str r7, [sp, #12] + 7527 0046 9E46 mov lr, r3 + 7528 .L1193: + 7529 0048 0023 movs r3, #0 + 7530 004a D446 mov ip, r10 + 7531 004c 0146 mov r1, r0 + 7532 004e 1F46 mov r7, r3 + ARM GAS /tmp/ccdao7B1.s page 132 + + + 7533 .L1192: + 7534 0050 51F8045B ldr r5, [r1], #4 + 7535 0054 5CF80449 ldr r4, [ip], #-4 + 7536 0058 B142 cmp r1, r6 + 7537 005a C5FB0437 smlal r3, r7, r5, r4 + 7538 005e F7D1 bne .L1192 + 7539 0060 DB0F lsrs r3, r3, #31 + 7540 0062 43EA4703 orr r3, r3, r7, lsl #1 + 7541 0066 49F8043B str r3, [r9], #4 + 7542 006a F145 cmp r9, lr + 7543 006c 0AF1040A add r10, r10, #4 + 7544 0070 01F10406 add r6, r1, #4 + 7545 0074 E8D1 bne .L1193 + 7546 0076 DDE90237 ldrd r3, r7, [sp, #8] + 7547 007a 1A44 add r2, r2, r3 + 7548 007c 009B ldr r3, [sp] + 7549 007e 032B cmp r3, #3 + 7550 0080 08EB8708 add r8, r8, r7, lsl #2 + 7551 0084 3BD9 bls .L1226 + 7552 0086 019B ldr r3, [sp, #4] + 7553 0088 002B cmp r3, #0 + 7554 008a 6AD0 beq .L1209 + 7555 008c DDF800E0 ldr lr, [sp] + 7556 0090 0197 str r7, [sp, #4] + 7557 0092 4FEA830B lsl fp, r3, #2 + 7558 0096 08EB8309 add r9, r8, r3, lsl #2 + 7559 009a 8246 mov r10, r0 + 7560 .L1199: + 7561 009c 0023 movs r3, #0 + 7562 009e 7146 mov r1, lr + 7563 00a0 9446 mov ip, r2 + 7564 00a2 5746 mov r7, r10 + 7565 00a4 1E46 mov r6, r3 + 7566 .L1198: + 7567 00a6 57F8045B ldr r5, [r7], #4 + 7568 00aa 5CF80449 ldr r4, [ip], #-4 + 7569 00ae 0139 subs r1, r1, #1 + 7570 00b0 C5FB0436 smlal r3, r6, r5, r4 + 7571 00b4 F7D1 bne .L1198 + 7572 00b6 DB0F lsrs r3, r3, #31 + 7573 00b8 43EA4603 orr r3, r3, r6, lsl #1 + 7574 00bc 48F8043B str r3, [r8], #4 + 7575 00c0 C845 cmp r8, r9 + 7576 00c2 0AF1040A add r10, r10, #4 + 7577 00c6 E9D1 bne .L1199 + 7578 00c8 019F ldr r7, [sp, #4] + 7579 .L1197: + 7580 00ca 5844 add r0, r0, fp + 7581 00cc 00F1040B add fp, r0, #4 + 7582 .L1206: + 7583 00d0 0023 movs r3, #0 + 7584 00d2 3946 mov r1, r7 + 7585 00d4 9446 mov ip, r2 + 7586 00d6 1E46 mov r6, r3 + 7587 .L1205: + 7588 00d8 50F8045B ldr r5, [r0], #4 + 7589 00dc 5CF80449 ldr r4, [ip], #-4 + ARM GAS /tmp/ccdao7B1.s page 133 + + + 7590 00e0 0139 subs r1, r1, #1 + 7591 00e2 C5FB0436 smlal r3, r6, r5, r4 + 7592 00e6 F7D1 bne .L1205 + 7593 00e8 DB0F lsrs r3, r3, #31 + 7594 00ea 43EA4603 orr r3, r3, r6, lsl #1 + 7595 00ee 013F subs r7, r7, #1 + 7596 00f0 49F8043B str r3, [r9], #4 + 7597 00f4 5846 mov r0, fp + 7598 00f6 31D0 beq .L1189 + 7599 00f8 0BF1040B add fp, fp, #4 + 7600 00fc E8E7 b .L1206 + 7601 .L1226: + 7602 00fe 019B ldr r3, [sp, #4] + 7603 0100 C146 mov r9, r8 + 7604 0102 002B cmp r3, #0 + 7605 0104 E4D0 beq .L1206 + 7606 .L1208: + 7607 0106 019B ldr r3, [sp, #4] + 7608 0108 009C ldr r4, [sp] + 7609 010a 4FEA830B lsl fp, r3, #2 + 7610 010e 08EB8309 add r9, r8, r3, lsl #2 + 7611 0112 0646 mov r6, r0 + 7612 .L1196: + 7613 0114 F4B1 cbz r4, .L1227 + 7614 0116 3168 ldr r1, [r6] + 7615 0118 1368 ldr r3, [r2] + 7616 011a 83FB013C smull r3, ip, r3, r1 + 7617 011e 5FB1 cbz r7, .L1200 + 7618 0120 7568 ldr r5, [r6, #4] + 7619 0122 52F8041C ldr r1, [r2, #-4] + 7620 0126 022C cmp r4, #2 + 7621 0128 C1FB053C smlal r3, ip, r1, r5 + 7622 012c 04D0 beq .L1200 + 7623 012e 52F8085C ldr r5, [r2, #-8] + 7624 0132 B168 ldr r1, [r6, #8] + 7625 0134 C1FB053C smlal r3, ip, r1, r5 + 7626 .L1200: + 7627 0138 DB0F lsrs r3, r3, #31 + 7628 013a 43EA4C03 orr r3, r3, ip, lsl #1 + 7629 .L1203: + 7630 013e 48F8043B str r3, [r8], #4 + 7631 0142 C845 cmp r8, r9 + 7632 0144 06F10406 add r6, r6, #4 + 7633 0148 E4D1 bne .L1196 + 7634 014a 5844 add r0, r0, fp + 7635 014c 37B1 cbz r7, .L1189 + 7636 014e 00F1040B add fp, r0, #4 + 7637 0152 BDE7 b .L1206 + 7638 .L1227: + 7639 0154 2346 mov r3, r4 + 7640 0156 F2E7 b .L1203 + 7641 .L1191: + 7642 0158 0029 cmp r1, #0 + 7643 015a D4D1 bne .L1208 + 7644 .L1189: + 7645 015c 05B0 add sp, sp, #20 + 7646 @ sp needed + ARM GAS /tmp/ccdao7B1.s page 134 + + + 7647 015e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 7648 .L1209: + 7649 0162 9B46 mov fp, r3 + 7650 0164 C146 mov r9, r8 + 7651 0166 B0E7 b .L1197 + 7653 .section .text.arm_conv_q7,"ax",%progbits + 7654 .align 1 + 7655 .p2align 2,,3 + 7656 .global arm_conv_q7 + 7657 .syntax unified + 7658 .thumb + 7659 .thumb_func + 7660 .fpu fpv4-sp-d16 + 7662 arm_conv_q7: + 7663 @ args = 4, pretend = 0, frame = 8 + 7664 @ frame_needed = 0, uses_anonymous_args = 0 + 7665 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 7666 0004 9942 cmp r1, r3 + 7667 0006 83B0 sub sp, sp, #12 + 7668 0008 8846 mov r8, r1 + 7669 000a 9146 mov r9, r2 + 7670 000c 05D2 bcs .L1229 + 7671 000e 0146 mov r1, r0 + 7672 0010 4246 mov r2, r8 + 7673 0012 4846 mov r0, r9 + 7674 0014 9846 mov r8, r3 + 7675 0016 8946 mov r9, r1 + 7676 0018 1346 mov r3, r2 + 7677 .L1229: + 7678 001a 08F10102 add r2, r8, #1 + 7679 001e D21A subs r2, r2, r3 + 7680 0020 591E subs r1, r3, #1 + 7681 0022 0192 str r2, [sp, #4] + 7682 0024 00F09380 beq .L1230 + 7683 0028 DDF830A0 ldr r10, [sp, #48] + 7684 002c 471C adds r7, r0, #1 + 7685 002e 0122 movs r2, #1 + 7686 0030 09F1FF3B add fp, r9, #-1 + 7687 .L1231: + 7688 0034 0BEB0206 add r6, fp, r2 + 7689 0038 002A cmp r2, #0 + 7690 003a 51D0 beq .L1269 + 7691 003c 0446 mov r4, r0 + 7692 003e 0025 movs r5, #0 + 7693 .L1232: + 7694 0040 14F901EB ldrsb lr, [r4], #1 + 7695 0044 16F901C9 ldrsb ip, [r6], #-1 + 7696 0048 BC42 cmp r4, r7 + 7697 004a 1EFB0C55 smlabb r5, lr, ip, r5 + 7698 004e F7D1 bne .L1232 + 7699 0050 0132 adds r2, r2, #1 + 7700 0052 9342 cmp r3, r2 + 7701 0054 4FEAE515 asr r5, r5, #7 + 7702 0058 04F10107 add r7, r4, #1 + 7703 .syntax unified + 7704 @ 376 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 + 7705 005c 05F30705 ssat r5, #8, r5 + ARM GAS /tmp/ccdao7B1.s page 135 + + + 7706 @ 0 "" 2 + 7707 .thumb + 7708 .syntax unified + 7709 0060 0AF8015B strb r5, [r10], #1 + 7710 0064 E6D1 bne .L1231 + 7711 0066 0C9A ldr r2, [sp, #48] + 7712 0068 032B cmp r3, #3 + 7713 006a 8944 add r9, r9, r1 + 7714 006c 02EB0106 add r6, r2, r1 + 7715 0070 3DD9 bls .L1270 + 7716 0072 019A ldr r2, [sp, #4] + 7717 0074 002A cmp r2, #0 + 7718 0076 68D0 beq .L1252 + 7719 0078 0C9A ldr r2, [sp, #48] + 7720 007a 0344 add r3, r3, r0 + 7721 007c 9044 add r8, r8, r2 + 7722 007e 8446 mov ip, r0 + 7723 .L1240: + 7724 0080 4D46 mov r5, r9 + 7725 0082 6246 mov r2, ip + 7726 0084 0024 movs r4, #0 + 7727 .L1239: + 7728 0086 12F901EB ldrsb lr, [r2], #1 + 7729 008a 15F90179 ldrsb r7, [r5], #-1 + 7730 008e 9A42 cmp r2, r3 + 7731 0090 1EFB0744 smlabb r4, lr, r7, r4 + 7732 0094 F7D1 bne .L1239 + 7733 0096 E411 asrs r4, r4, #7 + 7734 .syntax unified + 7735 @ 671 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 + 7736 0098 04F30704 ssat r4, #8, r4 + 7737 @ 0 "" 2 + 7738 .thumb + 7739 .syntax unified + 7740 009c 06F8014B strb r4, [r6], #1 + 7741 00a0 B045 cmp r8, r6 + 7742 00a2 0CF1010C add ip, ip, #1 + 7743 00a6 03F10103 add r3, r3, #1 + 7744 00aa E9D1 bne .L1240 + 7745 .L1238: + 7746 00ac 019B ldr r3, [sp, #4] + 7747 00ae 1844 add r0, r0, r3 + 7748 .L1245: + 7749 00b0 0844 add r0, r0, r1 + 7750 .L1247: + 7751 00b2 431A subs r3, r0, r1 + 7752 00b4 0746 mov r7, r0 + 7753 00b6 4C46 mov r4, r9 + 7754 00b8 0022 movs r2, #0 + 7755 .L1246: + 7756 00ba 13F9016B ldrsb r6, [r3], #1 + 7757 00be 14F90159 ldrsb r5, [r4], #-1 + 7758 00c2 BB42 cmp r3, r7 + 7759 00c4 16FB0522 smlabb r2, r6, r5, r2 + 7760 00c8 F7D1 bne .L1246 + 7761 00ca 0139 subs r1, r1, #1 + 7762 00cc 4FEAE212 asr r2, r2, #7 + ARM GAS /tmp/ccdao7B1.s page 136 + + + 7763 .syntax unified + 7764 @ 814 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 + 7765 00d0 02F30702 ssat r2, #8, r2 + 7766 @ 0 "" 2 + 7767 .thumb + 7768 .syntax unified + 7769 00d4 08F8012B strb r2, [r8], #1 + 7770 00d8 EBD1 bne .L1247 + 7771 .L1228: + 7772 00da 03B0 add sp, sp, #12 + 7773 @ sp needed + 7774 00dc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 7775 .L1269: + 7776 .syntax unified + 7777 @ 376 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 + 7778 00e0 02F30702 ssat r2, #8, r2 + 7779 @ 0 "" 2 + 7780 .thumb + 7781 .syntax unified + 7782 00e4 0137 adds r7, r7, #1 + 7783 00e6 0AF8012B strb r2, [r10], #1 + 7784 00ea 0122 movs r2, #1 + 7785 00ec A2E7 b .L1231 + 7786 .L1270: + 7787 00ee 019A ldr r2, [sp, #4] + 7788 00f0 B046 mov r8, r6 + 7789 00f2 002A cmp r2, #0 + 7790 00f4 DCD0 beq .L1245 + 7791 .L1249: + 7792 00f6 019A ldr r2, [sp, #4] + 7793 00f8 0446 mov r4, r0 + 7794 00fa 06EB0208 add r8, r6, r2 + 7795 .L1237: + 7796 00fe 13B3 cbz r3, .L1271 + 7797 0100 94F90050 ldrsb r5, [r4] + 7798 0104 99F90020 ldrsb r2, [r9] + 7799 0108 12FB05F2 smulbb r2, r2, r5 + 7800 010c 69B1 cbz r1, .L1241 + 7801 010e 94F90170 ldrsb r7, [r4, #1] + 7802 0112 19F9015C ldrsb r5, [r9, #-1] + 7803 0116 022B cmp r3, #2 + 7804 0118 17FB0522 smlabb r2, r7, r5, r2 + 7805 011c 05D0 beq .L1241 + 7806 011e 94F90270 ldrsb r7, [r4, #2] + 7807 0122 19F9025C ldrsb r5, [r9, #-2] + 7808 0126 17FB0522 smlabb r2, r7, r5, r2 + 7809 .L1241: + 7810 012a D211 asrs r2, r2, #7 + 7811 .L1244: + 7812 .syntax unified + 7813 @ 708 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c" 1 + 7814 012c 02F30702 ssat r2, #8, r2 + 7815 @ 0 "" 2 + 7816 .thumb + 7817 .syntax unified + 7818 0130 06F8012B strb r2, [r6], #1 + 7819 0134 B045 cmp r8, r6 + ARM GAS /tmp/ccdao7B1.s page 137 + + + 7820 0136 04F10104 add r4, r4, #1 + 7821 013a E0D1 bne .L1237 + 7822 013c 019B ldr r3, [sp, #4] + 7823 013e 1844 add r0, r0, r3 + 7824 0140 0029 cmp r1, #0 + 7825 0142 B5D1 bne .L1245 + 7826 0144 C9E7 b .L1228 + 7827 .L1271: + 7828 0146 1A46 mov r2, r3 + 7829 0148 F0E7 b .L1244 + 7830 .L1252: + 7831 014a B046 mov r8, r6 + 7832 014c AEE7 b .L1238 + 7833 .L1230: + 7834 014e 002A cmp r2, #0 + 7835 0150 C3D0 beq .L1228 + 7836 0152 0C9E ldr r6, [sp, #48] + 7837 0154 CFE7 b .L1249 + 7839 0156 00BF .section .text.arm_correlate_f32,"ax",%progbits + 7840 .align 1 + 7841 .p2align 2,,3 + 7842 .global arm_correlate_f32 + 7843 .syntax unified + 7844 .thumb + 7845 .thumb_func + 7846 .fpu fpv4-sp-d16 + 7848 arm_correlate_f32: + 7849 @ args = 4, pretend = 0, frame = 0 + 7850 @ frame_needed = 0, uses_anonymous_args = 0 + 7851 0000 9942 cmp r1, r3 + 7852 0002 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 7853 0006 C0F09A80 bcc .L1273 + 7854 000a 099C ldr r4, [sp, #36] + 7855 000c CD1A subs r5, r1, r3 + 7856 000e 04EB8505 add r5, r4, r5, lsl #2 + 7857 0012 0426 movs r6, #4 + 7858 .L1274: + 7859 0014 03F18049 add r9, r3, #1073741824 + 7860 0018 0131 adds r1, r1, #1 + 7861 001a 09F1FF39 add r9, r9, #-1 + 7862 001e 5C1E subs r4, r3, #1 + 7863 0020 A1EB0308 sub r8, r1, r3 + 7864 0024 4FEA8901 lsl r1, r9, #2 + 7865 0028 02EB8909 add r9, r2, r9, lsl #2 + 7866 002c 00F09780 beq .L1275 + 7867 0030 0431 adds r1, r1, #4 + 7868 0032 071D adds r7, r0, #4 + 7869 0034 00EB010B add fp, r0, r1 + 7870 0038 BE46 mov lr, r7 + 7871 003a AA46 mov r10, r5 + 7872 .L1277: + 7873 003c DFED4A7A vldr.32 s15, .L1316 + 7874 0040 CC46 mov ip, r9 + 7875 0042 0146 mov r1, r0 + 7876 .L1276: + 7877 0044 F1EC016A vldmia.32 r1!, {s13} + 7878 0048 BCEC017A vldmia.32 ip!, {s14} + ARM GAS /tmp/ccdao7B1.s page 138 + + + 7879 004c 7145 cmp r1, lr + 7880 004e E6EE877A vfma.f32 s15, s13, s14 + 7881 0052 F7D1 bne .L1276 + 7882 0054 01F1040E add lr, r1, #4 + 7883 0058 F345 cmp fp, lr + 7884 005a CAED007A vstr.32 s15, [r10] + 7885 005e A9F10409 sub r9, r9, #4 + 7886 0062 B244 add r10, r10, r6 + 7887 0064 EAD1 bne .L1277 + 7888 0066 032B cmp r3, #3 + 7889 0068 06FB0455 mla r5, r6, r4, r5 + 7890 006c 34D9 bls .L1314 + 7891 006e C246 mov r10, r8 + 7892 0070 B8F1000F cmp r8, #0 + 7893 0074 1AD0 beq .L1281 + 7894 0076 4FEA880A lsl r10, r8, #2 + 7895 007a 00EB880B add fp, r0, r8, lsl #2 + 7896 007e 0746 mov r7, r0 + 7897 0080 A946 mov r9, r5 + 7898 .L1283: + 7899 0082 DFED397A vldr.32 s15, .L1316 + 7900 0086 1946 mov r1, r3 + 7901 0088 9646 mov lr, r2 + 7902 008a BC46 mov ip, r7 + 7903 .L1282: + 7904 008c FCEC016A vldmia.32 ip!, {s13} + 7905 0090 BEEC017A vldmia.32 lr!, {s14} + 7906 0094 0139 subs r1, r1, #1 + 7907 0096 E6EE877A vfma.f32 s15, s13, s14 + 7908 009a F7D1 bne .L1282 + 7909 009c 0437 adds r7, r7, #4 + 7910 009e 5F45 cmp r7, fp + 7911 00a0 C9ED007A vstr.32 s15, [r9] + 7912 00a4 B144 add r9, r9, r6 + 7913 00a6 ECD1 bne .L1283 + 7914 00a8 06FB0855 mla r5, r6, r8, r5 + 7915 .L1281: + 7916 00ac 5044 add r0, r0, r10 + 7917 .L1313: + 7918 00ae 071D adds r7, r0, #4 + 7919 .L1291: + 7920 00b0 DFED2D7A vldr.32 s15, .L1316 + 7921 00b4 2346 mov r3, r4 + 7922 00b6 1146 mov r1, r2 + 7923 .L1290: + 7924 00b8 F0EC016A vldmia.32 r0!, {s13} + 7925 00bc B1EC017A vldmia.32 r1!, {s14} + 7926 00c0 013B subs r3, r3, #1 + 7927 00c2 E6EE877A vfma.f32 s15, s13, s14 + 7928 00c6 F7D1 bne .L1290 + 7929 00c8 013C subs r4, r4, #1 + 7930 00ca C5ED007A vstr.32 s15, [r5] + 7931 00ce 3846 mov r0, r7 + 7932 00d0 3544 add r5, r5, r6 + 7933 00d2 2FD0 beq .L1272 + 7934 00d4 0437 adds r7, r7, #4 + 7935 00d6 EBE7 b .L1291 + ARM GAS /tmp/ccdao7B1.s page 139 + + + 7936 .L1314: + 7937 00d8 B8F1000F cmp r8, #0 + 7938 00dc E8D0 beq .L1291 + 7939 .L1292: + 7940 00de 9FED226A vldr.32 s12, .L1316 + 7941 00e2 4FEA880A lsl r10, r8, #2 + 7942 00e6 00EB880C add ip, r0, r8, lsl #2 + 7943 00ea 0146 mov r1, r0 + 7944 00ec 2F46 mov r7, r5 + 7945 .L1280: + 7946 00ee 1BB3 cbz r3, .L1315 + 7947 00f0 91ED007A vldr.32 s14, [r1] + 7948 00f4 D2ED006A vldr.32 s13, [r2] + 7949 00f8 F0EE467A vmov.f32 s15, s12 + 7950 00fc E6EE877A vfma.f32 s15, s13, s14 + 7951 0100 6CB1 cbz r4, .L1289 + 7952 0102 91ED017A vldr.32 s14, [r1, #4] + 7953 0106 D2ED016A vldr.32 s13, [r2, #4] + 7954 010a 022B cmp r3, #2 + 7955 010c E6EE877A vfma.f32 s15, s13, s14 + 7956 0110 05D0 beq .L1289 + 7957 0112 D1ED026A vldr.32 s13, [r1, #8] + 7958 0116 92ED027A vldr.32 s14, [r2, #8] + 7959 011a E6EE877A vfma.f32 s15, s13, s14 + 7960 .L1289: + 7961 011e 0431 adds r1, r1, #4 + 7962 0120 6145 cmp r1, ip + 7963 0122 C7ED007A vstr.32 s15, [r7] + 7964 0126 3744 add r7, r7, r6 + 7965 0128 E1D1 bne .L1280 + 7966 012a 06FB0855 mla r5, r6, r8, r5 + 7967 012e 5044 add r0, r0, r10 + 7968 0130 002C cmp r4, #0 + 7969 0132 BCD1 bne .L1313 + 7970 .L1272: + 7971 0134 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 7972 .L1315: + 7973 0138 DFED0B7A vldr.32 s15, .L1316 + 7974 013c EFE7 b .L1289 + 7975 .L1273: + 7976 013e 03F18044 add r4, r3, #1073741824 + 7977 0142 023C subs r4, r4, #2 + 7978 0144 0E46 mov r6, r1 + 7979 0146 0C44 add r4, r4, r1 + 7980 0148 1946 mov r1, r3 + 7981 014a 099B ldr r3, [sp, #36] + 7982 014c 0746 mov r7, r0 + 7983 014e 03EB8405 add r5, r3, r4, lsl #2 + 7984 0152 1046 mov r0, r2 + 7985 0154 3346 mov r3, r6 + 7986 0156 3A46 mov r2, r7 + 7987 0158 6FF00306 mvn r6, #3 + 7988 015c 5AE7 b .L1274 + 7989 .L1275: + 7990 015e B8F1000F cmp r8, #0 + 7991 0162 BCD1 bne .L1292 + 7992 0164 E6E7 b .L1272 + ARM GAS /tmp/ccdao7B1.s page 140 + + + 7993 .L1317: + 7994 0166 00BF .align 2 + 7995 .L1316: + 7996 0168 00000000 .word 0 + 7998 .section .text.arm_correlate_fast_opt_q15,"ax",%progbits + 7999 .align 1 + 8000 .p2align 2,,3 + 8001 .global arm_correlate_fast_opt_q15 + 8002 .syntax unified + 8003 .thumb + 8004 .thumb_func + 8005 .fpu fpv4-sp-d16 + 8007 arm_correlate_fast_opt_q15: + 8008 @ args = 8, pretend = 0, frame = 8 + 8009 @ frame_needed = 0, uses_anonymous_args = 0 + 8010 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8011 0004 83B0 sub sp, sp, #12 + 8012 0006 9942 cmp r1, r3 + 8013 0008 DDF834A0 ldr r10, [sp, #52] + 8014 000c 0F46 mov r7, r1 + 8015 000e 9946 mov r9, r3 + 8016 0010 8046 mov r8, r0 + 8017 0012 1446 mov r4, r2 + 8018 0014 73D3 bcc .L1319 + 8019 0016 CD1A subs r5, r1, r3 + 8020 0018 0C9B ldr r3, [sp, #48] + 8021 001a 03EB4505 add r5, r3, r5, lsl #1 + 8022 001e 4B00 lsls r3, r1, #1 + 8023 0020 0193 str r3, [sp, #4] + 8024 0022 0226 movs r6, #2 + 8025 .L1320: + 8026 0024 09F1FF3B add fp, r9, #-1 + 8027 0028 5A46 mov r2, fp + 8028 002a 5146 mov r1, r10 + 8029 002c 0020 movs r0, #0 + 8030 002e FFF7FEFF bl arm_fill_q15 + 8031 0032 09F10043 add r3, r9, #-2147483648 + 8032 0036 013B subs r3, r3, #1 + 8033 0038 4046 mov r0, r8 + 8034 003a 0AEB4301 add r1, r10, r3, lsl #1 + 8035 003e 3A46 mov r2, r7 + 8036 0040 0091 str r1, [sp] + 8037 0042 FFF7FEFF bl arm_copy_q15 + 8038 0046 DDE90013 ldrd r1, r3, [sp] + 8039 004a 5A46 mov r2, fp + 8040 004c 1944 add r1, r1, r3 + 8041 004e 0020 movs r0, #0 + 8042 0050 4F44 add r7, r7, r9 + 8043 0052 FFF7FEFF bl arm_fill_q15 + 8044 0056 B7F10108 subs r8, r7, #1 + 8045 005a 36D0 beq .L1318 + 8046 005c 4FEA5902 lsr r2, r9, #1 + 8047 0060 0AF1020C add ip, r10, #2 + 8048 0064 4FEA820A lsl r10, r2, #2 + 8049 0068 09F00109 and r9, r9, #1 + 8050 006c AAF1020A sub r10, r10, #2 + 8051 0070 04EB820B add fp, r4, r2, lsl #2 + ARM GAS /tmp/ccdao7B1.s page 141 + + + 8052 0074 A71C adds r7, r4, #2 + 8053 .L1327: + 8054 0076 ACF1020E sub lr, ip, #2 + 8055 007a 002A cmp r2, #0 + 8056 007c 3CD0 beq .L1328 + 8057 .L1336: + 8058 007e 0023 movs r3, #0 + 8059 0080 1946 mov r1, r3 + 8060 0082 CDF800B0 str fp, [sp] + 8061 .L1323: + 8062 0086 3EF823B0 ldrh fp, [lr, r3, lsl #2] + 8063 008a 34F82300 ldrh r0, [r4, r3, lsl #2] + 8064 008e 1BFB0011 smlabb r1, fp, r0, r1 + 8065 0092 3CF823B0 ldrh fp, [ip, r3, lsl #2] + 8066 0096 37F82300 ldrh r0, [r7, r3, lsl #2] + 8067 009a 0133 adds r3, r3, #1 + 8068 009c 9A42 cmp r2, r3 + 8069 009e 1BFB0011 smlabb r1, fp, r0, r1 + 8070 00a2 F0D1 bne .L1323 + 8071 00a4 DDF800B0 ldr fp, [sp] + 8072 00a8 0AEB0C0E add lr, r10, ip + 8073 00ac 5846 mov r0, fp + 8074 .L1322: + 8075 00ae B9F1000F cmp r9, #0 + 8076 00b2 0DD1 bne .L1335 + 8077 00b4 B8F10108 subs r8, r8, #1 + 8078 00b8 4FEAE133 asr r3, r1, #15 + 8079 00bc 0CF1020C add ip, ip, #2 + 8080 .syntax unified + 8081 @ 332 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt + 8082 00c0 03F30F03 ssat r3, #16, r3 + 8083 @ 0 "" 2 + 8084 .thumb + 8085 .syntax unified + 8086 00c4 2B80 strh r3, [r5] @ movhi + 8087 00c6 3544 add r5, r5, r6 + 8088 00c8 D5D1 bne .L1327 + 8089 .L1318: + 8090 00ca 03B0 add sp, sp, #12 + 8091 @ sp needed + 8092 00cc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 8093 .L1335: + 8094 00d0 BEF80030 ldrh r3, [lr] + 8095 00d4 0088 ldrh r0, [r0] + 8096 00d6 B8F10108 subs r8, r8, #1 + 8097 00da 13FB0011 smlabb r1, r3, r0, r1 + 8098 00de 4FEAE131 asr r1, r1, #15 + 8099 00e2 0CF1020C add ip, ip, #2 + 8100 .syntax unified + 8101 @ 332 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt + 8102 00e6 01F30F01 ssat r1, #16, r1 + 8103 @ 0 "" 2 + 8104 .thumb + 8105 .syntax unified + 8106 00ea 2980 strh r1, [r5] @ movhi + 8107 00ec 3544 add r5, r5, r6 + 8108 00ee ECD0 beq .L1318 + ARM GAS /tmp/ccdao7B1.s page 142 + + + 8109 00f0 ACF1020E sub lr, ip, #2 + 8110 00f4 002A cmp r2, #0 + 8111 00f6 C2D1 bne .L1336 + 8112 .L1328: + 8113 00f8 2046 mov r0, r4 + 8114 00fa 1146 mov r1, r2 + 8115 00fc D7E7 b .L1322 + 8116 .L1319: + 8117 00fe 03F10042 add r2, r3, #-2147483648 + 8118 0102 023A subs r2, r2, #2 + 8119 0104 0C9B ldr r3, [sp, #48] + 8120 0106 0A44 add r2, r2, r1 + 8121 0108 03EB4205 add r5, r3, r2, lsl #1 + 8122 010c 4FEA4903 lsl r3, r9, #1 + 8123 0110 A046 mov r8, r4 + 8124 0112 4F46 mov r7, r9 + 8125 0114 0446 mov r4, r0 + 8126 0116 0193 str r3, [sp, #4] + 8127 0118 8946 mov r9, r1 + 8128 011a 6FF00106 mvn r6, #1 + 8129 011e 81E7 b .L1320 + 8131 .section .text.arm_correlate_fast_q15,"ax",%progbits + 8132 .align 1 + 8133 .p2align 2,,3 + 8134 .global arm_correlate_fast_q15 + 8135 .syntax unified + 8136 .thumb + 8137 .thumb_func + 8138 .fpu fpv4-sp-d16 + 8140 arm_correlate_fast_q15: + 8141 @ args = 4, pretend = 0, frame = 56 + 8142 @ frame_needed = 0, uses_anonymous_args = 0 + 8143 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8144 0004 8FB0 sub sp, sp, #60 + 8145 0006 9942 cmp r1, r3 + 8146 0008 0693 str r3, [sp, #24] + 8147 000a 9346 mov fp, r2 + 8148 000c C0F00C82 bcc .L1338 + 8149 0010 189A ldr r2, [sp, #96] + 8150 0012 CB1A subs r3, r1, r3 + 8151 0014 02EB4303 add r3, r2, r3, lsl #1 + 8152 0018 0193 str r3, [sp, #4] + 8153 001a 0223 movs r3, #2 + 8154 001c 0093 str r3, [sp] + 8155 .L1339: + 8156 001e 069B ldr r3, [sp, #24] + 8157 0020 0131 adds r1, r1, #1 + 8158 0022 CA1A subs r2, r1, r3 + 8159 0024 0A92 str r2, [sp, #40] + 8160 0026 03F10042 add r2, r3, #-2147483648 + 8161 002a 013A subs r2, r2, #1 + 8162 002c B3F1010A subs r10, r3, #1 + 8163 0030 1946 mov r1, r3 + 8164 0032 0BEB4202 add r2, fp, r2, lsl #1 + 8165 0036 00F00A82 beq .L1340 + 8166 003a DDF804E0 ldr lr, [sp, #4] + 8167 003e DDF80080 ldr r8, [sp] + ARM GAS /tmp/ccdao7B1.s page 143 + + + 8168 0042 CDF808A0 str r10, [sp, #8] + 8169 0046 971E subs r7, r2, #2 + 8170 0048 0446 mov r4, r0 + 8171 004a 0126 movs r6, #1 + 8172 004c 0023 movs r3, #0 + 8173 004e 8946 mov r9, r1 + 8174 .L1341: + 8175 0050 16F00301 ands r1, r6, #3 + 8176 0054 15D0 beq .L1344 + 8177 0056 B4F90050 ldrsh r5, [r4] + 8178 005a B2F900C0 ldrsh ip, [r2] + 8179 .syntax unified + 8180 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8181 005e 25FB0C33 smlad r3, r5, ip, r3 + 8182 @ 0 "" 2 + 8183 .thumb + 8184 .syntax unified + 8185 0062 0139 subs r1, r1, #1 + 8186 0064 0DD0 beq .L1344 + 8187 0066 B4F90250 ldrsh r5, [r4, #2] + 8188 006a B2F902C0 ldrsh ip, [r2, #2] + 8189 .syntax unified + 8190 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8191 006e 25FB0C33 smlad r3, r5, ip, r3 + 8192 @ 0 "" 2 + 8193 .thumb + 8194 .syntax unified + 8195 0072 0129 cmp r1, #1 + 8196 0074 05D0 beq .L1344 + 8197 0076 B4F90410 ldrsh r1, [r4, #4] + 8198 007a B2F90420 ldrsh r2, [r2, #4] + 8199 .syntax unified + 8200 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8201 007e 21FB0233 smlad r3, r1, r2, r3 + 8202 @ 0 "" 2 + 8203 .thumb + 8204 .syntax unified + 8205 .L1344: + 8206 0082 0136 adds r6, r6, #1 + 8207 0084 DB13 asrs r3, r3, #15 + 8208 0086 B145 cmp r9, r6 + 8209 0088 AEF80030 strh r3, [lr] @ movhi + 8210 008c 3A46 mov r2, r7 + 8211 008e C644 add lr, lr, r8 + 8212 0090 1BD0 beq .L1425 + 8213 0092 5FEA960C lsrs ip, r6, #2 + 8214 0096 00F0E481 beq .L1374 + 8215 009a 3946 mov r1, r7 + 8216 009c 0246 mov r2, r0 + 8217 009e 6546 mov r5, ip + 8218 00a0 0023 movs r3, #0 + 8219 .L1343: + 8220 00a2 1468 ldr r4, [r2] @ unaligned + 8221 00a4 D1F800A0 ldr r10, [r1] @ unaligned + 8222 .syntax unified + 8223 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8224 00a8 24FB0A33 smlad r3, r4, r10, r3 + ARM GAS /tmp/ccdao7B1.s page 144 + + + 8225 @ 0 "" 2 + 8226 .thumb + 8227 .syntax unified + 8228 00ac 5468 ldr r4, [r2, #4] @ unaligned + 8229 00ae D1F804A0 ldr r10, [r1, #4] @ unaligned + 8230 00b2 0832 adds r2, r2, #8 + 8231 00b4 0831 adds r1, r1, #8 + 8232 .syntax unified + 8233 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8234 00b6 24FB0A33 smlad r3, r4, r10, r3 + 8235 @ 0 "" 2 + 8236 .thumb + 8237 .syntax unified + 8238 00ba 013D subs r5, r5, #1 + 8239 00bc F1D1 bne .L1343 + 8240 00be 00EBCC04 add r4, r0, ip, lsl #3 + 8241 00c2 07EBCC02 add r2, r7, ip, lsl #3 + 8242 .L1342: + 8243 00c6 023F subs r7, r7, #2 + 8244 00c8 C2E7 b .L1341 + 8245 .L1425: + 8246 00ca DDE9013A ldrd r3, r10, [sp, #4] + 8247 00ce 009A ldr r2, [sp] + 8248 00d0 02FB0A33 mla r3, r2, r10, r3 + 8249 00d4 0193 str r3, [sp, #4] + 8250 00d6 069B ldr r3, [sp, #24] + 8251 00d8 032B cmp r3, #3 + 8252 00da 40F24781 bls .L1426 + 8253 00de 0A9B ldr r3, [sp, #40] + 8254 00e0 9908 lsrs r1, r3, #2 + 8255 00e2 0B91 str r1, [sp, #44] + 8256 00e4 00F0B781 beq .L1375 + 8257 00e8 069C ldr r4, [sp, #24] + 8258 00ea CDF830A0 str r10, [sp, #48] + 8259 00ee A208 lsrs r2, r4, #2 + 8260 00f0 D300 lsls r3, r2, #3 + 8261 00f2 0433 adds r3, r3, #4 + 8262 00f4 0393 str r3, [sp, #12] + 8263 00f6 531E subs r3, r2, #1 + 8264 00f8 0BEBC303 add r3, fp, r3, lsl #3 + 8265 00fc 0493 str r3, [sp, #16] + 8266 00fe 04F00303 and r3, r4, #3 + 8267 0102 0293 str r3, [sp, #8] + 8268 0104 009B ldr r3, [sp] + 8269 0106 0892 str r2, [sp, #32] + 8270 0108 9A00 lsls r2, r3, #2 + 8271 010a 0592 str r2, [sp, #20] + 8272 010c 019A ldr r2, [sp, #4] + 8273 010e CDF81CB0 str fp, [sp, #28] + 8274 0112 1A44 add r2, r2, r3 + 8275 0114 5B42 rsbs r3, r3, #0 + 8276 0116 8146 mov r9, r0 + 8277 0118 0993 str r3, [sp, #36] + 8278 011a 9246 mov r10, r2 + 8279 011c 0D90 str r0, [sp, #52] + 8280 011e 8B46 mov fp, r1 + 8281 .L1356: + ARM GAS /tmp/ccdao7B1.s page 145 + + + 8282 0120 DDE907E8 ldrd lr, r8, [sp, #28] + 8283 0124 0023 movs r3, #0 + 8284 0126 D9F80020 ldr r2, [r9] @ unaligned + 8285 012a D9F80260 ldr r6, [r9, #2] @ unaligned + 8286 012e 09F10400 add r0, r9, #4 + 8287 0132 9C46 mov ip, r3 + 8288 0134 1D46 mov r5, r3 + 8289 0136 1C46 mov r4, r3 + 8290 .L1351: + 8291 0138 DEF80010 ldr r1, [lr] @ unaligned + 8292 .syntax unified + 8293 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8294 013c 22FB0142 smlad r2, r2, r1, r4 + 8295 @ 0 "" 2 + 8296 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8297 0140 26FB0155 smlad r5, r6, r1, r5 + 8298 @ 0 "" 2 + 8299 .thumb + 8300 .syntax unified + 8301 0144 0468 ldr r4, [r0] @ unaligned + 8302 0146 D0F80270 ldr r7, [r0, #2] @ unaligned + 8303 .syntax unified + 8304 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8305 014a 24FB01CC smlad ip, r4, r1, ip + 8306 @ 0 "" 2 + 8307 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8308 014e 27FB0133 smlad r3, r7, r1, r3 + 8309 @ 0 "" 2 + 8310 .thumb + 8311 .syntax unified + 8312 0152 DEF80410 ldr r1, [lr, #4] @ unaligned + 8313 0156 0EF1080E add lr, lr, #8 + 8314 .syntax unified + 8315 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8316 015a 24FB0124 smlad r4, r4, r1, r2 + 8317 @ 0 "" 2 + 8318 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8319 015e 27FB0155 smlad r5, r7, r1, r5 + 8320 @ 0 "" 2 + 8321 .thumb + 8322 .syntax unified + 8323 0162 4268 ldr r2, [r0, #4] @ unaligned + 8324 0164 D0F80660 ldr r6, [r0, #6] @ unaligned + 8325 0168 0830 adds r0, r0, #8 + 8326 .syntax unified + 8327 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8328 016a 22FB01CC smlad ip, r2, r1, ip + 8329 @ 0 "" 2 + 8330 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8331 016e 26FB0133 smlad r3, r6, r1, r3 + 8332 @ 0 "" 2 + 8333 .thumb + 8334 .syntax unified + 8335 0172 B8F10108 subs r8, r8, #1 + 8336 0176 DFD1 bne .L1351 + 8337 0178 0298 ldr r0, [sp, #8] + 8338 017a 0399 ldr r1, [sp, #12] + ARM GAS /tmp/ccdao7B1.s page 146 + + + 8339 017c 0128 cmp r0, #1 + 8340 017e 4944 add r1, r9, r1 + 8341 0180 00F04081 beq .L1427 + 8342 0184 0228 cmp r0, #2 + 8343 0186 00F02F81 beq .L1354 + 8344 018a 0328 cmp r0, #3 + 8345 018c 19D1 bne .L1353 + 8346 018e 0498 ldr r0, [sp, #16] + 8347 0190 D1F80270 ldr r7, [r1, #2] @ unaligned + 8348 0194 8068 ldr r0, [r0, #8] @ unaligned + 8349 .syntax unified + 8350 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8351 0196 22FB0044 smlad r4, r2, r0, r4 + 8352 @ 0 "" 2 + 8353 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8354 019a 26FB0055 smlad r5, r6, r0, r5 + 8355 @ 0 "" 2 + 8356 .thumb + 8357 .syntax unified + 8358 019e 0A68 ldr r2, [r1] @ unaligned + 8359 .syntax unified + 8360 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8361 01a0 22FB00CC smlad ip, r2, r0, ip + 8362 @ 0 "" 2 + 8363 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8364 01a4 27FB0033 smlad r3, r7, r0, r3 + 8365 @ 0 "" 2 + 8366 .thumb + 8367 .syntax unified + 8368 01a8 0498 ldr r0, [sp, #16] + 8369 01aa B0F90C00 ldrsh r0, [r0, #12] + 8370 01ae 80B2 uxth r0, r0 + 8371 .syntax unified + 8372 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8373 01b0 26FB1044 smladx r4, r6, r0, r4 + 8374 @ 0 "" 2 + 8375 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8376 01b4 27FB0055 smlad r5, r7, r0, r5 + 8377 @ 0 "" 2 + 8378 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8379 01b8 27FB10CC smladx ip, r7, r0, ip + 8380 @ 0 "" 2 + 8381 .thumb + 8382 .syntax unified + 8383 01bc 4A68 ldr r2, [r1, #4] @ unaligned + 8384 .syntax unified + 8385 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8386 01be 22FB1033 smladx r3, r2, r0, r3 + 8387 @ 0 "" 2 + 8388 .thumb + 8389 .syntax unified + 8390 .L1353: + 8391 01c2 099A ldr r2, [sp, #36] + 8392 01c4 E413 asrs r4, r4, #15 + 8393 01c6 2AF80240 strh r4, [r10, r2] @ movhi + 8394 01ca 009A ldr r2, [sp] + 8395 01cc DB13 asrs r3, r3, #15 + ARM GAS /tmp/ccdao7B1.s page 147 + + + 8396 01ce ED13 asrs r5, r5, #15 + 8397 01d0 4FEAEC3C asr ip, ip, #15 + 8398 01d4 AAF80050 strh r5, [r10] @ movhi + 8399 01d8 2AF802C0 strh ip, [r10, r2] @ movhi + 8400 01dc 2AF81230 strh r3, [r10, r2, lsl #1] @ movhi + 8401 01e0 059B ldr r3, [sp, #20] + 8402 01e2 BBF1010B subs fp, fp, #1 + 8403 01e6 09F10809 add r9, r9, #8 + 8404 01ea 9A44 add r10, r10, r3 + 8405 01ec 98D1 bne .L1356 + 8406 01ee 019A ldr r2, [sp, #4] + 8407 01f0 DDF81CB0 ldr fp, [sp, #28] + 8408 01f4 1946 mov r1, r3 + 8409 01f6 0B9B ldr r3, [sp, #44] + 8410 01f8 DDE90CA0 ldrd r10, r0, [sp, #48] + 8411 01fc 01FB0322 mla r2, r1, r3, r2 + 8412 0200 0192 str r2, [sp, #4] + 8413 0202 1A46 mov r2, r3 + 8414 0204 00EBC206 add r6, r0, r2, lsl #3 + 8415 0208 9B00 lsls r3, r3, #2 + 8416 .L1350: + 8417 020a 0A9A ldr r2, [sp, #40] + 8418 020c 12F00302 ands r2, r2, #3 + 8419 0210 0392 str r2, [sp, #12] + 8420 0212 6BD0 beq .L1357 + 8421 0214 069C ldr r4, [sp, #24] + 8422 0216 DDF80480 ldr r8, [sp, #4] + 8423 021a 0590 str r0, [sp, #20] + 8424 021c A108 lsrs r1, r4, #2 + 8425 021e 5D1C adds r5, r3, #1 + 8426 0220 1344 add r3, r3, r2 + 8427 0222 821C adds r2, r0, #2 + 8428 0224 0BEBC107 add r7, fp, r1, lsl #3 + 8429 0228 04F00309 and r9, r4, #3 + 8430 022c 02EB4303 add r3, r2, r3, lsl #1 + 8431 0230 0BF10802 add r2, fp, #8 + 8432 0234 00EB4505 add r5, r0, r5, lsl #1 + 8433 0238 BE46 mov lr, r7 + 8434 023a CDF818B0 str fp, [sp, #24] + 8435 023e 4F46 mov r7, r9 + 8436 0240 4FEAC10C lsl ip, r1, #3 + 8437 0244 CDF810A0 str r10, [sp, #16] + 8438 0248 8946 mov r9, r1 + 8439 024a 1846 mov r0, r3 + 8440 024c 9346 mov fp, r2 + 8441 .L1361: + 8442 024e 06F10801 add r1, r6, #8 + 8443 0252 5A46 mov r2, fp + 8444 0254 4C46 mov r4, r9 + 8445 0256 0023 movs r3, #0 + 8446 0258 0290 str r0, [sp, #8] + 8447 .L1358: + 8448 025a 31F808AC ldrh r10, [r1, #-8] + 8449 025e 32F8080C ldrh r0, [r2, #-8] + 8450 0262 1AFB0033 smlabb r3, r10, r0, r3 + 8451 0266 31F806AC ldrh r10, [r1, #-6] + 8452 026a 32F8060C ldrh r0, [r2, #-6] + ARM GAS /tmp/ccdao7B1.s page 148 + + + 8453 026e 1AFB0033 smlabb r3, r10, r0, r3 + 8454 0272 31F804AC ldrh r10, [r1, #-4] + 8455 0276 32F8040C ldrh r0, [r2, #-4] + 8456 027a 1AFB0033 smlabb r3, r10, r0, r3 + 8457 027e 31F802AC ldrh r10, [r1, #-2] + 8458 0282 32F8020C ldrh r0, [r2, #-2] + 8459 0286 013C subs r4, r4, #1 + 8460 0288 01F10801 add r1, r1, #8 + 8461 028c 1AFB0033 smlabb r3, r10, r0, r3 + 8462 0290 02F10802 add r2, r2, #8 + 8463 0294 E1D1 bne .L1358 + 8464 0296 0298 ldr r0, [sp, #8] + 8465 0298 06EB0C02 add r2, r6, ip + 8466 029c 9FB1 cbz r7, .L1359 + 8467 029e 36F80C10 ldrh r1, [r6, ip] + 8468 02a2 BEF80040 ldrh r4, [lr] + 8469 02a6 012F cmp r7, #1 + 8470 02a8 14FB0133 smlabb r3, r4, r1, r3 + 8471 02ac 0BD0 beq .L1359 + 8472 02ae BEF80240 ldrh r4, [lr, #2] + 8473 02b2 5188 ldrh r1, [r2, #2] + 8474 02b4 022F cmp r7, #2 + 8475 02b6 14FB0133 smlabb r3, r4, r1, r3 + 8476 02ba 04D0 beq .L1359 + 8477 02bc 9188 ldrh r1, [r2, #4] + 8478 02be BEF80420 ldrh r2, [lr, #4] + 8479 02c2 11FB0233 smlabb r3, r1, r2, r3 + 8480 .L1359: + 8481 02c6 DB13 asrs r3, r3, #15 + 8482 02c8 A8F80030 strh r3, [r8] @ movhi + 8483 02cc 2E46 mov r6, r5 + 8484 02ce 009B ldr r3, [sp] + 8485 02d0 0235 adds r5, r5, #2 + 8486 02d2 8542 cmp r5, r0 + 8487 02d4 9844 add r8, r8, r3 + 8488 02d6 BAD1 bne .L1361 + 8489 02d8 1946 mov r1, r3 + 8490 02da 039A ldr r2, [sp, #12] + 8491 02dc 019B ldr r3, [sp, #4] + 8492 02de DDF818B0 ldr fp, [sp, #24] + 8493 02e2 DDE904A0 ldrd r10, r0, [sp, #16] + 8494 02e6 01FB0233 mla r3, r1, r2, r3 + 8495 02ea 0193 str r3, [sp, #4] + 8496 .L1357: + 8497 02ec 0A9B ldr r3, [sp, #40] + 8498 02ee DDE900C7 ldrd ip, r7, [sp] + 8499 02f2 00EB4300 add r0, r0, r3, lsl #1 + 8500 .L1372: + 8501 02f6 5FEA9A0E lsrs lr, r10, #2 + 8502 02fa 71D0 beq .L1376 + 8503 .L1430: + 8504 02fc 5C46 mov r4, fp + 8505 02fe 0146 mov r1, r0 + 8506 0300 7546 mov r5, lr + 8507 0302 0023 movs r3, #0 + 8508 .L1369: + 8509 0304 0A68 ldr r2, [r1] @ unaligned + ARM GAS /tmp/ccdao7B1.s page 149 + + + 8510 0306 2668 ldr r6, [r4] @ unaligned + 8511 .syntax unified + 8512 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8513 0308 22FB0633 smlad r3, r2, r6, r3 + 8514 @ 0 "" 2 + 8515 .thumb + 8516 .syntax unified + 8517 030c 4A68 ldr r2, [r1, #4] @ unaligned + 8518 030e 6668 ldr r6, [r4, #4] @ unaligned + 8519 0310 0831 adds r1, r1, #8 + 8520 0312 0834 adds r4, r4, #8 + 8521 .syntax unified + 8522 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8523 0314 22FB0633 smlad r3, r2, r6, r3 + 8524 @ 0 "" 2 + 8525 .thumb + 8526 .syntax unified + 8527 0318 013D subs r5, r5, #1 + 8528 031a F3D1 bne .L1369 + 8529 031c 00EBCE01 add r1, r0, lr, lsl #3 + 8530 0320 0BEBCE0E add lr, fp, lr, lsl #3 + 8531 .L1368: + 8532 0324 1AF00302 ands r2, r10, #3 + 8533 0328 15D0 beq .L1370 + 8534 032a B1F90040 ldrsh r4, [r1] + 8535 032e BEF90050 ldrsh r5, [lr] + 8536 .syntax unified + 8537 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8538 0332 24FB0533 smlad r3, r4, r5, r3 + 8539 @ 0 "" 2 + 8540 .thumb + 8541 .syntax unified + 8542 0336 013A subs r2, r2, #1 + 8543 0338 0DD0 beq .L1370 + 8544 033a B1F90240 ldrsh r4, [r1, #2] + 8545 033e BEF90250 ldrsh r5, [lr, #2] + 8546 .syntax unified + 8547 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8548 0342 24FB0533 smlad r3, r4, r5, r3 + 8549 @ 0 "" 2 + 8550 .thumb + 8551 .syntax unified + 8552 0346 012A cmp r2, #1 + 8553 0348 05D0 beq .L1370 + 8554 034a B1F90420 ldrsh r2, [r1, #4] + 8555 034e BEF90410 ldrsh r1, [lr, #4] + 8556 .syntax unified + 8557 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8558 0352 22FB0133 smlad r3, r2, r1, r3 + 8559 @ 0 "" 2 + 8560 .thumb + 8561 .syntax unified + 8562 .L1370: + 8563 0356 DB13 asrs r3, r3, #15 + 8564 0358 BAF1010A subs r10, r10, #1 + 8565 035c 3B80 strh r3, [r7] @ movhi + 8566 035e 00F10200 add r0, r0, #2 + ARM GAS /tmp/ccdao7B1.s page 150 + + + 8567 0362 6744 add r7, r7, ip + 8568 0364 C7D1 bne .L1372 + 8569 .L1337: + 8570 0366 0FB0 add sp, sp, #60 + 8571 @ sp needed + 8572 0368 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 8573 .L1426: + 8574 036c 0A9B ldr r3, [sp, #40] + 8575 036e 002B cmp r3, #0 + 8576 0370 74D0 beq .L1428 + 8577 .L1373: + 8578 0372 0A9B ldr r3, [sp, #40] + 8579 0374 069E ldr r6, [sp, #24] + 8580 0376 DDE900C1 ldrd ip, r1, [sp] + 8581 037a 00EB4304 add r4, r0, r3, lsl #1 + 8582 037e 0246 mov r2, r0 + 8583 0380 8646 mov lr, r0 + 8584 0382 5D00 lsls r5, r3, #1 + 8585 0384 5046 mov r0, r10 + 8586 .L1349: + 8587 0386 002E cmp r6, #0 + 8588 0388 4CD0 beq .L1429 + 8589 038a 1788 ldrh r7, [r2] + 8590 038c BBF80030 ldrh r3, [fp] + 8591 0390 13FB07F3 smulbb r3, r3, r7 + 8592 0394 60B1 cbz r0, .L1363 + 8593 0396 5788 ldrh r7, [r2, #2] + 8594 0398 BBF80280 ldrh r8, [fp, #2] + 8595 039c 022E cmp r6, #2 + 8596 039e 18FB0733 smlabb r3, r8, r7, r3 + 8597 03a2 05D0 beq .L1363 + 8598 03a4 B2F80480 ldrh r8, [r2, #4] + 8599 03a8 BBF80470 ldrh r7, [fp, #4] + 8600 03ac 18FB0733 smlabb r3, r8, r7, r3 + 8601 .L1363: + 8602 03b0 43F3CF33 sbfx r3, r3, #15, #16 + 8603 .L1367: + 8604 03b4 0232 adds r2, r2, #2 + 8605 03b6 A242 cmp r2, r4 + 8606 03b8 0B80 strh r3, [r1] @ movhi + 8607 03ba 6144 add r1, r1, ip + 8608 03bc E3D1 bne .L1349 + 8609 03be 019B ldr r3, [sp, #4] + 8610 03c0 0A9A ldr r2, [sp, #40] + 8611 03c2 0099 ldr r1, [sp] + 8612 03c4 8246 mov r10, r0 + 8613 03c6 01FB0233 mla r3, r1, r2, r3 + 8614 03ca 7046 mov r0, lr + 8615 03cc 0193 str r3, [sp, #4] + 8616 03ce 2844 add r0, r0, r5 + 8617 03d0 BAF1000F cmp r10, #0 + 8618 03d4 C7D0 beq .L1337 + 8619 03d6 5FEA9A0E lsrs lr, r10, #2 + 8620 03da 1F46 mov r7, r3 + 8621 03dc 8C46 mov ip, r1 + 8622 03de 8DD1 bne .L1430 + 8623 .L1376: + ARM GAS /tmp/ccdao7B1.s page 151 + + + 8624 03e0 7346 mov r3, lr + 8625 03e2 0146 mov r1, r0 + 8626 03e4 DE46 mov lr, fp + 8627 03e6 9DE7 b .L1368 + 8628 .L1354: + 8629 03e8 0498 ldr r0, [sp, #16] + 8630 03ea 8068 ldr r0, [r0, #8] @ unaligned + 8631 .syntax unified + 8632 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8633 03ec 22FB0044 smlad r4, r2, r0, r4 + 8634 @ 0 "" 2 + 8635 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8636 03f0 26FB0055 smlad r5, r6, r0, r5 + 8637 @ 0 "" 2 + 8638 .thumb + 8639 .syntax unified + 8640 03f4 0A68 ldr r2, [r1] @ unaligned + 8641 .syntax unified + 8642 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8643 03f6 22FB00CC smlad ip, r2, r0, ip + 8644 @ 0 "" 2 + 8645 .thumb + 8646 .syntax unified + 8647 03fa D1F80220 ldr r2, [r1, #2] @ unaligned + 8648 .syntax unified + 8649 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8650 03fe 22FB0033 smlad r3, r2, r0, r3 + 8651 @ 0 "" 2 + 8652 .thumb + 8653 .syntax unified + 8654 0402 DEE6 b .L1353 + 8655 .L1427: + 8656 0404 0499 ldr r1, [sp, #16] + 8657 0406 B1F90810 ldrsh r1, [r1, #8] + 8658 040a 89B2 uxth r1, r1 + 8659 .syntax unified + 8660 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8661 040c 22FB0144 smlad r4, r2, r1, r4 + 8662 @ 0 "" 2 + 8663 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8664 0410 26FB0155 smlad r5, r6, r1, r5 + 8665 @ 0 "" 2 + 8666 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8667 0414 26FB11CC smladx ip, r6, r1, ip + 8668 @ 0 "" 2 + 8669 .thumb + 8670 .syntax unified + 8671 0418 039A ldr r2, [sp, #12] + 8672 041a 59F80220 ldr r2, [r9, r2] @ unaligned + 8673 .syntax unified + 8674 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8675 041e 22FB1133 smladx r3, r2, r1, r3 + 8676 @ 0 "" 2 + 8677 .thumb + 8678 .syntax unified + 8679 0422 CEE6 b .L1353 + 8680 .L1429: + ARM GAS /tmp/ccdao7B1.s page 152 + + + 8681 0424 3346 mov r3, r6 + 8682 0426 C5E7 b .L1367 + 8683 .L1338: + 8684 0428 1D46 mov r5, r3 + 8685 042a 03F10043 add r3, r3, #-2147483648 + 8686 042e 023B subs r3, r3, #2 + 8687 0430 0B44 add r3, r3, r1 + 8688 0432 0A46 mov r2, r1 + 8689 0434 2946 mov r1, r5 + 8690 0436 189D ldr r5, [sp, #96] + 8691 0438 0692 str r2, [sp, #24] + 8692 043a 05EB4303 add r3, r5, r3, lsl #1 + 8693 043e 0446 mov r4, r0 + 8694 0440 0193 str r3, [sp, #4] + 8695 0442 6FF00103 mvn r3, #1 + 8696 0446 5846 mov r0, fp + 8697 0448 0093 str r3, [sp] + 8698 044a A346 mov fp, r4 + 8699 044c E7E5 b .L1339 + 8700 .L1340: + 8701 044e 0A9B ldr r3, [sp, #40] + 8702 0450 002B cmp r3, #0 + 8703 0452 8ED1 bne .L1373 + 8704 0454 87E7 b .L1337 + 8705 .L1375: + 8706 0456 0B46 mov r3, r1 + 8707 0458 0646 mov r6, r0 + 8708 045a D6E6 b .L1350 + 8709 .L1428: + 8710 045c 019F ldr r7, [sp, #4] + 8711 045e 9446 mov ip, r2 + 8712 0460 49E7 b .L1372 + 8713 .L1374: + 8714 0462 6346 mov r3, ip + 8715 0464 0446 mov r4, r0 + 8716 0466 2EE6 b .L1342 + 8718 .section .text.arm_correlate_fast_q31,"ax",%progbits + 8719 .align 1 + 8720 .p2align 2,,3 + 8721 .global arm_correlate_fast_q31 + 8722 .syntax unified + 8723 .thumb + 8724 .thumb_func + 8725 .fpu fpv4-sp-d16 + 8727 arm_correlate_fast_q31: + 8728 @ args = 4, pretend = 0, frame = 88 + 8729 @ frame_needed = 0, uses_anonymous_args = 0 + 8730 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8731 0004 97B0 sub sp, sp, #92 + 8732 0006 9942 cmp r1, r3 + 8733 0008 9E46 mov lr, r3 + 8734 000a 0A90 str r0, [sp, #40] + 8735 000c 0D92 str r2, [sp, #52] + 8736 000e C0F07E82 bcc .L1432 + 8737 0012 209A ldr r2, [sp, #128] + 8738 0014 CB1A subs r3, r1, r3 + 8739 0016 02EB8303 add r3, r2, r3, lsl #2 + ARM GAS /tmp/ccdao7B1.s page 153 + + + 8740 001a 0893 str r3, [sp, #32] + 8741 001c 0423 movs r3, #4 + 8742 001e 0393 str r3, [sp, #12] + 8743 .L1433: + 8744 0020 0131 adds r1, r1, #1 + 8745 0022 A1EB0E03 sub r3, r1, lr + 8746 0026 1193 str r3, [sp, #68] + 8747 0028 0EF18046 add r6, lr, #1073741824 + 8748 002c 0D9B ldr r3, [sp, #52] + 8749 002e 013E subs r6, r6, #1 + 8750 0030 03EB8606 add r6, r3, r6, lsl #2 + 8751 0034 BEF10103 subs r3, lr, #1 + 8752 0038 1293 str r3, [sp, #72] + 8753 003a 00F07A82 beq .L1434 + 8754 003e DDF820C0 ldr ip, [sp, #32] + 8755 0042 DDF828A0 ldr r10, [sp, #40] + 8756 0046 4FF00008 mov r8, #0 + 8757 004a 0123 movs r3, #1 + 8758 004c F146 mov r9, lr + 8759 004e 371F subs r7, r6, #4 + 8760 0050 E646 mov lr, ip + 8761 0052 5046 mov r0, r10 + 8762 0054 4246 mov r2, r8 + 8763 0056 9C46 mov ip, r3 + 8764 .L1435: + 8765 0058 1CF00304 ands r4, ip, #3 + 8766 005c 12D0 beq .L1438 + 8767 005e 3168 ldr r1, [r6] + 8768 0060 0368 ldr r3, [r0] + 8769 0062 1546 mov r5, r2 + 8770 0064 013C subs r4, r4, #1 + 8771 0066 C1FB0358 smlal r5, r8, r1, r3 + 8772 006a 0BD0 beq .L1438 + 8773 006c 7168 ldr r1, [r6, #4] + 8774 006e 4368 ldr r3, [r0, #4] + 8775 0070 1546 mov r5, r2 + 8776 0072 012C cmp r4, #1 + 8777 0074 C1FB0358 smlal r5, r8, r1, r3 + 8778 0078 04D0 beq .L1438 + 8779 007a 8168 ldr r1, [r0, #8] + 8780 007c B368 ldr r3, [r6, #8] + 8781 007e 1046 mov r0, r2 + 8782 0080 C1FB0308 smlal r0, r8, r1, r3 + 8783 .L1438: + 8784 0084 4FEA4803 lsl r3, r8, #1 + 8785 0088 CEF80030 str r3, [lr] + 8786 008c 0CF1010C add ip, ip, #1 + 8787 0090 039B ldr r3, [sp, #12] + 8788 0092 E145 cmp r9, ip + 8789 0094 3E46 mov r6, r7 + 8790 0096 9E44 add lr, lr, r3 + 8791 0098 32D0 beq .L1526 + 8792 009a 5FEA9C05 lsrs r5, ip, #2 + 8793 009e 00F04E82 beq .L1467 + 8794 00a2 0AF11003 add r3, r10, #16 + 8795 00a6 2E01 lsls r6, r5, #4 + 8796 00a8 07F11001 add r1, r7, #16 + ARM GAS /tmp/ccdao7B1.s page 154 + + + 8797 00ac 03EB0515 add r5, r3, r5, lsl #4 + 8798 00b0 4FF00008 mov r8, #0 + 8799 .L1437: + 8800 00b4 53F8104C ldr r4, [r3, #-16] + 8801 00b8 51F8100C ldr r0, [r1, #-16] + 8802 00bc 9346 mov fp, r2 + 8803 00be C4FB00B8 smlal fp, r8, r4, r0 + 8804 00c2 53F80C4C ldr r4, [r3, #-12] + 8805 00c6 51F80C0C ldr r0, [r1, #-12] + 8806 00ca 9346 mov fp, r2 + 8807 00cc C4FB00B8 smlal fp, r8, r4, r0 + 8808 00d0 53F8084C ldr r4, [r3, #-8] + 8809 00d4 51F8080C ldr r0, [r1, #-8] + 8810 00d8 9346 mov fp, r2 + 8811 00da C4FB00B8 smlal fp, r8, r4, r0 + 8812 00de 1033 adds r3, r3, #16 + 8813 00e0 53F8144C ldr r4, [r3, #-20] + 8814 00e4 51F8040C ldr r0, [r1, #-4] + 8815 00e8 9346 mov fp, r2 + 8816 00ea 9D42 cmp r5, r3 + 8817 00ec C4FB00B8 smlal fp, r8, r4, r0 + 8818 00f0 01F11001 add r1, r1, #16 + 8819 00f4 DED1 bne .L1437 + 8820 00f6 0AEB0600 add r0, r10, r6 + 8821 00fa 3E44 add r6, r6, r7 + 8822 .L1436: + 8823 00fc 043F subs r7, r7, #4 + 8824 00fe ABE7 b .L1435 + 8825 .L1526: + 8826 0100 1946 mov r1, r3 + 8827 0102 129A ldr r2, [sp, #72] + 8828 0104 089B ldr r3, [sp, #32] + 8829 0106 CDF84CC0 str ip, [sp, #76] + 8830 010a 01FB0233 mla r3, r1, r2, r3 + 8831 010e B9F1030F cmp r9, #3 + 8832 0112 CE46 mov lr, r9 + 8833 0114 0893 str r3, [sp, #32] + 8834 0116 40F2BA81 bls .L1527 + 8835 011a 119B ldr r3, [sp, #68] + 8836 011c 9B08 lsrs r3, r3, #2 + 8837 011e 1493 str r3, [sp, #80] + 8838 0120 00F00B82 beq .L1468 + 8839 0124 0A98 ldr r0, [sp, #40] + 8840 0126 6146 mov r1, ip + 8841 0128 8A08 lsrs r2, r1, #2 + 8842 012a 0CF00301 and r1, ip, #3 + 8843 012e 00F10C04 add r4, r0, #12 + 8844 0132 0691 str r1, [sp, #24] + 8845 0134 00EB0210 add r0, r0, r2, lsl #4 + 8846 0138 0399 ldr r1, [sp, #12] + 8847 013a 0490 str r0, [sp, #16] + 8848 013c 1801 lsls r0, r3, #4 + 8849 013e 04EB0313 add r3, r4, r3, lsl #4 + 8850 0142 8D00 lsls r5, r1, #2 + 8851 0144 0F93 str r3, [sp, #60] + 8852 0146 0D9B ldr r3, [sp, #52] + 8853 0148 0C95 str r5, [sp, #48] + ARM GAS /tmp/ccdao7B1.s page 155 + + + 8854 014a 089D ldr r5, [sp, #32] + 8855 014c 0E92 str r2, [sp, #56] + 8856 014e 03EB0212 add r2, r3, r2, lsl #4 + 8857 0152 1033 adds r3, r3, #16 + 8858 0154 0D44 add r5, r5, r1 + 8859 0156 0B93 str r3, [sp, #44] + 8860 0158 4B42 rsbs r3, r1, #0 + 8861 015a 0594 str r4, [sp, #20] + 8862 015c 0795 str r5, [sp, #28] + 8863 015e 1590 str r0, [sp, #84] + 8864 0160 0992 str r2, [sp, #36] + 8865 0162 1093 str r3, [sp, #64] + 8866 0164 4FF0000A mov r10, #0 + 8867 .L1449: + 8868 0168 059B ldr r3, [sp, #20] + 8869 016a DDF82CC0 ldr ip, [sp, #44] + 8870 016e 53E90389 ldrd r8, r9, [r3, #-12] + 8871 0172 53E901B0 ldrd fp, r0, [r3, #-4] + 8872 0176 0022 movs r2, #0 + 8873 0178 9E46 mov lr, r3 + 8874 017a 0E9B ldr r3, [sp, #56] + 8875 017c 0193 str r3, [sp, #4] + 8876 017e 4446 mov r4, r8 + 8877 0180 4946 mov r1, r9 + 8878 0182 1546 mov r5, r2 + 8879 0184 1646 mov r6, r2 + 8880 0186 1746 mov r7, r2 + 8881 0188 9046 mov r8, r2 + 8882 018a 8146 mov r9, r0 + 8883 018c 5B46 mov r3, fp + 8884 018e 01E0 b .L1446 + 8885 .L1528: + 8886 0190 5EF8109F ldr r9, [lr, #16]! + 8887 .L1446: + 8888 0194 5CE90402 ldrd r0, r2, [ip, #-16] + 8889 0198 D346 mov fp, r10 + 8890 019a C4FB00B7 smlal fp, r7, r4, r0 + 8891 019e D346 mov fp, r10 + 8892 01a0 C0FB01B6 smlal fp, r6, r0, r1 + 8893 01a4 D346 mov fp, r10 + 8894 01a6 C0FB03B5 smlal fp, r5, r0, r3 + 8895 01aa 0295 str r5, [sp, #8] + 8896 01ac 5546 mov r5, r10 + 8897 01ae C0FB0958 smlal r5, r8, r0, r9 + 8898 01b2 5546 mov r5, r10 + 8899 01b4 C3FB0256 smlal r5, r6, r3, r2 + 8900 01b8 5046 mov r0, r10 + 8901 01ba 5CF8085C ldr r5, [ip, #-8] + 8902 01be DEF80440 ldr r4, [lr, #4] + 8903 01c2 C1FB0207 smlal r0, r7, r1, r2 + 8904 01c6 D346 mov fp, r10 + 8905 01c8 C3FB05B7 smlal fp, r7, r3, r5 + 8906 01cc 029D ldr r5, [sp, #8] + 8907 01ce DEF80810 ldr r1, [lr, #8] + 8908 01d2 5CF8040C ldr r0, [ip, #-4] + 8909 01d6 5346 mov r3, r10 + 8910 01d8 C9FB0235 smlal r3, r5, r9, r2 + ARM GAS /tmp/ccdao7B1.s page 156 + + + 8911 01dc 5346 mov r3, r10 + 8912 01de C2FB0438 smlal r3, r8, r2, r4 + 8913 01e2 5CF8083C ldr r3, [ip, #-8] + 8914 01e6 5246 mov r2, r10 + 8915 01e8 C9FB0326 smlal r2, r6, r9, r3 + 8916 01ec 5246 mov r2, r10 + 8917 01ee C4FB0325 smlal r2, r5, r4, r3 + 8918 01f2 5246 mov r2, r10 + 8919 01f4 C3FB0128 smlal r2, r8, r3, r1 + 8920 01f8 5346 mov r3, r10 + 8921 01fa C9FB0037 smlal r3, r7, r9, r0 + 8922 01fe 5346 mov r3, r10 + 8923 0200 C4FB0036 smlal r3, r6, r4, r0 + 8924 0204 5346 mov r3, r10 + 8925 0206 C1FB0035 smlal r3, r5, r1, r0 + 8926 020a DEF80C30 ldr r3, [lr, #12] + 8927 020e 5246 mov r2, r10 + 8928 0210 C0FB0328 smlal r2, r8, r0, r3 + 8929 0214 019A ldr r2, [sp, #4] + 8930 0216 013A subs r2, r2, #1 + 8931 0218 0CF1100C add ip, ip, #16 + 8932 021c 0192 str r2, [sp, #4] + 8933 021e B7D1 bne .L1528 + 8934 0220 9B46 mov fp, r3 + 8935 0222 069B ldr r3, [sp, #24] + 8936 0224 4246 mov r2, r8 + 8937 0226 8946 mov r9, r1 + 8938 0228 A046 mov r8, r4 + 8939 022a 002B cmp r3, #0 + 8940 022c 37D0 beq .L1447 + 8941 022e 0999 ldr r1, [sp, #36] + 8942 0230 0198 ldr r0, [sp, #4] + 8943 0232 0C68 ldr r4, [r1] + 8944 0234 0146 mov r1, r0 + 8945 0236 C8FB0417 smlal r1, r7, r8, r4 + 8946 023a 0146 mov r1, r0 + 8947 023c C9FB0416 smlal r1, r6, r9, r4 + 8948 0240 0146 mov r1, r0 + 8949 0242 CBFB0415 smlal r1, r5, fp, r4 + 8950 0246 0499 ldr r1, [sp, #16] + 8951 0248 C968 ldr r1, [r1, #12] + 8952 024a 0346 mov r3, r0 + 8953 024c C1FB0432 smlal r3, r2, r1, r4 + 8954 0250 069B ldr r3, [sp, #24] + 8955 0252 012B cmp r3, #1 + 8956 0254 23D0 beq .L1447 + 8957 0256 099C ldr r4, [sp, #36] + 8958 0258 D4F804C0 ldr ip, [r4, #4] + 8959 025c 0346 mov r3, r0 + 8960 025e 0446 mov r4, r0 + 8961 0260 C9FB0C37 smlal r3, r7, r9, ip + 8962 0264 0346 mov r3, r0 + 8963 0266 CCFB0105 smlal r0, r5, ip, r1 + 8964 026a 0498 ldr r0, [sp, #16] + 8965 026c 0069 ldr r0, [r0, #16] + 8966 026e CBFB0C36 smlal r3, r6, fp, ip + 8967 0272 2346 mov r3, r4 + ARM GAS /tmp/ccdao7B1.s page 157 + + + 8968 0274 C0FB0C32 smlal r3, r2, r0, ip + 8969 0278 069B ldr r3, [sp, #24] + 8970 027a 022B cmp r3, #2 + 8971 027c 0FD0 beq .L1447 + 8972 027e 099B ldr r3, [sp, #36] + 8973 0280 D3F808C0 ldr ip, [r3, #8] + 8974 0284 2346 mov r3, r4 + 8975 0286 CBFB0C37 smlal r3, r7, fp, ip + 8976 028a 2346 mov r3, r4 + 8977 028c CCFB0136 smlal r3, r6, ip, r1 + 8978 0290 2346 mov r3, r4 + 8979 0292 CCFB0035 smlal r3, r5, ip, r0 + 8980 0296 0498 ldr r0, [sp, #16] + 8981 0298 4369 ldr r3, [r0, #20] + 8982 029a CCFB0342 smlal r4, r2, ip, r3 + 8983 .L1447: + 8984 029e 079B ldr r3, [sp, #28] + 8985 02a0 1099 ldr r1, [sp, #64] + 8986 02a2 7F00 lsls r7, r7, #1 + 8987 02a4 5F50 str r7, [r3, r1] + 8988 02a6 0399 ldr r1, [sp, #12] + 8989 02a8 5200 lsls r2, r2, #1 + 8990 02aa 7600 lsls r6, r6, #1 + 8991 02ac 6D00 lsls r5, r5, #1 + 8992 02ae 1E60 str r6, [r3] + 8993 02b0 5D50 str r5, [r3, r1] + 8994 02b2 43F81120 str r2, [r3, r1, lsl #1] + 8995 02b6 0C99 ldr r1, [sp, #48] + 8996 02b8 059A ldr r2, [sp, #20] + 8997 02ba 0B44 add r3, r3, r1 + 8998 02bc 0793 str r3, [sp, #28] + 8999 02be 049B ldr r3, [sp, #16] + 9000 02c0 1033 adds r3, r3, #16 + 9001 02c2 0493 str r3, [sp, #16] + 9002 02c4 0F9B ldr r3, [sp, #60] + 9003 02c6 1032 adds r2, r2, #16 + 9004 02c8 9A42 cmp r2, r3 + 9005 02ca 0592 str r2, [sp, #20] + 9006 02cc 7FF44CAF bne .L1449 + 9007 02d0 149B ldr r3, [sp, #80] + 9008 02d2 089A ldr r2, [sp, #32] + 9009 02d4 159E ldr r6, [sp, #84] + 9010 02d6 01FB0322 mla r2, r1, r3, r2 + 9011 02da 0892 str r2, [sp, #32] + 9012 02dc 0A9A ldr r2, [sp, #40] + 9013 02de 9B00 lsls r3, r3, #2 + 9014 02e0 1644 add r6, r6, r2 + 9015 02e2 1493 str r3, [sp, #80] + 9016 .L1444: + 9017 02e4 119B ldr r3, [sp, #68] + 9018 02e6 13F00303 ands r3, r3, #3 + 9019 02ea 0493 str r3, [sp, #16] + 9020 02ec 6ED0 beq .L1450 + 9021 02ee 139A ldr r2, [sp, #76] + 9022 02f0 DDF82090 ldr r9, [sp, #32] + 9023 02f4 9108 lsrs r1, r2, #2 + 9024 02f6 02F0030A and r10, r2, #3 + ARM GAS /tmp/ccdao7B1.s page 158 + + + 9025 02fa 149A ldr r2, [sp, #80] + 9026 02fc 0191 str r1, [sp, #4] + 9027 02fe 02F1010E add lr, r2, #1 + 9028 0302 1344 add r3, r3, r2 + 9029 0304 0A9A ldr r2, [sp, #40] + 9030 0306 02EB8E0E add lr, r2, lr, lsl #2 + 9031 030a 0432 adds r2, r2, #4 + 9032 030c 02EB8303 add r3, r2, r3, lsl #2 + 9033 0310 0293 str r3, [sp, #8] + 9034 0312 0D9B ldr r3, [sp, #52] + 9035 0314 03EB0118 add r8, r3, r1, lsl #4 + 9036 0318 1033 adds r3, r3, #16 + 9037 031a 0B93 str r3, [sp, #44] + 9038 031c 4FEA011B lsl fp, r1, #4 + 9039 0320 0023 movs r3, #0 + 9040 .L1454: + 9041 0322 0B9A ldr r2, [sp, #44] + 9042 0324 0198 ldr r0, [sp, #4] + 9043 0326 06F11001 add r1, r6, #16 + 9044 032a 0027 movs r7, #0 + 9045 .L1451: + 9046 032c 51F8105C ldr r5, [r1, #-16] + 9047 0330 52F8104C ldr r4, [r2, #-16] + 9048 0334 9C46 mov ip, r3 + 9049 0336 C5FB04C7 smlal ip, r7, r5, r4 + 9050 033a 51F80C5C ldr r5, [r1, #-12] + 9051 033e 52F80C4C ldr r4, [r2, #-12] + 9052 0342 9C46 mov ip, r3 + 9053 0344 C5FB04C7 smlal ip, r7, r5, r4 + 9054 0348 51F8085C ldr r5, [r1, #-8] + 9055 034c 52F8084C ldr r4, [r2, #-8] + 9056 0350 9C46 mov ip, r3 + 9057 0352 C5FB04C7 smlal ip, r7, r5, r4 + 9058 0356 51F8045C ldr r5, [r1, #-4] + 9059 035a 52F8044C ldr r4, [r2, #-4] + 9060 035e 9C46 mov ip, r3 + 9061 0360 0138 subs r0, r0, #1 + 9062 0362 01F11001 add r1, r1, #16 + 9063 0366 C5FB04C7 smlal ip, r7, r5, r4 + 9064 036a 02F11002 add r2, r2, #16 + 9065 036e DDD1 bne .L1451 + 9066 0370 06EB0B04 add r4, r6, fp + 9067 0374 BAF1000F cmp r10, #0 + 9068 0378 17D0 beq .L1452 + 9069 037a 56F80B10 ldr r1, [r6, fp] + 9070 037e D8F80020 ldr r2, [r8] + 9071 0382 0546 mov r5, r0 + 9072 0384 BAF1010F cmp r10, #1 + 9073 0388 C2FB0157 smlal r5, r7, r2, r1 + 9074 038c 0DD0 beq .L1452 + 9075 038e D8F80410 ldr r1, [r8, #4] + 9076 0392 6268 ldr r2, [r4, #4] + 9077 0394 0546 mov r5, r0 + 9078 0396 BAF1020F cmp r10, #2 + 9079 039a C1FB0257 smlal r5, r7, r1, r2 + 9080 039e 04D0 beq .L1452 + 9081 03a0 A168 ldr r1, [r4, #8] + ARM GAS /tmp/ccdao7B1.s page 159 + + + 9082 03a2 D8F80820 ldr r2, [r8, #8] + 9083 03a6 C1FB0207 smlal r0, r7, r1, r2 + 9084 .L1452: + 9085 03aa 039A ldr r2, [sp, #12] + 9086 03ac 7F00 lsls r7, r7, #1 + 9087 03ae C9F80070 str r7, [r9] + 9088 03b2 9144 add r9, r9, r2 + 9089 03b4 029A ldr r2, [sp, #8] + 9090 03b6 7646 mov r6, lr + 9091 03b8 0EF1040E add lr, lr, #4 + 9092 03bc 7245 cmp r2, lr + 9093 03be B0D1 bne .L1454 + 9094 03c0 DDE90312 ldrd r1, r2, [sp, #12] + 9095 03c4 089B ldr r3, [sp, #32] + 9096 03c6 01FB0233 mla r3, r1, r2, r3 + 9097 03ca 0893 str r3, [sp, #32] + 9098 .L1450: + 9099 03cc 0A9B ldr r3, [sp, #40] + 9100 03ce 119A ldr r2, [sp, #68] + 9101 03d0 03EB8203 add r3, r3, r2, lsl #2 + 9102 03d4 0A93 str r3, [sp, #40] + 9103 .L1457: + 9104 03d6 DDF820E0 ldr lr, [sp, #32] + 9105 03da 129E ldr r6, [sp, #72] + 9106 03dc DDF80CA0 ldr r10, [sp, #12] + 9107 03e0 DDF828C0 ldr ip, [sp, #40] + 9108 03e4 DDF83480 ldr r8, [sp, #52] + 9109 03e8 0023 movs r3, #0 + 9110 .L1465: + 9111 03ea B708 lsrs r7, r6, #2 + 9112 03ec 00F08B80 beq .L1469 + 9113 03f0 0CF11001 add r1, ip, #16 + 9114 03f4 08F11002 add r2, r8, #16 + 9115 03f8 3846 mov r0, r7 + 9116 03fa 4FF00009 mov r9, #0 + 9117 .L1462: + 9118 03fe 51F8105C ldr r5, [r1, #-16] + 9119 0402 52F8104C ldr r4, [r2, #-16] + 9120 0406 9B46 mov fp, r3 + 9121 0408 C5FB04B9 smlal fp, r9, r5, r4 + 9122 040c 51F80C5C ldr r5, [r1, #-12] + 9123 0410 52F80C4C ldr r4, [r2, #-12] + 9124 0414 9B46 mov fp, r3 + 9125 0416 C5FB04B9 smlal fp, r9, r5, r4 + 9126 041a 51F8085C ldr r5, [r1, #-8] + 9127 041e 52F8084C ldr r4, [r2, #-8] + 9128 0422 9B46 mov fp, r3 + 9129 0424 C5FB04B9 smlal fp, r9, r5, r4 + 9130 0428 51F8045C ldr r5, [r1, #-4] + 9131 042c 52F8044C ldr r4, [r2, #-4] + 9132 0430 9B46 mov fp, r3 + 9133 0432 0138 subs r0, r0, #1 + 9134 0434 01F11001 add r1, r1, #16 + 9135 0438 C5FB04B9 smlal fp, r9, r5, r4 + 9136 043c 02F11002 add r2, r2, #16 + 9137 0440 DDD1 bne .L1462 + 9138 0442 0CEB0714 add r4, ip, r7, lsl #4 + ARM GAS /tmp/ccdao7B1.s page 160 + + + 9139 0446 08EB0717 add r7, r8, r7, lsl #4 + 9140 .L1461: + 9141 044a 16F00300 ands r0, r6, #3 + 9142 044e 12D0 beq .L1463 + 9143 0450 3968 ldr r1, [r7] + 9144 0452 2268 ldr r2, [r4] + 9145 0454 1D46 mov r5, r3 + 9146 0456 0138 subs r0, r0, #1 + 9147 0458 C1FB0259 smlal r5, r9, r1, r2 + 9148 045c 0BD0 beq .L1463 + 9149 045e 7968 ldr r1, [r7, #4] + 9150 0460 6268 ldr r2, [r4, #4] + 9151 0462 1D46 mov r5, r3 + 9152 0464 0128 cmp r0, #1 + 9153 0466 C1FB0259 smlal r5, r9, r1, r2 + 9154 046a 04D0 beq .L1463 + 9155 046c A168 ldr r1, [r4, #8] + 9156 046e BA68 ldr r2, [r7, #8] + 9157 0470 1846 mov r0, r3 + 9158 0472 C1FB0209 smlal r0, r9, r1, r2 + 9159 .L1463: + 9160 0476 4FEA4902 lsl r2, r9, #1 + 9161 047a 013E subs r6, r6, #1 + 9162 047c CEF80020 str r2, [lr] + 9163 0480 0CF1040C add ip, ip, #4 + 9164 0484 D644 add lr, lr, r10 + 9165 0486 B0D1 bne .L1465 + 9166 .L1431: + 9167 0488 17B0 add sp, sp, #92 + 9168 @ sp needed + 9169 048a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 9170 .L1527: + 9171 048e 119B ldr r3, [sp, #68] + 9172 0490 002B cmp r3, #0 + 9173 0492 A0D0 beq .L1457 + 9174 .L1466: + 9175 0494 119B ldr r3, [sp, #68] + 9176 0496 0A9A ldr r2, [sp, #40] + 9177 0498 0899 ldr r1, [sp, #32] + 9178 049a DDF84880 ldr r8, [sp, #72] + 9179 049e 0D9E ldr r6, [sp, #52] + 9180 04a0 02EB8307 add r7, r2, r3, lsl #2 + 9181 04a4 7546 mov r5, lr + 9182 04a6 DDF80CE0 ldr lr, [sp, #12] + 9183 04aa 4FEA830C lsl ip, r3, #2 + 9184 04ae 0024 movs r4, #0 + 9185 04b0 BA46 mov r10, r7 + 9186 .L1443: + 9187 04b2 35B3 cbz r5, .L1529 + 9188 04b4 1368 ldr r3, [r2] + 9189 04b6 3068 ldr r0, [r6] + 9190 04b8 80FB0303 smull r0, r3, r0, r3 + 9191 04bc B8F1000F cmp r8, #0 + 9192 04c0 0BD0 beq .L1456 + 9193 04c2 7068 ldr r0, [r6, #4] + 9194 04c4 5768 ldr r7, [r2, #4] + 9195 04c6 A146 mov r9, r4 + ARM GAS /tmp/ccdao7B1.s page 161 + + + 9196 04c8 022D cmp r5, #2 + 9197 04ca C0FB0793 smlal r9, r3, r0, r7 + 9198 04ce 04D0 beq .L1456 + 9199 04d0 9068 ldr r0, [r2, #8] + 9200 04d2 B768 ldr r7, [r6, #8] + 9201 04d4 A146 mov r9, r4 + 9202 04d6 C0FB0793 smlal r9, r3, r0, r7 + 9203 .L1456: + 9204 04da 5B00 lsls r3, r3, #1 + 9205 .L1460: + 9206 04dc 0432 adds r2, r2, #4 + 9207 04de 5245 cmp r2, r10 + 9208 04e0 0B60 str r3, [r1] + 9209 04e2 7144 add r1, r1, lr + 9210 04e4 E5D1 bne .L1443 + 9211 04e6 089B ldr r3, [sp, #32] + 9212 04e8 119A ldr r2, [sp, #68] + 9213 04ea 0399 ldr r1, [sp, #12] + 9214 04ec 01FB0233 mla r3, r1, r2, r3 + 9215 04f0 0893 str r3, [sp, #32] + 9216 04f2 0A9B ldr r3, [sp, #40] + 9217 04f4 6344 add r3, r3, ip + 9218 04f6 0A93 str r3, [sp, #40] + 9219 04f8 129B ldr r3, [sp, #72] + 9220 04fa 002B cmp r3, #0 + 9221 04fc 7FF46BAF bne .L1457 + 9222 0500 C2E7 b .L1431 + 9223 .L1529: + 9224 0502 2B46 mov r3, r5 + 9225 0504 EAE7 b .L1460 + 9226 .L1469: + 9227 0506 B946 mov r9, r7 + 9228 0508 6446 mov r4, ip + 9229 050a 4746 mov r7, r8 + 9230 050c 9DE7 b .L1461 + 9231 .L1432: + 9232 050e 03F18043 add r3, r3, #1073741824 + 9233 0512 209C ldr r4, [sp, #128] + 9234 0514 023B subs r3, r3, #2 + 9235 0516 0B44 add r3, r3, r1 + 9236 0518 04EB8303 add r3, r4, r3, lsl #2 + 9237 051c 0A46 mov r2, r1 + 9238 051e 0893 str r3, [sp, #32] + 9239 0520 0D99 ldr r1, [sp, #52] + 9240 0522 0A91 str r1, [sp, #40] + 9241 0524 6FF00303 mvn r3, #3 + 9242 0528 7146 mov r1, lr + 9243 052a 0D90 str r0, [sp, #52] + 9244 052c 9646 mov lr, r2 + 9245 052e 0393 str r3, [sp, #12] + 9246 0530 76E5 b .L1433 + 9247 .L1434: + 9248 0532 119B ldr r3, [sp, #68] + 9249 0534 002B cmp r3, #0 + 9250 0536 ADD1 bne .L1466 + 9251 0538 A6E7 b .L1431 + 9252 .L1468: + ARM GAS /tmp/ccdao7B1.s page 162 + + + 9253 053a 0A9E ldr r6, [sp, #40] + 9254 053c D2E6 b .L1444 + 9255 .L1467: + 9256 053e A846 mov r8, r5 + 9257 0540 5046 mov r0, r10 + 9258 0542 DBE5 b .L1436 + 9260 .section .text.arm_correlate_opt_q15,"ax",%progbits + 9261 .align 1 + 9262 .p2align 2,,3 + 9263 .global arm_correlate_opt_q15 + 9264 .syntax unified + 9265 .thumb + 9266 .thumb_func + 9267 .fpu fpv4-sp-d16 + 9269 arm_correlate_opt_q15: + 9270 @ args = 8, pretend = 0, frame = 16 + 9271 @ frame_needed = 0, uses_anonymous_args = 0 + 9272 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 9273 0004 85B0 sub sp, sp, #20 + 9274 0006 9942 cmp r1, r3 + 9275 0008 DDF83C80 ldr r8, [sp, #60] + 9276 000c 0E46 mov r6, r1 + 9277 000e 9A46 mov r10, r3 + 9278 0010 0746 mov r7, r0 + 9279 0012 1446 mov r4, r2 + 9280 0014 70D3 bcc .L1531 + 9281 0016 CD1A subs r5, r1, r3 + 9282 0018 0E9B ldr r3, [sp, #56] + 9283 001a 03EB4505 add r5, r3, r5, lsl #1 + 9284 001e 4B00 lsls r3, r1, #1 + 9285 0020 0293 str r3, [sp, #8] + 9286 0022 4FF00209 mov r9, #2 + 9287 .L1532: + 9288 0026 0AF1FF3B add fp, r10, #-1 + 9289 002a 5A46 mov r2, fp + 9290 002c 4146 mov r1, r8 + 9291 002e 0020 movs r0, #0 + 9292 0030 FFF7FEFF bl arm_fill_q15 + 9293 0034 0AF10043 add r3, r10, #-2147483648 + 9294 0038 013B subs r3, r3, #1 + 9295 003a 3846 mov r0, r7 + 9296 003c 08EB4301 add r1, r8, r3, lsl #1 + 9297 0040 3246 mov r2, r6 + 9298 0042 0191 str r1, [sp, #4] + 9299 0044 FFF7FEFF bl arm_copy_q15 + 9300 0048 DDE90113 ldrd r1, r3, [sp, #4] + 9301 004c 5A46 mov r2, fp + 9302 004e 1944 add r1, r1, r3 + 9303 0050 0020 movs r0, #0 + 9304 0052 5644 add r6, r6, r10 + 9305 0054 FFF7FEFF bl arm_fill_q15 + 9306 0058 771E subs r7, r6, #1 + 9307 005a 46D0 beq .L1530 + 9308 005c 4FEA5A02 lsr r2, r10, #1 + 9309 0060 0AF00103 and r3, r10, #1 + 9310 0064 4FEA820B lsl fp, r2, #2 + 9311 0068 04EB820A add r10, r4, r2, lsl #2 + ARM GAS /tmp/ccdao7B1.s page 163 + + + 9312 006c A61C adds r6, r4, #2 + 9313 006e 08F1020E add lr, r8, #2 + 9314 0072 0393 str r3, [sp, #12] + 9315 0074 D046 mov r8, r10 + 9316 0076 ABF1020B sub fp, fp, #2 + 9317 007a CA46 mov r10, r9 + 9318 007c 0196 str r6, [sp, #4] + 9319 .L1539: + 9320 007e AEF10209 sub r9, lr, #2 + 9321 0082 AAB3 cbz r2, .L1540 + 9322 0084 019E ldr r6, [sp, #4] + 9323 0086 0295 str r5, [sp, #8] + 9324 0088 0023 movs r3, #0 + 9325 008a 0020 movs r0, #0 + 9326 008c 0021 movs r1, #0 + 9327 008e BC46 mov ip, r7 + 9328 .L1535: + 9329 0090 39F82370 ldrh r7, [r9, r3, lsl #2] + 9330 0094 34F82350 ldrh r5, [r4, r3, lsl #2] + 9331 0098 C7FB8501 smlalbb r0, r1, r7, r5 + 9332 009c 3EF82370 ldrh r7, [lr, r3, lsl #2] + 9333 00a0 36F82350 ldrh r5, [r6, r3, lsl #2] + 9334 00a4 0133 adds r3, r3, #1 + 9335 00a6 9A42 cmp r2, r3 + 9336 00a8 C7FB8501 smlalbb r0, r1, r7, r5 + 9337 00ac F0D1 bne .L1535 + 9338 00ae 029D ldr r5, [sp, #8] + 9339 00b0 0196 str r6, [sp, #4] + 9340 00b2 6746 mov r7, ip + 9341 00b4 0BEB0E09 add r9, fp, lr + 9342 00b8 4346 mov r3, r8 + 9343 .L1534: + 9344 00ba 039E ldr r6, [sp, #12] + 9345 00bc 2EB9 cbnz r6, .L1547 + 9346 00be C30B lsrs r3, r0, #15 + 9347 00c0 0EF1020E add lr, lr, #2 + 9348 00c4 43EA4143 orr r3, r3, r1, lsl #17 + 9349 00c8 09E0 b .L1546 + 9350 .L1547: + 9351 00ca 1B88 ldrh r3, [r3] + 9352 00cc B9F800C0 ldrh ip, [r9] + 9353 00d0 CCFB8301 smlalbb r0, r1, ip, r3 + 9354 00d4 C30B lsrs r3, r0, #15 + 9355 00d6 43EA4143 orr r3, r3, r1, lsl #17 + 9356 00da 0EF1020E add lr, lr, #2 + 9357 .L1546: + 9358 00de 013F subs r7, r7, #1 + 9359 .syntax unified + 9360 @ 328 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15. + 9361 00e0 03F30F03 ssat r3, #16, r3 + 9362 @ 0 "" 2 + 9363 .thumb + 9364 .syntax unified + 9365 00e4 2B80 strh r3, [r5] @ movhi + 9366 00e6 5544 add r5, r5, r10 + 9367 00e8 C9D1 bne .L1539 + 9368 .L1530: + ARM GAS /tmp/ccdao7B1.s page 164 + + + 9369 00ea 05B0 add sp, sp, #20 + 9370 @ sp needed + 9371 00ec BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 9372 .L1540: + 9373 00f0 2346 mov r3, r4 + 9374 00f2 0020 movs r0, #0 + 9375 00f4 0021 movs r1, #0 + 9376 00f6 E0E7 b .L1534 + 9377 .L1531: + 9378 00f8 03F10042 add r2, r3, #-2147483648 + 9379 00fc 023A subs r2, r2, #2 + 9380 00fe 0E9B ldr r3, [sp, #56] + 9381 0100 0A44 add r2, r2, r1 + 9382 0102 03EB4205 add r5, r3, r2, lsl #1 + 9383 0106 4FEA4A03 lsl r3, r10, #1 + 9384 010a 2746 mov r7, r4 + 9385 010c 5646 mov r6, r10 + 9386 010e 0446 mov r4, r0 + 9387 0110 0293 str r3, [sp, #8] + 9388 0112 8A46 mov r10, r1 + 9389 0114 6FF00109 mvn r9, #1 + 9390 0118 85E7 b .L1532 + 9392 011a 00BF .section .text.arm_correlate_opt_q7,"ax",%progbits + 9393 .align 1 + 9394 .p2align 2,,3 + 9395 .global arm_correlate_opt_q7 + 9396 .syntax unified + 9397 .thumb + 9398 .thumb_func + 9399 .fpu fpv4-sp-d16 + 9401 arm_correlate_opt_q7: + 9402 @ args = 12, pretend = 0, frame = 64 + 9403 @ frame_needed = 0, uses_anonymous_args = 0 + 9404 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 9405 0004 91B0 sub sp, sp, #68 + 9406 0006 9942 cmp r1, r3 + 9407 0008 DDF870A0 ldr r10, [sp, #112] + 9408 000c 0C93 str r3, [sp, #48] + 9409 000e 0E46 mov r6, r1 + 9410 0010 0746 mov r7, r0 + 9411 0012 C0F08F81 bcc .L1549 + 9412 0016 CB1A subs r3, r1, r3 + 9413 0018 1A99 ldr r1, [sp, #104] + 9414 001a CB18 adds r3, r1, r3 + 9415 001c 0D93 str r3, [sp, #52] + 9416 001e 0123 movs r3, #1 + 9417 0020 0493 str r3, [sp, #16] + 9418 0022 0C9B ldr r3, [sp, #48] + 9419 0024 9808 lsrs r0, r3, #2 + 9420 0026 0590 str r0, [sp, #20] + 9421 0028 00F09781 beq .L1573 + 9422 .L1611: + 9423 002c 131D adds r3, r2, #4 + 9424 002e 0AF10801 add r1, r10, #8 + 9425 0032 8500 lsls r5, r0, #2 + 9426 0034 03EB8004 add r4, r3, r0, lsl #2 + 9427 .L1552: + ARM GAS /tmp/ccdao7B1.s page 165 + + + 9428 0038 13F9040C ldrsb r0, [r3, #-4] + 9429 003c 21F8080C strh r0, [r1, #-8] @ movhi + 9430 0040 13F9030C ldrsb r0, [r3, #-3] + 9431 0044 21F8060C strh r0, [r1, #-6] @ movhi + 9432 0048 13F9020C ldrsb r0, [r3, #-2] + 9433 004c 21F8040C strh r0, [r1, #-4] @ movhi + 9434 0050 13F9010C ldrsb r0, [r3, #-1] + 9435 0054 21F8020C strh r0, [r1, #-2] @ movhi + 9436 0058 0433 adds r3, r3, #4 + 9437 005a 9C42 cmp r4, r3 + 9438 005c 01F10801 add r1, r1, #8 + 9439 0060 EAD1 bne .L1552 + 9440 0062 059B ldr r3, [sp, #20] + 9441 0064 2A44 add r2, r2, r5 + 9442 0066 0AEBC303 add r3, r10, r3, lsl #3 + 9443 .L1551: + 9444 006a 0C99 ldr r1, [sp, #48] + 9445 006c 11F00301 ands r1, r1, #3 + 9446 0070 0791 str r1, [sp, #28] + 9447 0072 0DD0 beq .L1556 + 9448 0074 92F90010 ldrsb r1, [r2] + 9449 0078 1980 strh r1, [r3] @ movhi + 9450 007a 0799 ldr r1, [sp, #28] + 9451 007c 0139 subs r1, r1, #1 + 9452 007e 07D0 beq .L1556 + 9453 0080 92F90100 ldrsb r0, [r2, #1] + 9454 0084 5880 strh r0, [r3, #2] @ movhi + 9455 0086 0129 cmp r1, #1 + 9456 0088 02D0 beq .L1556 + 9457 008a 92F90220 ldrsb r2, [r2, #2] + 9458 008e 9A80 strh r2, [r3, #4] @ movhi + 9459 .L1556: + 9460 0090 0C9C ldr r4, [sp, #48] + 9461 0092 1B99 ldr r1, [sp, #108] + 9462 0094 621E subs r2, r4, #1 + 9463 0096 0020 movs r0, #0 + 9464 0098 0192 str r2, [sp, #4] + 9465 009a FFF7FEFF bl arm_fill_q15 + 9466 009e 1B9B ldr r3, [sp, #108] + 9467 00a0 019A ldr r2, [sp, #4] + 9468 00a2 04F10041 add r1, r4, #-2147483648 + 9469 00a6 0139 subs r1, r1, #1 + 9470 00a8 5FEA960C lsrs ip, r6, #2 + 9471 00ac 03EB4101 add r1, r3, r1, lsl #1 + 9472 00b0 1ED0 beq .L1555 + 9473 00b2 3B1D adds r3, r7, #4 + 9474 00b4 01F10804 add r4, r1, #8 + 9475 00b8 4FEA8C0E lsl lr, ip, #2 + 9476 00bc 03EB8C00 add r0, r3, ip, lsl #2 + 9477 .L1557: + 9478 00c0 13F9045C ldrsb r5, [r3, #-4] + 9479 00c4 24F8085C strh r5, [r4, #-8] @ movhi + 9480 00c8 13F9035C ldrsb r5, [r3, #-3] + 9481 00cc 24F8065C strh r5, [r4, #-6] @ movhi + 9482 00d0 13F9025C ldrsb r5, [r3, #-2] + 9483 00d4 24F8045C strh r5, [r4, #-4] @ movhi + 9484 00d8 13F9015C ldrsb r5, [r3, #-1] + ARM GAS /tmp/ccdao7B1.s page 166 + + + 9485 00dc 24F8025C strh r5, [r4, #-2] @ movhi + 9486 00e0 0433 adds r3, r3, #4 + 9487 00e2 8342 cmp r3, r0 + 9488 00e4 04F10804 add r4, r4, #8 + 9489 00e8 EAD1 bne .L1557 + 9490 00ea 7744 add r7, r7, lr + 9491 00ec 01EBCC01 add r1, r1, ip, lsl #3 + 9492 .L1555: + 9493 00f0 16F00303 ands r3, r6, #3 + 9494 00f4 0ED0 beq .L1558 + 9495 00f6 97F90000 ldrsb r0, [r7] + 9496 00fa 0880 strh r0, [r1] @ movhi + 9497 00fc 581E subs r0, r3, #1 + 9498 00fe 07D0 beq .L1559 + 9499 0100 97F90140 ldrsb r4, [r7, #1] + 9500 0104 4C80 strh r4, [r1, #2] @ movhi + 9501 0106 0128 cmp r0, #1 + 9502 0108 1CBF itt ne + 9503 010a 97F90200 ldrsbne r0, [r7, #2] + 9504 010e 8880 strhne r0, [r1, #4] @ movhi + 9505 .L1559: + 9506 0110 01EB4301 add r1, r1, r3, lsl #1 + 9507 .L1558: + 9508 0114 0020 movs r0, #0 + 9509 0116 FFF7FEFF bl arm_fill_q15 + 9510 011a 0C9B ldr r3, [sp, #48] + 9511 011c 1E44 add r6, r6, r3 + 9512 011e 731E subs r3, r6, #1 + 9513 0120 9A08 lsrs r2, r3, #2 + 9514 0122 0E93 str r3, [sp, #56] + 9515 0124 0F92 str r2, [sp, #60] + 9516 0126 00F0BA80 beq .L1560 + 9517 012a 0599 ldr r1, [sp, #20] + 9518 012c 0292 str r2, [sp, #8] + 9519 012e CB00 lsls r3, r1, #3 + 9520 0130 0833 adds r3, r3, #8 + 9521 0132 0B93 str r3, [sp, #44] + 9522 0134 049B ldr r3, [sp, #16] + 9523 0136 1B9A ldr r2, [sp, #108] + 9524 0138 DFF828B2 ldr fp, .L1612 + 9525 013c CDF870A0 str r10, [sp, #112] + 9526 0140 9800 lsls r0, r3, #2 + 9527 0142 0AEBC101 add r1, r10, r1, lsl #3 + 9528 0146 0890 str r0, [sp, #32] + 9529 0148 0A91 str r1, [sp, #40] + 9530 014a 0D98 ldr r0, [sp, #52] + 9531 014c 0799 ldr r1, [sp, #28] + 9532 014e 0192 str r2, [sp, #4] + 9533 0150 1844 add r0, r0, r3 + 9534 0152 0139 subs r1, r1, #1 + 9535 0154 5B42 rsbs r3, r3, #0 + 9536 0156 0691 str r1, [sp, #24] + 9537 0158 0993 str r3, [sp, #36] + 9538 015a 8246 mov r10, r0 + 9539 .L1565: + 9540 015c 019A ldr r2, [sp, #4] + 9541 015e 02F10801 add r1, r2, #8 + ARM GAS /tmp/ccdao7B1.s page 167 + + + 9542 0162 0391 str r1, [sp, #12] + 9543 0164 8C46 mov ip, r1 + 9544 0166 0599 ldr r1, [sp, #20] + 9545 0168 1368 ldr r3, [r2] @ unaligned + 9546 016a 5068 ldr r0, [r2, #4] @ unaligned + 9547 016c 0029 cmp r1, #0 + 9548 016e 00F0DB80 beq .L1574 + 9549 0172 0022 movs r2, #0 + 9550 0174 DDF870E0 ldr lr, [sp, #112] + 9551 0178 1546 mov r5, r2 + 9552 017a 1746 mov r7, r2 + 9553 017c 1646 mov r6, r2 + 9554 017e 8946 mov r9, r1 + 9555 .L1562: + 9556 0180 DEF80010 ldr r1, [lr] @ unaligned + 9557 .syntax unified + 9558 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9559 0184 23FB0166 smlad r6, r3, r1, r6 + 9560 @ 0 "" 2 + 9561 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9562 0188 20FB0155 smlad r5, r0, r1, r5 + 9563 @ 0 "" 2 + 9564 .thumb + 9565 .syntax unified + 9566 018c 03EA0B04 and r4, r3, fp + 9567 0190 83B2 uxth r3, r0 + 9568 0192 2343 orrs r3, r3, r4 + 9569 .syntax unified + 9570 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9571 0194 23FB1177 smladx r7, r3, r1, r7 + 9572 @ 0 "" 2 + 9573 .thumb + 9574 .syntax unified + 9575 0198 DCF80030 ldr r3, [ip] @ unaligned + 9576 019c 00EA0B04 and r4, r0, fp + 9577 01a0 1FFA83F8 uxth r8, r3 + 9578 01a4 48EA0408 orr r8, r8, r4 + 9579 .syntax unified + 9580 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9581 01a8 28FB1121 smladx r1, r8, r1, r2 + 9582 @ 0 "" 2 + 9583 .thumb + 9584 .syntax unified + 9585 01ac DEF80440 ldr r4, [lr, #4] @ unaligned + 9586 01b0 0EF1080E add lr, lr, #8 + 9587 .syntax unified + 9588 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9589 01b4 20FB0466 smlad r6, r0, r4, r6 + 9590 @ 0 "" 2 + 9591 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9592 01b8 23FB0455 smlad r5, r3, r4, r5 + 9593 @ 0 "" 2 + 9594 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9595 01bc 28FB1477 smladx r7, r8, r4, r7 + 9596 @ 0 "" 2 + 9597 .thumb + 9598 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 168 + + + 9599 01c0 DCF80400 ldr r0, [ip, #4] @ unaligned + 9600 01c4 03EA0B08 and r8, r3, fp + 9601 01c8 82B2 uxth r2, r0 + 9602 01ca 0CF1080C add ip, ip, #8 + 9603 01ce 42EA0802 orr r2, r2, r8 + 9604 .syntax unified + 9605 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9606 01d2 22FB1412 smladx r2, r2, r4, r1 + 9607 @ 0 "" 2 + 9608 .thumb + 9609 .syntax unified + 9610 01d6 B9F10109 subs r9, r9, #1 + 9611 01da D1D1 bne .L1562 + 9612 01dc 0B99 ldr r1, [sp, #44] + 9613 01de 019B ldr r3, [sp, #4] + 9614 01e0 0B44 add r3, r3, r1 + 9615 01e2 0A99 ldr r1, [sp, #40] + 9616 01e4 9C46 mov ip, r3 + 9617 .L1561: + 9618 01e6 079B ldr r3, [sp, #28] + 9619 01e8 73B3 cbz r3, .L1563 + 9620 01ea B1F90030 ldrsh r3, [r1] + 9621 01ee 3CF8080C ldrh r0, [ip, #-8] + 9622 01f2 3CF906EC ldrsh lr, [ip, #-6] + 9623 01f6 3CF9044C ldrsh r4, [ip, #-4] + 9624 01fa 10FB0366 smlabb r6, r0, r3, r6 + 9625 01fe 3CF9020C ldrsh r0, [ip, #-2] + 9626 0202 03FB0E77 mla r7, r3, lr, r7 + 9627 0206 03FB0455 mla r5, r3, r4, r5 + 9628 020a 00FB0322 mla r2, r0, r3, r2 + 9629 020e 069B ldr r3, [sp, #24] + 9630 0210 D3B1 cbz r3, .L1563 + 9631 0212 B1F90230 ldrsh r3, [r1, #2] + 9632 0216 0EFB0366 mla r6, lr, r3, r6 + 9633 021a BCF900E0 ldrsh lr, [ip] + 9634 021e 04FB0377 mla r7, r4, r3, r7 + 9635 0222 00FB0355 mla r5, r0, r3, r5 + 9636 0226 0EFB0322 mla r2, lr, r3, r2 + 9637 022a 069B ldr r3, [sp, #24] + 9638 022c 012B cmp r3, #1 + 9639 022e 0BD0 beq .L1563 + 9640 0230 B1F90430 ldrsh r3, [r1, #4] + 9641 0234 BCF80210 ldrh r1, [ip, #2] + 9642 0238 04FB0366 mla r6, r4, r3, r6 + 9643 023c 00FB0377 mla r7, r0, r3, r7 + 9644 0240 0EFB0355 mla r5, lr, r3, r5 + 9645 0244 11FB0322 smlabb r2, r1, r3, r2 + 9646 .L1563: + 9647 0248 099B ldr r3, [sp, #36] + 9648 024a F611 asrs r6, r6, #7 + 9649 .syntax unified + 9650 @ 323 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c + 9651 024c 06F30706 ssat r6, #8, r6 + 9652 @ 0 "" 2 + 9653 .thumb + 9654 .syntax unified + 9655 0250 0AF80360 strb r6, [r10, r3] + ARM GAS /tmp/ccdao7B1.s page 169 + + + 9656 0254 049B ldr r3, [sp, #16] + 9657 0256 FF11 asrs r7, r7, #7 + 9658 0258 ED11 asrs r5, r5, #7 + 9659 025a D211 asrs r2, r2, #7 + 9660 .syntax unified + 9661 @ 325 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c + 9662 025c 07F30707 ssat r7, #8, r7 + 9663 @ 0 "" 2 + 9664 @ 327 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c + 9665 0260 05F30705 ssat r5, #8, r5 + 9666 @ 0 "" 2 + 9667 .thumb + 9668 .syntax unified + 9669 0264 8AF80070 strb r7, [r10] + 9670 .syntax unified + 9671 @ 329 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c + 9672 0268 02F30702 ssat r2, #8, r2 + 9673 @ 0 "" 2 + 9674 .thumb + 9675 .syntax unified + 9676 026c 0AF80350 strb r5, [r10, r3] + 9677 0270 0AF81320 strb r2, [r10, r3, lsl #1] + 9678 0274 039B ldr r3, [sp, #12] + 9679 0276 0193 str r3, [sp, #4] + 9680 0278 089B ldr r3, [sp, #32] + 9681 027a 9A44 add r10, r10, r3 + 9682 027c 029B ldr r3, [sp, #8] + 9683 027e 013B subs r3, r3, #1 + 9684 0280 0293 str r3, [sp, #8] + 9685 0282 7FF46BAF bne .L1565 + 9686 0286 0D9A ldr r2, [sp, #52] + 9687 0288 0F9B ldr r3, [sp, #60] + 9688 028a 0899 ldr r1, [sp, #32] + 9689 028c DDF870A0 ldr r10, [sp, #112] + 9690 0290 01FB0322 mla r2, r1, r3, r2 + 9691 0294 0D92 str r2, [sp, #52] + 9692 0296 1B9A ldr r2, [sp, #108] + 9693 0298 02EBC303 add r3, r2, r3, lsl #3 + 9694 029c 1B93 str r3, [sp, #108] + 9695 .L1560: + 9696 029e 0E9B ldr r3, [sp, #56] + 9697 02a0 13F00303 ands r3, r3, #3 + 9698 02a4 3DD0 beq .L1548 + 9699 02a6 1B9A ldr r2, [sp, #108] + 9700 02a8 DDF83490 ldr r9, [sp, #52] + 9701 02ac 0133 adds r3, r3, #1 + 9702 02ae 02EB4307 add r7, r2, r3, lsl #1 + 9703 02b2 0C9B ldr r3, [sp, #48] + 9704 02b4 5D08 lsrs r5, r3, #1 + 9705 02b6 4FEA850C lsl ip, r5, #2 + 9706 02ba 901C adds r0, r2, #2 + 9707 02bc 03F0010E and lr, r3, #1 + 9708 02c0 ACF1020C sub ip, ip, #2 + 9709 02c4 0AEB8508 add r8, r10, r5, lsl #2 + 9710 02c8 0AF10206 add r6, r10, #2 + 9711 .L1572: + 9712 02cc 841E subs r4, r0, #2 + ARM GAS /tmp/ccdao7B1.s page 170 + + + 9713 02ce 002D cmp r5, #0 + 9714 02d0 45D0 beq .L1575 + 9715 02d2 0023 movs r3, #0 + 9716 02d4 1A46 mov r2, r3 + 9717 .L1568: + 9718 02d6 34F823B0 ldrh fp, [r4, r3, lsl #2] + 9719 02da 3AF82310 ldrh r1, [r10, r3, lsl #2] + 9720 02de 1BFB0122 smlabb r2, fp, r1, r2 + 9721 02e2 30F823B0 ldrh fp, [r0, r3, lsl #2] + 9722 02e6 36F82310 ldrh r1, [r6, r3, lsl #2] + 9723 02ea 0133 adds r3, r3, #1 + 9724 02ec 9D42 cmp r5, r3 + 9725 02ee 1BFB0122 smlabb r2, fp, r1, r2 + 9726 02f2 F0D1 bne .L1568 + 9727 02f4 0CEB0004 add r4, ip, r0 + 9728 02f8 4146 mov r1, r8 + 9729 .L1567: + 9730 02fa BEF1000F cmp lr, #0 + 9731 02fe 02D1 bne .L1610 + 9732 0300 0230 adds r0, r0, #2 + 9733 0302 D311 asrs r3, r2, #7 + 9734 0304 05E0 b .L1609 + 9735 .L1610: + 9736 0306 2388 ldrh r3, [r4] + 9737 0308 0988 ldrh r1, [r1] + 9738 030a 13FB0123 smlabb r3, r3, r1, r2 + 9739 030e 0230 adds r0, r0, #2 + 9740 0310 DB11 asrs r3, r3, #7 + 9741 .L1609: + 9742 .syntax unified + 9743 @ 375 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c + 9744 0312 03F30703 ssat r3, #8, r3 + 9745 @ 0 "" 2 + 9746 .thumb + 9747 .syntax unified + 9748 0316 89F80030 strb r3, [r9] + 9749 031a 049B ldr r3, [sp, #16] + 9750 031c B842 cmp r0, r7 + 9751 031e 9944 add r9, r9, r3 + 9752 0320 D4D1 bne .L1572 + 9753 .L1548: + 9754 0322 11B0 add sp, sp, #68 + 9755 @ sp needed + 9756 0324 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 9757 .L1574: + 9758 0328 0E46 mov r6, r1 + 9759 032a 3246 mov r2, r6 + 9760 032c 1C99 ldr r1, [sp, #112] + 9761 032e 3546 mov r5, r6 + 9762 0330 3746 mov r7, r6 + 9763 0332 58E7 b .L1561 + 9764 .L1549: + 9765 0334 1846 mov r0, r3 + 9766 0336 3B46 mov r3, r7 + 9767 0338 1A9C ldr r4, [sp, #104] + 9768 033a 0C91 str r1, [sp, #48] + 9769 033c 1746 mov r7, r2 + ARM GAS /tmp/ccdao7B1.s page 171 + + + 9770 033e 1A46 mov r2, r3 + 9771 0340 831E subs r3, r0, #2 + 9772 0342 0B44 add r3, r3, r1 + 9773 0344 E318 adds r3, r4, r3 + 9774 0346 0D93 str r3, [sp, #52] + 9775 0348 4FF0FF33 mov r3, #-1 + 9776 034c 0493 str r3, [sp, #16] + 9777 034e 0C9B ldr r3, [sp, #48] + 9778 0350 0646 mov r6, r0 + 9779 0352 9808 lsrs r0, r3, #2 + 9780 0354 0590 str r0, [sp, #20] + 9781 0356 7FF469AE bne .L1611 + 9782 .L1573: + 9783 035a 5346 mov r3, r10 + 9784 035c 85E6 b .L1551 + 9785 .L1575: + 9786 035e 5146 mov r1, r10 + 9787 0360 2A46 mov r2, r5 + 9788 0362 CAE7 b .L1567 + 9789 .L1613: + 9790 .align 2 + 9791 .L1612: + 9792 0364 0000FFFF .word -65536 + 9794 .section .text.arm_correlate_q15,"ax",%progbits + 9795 .align 1 + 9796 .p2align 2,,3 + 9797 .global arm_correlate_q15 + 9798 .syntax unified + 9799 .thumb + 9800 .thumb_func + 9801 .fpu fpv4-sp-d16 + 9803 arm_correlate_q15: + 9804 @ args = 4, pretend = 0, frame = 80 + 9805 @ frame_needed = 0, uses_anonymous_args = 0 + 9806 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 9807 0004 95B0 sub sp, sp, #84 + 9808 0006 9942 cmp r1, r3 + 9809 0008 0293 str r3, [sp, #8] + 9810 000a 0A90 str r0, [sp, #40] + 9811 000c 0492 str r2, [sp, #16] + 9812 000e C0F06282 bcc .L1615 + 9813 0012 1E9A ldr r2, [sp, #120] + 9814 0014 CB1A subs r3, r1, r3 + 9815 0016 02EB4303 add r3, r2, r3, lsl #1 + 9816 001a 0793 str r3, [sp, #28] + 9817 001c 0223 movs r3, #2 + 9818 001e 0393 str r3, [sp, #12] + 9819 .L1616: + 9820 0020 029B ldr r3, [sp, #8] + 9821 0022 0131 adds r1, r1, #1 + 9822 0024 CA1A subs r2, r1, r3 + 9823 0026 1092 str r2, [sp, #64] + 9824 0028 03F10041 add r1, r3, #-2147483648 + 9825 002c 049A ldr r2, [sp, #16] + 9826 002e 0139 subs r1, r1, #1 + 9827 0030 013B subs r3, r3, #1 + 9828 0032 02EB4101 add r1, r2, r1, lsl #1 + ARM GAS /tmp/ccdao7B1.s page 172 + + + 9829 0036 1193 str r3, [sp, #68] + 9830 0038 00F06082 beq .L1617 + 9831 003c DDF828E0 ldr lr, [sp, #40] + 9832 0040 DDF81CC0 ldr ip, [sp, #28] + 9833 0044 CDE900AB strd r10, [sp] + 9834 0048 0023 movs r3, #0 + 9835 004a DDF80CB0 ldr fp, [sp, #12] + 9836 004e 8E1E subs r6, r1, #2 + 9837 0050 7446 mov r4, lr + 9838 0052 0125 movs r5, #1 + 9839 0054 1A46 mov r2, r3 + 9840 .L1618: + 9841 0056 15F00300 ands r0, r5, #3 + 9842 005a 15D0 beq .L1621 + 9843 005c B4F90070 ldrsh r7, [r4] + 9844 0060 B1F90090 ldrsh r9, [r1] + 9845 .syntax unified + 9846 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9847 0064 C7FBC932 smlald r3, r2, r7, r9 + 9848 @ 0 "" 2 + 9849 .thumb + 9850 .syntax unified + 9851 0068 0138 subs r0, r0, #1 + 9852 006a 0DD0 beq .L1621 + 9853 006c B4F90270 ldrsh r7, [r4, #2] + 9854 0070 B1F90290 ldrsh r9, [r1, #2] + 9855 .syntax unified + 9856 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9857 0074 C7FBC932 smlald r3, r2, r7, r9 + 9858 @ 0 "" 2 + 9859 .thumb + 9860 .syntax unified + 9861 0078 0128 cmp r0, #1 + 9862 007a 05D0 beq .L1621 + 9863 007c B4F90400 ldrsh r0, [r4, #4] + 9864 0080 B1F90410 ldrsh r1, [r1, #4] + 9865 .syntax unified + 9866 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9867 0084 C0FBC132 smlald r3, r2, r0, r1 + 9868 @ 0 "" 2 + 9869 .thumb + 9870 .syntax unified + 9871 .L1621: + 9872 0088 DB0B lsrs r3, r3, #15 + 9873 008a 43EA4243 orr r3, r3, r2, lsl #17 + 9874 .syntax unified + 9875 @ 422 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 9876 008e 03F30F03 ssat r3, #16, r3 + 9877 @ 0 "" 2 + 9878 .thumb + 9879 .syntax unified + 9880 0092 ACF80030 strh r3, [ip] @ movhi + 9881 0096 029B ldr r3, [sp, #8] + 9882 0098 0135 adds r5, r5, #1 + 9883 009a AB42 cmp r3, r5 + 9884 009c 3146 mov r1, r6 + 9885 009e DC44 add ip, ip, fp + ARM GAS /tmp/ccdao7B1.s page 173 + + + 9886 00a0 1DD0 beq .L1702 + 9887 00a2 AF08 lsrs r7, r5, #2 + 9888 00a4 00F03B82 beq .L1651 + 9889 00a8 0023 movs r3, #0 + 9890 00aa 3046 mov r0, r6 + 9891 00ac 7146 mov r1, lr + 9892 00ae 3C46 mov r4, r7 + 9893 00b0 1A46 mov r2, r3 + 9894 .L1620: + 9895 00b2 D1F80080 ldr r8, [r1] @ unaligned + 9896 00b6 D0F80090 ldr r9, [r0] @ unaligned + 9897 .syntax unified + 9898 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9899 00ba C8FBC932 smlald r3, r2, r8, r9 + 9900 @ 0 "" 2 + 9901 .thumb + 9902 .syntax unified + 9903 00be D1F80480 ldr r8, [r1, #4] @ unaligned + 9904 00c2 D0F80490 ldr r9, [r0, #4] @ unaligned + 9905 00c6 0831 adds r1, r1, #8 + 9906 00c8 0830 adds r0, r0, #8 + 9907 .syntax unified + 9908 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9909 00ca C8FBC932 smlald r3, r2, r8, r9 + 9910 @ 0 "" 2 + 9911 .thumb + 9912 .syntax unified + 9913 00ce 013C subs r4, r4, #1 + 9914 00d0 EFD1 bne .L1620 + 9915 00d2 0EEBC704 add r4, lr, r7, lsl #3 + 9916 00d6 06EBC701 add r1, r6, r7, lsl #3 + 9917 .L1619: + 9918 00da 023E subs r6, r6, #2 + 9919 00dc BBE7 b .L1618 + 9920 .L1702: + 9921 00de 079B ldr r3, [sp, #28] + 9922 00e0 119A ldr r2, [sp, #68] + 9923 00e2 0399 ldr r1, [sp, #12] + 9924 00e4 01FB0233 mla r3, r1, r2, r3 + 9925 00e8 0793 str r3, [sp, #28] + 9926 00ea 029B ldr r3, [sp, #8] + 9927 00ec 032B cmp r3, #3 + 9928 00ee 40F27781 bls .L1703 + 9929 00f2 109B ldr r3, [sp, #64] + 9930 00f4 9908 lsrs r1, r3, #2 + 9931 00f6 1391 str r1, [sp, #76] + 9932 00f8 00F00582 beq .L1652 + 9933 00fc 0298 ldr r0, [sp, #8] + 9934 00fe 0591 str r1, [sp, #20] + 9935 0100 8208 lsrs r2, r0, #2 + 9936 0102 D300 lsls r3, r2, #3 + 9937 0104 0433 adds r3, r3, #4 + 9938 0106 0D92 str r2, [sp, #52] + 9939 0108 0B93 str r3, [sp, #44] + 9940 010a 531E subs r3, r2, #1 + 9941 010c 049A ldr r2, [sp, #16] + 9942 010e 02EBC303 add r3, r2, r3, lsl #3 + ARM GAS /tmp/ccdao7B1.s page 174 + + + 9943 0112 0F93 str r3, [sp, #60] + 9944 0114 00F00303 and r3, r0, #3 + 9945 0118 0993 str r3, [sp, #36] + 9946 011a 039B ldr r3, [sp, #12] + 9947 011c 9A00 lsls r2, r3, #2 + 9948 011e 0C92 str r2, [sp, #48] + 9949 0120 079A ldr r2, [sp, #28] + 9950 0122 1A44 add r2, r2, r3 + 9951 0124 0692 str r2, [sp, #24] + 9952 0126 5B42 rsbs r3, r3, #0 + 9953 0128 0A9A ldr r2, [sp, #40] + 9954 012a 0092 str r2, [sp] + 9955 012c 0E93 str r3, [sp, #56] + 9956 .L1633: + 9957 012e 009A ldr r2, [sp] + 9958 0130 DDF81090 ldr r9, [sp, #16] + 9959 0134 DDF834A0 ldr r10, [sp, #52] + 9960 0138 1468 ldr r4, [r2] @ unaligned + 9961 013a D2F80280 ldr r8, [r2, #2] @ unaligned + 9962 013e 0023 movs r3, #0 + 9963 0140 02F1040C add ip, r2, #4 + 9964 0144 9B46 mov fp, r3 + 9965 0146 1846 mov r0, r3 + 9966 0148 1946 mov r1, r3 + 9967 014a 1D46 mov r5, r3 + 9968 014c 9E46 mov lr, r3 + 9969 014e 1A46 mov r2, r3 + 9970 0150 1E46 mov r6, r3 + 9971 .L1628: + 9972 0152 D9F80070 ldr r7, [r9] @ unaligned + 9973 .syntax unified + 9974 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9975 0156 C4FBC726 smlald r2, r6, r4, r7 + 9976 @ 0 "" 2 + 9977 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9978 015a C8FBC75E smlald r5, lr, r8, r7 + 9979 @ 0 "" 2 + 9980 .thumb + 9981 .syntax unified + 9982 015e DCF80080 ldr r8, [ip] @ unaligned + 9983 0162 DCF80240 ldr r4, [ip, #2] @ unaligned + 9984 .syntax unified + 9985 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9986 0166 C8FBC701 smlald r0, r1, r8, r7 + 9987 @ 0 "" 2 + 9988 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9989 016a C4FBC73B smlald r3, fp, r4, r7 + 9990 @ 0 "" 2 + 9991 .thumb + 9992 .syntax unified + 9993 016e D9F80470 ldr r7, [r9, #4] @ unaligned + 9994 0172 09F10809 add r9, r9, #8 + 9995 .syntax unified + 9996 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 9997 0176 C8FBC726 smlald r2, r6, r8, r7 + 9998 @ 0 "" 2 + 9999 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccdao7B1.s page 175 + + + 10000 017a C4FBC75E smlald r5, lr, r4, r7 + 10001 @ 0 "" 2 + 10002 .thumb + 10003 .syntax unified + 10004 017e DCF80440 ldr r4, [ip, #4] @ unaligned + 10005 0182 DCF80680 ldr r8, [ip, #6] @ unaligned + 10006 0186 0CF1080C add ip, ip, #8 + 10007 .syntax unified + 10008 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10009 018a C4FBC701 smlald r0, r1, r4, r7 + 10010 @ 0 "" 2 + 10011 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10012 018e C8FBC73B smlald r3, fp, r8, r7 + 10013 @ 0 "" 2 + 10014 .thumb + 10015 .syntax unified + 10016 0192 BAF1010A subs r10, r10, #1 + 10017 0196 DCD1 bne .L1628 + 10018 0198 009F ldr r7, [sp] + 10019 019a 0894 str r4, [sp, #32] + 10020 019c 0B9C ldr r4, [sp, #44] + 10021 019e 2744 add r7, r7, r4 + 10022 01a0 099C ldr r4, [sp, #36] + 10023 01a2 012C cmp r4, #1 + 10024 01a4 00F08181 beq .L1704 + 10025 01a8 022C cmp r4, #2 + 10026 01aa 00F06B81 beq .L1631 + 10027 01ae 032C cmp r4, #3 + 10028 01b0 21D1 bne .L1630 + 10029 01b2 0F9C ldr r4, [sp, #60] + 10030 01b4 D7F802A0 ldr r10, [r7, #2] @ unaligned + 10031 01b8 D4F80890 ldr r9, [r4, #8] @ unaligned + 10032 01bc 9446 mov ip, r2 + 10033 01be 3A68 ldr r2, [r7] @ unaligned + 10034 01c0 1292 str r2, [sp, #72] + 10035 01c2 089A ldr r2, [sp, #32] + 10036 .syntax unified + 10037 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10038 01c4 C2FBC9C6 smlald ip, r6, r2, r9 + 10039 @ 0 "" 2 + 10040 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10041 01c8 C8FBC95E smlald r5, lr, r8, r9 + 10042 @ 0 "" 2 + 10043 .thumb + 10044 .syntax unified + 10045 01cc 129A ldr r2, [sp, #72] + 10046 .syntax unified + 10047 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10048 01ce C2FBC901 smlald r0, r1, r2, r9 + 10049 @ 0 "" 2 + 10050 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10051 01d2 CAFBC93B smlald r3, fp, r10, r9 + 10052 @ 0 "" 2 + 10053 .thumb + 10054 .syntax unified + 10055 01d6 B4F90C90 ldrsh r9, [r4, #12] + 10056 01da 7F68 ldr r7, [r7, #4] @ unaligned + ARM GAS /tmp/ccdao7B1.s page 176 + + + 10057 01dc 6246 mov r2, ip + 10058 01de 1FFA89F9 uxth r9, r9 + 10059 .syntax unified + 10060 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10061 01e2 C8FBD926 smlaldx r2, r6, r8, r9 + 10062 @ 0 "" 2 + 10063 .thumb + 10064 .syntax unified + 10065 01e6 7446 mov r4, lr + 10066 .syntax unified + 10067 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10068 01e8 CAFBC954 smlald r5, r4, r10, r9 + 10069 @ 0 "" 2 + 10070 .thumb + 10071 .syntax unified + 10072 01ec A646 mov lr, r4 + 10073 .syntax unified + 10074 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10075 01ee CAFBD901 smlaldx r0, r1, r10, r9 + 10076 @ 0 "" 2 + 10077 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10078 01f2 C7FBD93B smlaldx r3, fp, r7, r9 + 10079 @ 0 "" 2 + 10080 .thumb + 10081 .syntax unified + 10082 .L1630: + 10083 01f6 C00B lsrs r0, r0, #15 + 10084 01f8 40EA4140 orr r0, r0, r1, lsl #17 + 10085 01fc 0E9C ldr r4, [sp, #56] + 10086 01fe 0699 ldr r1, [sp, #24] + 10087 .syntax unified + 10088 @ 625 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10089 0200 00F30F00 ssat r0, #16, r0 + 10090 @ 0 "" 2 + 10091 .thumb + 10092 .syntax unified + 10093 0204 D20B lsrs r2, r2, #15 + 10094 0206 ED0B lsrs r5, r5, #15 + 10095 0208 42EA4642 orr r2, r2, r6, lsl #17 + 10096 020c 45EA4E45 orr r5, r5, lr, lsl #17 + 10097 .syntax unified + 10098 @ 618 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10099 0210 02F30F02 ssat r2, #16, r2 + 10100 @ 0 "" 2 + 10101 @ 622 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10102 0214 05F30F05 ssat r5, #16, r5 + 10103 @ 0 "" 2 + 10104 .thumb + 10105 .syntax unified + 10106 0218 0A53 strh r2, [r1, r4] @ movhi + 10107 021a 0A46 mov r2, r1 + 10108 021c 0D80 strh r5, [r1] @ movhi + 10109 021e 0399 ldr r1, [sp, #12] + 10110 0220 DB0B lsrs r3, r3, #15 + 10111 0222 5052 strh r0, [r2, r1] @ movhi + 10112 0224 43EA4B43 orr r3, r3, fp, lsl #17 + 10113 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 177 + + + 10114 @ 628 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10115 0228 03F30F03 ssat r3, #16, r3 + 10116 @ 0 "" 2 + 10117 .thumb + 10118 .syntax unified + 10119 022c 22F81130 strh r3, [r2, r1, lsl #1] @ movhi + 10120 0230 009B ldr r3, [sp] + 10121 0232 0833 adds r3, r3, #8 + 10122 0234 0093 str r3, [sp] + 10123 0236 0C9B ldr r3, [sp, #48] + 10124 0238 D318 adds r3, r2, r3 + 10125 023a 0693 str r3, [sp, #24] + 10126 023c 059B ldr r3, [sp, #20] + 10127 023e 013B subs r3, r3, #1 + 10128 0240 0593 str r3, [sp, #20] + 10129 0242 7FF474AF bne .L1633 + 10130 0246 139B ldr r3, [sp, #76] + 10131 0248 079A ldr r2, [sp, #28] + 10132 024a 0C99 ldr r1, [sp, #48] + 10133 024c 01FB0322 mla r2, r1, r3, r2 + 10134 0250 0A99 ldr r1, [sp, #40] + 10135 0252 0792 str r2, [sp, #28] + 10136 0254 1A46 mov r2, r3 + 10137 0256 01EBC200 add r0, r1, r2, lsl #3 + 10138 025a 9B00 lsls r3, r3, #2 + 10139 .L1627: + 10140 025c 109A ldr r2, [sp, #64] + 10141 025e 12F00302 ands r2, r2, #3 + 10142 0262 0592 str r2, [sp, #20] + 10143 0264 6ED0 beq .L1634 + 10144 0266 5E1C adds r6, r3, #1 + 10145 0268 1344 add r3, r3, r2 + 10146 026a 0A9A ldr r2, [sp, #40] + 10147 026c 0299 ldr r1, [sp, #8] + 10148 026e DDF81C80 ldr r8, [sp, #28] + 10149 0272 02EB4606 add r6, r2, r6, lsl #1 + 10150 0276 0232 adds r2, r2, #2 + 10151 0278 02EB4303 add r3, r2, r3, lsl #1 + 10152 027c 0293 str r3, [sp, #8] + 10153 027e 049B ldr r3, [sp, #16] + 10154 0280 4FEA910B lsr fp, r1, #2 + 10155 0284 03F10807 add r7, r3, #8 + 10156 0288 01F00309 and r9, r1, #3 + 10157 028c 4FEACB0A lsl r10, fp, #3 + 10158 0290 03EBCB0E add lr, r3, fp, lsl #3 + 10159 0294 DC46 mov ip, fp + 10160 0296 BB46 mov fp, r7 + 10161 0298 4F46 mov r7, r9 + 10162 .L1638: + 10163 029a B946 mov r9, r7 + 10164 029c 00F10802 add r2, r0, #8 + 10165 02a0 5B46 mov r3, fp + 10166 02a2 6146 mov r1, ip + 10167 02a4 0024 movs r4, #0 + 10168 02a6 0025 movs r5, #0 + 10169 02a8 6746 mov r7, ip + 10170 02aa 0090 str r0, [sp] + ARM GAS /tmp/ccdao7B1.s page 178 + + + 10171 .L1635: + 10172 02ac 32F808CC ldrh ip, [r2, #-8] + 10173 02b0 33F8080C ldrh r0, [r3, #-8] + 10174 02b4 CCFB8045 smlalbb r4, r5, ip, r0 + 10175 02b8 32F806CC ldrh ip, [r2, #-6] + 10176 02bc 33F8060C ldrh r0, [r3, #-6] + 10177 02c0 CCFB8045 smlalbb r4, r5, ip, r0 + 10178 02c4 32F804CC ldrh ip, [r2, #-4] + 10179 02c8 33F8040C ldrh r0, [r3, #-4] + 10180 02cc CCFB8045 smlalbb r4, r5, ip, r0 + 10181 02d0 32F802CC ldrh ip, [r2, #-2] + 10182 02d4 33F8020C ldrh r0, [r3, #-2] + 10183 02d8 0139 subs r1, r1, #1 + 10184 02da 02F10802 add r2, r2, #8 + 10185 02de CCFB8045 smlalbb r4, r5, ip, r0 + 10186 02e2 03F10803 add r3, r3, #8 + 10187 02e6 E1D1 bne .L1635 + 10188 02e8 0098 ldr r0, [sp] + 10189 02ea BC46 mov ip, r7 + 10190 02ec 4F46 mov r7, r9 + 10191 02ee 00EB0A03 add r3, r0, r10 + 10192 02f2 9FB1 cbz r7, .L1636 + 10193 02f4 30F80A10 ldrh r1, [r0, r10] + 10194 02f8 BEF80020 ldrh r2, [lr] + 10195 02fc 012F cmp r7, #1 + 10196 02fe C1FB8245 smlalbb r4, r5, r1, r2 + 10197 0302 0BD0 beq .L1636 + 10198 0304 5988 ldrh r1, [r3, #2] + 10199 0306 BEF80220 ldrh r2, [lr, #2] + 10200 030a 022F cmp r7, #2 + 10201 030c C1FB8245 smlalbb r4, r5, r1, r2 + 10202 0310 04D0 beq .L1636 + 10203 0312 9A88 ldrh r2, [r3, #4] + 10204 0314 BEF80430 ldrh r3, [lr, #4] + 10205 0318 C2FB8345 smlalbb r4, r5, r2, r3 + 10206 .L1636: + 10207 031c E30B lsrs r3, r4, #15 + 10208 031e 43EA4543 orr r3, r3, r5, lsl #17 + 10209 .syntax unified + 10210 @ 682 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10211 0322 03F30F03 ssat r3, #16, r3 + 10212 @ 0 "" 2 + 10213 .thumb + 10214 .syntax unified + 10215 0326 A8F80030 strh r3, [r8] @ movhi + 10216 032a 039B ldr r3, [sp, #12] + 10217 032c 9844 add r8, r8, r3 + 10218 032e 029B ldr r3, [sp, #8] + 10219 0330 3046 mov r0, r6 + 10220 0332 0236 adds r6, r6, #2 + 10221 0334 9E42 cmp r6, r3 + 10222 0336 B0D1 bne .L1638 + 10223 0338 079B ldr r3, [sp, #28] + 10224 033a 059A ldr r2, [sp, #20] + 10225 033c 0399 ldr r1, [sp, #12] + 10226 033e 01FB0233 mla r3, r1, r2, r3 + 10227 0342 0793 str r3, [sp, #28] + ARM GAS /tmp/ccdao7B1.s page 179 + + + 10228 .L1634: + 10229 0344 0A9B ldr r3, [sp, #40] + 10230 0346 109A ldr r2, [sp, #64] + 10231 0348 DDF81CE0 ldr lr, [sp, #28] + 10232 034c 119E ldr r6, [sp, #68] + 10233 034e DDF80C90 ldr r9, [sp, #12] + 10234 0352 DDF81080 ldr r8, [sp, #16] + 10235 0356 03EB4203 add r3, r3, r2, lsl #1 + 10236 035a 9C46 mov ip, r3 + 10237 .L1649: + 10238 035c B708 lsrs r7, r6, #2 + 10239 035e 00F08C80 beq .L1653 + 10240 .L1707: + 10241 0362 0022 movs r2, #0 + 10242 0364 4046 mov r0, r8 + 10243 0366 6146 mov r1, ip + 10244 0368 3C46 mov r4, r7 + 10245 036a 1346 mov r3, r2 + 10246 .L1646: + 10247 036c 0D68 ldr r5, [r1] @ unaligned + 10248 036e D0F800A0 ldr r10, [r0] @ unaligned + 10249 .syntax unified + 10250 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10251 0372 C5FBCA23 smlald r2, r3, r5, r10 + 10252 @ 0 "" 2 + 10253 .thumb + 10254 .syntax unified + 10255 0376 4D68 ldr r5, [r1, #4] @ unaligned + 10256 0378 D0F804A0 ldr r10, [r0, #4] @ unaligned + 10257 037c 0831 adds r1, r1, #8 + 10258 037e 0830 adds r0, r0, #8 + 10259 .syntax unified + 10260 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10261 0380 C5FBCA23 smlald r2, r3, r5, r10 + 10262 @ 0 "" 2 + 10263 .thumb + 10264 .syntax unified + 10265 0384 013C subs r4, r4, #1 + 10266 0386 F1D1 bne .L1646 + 10267 0388 0CEBC700 add r0, ip, r7, lsl #3 + 10268 038c 08EBC707 add r7, r8, r7, lsl #3 + 10269 .L1645: + 10270 0390 16F00301 ands r1, r6, #3 + 10271 0394 15D0 beq .L1647 + 10272 0396 B0F90040 ldrsh r4, [r0] + 10273 039a B7F90050 ldrsh r5, [r7] + 10274 .syntax unified + 10275 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10276 039e C4FBC523 smlald r2, r3, r4, r5 + 10277 @ 0 "" 2 + 10278 .thumb + 10279 .syntax unified + 10280 03a2 0139 subs r1, r1, #1 + 10281 03a4 0DD0 beq .L1647 + 10282 03a6 B0F90240 ldrsh r4, [r0, #2] + 10283 03aa B7F90250 ldrsh r5, [r7, #2] + 10284 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 180 + + + 10285 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10286 03ae C4FBC523 smlald r2, r3, r4, r5 + 10287 @ 0 "" 2 + 10288 .thumb + 10289 .syntax unified + 10290 03b2 0129 cmp r1, #1 + 10291 03b4 05D0 beq .L1647 + 10292 03b6 B0F90410 ldrsh r1, [r0, #4] + 10293 03ba B7F90400 ldrsh r0, [r7, #4] + 10294 .syntax unified + 10295 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10296 03be C1FBC023 smlald r2, r3, r1, r0 + 10297 @ 0 "" 2 + 10298 .thumb + 10299 .syntax unified + 10300 .L1647: + 10301 03c2 D20B lsrs r2, r2, #15 + 10302 03c4 013E subs r6, r6, #1 + 10303 03c6 42EA4342 orr r2, r2, r3, lsl #17 + 10304 03ca 0CF1020C add ip, ip, #2 + 10305 .syntax unified + 10306 @ 800 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10307 03ce 02F30F02 ssat r2, #16, r2 + 10308 @ 0 "" 2 + 10309 .thumb + 10310 .syntax unified + 10311 03d2 AEF80020 strh r2, [lr] @ movhi + 10312 03d6 CE44 add lr, lr, r9 + 10313 03d8 C0D1 bne .L1649 + 10314 .L1614: + 10315 03da 15B0 add sp, sp, #84 + 10316 @ sp needed + 10317 03dc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 10318 .L1703: + 10319 03e0 109B ldr r3, [sp, #64] + 10320 03e2 002B cmp r3, #0 + 10321 03e4 00F09280 beq .L1705 + 10322 .L1650: + 10323 03e8 109B ldr r3, [sp, #64] + 10324 03ea 0A9A ldr r2, [sp, #40] + 10325 03ec 0799 ldr r1, [sp, #28] + 10326 03ee 029D ldr r5, [sp, #8] + 10327 03f0 5C00 lsls r4, r3, #1 + 10328 03f2 DDE90376 ldrd r7, r6, [sp, #12] + 10329 03f6 A446 mov ip, r4 + 10330 03f8 119C ldr r4, [sp, #68] + 10331 03fa 02EB4300 add r0, r2, r3, lsl #1 + 10332 .L1626: + 10333 03fe 002D cmp r5, #0 + 10334 0400 67D0 beq .L1706 + 10335 0402 B2F900E0 ldrsh lr, [r2] + 10336 0406 B6F90030 ldrsh r3, [r6] + 10337 040a 8EFB03AB smull r10, fp, lr, r3 + 10338 040e 94B1 cbz r4, .L1640 + 10339 0410 B2F90230 ldrsh r3, [r2, #2] + 10340 0414 B6F902E0 ldrsh lr, [r6, #2] + 10341 0418 83FB0E3E smull r3, lr, r3, lr + ARM GAS /tmp/ccdao7B1.s page 181 + + + 10342 041c 13EB0A03 adds r3, r3, r10 + 10343 0420 4EEB0B0E adc lr, lr, fp + 10344 0424 022D cmp r5, #2 + 10345 0426 9A46 mov r10, r3 + 10346 0428 F346 mov fp, lr + 10347 042a 04D0 beq .L1640 + 10348 042c B2F804E0 ldrh lr, [r2, #4] + 10349 0430 B388 ldrh r3, [r6, #4] + 10350 0432 CEFB83AB smlalbb r10, fp, lr, r3 + 10351 .L1640: + 10352 0436 4FEADA33 lsr r3, r10, #15 + 10353 043a 43EA4B43 orr r3, r3, fp, lsl #17 + 10354 .L1644: + 10355 043e 0232 adds r2, r2, #2 + 10356 0440 8242 cmp r2, r0 + 10357 .syntax unified + 10358 @ 721 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c" 1 + 10359 0442 03F30F03 ssat r3, #16, r3 + 10360 @ 0 "" 2 + 10361 .thumb + 10362 .syntax unified + 10363 0446 0B80 strh r3, [r1] @ movhi + 10364 0448 3944 add r1, r1, r7 + 10365 044a D8D1 bne .L1626 + 10366 044c 079B ldr r3, [sp, #28] + 10367 044e 109A ldr r2, [sp, #64] + 10368 0450 0399 ldr r1, [sp, #12] + 10369 0452 01FB0233 mla r3, r1, r2, r3 + 10370 0456 0793 str r3, [sp, #28] + 10371 0458 0A9B ldr r3, [sp, #40] + 10372 045a 6344 add r3, r3, ip + 10373 045c 0A93 str r3, [sp, #40] + 10374 045e 119B ldr r3, [sp, #68] + 10375 0460 002B cmp r3, #0 + 10376 0462 BAD0 beq .L1614 + 10377 0464 1E46 mov r6, r3 + 10378 0466 B708 lsrs r7, r6, #2 + 10379 0468 DDF81CE0 ldr lr, [sp, #28] + 10380 046c DDF828C0 ldr ip, [sp, #40] + 10381 0470 DDF81080 ldr r8, [sp, #16] + 10382 0474 8946 mov r9, r1 + 10383 0476 7FF474AF bne .L1707 + 10384 .L1653: + 10385 047a 3A46 mov r2, r7 + 10386 047c 6046 mov r0, ip + 10387 047e 4746 mov r7, r8 + 10388 0480 1346 mov r3, r2 + 10389 0482 85E7 b .L1645 + 10390 .L1631: + 10391 0484 0F9C ldr r4, [sp, #60] + 10392 0486 D7F800C0 ldr ip, [r7] @ unaligned + 10393 048a D4F80890 ldr r9, [r4, #8] @ unaligned + 10394 048e D7F80270 ldr r7, [r7, #2] @ unaligned + 10395 0492 089C ldr r4, [sp, #32] + 10396 .syntax unified + 10397 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10398 0494 C4FBC926 smlald r2, r6, r4, r9 + ARM GAS /tmp/ccdao7B1.s page 182 + + + 10399 @ 0 "" 2 + 10400 .thumb + 10401 .syntax unified + 10402 0498 7446 mov r4, lr + 10403 .syntax unified + 10404 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10405 049a C8FBC954 smlald r5, r4, r8, r9 + 10406 @ 0 "" 2 + 10407 .thumb + 10408 .syntax unified + 10409 049e A646 mov lr, r4 + 10410 .syntax unified + 10411 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10412 04a0 CCFBC901 smlald r0, r1, ip, r9 + 10413 @ 0 "" 2 + 10414 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10415 04a4 C7FBC93B smlald r3, fp, r7, r9 + 10416 @ 0 "" 2 + 10417 .thumb + 10418 .syntax unified + 10419 04a8 A5E6 b .L1630 + 10420 .L1704: + 10421 04aa 0F9C ldr r4, [sp, #60] + 10422 04ac 0B9F ldr r7, [sp, #44] + 10423 04ae B4F908C0 ldrsh ip, [r4, #8] + 10424 04b2 009C ldr r4, [sp] + 10425 04b4 1FFA8CFC uxth ip, ip + 10426 04b8 E759 ldr r7, [r4, r7] @ unaligned + 10427 04ba 089C ldr r4, [sp, #32] + 10428 .syntax unified + 10429 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10430 04bc C4FBCC26 smlald r2, r6, r4, ip + 10431 @ 0 "" 2 + 10432 .thumb + 10433 .syntax unified + 10434 04c0 7446 mov r4, lr + 10435 .syntax unified + 10436 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10437 04c2 C8FBCC54 smlald r5, r4, r8, ip + 10438 @ 0 "" 2 + 10439 .thumb + 10440 .syntax unified + 10441 04c6 A646 mov lr, r4 + 10442 .syntax unified + 10443 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10444 04c8 C8FBDC01 smlaldx r0, r1, r8, ip + 10445 @ 0 "" 2 + 10446 @ 2031 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 10447 04cc C7FBDC3B smlaldx r3, fp, r7, ip + 10448 @ 0 "" 2 + 10449 .thumb + 10450 .syntax unified + 10451 04d0 91E6 b .L1630 + 10452 .L1706: + 10453 04d2 2B46 mov r3, r5 + 10454 04d4 B3E7 b .L1644 + 10455 .L1615: + ARM GAS /tmp/ccdao7B1.s page 183 + + + 10456 04d6 1C46 mov r4, r3 + 10457 04d8 03F10043 add r3, r3, #-2147483648 + 10458 04dc 023B subs r3, r3, #2 + 10459 04de 0B44 add r3, r3, r1 + 10460 04e0 0A46 mov r2, r1 + 10461 04e2 0499 ldr r1, [sp, #16] + 10462 04e4 0A91 str r1, [sp, #40] + 10463 04e6 2146 mov r1, r4 + 10464 04e8 1E9C ldr r4, [sp, #120] + 10465 04ea 0490 str r0, [sp, #16] + 10466 04ec 04EB4303 add r3, r4, r3, lsl #1 + 10467 04f0 0793 str r3, [sp, #28] + 10468 04f2 6FF00103 mvn r3, #1 + 10469 04f6 0292 str r2, [sp, #8] + 10470 04f8 0393 str r3, [sp, #12] + 10471 04fa 91E5 b .L1616 + 10472 .L1617: + 10473 04fc 109B ldr r3, [sp, #64] + 10474 04fe 002B cmp r3, #0 + 10475 0500 7FF472AF bne .L1650 + 10476 0504 69E7 b .L1614 + 10477 .L1652: + 10478 0506 0A98 ldr r0, [sp, #40] + 10479 0508 0B46 mov r3, r1 + 10480 050a A7E6 b .L1627 + 10481 .L1705: + 10482 050c DDF81CE0 ldr lr, [sp, #28] + 10483 0510 DDF828C0 ldr ip, [sp, #40] + 10484 0514 DDF81080 ldr r8, [sp, #16] + 10485 0518 1646 mov r6, r2 + 10486 051a 8946 mov r9, r1 + 10487 051c 1EE7 b .L1649 + 10488 .L1651: + 10489 051e 3B46 mov r3, r7 + 10490 0520 7446 mov r4, lr + 10491 0522 3A46 mov r2, r7 + 10492 0524 D9E5 b .L1619 + 10494 0526 00BF .section .text.arm_correlate_q31,"ax",%progbits + 10495 .align 1 + 10496 .p2align 2,,3 + 10497 .global arm_correlate_q31 + 10498 .syntax unified + 10499 .thumb + 10500 .thumb_func + 10501 .fpu fpv4-sp-d16 + 10503 arm_correlate_q31: + 10504 @ args = 4, pretend = 0, frame = 24 + 10505 @ frame_needed = 0, uses_anonymous_args = 0 + 10506 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 10507 0004 87B0 sub sp, sp, #28 + 10508 0006 9942 cmp r1, r3 + 10509 0008 0193 str r3, [sp, #4] + 10510 000a C0F0C280 bcc .L1709 + 10511 000e A1EB0308 sub r8, r1, r3 + 10512 0012 109B ldr r3, [sp, #64] + 10513 0014 03EB8808 add r8, r3, r8, lsl #2 + 10514 0018 0423 movs r3, #4 + ARM GAS /tmp/ccdao7B1.s page 184 + + + 10515 001a 0093 str r3, [sp] + 10516 .L1710: + 10517 001c 019B ldr r3, [sp, #4] + 10518 001e 0131 adds r1, r1, #1 + 10519 0020 C91A subs r1, r1, r3 + 10520 0022 03F18049 add r9, r3, #1073741824 + 10521 0026 0291 str r1, [sp, #8] + 10522 0028 1946 mov r1, r3 + 10523 002a 09F1FF39 add r9, r9, #-1 + 10524 002e 4F1E subs r7, r1, #1 + 10525 0030 4FEA8903 lsl r3, r9, #2 + 10526 0034 02EB8909 add r9, r2, r9, lsl #2 + 10527 0038 00F0A580 beq .L1711 + 10528 003c 0433 adds r3, r3, #4 + 10529 003e CDE90387 strd r8, r7, [sp, #12] + 10530 0042 C318 adds r3, r0, r3 + 10531 0044 00F1040B add fp, r0, #4 + 10532 0048 C246 mov r10, r8 + 10533 004a DDF80080 ldr r8, [sp] + 10534 004e 5E46 mov r6, fp + 10535 0050 9E46 mov lr, r3 + 10536 .L1713: + 10537 0052 0023 movs r3, #0 + 10538 0054 CC46 mov ip, r9 + 10539 0056 0146 mov r1, r0 + 10540 0058 1F46 mov r7, r3 + 10541 .L1712: + 10542 005a 51F8045B ldr r5, [r1], #4 + 10543 005e 5CF8044B ldr r4, [ip], #4 + 10544 0062 B142 cmp r1, r6 + 10545 0064 C5FB0437 smlal r3, r7, r5, r4 + 10546 0068 F7D1 bne .L1712 + 10547 006a DB0F lsrs r3, r3, #31 + 10548 006c 0E1D adds r6, r1, #4 + 10549 006e 43EA4703 orr r3, r3, r7, lsl #1 + 10550 0072 B645 cmp lr, r6 + 10551 0074 CAF80030 str r3, [r10] + 10552 0078 A9F10409 sub r9, r9, #4 + 10553 007c C244 add r10, r10, r8 + 10554 007e E8D1 bne .L1713 + 10555 0080 DDE90387 ldrd r8, r7, [sp, #12] + 10556 0084 009B ldr r3, [sp] + 10557 0086 03FB0788 mla r8, r3, r7, r8 + 10558 008a 019B ldr r3, [sp, #4] + 10559 008c 032B cmp r3, #3 + 10560 008e 47D9 bls .L1749 + 10561 0090 029B ldr r3, [sp, #8] + 10562 0092 002B cmp r3, #0 + 10563 0094 00F08F80 beq .L1750 + 10564 0098 CDE90487 strd r8, r7, [sp, #16] + 10565 009c C246 mov r10, r8 + 10566 009e DDE900E8 ldrd lr, r8, [sp] + 10567 00a2 9900 lsls r1, r3, #2 + 10568 00a4 0391 str r1, [sp, #12] + 10569 00a6 00EB830B add fp, r0, r3, lsl #2 + 10570 00aa 8146 mov r9, r0 + 10571 .L1719: + ARM GAS /tmp/ccdao7B1.s page 185 + + + 10572 00ac 0023 movs r3, #0 + 10573 00ae 4146 mov r1, r8 + 10574 00b0 9446 mov ip, r2 + 10575 00b2 4F46 mov r7, r9 + 10576 00b4 1E46 mov r6, r3 + 10577 .L1718: + 10578 00b6 57F8045B ldr r5, [r7], #4 + 10579 00ba 5CF8044B ldr r4, [ip], #4 + 10580 00be 0139 subs r1, r1, #1 + 10581 00c0 C5FB0436 smlal r3, r6, r5, r4 + 10582 00c4 F7D1 bne .L1718 + 10583 00c6 DB0F lsrs r3, r3, #31 + 10584 00c8 09F10409 add r9, r9, #4 + 10585 00cc 43EA4603 orr r3, r3, r6, lsl #1 + 10586 00d0 D945 cmp r9, fp + 10587 00d2 CAF80030 str r3, [r10] + 10588 00d6 F244 add r10, r10, lr + 10589 00d8 E8D1 bne .L1719 + 10590 00da DDE90487 ldrd r8, r7, [sp, #16] + 10591 00de 0099 ldr r1, [sp] + 10592 00e0 029B ldr r3, [sp, #8] + 10593 00e2 8E46 mov lr, r1 + 10594 00e4 01FB0388 mla r8, r1, r3, r8 + 10595 .L1717: + 10596 00e8 039B ldr r3, [sp, #12] + 10597 00ea 1844 add r0, r0, r3 + 10598 00ec 00F1040B add fp, r0, #4 + 10599 .L1727: + 10600 00f0 0023 movs r3, #0 + 10601 00f2 3946 mov r1, r7 + 10602 00f4 9446 mov ip, r2 + 10603 00f6 1E46 mov r6, r3 + 10604 .L1726: + 10605 00f8 50F8045B ldr r5, [r0], #4 + 10606 00fc 5CF8044B ldr r4, [ip], #4 + 10607 0100 0139 subs r1, r1, #1 + 10608 0102 C5FB0436 smlal r3, r6, r5, r4 + 10609 0106 F7D1 bne .L1726 + 10610 0108 DB0F lsrs r3, r3, #31 + 10611 010a 43EA4603 orr r3, r3, r6, lsl #1 + 10612 010e 013F subs r7, r7, #1 + 10613 0110 C8F80030 str r3, [r8] + 10614 0114 5846 mov r0, fp + 10615 0116 F044 add r8, r8, lr + 10616 0118 38D0 beq .L1708 + 10617 011a 0BF1040B add fp, fp, #4 + 10618 011e E7E7 b .L1727 + 10619 .L1749: + 10620 0120 029B ldr r3, [sp, #8] + 10621 0122 002B cmp r3, #0 + 10622 0124 4BD0 beq .L1751 + 10623 .L1728: + 10624 0126 029B ldr r3, [sp, #8] + 10625 0128 C446 mov ip, r8 + 10626 012a C246 mov r10, r8 + 10627 012c DDE90085 ldrd r8, r5, [sp] + 10628 0130 9900 lsls r1, r3, #2 + ARM GAS /tmp/ccdao7B1.s page 186 + + + 10629 0132 0391 str r1, [sp, #12] + 10630 0134 00EB830E add lr, r0, r3, lsl #2 + 10631 0138 0446 mov r4, r0 + 10632 .L1716: + 10633 013a 15B3 cbz r5, .L1752 + 10634 013c 2168 ldr r1, [r4] + 10635 013e 1368 ldr r3, [r2] + 10636 0140 83FB0139 smull r3, r9, r3, r1 + 10637 0144 4FB1 cbz r7, .L1721 + 10638 0146 6668 ldr r6, [r4, #4] + 10639 0148 5168 ldr r1, [r2, #4] + 10640 014a 022D cmp r5, #2 + 10641 014c C1FB0639 smlal r3, r9, r1, r6 + 10642 0150 03D0 beq .L1721 + 10643 0152 9668 ldr r6, [r2, #8] + 10644 0154 A168 ldr r1, [r4, #8] + 10645 0156 C1FB0639 smlal r3, r9, r1, r6 + 10646 .L1721: + 10647 015a DB0F lsrs r3, r3, #31 + 10648 015c 43EA4903 orr r3, r3, r9, lsl #1 + 10649 .L1725: + 10650 0160 0434 adds r4, r4, #4 + 10651 0162 7445 cmp r4, lr + 10652 0164 CCF80030 str r3, [ip] + 10653 0168 C444 add ip, ip, r8 + 10654 016a E6D1 bne .L1716 + 10655 016c 0299 ldr r1, [sp, #8] + 10656 016e 009B ldr r3, [sp] + 10657 0170 03FB01A8 mla r8, r3, r1, r10 + 10658 0174 0399 ldr r1, [sp, #12] + 10659 0176 0844 add r0, r0, r1 + 10660 0178 47B1 cbz r7, .L1708 + 10661 017a 00F1040B add fp, r0, #4 + 10662 017e 9E46 mov lr, r3 + 10663 0180 B6E7 b .L1727 + 10664 .L1752: + 10665 0182 2B46 mov r3, r5 + 10666 0184 ECE7 b .L1725 + 10667 .L1711: + 10668 0186 029B ldr r3, [sp, #8] + 10669 0188 002B cmp r3, #0 + 10670 018a CCD1 bne .L1728 + 10671 .L1708: + 10672 018c 07B0 add sp, sp, #28 + 10673 @ sp needed + 10674 018e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 10675 .L1709: + 10676 0192 1E46 mov r6, r3 + 10677 0194 03F18043 add r3, r3, #1073741824 + 10678 0198 0546 mov r5, r0 + 10679 019a 023B subs r3, r3, #2 + 10680 019c 1046 mov r0, r2 + 10681 019e 109A ldr r2, [sp, #64] + 10682 01a0 0B44 add r3, r3, r1 + 10683 01a2 0C46 mov r4, r1 + 10684 01a4 02EB8308 add r8, r2, r3, lsl #2 + 10685 01a8 6FF00303 mvn r3, #3 + ARM GAS /tmp/ccdao7B1.s page 187 + + + 10686 01ac 3146 mov r1, r6 + 10687 01ae 2A46 mov r2, r5 + 10688 01b0 0194 str r4, [sp, #4] + 10689 01b2 0093 str r3, [sp] + 10690 01b4 32E7 b .L1710 + 10691 .L1750: + 10692 01b6 DDF800E0 ldr lr, [sp] + 10693 01ba 0393 str r3, [sp, #12] + 10694 01bc 94E7 b .L1717 + 10695 .L1751: + 10696 01be DDF800E0 ldr lr, [sp] + 10697 01c2 95E7 b .L1727 + 10699 .section .text.arm_correlate_q7,"ax",%progbits + 10700 .align 1 + 10701 .p2align 2,,3 + 10702 .global arm_correlate_q7 + 10703 .syntax unified + 10704 .thumb + 10705 .thumb_func + 10706 .fpu fpv4-sp-d16 + 10708 arm_correlate_q7: + 10709 @ args = 4, pretend = 0, frame = 8 + 10710 @ frame_needed = 0, uses_anonymous_args = 0 + 10711 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 10712 0004 9942 cmp r1, r3 + 10713 0006 83B0 sub sp, sp, #12 + 10714 0008 C0F0A880 bcc .L1754 + 10715 000c 0C9C ldr r4, [sp, #48] + 10716 000e A1EB0308 sub r8, r1, r3 + 10717 0012 A044 add r8, r8, r4 + 10718 0014 4FF00109 mov r9, #1 + 10719 .L1755: + 10720 0018 0131 adds r1, r1, #1 + 10721 001a C91A subs r1, r1, r3 + 10722 001c 0191 str r1, [sp, #4] + 10723 001e 591E subs r1, r3, #1 + 10724 0020 0091 str r1, [sp] + 10725 0022 02EB010B add fp, r2, r1 + 10726 0026 0029 cmp r1, #0 + 10727 0028 00F0A680 beq .L1756 + 10728 002c 0BF1010B add fp, fp, #1 + 10729 0030 461C adds r6, r0, #1 + 10730 0032 C246 mov r10, r8 + 10731 0034 0127 movs r7, #1 + 10732 .L1757: + 10733 0036 ABEB0705 sub r5, fp, r7 + 10734 003a 002F cmp r7, #0 + 10735 003c 57D0 beq .L1797 + 10736 003e 0146 mov r1, r0 + 10737 0040 0024 movs r4, #0 + 10738 .L1758: + 10739 0042 11F901EB ldrsb lr, [r1], #1 + 10740 0046 15F901CB ldrsb ip, [r5], #1 + 10741 004a B142 cmp r1, r6 + 10742 004c 1EFB0C44 smlabb r4, lr, ip, r4 + 10743 0050 F7D1 bne .L1758 + 10744 0052 0137 adds r7, r7, #1 + ARM GAS /tmp/ccdao7B1.s page 188 + + + 10745 0054 BB42 cmp r3, r7 + 10746 0056 4FEAE414 asr r4, r4, #7 + 10747 005a 01F10106 add r6, r1, #1 + 10748 .syntax unified + 10749 @ 450 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 + 10750 005e 04F30704 ssat r4, #8, r4 + 10751 @ 0 "" 2 + 10752 .thumb + 10753 .syntax unified + 10754 0062 8AF80040 strb r4, [r10] + 10755 0066 CA44 add r10, r10, r9 + 10756 0068 E5D1 bne .L1757 + 10757 006a 0099 ldr r1, [sp] + 10758 006c 032B cmp r3, #3 + 10759 006e 09FB0188 mla r8, r9, r1, r8 + 10760 0072 44D9 bls .L1798 + 10761 0074 0199 ldr r1, [sp, #4] + 10762 0076 0646 mov r6, r0 + 10763 0078 D9B1 cbz r1, .L1764 + 10764 007a 0344 add r3, r3, r0 + 10765 007c 4618 adds r6, r0, r1 + 10766 007e 4746 mov r7, r8 + 10767 .L1766: + 10768 0080 1546 mov r5, r2 + 10769 0082 0146 mov r1, r0 + 10770 0084 0024 movs r4, #0 + 10771 .L1765: + 10772 0086 11F901EB ldrsb lr, [r1], #1 + 10773 008a 15F901CB ldrsb ip, [r5], #1 + 10774 008e 9942 cmp r1, r3 + 10775 0090 1EFB0C44 smlabb r4, lr, ip, r4 + 10776 0094 F7D1 bne .L1765 + 10777 0096 0130 adds r0, r0, #1 + 10778 0098 8642 cmp r6, r0 + 10779 009a 4FEAE414 asr r4, r4, #7 + 10780 009e 01F10103 add r3, r1, #1 + 10781 .syntax unified + 10782 @ 752 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 + 10783 00a2 04F30704 ssat r4, #8, r4 + 10784 @ 0 "" 2 + 10785 .thumb + 10786 .syntax unified + 10787 00a6 3C70 strb r4, [r7] + 10788 00a8 4F44 add r7, r7, r9 + 10789 00aa E9D1 bne .L1766 + 10790 00ac 019B ldr r3, [sp, #4] + 10791 00ae 09FB0388 mla r8, r9, r3, r8 + 10792 .L1764: + 10793 00b2 3046 mov r0, r6 + 10794 .L1769: + 10795 00b4 DDF800C0 ldr ip, [sp] + 10796 00b8 6044 add r0, r0, ip + 10797 .L1774: + 10798 00ba A0EB0C03 sub r3, r0, ip + 10799 00be 0746 mov r7, r0 + 10800 00c0 1446 mov r4, r2 + 10801 00c2 0021 movs r1, #0 + ARM GAS /tmp/ccdao7B1.s page 189 + + + 10802 .L1773: + 10803 00c4 13F9016B ldrsb r6, [r3], #1 + 10804 00c8 14F9015B ldrsb r5, [r4], #1 + 10805 00cc BB42 cmp r3, r7 + 10806 00ce 16FB0511 smlabb r1, r6, r5, r1 + 10807 00d2 F7D1 bne .L1773 + 10808 00d4 BCF1010C subs ip, ip, #1 + 10809 00d8 4FEAE111 asr r1, r1, #7 + 10810 .syntax unified + 10811 @ 898 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 + 10812 00dc 01F30701 ssat r1, #8, r1 + 10813 @ 0 "" 2 + 10814 .thumb + 10815 .syntax unified + 10816 00e0 88F80010 strb r1, [r8] + 10817 00e4 C844 add r8, r8, r9 + 10818 00e6 E8D1 bne .L1774 + 10819 .L1753: + 10820 00e8 03B0 add sp, sp, #12 + 10821 @ sp needed + 10822 00ea BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 10823 .L1797: + 10824 .syntax unified + 10825 @ 450 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 + 10826 00ee 07F30707 ssat r7, #8, r7 + 10827 @ 0 "" 2 + 10828 .thumb + 10829 .syntax unified + 10830 00f2 0136 adds r6, r6, #1 + 10831 00f4 8AF80070 strb r7, [r10] + 10832 00f8 CA44 add r10, r10, r9 + 10833 00fa 0127 movs r7, #1 + 10834 00fc 9BE7 b .L1757 + 10835 .L1798: + 10836 00fe 0199 ldr r1, [sp, #4] + 10837 0100 0029 cmp r1, #0 + 10838 0102 D7D0 beq .L1769 + 10839 .L1775: + 10840 0104 0199 ldr r1, [sp, #4] + 10841 0106 009F ldr r7, [sp] + 10842 0108 4618 adds r6, r0, r1 + 10843 010a 4446 mov r4, r8 + 10844 .L1763: + 10845 010c 23B3 cbz r3, .L1799 + 10846 010e 90F90050 ldrsb r5, [r0] + 10847 0112 92F90010 ldrsb r1, [r2] + 10848 0116 11FB05F1 smulbb r1, r1, r5 + 10849 011a 6FB1 cbz r7, .L1768 + 10850 011c 90F901C0 ldrsb ip, [r0, #1] + 10851 0120 92F90150 ldrsb r5, [r2, #1] + 10852 0124 022B cmp r3, #2 + 10853 0126 0CFB0511 mla r1, ip, r5, r1 + 10854 012a 05D0 beq .L1768 + 10855 012c 90F902C0 ldrsb ip, [r0, #2] + 10856 0130 92F90250 ldrsb r5, [r2, #2] + 10857 0134 1CFB0511 smlabb r1, ip, r5, r1 + 10858 .L1768: + ARM GAS /tmp/ccdao7B1.s page 190 + + + 10859 0138 C911 asrs r1, r1, #7 + 10860 .L1772: + 10861 013a 0130 adds r0, r0, #1 + 10862 013c 8642 cmp r6, r0 + 10863 .syntax unified + 10864 @ 791 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c" 1 + 10865 013e 01F30701 ssat r1, #8, r1 + 10866 @ 0 "" 2 + 10867 .thumb + 10868 .syntax unified + 10869 0142 2170 strb r1, [r4] + 10870 0144 4C44 add r4, r4, r9 + 10871 0146 E1D1 bne .L1763 + 10872 0148 019B ldr r3, [sp, #4] + 10873 014a 09FB0388 mla r8, r9, r3, r8 + 10874 014e 009B ldr r3, [sp] + 10875 0150 3046 mov r0, r6 + 10876 0152 002B cmp r3, #0 + 10877 0154 AED1 bne .L1769 + 10878 0156 C7E7 b .L1753 + 10879 .L1799: + 10880 0158 1946 mov r1, r3 + 10881 015a EEE7 b .L1772 + 10882 .L1754: + 10883 015c A3F10208 sub r8, r3, #2 + 10884 0160 8844 add r8, r8, r1 + 10885 0162 0C46 mov r4, r1 + 10886 0164 1946 mov r1, r3 + 10887 0166 0C9B ldr r3, [sp, #48] + 10888 0168 0546 mov r5, r0 + 10889 016a 9844 add r8, r8, r3 + 10890 016c 1046 mov r0, r2 + 10891 016e 2346 mov r3, r4 + 10892 0170 2A46 mov r2, r5 + 10893 0172 4FF0FF39 mov r9, #-1 + 10894 0176 4FE7 b .L1755 + 10895 .L1756: + 10896 0178 0199 ldr r1, [sp, #4] + 10897 017a 0029 cmp r1, #0 + 10898 017c C2D1 bne .L1775 + 10899 017e B3E7 b .L1753 + 10901 .section .text.arm_fir_decimate_f32,"ax",%progbits + 10902 .align 1 + 10903 .p2align 2,,3 + 10904 .global arm_fir_decimate_f32 + 10905 .syntax unified + 10906 .thumb + 10907 .thumb_func + 10908 .fpu fpv4-sp-d16 + 10910 arm_fir_decimate_f32: + 10911 @ args = 0, pretend = 0, frame = 0 + 10912 @ frame_needed = 0, uses_anonymous_args = 0 + 10913 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 10914 0004 4488 ldrh r4, [r0, #2] + 10915 0006 90F80080 ldrb r8, [r0] @ zero_extendqisi2 + 10916 000a 8768 ldr r7, [r0, #8] + 10917 000c D0F80490 ldr r9, [r0, #4] + ARM GAS /tmp/ccdao7B1.s page 191 + + + 10918 0010 B3FBF8FA udiv r10, r3, r8 + 10919 0014 04F1804E add lr, r4, #1073741824 + 10920 0018 0EF1FF3E add lr, lr, #-1 + 10921 001c 9845 cmp r8, r3 + 10922 001e 07EB8E0E add lr, r7, lr, lsl #2 + 10923 0022 2CD8 bhi .L1808 + 10924 0024 4FEA880C lsl ip, r8, #2 + 10925 0028 5546 mov r5, r10 + 10926 002a 3E46 mov r6, r7 + 10927 .L1805: + 10928 002c F346 mov fp, lr + 10929 002e 4346 mov r3, r8 + 10930 0030 0846 mov r0, r1 + 10931 .L1802: + 10932 0032 F0EC017A vldmia.32 r0!, {s15} + 10933 0036 013B subs r3, r3, #1 + 10934 0038 EBEC017A vstmia.32 fp!, {s15} + 10935 003c F9D1 bne .L1802 + 10936 003e DFED117A vldr.32 s15, .L1819 + 10937 0042 6144 add r1, r1, ip + 10938 0044 E644 add lr, lr, ip + 10939 0046 54B1 cbz r4, .L1803 + 10940 0048 2346 mov r3, r4 + 10941 004a CB46 mov fp, r9 + 10942 004c 3046 mov r0, r6 + 10943 .L1804: + 10944 004e FBEC016A vldmia.32 fp!, {s13} + 10945 0052 B0EC017A vldmia.32 r0!, {s14} + 10946 0056 013B subs r3, r3, #1 + 10947 0058 E6EE877A vfma.f32 s15, s13, s14 + 10948 005c F7D1 bne .L1804 + 10949 .L1803: + 10950 005e 013D subs r5, r5, #1 + 10951 0060 E2EC017A vstmia.32 r2!, {s15} + 10952 0064 6644 add r6, r6, ip + 10953 0066 E1D1 bne .L1805 + 10954 0068 0AFB0C7C mla ip, r10, ip, r7 + 10955 006c 03E0 b .L1818 + 10956 .L1807: + 10957 006e 5CF8043B ldr r3, [ip], #4 @ float + 10958 0072 47F8043B str r3, [r7], #4 @ float + 10959 .L1818: + 10960 0076 013C subs r4, r4, #1 + 10961 0078 F9D1 bne .L1807 + 10962 007a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 10963 .L1808: + 10964 007e BC46 mov ip, r7 + 10965 0080 F9E7 b .L1818 + 10966 .L1820: + 10967 0082 00BF .align 2 + 10968 .L1819: + 10969 0084 00000000 .word 0 + 10971 .section .text.arm_fir_decimate_fast_q15,"ax",%progbits + 10972 .align 1 + 10973 .p2align 2,,3 + 10974 .global arm_fir_decimate_fast_q15 + 10975 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 192 + + + 10976 .thumb + 10977 .thumb_func + 10978 .fpu fpv4-sp-d16 + 10980 arm_fir_decimate_fast_q15: + 10981 @ args = 0, pretend = 0, frame = 64 + 10982 @ frame_needed = 0, uses_anonymous_args = 0 + 10983 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 10984 0004 4688 ldrh r6, [r0, #2] + 10985 0006 8568 ldr r5, [r0, #8] + 10986 0008 0478 ldrb r4, [r0] @ zero_extendqisi2 + 10987 000a D0F804B0 ldr fp, [r0, #4] + 10988 000e B3FBF4F3 udiv r3, r3, r4 + 10989 0012 91B0 sub sp, sp, #68 + 10990 0014 9446 mov ip, r2 + 10991 0016 0A92 str r2, [sp, #40] + 10992 0018 06F10042 add r2, r6, #-2147483648 + 10993 001c 013A subs r2, r2, #1 + 10994 001e 2046 mov r0, r4 + 10995 0020 CDE90815 strd r1, r5, [sp, #32] + 10996 0024 0296 str r6, [sp, #8] + 10997 0026 0C94 str r4, [sp, #48] + 10998 0028 03F00106 and r6, r3, #1 + 10999 002c 2C46 mov r4, r5 + 11000 002e 5F08 lsrs r7, r3, #1 + 11001 0030 05EB4205 add r5, r5, r2, lsl #1 + 11002 0034 0795 str r5, [sp, #28] + 11003 0036 0F90 str r0, [sp, #60] + 11004 0038 0D96 str r6, [sp, #52] + 11005 003a 0E97 str r7, [sp, #56] + 11006 003c 00F0FD80 beq .L1844 + 11007 0040 0223 movs r3, #2 + 11008 0042 6FF00106 mvn r6, #1 + 11009 0046 13FB0066 smlabb r6, r3, r0, r6 + 11010 004a 4200 lsls r2, r0, #1 + 11011 004c 10FB03F3 smulbb r3, r0, r3 + 11012 0050 8000 lsls r0, r0, #2 + 11013 0052 0B93 str r3, [sp, #44] + 11014 0054 7608 lsrs r6, r6, #1 + 11015 0056 0390 str r0, [sp, #12] + 11016 0058 5800 lsls r0, r3, #1 + 11017 005a 013B subs r3, r3, #1 + 11018 005c CDE9053B strd r3, fp, [sp, #20] + 11019 0060 0197 str r7, [sp, #4] + 11020 0062 0136 adds r6, r6, #1 + 11021 0064 0492 str r2, [sp, #16] + 11022 0066 0CF10408 add r8, ip, #4 + 11023 006a A946 mov r9, r5 + 11024 006c A246 mov r10, r4 + 11025 006e 0F46 mov r7, r1 + 11026 0070 8346 mov fp, r0 + 11027 .L1829: + 11028 0072 059B ldr r3, [sp, #20] + 11029 0074 092B cmp r3, #9 + 11030 0076 3A46 mov r2, r7 + 11031 0078 40F2B780 bls .L1823 + 11032 007c BB1C adds r3, r7, #2 + 11033 007e 9945 cmp r9, r3 + ARM GAS /tmp/ccdao7B1.s page 193 + + + 11034 0080 00F0B380 beq .L1823 + 11035 0084 4946 mov r1, r9 + 11036 0086 0023 movs r3, #0 + 11037 .L1824: + 11038 0088 0133 adds r3, r3, #1 + 11039 008a 52F8040B ldr r0, [r2], #4 @ unaligned + 11040 008e 41F8040B str r0, [r1], #4 @ unaligned + 11041 0092 9E42 cmp r6, r3 + 11042 0094 F8D8 bhi .L1824 + 11043 .L1825: + 11044 0096 049B ldr r3, [sp, #16] + 11045 0098 0AEB0304 add r4, r10, r3 + 11046 009c 029B ldr r3, [sp, #8] + 11047 009e D944 add r9, r9, fp + 11048 00a0 5F44 add r7, r7, fp + 11049 00a2 002B cmp r3, #0 + 11050 00a4 00F0AC80 beq .L1845 + 11051 00a8 0021 movs r1, #0 + 11052 00aa 069D ldr r5, [sp, #24] + 11053 00ac D446 mov ip, r10 + 11054 00ae 0846 mov r0, r1 + 11055 .L1828: + 11056 00b0 35F9022B ldrsh r2, [r5], #2 + 11057 00b4 3CF902EB ldrsh lr, [ip], #2 + 11058 .syntax unified + 11059 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11060 00b8 2EFB0200 smlad r0, lr, r2, r0 + 11061 @ 0 "" 2 + 11062 .thumb + 11063 .syntax unified + 11064 00bc 34F902EB ldrsh lr, [r4], #2 + 11065 .syntax unified + 11066 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11067 00c0 2EFB0211 smlad r1, lr, r2, r1 + 11068 @ 0 "" 2 + 11069 .thumb + 11070 .syntax unified + 11071 00c4 013B subs r3, r3, #1 + 11072 00c6 F3D1 bne .L1828 + 11073 00c8 C013 asrs r0, r0, #15 + 11074 00ca C913 asrs r1, r1, #15 + 11075 .L1827: + 11076 00cc 039B ldr r3, [sp, #12] + 11077 .syntax unified + 11078 @ 181 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_ + 11079 00ce 00F30F00 ssat r0, #16, r0 + 11080 @ 0 "" 2 + 11081 .thumb + 11082 .syntax unified + 11083 00d2 9A44 add r10, r10, r3 + 11084 00d4 019B ldr r3, [sp, #4] + 11085 00d6 28F8040C strh r0, [r8, #-4] @ movhi + 11086 00da 013B subs r3, r3, #1 + 11087 .syntax unified + 11088 @ 182 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_ + 11089 00dc 01F30F01 ssat r1, #16, r1 + 11090 @ 0 "" 2 + ARM GAS /tmp/ccdao7B1.s page 194 + + + 11091 .thumb + 11092 .syntax unified + 11093 00e0 08F10408 add r8, r8, #4 + 11094 00e4 28F8061C strh r1, [r8, #-6] @ movhi + 11095 00e8 0193 str r3, [sp, #4] + 11096 00ea C2D1 bne .L1829 + 11097 00ec 0E9A ldr r2, [sp, #56] + 11098 00ee 0B9B ldr r3, [sp, #44] + 11099 00f0 0899 ldr r1, [sp, #32] + 11100 00f2 DDF818B0 ldr fp, [sp, #24] + 11101 00f6 02FB03F3 mul r3, r2, r3 + 11102 00fa 01EB4301 add r1, r1, r3, lsl #1 + 11103 00fe 0891 str r1, [sp, #32] + 11104 0100 0799 ldr r1, [sp, #28] + 11105 0102 01EB4303 add r3, r1, r3, lsl #1 + 11106 0106 0793 str r3, [sp, #28] + 11107 0108 0A9B ldr r3, [sp, #40] + 11108 010a 0399 ldr r1, [sp, #12] + 11109 010c 03EB8203 add r3, r3, r2, lsl #2 + 11110 0110 0A93 str r3, [sp, #40] + 11111 0112 099B ldr r3, [sp, #36] + 11112 0114 02FB0131 mla r1, r2, r1, r3 + 11113 .L1822: + 11114 0118 0D9B ldr r3, [sp, #52] + 11115 011a 8BB3 cbz r3, .L1830 + 11116 011c 089C ldr r4, [sp, #32] + 11117 011e 0798 ldr r0, [sp, #28] + 11118 0120 A21C adds r2, r4, #2 + 11119 0122 9042 cmp r0, r2 + 11120 0124 6FD0 beq .L1831 + 11121 0126 0C9D ldr r5, [sp, #48] + 11122 0128 6B1E subs r3, r5, #1 + 11123 012a 092B cmp r3, #9 + 11124 012c 6BD9 bls .L1831 + 11125 012e AB1E subs r3, r5, #2 + 11126 0130 5B08 lsrs r3, r3, #1 + 11127 0132 0133 adds r3, r3, #1 + 11128 0134 0022 movs r2, #0 + 11129 .L1832: + 11130 0136 0132 adds r2, r2, #1 + 11131 0138 54F8045B ldr r5, [r4], #4 @ unaligned + 11132 013c 40F8045B str r5, [r0], #4 @ unaligned + 11133 0140 9342 cmp r3, r2 + 11134 0142 F8D8 bhi .L1832 + 11135 0144 0C9A ldr r2, [sp, #48] + 11136 0146 B2EB430F cmp r2, r3, lsl #1 + 11137 014a 05D0 beq .L1835 + 11138 014c 089A ldr r2, [sp, #32] + 11139 014e 0798 ldr r0, [sp, #28] + 11140 0150 32F92320 ldrsh r2, [r2, r3, lsl #2] + 11141 0154 20F82320 strh r2, [r0, r3, lsl #2] @ movhi + 11142 .L1835: + 11143 0158 029B ldr r3, [sp, #8] + 11144 015a 53B1 cbz r3, .L1836 + 11145 015c 0846 mov r0, r1 + 11146 015e 0022 movs r2, #0 + 11147 .L1837: + ARM GAS /tmp/ccdao7B1.s page 195 + + + 11148 0160 30F9024B ldrsh r4, [r0], #2 + 11149 0164 3BF9025B ldrsh r5, [fp], #2 + 11150 .syntax unified + 11151 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11152 0168 24FB0522 smlad r2, r4, r5, r2 + 11153 @ 0 "" 2 + 11154 .thumb + 11155 .syntax unified + 11156 016c 013B subs r3, r3, #1 + 11157 016e F7D1 bne .L1837 + 11158 0170 D313 asrs r3, r2, #15 + 11159 .L1836: + 11160 0172 0C9A ldr r2, [sp, #48] + 11161 .syntax unified + 11162 @ 268 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_ + 11163 0174 03F30F03 ssat r3, #16, r3 + 11164 @ 0 "" 2 + 11165 .thumb + 11166 .syntax unified + 11167 0178 01EB4201 add r1, r1, r2, lsl #1 + 11168 017c 0A9A ldr r2, [sp, #40] + 11169 017e 1380 strh r3, [r2] @ movhi + 11170 .L1830: + 11171 0180 029B ldr r3, [sp, #8] + 11172 0182 5F1E subs r7, r3, #1 + 11173 0184 BE08 lsrs r6, r7, #2 + 11174 0186 1CD0 beq .L1838 + 11175 0188 0998 ldr r0, [sp, #36] + 11176 018a C31D adds r3, r0, #7 + 11177 018c 5B1A subs r3, r3, r1 + 11178 018e 721E subs r2, r6, #1 + 11179 0190 0E2B cmp r3, #14 + 11180 0192 88BF it hi + 11181 0194 042A cmphi r2, #4 + 11182 0196 42D9 bls .L1847 + 11183 0198 40EA0103 orr r3, r0, r1 + 11184 019c 5B07 lsls r3, r3, #29 + 11185 019e 0246 mov r2, r0 + 11186 01a0 3DD1 bne .L1847 + 11187 01a2 A1F10800 sub r0, r1, #8 + 11188 01a6 0023 movs r3, #0 + 11189 .L1840: + 11190 01a8 F0E90245 ldrd r4, [r0, #8]! + 11191 01ac 0133 adds r3, r3, #1 + 11192 01ae 9E42 cmp r6, r3 + 11193 01b0 E2E80245 strd r4, [r2], #8 + 11194 01b4 F8D1 bne .L1840 + 11195 .L1841: + 11196 01b6 099B ldr r3, [sp, #36] + 11197 01b8 03EBC603 add r3, r3, r6, lsl #3 + 11198 01bc 01EBC601 add r1, r1, r6, lsl #3 + 11199 01c0 0993 str r3, [sp, #36] + 11200 .L1838: + 11201 01c2 17F00307 ands r7, r7, #3 + 11202 01c6 0DD0 beq .L1821 + 11203 01c8 099A ldr r2, [sp, #36] + 11204 01ca B1F90030 ldrsh r3, [r1] + ARM GAS /tmp/ccdao7B1.s page 196 + + + 11205 01ce 1380 strh r3, [r2] @ movhi + 11206 01d0 013F subs r7, r7, #1 + 11207 01d2 07D0 beq .L1821 + 11208 01d4 B1F90230 ldrsh r3, [r1, #2] + 11209 01d8 5380 strh r3, [r2, #2] @ movhi + 11210 01da 012F cmp r7, #1 + 11211 01dc 1CBF itt ne + 11212 01de B1F90430 ldrshne r3, [r1, #4] + 11213 01e2 9380 strhne r3, [r2, #4] @ movhi + 11214 .L1821: + 11215 01e4 11B0 add sp, sp, #68 + 11216 @ sp needed + 11217 01e6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11218 .L1823: + 11219 01ea 0B9B ldr r3, [sp, #44] + 11220 01ec A9F10201 sub r1, r9, #2 + 11221 01f0 3A46 mov r2, r7 + 11222 .L1826: + 11223 01f2 32F9020B ldrsh r0, [r2], #2 + 11224 01f6 21F8020F strh r0, [r1, #2]! @ movhi + 11225 01fa 013B subs r3, r3, #1 + 11226 01fc F9D1 bne .L1826 + 11227 01fe 4AE7 b .L1825 + 11228 .L1845: + 11229 0200 1846 mov r0, r3 + 11230 0202 1946 mov r1, r3 + 11231 0204 62E7 b .L1827 + 11232 .L1831: + 11233 0206 079B ldr r3, [sp, #28] + 11234 0208 0F98 ldr r0, [sp, #60] + 11235 020a 023B subs r3, r3, #2 + 11236 020c 00E0 b .L1834 + 11237 .L1889: + 11238 020e 0232 adds r2, r2, #2 + 11239 .L1834: + 11240 0210 32F9024C ldrsh r4, [r2, #-2] + 11241 0214 23F8024F strh r4, [r3, #2]! @ movhi + 11242 0218 0138 subs r0, r0, #1 + 11243 021a F8D1 bne .L1889 + 11244 021c 9CE7 b .L1835 + 11245 .L1847: + 11246 021e 099A ldr r2, [sp, #36] + 11247 0220 0B46 mov r3, r1 + 11248 0222 3046 mov r0, r6 + 11249 .L1839: + 11250 0224 1C68 ldr r4, [r3] @ unaligned + 11251 0226 1460 str r4, [r2] @ unaligned + 11252 0228 5C68 ldr r4, [r3, #4] @ unaligned + 11253 022a 5460 str r4, [r2, #4] @ unaligned + 11254 022c 0138 subs r0, r0, #1 + 11255 022e 03F10803 add r3, r3, #8 + 11256 0232 02F10802 add r2, r2, #8 + 11257 0236 F5D1 bne .L1839 + 11258 0238 BDE7 b .L1841 + 11259 .L1844: + 11260 023a 0999 ldr r1, [sp, #36] + 11261 023c 6CE7 b .L1822 + ARM GAS /tmp/ccdao7B1.s page 197 + + + 11263 023e 00BF .section .text.arm_fir_decimate_fast_q31,"ax",%progbits + 11264 .align 1 + 11265 .p2align 2,,3 + 11266 .global arm_fir_decimate_fast_q31 + 11267 .syntax unified + 11268 .thumb + 11269 .thumb_func + 11270 .fpu fpv4-sp-d16 + 11272 arm_fir_decimate_fast_q31: + 11273 @ args = 0, pretend = 0, frame = 40 + 11274 @ frame_needed = 0, uses_anonymous_args = 0 + 11275 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 11276 0004 8BB0 sub sp, sp, #44 + 11277 0006 4588 ldrh r5, [r0, #2] + 11278 0008 0192 str r2, [sp, #4] + 11279 000a 0278 ldrb r2, [r0] @ zero_extendqisi2 + 11280 000c 8468 ldr r4, [r0, #8] + 11281 000e 4068 ldr r0, [r0, #4] + 11282 0010 0894 str r4, [sp, #32] + 11283 0012 05F18046 add r6, r5, #1073741824 + 11284 0016 013E subs r6, r6, #1 + 11285 0018 9A42 cmp r2, r3 + 11286 001a 0690 str r0, [sp, #24] + 11287 001c 04EB8606 add r6, r4, r6, lsl #2 + 11288 0020 2046 mov r0, r4 + 11289 0022 0395 str r5, [sp, #12] + 11290 0024 B3FBF2F4 udiv r4, r3, r2 + 11291 0028 0492 str r2, [sp, #16] + 11292 002a 0994 str r4, [sp, #36] + 11293 002c 00F29480 bhi .L1908 + 11294 0030 A2F10209 sub r9, r2, #2 + 11295 0034 4FEA5909 lsr r9, r9, #1 + 11296 0038 1346 mov r3, r2 + 11297 003a 09F10109 add r9, r9, #1 + 11298 003e 4FEA820A lsl r10, r2, #2 + 11299 0042 013B subs r3, r3, #1 + 11300 0044 4FEA4902 lsl r2, r9, #1 + 11301 0048 0792 str r2, [sp, #28] + 11302 004a 4FEAC907 lsl r7, r9, #3 + 11303 004e 0294 str r4, [sp, #8] + 11304 0050 8346 mov fp, r0 + 11305 0052 0593 str r3, [sp, #20] + 11306 0054 0025 movs r5, #0 + 11307 .L1899: + 11308 0056 059A ldr r2, [sp, #20] + 11309 0058 0B1D adds r3, r1, #4 + 11310 005a 9E42 cmp r6, r3 + 11311 005c 18BF it ne + 11312 005e 0B2A cmpne r2, #11 + 11313 0060 5DD9 bls .L1892 + 11314 0062 41EA0603 orr r3, r1, r6 + 11315 0066 5A07 lsls r2, r3, #29 + 11316 0068 59D1 bne .L1892 + 11317 006a A1F10800 sub r0, r1, #8 + 11318 006e 3246 mov r2, r6 + 11319 0070 0023 movs r3, #0 + 11320 0072 4C46 mov r4, r9 + ARM GAS /tmp/ccdao7B1.s page 198 + + + 11321 .L1893: + 11322 0074 F0E90289 ldrd r8, [r0, #8]! + 11323 0078 0133 adds r3, r3, #1 + 11324 007a A342 cmp r3, r4 + 11325 007c E2E80289 strd r8, [r2], #8 + 11326 0080 F8D3 bcc .L1893 + 11327 0082 049B ldr r3, [sp, #16] + 11328 0084 079A ldr r2, [sp, #28] + 11329 0086 9342 cmp r3, r2 + 11330 0088 A146 mov r9, r4 + 11331 008a 01D0 beq .L1896 + 11332 008c CB59 ldr r3, [r1, r7] + 11333 008e F351 str r3, [r6, r7] + 11334 .L1896: + 11335 0090 039B ldr r3, [sp, #12] + 11336 0092 5144 add r1, r1, r10 + 11337 0094 5644 add r6, r6, r10 + 11338 0096 002B cmp r3, #0 + 11339 0098 4FD0 beq .L1909 + 11340 .L1930: + 11341 009a DDF818E0 ldr lr, [sp, #24] + 11342 009e DC46 mov ip, fp + 11343 00a0 0024 movs r4, #0 + 11344 .L1898: + 11345 00a2 5CF8040B ldr r0, [ip], #4 + 11346 00a6 5EF8042B ldr r2, [lr], #4 + 11347 00aa A846 mov r8, r5 + 11348 00ac 013B subs r3, r3, #1 + 11349 00ae C0FB0284 smlal r8, r4, r0, r2 + 11350 00b2 F6D1 bne .L1898 + 11351 00b4 2419 adds r4, r4, r4 + 11352 .L1897: + 11353 00b6 019B ldr r3, [sp, #4] + 11354 00b8 43F8044B str r4, [r3], #4 + 11355 00bc 0193 str r3, [sp, #4] + 11356 00be 029B ldr r3, [sp, #8] + 11357 00c0 013B subs r3, r3, #1 + 11358 00c2 D344 add fp, fp, r10 + 11359 00c4 0293 str r3, [sp, #8] + 11360 00c6 C6D1 bne .L1899 + 11361 00c8 DDE90832 ldrd r3, r2, [sp, #32] + 11362 00cc 02FB0A3A mla r10, r2, r10, r3 + 11363 .L1891: + 11364 00d0 0398 ldr r0, [sp, #12] + 11365 00d2 461E subs r6, r0, #1 + 11366 00d4 20D0 beq .L1890 + 11367 00d6 0899 ldr r1, [sp, #32] + 11368 00d8 0AF10402 add r2, r10, #4 + 11369 00dc 831E subs r3, r0, #2 + 11370 00de 9142 cmp r1, r2 + 11371 00e0 18BF it ne + 11372 00e2 0B2B cmpne r3, #11 + 11373 00e4 2BD9 bls .L1901 + 11374 00e6 41EA0A03 orr r3, r1, r10 + 11375 00ea 5B07 lsls r3, r3, #29 + 11376 00ec 27D1 bne .L1901 + 11377 00ee C31E subs r3, r0, #3 + ARM GAS /tmp/ccdao7B1.s page 199 + + + 11378 00f0 5B08 lsrs r3, r3, #1 + 11379 00f2 0133 adds r3, r3, #1 + 11380 00f4 AAF10800 sub r0, r10, #8 + 11381 00f8 0022 movs r2, #0 + 11382 .L1902: + 11383 00fa F0E90245 ldrd r4, [r0, #8]! + 11384 00fe 0132 adds r2, r2, #1 + 11385 0100 9A42 cmp r2, r3 + 11386 0102 E1E80245 strd r4, [r1], #8 + 11387 0106 F8D3 bcc .L1902 + 11388 0108 B6EB430F cmp r6, r3, lsl #1 + 11389 010c 04D0 beq .L1890 + 11390 010e 0899 ldr r1, [sp, #32] + 11391 0110 5AF83320 ldr r2, [r10, r3, lsl #3] + 11392 0114 41F83320 str r2, [r1, r3, lsl #3] + 11393 .L1890: + 11394 0118 0BB0 add sp, sp, #44 + 11395 @ sp needed + 11396 011a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11397 .L1892: + 11398 011e 049B ldr r3, [sp, #16] + 11399 0120 301F subs r0, r6, #4 + 11400 0122 0A46 mov r2, r1 + 11401 .L1895: + 11402 0124 52F8044B ldr r4, [r2], #4 + 11403 0128 40F8044F str r4, [r0, #4]! + 11404 012c 013B subs r3, r3, #1 + 11405 012e F9D1 bne .L1895 + 11406 0130 039B ldr r3, [sp, #12] + 11407 0132 5144 add r1, r1, r10 + 11408 0134 5644 add r6, r6, r10 + 11409 0136 002B cmp r3, #0 + 11410 0138 AFD1 bne .L1930 + 11411 .L1909: + 11412 013a 1C46 mov r4, r3 + 11413 013c BBE7 b .L1897 + 11414 .L1901: + 11415 013e 089B ldr r3, [sp, #32] + 11416 0140 043B subs r3, r3, #4 + 11417 0142 00E0 b .L1906 + 11418 .L1931: + 11419 0144 0432 adds r2, r2, #4 + 11420 .L1906: + 11421 0146 52F8041C ldr r1, [r2, #-4] + 11422 014a 43F8041F str r1, [r3, #4]! + 11423 014e 013E subs r6, r6, #1 + 11424 0150 F8D1 bne .L1931 + 11425 0152 0BB0 add sp, sp, #44 + 11426 @ sp needed + 11427 0154 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11428 .L1908: + 11429 0158 DDF820A0 ldr r10, [sp, #32] + 11430 015c B8E7 b .L1891 + 11432 015e 00BF .section .text.arm_fir_decimate_init_f32,"ax",%progbits + 11433 .align 1 + 11434 .p2align 2,,3 + 11435 .global arm_fir_decimate_init_f32 + ARM GAS /tmp/ccdao7B1.s page 200 + + + 11436 .syntax unified + 11437 .thumb + 11438 .thumb_func + 11439 .fpu fpv4-sp-d16 + 11441 arm_fir_decimate_init_f32: + 11442 @ args = 8, pretend = 0, frame = 0 + 11443 @ frame_needed = 0, uses_anonymous_args = 0 + 11444 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11445 0002 1646 mov r6, r2 + 11446 0004 DDE90672 ldrd r7, r2, [sp, #24] + 11447 0008 B2FBF6F4 udiv r4, r2, r6 + 11448 000c 06FB1424 mls r4, r6, r4, r2 + 11449 0010 6CB9 cbnz r4, .L1934 + 11450 0012 4360 str r3, [r0, #4] + 11451 0014 4B1E subs r3, r1, #1 + 11452 0016 0546 mov r5, r0 + 11453 0018 1A44 add r2, r2, r3 + 11454 001a 4180 strh r1, [r0, #2] @ movhi + 11455 001c 9200 lsls r2, r2, #2 + 11456 001e 2146 mov r1, r4 + 11457 0020 3846 mov r0, r7 + 11458 0022 FFF7FEFF bl memset + 11459 0026 2E70 strb r6, [r5] + 11460 0028 AF60 str r7, [r5, #8] + 11461 002a 2046 mov r0, r4 + 11462 002c F8BD pop {r3, r4, r5, r6, r7, pc} + 11463 .L1934: + 11464 002e 6FF00100 mvn r0, #1 + 11465 0032 F8BD pop {r3, r4, r5, r6, r7, pc} + 11467 .section .text.arm_fir_decimate_init_q15,"ax",%progbits + 11468 .align 1 + 11469 .p2align 2,,3 + 11470 .global arm_fir_decimate_init_q15 + 11471 .syntax unified + 11472 .thumb + 11473 .thumb_func + 11474 .fpu fpv4-sp-d16 + 11476 arm_fir_decimate_init_q15: + 11477 @ args = 8, pretend = 0, frame = 0 + 11478 @ frame_needed = 0, uses_anonymous_args = 0 + 11479 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11480 0002 1646 mov r6, r2 + 11481 0004 DDE90672 ldrd r7, r2, [sp, #24] + 11482 0008 B2FBF6F4 udiv r4, r2, r6 + 11483 000c 06FB1424 mls r4, r6, r4, r2 + 11484 0010 6CB9 cbnz r4, .L1938 + 11485 0012 4360 str r3, [r0, #4] + 11486 0014 4B1E subs r3, r1, #1 + 11487 0016 0546 mov r5, r0 + 11488 0018 1A44 add r2, r2, r3 + 11489 001a 4180 strh r1, [r0, #2] @ movhi + 11490 001c 5200 lsls r2, r2, #1 + 11491 001e 2146 mov r1, r4 + 11492 0020 3846 mov r0, r7 + 11493 0022 FFF7FEFF bl memset + 11494 0026 2E70 strb r6, [r5] + 11495 0028 AF60 str r7, [r5, #8] + ARM GAS /tmp/ccdao7B1.s page 201 + + + 11496 002a 2046 mov r0, r4 + 11497 002c F8BD pop {r3, r4, r5, r6, r7, pc} + 11498 .L1938: + 11499 002e 6FF00100 mvn r0, #1 + 11500 0032 F8BD pop {r3, r4, r5, r6, r7, pc} + 11502 .section .text.arm_fir_decimate_init_q31,"ax",%progbits + 11503 .align 1 + 11504 .p2align 2,,3 + 11505 .global arm_fir_decimate_init_q31 + 11506 .syntax unified + 11507 .thumb + 11508 .thumb_func + 11509 .fpu fpv4-sp-d16 + 11511 arm_fir_decimate_init_q31: + 11512 @ args = 8, pretend = 0, frame = 0 + 11513 @ frame_needed = 0, uses_anonymous_args = 0 + 11514 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 11515 0002 1646 mov r6, r2 + 11516 0004 DDE90672 ldrd r7, r2, [sp, #24] + 11517 0008 B2FBF6F4 udiv r4, r2, r6 + 11518 000c 06FB1424 mls r4, r6, r4, r2 + 11519 0010 6CB9 cbnz r4, .L1942 + 11520 0012 4360 str r3, [r0, #4] + 11521 0014 4B1E subs r3, r1, #1 + 11522 0016 0546 mov r5, r0 + 11523 0018 1A44 add r2, r2, r3 + 11524 001a 4180 strh r1, [r0, #2] @ movhi + 11525 001c 9200 lsls r2, r2, #2 + 11526 001e 2146 mov r1, r4 + 11527 0020 3846 mov r0, r7 + 11528 0022 FFF7FEFF bl memset + 11529 0026 2E70 strb r6, [r5] + 11530 0028 AF60 str r7, [r5, #8] + 11531 002a 2046 mov r0, r4 + 11532 002c F8BD pop {r3, r4, r5, r6, r7, pc} + 11533 .L1942: + 11534 002e 6FF00100 mvn r0, #1 + 11535 0032 F8BD pop {r3, r4, r5, r6, r7, pc} + 11537 .section .text.arm_fir_decimate_q15,"ax",%progbits + 11538 .align 1 + 11539 .p2align 2,,3 + 11540 .global arm_fir_decimate_q15 + 11541 .syntax unified + 11542 .thumb + 11543 .thumb_func + 11544 .fpu fpv4-sp-d16 + 11546 arm_fir_decimate_q15: + 11547 @ args = 0, pretend = 0, frame = 40 + 11548 @ frame_needed = 0, uses_anonymous_args = 0 + 11549 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 11550 0004 4688 ldrh r6, [r0, #2] + 11551 0006 8468 ldr r4, [r0, #8] + 11552 0008 0578 ldrb r5, [r0] @ zero_extendqisi2 + 11553 000a B3FBF5F3 udiv r3, r3, r5 + 11554 000e 8BB0 sub sp, sp, #44 + 11555 0010 06F10049 add r9, r6, #-2147483648 + 11556 0014 0490 str r0, [sp, #16] + ARM GAS /tmp/ccdao7B1.s page 202 + + + 11557 0016 4068 ldr r0, [r0, #4] + 11558 0018 0590 str r0, [sp, #20] + 11559 001a 09F1FF39 add r9, r9, #-1 + 11560 001e 03F00100 and r0, r3, #1 + 11561 0022 5B08 lsrs r3, r3, #1 + 11562 0024 CDE90624 strd r2, r4, [sp, #24] + 11563 0028 0396 str r6, [sp, #12] + 11564 002a 04EB4909 add r9, r4, r9, lsl #1 + 11565 002e A246 mov r10, r4 + 11566 0030 0890 str r0, [sp, #32] + 11567 0032 0993 str r3, [sp, #36] + 11568 0034 5AD0 beq .L1945 + 11569 0036 0432 adds r2, r2, #4 + 11570 0038 CDE90132 strd r3, r2, [sp, #4] + 11571 003c 2EB2 sxth r6, r5 + 11572 .L1952: + 11573 003e 0222 movs r2, #2 + 11574 0040 4FF0FF30 mov r0, #-1 + 11575 0044 12FB0503 smlabb r3, r2, r5, r0 + 11576 0048 092B cmp r3, #9 + 11577 004a 15FB02F5 smulbb r5, r5, r2 + 11578 004e 40F2BC80 bls .L1946 + 11579 0052 8B18 adds r3, r1, r2 + 11580 0054 9945 cmp r9, r3 + 11581 0056 00F0B880 beq .L1946 + 11582 005a AF1E subs r7, r5, #2 + 11583 005c 7F08 lsrs r7, r7, #1 + 11584 005e 0137 adds r7, r7, #1 + 11585 0060 0846 mov r0, r1 + 11586 0062 4A46 mov r2, r9 + 11587 0064 0023 movs r3, #0 + 11588 .L1947: + 11589 0066 0133 adds r3, r3, #1 + 11590 0068 50F8044B ldr r4, [r0], #4 @ unaligned + 11591 006c 42F8044B str r4, [r2], #4 @ unaligned + 11592 0070 9F42 cmp r7, r3 + 11593 0072 F8D8 bhi .L1947 + 11594 .L1948: + 11595 0074 0AEB460C add ip, r10, r6, lsl #1 + 11596 0078 039E ldr r6, [sp, #12] + 11597 007a 09EB4509 add r9, r9, r5, lsl #1 + 11598 007e 01EB4501 add r1, r1, r5, lsl #1 + 11599 0082 002E cmp r6, #0 + 11600 0084 00F0AC80 beq .L1967 + 11601 0088 0022 movs r2, #0 + 11602 008a DDF814E0 ldr lr, [sp, #20] + 11603 008e D046 mov r8, r10 + 11604 0090 1346 mov r3, r2 + 11605 0092 1046 mov r0, r2 + 11606 0094 1446 mov r4, r2 + 11607 .L1951: + 11608 0096 3CF9027B ldrsh r7, [ip], #2 + 11609 009a 38F902BB ldrsh fp, [r8], #2 + 11610 009e 3EF9025B ldrsh r5, [lr], #2 + 11611 .syntax unified + 11612 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11613 00a2 CBFBC504 smlald r0, r4, fp, r5 + ARM GAS /tmp/ccdao7B1.s page 203 + + + 11614 @ 0 "" 2 + 11615 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11616 00a6 C7FBC523 smlald r2, r3, r7, r5 + 11617 @ 0 "" 2 + 11618 .thumb + 11619 .syntax unified + 11620 00aa 013E subs r6, r6, #1 + 11621 00ac F3D1 bne .L1951 + 11622 00ae C00B lsrs r0, r0, #15 + 11623 00b0 D20B lsrs r2, r2, #15 + 11624 00b2 40EA4444 orr r4, r0, r4, lsl #17 + 11625 00b6 42EA4343 orr r3, r2, r3, lsl #17 + 11626 .L1950: + 11627 00ba 049A ldr r2, [sp, #16] + 11628 .syntax unified + 11629 @ 439 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c + 11630 00bc 03F30F03 ssat r3, #16, r3 + 11631 @ 0 "" 2 + 11632 .thumb + 11633 .syntax unified + 11634 00c0 1578 ldrb r5, [r2] @ zero_extendqisi2 + 11635 00c2 029A ldr r2, [sp, #8] + 11636 .syntax unified + 11637 @ 438 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c + 11638 00c4 04F30F04 ssat r4, #16, r4 + 11639 @ 0 "" 2 + 11640 .thumb + 11641 .syntax unified + 11642 00c8 22F8023C strh r3, [r2, #-2] @ movhi + 11643 00cc 131D adds r3, r2, #4 + 11644 00ce 0293 str r3, [sp, #8] + 11645 00d0 019B ldr r3, [sp, #4] + 11646 00d2 22F8044C strh r4, [r2, #-4] @ movhi + 11647 00d6 013B subs r3, r3, #1 + 11648 00d8 0AEB850A add r10, r10, r5, lsl #2 + 11649 00dc 2EB2 sxth r6, r5 + 11650 00de 0193 str r3, [sp, #4] + 11651 00e0 ADD1 bne .L1952 + 11652 00e2 069B ldr r3, [sp, #24] + 11653 00e4 099A ldr r2, [sp, #36] + 11654 00e6 03EB8203 add r3, r3, r2, lsl #2 + 11655 00ea 0693 str r3, [sp, #24] + 11656 .L1945: + 11657 00ec 089B ldr r3, [sp, #32] + 11658 00ee 002B cmp r3, #0 + 11659 00f0 36D0 beq .L1953 + 11660 00f2 049A ldr r2, [sp, #16] + 11661 00f4 8B1C adds r3, r1, #2 + 11662 00f6 1678 ldrb r6, [r2] @ zero_extendqisi2 + 11663 00f8 9945 cmp r9, r3 + 11664 00fa 06F1FF32 add r2, r6, #-1 + 11665 00fe 72D0 beq .L1954 + 11666 0100 092A cmp r2, #9 + 11667 0102 70D9 bls .L1954 + 11668 0104 B31E subs r3, r6, #2 + 11669 0106 5B08 lsrs r3, r3, #1 + 11670 0108 0133 adds r3, r3, #1 + ARM GAS /tmp/ccdao7B1.s page 204 + + + 11671 010a 0C46 mov r4, r1 + 11672 010c 4846 mov r0, r9 + 11673 010e 0022 movs r2, #0 + 11674 .L1955: + 11675 0110 0132 adds r2, r2, #1 + 11676 0112 54F8045B ldr r5, [r4], #4 @ unaligned + 11677 0116 40F8045B str r5, [r0], #4 @ unaligned + 11678 011a 9342 cmp r3, r2 + 11679 011c F8D8 bhi .L1955 + 11680 011e B6EB430F cmp r6, r3, lsl #1 + 11681 0122 03D0 beq .L1958 + 11682 0124 31F92320 ldrsh r2, [r1, r3, lsl #2] + 11683 0128 29F82320 strh r2, [r9, r3, lsl #2] @ movhi + 11684 .L1958: + 11685 012c 0398 ldr r0, [sp, #12] + 11686 012e 0028 cmp r0, #0 + 11687 0130 67D0 beq .L1968 + 11688 .L2016: + 11689 0132 0023 movs r3, #0 + 11690 0134 059D ldr r5, [sp, #20] + 11691 0136 5646 mov r6, r10 + 11692 0138 1946 mov r1, r3 + 11693 .L1960: + 11694 013a 36F9022B ldrsh r2, [r6], #2 + 11695 013e 35F9024B ldrsh r4, [r5], #2 + 11696 .syntax unified + 11697 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 11698 0142 C2FBC431 smlald r3, r1, r2, r4 + 11699 @ 0 "" 2 + 11700 .thumb + 11701 .syntax unified + 11702 0146 0138 subs r0, r0, #1 + 11703 0148 F7D1 bne .L1960 + 11704 014a DA0B lsrs r2, r3, #15 + 11705 014c 42EA4143 orr r3, r2, r1, lsl #17 + 11706 .L1959: + 11707 0150 049A ldr r2, [sp, #16] + 11708 .syntax unified + 11709 @ 525 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c + 11710 0152 03F30F03 ssat r3, #16, r3 + 11711 @ 0 "" 2 + 11712 .thumb + 11713 .syntax unified + 11714 0156 1278 ldrb r2, [r2] @ zero_extendqisi2 + 11715 0158 0AEB420A add r10, r10, r2, lsl #1 + 11716 015c 069A ldr r2, [sp, #24] + 11717 015e 1380 strh r3, [r2] @ movhi + 11718 .L1953: + 11719 0160 039B ldr r3, [sp, #12] + 11720 0162 0799 ldr r1, [sp, #28] + 11721 0164 5E1E subs r6, r3, #1 + 11722 0166 B008 lsrs r0, r6, #2 + 11723 0168 0B46 mov r3, r1 + 11724 016a 1BD0 beq .L1961 + 11725 016c CB1D adds r3, r1, #7 + 11726 016e A3EB0A03 sub r3, r3, r10 + 11727 0172 421E subs r2, r0, #1 + ARM GAS /tmp/ccdao7B1.s page 205 + + + 11728 0174 0E2B cmp r3, #14 + 11729 0176 88BF it hi + 11730 0178 042A cmphi r2, #4 + 11731 017a 44D9 bls .L1969 + 11732 017c 4AEA0103 orr r3, r10, r1 + 11733 0180 5B07 lsls r3, r3, #29 + 11734 0182 0A46 mov r2, r1 + 11735 0184 3FD1 bne .L1969 + 11736 0186 AAF10801 sub r1, r10, #8 + 11737 018a 0023 movs r3, #0 + 11738 .L1963: + 11739 018c F1E90245 ldrd r4, [r1, #8]! + 11740 0190 0133 adds r3, r3, #1 + 11741 0192 8342 cmp r3, r0 + 11742 0194 E2E80245 strd r4, [r2], #8 + 11743 0198 F8D1 bne .L1963 + 11744 .L1964: + 11745 019a 079B ldr r3, [sp, #28] + 11746 019c 0AEBC00A add r10, r10, r0, lsl #3 + 11747 01a0 03EBC003 add r3, r3, r0, lsl #3 + 11748 .L1961: + 11749 01a4 16F00306 ands r6, r6, #3 + 11750 01a8 0CD0 beq .L1944 + 11751 01aa BAF90020 ldrsh r2, [r10] + 11752 01ae 1A80 strh r2, [r3] @ movhi + 11753 01b0 013E subs r6, r6, #1 + 11754 01b2 07D0 beq .L1944 + 11755 01b4 BAF90220 ldrsh r2, [r10, #2] + 11756 01b8 5A80 strh r2, [r3, #2] @ movhi + 11757 01ba 012E cmp r6, #1 + 11758 01bc 1CBF itt ne + 11759 01be BAF90420 ldrshne r2, [r10, #4] + 11760 01c2 9A80 strhne r2, [r3, #4] @ movhi + 11761 .L1944: + 11762 01c4 0BB0 add sp, sp, #44 + 11763 @ sp needed + 11764 01c6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11765 .L1946: + 11766 01ca A9F10200 sub r0, r9, #2 + 11767 01ce 2B46 mov r3, r5 + 11768 01d0 0A46 mov r2, r1 + 11769 .L1949: + 11770 01d2 32F9024B ldrsh r4, [r2], #2 + 11771 01d6 20F8024F strh r4, [r0, #2]! @ movhi + 11772 01da 013B subs r3, r3, #1 + 11773 01dc F9D1 bne .L1949 + 11774 01de 49E7 b .L1948 + 11775 .L1967: + 11776 01e0 3446 mov r4, r6 + 11777 01e2 3346 mov r3, r6 + 11778 01e4 69E7 b .L1950 + 11779 .L1954: + 11780 01e6 A9F10209 sub r9, r9, #2 + 11781 01ea 01E0 b .L1957 + 11782 .L2015: + 11783 01ec 0233 adds r3, r3, #2 + 11784 01ee 013A subs r2, r2, #1 + ARM GAS /tmp/ccdao7B1.s page 206 + + + 11785 .L1957: + 11786 01f0 33F9021C ldrsh r1, [r3, #-2] + 11787 01f4 29F8021F strh r1, [r9, #2]! @ movhi + 11788 01f8 002A cmp r2, #0 + 11789 01fa F7D1 bne .L2015 + 11790 01fc 0398 ldr r0, [sp, #12] + 11791 01fe 0028 cmp r0, #0 + 11792 0200 97D1 bne .L2016 + 11793 .L1968: + 11794 0202 0346 mov r3, r0 + 11795 0204 A4E7 b .L1959 + 11796 .L1969: + 11797 0206 079A ldr r2, [sp, #28] + 11798 0208 5346 mov r3, r10 + 11799 020a 0146 mov r1, r0 + 11800 .L1962: + 11801 020c 1C68 ldr r4, [r3] @ unaligned + 11802 020e 1460 str r4, [r2] @ unaligned + 11803 0210 5C68 ldr r4, [r3, #4] @ unaligned + 11804 0212 5460 str r4, [r2, #4] @ unaligned + 11805 0214 0139 subs r1, r1, #1 + 11806 0216 03F10803 add r3, r3, #8 + 11807 021a 02F10802 add r2, r2, #8 + 11808 021e F5D1 bne .L1962 + 11809 0220 BBE7 b .L1964 + 11811 0222 00BF .section .text.arm_fir_decimate_q31,"ax",%progbits + 11812 .align 1 + 11813 .p2align 2,,3 + 11814 .global arm_fir_decimate_q31 + 11815 .syntax unified + 11816 .thumb + 11817 .thumb_func + 11818 .fpu fpv4-sp-d16 + 11820 arm_fir_decimate_q31: + 11821 @ args = 0, pretend = 0, frame = 32 + 11822 @ frame_needed = 0, uses_anonymous_args = 0 + 11823 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 11824 0004 89B0 sub sp, sp, #36 + 11825 0006 B0F80290 ldrh r9, [r0, #2] + 11826 000a 0092 str r2, [sp] + 11827 000c 0278 ldrb r2, [r0] @ zero_extendqisi2 + 11828 000e 8468 ldr r4, [r0, #8] + 11829 0010 4068 ldr r0, [r0, #4] + 11830 0012 0694 str r4, [sp, #24] + 11831 0014 09F18046 add r6, r9, #1073741824 + 11832 0018 013E subs r6, r6, #1 + 11833 001a 9A42 cmp r2, r3 + 11834 001c 0490 str r0, [sp, #16] + 11835 001e 04EB8606 add r6, r4, r6, lsl #2 + 11836 0022 2046 mov r0, r4 + 11837 0024 0292 str r2, [sp, #8] + 11838 0026 B3FBF2F4 udiv r4, r3, r2 + 11839 002a 0794 str r4, [sp, #28] + 11840 002c 00F29680 bhi .L2035 + 11841 0030 A2F10208 sub r8, r2, #2 + 11842 0034 4FEA5808 lsr r8, r8, #1 + 11843 0038 1346 mov r3, r2 + ARM GAS /tmp/ccdao7B1.s page 207 + + + 11844 003a 08F10108 add r8, r8, #1 + 11845 003e 4FEA820A lsl r10, r2, #2 + 11846 0042 013B subs r3, r3, #1 + 11847 0044 4FEA4802 lsl r2, r8, #1 + 11848 0048 0592 str r2, [sp, #20] + 11849 004a 4FEAC807 lsl r7, r8, #3 + 11850 004e 0194 str r4, [sp, #4] + 11851 0050 8346 mov fp, r0 + 11852 0052 0393 str r3, [sp, #12] + 11853 .L2026: + 11854 0054 039A ldr r2, [sp, #12] + 11855 0056 0B1D adds r3, r1, #4 + 11856 0058 9E42 cmp r6, r3 + 11857 005a 18BF it ne + 11858 005c 0B2A cmpne r2, #11 + 11859 005e 60D9 bls .L2019 + 11860 0060 41EA0603 orr r3, r1, r6 + 11861 0064 5A07 lsls r2, r3, #29 + 11862 0066 5CD1 bne .L2019 + 11863 0068 A1F10800 sub r0, r1, #8 + 11864 006c 3246 mov r2, r6 + 11865 006e 0023 movs r3, #0 + 11866 .L2020: + 11867 0070 F0E90245 ldrd r4, [r0, #8]! + 11868 0074 0133 adds r3, r3, #1 + 11869 0076 4345 cmp r3, r8 + 11870 0078 E2E80245 strd r4, [r2], #8 + 11871 007c F8D3 bcc .L2020 + 11872 007e 029B ldr r3, [sp, #8] + 11873 0080 059A ldr r2, [sp, #20] + 11874 0082 9342 cmp r3, r2 + 11875 0084 01D0 beq .L2023 + 11876 0086 CB59 ldr r3, [r1, r7] + 11877 0088 F351 str r3, [r6, r7] + 11878 .L2023: + 11879 008a 5144 add r1, r1, r10 + 11880 008c 5644 add r6, r6, r10 + 11881 008e B9F1000F cmp r9, #0 + 11882 0092 54D0 beq .L2036 + 11883 .L2057: + 11884 0094 0023 movs r3, #0 + 11885 0096 DDF810E0 ldr lr, [sp, #16] + 11886 009a 4A46 mov r2, r9 + 11887 009c DC46 mov ip, fp + 11888 009e 1D46 mov r5, r3 + 11889 .L2025: + 11890 00a0 5CF8044B ldr r4, [ip], #4 + 11891 00a4 5EF8040B ldr r0, [lr], #4 + 11892 00a8 013A subs r2, r2, #1 + 11893 00aa C4FB0035 smlal r3, r5, r4, r0 + 11894 00ae F7D1 bne .L2025 + 11895 00b0 DB0F lsrs r3, r3, #31 + 11896 00b2 43EA4503 orr r3, r3, r5, lsl #1 + 11897 .L2024: + 11898 00b6 009A ldr r2, [sp] + 11899 00b8 42F8043B str r3, [r2], #4 + 11900 00bc 019B ldr r3, [sp, #4] + ARM GAS /tmp/ccdao7B1.s page 208 + + + 11901 00be 0092 str r2, [sp] + 11902 00c0 013B subs r3, r3, #1 + 11903 00c2 D344 add fp, fp, r10 + 11904 00c4 0193 str r3, [sp, #4] + 11905 00c6 C5D1 bne .L2026 + 11906 00c8 DDE90632 ldrd r3, r2, [sp, #24] + 11907 00cc 02FB0A3A mla r10, r2, r10, r3 + 11908 .L2018: + 11909 00d0 B9F10106 subs r6, r9, #1 + 11910 00d4 22D0 beq .L2017 + 11911 00d6 0699 ldr r1, [sp, #24] + 11912 00d8 0AF10402 add r2, r10, #4 + 11913 00dc A9F10203 sub r3, r9, #2 + 11914 00e0 9142 cmp r1, r2 + 11915 00e2 18BF it ne + 11916 00e4 0B2B cmpne r3, #11 + 11917 00e6 2CD9 bls .L2028 + 11918 00e8 41EA0A03 orr r3, r1, r10 + 11919 00ec 5B07 lsls r3, r3, #29 + 11920 00ee 28D1 bne .L2028 + 11921 00f0 A9F10303 sub r3, r9, #3 + 11922 00f4 5B08 lsrs r3, r3, #1 + 11923 00f6 0133 adds r3, r3, #1 + 11924 00f8 AAF10800 sub r0, r10, #8 + 11925 00fc 0022 movs r2, #0 + 11926 .L2029: + 11927 00fe F0E90245 ldrd r4, [r0, #8]! + 11928 0102 0132 adds r2, r2, #1 + 11929 0104 9A42 cmp r2, r3 + 11930 0106 E1E80245 strd r4, [r1], #8 + 11931 010a F8D3 bcc .L2029 + 11932 010c B6EB430F cmp r6, r3, lsl #1 + 11933 0110 04D0 beq .L2017 + 11934 0112 0699 ldr r1, [sp, #24] + 11935 0114 5AF83320 ldr r2, [r10, r3, lsl #3] + 11936 0118 41F83320 str r2, [r1, r3, lsl #3] + 11937 .L2017: + 11938 011c 09B0 add sp, sp, #36 + 11939 @ sp needed + 11940 011e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11941 .L2019: + 11942 0122 029B ldr r3, [sp, #8] + 11943 0124 301F subs r0, r6, #4 + 11944 0126 0A46 mov r2, r1 + 11945 .L2022: + 11946 0128 52F8044B ldr r4, [r2], #4 + 11947 012c 40F8044F str r4, [r0, #4]! + 11948 0130 013B subs r3, r3, #1 + 11949 0132 F9D1 bne .L2022 + 11950 0134 5144 add r1, r1, r10 + 11951 0136 5644 add r6, r6, r10 + 11952 0138 B9F1000F cmp r9, #0 + 11953 013c AAD1 bne .L2057 + 11954 .L2036: + 11955 013e 4B46 mov r3, r9 + 11956 0140 B9E7 b .L2024 + 11957 .L2028: + ARM GAS /tmp/ccdao7B1.s page 209 + + + 11958 0142 069B ldr r3, [sp, #24] + 11959 0144 043B subs r3, r3, #4 + 11960 0146 00E0 b .L2033 + 11961 .L2058: + 11962 0148 0432 adds r2, r2, #4 + 11963 .L2033: + 11964 014a 52F8041C ldr r1, [r2, #-4] + 11965 014e 43F8041F str r1, [r3, #4]! + 11966 0152 013E subs r6, r6, #1 + 11967 0154 F8D1 bne .L2058 + 11968 0156 09B0 add sp, sp, #36 + 11969 @ sp needed + 11970 0158 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11971 .L2035: + 11972 015c DDF818A0 ldr r10, [sp, #24] + 11973 0160 B6E7 b .L2018 + 11975 0162 00BF .section .text.arm_fir_f32,"ax",%progbits + 11976 .align 1 + 11977 .p2align 2,,3 + 11978 .global arm_fir_f32 + 11979 .syntax unified + 11980 .thumb + 11981 .thumb_func + 11982 .fpu fpv4-sp-d16 + 11984 arm_fir_f32: + 11985 @ args = 0, pretend = 0, frame = 0 + 11986 @ frame_needed = 0, uses_anonymous_args = 0 + 11987 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 11988 0004 0488 ldrh r4, [r0] + 11989 0006 D0F80480 ldr r8, [r0, #4] + 11990 000a D0F80890 ldr r9, [r0, #8] + 11991 000e 04F18040 add r0, r4, #1073741824 + 11992 0012 0138 subs r0, r0, #1 + 11993 0014 08EB8007 add r7, r8, r0, lsl #2 + 11994 0018 2BB3 cbz r3, .L2066 + 11995 001a 1D46 mov r5, r3 + 11996 001c 4646 mov r6, r8 + 11997 .L2063: + 11998 001e 51F8040B ldr r0, [r1], #4 @ float + 11999 0022 47F8040B str r0, [r7], #4 @ float + 12000 0026 DFED117A vldr.32 s15, .L2075 + 12001 002a 54B1 cbz r4, .L2061 + 12002 002c 2046 mov r0, r4 + 12003 002e CE46 mov lr, r9 + 12004 0030 B446 mov ip, r6 + 12005 .L2062: + 12006 0032 FCEC016A vldmia.32 ip!, {s13} + 12007 0036 BEEC017A vldmia.32 lr!, {s14} + 12008 003a 0138 subs r0, r0, #1 + 12009 003c E6EE877A vfma.f32 s15, s13, s14 + 12010 0040 F7D1 bne .L2062 + 12011 .L2061: + 12012 0042 013D subs r5, r5, #1 + 12013 0044 E2EC017A vstmia.32 r2!, {s15} + 12014 0048 06F10406 add r6, r6, #4 + 12015 004c E7D1 bne .L2063 + 12016 004e 08EB8302 add r2, r8, r3, lsl #2 + ARM GAS /tmp/ccdao7B1.s page 210 + + + 12017 .L2060: + 12018 0052 631E subs r3, r4, #1 + 12019 0054 05D0 beq .L2059 + 12020 .L2065: + 12021 0056 52F8041B ldr r1, [r2], #4 @ float + 12022 005a 48F8041B str r1, [r8], #4 @ float + 12023 005e 013B subs r3, r3, #1 + 12024 0060 F9D1 bne .L2065 + 12025 .L2059: + 12026 0062 BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 12027 .L2066: + 12028 0066 4246 mov r2, r8 + 12029 0068 F3E7 b .L2060 + 12030 .L2076: + 12031 006a 00BF .align 2 + 12032 .L2075: + 12033 006c 00000000 .word 0 + 12035 .section .text.arm_fir_fast_q15,"ax",%progbits + 12036 .align 1 + 12037 .p2align 2,,3 + 12038 .global arm_fir_fast_q15 + 12039 .syntax unified + 12040 .thumb + 12041 .thumb_func + 12042 .fpu fpv4-sp-d16 + 12044 arm_fir_fast_q15: + 12045 @ args = 0, pretend = 0, frame = 8 + 12046 @ frame_needed = 0, uses_anonymous_args = 0 + 12047 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12048 0004 D0F804A0 ldr r10, [r0, #4] + 12049 0008 B0F800B0 ldrh fp, [r0] + 12050 000c 8568 ldr r5, [r0, #8] + 12051 000e 83B0 sub sp, sp, #12 + 12052 0010 002B cmp r3, #0 + 12053 0012 66D0 beq .L2087 + 12054 0014 0BF10040 add r0, fp, #-2147483648 + 12055 0018 0138 subs r0, r0, #1 + 12056 001a 4000 lsls r0, r0, #1 + 12057 001c 0238 subs r0, r0, #2 + 12058 001e 9C46 mov ip, r3 + 12059 0020 0AEB0009 add r9, r10, r0 + 12060 0024 4FEA5B07 lsr r7, fp, #1 + 12061 0028 0AF1020E add lr, r10, #2 + 12062 002c 9846 mov r8, r3 + 12063 002e AE1C adds r6, r5, #2 + 12064 0030 5446 mov r4, r10 + 12065 .L2080: + 12066 0032 31F9020B ldrsh r0, [r1], #2 + 12067 0036 29F8020F strh r0, [r9, #2]! @ movhi + 12068 003a CDE90012 strd r1, r2, [sp] + 12069 003e 0023 movs r3, #0 + 12070 0040 AEF1020A sub r10, lr, #2 + 12071 0044 1846 mov r0, r3 + 12072 .L2079: + 12073 0046 3AF82320 ldrh r2, [r10, r3, lsl #2] + 12074 004a 35F82310 ldrh r1, [r5, r3, lsl #2] + 12075 004e 12FB0100 smlabb r0, r2, r1, r0 + ARM GAS /tmp/ccdao7B1.s page 211 + + + 12076 0052 3EF82320 ldrh r2, [lr, r3, lsl #2] + 12077 0056 36F82310 ldrh r1, [r6, r3, lsl #2] + 12078 005a 0133 adds r3, r3, #1 + 12079 005c 9F42 cmp r7, r3 + 12080 005e 12FB0100 smlabb r0, r2, r1, r0 + 12081 0062 F0D1 bne .L2079 + 12082 0064 DDE90012 ldrd r1, r2, [sp] + 12083 0068 B8F10108 subs r8, r8, #1 + 12084 006c 4FEAE030 asr r0, r0, #15 + 12085 0070 0EF1020E add lr, lr, #2 + 12086 .syntax unified + 12087 @ 276 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c" 1 + 12088 0074 00F30F00 ssat r0, #16, r0 + 12089 @ 0 "" 2 + 12090 .thumb + 12091 .syntax unified + 12092 0078 22F8020B strh r0, [r2], #2 @ movhi + 12093 007c D9D1 bne .L2080 + 12094 007e A246 mov r10, r4 + 12095 0080 04EB4C01 add r1, r4, ip, lsl #1 + 12096 .L2078: + 12097 0084 BBF10106 subs r6, fp, #1 + 12098 0088 1BD0 beq .L2077 + 12099 008a 8B1C adds r3, r1, #2 + 12100 008c 9A45 cmp r10, r3 + 12101 008e 1BD0 beq .L2082 + 12102 0090 ABF10202 sub r2, fp, #2 + 12103 0094 092A cmp r2, #9 + 12104 0096 17D9 bls .L2082 + 12105 0098 ABF10303 sub r3, fp, #3 + 12106 009c 5B08 lsrs r3, r3, #1 + 12107 009e 0133 adds r3, r3, #1 + 12108 00a0 0C46 mov r4, r1 + 12109 00a2 5046 mov r0, r10 + 12110 00a4 0022 movs r2, #0 + 12111 .L2083: + 12112 00a6 0132 adds r2, r2, #1 + 12113 00a8 54F8045B ldr r5, [r4], #4 @ unaligned + 12114 00ac 40F8045B str r5, [r0], #4 @ unaligned + 12115 00b0 9A42 cmp r2, r3 + 12116 00b2 F8D3 bcc .L2083 + 12117 00b4 B6EB430F cmp r6, r3, lsl #1 + 12118 00b8 03D0 beq .L2077 + 12119 00ba 31F92320 ldrsh r2, [r1, r3, lsl #2] + 12120 00be 2AF82320 strh r2, [r10, r3, lsl #2] @ movhi + 12121 .L2077: + 12122 00c2 03B0 add sp, sp, #12 + 12123 @ sp needed + 12124 00c4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12125 .L2082: + 12126 00c8 AAF1020A sub r10, r10, #2 + 12127 00cc 00E0 b .L2085 + 12128 .L2103: + 12129 00ce 0233 adds r3, r3, #2 + 12130 .L2085: + 12131 00d0 33F9022C ldrsh r2, [r3, #-2] + 12132 00d4 2AF8022F strh r2, [r10, #2]! @ movhi + ARM GAS /tmp/ccdao7B1.s page 212 + + + 12133 00d8 013E subs r6, r6, #1 + 12134 00da F8D1 bne .L2103 + 12135 00dc 03B0 add sp, sp, #12 + 12136 @ sp needed + 12137 00de BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12138 .L2087: + 12139 00e2 5146 mov r1, r10 + 12140 00e4 CEE7 b .L2078 + 12142 00e6 00BF .section .text.arm_fir_fast_q31,"ax",%progbits + 12143 .align 1 + 12144 .p2align 2,,3 + 12145 .global arm_fir_fast_q31 + 12146 .syntax unified + 12147 .thumb + 12148 .thumb_func + 12149 .fpu fpv4-sp-d16 + 12151 arm_fir_fast_q31: + 12152 @ args = 0, pretend = 0, frame = 16 + 12153 @ frame_needed = 0, uses_anonymous_args = 0 + 12154 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12155 0004 85B0 sub sp, sp, #20 + 12156 0006 4468 ldr r4, [r0, #4] + 12157 0008 B0F80080 ldrh r8, [r0] + 12158 000c 8068 ldr r0, [r0, #8] + 12159 000e 0294 str r4, [sp, #8] + 12160 0010 0190 str r0, [sp, #4] + 12161 0012 0393 str r3, [sp, #12] + 12162 0014 002B cmp r3, #0 + 12163 0016 60D0 beq .L2114 + 12164 0018 08F18040 add r0, r8, #1073741824 + 12165 001c 0138 subs r0, r0, #1 + 12166 001e 8000 lsls r0, r0, #2 + 12167 0020 0438 subs r0, r0, #4 + 12168 0022 04EB000B add fp, r4, r0 + 12169 0026 9A46 mov r10, r3 + 12170 0028 A146 mov r9, r4 + 12171 002a 0027 movs r7, #0 + 12172 .L2107: + 12173 002c 51F8043B ldr r3, [r1], #4 + 12174 0030 4BF8043F str r3, [fp, #4]! + 12175 0034 DDF804E0 ldr lr, [sp, #4] + 12176 0038 4446 mov r4, r8 + 12177 003a CC46 mov ip, r9 + 12178 003c 0020 movs r0, #0 + 12179 .L2106: + 12180 003e 5CF8046B ldr r6, [ip], #4 + 12181 0042 5EF8045B ldr r5, [lr], #4 + 12182 0046 3B46 mov r3, r7 + 12183 0048 C6FB0530 smlal r3, r0, r6, r5 + 12184 004c 13F10043 adds r3, r3, #-2147483648 + 12185 0050 40F10000 adc r0, r0, #0 + 12186 0054 013C subs r4, r4, #1 + 12187 0056 F2D1 bne .L2106 + 12188 0058 4000 lsls r0, r0, #1 + 12189 005a BAF1010A subs r10, r10, #1 + 12190 005e 42F8040B str r0, [r2], #4 + 12191 0062 09F10409 add r9, r9, #4 + ARM GAS /tmp/ccdao7B1.s page 213 + + + 12192 0066 E1D1 bne .L2107 + 12193 0068 DDE90232 ldrd r3, r2, [sp, #8] + 12194 006c 03EB8206 add r6, r3, r2, lsl #2 + 12195 .L2105: + 12196 0070 B8F10107 subs r7, r8, #1 + 12197 0074 21D0 beq .L2104 + 12198 0076 0299 ldr r1, [sp, #8] + 12199 0078 321D adds r2, r6, #4 + 12200 007a A8F10203 sub r3, r8, #2 + 12201 007e 9142 cmp r1, r2 + 12202 0080 18BF it ne + 12203 0082 0B2B cmpne r3, #11 + 12204 0084 1CD9 bls .L2109 + 12205 0086 41EA0603 orr r3, r1, r6 + 12206 008a 5B07 lsls r3, r3, #29 + 12207 008c 18D1 bne .L2109 + 12208 008e A8F10303 sub r3, r8, #3 + 12209 0092 5B08 lsrs r3, r3, #1 + 12210 0094 0133 adds r3, r3, #1 + 12211 0096 A6F10800 sub r0, r6, #8 + 12212 009a 0022 movs r2, #0 + 12213 .L2110: + 12214 009c F0E90245 ldrd r4, [r0, #8]! + 12215 00a0 0132 adds r2, r2, #1 + 12216 00a2 9A42 cmp r2, r3 + 12217 00a4 E1E80245 strd r4, [r1], #8 + 12218 00a8 F8D3 bcc .L2110 + 12219 00aa B7EB430F cmp r7, r3, lsl #1 + 12220 00ae 04D0 beq .L2104 + 12221 00b0 0299 ldr r1, [sp, #8] + 12222 00b2 56F83320 ldr r2, [r6, r3, lsl #3] + 12223 00b6 41F83320 str r2, [r1, r3, lsl #3] + 12224 .L2104: + 12225 00ba 05B0 add sp, sp, #20 + 12226 @ sp needed + 12227 00bc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12228 .L2109: + 12229 00c0 029B ldr r3, [sp, #8] + 12230 00c2 043B subs r3, r3, #4 + 12231 00c4 00E0 b .L2112 + 12232 .L2130: + 12233 00c6 0432 adds r2, r2, #4 + 12234 .L2112: + 12235 00c8 52F8041C ldr r1, [r2, #-4] + 12236 00cc 43F8041F str r1, [r3, #4]! + 12237 00d0 013F subs r7, r7, #1 + 12238 00d2 F8D1 bne .L2130 + 12239 00d4 05B0 add sp, sp, #20 + 12240 @ sp needed + 12241 00d6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12242 .L2114: + 12243 00da 2646 mov r6, r4 + 12244 00dc C8E7 b .L2105 + 12246 00de 00BF .section .text.arm_fir_init_f32,"ax",%progbits + 12247 .align 1 + 12248 .p2align 2,,3 + 12249 .global arm_fir_init_f32 + ARM GAS /tmp/ccdao7B1.s page 214 + + + 12250 .syntax unified + 12251 .thumb + 12252 .thumb_func + 12253 .fpu fpv4-sp-d16 + 12255 arm_fir_init_f32: + 12256 @ args = 4, pretend = 0, frame = 0 + 12257 @ frame_needed = 0, uses_anonymous_args = 0 + 12258 0000 10B5 push {r4, lr} + 12259 0002 0446 mov r4, r0 + 12260 0004 0298 ldr r0, [sp, #8] + 12261 0006 2180 strh r1, [r4] @ movhi + 12262 0008 00F1FF3C add ip, r0, #-1 + 12263 000c 8C44 add ip, ip, r1 + 12264 000e A260 str r2, [r4, #8] + 12265 0010 0021 movs r1, #0 + 12266 0012 4FEA8C02 lsl r2, ip, #2 + 12267 0016 1846 mov r0, r3 + 12268 0018 FFF7FEFF bl memset + 12269 001c 6060 str r0, [r4, #4] + 12270 001e 10BD pop {r4, pc} + 12272 .section .text.arm_fir_init_q15,"ax",%progbits + 12273 .align 1 + 12274 .p2align 2,,3 + 12275 .global arm_fir_init_q15 + 12276 .syntax unified + 12277 .thumb + 12278 .thumb_func + 12279 .fpu fpv4-sp-d16 + 12281 arm_fir_init_q15: + 12282 @ args = 4, pretend = 0, frame = 0 + 12283 @ frame_needed = 0, uses_anonymous_args = 0 + 12284 0000 38B5 push {r3, r4, r5, lr} + 12285 0002 11F00105 ands r5, r1, #1 + 12286 0006 0CD1 bne .L2135 + 12287 0008 0446 mov r4, r0 + 12288 000a 0180 strh r1, [r0] @ movhi + 12289 000c 0498 ldr r0, [sp, #16] + 12290 000e A260 str r2, [r4, #8] + 12291 0010 0144 add r1, r1, r0 + 12292 0012 4A00 lsls r2, r1, #1 + 12293 0014 1846 mov r0, r3 + 12294 0016 2946 mov r1, r5 + 12295 0018 FFF7FEFF bl memset + 12296 001c 6060 str r0, [r4, #4] + 12297 001e 2846 mov r0, r5 + 12298 0020 38BD pop {r3, r4, r5, pc} + 12299 .L2135: + 12300 0022 4FF0FF30 mov r0, #-1 + 12301 0026 38BD pop {r3, r4, r5, pc} + 12303 .section .text.arm_fir_init_q31,"ax",%progbits + 12304 .align 1 + 12305 .p2align 2,,3 + 12306 .global arm_fir_init_q31 + 12307 .syntax unified + 12308 .thumb + 12309 .thumb_func + 12310 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccdao7B1.s page 215 + + + 12312 arm_fir_init_q31: + 12313 @ args = 4, pretend = 0, frame = 0 + 12314 @ frame_needed = 0, uses_anonymous_args = 0 + 12315 0000 10B5 push {r4, lr} + 12316 0002 0446 mov r4, r0 + 12317 0004 0298 ldr r0, [sp, #8] + 12318 0006 2180 strh r1, [r4] @ movhi + 12319 0008 00F1FF3C add ip, r0, #-1 + 12320 000c 8C44 add ip, ip, r1 + 12321 000e A260 str r2, [r4, #8] + 12322 0010 0021 movs r1, #0 + 12323 0012 4FEA8C02 lsl r2, ip, #2 + 12324 0016 1846 mov r0, r3 + 12325 0018 FFF7FEFF bl memset + 12326 001c 6060 str r0, [r4, #4] + 12327 001e 10BD pop {r4, pc} + 12329 .section .text.arm_fir_init_q7,"ax",%progbits + 12330 .align 1 + 12331 .p2align 2,,3 + 12332 .global arm_fir_init_q7 + 12333 .syntax unified + 12334 .thumb + 12335 .thumb_func + 12336 .fpu fpv4-sp-d16 + 12338 arm_fir_init_q7: + 12339 @ args = 4, pretend = 0, frame = 0 + 12340 @ frame_needed = 0, uses_anonymous_args = 0 + 12341 0000 10B5 push {r4, lr} + 12342 0002 0446 mov r4, r0 + 12343 0004 0298 ldr r0, [sp, #8] + 12344 0006 2180 strh r1, [r4] @ movhi + 12345 0008 0138 subs r0, r0, #1 + 12346 000a A260 str r2, [r4, #8] + 12347 000c 4218 adds r2, r0, r1 + 12348 000e 0021 movs r1, #0 + 12349 0010 1846 mov r0, r3 + 12350 0012 FFF7FEFF bl memset + 12351 0016 6060 str r0, [r4, #4] + 12352 0018 10BD pop {r4, pc} + 12354 001a 00BF .section .text.arm_fir_interpolate_f32,"ax",%progbits + 12355 .align 1 + 12356 .p2align 2,,3 + 12357 .global arm_fir_interpolate_f32 + 12358 .syntax unified + 12359 .thumb + 12360 .thumb_func + 12361 .fpu fpv4-sp-d16 + 12363 arm_fir_interpolate_f32: + 12364 @ args = 0, pretend = 0, frame = 8 + 12365 @ frame_needed = 0, uses_anonymous_args = 0 + 12366 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12367 0004 4488 ldrh r4, [r0, #2] + 12368 0006 8668 ldr r6, [r0, #8] + 12369 0008 D0F804B0 ldr fp, [r0, #4] + 12370 000c 83B0 sub sp, sp, #12 + 12371 000e 1546 mov r5, r2 + 12372 0010 04F18042 add r2, r4, #1073741824 + ARM GAS /tmp/ccdao7B1.s page 216 + + + 12373 0014 013A subs r2, r2, #1 + 12374 0016 0096 str r6, [sp] + 12375 0018 06EB8202 add r2, r6, r2, lsl #2 + 12376 001c 0193 str r3, [sp, #4] + 12377 001e 002B cmp r3, #0 + 12378 0020 68D0 beq .L2156 + 12379 0022 90F80090 ldrb r9, [r0] @ zero_extendqisi2 + 12380 0026 B9F1010F cmp r9, #1 + 12381 002a 8A46 mov r10, r1 + 12382 002c 4FEA890E lsl lr, r9, #2 + 12383 0030 35D1 bne .L2173 + 12384 0032 9946 mov r9, r3 + 12385 0034 9046 mov r8, r2 + 12386 .L2152: + 12387 0036 5AF8043B ldr r3, [r10], #4 @ float + 12388 003a 48F8043B str r3, [r8], #4 @ float + 12389 003e 05EB0E0C add ip, r5, lr + 12390 0042 5F46 mov r7, fp + 12391 0044 2846 mov r0, r5 + 12392 .L2151: + 12393 0046 DFED2C7A vldr.32 s15, .L2174 + 12394 004a 3B46 mov r3, r7 + 12395 004c 54B1 cbz r4, .L2153 + 12396 004e 2246 mov r2, r4 + 12397 0050 3146 mov r1, r6 + 12398 .L2150: + 12399 0052 D3ED006A vldr.32 s13, [r3] + 12400 0056 B1EC017A vldmia.32 r1!, {s14} + 12401 005a 013A subs r2, r2, #1 + 12402 005c E6EE877A vfma.f32 s15, s13, s14 + 12403 0060 7344 add r3, r3, lr + 12404 0062 F6D1 bne .L2150 + 12405 .L2153: + 12406 0064 E0EC017A vstmia.32 r0!, {s15} + 12407 0068 6045 cmp r0, ip + 12408 006a A7F10407 sub r7, r7, #4 + 12409 006e EAD1 bne .L2151 + 12410 0070 B9F10109 subs r9, r9, #1 + 12411 0074 05F10405 add r5, r5, #4 + 12412 0078 06F10406 add r6, r6, #4 + 12413 007c DBD1 bne .L2152 + 12414 .L2149: + 12415 007e DDE90032 ldrd r3, r2, [sp] + 12416 0082 03EB8202 add r2, r3, r2, lsl #2 + 12417 .L2142: + 12418 0086 013C subs r4, r4, #1 + 12419 0088 06D0 beq .L2141 + 12420 008a 009B ldr r3, [sp] + 12421 .L2155: + 12422 008c 52F8041B ldr r1, [r2], #4 @ float + 12423 0090 43F8041B str r1, [r3], #4 @ float + 12424 0094 013C subs r4, r4, #1 + 12425 0096 F9D1 bne .L2155 + 12426 .L2141: + 12427 0098 03B0 add sp, sp, #12 + 12428 @ sp needed + 12429 009a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + ARM GAS /tmp/ccdao7B1.s page 217 + + + 12430 .L2173: + 12431 009e 9846 mov r8, r3 + 12432 00a0 09F1FF33 add r3, r9, #-1 + 12433 00a4 9446 mov ip, r2 + 12434 00a6 0BEB830B add fp, fp, r3, lsl #2 + 12435 .L2148: + 12436 00aa 5AF8043B ldr r3, [r10], #4 @ float + 12437 00ae 4CF8043B str r3, [ip], #4 @ float + 12438 00b2 B9F1000F cmp r9, #0 + 12439 00b6 17D0 beq .L2144 + 12440 00b8 05EB0E07 add r7, r5, lr + 12441 00bc 5846 mov r0, fp + 12442 .L2147: + 12443 00be DFED0E7A vldr.32 s15, .L2174 + 12444 00c2 0346 mov r3, r0 + 12445 00c4 54B1 cbz r4, .L2145 + 12446 00c6 2246 mov r2, r4 + 12447 00c8 3146 mov r1, r6 + 12448 .L2146: + 12449 00ca 93ED007A vldr.32 s14, [r3] + 12450 00ce F1EC016A vldmia.32 r1!, {s13} + 12451 00d2 013A subs r2, r2, #1 + 12452 00d4 E6EE877A vfma.f32 s15, s13, s14 + 12453 00d8 7344 add r3, r3, lr + 12454 00da F6D1 bne .L2146 + 12455 .L2145: + 12456 00dc E5EC017A vstmia.32 r5!, {s15} + 12457 00e0 BD42 cmp r5, r7 + 12458 00e2 A0F10400 sub r0, r0, #4 + 12459 00e6 EAD1 bne .L2147 + 12460 .L2144: + 12461 00e8 B8F10108 subs r8, r8, #1 + 12462 00ec 06F10406 add r6, r6, #4 + 12463 00f0 DBD1 bne .L2148 + 12464 00f2 C4E7 b .L2149 + 12465 .L2156: + 12466 00f4 3246 mov r2, r6 + 12467 00f6 C6E7 b .L2142 + 12468 .L2175: + 12469 .align 2 + 12470 .L2174: + 12471 00f8 00000000 .word 0 + 12473 .section .text.arm_fir_interpolate_init_f32,"ax",%progbits + 12474 .align 1 + 12475 .p2align 2,,3 + 12476 .global arm_fir_interpolate_init_f32 + 12477 .syntax unified + 12478 .thumb + 12479 .thumb_func + 12480 .fpu fpv4-sp-d16 + 12482 arm_fir_interpolate_init_f32: + 12483 @ args = 8, pretend = 0, frame = 0 + 12484 @ frame_needed = 0, uses_anonymous_args = 0 + 12485 0000 70B5 push {r4, r5, r6, lr} + 12486 0002 0546 mov r5, r0 + 12487 0004 B2FBF1F0 udiv r0, r2, r1 + 12488 0008 01FB1024 mls r4, r1, r0, r2 + ARM GAS /tmp/ccdao7B1.s page 218 + + + 12489 000c 049E ldr r6, [sp, #16] + 12490 000e 6CB9 cbnz r4, .L2178 + 12491 0010 6B60 str r3, [r5, #4] + 12492 0012 059B ldr r3, [sp, #20] + 12493 0014 2970 strb r1, [r5] + 12494 0016 5A1E subs r2, r3, #1 + 12495 0018 0244 add r2, r2, r0 + 12496 001a 6880 strh r0, [r5, #2] @ movhi + 12497 001c 9200 lsls r2, r2, #2 + 12498 001e 2146 mov r1, r4 + 12499 0020 3046 mov r0, r6 + 12500 0022 FFF7FEFF bl memset + 12501 0026 AE60 str r6, [r5, #8] + 12502 0028 2046 mov r0, r4 + 12503 002a 70BD pop {r4, r5, r6, pc} + 12504 .L2178: + 12505 002c 6FF00100 mvn r0, #1 + 12506 0030 70BD pop {r4, r5, r6, pc} + 12508 0032 00BF .section .text.arm_fir_interpolate_init_q15,"ax",%progbits + 12509 .align 1 + 12510 .p2align 2,,3 + 12511 .global arm_fir_interpolate_init_q15 + 12512 .syntax unified + 12513 .thumb + 12514 .thumb_func + 12515 .fpu fpv4-sp-d16 + 12517 arm_fir_interpolate_init_q15: + 12518 @ args = 8, pretend = 0, frame = 0 + 12519 @ frame_needed = 0, uses_anonymous_args = 0 + 12520 0000 70B5 push {r4, r5, r6, lr} + 12521 0002 0546 mov r5, r0 + 12522 0004 B2FBF1F0 udiv r0, r2, r1 + 12523 0008 01FB1024 mls r4, r1, r0, r2 + 12524 000c 049E ldr r6, [sp, #16] + 12525 000e 6CB9 cbnz r4, .L2182 + 12526 0010 6B60 str r3, [r5, #4] + 12527 0012 059B ldr r3, [sp, #20] + 12528 0014 2970 strb r1, [r5] + 12529 0016 5A1E subs r2, r3, #1 + 12530 0018 0244 add r2, r2, r0 + 12531 001a 6880 strh r0, [r5, #2] @ movhi + 12532 001c 5200 lsls r2, r2, #1 + 12533 001e 2146 mov r1, r4 + 12534 0020 3046 mov r0, r6 + 12535 0022 FFF7FEFF bl memset + 12536 0026 AE60 str r6, [r5, #8] + 12537 0028 2046 mov r0, r4 + 12538 002a 70BD pop {r4, r5, r6, pc} + 12539 .L2182: + 12540 002c 6FF00100 mvn r0, #1 + 12541 0030 70BD pop {r4, r5, r6, pc} + 12543 0032 00BF .section .text.arm_fir_interpolate_init_q31,"ax",%progbits + 12544 .align 1 + 12545 .p2align 2,,3 + 12546 .global arm_fir_interpolate_init_q31 + 12547 .syntax unified + 12548 .thumb + ARM GAS /tmp/ccdao7B1.s page 219 + + + 12549 .thumb_func + 12550 .fpu fpv4-sp-d16 + 12552 arm_fir_interpolate_init_q31: + 12553 @ args = 8, pretend = 0, frame = 0 + 12554 @ frame_needed = 0, uses_anonymous_args = 0 + 12555 0000 70B5 push {r4, r5, r6, lr} + 12556 0002 0546 mov r5, r0 + 12557 0004 B2FBF1F0 udiv r0, r2, r1 + 12558 0008 01FB1024 mls r4, r1, r0, r2 + 12559 000c 049E ldr r6, [sp, #16] + 12560 000e 6CB9 cbnz r4, .L2186 + 12561 0010 6B60 str r3, [r5, #4] + 12562 0012 059B ldr r3, [sp, #20] + 12563 0014 2970 strb r1, [r5] + 12564 0016 5A1E subs r2, r3, #1 + 12565 0018 0244 add r2, r2, r0 + 12566 001a 6880 strh r0, [r5, #2] @ movhi + 12567 001c 9200 lsls r2, r2, #2 + 12568 001e 2146 mov r1, r4 + 12569 0020 3046 mov r0, r6 + 12570 0022 FFF7FEFF bl memset + 12571 0026 AE60 str r6, [r5, #8] + 12572 0028 2046 mov r0, r4 + 12573 002a 70BD pop {r4, r5, r6, pc} + 12574 .L2186: + 12575 002c 6FF00100 mvn r0, #1 + 12576 0030 70BD pop {r4, r5, r6, pc} + 12578 0032 00BF .section .text.arm_fir_interpolate_q15,"ax",%progbits + 12579 .align 1 + 12580 .p2align 2,,3 + 12581 .global arm_fir_interpolate_q15 + 12582 .syntax unified + 12583 .thumb + 12584 .thumb_func + 12585 .fpu fpv4-sp-d16 + 12587 arm_fir_interpolate_q15: + 12588 @ args = 0, pretend = 0, frame = 24 + 12589 @ frame_needed = 0, uses_anonymous_args = 0 + 12590 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12591 0004 B0F80280 ldrh r8, [r0, #2] + 12592 0008 8468 ldr r4, [r0, #8] + 12593 000a 87B0 sub sp, sp, #28 + 12594 000c 9146 mov r9, r2 + 12595 000e 4268 ldr r2, [r0, #4] + 12596 0010 0492 str r2, [sp, #16] + 12597 0012 08F10042 add r2, r8, #-2147483648 + 12598 0016 013A subs r2, r2, #1 + 12599 0018 0091 str r1, [sp] + 12600 001a 0394 str r4, [sp, #12] + 12601 001c 04EB4201 add r1, r4, r2, lsl #1 + 12602 0020 0593 str r3, [sp, #20] + 12603 0022 002B cmp r3, #0 + 12604 0024 00F0B180 beq .L2209 + 12605 0028 90F800B0 ldrb fp, [r0] @ zero_extendqisi2 + 12606 002c BBF1010F cmp fp, #1 + 12607 0030 4FEA4B02 lsl r2, fp, #1 + 12608 0034 5ED1 bne .L2231 + ARM GAS /tmp/ccdao7B1.s page 220 + + + 12609 0036 8B1E subs r3, r1, #2 + 12610 0038 0293 str r3, [sp, #8] + 12611 003a 059B ldr r3, [sp, #20] + 12612 003c 0193 str r3, [sp, #4] + 12613 003e A246 mov r10, r4 + 12614 .L2199: + 12615 0040 0099 ldr r1, [sp] + 12616 0042 DDF810E0 ldr lr, [sp, #16] + 12617 0046 31F9023B ldrsh r3, [r1], #2 + 12618 004a 0091 str r1, [sp] + 12619 004c 0299 ldr r1, [sp, #8] + 12620 004e 21F8023F strh r3, [r1, #2]! @ movhi + 12621 0052 09EB020B add fp, r9, r2 + 12622 0056 0291 str r1, [sp, #8] + 12623 0058 CC46 mov ip, r9 + 12624 .L2198: + 12625 005a 7346 mov r3, lr + 12626 005c B8F1000F cmp r8, #0 + 12627 0060 46D0 beq .L2232 + 12628 0062 4146 mov r1, r8 + 12629 0064 5046 mov r0, r10 + 12630 0066 0024 movs r4, #0 + 12631 0068 0025 movs r5, #0 + 12632 .L2197: + 12633 006a 1F88 ldrh r7, [r3] + 12634 006c 30F8026B ldrh r6, [r0], #2 + 12635 0070 0139 subs r1, r1, #1 + 12636 0072 1344 add r3, r3, r2 + 12637 0074 C7FB8645 smlalbb r4, r5, r7, r6 + 12638 0078 F7D1 bne .L2197 + 12639 007a E30B lsrs r3, r4, #15 + 12640 007c 43EA4543 orr r3, r3, r5, lsl #17 + 12641 .L2200: + 12642 .syntax unified + 12643 @ 623 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q1 + 12644 0080 03F30F03 ssat r3, #16, r3 + 12645 @ 0 "" 2 + 12646 .thumb + 12647 .syntax unified + 12648 0084 2CF8023B strh r3, [ip], #2 @ movhi + 12649 0088 DC45 cmp ip, fp + 12650 008a AEF1020E sub lr, lr, #2 + 12651 008e E4D1 bne .L2198 + 12652 0090 019B ldr r3, [sp, #4] + 12653 0092 013B subs r3, r3, #1 + 12654 0094 09F10209 add r9, r9, #2 + 12655 0098 0AF1020A add r10, r10, #2 + 12656 009c 0193 str r3, [sp, #4] + 12657 009e CFD1 bne .L2199 + 12658 .L2196: + 12659 00a0 039B ldr r3, [sp, #12] + 12660 00a2 059A ldr r2, [sp, #20] + 12661 00a4 03EB4201 add r1, r3, r2, lsl #1 + 12662 .L2189: + 12663 00a8 B8F10106 subs r6, r8, #1 + 12664 00ac 1DD0 beq .L2188 + 12665 00ae A8F10203 sub r3, r8, #2 + ARM GAS /tmp/ccdao7B1.s page 221 + + + 12666 00b2 092B cmp r3, #9 + 12667 00b4 01F10202 add r2, r1, #2 + 12668 00b8 5AD9 bls .L2202 + 12669 00ba 0398 ldr r0, [sp, #12] + 12670 00bc 9042 cmp r0, r2 + 12671 00be 57D0 beq .L2202 + 12672 00c0 A8F10303 sub r3, r8, #3 + 12673 00c4 5B08 lsrs r3, r3, #1 + 12674 00c6 0133 adds r3, r3, #1 + 12675 00c8 0C46 mov r4, r1 + 12676 00ca 0022 movs r2, #0 + 12677 .L2203: + 12678 00cc 0132 adds r2, r2, #1 + 12679 00ce 54F8045B ldr r5, [r4], #4 @ unaligned + 12680 00d2 40F8045B str r5, [r0], #4 @ unaligned + 12681 00d6 9A42 cmp r2, r3 + 12682 00d8 F8D3 bcc .L2203 + 12683 00da B6EB430F cmp r6, r3, lsl #1 + 12684 00de 04D0 beq .L2188 + 12685 00e0 31F92320 ldrsh r2, [r1, r3, lsl #2] + 12686 00e4 0399 ldr r1, [sp, #12] + 12687 00e6 21F82320 strh r2, [r1, r3, lsl #2] @ movhi + 12688 .L2188: + 12689 00ea 07B0 add sp, sp, #28 + 12690 @ sp needed + 12691 00ec BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12692 .L2232: + 12693 00f0 4346 mov r3, r8 + 12694 00f2 C5E7 b .L2200 + 12695 .L2231: + 12696 00f4 8B1E subs r3, r1, #2 + 12697 00f6 0499 ldr r1, [sp, #16] + 12698 00f8 0293 str r3, [sp, #8] + 12699 00fa 0BF1FF33 add r3, fp, #-1 + 12700 00fe 01EB4303 add r3, r1, r3, lsl #1 + 12701 0102 0493 str r3, [sp, #16] + 12702 0104 059B ldr r3, [sp, #20] + 12703 0106 0193 str r3, [sp, #4] + 12704 0108 A646 mov lr, r4 + 12705 .L2195: + 12706 010a 0099 ldr r1, [sp] + 12707 010c 31F9023B ldrsh r3, [r1], #2 + 12708 0110 0091 str r1, [sp] + 12709 0112 0299 ldr r1, [sp, #8] + 12710 0114 21F8023F strh r3, [r1, #2]! @ movhi + 12711 0118 0291 str r1, [sp, #8] + 12712 011a BBF1000F cmp fp, #0 + 12713 011e 1ED0 beq .L2191 + 12714 0120 DDF810C0 ldr ip, [sp, #16] + 12715 0124 09EB020A add r10, r9, r2 + 12716 .L2194: + 12717 0128 6346 mov r3, ip + 12718 012a B8F1000F cmp r8, #0 + 12719 012e 1DD0 beq .L2210 + 12720 0130 4146 mov r1, r8 + 12721 0132 7046 mov r0, lr + 12722 0134 0024 movs r4, #0 + ARM GAS /tmp/ccdao7B1.s page 222 + + + 12723 0136 0025 movs r5, #0 + 12724 .L2193: + 12725 0138 1E88 ldrh r6, [r3] + 12726 013a 30F8027B ldrh r7, [r0], #2 + 12727 013e 0139 subs r1, r1, #1 + 12728 0140 1344 add r3, r3, r2 + 12729 0142 C7FB8645 smlalbb r4, r5, r7, r6 + 12730 0146 F7D1 bne .L2193 + 12731 0148 E30B lsrs r3, r4, #15 + 12732 014a 43EA4543 orr r3, r3, r5, lsl #17 + 12733 .L2192: + 12734 .syntax unified + 12735 @ 623 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q1 + 12736 014e 03F30F03 ssat r3, #16, r3 + 12737 @ 0 "" 2 + 12738 .thumb + 12739 .syntax unified + 12740 0152 29F8023B strh r3, [r9], #2 @ movhi + 12741 0156 D145 cmp r9, r10 + 12742 0158 ACF1020C sub ip, ip, #2 + 12743 015c E4D1 bne .L2194 + 12744 .L2191: + 12745 015e 019B ldr r3, [sp, #4] + 12746 0160 013B subs r3, r3, #1 + 12747 0162 0EF1020E add lr, lr, #2 + 12748 0166 0193 str r3, [sp, #4] + 12749 0168 CFD1 bne .L2195 + 12750 016a 99E7 b .L2196 + 12751 .L2210: + 12752 016c 4346 mov r3, r8 + 12753 016e EEE7 b .L2192 + 12754 .L2202: + 12755 0170 039B ldr r3, [sp, #12] + 12756 0172 023B subs r3, r3, #2 + 12757 0174 00E0 b .L2207 + 12758 .L2233: + 12759 0176 0232 adds r2, r2, #2 + 12760 .L2207: + 12761 0178 32F9021C ldrsh r1, [r2, #-2] + 12762 017c 23F8021F strh r1, [r3, #2]! @ movhi + 12763 0180 013E subs r6, r6, #1 + 12764 0182 F8D1 bne .L2233 + 12765 0184 07B0 add sp, sp, #28 + 12766 @ sp needed + 12767 0186 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12768 .L2209: + 12769 018a 2146 mov r1, r4 + 12770 018c 8CE7 b .L2189 + 12772 018e 00BF .section .text.arm_fir_interpolate_q31,"ax",%progbits + 12773 .align 1 + 12774 .p2align 2,,3 + 12775 .global arm_fir_interpolate_q31 + 12776 .syntax unified + 12777 .thumb + 12778 .thumb_func + 12779 .fpu fpv4-sp-d16 + 12781 arm_fir_interpolate_q31: + ARM GAS /tmp/ccdao7B1.s page 223 + + + 12782 @ args = 0, pretend = 0, frame = 24 + 12783 @ frame_needed = 0, uses_anonymous_args = 0 + 12784 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12785 0004 B0F80280 ldrh r8, [r0, #2] + 12786 0008 8468 ldr r4, [r0, #8] + 12787 000a 87B0 sub sp, sp, #28 + 12788 000c 9146 mov r9, r2 + 12789 000e 4268 ldr r2, [r0, #4] + 12790 0010 0492 str r2, [sp, #16] + 12791 0012 08F18042 add r2, r8, #1073741824 + 12792 0016 013A subs r2, r2, #1 + 12793 0018 0394 str r4, [sp, #12] + 12794 001a 0091 str r1, [sp] + 12795 001c 04EB8202 add r2, r4, r2, lsl #2 + 12796 0020 0593 str r3, [sp, #20] + 12797 0022 002B cmp r3, #0 + 12798 0024 00F0B280 beq .L2255 + 12799 0028 90F800B0 ldrb fp, [r0] @ zero_extendqisi2 + 12800 002c BBF1010F cmp fp, #1 + 12801 0030 4FEA8B05 lsl r5, fp, #2 + 12802 0034 61D1 bne .L2277 + 12803 0036 131F subs r3, r2, #4 + 12804 0038 0293 str r3, [sp, #8] + 12805 003a 059B ldr r3, [sp, #20] + 12806 003c 0193 str r3, [sp, #4] + 12807 003e A246 mov r10, r4 + 12808 .L2245: + 12809 0040 009A ldr r2, [sp] + 12810 0042 DDF810E0 ldr lr, [sp, #16] + 12811 0046 52F8043B ldr r3, [r2], #4 + 12812 004a 0092 str r2, [sp] + 12813 004c 029A ldr r2, [sp, #8] + 12814 004e 42F8043F str r3, [r2, #4]! + 12815 0052 09EB050B add fp, r9, r5 + 12816 0056 0292 str r2, [sp, #8] + 12817 0058 CC46 mov ip, r9 + 12818 005a 4646 mov r6, r8 + 12819 .L2244: + 12820 005c 7246 mov r2, lr + 12821 005e 002E cmp r6, #0 + 12822 0060 49D0 beq .L2278 + 12823 0062 0023 movs r3, #0 + 12824 0064 3146 mov r1, r6 + 12825 0066 D046 mov r8, r10 + 12826 0068 1F46 mov r7, r3 + 12827 .L2243: + 12828 006a 1468 ldr r4, [r2] + 12829 006c 58F8040B ldr r0, [r8], #4 + 12830 0070 0139 subs r1, r1, #1 + 12831 0072 2A44 add r2, r2, r5 + 12832 0074 C4FB0037 smlal r3, r7, r4, r0 + 12833 0078 F7D1 bne .L2243 + 12834 007a DB0F lsrs r3, r3, #31 + 12835 007c 43EA4703 orr r3, r3, r7, lsl #1 + 12836 .L2246: + 12837 0080 4CF8043B str r3, [ip], #4 + 12838 0084 DC45 cmp ip, fp + ARM GAS /tmp/ccdao7B1.s page 224 + + + 12839 0086 AEF1040E sub lr, lr, #4 + 12840 008a E7D1 bne .L2244 + 12841 008c 019B ldr r3, [sp, #4] + 12842 008e 013B subs r3, r3, #1 + 12843 0090 B046 mov r8, r6 + 12844 0092 09F10409 add r9, r9, #4 + 12845 0096 0AF1040A add r10, r10, #4 + 12846 009a 0193 str r3, [sp, #4] + 12847 009c D0D1 bne .L2245 + 12848 .L2242: + 12849 009e 039B ldr r3, [sp, #12] + 12850 00a0 059A ldr r2, [sp, #20] + 12851 00a2 03EB8206 add r6, r3, r2, lsl #2 + 12852 .L2235: + 12853 00a6 B8F10107 subs r7, r8, #1 + 12854 00aa 21D0 beq .L2234 + 12855 00ac 0399 ldr r1, [sp, #12] + 12856 00ae A8F10203 sub r3, r8, #2 + 12857 00b2 321D adds r2, r6, #4 + 12858 00b4 9142 cmp r1, r2 + 12859 00b6 18BF it ne + 12860 00b8 0B2B cmpne r3, #11 + 12861 00ba 5AD9 bls .L2248 + 12862 00bc 46EA0103 orr r3, r6, r1 + 12863 00c0 5B07 lsls r3, r3, #29 + 12864 00c2 56D1 bne .L2248 + 12865 00c4 A8F10303 sub r3, r8, #3 + 12866 00c8 5B08 lsrs r3, r3, #1 + 12867 00ca 0133 adds r3, r3, #1 + 12868 00cc A6F10800 sub r0, r6, #8 + 12869 00d0 0022 movs r2, #0 + 12870 .L2249: + 12871 00d2 F0E90245 ldrd r4, [r0, #8]! + 12872 00d6 0132 adds r2, r2, #1 + 12873 00d8 9A42 cmp r2, r3 + 12874 00da E1E80245 strd r4, [r1], #8 + 12875 00de F8D3 bcc .L2249 + 12876 00e0 B7EB430F cmp r7, r3, lsl #1 + 12877 00e4 04D0 beq .L2234 + 12878 00e6 0399 ldr r1, [sp, #12] + 12879 00e8 56F83320 ldr r2, [r6, r3, lsl #3] + 12880 00ec 41F83320 str r2, [r1, r3, lsl #3] + 12881 .L2234: + 12882 00f0 07B0 add sp, sp, #28 + 12883 @ sp needed + 12884 00f2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12885 .L2278: + 12886 00f6 3346 mov r3, r6 + 12887 00f8 C2E7 b .L2246 + 12888 .L2277: + 12889 00fa 131F subs r3, r2, #4 + 12890 00fc 049A ldr r2, [sp, #16] + 12891 00fe 0293 str r3, [sp, #8] + 12892 0100 0BF1FF33 add r3, fp, #-1 + 12893 0104 02EB8303 add r3, r2, r3, lsl #2 + 12894 0108 0493 str r3, [sp, #16] + 12895 010a 059B ldr r3, [sp, #20] + ARM GAS /tmp/ccdao7B1.s page 225 + + + 12896 010c 0193 str r3, [sp, #4] + 12897 010e A646 mov lr, r4 + 12898 .L2241: + 12899 0110 009A ldr r2, [sp] + 12900 0112 52F8043B ldr r3, [r2], #4 + 12901 0116 0092 str r2, [sp] + 12902 0118 029A ldr r2, [sp, #8] + 12903 011a 42F8043F str r3, [r2, #4]! + 12904 011e 0292 str r2, [sp, #8] + 12905 0120 BBF1000F cmp fp, #0 + 12906 0124 1CD0 beq .L2237 + 12907 0126 DDF810C0 ldr ip, [sp, #16] + 12908 012a 09EB050A add r10, r9, r5 + 12909 012e 4646 mov r6, r8 + 12910 .L2240: + 12911 0130 6246 mov r2, ip + 12912 0132 E6B1 cbz r6, .L2256 + 12913 0134 0023 movs r3, #0 + 12914 0136 3146 mov r1, r6 + 12915 0138 F046 mov r8, lr + 12916 013a 1F46 mov r7, r3 + 12917 .L2239: + 12918 013c 1068 ldr r0, [r2] + 12919 013e 58F8044B ldr r4, [r8], #4 + 12920 0142 0139 subs r1, r1, #1 + 12921 0144 2A44 add r2, r2, r5 + 12922 0146 C4FB0037 smlal r3, r7, r4, r0 + 12923 014a F7D1 bne .L2239 + 12924 014c DB0F lsrs r3, r3, #31 + 12925 014e 43EA4703 orr r3, r3, r7, lsl #1 + 12926 .L2238: + 12927 0152 49F8043B str r3, [r9], #4 + 12928 0156 D145 cmp r9, r10 + 12929 0158 ACF1040C sub ip, ip, #4 + 12930 015c E8D1 bne .L2240 + 12931 015e B046 mov r8, r6 + 12932 .L2237: + 12933 0160 019B ldr r3, [sp, #4] + 12934 0162 013B subs r3, r3, #1 + 12935 0164 0EF1040E add lr, lr, #4 + 12936 0168 0193 str r3, [sp, #4] + 12937 016a D1D1 bne .L2241 + 12938 016c 97E7 b .L2242 + 12939 .L2256: + 12940 016e 3346 mov r3, r6 + 12941 0170 EFE7 b .L2238 + 12942 .L2248: + 12943 0172 039B ldr r3, [sp, #12] + 12944 0174 043B subs r3, r3, #4 + 12945 0176 00E0 b .L2253 + 12946 .L2279: + 12947 0178 0432 adds r2, r2, #4 + 12948 .L2253: + 12949 017a 52F8041C ldr r1, [r2, #-4] + 12950 017e 43F8041F str r1, [r3, #4]! + 12951 0182 013F subs r7, r7, #1 + 12952 0184 F8D1 bne .L2279 + ARM GAS /tmp/ccdao7B1.s page 226 + + + 12953 0186 07B0 add sp, sp, #28 + 12954 @ sp needed + 12955 0188 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12956 .L2255: + 12957 018c 2646 mov r6, r4 + 12958 018e 8AE7 b .L2235 + 12960 .section .text.arm_fir_lattice_f32,"ax",%progbits + 12961 .align 1 + 12962 .p2align 2,,3 + 12963 .global arm_fir_lattice_f32 + 12964 .syntax unified + 12965 .thumb + 12966 .thumb_func + 12967 .fpu fpv4-sp-d16 + 12969 arm_fir_lattice_f32: + 12970 @ args = 0, pretend = 0, frame = 0 + 12971 @ frame_needed = 0, uses_anonymous_args = 0 + 12972 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 12973 0004 D0E90146 ldrd r4, r6, [r0, #4] + 12974 0008 0588 ldrh r5, [r0] + 12975 000a 53B3 cbz r3, .L2280 + 12976 000c 013D subs r5, r5, #1 + 12977 000e 06F10408 add r8, r6, #4 + 12978 0012 271D adds r7, r4, #4 + 12979 .L2284: + 12980 0014 B1EC017A vldmia.32 r1!, {s14} + 12981 0018 94ED006A vldr.32 s12, [r4] + 12982 001c D6ED006A vldr.32 s13, [r6] + 12983 0020 84ED007A vstr.32 s14, [r4] + 12984 0024 F0EE477A vmov.f32 s15, s14 + 12985 0028 E6EE867A vfma.f32 s15, s13, s12 + 12986 002c A6EE876A vfma.f32 s12, s13, s14 + 12987 0030 9DB1 cbz r5, .L2282 + 12988 0032 AC46 mov ip, r5 + 12989 0034 C646 mov lr, r8 + 12990 0036 3846 mov r0, r7 + 12991 .L2283: + 12992 0038 90ED007A vldr.32 s14, [r0] + 12993 003c A0EC016A vstmia.32 r0!, {s12} + 12994 0040 FEEC016A vldmia.32 lr!, {s13} + 12995 0044 F0EE675A vmov.f32 s11, s15 + 12996 0048 E6EE877A vfma.f32 s15, s13, s14 + 12997 004c BCF1010C subs ip, ip, #1 + 12998 0050 A6EEA57A vfma.f32 s14, s13, s11 + 12999 0054 B0EE476A vmov.f32 s12, s14 + 13000 0058 EED1 bne .L2283 + 13001 .L2282: + 13002 005a 013B subs r3, r3, #1 + 13003 005c E2EC017A vstmia.32 r2!, {s15} + 13004 0060 D8D1 bne .L2284 + 13005 .L2280: + 13006 0062 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 13008 0066 00BF .section .text.arm_fir_lattice_init_f32,"ax",%progbits + 13009 .align 1 + 13010 .p2align 2,,3 + 13011 .global arm_fir_lattice_init_f32 + 13012 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 227 + + + 13013 .thumb + 13014 .thumb_func + 13015 .fpu fpv4-sp-d16 + 13017 arm_fir_lattice_init_f32: + 13018 @ args = 0, pretend = 0, frame = 0 + 13019 @ frame_needed = 0, uses_anonymous_args = 0 + 13020 0000 10B5 push {r4, lr} + 13021 0002 0180 strh r1, [r0] @ movhi + 13022 0004 8260 str r2, [r0, #8] + 13023 0006 0446 mov r4, r0 + 13024 0008 8A00 lsls r2, r1, #2 + 13025 000a 1846 mov r0, r3 + 13026 000c 0021 movs r1, #0 + 13027 000e FFF7FEFF bl memset + 13028 0012 6060 str r0, [r4, #4] + 13029 0014 10BD pop {r4, pc} + 13031 0016 00BF .section .text.arm_fir_lattice_init_q15,"ax",%progbits + 13032 .align 1 + 13033 .p2align 2,,3 + 13034 .global arm_fir_lattice_init_q15 + 13035 .syntax unified + 13036 .thumb + 13037 .thumb_func + 13038 .fpu fpv4-sp-d16 + 13040 arm_fir_lattice_init_q15: + 13041 @ args = 0, pretend = 0, frame = 0 + 13042 @ frame_needed = 0, uses_anonymous_args = 0 + 13043 0000 10B5 push {r4, lr} + 13044 0002 0180 strh r1, [r0] @ movhi + 13045 0004 8260 str r2, [r0, #8] + 13046 0006 0446 mov r4, r0 + 13047 0008 4A00 lsls r2, r1, #1 + 13048 000a 1846 mov r0, r3 + 13049 000c 0021 movs r1, #0 + 13050 000e FFF7FEFF bl memset + 13051 0012 6060 str r0, [r4, #4] + 13052 0014 10BD pop {r4, pc} + 13054 0016 00BF .section .text.arm_fir_lattice_init_q31,"ax",%progbits + 13055 .align 1 + 13056 .p2align 2,,3 + 13057 .global arm_fir_lattice_init_q31 + 13058 .syntax unified + 13059 .thumb + 13060 .thumb_func + 13061 .fpu fpv4-sp-d16 + 13063 arm_fir_lattice_init_q31: + 13064 @ args = 0, pretend = 0, frame = 0 + 13065 @ frame_needed = 0, uses_anonymous_args = 0 + 13066 0000 10B5 push {r4, lr} + 13067 0002 0180 strh r1, [r0] @ movhi + 13068 0004 8260 str r2, [r0, #8] + 13069 0006 0446 mov r4, r0 + 13070 0008 8A00 lsls r2, r1, #2 + 13071 000a 1846 mov r0, r3 + 13072 000c 0021 movs r1, #0 + 13073 000e FFF7FEFF bl memset + 13074 0012 6060 str r0, [r4, #4] + ARM GAS /tmp/ccdao7B1.s page 228 + + + 13075 0014 10BD pop {r4, pc} + 13077 0016 00BF .section .text.arm_fir_lattice_q15,"ax",%progbits + 13078 .align 1 + 13079 .p2align 2,,3 + 13080 .global arm_fir_lattice_q15 + 13081 .syntax unified + 13082 .thumb + 13083 .thumb_func + 13084 .fpu fpv4-sp-d16 + 13086 arm_fir_lattice_q15: + 13087 @ args = 0, pretend = 0, frame = 8 + 13088 @ frame_needed = 0, uses_anonymous_args = 0 + 13089 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13090 0004 D0E9018A ldrd r8, r10, [r0, #4] + 13091 0008 B0F80090 ldrh r9, [r0] + 13092 000c 83B0 sub sp, sp, #12 + 13093 000e D3B3 cbz r3, .L2298 + 13094 0010 08F10200 add r0, r8, #2 + 13095 0014 09F1FF39 add r9, r9, #-1 + 13096 0018 0AF1020B add fp, r10, #2 + 13097 001c 0190 str r0, [sp, #4] + 13098 .L2302: + 13099 001e 31F9027B ldrsh r7, [r1], #2 + 13100 0022 B8F900E0 ldrsh lr, [r8] + 13101 0026 BAF90000 ldrsh r0, [r10] + 13102 002a A8F80070 strh r7, [r8] @ movhi + 13103 002e 00FB0EF4 mul r4, r0, lr + 13104 0032 07FB00F0 mul r0, r7, r0 + 13105 0036 0EEBE03E add lr, lr, r0, asr #15 + 13106 003a 07EBE437 add r7, r7, r4, asr #15 + 13107 .syntax unified + 13108 @ 394 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" + 13109 003e 0EF30F0E ssat lr, #16, lr + 13110 @ 0 "" 2 + 13111 @ 390 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" + 13112 0042 07F30F07 ssat r7, #16, r7 + 13113 @ 0 "" 2 + 13114 .thumb + 13115 .syntax unified + 13116 0046 B9F1000F cmp r9, #0 + 13117 004a 16D0 beq .L2300 + 13118 004c 019D ldr r5, [sp, #4] + 13119 004e 4E46 mov r6, r9 + 13120 0050 DC46 mov ip, fp + 13121 .L2301: + 13122 0052 B5F90000 ldrsh r0, [r5] + 13123 0056 25F802EB strh lr, [r5], #2 @ movhi + 13124 005a 3CF902EB ldrsh lr, [ip], #2 + 13125 005e 013E subs r6, r6, #1 + 13126 0060 07FB0EF4 mul r4, r7, lr + 13127 0064 0EFB00FE mul lr, lr, r0 + 13128 0068 07EBEE37 add r7, r7, lr, asr #15 + 13129 006c 00EBE430 add r0, r0, r4, asr #15 + 13130 .syntax unified + 13131 @ 416 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" + 13132 0070 07F30F07 ssat r7, #16, r7 + 13133 @ 0 "" 2 + ARM GAS /tmp/ccdao7B1.s page 229 + + + 13134 @ 420 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" + 13135 0074 00F30F0E ssat lr, #16, r0 + 13136 @ 0 "" 2 + 13137 .thumb + 13138 .syntax unified + 13139 0078 EBD1 bne .L2301 + 13140 .L2300: + 13141 .syntax unified + 13142 @ 429 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c" + 13143 007a 07F30F07 ssat r7, #16, r7 + 13144 @ 0 "" 2 + 13145 .thumb + 13146 .syntax unified + 13147 007e 013B subs r3, r3, #1 + 13148 0080 22F8027B strh r7, [r2], #2 @ movhi + 13149 0084 CBD1 bne .L2302 + 13150 .L2298: + 13151 0086 03B0 add sp, sp, #12 + 13152 @ sp needed + 13153 0088 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13155 .section .text.arm_fir_lattice_q31,"ax",%progbits + 13156 .align 1 + 13157 .p2align 2,,3 + 13158 .global arm_fir_lattice_q31 + 13159 .syntax unified + 13160 .thumb + 13161 .thumb_func + 13162 .fpu fpv4-sp-d16 + 13164 arm_fir_lattice_q31: + 13165 @ args = 0, pretend = 0, frame = 8 + 13166 @ frame_needed = 0, uses_anonymous_args = 0 + 13167 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13168 0004 D0E9018A ldrd r8, r10, [r0, #4] + 13169 0008 B0F80090 ldrh r9, [r0] + 13170 000c 83B0 sub sp, sp, #12 + 13171 000e 8BB3 cbz r3, .L2310 + 13172 0010 0AF10400 add r0, r10, #4 + 13173 0014 0090 str r0, [sp] + 13174 0016 08F10400 add r0, r8, #4 + 13175 001a 09F1FF39 add r9, r9, #-1 + 13176 001e 0190 str r0, [sp, #4] + 13177 .L2314: + 13178 0020 51F8046B ldr r6, [r1], #4 + 13179 0024 D8F80040 ldr r4, [r8] + 13180 0028 DAF80000 ldr r0, [r10] + 13181 002c C8F80060 str r6, [r8] + 13182 0030 84FB0057 smull r5, r7, r4, r0 + 13183 0034 80FB0605 smull r0, r5, r0, r6 + 13184 0038 04EB4504 add r4, r4, r5, lsl #1 + 13185 003c 06EB4706 add r6, r6, r7, lsl #1 + 13186 0040 B9F1000F cmp r9, #0 + 13187 0044 12D0 beq .L2312 + 13188 0046 DDE900E7 ldrd lr, r7, [sp] + 13189 004a CC46 mov ip, r9 + 13190 .L2313: + 13191 004c 3D68 ldr r5, [r7] + 13192 004e 47F8044B str r4, [r7], #4 + ARM GAS /tmp/ccdao7B1.s page 230 + + + 13193 0052 5EF8040B ldr r0, [lr], #4 + 13194 0056 BCF1010C subs ip, ip, #1 + 13195 005a 80FB06B4 smull fp, r4, r0, r6 + 13196 005e 85FB000B smull r0, fp, r5, r0 + 13197 0062 06EB4B06 add r6, r6, fp, lsl #1 + 13198 0066 05EB4404 add r4, r5, r4, lsl #1 + 13199 006a EFD1 bne .L2313 + 13200 .L2312: + 13201 006c 013B subs r3, r3, #1 + 13202 006e 42F8046B str r6, [r2], #4 + 13203 0072 D5D1 bne .L2314 + 13204 .L2310: + 13205 0074 03B0 add sp, sp, #12 + 13206 @ sp needed + 13207 0076 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13209 007a 00BF .section .text.arm_fir_q15,"ax",%progbits + 13210 .align 1 + 13211 .p2align 2,,3 + 13212 .global arm_fir_q15 + 13213 .syntax unified + 13214 .thumb + 13215 .thumb_func + 13216 .fpu fpv4-sp-d16 + 13218 arm_fir_q15: + 13219 @ args = 0, pretend = 0, frame = 16 + 13220 @ frame_needed = 0, uses_anonymous_args = 0 + 13221 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13222 0004 85B0 sub sp, sp, #20 + 13223 0006 0488 ldrh r4, [r0] + 13224 0008 D0F804B0 ldr fp, [r0, #4] + 13225 000c D0F808C0 ldr ip, [r0, #8] + 13226 0010 0294 str r4, [sp, #8] + 13227 0012 0393 str r3, [sp, #12] + 13228 0014 002B cmp r3, #0 + 13229 0016 71D0 beq .L2335 + 13230 0018 04F10040 add r0, r4, #-2147483648 + 13231 001c 0138 subs r0, r0, #1 + 13232 001e 4000 lsls r0, r0, #1 + 13233 0020 0BF10406 add r6, fp, #4 + 13234 0024 1F46 mov r7, r3 + 13235 0026 0238 subs r0, r0, #2 + 13236 0028 6346 mov r3, ip + 13237 002a 4FEA540A lsr r10, r4, #1 + 13238 002e 0BEB0008 add r8, fp, r0 + 13239 0032 D946 mov r9, fp + 13240 0034 DC46 mov ip, fp + 13241 0036 06EB8A06 add r6, r6, r10, lsl #2 + 13242 003a 9B46 mov fp, r3 + 13243 .L2326: + 13244 003c 31F9023B ldrsh r3, [r1], #2 + 13245 0040 28F8023F strh r3, [r8, #2]! @ movhi + 13246 0044 BAF1000F cmp r10, #0 + 13247 0048 49D0 beq .L2336 + 13248 004a 09F10403 add r3, r9, #4 + 13249 004e 0BF10400 add r0, fp, #4 + 13250 0052 0024 movs r4, #0 + 13251 0054 0025 movs r5, #0 + ARM GAS /tmp/ccdao7B1.s page 231 + + + 13252 0056 0192 str r2, [sp, #4] + 13253 .L2325: + 13254 0058 33F804EC ldrh lr, [r3, #-4] + 13255 005c 30F8042C ldrh r2, [r0, #-4] + 13256 0060 0433 adds r3, r3, #4 + 13257 0062 CEFB8245 smlalbb r4, r5, lr, r2 + 13258 0066 33F806EC ldrh lr, [r3, #-6] + 13259 006a 30F8022C ldrh r2, [r0, #-2] + 13260 006e B342 cmp r3, r6 + 13261 0070 CEFB8245 smlalbb r4, r5, lr, r2 + 13262 0074 00F10400 add r0, r0, #4 + 13263 0078 EED1 bne .L2325 + 13264 007a E30B lsrs r3, r4, #15 + 13265 007c 019A ldr r2, [sp, #4] + 13266 007e 43EA4543 orr r3, r3, r5, lsl #17 + 13267 .L2324: + 13268 0082 013F subs r7, r7, #1 + 13269 .syntax unified + 13270 @ 740 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c" 1 + 13271 0084 03F30F03 ssat r3, #16, r3 + 13272 @ 0 "" 2 + 13273 .thumb + 13274 .syntax unified + 13275 0088 09F10209 add r9, r9, #2 + 13276 008c 22F8023B strh r3, [r2], #2 @ movhi + 13277 0090 06F10206 add r6, r6, #2 + 13278 0094 D2D1 bne .L2326 + 13279 0096 039B ldr r3, [sp, #12] + 13280 0098 E346 mov fp, ip + 13281 009a 0CEB4301 add r1, ip, r3, lsl #1 + 13282 .L2323: + 13283 009e 0298 ldr r0, [sp, #8] + 13284 00a0 461E subs r6, r0, #1 + 13285 00a2 19D0 beq .L2322 + 13286 00a4 8B1C adds r3, r1, #2 + 13287 00a6 9B45 cmp fp, r3 + 13288 00a8 1BD0 beq .L2328 + 13289 00aa 821E subs r2, r0, #2 + 13290 00ac 092A cmp r2, #9 + 13291 00ae 18D9 bls .L2328 + 13292 00b0 C31E subs r3, r0, #3 + 13293 00b2 5B08 lsrs r3, r3, #1 + 13294 00b4 0133 adds r3, r3, #1 + 13295 00b6 0C46 mov r4, r1 + 13296 00b8 5846 mov r0, fp + 13297 00ba 0022 movs r2, #0 + 13298 .L2329: + 13299 00bc 0132 adds r2, r2, #1 + 13300 00be 54F8045B ldr r5, [r4], #4 @ unaligned + 13301 00c2 40F8045B str r5, [r0], #4 @ unaligned + 13302 00c6 9342 cmp r3, r2 + 13303 00c8 F8D8 bhi .L2329 + 13304 00ca B6EB430F cmp r6, r3, lsl #1 + 13305 00ce 03D0 beq .L2322 + 13306 00d0 31F92320 ldrsh r2, [r1, r3, lsl #2] + 13307 00d4 2BF82320 strh r2, [fp, r3, lsl #2] @ movhi + 13308 .L2322: + ARM GAS /tmp/ccdao7B1.s page 232 + + + 13309 00d8 05B0 add sp, sp, #20 + 13310 @ sp needed + 13311 00da BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13312 .L2336: + 13313 00de 5346 mov r3, r10 + 13314 00e0 CFE7 b .L2324 + 13315 .L2328: + 13316 00e2 ABF1020B sub fp, fp, #2 + 13317 00e6 00E0 b .L2333 + 13318 .L2349: + 13319 00e8 0233 adds r3, r3, #2 + 13320 .L2333: + 13321 00ea 33F9022C ldrsh r2, [r3, #-2] + 13322 00ee 2BF8022F strh r2, [fp, #2]! @ movhi + 13323 00f2 013E subs r6, r6, #1 + 13324 00f4 F8D1 bne .L2349 + 13325 00f6 05B0 add sp, sp, #20 + 13326 @ sp needed + 13327 00f8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13328 .L2335: + 13329 00fc 5946 mov r1, fp + 13330 00fe CEE7 b .L2323 + 13332 .section .text.arm_fir_q31,"ax",%progbits + 13333 .align 1 + 13334 .p2align 2,,3 + 13335 .global arm_fir_q31 + 13336 .syntax unified + 13337 .thumb + 13338 .thumb_func + 13339 .fpu fpv4-sp-d16 + 13341 arm_fir_q31: + 13342 @ args = 0, pretend = 0, frame = 8 + 13343 @ frame_needed = 0, uses_anonymous_args = 0 + 13344 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13345 0004 83B0 sub sp, sp, #12 + 13346 0006 D0F804B0 ldr fp, [r0, #4] + 13347 000a 0788 ldrh r7, [r0] + 13348 000c 8468 ldr r4, [r0, #8] + 13349 000e 0093 str r3, [sp] + 13350 0010 002B cmp r3, #0 + 13351 0012 5DD0 beq .L2360 + 13352 0014 07F18040 add r0, r7, #1073741824 + 13353 0018 0138 subs r0, r0, #1 + 13354 001a 8000 lsls r0, r0, #2 + 13355 001c 0438 subs r0, r0, #4 + 13356 001e 0BEB000A add r10, fp, r0 + 13357 0022 D846 mov r8, fp + 13358 0024 CDF804B0 str fp, [sp, #4] + 13359 0028 9946 mov r9, r3 + 13360 002a A346 mov fp, r4 + 13361 .L2353: + 13362 002c 51F8040B ldr r0, [r1], #4 + 13363 0030 4AF8040F str r0, [r10, #4]! + 13364 0034 0023 movs r3, #0 + 13365 0036 3846 mov r0, r7 + 13366 0038 DE46 mov lr, fp + 13367 003a C446 mov ip, r8 + ARM GAS /tmp/ccdao7B1.s page 233 + + + 13368 003c 1E46 mov r6, r3 + 13369 .L2352: + 13370 003e 5CF8045B ldr r5, [ip], #4 + 13371 0042 5EF8044B ldr r4, [lr], #4 + 13372 0046 0138 subs r0, r0, #1 + 13373 0048 C5FB0436 smlal r3, r6, r5, r4 + 13374 004c F7D1 bne .L2352 + 13375 004e DB0F lsrs r3, r3, #31 + 13376 0050 43EA4603 orr r3, r3, r6, lsl #1 + 13377 0054 B9F10109 subs r9, r9, #1 + 13378 0058 42F8043B str r3, [r2], #4 + 13379 005c 08F10408 add r8, r8, #4 + 13380 0060 E4D1 bne .L2353 + 13381 0062 DDE9003B ldrd r3, fp, [sp] + 13382 0066 0BEB8306 add r6, fp, r3, lsl #2 + 13383 .L2351: + 13384 006a B7F1010C subs ip, r7, #1 + 13385 006e 1ED0 beq .L2350 + 13386 0070 331D adds r3, r6, #4 + 13387 0072 BA1E subs r2, r7, #2 + 13388 0074 9B45 cmp fp, r3 + 13389 0076 18BF it ne + 13390 0078 0B2A cmpne r2, #11 + 13391 007a 1BD9 bls .L2355 + 13392 007c 4BEA0602 orr r2, fp, r6 + 13393 0080 5207 lsls r2, r2, #29 + 13394 0082 17D1 bne .L2355 + 13395 0084 FB1E subs r3, r7, #3 + 13396 0086 5B08 lsrs r3, r3, #1 + 13397 0088 0133 adds r3, r3, #1 + 13398 008a A6F10800 sub r0, r6, #8 + 13399 008e 5946 mov r1, fp + 13400 0090 0022 movs r2, #0 + 13401 .L2356: + 13402 0092 F0E90245 ldrd r4, [r0, #8]! + 13403 0096 0132 adds r2, r2, #1 + 13404 0098 9A42 cmp r2, r3 + 13405 009a E1E80245 strd r4, [r1], #8 + 13406 009e F8D3 bcc .L2356 + 13407 00a0 BCEB430F cmp ip, r3, lsl #1 + 13408 00a4 03D0 beq .L2350 + 13409 00a6 56F83320 ldr r2, [r6, r3, lsl #3] + 13410 00aa 4BF83320 str r2, [fp, r3, lsl #3] + 13411 .L2350: + 13412 00ae 03B0 add sp, sp, #12 + 13413 @ sp needed + 13414 00b0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13415 .L2355: + 13416 00b4 ABF1040B sub fp, fp, #4 + 13417 00b8 00E0 b .L2358 + 13418 .L2376: + 13419 00ba 0433 adds r3, r3, #4 + 13420 .L2358: + 13421 00bc 53F8042C ldr r2, [r3, #-4] + 13422 00c0 4BF8042F str r2, [fp, #4]! + 13423 00c4 BCF1010C subs ip, ip, #1 + 13424 00c8 F7D1 bne .L2376 + ARM GAS /tmp/ccdao7B1.s page 234 + + + 13425 00ca 03B0 add sp, sp, #12 + 13426 @ sp needed + 13427 00cc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13428 .L2360: + 13429 00d0 5E46 mov r6, fp + 13430 00d2 CAE7 b .L2351 + 13432 .section .text.arm_fir_q7,"ax",%progbits + 13433 .align 1 + 13434 .p2align 2,,3 + 13435 .global arm_fir_q7 + 13436 .syntax unified + 13437 .thumb + 13438 .thumb_func + 13439 .fpu fpv4-sp-d16 + 13441 arm_fir_q7: + 13442 @ args = 0, pretend = 0, frame = 16 + 13443 @ frame_needed = 0, uses_anonymous_args = 0 + 13444 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13445 0004 0688 ldrh r6, [r0] + 13446 0006 D0F80490 ldr r9, [r0, #4] + 13447 000a D0F808B0 ldr fp, [r0, #8] + 13448 000e 85B0 sub sp, sp, #20 + 13449 0010 0290 str r0, [sp, #8] + 13450 0012 701E subs r0, r6, #1 + 13451 0014 0190 str r0, [sp, #4] + 13452 0016 0393 str r3, [sp, #12] + 13453 0018 002B cmp r3, #0 + 13454 001a 69D0 beq .L2390 + 13455 001c A6F10208 sub r8, r6, #2 + 13456 0020 C844 add r8, r8, r9 + 13457 0022 09EB0605 add r5, r9, r6 + 13458 0026 01EB030A add r10, r1, r3 + 13459 002a 4F46 mov r7, r9 + 13460 .L2381: + 13461 002c 11F9013B ldrsb r3, [r1], #1 + 13462 0030 08F8013F strb r3, [r8, #1]! + 13463 0034 002E cmp r6, #0 + 13464 0036 4BD0 beq .L2391 + 13465 0038 5C46 mov r4, fp + 13466 003a 3B46 mov r3, r7 + 13467 003c 0020 movs r0, #0 + 13468 .L2380: + 13469 003e 13F901EB ldrsb lr, [r3], #1 + 13470 0042 14F901CB ldrsb ip, [r4], #1 + 13471 0046 AB42 cmp r3, r5 + 13472 0048 1EFB0C00 smlabb r0, lr, ip, r0 + 13473 004c F7D1 bne .L2380 + 13474 004e C011 asrs r0, r0, #7 + 13475 .L2379: + 13476 0050 5145 cmp r1, r10 + 13477 .syntax unified + 13478 @ 694 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c" 1 + 13479 0052 00F30700 ssat r0, #8, r0 + 13480 @ 0 "" 2 + 13481 .thumb + 13482 .syntax unified + 13483 0056 07F10107 add r7, r7, #1 + ARM GAS /tmp/ccdao7B1.s page 235 + + + 13484 005a 02F8010B strb r0, [r2], #1 + 13485 005e 05F10105 add r5, r5, #1 + 13486 0062 E3D1 bne .L2381 + 13487 0064 029B ldr r3, [sp, #8] + 13488 0066 5D68 ldr r5, [r3, #4] + 13489 0068 039B ldr r3, [sp, #12] + 13490 006a 9944 add r9, r9, r3 + 13491 .L2378: + 13492 006c 019B ldr r3, [sp, #4] + 13493 006e 63B3 cbz r3, .L2377 + 13494 0070 09F10103 add r3, r9, #1 + 13495 0074 EA1A subs r2, r5, r3 + 13496 0076 022A cmp r2, #2 + 13497 0078 2CD9 bls .L2383 + 13498 007a B21E subs r2, r6, #2 + 13499 007c 072A cmp r2, #7 + 13500 007e 29D9 bls .L2383 + 13501 0080 731F subs r3, r6, #5 + 13502 0082 9B08 lsrs r3, r3, #2 + 13503 0084 0133 adds r3, r3, #1 + 13504 0086 4846 mov r0, r9 + 13505 0088 2946 mov r1, r5 + 13506 008a 0022 movs r2, #0 + 13507 .L2384: + 13508 008c 0132 adds r2, r2, #1 + 13509 008e 50F8044B ldr r4, [r0], #4 @ unaligned + 13510 0092 41F8044B str r4, [r1], #4 @ unaligned + 13511 0096 9342 cmp r3, r2 + 13512 0098 F8D8 bhi .L2384 + 13513 009a 019C ldr r4, [sp, #4] + 13514 009c B4EB830F cmp r4, r3, lsl #2 + 13515 00a0 09EB8300 add r0, r9, r3, lsl #2 + 13516 00a4 05EB8301 add r1, r5, r3, lsl #2 + 13517 00a8 A4EB8302 sub r2, r4, r3, lsl #2 + 13518 00ac 0DD0 beq .L2377 + 13519 00ae 19F92340 ldrsb r4, [r9, r3, lsl #2] + 13520 00b2 05F82340 strb r4, [r5, r3, lsl #2] + 13521 00b6 012A cmp r2, #1 + 13522 00b8 07D0 beq .L2377 + 13523 00ba 90F90130 ldrsb r3, [r0, #1] + 13524 00be 4B70 strb r3, [r1, #1] + 13525 00c0 022A cmp r2, #2 + 13526 00c2 02D0 beq .L2377 + 13527 00c4 90F90230 ldrsb r3, [r0, #2] + 13528 00c8 8B70 strb r3, [r1, #2] + 13529 .L2377: + 13530 00ca 05B0 add sp, sp, #20 + 13531 @ sp needed + 13532 00cc BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13533 .L2391: + 13534 00d0 3046 mov r0, r6 + 13535 00d2 BDE7 b .L2379 + 13536 .L2383: + 13537 00d4 019A ldr r2, [sp, #4] + 13538 00d6 013D subs r5, r5, #1 + 13539 00d8 9144 add r9, r9, r2 + 13540 00da 00E0 b .L2388 + ARM GAS /tmp/ccdao7B1.s page 236 + + + 13541 .L2410: + 13542 00dc 0133 adds r3, r3, #1 + 13543 .L2388: + 13544 00de 13F9012C ldrsb r2, [r3, #-1] + 13545 00e2 05F8012F strb r2, [r5, #1]! + 13546 00e6 4B45 cmp r3, r9 + 13547 00e8 F8D1 bne .L2410 + 13548 00ea 05B0 add sp, sp, #20 + 13549 @ sp needed + 13550 00ec BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13551 .L2390: + 13552 00f0 4D46 mov r5, r9 + 13553 00f2 BBE7 b .L2378 + 13555 .section .text.arm_fir_sparse_f32,"ax",%progbits + 13556 .align 1 + 13557 .p2align 2,,3 + 13558 .global arm_fir_sparse_f32 + 13559 .syntax unified + 13560 .thumb + 13561 .thumb_func + 13562 .fpu fpv4-sp-d16 + 13564 arm_fir_sparse_f32: + 13565 @ args = 4, pretend = 0, frame = 8 + 13566 @ frame_needed = 0, uses_anonymous_args = 0 + 13567 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13568 0004 83B0 sub sp, sp, #12 + 13569 0006 D0F80880 ldr r8, [r0, #8] + 13570 000a 0C9E ldr r6, [sp, #48] + 13571 000c B0F80CC0 ldrh ip, [r0, #12] + 13572 0010 0588 ldrh r5, [r0] + 13573 0012 0195 str r5, [sp, #4] + 13574 0014 98ED007A vldr.32 s14, [r8] + 13575 0018 4468 ldr r4, [r0, #4] + 13576 001a D0F81090 ldr r9, [r0, #16] + 13577 001e 4588 ldrh r5, [r0, #2] + 13578 0020 B444 add ip, ip, r6 + 13579 0022 002E cmp r6, #0 + 13580 0024 00F08980 beq .L2412 + 13581 0028 B646 mov lr, r6 + 13582 .L2414: + 13583 002a 51F8047B ldr r7, [r1], #4 + 13584 002e 44F82570 str r7, [r4, r5, lsl #2] + 13585 0032 0135 adds r5, r5, #1 + 13586 0034 AC45 cmp ip, r5 + 13587 0036 D8BF it le + 13588 0038 A5EB0C05 suble r5, r5, ip + 13589 003c BEF1010E subs lr, lr, #1 + 13590 0040 F3D1 bne .L2414 + 13591 0042 4580 strh r5, [r0, #2] @ movhi + 13592 0044 D9F80010 ldr r1, [r9] + 13593 0048 ADB2 uxth r5, r5 + 13594 004a AD1B subs r5, r5, r6 + 13595 004c 681A subs r0, r5, r1 + 13596 004e 00D5 bpl .L2454 + 13597 0050 6044 add r0, r0, ip + 13598 .L2454: + 13599 0052 03EB860E add lr, r3, r6, lsl #2 + ARM GAS /tmp/ccdao7B1.s page 237 + + + 13600 0056 B346 mov fp, r6 + 13601 0058 9A46 mov r10, r3 + 13602 .L2421: + 13603 005a 54F82010 ldr r1, [r4, r0, lsl #2] + 13604 005e 4AF8041B str r1, [r10], #4 + 13605 0062 0130 adds r0, r0, #1 + 13606 0064 D645 cmp lr, r10 + 13607 0066 08BF it eq + 13608 0068 9A46 moveq r10, r3 + 13609 006a 8445 cmp ip, r0 + 13610 006c D8BF it le + 13611 006e A0EB0C00 suble r0, r0, ip + 13612 0072 BBF1010B subs fp, fp, #1 + 13613 0076 F0D1 bne .L2421 + 13614 0078 3146 mov r1, r6 + 13615 007a 9246 mov r10, r2 + 13616 007c 1846 mov r0, r3 + 13617 .L2422: + 13618 007e F0EC017A vldmia.32 r0!, {s15} + 13619 0082 67EE877A vmul.f32 s15, s15, s14 + 13620 0086 0139 subs r1, r1, #1 + 13621 0088 EAEC017A vstmia.32 r10!, {s15} + 13622 008c F7D1 bne .L2422 + 13623 .L2423: + 13624 008e D9F80410 ldr r1, [r9, #4] + 13625 0092 D8ED016A vldr.32 s13, [r8, #4] + 13626 0096 691A subs r1, r5, r1 + 13627 0098 08F10808 add r8, r8, #8 + 13628 009c 09F10809 add r9, r9, #8 + 13629 00a0 00D5 bpl .L2418 + 13630 00a2 6144 add r1, r1, ip + 13631 .L2418: + 13632 00a4 0198 ldr r0, [sp, #4] + 13633 00a6 B0F1020B subs fp, r0, #2 + 13634 00aa 28D0 beq .L2425 + 13635 .L2424: + 13636 00ac EEB1 cbz r6, .L2431 + 13637 00ae B246 mov r10, r6 + 13638 00b0 1846 mov r0, r3 + 13639 .L2428: + 13640 00b2 54F82170 ldr r7, [r4, r1, lsl #2] + 13641 00b6 40F8047B str r7, [r0], #4 + 13642 00ba 0131 adds r1, r1, #1 + 13643 00bc 8645 cmp lr, r0 + 13644 00be 08BF it eq + 13645 00c0 1846 moveq r0, r3 + 13646 00c2 8C45 cmp ip, r1 + 13647 00c4 D8BF it le + 13648 00c6 A1EB0C01 suble r1, r1, ip + 13649 00ca BAF1010A subs r10, r10, #1 + 13650 00ce F0D1 bne .L2428 + 13651 00d0 3046 mov r0, r6 + 13652 00d2 1146 mov r1, r2 + 13653 00d4 9A46 mov r10, r3 + 13654 .L2429: + 13655 00d6 BAEC017A vldmia.32 r10!, {s14} + 13656 00da F1EC017A vldmia.32 r1!, {s15} + ARM GAS /tmp/ccdao7B1.s page 238 + + + 13657 00de E7EE267A vfma.f32 s15, s14, s13 + 13658 00e2 0138 subs r0, r0, #1 + 13659 00e4 41ED017A vstr.32 s15, [r1, #-4] + 13660 00e8 F5D1 bne .L2429 + 13661 .L2431: + 13662 00ea 59F8041B ldr r1, [r9], #4 + 13663 00ee F8EC016A vldmia.32 r8!, {s13} + 13664 00f2 691A subs r1, r5, r1 + 13665 00f4 48BF it mi + 13666 00f6 6144 addmi r1, r1, ip + 13667 00f8 BBF1010B subs fp, fp, #1 + 13668 00fc D6D1 bne .L2424 + 13669 .L2425: + 13670 00fe CEB1 cbz r6, .L2411 + 13671 0100 3746 mov r7, r6 + 13672 0102 1D46 mov r5, r3 + 13673 .L2432: + 13674 0104 54F82100 ldr r0, [r4, r1, lsl #2] + 13675 0108 45F8040B str r0, [r5], #4 + 13676 010c 0131 adds r1, r1, #1 + 13677 010e AE45 cmp lr, r5 + 13678 0110 08BF it eq + 13679 0112 1D46 moveq r5, r3 + 13680 0114 8C45 cmp ip, r1 + 13681 0116 D8BF it le + 13682 0118 A1EB0C01 suble r1, r1, ip + 13683 011c 013F subs r7, r7, #1 + 13684 011e F1D1 bne .L2432 + 13685 .L2435: + 13686 0120 B3EC017A vldmia.32 r3!, {s14} + 13687 0124 F2EC017A vldmia.32 r2!, {s15} + 13688 0128 E7EE267A vfma.f32 s15, s14, s13 + 13689 012c 013E subs r6, r6, #1 + 13690 012e 42ED017A vstr.32 s15, [r2, #-4] + 13691 0132 F5D1 bne .L2435 + 13692 .L2411: + 13693 0134 03B0 add sp, sp, #12 + 13694 @ sp needed + 13695 0136 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13696 .L2412: + 13697 013a 4580 strh r5, [r0, #2] @ movhi + 13698 013c 9E46 mov lr, r3 + 13699 013e A6E7 b .L2423 + 13701 .section .text.arm_fir_sparse_init_f32,"ax",%progbits + 13702 .align 1 + 13703 .p2align 2,,3 + 13704 .global arm_fir_sparse_init_f32 + 13705 .syntax unified + 13706 .thumb + 13707 .thumb_func + 13708 .fpu fpv4-sp-d16 + 13710 arm_fir_sparse_init_f32: + 13711 @ args = 12, pretend = 0, frame = 0 + 13712 @ frame_needed = 0, uses_anonymous_args = 0 + 13713 0000 10B5 push {r4, lr} + 13714 0002 0446 mov r4, r0 + 13715 0004 0298 ldr r0, [sp, #8] + ARM GAS /tmp/ccdao7B1.s page 239 + + + 13716 0006 2061 str r0, [r4, #16] + 13717 0008 A260 str r2, [r4, #8] + 13718 000a 0498 ldr r0, [sp, #16] + 13719 000c BDF80C20 ldrh r2, [sp, #12] + 13720 0010 2180 strh r1, [r4] @ movhi + 13721 0012 A281 strh r2, [r4, #12] @ movhi + 13722 0014 0021 movs r1, #0 + 13723 0016 0244 add r2, r2, r0 + 13724 0018 6180 strh r1, [r4, #2] @ movhi + 13725 001a 9200 lsls r2, r2, #2 + 13726 001c 1846 mov r0, r3 + 13727 001e FFF7FEFF bl memset + 13728 0022 6060 str r0, [r4, #4] + 13729 0024 10BD pop {r4, pc} + 13731 0026 00BF .section .text.arm_fir_sparse_init_q15,"ax",%progbits + 13732 .align 1 + 13733 .p2align 2,,3 + 13734 .global arm_fir_sparse_init_q15 + 13735 .syntax unified + 13736 .thumb + 13737 .thumb_func + 13738 .fpu fpv4-sp-d16 + 13740 arm_fir_sparse_init_q15: + 13741 @ args = 12, pretend = 0, frame = 0 + 13742 @ frame_needed = 0, uses_anonymous_args = 0 + 13743 0000 10B5 push {r4, lr} + 13744 0002 0446 mov r4, r0 + 13745 0004 0298 ldr r0, [sp, #8] + 13746 0006 2061 str r0, [r4, #16] + 13747 0008 A260 str r2, [r4, #8] + 13748 000a 0498 ldr r0, [sp, #16] + 13749 000c BDF80C20 ldrh r2, [sp, #12] + 13750 0010 2180 strh r1, [r4] @ movhi + 13751 0012 A281 strh r2, [r4, #12] @ movhi + 13752 0014 0021 movs r1, #0 + 13753 0016 0244 add r2, r2, r0 + 13754 0018 6180 strh r1, [r4, #2] @ movhi + 13755 001a 5200 lsls r2, r2, #1 + 13756 001c 1846 mov r0, r3 + 13757 001e FFF7FEFF bl memset + 13758 0022 6060 str r0, [r4, #4] + 13759 0024 10BD pop {r4, pc} + 13761 0026 00BF .section .text.arm_fir_sparse_init_q31,"ax",%progbits + 13762 .align 1 + 13763 .p2align 2,,3 + 13764 .global arm_fir_sparse_init_q31 + 13765 .syntax unified + 13766 .thumb + 13767 .thumb_func + 13768 .fpu fpv4-sp-d16 + 13770 arm_fir_sparse_init_q31: + 13771 @ args = 12, pretend = 0, frame = 0 + 13772 @ frame_needed = 0, uses_anonymous_args = 0 + 13773 0000 10B5 push {r4, lr} + 13774 0002 0446 mov r4, r0 + 13775 0004 0298 ldr r0, [sp, #8] + 13776 0006 2061 str r0, [r4, #16] + ARM GAS /tmp/ccdao7B1.s page 240 + + + 13777 0008 A260 str r2, [r4, #8] + 13778 000a 0498 ldr r0, [sp, #16] + 13779 000c BDF80C20 ldrh r2, [sp, #12] + 13780 0010 2180 strh r1, [r4] @ movhi + 13781 0012 A281 strh r2, [r4, #12] @ movhi + 13782 0014 0021 movs r1, #0 + 13783 0016 0244 add r2, r2, r0 + 13784 0018 6180 strh r1, [r4, #2] @ movhi + 13785 001a 9200 lsls r2, r2, #2 + 13786 001c 1846 mov r0, r3 + 13787 001e FFF7FEFF bl memset + 13788 0022 6060 str r0, [r4, #4] + 13789 0024 10BD pop {r4, pc} + 13791 0026 00BF .section .text.arm_fir_sparse_init_q7,"ax",%progbits + 13792 .align 1 + 13793 .p2align 2,,3 + 13794 .global arm_fir_sparse_init_q7 + 13795 .syntax unified + 13796 .thumb + 13797 .thumb_func + 13798 .fpu fpv4-sp-d16 + 13800 arm_fir_sparse_init_q7: + 13801 @ args = 12, pretend = 0, frame = 0 + 13802 @ frame_needed = 0, uses_anonymous_args = 0 + 13803 0000 10B5 push {r4, lr} + 13804 0002 0446 mov r4, r0 + 13805 0004 0298 ldr r0, [sp, #8] + 13806 0006 2061 str r0, [r4, #16] + 13807 0008 A260 str r2, [r4, #8] + 13808 000a 0498 ldr r0, [sp, #16] + 13809 000c BDF80C20 ldrh r2, [sp, #12] + 13810 0010 2180 strh r1, [r4] @ movhi + 13811 0012 0021 movs r1, #0 + 13812 0014 A281 strh r2, [r4, #12] @ movhi + 13813 0016 6180 strh r1, [r4, #2] @ movhi + 13814 0018 0244 add r2, r2, r0 + 13815 001a 1846 mov r0, r3 + 13816 001c FFF7FEFF bl memset + 13817 0020 6060 str r0, [r4, #4] + 13818 0022 10BD pop {r4, pc} + 13820 .section .text.arm_fir_sparse_q15,"ax",%progbits + 13821 .align 1 + 13822 .p2align 2,,3 + 13823 .global arm_fir_sparse_q15 + 13824 .syntax unified + 13825 .thumb + 13826 .thumb_func + 13827 .fpu fpv4-sp-d16 + 13829 arm_fir_sparse_q15: + 13830 @ args = 8, pretend = 0, frame = 8 + 13831 @ frame_needed = 0, uses_anonymous_args = 0 + 13832 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 13833 0004 83B0 sub sp, sp, #12 + 13834 0006 D0F808B0 ldr fp, [r0, #8] + 13835 000a DDF83480 ldr r8, [sp, #52] + 13836 000e B0F80CC0 ldrh ip, [r0, #12] + 13837 0012 0192 str r2, [sp, #4] + ARM GAS /tmp/ccdao7B1.s page 241 + + + 13838 0014 DDF830A0 ldr r10, [sp, #48] + 13839 0018 4288 ldrh r2, [r0, #2] + 13840 001a 4568 ldr r5, [r0, #4] + 13841 001c 0469 ldr r4, [r0, #16] + 13842 001e B0F80090 ldrh r9, [r0] + 13843 0022 BBF90070 ldrsh r7, [fp] + 13844 0026 0090 str r0, [sp] + 13845 0028 C444 add ip, ip, r8 + 13846 002a B8F1000F cmp r8, #0 + 13847 002e 00F0A680 beq .L2464 + 13848 0032 4046 mov r0, r8 + 13849 .L2466: + 13850 0034 31F9026B ldrsh r6, [r1], #2 + 13851 0038 25F81260 strh r6, [r5, r2, lsl #1] @ movhi + 13852 003c 0132 adds r2, r2, #1 + 13853 003e 9445 cmp ip, r2 + 13854 0040 D8BF it le + 13855 0042 A2EB0C02 suble r2, r2, ip + 13856 0046 0138 subs r0, r0, #1 + 13857 0048 F4D1 bne .L2466 + 13858 004a 0099 ldr r1, [sp] + 13859 004c 4A80 strh r2, [r1, #2] @ movhi + 13860 004e 92B2 uxth r2, r2 + 13861 0050 A2EB0801 sub r1, r2, r8 + 13862 0054 2268 ldr r2, [r4] + 13863 0056 8A1A subs r2, r1, r2 + 13864 0058 00D5 bpl .L2509 + 13865 005a 6244 add r2, r2, ip + 13866 .L2509: + 13867 005c 03EB4806 add r6, r3, r8, lsl #1 + 13868 0060 4046 mov r0, r8 + 13869 0062 1946 mov r1, r3 + 13870 .L2471: + 13871 0064 35F912E0 ldrsh lr, [r5, r2, lsl #1] + 13872 0068 21F802EB strh lr, [r1], #2 @ movhi + 13873 006c 0132 adds r2, r2, #1 + 13874 006e 8E42 cmp r6, r1 + 13875 0070 08BF it eq + 13876 0072 1946 moveq r1, r3 + 13877 0074 9445 cmp ip, r2 + 13878 0076 D8BF it le + 13879 0078 A2EB0C02 suble r2, r2, ip + 13880 007c 0138 subs r0, r0, #1 + 13881 007e F1D1 bne .L2471 + 13882 0080 4146 mov r1, r8 + 13883 0082 9E46 mov lr, r3 + 13884 0084 5046 mov r0, r10 + 13885 .L2472: + 13886 0086 3EF8022B ldrh r2, [lr], #2 + 13887 008a 0139 subs r1, r1, #1 + 13888 008c 12FB07F2 smulbb r2, r2, r7 + 13889 0090 40F8042B str r2, [r0], #4 + 13890 0094 F7D1 bne .L2472 + 13891 0096 009A ldr r2, [sp] + 13892 0098 5088 ldrh r0, [r2, #2] + 13893 009a A0EB0802 sub r2, r0, r8 + 13894 .L2490: + ARM GAS /tmp/ccdao7B1.s page 242 + + + 13895 009e 6168 ldr r1, [r4, #4] + 13896 00a0 BBF90270 ldrsh r7, [fp, #2] + 13897 00a4 521A subs r2, r2, r1 + 13898 00a6 48BF it mi + 13899 00a8 6244 addmi r2, r2, ip + 13900 00aa B9F10209 subs r9, r9, #2 + 13901 00ae 04F10804 add r4, r4, #8 + 13902 00b2 0BF1040B add fp, fp, #4 + 13903 00b6 34D0 beq .L2475 + 13904 00b8 CDF830A0 str r10, [sp, #48] + 13905 00bc 9E46 mov lr, r3 + 13906 00be A246 mov r10, r4 + 13907 .L2474: + 13908 00c0 B8F1000F cmp r8, #0 + 13909 00c4 1ED0 beq .L2481 + 13910 00c6 4146 mov r1, r8 + 13911 00c8 7346 mov r3, lr + 13912 .L2478: + 13913 00ca 35F91200 ldrsh r0, [r5, r2, lsl #1] + 13914 00ce 23F8020B strh r0, [r3], #2 @ movhi + 13915 00d2 0132 adds r2, r2, #1 + 13916 00d4 9E42 cmp r6, r3 + 13917 00d6 08BF it eq + 13918 00d8 7346 moveq r3, lr + 13919 00da 9445 cmp ip, r2 + 13920 00dc D8BF it le + 13921 00de A2EB0C02 suble r2, r2, ip + 13922 00e2 0139 subs r1, r1, #1 + 13923 00e4 F1D1 bne .L2478 + 13924 00e6 0C99 ldr r1, [sp, #48] + 13925 00e8 4046 mov r0, r8 + 13926 00ea 7446 mov r4, lr + 13927 .L2479: + 13928 00ec 34F8023B ldrh r3, [r4], #2 + 13929 00f0 51F8042B ldr r2, [r1], #4 + 13930 00f4 0138 subs r0, r0, #1 + 13931 00f6 13FB0723 smlabb r3, r3, r7, r2 + 13932 00fa 41F8043C str r3, [r1, #-4] + 13933 00fe F5D1 bne .L2479 + 13934 0100 009B ldr r3, [sp] + 13935 0102 5888 ldrh r0, [r3, #2] + 13936 .L2481: + 13937 0104 5AF8043B ldr r3, [r10], #4 + 13938 0108 3BF9027B ldrsh r7, [fp], #2 + 13939 010c A0EB0802 sub r2, r0, r8 + 13940 0110 D21A subs r2, r2, r3 + 13941 0112 48BF it mi + 13942 0114 6244 addmi r2, r2, ip + 13943 0116 B9F10109 subs r9, r9, #1 + 13944 011a D1D1 bne .L2474 + 13945 011c DDF830A0 ldr r10, [sp, #48] + 13946 0120 7346 mov r3, lr + 13947 .L2475: + 13948 0122 B8F1000F cmp r8, #0 + 13949 0126 27D0 beq .L2463 + 13950 0128 4046 mov r0, r8 + 13951 012a 1946 mov r1, r3 + ARM GAS /tmp/ccdao7B1.s page 243 + + + 13952 .L2482: + 13953 012c 35F91240 ldrsh r4, [r5, r2, lsl #1] + 13954 0130 21F8024B strh r4, [r1], #2 @ movhi + 13955 0134 0132 adds r2, r2, #1 + 13956 0136 8E42 cmp r6, r1 + 13957 0138 08BF it eq + 13958 013a 1946 moveq r1, r3 + 13959 013c 9445 cmp ip, r2 + 13960 013e D8BF it le + 13961 0140 A2EB0C02 suble r2, r2, ip + 13962 0144 0138 subs r0, r0, #1 + 13963 0146 F1D1 bne .L2482 + 13964 0148 4046 mov r0, r8 + 13965 014a 5146 mov r1, r10 + 13966 .L2485: + 13967 014c 33F8022B ldrh r2, [r3], #2 + 13968 0150 51F8044B ldr r4, [r1], #4 + 13969 0154 0138 subs r0, r0, #1 + 13970 0156 12FB0742 smlabb r2, r2, r7, r4 + 13971 015a 41F8042C str r2, [r1, #-4] + 13972 015e F5D1 bne .L2485 + 13973 0160 019A ldr r2, [sp, #4] + 13974 .L2486: + 13975 0162 5AF8043B ldr r3, [r10], #4 + 13976 0166 B8F10108 subs r8, r8, #1 + 13977 016a 4FEAE333 asr r3, r3, #15 + 13978 .syntax unified + 13979 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c" + 13980 016e 03F30F03 ssat r3, #16, r3 + 13981 @ 0 "" 2 + 13982 .thumb + 13983 .syntax unified + 13984 0172 22F8023B strh r3, [r2], #2 @ movhi + 13985 0176 F4D1 bne .L2486 + 13986 .L2463: + 13987 0178 03B0 add sp, sp, #12 + 13988 @ sp needed + 13989 017a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13990 .L2464: + 13991 017e 1046 mov r0, r2 + 13992 0180 009A ldr r2, [sp] + 13993 0182 1E46 mov r6, r3 + 13994 0184 5080 strh r0, [r2, #2] @ movhi + 13995 0186 0246 mov r2, r0 + 13996 0188 89E7 b .L2490 + 13998 018a 00BF .section .text.arm_fir_sparse_q31,"ax",%progbits + 13999 .align 1 + 14000 .p2align 2,,3 + 14001 .global arm_fir_sparse_q31 + 14002 .syntax unified + 14003 .thumb + 14004 .thumb_func + 14005 .fpu fpv4-sp-d16 + 14007 arm_fir_sparse_q31: + 14008 @ args = 4, pretend = 0, frame = 8 + 14009 @ frame_needed = 0, uses_anonymous_args = 0 + 14010 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + ARM GAS /tmp/ccdao7B1.s page 244 + + + 14011 0004 83B0 sub sp, sp, #12 + 14012 0006 D0F808B0 ldr fp, [r0, #8] + 14013 000a DDF83090 ldr r9, [sp, #48] + 14014 000e 8589 ldrh r5, [r0, #12] + 14015 0010 0488 ldrh r4, [r0] + 14016 0012 0194 str r4, [sp, #4] + 14017 0014 4768 ldr r7, [r0, #4] + 14018 0016 D0F810A0 ldr r10, [r0, #16] + 14019 001a DBF80040 ldr r4, [fp] + 14020 001e 4688 ldrh r6, [r0, #2] + 14021 0020 4D44 add r5, r5, r9 + 14022 0022 B9F1000F cmp r9, #0 + 14023 0026 00F09D80 beq .L2511 + 14024 002a CC46 mov ip, r9 + 14025 002c 9E46 mov lr, r3 + 14026 .L2513: + 14027 002e 51F8043B ldr r3, [r1], #4 + 14028 0032 47F82630 str r3, [r7, r6, lsl #2] + 14029 0036 0136 adds r6, r6, #1 + 14030 0038 B542 cmp r5, r6 + 14031 003a D8BF it le + 14032 003c 761B suble r6, r6, r5 + 14033 003e BCF1010C subs ip, ip, #1 + 14034 0042 F4D1 bne .L2513 + 14035 0044 4680 strh r6, [r0, #2] @ movhi + 14036 0046 B6B2 uxth r6, r6 + 14037 0048 A6EB0901 sub r1, r6, r9 + 14038 004c 0846 mov r0, r1 + 14039 004e 0091 str r1, [sp] + 14040 0050 DAF80010 ldr r1, [r10] + 14041 0054 411A subs r1, r0, r1 + 14042 0056 7346 mov r3, lr + 14043 0058 00D5 bpl .L2557 + 14044 005a 2944 add r1, r1, r5 + 14045 .L2557: + 14046 005c 03EB8908 add r8, r3, r9, lsl #2 + 14047 0060 4E46 mov r6, r9 + 14048 0062 1846 mov r0, r3 + 14049 0064 9446 mov ip, r2 + 14050 .L2520: + 14051 0066 57F82120 ldr r2, [r7, r1, lsl #2] + 14052 006a 40F8042B str r2, [r0], #4 + 14053 006e 0131 adds r1, r1, #1 + 14054 0070 8045 cmp r8, r0 + 14055 0072 08BF it eq + 14056 0074 1846 moveq r0, r3 + 14057 0076 8D42 cmp r5, r1 + 14058 0078 D8BF it le + 14059 007a 491B suble r1, r1, r5 + 14060 007c 013E subs r6, r6, #1 + 14061 007e F2D1 bne .L2520 + 14062 0080 6246 mov r2, ip + 14063 0082 4846 mov r0, r9 + 14064 0084 1E46 mov r6, r3 + 14065 .L2521: + 14066 0086 56F8041B ldr r1, [r6], #4 + 14067 008a 0138 subs r0, r0, #1 + ARM GAS /tmp/ccdao7B1.s page 245 + + + 14068 008c 84FB011E smull r1, lr, r4, r1 + 14069 0090 4CF804EB str lr, [ip], #4 + 14070 0094 F7D1 bne .L2521 + 14071 .L2522: + 14072 0096 DAF80410 ldr r1, [r10, #4] + 14073 009a 0098 ldr r0, [sp] + 14074 009c DBF80440 ldr r4, [fp, #4] + 14075 00a0 411A subs r1, r0, r1 + 14076 00a2 0AF1080A add r10, r10, #8 + 14077 00a6 0BF1080B add fp, fp, #8 + 14078 00aa 00D5 bpl .L2517 + 14079 00ac 2944 add r1, r1, r5 + 14080 .L2517: + 14081 00ae 0198 ldr r0, [sp, #4] + 14082 00b0 0238 subs r0, r0, #2 + 14083 00b2 2DD0 beq .L2524 + 14084 00b4 8646 mov lr, r0 + 14085 00b6 0192 str r2, [sp, #4] + 14086 .L2523: + 14087 00b8 B9F1000F cmp r9, #0 + 14088 00bc 1CD0 beq .L2530 + 14089 00be 4846 mov r0, r9 + 14090 00c0 1A46 mov r2, r3 + 14091 .L2527: + 14092 00c2 57F82160 ldr r6, [r7, r1, lsl #2] + 14093 00c6 42F8046B str r6, [r2], #4 + 14094 00ca 0131 adds r1, r1, #1 + 14095 00cc 9045 cmp r8, r2 + 14096 00ce 08BF it eq + 14097 00d0 1A46 moveq r2, r3 + 14098 00d2 8D42 cmp r5, r1 + 14099 00d4 D8BF it le + 14100 00d6 491B suble r1, r1, r5 + 14101 00d8 0138 subs r0, r0, #1 + 14102 00da F2D1 bne .L2527 + 14103 00dc 019A ldr r2, [sp, #4] + 14104 00de 4846 mov r0, r9 + 14105 00e0 161F subs r6, r2, #4 + 14106 00e2 9C46 mov ip, r3 + 14107 .L2528: + 14108 00e4 5CF8042B ldr r2, [ip], #4 + 14109 00e8 84FB0212 smull r1, r2, r4, r2 + 14110 00ec 56F8041F ldr r1, [r6, #4]! + 14111 00f0 5218 adds r2, r2, r1 + 14112 00f2 0138 subs r0, r0, #1 + 14113 00f4 3260 str r2, [r6] + 14114 00f6 F5D1 bne .L2528 + 14115 .L2530: + 14116 00f8 5AF8041B ldr r1, [r10], #4 + 14117 00fc 009A ldr r2, [sp] + 14118 00fe 5BF8044B ldr r4, [fp], #4 + 14119 0102 511A subs r1, r2, r1 + 14120 0104 48BF it mi + 14121 0106 4919 addmi r1, r1, r5 + 14122 0108 BEF1010E subs lr, lr, #1 + 14123 010c D4D1 bne .L2523 + 14124 010e 019A ldr r2, [sp, #4] + ARM GAS /tmp/ccdao7B1.s page 246 + + + 14125 .L2524: + 14126 0110 B9F1000F cmp r9, #0 + 14127 0114 23D0 beq .L2510 + 14128 0116 CC46 mov ip, r9 + 14129 0118 1E46 mov r6, r3 + 14130 .L2531: + 14131 011a 57F82100 ldr r0, [r7, r1, lsl #2] + 14132 011e 46F8040B str r0, [r6], #4 + 14133 0122 0131 adds r1, r1, #1 + 14134 0124 B045 cmp r8, r6 + 14135 0126 08BF it eq + 14136 0128 1E46 moveq r6, r3 + 14137 012a 8D42 cmp r5, r1 + 14138 012c D8BF it le + 14139 012e 491B suble r1, r1, r5 + 14140 0130 BCF1010C subs ip, ip, #1 + 14141 0134 F1D1 bne .L2531 + 14142 0136 161F subs r6, r2, #4 + 14143 0138 4D46 mov r5, r9 + 14144 .L2534: + 14145 013a 53F8041B ldr r1, [r3], #4 + 14146 013e 56F8047F ldr r7, [r6, #4]! + 14147 0142 84FB0101 smull r0, r1, r4, r1 + 14148 0146 C919 adds r1, r1, r7 + 14149 0148 013D subs r5, r5, #1 + 14150 014a 3160 str r1, [r6] + 14151 014c F5D1 bne .L2534 + 14152 .L2535: + 14153 014e 1368 ldr r3, [r2] + 14154 0150 B9F10109 subs r9, r9, #1 + 14155 0154 4FEA4303 lsl r3, r3, #1 + 14156 0158 42F8043B str r3, [r2], #4 + 14157 015c F7D1 bne .L2535 + 14158 .L2510: + 14159 015e 03B0 add sp, sp, #12 + 14160 @ sp needed + 14161 0160 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14162 .L2511: + 14163 0164 4680 strh r6, [r0, #2] @ movhi + 14164 0166 0096 str r6, [sp] + 14165 0168 9846 mov r8, r3 + 14166 016a 94E7 b .L2522 + 14168 .section .text.arm_fir_sparse_q7,"ax",%progbits + 14169 .align 1 + 14170 .p2align 2,,3 + 14171 .global arm_fir_sparse_q7 + 14172 .syntax unified + 14173 .thumb + 14174 .thumb_func + 14175 .fpu fpv4-sp-d16 + 14177 arm_fir_sparse_q7: + 14178 @ args = 8, pretend = 0, frame = 16 + 14179 @ frame_needed = 0, uses_anonymous_args = 0 + 14180 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 14181 0004 85B0 sub sp, sp, #20 + 14182 0006 DDE90E76 ldrd r7, r6, [sp, #56] + 14183 000a D0F808B0 ldr fp, [r0, #8] + ARM GAS /tmp/ccdao7B1.s page 247 + + + 14184 000e B0F80CE0 ldrh lr, [r0, #12] + 14185 0012 B0F802C0 ldrh ip, [r0, #2] + 14186 0016 4468 ldr r4, [r0, #4] + 14187 0018 0569 ldr r5, [r0, #16] + 14188 001a 0190 str r0, [sp, #4] + 14189 001c 0088 ldrh r0, [r0] + 14190 001e 9BF90080 ldrsb r8, [fp] + 14191 0022 0390 str r0, [sp, #12] + 14192 0024 B644 add lr, lr, r6 + 14193 0026 CDF808C0 str ip, [sp, #8] + 14194 002a 002E cmp r6, #0 + 14195 002c 00F0A080 beq .L2559 + 14196 0030 01EB0609 add r9, r1, r6 + 14197 .L2561: + 14198 0034 11F9010B ldrsb r0, [r1], #1 + 14199 0038 04F80C00 strb r0, [r4, ip] + 14200 003c 0CF1010C add ip, ip, #1 + 14201 0040 E645 cmp lr, ip + 14202 0042 D8BF it le + 14203 0044 ACEB0E0C suble ip, ip, lr + 14204 0048 4945 cmp r1, r9 + 14205 004a F3D1 bne .L2561 + 14206 004c 0199 ldr r1, [sp, #4] + 14207 004e A1F802C0 strh ip, [r1, #2] @ movhi + 14208 0052 1FFA8CF1 uxth r1, ip + 14209 0056 881B subs r0, r1, r6 + 14210 0058 2968 ldr r1, [r5] + 14211 005a 411A subs r1, r0, r1 + 14212 005c 00D5 bpl .L2602 + 14213 005e 7144 add r1, r1, lr + 14214 .L2602: + 14215 0060 03EB060C add ip, r3, r6 + 14216 0064 B146 mov r9, r6 + 14217 0066 1846 mov r0, r3 + 14218 .L2566: + 14219 0068 14F901A0 ldrsb r10, [r4, r1] + 14220 006c 00F801AB strb r10, [r0], #1 + 14221 0070 0131 adds r1, r1, #1 + 14222 0072 8445 cmp ip, r0 + 14223 0074 08BF it eq + 14224 0076 1846 moveq r0, r3 + 14225 0078 8E45 cmp lr, r1 + 14226 007a D8BF it le + 14227 007c A1EB0E01 suble r1, r1, lr + 14228 0080 B9F10109 subs r9, r9, #1 + 14229 0084 F0D1 bne .L2566 + 14230 0086 1846 mov r0, r3 + 14231 0088 B946 mov r9, r7 + 14232 .L2567: + 14233 008a 10F9011B ldrsb r1, [r0], #1 + 14234 008e 11FB08F1 smulbb r1, r1, r8 + 14235 0092 6045 cmp r0, ip + 14236 0094 49F8041B str r1, [r9], #4 + 14237 0098 F7D1 bne .L2567 + 14238 009a 0199 ldr r1, [sp, #4] + 14239 009c 4988 ldrh r1, [r1, #2] + 14240 009e 0291 str r1, [sp, #8] + ARM GAS /tmp/ccdao7B1.s page 248 + + + 14241 00a0 891B subs r1, r1, r6 + 14242 .L2585: + 14243 00a2 D5F804A0 ldr r10, [r5, #4] + 14244 00a6 0398 ldr r0, [sp, #12] + 14245 00a8 B1EB0A01 subs r1, r1, r10 + 14246 00ac 48BF it mi + 14247 00ae 7144 addmi r1, r1, lr + 14248 00b0 0228 cmp r0, #2 + 14249 00b2 05F10809 add r9, r5, #8 + 14250 00b6 0BF10208 add r8, fp, #2 + 14251 00ba 9BF90150 ldrsb r5, [fp, #1] + 14252 00be 2ED0 beq .L2569 + 14253 00c0 5844 add r0, r0, fp + 14254 00c2 8246 mov r10, r0 + 14255 00c4 0298 ldr r0, [sp, #8] + 14256 00c6 0E97 str r7, [sp, #56] + 14257 00c8 9346 mov fp, r2 + 14258 .L2570: + 14259 00ca E6B1 cbz r6, .L2576 + 14260 00cc 3046 mov r0, r6 + 14261 00ce 1A46 mov r2, r3 + 14262 .L2573: + 14263 00d0 6756 ldrsb r7, [r4, r1] + 14264 00d2 02F8017B strb r7, [r2], #1 + 14265 00d6 0131 adds r1, r1, #1 + 14266 00d8 9445 cmp ip, r2 + 14267 00da 08BF it eq + 14268 00dc 1A46 moveq r2, r3 + 14269 00de 8E45 cmp lr, r1 + 14270 00e0 D8BF it le + 14271 00e2 A1EB0E01 suble r1, r1, lr + 14272 00e6 0138 subs r0, r0, #1 + 14273 00e8 F2D1 bne .L2573 + 14274 00ea 0E9A ldr r2, [sp, #56] + 14275 00ec 1946 mov r1, r3 + 14276 00ee 101F subs r0, r2, #4 + 14277 .L2574: + 14278 00f0 11F9012B ldrsb r2, [r1], #1 + 14279 00f4 50F8047F ldr r7, [r0, #4]! + 14280 00f8 6145 cmp r1, ip + 14281 00fa 12FB0572 smlabb r2, r2, r5, r7 + 14282 00fe 0260 str r2, [r0] + 14283 0100 F6D1 bne .L2574 + 14284 0102 019A ldr r2, [sp, #4] + 14285 0104 5088 ldrh r0, [r2, #2] + 14286 .L2576: + 14287 0106 59F8042B ldr r2, [r9], #4 + 14288 010a 18F9015B ldrsb r5, [r8], #1 + 14289 010e 811B subs r1, r0, r6 + 14290 0110 891A subs r1, r1, r2 + 14291 0112 48BF it mi + 14292 0114 7144 addmi r1, r1, lr + 14293 0116 D045 cmp r8, r10 + 14294 0118 D7D1 bne .L2570 + 14295 011a 0E9F ldr r7, [sp, #56] + 14296 011c 5A46 mov r2, fp + 14297 .L2569: + ARM GAS /tmp/ccdao7B1.s page 249 + + + 14298 011e 26B3 cbz r6, .L2558 + 14299 0120 B046 mov r8, r6 + 14300 0122 1846 mov r0, r3 + 14301 .L2577: + 14302 0124 14F90190 ldrsb r9, [r4, r1] + 14303 0128 00F8019B strb r9, [r0], #1 + 14304 012c 0131 adds r1, r1, #1 + 14305 012e 8445 cmp ip, r0 + 14306 0130 08BF it eq + 14307 0132 1846 moveq r0, r3 + 14308 0134 8E45 cmp lr, r1 + 14309 0136 D8BF it le + 14310 0138 A1EB0E01 suble r1, r1, lr + 14311 013c B8F10108 subs r8, r8, #1 + 14312 0140 F0D1 bne .L2577 + 14313 0142 381F subs r0, r7, #4 + 14314 .L2580: + 14315 0144 13F9011B ldrsb r1, [r3], #1 + 14316 0148 50F8044F ldr r4, [r0, #4]! + 14317 014c 6345 cmp r3, ip + 14318 014e 11FB0541 smlabb r1, r1, r5, r4 + 14319 0152 0160 str r1, [r0] + 14320 0154 F6D1 bne .L2580 + 14321 0156 1644 add r6, r6, r2 + 14322 .L2581: + 14323 0158 57F8043B ldr r3, [r7], #4 + 14324 015c DB11 asrs r3, r3, #7 + 14325 .syntax unified + 14326 @ 331 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c" 1 + 14327 015e 03F30703 ssat r3, #8, r3 + 14328 @ 0 "" 2 + 14329 .thumb + 14330 .syntax unified + 14331 0162 02F8013B strb r3, [r2], #1 + 14332 0166 B242 cmp r2, r6 + 14333 0168 F6D1 bne .L2581 + 14334 .L2558: + 14335 016a 05B0 add sp, sp, #20 + 14336 @ sp needed + 14337 016c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14338 .L2559: + 14339 0170 0199 ldr r1, [sp, #4] + 14340 0172 A1F802C0 strh ip, [r1, #2] @ movhi + 14341 0176 6146 mov r1, ip + 14342 0178 9C46 mov ip, r3 + 14343 017a 92E7 b .L2585 + 14345 .section .text.arm_iir_lattice_f32,"ax",%progbits + 14346 .align 1 + 14347 .p2align 2,,3 + 14348 .global arm_iir_lattice_f32 + 14349 .syntax unified + 14350 .thumb + 14351 .thumb_func + 14352 .fpu fpv4-sp-d16 + 14354 arm_iir_lattice_f32: + 14355 @ args = 0, pretend = 0, frame = 8 + 14356 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccdao7B1.s page 250 + + + 14357 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 14358 0004 83B0 sub sp, sp, #12 + 14359 0006 4768 ldr r7, [r0, #4] + 14360 0008 0488 ldrh r4, [r0] + 14361 000a 0193 str r3, [sp, #4] + 14362 000c 7BB3 cbz r3, .L2604 + 14363 000e D0E902B8 ldrd fp, r8, [r0, #8] + 14364 0012 1E46 mov r6, r3 + 14365 0014 4FEA840A lsl r10, r4, #2 + 14366 0018 08EB8409 add r9, r8, r4, lsl #2 + 14367 001c 3D46 mov r5, r7 + 14368 .L2607: + 14369 001e B1EC017A vldmia.32 r1!, {s14} + 14370 0022 9FED1B6A vldr.32 s12, .L2621 + 14371 0026 7CB3 cbz r4, .L2610 + 14372 0028 2046 mov r0, r4 + 14373 002a C646 mov lr, r8 + 14374 002c DC46 mov ip, fp + 14375 002e 2B46 mov r3, r5 + 14376 .L2606: + 14377 0030 F3EC017A vldmia.32 r3!, {s15} + 14378 0034 FCEC016A vldmia.32 ip!, {s13} + 14379 0038 FEEC015A vldmia.32 lr!, {s11} + 14380 003c A6EEE77A vfms.f32 s14, s13, s15 + 14381 0040 0138 subs r0, r0, #1 + 14382 0042 E6EE877A vfma.f32 s15, s13, s14 + 14383 0046 A5EEA76A vfma.f32 s12, s11, s15 + 14384 004a 43ED017A vstr.32 s15, [r3, #-4] + 14385 004e EFD1 bne .L2606 + 14386 0050 05EB0A03 add r3, r5, r10 + 14387 0054 4846 mov r0, r9 + 14388 .L2605: + 14389 0056 D0ED007A vldr.32 s15, [r0] + 14390 005a 83ED007A vstr.32 s14, [r3] + 14391 005e A7EE876A vfma.f32 s12, s15, s14 + 14392 0062 013E subs r6, r6, #1 + 14393 0064 05F10405 add r5, r5, #4 + 14394 0068 A2EC016A vstmia.32 r2!, {s12} + 14395 006c D7D1 bne .L2607 + 14396 .L2604: + 14397 006e 019B ldr r3, [sp, #4] + 14398 0070 07EB8303 add r3, r7, r3, lsl #2 + 14399 0074 2CB1 cbz r4, .L2603 + 14400 .L2609: + 14401 0076 53F8042B ldr r2, [r3], #4 @ float + 14402 007a 47F8042B str r2, [r7], #4 @ float + 14403 007e 013C subs r4, r4, #1 + 14404 0080 F9D1 bne .L2609 + 14405 .L2603: + 14406 0082 03B0 add sp, sp, #12 + 14407 @ sp needed + 14408 0084 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14409 .L2610: + 14410 0088 4046 mov r0, r8 + 14411 008a 2B46 mov r3, r5 + 14412 008c E3E7 b .L2605 + 14413 .L2622: + ARM GAS /tmp/ccdao7B1.s page 251 + + + 14414 008e 00BF .align 2 + 14415 .L2621: + 14416 0090 00000000 .word 0 + 14418 .section .text.arm_iir_lattice_init_f32,"ax",%progbits + 14419 .align 1 + 14420 .p2align 2,,3 + 14421 .global arm_iir_lattice_init_f32 + 14422 .syntax unified + 14423 .thumb + 14424 .thumb_func + 14425 .fpu fpv4-sp-d16 + 14427 arm_iir_lattice_init_f32: + 14428 @ args = 8, pretend = 0, frame = 0 + 14429 @ frame_needed = 0, uses_anonymous_args = 0 + 14430 0000 38B5 push {r3, r4, r5, lr} + 14431 0002 8260 str r2, [r0, #8] + 14432 0004 059A ldr r2, [sp, #20] + 14433 0006 049D ldr r5, [sp, #16] + 14434 0008 0180 strh r1, [r0] @ movhi + 14435 000a 8C46 mov ip, r1 + 14436 000c 0446 mov r4, r0 + 14437 000e 6244 add r2, r2, ip + 14438 0010 C360 str r3, [r0, #12] + 14439 0012 0021 movs r1, #0 + 14440 0014 2846 mov r0, r5 + 14441 0016 9200 lsls r2, r2, #2 + 14442 0018 FFF7FEFF bl memset + 14443 001c 6560 str r5, [r4, #4] + 14444 001e 38BD pop {r3, r4, r5, pc} + 14446 .section .text.arm_iir_lattice_init_q15,"ax",%progbits + 14447 .align 1 + 14448 .p2align 2,,3 + 14449 .global arm_iir_lattice_init_q15 + 14450 .syntax unified + 14451 .thumb + 14452 .thumb_func + 14453 .fpu fpv4-sp-d16 + 14455 arm_iir_lattice_init_q15: + 14456 @ args = 8, pretend = 0, frame = 0 + 14457 @ frame_needed = 0, uses_anonymous_args = 0 + 14458 0000 38B5 push {r3, r4, r5, lr} + 14459 0002 8260 str r2, [r0, #8] + 14460 0004 059A ldr r2, [sp, #20] + 14461 0006 049D ldr r5, [sp, #16] + 14462 0008 0180 strh r1, [r0] @ movhi + 14463 000a 8C46 mov ip, r1 + 14464 000c 0446 mov r4, r0 + 14465 000e 6244 add r2, r2, ip + 14466 0010 C360 str r3, [r0, #12] + 14467 0012 0021 movs r1, #0 + 14468 0014 2846 mov r0, r5 + 14469 0016 5200 lsls r2, r2, #1 + 14470 0018 FFF7FEFF bl memset + 14471 001c 6560 str r5, [r4, #4] + 14472 001e 38BD pop {r3, r4, r5, pc} + 14474 .section .text.arm_iir_lattice_init_q31,"ax",%progbits + 14475 .align 1 + ARM GAS /tmp/ccdao7B1.s page 252 + + + 14476 .p2align 2,,3 + 14477 .global arm_iir_lattice_init_q31 + 14478 .syntax unified + 14479 .thumb + 14480 .thumb_func + 14481 .fpu fpv4-sp-d16 + 14483 arm_iir_lattice_init_q31: + 14484 @ args = 8, pretend = 0, frame = 0 + 14485 @ frame_needed = 0, uses_anonymous_args = 0 + 14486 0000 38B5 push {r3, r4, r5, lr} + 14487 0002 8260 str r2, [r0, #8] + 14488 0004 059A ldr r2, [sp, #20] + 14489 0006 049D ldr r5, [sp, #16] + 14490 0008 0180 strh r1, [r0] @ movhi + 14491 000a 8C46 mov ip, r1 + 14492 000c 0446 mov r4, r0 + 14493 000e 6244 add r2, r2, ip + 14494 0010 C360 str r3, [r0, #12] + 14495 0012 0021 movs r1, #0 + 14496 0014 2846 mov r0, r5 + 14497 0016 9200 lsls r2, r2, #2 + 14498 0018 FFF7FEFF bl memset + 14499 001c 6560 str r5, [r4, #4] + 14500 001e 38BD pop {r3, r4, r5, pc} + 14502 .section .text.arm_iir_lattice_q15,"ax",%progbits + 14503 .align 1 + 14504 .p2align 2,,3 + 14505 .global arm_iir_lattice_q15 + 14506 .syntax unified + 14507 .thumb + 14508 .thumb_func + 14509 .fpu fpv4-sp-d16 + 14511 arm_iir_lattice_q15: + 14512 @ args = 0, pretend = 0, frame = 40 + 14513 @ frame_needed = 0, uses_anonymous_args = 0 + 14514 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 14515 0004 8BB0 sub sp, sp, #44 + 14516 0006 4468 ldr r4, [r0, #4] + 14517 0008 0091 str r1, [sp] + 14518 000a 0894 str r4, [sp, #32] + 14519 000c 0188 ldrh r1, [r0] + 14520 000e 0993 str r3, [sp, #36] + 14521 0010 002B cmp r3, #0 + 14522 0012 00F09B80 beq .L2630 + 14523 0016 9346 mov fp, r2 + 14524 0018 C268 ldr r2, [r0, #12] + 14525 001a 0292 str r2, [sp, #8] + 14526 001c 951C adds r5, r2, #2 + 14527 001e 8068 ldr r0, [r0, #8] + 14528 0020 0390 str r0, [sp, #12] + 14529 0022 4A1E subs r2, r1, #1 + 14530 0024 4900 lsls r1, r1, #1 + 14531 0026 0239 subs r1, r1, #2 + 14532 0028 0791 str r1, [sp, #28] + 14533 002a 811C adds r1, r0, #2 + 14534 002c 0591 str r1, [sp, #20] + 14535 002e 05EB4201 add r1, r5, r2, lsl #1 + ARM GAS /tmp/ccdao7B1.s page 253 + + + 14536 0032 0495 str r5, [sp, #16] + 14537 0034 0691 str r1, [sp, #24] + 14538 0036 0193 str r3, [sp, #4] + 14539 0038 A246 mov r10, r4 + 14540 .L2633: + 14541 003a 0399 ldr r1, [sp, #12] + 14542 003c 009C ldr r4, [sp] + 14543 003e B1F90000 ldrsh r0, [r1] + 14544 0042 3AF9023B ldrsh r3, [r10], #2 + 14545 0046 34F9021B ldrsh r1, [r4], #2 + 14546 004a 0094 str r4, [sp] + 14547 004c 00FB03F4 mul r4, r0, r3 + 14548 0050 A1EBE431 sub r1, r1, r4, asr #15 + 14549 .syntax unified + 14550 @ 108 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" + 14551 0054 01F30F01 ssat r1, #16, r1 + 14552 @ 0 "" 2 + 14553 .thumb + 14554 .syntax unified + 14555 0058 01FB00F0 mul r0, r1, r0 + 14556 005c 03EBE033 add r3, r3, r0, asr #15 + 14557 0060 0298 ldr r0, [sp, #8] + 14558 .syntax unified + 14559 @ 112 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" + 14560 0062 03F30F03 ssat r3, #16, r3 + 14561 @ 0 "" 2 + 14562 .thumb + 14563 .syntax unified + 14564 0066 2AF8023C strh r3, [r10, #-2] @ movhi + 14565 006a B0F90050 ldrsh r5, [r0] + 14566 006e 03FB05F5 mul r5, r3, r5 + 14567 0072 4FEAE57E asr lr, r5, #31 + 14568 0076 002A cmp r2, #0 + 14569 0078 58D0 beq .L2643 + 14570 007a DDE90498 ldrd r9, r8, [sp, #16] + 14571 007e 9446 mov ip, r2 + 14572 0080 5746 mov r7, r10 + 14573 .L2632: + 14574 0082 37F9023B ldrsh r3, [r7], #2 + 14575 0086 38F9024B ldrsh r4, [r8], #2 + 14576 008a 39F9020B ldrsh r0, [r9], #2 + 14577 008e 04FB03F6 mul r6, r4, r3 + 14578 0092 A1EBE631 sub r1, r1, r6, asr #15 + 14579 .syntax unified + 14580 @ 236 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" + 14581 0096 01F30F01 ssat r1, #16, r1 + 14582 @ 0 "" 2 + 14583 .thumb + 14584 .syntax unified + 14585 009a 01FB04F4 mul r4, r1, r4 + 14586 009e 03EBE433 add r3, r3, r4, asr #15 + 14587 .syntax unified + 14588 @ 238 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" + 14589 00a2 03F30F03 ssat r3, #16, r3 + 14590 @ 0 "" 2 + 14591 .thumb + 14592 .syntax unified + ARM GAS /tmp/ccdao7B1.s page 254 + + + 14593 00a6 03FB00F0 mul r0, r3, r0 + 14594 00aa 4519 adds r5, r0, r5 + 14595 00ac 4EEBE07E adc lr, lr, r0, asr #31 + 14596 00b0 BCF1010C subs ip, ip, #1 + 14597 00b4 27F8023C strh r3, [r7, #-2] @ movhi + 14598 00b8 E3D1 bne .L2632 + 14599 00ba 079B ldr r3, [sp, #28] + 14600 00bc 0AEB0300 add r0, r10, r3 + 14601 00c0 069B ldr r3, [sp, #24] + 14602 .L2631: + 14603 00c2 B3F90030 ldrsh r3, [r3] + 14604 00c6 0180 strh r1, [r0] @ movhi + 14605 00c8 01FB03F3 mul r3, r1, r3 + 14606 00cc 5D19 adds r5, r3, r5 + 14607 00ce 4EEBE373 adc r3, lr, r3, asr #31 + 14608 00d2 ED0B lsrs r5, r5, #15 + 14609 00d4 45EA4345 orr r5, r5, r3, lsl #17 + 14610 00d8 019B ldr r3, [sp, #4] + 14611 .syntax unified + 14612 @ 252 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c" + 14613 00da 05F30F05 ssat r5, #16, r5 + 14614 @ 0 "" 2 + 14615 .thumb + 14616 .syntax unified + 14617 00de 013B subs r3, r3, #1 + 14618 00e0 2BF8025B strh r5, [fp], #2 @ movhi + 14619 00e4 0193 str r3, [sp, #4] + 14620 00e6 A8D1 bne .L2633 + 14621 .L2634: + 14622 00e8 0999 ldr r1, [sp, #36] + 14623 00ea 089C ldr r4, [sp, #32] + 14624 00ec 4B00 lsls r3, r1, #1 + 14625 00ee 04EB4101 add r1, r4, r1, lsl #1 + 14626 00f2 C2B1 cbz r2, .L2629 + 14627 00f4 501E subs r0, r2, #1 + 14628 00f6 0928 cmp r0, #9 + 14629 00f8 1BD9 bls .L2636 + 14630 00fa 0233 adds r3, r3, #2 + 14631 00fc 19D0 beq .L2636 + 14632 00fe 931E subs r3, r2, #2 + 14633 0100 5B08 lsrs r3, r3, #1 + 14634 0102 0133 adds r3, r3, #1 + 14635 0104 0D46 mov r5, r1 + 14636 0106 0020 movs r0, #0 + 14637 .L2637: + 14638 0108 0130 adds r0, r0, #1 + 14639 010a 55F8046B ldr r6, [r5], #4 @ unaligned + 14640 010e 44F8046B str r6, [r4], #4 @ unaligned + 14641 0112 8342 cmp r3, r0 + 14642 0114 F8D8 bhi .L2637 + 14643 0116 B2EB430F cmp r2, r3, lsl #1 + 14644 011a 04D0 beq .L2629 + 14645 011c 31F92320 ldrsh r2, [r1, r3, lsl #2] + 14646 0120 0899 ldr r1, [sp, #32] + 14647 0122 21F82320 strh r2, [r1, r3, lsl #2] @ movhi + 14648 .L2629: + 14649 0126 0BB0 add sp, sp, #44 + ARM GAS /tmp/ccdao7B1.s page 255 + + + 14650 @ sp needed + 14651 0128 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14652 .L2643: + 14653 012c 049B ldr r3, [sp, #16] + 14654 012e 5046 mov r0, r10 + 14655 0130 C7E7 b .L2631 + 14656 .L2636: + 14657 0132 089B ldr r3, [sp, #32] + 14658 0134 023B subs r3, r3, #2 + 14659 0136 00E0 b .L2641 + 14660 .L2656: + 14661 0138 0138 subs r0, r0, #1 + 14662 .L2641: + 14663 013a 31F9022B ldrsh r2, [r1], #2 + 14664 013e 23F8022F strh r2, [r3, #2]! @ movhi + 14665 0142 0028 cmp r0, #0 + 14666 0144 F8D1 bne .L2656 + 14667 0146 0BB0 add sp, sp, #44 + 14668 @ sp needed + 14669 0148 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14670 .L2630: + 14671 014c 4A1E subs r2, r1, #1 + 14672 014e CBE7 b .L2634 + 14674 .section .text.arm_iir_lattice_q31,"ax",%progbits + 14675 .align 1 + 14676 .p2align 2,,3 + 14677 .global arm_iir_lattice_q31 + 14678 .syntax unified + 14679 .thumb + 14680 .thumb_func + 14681 .fpu fpv4-sp-d16 + 14683 arm_iir_lattice_q31: + 14684 @ args = 0, pretend = 0, frame = 40 + 14685 @ frame_needed = 0, uses_anonymous_args = 0 + 14686 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 14687 0004 8BB0 sub sp, sp, #44 + 14688 0006 4468 ldr r4, [r0, #4] + 14689 0008 0894 str r4, [sp, #32] + 14690 000a CDE90012 strd r1, r2, [sp] + 14691 000e 0993 str r3, [sp, #36] + 14692 0010 0288 ldrh r2, [r0] + 14693 0012 002B cmp r3, #0 + 14694 0014 00F0AD80 beq .L2658 + 14695 0018 D0E9021B ldrd r1, fp, [r0, #8] + 14696 001c 02F1FF3A add r10, r2, #-1 + 14697 0020 9200 lsls r2, r2, #2 + 14698 0022 043A subs r2, r2, #4 + 14699 0024 0BF10400 add r0, fp, #4 + 14700 0028 0792 str r2, [sp, #28] + 14701 002a 0A1D adds r2, r1, #4 + 14702 002c 0592 str r2, [sp, #20] + 14703 002e 00EB8A02 add r2, r0, r10, lsl #2 + 14704 0032 0391 str r1, [sp, #12] + 14705 0034 0490 str r0, [sp, #16] + 14706 0036 0692 str r2, [sp, #24] + 14707 0038 0293 str r3, [sp, #8] + 14708 003a A146 mov r9, r4 + ARM GAS /tmp/ccdao7B1.s page 256 + + + 14709 .L2661: + 14710 003c 039B ldr r3, [sp, #12] + 14711 003e 009A ldr r2, [sp] + 14712 0040 59F8044B ldr r4, [r9], #4 + 14713 0044 1B68 ldr r3, [r3] + 14714 0046 52F8040B ldr r0, [r2], #4 + 14715 004a 0092 str r2, [sp] + 14716 004c 84FB0315 smull r1, r5, r4, r3 + 14717 0050 CA0F lsrs r2, r1, #31 + 14718 0052 42EA4502 orr r2, r2, r5, lsl #1 + 14719 .syntax unified + 14720 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 14721 0056 82FAA0F1 qsub r1, r0, r2 + 14722 @ 0 "" 2 + 14723 .thumb + 14724 .syntax unified + 14725 005a 83FB0152 smull r5, r2, r3, r1 + 14726 005e ED0F lsrs r5, r5, #31 + 14727 0060 45EA4205 orr r5, r5, r2, lsl #1 + 14728 0064 C817 asrs r0, r1, #31 + 14729 .syntax unified + 14730 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 14731 0066 85FA84F5 qadd r5, r4, r5 + 14732 @ 0 "" 2 + 14733 .thumb + 14734 .syntax unified + 14735 006a 49F8045C str r5, [r9, #-4] + 14736 006e DBF80040 ldr r4, [fp] + 14737 0072 85FB0445 smull r4, r5, r5, r4 + 14738 0076 BAF1000F cmp r10, #0 + 14739 007a 6AD0 beq .L2671 + 14740 007c DDE904EC ldrd lr, ip, [sp, #16] + 14741 0080 5746 mov r7, r10 + 14742 0082 4E46 mov r6, r9 + 14743 .L2660: + 14744 0084 56F8042B ldr r2, [r6], #4 + 14745 0088 5CF8043B ldr r3, [ip], #4 + 14746 008c 82FB0308 smull r0, r8, r2, r3 + 14747 0090 C00F lsrs r0, r0, #31 + 14748 0092 40EA4800 orr r0, r0, r8, lsl #1 + 14749 .syntax unified + 14750 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 14751 0096 80FAA1F1 qsub r1, r1, r0 + 14752 @ 0 "" 2 + 14753 .thumb + 14754 .syntax unified + 14755 009a 83FB0130 smull r3, r0, r3, r1 + 14756 009e DB0F lsrs r3, r3, #31 + 14757 00a0 43EA4003 orr r3, r3, r0, lsl #1 + 14758 00a4 C817 asrs r0, r1, #31 + 14759 .syntax unified + 14760 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 14761 00a6 83FA82F3 qadd r3, r2, r3 + 14762 @ 0 "" 2 + 14763 .thumb + 14764 .syntax unified + 14765 00aa 5EF8042B ldr r2, [lr], #4 + ARM GAS /tmp/ccdao7B1.s page 257 + + + 14766 00ae 46F8043C str r3, [r6, #-4] + 14767 00b2 013F subs r7, r7, #1 + 14768 00b4 C3FB0245 smlal r4, r5, r3, r2 + 14769 00b8 E4D1 bne .L2660 + 14770 00ba 079B ldr r3, [sp, #28] + 14771 00bc 09EB0302 add r2, r9, r3 + 14772 00c0 069B ldr r3, [sp, #24] + 14773 .L2659: + 14774 00c2 1B68 ldr r3, [r3] + 14775 00c4 1160 str r1, [r2] + 14776 00c6 03FB00F0 mul r0, r3, r0 + 14777 00ca DA17 asrs r2, r3, #31 + 14778 00cc 01FB0200 mla r0, r1, r2, r0 + 14779 00d0 A3FB0131 umull r3, r1, r3, r1 + 14780 00d4 1B19 adds r3, r3, r4 + 14781 00d6 0844 add r0, r0, r1 + 14782 00d8 019A ldr r2, [sp, #4] + 14783 00da 40EB0505 adc r5, r0, r5 + 14784 00de DB0F lsrs r3, r3, #31 + 14785 00e0 43EA4503 orr r3, r3, r5, lsl #1 + 14786 00e4 42F8043B str r3, [r2], #4 + 14787 00e8 029B ldr r3, [sp, #8] + 14788 00ea 0192 str r2, [sp, #4] + 14789 00ec 013B subs r3, r3, #1 + 14790 00ee 0293 str r3, [sp, #8] + 14791 00f0 A4D1 bne .L2661 + 14792 .L2662: + 14793 00f2 099A ldr r2, [sp, #36] + 14794 00f4 0898 ldr r0, [sp, #32] + 14795 00f6 9300 lsls r3, r2, #2 + 14796 00f8 00EB8201 add r1, r0, r2, lsl #2 + 14797 00fc BAF1000F cmp r10, #0 + 14798 0100 24D0 beq .L2657 + 14799 0102 40EA0102 orr r2, r0, r1 + 14800 0106 0433 adds r3, r3, #4 + 14801 0108 C2F30202 ubfx r2, r2, #0, #3 + 14802 010c 18BF it ne + 14803 010e 0123 movne r3, #1 + 14804 0110 002A cmp r2, #0 + 14805 0112 18BF it ne + 14806 0114 0023 movne r3, #0 + 14807 0116 0AF1FF32 add r2, r10, #-1 + 14808 011a EBB1 cbz r3, .L2664 + 14809 011c 0B2A cmp r2, #11 + 14810 011e 1BD9 bls .L2664 + 14811 0120 AAF10203 sub r3, r10, #2 + 14812 0124 5B08 lsrs r3, r3, #1 + 14813 0126 0133 adds r3, r3, #1 + 14814 0128 A1F10804 sub r4, r1, #8 + 14815 012c 0022 movs r2, #0 + 14816 .L2665: + 14817 012e F4E90267 ldrd r6, [r4, #8]! + 14818 0132 0132 adds r2, r2, #1 + 14819 0134 9A42 cmp r2, r3 + 14820 0136 E0E80267 strd r6, [r0], #8 + 14821 013a F8D3 bcc .L2665 + 14822 013c BAEB430F cmp r10, r3, lsl #1 + ARM GAS /tmp/ccdao7B1.s page 258 + + + 14823 0140 04D0 beq .L2657 + 14824 0142 51F83320 ldr r2, [r1, r3, lsl #3] + 14825 0146 0899 ldr r1, [sp, #32] + 14826 0148 41F83320 str r2, [r1, r3, lsl #3] + 14827 .L2657: + 14828 014c 0BB0 add sp, sp, #44 + 14829 @ sp needed + 14830 014e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14831 .L2671: + 14832 0152 049B ldr r3, [sp, #16] + 14833 0154 4A46 mov r2, r9 + 14834 0156 B4E7 b .L2659 + 14835 .L2664: + 14836 0158 089B ldr r3, [sp, #32] + 14837 015a 043B subs r3, r3, #4 + 14838 015c 00E0 b .L2669 + 14839 .L2684: + 14840 015e 013A subs r2, r2, #1 + 14841 .L2669: + 14842 0160 51F8040B ldr r0, [r1], #4 + 14843 0164 43F8040F str r0, [r3, #4]! + 14844 0168 002A cmp r2, #0 + 14845 016a F8D1 bne .L2684 + 14846 016c 0BB0 add sp, sp, #44 + 14847 @ sp needed + 14848 016e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14849 .L2658: + 14850 0172 02F1FF3A add r10, r2, #-1 + 14851 0176 BCE7 b .L2662 + 14853 .section .text.arm_lms_f32,"ax",%progbits + 14854 .align 1 + 14855 .p2align 2,,3 + 14856 .global arm_lms_f32 + 14857 .syntax unified + 14858 .thumb + 14859 .thumb_func + 14860 .fpu fpv4-sp-d16 + 14862 arm_lms_f32: + 14863 @ args = 8, pretend = 0, frame = 0 + 14864 @ frame_needed = 0, uses_anonymous_args = 0 + 14865 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 14866 0004 0488 ldrh r4, [r0] + 14867 0006 90ED036A vldr.32 s12, [r0, #12] + 14868 000a 0A9F ldr r7, [sp, #40] + 14869 000c D0E9019A ldrd r9, r10, [r0, #4] + 14870 0010 04F18040 add r0, r4, #1073741824 + 14871 0014 0138 subs r0, r0, #1 + 14872 0016 09EB8008 add r8, r9, r0, lsl #2 + 14873 001a 002F cmp r7, #0 + 14874 001c 4FD0 beq .L2695 + 14875 001e 1D1D adds r5, r3, #4 + 14876 0020 099B ldr r3, [sp, #36] + 14877 0022 DFED285A vldr.32 s11, .L2705 + 14878 0026 02F1040E add lr, r2, #4 + 14879 002a 1E1D adds r6, r3, #4 + 14880 002c 09F1040C add ip, r9, #4 + 14881 .L2691: + ARM GAS /tmp/ccdao7B1.s page 259 + + + 14882 0030 51F8043B ldr r3, [r1], #4 @ float + 14883 0034 48F8043B str r3, [r8], #4 @ float + 14884 0038 ACF10400 sub r0, ip, #4 + 14885 003c BCB3 cbz r4, .L2687 + 14886 003e DFED217A vldr.32 s15, .L2705 + 14887 0042 2346 mov r3, r4 + 14888 0044 D346 mov fp, r10 + 14889 0046 0246 mov r2, r0 + 14890 .L2688: + 14891 0048 F2EC016A vldmia.32 r2!, {s13} + 14892 004c BBEC017A vldmia.32 fp!, {s14} + 14893 0050 013B subs r3, r3, #1 + 14894 0052 E6EE877A vfma.f32 s15, s13, s14 + 14895 0056 F7D1 bne .L2688 + 14896 0058 45ED017A vstr.32 s15, [r5, #-4] + 14897 005c 1EED017A vldr.32 s14, [lr, #-4] + 14898 0060 77EE677A vsub.f32 s15, s14, s15 + 14899 0064 E346 mov fp, ip + 14900 0066 67EE866A vmul.f32 s13, s15, s12 + 14901 006a 46ED017A vstr.32 s15, [r6, #-4] + 14902 006e 2246 mov r2, r4 + 14903 0070 5346 mov r3, r10 + 14904 .L2690: + 14905 0072 B0EC017A vldmia.32 r0!, {s14} + 14906 0076 D3ED007A vldr.32 s15, [r3] + 14907 007a E7EE267A vfma.f32 s15, s14, s13 + 14908 007e 013A subs r2, r2, #1 + 14909 0080 E3EC017A vstmia.32 r3!, {s15} + 14910 0084 F5D1 bne .L2690 + 14911 .L2694: + 14912 0086 013F subs r7, r7, #1 + 14913 0088 05F10405 add r5, r5, #4 + 14914 008c 0EF1040E add lr, lr, #4 + 14915 0090 06F10406 add r6, r6, #4 + 14916 0094 0CF1040C add ip, ip, #4 + 14917 0098 CAD1 bne .L2691 + 14918 .L2686: + 14919 009a 013C subs r4, r4, #1 + 14920 009c 05D0 beq .L2685 + 14921 .L2693: + 14922 009e 5BF8043B ldr r3, [fp], #4 @ float + 14923 00a2 49F8043B str r3, [r9], #4 @ float + 14924 00a6 013C subs r4, r4, #1 + 14925 00a8 F9D1 bne .L2693 + 14926 .L2685: + 14927 00aa BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 14928 .L2687: + 14929 00ae 45ED015A vstr.32 s11, [r5, #-4] + 14930 00b2 5EF8043C ldr r3, [lr, #-4] @ float + 14931 00b6 46F8043C str r3, [r6, #-4] @ float + 14932 00ba E346 mov fp, ip + 14933 00bc E3E7 b .L2694 + 14934 .L2695: + 14935 00be CB46 mov fp, r9 + 14936 00c0 EBE7 b .L2686 + 14937 .L2706: + 14938 00c2 00BF .align 2 + ARM GAS /tmp/ccdao7B1.s page 260 + + + 14939 .L2705: + 14940 00c4 00000000 .word 0 + 14942 .section .text.arm_lms_init_f32,"ax",%progbits + 14943 .align 1 + 14944 .p2align 2,,3 + 14945 .global arm_lms_init_f32 + 14946 .syntax unified + 14947 .thumb + 14948 .thumb_func + 14949 .fpu fpv4-sp-d16 + 14951 arm_lms_init_f32: + 14952 @ args = 4, pretend = 0, frame = 0 + 14953 @ frame_needed = 0, uses_anonymous_args = 0 + 14954 0000 10B5 push {r4, lr} + 14955 0002 2DED028B vpush.64 {d8} + 14956 0006 0446 mov r4, r0 + 14957 0008 0498 ldr r0, [sp, #16] + 14958 000a 2180 strh r1, [r4] @ movhi + 14959 000c 00F1FF3C add ip, r0, #-1 + 14960 0010 8C44 add ip, ip, r1 + 14961 0012 B0EE408A vmov.f32 s16, s0 + 14962 0016 A260 str r2, [r4, #8] + 14963 0018 0021 movs r1, #0 + 14964 001a 4FEA8C02 lsl r2, ip, #2 + 14965 001e 1846 mov r0, r3 + 14966 0020 FFF7FEFF bl memset + 14967 0024 84ED038A vstr.32 s16, [r4, #12] + 14968 0028 BDEC028B vldm sp!, {d8} + 14969 002c 6060 str r0, [r4, #4] + 14970 002e 10BD pop {r4, pc} + 14972 .section .text.arm_lms_init_q15,"ax",%progbits + 14973 .align 1 + 14974 .p2align 2,,3 + 14975 .global arm_lms_init_q15 + 14976 .syntax unified + 14977 .thumb + 14978 .thumb_func + 14979 .fpu fpv4-sp-d16 + 14981 arm_lms_init_q15: + 14982 @ args = 12, pretend = 0, frame = 0 + 14983 @ frame_needed = 0, uses_anonymous_args = 0 + 14984 0000 38B5 push {r3, r4, r5, lr} + 14985 0002 8260 str r2, [r0, #8] + 14986 0004 059A ldr r2, [sp, #20] + 14987 0006 0180 strh r1, [r0] @ movhi + 14988 0008 013A subs r2, r2, #1 + 14989 000a 0A44 add r2, r2, r1 + 14990 000c 0446 mov r4, r0 + 14991 000e 5200 lsls r2, r2, #1 + 14992 0010 1846 mov r0, r3 + 14993 0012 0021 movs r1, #0 + 14994 0014 BDF91050 ldrsh r5, [sp, #16] + 14995 0018 FFF7FEFF bl memset + 14996 001c 069B ldr r3, [sp, #24] + 14997 001e 6060 str r0, [r4, #4] + 14998 0020 A581 strh r5, [r4, #12] @ movhi + 14999 0022 2361 str r3, [r4, #16] + ARM GAS /tmp/ccdao7B1.s page 261 + + + 15000 0024 38BD pop {r3, r4, r5, pc} + 15002 0026 00BF .section .text.arm_lms_init_q31,"ax",%progbits + 15003 .align 1 + 15004 .p2align 2,,3 + 15005 .global arm_lms_init_q31 + 15006 .syntax unified + 15007 .thumb + 15008 .thumb_func + 15009 .fpu fpv4-sp-d16 + 15011 arm_lms_init_q31: + 15012 @ args = 12, pretend = 0, frame = 0 + 15013 @ frame_needed = 0, uses_anonymous_args = 0 + 15014 0000 10B5 push {r4, lr} + 15015 0002 8260 str r2, [r0, #8] + 15016 0004 039A ldr r2, [sp, #12] + 15017 0006 0180 strh r1, [r0] @ movhi + 15018 0008 013A subs r2, r2, #1 + 15019 000a 0A44 add r2, r2, r1 + 15020 000c 0446 mov r4, r0 + 15021 000e 9200 lsls r2, r2, #2 + 15022 0010 1846 mov r0, r3 + 15023 0012 0021 movs r1, #0 + 15024 0014 FFF7FEFF bl memset + 15025 0018 029B ldr r3, [sp, #8] + 15026 001a E360 str r3, [r4, #12] + 15027 001c 049B ldr r3, [sp, #16] + 15028 001e 6060 str r0, [r4, #4] + 15029 0020 2361 str r3, [r4, #16] + 15030 0022 10BD pop {r4, pc} + 15032 .section .text.arm_lms_norm_f32,"ax",%progbits + 15033 .align 1 + 15034 .p2align 2,,3 + 15035 .global arm_lms_norm_f32 + 15036 .syntax unified + 15037 .thumb + 15038 .thumb_func + 15039 .fpu fpv4-sp-d16 + 15041 arm_lms_norm_f32: + 15042 @ args = 8, pretend = 0, frame = 0 + 15043 @ frame_needed = 0, uses_anonymous_args = 0 + 15044 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 15045 0004 0488 ldrh r4, [r0] + 15046 0006 D0F80490 ldr r9, [r0, #4] + 15047 000a 0A9D ldr r5, [sp, #40] + 15048 000c D0ED035A vldr.32 s11, [r0, #12] + 15049 0010 90ED046A vldr.32 s12, [r0, #16] + 15050 0014 D0ED057A vldr.32 s15, [r0, #20] + 15051 0018 D0F808A0 ldr r10, [r0, #8] + 15052 001c 04F18046 add r6, r4, #1073741824 + 15053 0020 013E subs r6, r6, #1 + 15054 0022 09EB8608 add r8, r9, r6, lsl #2 + 15055 0026 002D cmp r5, #0 + 15056 0028 63D0 beq .L2723 + 15057 002a 2F46 mov r7, r5 + 15058 002c 1D1D adds r5, r3, #4 + 15059 002e 099B ldr r3, [sp, #36] + 15060 0030 9FED315A vldr.32 s10, .L2733 + ARM GAS /tmp/ccdao7B1.s page 262 + + + 15061 0034 DFED314A vldr.32 s9, .L2733+4 + 15062 0038 8C46 mov ip, r1 + 15063 003a 02F1040E add lr, r2, #4 + 15064 003e 1E1D adds r6, r3, #4 + 15065 0040 4946 mov r1, r9 + 15066 .L2719: + 15067 0042 DCF80030 ldr r3, [ip] @ float + 15068 0046 48F8043B str r3, [r8], #4 @ float + 15069 004a A7EEE76A vfms.f32 s12, s15, s15 + 15070 004e FCEC017A vldmia.32 ip!, {s15} + 15071 0052 A7EEA76A vfma.f32 s12, s15, s15 + 15072 0056 002C cmp r4, #0 + 15073 0058 44D0 beq .L2715 + 15074 005a DFED287A vldr.32 s15, .L2733+4 + 15075 005e 2346 mov r3, r4 + 15076 0060 D346 mov fp, r10 + 15077 0062 0A46 mov r2, r1 + 15078 .L2716: + 15079 0064 F2EC016A vldmia.32 r2!, {s13} + 15080 0068 BBEC017A vldmia.32 fp!, {s14} + 15081 006c 013B subs r3, r3, #1 + 15082 006e E6EE877A vfma.f32 s15, s13, s14 + 15083 0072 F7D1 bne .L2716 + 15084 0074 45ED017A vstr.32 s15, [r5, #-4] + 15085 0078 1EED017A vldr.32 s14, [lr, #-4] + 15086 007c 77EE677A vsub.f32 s15, s14, s15 + 15087 0080 76EE056A vadd.f32 s13, s12, s10 + 15088 0084 27EEA57A vmul.f32 s14, s15, s11 + 15089 0088 46ED017A vstr.32 s15, [r6, #-4] + 15090 008c F0EE667A vmov.f32 s15, s13 + 15091 0090 C7EE276A vdiv.f32 s13, s14, s15 + 15092 0094 2246 mov r2, r4 + 15093 0096 5346 mov r3, r10 + 15094 0098 8B46 mov fp, r1 + 15095 .L2718: + 15096 009a 013A subs r2, r2, #1 + 15097 009c BBEC017A vldmia.32 fp!, {s14} + 15098 00a0 D3ED007A vldr.32 s15, [r3] + 15099 00a4 E7EE267A vfma.f32 s15, s14, s13 + 15100 00a8 E3EC017A vstmia.32 r3!, {s15} + 15101 00ac F5D1 bne .L2718 + 15102 .L2722: + 15103 00ae 013F subs r7, r7, #1 + 15104 00b0 F1EC017A vldmia.32 r1!, {s15} + 15105 00b4 05F10405 add r5, r5, #4 + 15106 00b8 0EF1040E add lr, lr, #4 + 15107 00bc 06F10406 add r6, r6, #4 + 15108 00c0 BFD1 bne .L2719 + 15109 00c2 0A9B ldr r3, [sp, #40] + 15110 00c4 09EB8303 add r3, r9, r3, lsl #2 + 15111 .L2714: + 15112 00c8 013C subs r4, r4, #1 + 15113 00ca 80ED046A vstr.32 s12, [r0, #16] + 15114 00ce C0ED057A vstr.32 s15, [r0, #20] + 15115 00d2 05D0 beq .L2713 + 15116 .L2721: + 15117 00d4 53F8042B ldr r2, [r3], #4 @ float + ARM GAS /tmp/ccdao7B1.s page 263 + + + 15118 00d8 49F8042B str r2, [r9], #4 @ float + 15119 00dc 013C subs r4, r4, #1 + 15120 00de F9D1 bne .L2721 + 15121 .L2713: + 15122 00e0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15123 .L2715: + 15124 00e4 45ED014A vstr.32 s9, [r5, #-4] + 15125 00e8 5EF8043C ldr r3, [lr, #-4] @ float + 15126 00ec 46F8043C str r3, [r6, #-4] @ float + 15127 00f0 DDE7 b .L2722 + 15128 .L2723: + 15129 00f2 4B46 mov r3, r9 + 15130 00f4 E8E7 b .L2714 + 15131 .L2734: + 15132 00f6 00BF .align 2 + 15133 .L2733: + 15134 00f8 00000034 .word 872415232 + 15135 00fc 00000000 .word 0 + 15137 .section .text.arm_lms_norm_init_f32,"ax",%progbits + 15138 .align 1 + 15139 .p2align 2,,3 + 15140 .global arm_lms_norm_init_f32 + 15141 .syntax unified + 15142 .thumb + 15143 .thumb_func + 15144 .fpu fpv4-sp-d16 + 15146 arm_lms_norm_init_f32: + 15147 @ args = 4, pretend = 0, frame = 0 + 15148 @ frame_needed = 0, uses_anonymous_args = 0 + 15149 0000 10B5 push {r4, lr} + 15150 0002 0446 mov r4, r0 + 15151 0004 2DED028B vpush.64 {d8} + 15152 0008 A260 str r2, [r4, #8] + 15153 000a 049A ldr r2, [sp, #16] + 15154 000c 2180 strh r1, [r4] @ movhi + 15155 000e 0846 mov r0, r1 + 15156 0010 013A subs r2, r2, #1 + 15157 0012 0244 add r2, r2, r0 + 15158 0014 B0EE408A vmov.f32 s16, s0 + 15159 0018 9200 lsls r2, r2, #2 + 15160 001a 0021 movs r1, #0 + 15161 001c 1846 mov r0, r3 + 15162 001e FFF7FEFF bl memset + 15163 0022 84ED038A vstr.32 s16, [r4, #12] + 15164 0026 BDEC028B vldm sp!, {d8} + 15165 002a 0022 movs r2, #0 + 15166 002c 6060 str r0, [r4, #4] + 15167 002e 2261 str r2, [r4, #16] @ float + 15168 0030 6261 str r2, [r4, #20] @ float + 15169 0032 10BD pop {r4, pc} + 15171 .section .text.arm_lms_norm_init_q15,"ax",%progbits + 15172 .align 1 + 15173 .p2align 2,,3 + 15174 .global arm_lms_norm_init_q15 + 15175 .syntax unified + 15176 .thumb + 15177 .thumb_func + ARM GAS /tmp/ccdao7B1.s page 264 + + + 15178 .fpu fpv4-sp-d16 + 15180 arm_lms_norm_init_q15: + 15181 @ args = 12, pretend = 0, frame = 0 + 15182 @ frame_needed = 0, uses_anonymous_args = 0 + 15183 0000 70B5 push {r4, r5, r6, lr} + 15184 0002 8260 str r2, [r0, #8] + 15185 0004 059A ldr r2, [sp, #20] + 15186 0006 0180 strh r1, [r0] @ movhi + 15187 0008 8C46 mov ip, r1 + 15188 000a 013A subs r2, r2, #1 + 15189 000c 6244 add r2, r2, ip + 15190 000e 0446 mov r4, r0 + 15191 0010 5200 lsls r2, r2, #1 + 15192 0012 1846 mov r0, r3 + 15193 0014 0021 movs r1, #0 + 15194 0016 BDF91050 ldrsh r5, [sp, #16] + 15195 001a 9DF81860 ldrb r6, [sp, #24] @ zero_extendqisi2 + 15196 001e FFF7FEFF bl memset + 15197 0022 044A ldr r2, .L2739 + 15198 0024 A673 strb r6, [r4, #14] + 15199 0026 0023 movs r3, #0 + 15200 0028 C4E90423 strd r2, r3, [r4, #16] + 15201 002c 6060 str r0, [r4, #4] + 15202 002e A581 strh r5, [r4, #12] @ movhi + 15203 0030 70BD pop {r4, r5, r6, pc} + 15204 .L2740: + 15205 0032 00BF .align 2 + 15206 .L2739: + 15207 0034 00000000 .word armRecipTableQ15 + 15209 .section .text.arm_lms_norm_init_q31,"ax",%progbits + 15210 .align 1 + 15211 .p2align 2,,3 + 15212 .global arm_lms_norm_init_q31 + 15213 .syntax unified + 15214 .thumb + 15215 .thumb_func + 15216 .fpu fpv4-sp-d16 + 15218 arm_lms_norm_init_q31: + 15219 @ args = 12, pretend = 0, frame = 0 + 15220 @ frame_needed = 0, uses_anonymous_args = 0 + 15221 0000 38B5 push {r3, r4, r5, lr} + 15222 0002 8260 str r2, [r0, #8] + 15223 0004 059A ldr r2, [sp, #20] + 15224 0006 0180 strh r1, [r0] @ movhi + 15225 0008 8C46 mov ip, r1 + 15226 000a 013A subs r2, r2, #1 + 15227 000c 6244 add r2, r2, ip + 15228 000e 0446 mov r4, r0 + 15229 0010 0021 movs r1, #0 + 15230 0012 1846 mov r0, r3 + 15231 0014 9200 lsls r2, r2, #2 + 15232 0016 9DF81850 ldrb r5, [sp, #24] @ zero_extendqisi2 + 15233 001a FFF7FEFF bl memset + 15234 001e 0549 ldr r1, .L2743 + 15235 0020 049B ldr r3, [sp, #16] + 15236 0022 2574 strb r5, [r4, #16] + 15237 0024 0022 movs r2, #0 + ARM GAS /tmp/ccdao7B1.s page 265 + + + 15238 0026 C4E90622 strd r2, r2, [r4, #24] + 15239 002a 6161 str r1, [r4, #20] + 15240 002c 6060 str r0, [r4, #4] + 15241 002e E360 str r3, [r4, #12] + 15242 0030 38BD pop {r3, r4, r5, pc} + 15243 .L2744: + 15244 0032 00BF .align 2 + 15245 .L2743: + 15246 0034 00000000 .word armRecipTableQ31 + 15248 .section .text.arm_lms_norm_q15,"ax",%progbits + 15249 .align 1 + 15250 .p2align 2,,3 + 15251 .global arm_lms_norm_q15 + 15252 .syntax unified + 15253 .thumb + 15254 .thumb_func + 15255 .fpu fpv4-sp-d16 + 15257 arm_lms_norm_q15: + 15258 @ args = 8, pretend = 0, frame = 40 + 15259 @ frame_needed = 0, uses_anonymous_args = 0 + 15260 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 15261 0004 0688 ldrh r6, [r0] + 15262 0006 8BB0 sub sp, sp, #44 + 15263 0008 0446 mov r4, r0 + 15264 000a 0990 str r0, [sp, #36] + 15265 000c 9046 mov r8, r2 + 15266 000e 807B ldrb r0, [r0, #14] @ zero_extendqisi2 + 15267 0010 6768 ldr r7, [r4, #4] + 15268 0012 B4F91450 ldrsh r5, [r4, #20] + 15269 0016 0897 str r7, [sp, #32] + 15270 0018 06F10042 add r2, r6, #-2147483648 + 15271 001c 013A subs r2, r2, #1 + 15272 001e 4FEA420C lsl ip, r2, #1 + 15273 0022 C0F10F02 rsb r2, r0, #15 + 15274 0026 0692 str r2, [sp, #24] + 15275 0028 00F11102 add r2, r0, #17 + 15276 002c 9946 mov r9, r3 + 15277 002e 0792 str r2, [sp, #28] + 15278 0030 A368 ldr r3, [r4, #8] + 15279 0032 159A ldr r2, [sp, #84] + 15280 0034 0393 str r3, [sp, #12] + 15281 0036 B4F90C30 ldrsh r3, [r4, #12] + 15282 003a 0493 str r3, [sp, #16] + 15283 003c B4F91630 ldrsh r3, [r4, #22] + 15284 0040 002A cmp r2, #0 + 15285 0042 00F0C380 beq .L2780 + 15286 0046 ACF10202 sub r2, ip, #2 + 15287 004a BA18 adds r2, r7, r2 + 15288 004c 0292 str r2, [sp, #8] + 15289 004e 2269 ldr r2, [r4, #16] + 15290 0050 0592 str r2, [sp, #20] + 15291 0052 159A ldr r2, [sp, #84] + 15292 0054 0192 str r2, [sp, #4] + 15293 0056 A1F1020A sub r10, r1, #2 + 15294 005a 47F6FF7B movw fp, #32767 + 15295 .L2753: + 15296 005e 029A ldr r2, [sp, #8] + ARM GAS /tmp/ccdao7B1.s page 266 + + + 15297 0060 03FB03F3 mul r3, r3, r3 + 15298 0064 A5EBE335 sub r5, r5, r3, asr #15 + 15299 0068 3AF9023F ldrsh r3, [r10, #2]! + 15300 006c 22F8023F strh r3, [r2, #2]! @ movhi + 15301 0070 03FB03F3 mul r3, r3, r3 + 15302 0074 0292 str r2, [sp, #8] + 15303 0076 05EBE335 add r5, r5, r3, asr #15 + 15304 007a 002E cmp r6, #0 + 15305 007c 00F09380 beq .L2766 + 15306 0080 039C ldr r4, [sp, #12] + 15307 0082 3346 mov r3, r6 + 15308 0084 3A46 mov r2, r7 + 15309 0086 0020 movs r0, #0 + 15310 0088 0021 movs r1, #0 + 15311 .L2748: + 15312 008a 32F802EB ldrh lr, [r2], #2 + 15313 008e 34F802CB ldrh ip, [r4], #2 + 15314 0092 013B subs r3, r3, #1 + 15315 0094 CEFB8C01 smlalbb r0, r1, lr, ip + 15316 0098 F7D1 bne .L2748 + 15317 009a 079B ldr r3, [sp, #28] + 15318 009c 01FA03F2 lsl r2, r1, r3 + 15319 00a0 069B ldr r3, [sp, #24] + 15320 00a2 D840 lsrs r0, r0, r3 + 15321 00a4 1043 orrs r0, r0, r2 + 15322 .L2747: + 15323 .syntax unified + 15324 @ 168 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c" 1 + 15325 00a6 00F30F00 ssat r0, #16, r0 + 15326 @ 0 "" 2 + 15327 .thumb + 15328 .syntax unified + 15329 00aa 29F8020B strh r0, [r9], #2 @ movhi + 15330 00ae 38F8022B ldrh r2, [r8], #2 + 15331 00b2 1499 ldr r1, [sp, #80] + 15332 00b4 121A subs r2, r2, r0 + 15333 00b6 6B1D adds r3, r5, #5 + 15334 00b8 12B2 sxth r2, r2 + 15335 00ba 21F8022B strh r2, [r1], #2 @ movhi + 15336 00be 1BB2 sxth r3, r3 + 15337 00c0 002B cmp r3, #0 + 15338 00c2 1491 str r1, [sp, #80] + 15339 00c4 65DD ble .L2749 + 15340 00c6 B3FA83F0 clz r0, r3 + 15341 00ca A0F11104 sub r4, r0, #17 + 15342 00ce C0F11F00 rsb r0, r0, #31 + 15343 .L2750: + 15344 00d2 0499 ldr r1, [sp, #16] + 15345 00d4 A340 lsls r3, r3, r4 + 15346 00d6 01FB02F2 mul r2, r1, r2 + 15347 00da 059C ldr r4, [sp, #20] + 15348 00dc C3F30521 ubfx r1, r3, #8, #6 + 15349 00e0 1BB2 sxth r3, r3 + 15350 00e2 34F91140 ldrsh r4, [r4, r1, lsl #1] + 15351 00e6 03FB04F1 mul r1, r3, r4 + 15352 00ea ABEBE131 sub r1, fp, r1, asr #15 + 15353 00ee 04FB01F1 mul r1, r4, r1 + ARM GAS /tmp/ccdao7B1.s page 267 + + + 15354 00f2 41F38F31 sbfx r1, r1, #14, #16 + 15355 00f6 01FB03F3 mul r3, r1, r3 + 15356 00fa ABEBE333 sub r3, fp, r3, asr #15 + 15357 00fe 01FB03F3 mul r3, r1, r3 + 15358 0102 D213 asrs r2, r2, #15 + 15359 0104 9B0B lsrs r3, r3, #14 + 15360 0106 12FB03F3 smulbb r3, r2, r3 + 15361 010a 0341 asrs r3, r3, r0 + 15362 .syntax unified + 15363 @ 188 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c" 1 + 15364 010c 03F30F01 ssat r1, #16, r3 + 15365 @ 0 "" 2 + 15366 .thumb + 15367 .syntax unified + 15368 0110 09B2 sxth r1, r1 + 15369 0112 86B1 cbz r6, .L2756 + 15370 0114 039B ldr r3, [sp, #12] + 15371 0116 3046 mov r0, r6 + 15372 0118 9C1E subs r4, r3, #2 + 15373 011a BC46 mov ip, r7 + 15374 .L2755: + 15375 011c 3CF8023B ldrh r3, [ip], #2 + 15376 0120 13FB01F2 smulbb r2, r3, r1 + 15377 0124 34F9023F ldrsh r3, [r4, #2]! + 15378 0128 0138 subs r0, r0, #1 + 15379 012a 03EBE233 add r3, r3, r2, asr #15 + 15380 .syntax unified + 15381 @ 234 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c" 1 + 15382 012e 03F30F03 ssat r3, #16, r3 + 15383 @ 0 "" 2 + 15384 .thumb + 15385 .syntax unified + 15386 0132 2380 strh r3, [r4] @ movhi + 15387 0134 F2D1 bne .L2755 + 15388 .L2756: + 15389 0136 019A ldr r2, [sp, #4] + 15390 0138 37F9023B ldrsh r3, [r7], #2 + 15391 013c 013A subs r2, r2, #1 + 15392 013e 0192 str r2, [sp, #4] + 15393 0140 8DD1 bne .L2753 + 15394 0142 089A ldr r2, [sp, #32] + 15395 0144 1599 ldr r1, [sp, #84] + 15396 0146 28B2 sxth r0, r5 + 15397 0148 02EB4107 add r7, r2, r1, lsl #1 + 15398 .L2746: + 15399 014c 099A ldr r2, [sp, #36] + 15400 014e 751E subs r5, r6, #1 + 15401 0150 9082 strh r0, [r2, #20] @ movhi + 15402 0152 D382 strh r3, [r2, #22] @ movhi + 15403 0154 1AD0 beq .L2745 + 15404 0156 0898 ldr r0, [sp, #32] + 15405 0158 BA1C adds r2, r7, #2 + 15406 015a 9042 cmp r0, r2 + 15407 015c 29D0 beq .L2758 + 15408 015e B31E subs r3, r6, #2 + 15409 0160 092B cmp r3, #9 + 15410 0162 26D9 bls .L2758 + ARM GAS /tmp/ccdao7B1.s page 268 + + + 15411 0164 F31E subs r3, r6, #3 + 15412 0166 5B08 lsrs r3, r3, #1 + 15413 0168 0133 adds r3, r3, #1 + 15414 016a 3946 mov r1, r7 + 15415 016c 0022 movs r2, #0 + 15416 .L2759: + 15417 016e 0132 adds r2, r2, #1 + 15418 0170 51F8044B ldr r4, [r1], #4 @ unaligned + 15419 0174 40F8044B str r4, [r0], #4 @ unaligned + 15420 0178 9A42 cmp r2, r3 + 15421 017a F8D3 bcc .L2759 + 15422 017c B5EB430F cmp r5, r3, lsl #1 + 15423 0180 04D0 beq .L2745 + 15424 0182 0899 ldr r1, [sp, #32] + 15425 0184 37F92320 ldrsh r2, [r7, r3, lsl #2] + 15426 0188 21F82320 strh r2, [r1, r3, lsl #2] @ movhi + 15427 .L2745: + 15428 018c 0BB0 add sp, sp, #44 + 15429 @ sp needed + 15430 018e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15431 .L2749: + 15432 0192 C3F10000 rsb r0, r3, #0 + 15433 0196 08D0 beq .L2767 + 15434 0198 B0FA80F0 clz r0, r0 + 15435 019c A0F11104 sub r4, r0, #17 + 15436 01a0 C0F11F00 rsb r0, r0, #31 + 15437 01a4 95E7 b .L2750 + 15438 .L2766: + 15439 01a6 3046 mov r0, r6 + 15440 01a8 7DE7 b .L2747 + 15441 .L2767: + 15442 01aa 4FF0FF30 mov r0, #-1 + 15443 01ae 0F24 movs r4, #15 + 15444 01b0 8FE7 b .L2750 + 15445 .L2758: + 15446 01b2 089B ldr r3, [sp, #32] + 15447 01b4 023B subs r3, r3, #2 + 15448 01b6 00E0 b .L2763 + 15449 .L2783: + 15450 01b8 0232 adds r2, r2, #2 + 15451 .L2763: + 15452 01ba 32F9021C ldrsh r1, [r2, #-2] + 15453 01be 23F8021F strh r1, [r3, #2]! @ movhi + 15454 01c2 013D subs r5, r5, #1 + 15455 01c4 F8D1 bne .L2783 + 15456 01c6 0BB0 add sp, sp, #44 + 15457 @ sp needed + 15458 01c8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15459 .L2780: + 15460 01cc 2846 mov r0, r5 + 15461 01ce BDE7 b .L2746 + 15463 .section .text.arm_lms_norm_q31,"ax",%progbits + 15464 .align 1 + 15465 .p2align 2,,3 + 15466 .global arm_lms_norm_q31 + 15467 .syntax unified + 15468 .thumb + ARM GAS /tmp/ccdao7B1.s page 269 + + + 15469 .thumb_func + 15470 .fpu fpv4-sp-d16 + 15472 arm_lms_norm_q31: + 15473 @ args = 8, pretend = 0, frame = 40 + 15474 @ frame_needed = 0, uses_anonymous_args = 0 + 15475 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 15476 0004 057C ldrb r5, [r0, #16] @ zero_extendqisi2 + 15477 0006 8768 ldr r7, [r0, #8] + 15478 0008 4468 ldr r4, [r0, #4] + 15479 000a 8BB0 sub sp, sp, #44 + 15480 000c 9446 mov ip, r2 + 15481 000e 6A1C adds r2, r5, #1 + 15482 0010 0792 str r2, [sp, #28] + 15483 0012 C5F11F02 rsb r2, r5, #31 + 15484 0016 0892 str r2, [sp, #32] + 15485 0018 159A ldr r2, [sp, #84] + 15486 001a 0397 str r7, [sp, #12] + 15487 001c C768 ldr r7, [r0, #12] + 15488 001e 0694 str r4, [sp, #24] + 15489 0020 9A46 mov r10, r3 + 15490 0022 0497 str r7, [sp, #16] + 15491 0024 0388 ldrh r3, [r0] + 15492 0026 0990 str r0, [sp, #36] + 15493 0028 D0E90674 ldrd r7, r4, [r0, #24] + 15494 002c 0646 mov r6, r0 + 15495 002e 002A cmp r2, #0 + 15496 0030 00F01B81 beq .L2810 + 15497 0034 03F18040 add r0, r3, #1073741824 + 15498 0038 0138 subs r0, r0, #1 + 15499 003a 8000 lsls r0, r0, #2 + 15500 003c 9146 mov r9, r2 + 15501 003e 0A1F subs r2, r1, #4 + 15502 0040 0699 ldr r1, [sp, #24] + 15503 0042 0192 str r2, [sp, #4] + 15504 0044 0438 subs r0, r0, #4 + 15505 0046 0A18 adds r2, r1, r0 + 15506 0048 0292 str r2, [sp, #8] + 15507 004a 7269 ldr r2, [r6, #20] + 15508 004c 0592 str r2, [sp, #20] + 15509 004e 8846 mov r8, r1 + 15510 0050 6FF00046 mvn r6, #-2147483648 + 15511 0054 6246 mov r2, ip + 15512 .L2796: + 15513 0056 0199 ldr r1, [sp, #4] + 15514 0058 51F8040F ldr r0, [r1, #4]! + 15515 005c 0191 str r1, [sp, #4] + 15516 005e 0299 ldr r1, [sp, #8] + 15517 0060 41F8040F str r0, [r1, #4]! + 15518 0064 0291 str r1, [sp, #8] + 15519 0066 84FB0414 smull r1, r4, r4, r4 + 15520 006a 4918 adds r1, r1, r1 + 15521 006c 4FF00005 mov r5, #0 + 15522 0070 6441 adcs r4, r4, r4 + 15523 0072 691A subs r1, r5, r1 + 15524 0074 67EB0404 sbc r4, r7, r4 + 15525 0078 80FB0007 smull r0, r7, r0, r0 + 15526 007c 0018 adds r0, r0, r0 + ARM GAS /tmp/ccdao7B1.s page 270 + + + 15527 007e 44EB4707 adc r7, r4, r7, lsl #1 + 15528 0082 002B cmp r3, #0 + 15529 0084 00F0DE80 beq .L2811 + 15530 0088 DDF80CB0 ldr fp, [sp, #12] + 15531 008c 2946 mov r1, r5 + 15532 008e 1846 mov r0, r3 + 15533 0090 C646 mov lr, r8 + 15534 0092 AC46 mov ip, r5 + 15535 .L2787: + 15536 0094 5EF8045B ldr r5, [lr], #4 + 15537 0098 5BF8044B ldr r4, [fp], #4 + 15538 009c 0138 subs r0, r0, #1 + 15539 009e C5FB041C smlal r1, ip, r5, r4 + 15540 00a2 F7D1 bne .L2787 + 15541 00a4 0798 ldr r0, [sp, #28] + 15542 00a6 0CFA00FC lsl ip, ip, r0 + 15543 00aa 0898 ldr r0, [sp, #32] + 15544 00ac C140 lsrs r1, r1, r0 + 15545 00ae 4CEA0101 orr r1, ip, r1 + 15546 .L2786: + 15547 00b2 4AF8041B str r1, [r10], #4 + 15548 00b6 52F8044B ldr r4, [r2], #4 + 15549 00ba 641A subs r4, r4, r1 + 15550 00bc 1499 ldr r1, [sp, #80] + 15551 00be 07F58070 add r0, r7, #256 + 15552 00c2 41F8044B str r4, [r1], #4 + 15553 00c6 0028 cmp r0, #0 + 15554 00c8 1491 str r1, [sp, #80] + 15555 00ca 40F3B180 ble .L2788 + 15556 00ce B0FA80FE clz lr, r0 + 15557 00d2 0EF1FF31 add r1, lr, #-1 + 15558 00d6 CEF11F0E rsb lr, lr, #31 + 15559 .L2789: + 15560 00da 8840 lsls r0, r0, r1 + 15561 00dc 059D ldr r5, [sp, #20] + 15562 00de C0F30561 ubfx r1, r0, #24, #6 + 15563 00e2 55F82110 ldr r1, [r5, r1, lsl #2] + 15564 00e6 80FB015B smull r5, fp, r0, r1 + 15565 00ea ED0F lsrs r5, r5, #31 + 15566 00ec 45EA4B05 orr r5, r5, fp, lsl #1 + 15567 00f0 751B subs r5, r6, r5 + 15568 00f2 4FEAE17C asr ip, r1, #31 + 15569 00f6 A5FB011B umull r1, fp, r5, r1 + 15570 00fa 05FB0CBC mla ip, r5, ip, fp + 15571 00fe 890F lsrs r1, r1, #30 + 15572 0100 41EA8C05 orr r5, r1, ip, lsl #2 + 15573 0104 4FEAE57B asr fp, r5, #31 + 15574 0108 BBEBAC7F cmp fp, ip, asr #30 + 15575 010c 18BF it ne + 15576 010e 86EAEC75 eorne r5, r6, ip, asr #31 + 15577 0112 80FB0501 smull r0, r1, r0, r5 + 15578 0116 4FEAD070 lsr r0, r0, #31 + 15579 011a 40EA4100 orr r0, r0, r1, lsl #1 + 15580 011e A6EB0000 sub r0, r6, r0 + 15581 0122 18BF it ne + 15582 0124 4FEAE57B asrne fp, r5, #31 + 15583 0128 A0FB0551 umull r5, r1, r0, r5 + ARM GAS /tmp/ccdao7B1.s page 271 + + + 15584 012c 00FB0B11 mla r1, r0, fp, r1 + 15585 0130 AD0F lsrs r5, r5, #30 + 15586 0132 45EA810C orr ip, r5, r1, lsl #2 + 15587 0136 4FEAEC70 asr r0, ip, #31 + 15588 013a B0EBA17F cmp r0, r1, asr #30 + 15589 013e 18BF it ne + 15590 0140 86EAE17C eorne ip, r6, r1, asr #31 + 15591 0144 0499 ldr r1, [sp, #16] + 15592 0146 84FB0101 smull r0, r1, r4, r1 + 15593 014a C00F lsrs r0, r0, #31 + 15594 014c 40EA4100 orr r0, r0, r1, lsl #1 + 15595 0150 8CFB0004 smull r0, r4, ip, r0 + 15596 0154 CEF12001 rsb r1, lr, #32 + 15597 0158 04FA01F1 lsl r1, r4, r1 + 15598 015c 20FA0EF0 lsr r0, r0, lr + 15599 0160 0843 orrs r0, r0, r1 + 15600 0162 BEF12001 subs r1, lr, #32 + 15601 0166 5CBF itt pl + 15602 0168 44FA01F1 asrpl r1, r4, r1 + 15603 016c 0843 orrpl r0, r0, r1 + 15604 016e 44FA0EFC asr ip, r4, lr + 15605 0172 BCEBE07F cmp ip, r0, asr #31 + 15606 0176 18BF it ne + 15607 0178 86EAEC70 eorne r0, r6, ip, asr #31 + 15608 017c D3B1 cbz r3, .L2800 + 15609 017e 0399 ldr r1, [sp, #12] + 15610 0180 9C46 mov ip, r3 + 15611 0182 0D1F subs r5, r1, #4 + 15612 0184 C646 mov lr, r8 + 15613 .L2801: + 15614 0186 5EF8041B ldr r1, [lr], #4 + 15615 018a 55F804BF ldr fp, [r5, #4]! + 15616 018e 80FB0141 smull r4, r1, r0, r1 + 15617 0192 4C00 lsls r4, r1, #1 + 15618 0194 14EB0B04 adds r4, r4, fp + 15619 0198 41F38071 sbfx r1, r1, #30, #1 + 15620 019c 41EBEB71 adc r1, r1, fp, asr #31 + 15621 01a0 B1EBE47F cmp r1, r4, asr #31 + 15622 01a4 86EAE17B eor fp, r6, r1, asr #31 + 15623 01a8 37D0 beq .L2798 + 15624 01aa BCF1010C subs ip, ip, #1 + 15625 01ae C5F800B0 str fp, [r5] + 15626 01b2 E8D1 bne .L2801 + 15627 .L2800: + 15628 01b4 B9F10109 subs r9, r9, #1 + 15629 01b8 58F8044B ldr r4, [r8], #4 + 15630 01bc 7FF44BAF bne .L2796 + 15631 .L2829: + 15632 01c0 069A ldr r2, [sp, #24] + 15633 01c2 1599 ldr r1, [sp, #84] + 15634 01c4 02EB8106 add r6, r2, r1, lsl #2 + 15635 .L2785: + 15636 01c8 099A ldr r2, [sp, #36] + 15637 01ca C2E90674 strd r7, r4, [r2, #24] + 15638 01ce 5F1E subs r7, r3, #1 + 15639 01d0 20D0 beq .L2784 + 15640 01d2 069C ldr r4, [sp, #24] + ARM GAS /tmp/ccdao7B1.s page 272 + + + 15641 01d4 321D adds r2, r6, #4 + 15642 01d6 991E subs r1, r3, #2 + 15643 01d8 9442 cmp r4, r2 + 15644 01da 18BF it ne + 15645 01dc 0B29 cmpne r1, #11 + 15646 01de 37D9 bls .L2803 + 15647 01e0 44EA0601 orr r1, r4, r6 + 15648 01e4 4907 lsls r1, r1, #29 + 15649 01e6 33D1 bne .L2803 + 15650 01e8 033B subs r3, r3, #3 + 15651 01ea 5B08 lsrs r3, r3, #1 + 15652 01ec 0133 adds r3, r3, #1 + 15653 01ee A6F10800 sub r0, r6, #8 + 15654 01f2 2146 mov r1, r4 + 15655 01f4 0022 movs r2, #0 + 15656 .L2804: + 15657 01f6 F0E90245 ldrd r4, [r0, #8]! + 15658 01fa 0132 adds r2, r2, #1 + 15659 01fc 9A42 cmp r2, r3 + 15660 01fe E1E80245 strd r4, [r1], #8 + 15661 0202 F8D3 bcc .L2804 + 15662 0204 B7EB430F cmp r7, r3, lsl #1 + 15663 0208 04D0 beq .L2784 + 15664 020a 0699 ldr r1, [sp, #24] + 15665 020c 56F83320 ldr r2, [r6, r3, lsl #3] + 15666 0210 41F83320 str r2, [r1, r3, lsl #3] + 15667 .L2784: + 15668 0214 0BB0 add sp, sp, #44 + 15669 @ sp needed + 15670 0216 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15671 .L2798: + 15672 021a BCF1010C subs ip, ip, #1 + 15673 021e 2C60 str r4, [r5] + 15674 0220 B1D1 bne .L2801 + 15675 0222 B9F10109 subs r9, r9, #1 + 15676 0226 58F8044B ldr r4, [r8], #4 + 15677 022a 7FF414AF bne .L2796 + 15678 022e C7E7 b .L2829 + 15679 .L2788: + 15680 0230 C0F1000E rsb lr, r0, #0 + 15681 0234 08D0 beq .L2812 + 15682 0236 BEFA8EFE clz lr, lr + 15683 023a 0EF1FF31 add r1, lr, #-1 + 15684 023e CEF11F0E rsb lr, lr, #31 + 15685 0242 4AE7 b .L2789 + 15686 .L2811: + 15687 0244 1946 mov r1, r3 + 15688 0246 34E7 b .L2786 + 15689 .L2812: + 15690 0248 4FF0FF3E mov lr, #-1 + 15691 024c 1F21 movs r1, #31 + 15692 024e 44E7 b .L2789 + 15693 .L2803: + 15694 0250 069B ldr r3, [sp, #24] + 15695 0252 043B subs r3, r3, #4 + 15696 0254 00E0 b .L2808 + 15697 .L2830: + ARM GAS /tmp/ccdao7B1.s page 273 + + + 15698 0256 0432 adds r2, r2, #4 + 15699 .L2808: + 15700 0258 52F8041C ldr r1, [r2, #-4] + 15701 025c 43F8041F str r1, [r3, #4]! + 15702 0260 013F subs r7, r7, #1 + 15703 0262 F8D1 bne .L2830 + 15704 0264 0BB0 add sp, sp, #44 + 15705 @ sp needed + 15706 0266 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15707 .L2810: + 15708 026a 069E ldr r6, [sp, #24] + 15709 026c ACE7 b .L2785 + 15711 026e 00BF .section .text.arm_lms_q15,"ax",%progbits + 15712 .align 1 + 15713 .p2align 2,,3 + 15714 .global arm_lms_q15 + 15715 .syntax unified + 15716 .thumb + 15717 .thumb_func + 15718 .fpu fpv4-sp-d16 + 15720 arm_lms_q15: + 15721 @ args = 8, pretend = 0, frame = 24 + 15722 @ frame_needed = 0, uses_anonymous_args = 0 + 15723 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 15724 0004 0569 ldr r5, [r0, #16] + 15725 0006 4668 ldr r6, [r0, #4] + 15726 0008 8768 ldr r7, [r0, #8] + 15727 000a 87B0 sub sp, sp, #28 + 15728 000c 9B46 mov fp, r3 + 15729 000e 0388 ldrh r3, [r0] + 15730 0010 B0F90C00 ldrsh r0, [r0, #12] + 15731 0014 0290 str r0, [sp, #8] + 15732 0016 C5F10F00 rsb r0, r5, #15 + 15733 001a 0390 str r0, [sp, #12] + 15734 001c 05F11100 add r0, r5, #17 + 15735 0020 0490 str r0, [sp, #16] + 15736 0022 1198 ldr r0, [sp, #68] + 15737 0024 0596 str r6, [sp, #20] + 15738 0026 0197 str r7, [sp, #4] + 15739 0028 0028 cmp r0, #0 + 15740 002a 00F08180 beq .L2848 + 15741 002e 03F10044 add r4, r3, #-2147483648 + 15742 0032 013C subs r4, r4, #1 + 15743 0034 6400 lsls r4, r4, #1 + 15744 0036 023C subs r4, r4, #2 + 15745 0038 06EB040A add r10, r6, r4 + 15746 003c 8146 mov r9, r0 + 15747 003e B046 mov r8, r6 + 15748 .L2836: + 15749 0040 31F9020B ldrsh r0, [r1], #2 + 15750 0044 2AF8020F strh r0, [r10, #2]! @ movhi + 15751 0048 002B cmp r3, #0 + 15752 004a 62D0 beq .L2849 + 15753 004c 019F ldr r7, [sp, #4] + 15754 004e 1846 mov r0, r3 + 15755 0050 4646 mov r6, r8 + 15756 0052 0024 movs r4, #0 + ARM GAS /tmp/ccdao7B1.s page 274 + + + 15757 0054 0025 movs r5, #0 + 15758 .L2834: + 15759 0056 36F802EB ldrh lr, [r6], #2 + 15760 005a 37F802CB ldrh ip, [r7], #2 + 15761 005e 0138 subs r0, r0, #1 + 15762 0060 CEFB8C45 smlalbb r4, r5, lr, ip + 15763 0064 F7D1 bne .L2834 + 15764 0066 0498 ldr r0, [sp, #16] + 15765 0068 039E ldr r6, [sp, #12] + 15766 006a 05FA00F0 lsl r0, r5, r0 + 15767 006e F440 lsrs r4, r4, r6 + 15768 0070 0443 orrs r4, r4, r0 + 15769 .L2833: + 15770 .syntax unified + 15771 @ 151 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c" 1 + 15772 0072 04F30F04 ssat r4, #16, r4 + 15773 @ 0 "" 2 + 15774 .thumb + 15775 .syntax unified + 15776 0076 2BF8024B strh r4, [fp], #2 @ movhi + 15777 007a 32F802CB ldrh ip, [r2], #2 + 15778 007e 1098 ldr r0, [sp, #64] + 15779 0080 ACEB040C sub ip, ip, r4 + 15780 0084 0FFA8CFC sxth ip, ip + 15781 0088 20F802CB strh ip, [r0], #2 @ movhi + 15782 008c 1090 str r0, [sp, #64] + 15783 008e 0298 ldr r0, [sp, #8] + 15784 0090 08F10207 add r7, r8, #2 + 15785 0094 0CFB00FC mul ip, ip, r0 + 15786 0098 4CF3CF3C sbfx ip, ip, #15, #16 + 15787 009c B846 mov r8, r7 + 15788 009e 8BB1 cbz r3, .L2839 + 15789 00a0 0198 ldr r0, [sp, #4] + 15790 00a2 1D46 mov r5, r3 + 15791 00a4 861E subs r6, r0, #2 + 15792 00a6 00E0 b .L2838 + 15793 .L2865: + 15794 00a8 0237 adds r7, r7, #2 + 15795 .L2838: + 15796 00aa 37F8024C ldrh r4, [r7, #-2] + 15797 00ae 36F9020F ldrsh r0, [r6, #2]! + 15798 00b2 14FB0CF4 smulbb r4, r4, ip + 15799 00b6 013D subs r5, r5, #1 + 15800 00b8 00EBE430 add r0, r0, r4, asr #15 + 15801 .syntax unified + 15802 @ 208 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c" 1 + 15803 00bc 00F30F00 ssat r0, #16, r0 + 15804 @ 0 "" 2 + 15805 .thumb + 15806 .syntax unified + 15807 00c0 3080 strh r0, [r6] @ movhi + 15808 00c2 F1D1 bne .L2865 + 15809 .L2839: + 15810 00c4 B9F10109 subs r9, r9, #1 + 15811 00c8 BAD1 bne .L2836 + 15812 00ca 059A ldr r2, [sp, #20] + 15813 00cc 1199 ldr r1, [sp, #68] + ARM GAS /tmp/ccdao7B1.s page 275 + + + 15814 00ce 02EB4101 add r1, r2, r1, lsl #1 + 15815 .L2832: + 15816 00d2 5E1E subs r6, r3, #1 + 15817 00d4 1AD0 beq .L2831 + 15818 00d6 059C ldr r4, [sp, #20] + 15819 00d8 8A1C adds r2, r1, #2 + 15820 00da 9442 cmp r4, r2 + 15821 00dc 1BD0 beq .L2841 + 15822 00de 981E subs r0, r3, #2 + 15823 00e0 0928 cmp r0, #9 + 15824 00e2 18D9 bls .L2841 + 15825 00e4 033B subs r3, r3, #3 + 15826 00e6 5B08 lsrs r3, r3, #1 + 15827 00e8 0133 adds r3, r3, #1 + 15828 00ea 0846 mov r0, r1 + 15829 00ec 0022 movs r2, #0 + 15830 .L2842: + 15831 00ee 0132 adds r2, r2, #1 + 15832 00f0 50F8045B ldr r5, [r0], #4 @ unaligned + 15833 00f4 44F8045B str r5, [r4], #4 @ unaligned + 15834 00f8 9A42 cmp r2, r3 + 15835 00fa F8D3 bcc .L2842 + 15836 00fc B6EB430F cmp r6, r3, lsl #1 + 15837 0100 04D0 beq .L2831 + 15838 0102 31F92320 ldrsh r2, [r1, r3, lsl #2] + 15839 0106 0599 ldr r1, [sp, #20] + 15840 0108 21F82320 strh r2, [r1, r3, lsl #2] @ movhi + 15841 .L2831: + 15842 010c 07B0 add sp, sp, #28 + 15843 @ sp needed + 15844 010e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15845 .L2849: + 15846 0112 1C46 mov r4, r3 + 15847 0114 ADE7 b .L2833 + 15848 .L2841: + 15849 0116 059B ldr r3, [sp, #20] + 15850 0118 023B subs r3, r3, #2 + 15851 011a 00E0 b .L2846 + 15852 .L2866: + 15853 011c 0232 adds r2, r2, #2 + 15854 .L2846: + 15855 011e 32F9021C ldrsh r1, [r2, #-2] + 15856 0122 23F8021F strh r1, [r3, #2]! @ movhi + 15857 0126 013E subs r6, r6, #1 + 15858 0128 F8D1 bne .L2866 + 15859 012a 07B0 add sp, sp, #28 + 15860 @ sp needed + 15861 012c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 15862 .L2848: + 15863 0130 3146 mov r1, r6 + 15864 0132 CEE7 b .L2832 + 15866 .section .text.arm_lms_q31,"ax",%progbits + 15867 .align 1 + 15868 .p2align 2,,3 + 15869 .global arm_lms_q31 + 15870 .syntax unified + 15871 .thumb + ARM GAS /tmp/ccdao7B1.s page 276 + + + 15872 .thumb_func + 15873 .fpu fpv4-sp-d16 + 15875 arm_lms_q31: + 15876 @ args = 8, pretend = 0, frame = 24 + 15877 @ frame_needed = 0, uses_anonymous_args = 0 + 15878 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 15879 0004 9246 mov r10, r2 + 15880 0006 87B0 sub sp, sp, #28 + 15881 0008 0269 ldr r2, [r0, #16] + 15882 000a 4468 ldr r4, [r0, #4] + 15883 000c 8568 ldr r5, [r0, #8] + 15884 000e 0688 ldrh r6, [r0] + 15885 0010 C068 ldr r0, [r0, #12] + 15886 0012 0290 str r0, [sp, #8] + 15887 0014 501C adds r0, r2, #1 + 15888 0016 C2F11F02 rsb r2, r2, #31 + 15889 001a 0492 str r2, [sp, #16] + 15890 001c 119A ldr r2, [sp, #68] + 15891 001e 0093 str r3, [sp] + 15892 0020 0594 str r4, [sp, #20] + 15893 0022 0195 str r5, [sp, #4] + 15894 0024 0390 str r0, [sp, #12] + 15895 0026 002A cmp r2, #0 + 15896 0028 00F0A780 beq .L2885 + 15897 002c 06F18043 add r3, r6, #1073741824 + 15898 0030 013B subs r3, r3, #1 + 15899 0032 9B00 lsls r3, r3, #2 + 15900 0034 043B subs r3, r3, #4 + 15901 0036 04EB0309 add r9, r4, r3 + 15902 003a 9046 mov r8, r2 + 15903 003c 2746 mov r7, r4 + 15904 003e 6FF00045 mvn r5, #-2147483648 + 15905 .L2872: + 15906 0042 51F8043B ldr r3, [r1], #4 + 15907 0046 49F8043F str r3, [r9, #4]! + 15908 004a 002E cmp r6, #0 + 15909 004c 76D0 beq .L2869 + 15910 004e 0023 movs r3, #0 + 15911 0050 DDF804E0 ldr lr, [sp, #4] + 15912 0054 3246 mov r2, r6 + 15913 0056 BB46 mov fp, r7 + 15914 0058 9C46 mov ip, r3 + 15915 .L2870: + 15916 005a 5BF8044B ldr r4, [fp], #4 + 15917 005e 5EF8040B ldr r0, [lr], #4 + 15918 0062 013A subs r2, r2, #1 + 15919 0064 C4FB003C smlal r3, ip, r4, r0 + 15920 0068 F7D1 bne .L2870 + 15921 006a 039A ldr r2, [sp, #12] + 15922 006c 0CFA02FC lsl ip, ip, r2 + 15923 0070 049A ldr r2, [sp, #16] + 15924 0072 D340 lsrs r3, r3, r2 + 15925 0074 009A ldr r2, [sp] + 15926 0076 4CEA0303 orr r3, ip, r3 + 15927 007a 42F8043B str r3, [r2], #4 + 15928 007e 5AF8040B ldr r0, [r10], #4 + 15929 0082 0092 str r2, [sp] + ARM GAS /tmp/ccdao7B1.s page 277 + + + 15930 0084 C01A subs r0, r0, r3 + 15931 0086 109B ldr r3, [sp, #64] + 15932 0088 43F8040B str r0, [r3], #4 + 15933 008c 1093 str r3, [sp, #64] + 15934 008e 029B ldr r3, [sp, #8] + 15935 0090 80FB0302 smull r0, r2, r0, r3 + 15936 0094 019B ldr r3, [sp, #4] + 15937 0096 07F1040E add lr, r7, #4 + 15938 009a C00F lsrs r0, r0, #31 + 15939 009c 40EA4200 orr r0, r0, r2, lsl #1 + 15940 00a0 7746 mov r7, lr + 15941 00a2 1C1F subs r4, r3, #4 + 15942 00a4 B446 mov ip, r6 + 15943 00a6 06E0 b .L2871 + 15944 .L2900: + 15945 00a8 BCF1010C subs ip, ip, #1 + 15946 00ac C4F800B0 str fp, [r4] + 15947 00b0 17D0 beq .L2876 + 15948 .L2875: + 15949 00b2 0EF1040E add lr, lr, #4 + 15950 .L2871: + 15951 00b6 5EF8042C ldr r2, [lr, #-4] + 15952 00ba 54F8043F ldr r3, [r4, #4]! + 15953 00be 80FB022B smull r2, fp, r0, r2 + 15954 00c2 4FEA4B02 lsl r2, fp, #1 + 15955 00c6 D218 adds r2, r2, r3 + 15956 00c8 4BF3807B sbfx fp, fp, #30, #1 + 15957 00cc 4BEBE373 adc r3, fp, r3, asr #31 + 15958 00d0 B3EBE27F cmp r3, r2, asr #31 + 15959 00d4 85EAE37B eor fp, r5, r3, asr #31 + 15960 00d8 E6D1 bne .L2900 + 15961 00da BCF1010C subs ip, ip, #1 + 15962 00de 2260 str r2, [r4] + 15963 00e0 E7D1 bne .L2875 + 15964 .L2876: + 15965 00e2 B8F10108 subs r8, r8, #1 + 15966 00e6 ACD1 bne .L2872 + 15967 .L2901: + 15968 00e8 059B ldr r3, [sp, #20] + 15969 00ea 119A ldr r2, [sp, #68] + 15970 00ec 03EB8207 add r7, r3, r2, lsl #2 + 15971 .L2868: + 15972 00f0 B6F1010C subs ip, r6, #1 + 15973 00f4 1FD0 beq .L2867 + 15974 00f6 0599 ldr r1, [sp, #20] + 15975 00f8 3A1D adds r2, r7, #4 + 15976 00fa B31E subs r3, r6, #2 + 15977 00fc 9142 cmp r1, r2 + 15978 00fe 18BF it ne + 15979 0100 0B2B cmpne r3, #11 + 15980 0102 2CD9 bls .L2878 + 15981 0104 41EA0703 orr r3, r1, r7 + 15982 0108 5B07 lsls r3, r3, #29 + 15983 010a 28D1 bne .L2878 + 15984 010c F31E subs r3, r6, #3 + 15985 010e 5B08 lsrs r3, r3, #1 + 15986 0110 0133 adds r3, r3, #1 + ARM GAS /tmp/ccdao7B1.s page 278 + + + 15987 0112 A7F10800 sub r0, r7, #8 + 15988 0116 0022 movs r2, #0 + 15989 .L2879: + 15990 0118 F0E90245 ldrd r4, [r0, #8]! + 15991 011c 0132 adds r2, r2, #1 + 15992 011e 9342 cmp r3, r2 + 15993 0120 E1E80245 strd r4, [r1], #8 + 15994 0124 F8D8 bhi .L2879 + 15995 0126 BCEB430F cmp ip, r3, lsl #1 + 15996 012a 04D0 beq .L2867 + 15997 012c 0599 ldr r1, [sp, #20] + 15998 012e 57F83320 ldr r2, [r7, r3, lsl #3] + 15999 0132 41F83320 str r2, [r1, r3, lsl #3] + 16000 .L2867: + 16001 0136 07B0 add sp, sp, #28 + 16002 @ sp needed + 16003 0138 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 16004 .L2869: + 16005 013c 009B ldr r3, [sp] + 16006 013e 109A ldr r2, [sp, #64] + 16007 0140 43F8046B str r6, [r3], #4 + 16008 0144 0093 str r3, [sp] + 16009 0146 5AF8043B ldr r3, [r10], #4 + 16010 014a 42F8043B str r3, [r2], #4 + 16011 014e B8F10108 subs r8, r8, #1 + 16012 0152 07F10407 add r7, r7, #4 + 16013 0156 1092 str r2, [sp, #64] + 16014 0158 7FF473AF bne .L2872 + 16015 015c C4E7 b .L2901 + 16016 .L2878: + 16017 015e 059B ldr r3, [sp, #20] + 16018 0160 043B subs r3, r3, #4 + 16019 0162 00E0 b .L2883 + 16020 .L2902: + 16021 0164 0432 adds r2, r2, #4 + 16022 .L2883: + 16023 0166 52F8041C ldr r1, [r2, #-4] + 16024 016a 43F8041F str r1, [r3, #4]! + 16025 016e BCF1010C subs ip, ip, #1 + 16026 0172 F7D1 bne .L2902 + 16027 0174 07B0 add sp, sp, #28 + 16028 @ sp needed + 16029 0176 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 16030 .L2885: + 16031 017a 2746 mov r7, r4 + 16032 017c B8E7 b .L2868 + 16034 017e 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccdao7B1.s page 279 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 FilteringFunctions.c + /tmp/ccdao7B1.s:16 .text.arm_biquad_cas_df1_32x64_init_q31:0000000000000000 $t + /tmp/ccdao7B1.s:25 .text.arm_biquad_cas_df1_32x64_init_q31:0000000000000000 arm_biquad_cas_df1_32x64_init_q31 + /tmp/ccdao7B1.s:42 .text.arm_biquad_cas_df1_32x64_q31:0000000000000000 $t + /tmp/ccdao7B1.s:50 .text.arm_biquad_cas_df1_32x64_q31:0000000000000000 arm_biquad_cas_df1_32x64_q31 + /tmp/ccdao7B1.s:213 .text.arm_biquad_cascade_df1_f32:0000000000000000 $t + /tmp/ccdao7B1.s:221 .text.arm_biquad_cascade_df1_f32:0000000000000000 arm_biquad_cascade_df1_f32 + /tmp/ccdao7B1.s:279 .text.arm_biquad_cascade_df1_fast_q15:0000000000000000 $t + /tmp/ccdao7B1.s:287 .text.arm_biquad_cascade_df1_fast_q15:0000000000000000 arm_biquad_cascade_df1_fast_q15 + /tmp/ccdao7B1.s:354 .text.arm_biquad_cascade_df1_fast_q31:0000000000000000 $t + /tmp/ccdao7B1.s:362 .text.arm_biquad_cascade_df1_fast_q31:0000000000000000 arm_biquad_cascade_df1_fast_q31 + /tmp/ccdao7B1.s:460 .text.arm_biquad_cascade_df1_init_f32:0000000000000000 $t + /tmp/ccdao7B1.s:468 .text.arm_biquad_cascade_df1_init_f32:0000000000000000 arm_biquad_cascade_df1_init_f32 + /tmp/ccdao7B1.s:483 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Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c: diff --git a/codice/build/MatrixFunctions.lst b/codice/build/MatrixFunctions.lst new file mode 100644 index 0000000..fe06d00 --- /dev/null +++ b/codice/build/MatrixFunctions.lst @@ -0,0 +1,2973 @@ +ARM GAS /tmp/ccB9AFDQ.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "MatrixFunctions.c" + 14 .text + 15 .section .text.arm_mat_add_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_mat_add_f32 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_mat_add_f32: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 0388 ldrh r3, [r0] + 30 0002 B0F802C0 ldrh ip, [r0, #2] + 31 0006 4968 ldr r1, [r1, #4] + 32 0008 4068 ldr r0, [r0, #4] + 33 000a 5268 ldr r2, [r2, #4] + 34 000c 0CFB03F3 mul r3, ip, r3 + 35 0010 4BB1 cbz r3, .L2 + 36 .L3: + 37 0012 F0EC017A vldmia.32 r0!, {s15} + 38 0016 B1EC017A vldmia.32 r1!, {s14} + 39 001a 77EE877A vadd.f32 s15, s15, s14 + 40 001e 013B subs r3, r3, #1 + 41 0020 E2EC017A vstmia.32 r2!, {s15} + 42 0024 F5D1 bne .L3 + 43 .L2: + 44 0026 0020 movs r0, #0 + 45 0028 7047 bx lr + 47 002a 00BF .section .text.arm_mat_add_q15,"ax",%progbits + 48 .align 1 + 49 .p2align 2,,3 + 50 .global arm_mat_add_q15 + 51 .syntax unified + 52 .thumb + 53 .thumb_func + 54 .fpu fpv4-sp-d16 + 56 arm_mat_add_q15: + 57 @ args = 0, pretend = 0, frame = 0 + 58 @ frame_needed = 0, uses_anonymous_args = 0 + 59 @ link register save eliminated. + 60 0000 4388 ldrh r3, [r0, #2] + ARM GAS /tmp/ccB9AFDQ.s page 2 + + + 61 0002 4968 ldr r1, [r1, #4] + 62 0004 5268 ldr r2, [r2, #4] + 63 0006 10B4 push {r4} + 64 0008 0488 ldrh r4, [r0] + 65 000a 4068 ldr r0, [r0, #4] + 66 000c 03FB04F4 mul r4, r3, r4 + 67 0010 4CB1 cbz r4, .L10 + 68 .L11: + 69 0012 30F9023B ldrsh r3, [r0], #2 + 70 0016 31F902CB ldrsh ip, [r1], #2 + 71 .syntax unified + 72 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 73 001a 93FA1CF3 qadd16 r3, r3, ip + 74 @ 0 "" 2 + 75 .thumb + 76 .syntax unified + 77 001e 013C subs r4, r4, #1 + 78 0020 22F8023B strh r3, [r2], #2 @ movhi + 79 0024 F5D1 bne .L11 + 80 .L10: + 81 0026 0020 movs r0, #0 + 82 0028 5DF8044B ldr r4, [sp], #4 + 83 002c 7047 bx lr + 85 002e 00BF .section .text.arm_mat_add_q31,"ax",%progbits + 86 .align 1 + 87 .p2align 2,,3 + 88 .global arm_mat_add_q31 + 89 .syntax unified + 90 .thumb + 91 .thumb_func + 92 .fpu fpv4-sp-d16 + 94 arm_mat_add_q31: + 95 @ args = 0, pretend = 0, frame = 0 + 96 @ frame_needed = 0, uses_anonymous_args = 0 + 97 @ link register save eliminated. + 98 0000 4388 ldrh r3, [r0, #2] + 99 0002 4968 ldr r1, [r1, #4] + 100 0004 5268 ldr r2, [r2, #4] + 101 0006 30B4 push {r4, r5} + 102 0008 0488 ldrh r4, [r0] + 103 000a 4068 ldr r0, [r0, #4] + 104 000c 03FB04F4 mul r4, r3, r4 + 105 0010 4CB1 cbz r4, .L18 + 106 .L19: + 107 0012 50F8043B ldr r3, [r0], #4 + 108 0016 51F8045B ldr r5, [r1], #4 + 109 .syntax unified + 110 @ 2117 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 111 001a 85FA83F3 qadd r3, r3, r5 + 112 @ 0 "" 2 + 113 .thumb + 114 .syntax unified + 115 001e 013C subs r4, r4, #1 + 116 0020 42F8043B str r3, [r2], #4 + 117 0024 F5D1 bne .L19 + 118 .L18: + 119 0026 0020 movs r0, #0 + ARM GAS /tmp/ccB9AFDQ.s page 3 + + + 120 0028 30BC pop {r4, r5} + 121 002a 7047 bx lr + 123 .section .text.arm_mat_cmplx_mult_f32,"ax",%progbits + 124 .align 1 + 125 .p2align 2,,3 + 126 .global arm_mat_cmplx_mult_f32 + 127 .syntax unified + 128 .thumb + 129 .thumb_func + 130 .fpu fpv4-sp-d16 + 132 arm_mat_cmplx_mult_f32: + 133 @ args = 0, pretend = 0, frame = 0 + 134 @ frame_needed = 0, uses_anonymous_args = 0 + 135 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 136 0004 4F68 ldr r7, [r1, #4] + 137 0006 4988 ldrh r1, [r1, #2] + 138 0008 4568 ldr r5, [r0, #4] + 139 000a 4488 ldrh r4, [r0, #2] + 140 000c 0688 ldrh r6, [r0] + 141 000e 5368 ldr r3, [r2, #4] + 142 0010 9FED385A vldr.32 s10, .L46 + 143 0014 0129 cmp r1, #1 + 144 0016 4FEAC100 lsl r0, r1, #3 + 145 001a 4FEAC408 lsl r8, r4, #3 + 146 001e 05F10805 add r5, r5, #8 + 147 0022 33D1 bne .L45 + 148 0024 9A46 mov r10, r3 + 149 0026 07EB0009 add r9, r7, r0 + 150 .L35: + 151 002a 0AF1080C add ip, r10, #8 + 152 002e BE46 mov lr, r7 + 153 .L34: + 154 0030 F0EE457A vmov.f32 s15, s10 + 155 0034 B0EE457A vmov.f32 s14, s10 + 156 0038 BCB1 cbz r4, .L32 + 157 003a 2A46 mov r2, r5 + 158 003c 2146 mov r1, r4 + 159 003e 7346 mov r3, lr + 160 .L33: + 161 0040 93ED006A vldr.32 s12, [r3] + 162 0044 52ED026A vldr.32 s13, [r2, #-8] + 163 0048 52ED015A vldr.32 s11, [r2, #-4] + 164 004c A6EE267A vfma.f32 s14, s12, s13 + 165 0050 0139 subs r1, r1, #1 + 166 0052 02F10802 add r2, r2, #8 + 167 0056 E5EE867A vfma.f32 s15, s11, s12 + 168 005a 93ED016A vldr.32 s12, [r3, #4] + 169 005e 0344 add r3, r3, r0 + 170 0060 A6EE657A vfms.f32 s14, s12, s11 + 171 0064 E6EE267A vfma.f32 s15, s12, s13 + 172 0068 EAD1 bne .L33 + 173 .L32: + 174 006a 0EF1080E add lr, lr, #8 + 175 006e F145 cmp r9, lr + 176 0070 0CED027A vstr.32 s14, [ip, #-8] + 177 0074 4CED017A vstr.32 s15, [ip, #-4] + 178 0078 0CF1080C add ip, ip, #8 + ARM GAS /tmp/ccB9AFDQ.s page 4 + + + 179 007c D8D1 bne .L34 + 180 007e 013E subs r6, r6, #1 + 181 0080 4544 add r5, r5, r8 + 182 0082 8244 add r10, r10, r0 + 183 0084 D1D1 bne .L35 + 184 0086 0020 movs r0, #0 + 185 0088 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 186 .L45: + 187 008c 9946 mov r9, r3 + 188 008e 07EB000A add r10, r7, r0 + 189 .L30: + 190 0092 09F1080C add ip, r9, #8 + 191 0096 BE46 mov lr, r7 + 192 .L29: + 193 0098 F0EE457A vmov.f32 s15, s10 + 194 009c B0EE457A vmov.f32 s14, s10 + 195 00a0 BCB1 cbz r4, .L27 + 196 00a2 2A46 mov r2, r5 + 197 00a4 2146 mov r1, r4 + 198 00a6 7346 mov r3, lr + 199 .L28: + 200 00a8 D3ED006A vldr.32 s13, [r3] + 201 00ac 12ED026A vldr.32 s12, [r2, #-8] + 202 00b0 52ED015A vldr.32 s11, [r2, #-4] + 203 00b4 A6EE267A vfma.f32 s14, s12, s13 + 204 00b8 0139 subs r1, r1, #1 + 205 00ba 02F10802 add r2, r2, #8 + 206 00be E6EEA57A vfma.f32 s15, s13, s11 + 207 00c2 D3ED016A vldr.32 s13, [r3, #4] + 208 00c6 0344 add r3, r3, r0 + 209 00c8 A5EEE67A vfms.f32 s14, s11, s13 + 210 00cc E6EE267A vfma.f32 s15, s12, s13 + 211 00d0 EAD1 bne .L28 + 212 .L27: + 213 00d2 0EF1080E add lr, lr, #8 + 214 00d6 F245 cmp r10, lr + 215 00d8 0CED027A vstr.32 s14, [ip, #-8] + 216 00dc 4CED017A vstr.32 s15, [ip, #-4] + 217 00e0 0CF1080C add ip, ip, #8 + 218 00e4 D8D1 bne .L29 + 219 00e6 013E subs r6, r6, #1 + 220 00e8 4544 add r5, r5, r8 + 221 00ea 8144 add r9, r9, r0 + 222 00ec D1D1 bne .L30 + 223 00ee 0020 movs r0, #0 + 224 00f0 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 225 .L47: + 226 .align 2 + 227 .L46: + 228 00f4 00000000 .word 0 + 230 .section .text.arm_mat_cmplx_mult_q15,"ax",%progbits + 231 .align 1 + 232 .p2align 2,,3 + 233 .global arm_mat_cmplx_mult_q15 + 234 .syntax unified + 235 .thumb + 236 .thumb_func + ARM GAS /tmp/ccB9AFDQ.s page 5 + + + 237 .fpu fpv4-sp-d16 + 239 arm_mat_cmplx_mult_q15: + 240 @ args = 0, pretend = 0, frame = 48 + 241 @ frame_needed = 0, uses_anonymous_args = 0 + 242 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 243 0004 8DB0 sub sp, sp, #52 + 244 0006 D1F804C0 ldr ip, [r1, #4] + 245 000a 0893 str r3, [sp, #32] + 246 000c 0B88 ldrh r3, [r1] + 247 000e 4988 ldrh r1, [r1, #2] + 248 0010 B0F800E0 ldrh lr, [r0] + 249 0014 4788 ldrh r7, [r0, #2] + 250 0016 0791 str r1, [sp, #28] + 251 0018 0029 cmp r1, #0 + 252 001a 00F0AF80 beq .L76 + 253 001e 9E00 lsls r6, r3, #2 + 254 0020 012B cmp r3, #1 + 255 0022 089B ldr r3, [sp, #32] + 256 0024 9846 mov r8, r3 + 257 0026 06EB0309 add r9, r6, r3 + 258 002a 4FEA8103 lsl r3, r1, #2 + 259 002e 0993 str r3, [sp, #36] + 260 0030 8A46 mov r10, r1 + 261 0032 9B46 mov fp, r3 + 262 0034 40F09280 bne .L52 + 263 .L55: + 264 0038 4146 mov r1, r8 + 265 003a 6446 mov r4, ip + 266 003c 5346 mov r3, r10 + 267 .L54: + 268 003e 54F8045B ldr r5, [r4], #4 @ unaligned + 269 0042 0D60 str r5, [r1] @ unaligned + 270 0044 013B subs r3, r3, #1 + 271 0046 3144 add r1, r1, r6 + 272 0048 F9D1 bne .L54 + 273 004a 08F10408 add r8, r8, #4 + 274 004e C845 cmp r8, r9 + 275 0050 DC44 add ip, ip, fp + 276 0052 F1D1 bne .L55 + 277 .L49: + 278 0054 4368 ldr r3, [r0, #4] + 279 0056 5268 ldr r2, [r2, #4] + 280 0058 4FEA5709 lsr r9, r7, #1 + 281 005c 03EBC903 add r3, r3, r9, lsl #3 + 282 0060 0193 str r3, [sp, #4] + 283 0062 C9EB4973 rsb r3, r9, r9, lsl #29 + 284 0066 DB00 lsls r3, r3, #3 + 285 0068 0B93 str r3, [sp, #44] + 286 006a 07F00103 and r3, r7, #1 + 287 006e 0393 str r3, [sp, #12] + 288 0070 CDE9052E strd r2, lr, [sp, #20] + 289 0074 BB00 lsls r3, r7, #2 + 290 0076 0A93 str r3, [sp, #40] + 291 0078 4FEAC903 lsl r3, r9, #3 + 292 007c 0493 str r3, [sp, #16] + 293 .L60: + 294 007e 019B ldr r3, [sp, #4] + ARM GAS /tmp/ccB9AFDQ.s page 6 + + + 295 0080 0B9A ldr r2, [sp, #44] + 296 0082 1344 add r3, r3, r2 + 297 0084 0293 str r3, [sp, #8] + 298 0086 DDE9078E ldrd r8, lr, [sp, #28] + 299 008a 059B ldr r3, [sp, #20] + 300 008c 03F1040C add ip, r3, #4 + 301 .L59: + 302 0090 B9F1000F cmp r9, #0 + 303 0094 6CD0 beq .L61 + 304 0096 0020 movs r0, #0 + 305 0098 029D ldr r5, [sp, #8] + 306 009a 7646 mov r6, lr + 307 009c 4F46 mov r7, r9 + 308 009e 0346 mov r3, r0 + 309 00a0 0446 mov r4, r0 + 310 00a2 0146 mov r1, r0 + 311 .L57: + 312 00a4 2A68 ldr r2, [r5] @ unaligned + 313 00a6 D6F800B0 ldr fp, [r6] @ unaligned + 314 .syntax unified + 315 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 316 00aa 42FB0BFA smusd r10, r2, fp + 317 @ 0 "" 2 + 318 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 319 00ae 22FB1BF2 smuadx r2, r2, fp + 320 @ 0 "" 2 + 321 .thumb + 322 .syntax unified + 323 00b2 1AEB0404 adds r4, r10, r4 + 324 00b6 41EBEA71 adc r1, r1, r10, asr #31 + 325 00ba 1018 adds r0, r2, r0 + 326 00bc D6F804B0 ldr fp, [r6, #4] @ unaligned + 327 00c0 43EBE273 adc r3, r3, r2, asr #31 + 328 00c4 0835 adds r5, r5, #8 + 329 00c6 55F8042C ldr r2, [r5, #-4] @ unaligned + 330 00ca 0836 adds r6, r6, #8 + 331 .syntax unified + 332 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 333 00cc 42FB0BFA smusd r10, r2, fp + 334 @ 0 "" 2 + 335 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 336 00d0 22FB1BF2 smuadx r2, r2, fp + 337 @ 0 "" 2 + 338 .thumb + 339 .syntax unified + 340 00d4 1AEB0404 adds r4, r10, r4 + 341 00d8 41EBEA71 adc r1, r1, r10, asr #31 + 342 00dc 1018 adds r0, r2, r0 + 343 00de 43EBE273 adc r3, r3, r2, asr #31 + 344 00e2 013F subs r7, r7, #1 + 345 00e4 DED1 bne .L57 + 346 00e6 049A ldr r2, [sp, #16] + 347 00e8 9644 add lr, lr, r2 + 348 00ea 019A ldr r2, [sp, #4] + 349 .L56: + 350 00ec 039D ldr r5, [sp, #12] + 351 00ee 65B1 cbz r5, .L58 + ARM GAS /tmp/ccB9AFDQ.s page 7 + + + 352 00f0 1268 ldr r2, [r2] @ unaligned + 353 00f2 5EF8046B ldr r6, [lr], #4 @ unaligned + 354 .syntax unified + 355 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 356 00f6 42FB06F5 smusd r5, r2, r6 + 357 @ 0 "" 2 + 358 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 359 00fa 22FB16F2 smuadx r2, r2, r6 + 360 @ 0 "" 2 + 361 .thumb + 362 .syntax unified + 363 00fe 2C19 adds r4, r5, r4 + 364 0100 41EBE571 adc r1, r1, r5, asr #31 + 365 0104 1018 adds r0, r2, r0 + 366 0106 43EBE273 adc r3, r3, r2, asr #31 + 367 .L58: + 368 010a E40B lsrs r4, r4, #15 + 369 010c C00B lsrs r0, r0, #15 + 370 010e B8F10108 subs r8, r8, #1 + 371 0112 44EA4144 orr r4, r4, r1, lsl #17 + 372 0116 40EA4340 orr r0, r0, r3, lsl #17 + 373 .syntax unified + 374 @ 569 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c" + 375 011a 04F30F04 ssat r4, #16, r4 + 376 @ 0 "" 2 + 377 @ 570 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c" + 378 011e 00F30F00 ssat r0, #16, r0 + 379 @ 0 "" 2 + 380 .thumb + 381 .syntax unified + 382 0122 2CF8044C strh r4, [ip, #-4] @ movhi + 383 0126 2CF8020C strh r0, [ip, #-2] @ movhi + 384 012a 0CF1040C add ip, ip, #4 + 385 012e AFD1 bne .L59 + 386 0130 059B ldr r3, [sp, #20] + 387 0132 099A ldr r2, [sp, #36] + 388 0134 1344 add r3, r3, r2 + 389 0136 0593 str r3, [sp, #20] + 390 0138 0A9A ldr r2, [sp, #40] + 391 013a 019B ldr r3, [sp, #4] + 392 013c 1344 add r3, r3, r2 + 393 013e 0193 str r3, [sp, #4] + 394 0140 069B ldr r3, [sp, #24] + 395 0142 013B subs r3, r3, #1 + 396 0144 0693 str r3, [sp, #24] + 397 0146 9AD1 bne .L60 + 398 0148 1846 mov r0, r3 + 399 014a 0DB0 add sp, sp, #52 + 400 @ sp needed + 401 014c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 402 .L77: + 403 0150 08F10408 add r8, r8, #4 + 404 0154 C845 cmp r8, r9 + 405 0156 DC44 add ip, ip, fp + 406 0158 3FF47CAF beq .L49 + 407 .L52: + 408 015c 4146 mov r1, r8 + ARM GAS /tmp/ccB9AFDQ.s page 8 + + + 409 015e 6446 mov r4, ip + 410 0160 5346 mov r3, r10 + 411 .L51: + 412 0162 54F8045B ldr r5, [r4], #4 @ unaligned + 413 0166 0D60 str r5, [r1] @ unaligned + 414 0168 013B subs r3, r3, #1 + 415 016a 3144 add r1, r1, r6 + 416 016c F9D1 bne .L51 + 417 016e EFE7 b .L77 + 418 .L61: + 419 0170 029A ldr r2, [sp, #8] + 420 0172 4846 mov r0, r9 + 421 0174 4B46 mov r3, r9 + 422 0176 4C46 mov r4, r9 + 423 0178 4946 mov r1, r9 + 424 017a B7E7 b .L56 + 425 .L76: + 426 017c 0991 str r1, [sp, #36] + 427 017e 69E7 b .L49 + 429 .section .text.arm_mat_cmplx_mult_q31,"ax",%progbits + 430 .align 1 + 431 .p2align 2,,3 + 432 .global arm_mat_cmplx_mult_q31 + 433 .syntax unified + 434 .thumb + 435 .thumb_func + 436 .fpu fpv4-sp-d16 + 438 arm_mat_cmplx_mult_q31: + 439 @ args = 0, pretend = 0, frame = 32 + 440 @ frame_needed = 0, uses_anonymous_args = 0 + 441 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 442 0004 4368 ldr r3, [r0, #4] + 443 0006 4C68 ldr r4, [r1, #4] + 444 0008 4988 ldrh r1, [r1, #2] + 445 000a 5268 ldr r2, [r2, #4] + 446 000c 89B0 sub sp, sp, #36 + 447 000e 0833 adds r3, r3, #8 + 448 0010 0694 str r4, [sp, #24] + 449 0012 0293 str r3, [sp, #8] + 450 0014 4488 ldrh r4, [r0, #2] + 451 0016 069B ldr r3, [sp, #24] + 452 0018 0088 ldrh r0, [r0] + 453 001a 0590 str r0, [sp, #20] + 454 001c 4FEAC108 lsl r8, r1, #3 + 455 0020 E000 lsls r0, r4, #3 + 456 0022 4344 add r3, r3, r8 + 457 0024 0129 cmp r1, #1 + 458 0026 0194 str r4, [sp, #4] + 459 0028 0790 str r0, [sp, #28] + 460 002a 0492 str r2, [sp, #16] + 461 002c 0393 str r3, [sp, #12] + 462 002e 40F08E80 bne .L88 + 463 .L98: + 464 0032 049B ldr r3, [sp, #16] + 465 0034 DDF818A0 ldr r10, [sp, #24] + 466 0038 03F10809 add r9, r3, #8 + 467 .L97: + ARM GAS /tmp/ccB9AFDQ.s page 9 + + + 468 003c 019F ldr r7, [sp, #4] + 469 003e 002F cmp r7, #0 + 470 0040 00F0AA80 beq .L90 + 471 0044 0021 movs r1, #0 + 472 0046 029E ldr r6, [sp, #8] + 473 0048 5546 mov r5, r10 + 474 004a 8B46 mov fp, r1 + 475 004c 8E46 mov lr, r1 + 476 004e 0B46 mov r3, r1 + 477 .L91: + 478 0050 56F8084C ldr r4, [r6, #-8] + 479 0054 D5F800C0 ldr ip, [r5] + 480 0058 56F8042C ldr r2, [r6, #-4] + 481 005c CCFB043E smlal r3, lr, ip, r4 + 482 0060 1846 mov r0, r3 + 483 0062 6B68 ldr r3, [r5, #4] + 484 0064 C2FB0C1B smlal r1, fp, r2, ip + 485 0068 C3FB041B smlal r1, fp, r3, r4 + 486 006c 83FB0232 smull r3, r2, r3, r2 + 487 0070 C31A subs r3, r0, r3 + 488 0072 6EEB020E sbc lr, lr, r2 + 489 0076 013F subs r7, r7, #1 + 490 0078 06F10806 add r6, r6, #8 + 491 007c 4544 add r5, r5, r8 + 492 007e E7D1 bne .L91 + 493 0080 4FEAD37C lsr ip, r3, #31 + 494 0084 4CEA4E03 orr r3, ip, lr, lsl #1 + 495 0088 DA17 asrs r2, r3, #31 + 496 008a C90F lsrs r1, r1, #31 + 497 008c B2EBEE7F cmp r2, lr, asr #31 + 498 0090 41EA4B01 orr r1, r1, fp, lsl #1 + 499 0094 18BF it ne + 500 0096 6FF00043 mvnne r3, #-2147483648 + 501 009a 4FEAEE70 asr r0, lr, #31 + 502 009e 4FEAEB7B asr fp, fp, #31 + 503 00a2 4FEAE172 asr r2, r1, #31 + 504 00a6 18BF it ne + 505 00a8 4340 eorne r3, r0, r3 + 506 00aa 5A45 cmp r2, fp + 507 00ac 49F8083C str r3, [r9, #-8] + 508 00b0 75D0 beq .L94 + 509 00b2 6FF00043 mvn r3, #-2147483648 + 510 00b6 8BEA0303 eor r3, fp, r3 + 511 00ba 49F8043C str r3, [r9, #-4] + 512 00be 039B ldr r3, [sp, #12] + 513 00c0 0AF1080A add r10, r10, #8 + 514 00c4 9A45 cmp r10, r3 + 515 00c6 09F10809 add r9, r9, #8 + 516 00ca B7D1 bne .L97 + 517 .L96: + 518 00cc 049B ldr r3, [sp, #16] + 519 00ce 079A ldr r2, [sp, #28] + 520 00d0 4344 add r3, r3, r8 + 521 00d2 0493 str r3, [sp, #16] + 522 00d4 029B ldr r3, [sp, #8] + 523 00d6 1344 add r3, r3, r2 + 524 00d8 0293 str r3, [sp, #8] + ARM GAS /tmp/ccB9AFDQ.s page 10 + + + 525 00da 059B ldr r3, [sp, #20] + 526 00dc 013B subs r3, r3, #1 + 527 00de 0593 str r3, [sp, #20] + 528 00e0 A7D1 bne .L98 + 529 .L103: + 530 00e2 0020 movs r0, #0 + 531 00e4 09B0 add sp, sp, #36 + 532 @ sp needed + 533 00e6 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 534 .L106: + 535 00ea 4FEAD37C lsr ip, r3, #31 + 536 00ee 4CEA4E02 orr r2, ip, lr, lsl #1 + 537 00f2 D317 asrs r3, r2, #31 + 538 00f4 B3EBEE7F cmp r3, lr, asr #31 + 539 00f8 4FEAD173 lsr r3, r1, #31 + 540 00fc 43EA4B03 orr r3, r3, fp, lsl #1 + 541 0100 18BF it ne + 542 0102 6FF00042 mvnne r2, #-2147483648 + 543 0106 4FEAEE70 asr r0, lr, #31 + 544 010a 4FEAEB7B asr fp, fp, #31 + 545 010e 4FEAE371 asr r1, r3, #31 + 546 0112 18BF it ne + 547 0114 4240 eorne r2, r0, r2 + 548 0116 8B45 cmp fp, r1 + 549 0118 49F8082C str r2, [r9, #-8] + 550 011c 4DD0 beq .L84 + 551 011e 6FF00043 mvn r3, #-2147483648 + 552 0122 8BEA0303 eor r3, fp, r3 + 553 0126 49F8043C str r3, [r9, #-4] + 554 012a 039B ldr r3, [sp, #12] + 555 012c 0AF1080A add r10, r10, #8 + 556 0130 9A45 cmp r10, r3 + 557 0132 09F10809 add r9, r9, #8 + 558 0136 0FD1 bne .L87 + 559 .L86: + 560 0138 049B ldr r3, [sp, #16] + 561 013a 079A ldr r2, [sp, #28] + 562 013c 4344 add r3, r3, r8 + 563 013e 0493 str r3, [sp, #16] + 564 0140 029B ldr r3, [sp, #8] + 565 0142 1344 add r3, r3, r2 + 566 0144 0293 str r3, [sp, #8] + 567 0146 059B ldr r3, [sp, #20] + 568 0148 013B subs r3, r3, #1 + 569 014a 0593 str r3, [sp, #20] + 570 014c C9D0 beq .L103 + 571 .L88: + 572 014e 049B ldr r3, [sp, #16] + 573 0150 DDF818A0 ldr r10, [sp, #24] + 574 0154 03F10809 add r9, r3, #8 + 575 .L87: + 576 0158 019F ldr r7, [sp, #4] + 577 015a 5FB3 cbz r7, .L80 + 578 015c 0021 movs r1, #0 + 579 015e 029E ldr r6, [sp, #8] + 580 0160 5546 mov r5, r10 + 581 0162 8B46 mov fp, r1 + ARM GAS /tmp/ccB9AFDQ.s page 11 + + + 582 0164 8E46 mov lr, r1 + 583 0166 0B46 mov r3, r1 + 584 .L81: + 585 0168 2A68 ldr r2, [r5] + 586 016a 56F8084C ldr r4, [r6, #-8] + 587 016e C4FB023E smlal r3, lr, r4, r2 + 588 0172 1846 mov r0, r3 + 589 0174 56F8043C ldr r3, [r6, #-4] + 590 0178 C2FB031B smlal r1, fp, r2, r3 + 591 017c 6A68 ldr r2, [r5, #4] + 592 017e C4FB021B smlal r1, fp, r4, r2 + 593 0182 83FB0232 smull r3, r2, r3, r2 + 594 0186 C31A subs r3, r0, r3 + 595 0188 6EEB020E sbc lr, lr, r2 + 596 018c 013F subs r7, r7, #1 + 597 018e 06F10806 add r6, r6, #8 + 598 0192 4544 add r5, r5, r8 + 599 0194 E8D1 bne .L81 + 600 0196 A8E7 b .L106 + 601 .L90: + 602 0198 49F8087C str r7, [r9, #-8] + 603 019c 3946 mov r1, r7 + 604 .L94: + 605 019e 039B ldr r3, [sp, #12] + 606 01a0 49F8041C str r1, [r9, #-4] + 607 01a4 0AF1080A add r10, r10, #8 + 608 01a8 9A45 cmp r10, r3 + 609 01aa 09F10809 add r9, r9, #8 + 610 01ae 7FF445AF bne .L97 + 611 01b2 8BE7 b .L96 + 612 .L80: + 613 01b4 3B46 mov r3, r7 + 614 01b6 49F8087C str r7, [r9, #-8] + 615 .L84: + 616 01ba 49F8043C str r3, [r9, #-4] + 617 01be 039B ldr r3, [sp, #12] + 618 01c0 0AF1080A add r10, r10, #8 + 619 01c4 5345 cmp r3, r10 + 620 01c6 09F10809 add r9, r9, #8 + 621 01ca C5D1 bne .L87 + 622 01cc B4E7 b .L86 + 624 01ce 00BF .section .text.arm_mat_init_f32,"ax",%progbits + 625 .align 1 + 626 .p2align 2,,3 + 627 .global arm_mat_init_f32 + 628 .syntax unified + 629 .thumb + 630 .thumb_func + 631 .fpu fpv4-sp-d16 + 633 arm_mat_init_f32: + 634 @ args = 0, pretend = 0, frame = 0 + 635 @ frame_needed = 0, uses_anonymous_args = 0 + 636 @ link register save eliminated. + 637 0000 0180 strh r1, [r0] @ movhi + 638 0002 4280 strh r2, [r0, #2] @ movhi + 639 0004 4360 str r3, [r0, #4] + 640 0006 7047 bx lr + ARM GAS /tmp/ccB9AFDQ.s page 12 + + + 642 .section .text.arm_mat_init_q15,"ax",%progbits + 643 .align 1 + 644 .p2align 2,,3 + 645 .global arm_mat_init_q15 + 646 .syntax unified + 647 .thumb + 648 .thumb_func + 649 .fpu fpv4-sp-d16 + 651 arm_mat_init_q15: + 652 @ args = 0, pretend = 0, frame = 0 + 653 @ frame_needed = 0, uses_anonymous_args = 0 + 654 @ link register save eliminated. + 655 0000 0180 strh r1, [r0] @ movhi + 656 0002 4280 strh r2, [r0, #2] @ movhi + 657 0004 4360 str r3, [r0, #4] + 658 0006 7047 bx lr + 660 .section .text.arm_mat_init_q31,"ax",%progbits + 661 .align 1 + 662 .p2align 2,,3 + 663 .global arm_mat_init_q31 + 664 .syntax unified + 665 .thumb + 666 .thumb_func + 667 .fpu fpv4-sp-d16 + 669 arm_mat_init_q31: + 670 @ args = 0, pretend = 0, frame = 0 + 671 @ frame_needed = 0, uses_anonymous_args = 0 + 672 @ link register save eliminated. + 673 0000 0180 strh r1, [r0] @ movhi + 674 0002 4280 strh r2, [r0, #2] @ movhi + 675 0004 4360 str r3, [r0, #4] + 676 0006 7047 bx lr + 678 .section .text.arm_mat_inverse_f32,"ax",%progbits + 679 .align 1 + 680 .p2align 2,,3 + 681 .global arm_mat_inverse_f32 + 682 .syntax unified + 683 .thumb + 684 .thumb_func + 685 .fpu fpv4-sp-d16 + 687 arm_mat_inverse_f32: + 688 @ args = 0, pretend = 0, frame = 40 + 689 @ frame_needed = 0, uses_anonymous_args = 0 + 690 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 691 0004 8BB0 sub sp, sp, #44 + 692 0006 4368 ldr r3, [r0, #4] + 693 0008 0488 ldrh r4, [r0] + 694 000a 4D68 ldr r5, [r1, #4] + 695 000c 0993 str r3, [sp, #36] + 696 000e 4388 ldrh r3, [r0, #2] + 697 0010 0795 str r5, [sp, #28] + 698 0012 0193 str r3, [sp, #4] + 699 0014 FCB1 cbz r4, .L111 + 700 0016 4FF07E5A mov r10, #1065353216 + 701 001a 671E subs r7, r4, #1 + 702 001c 45F804AB str r10, [r5], #4 @ float + 703 0020 19D0 beq .L111 + ARM GAS /tmp/ccB9AFDQ.s page 13 + + + 704 .L140: + 705 0022 4FF00108 mov r8, #1 + 706 .L112: + 707 0026 BE00 lsls r6, r7, #2 + 708 0028 3246 mov r2, r6 + 709 002a 0021 movs r1, #0 + 710 002c 2846 mov r0, r5 + 711 002e 4FEA8809 lsl r9, r8, #2 + 712 0032 FFF7FEFF bl memset + 713 0036 4A46 mov r2, r9 + 714 0038 A819 adds r0, r5, r6 + 715 003a 0021 movs r1, #0 + 716 003c 8518 adds r5, r0, r2 + 717 003e B8F1000F cmp r8, #0 + 718 0042 00F0D380 beq .L169 + 719 0046 FFF7FEFF bl memset + 720 004a 013F subs r7, r7, #1 + 721 004c 45F804AB str r10, [r5], #4 @ float + 722 0050 08F10108 add r8, r8, #1 + 723 0054 E7D1 bne .L112 + 724 .L111: + 725 0056 019B ldr r3, [sp, #4] + 726 0058 002B cmp r3, #0 + 727 005a 00F0A280 beq .L117 + 728 005e 4FEA830E lsl lr, r3, #2 + 729 0062 1D46 mov r5, r3 + 730 0064 DB00 lsls r3, r3, #3 + 731 0066 0433 adds r3, r3, #4 + 732 0068 0593 str r3, [sp, #20] + 733 006a 0EF10403 add r3, lr, #4 + 734 006e 0693 str r3, [sp, #24] + 735 0070 099B ldr r3, [sp, #36] + 736 0072 DDF81C90 ldr r9, [sp, #28] + 737 0076 03EB0E02 add r2, r3, lr + 738 007a CDE90232 strd r3, r2, [sp, #8] + 739 007e 4FF0000C mov ip, #0 + 740 0082 9846 mov r8, r3 + 741 0084 CDF820C0 str ip, [sp, #32] + 742 .L136: + 743 0088 98ED007A vldr.32 s14, [r8] + 744 008c B5EE407A vcmp.f32 s14, #0 + 745 0090 0CF10103 add r3, ip, #1 + 746 0094 F1EE10FA vmrs APSR_nzcv, FPSCR + 747 0098 0493 str r3, [sp, #16] + 748 009a 50D0 beq .L170 + 749 .L125: + 750 009c 2A46 mov r2, r5 + 751 009e 4346 mov r3, r8 + 752 .L128: + 753 00a0 D3ED006A vldr.32 s13, [r3] + 754 00a4 C6EE877A vdiv.f32 s15, s13, s14 + 755 00a8 013A subs r2, r2, #1 + 756 00aa E3EC017A vstmia.32 r3!, {s15} + 757 00ae F7D1 bne .L128 + 758 00b0 0199 ldr r1, [sp, #4] + 759 00b2 4B46 mov r3, r9 + 760 .L129: + ARM GAS /tmp/ccB9AFDQ.s page 14 + + + 761 00b4 D3ED006A vldr.32 s13, [r3] + 762 00b8 C6EE877A vdiv.f32 s15, s13, s14 + 763 00bc 0139 subs r1, r1, #1 + 764 00be E3EC017A vstmia.32 r3!, {s15} + 765 00c2 F7D1 bne .L129 + 766 00c4 4CB3 cbz r4, .L130 + 767 00c6 0798 ldr r0, [sp, #28] + 768 00c8 DDF808B0 ldr fp, [sp, #8] + 769 00cc AF00 lsls r7, r5, #2 + 770 00ce 4FEA8C06 lsl r6, ip, #2 + 771 .L135: + 772 00d2 8C45 cmp ip, r1 + 773 00d4 30D0 beq .L171 + 774 00d6 9BED007A vldr.32 s14, [fp] + 775 00da 5A46 mov r2, fp + 776 00dc 2B46 mov r3, r5 + 777 00de C246 mov r10, r8 + 778 .L133: + 779 00e0 D2ED007A vldr.32 s15, [r2] + 780 00e4 FAEC016A vldmia.32 r10!, {s13} + 781 00e8 E6EEC77A vfms.f32 s15, s13, s14 + 782 00ec 013B subs r3, r3, #1 + 783 00ee E2EC017A vstmia.32 r2!, {s15} + 784 00f2 F5D1 bne .L133 + 785 00f4 019B ldr r3, [sp, #4] + 786 00f6 BB44 add fp, fp, r7 + 787 00f8 0246 mov r2, r0 + 788 00fa CA46 mov r10, r9 + 789 .L134: + 790 00fc D2ED007A vldr.32 s15, [r2] + 791 0100 FAEC016A vldmia.32 r10!, {s13} + 792 0104 E6EEC77A vfms.f32 s15, s13, s14 + 793 0108 013B subs r3, r3, #1 + 794 010a E2EC017A vstmia.32 r2!, {s15} + 795 010e F5D1 bne .L134 + 796 0110 7044 add r0, r0, lr + 797 .L132: + 798 0112 0131 adds r1, r1, #1 + 799 0114 8C42 cmp r4, r1 + 800 0116 B344 add fp, fp, r6 + 801 0118 DBD1 bne .L135 + 802 .L130: + 803 011a 029B ldr r3, [sp, #8] + 804 011c 059A ldr r2, [sp, #20] + 805 011e 0433 adds r3, r3, #4 + 806 0120 0293 str r3, [sp, #8] + 807 0122 069B ldr r3, [sp, #24] + 808 0124 9844 add r8, r8, r3 + 809 0126 039B ldr r3, [sp, #12] + 810 0128 013D subs r5, r5, #1 + 811 012a 1344 add r3, r3, r2 + 812 012c F144 add r9, r9, lr + 813 012e 0393 str r3, [sp, #12] + 814 0130 3CD0 beq .L172 + 815 0132 DDF810C0 ldr ip, [sp, #16] + 816 0136 A7E7 b .L136 + 817 .L171: + ARM GAS /tmp/ccB9AFDQ.s page 15 + + + 818 0138 BB44 add fp, fp, r7 + 819 013a 7044 add r0, r0, lr + 820 013c E9E7 b .L132 + 821 .L170: + 822 013e A342 cmp r3, r4 + 823 0140 2BD2 bcs .L120 + 824 0142 0399 ldr r1, [sp, #12] + 825 0144 0123 movs r3, #1 + 826 0146 04E0 b .L126 + 827 .L164: + 828 0148 0133 adds r3, r3, #1 + 829 014a 0CEB0302 add r2, ip, r3 + 830 014e A242 cmp r2, r4 + 831 0150 23D2 bcs .L120 + 832 .L126: + 833 0152 D1ED007A vldr.32 s15, [r1] + 834 0156 F5EE407A vcmp.f32 s15, #0 + 835 015a F1EE10FA vmrs APSR_nzcv, FPSCR + 836 015e 0A46 mov r2, r1 + 837 0160 7144 add r1, r1, lr + 838 0162 F1D0 beq .L164 + 839 0164 2846 mov r0, r5 + 840 0166 4146 mov r1, r8 + 841 .L121: + 842 0168 1668 ldr r6, [r2] @ float + 843 016a 0F68 ldr r7, [r1] @ float + 844 016c 42F8047B str r7, [r2], #4 @ float + 845 0170 0138 subs r0, r0, #1 + 846 0172 41F8046B str r6, [r1], #4 @ float + 847 0176 F7D1 bne .L121 + 848 0178 0199 ldr r1, [sp, #4] + 849 017a 03FB0E93 mla r3, r3, lr, r9 + 850 017e 4A46 mov r2, r9 + 851 .L123: + 852 0180 1868 ldr r0, [r3] @ float + 853 0182 1668 ldr r6, [r2] @ float + 854 0184 43F8046B str r6, [r3], #4 @ float + 855 0188 0139 subs r1, r1, #1 + 856 018a 42F8040B str r0, [r2], #4 @ float + 857 018e F7D1 bne .L123 + 858 0190 0123 movs r3, #1 + 859 0192 98ED007A vldr.32 s14, [r8] + 860 0196 0893 str r3, [sp, #32] + 861 0198 80E7 b .L125 + 862 .L120: + 863 019a 089B ldr r3, [sp, #32] + 864 019c 012B cmp r3, #1 + 865 019e 3FF47DAF beq .L125 + 866 .L117: + 867 01a2 6FF00400 mvn r0, #4 + 868 01a6 0BB0 add sp, sp, #44 + 869 @ sp needed + 870 01a8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 871 .L172: + 872 01ac 089B ldr r3, [sp, #32] + 873 01ae 012B cmp r3, #1 + 874 01b0 04D0 beq .L144 + ARM GAS /tmp/ccB9AFDQ.s page 16 + + + 875 01b2 B5EE407A vcmp.f32 s14, #0 + 876 01b6 F1EE10FA vmrs APSR_nzcv, FPSCR + 877 01ba 03D0 beq .L138 + 878 .L144: + 879 01bc 0020 movs r0, #0 + 880 01be 0BB0 add sp, sp, #44 + 881 @ sp needed + 882 01c0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 883 .L138: + 884 01c4 019B ldr r3, [sp, #4] + 885 01c6 03FB04F4 mul r4, r3, r4 + 886 01ca 002C cmp r4, #0 + 887 01cc E9D0 beq .L117 + 888 01ce DDE90823 ldrd r2, r3, [sp, #32] + 889 01d2 01E0 b .L139 + 890 .L173: + 891 01d4 A242 cmp r2, r4 + 892 01d6 E4D0 beq .L117 + 893 .L139: + 894 01d8 F3EC017A vldmia.32 r3!, {s15} + 895 01dc F5EE407A vcmp.f32 s15, #0 + 896 01e0 F1EE10FA vmrs APSR_nzcv, FPSCR + 897 01e4 02F10102 add r2, r2, #1 + 898 01e8 F4D0 beq .L173 + 899 01ea E7E7 b .L144 + 900 .L169: + 901 01ec 0546 mov r5, r0 + 902 01ee 013F subs r7, r7, #1 + 903 01f0 45F804AB str r10, [r5], #4 @ float + 904 01f4 7FF415AF bne .L140 + 905 01f8 2DE7 b .L111 + 907 .global __aeabi_dcmpeq + 908 .global __aeabi_ddiv + 909 .global __aeabi_dmul + 910 .global __aeabi_dsub + 911 01fa 00BF .section .text.arm_mat_inverse_f64,"ax",%progbits + 912 .align 1 + 913 .p2align 2,,3 + 914 .global arm_mat_inverse_f64 + 915 .syntax unified + 916 .thumb + 917 .thumb_func + 918 .fpu fpv4-sp-d16 + 920 arm_mat_inverse_f64: + 921 @ args = 0, pretend = 0, frame = 80 + 922 @ frame_needed = 0, uses_anonymous_args = 0 + 923 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 924 0004 95B0 sub sp, sp, #84 + 925 0006 4268 ldr r2, [r0, #4] + 926 0008 0388 ldrh r3, [r0] + 927 000a 4C68 ldr r4, [r1, #4] + 928 000c 1392 str r2, [sp, #76] + 929 000e 4288 ldrh r2, [r0, #2] + 930 0010 0393 str r3, [sp, #12] + 931 0012 1294 str r4, [sp, #72] + 932 0014 0A92 str r2, [sp, #40] + 933 0016 FBB1 cbz r3, .L175 + ARM GAS /tmp/ccB9AFDQ.s page 17 + + + 934 0018 DFF86CB2 ldr fp, .L236 + 935 001c 4FF0000A mov r10, #0 + 936 0020 5E1E subs r6, r3, #1 + 937 0022 E4E802AB strd r10, [r4], #8 + 938 0026 17D0 beq .L175 + 939 .L204: + 940 0028 0127 movs r7, #1 + 941 .L176: + 942 002a F500 lsls r5, r6, #3 + 943 002c 2A46 mov r2, r5 + 944 002e 0021 movs r1, #0 + 945 0030 2046 mov r0, r4 + 946 0032 4FEAC708 lsl r8, r7, #3 + 947 0036 FFF7FEFF bl memset + 948 003a 4246 mov r2, r8 + 949 003c 6019 adds r0, r4, r5 + 950 003e 0021 movs r1, #0 + 951 0040 8418 adds r4, r0, r2 + 952 0042 002F cmp r7, #0 + 953 0044 00F01981 beq .L232 + 954 0048 FFF7FEFF bl memset + 955 004c 013E subs r6, r6, #1 + 956 004e E4E802AB strd r10, [r4], #8 + 957 0052 07F10107 add r7, r7, #1 + 958 0056 E8D1 bne .L176 + 959 .L175: + 960 0058 0A9B ldr r3, [sp, #40] + 961 005a 002B cmp r3, #0 + 962 005c 00F00081 beq .L181 + 963 0060 DA00 lsls r2, r3, #3 + 964 0062 1946 mov r1, r3 + 965 0064 1B01 lsls r3, r3, #4 + 966 0066 0833 adds r3, r3, #8 + 967 0068 1093 str r3, [sp, #64] + 968 006a 02F10803 add r3, r2, #8 + 969 006e 1193 str r3, [sp, #68] + 970 0070 139B ldr r3, [sp, #76] + 971 0072 129C ldr r4, [sp, #72] + 972 0074 0792 str r2, [sp, #28] + 973 0076 0020 movs r0, #0 + 974 0078 9A18 adds r2, r3, r2 + 975 007a 0290 str r0, [sp, #8] + 976 007c 0693 str r3, [sp, #24] + 977 007e 0994 str r4, [sp, #36] + 978 0080 0C92 str r2, [sp, #48] + 979 0082 0891 str r1, [sp, #32] + 980 0084 0B93 str r3, [sp, #44] + 981 0086 0F90 str r0, [sp, #60] + 982 .L200: + 983 0088 069B ldr r3, [sp, #24] + 984 008a D3E90089 ldrd r8, [r3] + 985 008e 0022 movs r2, #0 + 986 0090 0023 movs r3, #0 + 987 0092 4046 mov r0, r8 + 988 0094 4946 mov r1, r9 + 989 0096 FFF7FEFF bl __aeabi_dcmpeq + 990 009a 0028 cmp r0, #0 + ARM GAS /tmp/ccB9AFDQ.s page 18 + + + 991 009c 40F08980 bne .L233 + 992 00a0 029B ldr r3, [sp, #8] + 993 00a2 079A ldr r2, [sp, #28] + 994 00a4 0133 adds r3, r3, #1 + 995 00a6 0D93 str r3, [sp, #52] + 996 00a8 099B ldr r3, [sp, #36] + 997 00aa 1344 add r3, r3, r2 + 998 00ac 0E93 str r3, [sp, #56] + 999 .L190: + 1000 00ae 089D ldr r5, [sp, #32] + 1001 00b0 069C ldr r4, [sp, #24] + 1002 .L192: + 1003 00b2 D4E90001 ldrd r0, [r4] + 1004 00b6 4246 mov r2, r8 + 1005 00b8 4B46 mov r3, r9 + 1006 00ba FFF7FEFF bl __aeabi_ddiv + 1007 00be 013D subs r5, r5, #1 + 1008 00c0 E4E80201 strd r0, [r4], #8 + 1009 00c4 F5D1 bne .L192 + 1010 00c6 DDE9094B ldrd r4, fp, [sp, #36] + 1011 .L193: + 1012 00ca D4E90001 ldrd r0, [r4] + 1013 00ce 4246 mov r2, r8 + 1014 00d0 4B46 mov r3, r9 + 1015 00d2 FFF7FEFF bl __aeabi_ddiv + 1016 00d6 BBF1010B subs fp, fp, #1 + 1017 00da E4E80201 strd r0, [r4], #8 + 1018 00de F4D1 bne .L193 + 1019 00e0 039B ldr r3, [sp, #12] + 1020 00e2 002B cmp r3, #0 + 1021 00e4 4AD0 beq .L194 + 1022 00e6 089B ldr r3, [sp, #32] + 1023 00e8 CDF800B0 str fp, [sp] + 1024 00ec DB00 lsls r3, r3, #3 + 1025 00ee 0493 str r3, [sp, #16] + 1026 00f0 029B ldr r3, [sp, #8] + 1027 00f2 DB00 lsls r3, r3, #3 + 1028 00f4 0593 str r3, [sp, #20] + 1029 00f6 129B ldr r3, [sp, #72] + 1030 00f8 0193 str r3, [sp, #4] + 1031 00fa 0B9B ldr r3, [sp, #44] + 1032 00fc 9B46 mov fp, r3 + 1033 .L199: + 1034 00fe 029B ldr r3, [sp, #8] + 1035 0100 009A ldr r2, [sp] + 1036 0102 9342 cmp r3, r2 + 1037 0104 4ED0 beq .L234 + 1038 0106 DBE90089 ldrd r8, [fp] + 1039 010a 089C ldr r4, [sp, #32] + 1040 010c DDF818A0 ldr r10, [sp, #24] + 1041 0110 5D46 mov r5, fp + 1042 .L197: + 1043 0112 FAE80223 ldrd r2, [r10], #8 + 1044 0116 4046 mov r0, r8 + 1045 0118 4946 mov r1, r9 + 1046 011a FFF7FEFF bl __aeabi_dmul + 1047 011e D5E90067 ldrd r6, [r5] + ARM GAS /tmp/ccB9AFDQ.s page 19 + + + 1048 0122 0246 mov r2, r0 + 1049 0124 0B46 mov r3, r1 + 1050 0126 3046 mov r0, r6 + 1051 0128 3946 mov r1, r7 + 1052 012a FFF7FEFF bl __aeabi_dsub + 1053 012e 013C subs r4, r4, #1 + 1054 0130 E5E80201 strd r0, [r5], #8 + 1055 0134 EDD1 bne .L197 + 1056 0136 049B ldr r3, [sp, #16] + 1057 0138 019D ldr r5, [sp, #4] + 1058 013a DDE909A4 ldrd r10, r4, [sp, #36] + 1059 013e 9B44 add fp, fp, r3 + 1060 .L198: + 1061 0140 FAE80223 ldrd r2, [r10], #8 + 1062 0144 4046 mov r0, r8 + 1063 0146 4946 mov r1, r9 + 1064 0148 FFF7FEFF bl __aeabi_dmul + 1065 014c D5E90067 ldrd r6, [r5] + 1066 0150 0246 mov r2, r0 + 1067 0152 0B46 mov r3, r1 + 1068 0154 3046 mov r0, r6 + 1069 0156 3946 mov r1, r7 + 1070 0158 FFF7FEFF bl __aeabi_dsub + 1071 015c 013C subs r4, r4, #1 + 1072 015e E5E80201 strd r0, [r5], #8 + 1073 0162 EDD1 bne .L198 + 1074 0164 019B ldr r3, [sp, #4] + 1075 0166 079A ldr r2, [sp, #28] + 1076 0168 1344 add r3, r3, r2 + 1077 016a 0193 str r3, [sp, #4] + 1078 .L196: + 1079 016c 059A ldr r2, [sp, #20] + 1080 016e 009B ldr r3, [sp] + 1081 0170 9344 add fp, fp, r2 + 1082 0172 039A ldr r2, [sp, #12] + 1083 0174 0133 adds r3, r3, #1 + 1084 0176 9A42 cmp r2, r3 + 1085 0178 0093 str r3, [sp] + 1086 017a C0D1 bne .L199 + 1087 .L194: + 1088 017c 0B9B ldr r3, [sp, #44] + 1089 017e 119A ldr r2, [sp, #68] + 1090 0180 0833 adds r3, r3, #8 + 1091 0182 0B93 str r3, [sp, #44] + 1092 0184 069B ldr r3, [sp, #24] + 1093 0186 1344 add r3, r3, r2 + 1094 0188 0693 str r3, [sp, #24] + 1095 018a 0E9B ldr r3, [sp, #56] + 1096 018c 109A ldr r2, [sp, #64] + 1097 018e 0993 str r3, [sp, #36] + 1098 0190 0C9B ldr r3, [sp, #48] + 1099 0192 1344 add r3, r3, r2 + 1100 0194 0C93 str r3, [sp, #48] + 1101 0196 089B ldr r3, [sp, #32] + 1102 0198 013B subs r3, r3, #1 + 1103 019a 0893 str r3, [sp, #32] + 1104 019c 19D0 beq .L235 + ARM GAS /tmp/ccB9AFDQ.s page 20 + + + 1105 019e 0D9B ldr r3, [sp, #52] + 1106 01a0 0293 str r3, [sp, #8] + 1107 01a2 71E7 b .L200 + 1108 .L234: + 1109 01a4 049B ldr r3, [sp, #16] + 1110 01a6 079A ldr r2, [sp, #28] + 1111 01a8 9B44 add fp, fp, r3 + 1112 01aa 019B ldr r3, [sp, #4] + 1113 01ac 1344 add r3, r3, r2 + 1114 01ae 0193 str r3, [sp, #4] + 1115 01b0 DCE7 b .L196 + 1116 .L233: + 1117 01b2 029B ldr r3, [sp, #8] + 1118 01b4 039A ldr r2, [sp, #12] + 1119 01b6 0133 adds r3, r3, #1 + 1120 01b8 9342 cmp r3, r2 + 1121 01ba 0D93 str r3, [sp, #52] + 1122 01bc 55D2 bcs .L185 + 1123 01be 0C9B ldr r3, [sp, #48] + 1124 01c0 0022 movs r2, #0 + 1125 01c2 D3E90001 ldrd r0, [r3] + 1126 01c6 1C46 mov r4, r3 + 1127 01c8 0023 movs r3, #0 + 1128 01ca FFF7FEFF bl __aeabi_dcmpeq + 1129 01ce 78B1 cbz r0, .L205 + 1130 .L187: + 1131 01d0 FEE7 b .L187 + 1132 .L235: + 1133 01d2 0F9B ldr r3, [sp, #60] + 1134 01d4 012B cmp r3, #1 + 1135 01d6 07D0 beq .L207 + 1136 01d8 4046 mov r0, r8 + 1137 01da 4946 mov r1, r9 + 1138 01dc 0022 movs r2, #0 + 1139 01de 0023 movs r3, #0 + 1140 01e0 FFF7FEFF bl __aeabi_dcmpeq + 1141 01e4 0028 cmp r0, #0 + 1142 01e6 25D1 bne .L202 + 1143 .L207: + 1144 01e8 0898 ldr r0, [sp, #32] + 1145 .L230: + 1146 01ea 15B0 add sp, sp, #84 + 1147 @ sp needed + 1148 01ec BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1149 .L205: + 1150 01f0 089A ldr r2, [sp, #32] + 1151 01f2 069B ldr r3, [sp, #24] + 1152 .L186: + 1153 01f4 D4E90001 ldrd r0, [r4] + 1154 01f8 D3E90067 ldrd r6, [r3] + 1155 01fc 013A subs r2, r2, #1 + 1156 01fe E4E80267 strd r6, [r4], #8 + 1157 0202 E3E80201 strd r0, [r3], #8 + 1158 0206 F5D1 bne .L186 + 1159 0208 099B ldr r3, [sp, #36] + 1160 020a 079A ldr r2, [sp, #28] + 1161 020c 9A18 adds r2, r3, r2 + ARM GAS /tmp/ccB9AFDQ.s page 21 + + + 1162 020e 0E92 str r2, [sp, #56] + 1163 0210 1146 mov r1, r2 + 1164 0212 0A9A ldr r2, [sp, #40] + 1165 .L188: + 1166 0214 D1E90045 ldrd r4, [r1] + 1167 0218 D3E90067 ldrd r6, [r3] + 1168 021c 013A subs r2, r2, #1 + 1169 021e E1E80267 strd r6, [r1], #8 + 1170 0222 E3E80245 strd r4, [r3], #8 + 1171 0226 F5D1 bne .L188 + 1172 0228 0123 movs r3, #1 + 1173 022a 0F93 str r3, [sp, #60] + 1174 022c 069B ldr r3, [sp, #24] + 1175 022e D3E90089 ldrd r8, [r3] + 1176 0232 3CE7 b .L190 + 1177 .L202: + 1178 0234 039E ldr r6, [sp, #12] + 1179 0236 0A9B ldr r3, [sp, #40] + 1180 0238 03FB06F6 mul r6, r3, r6 + 1181 023c 86B1 cbz r6, .L181 + 1182 023e 139F ldr r7, [sp, #76] + 1183 0240 DDF83C80 ldr r8, [sp, #60] + 1184 0244 0024 movs r4, #0 + 1185 0246 0025 movs r5, #0 + 1186 .L203: + 1187 0248 F7E80201 ldrd r0, [r7], #8 + 1188 024c 2246 mov r2, r4 + 1189 024e 2B46 mov r3, r5 + 1190 0250 08F10108 add r8, r8, #1 + 1191 0254 FFF7FEFF bl __aeabi_dcmpeq + 1192 0258 0028 cmp r0, #0 + 1193 025a C6D0 beq .L230 + 1194 025c B045 cmp r8, r6 + 1195 025e F3D1 bne .L203 + 1196 .L181: + 1197 0260 6FF00400 mvn r0, #4 + 1198 0264 15B0 add sp, sp, #84 + 1199 @ sp needed + 1200 0266 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1201 .L185: + 1202 026a 0F9B ldr r3, [sp, #60] + 1203 026c 012B cmp r3, #1 + 1204 026e F7D1 bne .L181 + 1205 0270 099B ldr r3, [sp, #36] + 1206 0272 079A ldr r2, [sp, #28] + 1207 0274 1344 add r3, r3, r2 + 1208 0276 0E93 str r3, [sp, #56] + 1209 0278 19E7 b .L190 + 1210 .L232: + 1211 027a 0446 mov r4, r0 + 1212 027c 013E subs r6, r6, #1 + 1213 027e E4E802AB strd r10, [r4], #8 + 1214 0282 7FF4D1AE bne .L204 + 1215 0286 E7E6 b .L175 + 1216 .L237: + 1217 .align 2 + 1218 .L236: + ARM GAS /tmp/ccB9AFDQ.s page 22 + + + 1219 0288 0000F03F .word 1072693248 + 1221 .section .text.arm_mat_mult_f32,"ax",%progbits + 1222 .align 1 + 1223 .p2align 2,,3 + 1224 .global arm_mat_mult_f32 + 1225 .syntax unified + 1226 .thumb + 1227 .thumb_func + 1228 .fpu fpv4-sp-d16 + 1230 arm_mat_mult_f32: + 1231 @ args = 0, pretend = 0, frame = 0 + 1232 @ frame_needed = 0, uses_anonymous_args = 0 + 1233 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 1234 0004 D1F80480 ldr r8, [r1, #4] + 1235 0008 4988 ldrh r1, [r1, #2] + 1236 000a 4488 ldrh r4, [r0, #2] + 1237 000c 4568 ldr r5, [r0, #4] + 1238 000e 0688 ldrh r6, [r0] + 1239 0010 5368 ldr r3, [r2, #4] + 1240 0012 0129 cmp r1, #1 + 1241 0014 4FEA8100 lsl r0, r1, #2 + 1242 0018 4FEA8407 lsl r7, r4, #2 + 1243 001c 20D1 bne .L258 + 1244 001e 03EB0009 add r9, r3, r0 + 1245 .L248: + 1246 0022 A9F1040C sub ip, r9, #4 + 1247 0026 C646 mov lr, r8 + 1248 .L247: + 1249 0028 DFED207A vldr.32 s15, .L259 + 1250 002c 5CB1 cbz r4, .L245 + 1251 002e 2246 mov r2, r4 + 1252 0030 7346 mov r3, lr + 1253 0032 2946 mov r1, r5 + 1254 .L246: + 1255 0034 D3ED006A vldr.32 s13, [r3] + 1256 0038 B1EC017A vldmia.32 r1!, {s14} + 1257 003c 013A subs r2, r2, #1 + 1258 003e E6EE877A vfma.f32 s15, s13, s14 + 1259 0042 0344 add r3, r3, r0 + 1260 0044 F6D1 bne .L246 + 1261 .L245: + 1262 0046 ECEC017A vstmia.32 ip!, {s15} + 1263 004a CC45 cmp ip, r9 + 1264 004c 0EF1040E add lr, lr, #4 + 1265 0050 EAD1 bne .L247 + 1266 0052 013E subs r6, r6, #1 + 1267 0054 3D44 add r5, r5, r7 + 1268 0056 8144 add r9, r9, r0 + 1269 0058 E3D1 bne .L248 + 1270 005a 0020 movs r0, #0 + 1271 005c BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 1272 .L258: + 1273 0060 C1EB8171 rsb r1, r1, r1, lsl #30 + 1274 0064 03EB000C add ip, r3, r0 + 1275 0068 4FEA810A lsl r10, r1, #2 + 1276 .L243: + 1277 006c 0CEB0A0E add lr, ip, r10 + ARM GAS /tmp/ccB9AFDQ.s page 23 + + + 1278 0070 C146 mov r9, r8 + 1279 .L242: + 1280 0072 DFED0E7A vldr.32 s15, .L259 + 1281 0076 5CB1 cbz r4, .L240 + 1282 0078 2246 mov r2, r4 + 1283 007a 4B46 mov r3, r9 + 1284 007c 2946 mov r1, r5 + 1285 .L241: + 1286 007e 93ED007A vldr.32 s14, [r3] + 1287 0082 F1EC016A vldmia.32 r1!, {s13} + 1288 0086 013A subs r2, r2, #1 + 1289 0088 E6EE877A vfma.f32 s15, s13, s14 + 1290 008c 0344 add r3, r3, r0 + 1291 008e F6D1 bne .L241 + 1292 .L240: + 1293 0090 EEEC017A vstmia.32 lr!, {s15} + 1294 0094 E645 cmp lr, ip + 1295 0096 09F10409 add r9, r9, #4 + 1296 009a EAD1 bne .L242 + 1297 009c 013E subs r6, r6, #1 + 1298 009e 3D44 add r5, r5, r7 + 1299 00a0 8444 add ip, ip, r0 + 1300 00a2 E3D1 bne .L243 + 1301 00a4 0020 movs r0, #0 + 1302 00a6 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 1303 .L260: + 1304 00aa 00BF .align 2 + 1305 .L259: + 1306 00ac 00000000 .word 0 + 1308 .section .text.arm_mat_mult_fast_q15,"ax",%progbits + 1309 .align 1 + 1310 .p2align 2,,3 + 1311 .global arm_mat_mult_fast_q15 + 1312 .syntax unified + 1313 .thumb + 1314 .thumb_func + 1315 .fpu fpv4-sp-d16 + 1317 arm_mat_mult_fast_q15: + 1318 @ args = 0, pretend = 0, frame = 120 + 1319 @ frame_needed = 0, uses_anonymous_args = 0 + 1320 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1321 0004 9FB0 sub sp, sp, #124 + 1322 0006 4468 ldr r4, [r0, #4] + 1323 0008 0192 str r2, [sp, #4] + 1324 000a 0A88 ldrh r2, [r1] + 1325 000c 1794 str r4, [sp, #92] + 1326 000e 1093 str r3, [sp, #64] + 1327 0010 4C68 ldr r4, [r1, #4] + 1328 0012 4B88 ldrh r3, [r1, #2] + 1329 0014 0188 ldrh r1, [r0] + 1330 0016 1691 str r1, [sp, #88] + 1331 0018 012A cmp r2, #1 + 1332 001a 4188 ldrh r1, [r0, #2] + 1333 001c 1893 str r3, [sp, #96] + 1334 001e 1A92 str r2, [sp, #104] + 1335 0020 1991 str r1, [sp, #100] + 1336 0022 4FEA9306 lsr r6, r3, #2 + ARM GAS /tmp/ccB9AFDQ.s page 24 + + + 1337 0026 4FEA420B lsl fp, r2, #1 + 1338 002a 03F00307 and r7, r3, #3 + 1339 002e 1D93 str r3, [sp, #116] + 1340 0030 40F09E81 bne .L345 + 1341 0034 109B ldr r3, [sp, #64] + 1342 0036 06FB0BFE mul lr, r6, fp + 1343 003a 4FEA8E0E lsl lr, lr, #2 + 1344 003e 1D46 mov r5, r3 + 1345 0040 0BEB030C add ip, fp, r3 + 1346 0044 4FEAC609 lsl r9, r6, #3 + 1347 0048 4FEA4708 lsl r8, r7, #1 + 1348 .L273: + 1349 004c 2B46 mov r3, r5 + 1350 004e AEB1 cbz r6, .L269 + 1351 0050 2146 mov r1, r4 + 1352 0052 3046 mov r0, r6 + 1353 .L270: + 1354 0054 0A68 ldr r2, [r1] @ unaligned + 1355 0056 1A80 strh r2, [r3] @ movhi + 1356 0058 1214 asrs r2, r2, #16 + 1357 005a 23F80B20 strh r2, [r3, fp] @ movhi + 1358 005e 4A68 ldr r2, [r1, #4] @ unaligned + 1359 0060 23F81B20 strh r2, [r3, fp, lsl #1] @ movhi + 1360 0064 0138 subs r0, r0, #1 + 1361 0066 4FEA2242 asr r2, r2, #16 + 1362 006a 01F10801 add r1, r1, #8 + 1363 006e DA80 strh r2, [r3, #6] @ movhi + 1364 0070 03F10803 add r3, r3, #8 + 1365 0074 EED1 bne .L270 + 1366 0076 4C44 add r4, r4, r9 + 1367 0078 05EB0E03 add r3, r5, lr + 1368 .L269: + 1369 007c 47B1 cbz r7, .L271 + 1370 007e 2146 mov r1, r4 + 1371 0080 3A46 mov r2, r7 + 1372 .L272: + 1373 0082 31F9020B ldrsh r0, [r1], #2 + 1374 0086 1880 strh r0, [r3] @ movhi + 1375 0088 013A subs r2, r2, #1 + 1376 008a 5B44 add r3, r3, fp + 1377 008c F9D1 bne .L272 + 1378 008e 4444 add r4, r4, r8 + 1379 .L271: + 1380 0090 0235 adds r5, r5, #2 + 1381 0092 6545 cmp r5, ip + 1382 0094 DAD1 bne .L273 + 1383 .L268: + 1384 0096 019B ldr r3, [sp, #4] + 1385 0098 169A ldr r2, [sp, #88] + 1386 009a 5968 ldr r1, [r3, #4] + 1387 009c 189B ldr r3, [sp, #96] + 1388 009e 1B91 str r1, [sp, #108] + 1389 00a0 5E00 lsls r6, r3, #1 + 1390 00a2 01EB4307 add r7, r1, r3, lsl #1 + 1391 00a6 5208 lsrs r2, r2, #1 + 1392 00a8 1596 str r6, [sp, #84] + 1393 00aa 0C97 str r7, [sp, #48] + ARM GAS /tmp/ccB9AFDQ.s page 25 + + + 1394 00ac 0F92 str r2, [sp, #60] + 1395 00ae 00F0AC80 beq .L274 + 1396 00b2 199C ldr r4, [sp, #100] + 1397 00b4 6000 lsls r0, r4, #1 + 1398 00b6 03F00102 and r2, r3, #1 + 1399 00ba 0E90 str r0, [sp, #56] + 1400 00bc 6508 lsrs r5, r4, #1 + 1401 00be 04F00100 and r0, r4, #1 + 1402 00c2 5B08 lsrs r3, r3, #1 + 1403 00c4 1C92 str r2, [sp, #112] + 1404 00c6 0895 str r5, [sp, #32] + 1405 00c8 0990 str r0, [sp, #36] + 1406 00ca 4FEA4202 lsl r2, r2, #1 + 1407 00ce 00F09980 beq .L275 + 1408 00d2 0846 mov r0, r1 + 1409 00d4 0431 adds r1, r1, #4 + 1410 00d6 02EB8302 add r2, r2, r3, lsl #2 + 1411 00da 01EB8303 add r3, r1, r3, lsl #2 + 1412 00de 0493 str r3, [sp, #16] + 1413 00e0 131A subs r3, r2, r0 + 1414 00e2 FB18 adds r3, r7, r3 + 1415 00e4 1193 str r3, [sp, #68] + 1416 00e6 A300 lsls r3, r4, #2 + 1417 00e8 1293 str r3, [sp, #72] + 1418 00ea 179B ldr r3, [sp, #92] + 1419 00ec 0693 str r3, [sp, #24] + 1420 00ee 03EB8503 add r3, r3, r5, lsl #2 + 1421 00f2 0593 str r3, [sp, #20] + 1422 00f4 1A9B ldr r3, [sp, #104] + 1423 00f6 0D90 str r0, [sp, #52] + 1424 00f8 9B00 lsls r3, r3, #2 + 1425 00fa 0A93 str r3, [sp, #40] + 1426 00fc 109B ldr r3, [sp, #64] + 1427 00fe CDF804B0 str fp, [sp, #4] + 1428 0102 B218 adds r2, r6, r2 + 1429 0104 03EB8503 add r3, r3, r5, lsl #2 + 1430 0108 1392 str r2, [sp, #76] + 1431 010a 1493 str r3, [sp, #80] + 1432 .L280: + 1433 010c 0E9B ldr r3, [sp, #56] + 1434 010e 069A ldr r2, [sp, #24] + 1435 0110 109E ldr r6, [sp, #64] + 1436 0112 9A18 adds r2, r3, r2 + 1437 0114 0792 str r2, [sp, #28] + 1438 0116 0D9A ldr r2, [sp, #52] + 1439 0118 02F1040B add fp, r2, #4 + 1440 011c 0C9A ldr r2, [sp, #48] + 1441 011e 0432 adds r2, r2, #4 + 1442 0120 0292 str r2, [sp, #8] + 1443 0122 149A ldr r2, [sp, #80] + 1444 0124 0092 str r2, [sp] + 1445 0126 059A ldr r2, [sp, #20] + 1446 0128 1344 add r3, r3, r2 + 1447 012a 0B93 str r3, [sp, #44] + 1448 .L279: + 1449 012c 019B ldr r3, [sp, #4] + 1450 012e 3344 add r3, r3, r6 + ARM GAS /tmp/ccB9AFDQ.s page 26 + + + 1451 0130 0393 str r3, [sp, #12] + 1452 0132 9846 mov r8, r3 + 1453 0134 089B ldr r3, [sp, #32] + 1454 0136 002B cmp r3, #0 + 1455 0138 00F0BB80 beq .L294 + 1456 013c DDE9069A ldrd r9, r10, [sp, #24] + 1457 0140 0025 movs r5, #0 + 1458 0142 2F46 mov r7, r5 + 1459 0144 AC46 mov ip, r5 + 1460 0146 AE46 mov lr, r5 + 1461 .L277: + 1462 0148 59F8044B ldr r4, [r9], #4 @ unaligned + 1463 014c 56F8040B ldr r0, [r6], #4 @ unaligned + 1464 0150 5AF8042B ldr r2, [r10], #4 @ unaligned + 1465 0154 58F8041B ldr r1, [r8], #4 @ unaligned + 1466 .syntax unified + 1467 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1468 0158 24FB00EE smlad lr, r4, r0, lr + 1469 @ 0 "" 2 + 1470 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1471 015c 24FB01CC smlad ip, r4, r1, ip + 1472 @ 0 "" 2 + 1473 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1474 0160 22FB0077 smlad r7, r2, r0, r7 + 1475 @ 0 "" 2 + 1476 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1477 0164 22FB0155 smlad r5, r2, r1, r5 + 1478 @ 0 "" 2 + 1479 .thumb + 1480 .syntax unified + 1481 0168 013B subs r3, r3, #1 + 1482 016a EDD1 bne .L277 + 1483 016c DDE90063 ldrd r6, r3, [sp] + 1484 0170 0B9A ldr r2, [sp, #44] + 1485 0172 03EB0608 add r8, r3, r6 + 1486 0176 059B ldr r3, [sp, #20] + 1487 .L276: + 1488 0178 0999 ldr r1, [sp, #36] + 1489 017a 79B1 cbz r1, .L278 + 1490 017c B3F90030 ldrsh r3, [r3] + 1491 0180 B6F90010 ldrsh r1, [r6] + 1492 0184 B2F90020 ldrsh r2, [r2] + 1493 0188 B8F90000 ldrsh r0, [r8] + 1494 018c 03FB01EE mla lr, r3, r1, lr + 1495 0190 03FB00CC mla ip, r3, r0, ip + 1496 0194 01FB0277 mla r7, r1, r2, r7 + 1497 0198 02FB0055 mla r5, r2, r0, r5 + 1498 .L278: + 1499 019c 029B ldr r3, [sp, #8] + 1500 019e 039E ldr r6, [sp, #12] + 1501 01a0 0A9A ldr r2, [sp, #40] + 1502 01a2 4FEAEE3E asr lr, lr, #15 + 1503 01a6 4FEAEC3C asr ip, ip, #15 + 1504 01aa FF13 asrs r7, r7, #15 + 1505 01ac ED13 asrs r5, r5, #15 + 1506 01ae 2BF804EC strh lr, [fp, #-4] @ movhi + 1507 01b2 2BF802CC strh ip, [fp, #-2] @ movhi + ARM GAS /tmp/ccB9AFDQ.s page 27 + + + 1508 01b6 0433 adds r3, r3, #4 + 1509 01b8 23F8087C strh r7, [r3, #-8] @ movhi + 1510 01bc 23F8065C strh r5, [r3, #-6] @ movhi + 1511 01c0 0293 str r3, [sp, #8] + 1512 01c2 019B ldr r3, [sp, #4] + 1513 01c4 1E44 add r6, r6, r3 + 1514 01c6 009B ldr r3, [sp] + 1515 01c8 1344 add r3, r3, r2 + 1516 01ca 0093 str r3, [sp] + 1517 01cc 049B ldr r3, [sp, #16] + 1518 01ce 0BF1040B add fp, fp, #4 + 1519 01d2 5B45 cmp r3, fp + 1520 01d4 AAD1 bne .L279 + 1521 01d6 0D9B ldr r3, [sp, #52] + 1522 01d8 119A ldr r2, [sp, #68] + 1523 01da 1344 add r3, r3, r2 + 1524 01dc 0D93 str r3, [sp, #52] + 1525 01de 139A ldr r2, [sp, #76] + 1526 01e0 0C9B ldr r3, [sp, #48] + 1527 01e2 1344 add r3, r3, r2 + 1528 01e4 0C93 str r3, [sp, #48] + 1529 01e6 049B ldr r3, [sp, #16] + 1530 01e8 1344 add r3, r3, r2 + 1531 01ea 0493 str r3, [sp, #16] + 1532 01ec 0E9A ldr r2, [sp, #56] + 1533 01ee 079B ldr r3, [sp, #28] + 1534 01f0 1344 add r3, r3, r2 + 1535 01f2 0693 str r3, [sp, #24] + 1536 01f4 129A ldr r2, [sp, #72] + 1537 01f6 059B ldr r3, [sp, #20] + 1538 01f8 1344 add r3, r3, r2 + 1539 01fa 0593 str r3, [sp, #20] + 1540 01fc 0F9B ldr r3, [sp, #60] + 1541 01fe 013B subs r3, r3, #1 + 1542 0200 0F93 str r3, [sp, #60] + 1543 0202 83D1 bne .L280 + 1544 .L275: + 1545 0204 1C9B ldr r3, [sp, #112] + 1546 0206 002B cmp r3, #0 + 1547 0208 5AD1 bne .L346 + 1548 .L274: + 1549 020a 169B ldr r3, [sp, #88] + 1550 020c DA07 lsls r2, r3, #31 + 1551 020e 4CD5 bpl .L317 + 1552 0210 189A ldr r2, [sp, #96] + 1553 0212 1B99 ldr r1, [sp, #108] + 1554 0214 013B subs r3, r3, #1 + 1555 0216 03FB02FE mul lr, r3, r2 + 1556 021a 01EB4E0E add lr, r1, lr, lsl #1 + 1557 021e 002A cmp r2, #0 + 1558 0220 43D0 beq .L317 + 1559 0222 199A ldr r2, [sp, #100] + 1560 0224 1799 ldr r1, [sp, #92] + 1561 0226 02FB03F3 mul r3, r2, r3 + 1562 022a 01EB4309 add r9, r1, r3, lsl #1 + 1563 022e 4FEA920C lsr ip, r2, #2 + 1564 0232 02F00308 and r8, r2, #3 + ARM GAS /tmp/ccB9AFDQ.s page 28 + + + 1565 0236 4FEACC0B lsl fp, ip, #3 + 1566 023a 09EBCC0A add r10, r9, ip, lsl #3 + 1567 023e 4FEA4803 lsl r3, r8, #1 + 1568 0242 CDE9003B strd r3, fp, [sp] + 1569 0246 CDF808A0 str r10, [sp, #8] + 1570 024a DDF840B0 ldr fp, [sp, #64] + 1571 024e DDF874A0 ldr r10, [sp, #116] + 1572 .L292: + 1573 0252 BCF1000F cmp ip, #0 + 1574 0256 00F08880 beq .L296 + 1575 025a 5846 mov r0, fp + 1576 025c 4946 mov r1, r9 + 1577 025e 6446 mov r4, ip + 1578 0260 0023 movs r3, #0 + 1579 .L289: + 1580 0262 0E68 ldr r6, [r1] @ unaligned + 1581 0264 4A68 ldr r2, [r1, #4] @ unaligned + 1582 0266 0768 ldr r7, [r0] @ unaligned + 1583 0268 4568 ldr r5, [r0, #4] @ unaligned + 1584 026a 0831 adds r1, r1, #8 + 1585 026c 0830 adds r0, r0, #8 + 1586 .syntax unified + 1587 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1588 026e 26FB0733 smlad r3, r6, r7, r3 + 1589 @ 0 "" 2 + 1590 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1591 0272 22FB0533 smlad r3, r2, r5, r3 + 1592 @ 0 "" 2 + 1593 .thumb + 1594 .syntax unified + 1595 0276 013C subs r4, r4, #1 + 1596 0278 F3D1 bne .L289 + 1597 027a 019A ldr r2, [sp, #4] + 1598 027c 0299 ldr r1, [sp, #8] + 1599 027e 9344 add fp, fp, r2 + 1600 .L288: + 1601 0280 B8F1000F cmp r8, #0 + 1602 0284 0BD0 beq .L290 + 1603 0286 5846 mov r0, fp + 1604 0288 4246 mov r2, r8 + 1605 .L291: + 1606 028a 31F8025B ldrh r5, [r1], #2 + 1607 028e 30F8024B ldrh r4, [r0], #2 + 1608 0292 013A subs r2, r2, #1 + 1609 0294 15FB0433 smlabb r3, r5, r4, r3 + 1610 0298 F7D1 bne .L291 + 1611 029a 009A ldr r2, [sp] + 1612 029c 9344 add fp, fp, r2 + 1613 .L290: + 1614 029e DB13 asrs r3, r3, #15 + 1615 02a0 BAF1010A subs r10, r10, #1 + 1616 02a4 2EF8023B strh r3, [lr], #2 @ movhi + 1617 02a8 D3D1 bne .L292 + 1618 .L317: + 1619 02aa 0020 movs r0, #0 + 1620 02ac 1FB0 add sp, sp, #124 + 1621 @ sp needed + ARM GAS /tmp/ccB9AFDQ.s page 29 + + + 1622 02ae BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1623 .L294: + 1624 02b2 9E46 mov lr, r3 + 1625 02b4 7546 mov r5, lr + 1626 02b6 DDE90632 ldrd r3, r2, [sp, #24] + 1627 02ba 7746 mov r7, lr + 1628 02bc F446 mov ip, lr + 1629 02be 5BE7 b .L276 + 1630 .L346: + 1631 02c0 189B ldr r3, [sp, #96] + 1632 02c2 159A ldr r2, [sp, #84] + 1633 02c4 DDF85CC0 ldr ip, [sp, #92] + 1634 02c8 03F1FF3B add fp, r3, #-1 + 1635 02cc 1A9B ldr r3, [sp, #104] + 1636 02ce 03FB0BFB mul fp, r3, fp + 1637 02d2 109B ldr r3, [sp, #64] + 1638 02d4 03EB4B0B add fp, r3, fp, lsl #1 + 1639 02d8 199B ldr r3, [sp, #100] + 1640 02da 4FEA9309 lsr r9, r3, #2 + 1641 02de 03F0030A and r10, r3, #3 + 1642 02e2 169B ldr r3, [sp, #88] + 1643 02e4 23F00108 bic r8, r3, #1 + 1644 02e8 4FEAC903 lsl r3, r9, #3 + 1645 02ec A2F1020E sub lr, r2, #2 + 1646 02f0 0093 str r3, [sp] + 1647 02f2 1B9A ldr r2, [sp, #108] + 1648 02f4 0BEBC903 add r3, fp, r9, lsl #3 + 1649 02f8 0293 str r3, [sp, #8] + 1650 02fa 4FEA4A03 lsl r3, r10, #1 + 1651 02fe 9644 add lr, lr, r2 + 1652 0300 0193 str r3, [sp, #4] + 1653 0302 B9F1000F cmp r9, #0 + 1654 0306 2DD0 beq .L295 + 1655 .L347: + 1656 0308 5846 mov r0, fp + 1657 030a 6146 mov r1, ip + 1658 030c 4C46 mov r4, r9 + 1659 030e 0023 movs r3, #0 + 1660 .L284: + 1661 0310 0E68 ldr r6, [r1] @ unaligned + 1662 0312 4A68 ldr r2, [r1, #4] @ unaligned + 1663 0314 0768 ldr r7, [r0] @ unaligned + 1664 0316 4568 ldr r5, [r0, #4] @ unaligned + 1665 0318 0831 adds r1, r1, #8 + 1666 031a 0830 adds r0, r0, #8 + 1667 .syntax unified + 1668 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1669 031c 26FB0733 smlad r3, r6, r7, r3 + 1670 @ 0 "" 2 + 1671 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1672 0320 22FB0533 smlad r3, r2, r5, r3 + 1673 @ 0 "" 2 + 1674 .thumb + 1675 .syntax unified + 1676 0324 013C subs r4, r4, #1 + 1677 0326 F3D1 bne .L284 + 1678 0328 009A ldr r2, [sp] + ARM GAS /tmp/ccB9AFDQ.s page 30 + + + 1679 032a 0299 ldr r1, [sp, #8] + 1680 032c 9444 add ip, ip, r2 + 1681 .L283: + 1682 032e BAF1000F cmp r10, #0 + 1683 0332 0BD0 beq .L285 + 1684 0334 6046 mov r0, ip + 1685 0336 5246 mov r2, r10 + 1686 .L286: + 1687 0338 30F8025B ldrh r5, [r0], #2 + 1688 033c 31F8024B ldrh r4, [r1], #2 + 1689 0340 013A subs r2, r2, #1 + 1690 0342 15FB0433 smlabb r3, r5, r4, r3 + 1691 0346 F7D1 bne .L286 + 1692 0348 019A ldr r2, [sp, #4] + 1693 034a 9444 add ip, ip, r2 + 1694 .L285: + 1695 034c DB13 asrs r3, r3, #15 + 1696 034e AEF80030 strh r3, [lr] @ movhi + 1697 0352 159B ldr r3, [sp, #84] + 1698 0354 B8F10108 subs r8, r8, #1 + 1699 0358 9E44 add lr, lr, r3 + 1700 035a 3FF456AF beq .L274 + 1701 035e B9F1000F cmp r9, #0 + 1702 0362 D1D1 bne .L347 + 1703 .L295: + 1704 0364 5946 mov r1, fp + 1705 0366 4B46 mov r3, r9 + 1706 0368 E1E7 b .L283 + 1707 .L296: + 1708 036a 4946 mov r1, r9 + 1709 036c 6346 mov r3, ip + 1710 036e 87E7 b .L288 + 1711 .L345: + 1712 0370 1346 mov r3, r2 + 1713 0372 0BEB0205 add r5, fp, r2 + 1714 0376 109A ldr r2, [sp, #64] + 1715 0378 06FB0BF9 mul r9, r6, fp + 1716 037c 4FEAC30C lsl ip, r3, #3 + 1717 0380 7B00 lsls r3, r7, #1 + 1718 0382 6D00 lsls r5, r5, #1 + 1719 0384 4FEA8909 lsl r9, r9, #2 + 1720 0388 9646 mov lr, r2 + 1721 038a 0BEB0208 add r8, fp, r2 + 1722 038e 4FEAC60A lsl r10, r6, #3 + 1723 0392 0093 str r3, [sp] + 1724 .L267: + 1725 0394 7346 mov r3, lr + 1726 0396 A6B1 cbz r6, .L263 + 1727 0398 2146 mov r1, r4 + 1728 039a 3046 mov r0, r6 + 1729 .L264: + 1730 039c 0A68 ldr r2, [r1] @ unaligned + 1731 039e 1A80 strh r2, [r3] @ movhi + 1732 03a0 1214 asrs r2, r2, #16 + 1733 03a2 23F80B20 strh r2, [r3, fp] @ movhi + 1734 03a6 4A68 ldr r2, [r1, #4] @ unaligned + 1735 03a8 23F81B20 strh r2, [r3, fp, lsl #1] @ movhi + ARM GAS /tmp/ccB9AFDQ.s page 31 + + + 1736 03ac 0138 subs r0, r0, #1 + 1737 03ae 4FEA2242 asr r2, r2, #16 + 1738 03b2 5A53 strh r2, [r3, r5] @ movhi + 1739 03b4 01F10801 add r1, r1, #8 + 1740 03b8 6344 add r3, r3, ip + 1741 03ba EFD1 bne .L264 + 1742 03bc 5444 add r4, r4, r10 + 1743 03be 0EEB0903 add r3, lr, r9 + 1744 .L263: + 1745 03c2 4FB1 cbz r7, .L265 + 1746 03c4 2146 mov r1, r4 + 1747 03c6 3A46 mov r2, r7 + 1748 .L266: + 1749 03c8 31F9020B ldrsh r0, [r1], #2 + 1750 03cc 1880 strh r0, [r3] @ movhi + 1751 03ce 013A subs r2, r2, #1 + 1752 03d0 5B44 add r3, r3, fp + 1753 03d2 F9D1 bne .L266 + 1754 03d4 009B ldr r3, [sp] + 1755 03d6 1C44 add r4, r4, r3 + 1756 .L265: + 1757 03d8 0EF1020E add lr, lr, #2 + 1758 03dc C645 cmp lr, r8 + 1759 03de D9D1 bne .L267 + 1760 03e0 59E6 b .L268 + 1762 03e2 00BF .section .text.arm_mat_mult_fast_q31,"ax",%progbits + 1763 .align 1 + 1764 .p2align 2,,3 + 1765 .global arm_mat_mult_fast_q31 + 1766 .syntax unified + 1767 .thumb + 1768 .thumb_func + 1769 .fpu fpv4-sp-d16 + 1771 arm_mat_mult_fast_q31: + 1772 @ args = 0, pretend = 0, frame = 80 + 1773 @ frame_needed = 0, uses_anonymous_args = 0 + 1774 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1775 0004 95B0 sub sp, sp, #84 + 1776 0006 4B68 ldr r3, [r1, #4] + 1777 0008 5268 ldr r2, [r2, #4] + 1778 000a 0688 ldrh r6, [r0] + 1779 000c 0993 str r3, [sp, #36] + 1780 000e 4B88 ldrh r3, [r1, #2] + 1781 0010 4568 ldr r5, [r0, #4] + 1782 0012 1192 str r2, [sp, #68] + 1783 0014 02EB8304 add r4, r2, r3, lsl #2 + 1784 0018 4088 ldrh r0, [r0, #2] + 1785 001a 0E95 str r5, [sp, #56] + 1786 001c 1146 mov r1, r2 + 1787 001e 7208 lsrs r2, r6, #1 + 1788 0020 1093 str r3, [sp, #64] + 1789 0022 0F96 str r6, [sp, #60] + 1790 0024 0490 str r0, [sp, #16] + 1791 0026 1293 str r3, [sp, #72] + 1792 0028 4FEA830B lsl fp, r3, #2 + 1793 002c 0794 str r4, [sp, #28] + 1794 002e 0892 str r2, [sp, #32] + ARM GAS /tmp/ccB9AFDQ.s page 32 + + + 1795 0030 6BD0 beq .L349 + 1796 0032 03F00102 and r2, r3, #1 + 1797 0036 8600 lsls r6, r0, #2 + 1798 0038 5B08 lsrs r3, r3, #1 + 1799 003a 1392 str r2, [sp, #76] + 1800 003c 0A96 str r6, [sp, #40] + 1801 003e 4FEA8202 lsl r2, r2, #2 + 1802 0042 60D0 beq .L350 + 1803 0044 02EBC302 add r2, r2, r3, lsl #3 + 1804 0048 04EBC303 add r3, r4, r3, lsl #3 + 1805 004c 0833 adds r3, r3, #8 + 1806 004e 0293 str r3, [sp, #8] + 1807 0050 531A subs r3, r2, r1 + 1808 0052 2344 add r3, r3, r4 + 1809 0054 5A44 add r2, fp, r2 + 1810 0056 0D93 str r3, [sp, #52] + 1811 0058 C300 lsls r3, r0, #3 + 1812 005a 0B92 str r2, [sp, #44] + 1813 005c 0C93 str r3, [sp, #48] + 1814 005e 0395 str r5, [sp, #12] + 1815 0060 0691 str r1, [sp, #24] + 1816 .L354: + 1817 0062 0A9B ldr r3, [sp, #40] + 1818 0064 039A ldr r2, [sp, #12] + 1819 0066 1344 add r3, r3, r2 + 1820 0068 0593 str r3, [sp, #20] + 1821 006a 069B ldr r3, [sp, #24] + 1822 006c 0833 adds r3, r3, #8 + 1823 006e 0193 str r3, [sp, #4] + 1824 0070 079B ldr r3, [sp, #28] + 1825 0072 03F1080A add r10, r3, #8 + 1826 0076 099B ldr r3, [sp, #36] + 1827 0078 0093 str r3, [sp] + 1828 .L353: + 1829 007a 049A ldr r2, [sp, #16] + 1830 007c 009B ldr r3, [sp] + 1831 007e 002A cmp r2, #0 + 1832 0080 68D0 beq .L374 + 1833 0082 0026 movs r6, #0 + 1834 0084 DDF81490 ldr r9, [sp, #20] + 1835 0088 DDF80C80 ldr r8, [sp, #12] + 1836 008c 3746 mov r7, r6 + 1837 008e B446 mov ip, r6 + 1838 0090 B646 mov lr, r6 + 1839 .L352: + 1840 0092 D3E90040 ldrd r4, r0, [r3] + 1841 0096 58F8045B ldr r5, [r8], #4 + 1842 009a 59F8041B ldr r1, [r9], #4 + 1843 009e 5B44 add r3, r3, fp + 1844 .syntax unified + 1845 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1846 00a0 55FB04EE smmla lr, r5, r4, lr + 1847 @ 0 "" 2 + 1848 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1849 00a4 55FB00CC smmla ip, r5, r0, ip + 1850 @ 0 "" 2 + 1851 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccB9AFDQ.s page 33 + + + 1852 00a8 51FB0477 smmla r7, r1, r4, r7 + 1853 @ 0 "" 2 + 1854 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1855 00ac 51FB0066 smmla r6, r1, r0, r6 + 1856 @ 0 "" 2 + 1857 .thumb + 1858 .syntax unified + 1859 00b0 013A subs r2, r2, #1 + 1860 00b2 EED1 bne .L352 + 1861 00b4 4FEA4E03 lsl r3, lr, #1 + 1862 00b8 4FEA4C02 lsl r2, ip, #1 + 1863 00bc 7F00 lsls r7, r7, #1 + 1864 00be 7600 lsls r6, r6, #1 + 1865 .L351: + 1866 00c0 0199 ldr r1, [sp, #4] + 1867 00c2 41E90232 strd r3, r2, [r1, #-8] + 1868 00c6 01F10803 add r3, r1, #8 + 1869 00ca 0193 str r3, [sp, #4] + 1870 00cc 009B ldr r3, [sp] + 1871 00ce 0833 adds r3, r3, #8 + 1872 00d0 0093 str r3, [sp] + 1873 00d2 029B ldr r3, [sp, #8] + 1874 00d4 4AE90276 strd r7, r6, [r10, #-8] + 1875 00d8 0AF1080A add r10, r10, #8 + 1876 00dc 9A45 cmp r10, r3 + 1877 00de CCD1 bne .L353 + 1878 00e0 069B ldr r3, [sp, #24] + 1879 00e2 0D9A ldr r2, [sp, #52] + 1880 00e4 1344 add r3, r3, r2 + 1881 00e6 0693 str r3, [sp, #24] + 1882 00e8 0B9A ldr r2, [sp, #44] + 1883 00ea 079B ldr r3, [sp, #28] + 1884 00ec 1344 add r3, r3, r2 + 1885 00ee 0793 str r3, [sp, #28] + 1886 00f0 029B ldr r3, [sp, #8] + 1887 00f2 1344 add r3, r3, r2 + 1888 00f4 0293 str r3, [sp, #8] + 1889 00f6 0C9A ldr r2, [sp, #48] + 1890 00f8 039B ldr r3, [sp, #12] + 1891 00fa 1344 add r3, r3, r2 + 1892 00fc 0393 str r3, [sp, #12] + 1893 00fe 089B ldr r3, [sp, #32] + 1894 0100 013B subs r3, r3, #1 + 1895 0102 0893 str r3, [sp, #32] + 1896 0104 ADD1 bne .L354 + 1897 .L350: + 1898 0106 139B ldr r3, [sp, #76] + 1899 0108 43BB cbnz r3, .L402 + 1900 .L349: + 1901 010a 0F9B ldr r3, [sp, #60] + 1902 010c DA07 lsls r2, r3, #31 + 1903 010e 1DD5 bpl .L385 + 1904 0110 1098 ldr r0, [sp, #64] + 1905 0112 119A ldr r2, [sp, #68] + 1906 0114 013B subs r3, r3, #1 + 1907 0116 03FB00F5 mul r5, r3, r0 + 1908 011a 02EB8505 add r5, r2, r5, lsl #2 + ARM GAS /tmp/ccB9AFDQ.s page 34 + + + 1909 011e A8B1 cbz r0, .L385 + 1910 0120 049A ldr r2, [sp, #16] + 1911 0122 0E99 ldr r1, [sp, #56] + 1912 0124 02FB03F3 mul r3, r2, r3 + 1913 0128 0128 cmp r0, #1 + 1914 012a 01EB8301 add r1, r1, r3, lsl #2 + 1915 012e 40D1 bne .L403 + 1916 0130 002A cmp r2, #0 + 1917 0132 78D0 beq .L378 + 1918 0134 0998 ldr r0, [sp, #36] + 1919 0136 0023 movs r3, #0 + 1920 .L370: + 1921 0138 51F8044B ldr r4, [r1], #4 + 1922 013c 0668 ldr r6, [r0] + 1923 .syntax unified + 1924 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1925 013e 54FB0633 smmla r3, r4, r6, r3 + 1926 @ 0 "" 2 + 1927 .thumb + 1928 .syntax unified + 1929 0142 013A subs r2, r2, #1 + 1930 0144 5844 add r0, r0, fp + 1931 0146 F7D1 bne .L370 + 1932 0148 5B00 lsls r3, r3, #1 + 1933 .L369: + 1934 014a 2B60 str r3, [r5] + 1935 .L385: + 1936 014c 0020 movs r0, #0 + 1937 014e 15B0 add sp, sp, #84 + 1938 @ sp needed + 1939 0150 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1940 .L374: + 1941 0154 1346 mov r3, r2 + 1942 0156 1646 mov r6, r2 + 1943 0158 1746 mov r7, r2 + 1944 015a B1E7 b .L351 + 1945 .L402: + 1946 015c 0F9B ldr r3, [sp, #60] + 1947 015e 23F00107 bic r7, r3, #1 + 1948 0162 119B ldr r3, [sp, #68] + 1949 0164 ABF1040C sub ip, fp, #4 + 1950 0168 03EB0C06 add r6, r3, ip + 1951 016c 099B ldr r3, [sp, #36] + 1952 016e 9C44 add ip, ip, r3 + 1953 0170 109B ldr r3, [sp, #64] + 1954 0172 012B cmp r3, #1 + 1955 0174 3BD1 bne .L404 + 1956 0176 049D ldr r5, [sp, #16] + 1957 0178 DDF838E0 ldr lr, [sp, #56] + 1958 017c DDF82890 ldr r9, [sp, #40] + 1959 0180 ADB1 cbz r5, .L376 + 1960 .L405: + 1961 0182 2A46 mov r2, r5 + 1962 0184 6346 mov r3, ip + 1963 0186 7046 mov r0, lr + 1964 0188 0021 movs r1, #0 + 1965 018a A846 mov r8, r5 + ARM GAS /tmp/ccB9AFDQ.s page 35 + + + 1966 .L361: + 1967 018c 50F8044B ldr r4, [r0], #4 + 1968 0190 1D68 ldr r5, [r3] + 1969 .syntax unified + 1970 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1971 0192 54FB0511 smmla r1, r4, r5, r1 + 1972 @ 0 "" 2 + 1973 .thumb + 1974 .syntax unified + 1975 0196 013A subs r2, r2, #1 + 1976 0198 5B44 add r3, r3, fp + 1977 019a F7D1 bne .L361 + 1978 019c 4546 mov r5, r8 + 1979 019e CE44 add lr, lr, r9 + 1980 01a0 4900 lsls r1, r1, #1 + 1981 .L360: + 1982 01a2 013F subs r7, r7, #1 + 1983 01a4 3160 str r1, [r6] + 1984 01a6 5E44 add r6, r6, fp + 1985 01a8 AFD0 beq .L349 + 1986 01aa 002D cmp r5, #0 + 1987 01ac E9D1 bne .L405 + 1988 .L376: + 1989 01ae 2946 mov r1, r5 + 1990 01b0 F7E7 b .L360 + 1991 .L403: + 1992 01b2 DDF824C0 ldr ip, [sp, #36] + 1993 01b6 DDF84880 ldr r8, [sp, #72] + 1994 01ba 8E46 mov lr, r1 + 1995 01bc 1746 mov r7, r2 + 1996 .L367: + 1997 01be 6246 mov r2, ip + 1998 01c0 9FB1 cbz r7, .L377 + 1999 01c2 3B46 mov r3, r7 + 2000 01c4 7446 mov r4, lr + 2001 01c6 0020 movs r0, #0 + 2002 .L366: + 2003 01c8 54F8046B ldr r6, [r4], #4 + 2004 01cc 1168 ldr r1, [r2] + 2005 .syntax unified + 2006 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2007 01ce 56FB0100 smmla r0, r6, r1, r0 + 2008 @ 0 "" 2 + 2009 .thumb + 2010 .syntax unified + 2011 01d2 013B subs r3, r3, #1 + 2012 01d4 5A44 add r2, r2, fp + 2013 01d6 F7D1 bne .L366 + 2014 01d8 4000 lsls r0, r0, #1 + 2015 .L365: + 2016 01da B8F10108 subs r8, r8, #1 + 2017 01de 45F8040B str r0, [r5], #4 + 2018 01e2 0CF1040C add ip, ip, #4 + 2019 01e6 EAD1 bne .L367 + 2020 01e8 B0E7 b .L385 + 2021 .L377: + 2022 01ea 3846 mov r0, r7 + ARM GAS /tmp/ccB9AFDQ.s page 36 + + + 2023 01ec F5E7 b .L365 + 2024 .L404: + 2025 01ee DDF838E0 ldr lr, [sp, #56] + 2026 01f2 049D ldr r5, [sp, #16] + 2027 .L359: + 2028 01f4 ADB1 cbz r5, .L375 + 2029 01f6 2A46 mov r2, r5 + 2030 01f8 6346 mov r3, ip + 2031 01fa 7046 mov r0, lr + 2032 01fc 0021 movs r1, #0 + 2033 01fe A846 mov r8, r5 + 2034 .L358: + 2035 0200 50F8044B ldr r4, [r0], #4 + 2036 0204 1D68 ldr r5, [r3] + 2037 .syntax unified + 2038 @ 2158 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2039 0206 54FB0511 smmla r1, r4, r5, r1 + 2040 @ 0 "" 2 + 2041 .thumb + 2042 .syntax unified + 2043 020a 013A subs r2, r2, #1 + 2044 020c 5B44 add r3, r3, fp + 2045 020e F7D1 bne .L358 + 2046 0210 0A9B ldr r3, [sp, #40] + 2047 0212 4546 mov r5, r8 + 2048 0214 9E44 add lr, lr, r3 + 2049 0216 4900 lsls r1, r1, #1 + 2050 .L357: + 2051 0218 013F subs r7, r7, #1 + 2052 021a 3160 str r1, [r6] + 2053 021c 5E44 add r6, r6, fp + 2054 021e E9D1 bne .L359 + 2055 0220 73E7 b .L349 + 2056 .L375: + 2057 0222 2946 mov r1, r5 + 2058 0224 F8E7 b .L357 + 2059 .L378: + 2060 0226 1346 mov r3, r2 + 2061 0228 8FE7 b .L369 + 2063 022a 00BF .section .text.arm_mat_mult_q15,"ax",%progbits + 2064 .align 1 + 2065 .p2align 2,,3 + 2066 .global arm_mat_mult_q15 + 2067 .syntax unified + 2068 .thumb + 2069 .thumb_func + 2070 .fpu fpv4-sp-d16 + 2072 arm_mat_mult_q15: + 2073 @ args = 0, pretend = 0, frame = 48 + 2074 @ frame_needed = 0, uses_anonymous_args = 0 + 2075 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2076 0004 8DB0 sub sp, sp, #52 + 2077 0006 0E88 ldrh r6, [r1] + 2078 0008 0492 str r2, [sp, #16] + 2079 000a 0893 str r3, [sp, #32] + 2080 000c 0288 ldrh r2, [r0] + 2081 000e 4B88 ldrh r3, [r1, #2] + ARM GAS /tmp/ccB9AFDQ.s page 37 + + + 2082 0010 0292 str r2, [sp, #8] + 2083 0012 012E cmp r6, #1 + 2084 0014 4288 ldrh r2, [r0, #2] + 2085 0016 4D68 ldr r5, [r1, #4] + 2086 0018 0993 str r3, [sp, #36] + 2087 001a 8346 mov fp, r0 + 2088 001c 0392 str r2, [sp, #12] + 2089 001e 4FEA9307 lsr r7, r3, #2 + 2090 0022 4FEA4600 lsl r0, r6, #1 + 2091 0026 03F0030C and ip, r3, #3 + 2092 002a 40F0A880 bne .L452 + 2093 002e 089B ldr r3, [sp, #32] + 2094 0030 07FB00FE mul lr, r7, r0 + 2095 0034 4FEA8E0E lsl lr, lr, #2 + 2096 0038 1E46 mov r6, r3 + 2097 003a 00EB0308 add r8, r0, r3 + 2098 003e 4FEAC70A lsl r10, r7, #3 + 2099 0042 4FEA4C09 lsl r9, ip, #1 + 2100 .L418: + 2101 0046 3346 mov r3, r6 + 2102 0048 A7B1 cbz r7, .L414 + 2103 004a 2946 mov r1, r5 + 2104 004c 3C46 mov r4, r7 + 2105 .L415: + 2106 004e 0A68 ldr r2, [r1] @ unaligned + 2107 0050 1A80 strh r2, [r3] @ movhi + 2108 0052 1214 asrs r2, r2, #16 + 2109 0054 1A52 strh r2, [r3, r0] @ movhi + 2110 0056 4A68 ldr r2, [r1, #4] @ unaligned + 2111 0058 23F81020 strh r2, [r3, r0, lsl #1] @ movhi + 2112 005c 013C subs r4, r4, #1 + 2113 005e 4FEA2242 asr r2, r2, #16 + 2114 0062 01F10801 add r1, r1, #8 + 2115 0066 DA80 strh r2, [r3, #6] @ movhi + 2116 0068 03F10803 add r3, r3, #8 + 2117 006c EFD1 bne .L415 + 2118 006e 5544 add r5, r5, r10 + 2119 0070 0EEB0603 add r3, lr, r6 + 2120 .L414: + 2121 0074 BCF1000F cmp ip, #0 + 2122 0078 08D0 beq .L416 + 2123 007a 2946 mov r1, r5 + 2124 007c 6246 mov r2, ip + 2125 .L417: + 2126 007e 31F9024B ldrsh r4, [r1], #2 + 2127 0082 1C80 strh r4, [r3] @ movhi + 2128 0084 013A subs r2, r2, #1 + 2129 0086 0344 add r3, r3, r0 + 2130 0088 F9D1 bne .L417 + 2131 008a 4D44 add r5, r5, r9 + 2132 .L416: + 2133 008c 0236 adds r6, r6, #2 + 2134 008e 4645 cmp r6, r8 + 2135 0090 D9D1 bne .L418 + 2136 .L413: + 2137 0092 049B ldr r3, [sp, #16] + 2138 0094 5B68 ldr r3, [r3, #4] + ARM GAS /tmp/ccB9AFDQ.s page 38 + + + 2139 0096 0693 str r3, [sp, #24] + 2140 0098 DBF80430 ldr r3, [fp, #4] + 2141 009c 0493 str r3, [sp, #16] + 2142 009e 029B ldr r3, [sp, #8] + 2143 00a0 0793 str r3, [sp, #28] + 2144 00a2 039B ldr r3, [sp, #12] + 2145 00a4 9A08 lsrs r2, r3, #2 + 2146 00a6 03F00301 and r1, r3, #3 + 2147 00aa 5B00 lsls r3, r3, #1 + 2148 00ac 0B93 str r3, [sp, #44] + 2149 00ae 4B00 lsls r3, r1, #1 + 2150 00b0 0593 str r3, [sp, #20] + 2151 00b2 099B ldr r3, [sp, #36] + 2152 00b4 0292 str r2, [sp, #8] + 2153 00b6 5B00 lsls r3, r3, #1 + 2154 00b8 0A93 str r3, [sp, #40] + 2155 00ba 0023 movs r3, #0 + 2156 00bc 0391 str r1, [sp, #12] + 2157 00be 4FEAC20B lsl fp, r2, #3 + 2158 00c2 0193 str r3, [sp, #4] + 2159 .L424: + 2160 00c4 DDE90889 ldrd r8, r9, [sp, #32] + 2161 00c8 DDF818A0 ldr r10, [sp, #24] + 2162 .L423: + 2163 00cc 049B ldr r3, [sp, #16] + 2164 00ce 019A ldr r2, [sp, #4] + 2165 00d0 029C ldr r4, [sp, #8] + 2166 00d2 03EB020E add lr, r3, r2 + 2167 00d6 002C cmp r4, #0 + 2168 00d8 4ED0 beq .L425 + 2169 00da 0025 movs r5, #0 + 2170 00dc 0026 movs r6, #0 + 2171 00de 4046 mov r0, r8 + 2172 00e0 CDF800B0 str fp, [sp] + 2173 00e4 7146 mov r1, lr + 2174 00e6 C346 mov fp, r8 + 2175 00e8 2A46 mov r2, r5 + 2176 00ea 3346 mov r3, r6 + 2177 00ec F046 mov r8, lr + 2178 .L420: + 2179 00ee D1F800E0 ldr lr, [r1] @ unaligned + 2180 00f2 0568 ldr r5, [r0] @ unaligned + 2181 00f4 4F68 ldr r7, [r1, #4] @ unaligned + 2182 00f6 D0F804C0 ldr ip, [r0, #4] @ unaligned + 2183 00fa 0831 adds r1, r1, #8 + 2184 00fc 0830 adds r0, r0, #8 + 2185 00fe 1646 mov r6, r2 + 2186 .syntax unified + 2187 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2188 0100 CEFBC563 smlald r6, r3, lr, r5 + 2189 @ 0 "" 2 + 2190 .thumb + 2191 .syntax unified + 2192 0104 1D46 mov r5, r3 + 2193 .syntax unified + 2194 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2195 0106 C7FBCC65 smlald r6, r5, r7, ip + ARM GAS /tmp/ccB9AFDQ.s page 39 + + + 2196 @ 0 "" 2 + 2197 .thumb + 2198 .syntax unified + 2199 010a 013C subs r4, r4, #1 + 2200 010c 3246 mov r2, r6 + 2201 010e 2B46 mov r3, r5 + 2202 0110 EDD1 bne .L420 + 2203 0112 C646 mov lr, r8 + 2204 0114 D846 mov r8, fp + 2205 0116 DDF800B0 ldr fp, [sp] + 2206 011a 3546 mov r5, r6 + 2207 011c D844 add r8, r8, fp + 2208 011e 1E46 mov r6, r3 + 2209 0120 DE44 add lr, lr, fp + 2210 .L419: + 2211 0122 0399 ldr r1, [sp, #12] + 2212 0124 71B1 cbz r1, .L421 + 2213 0126 4046 mov r0, r8 + 2214 0128 2A46 mov r2, r5 + 2215 012a 3346 mov r3, r6 + 2216 .L422: + 2217 012c 3EF8025B ldrh r5, [lr], #2 + 2218 0130 30F8024B ldrh r4, [r0], #2 + 2219 0134 0139 subs r1, r1, #1 + 2220 0136 C5FB8423 smlalbb r2, r3, r5, r4 + 2221 013a F7D1 bne .L422 + 2222 013c 1E46 mov r6, r3 + 2223 013e 059B ldr r3, [sp, #20] + 2224 0140 1546 mov r5, r2 + 2225 0142 9844 add r8, r8, r3 + 2226 .L421: + 2227 0144 EA0B lsrs r2, r5, #15 + 2228 0146 B9F10109 subs r9, r9, #1 + 2229 014a 42EA4642 orr r2, r2, r6, lsl #17 + 2230 .syntax unified + 2231 @ 774 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c" 1 + 2232 014e 02F30F02 ssat r2, #16, r2 + 2233 @ 0 "" 2 + 2234 .thumb + 2235 .syntax unified + 2236 0152 2AF8022B strh r2, [r10], #2 @ movhi + 2237 0156 B9D1 bne .L423 + 2238 0158 069B ldr r3, [sp, #24] + 2239 015a 0A9A ldr r2, [sp, #40] + 2240 015c 1344 add r3, r3, r2 + 2241 015e 0693 str r3, [sp, #24] + 2242 0160 0B9A ldr r2, [sp, #44] + 2243 0162 019B ldr r3, [sp, #4] + 2244 0164 1344 add r3, r3, r2 + 2245 0166 0193 str r3, [sp, #4] + 2246 0168 079B ldr r3, [sp, #28] + 2247 016a 013B subs r3, r3, #1 + 2248 016c 0793 str r3, [sp, #28] + 2249 016e A9D1 bne .L424 + 2250 0170 1846 mov r0, r3 + 2251 0172 0DB0 add sp, sp, #52 + 2252 @ sp needed + ARM GAS /tmp/ccB9AFDQ.s page 40 + + + 2253 0174 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2254 .L425: + 2255 0178 0025 movs r5, #0 + 2256 017a 0026 movs r6, #0 + 2257 017c D1E7 b .L419 + 2258 .L452: + 2259 017e 089B ldr r3, [sp, #32] + 2260 0180 9846 mov r8, r3 + 2261 0182 00EB030A add r10, r0, r3 + 2262 0186 FB00 lsls r3, r7, #3 + 2263 0188 00EB060E add lr, r0, r6 + 2264 018c 07FB00F9 mul r9, r7, r0 + 2265 0190 0093 str r3, [sp] + 2266 0192 4FEA4C03 lsl r3, ip, #1 + 2267 0196 4FEA4E0E lsl lr, lr, #1 + 2268 019a F600 lsls r6, r6, #3 + 2269 019c 4FEA8909 lsl r9, r9, #2 + 2270 01a0 0193 str r3, [sp, #4] + 2271 .L412: + 2272 01a2 4346 mov r3, r8 + 2273 01a4 AFB1 cbz r7, .L408 + 2274 01a6 2946 mov r1, r5 + 2275 01a8 3C46 mov r4, r7 + 2276 .L409: + 2277 01aa 0A68 ldr r2, [r1] @ unaligned + 2278 01ac 1A80 strh r2, [r3] @ movhi + 2279 01ae 1214 asrs r2, r2, #16 + 2280 01b0 1A52 strh r2, [r3, r0] @ movhi + 2281 01b2 4A68 ldr r2, [r1, #4] @ unaligned + 2282 01b4 23F81020 strh r2, [r3, r0, lsl #1] @ movhi + 2283 01b8 013C subs r4, r4, #1 + 2284 01ba 4FEA2242 asr r2, r2, #16 + 2285 01be 23F80E20 strh r2, [r3, lr] @ movhi + 2286 01c2 01F10801 add r1, r1, #8 + 2287 01c6 3344 add r3, r3, r6 + 2288 01c8 EFD1 bne .L409 + 2289 01ca 009B ldr r3, [sp] + 2290 01cc 1D44 add r5, r5, r3 + 2291 01ce 09EB0803 add r3, r9, r8 + 2292 .L408: + 2293 01d2 BCF1000F cmp ip, #0 + 2294 01d6 09D0 beq .L410 + 2295 01d8 2946 mov r1, r5 + 2296 01da 6246 mov r2, ip + 2297 .L411: + 2298 01dc 31F9024B ldrsh r4, [r1], #2 + 2299 01e0 1C80 strh r4, [r3] @ movhi + 2300 01e2 013A subs r2, r2, #1 + 2301 01e4 0344 add r3, r3, r0 + 2302 01e6 F9D1 bne .L411 + 2303 01e8 019B ldr r3, [sp, #4] + 2304 01ea 1D44 add r5, r5, r3 + 2305 .L410: + 2306 01ec 08F10208 add r8, r8, #2 + 2307 01f0 D045 cmp r8, r10 + 2308 01f2 D6D1 bne .L412 + 2309 01f4 4DE7 b .L413 + ARM GAS /tmp/ccB9AFDQ.s page 41 + + + 2311 01f6 00BF .section .text.arm_mat_mult_q31,"ax",%progbits + 2312 .align 1 + 2313 .p2align 2,,3 + 2314 .global arm_mat_mult_q31 + 2315 .syntax unified + 2316 .thumb + 2317 .thumb_func + 2318 .fpu fpv4-sp-d16 + 2320 arm_mat_mult_q31: + 2321 @ args = 0, pretend = 0, frame = 16 + 2322 @ frame_needed = 0, uses_anonymous_args = 0 + 2323 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2324 0004 4B68 ldr r3, [r1, #4] + 2325 0006 4688 ldrh r6, [r0, #2] + 2326 0008 4988 ldrh r1, [r1, #2] + 2327 000a 4768 ldr r7, [r0, #4] + 2328 000c B0F80080 ldrh r8, [r0] + 2329 0010 85B0 sub sp, sp, #20 + 2330 0012 0129 cmp r1, #1 + 2331 0014 0293 str r3, [sp, #8] + 2332 0016 5368 ldr r3, [r2, #4] + 2333 0018 4FEA8602 lsl r2, r6, #2 + 2334 001c 4FEA8105 lsl r5, r1, #2 + 2335 0020 0192 str r2, [sp, #4] + 2336 0022 28D1 bne .L473 + 2337 0024 03EB050B add fp, r3, r5 + 2338 .L463: + 2339 0028 DDF808A0 ldr r10, [sp, #8] + 2340 002c ABF10409 sub r9, fp, #4 + 2341 .L462: + 2342 0030 FEB1 cbz r6, .L465 + 2343 0032 0023 movs r3, #0 + 2344 0034 3146 mov r1, r6 + 2345 0036 5246 mov r2, r10 + 2346 0038 BE46 mov lr, r7 + 2347 003a 9C46 mov ip, r3 + 2348 .L461: + 2349 003c 1468 ldr r4, [r2] + 2350 003e 5EF8040B ldr r0, [lr], #4 + 2351 0042 0139 subs r1, r1, #1 + 2352 0044 2A44 add r2, r2, r5 + 2353 0046 C4FB003C smlal r3, ip, r4, r0 + 2354 004a F7D1 bne .L461 + 2355 004c DB0F lsrs r3, r3, #31 + 2356 004e 43EA4C03 orr r3, r3, ip, lsl #1 + 2357 .L460: + 2358 0052 49F8043B str r3, [r9], #4 + 2359 0056 D945 cmp r9, fp + 2360 0058 0AF1040A add r10, r10, #4 + 2361 005c E8D1 bne .L462 + 2362 005e 019B ldr r3, [sp, #4] + 2363 0060 B8F10108 subs r8, r8, #1 + 2364 0064 1F44 add r7, r7, r3 + 2365 0066 AB44 add fp, fp, r5 + 2366 0068 DED1 bne .L463 + 2367 006a 0020 movs r0, #0 + 2368 006c 05B0 add sp, sp, #20 + ARM GAS /tmp/ccB9AFDQ.s page 42 + + + 2369 @ sp needed + 2370 006e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2371 .L465: + 2372 0072 3346 mov r3, r6 + 2373 0074 EDE7 b .L460 + 2374 .L473: + 2375 0076 C1EB8171 rsb r1, r1, r1, lsl #30 + 2376 007a 03EB0509 add r9, r3, r5 + 2377 007e 8B00 lsls r3, r1, #2 + 2378 0080 0393 str r3, [sp, #12] + 2379 .L458: + 2380 0082 039B ldr r3, [sp, #12] + 2381 0084 DDF808B0 ldr fp, [sp, #8] + 2382 0088 09EB030A add r10, r9, r3 + 2383 .L457: + 2384 008c FEB1 cbz r6, .L464 + 2385 008e 0023 movs r3, #0 + 2386 0090 3146 mov r1, r6 + 2387 0092 5A46 mov r2, fp + 2388 0094 BE46 mov lr, r7 + 2389 0096 9C46 mov ip, r3 + 2390 .L456: + 2391 0098 1068 ldr r0, [r2] + 2392 009a 5EF8044B ldr r4, [lr], #4 + 2393 009e 0139 subs r1, r1, #1 + 2394 00a0 2A44 add r2, r2, r5 + 2395 00a2 C4FB003C smlal r3, ip, r4, r0 + 2396 00a6 F7D1 bne .L456 + 2397 00a8 DB0F lsrs r3, r3, #31 + 2398 00aa 43EA4C03 orr r3, r3, ip, lsl #1 + 2399 .L455: + 2400 00ae 4AF8043B str r3, [r10], #4 + 2401 00b2 CA45 cmp r10, r9 + 2402 00b4 0BF1040B add fp, fp, #4 + 2403 00b8 E8D1 bne .L457 + 2404 00ba 019B ldr r3, [sp, #4] + 2405 00bc B8F10108 subs r8, r8, #1 + 2406 00c0 1F44 add r7, r7, r3 + 2407 00c2 A944 add r9, r9, r5 + 2408 00c4 DDD1 bne .L458 + 2409 00c6 0020 movs r0, #0 + 2410 00c8 05B0 add sp, sp, #20 + 2411 @ sp needed + 2412 00ca BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2413 .L464: + 2414 00ce 3346 mov r3, r6 + 2415 00d0 EDE7 b .L455 + 2417 00d2 00BF .section .text.arm_mat_scale_f32,"ax",%progbits + 2418 .align 1 + 2419 .p2align 2,,3 + 2420 .global arm_mat_scale_f32 + 2421 .syntax unified + 2422 .thumb + 2423 .thumb_func + 2424 .fpu fpv4-sp-d16 + 2426 arm_mat_scale_f32: + 2427 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccB9AFDQ.s page 43 + + + 2428 @ frame_needed = 0, uses_anonymous_args = 0 + 2429 @ link register save eliminated. + 2430 0000 4288 ldrh r2, [r0, #2] + 2431 0002 0388 ldrh r3, [r0] + 2432 0004 4068 ldr r0, [r0, #4] + 2433 0006 02FB03F3 mul r3, r2, r3 + 2434 000a 4A68 ldr r2, [r1, #4] + 2435 000c 3BB1 cbz r3, .L475 + 2436 .L476: + 2437 000e F0EC017A vldmia.32 r0!, {s15} + 2438 0012 67EE807A vmul.f32 s15, s15, s0 + 2439 0016 013B subs r3, r3, #1 + 2440 0018 E2EC017A vstmia.32 r2!, {s15} + 2441 001c F7D1 bne .L476 + 2442 .L475: + 2443 001e 0020 movs r0, #0 + 2444 0020 7047 bx lr + 2446 0022 00BF .section .text.arm_mat_scale_q15,"ax",%progbits + 2447 .align 1 + 2448 .p2align 2,,3 + 2449 .global arm_mat_scale_q15 + 2450 .syntax unified + 2451 .thumb + 2452 .thumb_func + 2453 .fpu fpv4-sp-d16 + 2455 arm_mat_scale_q15: + 2456 @ args = 0, pretend = 0, frame = 0 + 2457 @ frame_needed = 0, uses_anonymous_args = 0 + 2458 @ link register save eliminated. + 2459 0000 30B4 push {r4, r5} + 2460 0002 4568 ldr r5, [r0, #4] + 2461 0004 5C68 ldr r4, [r3, #4] + 2462 0006 0388 ldrh r3, [r0] + 2463 0008 4088 ldrh r0, [r0, #2] + 2464 000a 03FB00F0 mul r0, r3, r0 + 2465 000e 68B1 cbz r0, .L486 + 2466 0010 C2F10F02 rsb r2, r2, #15 + 2467 .L482: + 2468 0014 35F8023B ldrh r3, [r5], #2 + 2469 0018 0138 subs r0, r0, #1 + 2470 001a 13FB01F3 smulbb r3, r3, r1 + 2471 001e 43FA02F3 asr r3, r3, r2 + 2472 .syntax unified + 2473 @ 232 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c" 1 + 2474 0022 03F30F03 ssat r3, #16, r3 + 2475 @ 0 "" 2 + 2476 .thumb + 2477 .syntax unified + 2478 0026 24F8023B strh r3, [r4], #2 @ movhi + 2479 002a F3D1 bne .L482 + 2480 .L486: + 2481 002c 0020 movs r0, #0 + 2482 002e 30BC pop {r4, r5} + 2483 0030 7047 bx lr + 2485 0032 00BF .section .text.arm_mat_scale_q31,"ax",%progbits + 2486 .align 1 + 2487 .p2align 2,,3 + ARM GAS /tmp/ccB9AFDQ.s page 44 + + + 2488 .global arm_mat_scale_q31 + 2489 .syntax unified + 2490 .thumb + 2491 .thumb_func + 2492 .fpu fpv4-sp-d16 + 2494 arm_mat_scale_q31: + 2495 @ args = 0, pretend = 0, frame = 0 + 2496 @ frame_needed = 0, uses_anonymous_args = 0 + 2497 0000 F0B5 push {r4, r5, r6, r7, lr} + 2498 0002 5E68 ldr r6, [r3, #4] + 2499 0004 0488 ldrh r4, [r0] + 2500 0006 4388 ldrh r3, [r0, #2] + 2501 0008 4568 ldr r5, [r0, #4] + 2502 000a 03FB04F4 mul r4, r3, r4 + 2503 000e 94B1 cbz r4, .L495 + 2504 0010 0132 adds r2, r2, #1 + 2505 0012 6FF0004E mvn lr, #-2147483648 + 2506 .L489: + 2507 0016 55F8043B ldr r3, [r5], #4 + 2508 001a 81FB0303 smull r0, r3, r1, r3 + 2509 001e 03FA02F0 lsl r0, r3, r2 + 2510 0022 40FA02FC asr ip, r0, r2 + 2511 0026 9C45 cmp ip, r3 + 2512 0028 8EEAE377 eor r7, lr, r3, asr #31 + 2513 002c 05D0 beq .L490 + 2514 002e 013C subs r4, r4, #1 + 2515 0030 46F8047B str r7, [r6], #4 + 2516 0034 EFD1 bne .L489 + 2517 .L495: + 2518 0036 0020 movs r0, #0 + 2519 0038 F0BD pop {r4, r5, r6, r7, pc} + 2520 .L490: + 2521 003a 013C subs r4, r4, #1 + 2522 003c 46F8040B str r0, [r6], #4 + 2523 0040 E9D1 bne .L489 + 2524 0042 0020 movs r0, #0 + 2525 0044 F0BD pop {r4, r5, r6, r7, pc} + 2527 0046 00BF .section .text.arm_mat_sub_f32,"ax",%progbits + 2528 .align 1 + 2529 .p2align 2,,3 + 2530 .global arm_mat_sub_f32 + 2531 .syntax unified + 2532 .thumb + 2533 .thumb_func + 2534 .fpu fpv4-sp-d16 + 2536 arm_mat_sub_f32: + 2537 @ args = 0, pretend = 0, frame = 0 + 2538 @ frame_needed = 0, uses_anonymous_args = 0 + 2539 @ link register save eliminated. + 2540 0000 0388 ldrh r3, [r0] + 2541 0002 B0F802C0 ldrh ip, [r0, #2] + 2542 0006 4968 ldr r1, [r1, #4] + 2543 0008 4068 ldr r0, [r0, #4] + 2544 000a 5268 ldr r2, [r2, #4] + 2545 000c 0CFB03F3 mul r3, ip, r3 + 2546 0010 4BB1 cbz r3, .L500 + 2547 .L501: + ARM GAS /tmp/ccB9AFDQ.s page 45 + + + 2548 0012 F0EC017A vldmia.32 r0!, {s15} + 2549 0016 B1EC017A vldmia.32 r1!, {s14} + 2550 001a 77EEC77A vsub.f32 s15, s15, s14 + 2551 001e 013B subs r3, r3, #1 + 2552 0020 E2EC017A vstmia.32 r2!, {s15} + 2553 0024 F5D1 bne .L501 + 2554 .L500: + 2555 0026 0020 movs r0, #0 + 2556 0028 7047 bx lr + 2558 002a 00BF .section .text.arm_mat_sub_q15,"ax",%progbits + 2559 .align 1 + 2560 .p2align 2,,3 + 2561 .global arm_mat_sub_q15 + 2562 .syntax unified + 2563 .thumb + 2564 .thumb_func + 2565 .fpu fpv4-sp-d16 + 2567 arm_mat_sub_q15: + 2568 @ args = 0, pretend = 0, frame = 0 + 2569 @ frame_needed = 0, uses_anonymous_args = 0 + 2570 @ link register save eliminated. + 2571 0000 4388 ldrh r3, [r0, #2] + 2572 0002 4968 ldr r1, [r1, #4] + 2573 0004 5268 ldr r2, [r2, #4] + 2574 0006 10B4 push {r4} + 2575 0008 0488 ldrh r4, [r0] + 2576 000a 4068 ldr r0, [r0, #4] + 2577 000c 03FB04F4 mul r4, r3, r4 + 2578 0010 4CB1 cbz r4, .L507 + 2579 .L508: + 2580 0012 30F9023B ldrsh r3, [r0], #2 + 2581 0016 31F902CB ldrsh ip, [r1], #2 + 2582 .syntax unified + 2583 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2584 001a D3FA1CF3 qsub16 r3, r3, ip + 2585 @ 0 "" 2 + 2586 .thumb + 2587 .syntax unified + 2588 001e 013C subs r4, r4, #1 + 2589 0020 22F8023B strh r3, [r2], #2 @ movhi + 2590 0024 F5D1 bne .L508 + 2591 .L507: + 2592 0026 0020 movs r0, #0 + 2593 0028 5DF8044B ldr r4, [sp], #4 + 2594 002c 7047 bx lr + 2596 002e 00BF .section .text.arm_mat_sub_q31,"ax",%progbits + 2597 .align 1 + 2598 .p2align 2,,3 + 2599 .global arm_mat_sub_q31 + 2600 .syntax unified + 2601 .thumb + 2602 .thumb_func + 2603 .fpu fpv4-sp-d16 + 2605 arm_mat_sub_q31: + 2606 @ args = 0, pretend = 0, frame = 0 + 2607 @ frame_needed = 0, uses_anonymous_args = 0 + 2608 @ link register save eliminated. + ARM GAS /tmp/ccB9AFDQ.s page 46 + + + 2609 0000 4388 ldrh r3, [r0, #2] + 2610 0002 4968 ldr r1, [r1, #4] + 2611 0004 5268 ldr r2, [r2, #4] + 2612 0006 30B4 push {r4, r5} + 2613 0008 0488 ldrh r4, [r0] + 2614 000a 4068 ldr r0, [r0, #4] + 2615 000c 03FB04F4 mul r4, r3, r4 + 2616 0010 4CB1 cbz r4, .L515 + 2617 .L516: + 2618 0012 50F8043B ldr r3, [r0], #4 + 2619 0016 51F8045B ldr r5, [r1], #4 + 2620 .syntax unified + 2621 @ 2125 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2622 001a 85FAA3F3 qsub r3, r3, r5 + 2623 @ 0 "" 2 + 2624 .thumb + 2625 .syntax unified + 2626 001e 013C subs r4, r4, #1 + 2627 0020 42F8043B str r3, [r2], #4 + 2628 0024 F5D1 bne .L516 + 2629 .L515: + 2630 0026 0020 movs r0, #0 + 2631 0028 30BC pop {r4, r5} + 2632 002a 7047 bx lr + 2634 .section .text.arm_mat_trans_f32,"ax",%progbits + 2635 .align 1 + 2636 .p2align 2,,3 + 2637 .global arm_mat_trans_f32 + 2638 .syntax unified + 2639 .thumb + 2640 .thumb_func + 2641 .fpu fpv4-sp-d16 + 2643 arm_mat_trans_f32: + 2644 @ args = 0, pretend = 0, frame = 0 + 2645 @ frame_needed = 0, uses_anonymous_args = 0 + 2646 0000 F0B5 push {r4, r5, r6, r7, lr} + 2647 0002 4588 ldrh r5, [r0, #2] + 2648 0004 0288 ldrh r2, [r0] + 2649 0006 4468 ldr r4, [r0, #4] + 2650 0008 4B68 ldr r3, [r1, #4] + 2651 000a B5B1 cbz r5, .L523 + 2652 000c 4FEA820C lsl ip, r2, #2 + 2653 0010 012A cmp r2, #1 + 2654 0012 9E46 mov lr, r3 + 2655 0014 03EB0C07 add r7, r3, ip + 2656 0018 4FEA8506 lsl r6, r5, #2 + 2657 001c 14D1 bne .L526 + 2658 .L529: + 2659 001e 7246 mov r2, lr + 2660 0020 2B46 mov r3, r5 + 2661 0022 2146 mov r1, r4 + 2662 .L528: + 2663 0024 51F8040B ldr r0, [r1], #4 @ float + 2664 0028 1060 str r0, [r2] @ float + 2665 002a 013B subs r3, r3, #1 + 2666 002c 6244 add r2, r2, ip + 2667 002e F9D1 bne .L528 + ARM GAS /tmp/ccB9AFDQ.s page 47 + + + 2668 0030 0EF1040E add lr, lr, #4 + 2669 0034 BE45 cmp lr, r7 + 2670 0036 3444 add r4, r4, r6 + 2671 0038 F1D1 bne .L529 + 2672 .L523: + 2673 003a 0020 movs r0, #0 + 2674 003c F0BD pop {r4, r5, r6, r7, pc} + 2675 .L538: + 2676 003e 0EF1040E add lr, lr, #4 + 2677 0042 BE45 cmp lr, r7 + 2678 0044 3444 add r4, r4, r6 + 2679 0046 F8D0 beq .L523 + 2680 .L526: + 2681 0048 7246 mov r2, lr + 2682 004a 2B46 mov r3, r5 + 2683 004c 2146 mov r1, r4 + 2684 .L525: + 2685 004e 51F8040B ldr r0, [r1], #4 @ float + 2686 0052 1060 str r0, [r2] @ float + 2687 0054 013B subs r3, r3, #1 + 2688 0056 6244 add r2, r2, ip + 2689 0058 F9D1 bne .L525 + 2690 005a F0E7 b .L538 + 2692 .section .text.arm_mat_trans_q15,"ax",%progbits + 2693 .align 1 + 2694 .p2align 2,,3 + 2695 .global arm_mat_trans_q15 + 2696 .syntax unified + 2697 .thumb + 2698 .thumb_func + 2699 .fpu fpv4-sp-d16 + 2701 arm_mat_trans_q15: + 2702 @ args = 0, pretend = 0, frame = 0 + 2703 @ frame_needed = 0, uses_anonymous_args = 0 + 2704 0000 F0B5 push {r4, r5, r6, r7, lr} + 2705 0002 4588 ldrh r5, [r0, #2] + 2706 0004 0288 ldrh r2, [r0] + 2707 0006 4468 ldr r4, [r0, #4] + 2708 0008 4B68 ldr r3, [r1, #4] + 2709 000a B5B1 cbz r5, .L540 + 2710 000c 4FEA420C lsl ip, r2, #1 + 2711 0010 012A cmp r2, #1 + 2712 0012 9E46 mov lr, r3 + 2713 0014 03EB0C07 add r7, r3, ip + 2714 0018 4FEA4506 lsl r6, r5, #1 + 2715 001c 14D1 bne .L543 + 2716 .L546: + 2717 001e 7246 mov r2, lr + 2718 0020 2B46 mov r3, r5 + 2719 0022 2146 mov r1, r4 + 2720 .L545: + 2721 0024 31F9020B ldrsh r0, [r1], #2 + 2722 0028 1080 strh r0, [r2] @ movhi + 2723 002a 013B subs r3, r3, #1 + 2724 002c 6244 add r2, r2, ip + 2725 002e F9D1 bne .L545 + 2726 0030 0EF1020E add lr, lr, #2 + ARM GAS /tmp/ccB9AFDQ.s page 48 + + + 2727 0034 BE45 cmp lr, r7 + 2728 0036 3444 add r4, r4, r6 + 2729 0038 F1D1 bne .L546 + 2730 .L540: + 2731 003a 0020 movs r0, #0 + 2732 003c F0BD pop {r4, r5, r6, r7, pc} + 2733 .L555: + 2734 003e 0EF1020E add lr, lr, #2 + 2735 0042 BE45 cmp lr, r7 + 2736 0044 3444 add r4, r4, r6 + 2737 0046 F8D0 beq .L540 + 2738 .L543: + 2739 0048 7246 mov r2, lr + 2740 004a 2B46 mov r3, r5 + 2741 004c 2146 mov r1, r4 + 2742 .L542: + 2743 004e 31F9020B ldrsh r0, [r1], #2 + 2744 0052 1080 strh r0, [r2] @ movhi + 2745 0054 013B subs r3, r3, #1 + 2746 0056 6244 add r2, r2, ip + 2747 0058 F9D1 bne .L542 + 2748 005a F0E7 b .L555 + 2750 .section .text.arm_mat_trans_q31,"ax",%progbits + 2751 .align 1 + 2752 .p2align 2,,3 + 2753 .global arm_mat_trans_q31 + 2754 .syntax unified + 2755 .thumb + 2756 .thumb_func + 2757 .fpu fpv4-sp-d16 + 2759 arm_mat_trans_q31: + 2760 @ args = 0, pretend = 0, frame = 0 + 2761 @ frame_needed = 0, uses_anonymous_args = 0 + 2762 0000 F0B5 push {r4, r5, r6, r7, lr} + 2763 0002 4588 ldrh r5, [r0, #2] + 2764 0004 0288 ldrh r2, [r0] + 2765 0006 4468 ldr r4, [r0, #4] + 2766 0008 4B68 ldr r3, [r1, #4] + 2767 000a B5B1 cbz r5, .L557 + 2768 000c 4FEA820C lsl ip, r2, #2 + 2769 0010 012A cmp r2, #1 + 2770 0012 9E46 mov lr, r3 + 2771 0014 03EB0C07 add r7, r3, ip + 2772 0018 4FEA8506 lsl r6, r5, #2 + 2773 001c 14D1 bne .L560 + 2774 .L563: + 2775 001e 7246 mov r2, lr + 2776 0020 2B46 mov r3, r5 + 2777 0022 2146 mov r1, r4 + 2778 .L562: + 2779 0024 51F8040B ldr r0, [r1], #4 + 2780 0028 1060 str r0, [r2] + 2781 002a 013B subs r3, r3, #1 + 2782 002c 6244 add r2, r2, ip + 2783 002e F9D1 bne .L562 + 2784 0030 0EF1040E add lr, lr, #4 + 2785 0034 BE45 cmp lr, r7 + ARM GAS /tmp/ccB9AFDQ.s page 49 + + + 2786 0036 3444 add r4, r4, r6 + 2787 0038 F1D1 bne .L563 + 2788 .L557: + 2789 003a 0020 movs r0, #0 + 2790 003c F0BD pop {r4, r5, r6, r7, pc} + 2791 .L572: + 2792 003e 0EF1040E add lr, lr, #4 + 2793 0042 BE45 cmp lr, r7 + 2794 0044 3444 add r4, r4, r6 + 2795 0046 F8D0 beq .L557 + 2796 .L560: + 2797 0048 7246 mov r2, lr + 2798 004a 2B46 mov r3, r5 + 2799 004c 2146 mov r1, r4 + 2800 .L559: + 2801 004e 51F8040B ldr r0, [r1], #4 + 2802 0052 1060 str r0, [r2] + 2803 0054 013B subs r3, r3, #1 + 2804 0056 6244 add r2, r2, ip + 2805 0058 F9D1 bne .L559 + 2806 005a F0E7 b .L572 + 2808 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccB9AFDQ.s page 50 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 MatrixFunctions.c + /tmp/ccB9AFDQ.s:16 .text.arm_mat_add_f32:0000000000000000 $t + /tmp/ccB9AFDQ.s:25 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0000000..5eecc3e --- /dev/null +++ b/codice/build/StatisticsFunctions.d @@ -0,0 +1,71 @@ +build/StatisticsFunctions.o: \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c: diff --git a/codice/build/StatisticsFunctions.lst b/codice/build/StatisticsFunctions.lst new file mode 100644 index 0000000..b898d92 --- /dev/null +++ b/codice/build/StatisticsFunctions.lst @@ -0,0 +1,1482 @@ +ARM GAS /tmp/ccYuIppz.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "StatisticsFunctions.c" + 14 .text + 15 .section .text.arm_entropy_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global arm_entropy_f32 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 arm_entropy_f32: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 A9B1 cbz r1, .L4 + 29 0002 38B5 push {r3, r4, r5, lr} + 30 0004 2DED028B vpush.64 {d8} + 31 0008 DFED0A8A vldr.32 s17, .L11 + 32 000c 0546 mov r5, r0 + 33 000e 0C46 mov r4, r1 + 34 .L3: + 35 0010 B5EC018A vldmia.32 r5!, {s16} + 36 0014 B0EE480A vmov.f32 s0, s16 + 37 0018 FFF7FEFF bl logf + 38 001c 013C subs r4, r4, #1 + 39 001e E0EE088A vfma.f32 s17, s0, s16 + 40 0022 F5D1 bne .L3 + 41 0024 B1EE680A vneg.f32 s0, s17 + 42 0028 BDEC028B vldm sp!, {d8} + 43 002c 38BD pop {r3, r4, r5, pc} + 44 .L4: + 45 002e 9FED020A vldr.32 s0, .L11+4 + 46 0032 7047 bx lr + 47 .L12: + 48 .align 2 + 49 .L11: + 50 0034 00000000 .word 0 + 51 0038 00000080 .word -2147483648 + 53 .global __aeabi_dmul + 54 .global __aeabi_dadd + 55 .section .text.arm_entropy_f64,"ax",%progbits + 56 .align 1 + 57 .p2align 2,,3 + 58 .global arm_entropy_f64 + 59 .syntax unified + ARM GAS /tmp/ccYuIppz.s page 2 + + + 60 .thumb + 61 .thumb_func + 62 .fpu fpv4-sp-d16 + 64 arm_entropy_f64: + 65 @ args = 0, pretend = 0, frame = 8 + 66 @ frame_needed = 0, uses_anonymous_args = 0 + 67 0000 21B3 cbz r1, .L16 + 68 0002 F0B5 push {r4, r5, r6, r7, lr} + 69 0004 0746 mov r7, r0 + 70 0006 83B0 sub sp, sp, #12 + 71 0008 0E46 mov r6, r1 + 72 000a 0024 movs r4, #0 + 73 000c 0025 movs r5, #0 + 74 .L15: + 75 000e F7E80223 ldrd r2, [r7], #8 + 76 0012 43EC102B vmov d0, r2, r3 + 77 0016 CDE90023 strd r2, [sp] + 78 001a FFF7FEFF bl log + 79 001e DDE90023 ldrd r2, [sp] + 80 0022 51EC100B vmov r0, r1, d0 + 81 0026 FFF7FEFF bl __aeabi_dmul + 82 002a 0246 mov r2, r0 + 83 002c 0B46 mov r3, r1 + 84 002e 2046 mov r0, r4 + 85 0030 2946 mov r1, r5 + 86 0032 FFF7FEFF bl __aeabi_dadd + 87 0036 013E subs r6, r6, #1 + 88 0038 0446 mov r4, r0 + 89 003a 0D46 mov r5, r1 + 90 003c E7D1 bne .L15 + 91 003e 0246 mov r2, r0 + 92 0040 01F10043 add r3, r1, #-2147483648 + 93 0044 43EC102B vmov d0, r2, r3 + 94 0048 03B0 add sp, sp, #12 + 95 @ sp needed + 96 004a F0BD pop {r4, r5, r6, r7, pc} + 97 .L16: + 98 004c 0022 movs r2, #0 + 99 004e 4FF00043 mov r3, #-2147483648 + 100 0052 43EC102B vmov d0, r2, r3 + 101 0056 7047 bx lr + 103 .section .text.arm_kullback_leibler_f32,"ax",%progbits + 104 .align 1 + 105 .p2align 2,,3 + 106 .global arm_kullback_leibler_f32 + 107 .syntax unified + 108 .thumb + 109 .thumb_func + 110 .fpu fpv4-sp-d16 + 112 arm_kullback_leibler_f32: + 113 @ args = 0, pretend = 0, frame = 0 + 114 @ frame_needed = 0, uses_anonymous_args = 0 + 115 0000 C2B1 cbz r2, .L25 + 116 0002 70B5 push {r4, r5, r6, lr} + 117 0004 2DED028B vpush.64 {d8} + 118 0008 DFED0C8A vldr.32 s17, .L31 + 119 000c 0546 mov r5, r0 + ARM GAS /tmp/ccYuIppz.s page 3 + + + 120 000e 0E46 mov r6, r1 + 121 0010 1446 mov r4, r2 + 122 .L24: + 123 0012 B5EC018A vldmia.32 r5!, {s16} + 124 0016 B6EC010A vldmia.32 r6!, {s0} + 125 001a 80EE080A vdiv.f32 s0, s0, s16 + 126 001e FFF7FEFF bl logf + 127 0022 013C subs r4, r4, #1 + 128 0024 E0EE088A vfma.f32 s17, s0, s16 + 129 0028 F3D1 bne .L24 + 130 002a B1EE680A vneg.f32 s0, s17 + 131 002e BDEC028B vldm sp!, {d8} + 132 0032 70BD pop {r4, r5, r6, pc} + 133 .L25: + 134 0034 9FED020A vldr.32 s0, .L31+4 + 135 0038 7047 bx lr + 136 .L32: + 137 003a 00BF .align 2 + 138 .L31: + 139 003c 00000000 .word 0 + 140 0040 00000080 .word -2147483648 + 142 .global __aeabi_ddiv + 143 .section .text.arm_kullback_leibler_f64,"ax",%progbits + 144 .align 1 + 145 .p2align 2,,3 + 146 .global arm_kullback_leibler_f64 + 147 .syntax unified + 148 .thumb + 149 .thumb_func + 150 .fpu fpv4-sp-d16 + 152 arm_kullback_leibler_f64: + 153 @ args = 0, pretend = 0, frame = 0 + 154 @ frame_needed = 0, uses_anonymous_args = 0 + 155 0000 4AB3 cbz r2, .L36 + 156 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 157 0006 0746 mov r7, r0 + 158 0008 8A46 mov r10, r1 + 159 000a 1646 mov r6, r2 + 160 000c 0024 movs r4, #0 + 161 000e 0025 movs r5, #0 + 162 .L35: + 163 0010 F7E80289 ldrd r8, [r7], #8 + 164 0014 FAE80201 ldrd r0, [r10], #8 + 165 0018 4246 mov r2, r8 + 166 001a 4B46 mov r3, r9 + 167 001c FFF7FEFF bl __aeabi_ddiv + 168 0020 41EC100B vmov d0, r0, r1 + 169 0024 FFF7FEFF bl log + 170 0028 4246 mov r2, r8 + 171 002a 51EC100B vmov r0, r1, d0 + 172 002e 4B46 mov r3, r9 + 173 0030 FFF7FEFF bl __aeabi_dmul + 174 0034 0246 mov r2, r0 + 175 0036 0B46 mov r3, r1 + 176 0038 2046 mov r0, r4 + 177 003a 2946 mov r1, r5 + 178 003c FFF7FEFF bl __aeabi_dadd + ARM GAS /tmp/ccYuIppz.s page 4 + + + 179 0040 013E subs r6, r6, #1 + 180 0042 0446 mov r4, r0 + 181 0044 0D46 mov r5, r1 + 182 0046 E3D1 bne .L35 + 183 0048 0246 mov r2, r0 + 184 004a 01F10043 add r3, r1, #-2147483648 + 185 004e 43EC102B vmov d0, r2, r3 + 186 0052 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 187 .L36: + 188 0056 0022 movs r2, #0 + 189 0058 4FF00043 mov r3, #-2147483648 + 190 005c 43EC102B vmov d0, r2, r3 + 191 0060 7047 bx lr + 193 0062 00BF .section .text.arm_logsumexp_dot_prod_f32,"ax",%progbits + 194 .align 1 + 195 .p2align 2,,3 + 196 .global arm_logsumexp_dot_prod_f32 + 197 .syntax unified + 198 .thumb + 199 .thumb_func + 200 .fpu fpv4-sp-d16 + 202 arm_logsumexp_dot_prod_f32: + 203 @ args = 0, pretend = 0, frame = 0 + 204 @ frame_needed = 0, uses_anonymous_args = 0 + 205 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 206 0002 1E46 mov r6, r3 + 207 0004 1746 mov r7, r2 + 208 0006 2DED028B vpush.64 {d8} + 209 000a 1346 mov r3, r2 + 210 000c 7D1E subs r5, r7, #1 + 211 000e 3246 mov r2, r6 + 212 0010 FFF7FEFF bl arm_add_f32 + 213 0014 341D adds r4, r6, #4 + 214 0016 96ED008A vldr.32 s16, [r6] + 215 001a 2DB3 cbz r5, .L43 + 216 001c 2046 mov r0, r4 + 217 001e 2946 mov r1, r5 + 218 .L45: + 219 0020 F0EC017A vldmia.32 r0!, {s15} + 220 0024 B4EE678A vcmp.f32 s16, s15 + 221 0028 F1EE10FA vmrs APSR_nzcv, FPSCR + 222 002c 48BF it mi + 223 002e B0EE678A vmovmi.f32 s16, s15 + 224 0032 0139 subs r1, r1, #1 + 225 0034 F4D1 bne .L45 + 226 0036 DFED128A vldr.32 s17, .L55 + 227 003a 0FB9 cbnz r7, .L47 + 228 003c 0BE0 b .L46 + 229 .L54: + 230 003e 013D subs r5, r5, #1 + 231 .L47: + 232 0040 14ED010A vldr.32 s0, [r4, #-4] + 233 0044 30EE480A vsub.f32 s0, s0, s16 + 234 0048 FFF7FEFF bl expf + 235 004c 0434 adds r4, r4, #4 + 236 004e 78EE808A vadd.f32 s17, s17, s0 + 237 0052 002D cmp r5, #0 + ARM GAS /tmp/ccYuIppz.s page 5 + + + 238 0054 F3D1 bne .L54 + 239 .L46: + 240 0056 B0EE680A vmov.f32 s0, s17 + 241 005a FFF7FEFF bl logf + 242 005e 38EE000A vadd.f32 s0, s16, s0 + 243 0062 BDEC028B vldm sp!, {d8} + 244 0066 F8BD pop {r3, r4, r5, r6, r7, pc} + 245 .L43: + 246 0068 14ED010A vldr.32 s0, [r4, #-4] + 247 006c DFED048A vldr.32 s17, .L55 + 248 0070 30EE480A vsub.f32 s0, s0, s16 + 249 0074 FFF7FEFF bl expf + 250 0078 70EE288A vadd.f32 s17, s0, s17 + 251 007c EBE7 b .L46 + 252 .L56: + 253 007e 00BF .align 2 + 254 .L55: + 255 0080 00000000 .word 0 + 257 .section .text.arm_logsumexp_f32,"ax",%progbits + 258 .align 1 + 259 .p2align 2,,3 + 260 .global arm_logsumexp_f32 + 261 .syntax unified + 262 .thumb + 263 .thumb_func + 264 .fpu fpv4-sp-d16 + 266 arm_logsumexp_f32: + 267 @ args = 0, pretend = 0, frame = 0 + 268 @ frame_needed = 0, uses_anonymous_args = 0 + 269 0000 38B5 push {r3, r4, r5, lr} + 270 0002 4D1E subs r5, r1, #1 + 271 0004 2DED028B vpush.64 {d8} + 272 0008 041D adds r4, r0, #4 + 273 000a 90ED008A vldr.32 s16, [r0] + 274 000e 2DB3 cbz r5, .L58 + 275 0010 2246 mov r2, r4 + 276 0012 2B46 mov r3, r5 + 277 .L60: + 278 0014 F2EC017A vldmia.32 r2!, {s15} + 279 0018 B4EE678A vcmp.f32 s16, s15 + 280 001c F1EE10FA vmrs APSR_nzcv, FPSCR + 281 0020 48BF it mi + 282 0022 B0EE678A vmovmi.f32 s16, s15 + 283 0026 013B subs r3, r3, #1 + 284 0028 F4D1 bne .L60 + 285 002a DFED128A vldr.32 s17, .L70 + 286 002e 09B9 cbnz r1, .L62 + 287 0030 0BE0 b .L61 + 288 .L69: + 289 0032 013D subs r5, r5, #1 + 290 .L62: + 291 0034 14ED010A vldr.32 s0, [r4, #-4] + 292 0038 30EE480A vsub.f32 s0, s0, s16 + 293 003c FFF7FEFF bl expf + 294 0040 0434 adds r4, r4, #4 + 295 0042 78EE808A vadd.f32 s17, s17, s0 + 296 0046 002D cmp r5, #0 + ARM GAS /tmp/ccYuIppz.s page 6 + + + 297 0048 F3D1 bne .L69 + 298 .L61: + 299 004a B0EE680A vmov.f32 s0, s17 + 300 004e FFF7FEFF bl logf + 301 0052 30EE080A vadd.f32 s0, s0, s16 + 302 0056 BDEC028B vldm sp!, {d8} + 303 005a 38BD pop {r3, r4, r5, pc} + 304 .L58: + 305 005c 14ED010A vldr.32 s0, [r4, #-4] + 306 0060 DFED048A vldr.32 s17, .L70 + 307 0064 30EE480A vsub.f32 s0, s0, s16 + 308 0068 FFF7FEFF bl expf + 309 006c 70EE288A vadd.f32 s17, s0, s17 + 310 0070 EBE7 b .L61 + 311 .L71: + 312 0072 00BF .align 2 + 313 .L70: + 314 0074 00000000 .word 0 + 316 .section .text.arm_max_f32,"ax",%progbits + 317 .align 1 + 318 .p2align 2,,3 + 319 .global arm_max_f32 + 320 .syntax unified + 321 .thumb + 322 .thumb_func + 323 .fpu fpv4-sp-d16 + 325 arm_max_f32: + 326 @ args = 0, pretend = 0, frame = 0 + 327 @ frame_needed = 0, uses_anonymous_args = 0 + 328 @ link register save eliminated. + 329 0000 0129 cmp r1, #1 + 330 0002 10B4 push {r4} + 331 0004 B0EC017A vldmia.32 r0!, {s14} + 332 0008 17D0 beq .L76 + 333 000a 4FF0010C mov ip, #1 + 334 000e 0024 movs r4, #0 + 335 .L75: + 336 0010 F0EC017A vldmia.32 r0!, {s15} + 337 0014 B4EEE77A vcmpe.f32 s14, s15 + 338 0018 F1EE10FA vmrs APSR_nzcv, FPSCR + 339 001c 48BF it mi + 340 001e 6446 movmi r4, ip + 341 0020 0CF1010C add ip, ip, #1 + 342 0024 48BF it mi + 343 0026 B0EE677A vmovmi.f32 s14, s15 + 344 002a 6145 cmp r1, ip + 345 002c F0D1 bne .L75 + 346 002e 82ED007A vstr.32 s14, [r2] + 347 0032 1C60 str r4, [r3] + 348 0034 5DF8044B ldr r4, [sp], #4 + 349 0038 7047 bx lr + 350 .L76: + 351 003a 0024 movs r4, #0 + 352 003c 82ED007A vstr.32 s14, [r2] + 353 0040 1C60 str r4, [r3] + 354 0042 5DF8044B ldr r4, [sp], #4 + 355 0046 7047 bx lr + ARM GAS /tmp/ccYuIppz.s page 7 + + + 357 .section .text.arm_max_q15,"ax",%progbits + 358 .align 1 + 359 .p2align 2,,3 + 360 .global arm_max_q15 + 361 .syntax unified + 362 .thumb + 363 .thumb_func + 364 .fpu fpv4-sp-d16 + 366 arm_max_q15: + 367 @ args = 0, pretend = 0, frame = 0 + 368 @ frame_needed = 0, uses_anonymous_args = 0 + 369 0000 0129 cmp r1, #1 + 370 0002 30B5 push {r4, r5, lr} + 371 0004 30F9024B ldrsh r4, [r0], #2 + 372 0008 10D0 beq .L84 + 373 000a 4FF0010C mov ip, #1 + 374 000e 0025 movs r5, #0 + 375 .L83: + 376 0010 30F902EB ldrsh lr, [r0], #2 + 377 0014 7445 cmp r4, lr + 378 0016 B8BF it lt + 379 0018 6546 movlt r5, ip + 380 001a 0CF1010C add ip, ip, #1 + 381 001e B8BF it lt + 382 0020 7446 movlt r4, lr + 383 0022 6145 cmp r1, ip + 384 0024 F4D1 bne .L83 + 385 0026 1480 strh r4, [r2] @ movhi + 386 0028 1D60 str r5, [r3] + 387 002a 30BD pop {r4, r5, pc} + 388 .L84: + 389 002c 0025 movs r5, #0 + 390 002e 1480 strh r4, [r2] @ movhi + 391 0030 1D60 str r5, [r3] + 392 0032 30BD pop {r4, r5, pc} + 394 .section .text.arm_max_q31,"ax",%progbits + 395 .align 1 + 396 .p2align 2,,3 + 397 .global arm_max_q31 + 398 .syntax unified + 399 .thumb + 400 .thumb_func + 401 .fpu fpv4-sp-d16 + 403 arm_max_q31: + 404 @ args = 0, pretend = 0, frame = 0 + 405 @ frame_needed = 0, uses_anonymous_args = 0 + 406 @ link register save eliminated. + 407 0000 0129 cmp r1, #1 + 408 0002 70B4 push {r4, r5, r6} + 409 0004 50F8045B ldr r5, [r0], #4 + 410 0008 11D0 beq .L91 + 411 000a 4FF0010C mov ip, #1 + 412 000e 0026 movs r6, #0 + 413 .L90: + 414 0010 50F8044B ldr r4, [r0], #4 + 415 0014 A542 cmp r5, r4 + 416 0016 B8BF it lt + ARM GAS /tmp/ccYuIppz.s page 8 + + + 417 0018 6646 movlt r6, ip + 418 001a 0CF1010C add ip, ip, #1 + 419 001e B8BF it lt + 420 0020 2546 movlt r5, r4 + 421 0022 6145 cmp r1, ip + 422 0024 F4D1 bne .L90 + 423 0026 1560 str r5, [r2] + 424 0028 1E60 str r6, [r3] + 425 002a 70BC pop {r4, r5, r6} + 426 002c 7047 bx lr + 427 .L91: + 428 002e 0026 movs r6, #0 + 429 0030 1560 str r5, [r2] + 430 0032 1E60 str r6, [r3] + 431 0034 70BC pop {r4, r5, r6} + 432 0036 7047 bx lr + 434 .section .text.arm_max_q7,"ax",%progbits + 435 .align 1 + 436 .p2align 2,,3 + 437 .global arm_max_q7 + 438 .syntax unified + 439 .thumb + 440 .thumb_func + 441 .fpu fpv4-sp-d16 + 443 arm_max_q7: + 444 @ args = 0, pretend = 0, frame = 0 + 445 @ frame_needed = 0, uses_anonymous_args = 0 + 446 0000 30B5 push {r4, r5, lr} + 447 0002 8446 mov ip, r0 + 448 0004 0129 cmp r1, #1 + 449 0006 1CF901EB ldrsb lr, [ip], #1 + 450 000a 10D0 beq .L98 + 451 000c 4518 adds r5, r0, r1 + 452 000e 0024 movs r4, #0 + 453 .L97: + 454 0010 1CF9011B ldrsb r1, [ip], #1 + 455 0014 8E45 cmp lr, r1 + 456 0016 04DA bge .L96 + 457 0018 0CF1FF3E add lr, ip, #-1 + 458 001c AEEB0004 sub r4, lr, r0 + 459 0020 8E46 mov lr, r1 + 460 .L96: + 461 0022 6545 cmp r5, ip + 462 0024 F4D1 bne .L97 + 463 0026 82F800E0 strb lr, [r2] + 464 002a 1C60 str r4, [r3] + 465 002c 30BD pop {r4, r5, pc} + 466 .L98: + 467 002e 0024 movs r4, #0 + 468 0030 82F800E0 strb lr, [r2] + 469 0034 1C60 str r4, [r3] + 470 0036 30BD pop {r4, r5, pc} + 472 .section .text.arm_max_no_idx_f32,"ax",%progbits + 473 .align 1 + 474 .p2align 2,,3 + 475 .global arm_max_no_idx_f32 + 476 .syntax unified + ARM GAS /tmp/ccYuIppz.s page 9 + + + 477 .thumb + 478 .thumb_func + 479 .fpu fpv4-sp-d16 + 481 arm_max_no_idx_f32: + 482 @ args = 0, pretend = 0, frame = 0 + 483 @ frame_needed = 0, uses_anonymous_args = 0 + 484 @ link register save eliminated. + 485 0000 DFED087A vldr.32 s15, .L108 + 486 0004 51B1 cbz r1, .L102 + 487 .L104: + 488 0006 B0EC017A vldmia.32 r0!, {s14} + 489 000a F4EE477A vcmp.f32 s15, s14 + 490 000e F1EE10FA vmrs APSR_nzcv, FPSCR + 491 0012 48BF it mi + 492 0014 F0EE477A vmovmi.f32 s15, s14 + 493 0018 0139 subs r1, r1, #1 + 494 001a F4D1 bne .L104 + 495 .L102: + 496 001c C2ED007A vstr.32 s15, [r2] + 497 0020 7047 bx lr + 498 .L109: + 499 0022 00BF .align 2 + 500 .L108: + 501 0024 FFFF7FFF .word -8388609 + 503 .section .text.arm_mean_f32,"ax",%progbits + 504 .align 1 + 505 .p2align 2,,3 + 506 .global arm_mean_f32 + 507 .syntax unified + 508 .thumb + 509 .thumb_func + 510 .fpu fpv4-sp-d16 + 512 arm_mean_f32: + 513 @ args = 0, pretend = 0, frame = 8 + 514 @ frame_needed = 0, uses_anonymous_args = 0 + 515 @ link register save eliminated. + 516 0000 82B0 sub sp, sp, #8 + 517 0002 0191 str r1, [sp, #4] + 518 0004 91B1 cbz r1, .L113 + 519 0006 DFED0B7A vldr.32 s15, .L116 + 520 000a 0B46 mov r3, r1 + 521 .L112: + 522 000c B0EC017A vldmia.32 r0!, {s14} + 523 0010 013B subs r3, r3, #1 + 524 0012 77EE877A vadd.f32 s15, s15, s14 + 525 0016 F9D1 bne .L112 + 526 .L111: + 527 0018 9DED017A vldr.32 s14, [sp, #4] @ int + 528 001c B8EE477A vcvt.f32.u32 s14, s14 + 529 0020 C7EE876A vdiv.f32 s13, s15, s14 + 530 0024 C2ED006A vstr.32 s13, [r2] + 531 0028 02B0 add sp, sp, #8 + 532 @ sp needed + 533 002a 7047 bx lr + 534 .L113: + 535 002c DFED017A vldr.32 s15, .L116 + 536 0030 F2E7 b .L111 + ARM GAS /tmp/ccYuIppz.s page 10 + + + 537 .L117: + 538 0032 00BF .align 2 + 539 .L116: + 540 0034 00000000 .word 0 + 542 .section .text.arm_mean_q15,"ax",%progbits + 543 .align 1 + 544 .p2align 2,,3 + 545 .global arm_mean_q15 + 546 .syntax unified + 547 .thumb + 548 .thumb_func + 549 .fpu fpv4-sp-d16 + 551 arm_mean_q15: + 552 @ args = 0, pretend = 0, frame = 0 + 553 @ frame_needed = 0, uses_anonymous_args = 0 + 554 0000 81B1 cbz r1, .L121 + 555 0002 00B5 push {lr} + 556 0004 0B46 mov r3, r1 + 557 0006 4FF0000C mov ip, #0 + 558 .L120: + 559 000a 30F902EB ldrsh lr, [r0], #2 + 560 000e 013B subs r3, r3, #1 + 561 0010 F444 add ip, ip, lr + 562 0012 FAD1 bne .L120 + 563 0014 9CFBF1FC sdiv ip, ip, r1 + 564 0018 0FFA8CFC sxth ip, ip + 565 001c A2F800C0 strh ip, [r2] @ movhi + 566 0020 5DF804FB ldr pc, [sp], #4 + 567 .L121: + 568 0024 1180 strh r1, [r2] @ movhi + 569 0026 7047 bx lr + 571 .global __aeabi_ldivmod + 572 .section .text.arm_mean_q31,"ax",%progbits + 573 .align 1 + 574 .p2align 2,,3 + 575 .global arm_mean_q31 + 576 .syntax unified + 577 .thumb + 578 .thumb_func + 579 .fpu fpv4-sp-d16 + 581 arm_mean_q31: + 582 @ args = 0, pretend = 0, frame = 0 + 583 @ frame_needed = 0, uses_anonymous_args = 0 + 584 0000 38B5 push {r3, r4, r5, lr} + 585 0002 1546 mov r5, r2 + 586 0004 0A46 mov r2, r1 + 587 0006 81B1 cbz r1, .L130 + 588 0008 4FF0000C mov ip, #0 + 589 000c 0B46 mov r3, r1 + 590 000e 6146 mov r1, ip + 591 .L129: + 592 0010 50F8044B ldr r4, [r0], #4 + 593 0014 14EB0C0C adds ip, r4, ip + 594 0018 41EBE471 adc r1, r1, r4, asr #31 + 595 001c 013B subs r3, r3, #1 + 596 001e F7D1 bne .L129 + 597 0020 6046 mov r0, ip + ARM GAS /tmp/ccYuIppz.s page 11 + + + 598 0022 FFF7FEFF bl __aeabi_ldivmod + 599 0026 2860 str r0, [r5] + 600 0028 38BD pop {r3, r4, r5, pc} + 601 .L130: + 602 002a 0846 mov r0, r1 + 603 002c 2860 str r0, [r5] + 604 002e 38BD pop {r3, r4, r5, pc} + 606 .section .text.arm_mean_q7,"ax",%progbits + 607 .align 1 + 608 .p2align 2,,3 + 609 .global arm_mean_q7 + 610 .syntax unified + 611 .thumb + 612 .thumb_func + 613 .fpu fpv4-sp-d16 + 615 arm_mean_q7: + 616 @ args = 0, pretend = 0, frame = 0 + 617 @ frame_needed = 0, uses_anonymous_args = 0 + 618 0000 71B1 cbz r1, .L136 + 619 0002 00B5 push {lr} + 620 0004 0023 movs r3, #0 + 621 0006 00EB010E add lr, r0, r1 + 622 .L135: + 623 000a 10F901CB ldrsb ip, [r0], #1 + 624 000e 7045 cmp r0, lr + 625 0010 6344 add r3, r3, ip + 626 0012 FAD1 bne .L135 + 627 0014 93FBF1F3 sdiv r3, r3, r1 + 628 0018 5BB2 sxtb r3, r3 + 629 001a 1370 strb r3, [r2] + 630 001c 5DF804FB ldr pc, [sp], #4 + 631 .L136: + 632 0020 1170 strb r1, [r2] + 633 0022 7047 bx lr + 635 .section .text.arm_min_f32,"ax",%progbits + 636 .align 1 + 637 .p2align 2,,3 + 638 .global arm_min_f32 + 639 .syntax unified + 640 .thumb + 641 .thumb_func + 642 .fpu fpv4-sp-d16 + 644 arm_min_f32: + 645 @ args = 0, pretend = 0, frame = 0 + 646 @ frame_needed = 0, uses_anonymous_args = 0 + 647 @ link register save eliminated. + 648 0000 0129 cmp r1, #1 + 649 0002 10B4 push {r4} + 650 0004 B0EC017A vldmia.32 r0!, {s14} + 651 0008 17D0 beq .L146 + 652 000a 4FF0010C mov ip, #1 + 653 000e 0024 movs r4, #0 + 654 .L145: + 655 0010 F0EC017A vldmia.32 r0!, {s15} + 656 0014 B4EEE77A vcmpe.f32 s14, s15 + 657 0018 F1EE10FA vmrs APSR_nzcv, FPSCR + 658 001c C8BF it gt + ARM GAS /tmp/ccYuIppz.s page 12 + + + 659 001e 6446 movgt r4, ip + 660 0020 0CF1010C add ip, ip, #1 + 661 0024 C8BF it gt + 662 0026 B0EE677A vmovgt.f32 s14, s15 + 663 002a 6145 cmp r1, ip + 664 002c F0D1 bne .L145 + 665 002e 82ED007A vstr.32 s14, [r2] + 666 0032 1C60 str r4, [r3] + 667 0034 5DF8044B ldr r4, [sp], #4 + 668 0038 7047 bx lr + 669 .L146: + 670 003a 0024 movs r4, #0 + 671 003c 82ED007A vstr.32 s14, [r2] + 672 0040 1C60 str r4, [r3] + 673 0042 5DF8044B ldr r4, [sp], #4 + 674 0046 7047 bx lr + 676 .section .text.arm_min_q15,"ax",%progbits + 677 .align 1 + 678 .p2align 2,,3 + 679 .global arm_min_q15 + 680 .syntax unified + 681 .thumb + 682 .thumb_func + 683 .fpu fpv4-sp-d16 + 685 arm_min_q15: + 686 @ args = 0, pretend = 0, frame = 0 + 687 @ frame_needed = 0, uses_anonymous_args = 0 + 688 0000 0129 cmp r1, #1 + 689 0002 30B5 push {r4, r5, lr} + 690 0004 30F9024B ldrsh r4, [r0], #2 + 691 0008 10D0 beq .L154 + 692 000a 4FF0010C mov ip, #1 + 693 000e 0025 movs r5, #0 + 694 .L153: + 695 0010 30F902EB ldrsh lr, [r0], #2 + 696 0014 7445 cmp r4, lr + 697 0016 C8BF it gt + 698 0018 6546 movgt r5, ip + 699 001a 0CF1010C add ip, ip, #1 + 700 001e C8BF it gt + 701 0020 7446 movgt r4, lr + 702 0022 6145 cmp r1, ip + 703 0024 F4D1 bne .L153 + 704 0026 1480 strh r4, [r2] @ movhi + 705 0028 1D60 str r5, [r3] + 706 002a 30BD pop {r4, r5, pc} + 707 .L154: + 708 002c 0025 movs r5, #0 + 709 002e 1480 strh r4, [r2] @ movhi + 710 0030 1D60 str r5, [r3] + 711 0032 30BD pop {r4, r5, pc} + 713 .section .text.arm_min_q31,"ax",%progbits + 714 .align 1 + 715 .p2align 2,,3 + 716 .global arm_min_q31 + 717 .syntax unified + 718 .thumb + ARM GAS /tmp/ccYuIppz.s page 13 + + + 719 .thumb_func + 720 .fpu fpv4-sp-d16 + 722 arm_min_q31: + 723 @ args = 0, pretend = 0, frame = 0 + 724 @ frame_needed = 0, uses_anonymous_args = 0 + 725 @ link register save eliminated. + 726 0000 0129 cmp r1, #1 + 727 0002 70B4 push {r4, r5, r6} + 728 0004 50F8045B ldr r5, [r0], #4 + 729 0008 11D0 beq .L161 + 730 000a 4FF0010C mov ip, #1 + 731 000e 0026 movs r6, #0 + 732 .L160: + 733 0010 50F8044B ldr r4, [r0], #4 + 734 0014 A542 cmp r5, r4 + 735 0016 C8BF it gt + 736 0018 6646 movgt r6, ip + 737 001a 0CF1010C add ip, ip, #1 + 738 001e C8BF it gt + 739 0020 2546 movgt r5, r4 + 740 0022 6145 cmp r1, ip + 741 0024 F4D1 bne .L160 + 742 0026 1560 str r5, [r2] + 743 0028 1E60 str r6, [r3] + 744 002a 70BC pop {r4, r5, r6} + 745 002c 7047 bx lr + 746 .L161: + 747 002e 0026 movs r6, #0 + 748 0030 1560 str r5, [r2] + 749 0032 1E60 str r6, [r3] + 750 0034 70BC pop {r4, r5, r6} + 751 0036 7047 bx lr + 753 .section .text.arm_min_q7,"ax",%progbits + 754 .align 1 + 755 .p2align 2,,3 + 756 .global arm_min_q7 + 757 .syntax unified + 758 .thumb + 759 .thumb_func + 760 .fpu fpv4-sp-d16 + 762 arm_min_q7: + 763 @ args = 0, pretend = 0, frame = 0 + 764 @ frame_needed = 0, uses_anonymous_args = 0 + 765 0000 30B5 push {r4, r5, lr} + 766 0002 8446 mov ip, r0 + 767 0004 0129 cmp r1, #1 + 768 0006 1CF901EB ldrsb lr, [ip], #1 + 769 000a 10D0 beq .L168 + 770 000c 4518 adds r5, r0, r1 + 771 000e 0024 movs r4, #0 + 772 .L167: + 773 0010 1CF9011B ldrsb r1, [ip], #1 + 774 0014 8E45 cmp lr, r1 + 775 0016 04DD ble .L166 + 776 0018 0CF1FF3E add lr, ip, #-1 + 777 001c AEEB0004 sub r4, lr, r0 + 778 0020 8E46 mov lr, r1 + ARM GAS /tmp/ccYuIppz.s page 14 + + + 779 .L166: + 780 0022 6545 cmp r5, ip + 781 0024 F4D1 bne .L167 + 782 0026 82F800E0 strb lr, [r2] + 783 002a 1C60 str r4, [r3] + 784 002c 30BD pop {r4, r5, pc} + 785 .L168: + 786 002e 0024 movs r4, #0 + 787 0030 82F800E0 strb lr, [r2] + 788 0034 1C60 str r4, [r3] + 789 0036 30BD pop {r4, r5, pc} + 791 .section .text.arm_power_f32,"ax",%progbits + 792 .align 1 + 793 .p2align 2,,3 + 794 .global arm_power_f32 + 795 .syntax unified + 796 .thumb + 797 .thumb_func + 798 .fpu fpv4-sp-d16 + 800 arm_power_f32: + 801 @ args = 0, pretend = 0, frame = 0 + 802 @ frame_needed = 0, uses_anonymous_args = 0 + 803 @ link register save eliminated. + 804 0000 9FED057A vldr.32 s14, .L176 + 805 0004 29B1 cbz r1, .L172 + 806 .L173: + 807 0006 F0EC017A vldmia.32 r0!, {s15} + 808 000a 0139 subs r1, r1, #1 + 809 000c A7EEA77A vfma.f32 s14, s15, s15 + 810 0010 F9D1 bne .L173 + 811 .L172: + 812 0012 82ED007A vstr.32 s14, [r2] + 813 0016 7047 bx lr + 814 .L177: + 815 .align 2 + 816 .L176: + 817 0018 00000000 .word 0 + 819 .section .text.arm_power_q15,"ax",%progbits + 820 .align 1 + 821 .p2align 2,,3 + 822 .global arm_power_q15 + 823 .syntax unified + 824 .thumb + 825 .thumb_func + 826 .fpu fpv4-sp-d16 + 828 arm_power_q15: + 829 @ args = 0, pretend = 0, frame = 0 + 830 @ frame_needed = 0, uses_anonymous_args = 0 + 831 @ link register save eliminated. + 832 0000 30B4 push {r4, r5} + 833 0002 0024 movs r4, #0 + 834 0004 0025 movs r5, #0 + 835 0006 29B1 cbz r1, .L179 + 836 .L180: + 837 0008 30F9023B ldrsh r3, [r0], #2 + 838 000c 0139 subs r1, r1, #1 + 839 000e C3FB8345 smlalbb r4, r5, r3, r3 + ARM GAS /tmp/ccYuIppz.s page 15 + + + 840 0012 F9D1 bne .L180 + 841 .L179: + 842 0014 C2E90045 strd r4, [r2] + 843 0018 30BC pop {r4, r5} + 844 001a 7047 bx lr + 846 .section .text.arm_power_q31,"ax",%progbits + 847 .align 1 + 848 .p2align 2,,3 + 849 .global arm_power_q31 + 850 .syntax unified + 851 .thumb + 852 .thumb_func + 853 .fpu fpv4-sp-d16 + 855 arm_power_q31: + 856 @ args = 0, pretend = 0, frame = 0 + 857 @ frame_needed = 0, uses_anonymous_args = 0 + 858 @ link register save eliminated. + 859 0000 30B4 push {r4, r5} + 860 0002 89B1 cbz r1, .L187 + 861 0004 0024 movs r4, #0 + 862 0006 2546 mov r5, r4 + 863 .L186: + 864 0008 50F8043B ldr r3, [r0], #4 + 865 000c 83FB033C smull r3, ip, r3, r3 + 866 0010 9B0B lsrs r3, r3, #14 + 867 0012 43EA8C43 orr r3, r3, ip, lsl #18 + 868 0016 1C19 adds r4, r3, r4 + 869 0018 45EBAC35 adc r5, r5, ip, asr #14 + 870 001c 0139 subs r1, r1, #1 + 871 001e F3D1 bne .L186 + 872 0020 C2E90045 strd r4, r5, [r2] + 873 0024 30BC pop {r4, r5} + 874 0026 7047 bx lr + 875 .L187: + 876 0028 0C46 mov r4, r1 + 877 002a 0D46 mov r5, r1 + 878 002c C2E90045 strd r4, r5, [r2] + 879 0030 30BC pop {r4, r5} + 880 0032 7047 bx lr + 882 .section .text.arm_power_q7,"ax",%progbits + 883 .align 1 + 884 .p2align 2,,3 + 885 .global arm_power_q7 + 886 .syntax unified + 887 .thumb + 888 .thumb_func + 889 .fpu fpv4-sp-d16 + 891 arm_power_q7: + 892 @ args = 0, pretend = 0, frame = 0 + 893 @ frame_needed = 0, uses_anonymous_args = 0 + 894 @ link register save eliminated. + 895 0000 41B1 cbz r1, .L191 + 896 0002 00EB010C add ip, r0, r1 + 897 0006 0021 movs r1, #0 + 898 .L192: + 899 0008 10F9013B ldrsb r3, [r0], #1 + 900 000c 6045 cmp r0, ip + ARM GAS /tmp/ccYuIppz.s page 16 + + + 901 000e 13FB0311 smlabb r1, r3, r3, r1 + 902 0012 F9D1 bne .L192 + 903 .L191: + 904 0014 1160 str r1, [r2] + 905 0016 7047 bx lr + 907 .section .text.arm_rms_f32,"ax",%progbits + 908 .align 1 + 909 .p2align 2,,3 + 910 .global arm_rms_f32 + 911 .syntax unified + 912 .thumb + 913 .thumb_func + 914 .fpu fpv4-sp-d16 + 916 arm_rms_f32: + 917 @ args = 0, pretend = 0, frame = 8 + 918 @ frame_needed = 0, uses_anonymous_args = 0 + 919 0000 00B5 push {lr} + 920 0002 83B0 sub sp, sp, #12 + 921 0004 0191 str r1, [sp, #4] + 922 0006 01B3 cbz r1, .L204 + 923 0008 9FED167A vldr.32 s14, .L211 + 924 000c 0B46 mov r3, r1 + 925 .L197: + 926 000e F0EC017A vldmia.32 r0!, {s15} + 927 0012 013B subs r3, r3, #1 + 928 0014 A7EEA77A vfma.f32 s14, s15, s15 + 929 0018 F9D1 bne .L197 + 930 .L196: + 931 001a DDED017A vldr.32 s15, [sp, #4] @ int + 932 001e F8EE677A vcvt.f32.u32 s15, s15 + 933 0022 0023 movs r3, #0 + 934 0024 87EE270A vdiv.f32 s0, s14, s15 + 935 0028 B5EEC00A vcmpe.f32 s0, #0 + 936 002c F1EE10FA vmrs APSR_nzcv, FPSCR + 937 0030 0EDB blt .L208 + 938 0032 B5EE400A vcmp.f32 s0, #0 + 939 0036 F1EE10FA vmrs APSR_nzcv, FPSCR + 940 003a 0BD4 bmi .L209 + 941 003c F1EEC07A vsqrt.f32 s15, s0 + 942 .L202: + 943 0040 C2ED007A vstr.32 s15, [r2] + 944 .L195: + 945 0044 03B0 add sp, sp, #12 + 946 @ sp needed + 947 0046 5DF804FB ldr pc, [sp], #4 + 948 .L204: + 949 004a 9FED067A vldr.32 s14, .L211 + 950 004e E4E7 b .L196 + 951 .L208: + 952 0050 1360 str r3, [r2] @ float + 953 0052 F7E7 b .L195 + 954 .L209: + 955 0054 0192 str r2, [sp, #4] + 956 0056 FFF7FEFF bl sqrtf + 957 005a 019A ldr r2, [sp, #4] + 958 005c F0EE407A vmov.f32 s15, s0 + 959 0060 EEE7 b .L202 + ARM GAS /tmp/ccYuIppz.s page 17 + + + 960 .L212: + 961 0062 00BF .align 2 + 962 .L211: + 963 0064 00000000 .word 0 + 965 .section .text.arm_rms_q15,"ax",%progbits + 966 .align 1 + 967 .p2align 2,,3 + 968 .global arm_rms_q15 + 969 .syntax unified + 970 .thumb + 971 .thumb_func + 972 .fpu fpv4-sp-d16 + 974 arm_rms_q15: + 975 @ args = 0, pretend = 0, frame = 0 + 976 @ frame_needed = 0, uses_anonymous_args = 0 + 977 0000 70B5 push {r4, r5, r6, lr} + 978 0002 1646 mov r6, r2 + 979 0004 0A46 mov r2, r1 + 980 0006 79B1 cbz r1, .L214 + 981 0008 0B46 mov r3, r1 + 982 000a 0024 movs r4, #0 + 983 000c 0025 movs r5, #0 + 984 .L215: + 985 000e 30F902CB ldrsh ip, [r0], #2 + 986 0012 013B subs r3, r3, #1 + 987 0014 CCFB8C45 smlalbb r4, r5, ip, ip + 988 0018 F9D1 bne .L215 + 989 001a 2046 mov r0, r4 + 990 001c 2946 mov r1, r5 + 991 001e FFF7FEFF bl __aeabi_ldivmod + 992 0022 C30B lsrs r3, r0, #15 + 993 0024 43EA4141 orr r1, r3, r1, lsl #17 + 994 .L214: + 995 .syntax unified + 996 @ 143 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c" 1 + 997 0028 01F30F00 ssat r0, #16, r1 + 998 @ 0 "" 2 + 999 .thumb + 1000 .syntax unified + 1001 002c 3146 mov r1, r6 + 1002 002e 00B2 sxth r0, r0 + 1003 0030 BDE87040 pop {r4, r5, r6, lr} + 1004 0034 FFF7FEBF b arm_sqrt_q15 + 1006 .global __aeabi_uldivmod + 1007 .section .text.arm_rms_q31,"ax",%progbits + 1008 .align 1 + 1009 .p2align 2,,3 + 1010 .global arm_rms_q31 + 1011 .syntax unified + 1012 .thumb + 1013 .thumb_func + 1014 .fpu fpv4-sp-d16 + 1016 arm_rms_q31: + 1017 @ args = 0, pretend = 0, frame = 0 + 1018 @ frame_needed = 0, uses_anonymous_args = 0 + 1019 0000 38B5 push {r3, r4, r5, lr} + 1020 0002 1546 mov r5, r2 + ARM GAS /tmp/ccYuIppz.s page 18 + + + 1021 0004 0A46 mov r2, r1 + 1022 0006 D1B1 cbz r1, .L222 + 1023 0008 4FF0000C mov ip, #0 + 1024 000c 0B46 mov r3, r1 + 1025 000e 6146 mov r1, ip + 1026 .L221: + 1027 0010 50F8044B ldr r4, [r0], #4 + 1028 0014 013B subs r3, r3, #1 + 1029 0016 C4FB04C1 smlal ip, r1, r4, r4 + 1030 001a F9D1 bne .L221 + 1031 001c 6046 mov r0, ip + 1032 001e FFF7FEFF bl __aeabi_uldivmod + 1033 0022 C00F lsrs r0, r0, #31 + 1034 0024 40EA4100 orr r0, r0, r1, lsl #1 + 1035 0028 C317 asrs r3, r0, #31 + 1036 002a B3EBD17F cmp r3, r1, lsr #31 + 1037 002e 18BF it ne + 1038 0030 6FF00040 mvnne r0, #-2147483648 + 1039 0034 2946 mov r1, r5 + 1040 0036 BDE83840 pop {r3, r4, r5, lr} + 1041 003a FFF7FEBF b arm_sqrt_q31 + 1042 .L222: + 1043 003e 0846 mov r0, r1 + 1044 0040 2946 mov r1, r5 + 1045 0042 BDE83840 pop {r3, r4, r5, lr} + 1046 0046 FFF7FEBF b arm_sqrt_q31 + 1048 004a 00BF .section .text.arm_std_f32,"ax",%progbits + 1049 .align 1 + 1050 .p2align 2,,3 + 1051 .global arm_std_f32 + 1052 .syntax unified + 1053 .thumb + 1054 .thumb_func + 1055 .fpu fpv4-sp-d16 + 1057 arm_std_f32: + 1058 @ args = 0, pretend = 0, frame = 8 + 1059 @ frame_needed = 0, uses_anonymous_args = 0 + 1060 0000 0129 cmp r1, #1 + 1061 0002 2FD9 bls .L235 + 1062 0004 DFED217A vldr.32 s15, .L247 + 1063 0008 0B46 mov r3, r1 + 1064 000a 8446 mov ip, r0 + 1065 .L227: + 1066 000c BCEC017A vldmia.32 ip!, {s14} + 1067 0010 013B subs r3, r3, #1 + 1068 0012 77EE877A vadd.f32 s15, s15, s14 + 1069 0016 F9D1 bne .L227 + 1070 0018 07EE101A vmov s14, r1 @ int + 1071 001c B8EE476A vcvt.f32.u32 s12, s14 + 1072 0020 9FED1A7A vldr.32 s14, .L247 + 1073 0024 C7EE866A vdiv.f32 s13, s15, s12 + 1074 .L228: + 1075 0028 0139 subs r1, r1, #1 + 1076 002a F0EC017A vldmia.32 r0!, {s15} + 1077 002e 77EEE67A vsub.f32 s15, s15, s13 + 1078 0032 A7EEA77A vfma.f32 s14, s15, s15 + 1079 0036 F7D1 bne .L228 + ARM GAS /tmp/ccYuIppz.s page 19 + + + 1080 0038 F7EE007A vmov.f32 s15, #1.0e+0 + 1081 003c 36EE676A vsub.f32 s12, s12, s15 + 1082 0040 0023 movs r3, #0 + 1083 0042 87EE060A vdiv.f32 s0, s14, s12 + 1084 0046 B5EEC00A vcmpe.f32 s0, #0 + 1085 004a F1EE10FA vmrs APSR_nzcv, FPSCR + 1086 004e 10DB blt .L239 + 1087 0050 B5EE400A vcmp.f32 s0, #0 + 1088 0054 F1EE10FA vmrs APSR_nzcv, FPSCR + 1089 0058 0DD4 bmi .L246 + 1090 005a F1EEC07A vsqrt.f32 s15, s0 + 1091 005e C2ED007A vstr.32 s15, [r2] + 1092 0062 7047 bx lr + 1093 .L235: + 1094 0064 9FED090A vldr.32 s0, .L247 + 1095 0068 F1EEC07A vsqrt.f32 s15, s0 + 1096 006c C2ED007A vstr.32 s15, [r2] + 1097 0070 7047 bx lr + 1098 .L239: + 1099 0072 1360 str r3, [r2] @ float + 1100 0074 7047 bx lr + 1101 .L246: + 1102 0076 00B5 push {lr} + 1103 0078 83B0 sub sp, sp, #12 + 1104 007a 0192 str r2, [sp, #4] + 1105 007c FFF7FEFF bl sqrtf + 1106 0080 019A ldr r2, [sp, #4] + 1107 0082 82ED000A vstr.32 s0, [r2] + 1108 0086 03B0 add sp, sp, #12 + 1109 @ sp needed + 1110 0088 5DF804FB ldr pc, [sp], #4 + 1111 .L248: + 1112 .align 2 + 1113 .L247: + 1114 008c 00000000 .word 0 + 1116 .section .text.arm_std_q15,"ax",%progbits + 1117 .align 1 + 1118 .p2align 2,,3 + 1119 .global arm_std_q15 + 1120 .syntax unified + 1121 .thumb + 1122 .thumb_func + 1123 .fpu fpv4-sp-d16 + 1125 arm_std_q15: + 1126 @ args = 0, pretend = 0, frame = 0 + 1127 @ frame_needed = 0, uses_anonymous_args = 0 + 1128 0000 0129 cmp r1, #1 + 1129 0002 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 1130 0006 9046 mov r8, r2 + 1131 0008 25D9 bls .L256 + 1132 000a 8946 mov r9, r1 + 1133 000c 0C46 mov r4, r1 + 1134 000e 0026 movs r6, #0 + 1135 0010 0027 movs r7, #0 + 1136 0012 0025 movs r5, #0 + 1137 .L250: + 1138 0014 30F902CB ldrsh ip, [r0], #2 + ARM GAS /tmp/ccYuIppz.s page 20 + + + 1139 0018 013C subs r4, r4, #1 + 1140 001a CCFB8C67 smlalbb r6, r7, ip, ip + 1141 001e 6544 add r5, r5, ip + 1142 0020 F8D1 bne .L250 + 1143 0022 3046 mov r0, r6 + 1144 0024 09F1FF36 add r6, r9, #-1 + 1145 0028 3246 mov r2, r6 + 1146 002a 2346 mov r3, r4 + 1147 002c 3946 mov r1, r7 + 1148 002e FFF7FEFF bl __aeabi_ldivmod + 1149 0032 2346 mov r3, r4 + 1150 0034 09FB06F2 mul r2, r9, r6 + 1151 0038 0446 mov r4, r0 + 1152 003a 85FB0501 smull r0, r1, r5, r5 + 1153 003e FFF7FEFF bl __aeabi_ldivmod + 1154 0042 201A subs r0, r4, r0 + 1155 0044 C013 asrs r0, r0, #15 + 1156 0046 4146 mov r1, r8 + 1157 .syntax unified + 1158 @ 167 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c" 1 + 1159 0048 00F30F00 ssat r0, #16, r0 + 1160 @ 0 "" 2 + 1161 .thumb + 1162 .syntax unified + 1163 004c BDE8F843 pop {r3, r4, r5, r6, r7, r8, r9, lr} + 1164 0050 00B2 sxth r0, r0 + 1165 0052 FFF7FEBF b arm_sqrt_q15 + 1166 .L256: + 1167 0056 0023 movs r3, #0 + 1168 0058 1380 strh r3, [r2] @ movhi + 1169 005a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 1171 005e 00BF .section .text.arm_std_q31,"ax",%progbits + 1172 .align 1 + 1173 .p2align 2,,3 + 1174 .global arm_std_q31 + 1175 .syntax unified + 1176 .thumb + 1177 .thumb_func + 1178 .fpu fpv4-sp-d16 + 1180 arm_std_q31: + 1181 @ args = 0, pretend = 0, frame = 0 + 1182 @ frame_needed = 0, uses_anonymous_args = 0 + 1183 0000 0129 cmp r1, #1 + 1184 0002 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 1185 0006 1746 mov r7, r2 + 1186 0008 31D9 bls .L264 + 1187 000a 4FF0000E mov lr, #0 + 1188 000e 8846 mov r8, r1 + 1189 0010 0D46 mov r5, r1 + 1190 0012 7446 mov r4, lr + 1191 0014 7146 mov r1, lr + 1192 0016 7646 mov r6, lr + 1193 .L258: + 1194 0018 50F8043B ldr r3, [r0], #4 + 1195 001c 4FEA232C asr ip, r3, #8 + 1196 0020 1CEB0404 adds r4, ip, r4 + 1197 0024 46EBE376 adc r6, r6, r3, asr #31 + ARM GAS /tmp/ccYuIppz.s page 21 + + + 1198 0028 013D subs r5, r5, #1 + 1199 002a CCFB0CE1 smlal lr, r1, ip, ip + 1200 002e F3D1 bne .L258 + 1201 0030 08F1FF39 add r9, r8, #-1 + 1202 0034 7046 mov r0, lr + 1203 0036 4A46 mov r2, r9 + 1204 0038 2B46 mov r3, r5 + 1205 003a FFF7FEFF bl __aeabi_ldivmod + 1206 003e 04FB06F6 mul r6, r4, r6 + 1207 0042 2B46 mov r3, r5 + 1208 0044 0546 mov r5, r0 + 1209 0046 A4FB0404 umull r0, r4, r4, r4 + 1210 004a 08FB09F2 mul r2, r8, r9 + 1211 004e 8846 mov r8, r1 + 1212 0050 04EB4601 add r1, r4, r6, lsl #1 + 1213 0054 FFF7FEFF bl __aeabi_ldivmod + 1214 0058 2D1A subs r5, r5, r0 + 1215 005a 68EB0100 sbc r0, r8, r1 + 1216 005e ED0B lsrs r5, r5, #15 + 1217 0060 3946 mov r1, r7 + 1218 0062 45EA4040 orr r0, r5, r0, lsl #17 + 1219 0066 BDE8F843 pop {r3, r4, r5, r6, r7, r8, r9, lr} + 1220 006a FFF7FEBF b arm_sqrt_q31 + 1221 .L264: + 1222 006e 0023 movs r3, #0 + 1223 0070 1360 str r3, [r2] + 1224 0072 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 1226 0076 00BF .section .text.arm_var_f32,"ax",%progbits + 1227 .align 1 + 1228 .p2align 2,,3 + 1229 .global arm_var_f32 + 1230 .syntax unified + 1231 .thumb + 1232 .thumb_func + 1233 .fpu fpv4-sp-d16 + 1235 arm_var_f32: + 1236 @ args = 0, pretend = 0, frame = 0 + 1237 @ frame_needed = 0, uses_anonymous_args = 0 + 1238 @ link register save eliminated. + 1239 0000 0129 cmp r1, #1 + 1240 0002 22D9 bls .L272 + 1241 0004 DFED127A vldr.32 s15, .L273 + 1242 0008 0B46 mov r3, r1 + 1243 000a 8446 mov ip, r0 + 1244 .L266: + 1245 000c BCEC017A vldmia.32 ip!, {s14} + 1246 0010 013B subs r3, r3, #1 + 1247 0012 77EE877A vadd.f32 s15, s15, s14 + 1248 0016 F9D1 bne .L266 + 1249 0018 07EE101A vmov s14, r1 @ int + 1250 001c B8EE476A vcvt.f32.u32 s12, s14 + 1251 0020 9FED0B7A vldr.32 s14, .L273 + 1252 0024 C7EE866A vdiv.f32 s13, s15, s12 + 1253 .L268: + 1254 0028 0139 subs r1, r1, #1 + 1255 002a F0EC017A vldmia.32 r0!, {s15} + 1256 002e 77EEE67A vsub.f32 s15, s15, s13 + ARM GAS /tmp/ccYuIppz.s page 22 + + + 1257 0032 A7EEA77A vfma.f32 s14, s15, s15 + 1258 0036 F7D1 bne .L268 + 1259 0038 F7EE007A vmov.f32 s15, #1.0e+0 + 1260 003c 36EE676A vsub.f32 s12, s12, s15 + 1261 0040 C7EE067A vdiv.f32 s15, s14, s12 + 1262 0044 C2ED007A vstr.32 s15, [r2] + 1263 0048 7047 bx lr + 1264 .L272: + 1265 004a 0023 movs r3, #0 + 1266 004c 1360 str r3, [r2] @ float + 1267 004e 7047 bx lr + 1268 .L274: + 1269 .align 2 + 1270 .L273: + 1271 0050 00000000 .word 0 + 1273 .section .text.arm_var_q15,"ax",%progbits + 1274 .align 1 + 1275 .p2align 2,,3 + 1276 .global arm_var_q15 + 1277 .syntax unified + 1278 .thumb + 1279 .thumb_func + 1280 .fpu fpv4-sp-d16 + 1282 arm_var_q15: + 1283 @ args = 0, pretend = 0, frame = 0 + 1284 @ frame_needed = 0, uses_anonymous_args = 0 + 1285 0000 0129 cmp r1, #1 + 1286 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 1287 0006 1646 mov r6, r2 + 1288 0008 1FD9 bls .L281 + 1289 000a 0346 mov r3, r0 + 1290 000c 0020 movs r0, #0 + 1291 000e 0D46 mov r5, r1 + 1292 0010 0F46 mov r7, r1 + 1293 0012 0446 mov r4, r0 + 1294 0014 0146 mov r1, r0 + 1295 .L276: + 1296 0016 33F902CB ldrsh ip, [r3], #2 + 1297 .syntax unified + 1298 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1299 001a CCFBCC01 smlald r0, r1, ip, ip + 1300 @ 0 "" 2 + 1301 .thumb + 1302 .syntax unified + 1303 001e 013F subs r7, r7, #1 + 1304 0020 6444 add r4, r4, ip + 1305 0022 F8D1 bne .L276 + 1306 0024 05F1FF38 add r8, r5, #-1 + 1307 0028 4246 mov r2, r8 + 1308 002a 3B46 mov r3, r7 + 1309 002c FFF7FEFF bl __aeabi_ldivmod + 1310 0030 05FB08F2 mul r2, r5, r8 + 1311 0034 3B46 mov r3, r7 + 1312 0036 0546 mov r5, r0 + 1313 0038 84FB0401 smull r0, r1, r4, r4 + 1314 003c FFF7FEFF bl __aeabi_ldivmod + 1315 0040 281A subs r0, r5, r0 + ARM GAS /tmp/ccYuIppz.s page 23 + + + 1316 0042 C513 asrs r5, r0, #15 + 1317 0044 3580 strh r5, [r6] @ movhi + 1318 0046 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1319 .L281: + 1320 004a 0023 movs r3, #0 + 1321 004c 1380 strh r3, [r2] @ movhi + 1322 004e BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 1324 0052 00BF .section .text.arm_var_q31,"ax",%progbits + 1325 .align 1 + 1326 .p2align 2,,3 + 1327 .global arm_var_q31 + 1328 .syntax unified + 1329 .thumb + 1330 .thumb_func + 1331 .fpu fpv4-sp-d16 + 1333 arm_var_q31: + 1334 @ args = 0, pretend = 0, frame = 0 + 1335 @ frame_needed = 0, uses_anonymous_args = 0 + 1336 0000 0129 cmp r1, #1 + 1337 0002 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 1338 0006 1746 mov r7, r2 + 1339 0008 2FD9 bls .L288 + 1340 000a 4FF0000E mov lr, #0 + 1341 000e 8846 mov r8, r1 + 1342 0010 0D46 mov r5, r1 + 1343 0012 7446 mov r4, lr + 1344 0014 7146 mov r1, lr + 1345 0016 7646 mov r6, lr + 1346 .L283: + 1347 0018 50F8043B ldr r3, [r0], #4 + 1348 001c 4FEA232C asr ip, r3, #8 + 1349 0020 1CEB0404 adds r4, ip, r4 + 1350 0024 46EBE376 adc r6, r6, r3, asr #31 + 1351 0028 013D subs r5, r5, #1 + 1352 002a CCFB0CE1 smlal lr, r1, ip, ip + 1353 002e F3D1 bne .L283 + 1354 0030 08F1FF39 add r9, r8, #-1 + 1355 0034 2B46 mov r3, r5 + 1356 0036 7046 mov r0, lr + 1357 0038 4A46 mov r2, r9 + 1358 003a FFF7FEFF bl __aeabi_ldivmod + 1359 003e 04FB06F6 mul r6, r4, r6 + 1360 0042 2B46 mov r3, r5 + 1361 0044 0546 mov r5, r0 + 1362 0046 A4FB0404 umull r0, r4, r4, r4 + 1363 004a 08FB09F2 mul r2, r8, r9 + 1364 004e 8846 mov r8, r1 + 1365 0050 04EB4601 add r1, r4, r6, lsl #1 + 1366 0054 FFF7FEFF bl __aeabi_ldivmod + 1367 0058 281A subs r0, r5, r0 + 1368 005a 68EB0108 sbc r8, r8, r1 + 1369 005e C00B lsrs r0, r0, #15 + 1370 0060 40EA4840 orr r0, r0, r8, lsl #17 + 1371 0064 3860 str r0, [r7] + 1372 0066 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 1373 .L288: + 1374 006a 0023 movs r3, #0 + ARM GAS /tmp/ccYuIppz.s page 24 + + + 1375 006c 1360 str r3, [r2] + 1376 006e BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 1378 0072 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccYuIppz.s page 25 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 StatisticsFunctions.c + /tmp/ccYuIppz.s:16 .text.arm_entropy_f32:0000000000000000 $t + /tmp/ccYuIppz.s:25 .text.arm_entropy_f32:0000000000000000 arm_entropy_f32 + /tmp/ccYuIppz.s:50 .text.arm_entropy_f32:0000000000000034 $d + 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Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_const_structs.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_const_structs.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_common_tables.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c: diff --git a/codice/build/TransformFunctions.lst b/codice/build/TransformFunctions.lst new file mode 100644 index 0000000..74452d0 --- /dev/null +++ b/codice/build/TransformFunctions.lst @@ -0,0 +1,14101 @@ +ARM GAS /tmp/ccFqHvis.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "TransformFunctions.c" + 14 .text + 15 .section .text.arm_rfft_32_fast_init_f32,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .arch armv7e-m + 19 .syntax unified + 20 .thumb + 21 .thumb_func + 22 .fpu fpv4-sp-d16 + 24 arm_rfft_32_fast_init_f32: + 25 @ args = 0, pretend = 0, frame = 0 + 26 @ frame_needed = 0, uses_anonymous_args = 0 + 27 @ link register save eliminated. + 28 0000 98B1 cbz r0, .L3 + 29 0002 0B4B ldr r3, .L9 + 30 0004 0B4A ldr r2, .L9+4 + 31 0006 9989 ldrh r1, [r3, #12] + 32 0008 10B4 push {r4} + 33 000a 9C68 ldr r4, [r3, #8] + 34 000c 5B68 ldr r3, [r3, #4] + 35 000e 4360 str r3, [r0, #4] + 36 0010 8460 str r4, [r0, #8] + 37 0012 4FF0100C mov ip, #16 + 38 0016 2023 movs r3, #32 + 39 0018 A0F800C0 strh ip, [r0] @ movhi + 40 001c 8181 strh r1, [r0, #12] @ movhi + 41 001e 0382 strh r3, [r0, #16] @ movhi + 42 0020 4261 str r2, [r0, #20] + 43 0022 5DF8044B ldr r4, [sp], #4 + 44 0026 0020 movs r0, #0 + 45 0028 7047 bx lr + 46 .L3: + 47 002a 4FF0FF30 mov r0, #-1 + 48 002e 7047 bx lr + 49 .L10: + 50 .align 2 + 51 .L9: + 52 0030 00000000 .word arm_cfft_sR_f32_len16 + 53 0034 00000000 .word twiddleCoef_rfft_32 + 55 .section .text.arm_rfft_64_fast_init_f32,"ax",%progbits + 56 .align 1 + 57 .p2align 2,,3 + 58 .syntax unified + 59 .thumb + ARM GAS /tmp/ccFqHvis.s page 2 + + + 60 .thumb_func + 61 .fpu fpv4-sp-d16 + 63 arm_rfft_64_fast_init_f32: + 64 @ args = 0, pretend = 0, frame = 0 + 65 @ frame_needed = 0, uses_anonymous_args = 0 + 66 @ link register save eliminated. + 67 0000 98B1 cbz r0, .L13 + 68 0002 0B4B ldr r3, .L18 + 69 0004 0B4A ldr r2, .L18+4 + 70 0006 9989 ldrh r1, [r3, #12] + 71 0008 10B4 push {r4} + 72 000a 9C68 ldr r4, [r3, #8] + 73 000c 5B68 ldr r3, [r3, #4] + 74 000e 4360 str r3, [r0, #4] + 75 0010 8460 str r4, [r0, #8] + 76 0012 4FF0200C mov ip, #32 + 77 0016 4023 movs r3, #64 + 78 0018 A0F800C0 strh ip, [r0] @ movhi + 79 001c 8181 strh r1, [r0, #12] @ movhi + 80 001e 0382 strh r3, [r0, #16] @ movhi + 81 0020 4261 str r2, [r0, #20] + 82 0022 5DF8044B ldr r4, [sp], #4 + 83 0026 0020 movs r0, #0 + 84 0028 7047 bx lr + 85 .L13: + 86 002a 4FF0FF30 mov r0, #-1 + 87 002e 7047 bx lr + 88 .L19: + 89 .align 2 + 90 .L18: + 91 0030 00000000 .word arm_cfft_sR_f32_len32 + 92 0034 00000000 .word twiddleCoef_rfft_64 + 94 .section .text.arm_rfft_128_fast_init_f32,"ax",%progbits + 95 .align 1 + 96 .p2align 2,,3 + 97 .syntax unified + 98 .thumb + 99 .thumb_func + 100 .fpu fpv4-sp-d16 + 102 arm_rfft_128_fast_init_f32: + 103 @ args = 0, pretend = 0, frame = 0 + 104 @ frame_needed = 0, uses_anonymous_args = 0 + 105 @ link register save eliminated. + 106 0000 98B1 cbz r0, .L22 + 107 0002 0B4B ldr r3, .L27 + 108 0004 0B4A ldr r2, .L27+4 + 109 0006 9989 ldrh r1, [r3, #12] + 110 0008 10B4 push {r4} + 111 000a 9C68 ldr r4, [r3, #8] + 112 000c 5B68 ldr r3, [r3, #4] + 113 000e 4360 str r3, [r0, #4] + 114 0010 8460 str r4, [r0, #8] + 115 0012 4FF0400C mov ip, #64 + 116 0016 8023 movs r3, #128 + 117 0018 A0F800C0 strh ip, [r0] @ movhi + 118 001c 8181 strh r1, [r0, #12] @ movhi + 119 001e 0382 strh r3, [r0, #16] @ movhi + ARM GAS /tmp/ccFqHvis.s page 3 + + + 120 0020 4261 str r2, [r0, #20] + 121 0022 5DF8044B ldr r4, [sp], #4 + 122 0026 0020 movs r0, #0 + 123 0028 7047 bx lr + 124 .L22: + 125 002a 4FF0FF30 mov r0, #-1 + 126 002e 7047 bx lr + 127 .L28: + 128 .align 2 + 129 .L27: + 130 0030 00000000 .word arm_cfft_sR_f32_len64 + 131 0034 00000000 .word twiddleCoef_rfft_128 + 133 .section .text.arm_rfft_256_fast_init_f32,"ax",%progbits + 134 .align 1 + 135 .p2align 2,,3 + 136 .syntax unified + 137 .thumb + 138 .thumb_func + 139 .fpu fpv4-sp-d16 + 141 arm_rfft_256_fast_init_f32: + 142 @ args = 0, pretend = 0, frame = 0 + 143 @ frame_needed = 0, uses_anonymous_args = 0 + 144 @ link register save eliminated. + 145 0000 A0B1 cbz r0, .L31 + 146 0002 0C4B ldr r3, .L36 + 147 0004 0C4A ldr r2, .L36+4 + 148 0006 9989 ldrh r1, [r3, #12] + 149 0008 10B4 push {r4} + 150 000a 9C68 ldr r4, [r3, #8] + 151 000c 5B68 ldr r3, [r3, #4] + 152 000e 4360 str r3, [r0, #4] + 153 0010 8460 str r4, [r0, #8] + 154 0012 4FF0800C mov ip, #128 + 155 0016 4FF48073 mov r3, #256 + 156 001a A0F800C0 strh ip, [r0] @ movhi + 157 001e 8181 strh r1, [r0, #12] @ movhi + 158 0020 0382 strh r3, [r0, #16] @ movhi + 159 0022 4261 str r2, [r0, #20] + 160 0024 5DF8044B ldr r4, [sp], #4 + 161 0028 0020 movs r0, #0 + 162 002a 7047 bx lr + 163 .L31: + 164 002c 4FF0FF30 mov r0, #-1 + 165 0030 7047 bx lr + 166 .L37: + 167 0032 00BF .align 2 + 168 .L36: + 169 0034 00000000 .word arm_cfft_sR_f32_len128 + 170 0038 00000000 .word twiddleCoef_rfft_256 + 172 .section .text.arm_rfft_512_fast_init_f32,"ax",%progbits + 173 .align 1 + 174 .p2align 2,,3 + 175 .syntax unified + 176 .thumb + 177 .thumb_func + 178 .fpu fpv4-sp-d16 + 180 arm_rfft_512_fast_init_f32: + ARM GAS /tmp/ccFqHvis.s page 4 + + + 181 @ args = 0, pretend = 0, frame = 0 + 182 @ frame_needed = 0, uses_anonymous_args = 0 + 183 @ link register save eliminated. + 184 0000 A0B1 cbz r0, .L40 + 185 0002 0C4B ldr r3, .L45 + 186 0004 0C4A ldr r2, .L45+4 + 187 0006 9989 ldrh r1, [r3, #12] + 188 0008 10B4 push {r4} + 189 000a 9C68 ldr r4, [r3, #8] + 190 000c 5B68 ldr r3, [r3, #4] + 191 000e 4360 str r3, [r0, #4] + 192 0010 8460 str r4, [r0, #8] + 193 0012 4FF4807C mov ip, #256 + 194 0016 4FF40073 mov r3, #512 + 195 001a A0F800C0 strh ip, [r0] @ movhi + 196 001e 8181 strh r1, [r0, #12] @ movhi + 197 0020 0382 strh r3, [r0, #16] @ movhi + 198 0022 4261 str r2, [r0, #20] + 199 0024 5DF8044B ldr r4, [sp], #4 + 200 0028 0020 movs r0, #0 + 201 002a 7047 bx lr + 202 .L40: + 203 002c 4FF0FF30 mov r0, #-1 + 204 0030 7047 bx lr + 205 .L46: + 206 0032 00BF .align 2 + 207 .L45: + 208 0034 00000000 .word arm_cfft_sR_f32_len256 + 209 0038 00000000 .word twiddleCoef_rfft_512 + 211 .section .text.arm_rfft_1024_fast_init_f32,"ax",%progbits + 212 .align 1 + 213 .p2align 2,,3 + 214 .syntax unified + 215 .thumb + 216 .thumb_func + 217 .fpu fpv4-sp-d16 + 219 arm_rfft_1024_fast_init_f32: + 220 @ args = 0, pretend = 0, frame = 0 + 221 @ frame_needed = 0, uses_anonymous_args = 0 + 222 @ link register save eliminated. + 223 0000 A0B1 cbz r0, .L49 + 224 0002 0C4B ldr r3, .L54 + 225 0004 0C4A ldr r2, .L54+4 + 226 0006 9989 ldrh r1, [r3, #12] + 227 0008 10B4 push {r4} + 228 000a 9C68 ldr r4, [r3, #8] + 229 000c 5B68 ldr r3, [r3, #4] + 230 000e 4360 str r3, [r0, #4] + 231 0010 8460 str r4, [r0, #8] + 232 0012 4FF4007C mov ip, #512 + 233 0016 4FF48063 mov r3, #1024 + 234 001a A0F800C0 strh ip, [r0] @ movhi + 235 001e 8181 strh r1, [r0, #12] @ movhi + 236 0020 0382 strh r3, [r0, #16] @ movhi + 237 0022 4261 str r2, [r0, #20] + 238 0024 5DF8044B ldr r4, [sp], #4 + 239 0028 0020 movs r0, #0 + ARM GAS /tmp/ccFqHvis.s page 5 + + + 240 002a 7047 bx lr + 241 .L49: + 242 002c 4FF0FF30 mov r0, #-1 + 243 0030 7047 bx lr + 244 .L55: + 245 0032 00BF .align 2 + 246 .L54: + 247 0034 00000000 .word arm_cfft_sR_f32_len512 + 248 0038 00000000 .word twiddleCoef_rfft_1024 + 250 .section .text.arm_rfft_2048_fast_init_f32,"ax",%progbits + 251 .align 1 + 252 .p2align 2,,3 + 253 .syntax unified + 254 .thumb + 255 .thumb_func + 256 .fpu fpv4-sp-d16 + 258 arm_rfft_2048_fast_init_f32: + 259 @ args = 0, pretend = 0, frame = 0 + 260 @ frame_needed = 0, uses_anonymous_args = 0 + 261 @ link register save eliminated. + 262 0000 A0B1 cbz r0, .L58 + 263 0002 0C4B ldr r3, .L63 + 264 0004 0C4A ldr r2, .L63+4 + 265 0006 9989 ldrh r1, [r3, #12] + 266 0008 10B4 push {r4} + 267 000a 9C68 ldr r4, [r3, #8] + 268 000c 5B68 ldr r3, [r3, #4] + 269 000e 4360 str r3, [r0, #4] + 270 0010 8460 str r4, [r0, #8] + 271 0012 4FF4806C mov ip, #1024 + 272 0016 4FF40063 mov r3, #2048 + 273 001a A0F800C0 strh ip, [r0] @ movhi + 274 001e 8181 strh r1, [r0, #12] @ movhi + 275 0020 0382 strh r3, [r0, #16] @ movhi + 276 0022 4261 str r2, [r0, #20] + 277 0024 5DF8044B ldr r4, [sp], #4 + 278 0028 0020 movs r0, #0 + 279 002a 7047 bx lr + 280 .L58: + 281 002c 4FF0FF30 mov r0, #-1 + 282 0030 7047 bx lr + 283 .L64: + 284 0032 00BF .align 2 + 285 .L63: + 286 0034 00000000 .word arm_cfft_sR_f32_len1024 + 287 0038 00000000 .word twiddleCoef_rfft_2048 + 289 .section .text.arm_rfft_4096_fast_init_f32,"ax",%progbits + 290 .align 1 + 291 .p2align 2,,3 + 292 .syntax unified + 293 .thumb + 294 .thumb_func + 295 .fpu fpv4-sp-d16 + 297 arm_rfft_4096_fast_init_f32: + 298 @ args = 0, pretend = 0, frame = 0 + 299 @ frame_needed = 0, uses_anonymous_args = 0 + 300 @ link register save eliminated. + ARM GAS /tmp/ccFqHvis.s page 6 + + + 301 0000 A0B1 cbz r0, .L67 + 302 0002 0C4B ldr r3, .L72 + 303 0004 0C4A ldr r2, .L72+4 + 304 0006 9989 ldrh r1, [r3, #12] + 305 0008 10B4 push {r4} + 306 000a 9C68 ldr r4, [r3, #8] + 307 000c 5B68 ldr r3, [r3, #4] + 308 000e 4360 str r3, [r0, #4] + 309 0010 8460 str r4, [r0, #8] + 310 0012 4FF4006C mov ip, #2048 + 311 0016 4FF48053 mov r3, #4096 + 312 001a A0F800C0 strh ip, [r0] @ movhi + 313 001e 8181 strh r1, [r0, #12] @ movhi + 314 0020 0382 strh r3, [r0, #16] @ movhi + 315 0022 4261 str r2, [r0, #20] + 316 0024 5DF8044B ldr r4, [sp], #4 + 317 0028 0020 movs r0, #0 + 318 002a 7047 bx lr + 319 .L67: + 320 002c 4FF0FF30 mov r0, #-1 + 321 0030 7047 bx lr + 322 .L73: + 323 0032 00BF .align 2 + 324 .L72: + 325 0034 00000000 .word arm_cfft_sR_f32_len2048 + 326 0038 00000000 .word twiddleCoef_rfft_4096 + 328 .section .text.arm_rfft_32_fast_init_f64,"ax",%progbits + 329 .align 1 + 330 .p2align 2,,3 + 331 .syntax unified + 332 .thumb + 333 .thumb_func + 334 .fpu fpv4-sp-d16 + 336 arm_rfft_32_fast_init_f64: + 337 @ args = 0, pretend = 0, frame = 0 + 338 @ frame_needed = 0, uses_anonymous_args = 0 + 339 @ link register save eliminated. + 340 0000 98B1 cbz r0, .L76 + 341 0002 4FF0100C mov ip, #16 + 342 0006 A0F800C0 strh ip, [r0] @ movhi + 343 000a 0949 ldr r1, .L77 + 344 000c 094A ldr r2, .L77+4 + 345 000e 0A4B ldr r3, .L77+8 + 346 0010 4361 str r3, [r0, #20] + 347 0012 4FF0200C mov ip, #32 + 348 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 349 001a 4FF00C0C mov ip, #12 + 350 001e C0E90121 strd r2, r1, [r0, #4] + 351 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 352 0026 0020 movs r0, #0 + 353 0028 7047 bx lr + 354 .L76: + 355 002a 4FF0FF30 mov r0, #-1 + 356 002e 7047 bx lr + 357 .L78: + 358 .align 2 + 359 .L77: + ARM GAS /tmp/ccFqHvis.s page 7 + + + 360 0030 00000000 .word armBitRevIndexTableF64_16 + 361 0034 00000000 .word twiddleCoefF64_16 + 362 0038 00000000 .word twiddleCoefF64_rfft_32 + 364 .section .text.arm_rfft_64_fast_init_f64,"ax",%progbits + 365 .align 1 + 366 .p2align 2,,3 + 367 .syntax unified + 368 .thumb + 369 .thumb_func + 370 .fpu fpv4-sp-d16 + 372 arm_rfft_64_fast_init_f64: + 373 @ args = 0, pretend = 0, frame = 0 + 374 @ frame_needed = 0, uses_anonymous_args = 0 + 375 @ link register save eliminated. + 376 0000 98B1 cbz r0, .L81 + 377 0002 4FF0200C mov ip, #32 + 378 0006 A0F800C0 strh ip, [r0] @ movhi + 379 000a 0949 ldr r1, .L82 + 380 000c 094A ldr r2, .L82+4 + 381 000e 0A4B ldr r3, .L82+8 + 382 0010 4361 str r3, [r0, #20] + 383 0012 4FF0400C mov ip, #64 + 384 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 385 001a 4FF0180C mov ip, #24 + 386 001e C0E90121 strd r2, r1, [r0, #4] + 387 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 388 0026 0020 movs r0, #0 + 389 0028 7047 bx lr + 390 .L81: + 391 002a 4FF0FF30 mov r0, #-1 + 392 002e 7047 bx lr + 393 .L83: + 394 .align 2 + 395 .L82: + 396 0030 00000000 .word armBitRevIndexTableF64_32 + 397 0034 00000000 .word twiddleCoefF64_32 + 398 0038 00000000 .word twiddleCoefF64_rfft_64 + 400 .section .text.arm_rfft_128_fast_init_f64,"ax",%progbits + 401 .align 1 + 402 .p2align 2,,3 + 403 .syntax unified + 404 .thumb + 405 .thumb_func + 406 .fpu fpv4-sp-d16 + 408 arm_rfft_128_fast_init_f64: + 409 @ args = 0, pretend = 0, frame = 0 + 410 @ frame_needed = 0, uses_anonymous_args = 0 + 411 @ link register save eliminated. + 412 0000 98B1 cbz r0, .L86 + 413 0002 4FF0400C mov ip, #64 + 414 0006 A0F800C0 strh ip, [r0] @ movhi + 415 000a 0949 ldr r1, .L87 + 416 000c 094A ldr r2, .L87+4 + 417 000e 0A4B ldr r3, .L87+8 + 418 0010 4361 str r3, [r0, #20] + 419 0012 4FF0800C mov ip, #128 + 420 0016 A0F810C0 strh ip, [r0, #16] @ movhi + ARM GAS /tmp/ccFqHvis.s page 8 + + + 421 001a 4FF0380C mov ip, #56 + 422 001e C0E90121 strd r2, r1, [r0, #4] + 423 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 424 0026 0020 movs r0, #0 + 425 0028 7047 bx lr + 426 .L86: + 427 002a 4FF0FF30 mov r0, #-1 + 428 002e 7047 bx lr + 429 .L88: + 430 .align 2 + 431 .L87: + 432 0030 00000000 .word armBitRevIndexTableF64_64 + 433 0034 00000000 .word twiddleCoefF64_64 + 434 0038 00000000 .word twiddleCoefF64_rfft_128 + 436 .section .text.arm_rfft_256_fast_init_f64,"ax",%progbits + 437 .align 1 + 438 .p2align 2,,3 + 439 .syntax unified + 440 .thumb + 441 .thumb_func + 442 .fpu fpv4-sp-d16 + 444 arm_rfft_256_fast_init_f64: + 445 @ args = 0, pretend = 0, frame = 0 + 446 @ frame_needed = 0, uses_anonymous_args = 0 + 447 @ link register save eliminated. + 448 0000 98B1 cbz r0, .L91 + 449 0002 4FF0800C mov ip, #128 + 450 0006 A0F800C0 strh ip, [r0] @ movhi + 451 000a 0949 ldr r1, .L92 + 452 000c 094A ldr r2, .L92+4 + 453 000e 0A4B ldr r3, .L92+8 + 454 0010 4361 str r3, [r0, #20] + 455 0012 4FF4807C mov ip, #256 + 456 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 457 001a 4FF0700C mov ip, #112 + 458 001e C0E90121 strd r2, r1, [r0, #4] + 459 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 460 0026 0020 movs r0, #0 + 461 0028 7047 bx lr + 462 .L91: + 463 002a 4FF0FF30 mov r0, #-1 + 464 002e 7047 bx lr + 465 .L93: + 466 .align 2 + 467 .L92: + 468 0030 00000000 .word armBitRevIndexTableF64_128 + 469 0034 00000000 .word twiddleCoefF64_128 + 470 0038 00000000 .word twiddleCoefF64_rfft_256 + 472 .section .text.arm_rfft_512_fast_init_f64,"ax",%progbits + 473 .align 1 + 474 .p2align 2,,3 + 475 .syntax unified + 476 .thumb + 477 .thumb_func + 478 .fpu fpv4-sp-d16 + 480 arm_rfft_512_fast_init_f64: + 481 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccFqHvis.s page 9 + + + 482 @ frame_needed = 0, uses_anonymous_args = 0 + 483 @ link register save eliminated. + 484 0000 98B1 cbz r0, .L96 + 485 0002 4FF4807C mov ip, #256 + 486 0006 A0F800C0 strh ip, [r0] @ movhi + 487 000a 0949 ldr r1, .L97 + 488 000c 094A ldr r2, .L97+4 + 489 000e 0A4B ldr r3, .L97+8 + 490 0010 4361 str r3, [r0, #20] + 491 0012 4FF4007C mov ip, #512 + 492 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 493 001a 4FF0F00C mov ip, #240 + 494 001e C0E90121 strd r2, r1, [r0, #4] + 495 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 496 0026 0020 movs r0, #0 + 497 0028 7047 bx lr + 498 .L96: + 499 002a 4FF0FF30 mov r0, #-1 + 500 002e 7047 bx lr + 501 .L98: + 502 .align 2 + 503 .L97: + 504 0030 00000000 .word armBitRevIndexTableF64_256 + 505 0034 00000000 .word twiddleCoefF64_256 + 506 0038 00000000 .word twiddleCoefF64_rfft_512 + 508 .section .text.arm_rfft_1024_fast_init_f64,"ax",%progbits + 509 .align 1 + 510 .p2align 2,,3 + 511 .syntax unified + 512 .thumb + 513 .thumb_func + 514 .fpu fpv4-sp-d16 + 516 arm_rfft_1024_fast_init_f64: + 517 @ args = 0, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 @ link register save eliminated. + 520 0000 98B1 cbz r0, .L101 + 521 0002 4FF4007C mov ip, #512 + 522 0006 A0F800C0 strh ip, [r0] @ movhi + 523 000a 0949 ldr r1, .L102 + 524 000c 094A ldr r2, .L102+4 + 525 000e 0A4B ldr r3, .L102+8 + 526 0010 4361 str r3, [r0, #20] + 527 0012 4FF4806C mov ip, #1024 + 528 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 529 001a 4FF4F07C mov ip, #480 + 530 001e C0E90121 strd r2, r1, [r0, #4] + 531 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 532 0026 0020 movs r0, #0 + 533 0028 7047 bx lr + 534 .L101: + 535 002a 4FF0FF30 mov r0, #-1 + 536 002e 7047 bx lr + 537 .L103: + 538 .align 2 + 539 .L102: + 540 0030 00000000 .word armBitRevIndexTableF64_512 + ARM GAS /tmp/ccFqHvis.s page 10 + + + 541 0034 00000000 .word twiddleCoefF64_512 + 542 0038 00000000 .word twiddleCoefF64_rfft_1024 + 544 .section .text.arm_rfft_2048_fast_init_f64,"ax",%progbits + 545 .align 1 + 546 .p2align 2,,3 + 547 .syntax unified + 548 .thumb + 549 .thumb_func + 550 .fpu fpv4-sp-d16 + 552 arm_rfft_2048_fast_init_f64: + 553 @ args = 0, pretend = 0, frame = 0 + 554 @ frame_needed = 0, uses_anonymous_args = 0 + 555 @ link register save eliminated. + 556 0000 98B1 cbz r0, .L106 + 557 0002 4FF4806C mov ip, #1024 + 558 0006 A0F800C0 strh ip, [r0] @ movhi + 559 000a 0949 ldr r1, .L107 + 560 000c 094A ldr r2, .L107+4 + 561 000e 0A4B ldr r3, .L107+8 + 562 0010 4361 str r3, [r0, #20] + 563 0012 4FF4006C mov ip, #2048 + 564 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 565 001a 4FF4787C mov ip, #992 + 566 001e C0E90121 strd r2, r1, [r0, #4] + 567 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 568 0026 0020 movs r0, #0 + 569 0028 7047 bx lr + 570 .L106: + 571 002a 4FF0FF30 mov r0, #-1 + 572 002e 7047 bx lr + 573 .L108: + 574 .align 2 + 575 .L107: + 576 0030 00000000 .word armBitRevIndexTableF64_1024 + 577 0034 00000000 .word twiddleCoefF64_1024 + 578 0038 00000000 .word twiddleCoefF64_rfft_2048 + 580 .section .text.arm_rfft_4096_fast_init_f64,"ax",%progbits + 581 .align 1 + 582 .p2align 2,,3 + 583 .syntax unified + 584 .thumb + 585 .thumb_func + 586 .fpu fpv4-sp-d16 + 588 arm_rfft_4096_fast_init_f64: + 589 @ args = 0, pretend = 0, frame = 0 + 590 @ frame_needed = 0, uses_anonymous_args = 0 + 591 @ link register save eliminated. + 592 0000 98B1 cbz r0, .L111 + 593 0002 4FF4006C mov ip, #2048 + 594 0006 A0F800C0 strh ip, [r0] @ movhi + 595 000a 0949 ldr r1, .L112 + 596 000c 094A ldr r2, .L112+4 + 597 000e 0A4B ldr r3, .L112+8 + 598 0010 4361 str r3, [r0, #20] + 599 0012 4FF4805C mov ip, #4096 + 600 0016 A0F810C0 strh ip, [r0, #16] @ movhi + 601 001a 4FF4F86C mov ip, #1984 + ARM GAS /tmp/ccFqHvis.s page 11 + + + 602 001e C0E90121 strd r2, r1, [r0, #4] + 603 0022 A0F80CC0 strh ip, [r0, #12] @ movhi + 604 0026 0020 movs r0, #0 + 605 0028 7047 bx lr + 606 .L111: + 607 002a 4FF0FF30 mov r0, #-1 + 608 002e 7047 bx lr + 609 .L113: + 610 .align 2 + 611 .L112: + 612 0030 00000000 .word armBitRevIndexTableF64_2048 + 613 0034 00000000 .word twiddleCoefF64_2048 + 614 0038 00000000 .word twiddleCoefF64_rfft_4096 + 616 .section .text.arm_radix4_butterfly_inverse_q15.constprop.0,"ax",%progbits + 617 .align 1 + 618 .p2align 2,,3 + 619 .syntax unified + 620 .thumb + 621 .thumb_func + 622 .fpu fpv4-sp-d16 + 624 arm_radix4_butterfly_inverse_q15.constprop.0: + 625 @ args = 0, pretend = 0, frame = 80 + 626 @ frame_needed = 0, uses_anonymous_args = 0 + 627 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 628 0004 95B0 sub sp, sp, #84 + 629 0006 0B46 mov r3, r1 + 630 0008 0291 str r1, [sp, #8] + 631 000a 21F00301 bic r1, r1, #3 + 632 000e 9C08 lsrs r4, r3, #2 + 633 0010 00EB4105 add r5, r0, r1, lsl #1 + 634 0014 914F ldr r7, .L128 + 635 0016 1190 str r0, [sp, #68] + 636 0018 0646 mov r6, r0 + 637 001a 9346 mov fp, r2 + 638 001c 0844 add r0, r0, r1 + 639 001e 1292 str r2, [sp, #72] + 640 0020 1394 str r4, [sp, #76] + 641 0022 2944 add r1, r1, r5 + 642 0024 9446 mov ip, r2 + 643 0026 9246 mov r10, r2 + 644 0028 0023 movs r3, #0 + 645 .L115: + 646 002a D6F80090 ldr r9, [r6] @ unaligned + 647 .syntax unified + 648 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 649 002e 99FA23F9 shadd16 r9, r9, r3 + 650 @ 0 "" 2 + 651 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 652 0032 99FA23F9 shadd16 r9, r9, r3 + 653 @ 0 "" 2 + 654 .thumb + 655 .syntax unified + 656 0036 2A68 ldr r2, [r5] @ unaligned + 657 .syntax unified + 658 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 659 0038 92FA23F2 shadd16 r2, r2, r3 + 660 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 12 + + + 661 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 662 003c 92FA23F2 shadd16 r2, r2, r3 + 663 @ 0 "" 2 + 664 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 665 0040 99FA12FE qadd16 lr, r9, r2 + 666 @ 0 "" 2 + 667 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 668 0044 D9FA12F9 qsub16 r9, r9, r2 + 669 @ 0 "" 2 + 670 .thumb + 671 .syntax unified + 672 0048 0268 ldr r2, [r0] @ unaligned + 673 .syntax unified + 674 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 675 004a 92FA23F2 shadd16 r2, r2, r3 + 676 @ 0 "" 2 + 677 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 678 004e 92FA23F2 shadd16 r2, r2, r3 + 679 @ 0 "" 2 + 680 .thumb + 681 .syntax unified + 682 0052 D1F80080 ldr r8, [r1] @ unaligned + 683 .syntax unified + 684 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 685 0056 98FA23F8 shadd16 r8, r8, r3 + 686 @ 0 "" 2 + 687 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 688 005a 98FA23F8 shadd16 r8, r8, r3 + 689 @ 0 "" 2 + 690 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 691 005e 92FA18F2 qadd16 r2, r2, r8 + 692 @ 0 "" 2 + 693 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 694 0062 9EFA22F8 shadd16 r8, lr, r2 + 695 @ 0 "" 2 + 696 .thumb + 697 .syntax unified + 698 0066 46F8048B str r8, [r6], #4 @ unaligned + 699 .syntax unified + 700 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 701 006a DEFA12FE qsub16 lr, lr, r2 + 702 @ 0 "" 2 + 703 .thumb + 704 .syntax unified + 705 006e 5BF8102B ldr r2, [fp], #16 @ unaligned + 706 .syntax unified + 707 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 708 0072 42FB0EF8 smusd r8, r2, lr + 709 @ 0 "" 2 + 710 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 711 0076 22FB1EFE smuadx lr, r2, lr + 712 @ 0 "" 2 + 713 .thumb + 714 .syntax unified + 715 007a 0268 ldr r2, [r0] @ unaligned + 716 .syntax unified + 717 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccFqHvis.s page 13 + + + 718 007c 92FA23F2 shadd16 r2, r2, r3 + 719 @ 0 "" 2 + 720 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 721 0080 92FA23F2 shadd16 r2, r2, r3 + 722 @ 0 "" 2 + 723 .thumb + 724 .syntax unified + 725 0084 0EEA070E and lr, lr, r7 + 726 0088 4EEA184E orr lr, lr, r8, lsr #16 + 727 008c 40F804EB str lr, [r0], #4 @ unaligned + 728 0090 D1F800E0 ldr lr, [r1] @ unaligned + 729 .syntax unified + 730 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 731 0094 9EFA23FE shadd16 lr, lr, r3 + 732 @ 0 "" 2 + 733 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 734 0098 9EFA23FE shadd16 lr, lr, r3 + 735 @ 0 "" 2 + 736 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 737 009c D2FA1EF2 qsub16 r2, r2, lr + 738 @ 0 "" 2 + 739 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 740 00a0 E9FA12F8 qsax r8, r9, r2 + 741 @ 0 "" 2 + 742 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 743 00a4 A9FA12F9 qasx r9, r9, r2 + 744 @ 0 "" 2 + 745 .thumb + 746 .syntax unified + 747 00a8 5AF8082B ldr r2, [r10], #8 @ unaligned + 748 .syntax unified + 749 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 750 00ac 42FB09FE smusd lr, r2, r9 + 751 @ 0 "" 2 + 752 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 753 00b0 22FB19F2 smuadx r2, r2, r9 + 754 @ 0 "" 2 + 755 .thumb + 756 .syntax unified + 757 00b4 3A40 ands r2, r2, r7 + 758 00b6 42EA1E42 orr r2, r2, lr, lsr #16 + 759 00ba 45F8042B str r2, [r5], #4 @ unaligned + 760 00be 5CF8182B ldr r2, [ip], #24 @ unaligned + 761 .syntax unified + 762 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 763 00c2 42FB08FE smusd lr, r2, r8 + 764 @ 0 "" 2 + 765 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 766 00c6 22FB18F2 smuadx r2, r2, r8 + 767 @ 0 "" 2 + 768 .thumb + 769 .syntax unified + 770 00ca 3A40 ands r2, r2, r7 + 771 00cc 42EA1E42 orr r2, r2, lr, lsr #16 + 772 00d0 013C subs r4, r4, #1 + 773 00d2 41F8042B str r2, [r1], #4 @ unaligned + 774 00d6 A8D1 bne .L115 + ARM GAS /tmp/ccFqHvis.s page 14 + + + 775 00d8 139B ldr r3, [sp, #76] + 776 00da 042B cmp r3, #4 + 777 00dc 40F2BA80 bls .L126 + 778 00e0 DFF878B1 ldr fp, .L128 + 779 00e4 1093 str r3, [sp, #64] + 780 00e6 0494 str r4, [sp, #16] + 781 00e8 0823 movs r3, #8 + 782 .L119: + 783 00ea 1099 ldr r1, [sp, #64] + 784 00ec 0391 str r1, [sp, #12] + 785 00ee 0A46 mov r2, r1 + 786 00f0 9700 lsls r7, r2, #2 + 787 00f2 029A ldr r2, [sp, #8] + 788 00f4 8908 lsrs r1, r1, #2 + 789 00f6 8A42 cmp r2, r1 + 790 00f8 28BF it cs + 791 00fa 0A46 movcs r2, r1 + 792 00fc 0E92 str r2, [sp, #56] + 793 00fe 03EB4302 add r2, r3, r3, lsl #1 + 794 0102 9200 lsls r2, r2, #2 + 795 0104 0F92 str r2, [sp, #60] + 796 0106 9A00 lsls r2, r3, #2 + 797 0108 DB00 lsls r3, r3, #3 + 798 010a 0D93 str r3, [sp, #52] + 799 010c 119B ldr r3, [sp, #68] + 800 010e 0793 str r3, [sp, #28] + 801 0110 03EBC103 add r3, r3, r1, lsl #3 + 802 0114 0693 str r3, [sp, #24] + 803 0116 129B ldr r3, [sp, #72] + 804 0118 0A93 str r3, [sp, #40] + 805 011a CDE90833 strd r3, r3, [sp, #32] + 806 011e 8800 lsls r0, r1, #2 + 807 0120 0023 movs r3, #0 + 808 0122 1091 str r1, [sp, #64] + 809 0124 0C90 str r0, [sp, #48] + 810 0126 0B92 str r2, [sp, #44] + 811 0128 0593 str r3, [sp, #20] + 812 .L118: + 813 012a 099B ldr r3, [sp, #36] + 814 012c 079A ldr r2, [sp, #28] + 815 012e D3F800A0 ldr r10, [r3] @ unaligned + 816 0132 089B ldr r3, [sp, #32] + 817 0134 DDF814E0 ldr lr, [sp, #20] + 818 0138 D3F80090 ldr r9, [r3] @ unaligned + 819 013c 0A9B ldr r3, [sp, #40] + 820 013e D3F80080 ldr r8, [r3] @ unaligned + 821 0142 0C9B ldr r3, [sp, #48] + 822 0144 1646 mov r6, r2 + 823 0146 9818 adds r0, r3, r2 + 824 0148 069A ldr r2, [sp, #24] + 825 014a 1546 mov r5, r2 + 826 014c 9918 adds r1, r3, r2 + 827 .L117: + 828 014e 3268 ldr r2, [r6] @ unaligned + 829 0150 2C68 ldr r4, [r5] @ unaligned + 830 .syntax unified + 831 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccFqHvis.s page 15 + + + 832 0152 92FA14F3 qadd16 r3, r2, r4 + 833 @ 0 "" 2 + 834 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 835 0156 D2FA14F2 qsub16 r2, r2, r4 + 836 @ 0 "" 2 + 837 .thumb + 838 .syntax unified + 839 015a 0468 ldr r4, [r0] @ unaligned + 840 015c D1F800C0 ldr ip, [r1] @ unaligned + 841 .syntax unified + 842 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 843 0160 94FA1CF4 qadd16 r4, r4, ip + 844 @ 0 "" 2 + 845 .thumb + 846 .syntax unified + 847 0164 0193 str r3, [sp, #4] + 848 .syntax unified + 849 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 850 0166 93FA24FC shadd16 ip, r3, r4 + 851 @ 0 "" 2 + 852 .thumb + 853 .syntax unified + 854 016a 049B ldr r3, [sp, #16] + 855 .syntax unified + 856 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 857 016c 9CFA23FC shadd16 ip, ip, r3 + 858 @ 0 "" 2 + 859 .thumb + 860 .syntax unified + 861 0170 C6F800C0 str ip, [r6] @ unaligned + 862 0174 019B ldr r3, [sp, #4] + 863 0176 3E44 add r6, r6, r7 + 864 .syntax unified + 865 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 866 0178 D3FA24F3 shsub16 r3, r3, r4 + 867 @ 0 "" 2 + 868 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 869 017c 49FB03FC smusd ip, r9, r3 + 870 @ 0 "" 2 + 871 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 872 0180 29FB13F3 smuadx r3, r9, r3 + 873 @ 0 "" 2 + 874 .thumb + 875 .syntax unified + 876 0184 03EA0B03 and r3, r3, fp + 877 0188 43EA1C43 orr r3, r3, ip, lsr #16 + 878 018c D0F800C0 ldr ip, [r0] @ unaligned + 879 0190 0360 str r3, [r0] @ unaligned + 880 0192 0C68 ldr r4, [r1] @ unaligned + 881 0194 3844 add r0, r0, r7 + 882 .syntax unified + 883 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 884 0196 DCFA14F4 qsub16 r4, ip, r4 + 885 @ 0 "" 2 + 886 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 887 019a E2FA24F3 shsax r3, r2, r4 + 888 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 16 + + + 889 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 890 019e A2FA24F2 shasx r2, r2, r4 + 891 @ 0 "" 2 + 892 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 893 01a2 4AFB02F4 smusd r4, r10, r2 + 894 @ 0 "" 2 + 895 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 896 01a6 2AFB12F2 smuadx r2, r10, r2 + 897 @ 0 "" 2 + 898 .thumb + 899 .syntax unified + 900 01aa 02EA0B02 and r2, r2, fp + 901 01ae 42EA1442 orr r2, r2, r4, lsr #16 + 902 01b2 2A60 str r2, [r5] @ unaligned + 903 01b4 3D44 add r5, r5, r7 + 904 .syntax unified + 905 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 906 01b6 48FB03F2 smusd r2, r8, r3 + 907 @ 0 "" 2 + 908 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 909 01ba 28FB13F3 smuadx r3, r8, r3 + 910 @ 0 "" 2 + 911 .thumb + 912 .syntax unified + 913 01be 03EA0B03 and r3, r3, fp + 914 01c2 43EA1243 orr r3, r3, r2, lsr #16 + 915 01c6 0B60 str r3, [r1] @ unaligned + 916 01c8 039B ldr r3, [sp, #12] + 917 01ca 9E44 add lr, lr, r3 + 918 01cc 029B ldr r3, [sp, #8] + 919 01ce 7345 cmp r3, lr + 920 01d0 3944 add r1, r1, r7 + 921 01d2 BCD8 bhi .L117 + 922 01d4 099A ldr r2, [sp, #36] + 923 01d6 0B99 ldr r1, [sp, #44] + 924 01d8 059B ldr r3, [sp, #20] + 925 01da 0A44 add r2, r2, r1 + 926 01dc 0992 str r2, [sp, #36] + 927 01de 0D99 ldr r1, [sp, #52] + 928 01e0 089A ldr r2, [sp, #32] + 929 01e2 0A44 add r2, r2, r1 + 930 01e4 0892 str r2, [sp, #32] + 931 01e6 0F99 ldr r1, [sp, #60] + 932 01e8 0A9A ldr r2, [sp, #40] + 933 01ea 0A44 add r2, r2, r1 + 934 01ec 0A92 str r2, [sp, #40] + 935 01ee 079A ldr r2, [sp, #28] + 936 01f0 0432 adds r2, r2, #4 + 937 01f2 0792 str r2, [sp, #28] + 938 01f4 069A ldr r2, [sp, #24] + 939 01f6 0432 adds r2, r2, #4 + 940 01f8 0692 str r2, [sp, #24] + 941 01fa 0E9A ldr r2, [sp, #56] + 942 01fc 0133 adds r3, r3, #1 + 943 01fe 9342 cmp r3, r2 + 944 0200 0593 str r3, [sp, #20] + 945 0202 92D3 bcc .L118 + ARM GAS /tmp/ccFqHvis.s page 17 + + + 946 0204 109A ldr r2, [sp, #64] + 947 0206 0B9B ldr r3, [sp, #44] + 948 0208 042A cmp r2, #4 + 949 020a 3FF66EAF bhi .L119 + 950 020e 139E ldr r6, [sp, #76] + 951 0210 119B ldr r3, [sp, #68] + 952 .L120: + 953 0212 1A68 ldr r2, [r3] @ unaligned + 954 0214 5968 ldr r1, [r3, #4] @ unaligned + 955 0216 9F68 ldr r7, [r3, #8] @ unaligned + 956 0218 DC68 ldr r4, [r3, #12] @ unaligned + 957 .syntax unified + 958 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 959 021a 92FA17F0 qadd16 r0, r2, r7 + 960 @ 0 "" 2 + 961 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 962 021e 91FA14F5 qadd16 r5, r1, r4 + 963 @ 0 "" 2 + 964 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 965 0222 90FA25F5 shadd16 r5, r0, r5 + 966 @ 0 "" 2 + 967 .thumb + 968 .syntax unified + 969 0226 1D60 str r5, [r3] @ unaligned + 970 .syntax unified + 971 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 972 0228 91FA14F5 qadd16 r5, r1, r4 + 973 @ 0 "" 2 + 974 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 975 022c D0FA25F0 shsub16 r0, r0, r5 + 976 @ 0 "" 2 + 977 .thumb + 978 .syntax unified + 979 0230 5860 str r0, [r3, #4] @ unaligned + 980 .syntax unified + 981 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 982 0232 D2FA17F2 qsub16 r2, r2, r7 + 983 @ 0 "" 2 + 984 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 985 0236 D1FA14F1 qsub16 r1, r1, r4 + 986 @ 0 "" 2 + 987 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 988 023a A2FA21F0 shasx r0, r2, r1 + 989 @ 0 "" 2 + 990 .thumb + 991 .syntax unified + 992 023e 9860 str r0, [r3, #8] @ unaligned + 993 .syntax unified + 994 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 995 0240 E2FA21F2 shsax r2, r2, r1 + 996 @ 0 "" 2 + 997 .thumb + 998 .syntax unified + 999 0244 013E subs r6, r6, #1 + 1000 0246 DA60 str r2, [r3, #12] @ unaligned + 1001 0248 03F11003 add r3, r3, #16 + 1002 024c E1D1 bne .L120 + ARM GAS /tmp/ccFqHvis.s page 18 + + + 1003 024e 15B0 add sp, sp, #84 + 1004 @ sp needed + 1005 0250 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1006 .L126: + 1007 0254 1E46 mov r6, r3 + 1008 0256 119B ldr r3, [sp, #68] + 1009 0258 DBE7 b .L120 + 1010 .L129: + 1011 025a 00BF .align 2 + 1012 .L128: + 1013 025c 0000FFFF .word -65536 + 1015 .section .text.arm_radix4_butterfly_q15.constprop.0,"ax",%progbits + 1016 .align 1 + 1017 .p2align 2,,3 + 1018 .syntax unified + 1019 .thumb + 1020 .thumb_func + 1021 .fpu fpv4-sp-d16 + 1023 arm_radix4_butterfly_q15.constprop.0: + 1024 @ args = 0, pretend = 0, frame = 80 + 1025 @ frame_needed = 0, uses_anonymous_args = 0 + 1026 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1027 0004 95B0 sub sp, sp, #84 + 1028 0006 0B46 mov r3, r1 + 1029 0008 0291 str r1, [sp, #8] + 1030 000a 21F00301 bic r1, r1, #3 + 1031 000e 9C08 lsrs r4, r3, #2 + 1032 0010 00EB4105 add r5, r0, r1, lsl #1 + 1033 0014 914F ldr r7, .L144 + 1034 0016 1190 str r0, [sp, #68] + 1035 0018 0646 mov r6, r0 + 1036 001a 9346 mov fp, r2 + 1037 001c 0844 add r0, r0, r1 + 1038 001e 1292 str r2, [sp, #72] + 1039 0020 1394 str r4, [sp, #76] + 1040 0022 2944 add r1, r1, r5 + 1041 0024 9446 mov ip, r2 + 1042 0026 9246 mov r10, r2 + 1043 0028 0023 movs r3, #0 + 1044 .L131: + 1045 002a D6F80090 ldr r9, [r6] @ unaligned + 1046 .syntax unified + 1047 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1048 002e 99FA23F9 shadd16 r9, r9, r3 + 1049 @ 0 "" 2 + 1050 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1051 0032 99FA23F9 shadd16 r9, r9, r3 + 1052 @ 0 "" 2 + 1053 .thumb + 1054 .syntax unified + 1055 0036 2A68 ldr r2, [r5] @ unaligned + 1056 .syntax unified + 1057 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1058 0038 92FA23F2 shadd16 r2, r2, r3 + 1059 @ 0 "" 2 + 1060 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1061 003c 92FA23F2 shadd16 r2, r2, r3 + ARM GAS /tmp/ccFqHvis.s page 19 + + + 1062 @ 0 "" 2 + 1063 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1064 0040 99FA12FE qadd16 lr, r9, r2 + 1065 @ 0 "" 2 + 1066 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1067 0044 D9FA12F9 qsub16 r9, r9, r2 + 1068 @ 0 "" 2 + 1069 .thumb + 1070 .syntax unified + 1071 0048 0268 ldr r2, [r0] @ unaligned + 1072 .syntax unified + 1073 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1074 004a 92FA23F2 shadd16 r2, r2, r3 + 1075 @ 0 "" 2 + 1076 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1077 004e 92FA23F2 shadd16 r2, r2, r3 + 1078 @ 0 "" 2 + 1079 .thumb + 1080 .syntax unified + 1081 0052 D1F80080 ldr r8, [r1] @ unaligned + 1082 .syntax unified + 1083 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1084 0056 98FA23F8 shadd16 r8, r8, r3 + 1085 @ 0 "" 2 + 1086 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1087 005a 98FA23F8 shadd16 r8, r8, r3 + 1088 @ 0 "" 2 + 1089 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1090 005e 92FA18F2 qadd16 r2, r2, r8 + 1091 @ 0 "" 2 + 1092 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1093 0062 9EFA22F8 shadd16 r8, lr, r2 + 1094 @ 0 "" 2 + 1095 .thumb + 1096 .syntax unified + 1097 0066 46F8048B str r8, [r6], #4 @ unaligned + 1098 .syntax unified + 1099 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1100 006a DEFA12FE qsub16 lr, lr, r2 + 1101 @ 0 "" 2 + 1102 .thumb + 1103 .syntax unified + 1104 006e 5BF8102B ldr r2, [fp], #16 @ unaligned + 1105 .syntax unified + 1106 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1107 0072 22FB0EF8 smuad r8, r2, lr + 1108 @ 0 "" 2 + 1109 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1110 0076 42FB1EFE smusdx lr, r2, lr + 1111 @ 0 "" 2 + 1112 .thumb + 1113 .syntax unified + 1114 007a 0268 ldr r2, [r0] @ unaligned + 1115 .syntax unified + 1116 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1117 007c 92FA23F2 shadd16 r2, r2, r3 + 1118 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 20 + + + 1119 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1120 0080 92FA23F2 shadd16 r2, r2, r3 + 1121 @ 0 "" 2 + 1122 .thumb + 1123 .syntax unified + 1124 0084 0EEA070E and lr, lr, r7 + 1125 0088 4EEA184E orr lr, lr, r8, lsr #16 + 1126 008c 40F804EB str lr, [r0], #4 @ unaligned + 1127 0090 D1F800E0 ldr lr, [r1] @ unaligned + 1128 .syntax unified + 1129 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1130 0094 9EFA23FE shadd16 lr, lr, r3 + 1131 @ 0 "" 2 + 1132 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1133 0098 9EFA23FE shadd16 lr, lr, r3 + 1134 @ 0 "" 2 + 1135 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1136 009c D2FA1EF2 qsub16 r2, r2, lr + 1137 @ 0 "" 2 + 1138 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1139 00a0 A9FA12F8 qasx r8, r9, r2 + 1140 @ 0 "" 2 + 1141 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1142 00a4 E9FA12F9 qsax r9, r9, r2 + 1143 @ 0 "" 2 + 1144 .thumb + 1145 .syntax unified + 1146 00a8 5AF8082B ldr r2, [r10], #8 @ unaligned + 1147 .syntax unified + 1148 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1149 00ac 22FB09FE smuad lr, r2, r9 + 1150 @ 0 "" 2 + 1151 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1152 00b0 42FB19F2 smusdx r2, r2, r9 + 1153 @ 0 "" 2 + 1154 .thumb + 1155 .syntax unified + 1156 00b4 3A40 ands r2, r2, r7 + 1157 00b6 42EA1E42 orr r2, r2, lr, lsr #16 + 1158 00ba 45F8042B str r2, [r5], #4 @ unaligned + 1159 00be 5CF8182B ldr r2, [ip], #24 @ unaligned + 1160 .syntax unified + 1161 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1162 00c2 22FB08FE smuad lr, r2, r8 + 1163 @ 0 "" 2 + 1164 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1165 00c6 42FB18F2 smusdx r2, r2, r8 + 1166 @ 0 "" 2 + 1167 .thumb + 1168 .syntax unified + 1169 00ca 3A40 ands r2, r2, r7 + 1170 00cc 42EA1E42 orr r2, r2, lr, lsr #16 + 1171 00d0 013C subs r4, r4, #1 + 1172 00d2 41F8042B str r2, [r1], #4 @ unaligned + 1173 00d6 A8D1 bne .L131 + 1174 00d8 139B ldr r3, [sp, #76] + 1175 00da 042B cmp r3, #4 + ARM GAS /tmp/ccFqHvis.s page 21 + + + 1176 00dc 40F2BA80 bls .L142 + 1177 00e0 DFF878B1 ldr fp, .L144 + 1178 00e4 1093 str r3, [sp, #64] + 1179 00e6 0494 str r4, [sp, #16] + 1180 00e8 0823 movs r3, #8 + 1181 .L135: + 1182 00ea 1099 ldr r1, [sp, #64] + 1183 00ec 0391 str r1, [sp, #12] + 1184 00ee 0A46 mov r2, r1 + 1185 00f0 9700 lsls r7, r2, #2 + 1186 00f2 029A ldr r2, [sp, #8] + 1187 00f4 8908 lsrs r1, r1, #2 + 1188 00f6 8A42 cmp r2, r1 + 1189 00f8 28BF it cs + 1190 00fa 0A46 movcs r2, r1 + 1191 00fc 0E92 str r2, [sp, #56] + 1192 00fe 03EB4302 add r2, r3, r3, lsl #1 + 1193 0102 9200 lsls r2, r2, #2 + 1194 0104 0F92 str r2, [sp, #60] + 1195 0106 9A00 lsls r2, r3, #2 + 1196 0108 DB00 lsls r3, r3, #3 + 1197 010a 0D93 str r3, [sp, #52] + 1198 010c 119B ldr r3, [sp, #68] + 1199 010e 0793 str r3, [sp, #28] + 1200 0110 03EBC103 add r3, r3, r1, lsl #3 + 1201 0114 0693 str r3, [sp, #24] + 1202 0116 129B ldr r3, [sp, #72] + 1203 0118 0A93 str r3, [sp, #40] + 1204 011a CDE90833 strd r3, r3, [sp, #32] + 1205 011e 8800 lsls r0, r1, #2 + 1206 0120 0023 movs r3, #0 + 1207 0122 1091 str r1, [sp, #64] + 1208 0124 0C90 str r0, [sp, #48] + 1209 0126 0B92 str r2, [sp, #44] + 1210 0128 0593 str r3, [sp, #20] + 1211 .L134: + 1212 012a 099B ldr r3, [sp, #36] + 1213 012c 079A ldr r2, [sp, #28] + 1214 012e D3F800A0 ldr r10, [r3] @ unaligned + 1215 0132 089B ldr r3, [sp, #32] + 1216 0134 DDF814E0 ldr lr, [sp, #20] + 1217 0138 D3F80090 ldr r9, [r3] @ unaligned + 1218 013c 0A9B ldr r3, [sp, #40] + 1219 013e D3F80080 ldr r8, [r3] @ unaligned + 1220 0142 0C9B ldr r3, [sp, #48] + 1221 0144 1646 mov r6, r2 + 1222 0146 9818 adds r0, r3, r2 + 1223 0148 069A ldr r2, [sp, #24] + 1224 014a 1546 mov r5, r2 + 1225 014c 9918 adds r1, r3, r2 + 1226 .L133: + 1227 014e 3268 ldr r2, [r6] @ unaligned + 1228 0150 2C68 ldr r4, [r5] @ unaligned + 1229 .syntax unified + 1230 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1231 0152 92FA14F3 qadd16 r3, r2, r4 + 1232 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 22 + + + 1233 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1234 0156 D2FA14F2 qsub16 r2, r2, r4 + 1235 @ 0 "" 2 + 1236 .thumb + 1237 .syntax unified + 1238 015a 0468 ldr r4, [r0] @ unaligned + 1239 015c D1F800C0 ldr ip, [r1] @ unaligned + 1240 .syntax unified + 1241 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1242 0160 94FA1CF4 qadd16 r4, r4, ip + 1243 @ 0 "" 2 + 1244 .thumb + 1245 .syntax unified + 1246 0164 0193 str r3, [sp, #4] + 1247 .syntax unified + 1248 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1249 0166 93FA24FC shadd16 ip, r3, r4 + 1250 @ 0 "" 2 + 1251 .thumb + 1252 .syntax unified + 1253 016a 049B ldr r3, [sp, #16] + 1254 .syntax unified + 1255 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1256 016c 9CFA23FC shadd16 ip, ip, r3 + 1257 @ 0 "" 2 + 1258 .thumb + 1259 .syntax unified + 1260 0170 C6F800C0 str ip, [r6] @ unaligned + 1261 0174 019B ldr r3, [sp, #4] + 1262 0176 3E44 add r6, r6, r7 + 1263 .syntax unified + 1264 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1265 0178 D3FA24F3 shsub16 r3, r3, r4 + 1266 @ 0 "" 2 + 1267 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1268 017c 29FB03FC smuad ip, r9, r3 + 1269 @ 0 "" 2 + 1270 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1271 0180 49FB13F3 smusdx r3, r9, r3 + 1272 @ 0 "" 2 + 1273 .thumb + 1274 .syntax unified + 1275 0184 03EA0B03 and r3, r3, fp + 1276 0188 43EA1C43 orr r3, r3, ip, lsr #16 + 1277 018c D0F800C0 ldr ip, [r0] @ unaligned + 1278 0190 0360 str r3, [r0] @ unaligned + 1279 0192 0C68 ldr r4, [r1] @ unaligned + 1280 0194 3844 add r0, r0, r7 + 1281 .syntax unified + 1282 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1283 0196 DCFA14F4 qsub16 r4, ip, r4 + 1284 @ 0 "" 2 + 1285 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1286 019a A2FA24F3 shasx r3, r2, r4 + 1287 @ 0 "" 2 + 1288 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1289 019e E2FA24F2 shsax r2, r2, r4 + ARM GAS /tmp/ccFqHvis.s page 23 + + + 1290 @ 0 "" 2 + 1291 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1292 01a2 2AFB02F4 smuad r4, r10, r2 + 1293 @ 0 "" 2 + 1294 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1295 01a6 4AFB12F2 smusdx r2, r10, r2 + 1296 @ 0 "" 2 + 1297 .thumb + 1298 .syntax unified + 1299 01aa 02EA0B02 and r2, r2, fp + 1300 01ae 42EA1442 orr r2, r2, r4, lsr #16 + 1301 01b2 2A60 str r2, [r5] @ unaligned + 1302 01b4 3D44 add r5, r5, r7 + 1303 .syntax unified + 1304 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1305 01b6 28FB03F2 smuad r2, r8, r3 + 1306 @ 0 "" 2 + 1307 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1308 01ba 48FB13F3 smusdx r3, r8, r3 + 1309 @ 0 "" 2 + 1310 .thumb + 1311 .syntax unified + 1312 01be 03EA0B03 and r3, r3, fp + 1313 01c2 43EA1243 orr r3, r3, r2, lsr #16 + 1314 01c6 0B60 str r3, [r1] @ unaligned + 1315 01c8 039B ldr r3, [sp, #12] + 1316 01ca 9E44 add lr, lr, r3 + 1317 01cc 029B ldr r3, [sp, #8] + 1318 01ce 7345 cmp r3, lr + 1319 01d0 3944 add r1, r1, r7 + 1320 01d2 BCD8 bhi .L133 + 1321 01d4 099A ldr r2, [sp, #36] + 1322 01d6 0B99 ldr r1, [sp, #44] + 1323 01d8 059B ldr r3, [sp, #20] + 1324 01da 0A44 add r2, r2, r1 + 1325 01dc 0992 str r2, [sp, #36] + 1326 01de 0D99 ldr r1, [sp, #52] + 1327 01e0 089A ldr r2, [sp, #32] + 1328 01e2 0A44 add r2, r2, r1 + 1329 01e4 0892 str r2, [sp, #32] + 1330 01e6 0F99 ldr r1, [sp, #60] + 1331 01e8 0A9A ldr r2, [sp, #40] + 1332 01ea 0A44 add r2, r2, r1 + 1333 01ec 0A92 str r2, [sp, #40] + 1334 01ee 079A ldr r2, [sp, #28] + 1335 01f0 0432 adds r2, r2, #4 + 1336 01f2 0792 str r2, [sp, #28] + 1337 01f4 069A ldr r2, [sp, #24] + 1338 01f6 0432 adds r2, r2, #4 + 1339 01f8 0692 str r2, [sp, #24] + 1340 01fa 0E9A ldr r2, [sp, #56] + 1341 01fc 0133 adds r3, r3, #1 + 1342 01fe 9342 cmp r3, r2 + 1343 0200 0593 str r3, [sp, #20] + 1344 0202 92D3 bcc .L134 + 1345 0204 109A ldr r2, [sp, #64] + 1346 0206 0B9B ldr r3, [sp, #44] + ARM GAS /tmp/ccFqHvis.s page 24 + + + 1347 0208 042A cmp r2, #4 + 1348 020a 3FF66EAF bhi .L135 + 1349 020e 139E ldr r6, [sp, #76] + 1350 0210 119B ldr r3, [sp, #68] + 1351 .L136: + 1352 0212 1A68 ldr r2, [r3] @ unaligned + 1353 0214 5968 ldr r1, [r3, #4] @ unaligned + 1354 0216 9F68 ldr r7, [r3, #8] @ unaligned + 1355 0218 DC68 ldr r4, [r3, #12] @ unaligned + 1356 .syntax unified + 1357 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1358 021a 92FA17F0 qadd16 r0, r2, r7 + 1359 @ 0 "" 2 + 1360 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1361 021e 91FA14F5 qadd16 r5, r1, r4 + 1362 @ 0 "" 2 + 1363 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1364 0222 90FA25F5 shadd16 r5, r0, r5 + 1365 @ 0 "" 2 + 1366 .thumb + 1367 .syntax unified + 1368 0226 1D60 str r5, [r3] @ unaligned + 1369 .syntax unified + 1370 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1371 0228 91FA14F5 qadd16 r5, r1, r4 + 1372 @ 0 "" 2 + 1373 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1374 022c D0FA25F0 shsub16 r0, r0, r5 + 1375 @ 0 "" 2 + 1376 .thumb + 1377 .syntax unified + 1378 0230 5860 str r0, [r3, #4] @ unaligned + 1379 .syntax unified + 1380 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1381 0232 D2FA17F2 qsub16 r2, r2, r7 + 1382 @ 0 "" 2 + 1383 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1384 0236 D1FA14F1 qsub16 r1, r1, r4 + 1385 @ 0 "" 2 + 1386 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1387 023a E2FA21F0 shsax r0, r2, r1 + 1388 @ 0 "" 2 + 1389 .thumb + 1390 .syntax unified + 1391 023e 9860 str r0, [r3, #8] @ unaligned + 1392 .syntax unified + 1393 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1394 0240 A2FA21F2 shasx r2, r2, r1 + 1395 @ 0 "" 2 + 1396 .thumb + 1397 .syntax unified + 1398 0244 013E subs r6, r6, #1 + 1399 0246 DA60 str r2, [r3, #12] @ unaligned + 1400 0248 03F11003 add r3, r3, #16 + 1401 024c E1D1 bne .L136 + 1402 024e 15B0 add sp, sp, #84 + 1403 @ sp needed + ARM GAS /tmp/ccFqHvis.s page 25 + + + 1404 0250 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1405 .L142: + 1406 0254 1E46 mov r6, r3 + 1407 0256 119B ldr r3, [sp, #68] + 1408 0258 DBE7 b .L136 + 1409 .L145: + 1410 025a 00BF .align 2 + 1411 .L144: + 1412 025c 0000FFFF .word -65536 + 1414 .section .text.arm_bitreversal_f32,"ax",%progbits + 1415 .align 1 + 1416 .p2align 2,,3 + 1417 .global arm_bitreversal_f32 + 1418 .syntax unified + 1419 .thumb + 1420 .thumb_func + 1421 .fpu fpv4-sp-d16 + 1423 arm_bitreversal_f32: + 1424 @ args = 0, pretend = 0, frame = 16 + 1425 @ frame_needed = 0, uses_anonymous_args = 0 + 1426 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1427 0004 4908 lsrs r1, r1, #1 + 1428 0006 012A cmp r2, #1 + 1429 0008 85B0 sub sp, sp, #20 + 1430 000a 01F10105 add r5, r1, #1 + 1431 000e A1F1020A sub r10, r1, #2 + 1432 0012 4FEA420B lsl fp, r2, #1 + 1433 0016 56D1 bne .L153 + 1434 0018 0024 movs r4, #0 + 1435 001a 2746 mov r7, r4 + 1436 001c 2246 mov r2, r4 + 1437 .L148: + 1438 001e 0134 adds r4, r4, #1 + 1439 0020 5618 adds r6, r2, r1 + 1440 0022 00EBC40C add ip, r0, r4, lsl #3 + 1441 0026 00EBC602 add r2, r0, r6, lsl #3 + 1442 002a DCF800E0 ldr lr, [ip] @ float + 1443 002e D2F80080 ldr r8, [r2] @ float + 1444 0032 CCF80080 str r8, [ip] @ float + 1445 0036 0237 adds r7, r7, #2 + 1446 0038 C2F800E0 str lr, [r2] @ float + 1447 003c 6446 mov r4, ip + 1448 003e BFB2 uxth r7, r7 + 1449 0040 1646 mov r6, r2 + 1450 0042 DCF804E0 ldr lr, [ip, #4] @ float + 1451 0046 5268 ldr r2, [r2, #4] @ float + 1452 0048 6260 str r2, [r4, #4] @ float + 1453 004a BA45 cmp r10, r7 + 1454 004c 1A88 ldrh r2, [r3] + 1455 004e C6F804E0 str lr, [r6, #4] @ float + 1456 0052 00EBC70C add ip, r0, r7, lsl #3 + 1457 0056 5B44 add r3, r3, fp + 1458 0058 3C46 mov r4, r7 + 1459 005a 31D3 bcc .L146 + 1460 005c 9742 cmp r7, r2 + 1461 005e DED2 bcs .L148 + 1462 0060 00EBC206 add r6, r0, r2, lsl #3 + ARM GAS /tmp/ccFqHvis.s page 26 + + + 1463 0064 DCF800E0 ldr lr, [ip] @ float + 1464 0068 D6F80080 ldr r8, [r6] @ float + 1465 006c CCF80080 str r8, [ip] @ float + 1466 0070 C6F800E0 str lr, [r6] @ float + 1467 0074 00EBC206 add r6, r0, r2, lsl #3 + 1468 0078 DCF804E0 ldr lr, [ip, #4] @ float + 1469 007c D6F80480 ldr r8, [r6, #4] @ float + 1470 0080 CCF80480 str r8, [ip, #4] @ float + 1471 0084 0CF1040C add ip, ip, #4 + 1472 0088 C6F804E0 str lr, [r6, #4] @ float + 1473 008c 02EB050C add ip, r2, r5 + 1474 0090 7E19 adds r6, r7, r5 + 1475 0092 00EBC608 add r8, r0, r6, lsl #3 + 1476 0096 00EBCC0E add lr, r0, ip, lsl #3 + 1477 009a DEED007A vldr.32 s15, [lr] + 1478 009e D8F80090 ldr r9, [r8] @ float + 1479 00a2 C8ED007A vstr.32 s15, [r8] + 1480 00a6 F446 mov ip, lr + 1481 00a8 CEF80090 str r9, [lr] @ float + 1482 00ac 4646 mov r6, r8 + 1483 00ae D8F804E0 ldr lr, [r8, #4] @ float + 1484 00b2 DCF80480 ldr r8, [ip, #4] @ float + 1485 00b6 C6F80480 str r8, [r6, #4] @ float + 1486 00ba CCF804E0 str lr, [ip, #4] @ float + 1487 00be AEE7 b .L148 + 1488 .L146: + 1489 00c0 05B0 add sp, sp, #20 + 1490 @ sp needed + 1491 00c2 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1492 .L153: + 1493 00c6 0022 movs r2, #0 + 1494 00c8 1446 mov r4, r2 + 1495 00ca 9446 mov ip, r2 + 1496 00cc 0391 str r1, [sp, #12] + 1497 .L147: + 1498 00ce 0399 ldr r1, [sp, #12] + 1499 00d0 0CF1020C add ip, ip, #2 + 1500 00d4 1FFA8CFC uxth ip, ip + 1501 00d8 0A44 add r2, r2, r1 + 1502 00da 0134 adds r4, r4, #1 + 1503 00dc 00EBCC09 add r9, r0, ip, lsl #3 + 1504 00e0 00EBC40E add lr, r0, r4, lsl #3 + 1505 00e4 00EBC207 add r7, r0, r2, lsl #3 + 1506 00e8 4E46 mov r6, r9 + 1507 00ea D7ED007A vldr.32 s15, [r7] + 1508 00ee DEF80080 ldr r8, [lr] @ float + 1509 00f2 CEED007A vstr.32 s15, [lr] + 1510 00f6 0436 adds r6, r6, #4 + 1511 00f8 3146 mov r1, r6 + 1512 00fa 0CEB0506 add r6, ip, r5 + 1513 00fe C7F80080 str r8, [r7] @ float + 1514 0102 3A46 mov r2, r7 + 1515 0104 00EBC607 add r7, r0, r6, lsl #3 + 1516 0108 3E46 mov r6, r7 + 1517 010a 0436 adds r6, r6, #4 + 1518 010c 0197 str r7, [sp, #4] + 1519 010e 0296 str r6, [sp, #8] + ARM GAS /tmp/ccFqHvis.s page 27 + + + 1520 0110 5768 ldr r7, [r2, #4] @ float + 1521 0112 DEF80460 ldr r6, [lr, #4] @ float + 1522 0116 CEF80470 str r7, [lr, #4] @ float + 1523 011a 5660 str r6, [r2, #4] @ float + 1524 011c 1A88 ldrh r2, [r3] + 1525 011e 5619 adds r6, r2, r5 + 1526 0120 00EBC208 add r8, r0, r2, lsl #3 + 1527 0124 00EBC60E add lr, r0, r6, lsl #3 + 1528 0128 4746 mov r7, r8 + 1529 012a 7646 mov r6, lr + 1530 012c D445 cmp ip, r10 + 1531 012e 5B44 add r3, r3, fp + 1532 0130 07F10407 add r7, r7, #4 + 1533 0134 06F10406 add r6, r6, #4 + 1534 0138 6446 mov r4, ip + 1535 013a C1D8 bhi .L146 + 1536 013c 6245 cmp r2, ip + 1537 013e C6D9 bls .L147 + 1538 0140 D9ED007A vldr.32 s15, [r9] + 1539 0144 98ED007A vldr.32 s14, [r8] + 1540 0148 89ED007A vstr.32 s14, [r9] + 1541 014c C8ED007A vstr.32 s15, [r8] + 1542 0150 D1F80080 ldr r8, [r1] @ float + 1543 0154 D7F80090 ldr r9, [r7] @ float + 1544 0158 C1F80090 str r9, [r1] @ float + 1545 015c C7F80080 str r8, [r7] @ float + 1546 0160 0199 ldr r1, [sp, #4] + 1547 0162 DEF80080 ldr r8, [lr] @ float + 1548 0166 0F68 ldr r7, [r1] @ float + 1549 0168 C1F80080 str r8, [r1] @ float + 1550 016c 0299 ldr r1, [sp, #8] + 1551 016e CEF80070 str r7, [lr] @ float + 1552 0172 0F68 ldr r7, [r1] @ float + 1553 0174 D6F800E0 ldr lr, [r6] @ float + 1554 0178 C1F800E0 str lr, [r1] @ float + 1555 017c 3760 str r7, [r6] @ float + 1556 017e A6E7 b .L147 + 1558 .section .text.arm_bitreversal_q31,"ax",%progbits + 1559 .align 1 + 1560 .p2align 2,,3 + 1561 .global arm_bitreversal_q31 + 1562 .syntax unified + 1563 .thumb + 1564 .thumb_func + 1565 .fpu fpv4-sp-d16 + 1567 arm_bitreversal_q31: + 1568 @ args = 0, pretend = 0, frame = 0 + 1569 @ frame_needed = 0, uses_anonymous_args = 0 + 1570 0000 4908 lsrs r1, r1, #1 + 1571 0002 012A cmp r2, #1 + 1572 0004 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1573 0008 4FEA420C lsl ip, r2, #1 + 1574 000c 01F1010B add fp, r1, #1 + 1575 0010 A1F1020E sub lr, r1, #2 + 1576 0014 44D1 bne .L167 + 1577 0016 0025 movs r5, #0 + 1578 0018 0246 mov r2, r0 + ARM GAS /tmp/ccFqHvis.s page 28 + + + 1579 001a 00EBC107 add r7, r0, r1, lsl #3 + 1580 001e A846 mov r8, r5 + 1581 0020 21E0 b .L162 + 1582 .L168: + 1583 0022 4545 cmp r5, r8 + 1584 0024 1DD2 bcs .L161 + 1585 0026 50F83860 ldr r6, [r0, r8, lsl #3] + 1586 002a 1469 ldr r4, [r2, #16] + 1587 002c 1661 str r6, [r2, #16] + 1588 002e 40F83840 str r4, [r0, r8, lsl #3] + 1589 0032 5469 ldr r4, [r2, #20] + 1590 0034 50F80A60 ldr r6, [r0, r10] + 1591 0038 5661 str r6, [r2, #20] + 1592 003a 0BEB0809 add r9, fp, r8 + 1593 003e 40F80A40 str r4, [r0, r10] + 1594 0042 BC69 ldr r4, [r7, #24] + 1595 0044 50F83960 ldr r6, [r0, r9, lsl #3] + 1596 0048 BE61 str r6, [r7, #24] + 1597 004a 40F83940 str r4, [r0, r9, lsl #3] + 1598 004e 4FEAC909 lsl r9, r9, #3 + 1599 0052 09F10409 add r9, r9, #4 + 1600 0056 FC69 ldr r4, [r7, #28] + 1601 0058 50F80960 ldr r6, [r0, r9] + 1602 005c FE61 str r6, [r7, #28] + 1603 005e 40F80940 str r4, [r0, r9] + 1604 .L161: + 1605 0062 1032 adds r2, r2, #16 + 1606 0064 1037 adds r7, r7, #16 + 1607 .L162: + 1608 0066 8844 add r8, r8, r1 + 1609 0068 9468 ldr r4, [r2, #8] + 1610 006a 50F83860 ldr r6, [r0, r8, lsl #3] + 1611 006e 9660 str r6, [r2, #8] + 1612 0070 4FEAC809 lsl r9, r8, #3 + 1613 0074 40F83840 str r4, [r0, r8, lsl #3] + 1614 0078 09F10409 add r9, r9, #4 + 1615 007c B3F80080 ldrh r8, [r3] + 1616 0080 D468 ldr r4, [r2, #12] + 1617 0082 50F80960 ldr r6, [r0, r9] + 1618 0086 D660 str r6, [r2, #12] + 1619 0088 0235 adds r5, r5, #2 + 1620 008a 4FEAC80A lsl r10, r8, #3 + 1621 008e AE45 cmp lr, r5 + 1622 0090 40F80940 str r4, [r0, r9] + 1623 0094 0AF1040A add r10, r10, #4 + 1624 0098 6344 add r3, r3, ip + 1625 009a C2D2 bcs .L168 + 1626 009c BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1627 .L167: + 1628 00a0 0024 movs r4, #0 + 1629 00a2 0246 mov r2, r0 + 1630 00a4 00EBC105 add r5, r0, r1, lsl #3 + 1631 00a8 2746 mov r7, r4 + 1632 00aa 29E0 b .L159 + 1633 .L163: + 1634 00ac A742 cmp r7, r4 + 1635 00ae 25D9 bls .L158 + ARM GAS /tmp/ccFqHvis.s page 29 + + + 1636 00b0 50F83760 ldr r6, [r0, r7, lsl #3] + 1637 00b4 D2F81080 ldr r8, [r2, #16] + 1638 00b8 1661 str r6, [r2, #16] + 1639 00ba 40F83780 str r8, [r0, r7, lsl #3] + 1640 00be 4FEAC708 lsl r8, r7, #3 + 1641 00c2 08F10408 add r8, r8, #4 + 1642 00c6 D2F81490 ldr r9, [r2, #20] + 1643 00ca 50F80860 ldr r6, [r0, r8] + 1644 00ce 5661 str r6, [r2, #20] + 1645 00d0 40F80890 str r9, [r0, r8] + 1646 00d4 0BEB0708 add r8, fp, r7 + 1647 00d8 D5F81890 ldr r9, [r5, #24] + 1648 00dc 50F83860 ldr r6, [r0, r8, lsl #3] + 1649 00e0 AE61 str r6, [r5, #24] + 1650 00e2 40F83890 str r9, [r0, r8, lsl #3] + 1651 00e6 4FEAC808 lsl r8, r8, #3 + 1652 00ea 08F10408 add r8, r8, #4 + 1653 00ee D5F81C90 ldr r9, [r5, #28] + 1654 00f2 50F80860 ldr r6, [r0, r8] + 1655 00f6 EE61 str r6, [r5, #28] + 1656 00f8 40F80890 str r9, [r0, r8] + 1657 .L158: + 1658 00fc 1032 adds r2, r2, #16 + 1659 00fe 1035 adds r5, r5, #16 + 1660 .L159: + 1661 0100 0F44 add r7, r7, r1 + 1662 0102 D2F80880 ldr r8, [r2, #8] + 1663 0106 50F83760 ldr r6, [r0, r7, lsl #3] + 1664 010a 9660 str r6, [r2, #8] + 1665 010c 40F83780 str r8, [r0, r7, lsl #3] + 1666 0110 FF00 lsls r7, r7, #3 + 1667 0112 0437 adds r7, r7, #4 + 1668 0114 0234 adds r4, r4, #2 + 1669 0116 C659 ldr r6, [r0, r7] + 1670 0118 D2F80C80 ldr r8, [r2, #12] + 1671 011c D660 str r6, [r2, #12] + 1672 011e 7445 cmp r4, lr + 1673 0120 40F80780 str r8, [r0, r7] + 1674 0124 1F88 ldrh r7, [r3] + 1675 0126 6344 add r3, r3, ip + 1676 0128 C0D9 bls .L163 + 1677 012a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1679 012e 00BF .section .text.arm_bitreversal_q15,"ax",%progbits + 1680 .align 1 + 1681 .p2align 2,,3 + 1682 .global arm_bitreversal_q15 + 1683 .syntax unified + 1684 .thumb + 1685 .thumb_func + 1686 .fpu fpv4-sp-d16 + 1688 arm_bitreversal_q15: + 1689 @ args = 0, pretend = 0, frame = 0 + 1690 @ frame_needed = 0, uses_anonymous_args = 0 + 1691 0000 4908 lsrs r1, r1, #1 + 1692 0002 012A cmp r2, #1 + 1693 0004 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1694 0008 01F1010B add fp, r1, #1 + ARM GAS /tmp/ccFqHvis.s page 30 + + + 1695 000c A1F10204 sub r4, r1, #2 + 1696 0010 4FEA4205 lsl r5, r2, #1 + 1697 0014 38D1 bne .L182 + 1698 0016 4268 ldr r2, [r0, #4] + 1699 0018 50F82170 ldr r7, [r0, r1, lsl #2] + 1700 001c 4760 str r7, [r0, #4] + 1701 001e 012C cmp r4, #1 + 1702 0020 40F82120 str r2, [r0, r1, lsl #2] + 1703 0024 03EB050E add lr, r3, r5 + 1704 0028 1A88 ldrh r2, [r3] + 1705 002a 00EB8108 add r8, r0, r1, lsl #2 + 1706 002e 29D9 bls .L169 + 1707 0030 08F10408 add r8, r8, #4 + 1708 0034 8446 mov ip, r0 + 1709 0036 0223 movs r3, #2 + 1710 .L176: + 1711 0038 9342 cmp r3, r2 + 1712 003a 01EB0207 add r7, r1, r2 + 1713 003e 0BEB0209 add r9, fp, r2 + 1714 0042 0FD2 bcs .L175 + 1715 0044 50F82260 ldr r6, [r0, r2, lsl #2] + 1716 0048 DCF808A0 ldr r10, [ip, #8] + 1717 004c CCF80860 str r6, [ip, #8] + 1718 0050 40F822A0 str r10, [r0, r2, lsl #2] + 1719 0054 58F82320 ldr r2, [r8, r3, lsl #2] + 1720 0058 50F82960 ldr r6, [r0, r9, lsl #2] + 1721 005c 48F82360 str r6, [r8, r3, lsl #2] + 1722 0060 40F82920 str r2, [r0, r9, lsl #2] + 1723 .L175: + 1724 0064 0233 adds r3, r3, #2 + 1725 0066 DCF80C90 ldr r9, [ip, #12] + 1726 006a 50F82720 ldr r2, [r0, r7, lsl #2] + 1727 006e CCF80C20 str r2, [ip, #12] + 1728 0072 A342 cmp r3, r4 + 1729 0074 BEF80020 ldrh r2, [lr] + 1730 0078 40F82790 str r9, [r0, r7, lsl #2] + 1731 007c AE44 add lr, lr, r5 + 1732 007e 0CF1080C add ip, ip, #8 + 1733 0082 D9D9 bls .L176 + 1734 .L169: + 1735 0084 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1736 .L182: + 1737 0088 4268 ldr r2, [r0, #4] + 1738 008a 50F82170 ldr r7, [r0, r1, lsl #2] + 1739 008e 4760 str r7, [r0, #4] + 1740 0090 012C cmp r4, #1 + 1741 0092 40F82120 str r2, [r0, r1, lsl #2] + 1742 0096 03EB050E add lr, r3, r5 + 1743 009a 1A88 ldrh r2, [r3] + 1744 009c 00EB8108 add r8, r0, r1, lsl #2 + 1745 00a0 F0D9 bls .L169 + 1746 00a2 08F10408 add r8, r8, #4 + 1747 00a6 8446 mov ip, r0 + 1748 00a8 0227 movs r7, #2 + 1749 .L173: + 1750 00aa BA42 cmp r2, r7 + 1751 00ac 0BEB0209 add r9, fp, r2 + ARM GAS /tmp/ccFqHvis.s page 31 + + + 1752 00b0 0FD9 bls .L172 + 1753 00b2 DCF80830 ldr r3, [ip, #8] + 1754 00b6 50F82260 ldr r6, [r0, r2, lsl #2] + 1755 00ba CCF80860 str r6, [ip, #8] + 1756 00be 40F82230 str r3, [r0, r2, lsl #2] + 1757 00c2 58F82730 ldr r3, [r8, r7, lsl #2] + 1758 00c6 50F82960 ldr r6, [r0, r9, lsl #2] + 1759 00ca 48F82760 str r6, [r8, r7, lsl #2] + 1760 00ce 40F82930 str r3, [r0, r9, lsl #2] + 1761 .L172: + 1762 00d2 0A44 add r2, r2, r1 + 1763 00d4 0237 adds r7, r7, #2 + 1764 00d6 DCF80C30 ldr r3, [ip, #12] + 1765 00da 50F82260 ldr r6, [r0, r2, lsl #2] + 1766 00de CCF80C60 str r6, [ip, #12] + 1767 00e2 A742 cmp r7, r4 + 1768 00e4 40F82230 str r3, [r0, r2, lsl #2] + 1769 00e8 0CF1080C add ip, ip, #8 + 1770 00ec BEF80020 ldrh r2, [lr] + 1771 00f0 AE44 add lr, lr, r5 + 1772 00f2 DAD9 bls .L173 + 1773 00f4 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1775 .section .text.arm_bitreversal_64,"ax",%progbits + 1776 .align 1 + 1777 .p2align 2,,3 + 1778 .global arm_bitreversal_64 + 1779 .syntax unified + 1780 .thumb + 1781 .thumb_func + 1782 .fpu fpv4-sp-d16 + 1784 arm_bitreversal_64: + 1785 @ args = 0, pretend = 0, frame = 0 + 1786 @ frame_needed = 0, uses_anonymous_args = 0 + 1787 0000 59B3 cbz r1, .L188 + 1788 0002 0139 subs r1, r1, #1 + 1789 0004 10B5 push {r4, lr} + 1790 0006 4908 lsrs r1, r1, #1 + 1791 0008 141D adds r4, r2, #4 + 1792 000a 9446 mov ip, r2 + 1793 000c 04EB8104 add r4, r4, r1, lsl #2 + 1794 .L185: + 1795 0010 BCF80020 ldrh r2, [ip] + 1796 0014 BCF80230 ldrh r3, [ip, #2] + 1797 0018 9208 lsrs r2, r2, #2 + 1798 001a 9B08 lsrs r3, r3, #2 + 1799 001c 00EBC20E add lr, r0, r2, lsl #3 + 1800 0020 00EBC301 add r1, r0, r3, lsl #3 + 1801 0024 9EED007B vldr.64 d7, [lr] @ int + 1802 0028 91ED006B vldr.64 d6, [r1] @ int + 1803 002c 8EED006B vstr.64 d6, [lr] @ int + 1804 0030 81ED007B vstr.64 d7, [r1] @ int + 1805 0034 0132 adds r2, r2, #1 + 1806 0036 0133 adds r3, r3, #1 + 1807 0038 00EBC202 add r2, r0, r2, lsl #3 + 1808 003c 00EBC303 add r3, r0, r3, lsl #3 + 1809 0040 92ED007B vldr.64 d7, [r2] @ int + 1810 0044 93ED006B vldr.64 d6, [r3] @ int + ARM GAS /tmp/ccFqHvis.s page 32 + + + 1811 0048 0CF1040C add ip, ip, #4 + 1812 004c 6445 cmp r4, ip + 1813 004e 82ED006B vstr.64 d6, [r2] @ int + 1814 0052 83ED007B vstr.64 d7, [r3] @ int + 1815 0056 DBD1 bne .L185 + 1816 0058 10BD pop {r4, pc} + 1817 .L188: + 1818 005a 7047 bx lr + 1820 .section .text.arm_bitreversal_32,"ax",%progbits + 1821 .align 1 + 1822 .p2align 2,,3 + 1823 .global arm_bitreversal_32 + 1824 .syntax unified + 1825 .thumb + 1826 .thumb_func + 1827 .fpu fpv4-sp-d16 + 1829 arm_bitreversal_32: + 1830 @ args = 0, pretend = 0, frame = 0 + 1831 @ frame_needed = 0, uses_anonymous_args = 0 + 1832 0000 11B3 cbz r1, .L199 + 1833 0002 70B5 push {r4, r5, r6, lr} + 1834 0004 4FF0000E mov lr, #0 + 1835 0008 951C adds r5, r2, #2 + 1836 .L193: + 1837 000a 32F81EC0 ldrh ip, [r2, lr, lsl #1] + 1838 000e 35F81E30 ldrh r3, [r5, lr, lsl #1] + 1839 0012 4FEA9C0C lsr ip, ip, #2 + 1840 0016 9B08 lsrs r3, r3, #2 + 1841 0018 50F82C60 ldr r6, [r0, ip, lsl #2] + 1842 001c 50F82340 ldr r4, [r0, r3, lsl #2] + 1843 0020 40F82C40 str r4, [r0, ip, lsl #2] + 1844 0024 40F82360 str r6, [r0, r3, lsl #2] + 1845 0028 0CF1010C add ip, ip, #1 + 1846 002c 0133 adds r3, r3, #1 + 1847 002e 0EF1020E add lr, lr, #2 + 1848 0032 50F82C40 ldr r4, [r0, ip, lsl #2] + 1849 0036 50F82360 ldr r6, [r0, r3, lsl #2] + 1850 003a 40F82C60 str r6, [r0, ip, lsl #2] + 1851 003e 8E45 cmp lr, r1 + 1852 0040 40F82340 str r4, [r0, r3, lsl #2] + 1853 0044 E1D3 bcc .L193 + 1854 0046 70BD pop {r4, r5, r6, pc} + 1855 .L199: + 1856 0048 7047 bx lr + 1858 004a 00BF .section .text.arm_bitreversal_16,"ax",%progbits + 1859 .align 1 + 1860 .p2align 2,,3 + 1861 .global arm_bitreversal_16 + 1862 .syntax unified + 1863 .thumb + 1864 .thumb_func + 1865 .fpu fpv4-sp-d16 + 1867 arm_bitreversal_16: + 1868 @ args = 0, pretend = 0, frame = 0 + 1869 @ frame_needed = 0, uses_anonymous_args = 0 + 1870 0000 21B3 cbz r1, .L210 + 1871 0002 30B5 push {r4, r5, lr} + ARM GAS /tmp/ccFqHvis.s page 33 + + + 1872 0004 4FF0000E mov lr, #0 + 1873 .L204: + 1874 0008 02EB4E03 add r3, r2, lr, lsl #1 + 1875 000c 32F81EC0 ldrh ip, [r2, lr, lsl #1] + 1876 0010 5B88 ldrh r3, [r3, #2] + 1877 0012 4FEA9C0C lsr ip, ip, #2 + 1878 0016 9B08 lsrs r3, r3, #2 + 1879 0018 30F81C40 ldrh r4, [r0, ip, lsl #1] + 1880 001c 30F81350 ldrh r5, [r0, r3, lsl #1] + 1881 0020 20F81C50 strh r5, [r0, ip, lsl #1] @ movhi + 1882 0024 0EF1020E add lr, lr, #2 + 1883 0028 20F81340 strh r4, [r0, r3, lsl #1] @ movhi + 1884 002c 0CF1010C add ip, ip, #1 + 1885 0030 0133 adds r3, r3, #1 + 1886 0032 1FFA8EFE uxth lr, lr + 1887 0036 30F81C40 ldrh r4, [r0, ip, lsl #1] + 1888 003a 30F81350 ldrh r5, [r0, r3, lsl #1] + 1889 003e 20F81C50 strh r5, [r0, ip, lsl #1] @ movhi + 1890 0042 7145 cmp r1, lr + 1891 0044 20F81340 strh r4, [r0, r3, lsl #1] @ movhi + 1892 0048 DED8 bhi .L204 + 1893 004a 30BD pop {r4, r5, pc} + 1894 .L210: + 1895 004c 7047 bx lr + 1897 .global __aeabi_dadd + 1898 .global __aeabi_dsub + 1899 .global __aeabi_dmul + 1900 004e 00BF .section .text.arm_radix4_butterfly_f64,"ax",%progbits + 1901 .align 1 + 1902 .p2align 2,,3 + 1903 .global arm_radix4_butterfly_f64 + 1904 .syntax unified + 1905 .thumb + 1906 .thumb_func + 1907 .fpu fpv4-sp-d16 + 1909 arm_radix4_butterfly_f64: + 1910 @ args = 0, pretend = 0, frame = 120 + 1911 @ frame_needed = 0, uses_anonymous_args = 0 + 1912 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1913 0004 2DED108B vpush.64 {d8, d9, d10, d11, d12, d13, d14, d15} + 1914 0008 9FB0 sub sp, sp, #124 + 1915 000a 0129 cmp r1, #1 + 1916 000c 0F91 str r1, [sp, #60] + 1917 000e 1790 str r0, [sp, #92] + 1918 0010 1C93 str r3, [sp, #112] + 1919 0012 40F2B181 bls .L213 + 1920 0016 02F10803 add r3, r2, #8 + 1921 001a 1691 str r1, [sp, #88] + 1922 001c 1D93 str r3, [sp, #116] + 1923 .L214: + 1924 001e 169B ldr r3, [sp, #88] + 1925 0020 179E ldr r6, [sp, #92] + 1926 0022 1C9D ldr r5, [sp, #112] + 1927 0024 0E93 str r3, [sp, #56] + 1928 0026 9A08 lsrs r2, r3, #2 + 1929 0028 06EB0211 add r1, r6, r2, lsl #4 + 1930 002c 0831 adds r1, r1, #8 + ARM GAS /tmp/ccFqHvis.s page 34 + + + 1931 002e 1491 str r1, [sp, #80] + 1932 0030 2901 lsls r1, r5, #4 + 1933 0032 1C46 mov r4, r3 + 1934 0034 1991 str r1, [sp, #100] + 1935 0036 05EB4503 add r3, r5, r5, lsl #1 + 1936 003a 1D99 ldr r1, [sp, #116] + 1937 003c 1692 str r2, [sp, #88] + 1938 003e 02EB4200 add r0, r2, r2, lsl #1 + 1939 0042 1B01 lsls r3, r3, #4 + 1940 0044 C2EB0272 rsb r2, r2, r2, lsl #28 + 1941 0048 06EB0010 add r0, r6, r0, lsl #4 + 1942 004c 1A93 str r3, [sp, #104] + 1943 004e CDE91111 strd r1, r1, [sp, #68] + 1944 0052 1301 lsls r3, r2, #4 + 1945 0054 1590 str r0, [sp, #84] + 1946 0056 1B93 str r3, [sp, #108] + 1947 0058 6801 lsls r0, r5, #5 + 1948 005a 0023 movs r3, #0 + 1949 005c 1391 str r1, [sp, #76] + 1950 005e 1890 str r0, [sp, #96] + 1951 0060 4FEA041A lsl r10, r4, #4 + 1952 0064 1093 str r3, [sp, #64] + 1953 .L216: + 1954 0066 179B ldr r3, [sp, #92] + 1955 0068 109A ldr r2, [sp, #64] + 1956 006a 1B99 ldr r1, [sp, #108] + 1957 006c 149F ldr r7, [sp, #80] + 1958 006e 03EB0215 add r5, r3, r2, lsl #4 + 1959 0072 159B ldr r3, [sp, #84] + 1960 0074 CC18 adds r4, r1, r3 + 1961 0076 1399 ldr r1, [sp, #76] + 1962 0078 11ED027B vldr.64 d7, [r1, #-8] + 1963 007c 8DED027B vstr.64 d7, [sp, #8] + 1964 0080 91ED007B vldr.64 d7, [r1] + 1965 0084 1299 ldr r1, [sp, #72] + 1966 0086 8DED047B vstr.64 d7, [sp, #16] + 1967 008a 11ED027B vldr.64 d7, [r1, #-8] + 1968 008e 8DED067B vstr.64 d7, [sp, #24] + 1969 0092 91ED007B vldr.64 d7, [r1] + 1970 0096 1199 ldr r1, [sp, #68] + 1971 0098 8DED087B vstr.64 d7, [sp, #32] + 1972 009c 11ED027B vldr.64 d7, [r1, #-8] + 1973 00a0 8DED0A7B vstr.64 d7, [sp, #40] + 1974 00a4 91ED007B vldr.64 d7, [r1] + 1975 00a8 8DED0C7B vstr.64 d7, [sp, #48] + 1976 00ac A7F1080B sub fp, r7, #8 + 1977 00b0 03F10806 add r6, r3, #8 + 1978 00b4 9146 mov r9, r2 + 1979 00b6 9846 mov r8, r3 + 1980 .L215: + 1981 00b8 94ED007B vldr.64 d7, [r4] + 1982 00bc 95ED006B vldr.64 d6, [r5] + 1983 00c0 B0EE47AA vmov.f32 s20, s14 + 1984 00c4 F0EE67AA vmov.f32 s21, s15 + 1985 00c8 0E9B ldr r3, [sp, #56] + 1986 00ca B0EE469A vmov.f32 s18, s12 + 1987 00ce F0EE669A vmov.f32 s19, s13 + ARM GAS /tmp/ccFqHvis.s page 35 + + + 1988 00d2 51EC160B vmov r0, r1, d6 + 1989 00d6 9944 add r9, r9, r3 + 1990 00d8 53EC172B vmov r2, r3, d7 + 1991 00dc FFF7FEFF bl __aeabi_dadd + 1992 00e0 53EC1A2B vmov r2, r3, d10 + 1993 00e4 41EC180B vmov d8, r0, r1 + 1994 00e8 51EC190B vmov r0, r1, d9 + 1995 00ec FFF7FEFF bl __aeabi_dsub + 1996 00f0 94ED027B vldr.64 d7, [r4, #8] + 1997 00f4 95ED026B vldr.64 d6, [r5, #8] + 1998 00f8 B0EE47CA vmov.f32 s24, s14 + 1999 00fc F0EE67CA vmov.f32 s25, s15 + 2000 0100 53EC172B vmov r2, r3, d7 + 2001 0104 B0EE46AA vmov.f32 s20, s12 + 2002 0108 F0EE66AA vmov.f32 s21, s13 + 2003 010c 41EC1B0B vmov d11, r0, r1 + 2004 0110 51EC160B vmov r0, r1, d6 + 2005 0114 FFF7FEFF bl __aeabi_dadd + 2006 0118 53EC1C2B vmov r2, r3, d12 + 2007 011c 41EC190B vmov d9, r0, r1 + 2008 0120 51EC1A0B vmov r0, r1, d10 + 2009 0124 FFF7FEFF bl __aeabi_dsub + 2010 0128 56E90223 ldrd r2, [r6, #-8] + 2011 012c 41EC1A0B vmov d10, r0, r1 + 2012 0130 57E90201 ldrd r0, [r7, #-8] + 2013 0134 FFF7FEFF bl __aeabi_dadd + 2014 0138 41EC1C0B vmov d12, r0, r1 + 2015 013c 51EC180B vmov r0, r1, d8 + 2016 0140 53EC1C2B vmov r2, r3, d12 + 2017 0144 FFF7FEFF bl __aeabi_dadd + 2018 0148 53EC1C2B vmov r2, r3, d12 + 2019 014c C5E90001 strd r0, [r5] + 2020 0150 51EC180B vmov r0, r1, d8 + 2021 0154 FFF7FEFF bl __aeabi_dsub + 2022 0158 D8E90223 ldrd r2, [r8, #8] + 2023 015c 41EC1F0B vmov d15, r0, r1 + 2024 0160 DBE90201 ldrd r0, [fp, #8] + 2025 0164 FFF7FEFF bl __aeabi_dadd + 2026 0168 41EC180B vmov d8, r0, r1 + 2027 016c 51EC190B vmov r0, r1, d9 + 2028 0170 53EC182B vmov r2, r3, d8 + 2029 0174 FFF7FEFF bl __aeabi_dadd + 2030 0178 53EC182B vmov r2, r3, d8 + 2031 017c C5E90201 strd r0, [r5, #8] + 2032 0180 51EC190B vmov r0, r1, d9 + 2033 0184 FFF7FEFF bl __aeabi_dsub + 2034 0188 D8E90223 ldrd r2, [r8, #8] + 2035 018c 41EC1C0B vmov d12, r0, r1 + 2036 0190 DBE90201 ldrd r0, [fp, #8] + 2037 0194 B0EE4CDA vmov.f32 s26, s24 + 2038 0198 F0EE6CDA vmov.f32 s27, s25 + 2039 019c FFF7FEFF bl __aeabi_dsub + 2040 01a0 56E90223 ldrd r2, [r6, #-8] + 2041 01a4 41EC180B vmov d8, r0, r1 + 2042 01a8 57E90201 ldrd r0, [r7, #-8] + 2043 01ac FFF7FEFF bl __aeabi_dsub + 2044 01b0 9DED06EB vldr.64 d14, [sp, #24] + ARM GAS /tmp/ccFqHvis.s page 36 + + + 2045 01b4 41EC190B vmov d9, r0, r1 + 2046 01b8 53EC1F2B vmov r2, r3, d15 + 2047 01bc 51EC1E0B vmov r0, r1, d14 + 2048 01c0 FFF7FEFF bl __aeabi_dmul + 2049 01c4 53EC1C2B vmov r2, r3, d12 + 2050 01c8 9DED08CB vldr.64 d12, [sp, #32] + 2051 01cc CDE90001 strd r0, [sp] + 2052 01d0 51EC1C0B vmov r0, r1, d12 + 2053 01d4 FFF7FEFF bl __aeabi_dmul + 2054 01d8 0246 mov r2, r0 + 2055 01da 0B46 mov r3, r1 + 2056 01dc DDE90001 ldrd r0, [sp] + 2057 01e0 FFF7FEFF bl __aeabi_dadd + 2058 01e4 53EC1D2B vmov r2, r3, d13 + 2059 01e8 47E90201 strd r0, [r7, #-8] + 2060 01ec 51EC1E0B vmov r0, r1, d14 + 2061 01f0 FFF7FEFF bl __aeabi_dmul + 2062 01f4 53EC1F2B vmov r2, r3, d15 + 2063 01f8 41EC1D0B vmov d13, r0, r1 + 2064 01fc 51EC1C0B vmov r0, r1, d12 + 2065 0200 B0EE48CA vmov.f32 s24, s16 + 2066 0204 F0EE68CA vmov.f32 s25, s17 + 2067 0208 FFF7FEFF bl __aeabi_dmul + 2068 020c 0246 mov r2, r0 + 2069 020e 0B46 mov r3, r1 + 2070 0210 51EC1D0B vmov r0, r1, d13 + 2071 0214 FFF7FEFF bl __aeabi_dsub + 2072 0218 53EC182B vmov r2, r3, d8 + 2073 021c CBE90201 strd r0, [fp, #8] + 2074 0220 51EC1B0B vmov r0, r1, d11 + 2075 0224 FFF7FEFF bl __aeabi_dadd + 2076 0228 53EC1C2B vmov r2, r3, d12 + 2077 022c B0EE49CA vmov.f32 s24, s18 + 2078 0230 F0EE69CA vmov.f32 s25, s19 + 2079 0234 41EC180B vmov d8, r0, r1 + 2080 0238 51EC1B0B vmov r0, r1, d11 + 2081 023c FFF7FEFF bl __aeabi_dsub + 2082 0240 53EC192B vmov r2, r3, d9 + 2083 0244 41EC1B0B vmov d11, r0, r1 + 2084 0248 51EC1A0B vmov r0, r1, d10 + 2085 024c FFF7FEFF bl __aeabi_dsub + 2086 0250 53EC1C2B vmov r2, r3, d12 + 2087 0254 41EC190B vmov d9, r0, r1 + 2088 0258 51EC1A0B vmov r0, r1, d10 + 2089 025c FFF7FEFF bl __aeabi_dadd + 2090 0260 9DED02DB vldr.64 d13, [sp, #8] + 2091 0264 41EC1A0B vmov d10, r0, r1 + 2092 0268 53EC182B vmov r2, r3, d8 + 2093 026c 51EC1D0B vmov r0, r1, d13 + 2094 0270 FFF7FEFF bl __aeabi_dmul + 2095 0274 9DED04CB vldr.64 d12, [sp, #16] + 2096 0278 53EC192B vmov r2, r3, d9 + 2097 027c 41EC1E0B vmov d14, r0, r1 + 2098 0280 51EC1C0B vmov r0, r1, d12 + 2099 0284 FFF7FEFF bl __aeabi_dmul + 2100 0288 0246 mov r2, r0 + 2101 028a 0B46 mov r3, r1 + ARM GAS /tmp/ccFqHvis.s page 37 + + + 2102 028c 51EC1E0B vmov r0, r1, d14 + 2103 0290 FFF7FEFF bl __aeabi_dadd + 2104 0294 53EC192B vmov r2, r3, d9 + 2105 0298 C4E90001 strd r0, [r4] + 2106 029c 51EC1D0B vmov r0, r1, d13 + 2107 02a0 FFF7FEFF bl __aeabi_dmul + 2108 02a4 53EC182B vmov r2, r3, d8 + 2109 02a8 41EC180B vmov d8, r0, r1 + 2110 02ac 51EC1C0B vmov r0, r1, d12 + 2111 02b0 FFF7FEFF bl __aeabi_dmul + 2112 02b4 0246 mov r2, r0 + 2113 02b6 0B46 mov r3, r1 + 2114 02b8 51EC180B vmov r0, r1, d8 + 2115 02bc FFF7FEFF bl __aeabi_dsub + 2116 02c0 9DED0A9B vldr.64 d9, [sp, #40] + 2117 02c4 C4E90201 strd r0, [r4, #8] + 2118 02c8 53EC1B2B vmov r2, r3, d11 + 2119 02cc 51EC190B vmov r0, r1, d9 + 2120 02d0 FFF7FEFF bl __aeabi_dmul + 2121 02d4 9DED0C8B vldr.64 d8, [sp, #48] + 2122 02d8 53EC1A2B vmov r2, r3, d10 + 2123 02dc 41EC1C0B vmov d12, r0, r1 + 2124 02e0 51EC180B vmov r0, r1, d8 + 2125 02e4 FFF7FEFF bl __aeabi_dmul + 2126 02e8 0246 mov r2, r0 + 2127 02ea 0B46 mov r3, r1 + 2128 02ec 51EC1C0B vmov r0, r1, d12 + 2129 02f0 FFF7FEFF bl __aeabi_dadd + 2130 02f4 53EC1A2B vmov r2, r3, d10 + 2131 02f8 46E90201 strd r0, [r6, #-8] + 2132 02fc 51EC190B vmov r0, r1, d9 + 2133 0300 FFF7FEFF bl __aeabi_dmul + 2134 0304 53EC1B2B vmov r2, r3, d11 + 2135 0308 41EC190B vmov d9, r0, r1 + 2136 030c 51EC180B vmov r0, r1, d8 + 2137 0310 FFF7FEFF bl __aeabi_dmul + 2138 0314 0B46 mov r3, r1 + 2139 0316 0246 mov r2, r0 + 2140 0318 51EC190B vmov r0, r1, d9 + 2141 031c FFF7FEFF bl __aeabi_dsub + 2142 0320 0F9B ldr r3, [sp, #60] + 2143 0322 4B45 cmp r3, r9 + 2144 0324 C8E90201 strd r0, [r8, #8] + 2145 0328 5544 add r5, r5, r10 + 2146 032a 5744 add r7, r7, r10 + 2147 032c D344 add fp, fp, r10 + 2148 032e 5444 add r4, r4, r10 + 2149 0330 5644 add r6, r6, r10 + 2150 0332 D044 add r8, r8, r10 + 2151 0334 3FF6C0AE bhi .L215 + 2152 0338 159A ldr r2, [sp, #84] + 2153 033a 1999 ldr r1, [sp, #100] + 2154 033c 109B ldr r3, [sp, #64] + 2155 033e 1032 adds r2, r2, #16 + 2156 0340 1592 str r2, [sp, #84] + 2157 0342 149A ldr r2, [sp, #80] + 2158 0344 1032 adds r2, r2, #16 + ARM GAS /tmp/ccFqHvis.s page 38 + + + 2159 0346 1492 str r2, [sp, #80] + 2160 0348 139A ldr r2, [sp, #76] + 2161 034a 0A44 add r2, r2, r1 + 2162 034c 1392 str r2, [sp, #76] + 2163 034e 1899 ldr r1, [sp, #96] + 2164 0350 129A ldr r2, [sp, #72] + 2165 0352 0A44 add r2, r2, r1 + 2166 0354 1292 str r2, [sp, #72] + 2167 0356 1A99 ldr r1, [sp, #104] + 2168 0358 119A ldr r2, [sp, #68] + 2169 035a 0A44 add r2, r2, r1 + 2170 035c 1192 str r2, [sp, #68] + 2171 035e 169A ldr r2, [sp, #88] + 2172 0360 0133 adds r3, r3, #1 + 2173 0362 9A42 cmp r2, r3 + 2174 0364 1093 str r3, [sp, #64] + 2175 0366 7FF47EAE bne .L216 + 2176 036a 1C9B ldr r3, [sp, #112] + 2177 036c 9B00 lsls r3, r3, #2 + 2178 036e 9BB2 uxth r3, r3 + 2179 0370 012A cmp r2, #1 + 2180 0372 1C93 str r3, [sp, #112] + 2181 0374 7FF453AE bne .L214 + 2182 .L213: + 2183 0378 1FB0 add sp, sp, #124 + 2184 @ sp needed + 2185 037a BDEC108B vldm sp!, {d8-d15} + 2186 037e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2188 0382 00BF .section .text.arm_cfft_radix4by2_f64,"ax",%progbits + 2189 .align 1 + 2190 .p2align 2,,3 + 2191 .global arm_cfft_radix4by2_f64 + 2192 .syntax unified + 2193 .thumb + 2194 .thumb_func + 2195 .fpu fpv4-sp-d16 + 2197 arm_cfft_radix4by2_f64: + 2198 @ args = 0, pretend = 0, frame = 16 + 2199 @ frame_needed = 0, uses_anonymous_args = 0 + 2200 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2201 0004 2DED0E8B vpush.64 {d8, d9, d10, d11, d12, d13, d14} + 2202 0008 85B0 sub sp, sp, #20 + 2203 000a 4B08 lsrs r3, r1, #1 + 2204 000c CDE90201 strd r0, r1, [sp, #8] + 2205 0010 0EEE102A vmov s28, r2 @ int + 2206 0014 0193 str r3, [sp, #4] + 2207 0016 7BD0 beq .L224 + 2208 0018 00EB031B add fp, r0, r3, lsl #4 + 2209 001c 00F10803 add r3, r0, #8 + 2210 0020 1446 mov r4, r2 + 2211 0022 0BF10805 add r5, fp, #8 + 2212 0026 8246 mov r10, r0 + 2213 0028 D946 mov r9, fp + 2214 002a 9846 mov r8, r3 + 2215 .L225: + 2216 002c 58E90267 ldrd r6, [r8, #-8] + 2217 0030 15ED027B vldr.64 d7, [r5, #-8] + ARM GAS /tmp/ccFqHvis.s page 39 + + + 2218 0034 0AF1100A add r10, r10, #16 + 2219 0038 53EC172B vmov r2, r3, d7 + 2220 003c B0EE47DA vmov.f32 s26, s14 + 2221 0040 F0EE67DA vmov.f32 s27, s15 + 2222 0044 0BF1100B add fp, fp, #16 + 2223 0048 3046 mov r0, r6 + 2224 004a 3946 mov r1, r7 + 2225 004c FFF7FEFF bl __aeabi_dsub + 2226 0050 1AED026B vldr.64 d6, [r10, #-8] + 2227 0054 1BED025B vldr.64 d5, [fp, #-8] + 2228 0058 B0EE46CA vmov.f32 s24, s12 + 2229 005c F0EE66CA vmov.f32 s25, s13 + 2230 0060 53EC152B vmov r2, r3, d5 + 2231 0064 B0EE45BA vmov.f32 s22, s10 + 2232 0068 F0EE65BA vmov.f32 s23, s11 + 2233 006c 41EC1A0B vmov d10, r0, r1 + 2234 0070 51EC160B vmov r0, r1, d6 + 2235 0074 FFF7FEFF bl __aeabi_dsub + 2236 0078 41EC170B vmov d7, r0, r1 + 2237 007c 53EC1D2B vmov r2, r3, d13 + 2238 0080 3046 mov r0, r6 + 2239 0082 3946 mov r1, r7 + 2240 0084 57EC176B vmov r6, r7, d7 + 2241 0088 FFF7FEFF bl __aeabi_dadd + 2242 008c 94ED008B vldr.64 d8, [r4] + 2243 0090 94ED029B vldr.64 d9, [r4, #8] + 2244 0094 53EC1B2B vmov r2, r3, d11 + 2245 0098 48E90201 strd r0, [r8, #-8] + 2246 009c 51EC1C0B vmov r0, r1, d12 + 2247 00a0 FFF7FEFF bl __aeabi_dadd + 2248 00a4 53EC1A2B vmov r2, r3, d10 + 2249 00a8 4AE90201 strd r0, [r10, #-8] + 2250 00ac 51EC180B vmov r0, r1, d8 + 2251 00b0 FFF7FEFF bl __aeabi_dmul + 2252 00b4 3246 mov r2, r6 + 2253 00b6 3B46 mov r3, r7 + 2254 00b8 41EC1B0B vmov d11, r0, r1 + 2255 00bc 51EC190B vmov r0, r1, d9 + 2256 00c0 FFF7FEFF bl __aeabi_dmul + 2257 00c4 0246 mov r2, r0 + 2258 00c6 0B46 mov r3, r1 + 2259 00c8 51EC1B0B vmov r0, r1, d11 + 2260 00cc FFF7FEFF bl __aeabi_dadd + 2261 00d0 3246 mov r2, r6 + 2262 00d2 3B46 mov r3, r7 + 2263 00d4 45E90201 strd r0, [r5, #-8] + 2264 00d8 51EC180B vmov r0, r1, d8 + 2265 00dc FFF7FEFF bl __aeabi_dmul + 2266 00e0 53EC1A2B vmov r2, r3, d10 + 2267 00e4 0646 mov r6, r0 + 2268 00e6 0F46 mov r7, r1 + 2269 00e8 51EC190B vmov r0, r1, d9 + 2270 00ec FFF7FEFF bl __aeabi_dmul + 2271 00f0 0246 mov r2, r0 + 2272 00f2 0B46 mov r3, r1 + 2273 00f4 3046 mov r0, r6 + 2274 00f6 3946 mov r1, r7 + ARM GAS /tmp/ccFqHvis.s page 40 + + + 2275 00f8 FFF7FEFF bl __aeabi_dsub + 2276 00fc D145 cmp r9, r10 + 2277 00fe 08F11008 add r8, r8, #16 + 2278 0102 05F11005 add r5, r5, #16 + 2279 0106 4BE90201 strd r0, [fp, #-8] + 2280 010a 04F11004 add r4, r4, #16 + 2281 010e 8DD1 bne .L225 + 2282 .L224: + 2283 0110 029C ldr r4, [sp, #8] + 2284 0112 BDF80410 ldrh r1, [sp, #4] + 2285 0116 0191 str r1, [sp, #4] + 2286 0118 1EEE102A vmov r2, s28 @ int + 2287 011c 2046 mov r0, r4 + 2288 011e 0223 movs r3, #2 + 2289 0120 FFF7FEFF bl arm_radix4_butterfly_f64 + 2290 0124 2046 mov r0, r4 + 2291 0126 039C ldr r4, [sp, #12] + 2292 0128 0199 ldr r1, [sp, #4] + 2293 012a 1EEE102A vmov r2, s28 @ int + 2294 012e 0223 movs r3, #2 + 2295 0130 00EBC400 add r0, r0, r4, lsl #3 + 2296 0134 05B0 add sp, sp, #20 + 2297 @ sp needed + 2298 0136 BDEC0E8B vldm sp!, {d8-d14} + 2299 013a BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2300 013e FFF7FEBF b arm_radix4_butterfly_f64 + 2302 .global __aeabi_ui2d + 2303 .global __aeabi_ddiv + 2304 0142 00BF .section .text.arm_cfft_f64,"ax",%progbits + 2305 .align 1 + 2306 .p2align 2,,3 + 2307 .global arm_cfft_f64 + 2308 .syntax unified + 2309 .thumb + 2310 .thumb_func + 2311 .fpu fpv4-sp-d16 + 2313 arm_cfft_f64: + 2314 @ args = 0, pretend = 0, frame = 8 + 2315 @ frame_needed = 0, uses_anonymous_args = 0 + 2316 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2317 0004 83B0 sub sp, sp, #12 + 2318 0006 012A cmp r2, #1 + 2319 0008 0588 ldrh r5, [r0] + 2320 000a 0193 str r3, [sp, #4] + 2321 000c 8246 mov r10, r0 + 2322 000e 9346 mov fp, r2 + 2323 0010 0C46 mov r4, r1 + 2324 0012 6AD0 beq .L278 + 2325 .L232: + 2326 0014 B5F5807F cmp r5, #256 + 2327 0018 5FD0 beq .L235 + 2328 001a 0ED9 bls .L279 + 2329 001c B5F5006F cmp r5, #2048 + 2330 0020 10D0 beq .L238 + 2331 0022 54D9 bls .L280 + 2332 0024 B5F5805F cmp r5, #4096 + 2333 0028 57D0 beq .L235 + ARM GAS /tmp/ccFqHvis.s page 41 + + + 2334 .L239: + 2335 002a 019B ldr r3, [sp, #4] + 2336 002c 9BB9 cbnz r3, .L244 + 2337 .L241: + 2338 002e BBF1010F cmp fp, #1 + 2339 0032 1AD0 beq .L281 + 2340 .L231: + 2341 0034 03B0 add sp, sp, #12 + 2342 @ sp needed + 2343 0036 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2344 .L279: + 2345 003a 402D cmp r5, #64 + 2346 003c 4DD0 beq .L235 + 2347 003e 41D9 bls .L282 + 2348 0040 802D cmp r5, #128 + 2349 0042 F2D1 bne .L239 + 2350 .L238: + 2351 0044 DAF80420 ldr r2, [r10, #4] + 2352 0048 2946 mov r1, r5 + 2353 004a 2046 mov r0, r4 + 2354 004c FFF7FEFF bl arm_cfft_radix4by2_f64 + 2355 0050 019B ldr r3, [sp, #4] + 2356 0052 002B cmp r3, #0 + 2357 0054 EBD0 beq .L241 + 2358 .L244: + 2359 0056 DAF80820 ldr r2, [r10, #8] + 2360 005a BAF80C10 ldrh r1, [r10, #12] + 2361 005e 2046 mov r0, r4 + 2362 0060 FFF7FEFF bl arm_bitreversal_64 + 2363 0064 BBF1010F cmp fp, #1 + 2364 0068 E4D1 bne .L231 + 2365 .L281: + 2366 006a 2846 mov r0, r5 + 2367 006c FFF7FEFF bl __aeabi_ui2d + 2368 0070 0246 mov r2, r0 + 2369 0072 0B46 mov r3, r1 + 2370 0074 0020 movs r0, #0 + 2371 0076 2649 ldr r1, .L283 + 2372 0078 FFF7FEFF bl __aeabi_ddiv + 2373 007c 8046 mov r8, r0 + 2374 007e 8946 mov r9, r1 + 2375 0080 002D cmp r5, #0 + 2376 0082 D7D0 beq .L231 + 2377 0084 1034 adds r4, r4, #16 + 2378 0086 4FF0000A mov r10, #0 + 2379 .L243: + 2380 008a 54E90401 ldrd r0, [r4, #-16] + 2381 008e 4246 mov r2, r8 + 2382 0090 4B46 mov r3, r9 + 2383 0092 FFF7FEFF bl __aeabi_dmul + 2384 0096 54E90263 ldrd r6, r3, [r4, #-8] + 2385 009a 03F10047 add r7, r3, #-2147483648 + 2386 009e 44E90401 strd r0, [r4, #-16] + 2387 00a2 4246 mov r2, r8 + 2388 00a4 4B46 mov r3, r9 + 2389 00a6 3046 mov r0, r6 + 2390 00a8 3946 mov r1, r7 + ARM GAS /tmp/ccFqHvis.s page 42 + + + 2391 00aa FFF7FEFF bl __aeabi_dmul + 2392 00ae 0AF1010A add r10, r10, #1 + 2393 00b2 5545 cmp r5, r10 + 2394 00b4 44E90201 strd r0, [r4, #-8] + 2395 00b8 04F11004 add r4, r4, #16 + 2396 00bc E5D1 bne .L243 + 2397 00be 03B0 add sp, sp, #12 + 2398 @ sp needed + 2399 00c0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2400 .L282: + 2401 00c4 102D cmp r5, #16 + 2402 00c6 08D0 beq .L235 + 2403 00c8 202D cmp r5, #32 + 2404 00ca BBD0 beq .L238 + 2405 00cc ADE7 b .L239 + 2406 .L280: + 2407 00ce B5F5007F cmp r5, #512 + 2408 00d2 B7D0 beq .L238 + 2409 00d4 B5F5806F cmp r5, #1024 + 2410 00d8 A7D1 bne .L239 + 2411 .L235: + 2412 00da DAF80420 ldr r2, [r10, #4] + 2413 00de 0123 movs r3, #1 + 2414 00e0 2946 mov r1, r5 + 2415 00e2 2046 mov r0, r4 + 2416 00e4 FFF7FEFF bl arm_radix4_butterfly_f64 + 2417 00e8 9FE7 b .L239 + 2418 .L278: + 2419 00ea 75B1 cbz r5, .L233 + 2420 00ec 01F11803 add r3, r1, #24 + 2421 00f0 0022 movs r2, #0 + 2422 .L234: + 2423 00f2 53E90481 ldrd r8, r1, [r3, #-16] + 2424 00f6 0132 adds r2, r2, #1 + 2425 00f8 01F10049 add r9, r1, #-2147483648 + 2426 00fc 9542 cmp r5, r2 + 2427 00fe 43E90489 strd r8, [r3, #-16] + 2428 0102 03F11003 add r3, r3, #16 + 2429 0106 F4D1 bne .L234 + 2430 0108 84E7 b .L232 + 2431 .L233: + 2432 010a 002B cmp r3, #0 + 2433 010c 92D0 beq .L231 + 2434 010e A2E7 b .L244 + 2435 .L284: + 2436 .align 2 + 2437 .L283: + 2438 0110 0000F03F .word 1072693248 + 2440 .section .text.arm_cfft_radix4by2_q15,"ax",%progbits + 2441 .align 1 + 2442 .p2align 2,,3 + 2443 .global arm_cfft_radix4by2_q15 + 2444 .syntax unified + 2445 .thumb + 2446 .thumb_func + 2447 .fpu fpv4-sp-d16 + 2449 arm_cfft_radix4by2_q15: + ARM GAS /tmp/ccFqHvis.s page 43 + + + 2450 @ args = 0, pretend = 0, frame = 0 + 2451 @ frame_needed = 0, uses_anonymous_args = 0 + 2452 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2453 0004 4D08 lsrs r5, r1, #1 + 2454 0006 1646 mov r6, r2 + 2455 0008 00EB4107 add r7, r0, r1, lsl #1 + 2456 000c 46D0 beq .L286 + 2457 000e DFF8A080 ldr r8, .L295 + 2458 0012 0446 mov r4, r0 + 2459 0014 0246 mov r2, r0 + 2460 0016 3946 mov r1, r7 + 2461 0018 B646 mov lr, r6 + 2462 001a 2846 mov r0, r5 + 2463 001c 4FF0000C mov ip, #0 + 2464 .L287: + 2465 0020 5EF8043B ldr r3, [lr], #4 @ unaligned + 2466 0024 D2F80090 ldr r9, [r2] @ unaligned + 2467 .syntax unified + 2468 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2469 0028 99FA2CF9 shadd16 r9, r9, ip + 2470 @ 0 "" 2 + 2471 .thumb + 2472 .syntax unified + 2473 002c D1F800B0 ldr fp, [r1] @ unaligned + 2474 .syntax unified + 2475 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2476 0030 9BFA2CFB shadd16 fp, fp, ip + 2477 @ 0 "" 2 + 2478 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2479 0034 D9FA1BFA qsub16 r10, r9, fp + 2480 @ 0 "" 2 + 2481 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2482 0038 99FA2BF9 shadd16 r9, r9, fp + 2483 @ 0 "" 2 + 2484 .thumb + 2485 .syntax unified + 2486 003c 42F8049B str r9, [r2], #4 @ unaligned + 2487 .syntax unified + 2488 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2489 0040 23FB0AF9 smuad r9, r3, r10 + 2490 @ 0 "" 2 + 2491 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2492 0044 43FB1AF3 smusdx r3, r3, r10 + 2493 @ 0 "" 2 + 2494 .thumb + 2495 .syntax unified + 2496 0048 03EA0803 and r3, r3, r8 + 2497 004c 43EA1943 orr r3, r3, r9, lsr #16 + 2498 0050 0138 subs r0, r0, #1 + 2499 0052 41F8043B str r3, [r1], #4 @ unaligned + 2500 0056 E3D1 bne .L287 + 2501 0058 2946 mov r1, r5 + 2502 005a 3246 mov r2, r6 + 2503 005c 2046 mov r0, r4 + 2504 005e FFF7FEFF bl arm_radix4_butterfly_q15.constprop.0 + 2505 0062 2946 mov r1, r5 + 2506 0064 3846 mov r0, r7 + ARM GAS /tmp/ccFqHvis.s page 44 + + + 2507 0066 3246 mov r2, r6 + 2508 0068 FFF7FEFF bl arm_radix4_butterfly_q15.constprop.0 + 2509 006c 04EBC505 add r5, r4, r5, lsl #3 + 2510 0070 2046 mov r0, r4 + 2511 .L289: + 2512 0072 B0F90060 ldrsh r6, [r0] + 2513 0076 B0F90240 ldrsh r4, [r0, #2] + 2514 007a B0F90420 ldrsh r2, [r0, #4] + 2515 007e B0F90630 ldrsh r3, [r0, #6] + 2516 0082 7600 lsls r6, r6, #1 + 2517 0084 6400 lsls r4, r4, #1 + 2518 0086 5200 lsls r2, r2, #1 + 2519 0088 5B00 lsls r3, r3, #1 + 2520 008a 0680 strh r6, [r0] @ movhi + 2521 008c 4480 strh r4, [r0, #2] @ movhi + 2522 008e 8280 strh r2, [r0, #4] @ movhi + 2523 0090 C380 strh r3, [r0, #6] @ movhi + 2524 0092 0830 adds r0, r0, #8 + 2525 0094 8542 cmp r5, r0 + 2526 0096 ECD1 bne .L289 + 2527 0098 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2528 .L286: + 2529 009c 2946 mov r1, r5 + 2530 009e FFF7FEFF bl arm_radix4_butterfly_q15.constprop.0 + 2531 00a2 3246 mov r2, r6 + 2532 00a4 2946 mov r1, r5 + 2533 00a6 3846 mov r0, r7 + 2534 00a8 BDE8F84F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2535 00ac FFF7FEBF b arm_radix4_butterfly_q15.constprop.0 + 2536 .L296: + 2537 .align 2 + 2538 .L295: + 2539 00b0 0000FFFF .word -65536 + 2541 .section .text.arm_cfft_radix4by2_inverse_q15,"ax",%progbits + 2542 .align 1 + 2543 .p2align 2,,3 + 2544 .global arm_cfft_radix4by2_inverse_q15 + 2545 .syntax unified + 2546 .thumb + 2547 .thumb_func + 2548 .fpu fpv4-sp-d16 + 2550 arm_cfft_radix4by2_inverse_q15: + 2551 @ args = 0, pretend = 0, frame = 0 + 2552 @ frame_needed = 0, uses_anonymous_args = 0 + 2553 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2554 0004 4D08 lsrs r5, r1, #1 + 2555 0006 1646 mov r6, r2 + 2556 0008 00EB4107 add r7, r0, r1, lsl #1 + 2557 000c 46D0 beq .L298 + 2558 000e DFF8A080 ldr r8, .L307 + 2559 0012 0446 mov r4, r0 + 2560 0014 0246 mov r2, r0 + 2561 0016 3946 mov r1, r7 + 2562 0018 B646 mov lr, r6 + 2563 001a 2846 mov r0, r5 + 2564 001c 4FF0000C mov ip, #0 + 2565 .L299: + ARM GAS /tmp/ccFqHvis.s page 45 + + + 2566 0020 5EF8043B ldr r3, [lr], #4 @ unaligned + 2567 0024 D2F80090 ldr r9, [r2] @ unaligned + 2568 .syntax unified + 2569 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2570 0028 99FA2CF9 shadd16 r9, r9, ip + 2571 @ 0 "" 2 + 2572 .thumb + 2573 .syntax unified + 2574 002c D1F800B0 ldr fp, [r1] @ unaligned + 2575 .syntax unified + 2576 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2577 0030 9BFA2CFB shadd16 fp, fp, ip + 2578 @ 0 "" 2 + 2579 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2580 0034 D9FA1BFA qsub16 r10, r9, fp + 2581 @ 0 "" 2 + 2582 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2583 0038 99FA2BF9 shadd16 r9, r9, fp + 2584 @ 0 "" 2 + 2585 .thumb + 2586 .syntax unified + 2587 003c 42F8049B str r9, [r2], #4 @ unaligned + 2588 .syntax unified + 2589 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2590 0040 43FB0AF9 smusd r9, r3, r10 + 2591 @ 0 "" 2 + 2592 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2593 0044 23FB1AF3 smuadx r3, r3, r10 + 2594 @ 0 "" 2 + 2595 .thumb + 2596 .syntax unified + 2597 0048 03EA0803 and r3, r3, r8 + 2598 004c 43EA1943 orr r3, r3, r9, lsr #16 + 2599 0050 0138 subs r0, r0, #1 + 2600 0052 41F8043B str r3, [r1], #4 @ unaligned + 2601 0056 E3D1 bne .L299 + 2602 0058 2946 mov r1, r5 + 2603 005a 3246 mov r2, r6 + 2604 005c 2046 mov r0, r4 + 2605 005e FFF7FEFF bl arm_radix4_butterfly_inverse_q15.constprop.0 + 2606 0062 2946 mov r1, r5 + 2607 0064 3846 mov r0, r7 + 2608 0066 3246 mov r2, r6 + 2609 0068 FFF7FEFF bl arm_radix4_butterfly_inverse_q15.constprop.0 + 2610 006c 04EBC505 add r5, r4, r5, lsl #3 + 2611 0070 2046 mov r0, r4 + 2612 .L301: + 2613 0072 B0F90060 ldrsh r6, [r0] + 2614 0076 B0F90240 ldrsh r4, [r0, #2] + 2615 007a B0F90420 ldrsh r2, [r0, #4] + 2616 007e B0F90630 ldrsh r3, [r0, #6] + 2617 0082 7600 lsls r6, r6, #1 + 2618 0084 6400 lsls r4, r4, #1 + 2619 0086 5200 lsls r2, r2, #1 + 2620 0088 5B00 lsls r3, r3, #1 + 2621 008a 0680 strh r6, [r0] @ movhi + 2622 008c 4480 strh r4, [r0, #2] @ movhi + ARM GAS /tmp/ccFqHvis.s page 46 + + + 2623 008e 8280 strh r2, [r0, #4] @ movhi + 2624 0090 C380 strh r3, [r0, #6] @ movhi + 2625 0092 0830 adds r0, r0, #8 + 2626 0094 8542 cmp r5, r0 + 2627 0096 ECD1 bne .L301 + 2628 0098 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2629 .L298: + 2630 009c 2946 mov r1, r5 + 2631 009e FFF7FEFF bl arm_radix4_butterfly_inverse_q15.constprop.0 + 2632 00a2 3246 mov r2, r6 + 2633 00a4 2946 mov r1, r5 + 2634 00a6 3846 mov r0, r7 + 2635 00a8 BDE8F84F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2636 00ac FFF7FEBF b arm_radix4_butterfly_inverse_q15.constprop.0 + 2637 .L308: + 2638 .align 2 + 2639 .L307: + 2640 00b0 0000FFFF .word -65536 + 2642 .section .text.arm_cfft_q15,"ax",%progbits + 2643 .align 1 + 2644 .p2align 2,,3 + 2645 .global arm_cfft_q15 + 2646 .syntax unified + 2647 .thumb + 2648 .thumb_func + 2649 .fpu fpv4-sp-d16 + 2651 arm_cfft_q15: + 2652 @ args = 0, pretend = 0, frame = 88 + 2653 @ frame_needed = 0, uses_anonymous_args = 0 + 2654 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 2655 0004 97B0 sub sp, sp, #92 + 2656 0006 012A cmp r2, #1 + 2657 0008 1490 str r0, [sp, #80] + 2658 000a 0088 ldrh r0, [r0] + 2659 000c 0290 str r0, [sp, #8] + 2660 000e 1191 str r1, [sp, #68] + 2661 0010 1393 str r3, [sp, #76] + 2662 0012 00F07681 beq .L403 + 2663 0016 B0F5807F cmp r0, #256 + 2664 001a 4CD0 beq .L323 + 2665 001c 0BD9 bls .L404 + 2666 001e B0F5006F cmp r0, #2048 + 2667 0022 3BD0 beq .L326 + 2668 0024 41D9 bls .L405 + 2669 0026 B0F5805F cmp r0, #4096 + 2670 002a 44D0 beq .L323 + 2671 .L315: + 2672 002c 139B ldr r3, [sp, #76] + 2673 002e 53B9 cbnz r3, .L406 + 2674 .L309: + 2675 0030 17B0 add sp, sp, #92 + 2676 @ sp needed + 2677 0032 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2678 .L404: + 2679 0036 4028 cmp r0, #64 + 2680 0038 3DD0 beq .L323 + 2681 003a 2BD9 bls .L407 + ARM GAS /tmp/ccFqHvis.s page 47 + + + 2682 003c 8028 cmp r0, #128 + 2683 003e 2DD0 beq .L326 + 2684 0040 139B ldr r3, [sp, #76] + 2685 0042 002B cmp r3, #0 + 2686 0044 F4D0 beq .L309 + 2687 .L406: + 2688 0046 149B ldr r3, [sp, #80] + 2689 0048 9E89 ldrh r6, [r3, #12] + 2690 004a 9D68 ldr r5, [r3, #8] + 2691 004c 002E cmp r6, #0 + 2692 004e EFD0 beq .L309 + 2693 0050 1198 ldr r0, [sp, #68] + 2694 0052 0021 movs r1, #0 + 2695 .L336: + 2696 0054 05EB4103 add r3, r5, r1, lsl #1 + 2697 0058 35F81120 ldrh r2, [r5, r1, lsl #1] + 2698 005c 5B88 ldrh r3, [r3, #2] + 2699 005e 9208 lsrs r2, r2, #2 + 2700 0060 9B08 lsrs r3, r3, #2 + 2701 0062 30F81240 ldrh r4, [r0, r2, lsl #1] + 2702 0066 30F81370 ldrh r7, [r0, r3, lsl #1] + 2703 006a 20F81270 strh r7, [r0, r2, lsl #1] @ movhi + 2704 006e 0231 adds r1, r1, #2 + 2705 0070 20F81340 strh r4, [r0, r3, lsl #1] @ movhi + 2706 0074 0132 adds r2, r2, #1 + 2707 0076 0133 adds r3, r3, #1 + 2708 0078 89B2 uxth r1, r1 + 2709 007a 30F81240 ldrh r4, [r0, r2, lsl #1] + 2710 007e 30F81370 ldrh r7, [r0, r3, lsl #1] + 2711 0082 20F81270 strh r7, [r0, r2, lsl #1] @ movhi + 2712 0086 8E42 cmp r6, r1 + 2713 0088 20F81340 strh r4, [r0, r3, lsl #1] @ movhi + 2714 008c E2D8 bhi .L336 + 2715 008e 17B0 add sp, sp, #92 + 2716 @ sp needed + 2717 0090 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 2718 .L407: + 2719 0094 1028 cmp r0, #16 + 2720 0096 0ED0 beq .L323 + 2721 0098 2028 cmp r0, #32 + 2722 009a C7D1 bne .L315 + 2723 .L326: + 2724 009c 149B ldr r3, [sp, #80] + 2725 009e 0299 ldr r1, [sp, #8] + 2726 00a0 5A68 ldr r2, [r3, #4] + 2727 00a2 1198 ldr r0, [sp, #68] + 2728 00a4 FFF7FEFF bl arm_cfft_radix4by2_q15 + 2729 00a8 C0E7 b .L315 + 2730 .L405: + 2731 00aa B0F5007F cmp r0, #512 + 2732 00ae F5D0 beq .L326 + 2733 00b0 B0F5806F cmp r0, #1024 + 2734 00b4 BAD1 bne .L315 + 2735 .L323: + 2736 00b6 029B ldr r3, [sp, #8] + 2737 00b8 119E ldr r6, [sp, #68] + 2738 00ba A14F ldr r7, .L411 + ARM GAS /tmp/ccFqHvis.s page 48 + + + 2739 00bc 9C08 lsrs r4, r3, #2 + 2740 00be 149B ldr r3, [sp, #80] + 2741 00c0 1594 str r4, [sp, #84] + 2742 00c2 5B68 ldr r3, [r3, #4] + 2743 00c4 1293 str r3, [sp, #72] + 2744 00c6 06EBC405 add r5, r6, r4, lsl #3 + 2745 00ca 9C46 mov ip, r3 + 2746 00cc 9B46 mov fp, r3 + 2747 00ce 9A46 mov r10, r3 + 2748 00d0 06EB8400 add r0, r6, r4, lsl #2 + 2749 00d4 05EB8401 add r1, r5, r4, lsl #2 + 2750 00d8 0023 movs r3, #0 + 2751 .L328: + 2752 00da D6F80090 ldr r9, [r6] @ unaligned + 2753 .syntax unified + 2754 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2755 00de 99FA23F9 shadd16 r9, r9, r3 + 2756 @ 0 "" 2 + 2757 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2758 00e2 99FA23F9 shadd16 r9, r9, r3 + 2759 @ 0 "" 2 + 2760 .thumb + 2761 .syntax unified + 2762 00e6 2A68 ldr r2, [r5] @ unaligned + 2763 .syntax unified + 2764 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2765 00e8 92FA23F2 shadd16 r2, r2, r3 + 2766 @ 0 "" 2 + 2767 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2768 00ec 92FA23F2 shadd16 r2, r2, r3 + 2769 @ 0 "" 2 + 2770 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2771 00f0 99FA12FE qadd16 lr, r9, r2 + 2772 @ 0 "" 2 + 2773 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2774 00f4 D9FA12F9 qsub16 r9, r9, r2 + 2775 @ 0 "" 2 + 2776 .thumb + 2777 .syntax unified + 2778 00f8 0268 ldr r2, [r0] @ unaligned + 2779 .syntax unified + 2780 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2781 00fa 92FA23F2 shadd16 r2, r2, r3 + 2782 @ 0 "" 2 + 2783 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2784 00fe 92FA23F2 shadd16 r2, r2, r3 + 2785 @ 0 "" 2 + 2786 .thumb + 2787 .syntax unified + 2788 0102 D1F80080 ldr r8, [r1] @ unaligned + 2789 .syntax unified + 2790 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2791 0106 98FA23F8 shadd16 r8, r8, r3 + 2792 @ 0 "" 2 + 2793 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2794 010a 98FA23F8 shadd16 r8, r8, r3 + 2795 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 49 + + + 2796 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2797 010e 92FA18F2 qadd16 r2, r2, r8 + 2798 @ 0 "" 2 + 2799 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2800 0112 9EFA22F8 shadd16 r8, lr, r2 + 2801 @ 0 "" 2 + 2802 .thumb + 2803 .syntax unified + 2804 0116 46F8048B str r8, [r6], #4 @ unaligned + 2805 .syntax unified + 2806 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2807 011a DEFA12FE qsub16 lr, lr, r2 + 2808 @ 0 "" 2 + 2809 .thumb + 2810 .syntax unified + 2811 011e 5BF8082B ldr r2, [fp], #8 @ unaligned + 2812 .syntax unified + 2813 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2814 0122 22FB0EF8 smuad r8, r2, lr + 2815 @ 0 "" 2 + 2816 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2817 0126 42FB1EFE smusdx lr, r2, lr + 2818 @ 0 "" 2 + 2819 .thumb + 2820 .syntax unified + 2821 012a 0268 ldr r2, [r0] @ unaligned + 2822 .syntax unified + 2823 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2824 012c 92FA23F2 shadd16 r2, r2, r3 + 2825 @ 0 "" 2 + 2826 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2827 0130 92FA23F2 shadd16 r2, r2, r3 + 2828 @ 0 "" 2 + 2829 .thumb + 2830 .syntax unified + 2831 0134 0EEA070E and lr, lr, r7 + 2832 0138 4EEA184E orr lr, lr, r8, lsr #16 + 2833 013c 40F804EB str lr, [r0], #4 @ unaligned + 2834 0140 D1F800E0 ldr lr, [r1] @ unaligned + 2835 .syntax unified + 2836 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2837 0144 9EFA23FE shadd16 lr, lr, r3 + 2838 @ 0 "" 2 + 2839 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2840 0148 9EFA23FE shadd16 lr, lr, r3 + 2841 @ 0 "" 2 + 2842 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2843 014c D2FA1EF2 qsub16 r2, r2, lr + 2844 @ 0 "" 2 + 2845 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2846 0150 A9FA12F8 qasx r8, r9, r2 + 2847 @ 0 "" 2 + 2848 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2849 0154 E9FA12F9 qsax r9, r9, r2 + 2850 @ 0 "" 2 + 2851 .thumb + 2852 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 50 + + + 2853 0158 5AF8042B ldr r2, [r10], #4 @ unaligned + 2854 .syntax unified + 2855 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2856 015c 22FB09FE smuad lr, r2, r9 + 2857 @ 0 "" 2 + 2858 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2859 0160 42FB19F2 smusdx r2, r2, r9 + 2860 @ 0 "" 2 + 2861 .thumb + 2862 .syntax unified + 2863 0164 3A40 ands r2, r2, r7 + 2864 0166 42EA1E42 orr r2, r2, lr, lsr #16 + 2865 016a 45F8042B str r2, [r5], #4 @ unaligned + 2866 016e 5CF80C2B ldr r2, [ip], #12 @ unaligned + 2867 .syntax unified + 2868 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2869 0172 22FB08FE smuad lr, r2, r8 + 2870 @ 0 "" 2 + 2871 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2872 0176 42FB18F2 smusdx r2, r2, r8 + 2873 @ 0 "" 2 + 2874 .thumb + 2875 .syntax unified + 2876 017a 3A40 ands r2, r2, r7 + 2877 017c 42EA1E42 orr r2, r2, lr, lsr #16 + 2878 0180 013C subs r4, r4, #1 + 2879 0182 41F8042B str r2, [r1], #4 @ unaligned + 2880 0186 A8D1 bne .L328 + 2881 0188 159B ldr r3, [sp, #84] + 2882 018a 042B cmp r3, #4 + 2883 018c 40F29880 bls .L329 + 2884 0190 DFF8ACB1 ldr fp, .L411 + 2885 0194 1093 str r3, [sp, #64] + 2886 0196 0494 str r4, [sp, #16] + 2887 0198 0423 movs r3, #4 + 2888 .L332: + 2889 019a 109A ldr r2, [sp, #64] + 2890 019c 0392 str r2, [sp, #12] + 2891 019e 9108 lsrs r1, r2, #2 + 2892 01a0 1046 mov r0, r2 + 2893 01a2 03EB4302 add r2, r3, r3, lsl #1 + 2894 01a6 9200 lsls r2, r2, #2 + 2895 01a8 1091 str r1, [sp, #64] + 2896 01aa 0F92 str r2, [sp, #60] + 2897 01ac 0A46 mov r2, r1 + 2898 01ae 8900 lsls r1, r1, #2 + 2899 01b0 0C91 str r1, [sp, #48] + 2900 01b2 0299 ldr r1, [sp, #8] + 2901 01b4 9142 cmp r1, r2 + 2902 01b6 28BF it cs + 2903 01b8 1146 movcs r1, r2 + 2904 01ba 0D91 str r1, [sp, #52] + 2905 01bc 9900 lsls r1, r3, #2 + 2906 01be DB00 lsls r3, r3, #3 + 2907 01c0 0E93 str r3, [sp, #56] + 2908 01c2 119B ldr r3, [sp, #68] + 2909 01c4 0A93 str r3, [sp, #40] + ARM GAS /tmp/ccFqHvis.s page 51 + + + 2910 01c6 03EBC203 add r3, r3, r2, lsl #3 + 2911 01ca 0693 str r3, [sp, #24] + 2912 01cc 129B ldr r3, [sp, #72] + 2913 01ce 0993 str r3, [sp, #36] + 2914 01d0 CDE90733 strd r3, r3, [sp, #28] + 2915 01d4 0023 movs r3, #0 + 2916 01d6 8700 lsls r7, r0, #2 + 2917 01d8 0B91 str r1, [sp, #44] + 2918 01da 0593 str r3, [sp, #20] + 2919 .L331: + 2920 01dc 099B ldr r3, [sp, #36] + 2921 01de 0A9A ldr r2, [sp, #40] + 2922 01e0 D3F800A0 ldr r10, [r3] @ unaligned + 2923 01e4 089B ldr r3, [sp, #32] + 2924 01e6 DDF814E0 ldr lr, [sp, #20] + 2925 01ea D3F80090 ldr r9, [r3] @ unaligned + 2926 01ee 079B ldr r3, [sp, #28] + 2927 01f0 D3F80080 ldr r8, [r3] @ unaligned + 2928 01f4 0C9B ldr r3, [sp, #48] + 2929 01f6 1646 mov r6, r2 + 2930 01f8 9818 adds r0, r3, r2 + 2931 01fa 069A ldr r2, [sp, #24] + 2932 01fc 1546 mov r5, r2 + 2933 01fe 9918 adds r1, r3, r2 + 2934 .L330: + 2935 0200 3268 ldr r2, [r6] @ unaligned + 2936 0202 2C68 ldr r4, [r5] @ unaligned + 2937 .syntax unified + 2938 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2939 0204 92FA14F3 qadd16 r3, r2, r4 + 2940 @ 0 "" 2 + 2941 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2942 0208 D2FA14F2 qsub16 r2, r2, r4 + 2943 @ 0 "" 2 + 2944 .thumb + 2945 .syntax unified + 2946 020c 0468 ldr r4, [r0] @ unaligned + 2947 020e D1F800C0 ldr ip, [r1] @ unaligned + 2948 .syntax unified + 2949 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2950 0212 94FA1CF4 qadd16 r4, r4, ip + 2951 @ 0 "" 2 + 2952 .thumb + 2953 .syntax unified + 2954 0216 0193 str r3, [sp, #4] + 2955 .syntax unified + 2956 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2957 0218 93FA24FC shadd16 ip, r3, r4 + 2958 @ 0 "" 2 + 2959 .thumb + 2960 .syntax unified + 2961 021c 049B ldr r3, [sp, #16] + 2962 .syntax unified + 2963 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2964 021e 9CFA23FC shadd16 ip, ip, r3 + 2965 @ 0 "" 2 + 2966 .thumb + ARM GAS /tmp/ccFqHvis.s page 52 + + + 2967 .syntax unified + 2968 0222 C6F800C0 str ip, [r6] @ unaligned + 2969 0226 019B ldr r3, [sp, #4] + 2970 0228 3E44 add r6, r6, r7 + 2971 .syntax unified + 2972 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2973 022a D3FA24F3 shsub16 r3, r3, r4 + 2974 @ 0 "" 2 + 2975 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2976 022e 29FB03FC smuad ip, r9, r3 + 2977 @ 0 "" 2 + 2978 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2979 0232 49FB13F3 smusdx r3, r9, r3 + 2980 @ 0 "" 2 + 2981 .thumb + 2982 .syntax unified + 2983 0236 03EA0B03 and r3, r3, fp + 2984 023a 43EA1C43 orr r3, r3, ip, lsr #16 + 2985 023e D0F800C0 ldr ip, [r0] @ unaligned + 2986 0242 0360 str r3, [r0] @ unaligned + 2987 0244 0C68 ldr r4, [r1] @ unaligned + 2988 0246 3844 add r0, r0, r7 + 2989 .syntax unified + 2990 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2991 0248 DCFA14F4 qsub16 r4, ip, r4 + 2992 @ 0 "" 2 + 2993 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2994 024c A2FA24F3 shasx r3, r2, r4 + 2995 @ 0 "" 2 + 2996 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 2997 0250 E2FA24F2 shsax r2, r2, r4 + 2998 @ 0 "" 2 + 2999 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3000 0254 2AFB02F4 smuad r4, r10, r2 + 3001 @ 0 "" 2 + 3002 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3003 0258 4AFB12F2 smusdx r2, r10, r2 + 3004 @ 0 "" 2 + 3005 .thumb + 3006 .syntax unified + 3007 025c 02EA0B02 and r2, r2, fp + 3008 0260 42EA1442 orr r2, r2, r4, lsr #16 + 3009 0264 2A60 str r2, [r5] @ unaligned + 3010 0266 3D44 add r5, r5, r7 + 3011 .syntax unified + 3012 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3013 0268 28FB03F2 smuad r2, r8, r3 + 3014 @ 0 "" 2 + 3015 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3016 026c 48FB13F3 smusdx r3, r8, r3 + 3017 @ 0 "" 2 + 3018 .thumb + 3019 .syntax unified + 3020 0270 03EA0B03 and r3, r3, fp + 3021 0274 43EA1243 orr r3, r3, r2, lsr #16 + 3022 0278 0B60 str r3, [r1] @ unaligned + 3023 027a 039B ldr r3, [sp, #12] + ARM GAS /tmp/ccFqHvis.s page 53 + + + 3024 027c 9E44 add lr, lr, r3 + 3025 027e 029B ldr r3, [sp, #8] + 3026 0280 7345 cmp r3, lr + 3027 0282 3944 add r1, r1, r7 + 3028 0284 BCD8 bhi .L330 + 3029 0286 099A ldr r2, [sp, #36] + 3030 0288 0B99 ldr r1, [sp, #44] + 3031 028a 059B ldr r3, [sp, #20] + 3032 028c 0A44 add r2, r2, r1 + 3033 028e 0992 str r2, [sp, #36] + 3034 0290 0E99 ldr r1, [sp, #56] + 3035 0292 089A ldr r2, [sp, #32] + 3036 0294 0A44 add r2, r2, r1 + 3037 0296 0892 str r2, [sp, #32] + 3038 0298 0F99 ldr r1, [sp, #60] + 3039 029a 079A ldr r2, [sp, #28] + 3040 029c 0A44 add r2, r2, r1 + 3041 029e 0792 str r2, [sp, #28] + 3042 02a0 0A9A ldr r2, [sp, #40] + 3043 02a2 0432 adds r2, r2, #4 + 3044 02a4 0A92 str r2, [sp, #40] + 3045 02a6 069A ldr r2, [sp, #24] + 3046 02a8 0432 adds r2, r2, #4 + 3047 02aa 0692 str r2, [sp, #24] + 3048 02ac 0D9A ldr r2, [sp, #52] + 3049 02ae 0133 adds r3, r3, #1 + 3050 02b0 9342 cmp r3, r2 + 3051 02b2 0593 str r3, [sp, #20] + 3052 02b4 92D3 bcc .L331 + 3053 02b6 109A ldr r2, [sp, #64] + 3054 02b8 0B9B ldr r3, [sp, #44] + 3055 02ba 042A cmp r2, #4 + 3056 02bc 3FF66DAF bhi .L332 + 3057 .L329: + 3058 02c0 119B ldr r3, [sp, #68] + 3059 02c2 159E ldr r6, [sp, #84] + 3060 .L333: + 3061 02c4 1A68 ldr r2, [r3] @ unaligned + 3062 02c6 5968 ldr r1, [r3, #4] @ unaligned + 3063 02c8 9F68 ldr r7, [r3, #8] @ unaligned + 3064 02ca DC68 ldr r4, [r3, #12] @ unaligned + 3065 .syntax unified + 3066 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3067 02cc 92FA17F0 qadd16 r0, r2, r7 + 3068 @ 0 "" 2 + 3069 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3070 02d0 91FA14F5 qadd16 r5, r1, r4 + 3071 @ 0 "" 2 + 3072 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3073 02d4 90FA25F5 shadd16 r5, r0, r5 + 3074 @ 0 "" 2 + 3075 .thumb + 3076 .syntax unified + 3077 02d8 1D60 str r5, [r3] @ unaligned + 3078 .syntax unified + 3079 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3080 02da 91FA14F5 qadd16 r5, r1, r4 + ARM GAS /tmp/ccFqHvis.s page 54 + + + 3081 @ 0 "" 2 + 3082 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3083 02de D0FA25F0 shsub16 r0, r0, r5 + 3084 @ 0 "" 2 + 3085 .thumb + 3086 .syntax unified + 3087 02e2 5860 str r0, [r3, #4] @ unaligned + 3088 .syntax unified + 3089 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3090 02e4 D2FA17F2 qsub16 r2, r2, r7 + 3091 @ 0 "" 2 + 3092 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3093 02e8 D1FA14F1 qsub16 r1, r1, r4 + 3094 @ 0 "" 2 + 3095 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3096 02ec E2FA21F0 shsax r0, r2, r1 + 3097 @ 0 "" 2 + 3098 .thumb + 3099 .syntax unified + 3100 02f0 9860 str r0, [r3, #8] @ unaligned + 3101 .syntax unified + 3102 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3103 02f2 A2FA21F2 shasx r2, r2, r1 + 3104 @ 0 "" 2 + 3105 .thumb + 3106 .syntax unified + 3107 02f6 013E subs r6, r6, #1 + 3108 02f8 DA60 str r2, [r3, #12] @ unaligned + 3109 02fa 03F11003 add r3, r3, #16 + 3110 02fe E1D1 bne .L333 + 3111 0300 94E6 b .L315 + 3112 .L403: + 3113 0302 B0F5807F cmp r0, #256 + 3114 0306 24D0 beq .L311 + 3115 0308 08D9 bls .L408 + 3116 030a B0F5006F cmp r0, #2048 + 3117 030e 10D0 beq .L314 + 3118 0310 18D9 bls .L409 + 3119 0312 B0F5805F cmp r0, #4096 + 3120 0316 7FF489AE bne .L315 + 3121 031a 1AE0 b .L311 + 3122 .L408: + 3123 031c 4028 cmp r0, #64 + 3124 031e 18D0 beq .L311 + 3125 0320 02D9 bls .L410 + 3126 0322 8028 cmp r0, #128 + 3127 0324 05D0 beq .L314 + 3128 0326 81E6 b .L315 + 3129 .L410: + 3130 0328 1028 cmp r0, #16 + 3131 032a 12D0 beq .L311 + 3132 032c 2028 cmp r0, #32 + 3133 032e 7FF47DAE bne .L315 + 3134 .L314: + 3135 0332 149B ldr r3, [sp, #80] + 3136 0334 0299 ldr r1, [sp, #8] + 3137 0336 5A68 ldr r2, [r3, #4] + ARM GAS /tmp/ccFqHvis.s page 55 + + + 3138 0338 1198 ldr r0, [sp, #68] + 3139 033a FFF7FEFF bl arm_cfft_radix4by2_inverse_q15 + 3140 033e 75E6 b .L315 + 3141 .L412: + 3142 .align 2 + 3143 .L411: + 3144 0340 0000FFFF .word -65536 + 3145 .L409: + 3146 0344 B0F5007F cmp r0, #512 + 3147 0348 F3D0 beq .L314 + 3148 034a B0F5806F cmp r0, #1024 + 3149 034e 7FF46DAE bne .L315 + 3150 .L311: + 3151 0352 029B ldr r3, [sp, #8] + 3152 0354 119E ldr r6, [sp, #68] + 3153 0356 924F ldr r7, .L413 + 3154 0358 9C08 lsrs r4, r3, #2 + 3155 035a 149B ldr r3, [sp, #80] + 3156 035c 1594 str r4, [sp, #84] + 3157 035e 5B68 ldr r3, [r3, #4] + 3158 0360 1293 str r3, [sp, #72] + 3159 0362 06EBC405 add r5, r6, r4, lsl #3 + 3160 0366 9946 mov r9, r3 + 3161 0368 9B46 mov fp, r3 + 3162 036a 9A46 mov r10, r3 + 3163 036c 06EB8400 add r0, r6, r4, lsl #2 + 3164 0370 05EB8401 add r1, r5, r4, lsl #2 + 3165 0374 0023 movs r3, #0 + 3166 .L317: + 3167 0376 D6F80080 ldr r8, [r6] @ unaligned + 3168 .syntax unified + 3169 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3170 037a 98FA23F8 shadd16 r8, r8, r3 + 3171 @ 0 "" 2 + 3172 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3173 037e 98FA23F8 shadd16 r8, r8, r3 + 3174 @ 0 "" 2 + 3175 .thumb + 3176 .syntax unified + 3177 0382 2A68 ldr r2, [r5] @ unaligned + 3178 .syntax unified + 3179 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3180 0384 92FA23F2 shadd16 r2, r2, r3 + 3181 @ 0 "" 2 + 3182 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3183 0388 92FA23F2 shadd16 r2, r2, r3 + 3184 @ 0 "" 2 + 3185 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3186 038c 98FA12FC qadd16 ip, r8, r2 + 3187 @ 0 "" 2 + 3188 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3189 0390 D8FA12F8 qsub16 r8, r8, r2 + 3190 @ 0 "" 2 + 3191 .thumb + 3192 .syntax unified + 3193 0394 0268 ldr r2, [r0] @ unaligned + 3194 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 56 + + + 3195 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3196 0396 92FA23F2 shadd16 r2, r2, r3 + 3197 @ 0 "" 2 + 3198 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3199 039a 92FA23F2 shadd16 r2, r2, r3 + 3200 @ 0 "" 2 + 3201 .thumb + 3202 .syntax unified + 3203 039e D1F800E0 ldr lr, [r1] @ unaligned + 3204 .syntax unified + 3205 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3206 03a2 9EFA23FE shadd16 lr, lr, r3 + 3207 @ 0 "" 2 + 3208 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3209 03a6 9EFA23FE shadd16 lr, lr, r3 + 3210 @ 0 "" 2 + 3211 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3212 03aa 92FA1EF2 qadd16 r2, r2, lr + 3213 @ 0 "" 2 + 3214 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3215 03ae 9CFA22FE shadd16 lr, ip, r2 + 3216 @ 0 "" 2 + 3217 .thumb + 3218 .syntax unified + 3219 03b2 46F804EB str lr, [r6], #4 @ unaligned + 3220 .syntax unified + 3221 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3222 03b6 DCFA12FC qsub16 ip, ip, r2 + 3223 @ 0 "" 2 + 3224 .thumb + 3225 .syntax unified + 3226 03ba 5BF8082B ldr r2, [fp], #8 @ unaligned + 3227 .syntax unified + 3228 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3229 03be 42FB0CFE smusd lr, r2, ip + 3230 @ 0 "" 2 + 3231 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3232 03c2 22FB1CFC smuadx ip, r2, ip + 3233 @ 0 "" 2 + 3234 .thumb + 3235 .syntax unified + 3236 03c6 0268 ldr r2, [r0] @ unaligned + 3237 .syntax unified + 3238 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3239 03c8 92FA23F2 shadd16 r2, r2, r3 + 3240 @ 0 "" 2 + 3241 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3242 03cc 92FA23F2 shadd16 r2, r2, r3 + 3243 @ 0 "" 2 + 3244 .thumb + 3245 .syntax unified + 3246 03d0 0CEA070C and ip, ip, r7 + 3247 03d4 4CEA1E4C orr ip, ip, lr, lsr #16 + 3248 03d8 40F804CB str ip, [r0], #4 @ unaligned + 3249 03dc D1F800C0 ldr ip, [r1] @ unaligned + 3250 .syntax unified + 3251 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccFqHvis.s page 57 + + + 3252 03e0 9CFA23FC shadd16 ip, ip, r3 + 3253 @ 0 "" 2 + 3254 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3255 03e4 9CFA23FC shadd16 ip, ip, r3 + 3256 @ 0 "" 2 + 3257 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3258 03e8 D2FA1CF2 qsub16 r2, r2, ip + 3259 @ 0 "" 2 + 3260 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3261 03ec E8FA12FE qsax lr, r8, r2 + 3262 @ 0 "" 2 + 3263 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3264 03f0 A8FA12F8 qasx r8, r8, r2 + 3265 @ 0 "" 2 + 3266 .thumb + 3267 .syntax unified + 3268 03f4 5AF8042B ldr r2, [r10], #4 @ unaligned + 3269 .syntax unified + 3270 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3271 03f8 42FB08FC smusd ip, r2, r8 + 3272 @ 0 "" 2 + 3273 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3274 03fc 22FB18F2 smuadx r2, r2, r8 + 3275 @ 0 "" 2 + 3276 .thumb + 3277 .syntax unified + 3278 0400 3A40 ands r2, r2, r7 + 3279 0402 42EA1C42 orr r2, r2, ip, lsr #16 + 3280 0406 45F8042B str r2, [r5], #4 @ unaligned + 3281 040a 59F80C2B ldr r2, [r9], #12 @ unaligned + 3282 .syntax unified + 3283 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3284 040e 42FB0EFC smusd ip, r2, lr + 3285 @ 0 "" 2 + 3286 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3287 0412 22FB1EF2 smuadx r2, r2, lr + 3288 @ 0 "" 2 + 3289 .thumb + 3290 .syntax unified + 3291 0416 3A40 ands r2, r2, r7 + 3292 0418 42EA1C42 orr r2, r2, ip, lsr #16 + 3293 041c 013C subs r4, r4, #1 + 3294 041e 41F8042B str r2, [r1], #4 @ unaligned + 3295 0422 A8D1 bne .L317 + 3296 0424 159B ldr r3, [sp, #84] + 3297 0426 042B cmp r3, #4 + 3298 0428 40F29880 bls .L318 + 3299 042c DFF870B1 ldr fp, .L413 + 3300 0430 1093 str r3, [sp, #64] + 3301 0432 0494 str r4, [sp, #16] + 3302 0434 0423 movs r3, #4 + 3303 .L321: + 3304 0436 109A ldr r2, [sp, #64] + 3305 0438 0392 str r2, [sp, #12] + 3306 043a 9108 lsrs r1, r2, #2 + 3307 043c 1046 mov r0, r2 + 3308 043e 03EB4302 add r2, r3, r3, lsl #1 + ARM GAS /tmp/ccFqHvis.s page 58 + + + 3309 0442 9200 lsls r2, r2, #2 + 3310 0444 1091 str r1, [sp, #64] + 3311 0446 0F92 str r2, [sp, #60] + 3312 0448 0A46 mov r2, r1 + 3313 044a 8900 lsls r1, r1, #2 + 3314 044c 0C91 str r1, [sp, #48] + 3315 044e 0299 ldr r1, [sp, #8] + 3316 0450 9142 cmp r1, r2 + 3317 0452 28BF it cs + 3318 0454 1146 movcs r1, r2 + 3319 0456 0E91 str r1, [sp, #56] + 3320 0458 9900 lsls r1, r3, #2 + 3321 045a DB00 lsls r3, r3, #3 + 3322 045c 0D93 str r3, [sp, #52] + 3323 045e 119B ldr r3, [sp, #68] + 3324 0460 0993 str r3, [sp, #36] + 3325 0462 03EBC203 add r3, r3, r2, lsl #3 + 3326 0466 0893 str r3, [sp, #32] + 3327 0468 129B ldr r3, [sp, #72] + 3328 046a 0A93 str r3, [sp, #40] + 3329 046c CDE90633 strd r3, r3, [sp, #24] + 3330 0470 0023 movs r3, #0 + 3331 0472 8700 lsls r7, r0, #2 + 3332 0474 0B91 str r1, [sp, #44] + 3333 0476 0593 str r3, [sp, #20] + 3334 .L320: + 3335 0478 0A9B ldr r3, [sp, #40] + 3336 047a 099A ldr r2, [sp, #36] + 3337 047c D3F800A0 ldr r10, [r3] @ unaligned + 3338 0480 079B ldr r3, [sp, #28] + 3339 0482 DDF814E0 ldr lr, [sp, #20] + 3340 0486 D3F80090 ldr r9, [r3] @ unaligned + 3341 048a 069B ldr r3, [sp, #24] + 3342 048c D3F80080 ldr r8, [r3] @ unaligned + 3343 0490 0C9B ldr r3, [sp, #48] + 3344 0492 1646 mov r6, r2 + 3345 0494 9818 adds r0, r3, r2 + 3346 0496 089A ldr r2, [sp, #32] + 3347 0498 1546 mov r5, r2 + 3348 049a 9918 adds r1, r3, r2 + 3349 .L319: + 3350 049c 3268 ldr r2, [r6] @ unaligned + 3351 049e 2C68 ldr r4, [r5] @ unaligned + 3352 .syntax unified + 3353 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3354 04a0 92FA14F3 qadd16 r3, r2, r4 + 3355 @ 0 "" 2 + 3356 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3357 04a4 D2FA14F2 qsub16 r2, r2, r4 + 3358 @ 0 "" 2 + 3359 .thumb + 3360 .syntax unified + 3361 04a8 0468 ldr r4, [r0] @ unaligned + 3362 04aa D1F800C0 ldr ip, [r1] @ unaligned + 3363 .syntax unified + 3364 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3365 04ae 94FA1CF4 qadd16 r4, r4, ip + ARM GAS /tmp/ccFqHvis.s page 59 + + + 3366 @ 0 "" 2 + 3367 .thumb + 3368 .syntax unified + 3369 04b2 0193 str r3, [sp, #4] + 3370 .syntax unified + 3371 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3372 04b4 93FA24FC shadd16 ip, r3, r4 + 3373 @ 0 "" 2 + 3374 .thumb + 3375 .syntax unified + 3376 04b8 049B ldr r3, [sp, #16] + 3377 .syntax unified + 3378 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3379 04ba 9CFA23FC shadd16 ip, ip, r3 + 3380 @ 0 "" 2 + 3381 .thumb + 3382 .syntax unified + 3383 04be C6F800C0 str ip, [r6] @ unaligned + 3384 04c2 019B ldr r3, [sp, #4] + 3385 04c4 3E44 add r6, r6, r7 + 3386 .syntax unified + 3387 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3388 04c6 D3FA24F3 shsub16 r3, r3, r4 + 3389 @ 0 "" 2 + 3390 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3391 04ca 49FB03FC smusd ip, r9, r3 + 3392 @ 0 "" 2 + 3393 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3394 04ce 29FB13F3 smuadx r3, r9, r3 + 3395 @ 0 "" 2 + 3396 .thumb + 3397 .syntax unified + 3398 04d2 03EA0B03 and r3, r3, fp + 3399 04d6 43EA1C43 orr r3, r3, ip, lsr #16 + 3400 04da D0F800C0 ldr ip, [r0] @ unaligned + 3401 04de 0360 str r3, [r0] @ unaligned + 3402 04e0 0C68 ldr r4, [r1] @ unaligned + 3403 04e2 3844 add r0, r0, r7 + 3404 .syntax unified + 3405 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3406 04e4 DCFA14F4 qsub16 r4, ip, r4 + 3407 @ 0 "" 2 + 3408 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3409 04e8 E2FA24F3 shsax r3, r2, r4 + 3410 @ 0 "" 2 + 3411 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3412 04ec A2FA24F2 shasx r2, r2, r4 + 3413 @ 0 "" 2 + 3414 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3415 04f0 4AFB02F4 smusd r4, r10, r2 + 3416 @ 0 "" 2 + 3417 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3418 04f4 2AFB12F2 smuadx r2, r10, r2 + 3419 @ 0 "" 2 + 3420 .thumb + 3421 .syntax unified + 3422 04f8 02EA0B02 and r2, r2, fp + ARM GAS /tmp/ccFqHvis.s page 60 + + + 3423 04fc 42EA1442 orr r2, r2, r4, lsr #16 + 3424 0500 2A60 str r2, [r5] @ unaligned + 3425 0502 3D44 add r5, r5, r7 + 3426 .syntax unified + 3427 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3428 0504 48FB03F2 smusd r2, r8, r3 + 3429 @ 0 "" 2 + 3430 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3431 0508 28FB13F3 smuadx r3, r8, r3 + 3432 @ 0 "" 2 + 3433 .thumb + 3434 .syntax unified + 3435 050c 03EA0B03 and r3, r3, fp + 3436 0510 43EA1243 orr r3, r3, r2, lsr #16 + 3437 0514 0B60 str r3, [r1] @ unaligned + 3438 0516 039B ldr r3, [sp, #12] + 3439 0518 9E44 add lr, lr, r3 + 3440 051a 029B ldr r3, [sp, #8] + 3441 051c 7345 cmp r3, lr + 3442 051e 3944 add r1, r1, r7 + 3443 0520 BCD8 bhi .L319 + 3444 0522 DDE90A21 ldrd r2, r1, [sp, #40] + 3445 0526 0A44 add r2, r2, r1 + 3446 0528 0A92 str r2, [sp, #40] + 3447 052a 0D99 ldr r1, [sp, #52] + 3448 052c 079A ldr r2, [sp, #28] + 3449 052e 059B ldr r3, [sp, #20] + 3450 0530 0A44 add r2, r2, r1 + 3451 0532 0792 str r2, [sp, #28] + 3452 0534 0F99 ldr r1, [sp, #60] + 3453 0536 069A ldr r2, [sp, #24] + 3454 0538 0A44 add r2, r2, r1 + 3455 053a 0692 str r2, [sp, #24] + 3456 053c 099A ldr r2, [sp, #36] + 3457 053e 0432 adds r2, r2, #4 + 3458 0540 0992 str r2, [sp, #36] + 3459 0542 089A ldr r2, [sp, #32] + 3460 0544 0432 adds r2, r2, #4 + 3461 0546 0892 str r2, [sp, #32] + 3462 0548 0E9A ldr r2, [sp, #56] + 3463 054a 0133 adds r3, r3, #1 + 3464 054c 9342 cmp r3, r2 + 3465 054e 0593 str r3, [sp, #20] + 3466 0550 92D3 bcc .L320 + 3467 0552 109A ldr r2, [sp, #64] + 3468 0554 0B9B ldr r3, [sp, #44] + 3469 0556 042A cmp r2, #4 + 3470 0558 3FF66DAF bhi .L321 + 3471 .L318: + 3472 055c 119B ldr r3, [sp, #68] + 3473 055e 159E ldr r6, [sp, #84] + 3474 .L322: + 3475 0560 1A68 ldr r2, [r3] @ unaligned + 3476 0562 5968 ldr r1, [r3, #4] @ unaligned + 3477 0564 9F68 ldr r7, [r3, #8] @ unaligned + 3478 0566 DC68 ldr r4, [r3, #12] @ unaligned + 3479 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 61 + + + 3480 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3481 0568 92FA17F0 qadd16 r0, r2, r7 + 3482 @ 0 "" 2 + 3483 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3484 056c 91FA14F5 qadd16 r5, r1, r4 + 3485 @ 0 "" 2 + 3486 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3487 0570 90FA25F5 shadd16 r5, r0, r5 + 3488 @ 0 "" 2 + 3489 .thumb + 3490 .syntax unified + 3491 0574 1D60 str r5, [r3] @ unaligned + 3492 .syntax unified + 3493 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3494 0576 91FA14F5 qadd16 r5, r1, r4 + 3495 @ 0 "" 2 + 3496 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3497 057a D0FA25F0 shsub16 r0, r0, r5 + 3498 @ 0 "" 2 + 3499 .thumb + 3500 .syntax unified + 3501 057e 5860 str r0, [r3, #4] @ unaligned + 3502 .syntax unified + 3503 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3504 0580 D2FA17F2 qsub16 r2, r2, r7 + 3505 @ 0 "" 2 + 3506 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3507 0584 D1FA14F1 qsub16 r1, r1, r4 + 3508 @ 0 "" 2 + 3509 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3510 0588 A2FA21F0 shasx r0, r2, r1 + 3511 @ 0 "" 2 + 3512 .thumb + 3513 .syntax unified + 3514 058c 9860 str r0, [r3, #8] @ unaligned + 3515 .syntax unified + 3516 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 3517 058e E2FA21F2 shsax r2, r2, r1 + 3518 @ 0 "" 2 + 3519 .thumb + 3520 .syntax unified + 3521 0592 013E subs r6, r6, #1 + 3522 0594 DA60 str r2, [r3, #12] @ unaligned + 3523 0596 03F11003 add r3, r3, #16 + 3524 059a E1D1 bne .L322 + 3525 059c 46E5 b .L315 + 3526 .L414: + 3527 059e 00BF .align 2 + 3528 .L413: + 3529 05a0 0000FFFF .word -65536 + 3531 .section .text.arm_cfft_init_f32,"ax",%progbits + 3532 .align 1 + 3533 .p2align 2,,3 + 3534 .global arm_cfft_init_f32 + 3535 .syntax unified + 3536 .thumb + 3537 .thumb_func + ARM GAS /tmp/ccFqHvis.s page 62 + + + 3538 .fpu fpv4-sp-d16 + 3540 arm_cfft_init_f32: + 3541 @ args = 0, pretend = 0, frame = 0 + 3542 @ frame_needed = 0, uses_anonymous_args = 0 + 3543 @ link register save eliminated. + 3544 0000 0346 mov r3, r0 + 3545 0002 B1F5807F cmp r1, #256 + 3546 0006 4FF00000 mov r0, #0 + 3547 000a 10B4 push {r4} + 3548 000c 1980 strh r1, [r3] @ movhi + 3549 000e 5860 str r0, [r3, #4] + 3550 0010 33D0 beq .L416 + 3551 0012 18D9 bls .L431 + 3552 0014 B1F5006F cmp r1, #2048 + 3553 0018 27D0 beq .L424 + 3554 001a 0CD9 bls .L432 + 3555 001c B1F5805F cmp r1, #4096 + 3556 0020 1ED1 bne .L428 + 3557 0022 174A ldr r2, .L434 + 3558 .L430: + 3559 0024 9468 ldr r4, [r2, #8] + 3560 0026 9189 ldrh r1, [r2, #12] + 3561 0028 5268 ldr r2, [r2, #4] + 3562 002a 9C60 str r4, [r3, #8] + 3563 002c 5A60 str r2, [r3, #4] + 3564 002e 5DF8044B ldr r4, [sp], #4 + 3565 0032 9981 strh r1, [r3, #12] @ movhi + 3566 0034 7047 bx lr + 3567 .L432: + 3568 0036 B1F5007F cmp r1, #512 + 3569 003a 18D0 beq .L426 + 3570 003c B1F5806F cmp r1, #1024 + 3571 0040 0ED1 bne .L428 + 3572 0042 104A ldr r2, .L434+4 + 3573 0044 EEE7 b .L430 + 3574 .L431: + 3575 0046 4029 cmp r1, #64 + 3576 0048 13D0 beq .L418 + 3577 004a 03D9 bls .L433 + 3578 004c 8029 cmp r1, #128 + 3579 004e 07D1 bne .L428 + 3580 0050 0D4A ldr r2, .L434+8 + 3581 0052 E7E7 b .L430 + 3582 .L433: + 3583 0054 1029 cmp r1, #16 + 3584 0056 0ED0 beq .L420 + 3585 0058 2029 cmp r1, #32 + 3586 005a 01D1 bne .L428 + 3587 005c 0B4A ldr r2, .L434+12 + 3588 005e E1E7 b .L430 + 3589 .L428: + 3590 0060 4FF0FF30 mov r0, #-1 + 3591 0064 5DF8044B ldr r4, [sp], #4 + 3592 0068 7047 bx lr + 3593 .L424: + 3594 006a 094A ldr r2, .L434+16 + 3595 006c DAE7 b .L430 + ARM GAS /tmp/ccFqHvis.s page 63 + + + 3596 .L426: + 3597 006e 094A ldr r2, .L434+20 + 3598 0070 D8E7 b .L430 + 3599 .L418: + 3600 0072 094A ldr r2, .L434+24 + 3601 0074 D6E7 b .L430 + 3602 .L420: + 3603 0076 094A ldr r2, .L434+28 + 3604 0078 D4E7 b .L430 + 3605 .L416: + 3606 007a 094A ldr r2, .L434+32 + 3607 007c D2E7 b .L430 + 3608 .L435: + 3609 007e 00BF .align 2 + 3610 .L434: + 3611 0080 00000000 .word arm_cfft_sR_f32_len4096 + 3612 0084 00000000 .word arm_cfft_sR_f32_len1024 + 3613 0088 00000000 .word arm_cfft_sR_f32_len128 + 3614 008c 00000000 .word arm_cfft_sR_f32_len32 + 3615 0090 00000000 .word arm_cfft_sR_f32_len2048 + 3616 0094 00000000 .word arm_cfft_sR_f32_len512 + 3617 0098 00000000 .word arm_cfft_sR_f32_len64 + 3618 009c 00000000 .word arm_cfft_sR_f32_len16 + 3619 00a0 00000000 .word arm_cfft_sR_f32_len256 + 3621 .section .text.arm_cfft_init_f64,"ax",%progbits + 3622 .align 1 + 3623 .p2align 2,,3 + 3624 .global arm_cfft_init_f64 + 3625 .syntax unified + 3626 .thumb + 3627 .thumb_func + 3628 .fpu fpv4-sp-d16 + 3630 arm_cfft_init_f64: + 3631 @ args = 0, pretend = 0, frame = 0 + 3632 @ frame_needed = 0, uses_anonymous_args = 0 + 3633 @ link register save eliminated. + 3634 0000 0346 mov r3, r0 + 3635 0002 B1F5807F cmp r1, #256 + 3636 0006 4FF00000 mov r0, #0 + 3637 000a 10B4 push {r4} + 3638 000c 1980 strh r1, [r3] @ movhi + 3639 000e 5860 str r0, [r3, #4] + 3640 0010 33D0 beq .L437 + 3641 0012 18D9 bls .L452 + 3642 0014 B1F5006F cmp r1, #2048 + 3643 0018 27D0 beq .L445 + 3644 001a 0CD9 bls .L453 + 3645 001c B1F5805F cmp r1, #4096 + 3646 0020 1ED1 bne .L449 + 3647 0022 174A ldr r2, .L455 + 3648 .L451: + 3649 0024 9468 ldr r4, [r2, #8] + 3650 0026 9189 ldrh r1, [r2, #12] + 3651 0028 5268 ldr r2, [r2, #4] + 3652 002a 9C60 str r4, [r3, #8] + 3653 002c 5A60 str r2, [r3, #4] + 3654 002e 5DF8044B ldr r4, [sp], #4 + ARM GAS /tmp/ccFqHvis.s page 64 + + + 3655 0032 9981 strh r1, [r3, #12] @ movhi + 3656 0034 7047 bx lr + 3657 .L453: + 3658 0036 B1F5007F cmp r1, #512 + 3659 003a 18D0 beq .L447 + 3660 003c B1F5806F cmp r1, #1024 + 3661 0040 0ED1 bne .L449 + 3662 0042 104A ldr r2, .L455+4 + 3663 0044 EEE7 b .L451 + 3664 .L452: + 3665 0046 4029 cmp r1, #64 + 3666 0048 13D0 beq .L439 + 3667 004a 03D9 bls .L454 + 3668 004c 8029 cmp r1, #128 + 3669 004e 07D1 bne .L449 + 3670 0050 0D4A ldr r2, .L455+8 + 3671 0052 E7E7 b .L451 + 3672 .L454: + 3673 0054 1029 cmp r1, #16 + 3674 0056 0ED0 beq .L441 + 3675 0058 2029 cmp r1, #32 + 3676 005a 01D1 bne .L449 + 3677 005c 0B4A ldr r2, .L455+12 + 3678 005e E1E7 b .L451 + 3679 .L449: + 3680 0060 4FF0FF30 mov r0, #-1 + 3681 0064 5DF8044B ldr r4, [sp], #4 + 3682 0068 7047 bx lr + 3683 .L445: + 3684 006a 094A ldr r2, .L455+16 + 3685 006c DAE7 b .L451 + 3686 .L447: + 3687 006e 094A ldr r2, .L455+20 + 3688 0070 D8E7 b .L451 + 3689 .L439: + 3690 0072 094A ldr r2, .L455+24 + 3691 0074 D6E7 b .L451 + 3692 .L441: + 3693 0076 094A ldr r2, .L455+28 + 3694 0078 D4E7 b .L451 + 3695 .L437: + 3696 007a 094A ldr r2, .L455+32 + 3697 007c D2E7 b .L451 + 3698 .L456: + 3699 007e 00BF .align 2 + 3700 .L455: + 3701 0080 00000000 .word arm_cfft_sR_f64_len4096 + 3702 0084 00000000 .word arm_cfft_sR_f64_len1024 + 3703 0088 00000000 .word arm_cfft_sR_f64_len128 + 3704 008c 00000000 .word arm_cfft_sR_f64_len32 + 3705 0090 00000000 .word arm_cfft_sR_f64_len2048 + 3706 0094 00000000 .word arm_cfft_sR_f64_len512 + 3707 0098 00000000 .word arm_cfft_sR_f64_len64 + 3708 009c 00000000 .word arm_cfft_sR_f64_len16 + 3709 00a0 00000000 .word arm_cfft_sR_f64_len256 + 3711 .section .text.arm_cfft_init_q15,"ax",%progbits + 3712 .align 1 + ARM GAS /tmp/ccFqHvis.s page 65 + + + 3713 .p2align 2,,3 + 3714 .global arm_cfft_init_q15 + 3715 .syntax unified + 3716 .thumb + 3717 .thumb_func + 3718 .fpu fpv4-sp-d16 + 3720 arm_cfft_init_q15: + 3721 @ args = 0, pretend = 0, frame = 0 + 3722 @ frame_needed = 0, uses_anonymous_args = 0 + 3723 @ link register save eliminated. + 3724 0000 0346 mov r3, r0 + 3725 0002 B1F5807F cmp r1, #256 + 3726 0006 4FF00000 mov r0, #0 + 3727 000a 10B4 push {r4} + 3728 000c 1980 strh r1, [r3] @ movhi + 3729 000e 5860 str r0, [r3, #4] + 3730 0010 33D0 beq .L458 + 3731 0012 18D9 bls .L473 + 3732 0014 B1F5006F cmp r1, #2048 + 3733 0018 27D0 beq .L466 + 3734 001a 0CD9 bls .L474 + 3735 001c B1F5805F cmp r1, #4096 + 3736 0020 1ED1 bne .L470 + 3737 0022 174A ldr r2, .L476 + 3738 .L472: + 3739 0024 9468 ldr r4, [r2, #8] + 3740 0026 9189 ldrh r1, [r2, #12] + 3741 0028 5268 ldr r2, [r2, #4] + 3742 002a 9C60 str r4, [r3, #8] + 3743 002c 5A60 str r2, [r3, #4] + 3744 002e 5DF8044B ldr r4, [sp], #4 + 3745 0032 9981 strh r1, [r3, #12] @ movhi + 3746 0034 7047 bx lr + 3747 .L474: + 3748 0036 B1F5007F cmp r1, #512 + 3749 003a 18D0 beq .L468 + 3750 003c B1F5806F cmp r1, #1024 + 3751 0040 0ED1 bne .L470 + 3752 0042 104A ldr r2, .L476+4 + 3753 0044 EEE7 b .L472 + 3754 .L473: + 3755 0046 4029 cmp r1, #64 + 3756 0048 13D0 beq .L460 + 3757 004a 03D9 bls .L475 + 3758 004c 8029 cmp r1, #128 + 3759 004e 07D1 bne .L470 + 3760 0050 0D4A ldr r2, .L476+8 + 3761 0052 E7E7 b .L472 + 3762 .L475: + 3763 0054 1029 cmp r1, #16 + 3764 0056 0ED0 beq .L462 + 3765 0058 2029 cmp r1, #32 + 3766 005a 01D1 bne .L470 + 3767 005c 0B4A ldr r2, .L476+12 + 3768 005e E1E7 b .L472 + 3769 .L470: + 3770 0060 4FF0FF30 mov r0, #-1 + ARM GAS /tmp/ccFqHvis.s page 66 + + + 3771 0064 5DF8044B ldr r4, [sp], #4 + 3772 0068 7047 bx lr + 3773 .L466: + 3774 006a 094A ldr r2, .L476+16 + 3775 006c DAE7 b .L472 + 3776 .L468: + 3777 006e 094A ldr r2, .L476+20 + 3778 0070 D8E7 b .L472 + 3779 .L460: + 3780 0072 094A ldr r2, .L476+24 + 3781 0074 D6E7 b .L472 + 3782 .L462: + 3783 0076 094A ldr r2, .L476+28 + 3784 0078 D4E7 b .L472 + 3785 .L458: + 3786 007a 094A ldr r2, .L476+32 + 3787 007c D2E7 b .L472 + 3788 .L477: + 3789 007e 00BF .align 2 + 3790 .L476: + 3791 0080 00000000 .word arm_cfft_sR_q15_len4096 + 3792 0084 00000000 .word arm_cfft_sR_q15_len1024 + 3793 0088 00000000 .word arm_cfft_sR_q15_len128 + 3794 008c 00000000 .word arm_cfft_sR_q15_len32 + 3795 0090 00000000 .word arm_cfft_sR_q15_len2048 + 3796 0094 00000000 .word arm_cfft_sR_q15_len512 + 3797 0098 00000000 .word arm_cfft_sR_q15_len64 + 3798 009c 00000000 .word arm_cfft_sR_q15_len16 + 3799 00a0 00000000 .word arm_cfft_sR_q15_len256 + 3801 .section .text.arm_cfft_init_q31,"ax",%progbits + 3802 .align 1 + 3803 .p2align 2,,3 + 3804 .global arm_cfft_init_q31 + 3805 .syntax unified + 3806 .thumb + 3807 .thumb_func + 3808 .fpu fpv4-sp-d16 + 3810 arm_cfft_init_q31: + 3811 @ args = 0, pretend = 0, frame = 0 + 3812 @ frame_needed = 0, uses_anonymous_args = 0 + 3813 @ link register save eliminated. + 3814 0000 0346 mov r3, r0 + 3815 0002 B1F5807F cmp r1, #256 + 3816 0006 4FF00000 mov r0, #0 + 3817 000a 10B4 push {r4} + 3818 000c 1980 strh r1, [r3] @ movhi + 3819 000e 5860 str r0, [r3, #4] + 3820 0010 33D0 beq .L479 + 3821 0012 18D9 bls .L494 + 3822 0014 B1F5006F cmp r1, #2048 + 3823 0018 27D0 beq .L487 + 3824 001a 0CD9 bls .L495 + 3825 001c B1F5805F cmp r1, #4096 + 3826 0020 1ED1 bne .L491 + 3827 0022 174A ldr r2, .L497 + 3828 .L493: + 3829 0024 9468 ldr r4, [r2, #8] + ARM GAS /tmp/ccFqHvis.s page 67 + + + 3830 0026 9189 ldrh r1, [r2, #12] + 3831 0028 5268 ldr r2, [r2, #4] + 3832 002a 9C60 str r4, [r3, #8] + 3833 002c 5A60 str r2, [r3, #4] + 3834 002e 5DF8044B ldr r4, [sp], #4 + 3835 0032 9981 strh r1, [r3, #12] @ movhi + 3836 0034 7047 bx lr + 3837 .L495: + 3838 0036 B1F5007F cmp r1, #512 + 3839 003a 18D0 beq .L489 + 3840 003c B1F5806F cmp r1, #1024 + 3841 0040 0ED1 bne .L491 + 3842 0042 104A ldr r2, .L497+4 + 3843 0044 EEE7 b .L493 + 3844 .L494: + 3845 0046 4029 cmp r1, #64 + 3846 0048 13D0 beq .L481 + 3847 004a 03D9 bls .L496 + 3848 004c 8029 cmp r1, #128 + 3849 004e 07D1 bne .L491 + 3850 0050 0D4A ldr r2, .L497+8 + 3851 0052 E7E7 b .L493 + 3852 .L496: + 3853 0054 1029 cmp r1, #16 + 3854 0056 0ED0 beq .L483 + 3855 0058 2029 cmp r1, #32 + 3856 005a 01D1 bne .L491 + 3857 005c 0B4A ldr r2, .L497+12 + 3858 005e E1E7 b .L493 + 3859 .L491: + 3860 0060 4FF0FF30 mov r0, #-1 + 3861 0064 5DF8044B ldr r4, [sp], #4 + 3862 0068 7047 bx lr + 3863 .L487: + 3864 006a 094A ldr r2, .L497+16 + 3865 006c DAE7 b .L493 + 3866 .L489: + 3867 006e 094A ldr r2, .L497+20 + 3868 0070 D8E7 b .L493 + 3869 .L481: + 3870 0072 094A ldr r2, .L497+24 + 3871 0074 D6E7 b .L493 + 3872 .L483: + 3873 0076 094A ldr r2, .L497+28 + 3874 0078 D4E7 b .L493 + 3875 .L479: + 3876 007a 094A ldr r2, .L497+32 + 3877 007c D2E7 b .L493 + 3878 .L498: + 3879 007e 00BF .align 2 + 3880 .L497: + 3881 0080 00000000 .word arm_cfft_sR_q31_len4096 + 3882 0084 00000000 .word arm_cfft_sR_q31_len1024 + 3883 0088 00000000 .word arm_cfft_sR_q31_len128 + 3884 008c 00000000 .word arm_cfft_sR_q31_len32 + 3885 0090 00000000 .word arm_cfft_sR_q31_len2048 + 3886 0094 00000000 .word arm_cfft_sR_q31_len512 + ARM GAS /tmp/ccFqHvis.s page 68 + + + 3887 0098 00000000 .word arm_cfft_sR_q31_len64 + 3888 009c 00000000 .word arm_cfft_sR_q31_len16 + 3889 00a0 00000000 .word arm_cfft_sR_q31_len256 + 3891 .section .text.arm_radix2_butterfly_f32,"ax",%progbits + 3892 .align 1 + 3893 .p2align 2,,3 + 3894 .global arm_radix2_butterfly_f32 + 3895 .syntax unified + 3896 .thumb + 3897 .thumb_func + 3898 .fpu fpv4-sp-d16 + 3900 arm_radix2_butterfly_f32: + 3901 @ args = 0, pretend = 0, frame = 8 + 3902 @ frame_needed = 0, uses_anonymous_args = 0 + 3903 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 3904 0004 5FEA5108 lsrs r8, r1, #1 + 3905 0008 83B0 sub sp, sp, #12 + 3906 000a CDE90002 strd r0, r2, [sp] + 3907 000e 0C46 mov r4, r1 + 3908 0010 00F0E380 beq .L500 + 3909 0014 012B cmp r3, #1 + 3910 0016 40F0A880 bne .L521 + 3911 001a 0546 mov r5, r0 + 3912 001c 1646 mov r6, r2 + 3913 001e 0246 mov r2, r0 + 3914 0020 00EBC800 add r0, r0, r8, lsl #3 + 3915 0024 0146 mov r1, r0 + 3916 0026 0431 adds r1, r1, #4 + 3917 0028 0435 adds r5, r5, #4 + 3918 002a 0746 mov r7, r0 + 3919 .L504: + 3920 002c D2ED015A vldr.32 s11, [r2, #4] + 3921 0030 15ED015A vldr.32 s10, [r5, #-4] + 3922 0034 51ED016A vldr.32 s13, [r1, #-4] + 3923 0038 90ED017A vldr.32 s14, [r0, #4] + 3924 003c D6ED017A vldr.32 s15, [r6, #4] + 3925 0040 D6ED004A vldr.32 s9, [r6] + 3926 0044 75EE663A vsub.f32 s7, s10, s13 + 3927 0048 35EEC74A vsub.f32 s8, s11, s14 + 3928 004c 0832 adds r2, r2, #8 + 3929 004e 24EE276A vmul.f32 s12, s8, s15 + 3930 0052 67EEE37A vnmul.f32 s15, s15, s7 + 3931 0056 A3EEA46A vfma.f32 s12, s7, s9 + 3932 005a 0830 adds r0, r0, #8 + 3933 005c 9742 cmp r7, r2 + 3934 005e E4EE247A vfma.f32 s15, s8, s9 + 3935 0062 06F10806 add r6, r6, #8 + 3936 0066 05F10805 add r5, r5, #8 + 3937 006a 76EE856A vadd.f32 s13, s13, s10 + 3938 006e 37EE257A vadd.f32 s14, s14, s11 + 3939 0072 45ED036A vstr.32 s13, [r5, #-12] + 3940 0076 01F10801 add r1, r1, #8 + 3941 007a 02ED017A vstr.32 s14, [r2, #-4] + 3942 007e 01ED036A vstr.32 s12, [r1, #-12] + 3943 0082 40ED017A vstr.32 s15, [r0, #-4] + 3944 0086 D1D1 bne .L504 + 3945 .L503: + ARM GAS /tmp/ccFqHvis.s page 69 + + + 3946 0088 5B00 lsls r3, r3, #1 + 3947 008a B8F1020F cmp r8, #2 + 3948 008e 1FFA83FB uxth fp, r3 + 3949 0092 48D9 bls .L509 + 3950 .L507: + 3951 0094 DDE9007E ldrd r7, lr, [sp] + 3952 0098 4646 mov r6, r8 + 3953 009a 4FEA5808 lsr r8, r8, #1 + 3954 009e 4FEACB0A lsl r10, fp, #3 + 3955 00a2 F500 lsls r5, r6, #3 + 3956 00a4 4FEAC809 lsl r9, r8, #3 + 3957 00a8 4FF0000C mov ip, #0 + 3958 .L506: + 3959 00ac 9EED003A vldr.32 s6, [lr] + 3960 00b0 DEED013A vldr.32 s7, [lr, #4] + 3961 00b4 09EB0703 add r3, r9, r7 + 3962 00b8 391D adds r1, r7, #4 + 3963 00ba 3A46 mov r2, r7 + 3964 00bc 6046 mov r0, ip + 3965 .L505: + 3966 00be 11ED017A vldr.32 s14, [r1, #-4] + 3967 00c2 D2ED017A vldr.32 s15, [r2, #4] + 3968 00c6 93ED005A vldr.32 s10, [r3] + 3969 00ca D3ED015A vldr.32 s11, [r3, #4] + 3970 00ce 77EE454A vsub.f32 s9, s14, s10 + 3971 00d2 37EEE54A vsub.f32 s8, s15, s11 + 3972 00d6 64EEE36A vnmul.f32 s13, s9, s7 + 3973 00da 23EE846A vmul.f32 s12, s7, s8 + 3974 00de E3EE046A vfma.f32 s13, s6, s8 + 3975 00e2 3044 add r0, r0, r6 + 3976 00e4 8442 cmp r4, r0 + 3977 00e6 A3EE246A vfma.f32 s12, s6, s9 + 3978 00ea 37EE057A vadd.f32 s14, s14, s10 + 3979 00ee 77EEA57A vadd.f32 s15, s15, s11 + 3980 00f2 01ED017A vstr.32 s14, [r1, #-4] + 3981 00f6 C2ED017A vstr.32 s15, [r2, #4] + 3982 00fa 2944 add r1, r1, r5 + 3983 00fc 83ED006A vstr.32 s12, [r3] + 3984 0100 C3ED016A vstr.32 s13, [r3, #4] + 3985 0104 2A44 add r2, r2, r5 + 3986 0106 2B44 add r3, r3, r5 + 3987 0108 D9D8 bhi .L505 + 3988 010a 0CF1010C add ip, ip, #1 + 3989 010e E045 cmp r8, ip + 3990 0110 D644 add lr, lr, r10 + 3991 0112 07F10807 add r7, r7, #8 + 3992 0116 C9D1 bne .L506 + 3993 0118 4FEA4B0B lsl fp, fp, #1 + 3994 011c B8F1020F cmp r8, #2 + 3995 0120 1FFA8BFB uxth fp, fp + 3996 0124 B6D8 bhi .L507 + 3997 .L509: + 3998 0126 009B ldr r3, [sp] + 3999 0128 0022 movs r2, #0 + 4000 .L508: + 4001 012a 93ED007A vldr.32 s14, [r3] + 4002 012e 93ED026A vldr.32 s12, [r3, #8] + ARM GAS /tmp/ccFqHvis.s page 70 + + + 4003 0132 D3ED017A vldr.32 s15, [r3, #4] + 4004 0136 D3ED036A vldr.32 s13, [r3, #12] + 4005 013a 37EE065A vadd.f32 s10, s14, s12 + 4006 013e 77EEA65A vadd.f32 s11, s15, s13 + 4007 0142 37EE467A vsub.f32 s14, s14, s12 + 4008 0146 77EEE67A vsub.f32 s15, s15, s13 + 4009 014a 0232 adds r2, r2, #2 + 4010 014c 9442 cmp r4, r2 + 4011 014e 83ED005A vstr.32 s10, [r3] + 4012 0152 C3ED015A vstr.32 s11, [r3, #4] + 4013 0156 83ED027A vstr.32 s14, [r3, #8] + 4014 015a C3ED037A vstr.32 s15, [r3, #12] + 4015 015e 03F11003 add r3, r3, #16 + 4016 0162 E2D8 bhi .L508 + 4017 0164 03B0 add sp, sp, #12 + 4018 @ sp needed + 4019 0166 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4020 .L521: + 4021 016a 0546 mov r5, r0 + 4022 016c 1646 mov r6, r2 + 4023 016e 0246 mov r2, r0 + 4024 0170 00EBC800 add r0, r0, r8, lsl #3 + 4025 0174 0146 mov r1, r0 + 4026 0176 0431 adds r1, r1, #4 + 4027 0178 4FEAC30C lsl ip, r3, #3 + 4028 017c 0435 adds r5, r5, #4 + 4029 017e 0746 mov r7, r0 + 4030 .L502: + 4031 0180 92ED017A vldr.32 s14, [r2, #4] + 4032 0184 55ED016A vldr.32 s13, [r5, #-4] + 4033 0188 11ED015A vldr.32 s10, [r1, #-4] + 4034 018c D0ED015A vldr.32 s11, [r0, #4] + 4035 0190 D6ED017A vldr.32 s15, [r6, #4] + 4036 0194 96ED004A vldr.32 s8, [r6] + 4037 0198 76EEC53A vsub.f32 s7, s13, s10 + 4038 019c 77EE654A vsub.f32 s9, s14, s11 + 4039 01a0 76EE856A vadd.f32 s13, s13, s10 + 4040 01a4 27EEA46A vmul.f32 s12, s15, s9 + 4041 01a8 63EEE77A vnmul.f32 s15, s7, s15 + 4042 01ac A4EE236A vfma.f32 s12, s8, s7 + 4043 01b0 0832 adds r2, r2, #8 + 4044 01b2 6644 add r6, r6, ip + 4045 01b4 E4EE247A vfma.f32 s15, s8, s9 + 4046 01b8 0835 adds r5, r5, #8 + 4047 01ba 0830 adds r0, r0, #8 + 4048 01bc 37EE257A vadd.f32 s14, s14, s11 + 4049 01c0 45ED036A vstr.32 s13, [r5, #-12] + 4050 01c4 02ED017A vstr.32 s14, [r2, #-4] + 4051 01c8 9742 cmp r7, r2 + 4052 01ca 01ED016A vstr.32 s12, [r1, #-4] + 4053 01ce 40ED017A vstr.32 s15, [r0, #-4] + 4054 01d2 01F10801 add r1, r1, #8 + 4055 01d6 D3D1 bne .L502 + 4056 01d8 56E7 b .L503 + 4057 .L500: + 4058 01da 0029 cmp r1, #0 + 4059 01dc A3D1 bne .L509 + ARM GAS /tmp/ccFqHvis.s page 71 + + + 4060 01de 03B0 add sp, sp, #12 + 4061 @ sp needed + 4062 01e0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4064 .section .text.arm_radix2_butterfly_inverse_f32,"ax",%progbits + 4065 .align 1 + 4066 .p2align 2,,3 + 4067 .global arm_radix2_butterfly_inverse_f32 + 4068 .syntax unified + 4069 .thumb + 4070 .thumb_func + 4071 .fpu fpv4-sp-d16 + 4073 arm_radix2_butterfly_inverse_f32: + 4074 @ args = 0, pretend = 0, frame = 8 + 4075 @ frame_needed = 0, uses_anonymous_args = 0 + 4076 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4077 0004 5FEA5108 lsrs r8, r1, #1 + 4078 0008 83B0 sub sp, sp, #12 + 4079 000a CDE90002 strd r0, r2, [sp] + 4080 000e 0C46 mov r4, r1 + 4081 0010 00F0EB80 beq .L523 + 4082 0014 012B cmp r3, #1 + 4083 0016 40F0B080 bne .L544 + 4084 001a 0546 mov r5, r0 + 4085 001c 1646 mov r6, r2 + 4086 001e 0246 mov r2, r0 + 4087 0020 00EBC800 add r0, r0, r8, lsl #3 + 4088 0024 0146 mov r1, r0 + 4089 0026 0431 adds r1, r1, #4 + 4090 0028 0435 adds r5, r5, #4 + 4091 002a 0746 mov r7, r0 + 4092 .L527: + 4093 002c D2ED015A vldr.32 s11, [r2, #4] + 4094 0030 15ED015A vldr.32 s10, [r5, #-4] + 4095 0034 51ED016A vldr.32 s13, [r1, #-4] + 4096 0038 90ED017A vldr.32 s14, [r0, #4] + 4097 003c D6ED017A vldr.32 s15, [r6, #4] + 4098 0040 D6ED004A vldr.32 s9, [r6] + 4099 0044 35EE664A vsub.f32 s8, s10, s13 + 4100 0048 75EEC73A vsub.f32 s7, s11, s14 + 4101 004c 24EE276A vmul.f32 s12, s8, s15 + 4102 0050 67EEE37A vnmul.f32 s15, s15, s7 + 4103 0054 A3EEA46A vfma.f32 s12, s7, s9 + 4104 0058 0832 adds r2, r2, #8 + 4105 005a 0830 adds r0, r0, #8 + 4106 005c E4EE247A vfma.f32 s15, s8, s9 + 4107 0060 9742 cmp r7, r2 + 4108 0062 06F10806 add r6, r6, #8 + 4109 0066 76EE856A vadd.f32 s13, s13, s10 + 4110 006a 37EE257A vadd.f32 s14, s14, s11 + 4111 006e 45ED016A vstr.32 s13, [r5, #-4] + 4112 0072 01F10801 add r1, r1, #8 + 4113 0076 02ED017A vstr.32 s14, [r2, #-4] + 4114 007a 05F10805 add r5, r5, #8 + 4115 007e 41ED037A vstr.32 s15, [r1, #-12] + 4116 0082 00ED016A vstr.32 s12, [r0, #-4] + 4117 0086 D1D1 bne .L527 + 4118 .L526: + ARM GAS /tmp/ccFqHvis.s page 72 + + + 4119 0088 5B00 lsls r3, r3, #1 + 4120 008a B8F1020F cmp r8, #2 + 4121 008e 1FFA83FB uxth fp, r3 + 4122 0092 48D9 bls .L532 + 4123 .L530: + 4124 0094 DDE9007E ldrd r7, lr, [sp] + 4125 0098 4646 mov r6, r8 + 4126 009a 4FEA5808 lsr r8, r8, #1 + 4127 009e 4FEACB0A lsl r10, fp, #3 + 4128 00a2 F500 lsls r5, r6, #3 + 4129 00a4 4FEAC809 lsl r9, r8, #3 + 4130 00a8 4FF0000C mov ip, #0 + 4131 .L529: + 4132 00ac 9EED003A vldr.32 s6, [lr] + 4133 00b0 DEED013A vldr.32 s7, [lr, #4] + 4134 00b4 09EB0703 add r3, r9, r7 + 4135 00b8 391D adds r1, r7, #4 + 4136 00ba 3A46 mov r2, r7 + 4137 00bc 6046 mov r0, ip + 4138 .L528: + 4139 00be 11ED017A vldr.32 s14, [r1, #-4] + 4140 00c2 D2ED017A vldr.32 s15, [r2, #4] + 4141 00c6 93ED005A vldr.32 s10, [r3] + 4142 00ca D3ED015A vldr.32 s11, [r3, #4] + 4143 00ce 77EE454A vsub.f32 s9, s14, s10 + 4144 00d2 37EEE54A vsub.f32 s8, s15, s11 + 4145 00d6 63EEA46A vmul.f32 s13, s7, s9 + 4146 00da 24EE636A vnmul.f32 s12, s8, s7 + 4147 00de E3EE046A vfma.f32 s13, s6, s8 + 4148 00e2 3044 add r0, r0, r6 + 4149 00e4 8442 cmp r4, r0 + 4150 00e6 A3EE246A vfma.f32 s12, s6, s9 + 4151 00ea 37EE057A vadd.f32 s14, s14, s10 + 4152 00ee 77EEA57A vadd.f32 s15, s15, s11 + 4153 00f2 01ED017A vstr.32 s14, [r1, #-4] + 4154 00f6 C2ED017A vstr.32 s15, [r2, #4] + 4155 00fa 2944 add r1, r1, r5 + 4156 00fc 83ED006A vstr.32 s12, [r3] + 4157 0100 C3ED016A vstr.32 s13, [r3, #4] + 4158 0104 2A44 add r2, r2, r5 + 4159 0106 2B44 add r3, r3, r5 + 4160 0108 D9D8 bhi .L528 + 4161 010a 0CF1010C add ip, ip, #1 + 4162 010e E045 cmp r8, ip + 4163 0110 D644 add lr, lr, r10 + 4164 0112 07F10807 add r7, r7, #8 + 4165 0116 C9D1 bne .L529 + 4166 0118 4FEA4B0B lsl fp, fp, #1 + 4167 011c B8F1020F cmp r8, #2 + 4168 0120 1FFA8BFB uxth fp, fp + 4169 0124 B6D8 bhi .L530 + 4170 .L532: + 4171 0126 009B ldr r3, [sp] + 4172 0128 0022 movs r2, #0 + 4173 .L531: + 4174 012a 93ED007A vldr.32 s14, [r3] + 4175 012e 93ED025A vldr.32 s10, [r3, #8] + ARM GAS /tmp/ccFqHvis.s page 73 + + + 4176 0132 D3ED035A vldr.32 s11, [r3, #12] + 4177 0136 D3ED017A vldr.32 s15, [r3, #4] + 4178 013a 37EE056A vadd.f32 s12, s14, s10 + 4179 013e 75EEA76A vadd.f32 s13, s11, s15 + 4180 0142 37EE457A vsub.f32 s14, s14, s10 + 4181 0146 77EEE57A vsub.f32 s15, s15, s11 + 4182 014a 26EE006A vmul.f32 s12, s12, s0 + 4183 014e 66EE806A vmul.f32 s13, s13, s0 + 4184 0152 27EE007A vmul.f32 s14, s14, s0 + 4185 0156 67EE807A vmul.f32 s15, s15, s0 + 4186 015a 0232 adds r2, r2, #2 + 4187 015c 9442 cmp r4, r2 + 4188 015e 83ED006A vstr.32 s12, [r3] + 4189 0162 C3ED016A vstr.32 s13, [r3, #4] + 4190 0166 83ED027A vstr.32 s14, [r3, #8] + 4191 016a C3ED037A vstr.32 s15, [r3, #12] + 4192 016e 03F11003 add r3, r3, #16 + 4193 0172 DAD8 bhi .L531 + 4194 0174 03B0 add sp, sp, #12 + 4195 @ sp needed + 4196 0176 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4197 .L544: + 4198 017a 0546 mov r5, r0 + 4199 017c 1646 mov r6, r2 + 4200 017e 0246 mov r2, r0 + 4201 0180 00EBC800 add r0, r0, r8, lsl #3 + 4202 0184 0146 mov r1, r0 + 4203 0186 0431 adds r1, r1, #4 + 4204 0188 4FEAC30C lsl ip, r3, #3 + 4205 018c 0435 adds r5, r5, #4 + 4206 018e 0746 mov r7, r0 + 4207 .L525: + 4208 0190 92ED017A vldr.32 s14, [r2, #4] + 4209 0194 55ED016A vldr.32 s13, [r5, #-4] + 4210 0198 11ED015A vldr.32 s10, [r1, #-4] + 4211 019c D0ED015A vldr.32 s11, [r0, #4] + 4212 01a0 D6ED017A vldr.32 s15, [r6, #4] + 4213 01a4 96ED004A vldr.32 s8, [r6] + 4214 01a8 76EEC54A vsub.f32 s9, s13, s10 + 4215 01ac 77EE653A vsub.f32 s7, s14, s11 + 4216 01b0 27EEA46A vmul.f32 s12, s15, s9 + 4217 01b4 63EEE77A vnmul.f32 s15, s7, s15 + 4218 01b8 A4EE236A vfma.f32 s12, s8, s7 + 4219 01bc 0832 adds r2, r2, #8 + 4220 01be 6644 add r6, r6, ip + 4221 01c0 E4EE247A vfma.f32 s15, s8, s9 + 4222 01c4 0835 adds r5, r5, #8 + 4223 01c6 0830 adds r0, r0, #8 + 4224 01c8 76EE856A vadd.f32 s13, s13, s10 + 4225 01cc 37EE257A vadd.f32 s14, s14, s11 + 4226 01d0 45ED036A vstr.32 s13, [r5, #-12] + 4227 01d4 02ED017A vstr.32 s14, [r2, #-4] + 4228 01d8 9742 cmp r7, r2 + 4229 01da 41ED017A vstr.32 s15, [r1, #-4] + 4230 01de 00ED016A vstr.32 s12, [r0, #-4] + 4231 01e2 01F10801 add r1, r1, #8 + 4232 01e6 D3D1 bne .L525 + ARM GAS /tmp/ccFqHvis.s page 74 + + + 4233 01e8 4EE7 b .L526 + 4234 .L523: + 4235 01ea 0029 cmp r1, #0 + 4236 01ec 9BD1 bne .L532 + 4237 01ee 03B0 add sp, sp, #12 + 4238 @ sp needed + 4239 01f0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4241 .section .text.arm_cfft_radix2_f32,"ax",%progbits + 4242 .align 1 + 4243 .p2align 2,,3 + 4244 .global arm_cfft_radix2_f32 + 4245 .syntax unified + 4246 .thumb + 4247 .thumb_func + 4248 .fpu fpv4-sp-d16 + 4250 arm_cfft_radix2_f32: + 4251 @ args = 0, pretend = 0, frame = 8 + 4252 @ frame_needed = 0, uses_anonymous_args = 0 + 4253 0000 10B5 push {r4, lr} + 4254 0002 8378 ldrb r3, [r0, #2] @ zero_extendqisi2 + 4255 0004 012B cmp r3, #1 + 4256 0006 0446 mov r4, r0 + 4257 0008 82B0 sub sp, sp, #8 + 4258 000a 0846 mov r0, r1 + 4259 000c 0BD0 beq .L550 + 4260 000e A389 ldrh r3, [r4, #12] + 4261 0010 6268 ldr r2, [r4, #4] + 4262 0012 2188 ldrh r1, [r4] + 4263 0014 0190 str r0, [sp, #4] + 4264 0016 FFF7FEFF bl arm_radix2_butterfly_f32 + 4265 001a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 4266 001c 0198 ldr r0, [sp, #4] + 4267 001e 012B cmp r3, #1 + 4268 0020 0DD0 beq .L551 + 4269 .L545: + 4270 0022 02B0 add sp, sp, #8 + 4271 @ sp needed + 4272 0024 10BD pop {r4, pc} + 4273 .L550: + 4274 0026 A389 ldrh r3, [r4, #12] + 4275 0028 94ED040A vldr.32 s0, [r4, #16] + 4276 002c 6268 ldr r2, [r4, #4] + 4277 002e 2188 ldrh r1, [r4] + 4278 0030 0190 str r0, [sp, #4] + 4279 0032 FFF7FEFF bl arm_radix2_butterfly_inverse_f32 + 4280 0036 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 4281 0038 0198 ldr r0, [sp, #4] + 4282 003a 012B cmp r3, #1 + 4283 003c F1D1 bne .L545 + 4284 .L551: + 4285 003e A368 ldr r3, [r4, #8] + 4286 0040 E289 ldrh r2, [r4, #14] + 4287 0042 2188 ldrh r1, [r4] + 4288 0044 02B0 add sp, sp, #8 + 4289 @ sp needed + 4290 0046 BDE81040 pop {r4, lr} + 4291 004a FFF7FEBF b arm_bitreversal_f32 + ARM GAS /tmp/ccFqHvis.s page 75 + + + 4293 004e 00BF .section .text.arm_cfft_radix2_init_f32,"ax",%progbits + 4294 .align 1 + 4295 .p2align 2,,3 + 4296 .global arm_cfft_radix2_init_f32 + 4297 .syntax unified + 4298 .thumb + 4299 .thumb_func + 4300 .fpu fpv4-sp-d16 + 4302 arm_cfft_radix2_init_f32: + 4303 @ args = 0, pretend = 0, frame = 0 + 4304 @ frame_needed = 0, uses_anonymous_args = 0 + 4305 @ link register save eliminated. + 4306 0000 10B4 push {r4} + 4307 0002 B1F5807F cmp r1, #256 + 4308 0006 454C ldr r4, .L570 + 4309 0008 0180 strh r1, [r0] @ movhi + 4310 000a 4460 str r4, [r0, #4] + 4311 000c 8270 strb r2, [r0, #2] + 4312 000e C370 strb r3, [r0, #3] + 4313 0010 79D0 beq .L553 + 4314 0012 24D9 bls .L567 + 4315 0014 B1F5006F cmp r1, #2048 + 4316 0018 47D0 beq .L561 + 4317 001a 0ED9 bls .L568 + 4318 001c B1F5805F cmp r1, #4096 + 4319 0020 3ED1 bne .L565 + 4320 0022 3F4A ldr r2, .L570+4 + 4321 0024 4FF06653 mov r3, #964689920 + 4322 0028 4FF00111 mov r1, #65537 + 4323 002c C0E90221 strd r2, r1, [r0, #8] + 4324 0030 0361 str r3, [r0, #16] @ float + 4325 0032 0020 movs r0, #0 + 4326 .L559: + 4327 0034 5DF8044B ldr r4, [sp], #4 + 4328 0038 7047 bx lr + 4329 .L568: + 4330 003a B1F5007F cmp r1, #512 + 4331 003e 40D0 beq .L563 + 4332 0040 B1F5806F cmp r1, #1024 + 4333 0044 2CD1 bne .L565 + 4334 0046 374A ldr r2, .L570+8 + 4335 0048 5DF8044B ldr r4, [sp], #4 + 4336 004c 4FF06A53 mov r3, #981467136 + 4337 0050 4FF00411 mov r1, #262148 + 4338 0054 C0E90221 strd r2, r1, [r0, #8] + 4339 0058 0361 str r3, [r0, #16] @ float + 4340 005a 0020 movs r0, #0 + 4341 005c 7047 bx lr + 4342 .L567: + 4343 005e 4029 cmp r1, #64 + 4344 0060 3BD0 beq .L555 + 4345 0062 0DD9 bls .L569 + 4346 0064 8029 cmp r1, #128 + 4347 0066 1BD1 bne .L565 + 4348 0068 2F4A ldr r2, .L570+12 + 4349 006a 5DF8044B ldr r4, [sp], #4 + 4350 006e 4FF07053 mov r3, #1006632960 + ARM GAS /tmp/ccFqHvis.s page 76 + + + 4351 0072 4FF02011 mov r1, #2097184 + 4352 0076 C0E90221 strd r2, r1, [r0, #8] + 4353 007a 0361 str r3, [r0, #16] @ float + 4354 007c 0020 movs r0, #0 + 4355 007e 7047 bx lr + 4356 .L569: + 4357 0080 1029 cmp r1, #16 + 4358 0082 36D0 beq .L557 + 4359 0084 2029 cmp r1, #32 + 4360 0086 0BD1 bne .L565 + 4361 0088 284A ldr r2, .L570+16 + 4362 008a 5DF8044B ldr r4, [sp], #4 + 4363 008e 4FF07453 mov r3, #1023410176 + 4364 0092 4FF08011 mov r1, #8388736 + 4365 0096 C0E90221 strd r2, r1, [r0, #8] + 4366 009a 0361 str r3, [r0, #16] @ float + 4367 009c 0020 movs r0, #0 + 4368 009e 7047 bx lr + 4369 .L565: + 4370 00a0 4FF0FF30 mov r0, #-1 + 4371 00a4 5DF8044B ldr r4, [sp], #4 + 4372 00a8 7047 bx lr + 4373 .L561: + 4374 00aa 214A ldr r2, .L570+20 + 4375 00ac 5DF8044B ldr r4, [sp], #4 + 4376 00b0 4FF06853 mov r3, #973078528 + 4377 00b4 4FF00211 mov r1, #131074 + 4378 00b8 C0E90221 strd r2, r1, [r0, #8] + 4379 00bc 0361 str r3, [r0, #16] @ float + 4380 00be 0020 movs r0, #0 + 4381 00c0 7047 bx lr + 4382 .L563: + 4383 00c2 1C4A ldr r2, .L570+24 + 4384 00c4 5DF8044B ldr r4, [sp], #4 + 4385 00c8 4FF06C53 mov r3, #989855744 + 4386 00cc 4FF00811 mov r1, #524296 + 4387 00d0 C0E90221 strd r2, r1, [r0, #8] + 4388 00d4 0361 str r3, [r0, #16] @ float + 4389 00d6 0020 movs r0, #0 + 4390 00d8 7047 bx lr + 4391 .L555: + 4392 00da 174A ldr r2, .L570+28 + 4393 00dc 5DF8044B ldr r4, [sp], #4 + 4394 00e0 4FF07253 mov r3, #1015021568 + 4395 00e4 4FF04011 mov r1, #4194368 + 4396 00e8 C0E90221 strd r2, r1, [r0, #8] + 4397 00ec 0361 str r3, [r0, #16] @ float + 4398 00ee 0020 movs r0, #0 + 4399 00f0 7047 bx lr + 4400 .L557: + 4401 00f2 124A ldr r2, .L570+32 + 4402 00f4 4FF07653 mov r3, #1031798784 + 4403 00f8 4FF00121 mov r1, #16777472 + 4404 00fc C0E90221 strd r2, r1, [r0, #8] + 4405 0100 0361 str r3, [r0, #16] @ float + 4406 0102 0020 movs r0, #0 + 4407 0104 96E7 b .L559 + ARM GAS /tmp/ccFqHvis.s page 77 + + + 4408 .L553: + 4409 0106 0E4A ldr r2, .L570+36 + 4410 0108 4FF06E53 mov r3, #998244352 + 4411 010c 4FF01011 mov r1, #1048592 + 4412 0110 C0E90221 strd r2, r1, [r0, #8] + 4413 0114 0361 str r3, [r0, #16] @ float + 4414 0116 0020 movs r0, #0 + 4415 0118 8CE7 b .L559 + 4416 .L571: + 4417 011a 00BF .align 2 + 4418 .L570: + 4419 011c 00000000 .word twiddleCoef_4096 + 4420 0120 00000000 .word armBitRevTable + 4421 0124 06000000 .word armBitRevTable+6 + 4422 0128 3E000000 .word armBitRevTable+62 + 4423 012c FE000000 .word armBitRevTable+254 + 4424 0130 02000000 .word armBitRevTable+2 + 4425 0134 0E000000 .word armBitRevTable+14 + 4426 0138 7E000000 .word armBitRevTable+126 + 4427 013c FE010000 .word armBitRevTable+510 + 4428 0140 1E000000 .word armBitRevTable+30 + 4430 .section .text.arm_cfft_radix2_init_q15,"ax",%progbits + 4431 .align 1 + 4432 .p2align 2,,3 + 4433 .global arm_cfft_radix2_init_q15 + 4434 .syntax unified + 4435 .thumb + 4436 .thumb_func + 4437 .fpu fpv4-sp-d16 + 4439 arm_cfft_radix2_init_q15: + 4440 @ args = 0, pretend = 0, frame = 0 + 4441 @ frame_needed = 0, uses_anonymous_args = 0 + 4442 @ link register save eliminated. + 4443 0000 10B4 push {r4} + 4444 0002 B1F5807F cmp r1, #256 + 4445 0006 374C ldr r4, .L590 + 4446 0008 0180 strh r1, [r0] @ movhi + 4447 000a 4460 str r4, [r0, #4] + 4448 000c 8270 strb r2, [r0, #2] + 4449 000e C370 strb r3, [r0, #3] + 4450 0010 61D0 beq .L573 + 4451 0012 1ED9 bls .L587 + 4452 0014 B1F5006F cmp r1, #2048 + 4453 0018 3BD0 beq .L581 + 4454 001a 0BD9 bls .L588 + 4455 001c B1F5805F cmp r1, #4096 + 4456 0020 32D1 bne .L585 + 4457 0022 314B ldr r3, .L590+4 + 4458 0024 4FF00112 mov r2, #65537 + 4459 0028 C0E90232 strd r3, r2, [r0, #8] + 4460 002c 0020 movs r0, #0 + 4461 .L579: + 4462 002e 5DF8044B ldr r4, [sp], #4 + 4463 0032 7047 bx lr + 4464 .L588: + 4465 0034 B1F5007F cmp r1, #512 + 4466 0038 34D0 beq .L583 + ARM GAS /tmp/ccFqHvis.s page 78 + + + 4467 003a B1F5806F cmp r1, #1024 + 4468 003e 23D1 bne .L585 + 4469 0040 2A4B ldr r3, .L590+8 + 4470 0042 5DF8044B ldr r4, [sp], #4 + 4471 0046 4FF00412 mov r2, #262148 + 4472 004a C0E90232 strd r3, r2, [r0, #8] + 4473 004e 0020 movs r0, #0 + 4474 0050 7047 bx lr + 4475 .L587: + 4476 0052 4029 cmp r1, #64 + 4477 0054 2FD0 beq .L575 + 4478 0056 0AD9 bls .L589 + 4479 0058 8029 cmp r1, #128 + 4480 005a 15D1 bne .L585 + 4481 005c 244B ldr r3, .L590+12 + 4482 005e 5DF8044B ldr r4, [sp], #4 + 4483 0062 4FF02012 mov r2, #2097184 + 4484 0066 C0E90232 strd r3, r2, [r0, #8] + 4485 006a 0020 movs r0, #0 + 4486 006c 7047 bx lr + 4487 .L589: + 4488 006e 1029 cmp r1, #16 + 4489 0070 2AD0 beq .L577 + 4490 0072 2029 cmp r1, #32 + 4491 0074 08D1 bne .L585 + 4492 0076 1F4B ldr r3, .L590+16 + 4493 0078 5DF8044B ldr r4, [sp], #4 + 4494 007c 4FF08012 mov r2, #8388736 + 4495 0080 C0E90232 strd r3, r2, [r0, #8] + 4496 0084 0020 movs r0, #0 + 4497 0086 7047 bx lr + 4498 .L585: + 4499 0088 4FF0FF30 mov r0, #-1 + 4500 008c 5DF8044B ldr r4, [sp], #4 + 4501 0090 7047 bx lr + 4502 .L581: + 4503 0092 194B ldr r3, .L590+20 + 4504 0094 5DF8044B ldr r4, [sp], #4 + 4505 0098 4FF00212 mov r2, #131074 + 4506 009c C0E90232 strd r3, r2, [r0, #8] + 4507 00a0 0020 movs r0, #0 + 4508 00a2 7047 bx lr + 4509 .L583: + 4510 00a4 154B ldr r3, .L590+24 + 4511 00a6 5DF8044B ldr r4, [sp], #4 + 4512 00aa 4FF00812 mov r2, #524296 + 4513 00ae C0E90232 strd r3, r2, [r0, #8] + 4514 00b2 0020 movs r0, #0 + 4515 00b4 7047 bx lr + 4516 .L575: + 4517 00b6 124B ldr r3, .L590+28 + 4518 00b8 5DF8044B ldr r4, [sp], #4 + 4519 00bc 4FF04012 mov r2, #4194368 + 4520 00c0 C0E90232 strd r3, r2, [r0, #8] + 4521 00c4 0020 movs r0, #0 + 4522 00c6 7047 bx lr + 4523 .L577: + ARM GAS /tmp/ccFqHvis.s page 79 + + + 4524 00c8 0E4B ldr r3, .L590+32 + 4525 00ca 4FF00122 mov r2, #16777472 + 4526 00ce C0E90232 strd r3, r2, [r0, #8] + 4527 00d2 0020 movs r0, #0 + 4528 00d4 ABE7 b .L579 + 4529 .L573: + 4530 00d6 0C4B ldr r3, .L590+36 + 4531 00d8 4FF01012 mov r2, #1048592 + 4532 00dc C0E90232 strd r3, r2, [r0, #8] + 4533 00e0 0020 movs r0, #0 + 4534 00e2 A4E7 b .L579 + 4535 .L591: + 4536 .align 2 + 4537 .L590: + 4538 00e4 00000000 .word twiddleCoef_4096_q15 + 4539 00e8 00000000 .word armBitRevTable + 4540 00ec 06000000 .word armBitRevTable+6 + 4541 00f0 3E000000 .word armBitRevTable+62 + 4542 00f4 FE000000 .word armBitRevTable+254 + 4543 00f8 02000000 .word armBitRevTable+2 + 4544 00fc 0E000000 .word armBitRevTable+14 + 4545 0100 7E000000 .word armBitRevTable+126 + 4546 0104 FE010000 .word armBitRevTable+510 + 4547 0108 1E000000 .word armBitRevTable+30 + 4549 .section .text.arm_cfft_radix2_init_q31,"ax",%progbits + 4550 .align 1 + 4551 .p2align 2,,3 + 4552 .global arm_cfft_radix2_init_q31 + 4553 .syntax unified + 4554 .thumb + 4555 .thumb_func + 4556 .fpu fpv4-sp-d16 + 4558 arm_cfft_radix2_init_q31: + 4559 @ args = 0, pretend = 0, frame = 0 + 4560 @ frame_needed = 0, uses_anonymous_args = 0 + 4561 @ link register save eliminated. + 4562 0000 10B4 push {r4} + 4563 0002 B1F5807F cmp r1, #256 + 4564 0006 374C ldr r4, .L610 + 4565 0008 0180 strh r1, [r0] @ movhi + 4566 000a 4460 str r4, [r0, #4] + 4567 000c 8270 strb r2, [r0, #2] + 4568 000e C370 strb r3, [r0, #3] + 4569 0010 61D0 beq .L593 + 4570 0012 1ED9 bls .L607 + 4571 0014 B1F5006F cmp r1, #2048 + 4572 0018 3BD0 beq .L601 + 4573 001a 0BD9 bls .L608 + 4574 001c B1F5805F cmp r1, #4096 + 4575 0020 32D1 bne .L605 + 4576 0022 314B ldr r3, .L610+4 + 4577 0024 4FF00112 mov r2, #65537 + 4578 0028 C0E90232 strd r3, r2, [r0, #8] + 4579 002c 0020 movs r0, #0 + 4580 .L599: + 4581 002e 5DF8044B ldr r4, [sp], #4 + 4582 0032 7047 bx lr + ARM GAS /tmp/ccFqHvis.s page 80 + + + 4583 .L608: + 4584 0034 B1F5007F cmp r1, #512 + 4585 0038 34D0 beq .L603 + 4586 003a B1F5806F cmp r1, #1024 + 4587 003e 23D1 bne .L605 + 4588 0040 2A4B ldr r3, .L610+8 + 4589 0042 5DF8044B ldr r4, [sp], #4 + 4590 0046 4FF00412 mov r2, #262148 + 4591 004a C0E90232 strd r3, r2, [r0, #8] + 4592 004e 0020 movs r0, #0 + 4593 0050 7047 bx lr + 4594 .L607: + 4595 0052 4029 cmp r1, #64 + 4596 0054 2FD0 beq .L595 + 4597 0056 0AD9 bls .L609 + 4598 0058 8029 cmp r1, #128 + 4599 005a 15D1 bne .L605 + 4600 005c 244B ldr r3, .L610+12 + 4601 005e 5DF8044B ldr r4, [sp], #4 + 4602 0062 4FF02012 mov r2, #2097184 + 4603 0066 C0E90232 strd r3, r2, [r0, #8] + 4604 006a 0020 movs r0, #0 + 4605 006c 7047 bx lr + 4606 .L609: + 4607 006e 1029 cmp r1, #16 + 4608 0070 2AD0 beq .L597 + 4609 0072 2029 cmp r1, #32 + 4610 0074 08D1 bne .L605 + 4611 0076 1F4B ldr r3, .L610+16 + 4612 0078 5DF8044B ldr r4, [sp], #4 + 4613 007c 4FF08012 mov r2, #8388736 + 4614 0080 C0E90232 strd r3, r2, [r0, #8] + 4615 0084 0020 movs r0, #0 + 4616 0086 7047 bx lr + 4617 .L605: + 4618 0088 4FF0FF30 mov r0, #-1 + 4619 008c 5DF8044B ldr r4, [sp], #4 + 4620 0090 7047 bx lr + 4621 .L601: + 4622 0092 194B ldr r3, .L610+20 + 4623 0094 5DF8044B ldr r4, [sp], #4 + 4624 0098 4FF00212 mov r2, #131074 + 4625 009c C0E90232 strd r3, r2, [r0, #8] + 4626 00a0 0020 movs r0, #0 + 4627 00a2 7047 bx lr + 4628 .L603: + 4629 00a4 154B ldr r3, .L610+24 + 4630 00a6 5DF8044B ldr r4, [sp], #4 + 4631 00aa 4FF00812 mov r2, #524296 + 4632 00ae C0E90232 strd r3, r2, [r0, #8] + 4633 00b2 0020 movs r0, #0 + 4634 00b4 7047 bx lr + 4635 .L595: + 4636 00b6 124B ldr r3, .L610+28 + 4637 00b8 5DF8044B ldr r4, [sp], #4 + 4638 00bc 4FF04012 mov r2, #4194368 + 4639 00c0 C0E90232 strd r3, r2, [r0, #8] + ARM GAS /tmp/ccFqHvis.s page 81 + + + 4640 00c4 0020 movs r0, #0 + 4641 00c6 7047 bx lr + 4642 .L597: + 4643 00c8 0E4B ldr r3, .L610+32 + 4644 00ca 4FF00122 mov r2, #16777472 + 4645 00ce C0E90232 strd r3, r2, [r0, #8] + 4646 00d2 0020 movs r0, #0 + 4647 00d4 ABE7 b .L599 + 4648 .L593: + 4649 00d6 0C4B ldr r3, .L610+36 + 4650 00d8 4FF01012 mov r2, #1048592 + 4651 00dc C0E90232 strd r3, r2, [r0, #8] + 4652 00e0 0020 movs r0, #0 + 4653 00e2 A4E7 b .L599 + 4654 .L611: + 4655 .align 2 + 4656 .L610: + 4657 00e4 00000000 .word twiddleCoef_4096_q31 + 4658 00e8 00000000 .word armBitRevTable + 4659 00ec 06000000 .word armBitRevTable+6 + 4660 00f0 3E000000 .word armBitRevTable+62 + 4661 00f4 FE000000 .word armBitRevTable+254 + 4662 00f8 02000000 .word armBitRevTable+2 + 4663 00fc 0E000000 .word armBitRevTable+14 + 4664 0100 7E000000 .word armBitRevTable+126 + 4665 0104 FE010000 .word armBitRevTable+510 + 4666 0108 1E000000 .word armBitRevTable+30 + 4668 .section .text.arm_radix2_butterfly_q15,"ax",%progbits + 4669 .align 1 + 4670 .p2align 2,,3 + 4671 .global arm_radix2_butterfly_q15 + 4672 .syntax unified + 4673 .thumb + 4674 .thumb_func + 4675 .fpu fpv4-sp-d16 + 4677 arm_radix2_butterfly_q15: + 4678 @ args = 0, pretend = 0, frame = 40 + 4679 @ frame_needed = 0, uses_anonymous_args = 0 + 4680 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4681 0004 8BB0 sub sp, sp, #44 + 4682 0006 8946 mov r9, r1 + 4683 0008 4908 lsrs r1, r1, #1 + 4684 000a 0790 str r0, [sp, #28] + 4685 000c 0992 str r2, [sp, #36] + 4686 000e 0591 str r1, [sp, #20] + 4687 0010 00F0E480 beq .L613 + 4688 0014 4FEA810A lsl r10, r1, #2 + 4689 0018 754C ldr r4, .L639 + 4690 001a 9846 mov r8, r3 + 4691 001c 9E00 lsls r6, r3, #2 + 4692 001e 9646 mov lr, r2 + 4693 0020 0346 mov r3, r0 + 4694 0022 0025 movs r5, #0 + 4695 0024 0AF10407 add r7, r10, #4 + 4696 0028 0846 mov r0, r1 + 4697 .L614: + 4698 002a 1A68 ldr r2, [r3] @ unaligned + ARM GAS /tmp/ccFqHvis.s page 82 + + + 4699 002c 5AF80310 ldr r1, [r10, r3] @ unaligned + 4700 0030 42F34E0C sbfx ip, r2, #1, #15 + 4701 0034 1FFA8CFC uxth ip, ip + 4702 0038 04EA6202 and r2, r4, r2, asr #1 + 4703 003c 42EA0C02 orr r2, r2, ip + 4704 0040 41F34E0C sbfx ip, r1, #1, #15 + 4705 0044 1FFA8CFC uxth ip, ip + 4706 0048 04EA6101 and r1, r4, r1, asr #1 + 4707 004c 41EA0C0C orr ip, r1, ip + 4708 0050 DEF80010 ldr r1, [lr] @ unaligned + 4709 .syntax unified + 4710 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4711 0054 D2FA1CFB qsub16 fp, r2, ip + 4712 @ 0 "" 2 + 4713 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4714 0058 92FA2CF2 shadd16 r2, r2, ip + 4715 @ 0 "" 2 + 4716 .thumb + 4717 .syntax unified + 4718 005c 1A60 str r2, [r3] @ unaligned + 4719 .syntax unified + 4720 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4721 005e 21FB0BFC smuad ip, r1, fp + 4722 @ 0 "" 2 + 4723 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4724 0062 41FB1BF2 smusdx r2, r1, fp + 4725 @ 0 "" 2 + 4726 .thumb + 4727 .syntax unified + 4728 0066 2240 ands r2, r2, r4 + 4729 0068 42EA1C42 orr r2, r2, ip, lsr #16 + 4730 006c 4AF80320 str r2, [r10, r3] @ unaligned + 4731 0070 5A68 ldr r2, [r3, #4] @ unaligned + 4732 0072 56F80E10 ldr r1, [r6, lr] @ unaligned + 4733 0076 06EB0E0C add ip, r6, lr + 4734 007a 42F34E0B sbfx fp, r2, #1, #15 + 4735 007e 57F803E0 ldr lr, [r7, r3] @ unaligned + 4736 0082 04EA6202 and r2, r4, r2, asr #1 + 4737 0086 1FFA8BFB uxth fp, fp + 4738 008a 42EA0B02 orr r2, r2, fp + 4739 008e 4EF34E0B sbfx fp, lr, #1, #15 + 4740 0092 1FFA8BFB uxth fp, fp + 4741 0096 04EA6E0E and lr, r4, lr, asr #1 + 4742 009a 4EEA0B0E orr lr, lr, fp + 4743 .syntax unified + 4744 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4745 009e D2FA1EFB qsub16 fp, r2, lr + 4746 @ 0 "" 2 + 4747 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4748 00a2 92FA2EF2 shadd16 r2, r2, lr + 4749 @ 0 "" 2 + 4750 .thumb + 4751 .syntax unified + 4752 00a6 5A60 str r2, [r3, #4] @ unaligned + 4753 .syntax unified + 4754 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4755 00a8 21FB0BFE smuad lr, r1, fp + ARM GAS /tmp/ccFqHvis.s page 83 + + + 4756 @ 0 "" 2 + 4757 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4758 00ac 41FB1BF2 smusdx r2, r1, fp + 4759 @ 0 "" 2 + 4760 .thumb + 4761 .syntax unified + 4762 00b0 2240 ands r2, r2, r4 + 4763 00b2 0235 adds r5, r5, #2 + 4764 00b4 42EA1E42 orr r2, r2, lr, lsr #16 + 4765 00b8 A842 cmp r0, r5 + 4766 00ba FA50 str r2, [r7, r3] @ unaligned + 4767 00bc 0CEB060E add lr, ip, r6 + 4768 00c0 03F10803 add r3, r3, #8 + 4769 00c4 B1D8 bhi .L614 + 4770 00c6 4FEA4808 lsl r8, r8, #1 + 4771 00ca 1FFA88F3 uxth r3, r8 + 4772 00ce 0693 str r3, [sp, #24] + 4773 00d0 059B ldr r3, [sp, #20] + 4774 00d2 022B cmp r3, #2 + 4775 00d4 40F28980 bls .L637 + 4776 00d8 DFF814B1 ldr fp, .L639 + 4777 .L620: + 4778 00dc 059A ldr r2, [sp, #20] + 4779 00de 0892 str r2, [sp, #32] + 4780 00e0 1346 mov r3, r2 + 4781 00e2 5208 lsrs r2, r2, #1 + 4782 00e4 4A45 cmp r2, r9 + 4783 00e6 1146 mov r1, r2 + 4784 00e8 28BF it cs + 4785 00ea 4946 movcs r1, r9 + 4786 00ec 0391 str r1, [sp, #12] + 4787 00ee 0699 ldr r1, [sp, #24] + 4788 00f0 0592 str r2, [sp, #20] + 4789 00f2 D718 adds r7, r2, r3 + 4790 00f4 9C00 lsls r4, r3, #2 + 4791 00f6 4FEA430E lsl lr, r3, #1 + 4792 00fa 079B ldr r3, [sp, #28] + 4793 00fc 0193 str r3, [sp, #4] + 4794 00fe 8900 lsls r1, r1, #2 + 4795 0100 099B ldr r3, [sp, #36] + 4796 0102 0491 str r1, [sp, #16] + 4797 0104 4FEA820A lsl r10, r2, #2 + 4798 0108 BF00 lsls r7, r7, #2 + 4799 010a 0293 str r3, [sp, #8] + 4800 010c 4FF00008 mov r8, #0 + 4801 .L617: + 4802 0110 029B ldr r3, [sp, #8] + 4803 0112 1868 ldr r0, [r3] @ unaligned + 4804 0114 019B ldr r3, [sp, #4] + 4805 0116 4546 mov r5, r8 + 4806 .L616: + 4807 0118 1968 ldr r1, [r3] @ unaligned + 4808 011a 5AF80360 ldr r6, [r10, r3] @ unaligned + 4809 .syntax unified + 4810 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4811 011e D1FA16F2 qsub16 r2, r1, r6 + 4812 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 84 + + + 4813 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4814 0122 91FA26F1 shadd16 r1, r1, r6 + 4815 @ 0 "" 2 + 4816 .thumb + 4817 .syntax unified + 4818 0126 1960 str r1, [r3] @ unaligned + 4819 .syntax unified + 4820 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4821 0128 20FB02F1 smuad r1, r0, r2 + 4822 @ 0 "" 2 + 4823 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4824 012c 40FB12F2 smusdx r2, r0, r2 + 4825 @ 0 "" 2 + 4826 .thumb + 4827 .syntax unified + 4828 0130 02EA0B02 and r2, r2, fp + 4829 0134 42EA1142 orr r2, r2, r1, lsr #16 + 4830 0138 4AF80320 str r2, [r10, r3] @ unaligned + 4831 013c E118 adds r1, r4, r3 + 4832 013e E658 ldr r6, [r4, r3] @ unaligned + 4833 0140 57F803C0 ldr ip, [r7, r3] @ unaligned + 4834 .syntax unified + 4835 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4836 0144 D6FA1CF2 qsub16 r2, r6, ip + 4837 @ 0 "" 2 + 4838 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4839 0148 96FA2CF6 shadd16 r6, r6, ip + 4840 @ 0 "" 2 + 4841 .thumb + 4842 .syntax unified + 4843 014c E650 str r6, [r4, r3] @ unaligned + 4844 .syntax unified + 4845 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4846 014e 20FB02F6 smuad r6, r0, r2 + 4847 @ 0 "" 2 + 4848 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4849 0152 40FB12F2 smusdx r2, r0, r2 + 4850 @ 0 "" 2 + 4851 .thumb + 4852 .syntax unified + 4853 0156 02EA0B02 and r2, r2, fp + 4854 015a 7544 add r5, r5, lr + 4855 015c 42EA1642 orr r2, r2, r6, lsr #16 + 4856 0160 A945 cmp r9, r5 + 4857 0162 FA50 str r2, [r7, r3] @ unaligned + 4858 0164 01EB0403 add r3, r1, r4 + 4859 0168 D6D8 bhi .L616 + 4860 016a 029B ldr r3, [sp, #8] + 4861 016c 049A ldr r2, [sp, #16] + 4862 016e 1344 add r3, r3, r2 + 4863 0170 0293 str r3, [sp, #8] + 4864 0172 019B ldr r3, [sp, #4] + 4865 0174 0433 adds r3, r3, #4 + 4866 0176 0193 str r3, [sp, #4] + 4867 0178 039B ldr r3, [sp, #12] + 4868 017a 08F10108 add r8, r8, #1 + 4869 017e 9845 cmp r8, r3 + ARM GAS /tmp/ccFqHvis.s page 85 + + + 4870 0180 C6D3 bcc .L617 + 4871 0182 069B ldr r3, [sp, #24] + 4872 0184 5B00 lsls r3, r3, #1 + 4873 0186 9BB2 uxth r3, r3 + 4874 0188 0693 str r3, [sp, #24] + 4875 018a 059B ldr r3, [sp, #20] + 4876 018c 022B cmp r3, #2 + 4877 018e A5D8 bhi .L620 + 4878 0190 089B ldr r3, [sp, #32] + 4879 0192 9A08 lsrs r2, r3, #2 + 4880 .L623: + 4881 0194 0599 ldr r1, [sp, #20] + 4882 0196 079B ldr r3, [sp, #28] + 4883 0198 5518 adds r5, r2, r1 + 4884 019a AD00 lsls r5, r5, #2 + 4885 019c 9200 lsls r2, r2, #2 + 4886 019e 4F00 lsls r7, r1, #1 + 4887 01a0 0020 movs r0, #0 + 4888 .L622: + 4889 01a2 1968 ldr r1, [r3] @ unaligned + 4890 01a4 9C58 ldr r4, [r3, r2] @ unaligned + 4891 .syntax unified + 4892 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4893 01a6 D1FA14F6 qsub16 r6, r1, r4 + 4894 @ 0 "" 2 + 4895 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4896 01aa 91FA14F1 qadd16 r1, r1, r4 + 4897 @ 0 "" 2 + 4898 .thumb + 4899 .syntax unified + 4900 01ae 1960 str r1, [r3] @ unaligned + 4901 01b0 9E50 str r6, [r3, r2] @ unaligned + 4902 01b2 03EB0A06 add r6, r3, r10 + 4903 01b6 53F80A10 ldr r1, [r3, r10] @ unaligned + 4904 01ba 5C59 ldr r4, [r3, r5] @ unaligned + 4905 .syntax unified + 4906 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4907 01bc D1FA14FC qsub16 ip, r1, r4 + 4908 @ 0 "" 2 + 4909 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4910 01c0 91FA14F1 qadd16 r1, r1, r4 + 4911 @ 0 "" 2 + 4912 .thumb + 4913 .syntax unified + 4914 01c4 3844 add r0, r0, r7 + 4915 01c6 8145 cmp r9, r0 + 4916 01c8 43F80A10 str r1, [r3, r10] @ unaligned + 4917 01cc 43F805C0 str ip, [r3, r5] @ unaligned + 4918 01d0 06EB0A03 add r3, r6, r10 + 4919 01d4 E5D8 bhi .L622 + 4920 .L612: + 4921 01d6 0BB0 add sp, sp, #44 + 4922 @ sp needed + 4923 01d8 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 4924 .L613: + 4925 01dc B9F1000F cmp r9, #0 + 4926 01e0 F9D0 beq .L612 + ARM GAS /tmp/ccFqHvis.s page 86 + + + 4927 01e2 DDF814A0 ldr r10, [sp, #20] + 4928 01e6 5246 mov r2, r10 + 4929 01e8 D4E7 b .L623 + 4930 .L637: + 4931 01ea 4FEA9902 lsr r2, r9, #2 + 4932 01ee D1E7 b .L623 + 4933 .L640: + 4934 .align 2 + 4935 .L639: + 4936 01f0 0000FFFF .word -65536 + 4938 .section .text.arm_radix2_butterfly_inverse_q15,"ax",%progbits + 4939 .align 1 + 4940 .p2align 2,,3 + 4941 .global arm_radix2_butterfly_inverse_q15 + 4942 .syntax unified + 4943 .thumb + 4944 .thumb_func + 4945 .fpu fpv4-sp-d16 + 4947 arm_radix2_butterfly_inverse_q15: + 4948 @ args = 0, pretend = 0, frame = 32 + 4949 @ frame_needed = 0, uses_anonymous_args = 0 + 4950 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 4951 0004 89B0 sub sp, sp, #36 + 4952 0006 8A46 mov r10, r1 + 4953 0008 4908 lsrs r1, r1, #1 + 4954 000a CDE90602 strd r0, r2, [sp, #24] + 4955 000e 0491 str r1, [sp, #16] + 4956 0010 00F0CD80 beq .L641 + 4957 0014 8F00 lsls r7, r1, #2 + 4958 0016 674C ldr r4, .L663 + 4959 0018 9946 mov r9, r3 + 4960 001a 9E00 lsls r6, r3, #2 + 4961 001c 9046 mov r8, r2 + 4962 001e 0346 mov r3, r0 + 4963 0020 0025 movs r5, #0 + 4964 0022 07F1040C add ip, r7, #4 + 4965 0026 0846 mov r0, r1 + 4966 .L643: + 4967 0028 1A68 ldr r2, [r3] @ unaligned + 4968 002a F958 ldr r1, [r7, r3] @ unaligned + 4969 002c 42F34E0E sbfx lr, r2, #1, #15 + 4970 0030 1FFA8EFE uxth lr, lr + 4971 0034 04EA6202 and r2, r4, r2, asr #1 + 4972 0038 42EA0E02 orr r2, r2, lr + 4973 003c 41F34E0E sbfx lr, r1, #1, #15 + 4974 0040 1FFA8EFE uxth lr, lr + 4975 0044 04EA6101 and r1, r4, r1, asr #1 + 4976 0048 41EA0E0E orr lr, r1, lr + 4977 004c D8F80010 ldr r1, [r8] @ unaligned + 4978 .syntax unified + 4979 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4980 0050 D2FA1EFB qsub16 fp, r2, lr + 4981 @ 0 "" 2 + 4982 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4983 0054 92FA2EF2 shadd16 r2, r2, lr + 4984 @ 0 "" 2 + 4985 .thumb + ARM GAS /tmp/ccFqHvis.s page 87 + + + 4986 .syntax unified + 4987 0058 1A60 str r2, [r3] @ unaligned + 4988 .syntax unified + 4989 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4990 005a 41FB0BFE smusd lr, r1, fp + 4991 @ 0 "" 2 + 4992 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 4993 005e 21FB1BF2 smuadx r2, r1, fp + 4994 @ 0 "" 2 + 4995 .thumb + 4996 .syntax unified + 4997 0062 2240 ands r2, r2, r4 + 4998 0064 42EA1E42 orr r2, r2, lr, lsr #16 + 4999 0068 FA50 str r2, [r7, r3] @ unaligned + 5000 006a 5A68 ldr r2, [r3, #4] @ unaligned + 5001 006c 56F80810 ldr r1, [r6, r8] @ unaligned + 5002 0070 06EB080E add lr, r6, r8 + 5003 0074 42F34E0B sbfx fp, r2, #1, #15 + 5004 0078 5CF80380 ldr r8, [ip, r3] @ unaligned + 5005 007c 04EA6202 and r2, r4, r2, asr #1 + 5006 0080 1FFA8BFB uxth fp, fp + 5007 0084 42EA0B02 orr r2, r2, fp + 5008 0088 48F34E0B sbfx fp, r8, #1, #15 + 5009 008c 1FFA8BFB uxth fp, fp + 5010 0090 04EA6808 and r8, r4, r8, asr #1 + 5011 0094 48EA0B08 orr r8, r8, fp + 5012 .syntax unified + 5013 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5014 0098 D2FA18FB qsub16 fp, r2, r8 + 5015 @ 0 "" 2 + 5016 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5017 009c 92FA28F2 shadd16 r2, r2, r8 + 5018 @ 0 "" 2 + 5019 .thumb + 5020 .syntax unified + 5021 00a0 5A60 str r2, [r3, #4] @ unaligned + 5022 .syntax unified + 5023 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5024 00a2 41FB0BF8 smusd r8, r1, fp + 5025 @ 0 "" 2 + 5026 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5027 00a6 21FB1BF2 smuadx r2, r1, fp + 5028 @ 0 "" 2 + 5029 .thumb + 5030 .syntax unified + 5031 00aa 2240 ands r2, r2, r4 + 5032 00ac 0235 adds r5, r5, #2 + 5033 00ae 42EA1842 orr r2, r2, r8, lsr #16 + 5034 00b2 A842 cmp r0, r5 + 5035 00b4 4CF80320 str r2, [ip, r3] @ unaligned + 5036 00b8 0EEB0608 add r8, lr, r6 + 5037 00bc 03F10803 add r3, r3, #8 + 5038 00c0 B2D8 bhi .L643 + 5039 00c2 4FEA4909 lsl r9, r9, #1 + 5040 00c6 1FFA89F3 uxth r3, r9 + 5041 00ca 0593 str r3, [sp, #20] + 5042 00cc 049B ldr r3, [sp, #16] + ARM GAS /tmp/ccFqHvis.s page 88 + + + 5043 00ce 022B cmp r3, #2 + 5044 00d0 5CD9 bls .L644 + 5045 00d2 DFF8E0B0 ldr fp, .L663 + 5046 .L649: + 5047 00d6 049B ldr r3, [sp, #16] + 5048 00d8 9846 mov r8, r3 + 5049 00da 5B08 lsrs r3, r3, #1 + 5050 00dc 5345 cmp r3, r10 + 5051 00de 1A46 mov r2, r3 + 5052 00e0 28BF it cs + 5053 00e2 5246 movcs r2, r10 + 5054 00e4 0292 str r2, [sp, #8] + 5055 00e6 059A ldr r2, [sp, #20] + 5056 00e8 0493 str r3, [sp, #16] + 5057 00ea 03EB0807 add r7, r3, r8 + 5058 00ee 4FEA830C lsl ip, r3, #2 + 5059 00f2 069B ldr r3, [sp, #24] + 5060 00f4 0093 str r3, [sp] + 5061 00f6 9200 lsls r2, r2, #2 + 5062 00f8 079B ldr r3, [sp, #28] + 5063 00fa 0392 str r2, [sp, #12] + 5064 00fc 4FEA8804 lsl r4, r8, #2 + 5065 0100 BF00 lsls r7, r7, #2 + 5066 0102 4FEA4808 lsl r8, r8, #1 + 5067 0106 0193 str r3, [sp, #4] + 5068 0108 4FF00009 mov r9, #0 + 5069 .L646: + 5070 010c 019B ldr r3, [sp, #4] + 5071 010e 1868 ldr r0, [r3] @ unaligned + 5072 0110 009B ldr r3, [sp] + 5073 0112 4D46 mov r5, r9 + 5074 .L645: + 5075 0114 1968 ldr r1, [r3] @ unaligned + 5076 0116 5CF80360 ldr r6, [ip, r3] @ unaligned + 5077 .syntax unified + 5078 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5079 011a D1FA16F2 qsub16 r2, r1, r6 + 5080 @ 0 "" 2 + 5081 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5082 011e 91FA26F1 shadd16 r1, r1, r6 + 5083 @ 0 "" 2 + 5084 .thumb + 5085 .syntax unified + 5086 0122 1960 str r1, [r3] @ unaligned + 5087 .syntax unified + 5088 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5089 0124 40FB02F1 smusd r1, r0, r2 + 5090 @ 0 "" 2 + 5091 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5092 0128 20FB12F2 smuadx r2, r0, r2 + 5093 @ 0 "" 2 + 5094 .thumb + 5095 .syntax unified + 5096 012c 02EA0B02 and r2, r2, fp + 5097 0130 42EA1142 orr r2, r2, r1, lsr #16 + 5098 0134 4CF80320 str r2, [ip, r3] @ unaligned + 5099 0138 E118 adds r1, r4, r3 + ARM GAS /tmp/ccFqHvis.s page 89 + + + 5100 013a E658 ldr r6, [r4, r3] @ unaligned + 5101 013c 57F803E0 ldr lr, [r7, r3] @ unaligned + 5102 .syntax unified + 5103 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5104 0140 D6FA1EF2 qsub16 r2, r6, lr + 5105 @ 0 "" 2 + 5106 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5107 0144 96FA2EF6 shadd16 r6, r6, lr + 5108 @ 0 "" 2 + 5109 .thumb + 5110 .syntax unified + 5111 0148 E650 str r6, [r4, r3] @ unaligned + 5112 .syntax unified + 5113 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5114 014a 40FB02F6 smusd r6, r0, r2 + 5115 @ 0 "" 2 + 5116 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5117 014e 20FB12F2 smuadx r2, r0, r2 + 5118 @ 0 "" 2 + 5119 .thumb + 5120 .syntax unified + 5121 0152 02EA0B02 and r2, r2, fp + 5122 0156 4544 add r5, r5, r8 + 5123 0158 42EA1642 orr r2, r2, r6, lsr #16 + 5124 015c AA45 cmp r10, r5 + 5125 015e FA50 str r2, [r7, r3] @ unaligned + 5126 0160 04EB0103 add r3, r4, r1 + 5127 0164 D6D8 bhi .L645 + 5128 0166 019B ldr r3, [sp, #4] + 5129 0168 039A ldr r2, [sp, #12] + 5130 016a 1344 add r3, r3, r2 + 5131 016c 0193 str r3, [sp, #4] + 5132 016e 009B ldr r3, [sp] + 5133 0170 0433 adds r3, r3, #4 + 5134 0172 0093 str r3, [sp] + 5135 0174 029B ldr r3, [sp, #8] + 5136 0176 09F10109 add r9, r9, #1 + 5137 017a 9945 cmp r9, r3 + 5138 017c C6D3 bcc .L646 + 5139 017e 059B ldr r3, [sp, #20] + 5140 0180 5B00 lsls r3, r3, #1 + 5141 0182 9BB2 uxth r3, r3 + 5142 0184 0593 str r3, [sp, #20] + 5143 0186 049B ldr r3, [sp, #16] + 5144 0188 022B cmp r3, #2 + 5145 018a A4D8 bhi .L649 + 5146 .L644: + 5147 018c 012B cmp r3, #1 + 5148 018e 0ED0 beq .L641 + 5149 0190 069B ldr r3, [sp, #24] + 5150 0192 0021 movs r1, #0 + 5151 .L650: + 5152 0194 1A68 ldr r2, [r3] @ unaligned + 5153 0196 5868 ldr r0, [r3, #4] @ unaligned + 5154 .syntax unified + 5155 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5156 0198 D2FA10F4 qsub16 r4, r2, r0 + ARM GAS /tmp/ccFqHvis.s page 90 + + + 5157 @ 0 "" 2 + 5158 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 5159 019c 92FA10F2 qadd16 r2, r2, r0 + 5160 @ 0 "" 2 + 5161 .thumb + 5162 .syntax unified + 5163 01a0 0231 adds r1, r1, #2 + 5164 01a2 8A45 cmp r10, r1 + 5165 01a4 1A60 str r2, [r3] @ unaligned + 5166 01a6 5C60 str r4, [r3, #4] @ unaligned + 5167 01a8 03F10803 add r3, r3, #8 + 5168 01ac F2D8 bhi .L650 + 5169 .L641: + 5170 01ae 09B0 add sp, sp, #36 + 5171 @ sp needed + 5172 01b0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5173 .L664: + 5174 .align 2 + 5175 .L663: + 5176 01b4 0000FFFF .word -65536 + 5178 .section .text.arm_cfft_radix2_q15,"ax",%progbits + 5179 .align 1 + 5180 .p2align 2,,3 + 5181 .global arm_cfft_radix2_q15 + 5182 .syntax unified + 5183 .thumb + 5184 .thumb_func + 5185 .fpu fpv4-sp-d16 + 5187 arm_cfft_radix2_q15: + 5188 @ args = 0, pretend = 0, frame = 8 + 5189 @ frame_needed = 0, uses_anonymous_args = 0 + 5190 0000 10B5 push {r4, lr} + 5191 0002 8378 ldrb r3, [r0, #2] @ zero_extendqisi2 + 5192 0004 0446 mov r4, r0 + 5193 0006 82B0 sub sp, sp, #8 + 5194 0008 0846 mov r0, r1 + 5195 000a 012B cmp r3, #1 + 5196 000c 6268 ldr r2, [r4, #4] + 5197 000e A389 ldrh r3, [r4, #12] + 5198 0010 2188 ldrh r1, [r4] + 5199 0012 0190 str r0, [sp, #4] + 5200 0014 0AD0 beq .L669 + 5201 0016 FFF7FEFF bl arm_radix2_butterfly_q15 + 5202 001a 0198 ldr r0, [sp, #4] + 5203 .L667: + 5204 001c A368 ldr r3, [r4, #8] + 5205 001e E289 ldrh r2, [r4, #14] + 5206 0020 2188 ldrh r1, [r4] + 5207 0022 02B0 add sp, sp, #8 + 5208 @ sp needed + 5209 0024 BDE81040 pop {r4, lr} + 5210 0028 FFF7FEBF b arm_bitreversal_q15 + 5211 .L669: + 5212 002c FFF7FEFF bl arm_radix2_butterfly_inverse_q15 + 5213 0030 0198 ldr r0, [sp, #4] + 5214 0032 F3E7 b .L667 + 5216 .section .text.arm_radix2_butterfly_q31,"ax",%progbits + ARM GAS /tmp/ccFqHvis.s page 91 + + + 5217 .align 1 + 5218 .p2align 2,,3 + 5219 .global arm_radix2_butterfly_q31 + 5220 .syntax unified + 5221 .thumb + 5222 .thumb_func + 5223 .fpu fpv4-sp-d16 + 5225 arm_radix2_butterfly_q31: + 5226 @ args = 0, pretend = 0, frame = 40 + 5227 @ frame_needed = 0, uses_anonymous_args = 0 + 5228 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5229 0004 8BB0 sub sp, sp, #44 + 5230 0006 8346 mov fp, r0 + 5231 0008 0992 str r2, [sp, #36] + 5232 000a 4A08 lsrs r2, r1, #1 + 5233 000c 0891 str r1, [sp, #32] + 5234 000e 0293 str r3, [sp, #8] + 5235 0010 0492 str r2, [sp, #16] + 5236 0012 00F04E81 beq .L671 + 5237 0016 012B cmp r3, #1 + 5238 0018 40F0FC80 bne .L695 + 5239 001c 00EBC20C add ip, r0, r2, lsl #3 + 5240 0020 0021 movs r1, #0 + 5241 0022 DDF82480 ldr r8, [sp, #36] + 5242 0026 0CF10409 add r9, ip, #4 + 5243 002a 071D adds r7, r0, #4 + 5244 002c 8A46 mov r10, r1 + 5245 .L675: + 5246 002e 5CF83130 ldr r3, [ip, r1, lsl #3] + 5247 0032 5BF83100 ldr r0, [fp, r1, lsl #3] + 5248 0036 D8F80060 ldr r6, [r8] + 5249 003a 5B10 asrs r3, r3, #1 + 5250 003c 03EB6002 add r2, r3, r0, asr #1 + 5251 0040 5210 asrs r2, r2, #1 + 5252 0042 C3EB600E rsb lr, r3, r0, asr #1 + 5253 0046 D8F80430 ldr r3, [r8, #4] + 5254 004a 4BF83120 str r2, [fp, r1, lsl #3] + 5255 004e 59F83120 ldr r2, [r9, r1, lsl #3] + 5256 0052 57F83100 ldr r0, [r7, r1, lsl #3] + 5257 0056 5210 asrs r2, r2, #1 + 5258 0058 4FF00045 mov r5, #-2147483648 + 5259 005c 5446 mov r4, r10 + 5260 005e C6FB0E54 smlal r5, r4, r6, lr + 5261 0062 C2EB6005 rsb r5, r2, r0, asr #1 + 5262 0066 02EB6002 add r2, r2, r0, asr #1 + 5263 006a 0092 str r2, [sp] + 5264 006c 5046 mov r0, r10 + 5265 006e 4FF00042 mov r2, #-2147483648 + 5266 0072 C5FB0620 smlal r2, r0, r5, r6 + 5267 0076 5646 mov r6, r10 + 5268 0078 C3FB0564 smlal r6, r4, r3, r5 + 5269 007c 16F10046 adds r6, r6, #-2147483648 + 5270 0080 83FB0E35 smull r3, r5, r3, lr + 5271 0084 44F10004 adc r4, r4, #0 + 5272 0088 5B42 rsbs r3, r3, #0 + 5273 008a 60EB0500 sbc r0, r0, r5 + 5274 008e 13F10043 adds r3, r3, #-2147483648 + ARM GAS /tmp/ccFqHvis.s page 92 + + + 5275 0092 009B ldr r3, [sp] + 5276 0094 40F10000 adc r0, r0, #0 + 5277 0098 5A10 asrs r2, r3, #1 + 5278 009a 049B ldr r3, [sp, #16] + 5279 009c 47F83120 str r2, [r7, r1, lsl #3] + 5280 00a0 4CF83140 str r4, [ip, r1, lsl #3] + 5281 00a4 49F83100 str r0, [r9, r1, lsl #3] + 5282 00a8 0131 adds r1, r1, #1 + 5283 00aa 8B42 cmp r3, r1 + 5284 00ac 08F10808 add r8, r8, #8 + 5285 00b0 BDD1 bne .L675 + 5286 .L674: + 5287 00b2 029B ldr r3, [sp, #8] + 5288 00b4 5B00 lsls r3, r3, #1 + 5289 00b6 9BB2 uxth r3, r3 + 5290 00b8 0793 str r3, [sp, #28] + 5291 00ba 049B ldr r3, [sp, #16] + 5292 00bc 022B cmp r3, #2 + 5293 00be 40F2FF80 bls .L693 + 5294 00c2 4FF0000A mov r10, #0 + 5295 00c6 BE46 mov lr, r7 + 5296 .L678: + 5297 00c8 049A ldr r2, [sp, #16] + 5298 00ca 0799 ldr r1, [sp, #28] + 5299 00cc 0192 str r2, [sp, #4] + 5300 00ce 1346 mov r3, r2 + 5301 00d0 5208 lsrs r2, r2, #1 + 5302 00d2 0BEBC208 add r8, fp, r2, lsl #3 + 5303 00d6 0492 str r2, [sp, #16] + 5304 00d8 099A ldr r2, [sp, #36] + 5305 00da 0392 str r2, [sp, #12] + 5306 00dc C900 lsls r1, r1, #3 + 5307 00de 089A ldr r2, [sp, #32] + 5308 00e0 B2FBF3F3 udiv r3, r2, r3 + 5309 00e4 0593 str r3, [sp, #20] + 5310 00e6 0023 movs r3, #0 + 5311 00e8 0691 str r1, [sp, #24] + 5312 00ea 08F10409 add r9, r8, #4 + 5313 00ee 0293 str r3, [sp, #8] + 5314 .L677: + 5315 00f0 039B ldr r3, [sp, #12] + 5316 00f2 059F ldr r7, [sp, #20] + 5317 00f4 0097 str r7, [sp] + 5318 00f6 D3E900C6 ldrd ip, r6, [r3] + 5319 00fa 029B ldr r3, [sp, #8] + 5320 .L676: + 5321 00fc 5BF83310 ldr r1, [fp, r3, lsl #3] + 5322 0100 58F83320 ldr r2, [r8, r3, lsl #3] + 5323 0104 8818 adds r0, r1, r2 + 5324 0106 4010 asrs r0, r0, #1 + 5325 0108 4BF83300 str r0, [fp, r3, lsl #3] + 5326 010c 5EF83300 ldr r0, [lr, r3, lsl #3] + 5327 0110 59F83350 ldr r5, [r9, r3, lsl #3] + 5328 0114 59F83370 ldr r7, [r9, r3, lsl #3] + 5329 0118 451B subs r5, r0, r5 + 5330 011a 3844 add r0, r0, r7 + 5331 011c 8A1A subs r2, r1, r2 + ARM GAS /tmp/ccFqHvis.s page 93 + + + 5332 011e 4010 asrs r0, r0, #1 + 5333 0120 4FF00041 mov r1, #-2147483648 + 5334 0124 5446 mov r4, r10 + 5335 0126 4EF83300 str r0, [lr, r3, lsl #3] + 5336 012a C2FB0C14 smlal r1, r4, r2, ip + 5337 012e 5046 mov r0, r10 + 5338 0130 C5FB0604 smlal r0, r4, r5, r6 + 5339 0134 10F10040 adds r0, r0, #-2147483648 + 5340 0138 44F10004 adc r4, r4, #0 + 5341 013c 48F83340 str r4, [r8, r3, lsl #3] + 5342 0140 82FB0612 smull r1, r2, r2, r6 + 5343 0144 4FF00044 mov r4, #-2147483648 + 5344 0148 5046 mov r0, r10 + 5345 014a 4942 rsbs r1, r1, #0 + 5346 014c C5FB0C40 smlal r4, r0, r5, ip + 5347 0150 60EB0200 sbc r0, r0, r2 + 5348 0154 019A ldr r2, [sp, #4] + 5349 0156 11F10041 adds r1, r1, #-2147483648 + 5350 015a 40F10000 adc r0, r0, #0 + 5351 015e 49F83300 str r0, [r9, r3, lsl #3] + 5352 0162 1344 add r3, r3, r2 + 5353 0164 009A ldr r2, [sp] + 5354 0166 013A subs r2, r2, #1 + 5355 0168 0092 str r2, [sp] + 5356 016a C7D1 bne .L676 + 5357 016c 039A ldr r2, [sp, #12] + 5358 016e 0699 ldr r1, [sp, #24] + 5359 0170 029B ldr r3, [sp, #8] + 5360 0172 0A44 add r2, r2, r1 + 5361 0174 0392 str r2, [sp, #12] + 5362 0176 049A ldr r2, [sp, #16] + 5363 0178 0133 adds r3, r3, #1 + 5364 017a 9A42 cmp r2, r3 + 5365 017c 0293 str r3, [sp, #8] + 5366 017e B7D1 bne .L677 + 5367 0180 079B ldr r3, [sp, #28] + 5368 0182 5B00 lsls r3, r3, #1 + 5369 0184 9BB2 uxth r3, r3 + 5370 0186 022A cmp r2, #2 + 5371 0188 0793 str r3, [sp, #28] + 5372 018a 9DD8 bhi .L678 + 5373 018c 019B ldr r3, [sp, #4] + 5374 018e 7746 mov r7, lr + 5375 0190 9808 lsrs r0, r3, #2 + 5376 0192 1646 mov r6, r2 + 5377 .L681: + 5378 0194 3B46 mov r3, r7 + 5379 0196 DDF82080 ldr r8, [sp, #32] + 5380 019a 3701 lsls r7, r6, #4 + 5381 019c 5A46 mov r2, fp + 5382 019e 4FEA460C lsl ip, r6, #1 + 5383 01a2 0025 movs r5, #0 + 5384 01a4 8419 adds r4, r0, r6 + 5385 01a6 BE46 mov lr, r7 + 5386 .L680: + 5387 01a8 53F8047C ldr r7, [r3, #-4] + 5388 01ac 52F83010 ldr r1, [r2, r0, lsl #3] + ARM GAS /tmp/ccFqHvis.s page 94 + + + 5389 01b0 07EB010A add r10, r7, r1 + 5390 01b4 43F804AC str r10, [r3, #-4] + 5391 01b8 A7EB0109 sub r9, r7, r1 + 5392 01bc 53F83070 ldr r7, [r3, r0, lsl #3] + 5393 01c0 5168 ldr r1, [r2, #4] + 5394 01c2 01EB070A add r10, r1, r7 + 5395 01c6 C91B subs r1, r1, r7 + 5396 01c8 C2F804A0 str r10, [r2, #4] + 5397 01cc 42F83090 str r9, [r2, r0, lsl #3] + 5398 01d0 43F83010 str r1, [r3, r0, lsl #3] + 5399 01d4 52F83670 ldr r7, [r2, r6, lsl #3] + 5400 01d8 52F83410 ldr r1, [r2, r4, lsl #3] + 5401 01dc 07EB010A add r10, r7, r1 + 5402 01e0 42F836A0 str r10, [r2, r6, lsl #3] + 5403 01e4 A7EB0109 sub r9, r7, r1 + 5404 01e8 53F83610 ldr r1, [r3, r6, lsl #3] + 5405 01ec 53F83470 ldr r7, [r3, r4, lsl #3] + 5406 01f0 6544 add r5, r5, ip + 5407 01f2 01EB070A add r10, r1, r7 + 5408 01f6 A845 cmp r8, r5 + 5409 01f8 A1EB0701 sub r1, r1, r7 + 5410 01fc 43F836A0 str r10, [r3, r6, lsl #3] + 5411 0200 42F83490 str r9, [r2, r4, lsl #3] + 5412 0204 43F83410 str r1, [r3, r4, lsl #3] + 5413 0208 7244 add r2, r2, lr + 5414 020a 7344 add r3, r3, lr + 5415 020c CCD8 bhi .L680 + 5416 .L670: + 5417 020e 0BB0 add sp, sp, #44 + 5418 @ sp needed + 5419 0210 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5420 .L695: + 5421 0214 029B ldr r3, [sp, #8] + 5422 0216 DDF824A0 ldr r10, [sp, #36] + 5423 021a 00EBC20E add lr, r0, r2, lsl #3 + 5424 021e 0021 movs r1, #0 + 5425 0220 DB00 lsls r3, r3, #3 + 5426 0222 0193 str r3, [sp, #4] + 5427 0224 0EF10408 add r8, lr, #4 + 5428 0228 071D adds r7, r0, #4 + 5429 022a 8946 mov r9, r1 + 5430 .L673: + 5431 022c 5EF83130 ldr r3, [lr, r1, lsl #3] + 5432 0230 5BF83100 ldr r0, [fp, r1, lsl #3] + 5433 0234 DAF80050 ldr r5, [r10] + 5434 0238 5B10 asrs r3, r3, #1 + 5435 023a 03EB6002 add r2, r3, r0, asr #1 + 5436 023e 5210 asrs r2, r2, #1 + 5437 0240 C3EB600C rsb ip, r3, r0, asr #1 + 5438 0244 DAF80430 ldr r3, [r10, #4] + 5439 0248 4BF83120 str r2, [fp, r1, lsl #3] + 5440 024c 019A ldr r2, [sp, #4] + 5441 024e 57F83160 ldr r6, [r7, r1, lsl #3] + 5442 0252 9244 add r10, r10, r2 + 5443 0254 58F83120 ldr r2, [r8, r1, lsl #3] + 5444 0258 4FF00044 mov r4, #-2147483648 + 5445 025c 5210 asrs r2, r2, #1 + ARM GAS /tmp/ccFqHvis.s page 95 + + + 5446 025e 4846 mov r0, r9 + 5447 0260 CCFB0540 smlal r4, r0, ip, r5 + 5448 0264 C2EB6604 rsb r4, r2, r6, asr #1 + 5449 0268 02EB6602 add r2, r2, r6, asr #1 + 5450 026c 0092 str r2, [sp] + 5451 026e 4E46 mov r6, r9 + 5452 0270 4FF00042 mov r2, #-2147483648 + 5453 0274 C5FB0426 smlal r2, r6, r5, r4 + 5454 0278 4D46 mov r5, r9 + 5455 027a C4FB0350 smlal r5, r0, r4, r3 + 5456 027e 15F10045 adds r5, r5, #-2147483648 + 5457 0282 8CFB0334 smull r3, r4, ip, r3 + 5458 0286 40F10000 adc r0, r0, #0 + 5459 028a 5B42 rsbs r3, r3, #0 + 5460 028c 66EB0404 sbc r4, r6, r4 + 5461 0290 13F10043 adds r3, r3, #-2147483648 + 5462 0294 009B ldr r3, [sp] + 5463 0296 44F10004 adc r4, r4, #0 + 5464 029a 5A10 asrs r2, r3, #1 + 5465 029c 049B ldr r3, [sp, #16] + 5466 029e 47F83120 str r2, [r7, r1, lsl #3] + 5467 02a2 4EF83100 str r0, [lr, r1, lsl #3] + 5468 02a6 48F83140 str r4, [r8, r1, lsl #3] + 5469 02aa 0131 adds r1, r1, #1 + 5470 02ac 8B42 cmp r3, r1 + 5471 02ae BDD1 bne .L673 + 5472 02b0 FFE6 b .L674 + 5473 .L671: + 5474 02b2 0029 cmp r1, #0 + 5475 02b4 ABD0 beq .L670 + 5476 02b6 0498 ldr r0, [sp, #16] + 5477 02b8 0BF10407 add r7, fp, #4 + 5478 02bc 0646 mov r6, r0 + 5479 02be 69E7 b .L681 + 5480 .L693: + 5481 02c0 089B ldr r3, [sp, #32] + 5482 02c2 049E ldr r6, [sp, #16] + 5483 02c4 9808 lsrs r0, r3, #2 + 5484 02c6 65E7 b .L681 + 5486 .section .text.arm_radix2_butterfly_inverse_q31,"ax",%progbits + 5487 .align 1 + 5488 .p2align 2,,3 + 5489 .global arm_radix2_butterfly_inverse_q31 + 5490 .syntax unified + 5491 .thumb + 5492 .thumb_func + 5493 .fpu fpv4-sp-d16 + 5495 arm_radix2_butterfly_inverse_q31: + 5496 @ args = 0, pretend = 0, frame = 40 + 5497 @ frame_needed = 0, uses_anonymous_args = 0 + 5498 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5499 0004 8BB0 sub sp, sp, #44 + 5500 0006 8146 mov r9, r0 + 5501 0008 0992 str r2, [sp, #36] + 5502 000a 4A08 lsrs r2, r1, #1 + 5503 000c 0191 str r1, [sp, #4] + 5504 000e 0593 str r3, [sp, #20] + ARM GAS /tmp/ccFqHvis.s page 96 + + + 5505 0010 0792 str r2, [sp, #28] + 5506 0012 00F04E81 beq .L697 + 5507 0016 012B cmp r3, #1 + 5508 0018 40F0F880 bne .L725 + 5509 001c 00EBC20C add ip, r0, r2, lsl #3 + 5510 0020 099F ldr r7, [sp, #36] + 5511 0022 CDF808C0 str ip, [sp, #8] + 5512 0026 0022 movs r2, #0 + 5513 0028 0CF1040E add lr, ip, #4 + 5514 002c 00F10408 add r8, r0, #4 + 5515 0030 4FF0004B mov fp, #-2147483648 + 5516 0034 9246 mov r10, r2 + 5517 .L701: + 5518 0036 029B ldr r3, [sp, #8] + 5519 0038 59F83250 ldr r5, [r9, r2, lsl #3] + 5520 003c 53F83230 ldr r3, [r3, r2, lsl #3] + 5521 0040 3E68 ldr r6, [r7] + 5522 0042 5B10 asrs r3, r3, #1 + 5523 0044 03EB6501 add r1, r3, r5, asr #1 + 5524 0048 4910 asrs r1, r1, #1 + 5525 004a C3EB6505 rsb r5, r3, r5, asr #1 + 5526 004e 7B68 ldr r3, [r7, #4] + 5527 0050 49F83210 str r1, [r9, r2, lsl #3] + 5528 0054 5EF83210 ldr r1, [lr, r2, lsl #3] + 5529 0058 58F83240 ldr r4, [r8, r2, lsl #3] + 5530 005c 4810 asrs r0, r1, #1 + 5531 005e DC46 mov ip, fp + 5532 0060 5146 mov r1, r10 + 5533 0062 C6FB05C1 smlal ip, r1, r6, r5 + 5534 0066 0391 str r1, [sp, #12] + 5535 0068 DC46 mov ip, fp + 5536 006a C0EB6401 rsb r1, r0, r4, asr #1 + 5537 006e 00EB6400 add r0, r0, r4, asr #1 + 5538 0072 5446 mov r4, r10 + 5539 0074 C1FB06C4 smlal ip, r4, r1, r6 + 5540 0078 5646 mov r6, r10 + 5541 007a C3FB0564 smlal r6, r4, r3, r5 + 5542 007e 83FB0131 smull r3, r1, r3, r1 + 5543 0082 039D ldr r5, [sp, #12] + 5544 0084 5B42 rsbs r3, r3, #0 + 5545 0086 65EB0101 sbc r1, r5, r1 + 5546 008a 13F10043 adds r3, r3, #-2147483648 + 5547 008e 029B ldr r3, [sp, #8] + 5548 0090 41F10001 adc r1, r1, #0 + 5549 0094 4010 asrs r0, r0, #1 + 5550 0096 16F10046 adds r6, r6, #-2147483648 + 5551 009a 48F83200 str r0, [r8, r2, lsl #3] + 5552 009e 44F10004 adc r4, r4, #0 + 5553 00a2 43F83210 str r1, [r3, r2, lsl #3] + 5554 00a6 079B ldr r3, [sp, #28] + 5555 00a8 4EF83240 str r4, [lr, r2, lsl #3] + 5556 00ac 0132 adds r2, r2, #1 + 5557 00ae 9342 cmp r3, r2 + 5558 00b0 07F10807 add r7, r7, #8 + 5559 00b4 BFD1 bne .L701 + 5560 .L700: + 5561 00b6 059B ldr r3, [sp, #20] + ARM GAS /tmp/ccFqHvis.s page 97 + + + 5562 00b8 5B00 lsls r3, r3, #1 + 5563 00ba 9BB2 uxth r3, r3 + 5564 00bc 0893 str r3, [sp, #32] + 5565 00be 079B ldr r3, [sp, #28] + 5566 00c0 022B cmp r3, #2 + 5567 00c2 40F2FC80 bls .L723 + 5568 00c6 4FF0004B mov fp, #-2147483648 + 5569 00ca 4FF0000A mov r10, #0 + 5570 .L706: + 5571 00ce 079B ldr r3, [sp, #28] + 5572 00d0 019A ldr r2, [sp, #4] + 5573 00d2 0293 str r3, [sp, #8] + 5574 00d4 5B08 lsrs r3, r3, #1 + 5575 00d6 9A42 cmp r2, r3 + 5576 00d8 28BF it cs + 5577 00da 1A46 movcs r2, r3 + 5578 00dc 0692 str r2, [sp, #24] + 5579 00de 089A ldr r2, [sp, #32] + 5580 00e0 0793 str r3, [sp, #28] + 5581 00e2 D200 lsls r2, r2, #3 + 5582 00e4 09EBC307 add r7, r9, r3, lsl #3 + 5583 00e8 0592 str r2, [sp, #20] + 5584 00ea 0023 movs r3, #0 + 5585 00ec 099A ldr r2, [sp, #36] + 5586 00ee 0492 str r2, [sp, #16] + 5587 00f0 07F1040C add ip, r7, #4 + 5588 00f4 0393 str r3, [sp, #12] + 5589 .L703: + 5590 00f6 049B ldr r3, [sp, #16] + 5591 00f8 0399 ldr r1, [sp, #12] + 5592 00fa D3E900E5 ldrd lr, r5, [r3] + 5593 .L702: + 5594 00fe 59F83100 ldr r0, [r9, r1, lsl #3] + 5595 0102 57F83120 ldr r2, [r7, r1, lsl #3] + 5596 0106 8318 adds r3, r0, r2 + 5597 0108 5B10 asrs r3, r3, #1 + 5598 010a 49F83130 str r3, [r9, r1, lsl #3] + 5599 010e 821A subs r2, r0, r2 + 5600 0110 5CF83140 ldr r4, [ip, r1, lsl #3] + 5601 0114 58F83100 ldr r0, [r8, r1, lsl #3] + 5602 0118 5B46 mov r3, fp + 5603 011a 5646 mov r6, r10 + 5604 011c C2FB0E36 smlal r3, r6, r2, lr + 5605 0120 031B subs r3, r0, r4 + 5606 0122 2044 add r0, r0, r4 + 5607 0124 4010 asrs r0, r0, #1 + 5608 0126 48F83100 str r0, [r8, r1, lsl #3] + 5609 012a 5C46 mov r4, fp + 5610 012c 5046 mov r0, r10 + 5611 012e C3FB0E40 smlal r4, r0, r3, lr + 5612 0132 5446 mov r4, r10 + 5613 0134 C2FB0540 smlal r4, r0, r2, r5 + 5614 0138 83FB0523 smull r2, r3, r3, r5 + 5615 013c 5242 rsbs r2, r2, #0 + 5616 013e 66EB0303 sbc r3, r6, r3 + 5617 0142 12F10042 adds r2, r2, #-2147483648 + 5618 0146 43F10003 adc r3, r3, #0 + ARM GAS /tmp/ccFqHvis.s page 98 + + + 5619 014a 47F83130 str r3, [r7, r1, lsl #3] + 5620 014e 14F10044 adds r4, r4, #-2147483648 + 5621 0152 029B ldr r3, [sp, #8] + 5622 0154 40F10000 adc r0, r0, #0 + 5623 0158 4CF83100 str r0, [ip, r1, lsl #3] + 5624 015c 1944 add r1, r1, r3 + 5625 015e 019B ldr r3, [sp, #4] + 5626 0160 8B42 cmp r3, r1 + 5627 0162 CCD8 bhi .L702 + 5628 0164 DDE90421 ldrd r2, r1, [sp, #16] + 5629 0168 039B ldr r3, [sp, #12] + 5630 016a 0A44 add r2, r2, r1 + 5631 016c 0492 str r2, [sp, #16] + 5632 016e 069A ldr r2, [sp, #24] + 5633 0170 0133 adds r3, r3, #1 + 5634 0172 9342 cmp r3, r2 + 5635 0174 0393 str r3, [sp, #12] + 5636 0176 BED3 bcc .L703 + 5637 0178 089B ldr r3, [sp, #32] + 5638 017a 5B00 lsls r3, r3, #1 + 5639 017c 9BB2 uxth r3, r3 + 5640 017e 0893 str r3, [sp, #32] + 5641 0180 079B ldr r3, [sp, #28] + 5642 0182 022B cmp r3, #2 + 5643 0184 A3D8 bhi .L706 + 5644 0186 029B ldr r3, [sp, #8] + 5645 0188 9808 lsrs r0, r3, #2 + 5646 .L709: + 5647 018a 079E ldr r6, [sp, #28] + 5648 018c 4346 mov r3, r8 + 5649 018e 3701 lsls r7, r6, #4 + 5650 0190 DDF80480 ldr r8, [sp, #4] + 5651 0194 4A46 mov r2, r9 + 5652 0196 4FEA460C lsl ip, r6, #1 + 5653 019a 0025 movs r5, #0 + 5654 019c 8419 adds r4, r0, r6 + 5655 019e BE46 mov lr, r7 + 5656 .L708: + 5657 01a0 53F8047C ldr r7, [r3, #-4] + 5658 01a4 52F83010 ldr r1, [r2, r0, lsl #3] + 5659 01a8 07EB010A add r10, r7, r1 + 5660 01ac 43F804AC str r10, [r3, #-4] + 5661 01b0 A7EB0109 sub r9, r7, r1 + 5662 01b4 53F83070 ldr r7, [r3, r0, lsl #3] + 5663 01b8 5168 ldr r1, [r2, #4] + 5664 01ba 01EB070A add r10, r1, r7 + 5665 01be C91B subs r1, r1, r7 + 5666 01c0 C2F804A0 str r10, [r2, #4] + 5667 01c4 42F83090 str r9, [r2, r0, lsl #3] + 5668 01c8 43F83010 str r1, [r3, r0, lsl #3] + 5669 01cc 52F83670 ldr r7, [r2, r6, lsl #3] + 5670 01d0 52F83410 ldr r1, [r2, r4, lsl #3] + 5671 01d4 07EB010A add r10, r7, r1 + 5672 01d8 42F836A0 str r10, [r2, r6, lsl #3] + 5673 01dc A7EB0109 sub r9, r7, r1 + 5674 01e0 53F83610 ldr r1, [r3, r6, lsl #3] + 5675 01e4 53F83470 ldr r7, [r3, r4, lsl #3] + ARM GAS /tmp/ccFqHvis.s page 99 + + + 5676 01e8 6544 add r5, r5, ip + 5677 01ea 01EB070A add r10, r1, r7 + 5678 01ee A845 cmp r8, r5 + 5679 01f0 A1EB0701 sub r1, r1, r7 + 5680 01f4 43F836A0 str r10, [r3, r6, lsl #3] + 5681 01f8 42F83490 str r9, [r2, r4, lsl #3] + 5682 01fc 43F83410 str r1, [r3, r4, lsl #3] + 5683 0200 7244 add r2, r2, lr + 5684 0202 7344 add r3, r3, lr + 5685 0204 CCD8 bhi .L708 + 5686 .L696: + 5687 0206 0BB0 add sp, sp, #44 + 5688 @ sp needed + 5689 0208 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5690 .L725: + 5691 020c 059B ldr r3, [sp, #20] + 5692 020e DDF824A0 ldr r10, [sp, #36] + 5693 0212 00EBC207 add r7, r0, r2, lsl #3 + 5694 0216 DB00 lsls r3, r3, #3 + 5695 0218 0022 movs r2, #0 + 5696 021a 0493 str r3, [sp, #16] + 5697 021c 07F1040C add ip, r7, #4 + 5698 0220 00F10408 add r8, r0, #4 + 5699 0224 4FF0004B mov fp, #-2147483648 + 5700 0228 9646 mov lr, r2 + 5701 022a 0297 str r7, [sp, #8] + 5702 .L699: + 5703 022c 029B ldr r3, [sp, #8] + 5704 022e 59F83250 ldr r5, [r9, r2, lsl #3] + 5705 0232 53F83230 ldr r3, [r3, r2, lsl #3] + 5706 0236 DAF80060 ldr r6, [r10] + 5707 023a 5B10 asrs r3, r3, #1 + 5708 023c 03EB6501 add r1, r3, r5, asr #1 + 5709 0240 C3EB6505 rsb r5, r3, r5, asr #1 + 5710 0244 4B10 asrs r3, r1, #1 + 5711 0246 DAF80410 ldr r1, [r10, #4] + 5712 024a 49F83230 str r3, [r9, r2, lsl #3] + 5713 024e 049B ldr r3, [sp, #16] + 5714 0250 58F83240 ldr r4, [r8, r2, lsl #3] + 5715 0254 9A44 add r10, r10, r3 + 5716 0256 5CF83230 ldr r3, [ip, r2, lsl #3] + 5717 025a 5F46 mov r7, fp + 5718 025c 5810 asrs r0, r3, #1 + 5719 025e 7346 mov r3, lr + 5720 0260 C5FB0673 smlal r7, r3, r5, r6 + 5721 0264 0393 str r3, [sp, #12] + 5722 0266 5F46 mov r7, fp + 5723 0268 C0EB6403 rsb r3, r0, r4, asr #1 + 5724 026c 00EB6400 add r0, r0, r4, asr #1 + 5725 0270 7446 mov r4, lr + 5726 0272 C6FB0374 smlal r7, r4, r6, r3 + 5727 0276 7646 mov r6, lr + 5728 0278 C5FB0164 smlal r6, r4, r5, r1 + 5729 027c 83FB0131 smull r3, r1, r3, r1 + 5730 0280 039D ldr r5, [sp, #12] + 5731 0282 5B42 rsbs r3, r3, #0 + 5732 0284 65EB0101 sbc r1, r5, r1 + ARM GAS /tmp/ccFqHvis.s page 100 + + + 5733 0288 13F10043 adds r3, r3, #-2147483648 + 5734 028c 029B ldr r3, [sp, #8] + 5735 028e 41F10001 adc r1, r1, #0 + 5736 0292 4010 asrs r0, r0, #1 + 5737 0294 16F10046 adds r6, r6, #-2147483648 + 5738 0298 48F83200 str r0, [r8, r2, lsl #3] + 5739 029c 44F10004 adc r4, r4, #0 + 5740 02a0 43F83210 str r1, [r3, r2, lsl #3] + 5741 02a4 079B ldr r3, [sp, #28] + 5742 02a6 4CF83240 str r4, [ip, r2, lsl #3] + 5743 02aa 0132 adds r2, r2, #1 + 5744 02ac 9342 cmp r3, r2 + 5745 02ae BDD1 bne .L699 + 5746 02b0 01E7 b .L700 + 5747 .L697: + 5748 02b2 0029 cmp r1, #0 + 5749 02b4 A7D0 beq .L696 + 5750 02b6 0798 ldr r0, [sp, #28] + 5751 02b8 09F10408 add r8, r9, #4 + 5752 02bc 65E7 b .L709 + 5753 .L723: + 5754 02be 019B ldr r3, [sp, #4] + 5755 02c0 9808 lsrs r0, r3, #2 + 5756 02c2 62E7 b .L709 + 5758 .section .text.arm_cfft_radix2_q31,"ax",%progbits + 5759 .align 1 + 5760 .p2align 2,,3 + 5761 .global arm_cfft_radix2_q31 + 5762 .syntax unified + 5763 .thumb + 5764 .thumb_func + 5765 .fpu fpv4-sp-d16 + 5767 arm_cfft_radix2_q31: + 5768 @ args = 0, pretend = 0, frame = 8 + 5769 @ frame_needed = 0, uses_anonymous_args = 0 + 5770 0000 10B5 push {r4, lr} + 5771 0002 8378 ldrb r3, [r0, #2] @ zero_extendqisi2 + 5772 0004 0446 mov r4, r0 + 5773 0006 82B0 sub sp, sp, #8 + 5774 0008 0846 mov r0, r1 + 5775 000a 012B cmp r3, #1 + 5776 000c 6268 ldr r2, [r4, #4] + 5777 000e A389 ldrh r3, [r4, #12] + 5778 0010 2188 ldrh r1, [r4] + 5779 0012 0190 str r0, [sp, #4] + 5780 0014 0AD0 beq .L730 + 5781 0016 FFF7FEFF bl arm_radix2_butterfly_q31 + 5782 001a 0198 ldr r0, [sp, #4] + 5783 .L728: + 5784 001c A368 ldr r3, [r4, #8] + 5785 001e E289 ldrh r2, [r4, #14] + 5786 0020 2188 ldrh r1, [r4] + 5787 0022 02B0 add sp, sp, #8 + 5788 @ sp needed + 5789 0024 BDE81040 pop {r4, lr} + 5790 0028 FFF7FEBF b arm_bitreversal_q31 + 5791 .L730: + ARM GAS /tmp/ccFqHvis.s page 101 + + + 5792 002c FFF7FEFF bl arm_radix2_butterfly_inverse_q31 + 5793 0030 0198 ldr r0, [sp, #4] + 5794 0032 F3E7 b .L728 + 5796 .section .text.arm_radix4_butterfly_f32,"ax",%progbits + 5797 .align 1 + 5798 .p2align 2,,3 + 5799 .global arm_radix4_butterfly_f32 + 5800 .syntax unified + 5801 .thumb + 5802 .thumb_func + 5803 .fpu fpv4-sp-d16 + 5805 arm_radix4_butterfly_f32: + 5806 @ args = 0, pretend = 0, frame = 40 + 5807 @ frame_needed = 0, uses_anonymous_args = 0 + 5808 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 5809 0004 2DED028B vpush.64 {d8} + 5810 0008 8BB0 sub sp, sp, #44 + 5811 000a 0129 cmp r1, #1 + 5812 000c 0390 str r0, [sp, #12] + 5813 000e 0893 str r3, [sp, #32] + 5814 0010 40F2C880 bls .L731 + 5815 0014 131D adds r3, r2, #4 + 5816 0016 8A46 mov r10, r1 + 5817 0018 0291 str r1, [sp, #8] + 5818 001a 0993 str r3, [sp, #36] + 5819 .L732: + 5820 001c 029B ldr r3, [sp, #8] + 5821 001e 039C ldr r4, [sp, #12] + 5822 0020 0898 ldr r0, [sp, #32] + 5823 0022 9A08 lsrs r2, r3, #2 + 5824 0024 04EBC201 add r1, r4, r2, lsl #3 + 5825 0028 9C46 mov ip, r3 + 5826 002a 02EB420E add lr, r2, r2, lsl #1 + 5827 002e 0431 adds r1, r1, #4 + 5828 0030 00EB4003 add r3, r0, r0, lsl #1 + 5829 0034 DB00 lsls r3, r3, #3 + 5830 0036 0292 str r2, [sp, #8] + 5831 0038 04EBCE0E add lr, r4, lr, lsl #3 + 5832 003c C2EB4272 rsb r2, r2, r2, lsl #29 + 5833 0040 099C ldr r4, [sp, #36] + 5834 0042 0191 str r1, [sp, #4] + 5835 0044 C100 lsls r1, r0, #3 + 5836 0046 0591 str r1, [sp, #20] + 5837 0048 0693 str r3, [sp, #24] + 5838 004a 0101 lsls r1, r0, #4 + 5839 004c D300 lsls r3, r2, #3 + 5840 004e 0491 str r1, [sp, #16] + 5841 0050 A346 mov fp, r4 + 5842 0052 0793 str r3, [sp, #28] + 5843 0054 4FEACC01 lsl r1, ip, #3 + 5844 0058 A146 mov r9, r4 + 5845 005a 0094 str r4, [sp] + 5846 005c 4FF00008 mov r8, #0 + 5847 .L734: + 5848 0060 009B ldr r3, [sp] + 5849 0062 019C ldr r4, [sp, #4] + 5850 0064 13ED012A vldr.32 s4, [r3, #-4] + ARM GAS /tmp/ccFqHvis.s page 102 + + + 5851 0068 D3ED002A vldr.32 s5, [r3] + 5852 006c 039B ldr r3, [sp, #12] + 5853 006e 1BED011A vldr.32 s2, [fp, #-4] + 5854 0072 DBED001A vldr.32 s3, [fp] + 5855 0076 19ED013A vldr.32 s6, [r9, #-4] + 5856 007a D9ED003A vldr.32 s7, [r9] + 5857 007e 03EBC802 add r2, r3, r8, lsl #3 + 5858 0082 079B ldr r3, [sp, #28] + 5859 0084 261F subs r6, r4, #4 + 5860 0086 7344 add r3, r3, lr + 5861 0088 0EF10405 add r5, lr, #4 + 5862 008c 7046 mov r0, lr + 5863 008e 4746 mov r7, r8 + 5864 .L733: + 5865 0090 93ED005A vldr.32 s10, [r3] + 5866 0094 55ED017A vldr.32 s15, [r5, #-4] + 5867 0098 92ED007A vldr.32 s14, [r2] + 5868 009c 14ED014A vldr.32 s8, [r4, #-4] + 5869 00a0 D3ED015A vldr.32 s11, [r3, #4] + 5870 00a4 37EE056A vadd.f32 s12, s14, s10 + 5871 00a8 34EE274A vadd.f32 s8, s8, s15 + 5872 00ac D2ED017A vldr.32 s15, [r2, #4] + 5873 00b0 76EE046A vadd.f32 s13, s12, s8 + 5874 00b4 37EE457A vsub.f32 s14, s14, s10 + 5875 00b8 C2ED006A vstr.32 s13, [r2] + 5876 00bc D0ED010A vldr.32 s1, [r0, #4] + 5877 00c0 D6ED014A vldr.32 s9, [r6, #4] + 5878 00c4 77EEA56A vadd.f32 s13, s15, s11 + 5879 00c8 74EEA04A vadd.f32 s9, s9, s1 + 5880 00cc 77EEE57A vsub.f32 s15, s15, s11 + 5881 00d0 36EEA45A vadd.f32 s10, s13, s9 + 5882 00d4 36EE446A vsub.f32 s12, s12, s8 + 5883 00d8 82ED015A vstr.32 s10, [r2, #4] + 5884 00dc 55ED010A vldr.32 s1, [r5, #-4] + 5885 00e0 54ED015A vldr.32 s11, [r4, #-4] + 5886 00e4 90ED010A vldr.32 s0, [r0, #4] + 5887 00e8 96ED015A vldr.32 s10, [r6, #4] + 5888 00ec 75EEE05A vsub.f32 s11, s11, s1 + 5889 00f0 35EE405A vsub.f32 s10, s10, s0 + 5890 00f4 37EEE58A vsub.f32 s16, s15, s11 + 5891 00f8 77EEA57A vadd.f32 s15, s15, s11 + 5892 00fc 76EEE46A vsub.f32 s13, s13, s9 + 5893 0100 77EE058A vadd.f32 s17, s14, s10 + 5894 0104 37EE457A vsub.f32 s14, s14, s10 + 5895 0108 66EE620A vnmul.f32 s1, s12, s5 + 5896 010c 23EEA75A vmul.f32 s10, s7, s15 + 5897 0110 22EEA60A vmul.f32 s0, s5, s13 + 5898 0114 68EEE14A vnmul.f32 s9, s17, s3 + 5899 0118 67EE635A vnmul.f32 s11, s14, s7 + 5900 011c E2EE260A vfma.f32 s1, s4, s13 + 5901 0120 6744 add r7, r7, ip + 5902 0122 BA45 cmp r10, r7 + 5903 0124 21EE884A vmul.f32 s8, s3, s16 + 5904 0128 F0EE456A vmov.f32 s13, s10 + 5905 012c A2EE060A vfma.f32 s0, s4, s12 + 5906 0130 0A44 add r2, r2, r1 + 5907 0132 E3EE076A vfma.f32 s13, s6, s14 + ARM GAS /tmp/ccFqHvis.s page 103 + + + 5908 0136 B0EE646A vmov.f32 s12, s9 + 5909 013a B0EE657A vmov.f32 s14, s11 + 5910 013e A1EE284A vfma.f32 s8, s2, s17 + 5911 0142 A1EE086A vfma.f32 s12, s2, s16 + 5912 0146 A3EE277A vfma.f32 s14, s6, s15 + 5913 014a 04ED010A vstr.32 s0, [r4, #-4] + 5914 014e C6ED010A vstr.32 s1, [r6, #4] + 5915 0152 0C44 add r4, r4, r1 + 5916 0154 83ED004A vstr.32 s8, [r3] + 5917 0158 83ED016A vstr.32 s12, [r3, #4] + 5918 015c 0E44 add r6, r6, r1 + 5919 015e 45ED016A vstr.32 s13, [r5, #-4] + 5920 0162 0B44 add r3, r3, r1 + 5921 0164 80ED017A vstr.32 s14, [r0, #4] + 5922 0168 0D44 add r5, r5, r1 + 5923 016a 0844 add r0, r0, r1 + 5924 016c 90D8 bhi .L733 + 5925 016e 019B ldr r3, [sp, #4] + 5926 0170 049A ldr r2, [sp, #16] + 5927 0172 0833 adds r3, r3, #8 + 5928 0174 0193 str r3, [sp, #4] + 5929 0176 059B ldr r3, [sp, #20] + 5930 0178 9B44 add fp, fp, r3 + 5931 017a 009B ldr r3, [sp] + 5932 017c 1344 add r3, r3, r2 + 5933 017e 0093 str r3, [sp] + 5934 0180 069B ldr r3, [sp, #24] + 5935 0182 9944 add r9, r9, r3 + 5936 0184 029B ldr r3, [sp, #8] + 5937 0186 08F10108 add r8, r8, #1 + 5938 018a 4345 cmp r3, r8 + 5939 018c 0EF1080E add lr, lr, #8 + 5940 0190 7FF466AF bne .L734 + 5941 0194 089B ldr r3, [sp, #32] + 5942 0196 9B00 lsls r3, r3, #2 + 5943 0198 9BB2 uxth r3, r3 + 5944 019a 0893 str r3, [sp, #32] + 5945 019c 029B ldr r3, [sp, #8] + 5946 019e 012B cmp r3, #1 + 5947 01a0 7FF43CAF bne .L732 + 5948 .L731: + 5949 01a4 0BB0 add sp, sp, #44 + 5950 @ sp needed + 5951 01a6 BDEC028B vldm sp!, {d8} + 5952 01aa BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 5954 01ae 00BF .section .text.arm_radix4_butterfly_inverse_f32,"ax",%progbits + 5955 .align 1 + 5956 .p2align 2,,3 + 5957 .global arm_radix4_butterfly_inverse_f32 + 5958 .syntax unified + 5959 .thumb + 5960 .thumb_func + 5961 .fpu fpv4-sp-d16 + 5963 arm_radix4_butterfly_inverse_f32: + 5964 @ args = 0, pretend = 0, frame = 48 + 5965 @ frame_needed = 0, uses_anonymous_args = 0 + 5966 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + ARM GAS /tmp/ccFqHvis.s page 104 + + + 5967 0004 2DED048B vpush.64 {d8, d9} + 5968 0008 8DB0 sub sp, sp, #52 + 5969 000a 0429 cmp r1, #4 + 5970 000c 8A46 mov r10, r1 + 5971 000e 0490 str r0, [sp, #16] + 5972 0010 0993 str r3, [sp, #36] + 5973 0012 40F24481 bls .L747 + 5974 0016 131D adds r3, r2, #4 + 5975 0018 0391 str r1, [sp, #12] + 5976 001a 0B93 str r3, [sp, #44] + 5977 .L745: + 5978 001c 039B ldr r3, [sp, #12] + 5979 001e 0998 ldr r0, [sp, #36] + 5980 0020 049C ldr r4, [sp, #16] + 5981 0022 9A08 lsrs r2, r3, #2 + 5982 0024 9C46 mov ip, r3 + 5983 0026 D300 lsls r3, r2, #3 + 5984 0028 191D adds r1, r3, #4 + 5985 002a 6118 adds r1, r4, r1 + 5986 002c 0A93 str r3, [sp, #40] + 5987 002e 00EB4003 add r3, r0, r0, lsl #1 + 5988 0032 02EB420E add lr, r2, r2, lsl #1 + 5989 0036 DB00 lsls r3, r3, #3 + 5990 0038 0392 str r2, [sp, #12] + 5991 003a 0291 str r1, [sp, #8] + 5992 003c C2EB4272 rsb r2, r2, r2, lsl #29 + 5993 0040 0146 mov r1, r0 + 5994 0042 C000 lsls r0, r0, #3 + 5995 0044 0690 str r0, [sp, #24] + 5996 0046 0793 str r3, [sp, #28] + 5997 0048 0B98 ldr r0, [sp, #44] + 5998 004a 0190 str r0, [sp, #4] + 5999 004c D300 lsls r3, r2, #3 + 6000 004e 0893 str r3, [sp, #32] + 6001 0050 0B01 lsls r3, r1, #4 + 6002 0052 04EBCE0E add lr, r4, lr, lsl #3 + 6003 0056 0593 str r3, [sp, #20] + 6004 0058 4FEACC01 lsl r1, ip, #3 + 6005 005c 8346 mov fp, r0 + 6006 005e 8146 mov r9, r0 + 6007 0060 4FF00008 mov r8, #0 + 6008 .L744: + 6009 0064 019B ldr r3, [sp, #4] + 6010 0066 029C ldr r4, [sp, #8] + 6011 0068 13ED011A vldr.32 s2, [r3, #-4] + 6012 006c D3ED001A vldr.32 s3, [r3] + 6013 0070 049B ldr r3, [sp, #16] + 6014 0072 19ED012A vldr.32 s4, [r9, #-4] + 6015 0076 D9ED002A vldr.32 s5, [r9] + 6016 007a 1BED013A vldr.32 s6, [fp, #-4] + 6017 007e DBED003A vldr.32 s7, [fp] + 6018 0082 03EBC802 add r2, r3, r8, lsl #3 + 6019 0086 089B ldr r3, [sp, #32] + 6020 0088 261F subs r6, r4, #4 + 6021 008a 7344 add r3, r3, lr + 6022 008c 0EF10405 add r5, lr, #4 + 6023 0090 7046 mov r0, lr + ARM GAS /tmp/ccFqHvis.s page 105 + + + 6024 0092 4746 mov r7, r8 + 6025 .L743: + 6026 0094 93ED005A vldr.32 s10, [r3] + 6027 0098 55ED017A vldr.32 s15, [r5, #-4] + 6028 009c 92ED007A vldr.32 s14, [r2] + 6029 00a0 14ED014A vldr.32 s8, [r4, #-4] + 6030 00a4 D3ED015A vldr.32 s11, [r3, #4] + 6031 00a8 37EE056A vadd.f32 s12, s14, s10 + 6032 00ac 34EE274A vadd.f32 s8, s8, s15 + 6033 00b0 D2ED017A vldr.32 s15, [r2, #4] + 6034 00b4 76EE046A vadd.f32 s13, s12, s8 + 6035 00b8 37EE457A vsub.f32 s14, s14, s10 + 6036 00bc C2ED006A vstr.32 s13, [r2] + 6037 00c0 D0ED010A vldr.32 s1, [r0, #4] + 6038 00c4 D6ED014A vldr.32 s9, [r6, #4] + 6039 00c8 77EEA56A vadd.f32 s13, s15, s11 + 6040 00cc 74EEA04A vadd.f32 s9, s9, s1 + 6041 00d0 77EEE57A vsub.f32 s15, s15, s11 + 6042 00d4 36EEA45A vadd.f32 s10, s13, s9 + 6043 00d8 36EE446A vsub.f32 s12, s12, s8 + 6044 00dc 82ED015A vstr.32 s10, [r2, #4] + 6045 00e0 55ED010A vldr.32 s1, [r5, #-4] + 6046 00e4 54ED015A vldr.32 s11, [r4, #-4] + 6047 00e8 90ED018A vldr.32 s16, [r0, #4] + 6048 00ec 96ED015A vldr.32 s10, [r6, #4] + 6049 00f0 75EEE05A vsub.f32 s11, s11, s1 + 6050 00f4 35EE485A vsub.f32 s10, s10, s16 + 6051 00f8 77EEA58A vadd.f32 s17, s15, s11 + 6052 00fc 77EEE57A vsub.f32 s15, s15, s11 + 6053 0100 76EEE46A vsub.f32 s13, s13, s9 + 6054 0104 37EE459A vsub.f32 s18, s14, s10 + 6055 0108 37EE057A vadd.f32 s14, s14, s10 + 6056 010c 62EE860A vmul.f32 s1, s5, s12 + 6057 0110 27EEE35A vnmul.f32 s10, s15, s7 + 6058 0114 26EEE28A vnmul.f32 s16, s13, s5 + 6059 0118 61EE894A vmul.f32 s9, s3, s18 + 6060 011c 63EE875A vmul.f32 s11, s7, s14 + 6061 0120 E2EE260A vfma.f32 s1, s4, s13 + 6062 0124 6744 add r7, r7, ip + 6063 0126 BA45 cmp r10, r7 + 6064 0128 28EEE14A vnmul.f32 s8, s17, s3 + 6065 012c F0EE456A vmov.f32 s13, s10 + 6066 0130 A2EE068A vfma.f32 s16, s4, s12 + 6067 0134 0A44 add r2, r2, r1 + 6068 0136 E3EE076A vfma.f32 s13, s6, s14 + 6069 013a B0EE646A vmov.f32 s12, s9 + 6070 013e B0EE657A vmov.f32 s14, s11 + 6071 0142 A1EE094A vfma.f32 s8, s2, s18 + 6072 0146 A1EE286A vfma.f32 s12, s2, s17 + 6073 014a A3EE277A vfma.f32 s14, s6, s15 + 6074 014e 04ED018A vstr.32 s16, [r4, #-4] + 6075 0152 C6ED010A vstr.32 s1, [r6, #4] + 6076 0156 0C44 add r4, r4, r1 + 6077 0158 83ED004A vstr.32 s8, [r3] + 6078 015c 83ED016A vstr.32 s12, [r3, #4] + 6079 0160 0E44 add r6, r6, r1 + 6080 0162 45ED016A vstr.32 s13, [r5, #-4] + ARM GAS /tmp/ccFqHvis.s page 106 + + + 6081 0166 0B44 add r3, r3, r1 + 6082 0168 80ED017A vstr.32 s14, [r0, #4] + 6083 016c 0D44 add r5, r5, r1 + 6084 016e 0844 add r0, r0, r1 + 6085 0170 90D8 bhi .L743 + 6086 0172 029B ldr r3, [sp, #8] + 6087 0174 069A ldr r2, [sp, #24] + 6088 0176 0833 adds r3, r3, #8 + 6089 0178 0293 str r3, [sp, #8] + 6090 017a 019B ldr r3, [sp, #4] + 6091 017c 1344 add r3, r3, r2 + 6092 017e 0193 str r3, [sp, #4] + 6093 0180 059B ldr r3, [sp, #20] + 6094 0182 9944 add r9, r9, r3 + 6095 0184 079B ldr r3, [sp, #28] + 6096 0186 9B44 add fp, fp, r3 + 6097 0188 039B ldr r3, [sp, #12] + 6098 018a 08F10108 add r8, r8, #1 + 6099 018e 4345 cmp r3, r8 + 6100 0190 0EF1080E add lr, lr, #8 + 6101 0194 7FF466AF bne .L744 + 6102 0198 099B ldr r3, [sp, #36] + 6103 019a 9B00 lsls r3, r3, #2 + 6104 019c 9BB2 uxth r3, r3 + 6105 019e 0993 str r3, [sp, #36] + 6106 01a0 039B ldr r3, [sp, #12] + 6107 01a2 042B cmp r3, #4 + 6108 01a4 3FF63AAF bhi .L745 + 6109 01a8 AAEB0305 sub r5, r10, r3 + 6110 01ac 9E46 mov lr, r3 + 6111 .L742: + 6112 01ae 9908 lsrs r1, r3, #2 + 6113 01b0 049B ldr r3, [sp, #16] + 6114 01b2 DDF828C0 ldr ip, [sp, #40] + 6115 01b6 01EB4100 add r0, r1, r1, lsl #1 + 6116 01ba 03EBC106 add r6, r3, r1, lsl #3 + 6117 01be 03EBC000 add r0, r3, r0, lsl #3 + 6118 01c2 3446 mov r4, r6 + 6119 01c4 03EB0112 add r2, r3, r1, lsl #4 + 6120 01c8 0430 adds r0, r0, #4 + 6121 01ca 0434 adds r4, r4, #4 + 6122 01cc 06EB0111 add r1, r6, r1, lsl #4 + 6123 01d0 0027 movs r7, #0 + 6124 .L746: + 6125 01d2 92ED004A vldr.32 s8, [r2] + 6126 01d6 50ED017A vldr.32 s15, [r0, #-4] + 6127 01da 93ED007A vldr.32 s14, [r3] + 6128 01de 14ED015A vldr.32 s10, [r4, #-4] + 6129 01e2 D2ED014A vldr.32 s9, [r2, #4] + 6130 01e6 37EE046A vadd.f32 s12, s14, s8 + 6131 01ea 35EE275A vadd.f32 s10, s10, s15 + 6132 01ee D3ED017A vldr.32 s15, [r3, #4] + 6133 01f2 76EE055A vadd.f32 s11, s12, s10 + 6134 01f6 77EEA46A vadd.f32 s13, s15, s9 + 6135 01fa 65EE805A vmul.f32 s11, s11, s0 + 6136 01fe 77EEE47A vsub.f32 s15, s15, s9 + 6137 0202 C3ED005A vstr.32 s11, [r3] + ARM GAS /tmp/ccFqHvis.s page 107 + + + 6138 0206 D6ED015A vldr.32 s11, [r6, #4] + 6139 020a D1ED013A vldr.32 s7, [r1, #4] + 6140 020e 75EEA35A vadd.f32 s11, s11, s7 + 6141 0212 36EE456A vsub.f32 s12, s12, s10 + 6142 0216 76EEA54A vadd.f32 s9, s13, s11 + 6143 021a 37EE447A vsub.f32 s14, s14, s8 + 6144 021e 24EE805A vmul.f32 s10, s9, s0 + 6145 0222 76EEE56A vsub.f32 s13, s13, s11 + 6146 0226 83ED015A vstr.32 s10, [r3, #4] + 6147 022a 91ED014A vldr.32 s8, [r1, #4] + 6148 022e 50ED014A vldr.32 s9, [r0, #-4] + 6149 0232 96ED015A vldr.32 s10, [r6, #4] + 6150 0236 54ED015A vldr.32 s11, [r4, #-4] + 6151 023a 35EE445A vsub.f32 s10, s10, s8 + 6152 023e 75EEE45A vsub.f32 s11, s11, s9 + 6153 0242 37EE454A vsub.f32 s8, s14, s10 + 6154 0246 77EEA54A vadd.f32 s9, s15, s11 + 6155 024a 37EE057A vadd.f32 s14, s14, s10 + 6156 024e 77EEE57A vsub.f32 s15, s15, s11 + 6157 0252 26EE006A vmul.f32 s12, s12, s0 + 6158 0256 66EE806A vmul.f32 s13, s13, s0 + 6159 025a 24EE005A vmul.f32 s10, s8, s0 + 6160 025e 64EE805A vmul.f32 s11, s9, s0 + 6161 0262 27EE007A vmul.f32 s14, s14, s0 + 6162 0266 67EE807A vmul.f32 s15, s15, s0 + 6163 026a 7744 add r7, r7, lr + 6164 026c AF42 cmp r7, r5 + 6165 026e 04ED016A vstr.32 s12, [r4, #-4] + 6166 0272 6344 add r3, r3, ip + 6167 0274 C6ED016A vstr.32 s13, [r6, #4] + 6168 0278 6444 add r4, r4, ip + 6169 027a 82ED005A vstr.32 s10, [r2] + 6170 027e C2ED015A vstr.32 s11, [r2, #4] + 6171 0282 6644 add r6, r6, ip + 6172 0284 00ED017A vstr.32 s14, [r0, #-4] + 6173 0288 6244 add r2, r2, ip + 6174 028a C1ED017A vstr.32 s15, [r1, #4] + 6175 028e 6044 add r0, r0, ip + 6176 0290 6144 add r1, r1, ip + 6177 0292 9ED9 bls .L746 + 6178 0294 0DB0 add sp, sp, #52 + 6179 @ sp needed + 6180 0296 BDEC048B vldm sp!, {d8-d9} + 6181 029a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 6182 .L747: + 6183 029e 0391 str r1, [sp, #12] + 6184 02a0 CB00 lsls r3, r1, #3 + 6185 02a2 0A93 str r3, [sp, #40] + 6186 02a4 DDF80CE0 ldr lr, [sp, #12] + 6187 02a8 039B ldr r3, [sp, #12] + 6188 02aa 0025 movs r5, #0 + 6189 02ac 7FE7 b .L742 + 6191 02ae 00BF .section .text.arm_cfft_radix4_f32,"ax",%progbits + 6192 .align 1 + 6193 .p2align 2,,3 + 6194 .global arm_cfft_radix4_f32 + 6195 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 108 + + + 6196 .thumb + 6197 .thumb_func + 6198 .fpu fpv4-sp-d16 + 6200 arm_cfft_radix4_f32: + 6201 @ args = 0, pretend = 0, frame = 8 + 6202 @ frame_needed = 0, uses_anonymous_args = 0 + 6203 0000 10B5 push {r4, lr} + 6204 0002 8378 ldrb r3, [r0, #2] @ zero_extendqisi2 + 6205 0004 012B cmp r3, #1 + 6206 0006 0446 mov r4, r0 + 6207 0008 82B0 sub sp, sp, #8 + 6208 000a 0846 mov r0, r1 + 6209 000c 0BD0 beq .L758 + 6210 000e A389 ldrh r3, [r4, #12] + 6211 0010 6268 ldr r2, [r4, #4] + 6212 0012 2188 ldrh r1, [r4] + 6213 0014 0190 str r0, [sp, #4] + 6214 0016 FFF7FEFF bl arm_radix4_butterfly_f32 + 6215 001a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 6216 001c 0198 ldr r0, [sp, #4] + 6217 001e 012B cmp r3, #1 + 6218 0020 0DD0 beq .L759 + 6219 .L753: + 6220 0022 02B0 add sp, sp, #8 + 6221 @ sp needed + 6222 0024 10BD pop {r4, pc} + 6223 .L758: + 6224 0026 A389 ldrh r3, [r4, #12] + 6225 0028 94ED040A vldr.32 s0, [r4, #16] + 6226 002c 6268 ldr r2, [r4, #4] + 6227 002e 2188 ldrh r1, [r4] + 6228 0030 0190 str r0, [sp, #4] + 6229 0032 FFF7FEFF bl arm_radix4_butterfly_inverse_f32 + 6230 0036 E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 6231 0038 0198 ldr r0, [sp, #4] + 6232 003a 012B cmp r3, #1 + 6233 003c F1D1 bne .L753 + 6234 .L759: + 6235 003e A368 ldr r3, [r4, #8] + 6236 0040 E289 ldrh r2, [r4, #14] + 6237 0042 2188 ldrh r1, [r4] + 6238 0044 02B0 add sp, sp, #8 + 6239 @ sp needed + 6240 0046 BDE81040 pop {r4, lr} + 6241 004a FFF7FEBF b arm_bitreversal_f32 + 6243 004e 00BF .section .text.arm_cfft_radix4_init_f32,"ax",%progbits + 6244 .align 1 + 6245 .p2align 2,,3 + 6246 .global arm_cfft_radix4_init_f32 + 6247 .syntax unified + 6248 .thumb + 6249 .thumb_func + 6250 .fpu fpv4-sp-d16 + 6252 arm_cfft_radix4_init_f32: + 6253 @ args = 0, pretend = 0, frame = 0 + 6254 @ frame_needed = 0, uses_anonymous_args = 0 + 6255 @ link register save eliminated. + ARM GAS /tmp/ccFqHvis.s page 109 + + + 6256 0000 10B4 push {r4} + 6257 0002 B1F5807F cmp r1, #256 + 6258 0006 284C ldr r4, .L770 + 6259 0008 0180 strh r1, [r0] @ movhi + 6260 000a 4460 str r4, [r0, #4] + 6261 000c 8270 strb r2, [r0, #2] + 6262 000e C370 strb r3, [r0, #3] + 6263 0010 22D0 beq .L761 + 6264 0012 11D9 bls .L769 + 6265 0014 B1F5806F cmp r1, #1024 + 6266 0018 2AD0 beq .L766 + 6267 001a B1F5805F cmp r1, #4096 + 6268 001e 3FD1 bne .L767 + 6269 0020 224A ldr r2, .L770+4 + 6270 0022 4FF06653 mov r3, #964689920 + 6271 0026 4FF00111 mov r1, #65537 + 6272 002a C0E90221 strd r2, r1, [r0, #8] + 6273 002e 0361 str r3, [r0, #16] @ float + 6274 0030 0020 movs r0, #0 + 6275 .L765: + 6276 0032 5DF8044B ldr r4, [sp], #4 + 6277 0036 7047 bx lr + 6278 .L769: + 6279 0038 1029 cmp r1, #16 + 6280 003a 25D0 beq .L763 + 6281 003c 4029 cmp r1, #64 + 6282 003e 2FD1 bne .L767 + 6283 0040 1B4A ldr r2, .L770+8 + 6284 0042 5DF8044B ldr r4, [sp], #4 + 6285 0046 4FF07253 mov r3, #1015021568 + 6286 004a 4FF04011 mov r1, #4194368 + 6287 004e C0E90221 strd r2, r1, [r0, #8] + 6288 0052 0361 str r3, [r0, #16] @ float + 6289 0054 0020 movs r0, #0 + 6290 0056 7047 bx lr + 6291 .L761: + 6292 0058 164A ldr r2, .L770+12 + 6293 005a 5DF8044B ldr r4, [sp], #4 + 6294 005e 4FF06E53 mov r3, #998244352 + 6295 0062 4FF01011 mov r1, #1048592 + 6296 0066 C0E90221 strd r2, r1, [r0, #8] + 6297 006a 0361 str r3, [r0, #16] @ float + 6298 006c 0020 movs r0, #0 + 6299 006e 7047 bx lr + 6300 .L766: + 6301 0070 114A ldr r2, .L770+16 + 6302 0072 5DF8044B ldr r4, [sp], #4 + 6303 0076 4FF06A53 mov r3, #981467136 + 6304 007a 4FF00411 mov r1, #262148 + 6305 007e C0E90221 strd r2, r1, [r0, #8] + 6306 0082 0361 str r3, [r0, #16] @ float + 6307 0084 0020 movs r0, #0 + 6308 0086 7047 bx lr + 6309 .L763: + 6310 0088 0C4A ldr r2, .L770+20 + 6311 008a 5DF8044B ldr r4, [sp], #4 + 6312 008e 4FF07653 mov r3, #1031798784 + ARM GAS /tmp/ccFqHvis.s page 110 + + + 6313 0092 4FF00121 mov r1, #16777472 + 6314 0096 C0E90221 strd r2, r1, [r0, #8] + 6315 009a 0361 str r3, [r0, #16] @ float + 6316 009c 0020 movs r0, #0 + 6317 009e 7047 bx lr + 6318 .L767: + 6319 00a0 4FF0FF30 mov r0, #-1 + 6320 00a4 C5E7 b .L765 + 6321 .L771: + 6322 00a6 00BF .align 2 + 6323 .L770: + 6324 00a8 00000000 .word twiddleCoef_4096 + 6325 00ac 00000000 .word armBitRevTable + 6326 00b0 7E000000 .word armBitRevTable+126 + 6327 00b4 1E000000 .word armBitRevTable+30 + 6328 00b8 06000000 .word armBitRevTable+6 + 6329 00bc FE010000 .word armBitRevTable+510 + 6331 .section .text.arm_cfft_radix4_init_q15,"ax",%progbits + 6332 .align 1 + 6333 .p2align 2,,3 + 6334 .global arm_cfft_radix4_init_q15 + 6335 .syntax unified + 6336 .thumb + 6337 .thumb_func + 6338 .fpu fpv4-sp-d16 + 6340 arm_cfft_radix4_init_q15: + 6341 @ args = 0, pretend = 0, frame = 0 + 6342 @ frame_needed = 0, uses_anonymous_args = 0 + 6343 @ link register save eliminated. + 6344 0000 10B4 push {r4} + 6345 0002 B1F5807F cmp r1, #256 + 6346 0006 204C ldr r4, .L782 + 6347 0008 0180 strh r1, [r0] @ movhi + 6348 000a 4460 str r4, [r0, #4] + 6349 000c 8270 strb r2, [r0, #2] + 6350 000e C370 strb r3, [r0, #3] + 6351 0010 1CD0 beq .L773 + 6352 0012 0ED9 bls .L781 + 6353 0014 B1F5806F cmp r1, #1024 + 6354 0018 21D0 beq .L778 + 6355 001a B1F5805F cmp r1, #4096 + 6356 001e 30D1 bne .L779 + 6357 0020 1A4B ldr r3, .L782+4 + 6358 0022 4FF00112 mov r2, #65537 + 6359 0026 C0E90232 strd r3, r2, [r0, #8] + 6360 002a 0020 movs r0, #0 + 6361 .L777: + 6362 002c 5DF8044B ldr r4, [sp], #4 + 6363 0030 7047 bx lr + 6364 .L781: + 6365 0032 1029 cmp r1, #16 + 6366 0034 1CD0 beq .L775 + 6367 0036 4029 cmp r1, #64 + 6368 0038 23D1 bne .L779 + 6369 003a 154B ldr r3, .L782+8 + 6370 003c 5DF8044B ldr r4, [sp], #4 + 6371 0040 4FF04012 mov r2, #4194368 + ARM GAS /tmp/ccFqHvis.s page 111 + + + 6372 0044 C0E90232 strd r3, r2, [r0, #8] + 6373 0048 0020 movs r0, #0 + 6374 004a 7047 bx lr + 6375 .L773: + 6376 004c 114B ldr r3, .L782+12 + 6377 004e 5DF8044B ldr r4, [sp], #4 + 6378 0052 4FF01012 mov r2, #1048592 + 6379 0056 C0E90232 strd r3, r2, [r0, #8] + 6380 005a 0020 movs r0, #0 + 6381 005c 7047 bx lr + 6382 .L778: + 6383 005e 0E4B ldr r3, .L782+16 + 6384 0060 5DF8044B ldr r4, [sp], #4 + 6385 0064 4FF00412 mov r2, #262148 + 6386 0068 C0E90232 strd r3, r2, [r0, #8] + 6387 006c 0020 movs r0, #0 + 6388 006e 7047 bx lr + 6389 .L775: + 6390 0070 0A4B ldr r3, .L782+20 + 6391 0072 5DF8044B ldr r4, [sp], #4 + 6392 0076 4FF00122 mov r2, #16777472 + 6393 007a C0E90232 strd r3, r2, [r0, #8] + 6394 007e 0020 movs r0, #0 + 6395 0080 7047 bx lr + 6396 .L779: + 6397 0082 4FF0FF30 mov r0, #-1 + 6398 0086 D1E7 b .L777 + 6399 .L783: + 6400 .align 2 + 6401 .L782: + 6402 0088 00000000 .word twiddleCoef_4096_q15 + 6403 008c 00000000 .word armBitRevTable + 6404 0090 7E000000 .word armBitRevTable+126 + 6405 0094 1E000000 .word armBitRevTable+30 + 6406 0098 06000000 .word armBitRevTable+6 + 6407 009c FE010000 .word armBitRevTable+510 + 6409 .section .text.arm_cfft_radix4_init_q31,"ax",%progbits + 6410 .align 1 + 6411 .p2align 2,,3 + 6412 .global arm_cfft_radix4_init_q31 + 6413 .syntax unified + 6414 .thumb + 6415 .thumb_func + 6416 .fpu fpv4-sp-d16 + 6418 arm_cfft_radix4_init_q31: + 6419 @ args = 0, pretend = 0, frame = 0 + 6420 @ frame_needed = 0, uses_anonymous_args = 0 + 6421 @ link register save eliminated. + 6422 0000 10B4 push {r4} + 6423 0002 B1F5807F cmp r1, #256 + 6424 0006 204C ldr r4, .L794 + 6425 0008 0180 strh r1, [r0] @ movhi + 6426 000a 4460 str r4, [r0, #4] + 6427 000c 8270 strb r2, [r0, #2] + 6428 000e C370 strb r3, [r0, #3] + 6429 0010 1CD0 beq .L785 + 6430 0012 0ED9 bls .L793 + ARM GAS /tmp/ccFqHvis.s page 112 + + + 6431 0014 B1F5806F cmp r1, #1024 + 6432 0018 21D0 beq .L790 + 6433 001a B1F5805F cmp r1, #4096 + 6434 001e 30D1 bne .L791 + 6435 0020 1A4B ldr r3, .L794+4 + 6436 0022 4FF00112 mov r2, #65537 + 6437 0026 C0E90232 strd r3, r2, [r0, #8] + 6438 002a 0020 movs r0, #0 + 6439 .L789: + 6440 002c 5DF8044B ldr r4, [sp], #4 + 6441 0030 7047 bx lr + 6442 .L793: + 6443 0032 1029 cmp r1, #16 + 6444 0034 1CD0 beq .L787 + 6445 0036 4029 cmp r1, #64 + 6446 0038 23D1 bne .L791 + 6447 003a 154B ldr r3, .L794+8 + 6448 003c 5DF8044B ldr r4, [sp], #4 + 6449 0040 4FF04012 mov r2, #4194368 + 6450 0044 C0E90232 strd r3, r2, [r0, #8] + 6451 0048 0020 movs r0, #0 + 6452 004a 7047 bx lr + 6453 .L785: + 6454 004c 114B ldr r3, .L794+12 + 6455 004e 5DF8044B ldr r4, [sp], #4 + 6456 0052 4FF01012 mov r2, #1048592 + 6457 0056 C0E90232 strd r3, r2, [r0, #8] + 6458 005a 0020 movs r0, #0 + 6459 005c 7047 bx lr + 6460 .L790: + 6461 005e 0E4B ldr r3, .L794+16 + 6462 0060 5DF8044B ldr r4, [sp], #4 + 6463 0064 4FF00412 mov r2, #262148 + 6464 0068 C0E90232 strd r3, r2, [r0, #8] + 6465 006c 0020 movs r0, #0 + 6466 006e 7047 bx lr + 6467 .L787: + 6468 0070 0A4B ldr r3, .L794+20 + 6469 0072 5DF8044B ldr r4, [sp], #4 + 6470 0076 4FF00122 mov r2, #16777472 + 6471 007a C0E90232 strd r3, r2, [r0, #8] + 6472 007e 0020 movs r0, #0 + 6473 0080 7047 bx lr + 6474 .L791: + 6475 0082 4FF0FF30 mov r0, #-1 + 6476 0086 D1E7 b .L789 + 6477 .L795: + 6478 .align 2 + 6479 .L794: + 6480 0088 00000000 .word twiddleCoef_4096_q31 + 6481 008c 00000000 .word armBitRevTable + 6482 0090 7E000000 .word armBitRevTable+126 + 6483 0094 1E000000 .word armBitRevTable+30 + 6484 0098 06000000 .word armBitRevTable+6 + 6485 009c FE010000 .word armBitRevTable+510 + 6487 .section .text.arm_radix4_butterfly_q15,"ax",%progbits + 6488 .align 1 + ARM GAS /tmp/ccFqHvis.s page 113 + + + 6489 .p2align 2,,3 + 6490 .global arm_radix4_butterfly_q15 + 6491 .syntax unified + 6492 .thumb + 6493 .thumb_func + 6494 .fpu fpv4-sp-d16 + 6496 arm_radix4_butterfly_q15: + 6497 @ args = 0, pretend = 0, frame = 72 + 6498 @ frame_needed = 0, uses_anonymous_args = 0 + 6499 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 6500 0004 93B0 sub sp, sp, #76 + 6501 0006 012B cmp r3, #1 + 6502 0008 0191 str r1, [sp, #4] + 6503 000a 1092 str r2, [sp, #64] + 6504 000c 0A46 mov r2, r1 + 6505 000e 4FEA9101 lsr r1, r1, #2 + 6506 0012 1191 str r1, [sp, #68] + 6507 0014 22F00301 bic r1, r2, #3 + 6508 0018 00EB4104 add r4, r0, r1, lsl #1 + 6509 001c 0F90 str r0, [sp, #60] + 6510 001e 0246 mov r2, r0 + 6511 0020 0093 str r3, [sp] + 6512 0022 0844 add r0, r0, r1 + 6513 0024 2144 add r1, r1, r4 + 6514 0026 40F02281 bne .L814 + 6515 002a 109F ldr r7, [sp, #64] + 6516 002c C64E ldr r6, .L816 + 6517 002e 0F9D ldr r5, [sp, #60] + 6518 0030 DDF844A0 ldr r10, [sp, #68] + 6519 0034 BB46 mov fp, r7 + 6520 0036 BC46 mov ip, r7 + 6521 0038 0023 movs r3, #0 + 6522 .L800: + 6523 003a D5F80090 ldr r9, [r5] @ unaligned + 6524 .syntax unified + 6525 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6526 003e 99FA23F9 shadd16 r9, r9, r3 + 6527 @ 0 "" 2 + 6528 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6529 0042 99FA23F9 shadd16 r9, r9, r3 + 6530 @ 0 "" 2 + 6531 .thumb + 6532 .syntax unified + 6533 0046 2268 ldr r2, [r4] @ unaligned + 6534 .syntax unified + 6535 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6536 0048 92FA23F2 shadd16 r2, r2, r3 + 6537 @ 0 "" 2 + 6538 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6539 004c 92FA23F2 shadd16 r2, r2, r3 + 6540 @ 0 "" 2 + 6541 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6542 0050 99FA12FE qadd16 lr, r9, r2 + 6543 @ 0 "" 2 + 6544 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6545 0054 D9FA12F9 qsub16 r9, r9, r2 + 6546 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 114 + + + 6547 .thumb + 6548 .syntax unified + 6549 0058 0268 ldr r2, [r0] @ unaligned + 6550 .syntax unified + 6551 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6552 005a 92FA23F2 shadd16 r2, r2, r3 + 6553 @ 0 "" 2 + 6554 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6555 005e 92FA23F2 shadd16 r2, r2, r3 + 6556 @ 0 "" 2 + 6557 .thumb + 6558 .syntax unified + 6559 0062 D1F80080 ldr r8, [r1] @ unaligned + 6560 .syntax unified + 6561 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6562 0066 98FA23F8 shadd16 r8, r8, r3 + 6563 @ 0 "" 2 + 6564 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6565 006a 98FA23F8 shadd16 r8, r8, r3 + 6566 @ 0 "" 2 + 6567 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6568 006e 92FA18F2 qadd16 r2, r2, r8 + 6569 @ 0 "" 2 + 6570 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6571 0072 9EFA22F8 shadd16 r8, lr, r2 + 6572 @ 0 "" 2 + 6573 .thumb + 6574 .syntax unified + 6575 0076 45F8048B str r8, [r5], #4 @ unaligned + 6576 .syntax unified + 6577 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6578 007a DEFA12FE qsub16 lr, lr, r2 + 6579 @ 0 "" 2 + 6580 .thumb + 6581 .syntax unified + 6582 007e 5BF8082B ldr r2, [fp], #8 @ unaligned + 6583 .syntax unified + 6584 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6585 0082 22FB0EF8 smuad r8, r2, lr + 6586 @ 0 "" 2 + 6587 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6588 0086 42FB1EFE smusdx lr, r2, lr + 6589 @ 0 "" 2 + 6590 .thumb + 6591 .syntax unified + 6592 008a 0268 ldr r2, [r0] @ unaligned + 6593 .syntax unified + 6594 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6595 008c 92FA23F2 shadd16 r2, r2, r3 + 6596 @ 0 "" 2 + 6597 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6598 0090 92FA23F2 shadd16 r2, r2, r3 + 6599 @ 0 "" 2 + 6600 .thumb + 6601 .syntax unified + 6602 0094 0EEA060E and lr, lr, r6 + 6603 0098 4EEA184E orr lr, lr, r8, lsr #16 + ARM GAS /tmp/ccFqHvis.s page 115 + + + 6604 009c 40F804EB str lr, [r0], #4 @ unaligned + 6605 00a0 D1F800E0 ldr lr, [r1] @ unaligned + 6606 .syntax unified + 6607 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6608 00a4 9EFA23FE shadd16 lr, lr, r3 + 6609 @ 0 "" 2 + 6610 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6611 00a8 9EFA23FE shadd16 lr, lr, r3 + 6612 @ 0 "" 2 + 6613 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6614 00ac D2FA1EF2 qsub16 r2, r2, lr + 6615 @ 0 "" 2 + 6616 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6617 00b0 A9FA12F8 qasx r8, r9, r2 + 6618 @ 0 "" 2 + 6619 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6620 00b4 E9FA12F9 qsax r9, r9, r2 + 6621 @ 0 "" 2 + 6622 .thumb + 6623 .syntax unified + 6624 00b8 57F8042B ldr r2, [r7], #4 @ unaligned + 6625 .syntax unified + 6626 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6627 00bc 22FB09FE smuad lr, r2, r9 + 6628 @ 0 "" 2 + 6629 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6630 00c0 42FB19F2 smusdx r2, r2, r9 + 6631 @ 0 "" 2 + 6632 .thumb + 6633 .syntax unified + 6634 00c4 3240 ands r2, r2, r6 + 6635 00c6 42EA1E42 orr r2, r2, lr, lsr #16 + 6636 00ca 44F8042B str r2, [r4], #4 @ unaligned + 6637 00ce 5CF80C2B ldr r2, [ip], #12 @ unaligned + 6638 .syntax unified + 6639 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6640 00d2 22FB08FE smuad lr, r2, r8 + 6641 @ 0 "" 2 + 6642 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6643 00d6 42FB18F2 smusdx r2, r2, r8 + 6644 @ 0 "" 2 + 6645 .thumb + 6646 .syntax unified + 6647 00da 3240 ands r2, r2, r6 + 6648 00dc 42EA1E42 orr r2, r2, lr, lsr #16 + 6649 00e0 BAF1010A subs r10, r10, #1 + 6650 00e4 41F8042B str r2, [r1], #4 @ unaligned + 6651 00e8 A7D1 bne .L800 + 6652 00ea 119A ldr r2, [sp, #68] + 6653 00ec 009B ldr r3, [sp] + 6654 00ee 042A cmp r2, #4 + 6655 00f0 4FEA8303 lsl r3, r3, #2 + 6656 00f4 40F22581 bls .L812 + 6657 .L815: + 6658 00f8 DFF84CB2 ldr fp, .L816 + 6659 00fc 0E92 str r2, [sp, #56] + 6660 .L804: + ARM GAS /tmp/ccFqHvis.s page 116 + + + 6661 00fe 0E99 ldr r1, [sp, #56] + 6662 0100 0291 str r1, [sp, #8] + 6663 0102 0A46 mov r2, r1 + 6664 0104 9700 lsls r7, r2, #2 + 6665 0106 019A ldr r2, [sp, #4] + 6666 0108 8908 lsrs r1, r1, #2 + 6667 010a 8A42 cmp r2, r1 + 6668 010c 28BF it cs + 6669 010e 0A46 movcs r2, r1 + 6670 0110 0C92 str r2, [sp, #48] + 6671 0112 03EB4302 add r2, r3, r3, lsl #1 + 6672 0116 9200 lsls r2, r2, #2 + 6673 0118 0D92 str r2, [sp, #52] + 6674 011a 9A00 lsls r2, r3, #2 + 6675 011c DB00 lsls r3, r3, #3 + 6676 011e 0992 str r2, [sp, #36] + 6677 0120 0B93 str r3, [sp, #44] + 6678 0122 0F9A ldr r2, [sp, #60] + 6679 0124 109B ldr r3, [sp, #64] + 6680 0126 0893 str r3, [sp, #32] + 6681 0128 CDE90633 strd r3, r3, [sp, #24] + 6682 012c 8800 lsls r0, r1, #2 + 6683 012e 0592 str r2, [sp, #20] + 6684 0130 0023 movs r3, #0 + 6685 0132 02EBC102 add r2, r2, r1, lsl #3 + 6686 0136 0E91 str r1, [sp, #56] + 6687 0138 0A90 str r0, [sp, #40] + 6688 013a 0492 str r2, [sp, #16] + 6689 013c 0393 str r3, [sp, #12] + 6690 .L803: + 6691 013e 089B ldr r3, [sp, #32] + 6692 0140 059A ldr r2, [sp, #20] + 6693 0142 D3F800A0 ldr r10, [r3] @ unaligned + 6694 0146 079B ldr r3, [sp, #28] + 6695 0148 DDF80CE0 ldr lr, [sp, #12] + 6696 014c D3F80090 ldr r9, [r3] @ unaligned + 6697 0150 069B ldr r3, [sp, #24] + 6698 0152 CDF800E0 str lr, [sp] + 6699 0156 D3F80080 ldr r8, [r3] @ unaligned + 6700 015a 0A9B ldr r3, [sp, #40] + 6701 015c 1646 mov r6, r2 + 6702 015e 9818 adds r0, r3, r2 + 6703 0160 049A ldr r2, [sp, #16] + 6704 0162 1546 mov r5, r2 + 6705 0164 9918 adds r1, r3, r2 + 6706 .L802: + 6707 0166 3268 ldr r2, [r6] @ unaligned + 6708 0168 2C68 ldr r4, [r5] @ unaligned + 6709 .syntax unified + 6710 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6711 016a 92FA14F3 qadd16 r3, r2, r4 + 6712 @ 0 "" 2 + 6713 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6714 016e D2FA14F2 qsub16 r2, r2, r4 + 6715 @ 0 "" 2 + 6716 .thumb + 6717 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 117 + + + 6718 0172 0468 ldr r4, [r0] @ unaligned + 6719 0174 D1F800C0 ldr ip, [r1] @ unaligned + 6720 .syntax unified + 6721 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6722 0178 94FA1CF4 qadd16 r4, r4, ip + 6723 @ 0 "" 2 + 6724 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6725 017c 93FA24FC shadd16 ip, r3, r4 + 6726 @ 0 "" 2 + 6727 .thumb + 6728 .syntax unified + 6729 0180 4FF0000E mov lr, #0 + 6730 .syntax unified + 6731 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6732 0184 9CFA2EFC shadd16 ip, ip, lr + 6733 @ 0 "" 2 + 6734 .thumb + 6735 .syntax unified + 6736 0188 C6F800C0 str ip, [r6] @ unaligned + 6737 018c 3E44 add r6, r6, r7 + 6738 .syntax unified + 6739 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6740 018e D3FA24F3 shsub16 r3, r3, r4 + 6741 @ 0 "" 2 + 6742 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6743 0192 29FB03FC smuad ip, r9, r3 + 6744 @ 0 "" 2 + 6745 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6746 0196 49FB13F3 smusdx r3, r9, r3 + 6747 @ 0 "" 2 + 6748 .thumb + 6749 .syntax unified + 6750 019a 03EA0B03 and r3, r3, fp + 6751 019e 43EA1C43 orr r3, r3, ip, lsr #16 + 6752 01a2 D0F800C0 ldr ip, [r0] @ unaligned + 6753 01a6 0360 str r3, [r0] @ unaligned + 6754 01a8 0C68 ldr r4, [r1] @ unaligned + 6755 01aa 3844 add r0, r0, r7 + 6756 .syntax unified + 6757 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6758 01ac DCFA14F4 qsub16 r4, ip, r4 + 6759 @ 0 "" 2 + 6760 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6761 01b0 A2FA24F3 shasx r3, r2, r4 + 6762 @ 0 "" 2 + 6763 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6764 01b4 E2FA24F2 shsax r2, r2, r4 + 6765 @ 0 "" 2 + 6766 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6767 01b8 2AFB02F4 smuad r4, r10, r2 + 6768 @ 0 "" 2 + 6769 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6770 01bc 4AFB12F2 smusdx r2, r10, r2 + 6771 @ 0 "" 2 + 6772 .thumb + 6773 .syntax unified + 6774 01c0 02EA0B02 and r2, r2, fp + ARM GAS /tmp/ccFqHvis.s page 118 + + + 6775 01c4 42EA1442 orr r2, r2, r4, lsr #16 + 6776 01c8 2A60 str r2, [r5] @ unaligned + 6777 01ca 3D44 add r5, r5, r7 + 6778 .syntax unified + 6779 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6780 01cc 28FB03F2 smuad r2, r8, r3 + 6781 @ 0 "" 2 + 6782 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6783 01d0 48FB13F3 smusdx r3, r8, r3 + 6784 @ 0 "" 2 + 6785 .thumb + 6786 .syntax unified + 6787 01d4 03EA0B03 and r3, r3, fp + 6788 01d8 43EA1243 orr r3, r3, r2, lsr #16 + 6789 01dc 0B60 str r3, [r1] @ unaligned + 6790 01de 009A ldr r2, [sp] + 6791 01e0 029B ldr r3, [sp, #8] + 6792 01e2 1A44 add r2, r2, r3 + 6793 01e4 019B ldr r3, [sp, #4] + 6794 01e6 0092 str r2, [sp] + 6795 01e8 9342 cmp r3, r2 + 6796 01ea 3944 add r1, r1, r7 + 6797 01ec BBD8 bhi .L802 + 6798 01ee DDE90821 ldrd r2, r1, [sp, #32] + 6799 01f2 0A44 add r2, r2, r1 + 6800 01f4 0892 str r2, [sp, #32] + 6801 01f6 0B99 ldr r1, [sp, #44] + 6802 01f8 079A ldr r2, [sp, #28] + 6803 01fa 039B ldr r3, [sp, #12] + 6804 01fc 0A44 add r2, r2, r1 + 6805 01fe 0792 str r2, [sp, #28] + 6806 0200 0D99 ldr r1, [sp, #52] + 6807 0202 069A ldr r2, [sp, #24] + 6808 0204 0A44 add r2, r2, r1 + 6809 0206 0692 str r2, [sp, #24] + 6810 0208 059A ldr r2, [sp, #20] + 6811 020a 0432 adds r2, r2, #4 + 6812 020c 0592 str r2, [sp, #20] + 6813 020e 049A ldr r2, [sp, #16] + 6814 0210 0432 adds r2, r2, #4 + 6815 0212 0492 str r2, [sp, #16] + 6816 0214 0C9A ldr r2, [sp, #48] + 6817 0216 0133 adds r3, r3, #1 + 6818 0218 9342 cmp r3, r2 + 6819 021a 0393 str r3, [sp, #12] + 6820 021c 8FD3 bcc .L803 + 6821 021e 0E9A ldr r2, [sp, #56] + 6822 0220 099B ldr r3, [sp, #36] + 6823 0222 042A cmp r2, #4 + 6824 0224 3FF66BAF bhi .L804 + 6825 0228 119E ldr r6, [sp, #68] + 6826 022a 0F9B ldr r3, [sp, #60] + 6827 .L805: + 6828 022c 1A68 ldr r2, [r3] @ unaligned + 6829 022e 5968 ldr r1, [r3, #4] @ unaligned + 6830 0230 9F68 ldr r7, [r3, #8] @ unaligned + 6831 0232 DC68 ldr r4, [r3, #12] @ unaligned + ARM GAS /tmp/ccFqHvis.s page 119 + + + 6832 .syntax unified + 6833 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6834 0234 92FA17F0 qadd16 r0, r2, r7 + 6835 @ 0 "" 2 + 6836 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6837 0238 91FA14F5 qadd16 r5, r1, r4 + 6838 @ 0 "" 2 + 6839 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6840 023c 90FA25F5 shadd16 r5, r0, r5 + 6841 @ 0 "" 2 + 6842 .thumb + 6843 .syntax unified + 6844 0240 1D60 str r5, [r3] @ unaligned + 6845 .syntax unified + 6846 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6847 0242 91FA14F5 qadd16 r5, r1, r4 + 6848 @ 0 "" 2 + 6849 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6850 0246 D0FA25F0 shsub16 r0, r0, r5 + 6851 @ 0 "" 2 + 6852 .thumb + 6853 .syntax unified + 6854 024a 5860 str r0, [r3, #4] @ unaligned + 6855 .syntax unified + 6856 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6857 024c D2FA17F2 qsub16 r2, r2, r7 + 6858 @ 0 "" 2 + 6859 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6860 0250 D1FA14F1 qsub16 r1, r1, r4 + 6861 @ 0 "" 2 + 6862 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6863 0254 E2FA21F0 shsax r0, r2, r1 + 6864 @ 0 "" 2 + 6865 .thumb + 6866 .syntax unified + 6867 0258 9860 str r0, [r3, #8] @ unaligned + 6868 .syntax unified + 6869 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6870 025a A2FA21F2 shasx r2, r2, r1 + 6871 @ 0 "" 2 + 6872 .thumb + 6873 .syntax unified + 6874 025e 013E subs r6, r6, #1 + 6875 0260 DA60 str r2, [r3, #12] @ unaligned + 6876 0262 03F11003 add r3, r3, #16 + 6877 0266 E1D1 bne .L805 + 6878 0268 13B0 add sp, sp, #76 + 6879 @ sp needed + 6880 026a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 6881 .L814: + 6882 026e 0025 movs r5, #0 + 6883 0270 354E ldr r6, .L816 + 6884 0272 DDF84490 ldr r9, [sp, #68] + 6885 0276 109F ldr r7, [sp, #64] + 6886 0278 9C46 mov ip, r3 + 6887 027a 9046 mov r8, r2 + 6888 027c 2B46 mov r3, r5 + ARM GAS /tmp/ccFqHvis.s page 120 + + + 6889 .L798: + 6890 027e D8F800B0 ldr fp, [r8] @ unaligned + 6891 .syntax unified + 6892 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6893 0282 9BFA23FB shadd16 fp, fp, r3 + 6894 @ 0 "" 2 + 6895 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6896 0286 9BFA23FB shadd16 fp, fp, r3 + 6897 @ 0 "" 2 + 6898 .thumb + 6899 .syntax unified + 6900 028a 2268 ldr r2, [r4] @ unaligned + 6901 .syntax unified + 6902 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6903 028c 92FA23F2 shadd16 r2, r2, r3 + 6904 @ 0 "" 2 + 6905 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6906 0290 92FA23F2 shadd16 r2, r2, r3 + 6907 @ 0 "" 2 + 6908 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6909 0294 9BFA12FE qadd16 lr, fp, r2 + 6910 @ 0 "" 2 + 6911 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6912 0298 DBFA12FB qsub16 fp, fp, r2 + 6913 @ 0 "" 2 + 6914 .thumb + 6915 .syntax unified + 6916 029c 0268 ldr r2, [r0] @ unaligned + 6917 .syntax unified + 6918 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6919 029e 92FA23F2 shadd16 r2, r2, r3 + 6920 @ 0 "" 2 + 6921 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6922 02a2 92FA23F2 shadd16 r2, r2, r3 + 6923 @ 0 "" 2 + 6924 .thumb + 6925 .syntax unified + 6926 02a6 D1F800A0 ldr r10, [r1] @ unaligned + 6927 .syntax unified + 6928 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6929 02aa 9AFA23FA shadd16 r10, r10, r3 + 6930 @ 0 "" 2 + 6931 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6932 02ae 9AFA23FA shadd16 r10, r10, r3 + 6933 @ 0 "" 2 + 6934 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6935 02b2 92FA1AF2 qadd16 r2, r2, r10 + 6936 @ 0 "" 2 + 6937 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6938 02b6 9EFA22FA shadd16 r10, lr, r2 + 6939 @ 0 "" 2 + 6940 .thumb + 6941 .syntax unified + 6942 02ba 48F804AB str r10, [r8], #4 @ unaligned + 6943 .syntax unified + 6944 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6945 02be DEFA12FE qsub16 lr, lr, r2 + ARM GAS /tmp/ccFqHvis.s page 121 + + + 6946 @ 0 "" 2 + 6947 .thumb + 6948 .syntax unified + 6949 02c2 57F83520 ldr r2, [r7, r5, lsl #3] @ unaligned + 6950 .syntax unified + 6951 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6952 02c6 22FB0EFA smuad r10, r2, lr + 6953 @ 0 "" 2 + 6954 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6955 02ca 42FB1EFE smusdx lr, r2, lr + 6956 @ 0 "" 2 + 6957 .thumb + 6958 .syntax unified + 6959 02ce 0268 ldr r2, [r0] @ unaligned + 6960 .syntax unified + 6961 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6962 02d0 92FA23F2 shadd16 r2, r2, r3 + 6963 @ 0 "" 2 + 6964 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6965 02d4 92FA23F2 shadd16 r2, r2, r3 + 6966 @ 0 "" 2 + 6967 .thumb + 6968 .syntax unified + 6969 02d8 0EEA060E and lr, lr, r6 + 6970 02dc 4EEA1A4E orr lr, lr, r10, lsr #16 + 6971 02e0 40F804EB str lr, [r0], #4 @ unaligned + 6972 02e4 D1F800E0 ldr lr, [r1] @ unaligned + 6973 .syntax unified + 6974 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6975 02e8 9EFA23FE shadd16 lr, lr, r3 + 6976 @ 0 "" 2 + 6977 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6978 02ec 9EFA23FE shadd16 lr, lr, r3 + 6979 @ 0 "" 2 + 6980 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6981 02f0 D2FA1EF2 qsub16 r2, r2, lr + 6982 @ 0 "" 2 + 6983 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6984 02f4 ABFA12FA qasx r10, fp, r2 + 6985 @ 0 "" 2 + 6986 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6987 02f8 EBFA12FB qsax fp, fp, r2 + 6988 @ 0 "" 2 + 6989 .thumb + 6990 .syntax unified + 6991 02fc 57F82520 ldr r2, [r7, r5, lsl #2] @ unaligned + 6992 .syntax unified + 6993 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6994 0300 22FB0BFE smuad lr, r2, fp + 6995 @ 0 "" 2 + 6996 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 6997 0304 42FB1BF2 smusdx r2, r2, fp + 6998 @ 0 "" 2 + 6999 .thumb + 7000 .syntax unified + 7001 0308 3240 ands r2, r2, r6 + 7002 030a 42EA1E42 orr r2, r2, lr, lsr #16 + ARM GAS /tmp/ccFqHvis.s page 122 + + + 7003 030e 44F8042B str r2, [r4], #4 @ unaligned + 7004 0312 05EB4502 add r2, r5, r5, lsl #1 + 7005 0316 57F82220 ldr r2, [r7, r2, lsl #2] @ unaligned + 7006 .syntax unified + 7007 @ 1977 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7008 031a 22FB0AFE smuad lr, r2, r10 + 7009 @ 0 "" 2 + 7010 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7011 031e 42FB1AF2 smusdx r2, r2, r10 + 7012 @ 0 "" 2 + 7013 .thumb + 7014 .syntax unified + 7015 0322 3240 ands r2, r2, r6 + 7016 0324 42EA1E42 orr r2, r2, lr, lsr #16 + 7017 0328 B9F10109 subs r9, r9, #1 + 7018 032c 41F8042B str r2, [r1], #4 @ unaligned + 7019 0330 6544 add r5, r5, ip + 7020 0332 A4D1 bne .L798 + 7021 0334 119A ldr r2, [sp, #68] + 7022 0336 009B ldr r3, [sp] + 7023 0338 042A cmp r2, #4 + 7024 033a 4FEA8303 lsl r3, r3, #2 + 7025 033e 3FF6DBAE bhi .L815 + 7026 .L812: + 7027 0342 0F9B ldr r3, [sp, #60] + 7028 0344 1646 mov r6, r2 + 7029 0346 71E7 b .L805 + 7030 .L817: + 7031 .align 2 + 7032 .L816: + 7033 0348 0000FFFF .word -65536 + 7035 .section .text.arm_radix4_butterfly_inverse_q15,"ax",%progbits + 7036 .align 1 + 7037 .p2align 2,,3 + 7038 .global arm_radix4_butterfly_inverse_q15 + 7039 .syntax unified + 7040 .thumb + 7041 .thumb_func + 7042 .fpu fpv4-sp-d16 + 7044 arm_radix4_butterfly_inverse_q15: + 7045 @ args = 0, pretend = 0, frame = 72 + 7046 @ frame_needed = 0, uses_anonymous_args = 0 + 7047 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 7048 0004 93B0 sub sp, sp, #76 + 7049 0006 012B cmp r3, #1 + 7050 0008 0191 str r1, [sp, #4] + 7051 000a 1092 str r2, [sp, #64] + 7052 000c 0A46 mov r2, r1 + 7053 000e 4FEA9101 lsr r1, r1, #2 + 7054 0012 1191 str r1, [sp, #68] + 7055 0014 22F00301 bic r1, r2, #3 + 7056 0018 00EB4104 add r4, r0, r1, lsl #1 + 7057 001c 0F90 str r0, [sp, #60] + 7058 001e 0246 mov r2, r0 + 7059 0020 0093 str r3, [sp] + 7060 0022 0844 add r0, r0, r1 + 7061 0024 2144 add r1, r1, r4 + ARM GAS /tmp/ccFqHvis.s page 123 + + + 7062 0026 40F02281 bne .L836 + 7063 002a 109F ldr r7, [sp, #64] + 7064 002c C64E ldr r6, .L838 + 7065 002e 0F9D ldr r5, [sp, #60] + 7066 0030 DDF844A0 ldr r10, [sp, #68] + 7067 0034 BB46 mov fp, r7 + 7068 0036 BC46 mov ip, r7 + 7069 0038 0023 movs r3, #0 + 7070 .L822: + 7071 003a D5F80090 ldr r9, [r5] @ unaligned + 7072 .syntax unified + 7073 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7074 003e 99FA23F9 shadd16 r9, r9, r3 + 7075 @ 0 "" 2 + 7076 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7077 0042 99FA23F9 shadd16 r9, r9, r3 + 7078 @ 0 "" 2 + 7079 .thumb + 7080 .syntax unified + 7081 0046 2268 ldr r2, [r4] @ unaligned + 7082 .syntax unified + 7083 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7084 0048 92FA23F2 shadd16 r2, r2, r3 + 7085 @ 0 "" 2 + 7086 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7087 004c 92FA23F2 shadd16 r2, r2, r3 + 7088 @ 0 "" 2 + 7089 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7090 0050 99FA12FE qadd16 lr, r9, r2 + 7091 @ 0 "" 2 + 7092 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7093 0054 D9FA12F9 qsub16 r9, r9, r2 + 7094 @ 0 "" 2 + 7095 .thumb + 7096 .syntax unified + 7097 0058 0268 ldr r2, [r0] @ unaligned + 7098 .syntax unified + 7099 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7100 005a 92FA23F2 shadd16 r2, r2, r3 + 7101 @ 0 "" 2 + 7102 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7103 005e 92FA23F2 shadd16 r2, r2, r3 + 7104 @ 0 "" 2 + 7105 .thumb + 7106 .syntax unified + 7107 0062 D1F80080 ldr r8, [r1] @ unaligned + 7108 .syntax unified + 7109 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7110 0066 98FA23F8 shadd16 r8, r8, r3 + 7111 @ 0 "" 2 + 7112 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7113 006a 98FA23F8 shadd16 r8, r8, r3 + 7114 @ 0 "" 2 + 7115 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7116 006e 92FA18F2 qadd16 r2, r2, r8 + 7117 @ 0 "" 2 + 7118 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + ARM GAS /tmp/ccFqHvis.s page 124 + + + 7119 0072 9EFA22F8 shadd16 r8, lr, r2 + 7120 @ 0 "" 2 + 7121 .thumb + 7122 .syntax unified + 7123 0076 45F8048B str r8, [r5], #4 @ unaligned + 7124 .syntax unified + 7125 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7126 007a DEFA12FE qsub16 lr, lr, r2 + 7127 @ 0 "" 2 + 7128 .thumb + 7129 .syntax unified + 7130 007e 5BF8082B ldr r2, [fp], #8 @ unaligned + 7131 .syntax unified + 7132 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7133 0082 42FB0EF8 smusd r8, r2, lr + 7134 @ 0 "" 2 + 7135 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7136 0086 22FB1EFE smuadx lr, r2, lr + 7137 @ 0 "" 2 + 7138 .thumb + 7139 .syntax unified + 7140 008a 0268 ldr r2, [r0] @ unaligned + 7141 .syntax unified + 7142 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7143 008c 92FA23F2 shadd16 r2, r2, r3 + 7144 @ 0 "" 2 + 7145 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7146 0090 92FA23F2 shadd16 r2, r2, r3 + 7147 @ 0 "" 2 + 7148 .thumb + 7149 .syntax unified + 7150 0094 0EEA060E and lr, lr, r6 + 7151 0098 4EEA184E orr lr, lr, r8, lsr #16 + 7152 009c 40F804EB str lr, [r0], #4 @ unaligned + 7153 00a0 D1F800E0 ldr lr, [r1] @ unaligned + 7154 .syntax unified + 7155 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7156 00a4 9EFA23FE shadd16 lr, lr, r3 + 7157 @ 0 "" 2 + 7158 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7159 00a8 9EFA23FE shadd16 lr, lr, r3 + 7160 @ 0 "" 2 + 7161 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7162 00ac D2FA1EF2 qsub16 r2, r2, lr + 7163 @ 0 "" 2 + 7164 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7165 00b0 E9FA12F8 qsax r8, r9, r2 + 7166 @ 0 "" 2 + 7167 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7168 00b4 A9FA12F9 qasx r9, r9, r2 + 7169 @ 0 "" 2 + 7170 .thumb + 7171 .syntax unified + 7172 00b8 57F8042B ldr r2, [r7], #4 @ unaligned + 7173 .syntax unified + 7174 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7175 00bc 42FB09FE smusd lr, r2, r9 + ARM GAS /tmp/ccFqHvis.s page 125 + + + 7176 @ 0 "" 2 + 7177 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7178 00c0 22FB19F2 smuadx r2, r2, r9 + 7179 @ 0 "" 2 + 7180 .thumb + 7181 .syntax unified + 7182 00c4 3240 ands r2, r2, r6 + 7183 00c6 42EA1E42 orr r2, r2, lr, lsr #16 + 7184 00ca 44F8042B str r2, [r4], #4 @ unaligned + 7185 00ce 5CF80C2B ldr r2, [ip], #12 @ unaligned + 7186 .syntax unified + 7187 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7188 00d2 42FB08FE smusd lr, r2, r8 + 7189 @ 0 "" 2 + 7190 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7191 00d6 22FB18F2 smuadx r2, r2, r8 + 7192 @ 0 "" 2 + 7193 .thumb + 7194 .syntax unified + 7195 00da 3240 ands r2, r2, r6 + 7196 00dc 42EA1E42 orr r2, r2, lr, lsr #16 + 7197 00e0 BAF1010A subs r10, r10, #1 + 7198 00e4 41F8042B str r2, [r1], #4 @ unaligned + 7199 00e8 A7D1 bne .L822 + 7200 00ea 119A ldr r2, [sp, #68] + 7201 00ec 009B ldr r3, [sp] + 7202 00ee 042A cmp r2, #4 + 7203 00f0 4FEA8303 lsl r3, r3, #2 + 7204 00f4 40F22581 bls .L834 + 7205 .L837: + 7206 00f8 DFF84CB2 ldr fp, .L838 + 7207 00fc 0E92 str r2, [sp, #56] + 7208 .L826: + 7209 00fe 0E99 ldr r1, [sp, #56] + 7210 0100 0291 str r1, [sp, #8] + 7211 0102 0A46 mov r2, r1 + 7212 0104 9700 lsls r7, r2, #2 + 7213 0106 019A ldr r2, [sp, #4] + 7214 0108 8908 lsrs r1, r1, #2 + 7215 010a 8A42 cmp r2, r1 + 7216 010c 28BF it cs + 7217 010e 0A46 movcs r2, r1 + 7218 0110 0C92 str r2, [sp, #48] + 7219 0112 03EB4302 add r2, r3, r3, lsl #1 + 7220 0116 9200 lsls r2, r2, #2 + 7221 0118 0D92 str r2, [sp, #52] + 7222 011a 9A00 lsls r2, r3, #2 + 7223 011c DB00 lsls r3, r3, #3 + 7224 011e 0992 str r2, [sp, #36] + 7225 0120 0B93 str r3, [sp, #44] + 7226 0122 0F9A ldr r2, [sp, #60] + 7227 0124 109B ldr r3, [sp, #64] + 7228 0126 0893 str r3, [sp, #32] + 7229 0128 CDE90633 strd r3, r3, [sp, #24] + 7230 012c 8800 lsls r0, r1, #2 + 7231 012e 0592 str r2, [sp, #20] + 7232 0130 0023 movs r3, #0 + ARM GAS /tmp/ccFqHvis.s page 126 + + + 7233 0132 02EBC102 add r2, r2, r1, lsl #3 + 7234 0136 0E91 str r1, [sp, #56] + 7235 0138 0A90 str r0, [sp, #40] + 7236 013a 0492 str r2, [sp, #16] + 7237 013c 0393 str r3, [sp, #12] + 7238 .L825: + 7239 013e 089B ldr r3, [sp, #32] + 7240 0140 059A ldr r2, [sp, #20] + 7241 0142 D3F800A0 ldr r10, [r3] @ unaligned + 7242 0146 079B ldr r3, [sp, #28] + 7243 0148 DDF80CE0 ldr lr, [sp, #12] + 7244 014c D3F80090 ldr r9, [r3] @ unaligned + 7245 0150 069B ldr r3, [sp, #24] + 7246 0152 CDF800E0 str lr, [sp] + 7247 0156 D3F80080 ldr r8, [r3] @ unaligned + 7248 015a 0A9B ldr r3, [sp, #40] + 7249 015c 1646 mov r6, r2 + 7250 015e 9818 adds r0, r3, r2 + 7251 0160 049A ldr r2, [sp, #16] + 7252 0162 1546 mov r5, r2 + 7253 0164 9918 adds r1, r3, r2 + 7254 .L824: + 7255 0166 3268 ldr r2, [r6] @ unaligned + 7256 0168 2C68 ldr r4, [r5] @ unaligned + 7257 .syntax unified + 7258 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7259 016a 92FA14F3 qadd16 r3, r2, r4 + 7260 @ 0 "" 2 + 7261 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7262 016e D2FA14F2 qsub16 r2, r2, r4 + 7263 @ 0 "" 2 + 7264 .thumb + 7265 .syntax unified + 7266 0172 0468 ldr r4, [r0] @ unaligned + 7267 0174 D1F800C0 ldr ip, [r1] @ unaligned + 7268 .syntax unified + 7269 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7270 0178 94FA1CF4 qadd16 r4, r4, ip + 7271 @ 0 "" 2 + 7272 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7273 017c 93FA24FC shadd16 ip, r3, r4 + 7274 @ 0 "" 2 + 7275 .thumb + 7276 .syntax unified + 7277 0180 4FF0000E mov lr, #0 + 7278 .syntax unified + 7279 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7280 0184 9CFA2EFC shadd16 ip, ip, lr + 7281 @ 0 "" 2 + 7282 .thumb + 7283 .syntax unified + 7284 0188 C6F800C0 str ip, [r6] @ unaligned + 7285 018c 3E44 add r6, r6, r7 + 7286 .syntax unified + 7287 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7288 018e D3FA24F3 shsub16 r3, r3, r4 + 7289 @ 0 "" 2 + ARM GAS /tmp/ccFqHvis.s page 127 + + + 7290 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7291 0192 49FB03FC smusd ip, r9, r3 + 7292 @ 0 "" 2 + 7293 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7294 0196 29FB13F3 smuadx r3, r9, r3 + 7295 @ 0 "" 2 + 7296 .thumb + 7297 .syntax unified + 7298 019a 03EA0B03 and r3, r3, fp + 7299 019e 43EA1C43 orr r3, r3, ip, lsr #16 + 7300 01a2 D0F800C0 ldr ip, [r0] @ unaligned + 7301 01a6 0360 str r3, [r0] @ unaligned + 7302 01a8 0C68 ldr r4, [r1] @ unaligned + 7303 01aa 3844 add r0, r0, r7 + 7304 .syntax unified + 7305 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7306 01ac DCFA14F4 qsub16 r4, ip, r4 + 7307 @ 0 "" 2 + 7308 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7309 01b0 E2FA24F3 shsax r3, r2, r4 + 7310 @ 0 "" 2 + 7311 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7312 01b4 A2FA24F2 shasx r2, r2, r4 + 7313 @ 0 "" 2 + 7314 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7315 01b8 4AFB02F4 smusd r4, r10, r2 + 7316 @ 0 "" 2 + 7317 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7318 01bc 2AFB12F2 smuadx r2, r10, r2 + 7319 @ 0 "" 2 + 7320 .thumb + 7321 .syntax unified + 7322 01c0 02EA0B02 and r2, r2, fp + 7323 01c4 42EA1442 orr r2, r2, r4, lsr #16 + 7324 01c8 2A60 str r2, [r5] @ unaligned + 7325 01ca 3D44 add r5, r5, r7 + 7326 .syntax unified + 7327 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7328 01cc 48FB03F2 smusd r2, r8, r3 + 7329 @ 0 "" 2 + 7330 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7331 01d0 28FB13F3 smuadx r3, r8, r3 + 7332 @ 0 "" 2 + 7333 .thumb + 7334 .syntax unified + 7335 01d4 03EA0B03 and r3, r3, fp + 7336 01d8 43EA1243 orr r3, r3, r2, lsr #16 + 7337 01dc 0B60 str r3, [r1] @ unaligned + 7338 01de 009A ldr r2, [sp] + 7339 01e0 029B ldr r3, [sp, #8] + 7340 01e2 1A44 add r2, r2, r3 + 7341 01e4 019B ldr r3, [sp, #4] + 7342 01e6 0092 str r2, [sp] + 7343 01e8 9342 cmp r3, r2 + 7344 01ea 3944 add r1, r1, r7 + 7345 01ec BBD8 bhi .L824 + 7346 01ee DDE90821 ldrd r2, r1, [sp, #32] + ARM GAS /tmp/ccFqHvis.s page 128 + + + 7347 01f2 0A44 add r2, r2, r1 + 7348 01f4 0892 str r2, [sp, #32] + 7349 01f6 0B99 ldr r1, [sp, #44] + 7350 01f8 079A ldr r2, [sp, #28] + 7351 01fa 039B ldr r3, [sp, #12] + 7352 01fc 0A44 add r2, r2, r1 + 7353 01fe 0792 str r2, [sp, #28] + 7354 0200 0D99 ldr r1, [sp, #52] + 7355 0202 069A ldr r2, [sp, #24] + 7356 0204 0A44 add r2, r2, r1 + 7357 0206 0692 str r2, [sp, #24] + 7358 0208 059A ldr r2, [sp, #20] + 7359 020a 0432 adds r2, r2, #4 + 7360 020c 0592 str r2, [sp, #20] + 7361 020e 049A ldr r2, [sp, #16] + 7362 0210 0432 adds r2, r2, #4 + 7363 0212 0492 str r2, [sp, #16] + 7364 0214 0C9A ldr r2, [sp, #48] + 7365 0216 0133 adds r3, r3, #1 + 7366 0218 9342 cmp r3, r2 + 7367 021a 0393 str r3, [sp, #12] + 7368 021c 8FD3 bcc .L825 + 7369 021e 0E9A ldr r2, [sp, #56] + 7370 0220 099B ldr r3, [sp, #36] + 7371 0222 042A cmp r2, #4 + 7372 0224 3FF66BAF bhi .L826 + 7373 0228 119E ldr r6, [sp, #68] + 7374 022a 0F9B ldr r3, [sp, #60] + 7375 .L827: + 7376 022c 1A68 ldr r2, [r3] @ unaligned + 7377 022e 5968 ldr r1, [r3, #4] @ unaligned + 7378 0230 9F68 ldr r7, [r3, #8] @ unaligned + 7379 0232 DC68 ldr r4, [r3, #12] @ unaligned + 7380 .syntax unified + 7381 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7382 0234 92FA17F0 qadd16 r0, r2, r7 + 7383 @ 0 "" 2 + 7384 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7385 0238 91FA14F5 qadd16 r5, r1, r4 + 7386 @ 0 "" 2 + 7387 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7388 023c 90FA25F5 shadd16 r5, r0, r5 + 7389 @ 0 "" 2 + 7390 .thumb + 7391 .syntax unified + 7392 0240 1D60 str r5, [r3] @ unaligned + 7393 .syntax unified + 7394 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7395 0242 91FA14F5 qadd16 r5, r1, r4 + 7396 @ 0 "" 2 + 7397 @ 1787 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7398 0246 D0FA25F0 shsub16 r0, r0, r5 + 7399 @ 0 "" 2 + 7400 .thumb + 7401 .syntax unified + 7402 024a 5860 str r0, [r3, #4] @ unaligned + 7403 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 129 + + + 7404 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7405 024c D2FA17F2 qsub16 r2, r2, r7 + 7406 @ 0 "" 2 + 7407 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7408 0250 D1FA14F1 qsub16 r1, r1, r4 + 7409 @ 0 "" 2 + 7410 @ 1835 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7411 0254 A2FA21F0 shasx r0, r2, r1 + 7412 @ 0 "" 2 + 7413 .thumb + 7414 .syntax unified + 7415 0258 9860 str r0, [r3, #8] @ unaligned + 7416 .syntax unified + 7417 @ 1883 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7418 025a E2FA21F2 shsax r2, r2, r1 + 7419 @ 0 "" 2 + 7420 .thumb + 7421 .syntax unified + 7422 025e 013E subs r6, r6, #1 + 7423 0260 DA60 str r2, [r3, #12] @ unaligned + 7424 0262 03F11003 add r3, r3, #16 + 7425 0266 E1D1 bne .L827 + 7426 0268 13B0 add sp, sp, #76 + 7427 @ sp needed + 7428 026a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 7429 .L836: + 7430 026e 0025 movs r5, #0 + 7431 0270 354E ldr r6, .L838 + 7432 0272 DDF84490 ldr r9, [sp, #68] + 7433 0276 109F ldr r7, [sp, #64] + 7434 0278 9C46 mov ip, r3 + 7435 027a 9046 mov r8, r2 + 7436 027c 2B46 mov r3, r5 + 7437 .L820: + 7438 027e D8F800B0 ldr fp, [r8] @ unaligned + 7439 .syntax unified + 7440 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7441 0282 9BFA23FB shadd16 fp, fp, r3 + 7442 @ 0 "" 2 + 7443 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7444 0286 9BFA23FB shadd16 fp, fp, r3 + 7445 @ 0 "" 2 + 7446 .thumb + 7447 .syntax unified + 7448 028a 2268 ldr r2, [r4] @ unaligned + 7449 .syntax unified + 7450 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7451 028c 92FA23F2 shadd16 r2, r2, r3 + 7452 @ 0 "" 2 + 7453 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7454 0290 92FA23F2 shadd16 r2, r2, r3 + 7455 @ 0 "" 2 + 7456 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7457 0294 9BFA12FE qadd16 lr, fp, r2 + 7458 @ 0 "" 2 + 7459 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7460 0298 DBFA12FB qsub16 fp, fp, r2 + ARM GAS /tmp/ccFqHvis.s page 130 + + + 7461 @ 0 "" 2 + 7462 .thumb + 7463 .syntax unified + 7464 029c 0268 ldr r2, [r0] @ unaligned + 7465 .syntax unified + 7466 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7467 029e 92FA23F2 shadd16 r2, r2, r3 + 7468 @ 0 "" 2 + 7469 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7470 02a2 92FA23F2 shadd16 r2, r2, r3 + 7471 @ 0 "" 2 + 7472 .thumb + 7473 .syntax unified + 7474 02a6 D1F800A0 ldr r10, [r1] @ unaligned + 7475 .syntax unified + 7476 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7477 02aa 9AFA23FA shadd16 r10, r10, r3 + 7478 @ 0 "" 2 + 7479 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7480 02ae 9AFA23FA shadd16 r10, r10, r3 + 7481 @ 0 "" 2 + 7482 @ 1731 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7483 02b2 92FA1AF2 qadd16 r2, r2, r10 + 7484 @ 0 "" 2 + 7485 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7486 02b6 9EFA22FA shadd16 r10, lr, r2 + 7487 @ 0 "" 2 + 7488 .thumb + 7489 .syntax unified + 7490 02ba 48F804AB str r10, [r8], #4 @ unaligned + 7491 .syntax unified + 7492 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7493 02be DEFA12FE qsub16 lr, lr, r2 + 7494 @ 0 "" 2 + 7495 .thumb + 7496 .syntax unified + 7497 02c2 57F83520 ldr r2, [r7, r5, lsl #3] @ unaligned + 7498 .syntax unified + 7499 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7500 02c6 42FB0EFA smusd r10, r2, lr + 7501 @ 0 "" 2 + 7502 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7503 02ca 22FB1EFE smuadx lr, r2, lr + 7504 @ 0 "" 2 + 7505 .thumb + 7506 .syntax unified + 7507 02ce 0268 ldr r2, [r0] @ unaligned + 7508 .syntax unified + 7509 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7510 02d0 92FA23F2 shadd16 r2, r2, r3 + 7511 @ 0 "" 2 + 7512 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7513 02d4 92FA23F2 shadd16 r2, r2, r3 + 7514 @ 0 "" 2 + 7515 .thumb + 7516 .syntax unified + 7517 02d8 0EEA060E and lr, lr, r6 + ARM GAS /tmp/ccFqHvis.s page 131 + + + 7518 02dc 4EEA1A4E orr lr, lr, r10, lsr #16 + 7519 02e0 40F804EB str lr, [r0], #4 @ unaligned + 7520 02e4 D1F800E0 ldr lr, [r1] @ unaligned + 7521 .syntax unified + 7522 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7523 02e8 9EFA23FE shadd16 lr, lr, r3 + 7524 @ 0 "" 2 + 7525 @ 1739 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7526 02ec 9EFA23FE shadd16 lr, lr, r3 + 7527 @ 0 "" 2 + 7528 @ 1779 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7529 02f0 D2FA1EF2 qsub16 r2, r2, lr + 7530 @ 0 "" 2 + 7531 @ 1875 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7532 02f4 EBFA12FA qsax r10, fp, r2 + 7533 @ 0 "" 2 + 7534 @ 1827 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7535 02f8 ABFA12FB qasx fp, fp, r2 + 7536 @ 0 "" 2 + 7537 .thumb + 7538 .syntax unified + 7539 02fc 57F82520 ldr r2, [r7, r5, lsl #2] @ unaligned + 7540 .syntax unified + 7541 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7542 0300 42FB0BFE smusd lr, r2, fp + 7543 @ 0 "" 2 + 7544 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7545 0304 22FB1BF2 smuadx r2, r2, fp + 7546 @ 0 "" 2 + 7547 .thumb + 7548 .syntax unified + 7549 0308 3240 ands r2, r2, r6 + 7550 030a 42EA1E42 orr r2, r2, lr, lsr #16 + 7551 030e 44F8042B str r2, [r4], #4 @ unaligned + 7552 0312 05EB4502 add r2, r5, r5, lsl #1 + 7553 0316 57F82220 ldr r2, [r7, r2, lsl #2] @ unaligned + 7554 .syntax unified + 7555 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7556 031a 42FB0AFE smusd lr, r2, r10 + 7557 @ 0 "" 2 + 7558 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7559 031e 22FB1AF2 smuadx r2, r2, r10 + 7560 @ 0 "" 2 + 7561 .thumb + 7562 .syntax unified + 7563 0322 3240 ands r2, r2, r6 + 7564 0324 42EA1E42 orr r2, r2, lr, lsr #16 + 7565 0328 B9F10109 subs r9, r9, #1 + 7566 032c 41F8042B str r2, [r1], #4 @ unaligned + 7567 0330 6544 add r5, r5, ip + 7568 0332 A4D1 bne .L820 + 7569 0334 119A ldr r2, [sp, #68] + 7570 0336 009B ldr r3, [sp] + 7571 0338 042A cmp r2, #4 + 7572 033a 4FEA8303 lsl r3, r3, #2 + 7573 033e 3FF6DBAE bhi .L837 + 7574 .L834: + ARM GAS /tmp/ccFqHvis.s page 132 + + + 7575 0342 0F9B ldr r3, [sp, #60] + 7576 0344 1646 mov r6, r2 + 7577 0346 71E7 b .L827 + 7578 .L839: + 7579 .align 2 + 7580 .L838: + 7581 0348 0000FFFF .word -65536 + 7583 .section .text.arm_cfft_radix4_q15,"ax",%progbits + 7584 .align 1 + 7585 .p2align 2,,3 + 7586 .global arm_cfft_radix4_q15 + 7587 .syntax unified + 7588 .thumb + 7589 .thumb_func + 7590 .fpu fpv4-sp-d16 + 7592 arm_cfft_radix4_q15: + 7593 @ args = 0, pretend = 0, frame = 8 + 7594 @ frame_needed = 0, uses_anonymous_args = 0 + 7595 0000 10B5 push {r4, lr} + 7596 0002 8378 ldrb r3, [r0, #2] @ zero_extendqisi2 + 7597 0004 0446 mov r4, r0 + 7598 0006 82B0 sub sp, sp, #8 + 7599 0008 0846 mov r0, r1 + 7600 000a 012B cmp r3, #1 + 7601 000c 6268 ldr r2, [r4, #4] + 7602 000e A389 ldrh r3, [r4, #12] + 7603 0010 2188 ldrh r1, [r4] + 7604 0012 0190 str r0, [sp, #4] + 7605 0014 07D0 beq .L845 + 7606 0016 FFF7FEFF bl arm_radix4_butterfly_q15 + 7607 001a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 7608 001c 0198 ldr r0, [sp, #4] + 7609 001e 012B cmp r3, #1 + 7610 0020 07D0 beq .L846 + 7611 .L840: + 7612 0022 02B0 add sp, sp, #8 + 7613 @ sp needed + 7614 0024 10BD pop {r4, pc} + 7615 .L845: + 7616 0026 FFF7FEFF bl arm_radix4_butterfly_inverse_q15 + 7617 002a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 7618 002c 0198 ldr r0, [sp, #4] + 7619 002e 012B cmp r3, #1 + 7620 0030 F7D1 bne .L840 + 7621 .L846: + 7622 0032 A368 ldr r3, [r4, #8] + 7623 0034 E289 ldrh r2, [r4, #14] + 7624 0036 2188 ldrh r1, [r4] + 7625 0038 02B0 add sp, sp, #8 + 7626 @ sp needed + 7627 003a BDE81040 pop {r4, lr} + 7628 003e FFF7FEBF b arm_bitreversal_q15 + 7630 0042 00BF .section .text.arm_radix4_butterfly_q31,"ax",%progbits + 7631 .align 1 + 7632 .p2align 2,,3 + 7633 .global arm_radix4_butterfly_q31 + 7634 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 133 + + + 7635 .thumb + 7636 .thumb_func + 7637 .fpu fpv4-sp-d16 + 7639 arm_radix4_butterfly_q31: + 7640 @ args = 0, pretend = 0, frame = 96 + 7641 @ frame_needed = 0, uses_anonymous_args = 0 + 7642 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 7643 0004 99B0 sub sp, sp, #100 + 7644 0006 012B cmp r3, #1 + 7645 0008 0092 str r2, [sp] + 7646 000a 4FEA9102 lsr r2, r1, #2 + 7647 000e CDE90731 strd r3, r1, [sp, #28] + 7648 0012 0646 mov r6, r0 + 7649 0014 1792 str r2, [sp, #92] + 7650 0016 40F0BA81 bne .L869 + 7651 001a 1346 mov r3, r2 + 7652 001c 00EB021B add fp, r0, r2, lsl #4 + 7653 0020 06EBC30A add r10, r6, r3, lsl #3 + 7654 0024 D800 lsls r0, r3, #3 + 7655 0026 009B ldr r3, [sp] + 7656 0028 CDF814B0 str fp, [sp, #20] + 7657 002c 0022 movs r2, #0 + 7658 002e 0433 adds r3, r3, #4 + 7659 0030 351D adds r5, r6, #4 + 7660 0032 0392 str r2, [sp, #12] + 7661 0034 0BF10409 add r9, fp, #4 + 7662 0038 1493 str r3, [sp, #80] + 7663 003a 0196 str r6, [sp, #4] + 7664 003c 0495 str r5, [sp, #16] + 7665 .L851: + 7666 003e 019C ldr r4, [sp, #4] + 7667 0040 5BF82230 ldr r3, [fp, r2, lsl #2] + 7668 0044 2158 ldr r1, [r4, r0] + 7669 0046 5BF80050 ldr r5, [fp, r0] + 7670 004a 54F82240 ldr r4, [r4, r2, lsl #2] + 7671 004e 049E ldr r6, [sp, #16] + 7672 0050 1B11 asrs r3, r3, #4 + 7673 0052 0911 asrs r1, r1, #4 + 7674 0054 03EB2417 add r7, r3, r4, asr #4 + 7675 0058 01EB2515 add r5, r1, r5, asr #4 + 7676 005c C3EB2413 rsb r3, r3, r4, asr #4 + 7677 0060 019C ldr r4, [sp, #4] + 7678 0062 56F822C0 ldr ip, [r6, r2, lsl #2] + 7679 0066 0293 str r3, [sp, #8] + 7680 0068 E919 adds r1, r5, r7 + 7681 006a 7B1B subs r3, r7, r5 + 7682 006c 59F82270 ldr r7, [r9, r2, lsl #2] + 7683 0070 44F82210 str r1, [r4, r2, lsl #2] + 7684 0074 DAF80410 ldr r1, [r10, #4] + 7685 0078 59F80050 ldr r5, [r9, r0] + 7686 007c 3F11 asrs r7, r7, #4 + 7687 007e 0911 asrs r1, r1, #4 + 7688 0080 01EB2515 add r5, r1, r5, asr #4 + 7689 0084 07EB2C11 add r1, r7, ip, asr #4 + 7690 0088 C7EB2C17 rsb r7, r7, ip, asr #4 + 7691 008c 05EB010C add ip, r5, r1 + 7692 0090 46F822C0 str ip, [r6, r2, lsl #2] + ARM GAS /tmp/ccFqHvis.s page 134 + + + 7693 0094 491B subs r1, r1, r5 + 7694 0096 149E ldr r6, [sp, #80] + 7695 0098 009D ldr r5, [sp] + 7696 009a 56F832C0 ldr ip, [r6, r2, lsl #3] + 7697 009e 55F83250 ldr r5, [r5, r2, lsl #3] + 7698 00a2 85FB038E smull r8, lr, r5, r3 + 7699 00a6 81FB0585 smull r8, r5, r1, r5 + 7700 00aa 8CFB0118 smull r1, r8, ip, r1 + 7701 00ae 8CFB03C3 smull ip, r3, ip, r3 + 7702 00b2 EB1A subs r3, r5, r3 + 7703 00b4 4FEA430C lsl ip, r3, #1 + 7704 00b8 59F80030 ldr r3, [r9, r0] + 7705 00bc DAF80450 ldr r5, [r10, #4] + 7706 00c0 5BF80010 ldr r1, [fp, r0] + 7707 00c4 1B11 asrs r3, r3, #4 + 7708 00c6 C3EB2513 rsb r3, r3, r5, asr #4 + 7709 00ca F044 add r8, r8, lr + 7710 00cc 2558 ldr r5, [r4, r0] + 7711 00ce 4FEA4808 lsl r8, r8, #1 + 7712 00d2 0911 asrs r1, r1, #4 + 7713 00d4 44F80080 str r8, [r4, r0] + 7714 00d8 C1EB251E rsb lr, r1, r5, asr #4 + 7715 00dc 0099 ldr r1, [sp] + 7716 00de CAF804C0 str ip, [r10, #4] + 7717 00e2 51F822C0 ldr ip, [r1, r2, lsl #2] + 7718 00e6 029C ldr r4, [sp, #8] + 7719 00e8 0299 ldr r1, [sp, #8] + 7720 00ea 56F82250 ldr r5, [r6, r2, lsl #2] + 7721 00ee 5918 adds r1, r3, r1 + 7722 00f0 E31A subs r3, r4, r3 + 7723 00f2 A7EB0E04 sub r4, r7, lr + 7724 00f6 7744 add r7, r7, lr + 7725 00f8 85FB048E smull r8, lr, r5, r4 + 7726 00fc 84FB0C84 smull r8, r4, r4, ip + 7727 0100 8CFB01C8 smull ip, r8, ip, r1 + 7728 0104 85FB0151 smull r5, r1, r5, r1 + 7729 0108 0EEB080C add ip, lr, r8 + 7730 010c 611A subs r1, r4, r1 + 7731 010e 4900 lsls r1, r1, #1 + 7732 0110 4FEA4C04 lsl r4, ip, #1 + 7733 0114 4BF82240 str r4, [fp, r2, lsl #2] + 7734 0118 49F82210 str r1, [r9, r2, lsl #2] + 7735 011c 0099 ldr r1, [sp] + 7736 011e 039E ldr r6, [sp, #12] + 7737 0120 51F82640 ldr r4, [r1, r6, lsl #2] + 7738 0124 1499 ldr r1, [sp, #80] + 7739 0126 51F82650 ldr r5, [r1, r6, lsl #2] + 7740 012a B11D adds r1, r6, #6 + 7741 012c 0391 str r1, [sp, #12] + 7742 012e 85FB071C smull r1, ip, r5, r7 + 7743 0132 87FB0471 smull r7, r1, r7, r4 + 7744 0136 84FB0374 smull r7, r4, r4, r3 + 7745 013a 85FB0353 smull r5, r3, r5, r3 + 7746 013e 6444 add r4, r4, ip + 7747 0140 CB1A subs r3, r1, r3 + 7748 0142 5B00 lsls r3, r3, #1 + 7749 0144 6400 lsls r4, r4, #1 + ARM GAS /tmp/ccFqHvis.s page 135 + + + 7750 0146 4BF80040 str r4, [fp, r0] + 7751 014a 49F80030 str r3, [r9, r0] + 7752 014e 059B ldr r3, [sp, #20] + 7753 0150 0AF1080A add r10, r10, #8 + 7754 0154 5345 cmp r3, r10 + 7755 0156 02F10202 add r2, r2, #2 + 7756 015a 00F10800 add r0, r0, #8 + 7757 015e 7FF46EAF bne .L851 + 7758 0162 019E ldr r6, [sp, #4] + 7759 0164 049D ldr r5, [sp, #16] + 7760 .L850: + 7761 0166 079B ldr r3, [sp, #28] + 7762 0168 9B00 lsls r3, r3, #2 + 7763 016a 1693 str r3, [sp, #88] + 7764 016c 179B ldr r3, [sp, #92] + 7765 016e 042B cmp r3, #4 + 7766 0170 40F2CF80 bls .L858 + 7767 0174 1593 str r3, [sp, #84] + 7768 0176 B446 mov ip, r6 + 7769 0178 AE46 mov lr, r5 + 7770 .L852: + 7771 017a 159B ldr r3, [sp, #84] + 7772 017c 0993 str r3, [sp, #36] + 7773 017e 9A08 lsrs r2, r3, #2 + 7774 0180 1946 mov r1, r3 + 7775 0182 089B ldr r3, [sp, #32] + 7776 0184 1698 ldr r0, [sp, #88] + 7777 0186 149C ldr r4, [sp, #80] + 7778 0188 1592 str r2, [sp, #84] + 7779 018a 9342 cmp r3, r2 + 7780 018c 28BF it cs + 7781 018e 1346 movcs r3, r2 + 7782 0190 1293 str r3, [sp, #72] + 7783 0192 D300 lsls r3, r2, #3 + 7784 0194 0F93 str r3, [sp, #60] + 7785 0196 C300 lsls r3, r0, #3 + 7786 0198 1193 str r3, [sp, #68] + 7787 019a 00EB4003 add r3, r0, r0, lsl #1 + 7788 019e DB00 lsls r3, r3, #3 + 7789 01a0 1393 str r3, [sp, #76] + 7790 01a2 0301 lsls r3, r0, #4 + 7791 01a4 0CEB0216 add r6, ip, r2, lsl #4 + 7792 01a8 1093 str r3, [sp, #64] + 7793 01aa CDE90C44 strd r4, r4, [sp, #48] + 7794 01ae CB00 lsls r3, r1, #3 + 7795 01b0 0A93 str r3, [sp, #40] + 7796 01b2 06F10408 add r8, r6, #4 + 7797 01b6 0023 movs r3, #0 + 7798 01b8 0E94 str r4, [sp, #56] + 7799 01ba 0B93 str r3, [sp, #44] + 7800 01bc C346 mov fp, r8 + 7801 .L855: + 7802 01be 0E9B ldr r3, [sp, #56] + 7803 01c0 0B99 ldr r1, [sp, #44] + 7804 01c2 53F8042C ldr r2, [r3, #-4] + 7805 01c6 1B68 ldr r3, [r3] + 7806 01c8 0593 str r3, [sp, #20] + ARM GAS /tmp/ccFqHvis.s page 136 + + + 7807 01ca 0D9B ldr r3, [sp, #52] + 7808 01cc 0492 str r2, [sp, #16] + 7809 01ce 53F8042C ldr r2, [r3, #-4] + 7810 01d2 1B68 ldr r3, [r3] + 7811 01d4 0293 str r3, [sp, #8] + 7812 01d6 0C9B ldr r3, [sp, #48] + 7813 01d8 0192 str r2, [sp, #4] + 7814 01da 53F8042C ldr r2, [r3, #-4] + 7815 01de 1B68 ldr r3, [r3] + 7816 01e0 0793 str r3, [sp, #28] + 7817 01e2 0F9B ldr r3, [sp, #60] + 7818 01e4 0692 str r2, [sp, #24] + 7819 .L854: + 7820 01e6 56F83140 ldr r4, [r6, r1, lsl #3] + 7821 01ea 5CF83150 ldr r5, [ip, r1, lsl #3] + 7822 01ee 5CF80300 ldr r0, [ip, r3] + 7823 01f2 F258 ldr r2, [r6, r3] + 7824 01f4 05EB0408 add r8, r5, r4 + 7825 01f8 0244 add r2, r2, r0 + 7826 01fa 2D1B subs r5, r5, r4 + 7827 01fc 08EB0204 add r4, r8, r2 + 7828 0200 A410 asrs r4, r4, #2 + 7829 0202 5EF83100 ldr r0, [lr, r1, lsl #3] + 7830 0206 A8EB0208 sub r8, r8, r2 + 7831 020a 5BF83120 ldr r2, [fp, r1, lsl #3] + 7832 020e 4CF83140 str r4, [ip, r1, lsl #3] + 7833 0212 8418 adds r4, r0, r2 + 7834 0214 5BF80370 ldr r7, [fp, r3] + 7835 0218 821A subs r2, r0, r2 + 7836 021a 5EF80300 ldr r0, [lr, r3] + 7837 021e 3844 add r0, r0, r7 + 7838 0220 04EB0009 add r9, r4, r0 + 7839 0224 241A subs r4, r4, r0 + 7840 0226 4FEAA900 asr r0, r9, #2 + 7841 022a 4EF83100 str r0, [lr, r1, lsl #3] + 7842 022e 029F ldr r7, [sp, #8] + 7843 0230 0198 ldr r0, [sp, #4] + 7844 0232 0094 str r4, [sp] + 7845 0234 88FB0009 smull r0, r9, r8, r0 + 7846 0238 88FB0708 smull r0, r8, r8, r7 + 7847 023c 5EF80370 ldr r7, [lr, r3] + 7848 0240 5BF80300 ldr r0, [fp, r3] + 7849 0244 5CF80340 ldr r4, [ip, r3] + 7850 0248 381A subs r0, r7, r0 + 7851 024a F758 ldr r7, [r6, r3] + 7852 024c E71B subs r7, r4, r7 + 7853 024e 05EB000A add r10, r5, r0 + 7854 0252 2D1A subs r5, r5, r0 + 7855 0254 D01B subs r0, r2, r7 + 7856 0256 D719 adds r7, r2, r7 + 7857 0258 0397 str r7, [sp, #12] + 7858 025a 009C ldr r4, [sp] + 7859 025c 029F ldr r7, [sp, #8] + 7860 025e 84FB0747 smull r4, r7, r4, r7 + 7861 0262 DDE90042 ldrd r4, r2, [sp] + 7862 0266 4F44 add r7, r7, r9 + 7863 0268 84FB0294 smull r9, r4, r4, r2 + ARM GAS /tmp/ccFqHvis.s page 137 + + + 7864 026c A4EB0804 sub r4, r4, r8 + 7865 0270 049A ldr r2, [sp, #16] + 7866 0272 7F10 asrs r7, r7, #1 + 7867 0274 6410 asrs r4, r4, #1 + 7868 0276 4CF80370 str r7, [ip, r3] + 7869 027a 4EF80340 str r4, [lr, r3] + 7870 027e 8AFB0248 smull r4, r8, r10, r2 + 7871 0282 059C ldr r4, [sp, #20] + 7872 0284 8AFB04A7 smull r10, r7, r10, r4 + 7873 0288 80FB0494 smull r9, r4, r0, r4 + 7874 028c 80FB020A smull r0, r10, r0, r2 + 7875 0290 4444 add r4, r4, r8 + 7876 0292 099A ldr r2, [sp, #36] + 7877 0294 AAEB070A sub r10, r10, r7 + 7878 0298 6410 asrs r4, r4, #1 + 7879 029a 4FEA6A07 asr r7, r10, #1 + 7880 029e 46F83140 str r4, [r6, r1, lsl #3] + 7881 02a2 4BF83170 str r7, [fp, r1, lsl #3] + 7882 02a6 079C ldr r4, [sp, #28] + 7883 02a8 039F ldr r7, [sp, #12] + 7884 02aa 1144 add r1, r1, r2 + 7885 02ac 069A ldr r2, [sp, #24] + 7886 02ae 85FB0208 smull r0, r8, r5, r2 + 7887 02b2 85FB0450 smull r5, r0, r5, r4 + 7888 02b6 87FB0454 smull r5, r4, r7, r4 + 7889 02ba 4444 add r4, r4, r8 + 7890 02bc 87FB0225 smull r2, r5, r7, r2 + 7891 02c0 6410 asrs r4, r4, #1 + 7892 02c2 F450 str r4, [r6, r3] + 7893 02c4 2D1A subs r5, r5, r0 + 7894 02c6 0A9A ldr r2, [sp, #40] + 7895 02c8 6D10 asrs r5, r5, #1 + 7896 02ca 4BF80350 str r5, [fp, r3] + 7897 02ce 1344 add r3, r3, r2 + 7898 02d0 089A ldr r2, [sp, #32] + 7899 02d2 8A42 cmp r2, r1 + 7900 02d4 87D8 bhi .L854 + 7901 02d6 0F9A ldr r2, [sp, #60] + 7902 02d8 1199 ldr r1, [sp, #68] + 7903 02da 0B9B ldr r3, [sp, #44] + 7904 02dc 0832 adds r2, r2, #8 + 7905 02de 0F92 str r2, [sp, #60] + 7906 02e0 0E9A ldr r2, [sp, #56] + 7907 02e2 0A44 add r2, r2, r1 + 7908 02e4 0E92 str r2, [sp, #56] + 7909 02e6 1099 ldr r1, [sp, #64] + 7910 02e8 0D9A ldr r2, [sp, #52] + 7911 02ea 0A44 add r2, r2, r1 + 7912 02ec 0D92 str r2, [sp, #52] + 7913 02ee 1399 ldr r1, [sp, #76] + 7914 02f0 0C9A ldr r2, [sp, #48] + 7915 02f2 0A44 add r2, r2, r1 + 7916 02f4 0C92 str r2, [sp, #48] + 7917 02f6 129A ldr r2, [sp, #72] + 7918 02f8 0133 adds r3, r3, #1 + 7919 02fa 9342 cmp r3, r2 + 7920 02fc 0B93 str r3, [sp, #44] + ARM GAS /tmp/ccFqHvis.s page 138 + + + 7921 02fe FFF45EAF bcc .L855 + 7922 0302 169B ldr r3, [sp, #88] + 7923 0304 9B00 lsls r3, r3, #2 + 7924 0306 1693 str r3, [sp, #88] + 7925 0308 159B ldr r3, [sp, #84] + 7926 030a 042B cmp r3, #4 + 7927 030c 3FF635AF bhi .L852 + 7928 0310 6646 mov r6, ip + 7929 .L858: + 7930 0312 DDF85CC0 ldr ip, [sp, #92] + 7931 0316 06F12003 add r3, r6, #32 + 7932 .L853: + 7933 031a 53E90662 ldrd r6, r2, [r3, #-24] + 7934 031e 53E908B1 ldrd fp, r1, [r3, #-32] + 7935 0322 53E90404 ldrd r0, r4, [r3, #-16] + 7936 0326 53E902E8 ldrd lr, r8, [r3, #-8] + 7937 032a 8D18 adds r5, r1, r2 + 7938 032c 0BEB0609 add r9, fp, r6 + 7939 0330 8144 add r9, r9, r0 + 7940 0332 2544 add r5, r5, r4 + 7941 0334 F144 add r9, r9, lr + 7942 0336 4544 add r5, r5, r8 + 7943 0338 43E90895 strd r9, r5, [r3, #-32] + 7944 033c ABEB0607 sub r7, fp, r6 + 7945 0340 8D19 adds r5, r1, r6 + 7946 0342 A1EB0209 sub r9, r1, r2 + 7947 0346 0BEB020A add r10, fp, r2 + 7948 034a 891B subs r1, r1, r6 + 7949 034c ABEB0202 sub r2, fp, r2 + 7950 0350 0744 add r7, r7, r0 + 7951 0352 AAEB0006 sub r6, r10, r0 + 7952 0356 A144 add r9, r9, r4 + 7953 0358 101A subs r0, r2, r0 + 7954 035a 091B subs r1, r1, r4 + 7955 035c 2A1B subs r2, r5, r4 + 7956 035e A7EB0E07 sub r7, r7, lr + 7957 0362 A9EB0805 sub r5, r9, r8 + 7958 0366 A6EB0806 sub r6, r6, r8 + 7959 036a 7144 add r1, r1, lr + 7960 036c 4044 add r0, r0, r8 + 7961 036e A2EB0E02 sub r2, r2, lr + 7962 0372 BCF1010C subs ip, ip, #1 + 7963 0376 43E90675 strd r7, r5, [r3, #-24] + 7964 037a 43E90461 strd r6, r1, [r3, #-16] + 7965 037e 43E90202 strd r0, r2, [r3, #-8] + 7966 0382 03F12003 add r3, r3, #32 + 7967 0386 C8D1 bne .L853 + 7968 0388 19B0 add sp, sp, #100 + 7969 @ sp needed + 7970 038a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 7971 .L869: + 7972 038e 1946 mov r1, r3 + 7973 0390 009A ldr r2, [sp] + 7974 0392 03EB4303 add r3, r3, r3, lsl #1 + 7975 0396 DB00 lsls r3, r3, #3 + 7976 0398 0432 adds r2, r2, #4 + 7977 039a 0693 str r3, [sp, #24] + ARM GAS /tmp/ccFqHvis.s page 139 + + + 7978 039c 179B ldr r3, [sp, #92] + 7979 039e 1492 str r2, [sp, #80] + 7980 03a0 CDE90122 strd r2, r2, [sp, #4] + 7981 03a4 00EB0318 add r8, r0, r3, lsl #4 + 7982 03a8 0801 lsls r0, r1, #4 + 7983 03aa C900 lsls r1, r1, #3 + 7984 03ac 0590 str r0, [sp, #20] + 7985 03ae 0491 str r1, [sp, #16] + 7986 03b0 DB00 lsls r3, r3, #3 + 7987 03b2 08F10409 add r9, r8, #4 + 7988 03b6 0092 str r2, [sp] + 7989 03b8 0020 movs r0, #0 + 7990 03ba 351D adds r5, r6, #4 + 7991 .L849: + 7992 03bc 58F83020 ldr r2, [r8, r0, lsl #3] + 7993 03c0 58F80310 ldr r1, [r8, r3] + 7994 03c4 56F83040 ldr r4, [r6, r0, lsl #3] + 7995 03c8 F758 ldr r7, [r6, r3] + 7996 03ca 55F830E0 ldr lr, [r5, r0, lsl #3] + 7997 03ce 1211 asrs r2, r2, #4 + 7998 03d0 0911 asrs r1, r1, #4 + 7999 03d2 02EB241C add ip, r2, r4, asr #4 + 8000 03d6 01EB2717 add r7, r1, r7, asr #4 + 8001 03da 0CEB0701 add r1, ip, r7 + 8002 03de C2EB2414 rsb r4, r2, r4, asr #4 + 8003 03e2 ACEB0702 sub r2, ip, r7 + 8004 03e6 59F83070 ldr r7, [r9, r0, lsl #3] + 8005 03ea 46F83010 str r1, [r6, r0, lsl #3] + 8006 03ee 59F80310 ldr r1, [r9, r3] + 8007 03f2 0394 str r4, [sp, #12] + 8008 03f4 4FEA271C asr ip, r7, #4 + 8009 03f8 EF58 ldr r7, [r5, r3] + 8010 03fa 0911 asrs r1, r1, #4 + 8011 03fc 01EB2717 add r7, r1, r7, asr #4 + 8012 0400 0CEB2E11 add r1, ip, lr, asr #4 + 8013 0404 CCEB2E1C rsb ip, ip, lr, asr #4 + 8014 0408 01EB070E add lr, r1, r7 + 8015 040c C91B subs r1, r1, r7 + 8016 040e 029F ldr r7, [sp, #8] + 8017 0410 45F830E0 str lr, [r5, r0, lsl #3] + 8018 0414 57F8044C ldr r4, [r7, #-4] + 8019 0418 D7F800E0 ldr lr, [r7] + 8020 041c A246 mov r10, r4 + 8021 041e 059C ldr r4, [sp, #20] + 8022 0420 2744 add r7, r7, r4 + 8023 0422 5446 mov r4, r10 + 8024 0424 0297 str r7, [sp, #8] + 8025 0426 82FB0ABA smull fp, r10, r2, r10 + 8026 042a 84FB01B7 smull fp, r7, r4, r1 + 8027 042e 81FB0E1B smull r1, fp, r1, lr + 8028 0432 82FB0E2E smull r2, lr, r2, lr + 8029 0436 59F80320 ldr r2, [r9, r3] + 8030 043a 58F80310 ldr r1, [r8, r3] + 8031 043e 049C ldr r4, [sp, #16] + 8032 0440 A7EB0E0E sub lr, r7, lr + 8033 0444 EF58 ldr r7, [r5, r3] + 8034 0446 1211 asrs r2, r2, #4 + ARM GAS /tmp/ccFqHvis.s page 140 + + + 8035 0448 C2EB2712 rsb r2, r2, r7, asr #4 + 8036 044c F758 ldr r7, [r6, r3] + 8037 044e D344 add fp, fp, r10 + 8038 0450 0911 asrs r1, r1, #4 + 8039 0452 C1EB271A rsb r10, r1, r7, asr #4 + 8040 0456 4FEA4B0B lsl fp, fp, #1 + 8041 045a 009F ldr r7, [sp] + 8042 045c 46F803B0 str fp, [r6, r3] + 8043 0460 4FEA4E0E lsl lr, lr, #1 + 8044 0464 45F803E0 str lr, [r5, r3] + 8045 0468 3C19 adds r4, r7, r4 + 8046 046a 57E901E1 ldrd lr, r1, [r7, #-4] + 8047 046e 0094 str r4, [sp] + 8048 0470 039C ldr r4, [sp, #12] + 8049 0472 A718 adds r7, r4, r2 + 8050 0474 A21A subs r2, r4, r2 + 8051 0476 ACEB0A04 sub r4, ip, r10 + 8052 047a D444 add ip, ip, r10 + 8053 047c 87FB0EBA smull fp, r10, r7, lr + 8054 0480 8EFB04BE smull fp, lr, lr, r4 + 8055 0484 84FB014B smull r4, fp, r4, r1 + 8056 0488 87FB0171 smull r7, r1, r7, r1 + 8057 048c AEEB0101 sub r1, lr, r1 + 8058 0490 0AEB0B04 add r4, r10, fp + 8059 0494 6400 lsls r4, r4, #1 + 8060 0496 4900 lsls r1, r1, #1 + 8061 0498 48F83040 str r4, [r8, r0, lsl #3] + 8062 049c 49F83010 str r1, [r9, r0, lsl #3] + 8063 04a0 019C ldr r4, [sp, #4] + 8064 04a2 0392 str r2, [sp, #12] + 8065 04a4 54E90171 ldrd r7, r1, [r4, #-4] + 8066 04a8 069A ldr r2, [sp, #24] + 8067 04aa 1444 add r4, r4, r2 + 8068 04ac 039A ldr r2, [sp, #12] + 8069 04ae 0194 str r4, [sp, #4] + 8070 04b0 82FB07E4 smull lr, r4, r2, r7 + 8071 04b4 87FB0CE7 smull lr, r7, r7, ip + 8072 04b8 8CFB01CE smull ip, lr, ip, r1 + 8073 04bc 82FB0121 smull r2, r1, r2, r1 + 8074 04c0 179A ldr r2, [sp, #92] + 8075 04c2 0130 adds r0, r0, #1 + 8076 04c4 7444 add r4, r4, lr + 8077 04c6 791A subs r1, r7, r1 + 8078 04c8 6400 lsls r4, r4, #1 + 8079 04ca 4900 lsls r1, r1, #1 + 8080 04cc 8242 cmp r2, r0 + 8081 04ce 48F80340 str r4, [r8, r3] + 8082 04d2 49F80310 str r1, [r9, r3] + 8083 04d6 03F10803 add r3, r3, #8 + 8084 04da 7FF46FAF bne .L849 + 8085 04de 42E6 b .L850 + 8087 .section .text.arm_cfft_radix4by2_q31,"ax",%progbits + 8088 .align 1 + 8089 .p2align 2,,3 + 8090 .global arm_cfft_radix4by2_q31 + 8091 .syntax unified + 8092 .thumb + ARM GAS /tmp/ccFqHvis.s page 141 + + + 8093 .thumb_func + 8094 .fpu fpv4-sp-d16 + 8096 arm_cfft_radix4by2_q31: + 8097 @ args = 0, pretend = 0, frame = 16 + 8098 @ frame_needed = 0, uses_anonymous_args = 0 + 8099 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8100 0004 85B0 sub sp, sp, #20 + 8101 0006 4B08 lsrs r3, r1, #1 + 8102 0008 0391 str r1, [sp, #12] + 8103 000a 0446 mov r4, r0 + 8104 000c 0192 str r2, [sp, #4] + 8105 000e 0093 str r3, [sp] + 8106 0010 70D0 beq .L871 + 8107 0012 1546 mov r5, r2 + 8108 0014 00EBC307 add r7, r0, r3, lsl #3 + 8109 0018 2B46 mov r3, r5 + 8110 001a 0022 movs r2, #0 + 8111 001c 0433 adds r3, r3, #4 + 8112 001e 07F10409 add r9, r7, #4 + 8113 0022 0293 str r3, [sp, #8] + 8114 0024 00F10408 add r8, r0, #4 + 8115 0028 4FF00046 mov r6, #-2147483648 + 8116 002c 9646 mov lr, r2 + 8117 002e BC46 mov ip, r7 + 8118 .L872: + 8119 0030 019B ldr r3, [sp, #4] + 8120 0032 54F83210 ldr r1, [r4, r2, lsl #3] + 8121 0036 53F83270 ldr r7, [r3, r2, lsl #3] + 8122 003a 029B ldr r3, [sp, #8] + 8123 003c 53F83250 ldr r5, [r3, r2, lsl #3] + 8124 0040 5CF83230 ldr r3, [ip, r2, lsl #3] + 8125 0044 9B10 asrs r3, r3, #2 + 8126 0046 03EBA100 add r0, r3, r1, asr #2 + 8127 004a 44F83200 str r0, [r4, r2, lsl #3] + 8128 004e C3EBA103 rsb r3, r3, r1, asr #2 + 8129 0052 59F83210 ldr r1, [r9, r2, lsl #3] + 8130 0056 58F832B0 ldr fp, [r8, r2, lsl #3] + 8131 005a 8910 asrs r1, r1, #2 + 8132 005c B246 mov r10, r6 + 8133 005e 7046 mov r0, lr + 8134 0060 C3FB07A0 smlal r10, r0, r3, r7 + 8135 0064 C1EBAB0A rsb r10, r1, fp, asr #2 + 8136 0068 01EBAB01 add r1, r1, fp, asr #2 + 8137 006c 48F83210 str r1, [r8, r2, lsl #3] + 8138 0070 B346 mov fp, r6 + 8139 0072 7146 mov r1, lr + 8140 0074 C7FB0AB1 smlal fp, r1, r7, r10 + 8141 0078 7746 mov r7, lr + 8142 007a CAFB0570 smlal r7, r0, r10, r5 + 8143 007e 17F10047 adds r7, r7, #-2147483648 + 8144 0082 83FB0537 smull r3, r7, r3, r5 + 8145 0086 40F10000 adc r0, r0, #0 + 8146 008a 5B42 rsbs r3, r3, #0 + 8147 008c 61EB0701 sbc r1, r1, r7 + 8148 0090 13F10043 adds r3, r3, #-2147483648 + 8149 0094 41F10001 adc r1, r1, #0 + 8150 0098 009B ldr r3, [sp] + ARM GAS /tmp/ccFqHvis.s page 142 + + + 8151 009a 4000 lsls r0, r0, #1 + 8152 009c 4900 lsls r1, r1, #1 + 8153 009e 4CF83200 str r0, [ip, r2, lsl #3] + 8154 00a2 49F83210 str r1, [r9, r2, lsl #3] + 8155 00a6 0132 adds r2, r2, #1 + 8156 00a8 9342 cmp r3, r2 + 8157 00aa C1D1 bne .L872 + 8158 00ac 019E ldr r6, [sp, #4] + 8159 00ae 1D46 mov r5, r3 + 8160 00b0 2946 mov r1, r5 + 8161 00b2 0223 movs r3, #2 + 8162 00b4 3246 mov r2, r6 + 8163 00b6 2046 mov r0, r4 + 8164 00b8 FFF7FEFF bl arm_radix4_butterfly_q31 + 8165 00bc 0398 ldr r0, [sp, #12] + 8166 00be 2946 mov r1, r5 + 8167 00c0 0223 movs r3, #2 + 8168 00c2 3246 mov r2, r6 + 8169 00c4 04EB8000 add r0, r4, r0, lsl #2 + 8170 00c8 FFF7FEFF bl arm_radix4_butterfly_q31 + 8171 00cc 04EB0515 add r5, r4, r5, lsl #4 + 8172 .L874: + 8173 00d0 D4E90001 ldrd r0, r1, [r4] + 8174 00d4 D4E90223 ldrd r2, r3, [r4, #8] + 8175 00d8 4000 lsls r0, r0, #1 + 8176 00da 4900 lsls r1, r1, #1 + 8177 00dc 5200 lsls r2, r2, #1 + 8178 00de 5B00 lsls r3, r3, #1 + 8179 00e0 C4E90001 strd r0, r1, [r4] + 8180 00e4 C4E90223 strd r2, r3, [r4, #8] + 8181 00e8 1034 adds r4, r4, #16 + 8182 00ea A542 cmp r5, r4 + 8183 00ec F0D1 bne .L874 + 8184 00ee 05B0 add sp, sp, #20 + 8185 @ sp needed + 8186 00f0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 8187 .L871: + 8188 00f4 1D46 mov r5, r3 + 8189 00f6 2946 mov r1, r5 + 8190 00f8 0223 movs r3, #2 + 8191 00fa FFF7FEFF bl arm_radix4_butterfly_q31 + 8192 00fe 0398 ldr r0, [sp, #12] + 8193 0100 019A ldr r2, [sp, #4] + 8194 0102 0223 movs r3, #2 + 8195 0104 2946 mov r1, r5 + 8196 0106 04EB8000 add r0, r4, r0, lsl #2 + 8197 010a 05B0 add sp, sp, #20 + 8198 @ sp needed + 8199 010c BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8200 0110 FFF7FEBF b arm_radix4_butterfly_q31 + 8202 .section .text.arm_radix4_butterfly_inverse_q31,"ax",%progbits + 8203 .align 1 + 8204 .p2align 2,,3 + 8205 .global arm_radix4_butterfly_inverse_q31 + 8206 .syntax unified + 8207 .thumb + 8208 .thumb_func + ARM GAS /tmp/ccFqHvis.s page 143 + + + 8209 .fpu fpv4-sp-d16 + 8211 arm_radix4_butterfly_inverse_q31: + 8212 @ args = 0, pretend = 0, frame = 96 + 8213 @ frame_needed = 0, uses_anonymous_args = 0 + 8214 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8215 0004 99B0 sub sp, sp, #100 + 8216 0006 012B cmp r3, #1 + 8217 0008 0092 str r2, [sp] + 8218 000a 4FEA9102 lsr r2, r1, #2 + 8219 000e CDE90813 strd r1, r3, [sp, #32] + 8220 0012 0646 mov r6, r0 + 8221 0014 1792 str r2, [sp, #92] + 8222 0016 40F0B781 bne .L902 + 8223 001a 00EB021B add fp, r0, r2, lsl #4 + 8224 001e D100 lsls r1, r2, #3 + 8225 0020 00EBC20A add r10, r0, r2, lsl #3 + 8226 0024 009A ldr r2, [sp] + 8227 0026 CDF810B0 str fp, [sp, #16] + 8228 002a 0023 movs r3, #0 + 8229 002c 0432 adds r2, r2, #4 + 8230 002e 051D adds r5, r0, #4 + 8231 0030 0193 str r3, [sp, #4] + 8232 0032 0BF10409 add r9, fp, #4 + 8233 0036 1492 str r2, [sp, #80] + 8234 0038 0395 str r5, [sp, #12] + 8235 .L884: + 8236 003a 5BF82320 ldr r2, [fp, r3, lsl #2] + 8237 003e 7058 ldr r0, [r6, r1] + 8238 0040 56F82340 ldr r4, [r6, r3, lsl #2] + 8239 0044 5BF80150 ldr r5, [fp, r1] + 8240 0048 59F82370 ldr r7, [r9, r3, lsl #2] + 8241 004c 1211 asrs r2, r2, #4 + 8242 004e 0011 asrs r0, r0, #4 + 8243 0050 00EB2515 add r5, r0, r5, asr #4 + 8244 0054 02EB2410 add r0, r2, r4, asr #4 + 8245 0058 C2EB2412 rsb r2, r2, r4, asr #4 + 8246 005c 039C ldr r4, [sp, #12] + 8247 005e 0292 str r2, [sp, #8] + 8248 0060 2A18 adds r2, r5, r0 + 8249 0062 54F823C0 ldr ip, [r4, r3, lsl #2] + 8250 0066 46F82320 str r2, [r6, r3, lsl #2] + 8251 006a DAF80420 ldr r2, [r10, #4] + 8252 006e 401B subs r0, r0, r5 + 8253 0070 59F80150 ldr r5, [r9, r1] + 8254 0074 3F11 asrs r7, r7, #4 + 8255 0076 1211 asrs r2, r2, #4 + 8256 0078 07EB2C1E add lr, r7, ip, asr #4 + 8257 007c 02EB2512 add r2, r2, r5, asr #4 + 8258 0080 C7EB2C15 rsb r5, r7, ip, asr #4 + 8259 0084 02EB0E07 add r7, r2, lr + 8260 0088 44F82370 str r7, [r4, r3, lsl #2] + 8261 008c 149C ldr r4, [sp, #80] + 8262 008e 009F ldr r7, [sp] + 8263 0090 54F833C0 ldr ip, [r4, r3, lsl #3] + 8264 0094 57F83370 ldr r7, [r7, r3, lsl #3] + 8265 0098 AEEB0202 sub r2, lr, r2 + 8266 009c 87FB008E smull r8, lr, r7, r0 + ARM GAS /tmp/ccFqHvis.s page 144 + + + 8267 00a0 8CFB0080 smull r8, r0, ip, r0 + 8268 00a4 8CFB02C8 smull ip, r8, ip, r2 + 8269 00a8 82FB0727 smull r2, r7, r2, r7 + 8270 00ac 59F80120 ldr r2, [r9, r1] + 8271 00b0 AEEB080C sub ip, lr, r8 + 8272 00b4 4FEA221E asr lr, r2, #4 + 8273 00b8 5BF80120 ldr r2, [fp, r1] + 8274 00bc 0744 add r7, r7, r0 + 8275 00be 4FEA4C0C lsl ip, ip, #1 + 8276 00c2 7F00 lsls r7, r7, #1 + 8277 00c4 4FEA2218 asr r8, r2, #4 + 8278 00c8 7258 ldr r2, [r6, r1] + 8279 00ca DAF80400 ldr r0, [r10, #4] + 8280 00ce 46F801C0 str ip, [r6, r1] + 8281 00d2 CAF80470 str r7, [r10, #4] + 8282 00d6 009F ldr r7, [sp] + 8283 00d8 54F823C0 ldr ip, [r4, r3, lsl #2] + 8284 00dc C8EB2218 rsb r8, r8, r2, asr #4 + 8285 00e0 029A ldr r2, [sp, #8] + 8286 00e2 CEEB2010 rsb r0, lr, r0, asr #4 + 8287 00e6 57F823E0 ldr lr, [r7, r3, lsl #2] + 8288 00ea 171A subs r7, r2, r0 + 8289 00ec 0244 add r2, r2, r0 + 8290 00ee 08EB0500 add r0, r8, r5 + 8291 00f2 A5EB0805 sub r5, r5, r8 + 8292 00f6 8EFB0784 smull r8, r4, lr, r7 + 8293 00fa 80FB0E8E smull r8, lr, r0, lr + 8294 00fe 8CFB0008 smull r0, r8, ip, r0 + 8295 0102 8CFB07C7 smull ip, r7, ip, r7 + 8296 0106 A4EB0800 sub r0, r4, r8 + 8297 010a 7744 add r7, r7, lr + 8298 010c 4000 lsls r0, r0, #1 + 8299 010e 7F00 lsls r7, r7, #1 + 8300 0110 4BF82300 str r0, [fp, r3, lsl #2] + 8301 0114 49F82370 str r7, [r9, r3, lsl #2] + 8302 0118 DDE90007 ldrd r0, r7, [sp] + 8303 011c 149C ldr r4, [sp, #80] + 8304 011e 50F82700 ldr r0, [r0, r7, lsl #2] + 8305 0122 54F82740 ldr r4, [r4, r7, lsl #2] + 8306 0126 0637 adds r7, r7, #6 + 8307 0128 0197 str r7, [sp, #4] + 8308 012a 80FB02C7 smull ip, r7, r0, r2 + 8309 012e 84FB02C2 smull ip, r2, r4, r2 + 8310 0132 84FB05C4 smull ip, r4, r4, r5 + 8311 0136 85FB0050 smull r5, r0, r5, r0 + 8312 013a 3C1B subs r4, r7, r4 + 8313 013c 0244 add r2, r2, r0 + 8314 013e 5200 lsls r2, r2, #1 + 8315 0140 6400 lsls r4, r4, #1 + 8316 0142 4BF80140 str r4, [fp, r1] + 8317 0146 49F80120 str r2, [r9, r1] + 8318 014a 049A ldr r2, [sp, #16] + 8319 014c 0AF1080A add r10, r10, #8 + 8320 0150 5245 cmp r2, r10 + 8321 0152 03F10203 add r3, r3, #2 + 8322 0156 01F10801 add r1, r1, #8 + 8323 015a 7FF46EAF bne .L884 + ARM GAS /tmp/ccFqHvis.s page 145 + + + 8324 015e 039D ldr r5, [sp, #12] + 8325 .L883: + 8326 0160 099B ldr r3, [sp, #36] + 8327 0162 9B00 lsls r3, r3, #2 + 8328 0164 1693 str r3, [sp, #88] + 8329 0166 179B ldr r3, [sp, #92] + 8330 0168 042B cmp r3, #4 + 8331 016a 40F2D080 bls .L891 + 8332 016e 1593 str r3, [sp, #84] + 8333 0170 B446 mov ip, r6 + 8334 0172 AE46 mov lr, r5 + 8335 .L885: + 8336 0174 159B ldr r3, [sp, #84] + 8337 0176 0993 str r3, [sp, #36] + 8338 0178 9A08 lsrs r2, r3, #2 + 8339 017a 1946 mov r1, r3 + 8340 017c 089B ldr r3, [sp, #32] + 8341 017e 1698 ldr r0, [sp, #88] + 8342 0180 149C ldr r4, [sp, #80] + 8343 0182 1592 str r2, [sp, #84] + 8344 0184 9342 cmp r3, r2 + 8345 0186 28BF it cs + 8346 0188 1346 movcs r3, r2 + 8347 018a 1293 str r3, [sp, #72] + 8348 018c D300 lsls r3, r2, #3 + 8349 018e 0F93 str r3, [sp, #60] + 8350 0190 C300 lsls r3, r0, #3 + 8351 0192 1193 str r3, [sp, #68] + 8352 0194 00EB4003 add r3, r0, r0, lsl #1 + 8353 0198 DB00 lsls r3, r3, #3 + 8354 019a 1393 str r3, [sp, #76] + 8355 019c 0301 lsls r3, r0, #4 + 8356 019e 0CEB0216 add r6, ip, r2, lsl #4 + 8357 01a2 1093 str r3, [sp, #64] + 8358 01a4 CDE90C44 strd r4, r4, [sp, #48] + 8359 01a8 CB00 lsls r3, r1, #3 + 8360 01aa 0A93 str r3, [sp, #40] + 8361 01ac 06F10408 add r8, r6, #4 + 8362 01b0 0023 movs r3, #0 + 8363 01b2 0E94 str r4, [sp, #56] + 8364 01b4 0B93 str r3, [sp, #44] + 8365 01b6 C346 mov fp, r8 + 8366 .L888: + 8367 01b8 0E9B ldr r3, [sp, #56] + 8368 01ba 0B99 ldr r1, [sp, #44] + 8369 01bc 53F8042C ldr r2, [r3, #-4] + 8370 01c0 1B68 ldr r3, [r3] + 8371 01c2 0593 str r3, [sp, #20] + 8372 01c4 0D9B ldr r3, [sp, #52] + 8373 01c6 0492 str r2, [sp, #16] + 8374 01c8 53F8042C ldr r2, [r3, #-4] + 8375 01cc 1B68 ldr r3, [r3] + 8376 01ce 0293 str r3, [sp, #8] + 8377 01d0 0C9B ldr r3, [sp, #48] + 8378 01d2 0192 str r2, [sp, #4] + 8379 01d4 53F8042C ldr r2, [r3, #-4] + 8380 01d8 1B68 ldr r3, [r3] + ARM GAS /tmp/ccFqHvis.s page 146 + + + 8381 01da 0793 str r3, [sp, #28] + 8382 01dc 0F9B ldr r3, [sp, #60] + 8383 01de 0692 str r2, [sp, #24] + 8384 .L887: + 8385 01e0 56F83140 ldr r4, [r6, r1, lsl #3] + 8386 01e4 5CF83150 ldr r5, [ip, r1, lsl #3] + 8387 01e8 5CF80300 ldr r0, [ip, r3] + 8388 01ec F258 ldr r2, [r6, r3] + 8389 01ee 05EB0408 add r8, r5, r4 + 8390 01f2 0244 add r2, r2, r0 + 8391 01f4 2D1B subs r5, r5, r4 + 8392 01f6 08EB0204 add r4, r8, r2 + 8393 01fa A410 asrs r4, r4, #2 + 8394 01fc 5EF83100 ldr r0, [lr, r1, lsl #3] + 8395 0200 A8EB0208 sub r8, r8, r2 + 8396 0204 5BF83120 ldr r2, [fp, r1, lsl #3] + 8397 0208 4CF83140 str r4, [ip, r1, lsl #3] + 8398 020c 8418 adds r4, r0, r2 + 8399 020e 5BF80370 ldr r7, [fp, r3] + 8400 0212 821A subs r2, r0, r2 + 8401 0214 5EF80300 ldr r0, [lr, r3] + 8402 0218 3844 add r0, r0, r7 + 8403 021a 04EB0009 add r9, r4, r0 + 8404 021e 241A subs r4, r4, r0 + 8405 0220 4FEAA900 asr r0, r9, #2 + 8406 0224 4EF83100 str r0, [lr, r1, lsl #3] + 8407 0228 029F ldr r7, [sp, #8] + 8408 022a 0198 ldr r0, [sp, #4] + 8409 022c 0094 str r4, [sp] + 8410 022e 88FB0009 smull r0, r9, r8, r0 + 8411 0232 88FB0708 smull r0, r8, r8, r7 + 8412 0236 5EF80370 ldr r7, [lr, r3] + 8413 023a 5BF80300 ldr r0, [fp, r3] + 8414 023e 5CF80340 ldr r4, [ip, r3] + 8415 0242 381A subs r0, r7, r0 + 8416 0244 F758 ldr r7, [r6, r3] + 8417 0246 E71B subs r7, r4, r7 + 8418 0248 A5EB000A sub r10, r5, r0 + 8419 024c 0544 add r5, r5, r0 + 8420 024e D019 adds r0, r2, r7 + 8421 0250 D71B subs r7, r2, r7 + 8422 0252 0397 str r7, [sp, #12] + 8423 0254 009C ldr r4, [sp] + 8424 0256 029F ldr r7, [sp, #8] + 8425 0258 84FB0747 smull r4, r7, r4, r7 + 8426 025c DDE90042 ldrd r4, r2, [sp] + 8427 0260 A9EB0707 sub r7, r9, r7 + 8428 0264 84FB0294 smull r9, r4, r4, r2 + 8429 0268 4444 add r4, r4, r8 + 8430 026a 049A ldr r2, [sp, #16] + 8431 026c 7F10 asrs r7, r7, #1 + 8432 026e 6410 asrs r4, r4, #1 + 8433 0270 4CF80370 str r7, [ip, r3] + 8434 0274 4EF80340 str r4, [lr, r3] + 8435 0278 8AFB0248 smull r4, r8, r10, r2 + 8436 027c 059C ldr r4, [sp, #20] + 8437 027e 8AFB04A7 smull r10, r7, r10, r4 + ARM GAS /tmp/ccFqHvis.s page 147 + + + 8438 0282 80FB0494 smull r9, r4, r0, r4 + 8439 0286 80FB020A smull r0, r10, r0, r2 + 8440 028a A8EB0404 sub r4, r8, r4 + 8441 028e 099A ldr r2, [sp, #36] + 8442 0290 BA44 add r10, r10, r7 + 8443 0292 6410 asrs r4, r4, #1 + 8444 0294 4FEA6A07 asr r7, r10, #1 + 8445 0298 46F83140 str r4, [r6, r1, lsl #3] + 8446 029c 4BF83170 str r7, [fp, r1, lsl #3] + 8447 02a0 079C ldr r4, [sp, #28] + 8448 02a2 039F ldr r7, [sp, #12] + 8449 02a4 1144 add r1, r1, r2 + 8450 02a6 069A ldr r2, [sp, #24] + 8451 02a8 85FB0208 smull r0, r8, r5, r2 + 8452 02ac 85FB0450 smull r5, r0, r5, r4 + 8453 02b0 87FB0454 smull r5, r4, r7, r4 + 8454 02b4 A8EB0404 sub r4, r8, r4 + 8455 02b8 87FB0225 smull r2, r5, r7, r2 + 8456 02bc 6410 asrs r4, r4, #1 + 8457 02be F450 str r4, [r6, r3] + 8458 02c0 0544 add r5, r5, r0 + 8459 02c2 0A9A ldr r2, [sp, #40] + 8460 02c4 6D10 asrs r5, r5, #1 + 8461 02c6 4BF80350 str r5, [fp, r3] + 8462 02ca 1344 add r3, r3, r2 + 8463 02cc 089A ldr r2, [sp, #32] + 8464 02ce 8A42 cmp r2, r1 + 8465 02d0 86D8 bhi .L887 + 8466 02d2 0F9A ldr r2, [sp, #60] + 8467 02d4 1199 ldr r1, [sp, #68] + 8468 02d6 0B9B ldr r3, [sp, #44] + 8469 02d8 0832 adds r2, r2, #8 + 8470 02da 0F92 str r2, [sp, #60] + 8471 02dc 0E9A ldr r2, [sp, #56] + 8472 02de 0A44 add r2, r2, r1 + 8473 02e0 0E92 str r2, [sp, #56] + 8474 02e2 1099 ldr r1, [sp, #64] + 8475 02e4 0D9A ldr r2, [sp, #52] + 8476 02e6 0A44 add r2, r2, r1 + 8477 02e8 0D92 str r2, [sp, #52] + 8478 02ea 1399 ldr r1, [sp, #76] + 8479 02ec 0C9A ldr r2, [sp, #48] + 8480 02ee 0A44 add r2, r2, r1 + 8481 02f0 0C92 str r2, [sp, #48] + 8482 02f2 129A ldr r2, [sp, #72] + 8483 02f4 0133 adds r3, r3, #1 + 8484 02f6 9342 cmp r3, r2 + 8485 02f8 0B93 str r3, [sp, #44] + 8486 02fa FFF45DAF bcc .L888 + 8487 02fe 169B ldr r3, [sp, #88] + 8488 0300 9B00 lsls r3, r3, #2 + 8489 0302 1693 str r3, [sp, #88] + 8490 0304 159B ldr r3, [sp, #84] + 8491 0306 042B cmp r3, #4 + 8492 0308 3FF634AF bhi .L885 + 8493 030c 6646 mov r6, ip + 8494 .L891: + ARM GAS /tmp/ccFqHvis.s page 148 + + + 8495 030e DDF85CC0 ldr ip, [sp, #92] + 8496 0312 06F12003 add r3, r6, #32 + 8497 .L886: + 8498 0316 53E90662 ldrd r6, r2, [r3, #-24] + 8499 031a 53E908B1 ldrd fp, r1, [r3, #-32] + 8500 031e 53E90404 ldrd r0, r4, [r3, #-16] + 8501 0322 53E902E8 ldrd lr, r8, [r3, #-8] + 8502 0326 8D18 adds r5, r1, r2 + 8503 0328 0BEB0609 add r9, fp, r6 + 8504 032c 8144 add r9, r9, r0 + 8505 032e 2544 add r5, r5, r4 + 8506 0330 F144 add r9, r9, lr + 8507 0332 4544 add r5, r5, r8 + 8508 0334 43E90895 strd r9, r5, [r3, #-32] + 8509 0338 ABEB0607 sub r7, fp, r6 + 8510 033c 8D1B subs r5, r1, r6 + 8511 033e A1EB0209 sub r9, r1, r2 + 8512 0342 ABEB020A sub r10, fp, r2 + 8513 0346 3144 add r1, r1, r6 + 8514 0348 5A44 add r2, r2, fp + 8515 034a 0744 add r7, r7, r0 + 8516 034c AAEB0006 sub r6, r10, r0 + 8517 0350 A144 add r9, r9, r4 + 8518 0352 101A subs r0, r2, r0 + 8519 0354 091B subs r1, r1, r4 + 8520 0356 2A1B subs r2, r5, r4 + 8521 0358 A7EB0E07 sub r7, r7, lr + 8522 035c A9EB0805 sub r5, r9, r8 + 8523 0360 4644 add r6, r6, r8 + 8524 0362 A1EB0E01 sub r1, r1, lr + 8525 0366 A0EB0800 sub r0, r0, r8 + 8526 036a 7244 add r2, r2, lr + 8527 036c BCF1010C subs ip, ip, #1 + 8528 0370 43E90675 strd r7, r5, [r3, #-24] + 8529 0374 43E90461 strd r6, r1, [r3, #-16] + 8530 0378 43E90202 strd r0, r2, [r3, #-8] + 8531 037c 03F12003 add r3, r3, #32 + 8532 0380 C9D1 bne .L886 + 8533 0382 19B0 add sp, sp, #100 + 8534 @ sp needed + 8535 0384 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 8536 .L902: + 8537 0388 1946 mov r1, r3 + 8538 038a 009A ldr r2, [sp] + 8539 038c 03EB4303 add r3, r3, r3, lsl #1 + 8540 0390 DB00 lsls r3, r3, #3 + 8541 0392 0432 adds r2, r2, #4 + 8542 0394 0793 str r3, [sp, #28] + 8543 0396 179B ldr r3, [sp, #92] + 8544 0398 1492 str r2, [sp, #80] + 8545 039a CDE90122 strd r2, r2, [sp, #4] + 8546 039e 00EB0318 add r8, r0, r3, lsl #4 + 8547 03a2 0801 lsls r0, r1, #4 + 8548 03a4 C900 lsls r1, r1, #3 + 8549 03a6 0690 str r0, [sp, #24] + 8550 03a8 0591 str r1, [sp, #20] + 8551 03aa DB00 lsls r3, r3, #3 + ARM GAS /tmp/ccFqHvis.s page 149 + + + 8552 03ac 08F10409 add r9, r8, #4 + 8553 03b0 0092 str r2, [sp] + 8554 03b2 0020 movs r0, #0 + 8555 03b4 351D adds r5, r6, #4 + 8556 .L882: + 8557 03b6 58F83020 ldr r2, [r8, r0, lsl #3] + 8558 03ba 58F80310 ldr r1, [r8, r3] + 8559 03be 56F83040 ldr r4, [r6, r0, lsl #3] + 8560 03c2 F758 ldr r7, [r6, r3] + 8561 03c4 55F830E0 ldr lr, [r5, r0, lsl #3] + 8562 03c8 1211 asrs r2, r2, #4 + 8563 03ca 0911 asrs r1, r1, #4 + 8564 03cc 02EB241C add ip, r2, r4, asr #4 + 8565 03d0 01EB2717 add r7, r1, r7, asr #4 + 8566 03d4 0CEB0701 add r1, ip, r7 + 8567 03d8 C2EB2412 rsb r2, r2, r4, asr #4 + 8568 03dc 0392 str r2, [sp, #12] + 8569 03de ACEB0702 sub r2, ip, r7 + 8570 03e2 59F83070 ldr r7, [r9, r0, lsl #3] + 8571 03e6 46F83010 str r1, [r6, r0, lsl #3] + 8572 03ea 59F80310 ldr r1, [r9, r3] + 8573 03ee 4FEA271C asr ip, r7, #4 + 8574 03f2 EF58 ldr r7, [r5, r3] + 8575 03f4 0911 asrs r1, r1, #4 + 8576 03f6 01EB2717 add r7, r1, r7, asr #4 + 8577 03fa 0CEB2E11 add r1, ip, lr, asr #4 + 8578 03fe CCEB2E1C rsb ip, ip, lr, asr #4 + 8579 0402 01EB070E add lr, r1, r7 + 8580 0406 C91B subs r1, r1, r7 + 8581 0408 029F ldr r7, [sp, #8] + 8582 040a 45F830E0 str lr, [r5, r0, lsl #3] + 8583 040e 57F8044C ldr r4, [r7, #-4] + 8584 0412 0494 str r4, [sp, #16] + 8585 0414 069C ldr r4, [sp, #24] + 8586 0416 D7F800E0 ldr lr, [r7] + 8587 041a 2744 add r7, r7, r4 + 8588 041c 0297 str r7, [sp, #8] + 8589 041e 049F ldr r7, [sp, #16] + 8590 0420 059C ldr r4, [sp, #20] + 8591 0422 82FB07BA smull fp, r10, r2, r7 + 8592 0426 87FB01B7 smull fp, r7, r7, r1 + 8593 042a 81FB0E1B smull r1, fp, r1, lr + 8594 042e 82FB0E2E smull r2, lr, r2, lr + 8595 0432 59F80320 ldr r2, [r9, r3] + 8596 0436 58F80310 ldr r1, [r8, r3] + 8597 043a BE44 add lr, lr, r7 + 8598 043c EF58 ldr r7, [r5, r3] + 8599 043e 1211 asrs r2, r2, #4 + 8600 0440 C2EB2712 rsb r2, r2, r7, asr #4 + 8601 0444 F758 ldr r7, [r6, r3] + 8602 0446 0911 asrs r1, r1, #4 + 8603 0448 AAEB0B0B sub fp, r10, fp + 8604 044c C1EB271A rsb r10, r1, r7, asr #4 + 8605 0450 009F ldr r7, [sp] + 8606 0452 4FEA4B0B lsl fp, fp, #1 + 8607 0456 4FEA4E0E lsl lr, lr, #1 + 8608 045a 46F803B0 str fp, [r6, r3] + ARM GAS /tmp/ccFqHvis.s page 150 + + + 8609 045e 3C19 adds r4, r7, r4 + 8610 0460 45F803E0 str lr, [r5, r3] + 8611 0464 0094 str r4, [sp] + 8612 0466 039C ldr r4, [sp, #12] + 8613 0468 57E901E1 ldrd lr, r1, [r7, #-4] + 8614 046c A71A subs r7, r4, r2 + 8615 046e 1444 add r4, r4, r2 + 8616 0470 0394 str r4, [sp, #12] + 8617 0472 0CEB0A04 add r4, ip, r10 + 8618 0476 ACEB0A0C sub ip, ip, r10 + 8619 047a 87FB0EBA smull fp, r10, r7, lr + 8620 047e 8EFB04BE smull fp, lr, lr, r4 + 8621 0482 84FB014B smull r4, fp, r4, r1 + 8622 0486 87FB0171 smull r7, r1, r7, r1 + 8623 048a 7144 add r1, r1, lr + 8624 048c AAEB0B04 sub r4, r10, fp + 8625 0490 6400 lsls r4, r4, #1 + 8626 0492 4900 lsls r1, r1, #1 + 8627 0494 48F83040 str r4, [r8, r0, lsl #3] + 8628 0498 49F83010 str r1, [r9, r0, lsl #3] + 8629 049c 019C ldr r4, [sp, #4] + 8630 049e 079A ldr r2, [sp, #28] + 8631 04a0 54E90171 ldrd r7, r1, [r4, #-4] + 8632 04a4 1444 add r4, r4, r2 + 8633 04a6 039A ldr r2, [sp, #12] + 8634 04a8 0194 str r4, [sp, #4] + 8635 04aa 82FB07E4 smull lr, r4, r2, r7 + 8636 04ae 87FB0CE7 smull lr, r7, r7, ip + 8637 04b2 8CFB01CE smull ip, lr, ip, r1 + 8638 04b6 82FB0121 smull r2, r1, r2, r1 + 8639 04ba 179A ldr r2, [sp, #92] + 8640 04bc 0130 adds r0, r0, #1 + 8641 04be A4EB0E04 sub r4, r4, lr + 8642 04c2 3944 add r1, r1, r7 + 8643 04c4 6400 lsls r4, r4, #1 + 8644 04c6 4900 lsls r1, r1, #1 + 8645 04c8 8242 cmp r2, r0 + 8646 04ca 48F80340 str r4, [r8, r3] + 8647 04ce 49F80310 str r1, [r9, r3] + 8648 04d2 03F10803 add r3, r3, #8 + 8649 04d6 7FF46EAF bne .L882 + 8650 04da 41E6 b .L883 + 8652 .section .text.arm_cfft_radix4by2_inverse_q31,"ax",%progbits + 8653 .align 1 + 8654 .p2align 2,,3 + 8655 .global arm_cfft_radix4by2_inverse_q31 + 8656 .syntax unified + 8657 .thumb + 8658 .thumb_func + 8659 .fpu fpv4-sp-d16 + 8661 arm_cfft_radix4by2_inverse_q31: + 8662 @ args = 0, pretend = 0, frame = 16 + 8663 @ frame_needed = 0, uses_anonymous_args = 0 + 8664 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8665 0004 85B0 sub sp, sp, #20 + 8666 0006 4B08 lsrs r3, r1, #1 + 8667 0008 0391 str r1, [sp, #12] + ARM GAS /tmp/ccFqHvis.s page 151 + + + 8668 000a 0446 mov r4, r0 + 8669 000c 0192 str r2, [sp, #4] + 8670 000e 0093 str r3, [sp] + 8671 0010 6ED0 beq .L904 + 8672 0012 00EBC307 add r7, r0, r3, lsl #3 + 8673 0016 0432 adds r2, r2, #4 + 8674 0018 0023 movs r3, #0 + 8675 001a 07F10409 add r9, r7, #4 + 8676 001e 0292 str r2, [sp, #8] + 8677 0020 00F10408 add r8, r0, #4 + 8678 0024 4FF00046 mov r6, #-2147483648 + 8679 0028 9E46 mov lr, r3 + 8680 002a BC46 mov ip, r7 + 8681 .L905: + 8682 002c 5CF83300 ldr r0, [ip, r3, lsl #3] + 8683 0030 019A ldr r2, [sp, #4] + 8684 0032 54F83310 ldr r1, [r4, r3, lsl #3] + 8685 0036 52F83370 ldr r7, [r2, r3, lsl #3] + 8686 003a 029A ldr r2, [sp, #8] + 8687 003c 8010 asrs r0, r0, #2 + 8688 003e 00EBA105 add r5, r0, r1, asr #2 + 8689 0042 52F83320 ldr r2, [r2, r3, lsl #3] + 8690 0046 44F83350 str r5, [r4, r3, lsl #3] + 8691 004a C0EBA100 rsb r0, r0, r1, asr #2 + 8692 004e 59F83310 ldr r1, [r9, r3, lsl #3] + 8693 0052 58F833B0 ldr fp, [r8, r3, lsl #3] + 8694 0056 8D10 asrs r5, r1, #2 + 8695 0058 F246 mov r10, lr + 8696 005a 3146 mov r1, r6 + 8697 005c C0FB071A smlal r1, r10, r0, r7 + 8698 0060 C5EBAB01 rsb r1, r5, fp, asr #2 + 8699 0064 05EBAB05 add r5, r5, fp, asr #2 + 8700 0068 48F83350 str r5, [r8, r3, lsl #3] + 8701 006c B346 mov fp, r6 + 8702 006e 7546 mov r5, lr + 8703 0070 C7FB01B5 smlal fp, r5, r7, r1 + 8704 0074 7746 mov r7, lr + 8705 0076 C0FB0275 smlal r7, r5, r0, r2 + 8706 007a 81FB0212 smull r1, r2, r1, r2 + 8707 007e 4842 rsbs r0, r1, #0 + 8708 0080 6AEB0202 sbc r2, r10, r2 + 8709 0084 10F10040 adds r0, r0, #-2147483648 + 8710 0088 42F10002 adc r2, r2, #0 + 8711 008c 17F10047 adds r7, r7, #-2147483648 + 8712 0090 45F10005 adc r5, r5, #0 + 8713 0094 5200 lsls r2, r2, #1 + 8714 0096 4CF83320 str r2, [ip, r3, lsl #3] + 8715 009a 6D00 lsls r5, r5, #1 + 8716 009c 009A ldr r2, [sp] + 8717 009e 49F83350 str r5, [r9, r3, lsl #3] + 8718 00a2 0133 adds r3, r3, #1 + 8719 00a4 9A42 cmp r2, r3 + 8720 00a6 C1D1 bne .L905 + 8721 00a8 019E ldr r6, [sp, #4] + 8722 00aa 1546 mov r5, r2 + 8723 00ac 2946 mov r1, r5 + 8724 00ae 0223 movs r3, #2 + ARM GAS /tmp/ccFqHvis.s page 152 + + + 8725 00b0 3246 mov r2, r6 + 8726 00b2 2046 mov r0, r4 + 8727 00b4 FFF7FEFF bl arm_radix4_butterfly_inverse_q31 + 8728 00b8 0398 ldr r0, [sp, #12] + 8729 00ba 2946 mov r1, r5 + 8730 00bc 0223 movs r3, #2 + 8731 00be 3246 mov r2, r6 + 8732 00c0 04EB8000 add r0, r4, r0, lsl #2 + 8733 00c4 FFF7FEFF bl arm_radix4_butterfly_inverse_q31 + 8734 00c8 04EB0515 add r5, r4, r5, lsl #4 + 8735 .L907: + 8736 00cc D4E90001 ldrd r0, r1, [r4] + 8737 00d0 D4E90223 ldrd r2, r3, [r4, #8] + 8738 00d4 4000 lsls r0, r0, #1 + 8739 00d6 4900 lsls r1, r1, #1 + 8740 00d8 5200 lsls r2, r2, #1 + 8741 00da 5B00 lsls r3, r3, #1 + 8742 00dc C4E90001 strd r0, r1, [r4] + 8743 00e0 C4E90223 strd r2, r3, [r4, #8] + 8744 00e4 1034 adds r4, r4, #16 + 8745 00e6 A542 cmp r5, r4 + 8746 00e8 F0D1 bne .L907 + 8747 00ea 05B0 add sp, sp, #20 + 8748 @ sp needed + 8749 00ec BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 8750 .L904: + 8751 00f0 1D46 mov r5, r3 + 8752 00f2 2946 mov r1, r5 + 8753 00f4 0223 movs r3, #2 + 8754 00f6 FFF7FEFF bl arm_radix4_butterfly_inverse_q31 + 8755 00fa 0398 ldr r0, [sp, #12] + 8756 00fc 019A ldr r2, [sp, #4] + 8757 00fe 0223 movs r3, #2 + 8758 0100 2946 mov r1, r5 + 8759 0102 04EB8000 add r0, r4, r0, lsl #2 + 8760 0106 05B0 add sp, sp, #20 + 8761 @ sp needed + 8762 0108 BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8763 010c FFF7FEBF b arm_radix4_butterfly_inverse_q31 + 8765 .section .text.arm_cfft_q31,"ax",%progbits + 8766 .align 1 + 8767 .p2align 2,,3 + 8768 .global arm_cfft_q31 + 8769 .syntax unified + 8770 .thumb + 8771 .thumb_func + 8772 .fpu fpv4-sp-d16 + 8774 arm_cfft_q31: + 8775 @ args = 0, pretend = 0, frame = 0 + 8776 @ frame_needed = 0, uses_anonymous_args = 0 + 8777 0000 012A cmp r2, #1 + 8778 0002 F8B5 push {r3, r4, r5, r6, r7, lr} + 8779 0004 B0F800C0 ldrh ip, [r0] + 8780 0008 0646 mov r6, r0 + 8781 000a 0C46 mov r4, r1 + 8782 000c 1D46 mov r5, r3 + 8783 000e 55D0 beq .L985 + ARM GAS /tmp/ccFqHvis.s page 153 + + + 8784 0010 BCF5807F cmp ip, #256 + 8785 0014 27D0 beq .L921 + 8786 0016 08D9 bls .L986 + 8787 0018 BCF5006F cmp ip, #2048 + 8788 001c 15D0 beq .L924 + 8789 001e 1CD9 bls .L987 + 8790 0020 BCF5805F cmp ip, #4096 + 8791 0024 1FD0 beq .L921 + 8792 .L919: + 8793 0026 35BB cbnz r5, .L988 + 8794 .L913: + 8795 0028 F8BD pop {r3, r4, r5, r6, r7, pc} + 8796 .L986: + 8797 002a BCF1400F cmp ip, #64 + 8798 002e 1AD0 beq .L921 + 8799 0030 05D9 bls .L989 + 8800 0032 BCF1800F cmp ip, #128 + 8801 0036 08D0 beq .L924 + 8802 0038 002D cmp r5, #0 + 8803 003a F5D0 beq .L913 + 8804 003c 1BE0 b .L988 + 8805 .L989: + 8806 003e BCF1100F cmp ip, #16 + 8807 0042 10D0 beq .L921 + 8808 0044 BCF1200F cmp ip, #32 + 8809 0048 EDD1 bne .L919 + 8810 .L924: + 8811 004a 7268 ldr r2, [r6, #4] + 8812 004c 6146 mov r1, ip + 8813 004e 2046 mov r0, r4 + 8814 0050 FFF7FEFF bl arm_cfft_radix4by2_q31 + 8815 0054 002D cmp r5, #0 + 8816 0056 E7D0 beq .L913 + 8817 0058 0DE0 b .L988 + 8818 .L987: + 8819 005a BCF5007F cmp ip, #512 + 8820 005e F4D0 beq .L924 + 8821 0060 BCF5806F cmp ip, #1024 + 8822 0064 DFD1 bne .L919 + 8823 .L921: + 8824 0066 7268 ldr r2, [r6, #4] + 8825 0068 0123 movs r3, #1 + 8826 006a 6146 mov r1, ip + 8827 006c 2046 mov r0, r4 + 8828 006e FFF7FEFF bl arm_radix4_butterfly_q31 + 8829 0072 002D cmp r5, #0 + 8830 0074 D8D0 beq .L913 + 8831 .L988: + 8832 0076 B589 ldrh r5, [r6, #12] + 8833 0078 B668 ldr r6, [r6, #8] + 8834 007a 002D cmp r5, #0 + 8835 007c D4D0 beq .L913 + 8836 007e 0021 movs r1, #0 + 8837 0080 06F1020C add ip, r6, #2 + 8838 .L927: + 8839 0084 36F81120 ldrh r2, [r6, r1, lsl #1] + 8840 0088 3CF81130 ldrh r3, [ip, r1, lsl #1] + ARM GAS /tmp/ccFqHvis.s page 154 + + + 8841 008c 9208 lsrs r2, r2, #2 + 8842 008e 9B08 lsrs r3, r3, #2 + 8843 0090 54F82270 ldr r7, [r4, r2, lsl #2] + 8844 0094 54F82300 ldr r0, [r4, r3, lsl #2] + 8845 0098 44F82200 str r0, [r4, r2, lsl #2] + 8846 009c 44F82370 str r7, [r4, r3, lsl #2] + 8847 00a0 0132 adds r2, r2, #1 + 8848 00a2 0133 adds r3, r3, #1 + 8849 00a4 0231 adds r1, r1, #2 + 8850 00a6 54F82200 ldr r0, [r4, r2, lsl #2] + 8851 00aa 54F82370 ldr r7, [r4, r3, lsl #2] + 8852 00ae 44F82270 str r7, [r4, r2, lsl #2] + 8853 00b2 A942 cmp r1, r5 + 8854 00b4 44F82300 str r0, [r4, r3, lsl #2] + 8855 00b8 E4D3 bcc .L927 + 8856 00ba F8BD pop {r3, r4, r5, r6, r7, pc} + 8857 .L985: + 8858 00bc BCF5807F cmp ip, #256 + 8859 00c0 28D0 beq .L915 + 8860 00c2 09D9 bls .L990 + 8861 00c4 BCF5006F cmp ip, #2048 + 8862 00c8 16D0 beq .L918 + 8863 00ca 1DD9 bls .L991 + 8864 00cc BCF5805F cmp ip, #4096 + 8865 00d0 20D0 beq .L915 + 8866 00d2 002D cmp r5, #0 + 8867 00d4 A8D0 beq .L913 + 8868 00d6 CEE7 b .L988 + 8869 .L990: + 8870 00d8 BCF1400F cmp ip, #64 + 8871 00dc 1AD0 beq .L915 + 8872 00de 05D9 bls .L992 + 8873 00e0 BCF1800F cmp ip, #128 + 8874 00e4 08D0 beq .L918 + 8875 00e6 002D cmp r5, #0 + 8876 00e8 9ED0 beq .L913 + 8877 00ea C4E7 b .L988 + 8878 .L992: + 8879 00ec BCF1100F cmp ip, #16 + 8880 00f0 10D0 beq .L915 + 8881 00f2 BCF1200F cmp ip, #32 + 8882 00f6 96D1 bne .L919 + 8883 .L918: + 8884 00f8 7268 ldr r2, [r6, #4] + 8885 00fa 6146 mov r1, ip + 8886 00fc 2046 mov r0, r4 + 8887 00fe FFF7FEFF bl arm_cfft_radix4by2_inverse_q31 + 8888 0102 002D cmp r5, #0 + 8889 0104 90D0 beq .L913 + 8890 0106 B6E7 b .L988 + 8891 .L991: + 8892 0108 BCF5007F cmp ip, #512 + 8893 010c F4D0 beq .L918 + 8894 010e BCF5806F cmp ip, #1024 + 8895 0112 88D1 bne .L919 + 8896 .L915: + 8897 0114 7268 ldr r2, [r6, #4] + ARM GAS /tmp/ccFqHvis.s page 155 + + + 8898 0116 0123 movs r3, #1 + 8899 0118 6146 mov r1, ip + 8900 011a 2046 mov r0, r4 + 8901 011c FFF7FEFF bl arm_radix4_butterfly_inverse_q31 + 8902 0120 002D cmp r5, #0 + 8903 0122 81D0 beq .L913 + 8904 0124 A7E7 b .L988 + 8906 0126 00BF .section .text.arm_cfft_radix4_q31,"ax",%progbits + 8907 .align 1 + 8908 .p2align 2,,3 + 8909 .global arm_cfft_radix4_q31 + 8910 .syntax unified + 8911 .thumb + 8912 .thumb_func + 8913 .fpu fpv4-sp-d16 + 8915 arm_cfft_radix4_q31: + 8916 @ args = 0, pretend = 0, frame = 8 + 8917 @ frame_needed = 0, uses_anonymous_args = 0 + 8918 0000 10B5 push {r4, lr} + 8919 0002 8378 ldrb r3, [r0, #2] @ zero_extendqisi2 + 8920 0004 0446 mov r4, r0 + 8921 0006 82B0 sub sp, sp, #8 + 8922 0008 0846 mov r0, r1 + 8923 000a 012B cmp r3, #1 + 8924 000c 6268 ldr r2, [r4, #4] + 8925 000e A389 ldrh r3, [r4, #12] + 8926 0010 2188 ldrh r1, [r4] + 8927 0012 0190 str r0, [sp, #4] + 8928 0014 07D0 beq .L998 + 8929 0016 FFF7FEFF bl arm_radix4_butterfly_q31 + 8930 001a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 8931 001c 0198 ldr r0, [sp, #4] + 8932 001e 012B cmp r3, #1 + 8933 0020 07D0 beq .L999 + 8934 .L993: + 8935 0022 02B0 add sp, sp, #8 + 8936 @ sp needed + 8937 0024 10BD pop {r4, pc} + 8938 .L998: + 8939 0026 FFF7FEFF bl arm_radix4_butterfly_inverse_q31 + 8940 002a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 + 8941 002c 0198 ldr r0, [sp, #4] + 8942 002e 012B cmp r3, #1 + 8943 0030 F7D1 bne .L993 + 8944 .L999: + 8945 0032 A368 ldr r3, [r4, #8] + 8946 0034 E289 ldrh r2, [r4, #14] + 8947 0036 2188 ldrh r1, [r4] + 8948 0038 02B0 add sp, sp, #8 + 8949 @ sp needed + 8950 003a BDE81040 pop {r4, lr} + 8951 003e FFF7FEBF b arm_bitreversal_q31 + 8953 0042 00BF .section .text.arm_radix8_butterfly_f32,"ax",%progbits + 8954 .align 1 + 8955 .p2align 2,,3 + 8956 .global arm_radix8_butterfly_f32 + 8957 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 156 + + + 8958 .thumb + 8959 .thumb_func + 8960 .fpu fpv4-sp-d16 + 8962 arm_radix8_butterfly_f32: + 8963 @ args = 0, pretend = 0, frame = 56 + 8964 @ frame_needed = 0, uses_anonymous_args = 0 + 8965 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 8966 0004 2DED108B vpush.64 {d8, d9, d10, d11, d12, d13, d14, d15} + 8967 0008 8FB0 sub sp, sp, #60 + 8968 000a CDE90A32 strd r3, r2, [sp, #40] + 8969 000e 0346 mov r3, r0 + 8970 0010 0433 adds r3, r3, #4 + 8971 0012 9FEDB14A vldr.32 s8, .L1010 + 8972 0016 0C90 str r0, [sp, #48] + 8973 0018 8A46 mov r10, r1 + 8974 001a 8B46 mov fp, r1 + 8975 001c 0D93 str r3, [sp, #52] + 8976 .L1005: + 8977 001e 4FEADB07 lsr r7, fp, #3 + 8978 0022 07EB8700 add r0, r7, r7, lsl #2 + 8979 0026 C000 lsls r0, r0, #3 + 8980 0028 0390 str r0, [sp, #12] + 8981 002a C7EBC700 rsb r0, r7, r7, lsl #3 + 8982 002e 0C9B ldr r3, [sp, #48] + 8983 0030 0997 str r7, [sp, #36] + 8984 0032 4FEAC708 lsl r8, r7, #3 + 8985 0036 4FEACB04 lsl r4, fp, #3 + 8986 003a 4FEA0719 lsl r9, r7, #4 + 8987 003e C000 lsls r0, r0, #3 + 8988 0040 0194 str r4, [sp, #4] + 8989 0042 0690 str r0, [sp, #24] + 8990 0044 08F10404 add r4, r8, #4 + 8991 0048 09F10400 add r0, r9, #4 + 8992 004c 03EB4711 add r1, r3, r7, lsl #5 + 8993 0050 07EB4706 add r6, r7, r7, lsl #1 + 8994 0054 1C44 add r4, r4, r3 + 8995 0056 1844 add r0, r0, r3 + 8996 0058 7B01 lsls r3, r7, #5 + 8997 005a 0293 str r3, [sp, #8] + 8998 005c 3301 lsls r3, r6, #4 + 8999 005e 01EB0715 add r5, r1, r7, lsl #4 + 9000 0062 A7EB8702 sub r2, r7, r7, lsl #2 + 9001 0066 0493 str r3, [sp, #16] + 9002 0068 F300 lsls r3, r6, #3 + 9003 006a 05EBC202 add r2, r5, r2, lsl #3 + 9004 006e 0593 str r3, [sp, #20] + 9005 0070 0D9E ldr r6, [sp, #52] + 9006 0072 019B ldr r3, [sp, #4] + 9007 0074 01EBC70C add ip, r1, r7, lsl #3 + 9008 0078 4FF0000E mov lr, #0 + 9009 007c 02EB4717 add r7, r2, r7, lsl #5 + 9010 .L1001: + 9011 0080 D1ED003A vldr.32 s7, [r1] + 9012 0084 9CED003A vldr.32 s6, [ip] + 9013 0088 D5ED004A vldr.32 s9, [r5] + 9014 008c 97ED002A vldr.32 s4, [r7] + 9015 0090 16ED017A vldr.32 s14, [r6, #-4] + ARM GAS /tmp/ccFqHvis.s page 157 + + + 9016 0094 54ED015A vldr.32 s11, [r4, #-4] + 9017 0098 50ED017A vldr.32 s15, [r0, #-4] + 9018 009c D2ED001A vldr.32 s3, [r2] + 9019 00a0 35EE831A vadd.f32 s2, s11, s6 + 9020 00a4 37EEA48A vadd.f32 s16, s15, s9 + 9021 00a8 31EE820A vadd.f32 s0, s3, s4 + 9022 00ac 37EE235A vadd.f32 s10, s14, s7 + 9023 00b0 31EE006A vadd.f32 s12, s2, s0 + 9024 00b4 75EE086A vadd.f32 s13, s10, s16 + 9025 00b8 75EEC35A vsub.f32 s11, s11, s6 + 9026 00bc 36EE863A vadd.f32 s6, s13, s12 + 9027 00c0 76EEC66A vsub.f32 s13, s13, s12 + 9028 00c4 06ED013A vstr.32 s6, [r6, #-4] + 9029 00c8 C1ED006A vstr.32 s13, [r1] + 9030 00cc 94ED006A vldr.32 s12, [r4] + 9031 00d0 DCED01AA vldr.32 s21, [ip, #4] + 9032 00d4 92ED013A vldr.32 s6, [r2, #4] + 9033 00d8 D7ED019A vldr.32 s19, [r7, #4] + 9034 00dc D6ED006A vldr.32 s13, [r6] + 9035 00e0 91ED01BA vldr.32 s22, [r1, #4] + 9036 00e4 D0ED002A vldr.32 s5, [r0] + 9037 00e8 95ED01AA vldr.32 s20, [r5, #4] + 9038 00ec 71EEC21A vsub.f32 s3, s3, s4 + 9039 00f0 73EE690A vsub.f32 s1, s6, s19 + 9040 00f4 36EE6A2A vsub.f32 s4, s12, s21 + 9041 00f8 37EE637A vsub.f32 s14, s14, s7 + 9042 00fc 75EEE18A vsub.f32 s17, s11, s3 + 9043 0100 77EEE47A vsub.f32 s15, s15, s9 + 9044 0104 76EECB4A vsub.f32 s9, s13, s22 + 9045 0108 32EE609A vsub.f32 s18, s4, s1 + 9046 010c 72EECA3A vsub.f32 s7, s5, s20 + 9047 0110 32EE202A vadd.f32 s4, s4, s1 + 9048 0114 F0EE470A vmov.f32 s1, s14 + 9049 0118 75EEA15A vadd.f32 s11, s11, s3 + 9050 011c E8EEC40A vfms.f32 s1, s17, s8 + 9051 0120 DE44 add lr, lr, fp + 9052 0122 F245 cmp r10, lr + 9053 0124 A8EE847A vfma.f32 s14, s17, s8 + 9054 0128 F0EE648A vmov.f32 s17, s9 + 9055 012c E9EE448A vfms.f32 s17, s18, s8 + 9056 0130 E9EE044A vfma.f32 s9, s18, s8 + 9057 0134 F0EE671A vmov.f32 s3, s15 + 9058 0138 B0EE639A vmov.f32 s18, s7 + 9059 013c E5EEC41A vfms.f32 s3, s11, s8 + 9060 0140 E2EE043A vfma.f32 s7, s4, s8 + 9061 0144 E5EE847A vfma.f32 s15, s11, s8 + 9062 0148 A2EE449A vfms.f32 s18, s4, s8 + 9063 014c 72EE8A2A vadd.f32 s5, s5, s20 + 9064 0150 33EE293A vadd.f32 s6, s6, s19 + 9065 0154 76EE8B6A vadd.f32 s13, s13, s22 + 9066 0158 36EE2A6A vadd.f32 s12, s12, s21 + 9067 015c 36EEE22A vsub.f32 s4, s13, s5 + 9068 0160 35EE485A vsub.f32 s10, s10, s16 + 9069 0164 71EE405A vsub.f32 s11, s2, s0 + 9070 0168 76EEA26A vadd.f32 s13, s13, s5 + 9071 016c 76EE432A vsub.f32 s5, s12, s6 + 9072 0170 36EE036A vadd.f32 s12, s12, s6 + ARM GAS /tmp/ccFqHvis.s page 158 + + + 9073 0174 35EE220A vadd.f32 s0, s10, s5 + 9074 0178 36EE868A vadd.f32 s16, s13, s12 + 9075 017c 32EE651A vsub.f32 s2, s4, s11 + 9076 0180 76EEC66A vsub.f32 s13, s13, s12 + 9077 0184 35EE625A vsub.f32 s10, s10, s5 + 9078 0188 75EE825A vadd.f32 s11, s11, s4 + 9079 018c 70EE892A vadd.f32 s5, s1, s18 + 9080 0190 37EE232A vadd.f32 s4, s14, s7 + 9081 0194 30EEC93A vsub.f32 s6, s1, s18 + 9082 0198 37EE637A vsub.f32 s14, s14, s7 + 9083 019c 31EEA86A vadd.f32 s12, s3, s17 + 9084 01a0 74EEE73A vsub.f32 s7, s9, s15 + 9085 01a4 77EEA47A vadd.f32 s15, s15, s9 + 9086 01a8 78EEE14A vsub.f32 s9, s17, s3 + 9087 01ac 86ED008A vstr.32 s16, [r6] + 9088 01b0 C1ED016A vstr.32 s13, [r1, #4] + 9089 01b4 1E44 add r6, r6, r3 + 9090 01b6 00ED010A vstr.32 s0, [r0, #-4] + 9091 01ba 1944 add r1, r1, r3 + 9092 01bc 85ED005A vstr.32 s10, [r5] + 9093 01c0 80ED001A vstr.32 s2, [r0] + 9094 01c4 C5ED015A vstr.32 s11, [r5, #4] + 9095 01c8 1844 add r0, r0, r3 + 9096 01ca 04ED012A vstr.32 s4, [r4, #-4] + 9097 01ce 1D44 add r5, r5, r3 + 9098 01d0 87ED007A vstr.32 s14, [r7] + 9099 01d4 CCED002A vstr.32 s5, [ip] + 9100 01d8 82ED003A vstr.32 s6, [r2] + 9101 01dc C4ED003A vstr.32 s7, [r4] + 9102 01e0 C7ED017A vstr.32 s15, [r7, #4] + 9103 01e4 1C44 add r4, r4, r3 + 9104 01e6 CCED014A vstr.32 s9, [ip, #4] + 9105 01ea 1F44 add r7, r7, r3 + 9106 01ec 82ED016A vstr.32 s12, [r2, #4] + 9107 01f0 9C44 add ip, ip, r3 + 9108 01f2 1A44 add r2, r2, r3 + 9109 01f4 3FF644AF bhi .L1001 + 9110 01f8 9C46 mov ip, r3 + 9111 01fa 099B ldr r3, [sp, #36] + 9112 01fc 072B cmp r3, #7 + 9113 01fe 40F28B81 bls .L1000 + 9114 0202 029F ldr r7, [sp, #8] + 9115 0204 0C9B ldr r3, [sp, #48] + 9116 0206 039D ldr r5, [sp, #12] + 9117 0208 049C ldr r4, [sp, #16] + 9118 020a 0598 ldr r0, [sp, #20] + 9119 020c 0699 ldr r1, [sp, #24] + 9120 020e 0837 adds r7, r7, #8 + 9121 0210 3B44 add r3, r3, r7 + 9122 0212 0C9F ldr r7, [sp, #48] + 9123 0214 0893 str r3, [sp, #32] + 9124 0216 08F10806 add r6, r8, #8 + 9125 021a BB19 adds r3, r7, r6 + 9126 021c 0835 adds r5, r5, #8 + 9127 021e 0834 adds r4, r4, #8 + 9128 0220 0793 str r3, [sp, #28] + 9129 0222 7B19 adds r3, r7, r5 + ARM GAS /tmp/ccFqHvis.s page 159 + + + 9130 0224 0830 adds r0, r0, #8 + 9131 0226 0693 str r3, [sp, #24] + 9132 0228 3B19 adds r3, r7, r4 + 9133 022a 0831 adds r1, r1, #8 + 9134 022c 0593 str r3, [sp, #20] + 9135 022e 3B18 adds r3, r7, r0 + 9136 0230 09F10C02 add r2, r9, #12 + 9137 0234 0493 str r3, [sp, #16] + 9138 0236 7B18 adds r3, r7, r1 + 9139 0238 0393 str r3, [sp, #12] + 9140 023a BB18 adds r3, r7, r2 + 9141 023c 0193 str r3, [sp, #4] + 9142 023e 07F10C03 add r3, r7, #12 + 9143 0242 0293 str r3, [sp, #8] + 9144 0244 4FF00109 mov r9, #1 + 9145 0248 4FF00008 mov r8, #0 + 9146 024c 6346 mov r3, ip + 9147 .L1004: + 9148 024e 0A9A ldr r2, [sp, #40] + 9149 0250 9044 add r8, r8, r2 + 9150 0252 0B9A ldr r2, [sp, #44] + 9151 0254 02EBC802 add r2, r2, r8, lsl #3 + 9152 0258 92ED00EA vldr.32 s28, [r2] + 9153 025c 02EBC802 add r2, r2, r8, lsl #3 + 9154 0260 D2ED00DA vldr.32 s27, [r2] + 9155 0264 02EBC802 add r2, r2, r8, lsl #3 + 9156 0268 92ED00DA vldr.32 s26, [r2] + 9157 026c 02EBC802 add r2, r2, r8, lsl #3 + 9158 0270 D2ED00CA vldr.32 s25, [r2] + 9159 0274 02EBC802 add r2, r2, r8, lsl #3 + 9160 0278 92ED00CA vldr.32 s24, [r2] + 9161 027c 02EBC802 add r2, r2, r8, lsl #3 + 9162 0280 A8EB8801 sub r1, r8, r8, lsl #2 + 9163 0284 D2ED00BA vldr.32 s23, [r2] + 9164 0288 02EBC802 add r2, r2, r8, lsl #3 + 9165 028c 92ED00BA vldr.32 s22, [r2] + 9166 0290 D2ED01AA vldr.32 s21, [r2, #4] + 9167 0294 02EB0112 add r2, r2, r1, lsl #4 + 9168 0298 92ED01AA vldr.32 s20, [r2, #4] + 9169 029c 02EBC802 add r2, r2, r8, lsl #3 + 9170 02a0 D2ED019A vldr.32 s19, [r2, #4] + 9171 02a4 02EBC802 add r2, r2, r8, lsl #3 + 9172 02a8 92ED019A vldr.32 s18, [r2, #4] + 9173 02ac 02EBC802 add r2, r2, r8, lsl #3 + 9174 02b0 D2ED018A vldr.32 s17, [r2, #4] + 9175 02b4 02EBC802 add r2, r2, r8, lsl #3 + 9176 02b8 92ED018A vldr.32 s16, [r2, #4] + 9177 02bc 02EBC802 add r2, r2, r8, lsl #3 + 9178 02c0 92ED010A vldr.32 s0, [r2, #4] + 9179 02c4 DDE901C7 ldrd ip, r7, [sp, #4] + 9180 02c8 DDE90365 ldrd r6, r5, [sp, #12] + 9181 02cc DDE90540 ldrd r4, r0, [sp, #20] + 9182 02d0 DDE90712 ldrd r1, r2, [sp, #28] + 9183 02d4 CE46 mov lr, r9 + 9184 02d6 01E0 b .L1011 + 9185 .L1012: + 9186 .align 2 + ARM GAS /tmp/ccFqHvis.s page 160 + + + 9187 .L1010: + 9188 02d8 F304353F .word 1060439283 + 9189 .L1011: + 9190 .L1003: + 9191 02dc D2ED005A vldr.32 s11, [r2] + 9192 02e0 D0ED006A vldr.32 s13, [r0] + 9193 02e4 5CED010A vldr.32 s1, [ip, #-4] + 9194 02e8 96ED00FA vldr.32 s30, [r6] + 9195 02ec 57ED014A vldr.32 s9, [r7, #-4] + 9196 02f0 91ED001A vldr.32 s2, [r1] + 9197 02f4 94ED005A vldr.32 s10, [r4] + 9198 02f8 D5ED001A vldr.32 s3, [r5] + 9199 02fc D7ED00FA vldr.32 s31, [r7] + 9200 0300 71EE26EA vadd.f32 s29, s2, s13 + 9201 0304 30EE856A vadd.f32 s12, s1, s10 + 9202 0308 34EEA53A vadd.f32 s6, s9, s11 + 9203 030c 71EE8F3A vadd.f32 s7, s3, s30 + 9204 0310 33EE067A vadd.f32 s14, s6, s12 + 9205 0314 7EEEA37A vadd.f32 s15, s29, s7 + 9206 0318 31EE661A vsub.f32 s2, s2, s13 + 9207 031c 77EE272A vadd.f32 s5, s14, s15 + 9208 0320 74EEE54A vsub.f32 s9, s9, s11 + 9209 0324 47ED012A vstr.32 s5, [r7, #-4] + 9210 0328 D0ED016A vldr.32 s13, [r0, #4] + 9211 032c D1ED012A vldr.32 s5, [r1, #4] + 9212 0330 D5ED015A vldr.32 s11, [r5, #4] + 9213 0334 92ED012A vldr.32 s4, [r2, #4] + 9214 0338 37EE677A vsub.f32 s14, s14, s15 + 9215 033c D6ED017A vldr.32 s15, [r6, #4] + 9216 0340 71EECF1A vsub.f32 s3, s3, s30 + 9217 0344 30EEC55A vsub.f32 s10, s1, s10 + 9218 0348 32EEE6FA vsub.f32 s30, s5, s13 + 9219 034c DCED000A vldr.32 s1, [ip] + 9220 0350 72EEA62A vadd.f32 s5, s5, s13 + 9221 0354 D4ED016A vldr.32 s13, [r4, #4] + 9222 0358 7EEEE33A vsub.f32 s7, s29, s7 + 9223 035c 75EEE7EA vsub.f32 s29, s11, s15 + 9224 0360 75EEA77A vadd.f32 s15, s11, s15 + 9225 0364 70EEE65A vsub.f32 s11, s1, s13 + 9226 0368 70EEA66A vadd.f32 s13, s1, s13 + 9227 036c 71EE610A vsub.f32 s1, s2, s3 + 9228 0370 33EE463A vsub.f32 s6, s6, s12 + 9229 0374 71EE211A vadd.f32 s3, s2, s3 + 9230 0378 3FEEC26A vsub.f32 s12, s31, s4 + 9231 037c 3FEE6E1A vsub.f32 s2, s30, s29 + 9232 0380 3FEE2EFA vadd.f32 s30, s30, s29 + 9233 0384 F0EE64EA vmov.f32 s29, s9 + 9234 0388 E0EEC4EA vfms.f32 s29, s1, s8 + 9235 038c DE44 add lr, lr, fp + 9236 038e F245 cmp r10, lr + 9237 0390 E0EE844A vfma.f32 s9, s1, s8 + 9238 0394 F0EE450A vmov.f32 s1, s10 + 9239 0398 E1EEC40A vfms.f32 s1, s3, s8 + 9240 039c A1EE845A vfma.f32 s10, s3, s8 + 9241 03a0 F0EE461A vmov.f32 s3, s12 + 9242 03a4 E1EE441A vfms.f32 s3, s2, s8 + 9243 03a8 A1EE046A vfma.f32 s12, s2, s8 + ARM GAS /tmp/ccFqHvis.s page 161 + + + 9244 03ac B0EE651A vmov.f32 s2, s11 + 9245 03b0 AFEE441A vfms.f32 s2, s30, s8 + 9246 03b4 EFEE045A vfma.f32 s11, s30, s8 + 9247 03b8 3FEE822A vadd.f32 s4, s31, s4 + 9248 03bc 34EEA5FA vadd.f32 s30, s9, s11 + 9249 03c0 7EEE81FA vadd.f32 s31, s29, s2 + 9250 03c4 3EEEC11A vsub.f32 s2, s29, s2 + 9251 03c8 76EE45EA vsub.f32 s29, s12, s10 + 9252 03cc 74EEE55A vsub.f32 s11, s9, s11 + 9253 03d0 35EE066A vadd.f32 s12, s10, s12 + 9254 03d4 6FEE4A4A vnmul.f32 s9, s30, s20 + 9255 03d8 31EEE05A vsub.f32 s10, s3, s1 + 9256 03dc 70EEA11A vadd.f32 s3, s1, s3 + 9257 03e0 6AEE2E0A vmul.f32 s1, s20, s29 + 9258 03e4 EEEE2E4A vfma.f32 s9, s28, s29 + 9259 03e8 EEEE0F0A vfma.f32 s1, s28, s30 + 9260 03ec 6AEE86EA vmul.f32 s29, s21, s12 + 9261 03f0 25EEEAFA vnmul.f32 s30, s11, s21 + 9262 03f4 EBEE25EA vfma.f32 s29, s22, s11 + 9263 03f8 F0EE4F5A vmov.f32 s11, s30 + 9264 03fc EBEE065A vfma.f32 s11, s22, s12 + 9265 0400 2FEEC86A vnmul.f32 s12, s31, s16 + 9266 0404 28EE05FA vmul.f32 s30, s16, s10 + 9267 0408 ACEE056A vfma.f32 s12, s24, s10 + 9268 040c ACEE2FFA vfma.f32 s30, s24, s31 + 9269 0410 F0EE46FA vmov.f32 s31, s12 + 9270 0414 21EE496A vnmul.f32 s12, s2, s18 + 9271 0418 29EE215A vmul.f32 s10, s18, s3 + 9272 041c ADEE216A vfma.f32 s12, s26, s3 + 9273 0420 ADEE015A vfma.f32 s10, s26, s2 + 9274 0424 B0EE461A vmov.f32 s2, s12 + 9275 0428 32EE666A vsub.f32 s12, s4, s13 + 9276 042c 72EE266A vadd.f32 s13, s4, s13 + 9277 0430 32EEE72A vsub.f32 s4, s5, s15 + 9278 0434 72EEA77A vadd.f32 s15, s5, s15 + 9279 0438 73EE021A vadd.f32 s3, s6, s4 + 9280 043c 76EEE72A vsub.f32 s5, s13, s15 + 9281 0440 33EE423A vsub.f32 s6, s6, s4 + 9282 0444 76EEA76A vadd.f32 s13, s13, s15 + 9283 0448 36EE632A vsub.f32 s4, s12, s7 + 9284 044c 33EE866A vadd.f32 s12, s7, s12 + 9285 0450 68EEA23A vmul.f32 s7, s17, s5 + 9286 0454 C7ED006A vstr.32 s13, [r7] + 9287 0458 ECEE873A vfma.f32 s7, s25, s14 + 9288 045c 1F44 add r7, r7, r3 + 9289 045e 27EE687A vnmul.f32 s14, s14, s17 + 9290 0462 69EE826A vmul.f32 s13, s19, s4 + 9291 0466 ACEEA27A vfma.f32 s14, s25, s5 + 9292 046a EDEEA16A vfma.f32 s13, s27, s3 + 9293 046e 61EEE97A vnmul.f32 s15, s3, s19 + 9294 0472 63EE402A vnmul.f32 s5, s6, s0 + 9295 0476 60EE061A vmul.f32 s3, s0, s12 + 9296 047a EDEE827A vfma.f32 s15, s27, s4 + 9297 047e EBEE831A vfma.f32 s3, s23, s6 + 9298 0482 EBEE862A vfma.f32 s5, s23, s12 + 9299 0486 C2ED003A vstr.32 s7, [r2] + 9300 048a 82ED017A vstr.32 s14, [r2, #4] + ARM GAS /tmp/ccFqHvis.s page 162 + + + 9301 048e 4CED016A vstr.32 s13, [ip, #-4] + 9302 0492 CCED007A vstr.32 s15, [ip] + 9303 0496 1A44 add r2, r2, r3 + 9304 0498 C4ED001A vstr.32 s3, [r4] + 9305 049c C4ED012A vstr.32 s5, [r4, #4] + 9306 04a0 9C44 add ip, ip, r3 + 9307 04a2 C1ED000A vstr.32 s1, [r1] + 9308 04a6 C1ED014A vstr.32 s9, [r1, #4] + 9309 04aa 1C44 add r4, r4, r3 + 9310 04ac C6ED00EA vstr.32 s29, [r6] + 9311 04b0 C6ED015A vstr.32 s11, [r6, #4] + 9312 04b4 1944 add r1, r1, r3 + 9313 04b6 80ED00FA vstr.32 s30, [r0] + 9314 04ba C0ED01FA vstr.32 s31, [r0, #4] + 9315 04be 1E44 add r6, r6, r3 + 9316 04c0 85ED005A vstr.32 s10, [r5] + 9317 04c4 85ED011A vstr.32 s2, [r5, #4] + 9318 04c8 1844 add r0, r0, r3 + 9319 04ca 1D44 add r5, r5, r3 + 9320 04cc 3FF606AF bhi .L1003 + 9321 04d0 089A ldr r2, [sp, #32] + 9322 04d2 0832 adds r2, r2, #8 + 9323 04d4 0892 str r2, [sp, #32] + 9324 04d6 079A ldr r2, [sp, #28] + 9325 04d8 0832 adds r2, r2, #8 + 9326 04da 0792 str r2, [sp, #28] + 9327 04dc 069A ldr r2, [sp, #24] + 9328 04de 0832 adds r2, r2, #8 + 9329 04e0 0692 str r2, [sp, #24] + 9330 04e2 059A ldr r2, [sp, #20] + 9331 04e4 0832 adds r2, r2, #8 + 9332 04e6 0592 str r2, [sp, #20] + 9333 04e8 049A ldr r2, [sp, #16] + 9334 04ea 0832 adds r2, r2, #8 + 9335 04ec 0492 str r2, [sp, #16] + 9336 04ee 039A ldr r2, [sp, #12] + 9337 04f0 0832 adds r2, r2, #8 + 9338 04f2 0392 str r2, [sp, #12] + 9339 04f4 029A ldr r2, [sp, #8] + 9340 04f6 0832 adds r2, r2, #8 + 9341 04f8 0292 str r2, [sp, #8] + 9342 04fa 019A ldr r2, [sp, #4] + 9343 04fc 0832 adds r2, r2, #8 + 9344 04fe 0192 str r2, [sp, #4] + 9345 0500 099A ldr r2, [sp, #36] + 9346 0502 09F10109 add r9, r9, #1 + 9347 0506 4A45 cmp r2, r9 + 9348 0508 7FF4A1AE bne .L1004 + 9349 050c 0A9B ldr r3, [sp, #40] + 9350 050e DB00 lsls r3, r3, #3 + 9351 0510 9BB2 uxth r3, r3 + 9352 0512 0A93 str r3, [sp, #40] + 9353 0514 9346 mov fp, r2 + 9354 0516 82E5 b .L1005 + 9355 .L1000: + 9356 0518 0FB0 add sp, sp, #60 + 9357 @ sp needed + ARM GAS /tmp/ccFqHvis.s page 163 + + + 9358 051a BDEC108B vldm sp!, {d8-d15} + 9359 051e BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 9361 0522 00BF .section .text.arm_cfft_radix8by2_f32,"ax",%progbits + 9362 .align 1 + 9363 .p2align 2,,3 + 9364 .global arm_cfft_radix8by2_f32 + 9365 .syntax unified + 9366 .thumb + 9367 .thumb_func + 9368 .fpu fpv4-sp-d16 + 9370 arm_cfft_radix8by2_f32: + 9371 @ args = 0, pretend = 0, frame = 8 + 9372 @ frame_needed = 0, uses_anonymous_args = 0 + 9373 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 9374 0004 B0F80080 ldrh r8, [r0] + 9375 0008 2DED088B vpush.64 {d8, d9, d10, d11} + 9376 000c 0546 mov r5, r0 + 9377 000e 0846 mov r0, r1 + 9378 0010 00EB8806 add r6, r0, r8, lsl #2 + 9379 0014 4FEA5801 lsr r1, r8, #1 + 9380 0018 5FEAD808 lsrs r8, r8, #3 + 9381 001c 6A68 ldr r2, [r5, #4] + 9382 001e 82B0 sub sp, sp, #8 + 9383 0020 00F0AF80 beq .L1014 + 9384 0024 4FEA810C lsl ip, r1, #2 + 9385 0028 0CF1100C add ip, ip, #16 + 9386 002c 00F11003 add r3, r0, #16 + 9387 0030 00EB0C04 add r4, r0, ip + 9388 0034 03EB0818 add r8, r3, r8, lsl #4 + 9389 0038 B444 add ip, ip, r6 + 9390 003a 02F11007 add r7, r2, #16 + 9391 003e 06F1100E add lr, r6, #16 + 9392 .L1015: + 9393 0042 1EED041A vldr.32 s2, [lr, #-16] + 9394 0046 5EED031A vldr.32 s3, [lr, #-12] + 9395 004a 1CED045A vldr.32 s10, [ip, #-16] + 9396 004e 5CED035A vldr.32 s11, [ip, #-12] + 9397 0052 5EED028A vldr.32 s17, [lr, #-8] + 9398 0056 1EED018A vldr.32 s16, [lr, #-4] + 9399 005a 1CED027A vldr.32 s14, [ip, #-8] + 9400 005e 5CED017A vldr.32 s15, [ip, #-4] + 9401 0062 13ED044A vldr.32 s8, [r3, #-16] + 9402 0066 53ED034A vldr.32 s9, [r3, #-12] + 9403 006a 13ED026A vldr.32 s12, [r3, #-8] + 9404 006e 53ED016A vldr.32 s13, [r3, #-4] + 9405 0072 14ED042A vldr.32 s4, [r4, #-16] + 9406 0076 54ED032A vldr.32 s5, [r4, #-12] + 9407 007a 14ED020A vldr.32 s0, [r4, #-8] + 9408 007e 54ED010A vldr.32 s1, [r4, #-4] + 9409 0082 74EE01BA vadd.f32 s23, s8, s2 + 9410 0086 34EEA1BA vadd.f32 s22, s9, s3 + 9411 008a 72EE059A vadd.f32 s19, s4, s10 + 9412 008e 32EEA59A vadd.f32 s18, s5, s11 + 9413 0092 30EE073A vadd.f32 s6, s0, s14 + 9414 0096 70EEA73A vadd.f32 s7, s1, s15 + 9415 009a 76EE28AA vadd.f32 s21, s12, s17 + 9416 009e 36EE88AA vadd.f32 s20, s13, s16 + ARM GAS /tmp/ccFqHvis.s page 164 + + + 9417 00a2 43ED04BA vstr.32 s23, [r3, #-16] + 9418 00a6 03ED03BA vstr.32 s22, [r3, #-12] + 9419 00aa 43ED02AA vstr.32 s21, [r3, #-8] + 9420 00ae 03ED01AA vstr.32 s20, [r3, #-4] + 9421 00b2 44ED049A vstr.32 s19, [r4, #-16] + 9422 00b6 04ED039A vstr.32 s18, [r4, #-12] + 9423 00ba 04ED023A vstr.32 s6, [r4, #-8] + 9424 00be 44ED013A vstr.32 s7, [r4, #-4] + 9425 00c2 57ED033A vldr.32 s7, [r7, #-12] + 9426 00c6 17ED043A vldr.32 s6, [r7, #-16] + 9427 00ca 34EE414A vsub.f32 s8, s8, s2 + 9428 00ce 74EEE14A vsub.f32 s9, s9, s3 + 9429 00d2 75EEE25A vsub.f32 s11, s11, s5 + 9430 00d6 35EE425A vsub.f32 s10, s10, s4 + 9431 00da 24EEA31A vmul.f32 s2, s9, s7 + 9432 00de 63EEC41A vnmul.f32 s3, s7, s8 + 9433 00e2 23EE652A vnmul.f32 s4, s6, s11 + 9434 00e6 A4EE031A vfma.f32 s2, s8, s6 + 9435 00ea 1033 adds r3, r3, #16 + 9436 00ec 4345 cmp r3, r8 + 9437 00ee 65EE032A vmul.f32 s5, s10, s6 + 9438 00f2 B0EE614A vmov.f32 s8, s3 + 9439 00f6 A4EE834A vfma.f32 s8, s9, s6 + 9440 00fa 04F11004 add r4, r4, #16 + 9441 00fe 07F11007 add r7, r7, #16 + 9442 0102 F0EE424A vmov.f32 s9, s4 + 9443 0106 E5EE234A vfma.f32 s9, s10, s7 + 9444 010a 0EF1100E add lr, lr, #16 + 9445 010e 0CF1100C add ip, ip, #16 + 9446 0112 B0EE625A vmov.f32 s10, s5 + 9447 0116 A5EEA35A vfma.f32 s10, s11, s7 + 9448 011a 0EED074A vstr.32 s8, [lr, #-28] + 9449 011e 0EED081A vstr.32 s2, [lr, #-32] + 9450 0122 4CED084A vstr.32 s9, [ip, #-32] + 9451 0126 0CED075A vstr.32 s10, [ip, #-28] + 9452 012a 57ED055A vldr.32 s11, [r7, #-20] + 9453 012e 17ED065A vldr.32 s10, [r7, #-24] + 9454 0132 36EE686A vsub.f32 s12, s12, s17 + 9455 0136 76EEC86A vsub.f32 s13, s13, s16 + 9456 013a 77EEE07A vsub.f32 s15, s15, s1 + 9457 013e 37EE407A vsub.f32 s14, s14, s0 + 9458 0142 26EEA53A vmul.f32 s6, s13, s11 + 9459 0146 65EEC63A vnmul.f32 s7, s11, s12 + 9460 014a 25EE674A vnmul.f32 s8, s10, s15 + 9461 014e A6EE053A vfma.f32 s6, s12, s10 + 9462 0152 67EE054A vmul.f32 s9, s14, s10 + 9463 0156 B0EE636A vmov.f32 s12, s7 + 9464 015a A6EE856A vfma.f32 s12, s13, s10 + 9465 015e F0EE446A vmov.f32 s13, s8 + 9466 0162 E7EE256A vfma.f32 s13, s14, s11 + 9467 0166 B0EE647A vmov.f32 s14, s9 + 9468 016a A7EEA57A vfma.f32 s14, s15, s11 + 9469 016e 0EED063A vstr.32 s6, [lr, #-24] + 9470 0172 0EED056A vstr.32 s12, [lr, #-20] + 9471 0176 4CED066A vstr.32 s13, [ip, #-24] + 9472 017a 0CED057A vstr.32 s14, [ip, #-20] + 9473 017e 7FF460AF bne .L1015 + ARM GAS /tmp/ccFqHvis.s page 165 + + + 9474 .L1014: + 9475 0182 89B2 uxth r1, r1 + 9476 0184 0223 movs r3, #2 + 9477 0186 0191 str r1, [sp, #4] + 9478 0188 FFF7FEFF bl arm_radix8_butterfly_f32 + 9479 018c 6A68 ldr r2, [r5, #4] + 9480 018e 0199 ldr r1, [sp, #4] + 9481 0190 0223 movs r3, #2 + 9482 0192 3046 mov r0, r6 + 9483 0194 02B0 add sp, sp, #8 + 9484 @ sp needed + 9485 0196 BDEC088B vldm sp!, {d8-d11} + 9486 019a BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 9487 019e FFF7FEBF b arm_radix8_butterfly_f32 + 9489 .section .text.arm_cfft_radix8by4_f32,"ax",%progbits + 9490 .align 1 + 9491 .p2align 2,,3 + 9492 .global arm_cfft_radix8by4_f32 + 9493 .syntax unified + 9494 .thumb + 9495 .thumb_func + 9496 .fpu fpv4-sp-d16 + 9498 arm_cfft_radix8by4_f32: + 9499 @ args = 0, pretend = 0, frame = 56 + 9500 @ frame_needed = 0, uses_anonymous_args = 0 + 9501 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 9502 0004 2DED0C8B vpush.64 {d8, d9, d10, d11, d12, d13} + 9503 0008 0388 ldrh r3, [r0] + 9504 000a 8FB0 sub sp, sp, #60 + 9505 000c 0646 mov r6, r0 + 9506 000e 0B90 str r0, [sp, #44] + 9507 0010 0C91 str r1, [sp, #48] + 9508 0012 0846 mov r0, r1 + 9509 0014 5908 lsrs r1, r3, #1 + 9510 0016 00EBC102 add r2, r0, r1, lsl #3 + 9511 001a 92ED006A vldr.32 s12, [r2] + 9512 001e 92ED015A vldr.32 s10, [r2, #4] + 9513 0022 D0ED007A vldr.32 s15, [r0] + 9514 0026 D0ED015A vldr.32 s11, [r0, #4] + 9515 002a 7668 ldr r6, [r6, #4] + 9516 002c 0892 str r2, [sp, #32] + 9517 002e 00EB8105 add r5, r0, r1, lsl #2 + 9518 0032 95ED007A vldr.32 s14, [r5] + 9519 0036 95ED013A vldr.32 s6, [r5, #4] + 9520 003a 0996 str r6, [sp, #36] + 9521 003c 77EE866A vadd.f32 s13, s15, s12 + 9522 0040 77EEC67A vsub.f32 s15, s15, s12 + 9523 0044 35EE856A vadd.f32 s12, s11, s10 + 9524 0048 75EEC55A vsub.f32 s11, s11, s10 + 9525 004c 02EB8104 add r4, r2, r1, lsl #2 + 9526 0050 77EE263A vadd.f32 s7, s14, s13 + 9527 0054 75EEC74A vsub.f32 s9, s11, s14 + 9528 0058 76EEC76A vsub.f32 s13, s13, s14 + 9529 005c 37EE257A vadd.f32 s14, s14, s11 + 9530 0060 D4ED005A vldr.32 s11, [r4] + 9531 0064 73EEA53A vadd.f32 s7, s7, s11 + 9532 0068 33EE274A vadd.f32 s8, s6, s15 + ARM GAS /tmp/ccFqHvis.s page 166 + + + 9533 006c 36EE435A vsub.f32 s10, s12, s6 + 9534 0070 77EEC37A vsub.f32 s15, s15, s6 + 9535 0074 94ED013A vldr.32 s6, [r4, #4] + 9536 0078 C0ED003A vstr.32 s7, [r0] + 9537 007c D5ED013A vldr.32 s7, [r5, #4] + 9538 0080 4F08 lsrs r7, r1, #1 + 9539 0082 8B00 lsls r3, r1, #2 + 9540 0084 0146 mov r1, r0 + 9541 0086 0831 adds r1, r1, #8 + 9542 0088 74EEA54A vadd.f32 s9, s9, s11 + 9543 008c 76EEE56A vsub.f32 s13, s13, s11 + 9544 0090 37EE657A vsub.f32 s14, s14, s11 + 9545 0094 0391 str r1, [sp, #12] + 9546 0096 D4ED015A vldr.32 s11, [r4, #4] + 9547 009a 0A97 str r7, [sp, #40] + 9548 009c 36EE236A vadd.f32 s12, s12, s7 + 9549 00a0 2946 mov r1, r5 + 9550 00a2 0831 adds r1, r1, #8 + 9551 00a4 0691 str r1, [sp, #24] + 9552 00a6 34EE434A vsub.f32 s8, s8, s6 + 9553 00aa 1146 mov r1, r2 + 9554 00ac 35EE435A vsub.f32 s10, s10, s6 + 9555 00b0 36EE256A vadd.f32 s12, s12, s11 + 9556 00b4 0831 adds r1, r1, #8 + 9557 00b6 80ED016A vstr.32 s12, [r0, #4] + 9558 00ba 0591 str r1, [sp, #20] + 9559 00bc 85ED004A vstr.32 s8, [r5] + 9560 00c0 C5ED014A vstr.32 s9, [r5, #4] + 9561 00c4 1146 mov r1, r2 + 9562 00c6 C2ED006A vstr.32 s13, [r2] + 9563 00ca 82ED015A vstr.32 s10, [r2, #4] + 9564 00ce 2246 mov r2, r4 + 9565 00d0 0832 adds r2, r2, #8 + 9566 00d2 0492 str r2, [sp, #16] + 9567 00d4 77EE837A vadd.f32 s15, s15, s6 + 9568 00d8 BA1E subs r2, r7, #2 + 9569 00da 06F10807 add r7, r6, #8 + 9570 00de 0297 str r7, [sp, #8] + 9571 00e0 06F11007 add r7, r6, #16 + 9572 00e4 C4ED007A vstr.32 s15, [r4] + 9573 00e8 84ED017A vstr.32 s14, [r4, #4] + 9574 00ec 5208 lsrs r2, r2, #1 + 9575 00ee 0097 str r7, [sp] + 9576 00f0 06F11807 add r7, r6, #24 + 9577 00f4 0197 str r7, [sp, #4] + 9578 00f6 0792 str r2, [sp, #28] + 9579 00f8 00F03281 beq .L1022 + 9580 00fc 9346 mov fp, r2 + 9581 00fe A5F10C02 sub r2, r5, #12 + 9582 0102 0D92 str r2, [sp, #52] + 9583 0104 0C3B subs r3, r3, #12 + 9584 0106 0A46 mov r2, r1 + 9585 0108 06F12009 add r9, r6, #32 + 9586 010c 06F13008 add r8, r6, #48 + 9587 0110 DDF800A0 ldr r10, [sp] + 9588 0114 0D9E ldr r6, [sp, #52] + 9589 0116 00F11007 add r7, r0, #16 + ARM GAS /tmp/ccFqHvis.s page 167 + + + 9590 011a 02F1100E add lr, r2, #16 + 9591 011e 2344 add r3, r3, r4 + 9592 0120 05F11000 add r0, r5, #16 + 9593 0124 0C39 subs r1, r1, #12 + 9594 0126 A4F10C0C sub ip, r4, #12 + 9595 012a 04F11002 add r2, r4, #16 + 9596 .L1023: + 9597 012e 5EED026A vldr.32 s13, [lr, #-8] + 9598 0132 17ED026A vldr.32 s12, [r7, #-8] + 9599 0136 50ED027A vldr.32 s15, [r0, #-8] + 9600 013a 52ED020A vldr.32 s1, [r2, #-8] + 9601 013e 5EED015A vldr.32 s11, [lr, #-4] + 9602 0142 57ED011A vldr.32 s3, [r7, #-4] + 9603 0146 12ED010A vldr.32 s0, [r2, #-4] + 9604 014a 10ED018A vldr.32 s16, [r0, #-4] + 9605 014e 76EE263A vadd.f32 s7, s12, s13 + 9606 0152 31EEA54A vadd.f32 s8, s3, s11 + 9607 0156 37EEA37A vadd.f32 s14, s15, s7 + 9608 015a 36EE666A vsub.f32 s12, s12, s13 + 9609 015e 37EE207A vadd.f32 s14, s14, s1 + 9610 0162 71EEE51A vsub.f32 s3, s3, s11 + 9611 0166 07ED027A vstr.32 s14, [r7, #-8] + 9612 016a 10ED017A vldr.32 s14, [r0, #-4] + 9613 016e 12ED015A vldr.32 s10, [r2, #-4] + 9614 0172 34EE077A vadd.f32 s14, s8, s14 + 9615 0176 38EE06BA vadd.f32 s22, s16, s12 + 9616 017a 37EE057A vadd.f32 s14, s14, s10 + 9617 017e 31EEE7AA vsub.f32 s20, s3, s15 + 9618 0182 07ED017A vstr.32 s14, [r7, #-4] + 9619 0186 DCED022A vldr.32 s5, [ip, #8] + 9620 018a 96ED029A vldr.32 s18, [r6, #8] + 9621 018e 91ED025A vldr.32 s10, [r1, #8] + 9622 0192 D3ED02AA vldr.32 s21, [r3, #8] + 9623 0196 9CED013A vldr.32 s6, [ip, #4] + 9624 019a 96ED012A vldr.32 s4, [r6, #4] + 9625 019e 93ED017A vldr.32 s14, [r3, #4] + 9626 01a2 D1ED018A vldr.32 s17, [r1, #4] + 9627 01a6 79EE224A vadd.f32 s9, s18, s5 + 9628 01aa 72EE035A vadd.f32 s11, s4, s6 + 9629 01ae 75EE246A vadd.f32 s13, s10, s9 + 9630 01b2 79EE622A vsub.f32 s5, s18, s5 + 9631 01b6 76EEAA6A vadd.f32 s13, s13, s21 + 9632 01ba 32EE432A vsub.f32 s4, s4, s6 + 9633 01be C6ED026A vstr.32 s13, [r6, #8] + 9634 01c2 91ED011A vldr.32 s2, [r1, #4] + 9635 01c6 D3ED016A vldr.32 s13, [r3, #4] + 9636 01ca 35EE811A vadd.f32 s2, s11, s2 + 9637 01ce 35EE6A3A vsub.f32 s6, s10, s21 + 9638 01d2 31EE261A vadd.f32 s2, s2, s13 + 9639 01d6 3BEE40BA vsub.f32 s22, s22, s0 + 9640 01da 86ED011A vstr.32 s2, [r6, #4] + 9641 01de 5AED016A vldr.32 s13, [r10, #-4] + 9642 01e2 5AED029A vldr.32 s19, [r10, #-8] + 9643 01e6 32EEE89A vsub.f32 s18, s5, s17 + 9644 01ea 3AEE20AA vadd.f32 s20, s20, s1 + 9645 01ee 33EE02DA vadd.f32 s26, s6, s4 + 9646 01f2 39EE071A vadd.f32 s2, s18, s14 + ARM GAS /tmp/ccFqHvis.s page 168 + + + 9647 01f6 2AEE26CA vmul.f32 s24, s20, s13 + 9648 01fa 66EECBCA vnmul.f32 s25, s13, s22 + 9649 01fe 69EECDBA vnmul.f32 s23, s19, s26 + 9650 0202 ABEE29CA vfma.f32 s24, s22, s19 + 9651 0206 BBF1010B subs fp, fp, #1 + 9652 020a 07F10807 add r7, r7, #8 + 9653 020e 21EE299A vmul.f32 s18, s2, s19 + 9654 0212 B0EE6CBA vmov.f32 s22, s25 + 9655 0216 AAEE29BA vfma.f32 s22, s20, s19 + 9656 021a A6F10806 sub r6, r6, #8 + 9657 021e 0AF1080A add r10, r10, #8 + 9658 0222 F0EE6B9A vmov.f32 s19, s23 + 9659 0226 E1EE269A vfma.f32 s19, s2, s13 + 9660 022a 00F10800 add r0, r0, #8 + 9661 022e A1F10801 sub r1, r1, #8 + 9662 0232 B0EE491A vmov.f32 s2, s18 + 9663 0236 ADEE261A vfma.f32 s2, s26, s13 + 9664 023a 09F11009 add r9, r9, #16 + 9665 023e 0EF1080E add lr, lr, #8 + 9666 0242 73EEE73A vsub.f32 s7, s7, s15 + 9667 0246 34EE484A vsub.f32 s8, s8, s16 + 9668 024a 34EEC55A vsub.f32 s10, s9, s10 + 9669 024e 75EEE85A vsub.f32 s11, s11, s17 + 9670 0252 00ED04CA vstr.32 s24, [r0, #-16] + 9671 0256 00ED03BA vstr.32 s22, [r0, #-12] + 9672 025a C1ED049A vstr.32 s19, [r1, #16] + 9673 025e 81ED031A vstr.32 s2, [r1, #12] + 9674 0262 59ED076A vldr.32 s13, [r9, #-28] + 9675 0266 74EE404A vsub.f32 s9, s8, s0 + 9676 026a 75EEC75A vsub.f32 s11, s11, s14 + 9677 026e 73EEE03A vsub.f32 s7, s7, s1 + 9678 0272 35EE6A5A vsub.f32 s10, s10, s21 + 9679 0276 19ED084A vldr.32 s8, [r9, #-32] + 9680 027a 64EEA69A vmul.f32 s19, s9, s13 + 9681 027e 26EEE39A vnmul.f32 s18, s13, s7 + 9682 0282 25EE261A vmul.f32 s2, s10, s13 + 9683 0286 66EEE56A vnmul.f32 s13, s13, s11 + 9684 028a E3EE849A vfma.f32 s19, s7, s8 + 9685 028e ACF1080C sub ip, ip, #8 + 9686 0292 08F11808 add r8, r8, #24 + 9687 0296 E5EE446A vfms.f32 s13, s10, s8 + 9688 029a 02F10802 add r2, r2, #8 + 9689 029e A3F10803 sub r3, r3, #8 + 9690 02a2 F0EE493A vmov.f32 s7, s18 + 9691 02a6 B0EE415A vmov.f32 s10, s2 + 9692 02aa E4EE843A vfma.f32 s7, s9, s8 + 9693 02ae A5EEC45A vfms.f32 s10, s11, s8 + 9694 02b2 36EE486A vsub.f32 s12, s12, s16 + 9695 02b6 77EEA17A vadd.f32 s15, s15, s3 + 9696 02ba 37EE687A vsub.f32 s14, s14, s17 + 9697 02be 4EED049A vstr.32 s19, [lr, #-16] + 9698 02c2 4EED033A vstr.32 s7, [lr, #-12] + 9699 02c6 CCED046A vstr.32 s13, [ip, #16] + 9700 02ca 8CED035A vstr.32 s10, [ip, #12] + 9701 02ce 18ED0C5A vldr.32 s10, [r8, #-48] + 9702 02d2 58ED0B5A vldr.32 s11, [r8, #-44] + 9703 02d6 76EE006A vadd.f32 s13, s12, s0 + ARM GAS /tmp/ccFqHvis.s page 169 + + + 9704 02da 77EEE07A vsub.f32 s15, s15, s1 + 9705 02de 33EE426A vsub.f32 s12, s6, s4 + 9706 02e2 37EE627A vsub.f32 s14, s14, s5 + 9707 02e6 27EEA53A vmul.f32 s6, s15, s11 + 9708 02ea 65EEE63A vnmul.f32 s7, s11, s13 + 9709 02ee 67EE054A vmul.f32 s9, s14, s10 + 9710 02f2 25EE464A vnmul.f32 s8, s10, s12 + 9711 02f6 A6EE853A vfma.f32 s6, s13, s10 + 9712 02fa E7EE853A vfma.f32 s7, s15, s10 + 9713 02fe F0EE446A vmov.f32 s13, s8 + 9714 0302 F0EE647A vmov.f32 s15, s9 + 9715 0306 E7EE256A vfma.f32 s13, s14, s11 + 9716 030a E6EE257A vfma.f32 s15, s12, s11 + 9717 030e 02ED043A vstr.32 s6, [r2, #-16] + 9718 0312 42ED033A vstr.32 s7, [r2, #-12] + 9719 0316 C3ED046A vstr.32 s13, [r3, #16] + 9720 031a C3ED037A vstr.32 s15, [r3, #12] + 9721 031e 7FF406AF bne .L1023 + 9722 0322 079B ldr r3, [sp, #28] + 9723 0324 039A ldr r2, [sp, #12] + 9724 0326 02EBC302 add r2, r2, r3, lsl #3 + 9725 032a 0392 str r2, [sp, #12] + 9726 032c 029A ldr r2, [sp, #8] + 9727 032e 02EBC302 add r2, r2, r3, lsl #3 + 9728 0332 0292 str r2, [sp, #8] + 9729 0334 069A ldr r2, [sp, #24] + 9730 0336 02EBC302 add r2, r2, r3, lsl #3 + 9731 033a 0692 str r2, [sp, #24] + 9732 033c 009A ldr r2, [sp] + 9733 033e 02EB0312 add r2, r2, r3, lsl #4 + 9734 0342 0092 str r2, [sp] + 9735 0344 059A ldr r2, [sp, #20] + 9736 0346 02EBC302 add r2, r2, r3, lsl #3 + 9737 034a 0592 str r2, [sp, #20] + 9738 034c 049A ldr r2, [sp, #16] + 9739 034e 02EBC302 add r2, r2, r3, lsl #3 + 9740 0352 0492 str r2, [sp, #16] + 9741 0354 019A ldr r2, [sp, #4] + 9742 0356 03EB4303 add r3, r3, r3, lsl #1 + 9743 035a 02EBC303 add r3, r2, r3, lsl #3 + 9744 035e 0193 str r3, [sp, #4] + 9745 .L1022: + 9746 0360 039A ldr r2, [sp, #12] + 9747 0362 0599 ldr r1, [sp, #20] + 9748 0364 92ED003A vldr.32 s6, [r2] + 9749 0368 D1ED006A vldr.32 s13, [r1] + 9750 036c 069B ldr r3, [sp, #24] + 9751 036e 049E ldr r6, [sp, #16] + 9752 0370 D3ED007A vldr.32 s15, [r3] + 9753 0374 96ED004A vldr.32 s8, [r6] + 9754 0378 D1ED013A vldr.32 s7, [r1, #4] + 9755 037c D2ED014A vldr.32 s9, [r2, #4] + 9756 0380 D6ED012A vldr.32 s5, [r6, #4] + 9757 0384 93ED017A vldr.32 s14, [r3, #4] + 9758 0388 0C98 ldr r0, [sp, #48] + 9759 038a 33EE266A vadd.f32 s12, s6, s13 + 9760 038e 73EE666A vsub.f32 s13, s6, s13 + ARM GAS /tmp/ccFqHvis.s page 170 + + + 9761 0392 77EE865A vadd.f32 s11, s15, s12 + 9762 0396 36EE676A vsub.f32 s12, s12, s15 + 9763 039a 75EE845A vadd.f32 s11, s11, s8 + 9764 039e 36EE446A vsub.f32 s12, s12, s8 + 9765 03a2 C2ED005A vstr.32 s11, [r2] + 9766 03a6 93ED015A vldr.32 s10, [r3, #4] + 9767 03aa 96ED013A vldr.32 s6, [r6, #4] + 9768 03ae 74EEA35A vadd.f32 s11, s9, s7 + 9769 03b2 74EEE34A vsub.f32 s9, s9, s7 + 9770 03b6 35EE855A vadd.f32 s10, s11, s10 + 9771 03ba 77EE263A vadd.f32 s7, s14, s13 + 9772 03be 35EE035A vadd.f32 s10, s10, s6 + 9773 03c2 34EEE73A vsub.f32 s6, s9, s15 + 9774 03c6 82ED015A vstr.32 s10, [r2, #4] + 9775 03ca 029A ldr r2, [sp, #8] + 9776 03cc 73EEE23A vsub.f32 s7, s7, s5 + 9777 03d0 92ED015A vldr.32 s10, [r2, #4] + 9778 03d4 D2ED001A vldr.32 s3, [r2] + 9779 03d8 099A ldr r2, [sp, #36] + 9780 03da 33EE043A vadd.f32 s6, s6, s8 + 9781 03de 25EE632A vnmul.f32 s4, s10, s7 + 9782 03e2 23EE055A vmul.f32 s10, s6, s10 + 9783 03e6 A3EE212A vfma.f32 s4, s6, s3 + 9784 03ea A3EEA15A vfma.f32 s10, s7, s3 + 9785 03ee 83ED012A vstr.32 s4, [r3, #4] + 9786 03f2 83ED005A vstr.32 s10, [r3] + 9787 03f6 75EEC75A vsub.f32 s11, s11, s14 + 9788 03fa 009B ldr r3, [sp] + 9789 03fc 75EEE25A vsub.f32 s11, s11, s5 + 9790 0400 93ED015A vldr.32 s10, [r3, #4] + 9791 0404 93ED003A vldr.32 s6, [r3] + 9792 0408 019B ldr r3, [sp, #4] + 9793 040a 65EE463A vnmul.f32 s7, s10, s12 + 9794 040e 25EE855A vmul.f32 s10, s11, s10 + 9795 0412 E5EE833A vfma.f32 s7, s11, s6 + 9796 0416 A6EE035A vfma.f32 s10, s12, s6 + 9797 041a 77EEA47A vadd.f32 s15, s15, s9 + 9798 041e 36EEC77A vsub.f32 s14, s13, s14 + 9799 0422 C1ED013A vstr.32 s7, [r1, #4] + 9800 0426 81ED005A vstr.32 s10, [r1] + 9801 042a 37EE227A vadd.f32 s14, s14, s5 + 9802 042e 77EEC47A vsub.f32 s15, s15, s8 + 9803 0432 D3ED016A vldr.32 s13, [r3, #4] + 9804 0436 D3ED005A vldr.32 s11, [r3] + 9805 043a BDF82810 ldrh r1, [sp, #40] + 9806 043e 26EEC76A vnmul.f32 s12, s13, s14 + 9807 0442 67EEA66A vmul.f32 s13, s15, s13 + 9808 0446 A7EEA56A vfma.f32 s12, s15, s11 + 9809 044a 0423 movs r3, #4 + 9810 044c E7EE256A vfma.f32 s13, s14, s11 + 9811 0450 C6ED006A vstr.32 s13, [r6] + 9812 0454 86ED016A vstr.32 s12, [r6, #4] + 9813 0458 0091 str r1, [sp] + 9814 045a FFF7FEFF bl arm_radix8_butterfly_f32 + 9815 045e 2846 mov r0, r5 + 9816 0460 0B9D ldr r5, [sp, #44] + 9817 0462 0099 ldr r1, [sp] + ARM GAS /tmp/ccFqHvis.s page 171 + + + 9818 0464 6A68 ldr r2, [r5, #4] + 9819 0466 0423 movs r3, #4 + 9820 0468 FFF7FEFF bl arm_radix8_butterfly_f32 + 9821 046c 0898 ldr r0, [sp, #32] + 9822 046e 6A68 ldr r2, [r5, #4] + 9823 0470 0099 ldr r1, [sp] + 9824 0472 0423 movs r3, #4 + 9825 0474 FFF7FEFF bl arm_radix8_butterfly_f32 + 9826 0478 6A68 ldr r2, [r5, #4] + 9827 047a 0099 ldr r1, [sp] + 9828 047c 0423 movs r3, #4 + 9829 047e 2046 mov r0, r4 + 9830 0480 0FB0 add sp, sp, #60 + 9831 @ sp needed + 9832 0482 BDEC0C8B vldm sp!, {d8-d13} + 9833 0486 BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 9834 048a FFF7FEBF b arm_radix8_butterfly_f32 + 9836 048e 00BF .section .text.arm_cfft_f32,"ax",%progbits + 9837 .align 1 + 9838 .p2align 2,,3 + 9839 .global arm_cfft_f32 + 9840 .syntax unified + 9841 .thumb + 9842 .thumb_func + 9843 .fpu fpv4-sp-d16 + 9845 arm_cfft_f32: + 9846 @ args = 0, pretend = 0, frame = 0 + 9847 @ frame_needed = 0, uses_anonymous_args = 0 + 9848 0000 012A cmp r2, #1 + 9849 0002 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 9850 0006 0588 ldrh r5, [r0] + 9851 0008 0746 mov r7, r0 + 9852 000a 9146 mov r9, r2 + 9853 000c 0C46 mov r4, r1 + 9854 000e 9846 mov r8, r3 + 9855 0010 78D0 beq .L1089 + 9856 .L1030: + 9857 0012 B5F5807F cmp r5, #256 + 9858 0016 70D0 beq .L1033 + 9859 0018 10D8 bhi .L1034 + 9860 001a 402D cmp r5, #64 + 9861 001c 15D0 beq .L1035 + 9862 001e 68D9 bls .L1090 + 9863 0020 802D cmp r5, #128 + 9864 0022 03D1 bne .L1038 + 9865 .L1037: + 9866 0024 2146 mov r1, r4 + 9867 0026 3846 mov r0, r7 + 9868 0028 FFF7FEFF bl arm_cfft_radix8by2_f32 + 9869 .L1038: + 9870 002c B8F1000F cmp r8, #0 + 9871 0030 14D1 bne .L1091 + 9872 .L1040: + 9873 0032 B9F1010F cmp r9, #1 + 9874 0036 36D0 beq .L1045 + 9875 .L1029: + 9876 0038 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + ARM GAS /tmp/ccFqHvis.s page 172 + + + 9877 .L1034: + 9878 003c B5F5006F cmp r5, #2048 + 9879 0040 5BD0 beq .L1033 + 9880 0042 4FD9 bls .L1092 + 9881 0044 B5F5805F cmp r5, #4096 + 9882 0048 F0D1 bne .L1038 + 9883 .L1035: + 9884 004a 7A68 ldr r2, [r7, #4] + 9885 004c 0123 movs r3, #1 + 9886 004e 2946 mov r1, r5 + 9887 0050 2046 mov r0, r4 + 9888 0052 FFF7FEFF bl arm_radix8_butterfly_f32 + 9889 0056 B8F1000F cmp r8, #0 + 9890 005a EAD0 beq .L1040 + 9891 .L1091: + 9892 005c B868 ldr r0, [r7, #8] + 9893 005e BF89 ldrh r7, [r7, #12] + 9894 0060 002F cmp r7, #0 + 9895 0062 E6D0 beq .L1040 + 9896 .L1044: + 9897 0064 0022 movs r2, #0 + 9898 0066 00F1020E add lr, r0, #2 + 9899 .L1041: + 9900 006a 30F81210 ldrh r1, [r0, r2, lsl #1] + 9901 006e 3EF81230 ldrh r3, [lr, r2, lsl #1] + 9902 0072 8908 lsrs r1, r1, #2 + 9903 0074 9B08 lsrs r3, r3, #2 + 9904 0076 54F82180 ldr r8, [r4, r1, lsl #2] + 9905 007a 54F82360 ldr r6, [r4, r3, lsl #2] + 9906 007e 44F82160 str r6, [r4, r1, lsl #2] + 9907 0082 44F82380 str r8, [r4, r3, lsl #2] + 9908 0086 0131 adds r1, r1, #1 + 9909 0088 0133 adds r3, r3, #1 + 9910 008a 0232 adds r2, r2, #2 + 9911 008c 54F82180 ldr r8, [r4, r1, lsl #2] + 9912 0090 54F82360 ldr r6, [r4, r3, lsl #2] + 9913 0094 44F82160 str r6, [r4, r1, lsl #2] + 9914 0098 BA42 cmp r2, r7 + 9915 009a 44F82380 str r8, [r4, r3, lsl #2] + 9916 009e E4D3 bcc .L1041 + 9917 00a0 B9F1010F cmp r9, #1 + 9918 00a4 C8D1 bne .L1029 + 9919 .L1045: + 9920 00a6 07EE905A vmov s15, r5 @ int + 9921 00aa F8EE677A vcvt.f32.u32 s15, s15 + 9922 00ae B7EE007A vmov.f32 s14, #1.0e+0 + 9923 00b2 C7EE276A vdiv.f32 s13, s14, s15 + 9924 00b6 002D cmp r5, #0 + 9925 00b8 BED0 beq .L1029 + 9926 00ba 0834 adds r4, r4, #8 + 9927 00bc 0023 movs r3, #0 + 9928 .L1043: + 9929 00be 0133 adds r3, r3, #1 + 9930 00c0 9D42 cmp r5, r3 + 9931 00c2 04F10804 add r4, r4, #8 + 9932 00c6 14ED047A vldr.32 s14, [r4, #-16] + 9933 00ca 54ED037A vldr.32 s15, [r4, #-12] + ARM GAS /tmp/ccFqHvis.s page 173 + + + 9934 00ce 27EE267A vmul.f32 s14, s14, s13 + 9935 00d2 67EEE67A vnmul.f32 s15, s15, s13 + 9936 00d6 04ED047A vstr.32 s14, [r4, #-16] + 9937 00da 44ED037A vstr.32 s15, [r4, #-12] + 9938 00de EED1 bne .L1043 + 9939 00e0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 9940 .L1092: + 9941 00e4 B5F5007F cmp r5, #512 + 9942 00e8 AFD0 beq .L1035 + 9943 00ea B5F5806F cmp r5, #1024 + 9944 00ee 99D0 beq .L1037 + 9945 00f0 9CE7 b .L1038 + 9946 .L1090: + 9947 00f2 102D cmp r5, #16 + 9948 00f4 96D0 beq .L1037 + 9949 00f6 202D cmp r5, #32 + 9950 00f8 98D1 bne .L1038 + 9951 .L1033: + 9952 00fa 2146 mov r1, r4 + 9953 00fc 3846 mov r0, r7 + 9954 00fe FFF7FEFF bl arm_cfft_radix8by4_f32 + 9955 0102 93E7 b .L1038 + 9956 .L1089: + 9957 0104 75B1 cbz r5, .L1031 + 9958 0106 01F10C02 add r2, r1, #12 + 9959 010a 0021 movs r1, #0 + 9960 .L1032: + 9961 010c 52ED027A vldr.32 s15, [r2, #-8] + 9962 0110 0131 adds r1, r1, #1 + 9963 0112 F1EE677A vneg.f32 s15, s15 + 9964 0116 8D42 cmp r5, r1 + 9965 0118 42ED027A vstr.32 s15, [r2, #-8] + 9966 011c 02F10802 add r2, r2, #8 + 9967 0120 F4D1 bne .L1032 + 9968 0122 76E7 b .L1030 + 9969 .L1031: + 9970 0124 002B cmp r3, #0 + 9971 0126 87D0 beq .L1029 + 9972 0128 BF89 ldrh r7, [r7, #12] + 9973 012a 8068 ldr r0, [r0, #8] + 9974 012c 002F cmp r7, #0 + 9975 012e 99D1 bne .L1044 + 9976 0130 B9E7 b .L1045 + 9978 0132 00BF .section .text.arm_dct4_init_f32,"ax",%progbits + 9979 .align 1 + 9980 .p2align 2,,3 + 9981 .global arm_dct4_init_f32 + 9982 .syntax unified + 9983 .thumb + 9984 .thumb_func + 9985 .fpu fpv4-sp-d16 + 9987 arm_dct4_init_f32: + 9988 @ args = 4, pretend = 0, frame = 0 + 9989 @ frame_needed = 0, uses_anonymous_args = 0 + 9990 @ link register save eliminated. + 9991 0000 30B4 push {r4, r5} + 9992 0002 B3F5006F cmp r3, #2048 + ARM GAS /tmp/ccFqHvis.s page 174 + + + 9993 0006 BDF808C0 ldrh ip, [sp, #8] + 9994 000a A0F802C0 strh ip, [r0, #2] @ movhi + 9995 000e C0E90412 strd r1, r2, [r0, #16] + 9996 0012 0380 strh r3, [r0] @ movhi + 9997 0014 80ED010A vstr.32 s0, [r0, #4] + 9998 0018 62D0 beq .L1094 + 9999 001a 23D8 bhi .L1095 + 10000 001c 802B cmp r3, #128 + 10001 001e 43D0 beq .L1096 + 10002 0020 B3F5007F cmp r3, #512 + 10003 0024 7AD1 bne .L1122 + 10004 0026 674C ldr r4, .L1125 + 10005 0028 8460 str r4, [r0, #8] + 10006 002a 674C ldr r4, .L1125+4 + 10007 002c C460 str r4, [r0, #12] + 10008 002e 674C ldr r4, .L1125+8 + 10009 0030 6748 ldr r0, .L1125+12 + 10010 0032 0B60 str r3, [r1] + 10011 0034 C1E90340 strd r4, r0, [r1, #12] + 10012 0038 1023 movs r3, #16 + 10013 003a 4FF00120 mov r0, #16777472 + 10014 003e 654C ldr r4, .L1125+16 + 10015 0040 4A61 str r2, [r1, #20] + 10016 0042 C1E90103 strd r0, r3, [r1, #4] + 10017 0046 4FF48073 mov r3, #256 + 10018 004a C2E90034 strd r3, r4, [r2] + 10019 004e 0020 movs r0, #0 + 10020 .L1102: + 10021 0050 6149 ldr r1, .L1125+20 + 10022 0052 4FF01014 mov r4, #1048592 + 10023 0056 C2E90214 strd r1, r4, [r2, #8] + 10024 005a 4FF06E53 mov r3, #998244352 + 10025 005e 1361 str r3, [r2, #16] @ float + 10026 .L1118: + 10027 0060 30BC pop {r4, r5} + 10028 0062 7047 bx lr + 10029 .L1095: + 10030 0064 B3F5005F cmp r3, #8192 + 10031 0068 40F09180 bne .L1099 + 10032 006c 5B4C ldr r4, .L1125+24 + 10033 006e 8460 str r4, [r0, #8] + 10034 0070 5B4C ldr r4, .L1125+28 + 10035 0072 C460 str r4, [r0, #12] + 10036 0074 554C ldr r4, .L1125+8 + 10037 0076 5648 ldr r0, .L1125+12 + 10038 0078 4A61 str r2, [r1, #20] + 10039 007a C1E90340 strd r4, r0, [r1, #12] + 10040 007e 5948 ldr r0, .L1125+32 + 10041 0080 544C ldr r4, .L1125+16 + 10042 0082 C1E90030 strd r3, r0, [r1] + 10043 0086 0125 movs r5, #1 + 10044 0088 4FF48053 mov r3, #4096 + 10045 008c 8D60 str r5, [r1, #8] + 10046 008e C2E90034 strd r3, r4, [r2] + 10047 0092 0020 movs r0, #0 + 10048 .L1100: + 10049 0094 5449 ldr r1, .L1125+36 + ARM GAS /tmp/ccFqHvis.s page 175 + + + 10050 0096 4FF00114 mov r4, #65537 + 10051 009a 4FF06653 mov r3, #964689920 + 10052 009e C2E90214 strd r1, r4, [r2, #8] + 10053 00a2 1361 str r3, [r2, #16] @ float + 10054 00a4 30BC pop {r4, r5} + 10055 00a6 7047 bx lr + 10056 .L1096: + 10057 00a8 504C ldr r4, .L1125+40 + 10058 00aa 8460 str r4, [r0, #8] + 10059 00ac 504C ldr r4, .L1125+44 + 10060 00ae C460 str r4, [r0, #12] + 10061 00b0 4648 ldr r0, .L1125+8 + 10062 00b2 C860 str r0, [r1, #12] + 10063 00b4 4648 ldr r0, .L1125+12 + 10064 00b6 0861 str r0, [r1, #16] + 10065 00b8 4E48 ldr r0, .L1125+48 + 10066 00ba 4A61 str r2, [r1, #20] + 10067 00bc C1E90030 strd r3, r0, [r1] + 10068 00c0 444B ldr r3, .L1125+16 + 10069 00c2 4024 movs r4, #64 + 10070 00c4 8C60 str r4, [r1, #8] + 10071 00c6 C2E90043 strd r4, r3, [r2] + 10072 00ca 0020 movs r0, #0 + 10073 .L1103: + 10074 00cc 4A49 ldr r1, .L1125+52 + 10075 00ce 4FF04014 mov r4, #4194368 + 10076 00d2 4FF07253 mov r3, #1015021568 + 10077 00d6 C2E90214 strd r1, r4, [r2, #8] + 10078 00da 1361 str r3, [r2, #16] @ float + 10079 00dc 30BC pop {r4, r5} + 10080 00de 7047 bx lr + 10081 .L1094: + 10082 00e0 464C ldr r4, .L1125+56 + 10083 00e2 8460 str r4, [r0, #8] + 10084 00e4 464C ldr r4, .L1125+60 + 10085 00e6 C460 str r4, [r0, #12] + 10086 00e8 384C ldr r4, .L1125+8 + 10087 00ea 3948 ldr r0, .L1125+12 + 10088 00ec 4A61 str r2, [r1, #20] + 10089 00ee C1E90340 strd r4, r0, [r1, #12] + 10090 00f2 4448 ldr r0, .L1125+64 + 10091 00f4 374C ldr r4, .L1125+16 + 10092 00f6 C1E90030 strd r3, r0, [r1] + 10093 00fa 0425 movs r5, #4 + 10094 00fc 4FF48063 mov r3, #1024 + 10095 0100 8D60 str r5, [r1, #8] + 10096 0102 C2E90034 strd r3, r4, [r2] + 10097 0106 0020 movs r0, #0 + 10098 .L1101: + 10099 0108 3F49 ldr r1, .L1125+68 + 10100 010a 4FF00414 mov r4, #262148 + 10101 010e 4FF06A53 mov r3, #981467136 + 10102 0112 C2E90214 strd r1, r4, [r2, #8] + 10103 0116 1361 str r3, [r2, #16] @ float + 10104 0118 30BC pop {r4, r5} + 10105 011a 7047 bx lr + 10106 .L1122: + ARM GAS /tmp/ccFqHvis.s page 176 + + + 10107 011c 2C4C ldr r4, .L1125+12 + 10108 011e 2B4D ldr r5, .L1125+8 + 10109 0120 0C61 str r4, [r1, #16] + 10110 0122 4FEA5300 lsr r0, r3, #1 + 10111 0126 4FF48074 mov r4, #256 + 10112 012a CD60 str r5, [r1, #12] + 10113 012c 0B60 str r3, [r1] + 10114 012e 8880 strh r0, [r1, #4] @ movhi + 10115 0130 CC80 strh r4, [r1, #6] @ movhi + 10116 0132 01D8 bhi .L1104 + 10117 0134 802B cmp r3, #128 + 10118 0136 3ED0 beq .L1123 + 10119 .L1104: + 10120 0138 264C ldr r4, .L1125+16 + 10121 013a 4A61 str r2, [r1, #20] + 10122 013c 0023 movs r3, #0 + 10123 013e B0F5807F cmp r0, #256 + 10124 0142 1080 strh r0, [r2] @ movhi + 10125 0144 5460 str r4, [r2, #4] + 10126 0146 5380 strh r3, [r2, #2] @ movhi + 10127 0148 32D0 beq .L1111 + 10128 .L1109: + 10129 014a B0F5807F cmp r0, #256 + 10130 014e 12D8 bhi .L1106 + 10131 0150 1028 cmp r0, #16 + 10132 0152 0BD1 bne .L1124 + 10133 0154 2D49 ldr r1, .L1125+72 + 10134 0156 4FF00120 mov r0, #16777472 + 10135 015a C2E90210 strd r1, r0, [r2, #8] + 10136 015e 4FF07653 mov r3, #1031798784 + 10137 0162 1361 str r3, [r2, #16] @ float + 10138 .L1121: + 10139 0164 4FF0FF30 mov r0, #-1 + 10140 0168 30BC pop {r4, r5} + 10141 016a 7047 bx lr + 10142 .L1124: + 10143 016c 4028 cmp r0, #64 + 10144 016e F9D1 bne .L1121 + 10145 .L1112: + 10146 0170 4FF0FF30 mov r0, #-1 + 10147 0174 AAE7 b .L1103 + 10148 .L1106: + 10149 0176 B0F5806F cmp r0, #1024 + 10150 017a 05D0 beq .L1113 + 10151 017c B0F5805F cmp r0, #4096 + 10152 0180 4FF0FF30 mov r0, #-1 + 10153 0184 86D0 beq .L1100 + 10154 0186 6BE7 b .L1118 + 10155 .L1113: + 10156 0188 4FF0FF30 mov r0, #-1 + 10157 018c BCE7 b .L1101 + 10158 .L1099: + 10159 018e 0B60 str r3, [r1] + 10160 0190 5808 lsrs r0, r3, #1 + 10161 0192 0F4B ldr r3, .L1125+12 + 10162 0194 0D4C ldr r4, .L1125+8 + 10163 0196 CC60 str r4, [r1, #12] + ARM GAS /tmp/ccFqHvis.s page 177 + + + 10164 0198 C1E90432 strd r3, r2, [r1, #16] + 10165 019c 0D4C ldr r4, .L1125+16 + 10166 019e 8880 strh r0, [r1, #4] @ movhi + 10167 01a0 4FF48075 mov r5, #256 + 10168 01a4 0023 movs r3, #0 + 10169 01a6 CD80 strh r5, [r1, #6] @ movhi + 10170 01a8 1080 strh r0, [r2] @ movhi + 10171 01aa 5460 str r4, [r2, #4] + 10172 01ac 5380 strh r3, [r2, #2] @ movhi + 10173 01ae CCE7 b .L1109 + 10174 .L1111: + 10175 01b0 4FF0FF30 mov r0, #-1 + 10176 01b4 4CE7 b .L1102 + 10177 .L1123: + 10178 01b6 0748 ldr r0, .L1125+16 + 10179 01b8 4A61 str r2, [r1, #20] + 10180 01ba 4023 movs r3, #64 + 10181 01bc 8B60 str r3, [r1, #8] + 10182 01be C2E90030 strd r3, r0, [r2] + 10183 01c2 D5E7 b .L1112 + 10184 .L1126: + 10185 .align 2 + 10186 .L1125: + 10187 01c4 00000000 .word Weights_512 + 10188 01c8 00000000 .word cos_factors_512 + 10189 01cc 00000000 .word realCoefA + 10190 01d0 00000000 .word realCoefB + 10191 01d4 00000000 .word twiddleCoef_4096 + 10192 01d8 1E000000 .word armBitRevTable+30 + 10193 01dc 00000000 .word Weights_8192 + 10194 01e0 00000000 .word cos_factors_8192 + 10195 01e4 00100001 .word 16781312 + 10196 01e8 00000000 .word armBitRevTable + 10197 01ec 00000000 .word Weights_128 + 10198 01f0 00000000 .word cos_factors_128 + 10199 01f4 40000001 .word 16777280 + 10200 01f8 7E000000 .word armBitRevTable+126 + 10201 01fc 00000000 .word Weights_2048 + 10202 0200 00000000 .word cos_factors_2048 + 10203 0204 00040001 .word 16778240 + 10204 0208 06000000 .word armBitRevTable+6 + 10205 020c FE010000 .word armBitRevTable+510 + 10207 .section .text.arm_dct4_init_q15,"ax",%progbits + 10208 .align 1 + 10209 .p2align 2,,3 + 10210 .global arm_dct4_init_q15 + 10211 .syntax unified + 10212 .thumb + 10213 .thumb_func + 10214 .fpu fpv4-sp-d16 + 10216 arm_dct4_init_q15: + 10217 @ args = 8, pretend = 0, frame = 0 + 10218 @ frame_needed = 0, uses_anonymous_args = 0 + 10219 @ link register save eliminated. + 10220 0000 10B4 push {r4} + 10221 0002 B3F5006F cmp r3, #2048 + 10222 0006 C0E90412 strd r1, r2, [r0, #16] + ARM GAS /tmp/ccFqHvis.s page 178 + + + 10223 000a BDF804C0 ldrh ip, [sp, #4] + 10224 000e BDF90820 ldrsh r2, [sp, #8] + 10225 0012 A0F802C0 strh ip, [r0, #2] @ movhi + 10226 0016 0380 strh r3, [r0] @ movhi + 10227 0018 8280 strh r2, [r0, #4] @ movhi + 10228 001a 00F08280 beq .L1128 + 10229 001e 18D8 bhi .L1129 + 10230 0020 802B cmp r3, #128 + 10231 0022 6CD0 beq .L1130 + 10232 0024 B3F5007F cmp r3, #512 + 10233 0028 52D1 bne .L1153 + 10234 002a 534C ldr r4, .L1155 + 10235 002c 534A ldr r2, .L1155+4 + 10236 002e C0E90242 strd r4, r2, [r0, #8] + 10237 0032 5348 ldr r0, .L1155+8 + 10238 0034 534C ldr r4, .L1155+12 + 10239 0036 0B60 str r3, [r1] + 10240 0038 4FF48072 mov r2, #256 + 10241 003c C1E90340 strd r4, r0, [r1, #12] + 10242 0040 8A80 strh r2, [r1, #4] @ movhi + 10243 0042 0020 movs r0, #0 + 10244 .L1136: + 10245 0044 504B ldr r3, .L1155+16 + 10246 0046 4B61 str r3, [r1, #20] + 10247 0048 1022 movs r2, #16 + 10248 004a 8A60 str r2, [r1, #8] + 10249 .L1149: + 10250 004c 5DF8044B ldr r4, [sp], #4 + 10251 0050 7047 bx lr + 10252 .L1129: + 10253 0052 B3F5005F cmp r3, #8192 + 10254 0056 13D1 bne .L1133 + 10255 0058 4C4C ldr r4, .L1155+20 + 10256 005a 4D4A ldr r2, .L1155+24 + 10257 005c C0E90242 strd r4, r2, [r0, #8] + 10258 0060 4748 ldr r0, .L1155+8 + 10259 0062 484C ldr r4, .L1155+12 + 10260 0064 0B60 str r3, [r1] + 10261 0066 4FF48072 mov r2, #256 + 10262 006a C1E90340 strd r4, r0, [r1, #12] + 10263 006e 8A80 strh r2, [r1, #4] @ movhi + 10264 0070 0020 movs r0, #0 + 10265 .L1134: + 10266 0072 484B ldr r3, .L1155+28 + 10267 0074 5DF8044B ldr r4, [sp], #4 + 10268 0078 4B61 str r3, [r1, #20] + 10269 007a 0122 movs r2, #1 + 10270 007c 8A60 str r2, [r1, #8] + 10271 007e 7047 bx lr + 10272 .L1133: + 10273 0080 404C ldr r4, .L1155+12 + 10274 0082 3F48 ldr r0, .L1155+8 + 10275 0084 0B60 str r3, [r1] + 10276 0086 C1E90340 strd r4, r0, [r1, #12] + 10277 008a 4FF48072 mov r2, #256 + 10278 008e 8A80 strh r2, [r1, #4] @ movhi + 10279 .L1139: + ARM GAS /tmp/ccFqHvis.s page 179 + + + 10280 0090 B3F5805F cmp r3, #4096 + 10281 0094 66D0 beq .L1142 + 10282 0096 13D8 bhi .L1143 + 10283 0098 B3F5806F cmp r3, #1024 + 10284 009c 08D1 bne .L1154 + 10285 009e 3E4B ldr r3, .L1155+32 + 10286 00a0 5DF8044B ldr r4, [sp], #4 + 10287 00a4 4B61 str r3, [r1, #20] + 10288 00a6 0822 movs r2, #8 + 10289 00a8 4FF0FF30 mov r0, #-1 + 10290 00ac 8A60 str r2, [r1, #8] + 10291 00ae 7047 bx lr + 10292 .L1154: + 10293 00b0 B3F5007F cmp r3, #512 + 10294 00b4 4FF0FF30 mov r0, #-1 + 10295 00b8 C4D0 beq .L1136 + 10296 00ba 5DF8044B ldr r4, [sp], #4 + 10297 00be 7047 bx lr + 10298 .L1143: + 10299 00c0 B3F5005F cmp r3, #8192 + 10300 00c4 4FF0FF30 mov r0, #-1 + 10301 00c8 D3D0 beq .L1134 + 10302 00ca 5DF8044B ldr r4, [sp], #4 + 10303 00ce 7047 bx lr + 10304 .L1153: + 10305 00d0 4FF48072 mov r2, #256 + 10306 00d4 2B4C ldr r4, .L1155+12 + 10307 00d6 2A48 ldr r0, .L1155+8 + 10308 00d8 0B60 str r3, [r1] + 10309 00da 9342 cmp r3, r2 + 10310 00dc C1E90340 strd r4, r0, [r1, #12] + 10311 00e0 8A80 strh r2, [r1, #4] @ movhi + 10312 00e2 31D0 beq .L1138 + 10313 00e4 D4D8 bhi .L1139 + 10314 00e6 402B cmp r3, #64 + 10315 00e8 35D0 beq .L1140 + 10316 00ea 802B cmp r3, #128 + 10317 00ec 41D0 beq .L1145 + 10318 00ee 202B cmp r3, #32 + 10319 00f0 02D1 bne .L1151 + 10320 00f2 2A4B ldr r3, .L1155+36 + 10321 00f4 8A60 str r2, [r1, #8] + 10322 00f6 4B61 str r3, [r1, #20] + 10323 .L1151: + 10324 00f8 4FF0FF30 mov r0, #-1 + 10325 00fc A6E7 b .L1149 + 10326 .L1130: + 10327 00fe 284C ldr r4, .L1155+40 + 10328 0100 284A ldr r2, .L1155+44 + 10329 0102 C0E90242 strd r4, r2, [r0, #8] + 10330 0106 1E48 ldr r0, .L1155+8 + 10331 0108 1E4C ldr r4, .L1155+12 + 10332 010a 0B60 str r3, [r1] + 10333 010c 4FF48072 mov r2, #256 + 10334 0110 C1E90340 strd r4, r0, [r1, #12] + 10335 0114 8A80 strh r2, [r1, #4] @ movhi + 10336 0116 0020 movs r0, #0 + ARM GAS /tmp/ccFqHvis.s page 180 + + + 10337 .L1137: + 10338 0118 234B ldr r3, .L1155+48 + 10339 011a 4B61 str r3, [r1, #20] + 10340 011c 4022 movs r2, #64 + 10341 011e 8A60 str r2, [r1, #8] + 10342 0120 94E7 b .L1149 + 10343 .L1128: + 10344 0122 224C ldr r4, .L1155+52 + 10345 0124 224A ldr r2, .L1155+56 + 10346 0126 4FF4807C mov ip, #256 + 10347 012a C0E90242 strd r4, r2, [r0, #8] + 10348 012e 1548 ldr r0, .L1155+12 + 10349 0130 134A ldr r2, .L1155+8 + 10350 0132 204C ldr r4, .L1155+60 + 10351 0134 0B60 str r3, [r1] + 10352 0136 0423 movs r3, #4 + 10353 0138 C860 str r0, [r1, #12] + 10354 013a A1F804C0 strh ip, [r1, #4] @ movhi + 10355 013e 4C61 str r4, [r1, #20] + 10356 0140 0A61 str r2, [r1, #16] + 10357 0142 8B60 str r3, [r1, #8] + 10358 0144 0020 movs r0, #0 + 10359 0146 81E7 b .L1149 + 10360 .L1138: + 10361 0148 1B4B ldr r3, .L1155+64 + 10362 014a 4B61 str r3, [r1, #20] + 10363 014c 2022 movs r2, #32 + 10364 014e 8A60 str r2, [r1, #8] + 10365 0150 4FF0FF30 mov r0, #-1 + 10366 0154 7AE7 b .L1149 + 10367 .L1140: + 10368 0156 194B ldr r3, .L1155+68 + 10369 0158 4B61 str r3, [r1, #20] + 10370 015a 8022 movs r2, #128 + 10371 015c 8A60 str r2, [r1, #8] + 10372 015e 4FF0FF30 mov r0, #-1 + 10373 0162 73E7 b .L1149 + 10374 .L1142: + 10375 0164 164B ldr r3, .L1155+72 + 10376 0166 4B61 str r3, [r1, #20] + 10377 0168 0222 movs r2, #2 + 10378 016a 8A60 str r2, [r1, #8] + 10379 016c 4FF0FF30 mov r0, #-1 + 10380 0170 6CE7 b .L1149 + 10381 .L1145: + 10382 0172 4FF0FF30 mov r0, #-1 + 10383 0176 CFE7 b .L1137 + 10384 .L1156: + 10385 .align 2 + 10386 .L1155: + 10387 0178 00000000 .word WeightsQ15_512 + 10388 017c 00000000 .word cos_factorsQ15_512 + 10389 0180 00000000 .word realCoefBQ15 + 10390 0184 00000000 .word realCoefAQ15 + 10391 0188 00000000 .word arm_cfft_sR_q15_len256 + 10392 018c 00000000 .word WeightsQ15_8192 + 10393 0190 00000000 .word cos_factorsQ15_8192 + ARM GAS /tmp/ccFqHvis.s page 181 + + + 10394 0194 00000000 .word arm_cfft_sR_q15_len4096 + 10395 0198 00000000 .word arm_cfft_sR_q15_len512 + 10396 019c 00000000 .word arm_cfft_sR_q15_len16 + 10397 01a0 00000000 .word WeightsQ15_128 + 10398 01a4 00000000 .word cos_factorsQ15_128 + 10399 01a8 00000000 .word arm_cfft_sR_q15_len64 + 10400 01ac 00000000 .word WeightsQ15_2048 + 10401 01b0 00000000 .word cos_factorsQ15_2048 + 10402 01b4 00000000 .word arm_cfft_sR_q15_len1024 + 10403 01b8 00000000 .word arm_cfft_sR_q15_len128 + 10404 01bc 00000000 .word arm_cfft_sR_q15_len32 + 10405 01c0 00000000 .word arm_cfft_sR_q15_len2048 + 10407 .section .text.arm_dct4_init_q31,"ax",%progbits + 10408 .align 1 + 10409 .p2align 2,,3 + 10410 .global arm_dct4_init_q31 + 10411 .syntax unified + 10412 .thumb + 10413 .thumb_func + 10414 .fpu fpv4-sp-d16 + 10416 arm_dct4_init_q31: + 10417 @ args = 8, pretend = 0, frame = 0 + 10418 @ frame_needed = 0, uses_anonymous_args = 0 + 10419 @ link register save eliminated. + 10420 0000 10B4 push {r4} + 10421 0002 B3F5006F cmp r3, #2048 + 10422 0006 C0E90412 strd r1, r2, [r0, #16] + 10423 000a BDF804C0 ldrh ip, [sp, #4] + 10424 000e 029A ldr r2, [sp, #8] + 10425 0010 A0F802C0 strh ip, [r0, #2] @ movhi + 10426 0014 0380 strh r3, [r0] @ movhi + 10427 0016 4260 str r2, [r0, #4] + 10428 0018 00F08280 beq .L1158 + 10429 001c 18D8 bhi .L1159 + 10430 001e 802B cmp r3, #128 + 10431 0020 6CD0 beq .L1160 + 10432 0022 B3F5007F cmp r3, #512 + 10433 0026 52D1 bne .L1183 + 10434 0028 534C ldr r4, .L1185 + 10435 002a 544A ldr r2, .L1185+4 + 10436 002c C0E90242 strd r4, r2, [r0, #8] + 10437 0030 5348 ldr r0, .L1185+8 + 10438 0032 544C ldr r4, .L1185+12 + 10439 0034 0B60 str r3, [r1] + 10440 0036 4FF48072 mov r2, #256 + 10441 003a C1E90340 strd r4, r0, [r1, #12] + 10442 003e 8A80 strh r2, [r1, #4] @ movhi + 10443 0040 0020 movs r0, #0 + 10444 .L1166: + 10445 0042 514B ldr r3, .L1185+16 + 10446 0044 4B61 str r3, [r1, #20] + 10447 0046 1022 movs r2, #16 + 10448 0048 8A60 str r2, [r1, #8] + 10449 .L1179: + 10450 004a 5DF8044B ldr r4, [sp], #4 + 10451 004e 7047 bx lr + 10452 .L1159: + ARM GAS /tmp/ccFqHvis.s page 182 + + + 10453 0050 B3F5005F cmp r3, #8192 + 10454 0054 13D1 bne .L1163 + 10455 0056 4D4C ldr r4, .L1185+20 + 10456 0058 4D4A ldr r2, .L1185+24 + 10457 005a C0E90242 strd r4, r2, [r0, #8] + 10458 005e 4848 ldr r0, .L1185+8 + 10459 0060 484C ldr r4, .L1185+12 + 10460 0062 0B60 str r3, [r1] + 10461 0064 4FF48072 mov r2, #256 + 10462 0068 C1E90340 strd r4, r0, [r1, #12] + 10463 006c 8A80 strh r2, [r1, #4] @ movhi + 10464 006e 0020 movs r0, #0 + 10465 .L1164: + 10466 0070 484B ldr r3, .L1185+28 + 10467 0072 5DF8044B ldr r4, [sp], #4 + 10468 0076 4B61 str r3, [r1, #20] + 10469 0078 0122 movs r2, #1 + 10470 007a 8A60 str r2, [r1, #8] + 10471 007c 7047 bx lr + 10472 .L1163: + 10473 007e 414C ldr r4, .L1185+12 + 10474 0080 3F48 ldr r0, .L1185+8 + 10475 0082 0B60 str r3, [r1] + 10476 0084 C1E90340 strd r4, r0, [r1, #12] + 10477 0088 4FF48072 mov r2, #256 + 10478 008c 8A80 strh r2, [r1, #4] @ movhi + 10479 .L1169: + 10480 008e B3F5805F cmp r3, #4096 + 10481 0092 66D0 beq .L1172 + 10482 0094 13D8 bhi .L1173 + 10483 0096 B3F5806F cmp r3, #1024 + 10484 009a 08D1 bne .L1184 + 10485 009c 3E4B ldr r3, .L1185+32 + 10486 009e 5DF8044B ldr r4, [sp], #4 + 10487 00a2 4B61 str r3, [r1, #20] + 10488 00a4 0822 movs r2, #8 + 10489 00a6 4FF0FF30 mov r0, #-1 + 10490 00aa 8A60 str r2, [r1, #8] + 10491 00ac 7047 bx lr + 10492 .L1184: + 10493 00ae B3F5007F cmp r3, #512 + 10494 00b2 4FF0FF30 mov r0, #-1 + 10495 00b6 C4D0 beq .L1166 + 10496 00b8 5DF8044B ldr r4, [sp], #4 + 10497 00bc 7047 bx lr + 10498 .L1173: + 10499 00be B3F5005F cmp r3, #8192 + 10500 00c2 4FF0FF30 mov r0, #-1 + 10501 00c6 D3D0 beq .L1164 + 10502 00c8 5DF8044B ldr r4, [sp], #4 + 10503 00cc 7047 bx lr + 10504 .L1183: + 10505 00ce 4FF48072 mov r2, #256 + 10506 00d2 2C4C ldr r4, .L1185+12 + 10507 00d4 2A48 ldr r0, .L1185+8 + 10508 00d6 0B60 str r3, [r1] + 10509 00d8 9342 cmp r3, r2 + ARM GAS /tmp/ccFqHvis.s page 183 + + + 10510 00da C1E90340 strd r4, r0, [r1, #12] + 10511 00de 8A80 strh r2, [r1, #4] @ movhi + 10512 00e0 31D0 beq .L1168 + 10513 00e2 D4D8 bhi .L1169 + 10514 00e4 402B cmp r3, #64 + 10515 00e6 35D0 beq .L1170 + 10516 00e8 802B cmp r3, #128 + 10517 00ea 41D0 beq .L1175 + 10518 00ec 202B cmp r3, #32 + 10519 00ee 02D1 bne .L1181 + 10520 00f0 2A4B ldr r3, .L1185+36 + 10521 00f2 8A60 str r2, [r1, #8] + 10522 00f4 4B61 str r3, [r1, #20] + 10523 .L1181: + 10524 00f6 4FF0FF30 mov r0, #-1 + 10525 00fa A6E7 b .L1179 + 10526 .L1160: + 10527 00fc 284C ldr r4, .L1185+40 + 10528 00fe 294A ldr r2, .L1185+44 + 10529 0100 C0E90242 strd r4, r2, [r0, #8] + 10530 0104 1E48 ldr r0, .L1185+8 + 10531 0106 1F4C ldr r4, .L1185+12 + 10532 0108 0B60 str r3, [r1] + 10533 010a 4FF48072 mov r2, #256 + 10534 010e C1E90340 strd r4, r0, [r1, #12] + 10535 0112 8A80 strh r2, [r1, #4] @ movhi + 10536 0114 0020 movs r0, #0 + 10537 .L1167: + 10538 0116 244B ldr r3, .L1185+48 + 10539 0118 4B61 str r3, [r1, #20] + 10540 011a 4022 movs r2, #64 + 10541 011c 8A60 str r2, [r1, #8] + 10542 011e 94E7 b .L1179 + 10543 .L1158: + 10544 0120 224C ldr r4, .L1185+52 + 10545 0122 234A ldr r2, .L1185+56 + 10546 0124 4FF4807C mov ip, #256 + 10547 0128 C0E90242 strd r4, r2, [r0, #8] + 10548 012c 1548 ldr r0, .L1185+12 + 10549 012e 144A ldr r2, .L1185+8 + 10550 0130 204C ldr r4, .L1185+60 + 10551 0132 0B60 str r3, [r1] + 10552 0134 0423 movs r3, #4 + 10553 0136 C860 str r0, [r1, #12] + 10554 0138 A1F804C0 strh ip, [r1, #4] @ movhi + 10555 013c 4C61 str r4, [r1, #20] + 10556 013e 0A61 str r2, [r1, #16] + 10557 0140 8B60 str r3, [r1, #8] + 10558 0142 0020 movs r0, #0 + 10559 0144 81E7 b .L1179 + 10560 .L1168: + 10561 0146 1C4B ldr r3, .L1185+64 + 10562 0148 4B61 str r3, [r1, #20] + 10563 014a 2022 movs r2, #32 + 10564 014c 8A60 str r2, [r1, #8] + 10565 014e 4FF0FF30 mov r0, #-1 + 10566 0152 7AE7 b .L1179 + ARM GAS /tmp/ccFqHvis.s page 184 + + + 10567 .L1170: + 10568 0154 194B ldr r3, .L1185+68 + 10569 0156 4B61 str r3, [r1, #20] + 10570 0158 8022 movs r2, #128 + 10571 015a 8A60 str r2, [r1, #8] + 10572 015c 4FF0FF30 mov r0, #-1 + 10573 0160 73E7 b .L1179 + 10574 .L1172: + 10575 0162 174B ldr r3, .L1185+72 + 10576 0164 4B61 str r3, [r1, #20] + 10577 0166 0222 movs r2, #2 + 10578 0168 8A60 str r2, [r1, #8] + 10579 016a 4FF0FF30 mov r0, #-1 + 10580 016e 6CE7 b .L1179 + 10581 .L1175: + 10582 0170 4FF0FF30 mov r0, #-1 + 10583 0174 CFE7 b .L1167 + 10584 .L1186: + 10585 0176 00BF .align 2 + 10586 .L1185: + 10587 0178 00000000 .word WeightsQ31_512 + 10588 017c 00000000 .word cos_factorsQ31_512 + 10589 0180 00000000 .word realCoefBQ31 + 10590 0184 00000000 .word realCoefAQ31 + 10591 0188 00000000 .word arm_cfft_sR_q31_len256 + 10592 018c 00000000 .word WeightsQ31_8192 + 10593 0190 00000000 .word cos_factorsQ31_8192 + 10594 0194 00000000 .word arm_cfft_sR_q31_len4096 + 10595 0198 00000000 .word arm_cfft_sR_q31_len512 + 10596 019c 00000000 .word arm_cfft_sR_q31_len16 + 10597 01a0 00000000 .word WeightsQ31_128 + 10598 01a4 00000000 .word cos_factorsQ31_128 + 10599 01a8 00000000 .word arm_cfft_sR_q31_len64 + 10600 01ac 00000000 .word WeightsQ31_2048 + 10601 01b0 00000000 .word cos_factorsQ31_2048 + 10602 01b4 00000000 .word arm_cfft_sR_q31_len1024 + 10603 01b8 00000000 .word arm_cfft_sR_q31_len128 + 10604 01bc 00000000 .word arm_cfft_sR_q31_len32 + 10605 01c0 00000000 .word arm_cfft_sR_q31_len2048 + 10607 .section .text.arm_split_rfft_f32,"ax",%progbits + 10608 .align 1 + 10609 .p2align 2,,3 + 10610 .global arm_split_rfft_f32 + 10611 .syntax unified + 10612 .thumb + 10613 .thumb_func + 10614 .fpu fpv4-sp-d16 + 10616 arm_split_rfft_f32: + 10617 @ args = 8, pretend = 0, frame = 0 + 10618 @ frame_needed = 0, uses_anonymous_args = 0 + 10619 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 10620 0004 DDE90657 ldrd r5, r7, [sp, #24] + 10621 0008 CE00 lsls r6, r1, #3 + 10622 000a A6F1040C sub ip, r6, #4 + 10623 000e 4C1E subs r4, r1, #1 + 10624 0010 02EBC702 add r2, r2, r7, lsl #3 + 10625 0014 03EBC703 add r3, r3, r7, lsl #3 + ARM GAS /tmp/ccFqHvis.s page 185 + + + 10626 0018 05EB011E add lr, r5, r1, lsl #4 + 10627 001c 8444 add ip, ip, r0 + 10628 001e 41D0 beq .L1188 + 10629 0020 012F cmp r7, #1 + 10630 0022 AEF1040E sub lr, lr, #4 + 10631 0026 53D1 bne .L1199 + 10632 0028 ACF10801 sub r1, ip, #8 + 10633 002c AEF1080E sub lr, lr, #8 + 10634 0030 05F11007 add r7, r5, #16 + 10635 0034 00F1100C add ip, r0, #16 + 10636 .L1192: + 10637 0038 D2ED005A vldr.32 s11, [r2] + 10638 003c 5CED017A vldr.32 s15, [ip, #-4] + 10639 0040 D2ED016A vldr.32 s13, [r2, #4] + 10640 0044 1CED025A vldr.32 s10, [ip, #-8] + 10641 0048 D1ED024A vldr.32 s9, [r1, #8] + 10642 004c 27EEA57A vmul.f32 s14, s15, s11 + 10643 0050 9846 mov r8, r3 + 10644 0052 A5EE267A vfma.f32 s14, s10, s13 + 10645 0056 AEF1080E sub lr, lr, #8 + 10646 005a 0837 adds r7, r7, #8 + 10647 005c 74EEA77A vadd.f32 s15, s9, s15 + 10648 0060 98ED006A vldr.32 s12, [r8] + 10649 0064 66EEE77A vnmul.f32 s15, s13, s15 + 10650 0068 A6EE647A vfms.f32 s14, s12, s9 + 10651 006c 013C subs r4, r4, #1 + 10652 006e 03F10803 add r3, r3, #8 + 10653 0072 E5EE257A vfma.f32 s15, s10, s11 + 10654 0076 02F10802 add r2, r2, #8 + 10655 007a A1F10801 sub r1, r1, #8 + 10656 007e D1ED035A vldr.32 s11, [r1, #12] + 10657 0082 A5EEE67A vfms.f32 s14, s11, s13 + 10658 0086 0CF1080C add ip, ip, #8 + 10659 008a E5EE867A vfma.f32 s15, s11, s12 + 10660 008e F1EE476A vneg.f32 s13, s14 + 10661 0092 47ED047A vstr.32 s15, [r7, #-16] + 10662 0096 07ED037A vstr.32 s14, [r7, #-12] + 10663 009a CEED046A vstr.32 s13, [lr, #16] + 10664 009e CEED037A vstr.32 s15, [lr, #12] + 10665 00a2 C9D1 bne .L1192 + 10666 .L1188: + 10667 00a4 90ED017A vldr.32 s14, [r0, #4] + 10668 00a8 D0ED007A vldr.32 s15, [r0] + 10669 00ac 2E44 add r6, r6, r5 + 10670 00ae 77EEC77A vsub.f32 s15, s15, s14 + 10671 00b2 0023 movs r3, #0 + 10672 00b4 C6ED007A vstr.32 s15, [r6] + 10673 00b8 7360 str r3, [r6, #4] @ float + 10674 00ba D0ED007A vldr.32 s15, [r0] + 10675 00be 90ED017A vldr.32 s14, [r0, #4] + 10676 00c2 6B60 str r3, [r5, #4] @ float + 10677 00c4 77EE877A vadd.f32 s15, s15, s14 + 10678 00c8 C5ED007A vstr.32 s15, [r5] + 10679 00cc BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 10680 .L1199: + 10681 00d0 4FEAC708 lsl r8, r7, #3 + 10682 00d4 ACF10801 sub r1, ip, #8 + ARM GAS /tmp/ccFqHvis.s page 186 + + + 10683 00d8 AEF1080E sub lr, lr, #8 + 10684 00dc 00F1100C add ip, r0, #16 + 10685 00e0 05F11007 add r7, r5, #16 + 10686 .L1190: + 10687 00e4 D2ED005A vldr.32 s11, [r2] + 10688 00e8 5CED017A vldr.32 s15, [ip, #-4] + 10689 00ec D2ED016A vldr.32 s13, [r2, #4] + 10690 00f0 1CED025A vldr.32 s10, [ip, #-8] + 10691 00f4 D1ED024A vldr.32 s9, [r1, #8] + 10692 00f8 93ED006A vldr.32 s12, [r3] + 10693 00fc 27EEA57A vmul.f32 s14, s15, s11 + 10694 0100 77EEA47A vadd.f32 s15, s15, s9 + 10695 0104 A5EE267A vfma.f32 s14, s10, s13 + 10696 0108 013C subs r4, r4, #1 + 10697 010a 4344 add r3, r3, r8 + 10698 010c 66EEE77A vnmul.f32 s15, s13, s15 + 10699 0110 A4EEC67A vfms.f32 s14, s9, s12 + 10700 0114 4244 add r2, r2, r8 + 10701 0116 0CF1080C add ip, ip, #8 + 10702 011a E5EE257A vfma.f32 s15, s10, s11 + 10703 011e A1F10801 sub r1, r1, #8 + 10704 0122 07F10807 add r7, r7, #8 + 10705 0126 D1ED035A vldr.32 s11, [r1, #12] + 10706 012a A5EEE67A vfms.f32 s14, s11, s13 + 10707 012e AEF1080E sub lr, lr, #8 + 10708 0132 E5EE867A vfma.f32 s15, s11, s12 + 10709 0136 F1EE476A vneg.f32 s13, s14 + 10710 013a 47ED047A vstr.32 s15, [r7, #-16] + 10711 013e 07ED037A vstr.32 s14, [r7, #-12] + 10712 0142 CEED046A vstr.32 s13, [lr, #16] + 10713 0146 CEED037A vstr.32 s15, [lr, #12] + 10714 014a CBD1 bne .L1190 + 10715 014c AAE7 b .L1188 + 10717 014e 00BF .section .text.arm_rfft_f32,"ax",%progbits + 10718 .align 1 + 10719 .p2align 2,,3 + 10720 .global arm_rfft_f32 + 10721 .syntax unified + 10722 .thumb + 10723 .thumb_func + 10724 .fpu fpv4-sp-d16 + 10726 arm_rfft_f32: + 10727 @ args = 0, pretend = 0, frame = 0 + 10728 @ frame_needed = 0, uses_anonymous_args = 0 + 10729 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 10730 0004 8379 ldrb r3, [r0, #6] @ zero_extendqisi2 + 10731 0006 4669 ldr r6, [r0, #20] + 10732 0008 012B cmp r3, #1 + 10733 000a 82B0 sub sp, sp, #8 + 10734 000c 0546 mov r5, r0 + 10735 000e 8846 mov r8, r1 + 10736 0010 1746 mov r7, r2 + 10737 0012 14D0 beq .L1215 + 10738 0014 B389 ldrh r3, [r6, #12] + 10739 0016 7268 ldr r2, [r6, #4] + 10740 0018 3188 ldrh r1, [r6] + 10741 001a 4046 mov r0, r8 + ARM GAS /tmp/ccFqHvis.s page 187 + + + 10742 001c FFF7FEFF bl arm_radix4_butterfly_f32 + 10743 0020 EB79 ldrb r3, [r5, #7] @ zero_extendqisi2 + 10744 0022 012B cmp r3, #1 + 10745 0024 5FD0 beq .L1216 + 10746 .L1208: + 10747 0026 AA68 ldr r2, [r5, #8] + 10748 0028 2B69 ldr r3, [r5, #16] + 10749 002a CDE90072 strd r7, r2, [sp] + 10750 002e 4046 mov r0, r8 + 10751 0030 EA68 ldr r2, [r5, #12] + 10752 0032 A988 ldrh r1, [r5, #4] + 10753 0034 FFF7FEFF bl arm_split_rfft_f32 + 10754 .L1200: + 10755 0038 02B0 add sp, sp, #8 + 10756 @ sp needed + 10757 003a BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 10758 .L1215: + 10759 003e 8288 ldrh r2, [r0, #4] + 10760 0040 C468 ldr r4, [r0, #12] + 10761 0042 0069 ldr r0, [r0, #16] + 10762 0044 01EBC203 add r3, r1, r2, lsl #3 + 10763 0048 0433 adds r3, r3, #4 + 10764 004a A968 ldr r1, [r5, #8] + 10765 004c BAB3 cbz r2, .L1202 + 10766 004e 0129 cmp r1, #1 + 10767 0050 4FEAC10E lsl lr, r1, #3 + 10768 0054 4ED1 bne .L1217 + 10769 0056 083B subs r3, r3, #8 + 10770 0058 08F10801 add r1, r8, #8 + 10771 005c 07F1080C add ip, r7, #8 + 10772 .L1206: + 10773 0060 D4ED004A vldr.32 s9, [r4] + 10774 0064 51ED017A vldr.32 s15, [r1, #-4] + 10775 0068 D4ED016A vldr.32 s13, [r4, #4] + 10776 006c 11ED024A vldr.32 s8, [r1, #-8] + 10777 0070 93ED025A vldr.32 s10, [r3, #8] + 10778 0074 93ED016A vldr.32 s12, [r3, #4] + 10779 0078 27EEA47A vmul.f32 s14, s15, s9 + 10780 007c 75EE277A vadd.f32 s15, s10, s15 + 10781 0080 A4EE667A vfms.f32 s14, s8, s13 + 10782 0084 8646 mov lr, r0 + 10783 0086 0CF1080C add ip, ip, #8 + 10784 008a DEED005A vldr.32 s11, [lr] + 10785 008e 67EEA67A vmul.f32 s15, s15, s13 + 10786 0092 A5EEC57A vfms.f32 s14, s11, s10 + 10787 0096 013A subs r2, r2, #1 + 10788 0098 00F10800 add r0, r0, #8 + 10789 009c E4EE247A vfma.f32 s15, s8, s9 + 10790 00a0 04F10804 add r4, r4, #8 + 10791 00a4 A3F10803 sub r3, r3, #8 + 10792 00a8 A6EE267A vfma.f32 s14, s12, s13 + 10793 00ac 01F10801 add r1, r1, #8 + 10794 00b0 E6EE257A vfma.f32 s15, s12, s11 + 10795 00b4 0CED037A vstr.32 s14, [ip, #-12] + 10796 00b8 4CED047A vstr.32 s15, [ip, #-16] + 10797 00bc D0D1 bne .L1206 + 10798 .L1202: + ARM GAS /tmp/ccFqHvis.s page 188 + + + 10799 00be B389 ldrh r3, [r6, #12] + 10800 00c0 96ED040A vldr.32 s0, [r6, #16] + 10801 00c4 7268 ldr r2, [r6, #4] + 10802 00c6 3188 ldrh r1, [r6] + 10803 00c8 3846 mov r0, r7 + 10804 00ca FFF7FEFF bl arm_radix4_butterfly_inverse_f32 + 10805 00ce EB79 ldrb r3, [r5, #7] @ zero_extendqisi2 + 10806 00d0 012B cmp r3, #1 + 10807 00d2 B1D1 bne .L1200 + 10808 00d4 B368 ldr r3, [r6, #8] + 10809 00d6 F289 ldrh r2, [r6, #14] + 10810 00d8 3188 ldrh r1, [r6] + 10811 00da 3846 mov r0, r7 + 10812 00dc 02B0 add sp, sp, #8 + 10813 @ sp needed + 10814 00de BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 10815 00e2 FFF7FEBF b arm_bitreversal_f32 + 10816 .L1216: + 10817 00e6 B368 ldr r3, [r6, #8] + 10818 00e8 F289 ldrh r2, [r6, #14] + 10819 00ea 3188 ldrh r1, [r6] + 10820 00ec 4046 mov r0, r8 + 10821 00ee FFF7FEFF bl arm_bitreversal_f32 + 10822 00f2 98E7 b .L1208 + 10823 .L1217: + 10824 00f4 08F10801 add r1, r8, #8 + 10825 00f8 083B subs r3, r3, #8 + 10826 00fa 07F1080C add ip, r7, #8 + 10827 .L1204: + 10828 00fe 94ED004A vldr.32 s8, [r4] + 10829 0102 51ED017A vldr.32 s15, [r1, #-4] + 10830 0106 D4ED016A vldr.32 s13, [r4, #4] + 10831 010a 51ED024A vldr.32 s9, [r1, #-8] + 10832 010e 93ED025A vldr.32 s10, [r3, #8] + 10833 0112 D0ED005A vldr.32 s11, [r0] + 10834 0116 93ED016A vldr.32 s12, [r3, #4] + 10835 011a 24EE277A vmul.f32 s14, s8, s15 + 10836 011e 77EE857A vadd.f32 s15, s15, s10 + 10837 0122 A4EEE67A vfms.f32 s14, s9, s13 + 10838 0126 013A subs r2, r2, #1 + 10839 0128 7044 add r0, r0, lr + 10840 012a 67EEA67A vmul.f32 s15, s15, s13 + 10841 012e A5EE657A vfms.f32 s14, s10, s11 + 10842 0132 7444 add r4, r4, lr + 10843 0134 01F10801 add r1, r1, #8 + 10844 0138 E4EE247A vfma.f32 s15, s8, s9 + 10845 013c A3F10803 sub r3, r3, #8 + 10846 0140 0CF1080C add ip, ip, #8 + 10847 0144 A6EE867A vfma.f32 s14, s13, s12 + 10848 0148 E5EE867A vfma.f32 s15, s11, s12 + 10849 014c 0CED037A vstr.32 s14, [ip, #-12] + 10850 0150 4CED047A vstr.32 s15, [ip, #-16] + 10851 0154 D3D1 bne .L1204 + 10852 0156 B2E7 b .L1202 + 10854 .section .text.arm_dct4_f32,"ax",%progbits + 10855 .align 1 + 10856 .p2align 2,,3 + ARM GAS /tmp/ccFqHvis.s page 189 + + + 10857 .global arm_dct4_f32 + 10858 .syntax unified + 10859 .thumb + 10860 .thumb_func + 10861 .fpu fpv4-sp-d16 + 10863 arm_dct4_f32: + 10864 @ args = 0, pretend = 0, frame = 0 + 10865 @ frame_needed = 0, uses_anonymous_args = 0 + 10866 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 10867 0004 1546 mov r5, r2 + 10868 0006 0646 mov r6, r0 + 10869 0008 D0F80C80 ldr r8, [r0, #12] + 10870 000c 0288 ldrh r2, [r0] + 10871 000e 8768 ldr r7, [r0, #8] + 10872 0010 0C46 mov r4, r1 + 10873 0012 B0EE000A vmov.f32 s0, #2.0e+0 + 10874 0016 2946 mov r1, r5 + 10875 0018 2846 mov r0, r5 + 10876 001a FFF7FEFF bl arm_scale_f32 + 10877 001e 3388 ldrh r3, [r6] + 10878 0020 4146 mov r1, r8 + 10879 0022 2A46 mov r2, r5 + 10880 0024 2846 mov r0, r5 + 10881 0026 FFF7FEFF bl arm_mult_f32 + 10882 002a 3288 ldrh r2, [r6] + 10883 002c 7188 ldrh r1, [r6, #2] + 10884 002e 05F10803 add r3, r5, #8 + 10885 0032 A446 mov ip, r4 + 10886 0034 04EB8200 add r0, r4, r2, lsl #2 + 10887 .L1219: + 10888 0038 53F808EC ldr lr, [r3, #-8] @ float + 10889 003c 4CF804EB str lr, [ip], #4 @ float + 10890 0040 0139 subs r1, r1, #1 + 10891 0042 53F804EC ldr lr, [r3, #-4] @ float + 10892 0046 40F804ED str lr, [r0, #-4]! @ float + 10893 004a 03F10803 add r3, r3, #8 + 10894 004e F3D1 bne .L1219 + 10895 0050 2946 mov r1, r5 + 10896 0052 2346 mov r3, r4 + 10897 .L1220: + 10898 0054 53F8040B ldr r0, [r3], #4 @ float + 10899 0058 41F8040B str r0, [r1], #4 @ float + 10900 005c 013A subs r2, r2, #1 + 10901 005e F9D1 bne .L1220 + 10902 0060 2246 mov r2, r4 + 10903 0062 3069 ldr r0, [r6, #16] + 10904 0064 2946 mov r1, r5 + 10905 0066 FFF7FEFF bl arm_rfft_f32 + 10906 006a 2246 mov r2, r4 + 10907 006c 2046 mov r0, r4 + 10908 006e 3388 ldrh r3, [r6] + 10909 0070 3946 mov r1, r7 + 10910 0072 FFF7FEFF bl arm_cmplx_mult_cmplx_f32 + 10911 0076 D4ED007A vldr.32 s15, [r4] + 10912 007a 3288 ldrh r2, [r6] + 10913 007c B6EE007A vmov.f32 s14, #5.0e-1 + 10914 0080 67EE877A vmul.f32 s15, s15, s14 + ARM GAS /tmp/ccFqHvis.s page 190 + + + 10915 0084 2146 mov r1, r4 + 10916 0086 2B1D adds r3, r5, #4 + 10917 0088 013A subs r2, r2, #1 + 10918 008a 1031 adds r1, r1, #16 + 10919 008c 1C46 mov r4, r3 + 10920 008e C5ED007A vstr.32 s15, [r5] + 10921 0092 1046 mov r0, r2 + 10922 .L1221: + 10923 0094 11ED027A vldr.32 s14, [r1, #-8] + 10924 0098 77EE677A vsub.f32 s15, s14, s15 + 10925 009c 0138 subs r0, r0, #1 + 10926 009e 01F10801 add r1, r1, #8 + 10927 00a2 E4EC017A vstmia.32 r4!, {s15} + 10928 00a6 F5D1 bne .L1221 + 10929 00a8 00E0 b .L1222 + 10930 .L1229: + 10931 00aa 013A subs r2, r2, #1 + 10932 .L1222: + 10933 00ac 95ED007A vldr.32 s14, [r5] + 10934 00b0 D6ED017A vldr.32 s15, [r6, #4] + 10935 00b4 67EE877A vmul.f32 s15, s15, s14 + 10936 00b8 1D46 mov r5, r3 + 10937 00ba 43ED017A vstr.32 s15, [r3, #-4] + 10938 00be 0433 adds r3, r3, #4 + 10939 00c0 002A cmp r2, #0 + 10940 00c2 F2D1 bne .L1229 + 10941 00c4 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 10943 .section .text.arm_split_rifft_f32,"ax",%progbits + 10944 .align 1 + 10945 .p2align 2,,3 + 10946 .global arm_split_rifft_f32 + 10947 .syntax unified + 10948 .thumb + 10949 .thumb_func + 10950 .fpu fpv4-sp-d16 + 10952 arm_split_rifft_f32: + 10953 @ args = 8, pretend = 0, frame = 0 + 10954 @ frame_needed = 0, uses_anonymous_args = 0 + 10955 0000 30B5 push {r4, r5, lr} + 10956 0002 049D ldr r5, [sp, #16] + 10957 0004 00EBC10C add ip, r0, r1, lsl #3 + 10958 0008 D1B3 cbz r1, .L1230 + 10959 000a 012D cmp r5, #1 + 10960 000c 0CF1040C add ip, ip, #4 + 10961 0010 4FEAC504 lsl r4, r5, #3 + 10962 0014 35D1 bne .L1242 + 10963 0016 039C ldr r4, [sp, #12] + 10964 0018 ACF1080C sub ip, ip, #8 + 10965 001c 0830 adds r0, r0, #8 + 10966 001e 04F1080E add lr, r4, #8 + 10967 .L1235: + 10968 0022 D2ED004A vldr.32 s9, [r2] + 10969 0026 50ED017A vldr.32 s15, [r0, #-4] + 10970 002a D2ED016A vldr.32 s13, [r2, #4] + 10971 002e 10ED024A vldr.32 s8, [r0, #-8] + 10972 0032 9CED025A vldr.32 s10, [ip, #8] + 10973 0036 9CED016A vldr.32 s12, [ip, #4] + ARM GAS /tmp/ccFqHvis.s page 191 + + + 10974 003a 27EEA47A vmul.f32 s14, s15, s9 + 10975 003e 75EE277A vadd.f32 s15, s10, s15 + 10976 0042 A4EE667A vfms.f32 s14, s8, s13 + 10977 0046 1C46 mov r4, r3 + 10978 0048 0EF1080E add lr, lr, #8 + 10979 004c D4ED005A vldr.32 s11, [r4] + 10980 0050 67EEA67A vmul.f32 s15, s15, s13 + 10981 0054 A5EEC57A vfms.f32 s14, s11, s10 + 10982 0058 0139 subs r1, r1, #1 + 10983 005a 03F10803 add r3, r3, #8 + 10984 005e E4EE247A vfma.f32 s15, s8, s9 + 10985 0062 02F10802 add r2, r2, #8 + 10986 0066 ACF1080C sub ip, ip, #8 + 10987 006a A6EE267A vfma.f32 s14, s12, s13 + 10988 006e 00F10800 add r0, r0, #8 + 10989 0072 E6EE257A vfma.f32 s15, s12, s11 + 10990 0076 0EED037A vstr.32 s14, [lr, #-12] + 10991 007a 4EED047A vstr.32 s15, [lr, #-16] + 10992 007e D0D1 bne .L1235 + 10993 .L1230: + 10994 0080 30BD pop {r4, r5, pc} + 10995 .L1242: + 10996 0082 039D ldr r5, [sp, #12] + 10997 0084 0830 adds r0, r0, #8 + 10998 0086 ACF1080C sub ip, ip, #8 + 10999 008a 05F1080E add lr, r5, #8 + 11000 .L1233: + 11001 008e D2ED004A vldr.32 s9, [r2] + 11002 0092 50ED017A vldr.32 s15, [r0, #-4] + 11003 0096 D2ED016A vldr.32 s13, [r2, #4] + 11004 009a 10ED024A vldr.32 s8, [r0, #-8] + 11005 009e 9CED025A vldr.32 s10, [ip, #8] + 11006 00a2 D3ED005A vldr.32 s11, [r3] + 11007 00a6 9CED016A vldr.32 s12, [ip, #4] + 11008 00aa 27EEA47A vmul.f32 s14, s15, s9 + 11009 00ae 77EE857A vadd.f32 s15, s15, s10 + 11010 00b2 A4EE667A vfms.f32 s14, s8, s13 + 11011 00b6 0139 subs r1, r1, #1 + 11012 00b8 2344 add r3, r3, r4 + 11013 00ba 67EEA67A vmul.f32 s15, s15, s13 + 11014 00be A5EE657A vfms.f32 s14, s10, s11 + 11015 00c2 2244 add r2, r2, r4 + 11016 00c4 00F10800 add r0, r0, #8 + 11017 00c8 E4EE247A vfma.f32 s15, s8, s9 + 11018 00cc ACF1080C sub ip, ip, #8 + 11019 00d0 0EF1080E add lr, lr, #8 + 11020 00d4 A6EE267A vfma.f32 s14, s12, s13 + 11021 00d8 E6EE257A vfma.f32 s15, s12, s11 + 11022 00dc 0EED037A vstr.32 s14, [lr, #-12] + 11023 00e0 4EED047A vstr.32 s15, [lr, #-16] + 11024 00e4 D3D1 bne .L1233 + 11025 00e6 30BD pop {r4, r5, pc} + 11027 .section .text.stage_rfft_f32,"ax",%progbits + 11028 .align 1 + 11029 .p2align 2,,3 + 11030 .global stage_rfft_f32 + 11031 .syntax unified + ARM GAS /tmp/ccFqHvis.s page 192 + + + 11032 .thumb + 11033 .thumb_func + 11034 .fpu fpv4-sp-d16 + 11036 stage_rfft_f32: + 11037 @ args = 0, pretend = 0, frame = 0 + 11038 @ frame_needed = 0, uses_anonymous_args = 0 + 11039 @ link register save eliminated. + 11040 0000 D1ED017A vldr.32 s15, [r1, #4] + 11041 0004 91ED006A vldr.32 s12, [r1] + 11042 0008 B0F800C0 ldrh ip, [r0] + 11043 000c 4069 ldr r0, [r0, #20] + 11044 000e 77EEA77A vadd.f32 s15, s15, s15 + 11045 0012 F0EE006A vmov.f32 s13, #2.0e+0 + 11046 0016 B0EE677A vmov.f32 s14, s15 + 11047 001a A6EE267A vfma.f32 s14, s12, s13 + 11048 001e 0CF1FF3C add ip, ip, #-1 + 11049 0022 01EBCC03 add r3, r1, ip, lsl #3 + 11050 0026 D6EE267A vfnms.f32 s15, s12, s13 + 11051 002a 1030 adds r0, r0, #16 + 11052 002c 1032 adds r2, r2, #16 + 11053 002e B6EE004A vmov.f32 s8, #5.0e-1 + 11054 0032 27EE047A vmul.f32 s14, s14, s8 + 11055 0036 67EE847A vmul.f32 s15, s15, s8 + 11056 003a 02ED047A vstr.32 s14, [r2, #-16] + 11057 003e 42ED037A vstr.32 s15, [r2, #-12] + 11058 0042 1031 adds r1, r1, #16 + 11059 0044 083B subs r3, r3, #8 + 11060 .L1244: + 11061 0046 11ED027A vldr.32 s14, [r1, #-8] + 11062 004a D3ED036A vldr.32 s13, [r3, #12] + 11063 004e D3ED027A vldr.32 s15, [r3, #8] + 11064 0052 11ED015A vldr.32 s10, [r1, #-4] + 11065 0056 10ED026A vldr.32 s12, [r0, #-8] + 11066 005a 50ED015A vldr.32 s11, [r0, #-4] + 11067 005e 77EEC74A vsub.f32 s9, s15, s14 + 11068 0062 77EE877A vadd.f32 s15, s15, s14 + 11069 0066 35EE667A vsub.f32 s14, s10, s13 + 11070 006a E6EE247A vfma.f32 s15, s12, s9 + 11071 006e 0832 adds r2, r2, #8 + 11072 0070 BCF1010C subs ip, ip, #1 + 11073 0074 A5EEA47A vfma.f32 s14, s11, s9 + 11074 0078 00F10800 add r0, r0, #8 + 11075 007c 01F10801 add r1, r1, #8 + 11076 0080 76EE856A vadd.f32 s13, s13, s10 + 11077 0084 A3F10803 sub r3, r3, #8 + 11078 0088 E5EEA67A vfma.f32 s15, s11, s13 + 11079 008c A6EE667A vfms.f32 s14, s12, s13 + 11080 0090 67EE847A vmul.f32 s15, s15, s8 + 11081 0094 27EE047A vmul.f32 s14, s14, s8 + 11082 0098 42ED047A vstr.32 s15, [r2, #-16] + 11083 009c 02ED037A vstr.32 s14, [r2, #-12] + 11084 00a0 D1D1 bne .L1244 + 11085 00a2 7047 bx lr + 11087 .section .text.merge_rfft_f32,"ax",%progbits + 11088 .align 1 + 11089 .p2align 2,,3 + 11090 .global merge_rfft_f32 + ARM GAS /tmp/ccFqHvis.s page 193 + + + 11091 .syntax unified + 11092 .thumb + 11093 .thumb_func + 11094 .fpu fpv4-sp-d16 + 11096 merge_rfft_f32: + 11097 @ args = 0, pretend = 0, frame = 0 + 11098 @ frame_needed = 0, uses_anonymous_args = 0 + 11099 @ link register save eliminated. + 11100 0000 D1ED007A vldr.32 s15, [r1] + 11101 0004 D1ED016A vldr.32 s13, [r1, #4] + 11102 0008 37EEA67A vadd.f32 s14, s15, s13 + 11103 000c 77EEE67A vsub.f32 s15, s15, s13 + 11104 0010 10B4 push {r4} + 11105 0012 B6EE004A vmov.f32 s8, #5.0e-1 + 11106 0016 0488 ldrh r4, [r0] + 11107 0018 4069 ldr r0, [r0, #20] + 11108 001a 27EE047A vmul.f32 s14, s14, s8 + 11109 001e 67EE847A vmul.f32 s15, s15, s8 + 11110 0022 013C subs r4, r4, #1 + 11111 0024 82ED007A vstr.32 s14, [r2] + 11112 0028 C2ED017A vstr.32 s15, [r2, #4] + 11113 002c 94B3 cbz r4, .L1246 + 11114 002e E300 lsls r3, r4, #3 + 11115 0030 083B subs r3, r3, #8 + 11116 0032 0B44 add r3, r3, r1 + 11117 0034 1030 adds r0, r0, #16 + 11118 0036 1032 adds r2, r2, #16 + 11119 0038 1031 adds r1, r1, #16 + 11120 .L1248: + 11121 003a 11ED027A vldr.32 s14, [r1, #-8] + 11122 003e D3ED036A vldr.32 s13, [r3, #12] + 11123 0042 D3ED027A vldr.32 s15, [r3, #8] + 11124 0046 11ED015A vldr.32 s10, [r1, #-4] + 11125 004a 10ED026A vldr.32 s12, [r0, #-8] + 11126 004e 50ED015A vldr.32 s11, [r0, #-4] + 11127 0052 77EE674A vsub.f32 s9, s14, s15 + 11128 0056 77EE877A vadd.f32 s15, s15, s14 + 11129 005a 35EE667A vsub.f32 s14, s10, s13 + 11130 005e E6EE647A vfms.f32 s15, s12, s9 + 11131 0062 0832 adds r2, r2, #8 + 11132 0064 013C subs r4, r4, #1 + 11133 0066 A5EEA47A vfma.f32 s14, s11, s9 + 11134 006a 00F10800 add r0, r0, #8 + 11135 006e 01F10801 add r1, r1, #8 + 11136 0072 76EE856A vadd.f32 s13, s13, s10 + 11137 0076 A3F10803 sub r3, r3, #8 + 11138 007a E5EEE67A vfms.f32 s15, s11, s13 + 11139 007e A6EE667A vfms.f32 s14, s12, s13 + 11140 0082 67EE847A vmul.f32 s15, s15, s8 + 11141 0086 27EE047A vmul.f32 s14, s14, s8 + 11142 008a 42ED047A vstr.32 s15, [r2, #-16] + 11143 008e 02ED037A vstr.32 s14, [r2, #-12] + 11144 0092 D2D1 bne .L1248 + 11145 .L1246: + 11146 0094 5DF8044B ldr r4, [sp], #4 + 11147 0098 7047 bx lr + 11149 009a 00BF .section .text.arm_rfft_fast_f32,"ax",%progbits + ARM GAS /tmp/ccFqHvis.s page 194 + + + 11150 .align 1 + 11151 .p2align 2,,3 + 11152 .global arm_rfft_fast_f32 + 11153 .syntax unified + 11154 .thumb + 11155 .thumb_func + 11156 .fpu fpv4-sp-d16 + 11158 arm_rfft_fast_f32: + 11159 @ args = 0, pretend = 0, frame = 0 + 11160 @ frame_needed = 0, uses_anonymous_args = 0 + 11161 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 11162 0004 0546 mov r5, r0 + 11163 0006 9046 mov r8, r2 + 11164 0008 53B1 cbz r3, .L1255 + 11165 000a 1F46 mov r7, r3 + 11166 000c FFF7FEFF bl merge_rfft_f32 + 11167 0010 3A46 mov r2, r7 + 11168 0012 4146 mov r1, r8 + 11169 0014 2846 mov r0, r5 + 11170 0016 0123 movs r3, #1 + 11171 0018 BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 11172 001c FFF7FEBF b arm_cfft_f32 + 11173 .L1255: + 11174 0020 0C46 mov r4, r1 + 11175 0022 0188 ldrh r1, [r0] + 11176 0024 B1F5807F cmp r1, #256 + 11177 0028 40D0 beq .L1256 + 11178 002a 2ED8 bhi .L1257 + 11179 002c 4029 cmp r1, #64 + 11180 002e 33D0 beq .L1258 + 11181 0030 38D9 bls .L1297 + 11182 0032 8029 cmp r1, #128 + 11183 0034 49D0 beq .L1260 + 11184 0036 A889 ldrh r0, [r5, #12] + 11185 0038 AF68 ldr r7, [r5, #8] + 11186 003a F8B1 cbz r0, .L1263 + 11187 .L1299: + 11188 003c 0022 movs r2, #0 + 11189 003e 07F1020E add lr, r7, #2 + 11190 .L1264: + 11191 0042 37F812C0 ldrh ip, [r7, r2, lsl #1] + 11192 0046 3EF81230 ldrh r3, [lr, r2, lsl #1] + 11193 004a 4FEA9C0C lsr ip, ip, #2 + 11194 004e 9B08 lsrs r3, r3, #2 + 11195 0050 54F82C10 ldr r1, [r4, ip, lsl #2] + 11196 0054 54F82360 ldr r6, [r4, r3, lsl #2] + 11197 0058 44F82C60 str r6, [r4, ip, lsl #2] + 11198 005c 44F82310 str r1, [r4, r3, lsl #2] + 11199 0060 0CF1010C add ip, ip, #1 + 11200 0064 0133 adds r3, r3, #1 + 11201 0066 0232 adds r2, r2, #2 + 11202 0068 54F82C10 ldr r1, [r4, ip, lsl #2] + 11203 006c 54F82360 ldr r6, [r4, r3, lsl #2] + 11204 0070 44F82C60 str r6, [r4, ip, lsl #2] + 11205 0074 9042 cmp r0, r2 + 11206 0076 44F82310 str r1, [r4, r3, lsl #2] + 11207 007a E2D8 bhi .L1264 + ARM GAS /tmp/ccFqHvis.s page 195 + + + 11208 .L1263: + 11209 007c 4246 mov r2, r8 + 11210 007e 2146 mov r1, r4 + 11211 0080 2846 mov r0, r5 + 11212 0082 BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 11213 0086 FFF7FEBF b stage_rfft_f32 + 11214 .L1257: + 11215 008a B1F5006F cmp r1, #2048 + 11216 008e 0DD0 beq .L1256 + 11217 0090 15D9 bls .L1298 + 11218 0092 B1F5805F cmp r1, #4096 + 11219 0096 0DD1 bne .L1261 + 11220 .L1258: + 11221 0098 6A68 ldr r2, [r5, #4] + 11222 009a 0123 movs r3, #1 + 11223 009c 2046 mov r0, r4 + 11224 009e FFF7FEFF bl arm_radix8_butterfly_f32 + 11225 00a2 07E0 b .L1261 + 11226 .L1297: + 11227 00a4 1029 cmp r1, #16 + 11228 00a6 10D0 beq .L1260 + 11229 00a8 2029 cmp r1, #32 + 11230 00aa 03D1 bne .L1261 + 11231 .L1256: + 11232 00ac 2146 mov r1, r4 + 11233 00ae 2846 mov r0, r5 + 11234 00b0 FFF7FEFF bl arm_cfft_radix8by4_f32 + 11235 .L1261: + 11236 00b4 A889 ldrh r0, [r5, #12] + 11237 00b6 AF68 ldr r7, [r5, #8] + 11238 00b8 0028 cmp r0, #0 + 11239 00ba BFD1 bne .L1299 + 11240 00bc DEE7 b .L1263 + 11241 .L1298: + 11242 00be B1F5007F cmp r1, #512 + 11243 00c2 E9D0 beq .L1258 + 11244 00c4 B1F5806F cmp r1, #1024 + 11245 00c8 F4D1 bne .L1261 + 11246 .L1260: + 11247 00ca 2146 mov r1, r4 + 11248 00cc 2846 mov r0, r5 + 11249 00ce FFF7FEFF bl arm_cfft_radix8by2_f32 + 11250 00d2 EFE7 b .L1261 + 11252 .section .text.stage_rfft_f64,"ax",%progbits + 11253 .align 1 + 11254 .p2align 2,,3 + 11255 .global stage_rfft_f64 + 11256 .syntax unified + 11257 .thumb + 11258 .thumb_func + 11259 .fpu fpv4-sp-d16 + 11261 stage_rfft_f64: + 11262 @ args = 0, pretend = 0, frame = 16 + 11263 @ frame_needed = 0, uses_anonymous_args = 0 + 11264 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 11265 0004 2DED0A8B vpush.64 {d8, d9, d10, d11, d12} + 11266 0008 4369 ldr r3, [r0, #20] + ARM GAS /tmp/ccFqHvis.s page 196 + + + 11267 000a 85B0 sub sp, sp, #20 + 11268 000c 8A46 mov r10, r1 + 11269 000e 2033 adds r3, r3, #32 + 11270 0010 0188 ldrh r1, [r0] + 11271 0012 0393 str r3, [sp, #12] + 11272 0014 1646 mov r6, r2 + 11273 0016 DAE90023 ldrd r2, [r10] + 11274 001a 4F1E subs r7, r1, #1 + 11275 001c 06F12001 add r1, r6, #32 + 11276 0020 0291 str r1, [sp, #8] + 11277 0022 1046 mov r0, r2 + 11278 0024 1946 mov r1, r3 + 11279 0026 0197 str r7, [sp, #4] + 11280 0028 FFF7FEFF bl __aeabi_dadd + 11281 002c DAE90223 ldrd r2, [r10, #8] + 11282 0030 8046 mov r8, r0 + 11283 0032 8946 mov r9, r1 + 11284 0034 1046 mov r0, r2 + 11285 0036 1946 mov r1, r3 + 11286 0038 FFF7FEFF bl __aeabi_dadd + 11287 003c 0446 mov r4, r0 + 11288 003e 0D46 mov r5, r1 + 11289 0040 2246 mov r2, r4 + 11290 0042 2B46 mov r3, r5 + 11291 0044 4046 mov r0, r8 + 11292 0046 4946 mov r1, r9 + 11293 0048 FFF7FEFF bl __aeabi_dadd + 11294 004c 4A4B ldr r3, .L1304 + 11295 004e 0022 movs r2, #0 + 11296 0050 FFF7FEFF bl __aeabi_dmul + 11297 0054 2246 mov r2, r4 + 11298 0056 C6E90001 strd r0, [r6] + 11299 005a 2B46 mov r3, r5 + 11300 005c 4046 mov r0, r8 + 11301 005e 4946 mov r1, r9 + 11302 0060 FFF7FEFF bl __aeabi_dsub + 11303 0064 444B ldr r3, .L1304 + 11304 0066 0022 movs r2, #0 + 11305 0068 FFF7FEFF bl __aeabi_dmul + 11306 006c DDE90245 ldrd r4, r5, [sp, #8] + 11307 0070 C6E90201 strd r0, [r6, #8] + 11308 0074 0AF1200B add fp, r10, #32 + 11309 0078 0AEB071A add r10, r10, r7, lsl #4 + 11310 007c AAF1100A sub r10, r10, #16 + 11311 .L1301: + 11312 0080 5BE90467 ldrd r6, [fp, #-16] + 11313 0084 DAE90489 ldrd r8, [r10, #16] + 11314 0088 3246 mov r2, r6 + 11315 008a 3B46 mov r3, r7 + 11316 008c 4046 mov r0, r8 + 11317 008e 4946 mov r1, r9 + 11318 0090 FFF7FEFF bl __aeabi_dsub + 11319 0094 9AED068B vldr.64 d8, [r10, #24] + 11320 0098 1BED029B vldr.64 d9, [fp, #-8] + 11321 009c 41EC1C0B vmov d12, r0, r1 + 11322 00a0 53EC192B vmov r2, r3, d9 + 11323 00a4 51EC180B vmov r0, r1, d8 + ARM GAS /tmp/ccFqHvis.s page 197 + + + 11324 00a8 FFF7FEFF bl __aeabi_dadd + 11325 00ac 1035 adds r5, r5, #16 + 11326 00ae 41EC1A0B vmov d10, r0, r1 + 11327 00b2 3246 mov r2, r6 + 11328 00b4 3B46 mov r3, r7 + 11329 00b6 4046 mov r0, r8 + 11330 00b8 4946 mov r1, r9 + 11331 00ba FFF7FEFF bl __aeabi_dadd + 11332 00be 55E90889 ldrd r8, [r5, #-32] + 11333 00c2 53EC1C2B vmov r2, r3, d12 + 11334 00c6 0646 mov r6, r0 + 11335 00c8 0F46 mov r7, r1 + 11336 00ca 4046 mov r0, r8 + 11337 00cc 4946 mov r1, r9 + 11338 00ce FFF7FEFF bl __aeabi_dmul + 11339 00d2 0246 mov r2, r0 + 11340 00d4 0B46 mov r3, r1 + 11341 00d6 3046 mov r0, r6 + 11342 00d8 3946 mov r1, r7 + 11343 00da FFF7FEFF bl __aeabi_dadd + 11344 00de 15ED06BB vldr.64 d11, [r5, #-24] + 11345 00e2 53EC1A2B vmov r2, r3, d10 + 11346 00e6 0646 mov r6, r0 + 11347 00e8 0F46 mov r7, r1 + 11348 00ea 51EC1B0B vmov r0, r1, d11 + 11349 00ee FFF7FEFF bl __aeabi_dmul + 11350 00f2 0246 mov r2, r0 + 11351 00f4 0B46 mov r3, r1 + 11352 00f6 3046 mov r0, r6 + 11353 00f8 3946 mov r1, r7 + 11354 00fa FFF7FEFF bl __aeabi_dadd + 11355 00fe 1E4B ldr r3, .L1304 + 11356 0100 0022 movs r2, #0 + 11357 0102 FFF7FEFF bl __aeabi_dmul + 11358 0106 53EC182B vmov r2, r3, d8 + 11359 010a 44E90401 strd r0, [r4, #-16] + 11360 010e 51EC190B vmov r0, r1, d9 + 11361 0112 FFF7FEFF bl __aeabi_dsub + 11362 0116 53EC1C2B vmov r2, r3, d12 + 11363 011a 0646 mov r6, r0 + 11364 011c 0F46 mov r7, r1 + 11365 011e 51EC1B0B vmov r0, r1, d11 + 11366 0122 FFF7FEFF bl __aeabi_dmul + 11367 0126 0246 mov r2, r0 + 11368 0128 0B46 mov r3, r1 + 11369 012a 3046 mov r0, r6 + 11370 012c 3946 mov r1, r7 + 11371 012e FFF7FEFF bl __aeabi_dadd + 11372 0132 53EC1A2B vmov r2, r3, d10 + 11373 0136 0646 mov r6, r0 + 11374 0138 0F46 mov r7, r1 + 11375 013a 4046 mov r0, r8 + 11376 013c 4946 mov r1, r9 + 11377 013e FFF7FEFF bl __aeabi_dmul + 11378 0142 0246 mov r2, r0 + 11379 0144 0B46 mov r3, r1 + 11380 0146 3046 mov r0, r6 + ARM GAS /tmp/ccFqHvis.s page 198 + + + 11381 0148 3946 mov r1, r7 + 11382 014a FFF7FEFF bl __aeabi_dsub + 11383 014e 0A4B ldr r3, .L1304 + 11384 0150 0022 movs r2, #0 + 11385 0152 FFF7FEFF bl __aeabi_dmul + 11386 0156 019B ldr r3, [sp, #4] + 11387 0158 013B subs r3, r3, #1 + 11388 015a 04F11004 add r4, r4, #16 + 11389 015e 0BF1100B add fp, fp, #16 + 11390 0162 AAF1100A sub r10, r10, #16 + 11391 0166 0193 str r3, [sp, #4] + 11392 0168 44E90601 strd r0, [r4, #-24] + 11393 016c 88D1 bne .L1301 + 11394 016e 05B0 add sp, sp, #20 + 11395 @ sp needed + 11396 0170 BDEC0A8B vldm sp!, {d8-d12} + 11397 0174 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11398 .L1305: + 11399 .align 2 + 11400 .L1304: + 11401 0178 0000E03F .word 1071644672 + 11403 .section .text.merge_rfft_f64,"ax",%progbits + 11404 .align 1 + 11405 .p2align 2,,3 + 11406 .global merge_rfft_f64 + 11407 .syntax unified + 11408 .thumb + 11409 .thumb_func + 11410 .fpu fpv4-sp-d16 + 11412 merge_rfft_f64: + 11413 @ args = 0, pretend = 0, frame = 8 + 11414 @ frame_needed = 0, uses_anonymous_args = 0 + 11415 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 11416 0004 2DED0A8B vpush.64 {d8, d9, d10, d11, d12} + 11417 0008 D1E90267 ldrd r6, [r1, #8] + 11418 000c D1E90045 ldrd r4, [r1] + 11419 0010 0388 ldrh r3, [r0] + 11420 0012 D0F81490 ldr r9, [r0, #20] + 11421 0016 83B0 sub sp, sp, #12 + 11422 0018 9046 mov r8, r2 + 11423 001a 5A1E subs r2, r3, #1 + 11424 001c 0192 str r2, [sp, #4] + 11425 001e 3B46 mov r3, r7 + 11426 0020 3246 mov r2, r6 + 11427 0022 8A46 mov r10, r1 + 11428 0024 2046 mov r0, r4 + 11429 0026 2946 mov r1, r5 + 11430 0028 FFF7FEFF bl __aeabi_dadd + 11431 002c 4D4B ldr r3, .L1314 + 11432 002e 0022 movs r2, #0 + 11433 0030 FFF7FEFF bl __aeabi_dmul + 11434 0034 3246 mov r2, r6 + 11435 0036 C8E90001 strd r0, [r8] + 11436 003a 3B46 mov r3, r7 + 11437 003c 2046 mov r0, r4 + 11438 003e 2946 mov r1, r5 + 11439 0040 FFF7FEFF bl __aeabi_dsub + ARM GAS /tmp/ccFqHvis.s page 199 + + + 11440 0044 0022 movs r2, #0 + 11441 0046 474B ldr r3, .L1314 + 11442 0048 FFF7FEFF bl __aeabi_dmul + 11443 004c 019A ldr r2, [sp, #4] + 11444 004e C8E90201 strd r0, [r8, #8] + 11445 0052 002A cmp r2, #0 + 11446 0054 00F08180 beq .L1306 + 11447 0058 1301 lsls r3, r2, #4 + 11448 005a 103B subs r3, r3, #16 + 11449 005c 0AEB030B add fp, r10, r3 + 11450 0060 09F12004 add r4, r9, #32 + 11451 0064 08F12005 add r5, r8, #32 + 11452 0068 0AF1200A add r10, r10, #32 + 11453 .L1308: + 11454 006c 5AE90467 ldrd r6, [r10, #-16] + 11455 0070 DBE90489 ldrd r8, [fp, #16] + 11456 0074 3046 mov r0, r6 + 11457 0076 4246 mov r2, r8 + 11458 0078 4B46 mov r3, r9 + 11459 007a 3946 mov r1, r7 + 11460 007c FFF7FEFF bl __aeabi_dsub + 11461 0080 9BED068B vldr.64 d8, [fp, #24] + 11462 0084 1AED029B vldr.64 d9, [r10, #-8] + 11463 0088 41EC1C0B vmov d12, r0, r1 + 11464 008c 53EC192B vmov r2, r3, d9 + 11465 0090 51EC180B vmov r0, r1, d8 + 11466 0094 FFF7FEFF bl __aeabi_dadd + 11467 0098 1034 adds r4, r4, #16 + 11468 009a 41EC1A0B vmov d10, r0, r1 + 11469 009e 3246 mov r2, r6 + 11470 00a0 3B46 mov r3, r7 + 11471 00a2 4046 mov r0, r8 + 11472 00a4 4946 mov r1, r9 + 11473 00a6 FFF7FEFF bl __aeabi_dadd + 11474 00aa 54E90889 ldrd r8, [r4, #-32] + 11475 00ae 53EC1C2B vmov r2, r3, d12 + 11476 00b2 0646 mov r6, r0 + 11477 00b4 0F46 mov r7, r1 + 11478 00b6 4046 mov r0, r8 + 11479 00b8 4946 mov r1, r9 + 11480 00ba FFF7FEFF bl __aeabi_dmul + 11481 00be 0246 mov r2, r0 + 11482 00c0 0B46 mov r3, r1 + 11483 00c2 3046 mov r0, r6 + 11484 00c4 3946 mov r1, r7 + 11485 00c6 FFF7FEFF bl __aeabi_dsub + 11486 00ca 14ED06BB vldr.64 d11, [r4, #-24] + 11487 00ce 53EC1A2B vmov r2, r3, d10 + 11488 00d2 0646 mov r6, r0 + 11489 00d4 0F46 mov r7, r1 + 11490 00d6 51EC1B0B vmov r0, r1, d11 + 11491 00da FFF7FEFF bl __aeabi_dmul + 11492 00de 0246 mov r2, r0 + 11493 00e0 0B46 mov r3, r1 + 11494 00e2 3046 mov r0, r6 + 11495 00e4 3946 mov r1, r7 + 11496 00e6 FFF7FEFF bl __aeabi_dsub + ARM GAS /tmp/ccFqHvis.s page 200 + + + 11497 00ea 1E4B ldr r3, .L1314 + 11498 00ec 0022 movs r2, #0 + 11499 00ee FFF7FEFF bl __aeabi_dmul + 11500 00f2 53EC182B vmov r2, r3, d8 + 11501 00f6 45E90401 strd r0, [r5, #-16] + 11502 00fa 51EC190B vmov r0, r1, d9 + 11503 00fe FFF7FEFF bl __aeabi_dsub + 11504 0102 53EC1C2B vmov r2, r3, d12 + 11505 0106 0646 mov r6, r0 + 11506 0108 0F46 mov r7, r1 + 11507 010a 51EC1B0B vmov r0, r1, d11 + 11508 010e FFF7FEFF bl __aeabi_dmul + 11509 0112 0246 mov r2, r0 + 11510 0114 0B46 mov r3, r1 + 11511 0116 3046 mov r0, r6 + 11512 0118 3946 mov r1, r7 + 11513 011a FFF7FEFF bl __aeabi_dadd + 11514 011e 53EC1A2B vmov r2, r3, d10 + 11515 0122 0646 mov r6, r0 + 11516 0124 0F46 mov r7, r1 + 11517 0126 4046 mov r0, r8 + 11518 0128 4946 mov r1, r9 + 11519 012a FFF7FEFF bl __aeabi_dmul + 11520 012e 0246 mov r2, r0 + 11521 0130 0B46 mov r3, r1 + 11522 0132 3046 mov r0, r6 + 11523 0134 3946 mov r1, r7 + 11524 0136 FFF7FEFF bl __aeabi_dsub + 11525 013a 0A4B ldr r3, .L1314 + 11526 013c 0022 movs r2, #0 + 11527 013e FFF7FEFF bl __aeabi_dmul + 11528 0142 019B ldr r3, [sp, #4] + 11529 0144 013B subs r3, r3, #1 + 11530 0146 05F11005 add r5, r5, #16 + 11531 014a 0AF1100A add r10, r10, #16 + 11532 014e ABF1100B sub fp, fp, #16 + 11533 0152 0193 str r3, [sp, #4] + 11534 0154 45E90601 strd r0, [r5, #-24] + 11535 0158 88D1 bne .L1308 + 11536 .L1306: + 11537 015a 03B0 add sp, sp, #12 + 11538 @ sp needed + 11539 015c BDEC0A8B vldm sp!, {d8-d12} + 11540 0160 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 11541 .L1315: + 11542 .align 2 + 11543 .L1314: + 11544 0164 0000E03F .word 1071644672 + 11546 .section .text.arm_rfft_fast_f64,"ax",%progbits + 11547 .align 1 + 11548 .p2align 2,,3 + 11549 .global arm_rfft_fast_f64 + 11550 .syntax unified + 11551 .thumb + 11552 .thumb_func + 11553 .fpu fpv4-sp-d16 + 11555 arm_rfft_fast_f64: + ARM GAS /tmp/ccFqHvis.s page 201 + + + 11556 @ args = 0, pretend = 0, frame = 0 + 11557 @ frame_needed = 0, uses_anonymous_args = 0 + 11558 0000 B0F810C0 ldrh ip, [r0, #16] + 11559 0004 4FEA5C0C lsr ip, ip, #1 + 11560 0008 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 11561 000c 0446 mov r4, r0 + 11562 000e A0F800C0 strh ip, [r0] @ movhi + 11563 0012 1646 mov r6, r2 + 11564 0014 53B1 cbz r3, .L1317 + 11565 0016 1D46 mov r5, r3 + 11566 0018 FFF7FEFF bl merge_rfft_f64 + 11567 001c 2A46 mov r2, r5 + 11568 001e 3146 mov r1, r6 + 11569 0020 2046 mov r0, r4 + 11570 0022 0123 movs r3, #1 + 11571 0024 BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 11572 0028 FFF7FEBF b arm_cfft_f64 + 11573 .L1317: + 11574 002c BCF5807F cmp ip, #256 + 11575 0030 0F46 mov r7, r1 + 11576 0032 29D0 beq .L1318 + 11577 0034 1ED8 bhi .L1319 + 11578 0036 BCF1400F cmp ip, #64 + 11579 003a 25D0 beq .L1318 + 11580 003c 16D8 bhi .L1320 + 11581 003e BCF1100F cmp ip, #16 + 11582 0042 21D0 beq .L1318 + 11583 0044 BCF1200F cmp ip, #32 + 11584 0048 04D1 bne .L1322 + 11585 .L1321: + 11586 004a 6268 ldr r2, [r4, #4] + 11587 004c 6146 mov r1, ip + 11588 004e 3846 mov r0, r7 + 11589 0050 FFF7FEFF bl arm_cfft_radix4by2_f64 + 11590 .L1322: + 11591 0054 A268 ldr r2, [r4, #8] + 11592 0056 A189 ldrh r1, [r4, #12] + 11593 0058 3846 mov r0, r7 + 11594 005a FFF7FEFF bl arm_bitreversal_64 + 11595 005e 3246 mov r2, r6 + 11596 0060 3946 mov r1, r7 + 11597 0062 2046 mov r0, r4 + 11598 0064 BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 11599 0068 FFF7FEBF b stage_rfft_f64 + 11600 .L1320: + 11601 006c BCF1800F cmp ip, #128 + 11602 0070 EBD0 beq .L1321 + 11603 0072 EFE7 b .L1322 + 11604 .L1319: + 11605 0074 BCF5006F cmp ip, #2048 + 11606 0078 E7D0 beq .L1321 + 11607 007a 0CD8 bhi .L1323 + 11608 007c BCF5007F cmp ip, #512 + 11609 0080 E3D0 beq .L1321 + 11610 0082 BCF5806F cmp ip, #1024 + 11611 0086 E5D1 bne .L1322 + 11612 .L1318: + ARM GAS /tmp/ccFqHvis.s page 202 + + + 11613 0088 6268 ldr r2, [r4, #4] + 11614 008a 0123 movs r3, #1 + 11615 008c 6146 mov r1, ip + 11616 008e 3846 mov r0, r7 + 11617 0090 FFF7FEFF bl arm_radix4_butterfly_f64 + 11618 0094 DEE7 b .L1322 + 11619 .L1323: + 11620 0096 BCF5805F cmp ip, #4096 + 11621 009a DBD1 bne .L1322 + 11622 009c F4E7 b .L1318 + 11624 .section .text.arm_rfft_fast_init_f32,"ax",%progbits + 11625 .align 1 + 11626 .p2align 2,,3 + 11627 .global arm_rfft_fast_init_f32 + 11628 .syntax unified + 11629 .thumb + 11630 .thumb_func + 11631 .fpu fpv4-sp-d16 + 11633 arm_rfft_fast_init_f32: + 11634 @ args = 0, pretend = 0, frame = 0 + 11635 @ frame_needed = 0, uses_anonymous_args = 0 + 11636 @ link register save eliminated. + 11637 0000 B1F5007F cmp r1, #512 + 11638 0004 24D0 beq .L1354 + 11639 0006 07D8 bhi .L1351 + 11640 0008 8029 cmp r1, #128 + 11641 000a 1CD0 beq .L1355 + 11642 000c 0CD9 bls .L1362 + 11643 000e B1F5807F cmp r1, #256 + 11644 0012 1AD1 bne .L1353 + 11645 0014 0F4B ldr r3, .L1364 + 11646 .L1350: + 11647 0016 1847 bx r3 + 11648 .L1351: + 11649 0018 B1F5006F cmp r1, #2048 + 11650 001c 11D0 beq .L1359 + 11651 001e B1F5805F cmp r1, #4096 + 11652 0022 07D1 bne .L1363 + 11653 0024 0C4B ldr r3, .L1364+4 + 11654 0026 1847 bx r3 + 11655 .L1362: + 11656 0028 2029 cmp r1, #32 + 11657 002a 08D0 beq .L1356 + 11658 002c 4029 cmp r1, #64 + 11659 002e 0CD1 bne .L1353 + 11660 0030 0A4B ldr r3, .L1364+8 + 11661 0032 F0E7 b .L1350 + 11662 .L1363: + 11663 0034 B1F5806F cmp r1, #1024 + 11664 0038 07D1 bne .L1353 + 11665 003a 094B ldr r3, .L1364+12 + 11666 003c EBE7 b .L1350 + 11667 .L1356: + 11668 003e 094B ldr r3, .L1364+16 + 11669 0040 E9E7 b .L1350 + 11670 .L1359: + 11671 0042 094B ldr r3, .L1364+20 + ARM GAS /tmp/ccFqHvis.s page 203 + + + 11672 0044 E7E7 b .L1350 + 11673 .L1355: + 11674 0046 094B ldr r3, .L1364+24 + 11675 0048 E5E7 b .L1350 + 11676 .L1353: + 11677 004a 4FF0FF30 mov r0, #-1 + 11678 004e 7047 bx lr + 11679 .L1354: + 11680 0050 074B ldr r3, .L1364+28 + 11681 0052 E0E7 b .L1350 + 11682 .L1365: + 11683 .align 2 + 11684 .L1364: + 11685 0054 00000000 .word arm_rfft_256_fast_init_f32 + 11686 0058 00000000 .word arm_rfft_4096_fast_init_f32 + 11687 005c 00000000 .word arm_rfft_64_fast_init_f32 + 11688 0060 00000000 .word arm_rfft_1024_fast_init_f32 + 11689 0064 00000000 .word arm_rfft_32_fast_init_f32 + 11690 0068 00000000 .word arm_rfft_2048_fast_init_f32 + 11691 006c 00000000 .word arm_rfft_128_fast_init_f32 + 11692 0070 00000000 .word arm_rfft_512_fast_init_f32 + 11694 .section .text.arm_rfft_fast_init_f64,"ax",%progbits + 11695 .align 1 + 11696 .p2align 2,,3 + 11697 .global arm_rfft_fast_init_f64 + 11698 .syntax unified + 11699 .thumb + 11700 .thumb_func + 11701 .fpu fpv4-sp-d16 + 11703 arm_rfft_fast_init_f64: + 11704 @ args = 0, pretend = 0, frame = 0 + 11705 @ frame_needed = 0, uses_anonymous_args = 0 + 11706 @ link register save eliminated. + 11707 0000 B1F5007F cmp r1, #512 + 11708 0004 24D0 beq .L1371 + 11709 0006 07D8 bhi .L1368 + 11710 0008 8029 cmp r1, #128 + 11711 000a 1CD0 beq .L1372 + 11712 000c 0CD9 bls .L1379 + 11713 000e B1F5807F cmp r1, #256 + 11714 0012 1AD1 bne .L1370 + 11715 0014 0F4B ldr r3, .L1381 + 11716 .L1367: + 11717 0016 1847 bx r3 + 11718 .L1368: + 11719 0018 B1F5006F cmp r1, #2048 + 11720 001c 11D0 beq .L1376 + 11721 001e B1F5805F cmp r1, #4096 + 11722 0022 07D1 bne .L1380 + 11723 0024 0C4B ldr r3, .L1381+4 + 11724 0026 1847 bx r3 + 11725 .L1379: + 11726 0028 2029 cmp r1, #32 + 11727 002a 08D0 beq .L1373 + 11728 002c 4029 cmp r1, #64 + 11729 002e 0CD1 bne .L1370 + 11730 0030 0A4B ldr r3, .L1381+8 + ARM GAS /tmp/ccFqHvis.s page 204 + + + 11731 0032 F0E7 b .L1367 + 11732 .L1380: + 11733 0034 B1F5806F cmp r1, #1024 + 11734 0038 07D1 bne .L1370 + 11735 003a 094B ldr r3, .L1381+12 + 11736 003c EBE7 b .L1367 + 11737 .L1373: + 11738 003e 094B ldr r3, .L1381+16 + 11739 0040 E9E7 b .L1367 + 11740 .L1376: + 11741 0042 094B ldr r3, .L1381+20 + 11742 0044 E7E7 b .L1367 + 11743 .L1372: + 11744 0046 094B ldr r3, .L1381+24 + 11745 0048 E5E7 b .L1367 + 11746 .L1370: + 11747 004a 4FF0FF30 mov r0, #-1 + 11748 004e 7047 bx lr + 11749 .L1371: + 11750 0050 074B ldr r3, .L1381+28 + 11751 0052 E0E7 b .L1367 + 11752 .L1382: + 11753 .align 2 + 11754 .L1381: + 11755 0054 00000000 .word arm_rfft_256_fast_init_f64 + 11756 0058 00000000 .word arm_rfft_4096_fast_init_f64 + 11757 005c 00000000 .word arm_rfft_64_fast_init_f64 + 11758 0060 00000000 .word arm_rfft_1024_fast_init_f64 + 11759 0064 00000000 .word arm_rfft_32_fast_init_f64 + 11760 0068 00000000 .word arm_rfft_2048_fast_init_f64 + 11761 006c 00000000 .word arm_rfft_128_fast_init_f64 + 11762 0070 00000000 .word arm_rfft_512_fast_init_f64 + 11764 .section .text.arm_rfft_init_f32,"ax",%progbits + 11765 .align 1 + 11766 .p2align 2,,3 + 11767 .global arm_rfft_init_f32 + 11768 .syntax unified + 11769 .thumb + 11770 .thumb_func + 11771 .fpu fpv4-sp-d16 + 11773 arm_rfft_init_f32: + 11774 @ args = 4, pretend = 0, frame = 0 + 11775 @ frame_needed = 0, uses_anonymous_args = 0 + 11776 @ link register save eliminated. + 11777 0000 10B4 push {r4} + 11778 0002 019C ldr r4, [sp, #4] + 11779 0004 C471 strb r4, [r0, #7] + 11780 0006 3D4C ldr r4, .L1440 + 11781 0008 C460 str r4, [r0, #12] + 11782 000a 3D4C ldr r4, .L1440+4 + 11783 000c 0461 str r4, [r0, #16] + 11784 000e 94B2 uxth r4, r2 + 11785 0010 DBB2 uxtb r3, r3 + 11786 0012 C2F34E02 ubfx r2, r2, #1, #15 + 11787 0016 B4F5006F cmp r4, #2048 + 11788 001a 8371 strb r3, [r0, #6] + 11789 001c 0460 str r4, [r0] + ARM GAS /tmp/ccFqHvis.s page 205 + + + 11790 001e 8280 strh r2, [r0, #4] @ movhi + 11791 0020 43D0 beq .L1384 + 11792 0022 34D8 bhi .L1385 + 11793 0024 802C cmp r4, #128 + 11794 0026 3CD0 beq .L1386 + 11795 0028 B4F5007F cmp r4, #512 + 11796 002c 36D1 bne .L1399 + 11797 002e 1024 movs r4, #16 + 11798 0030 8460 str r4, [r0, #8] + 11799 0032 0024 movs r4, #0 + 11800 .L1388: + 11801 0034 4161 str r1, [r0, #20] + 11802 0036 3348 ldr r0, .L1440+8 + 11803 0038 03B1 cbz r3, .L1389 + 11804 003a 0123 movs r3, #1 + 11805 .L1389: + 11806 003c B2F5807F cmp r2, #256 + 11807 0040 0A80 strh r2, [r1] @ movhi + 11808 0042 4860 str r0, [r1, #4] + 11809 0044 4B80 strh r3, [r1, #2] @ movhi + 11810 0046 40D0 beq .L1390 + 11811 0048 0FD8 bhi .L1391 + 11812 004a 102A cmp r2, #16 + 11813 004c 49D0 beq .L1392 + 11814 004e 402A cmp r2, #64 + 11815 0050 07D1 bne .L1397 + 11816 0052 2D4A ldr r2, .L1440+12 + 11817 0054 4FF04010 mov r0, #4194368 + 11818 0058 C1E90220 strd r2, r0, [r1, #8] + 11819 005c 4FF07253 mov r3, #1015021568 + 11820 0060 0B61 str r3, [r1, #16] @ float + 11821 .L1397: + 11822 0062 2046 mov r0, r4 + 11823 0064 5DF8044B ldr r4, [sp], #4 + 11824 0068 7047 bx lr + 11825 .L1391: + 11826 006a B2F5806F cmp r2, #1024 + 11827 006e 20D0 beq .L1395 + 11828 0070 B2F5805F cmp r2, #4096 + 11829 0074 F5D1 bne .L1397 + 11830 0076 254A ldr r2, .L1440+16 + 11831 0078 4FF00110 mov r0, #65537 + 11832 007c 4FF06653 mov r3, #964689920 + 11833 0080 C1E90220 strd r2, r0, [r1, #8] + 11834 0084 0B61 str r3, [r1, #16] @ float + 11835 0086 2046 mov r0, r4 + 11836 0088 5DF8044B ldr r4, [sp], #4 + 11837 008c 7047 bx lr + 11838 .L1385: + 11839 008e B4F5005F cmp r4, #8192 + 11840 0092 03D1 bne .L1399 + 11841 0094 0124 movs r4, #1 + 11842 0096 8460 str r4, [r0, #8] + 11843 0098 0024 movs r4, #0 + 11844 009a CBE7 b .L1388 + 11845 .L1399: + 11846 009c 4FF0FF34 mov r4, #-1 + ARM GAS /tmp/ccFqHvis.s page 206 + + + 11847 00a0 C8E7 b .L1388 + 11848 .L1386: + 11849 00a2 4024 movs r4, #64 + 11850 00a4 8460 str r4, [r0, #8] + 11851 00a6 0024 movs r4, #0 + 11852 00a8 C4E7 b .L1388 + 11853 .L1384: + 11854 00aa 0424 movs r4, #4 + 11855 00ac 8460 str r4, [r0, #8] + 11856 00ae 0024 movs r4, #0 + 11857 00b0 C0E7 b .L1388 + 11858 .L1395: + 11859 00b2 174A ldr r2, .L1440+20 + 11860 00b4 4FF00410 mov r0, #262148 + 11861 00b8 4FF06A53 mov r3, #981467136 + 11862 00bc C1E90220 strd r2, r0, [r1, #8] + 11863 00c0 0B61 str r3, [r1, #16] @ float + 11864 00c2 2046 mov r0, r4 + 11865 00c4 5DF8044B ldr r4, [sp], #4 + 11866 00c8 7047 bx lr + 11867 .L1390: + 11868 00ca 124A ldr r2, .L1440+24 + 11869 00cc 4FF01010 mov r0, #1048592 + 11870 00d0 4FF06E53 mov r3, #998244352 + 11871 00d4 C1E90220 strd r2, r0, [r1, #8] + 11872 00d8 0B61 str r3, [r1, #16] @ float + 11873 00da 2046 mov r0, r4 + 11874 00dc 5DF8044B ldr r4, [sp], #4 + 11875 00e0 7047 bx lr + 11876 .L1392: + 11877 00e2 0D4A ldr r2, .L1440+28 + 11878 00e4 4FF00120 mov r0, #16777472 + 11879 00e8 4FF07653 mov r3, #1031798784 + 11880 00ec C1E90220 strd r2, r0, [r1, #8] + 11881 00f0 0B61 str r3, [r1, #16] @ float + 11882 00f2 2046 mov r0, r4 + 11883 00f4 5DF8044B ldr r4, [sp], #4 + 11884 00f8 7047 bx lr + 11885 .L1441: + 11886 00fa 00BF .align 2 + 11887 .L1440: + 11888 00fc 00000000 .word realCoefA + 11889 0100 00000000 .word realCoefB + 11890 0104 00000000 .word twiddleCoef_4096 + 11891 0108 7E000000 .word armBitRevTable+126 + 11892 010c 00000000 .word armBitRevTable + 11893 0110 06000000 .word armBitRevTable+6 + 11894 0114 1E000000 .word armBitRevTable+30 + 11895 0118 FE010000 .word armBitRevTable+510 + 11897 .section .text.arm_rfft_init_q15,"ax",%progbits + 11898 .align 1 + 11899 .p2align 2,,3 + 11900 .global arm_rfft_init_q15 + 11901 .syntax unified + 11902 .thumb + 11903 .thumb_func + 11904 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccFqHvis.s page 207 + + + 11906 arm_rfft_init_q15: + 11907 @ args = 0, pretend = 0, frame = 0 + 11908 @ frame_needed = 0, uses_anonymous_args = 0 + 11909 @ link register save eliminated. + 11910 0000 10B4 push {r4} + 11911 0002 89B2 uxth r1, r1 + 11912 0004 354C ldr r4, .L1460 + 11913 0006 C460 str r4, [r0, #12] + 11914 0008 B1F5007F cmp r1, #512 + 11915 000c 344C ldr r4, .L1460+4 + 11916 000e 0160 str r1, [r0] + 11917 0010 0461 str r4, [r0, #16] + 11918 0012 0271 strb r2, [r0, #4] + 11919 0014 4371 strb r3, [r0, #5] + 11920 0016 5BD0 beq .L1443 + 11921 0018 1CD9 bls .L1457 + 11922 001a B1F5805F cmp r1, #4096 + 11923 001e 38D0 beq .L1451 + 11924 0020 0AD9 bls .L1458 + 11925 0022 B1F5005F cmp r1, #8192 + 11926 0026 2FD1 bne .L1455 + 11927 0028 2E4B ldr r3, .L1460+8 + 11928 002a 4361 str r3, [r0, #20] + 11929 002c 0122 movs r2, #1 + 11930 002e 8260 str r2, [r0, #8] + 11931 0030 0020 movs r0, #0 + 11932 .L1449: + 11933 0032 5DF8044B ldr r4, [sp], #4 + 11934 0036 7047 bx lr + 11935 .L1458: + 11936 0038 B1F5806F cmp r1, #1024 + 11937 003c 31D0 beq .L1453 + 11938 003e B1F5006F cmp r1, #2048 + 11939 0042 21D1 bne .L1455 + 11940 0044 284B ldr r3, .L1460+12 + 11941 0046 4361 str r3, [r0, #20] + 11942 0048 0422 movs r2, #4 + 11943 004a 8260 str r2, [r0, #8] + 11944 004c 5DF8044B ldr r4, [sp], #4 + 11945 0050 0020 movs r0, #0 + 11946 0052 7047 bx lr + 11947 .L1457: + 11948 0054 8029 cmp r1, #128 + 11949 0056 2CD0 beq .L1445 + 11950 0058 0AD9 bls .L1459 + 11951 005a B1F5807F cmp r1, #256 + 11952 005e 13D1 bne .L1455 + 11953 0060 224B ldr r3, .L1460+16 + 11954 0062 4361 str r3, [r0, #20] + 11955 0064 2022 movs r2, #32 + 11956 0066 8260 str r2, [r0, #8] + 11957 0068 5DF8044B ldr r4, [sp], #4 + 11958 006c 0020 movs r0, #0 + 11959 006e 7047 bx lr + 11960 .L1459: + 11961 0070 2029 cmp r1, #32 + 11962 0072 26D0 beq .L1447 + ARM GAS /tmp/ccFqHvis.s page 208 + + + 11963 0074 4029 cmp r1, #64 + 11964 0076 07D1 bne .L1455 + 11965 0078 1D4B ldr r3, .L1460+20 + 11966 007a 4361 str r3, [r0, #20] + 11967 007c 8022 movs r2, #128 + 11968 007e 8260 str r2, [r0, #8] + 11969 0080 5DF8044B ldr r4, [sp], #4 + 11970 0084 0020 movs r0, #0 + 11971 0086 7047 bx lr + 11972 .L1455: + 11973 0088 4FF0FF30 mov r0, #-1 + 11974 008c 5DF8044B ldr r4, [sp], #4 + 11975 0090 7047 bx lr + 11976 .L1451: + 11977 0092 184B ldr r3, .L1460+24 + 11978 0094 4361 str r3, [r0, #20] + 11979 0096 0222 movs r2, #2 + 11980 0098 8260 str r2, [r0, #8] + 11981 009a 5DF8044B ldr r4, [sp], #4 + 11982 009e 0020 movs r0, #0 + 11983 00a0 7047 bx lr + 11984 .L1453: + 11985 00a2 154B ldr r3, .L1460+28 + 11986 00a4 4361 str r3, [r0, #20] + 11987 00a6 0822 movs r2, #8 + 11988 00a8 8260 str r2, [r0, #8] + 11989 00aa 5DF8044B ldr r4, [sp], #4 + 11990 00ae 0020 movs r0, #0 + 11991 00b0 7047 bx lr + 11992 .L1445: + 11993 00b2 124B ldr r3, .L1460+32 + 11994 00b4 4361 str r3, [r0, #20] + 11995 00b6 4022 movs r2, #64 + 11996 00b8 8260 str r2, [r0, #8] + 11997 00ba 5DF8044B ldr r4, [sp], #4 + 11998 00be 0020 movs r0, #0 + 11999 00c0 7047 bx lr + 12000 .L1447: + 12001 00c2 0F4B ldr r3, .L1460+36 + 12002 00c4 4361 str r3, [r0, #20] + 12003 00c6 4FF48072 mov r2, #256 + 12004 00ca 8260 str r2, [r0, #8] + 12005 00cc 0020 movs r0, #0 + 12006 00ce B0E7 b .L1449 + 12007 .L1443: + 12008 00d0 0C4B ldr r3, .L1460+40 + 12009 00d2 4361 str r3, [r0, #20] + 12010 00d4 1022 movs r2, #16 + 12011 00d6 8260 str r2, [r0, #8] + 12012 00d8 0020 movs r0, #0 + 12013 00da AAE7 b .L1449 + 12014 .L1461: + 12015 .align 2 + 12016 .L1460: + 12017 00dc 00000000 .word realCoefAQ15 + 12018 00e0 00000000 .word realCoefBQ15 + 12019 00e4 00000000 .word arm_cfft_sR_q15_len4096 + ARM GAS /tmp/ccFqHvis.s page 209 + + + 12020 00e8 00000000 .word arm_cfft_sR_q15_len1024 + 12021 00ec 00000000 .word arm_cfft_sR_q15_len128 + 12022 00f0 00000000 .word arm_cfft_sR_q15_len32 + 12023 00f4 00000000 .word arm_cfft_sR_q15_len2048 + 12024 00f8 00000000 .word arm_cfft_sR_q15_len512 + 12025 00fc 00000000 .word arm_cfft_sR_q15_len64 + 12026 0100 00000000 .word arm_cfft_sR_q15_len16 + 12027 0104 00000000 .word arm_cfft_sR_q15_len256 + 12029 .section .text.arm_rfft_init_q31,"ax",%progbits + 12030 .align 1 + 12031 .p2align 2,,3 + 12032 .global arm_rfft_init_q31 + 12033 .syntax unified + 12034 .thumb + 12035 .thumb_func + 12036 .fpu fpv4-sp-d16 + 12038 arm_rfft_init_q31: + 12039 @ args = 0, pretend = 0, frame = 0 + 12040 @ frame_needed = 0, uses_anonymous_args = 0 + 12041 @ link register save eliminated. + 12042 0000 10B4 push {r4} + 12043 0002 89B2 uxth r1, r1 + 12044 0004 354C ldr r4, .L1480 + 12045 0006 C460 str r4, [r0, #12] + 12046 0008 B1F5007F cmp r1, #512 + 12047 000c 344C ldr r4, .L1480+4 + 12048 000e 0160 str r1, [r0] + 12049 0010 0461 str r4, [r0, #16] + 12050 0012 0271 strb r2, [r0, #4] + 12051 0014 4371 strb r3, [r0, #5] + 12052 0016 5BD0 beq .L1463 + 12053 0018 1CD9 bls .L1477 + 12054 001a B1F5805F cmp r1, #4096 + 12055 001e 38D0 beq .L1471 + 12056 0020 0AD9 bls .L1478 + 12057 0022 B1F5005F cmp r1, #8192 + 12058 0026 2FD1 bne .L1475 + 12059 0028 2E4B ldr r3, .L1480+8 + 12060 002a 4361 str r3, [r0, #20] + 12061 002c 0122 movs r2, #1 + 12062 002e 8260 str r2, [r0, #8] + 12063 0030 0020 movs r0, #0 + 12064 .L1469: + 12065 0032 5DF8044B ldr r4, [sp], #4 + 12066 0036 7047 bx lr + 12067 .L1478: + 12068 0038 B1F5806F cmp r1, #1024 + 12069 003c 31D0 beq .L1473 + 12070 003e B1F5006F cmp r1, #2048 + 12071 0042 21D1 bne .L1475 + 12072 0044 284B ldr r3, .L1480+12 + 12073 0046 4361 str r3, [r0, #20] + 12074 0048 0422 movs r2, #4 + 12075 004a 8260 str r2, [r0, #8] + 12076 004c 5DF8044B ldr r4, [sp], #4 + 12077 0050 0020 movs r0, #0 + 12078 0052 7047 bx lr + ARM GAS /tmp/ccFqHvis.s page 210 + + + 12079 .L1477: + 12080 0054 8029 cmp r1, #128 + 12081 0056 2CD0 beq .L1465 + 12082 0058 0AD9 bls .L1479 + 12083 005a B1F5807F cmp r1, #256 + 12084 005e 13D1 bne .L1475 + 12085 0060 224B ldr r3, .L1480+16 + 12086 0062 4361 str r3, [r0, #20] + 12087 0064 2022 movs r2, #32 + 12088 0066 8260 str r2, [r0, #8] + 12089 0068 5DF8044B ldr r4, [sp], #4 + 12090 006c 0020 movs r0, #0 + 12091 006e 7047 bx lr + 12092 .L1479: + 12093 0070 2029 cmp r1, #32 + 12094 0072 26D0 beq .L1467 + 12095 0074 4029 cmp r1, #64 + 12096 0076 07D1 bne .L1475 + 12097 0078 1D4B ldr r3, .L1480+20 + 12098 007a 4361 str r3, [r0, #20] + 12099 007c 8022 movs r2, #128 + 12100 007e 8260 str r2, [r0, #8] + 12101 0080 5DF8044B ldr r4, [sp], #4 + 12102 0084 0020 movs r0, #0 + 12103 0086 7047 bx lr + 12104 .L1475: + 12105 0088 4FF0FF30 mov r0, #-1 + 12106 008c 5DF8044B ldr r4, [sp], #4 + 12107 0090 7047 bx lr + 12108 .L1471: + 12109 0092 184B ldr r3, .L1480+24 + 12110 0094 4361 str r3, [r0, #20] + 12111 0096 0222 movs r2, #2 + 12112 0098 8260 str r2, [r0, #8] + 12113 009a 5DF8044B ldr r4, [sp], #4 + 12114 009e 0020 movs r0, #0 + 12115 00a0 7047 bx lr + 12116 .L1473: + 12117 00a2 154B ldr r3, .L1480+28 + 12118 00a4 4361 str r3, [r0, #20] + 12119 00a6 0822 movs r2, #8 + 12120 00a8 8260 str r2, [r0, #8] + 12121 00aa 5DF8044B ldr r4, [sp], #4 + 12122 00ae 0020 movs r0, #0 + 12123 00b0 7047 bx lr + 12124 .L1465: + 12125 00b2 124B ldr r3, .L1480+32 + 12126 00b4 4361 str r3, [r0, #20] + 12127 00b6 4022 movs r2, #64 + 12128 00b8 8260 str r2, [r0, #8] + 12129 00ba 5DF8044B ldr r4, [sp], #4 + 12130 00be 0020 movs r0, #0 + 12131 00c0 7047 bx lr + 12132 .L1467: + 12133 00c2 0F4B ldr r3, .L1480+36 + 12134 00c4 4361 str r3, [r0, #20] + 12135 00c6 4FF48072 mov r2, #256 + ARM GAS /tmp/ccFqHvis.s page 211 + + + 12136 00ca 8260 str r2, [r0, #8] + 12137 00cc 0020 movs r0, #0 + 12138 00ce B0E7 b .L1469 + 12139 .L1463: + 12140 00d0 0C4B ldr r3, .L1480+40 + 12141 00d2 4361 str r3, [r0, #20] + 12142 00d4 1022 movs r2, #16 + 12143 00d6 8260 str r2, [r0, #8] + 12144 00d8 0020 movs r0, #0 + 12145 00da AAE7 b .L1469 + 12146 .L1481: + 12147 .align 2 + 12148 .L1480: + 12149 00dc 00000000 .word realCoefAQ31 + 12150 00e0 00000000 .word realCoefBQ31 + 12151 00e4 00000000 .word arm_cfft_sR_q31_len4096 + 12152 00e8 00000000 .word arm_cfft_sR_q31_len1024 + 12153 00ec 00000000 .word arm_cfft_sR_q31_len128 + 12154 00f0 00000000 .word arm_cfft_sR_q31_len32 + 12155 00f4 00000000 .word arm_cfft_sR_q31_len2048 + 12156 00f8 00000000 .word arm_cfft_sR_q31_len512 + 12157 00fc 00000000 .word arm_cfft_sR_q31_len64 + 12158 0100 00000000 .word arm_cfft_sR_q31_len16 + 12159 0104 00000000 .word arm_cfft_sR_q31_len256 + 12161 .section .text.arm_split_rfft_q15,"ax",%progbits + 12162 .align 1 + 12163 .p2align 2,,3 + 12164 .global arm_split_rfft_q15 + 12165 .syntax unified + 12166 .thumb + 12167 .thumb_func + 12168 .fpu fpv4-sp-d16 + 12170 arm_split_rfft_q15: + 12171 @ args = 8, pretend = 0, frame = 8 + 12172 @ frame_needed = 0, uses_anonymous_args = 0 + 12173 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12174 0004 83B0 sub sp, sp, #12 + 12175 0006 01F1804E add lr, r1, #1073741824 + 12176 000a 0D9E ldr r6, [sp, #52] + 12177 000c 0C9C ldr r4, [sp, #48] + 12178 000e 0EF1FF3E add lr, lr, #-1 + 12179 0012 4FEA8E07 lsl r7, lr, #2 + 12180 0016 B1F1010C subs ip, r1, #1 + 12181 001a 02EB8602 add r2, r2, r6, lsl #2 + 12182 001e 03EB8603 add r3, r3, r6, lsl #2 + 12183 0022 04EBC104 add r4, r4, r1, lsl #3 + 12184 0026 0197 str r7, [sp, #4] + 12185 0028 00EB8E0E add lr, r0, lr, lsl #2 + 12186 002c 29D0 beq .L1483 + 12187 002e 012E cmp r6, #1 + 12188 0030 A4F10405 sub r5, r4, #4 + 12189 0034 00F10404 add r4, r0, #4 + 12190 0038 3AD1 bne .L1494 + 12191 003a 291F subs r1, r5, #4 + 12192 003c 0C9D ldr r5, [sp, #48] + 12193 003e 05F10808 add r8, r5, #8 + 12194 .L1487: + ARM GAS /tmp/ccFqHvis.s page 212 + + + 12195 0042 54F8045B ldr r5, [r4], #4 @ unaligned + 12196 0046 52F8049B ldr r9, [r2], #4 @ unaligned + 12197 .syntax unified + 12198 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12199 004a 45FB09F6 smusd r6, r5, r9 + 12200 @ 0 "" 2 + 12201 .thumb + 12202 .syntax unified + 12203 004e 5EF80479 ldr r7, [lr], #-4 @ unaligned + 12204 0052 53F804AB ldr r10, [r3], #4 @ unaligned + 12205 .syntax unified + 12206 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12207 0056 27FB0A66 smlad r6, r7, r10, r6 + 12208 @ 0 "" 2 + 12209 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12210 005a 47FB1AF7 smusdx r7, r7, r10 + 12211 @ 0 "" 2 + 12212 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12213 005e 25FB1975 smladx r5, r5, r9, r7 + 12214 @ 0 "" 2 + 12215 .thumb + 12216 .syntax unified + 12217 0062 2D14 asrs r5, r5, #16 + 12218 0064 28F8025C strh r5, [r8, #-2] @ movhi + 12219 0068 3614 asrs r6, r6, #16 + 12220 006a 6D42 rsbs r5, r5, #0 + 12221 006c BCF1010C subs ip, ip, #1 + 12222 0070 28F8046C strh r6, [r8, #-4] @ movhi + 12223 0074 A1F10401 sub r1, r1, #4 + 12224 0078 4D81 strh r5, [r1, #10] @ movhi + 12225 007a 0E81 strh r6, [r1, #8] @ movhi + 12226 007c 08F10408 add r8, r8, #4 + 12227 0080 DFD1 bne .L1487 + 12228 .L1483: + 12229 0082 B0F90210 ldrsh r1, [r0, #2] + 12230 0086 B0F90030 ldrsh r3, [r0] + 12231 008a 0C9C ldr r4, [sp, #48] + 12232 008c 019A ldr r2, [sp, #4] + 12233 008e 5B1A subs r3, r3, r1 + 12234 0090 2244 add r2, r2, r4 + 12235 0092 0021 movs r1, #0 + 12236 0094 5B10 asrs r3, r3, #1 + 12237 0096 9380 strh r3, [r2, #4] @ movhi + 12238 0098 D180 strh r1, [r2, #6] @ movhi + 12239 009a B0F90030 ldrsh r3, [r0] + 12240 009e B0F90220 ldrsh r2, [r0, #2] + 12241 00a2 6180 strh r1, [r4, #2] @ movhi + 12242 00a4 1344 add r3, r3, r2 + 12243 00a6 5B10 asrs r3, r3, #1 + 12244 00a8 2380 strh r3, [r4] @ movhi + 12245 00aa 03B0 add sp, sp, #12 + 12246 @ sp needed + 12247 00ac BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12248 .L1494: + 12249 00b0 291F subs r1, r5, #4 + 12250 00b2 0C9D ldr r5, [sp, #48] + 12251 00b4 4FEA860B lsl fp, r6, #2 + ARM GAS /tmp/ccFqHvis.s page 213 + + + 12252 00b8 05F10808 add r8, r5, #8 + 12253 .L1485: + 12254 00bc 54F8045B ldr r5, [r4], #4 @ unaligned + 12255 00c0 D2F80090 ldr r9, [r2] @ unaligned + 12256 .syntax unified + 12257 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12258 00c4 45FB09F6 smusd r6, r5, r9 + 12259 @ 0 "" 2 + 12260 .thumb + 12261 .syntax unified + 12262 00c8 5EF80479 ldr r7, [lr], #-4 @ unaligned + 12263 00cc D3F800A0 ldr r10, [r3] @ unaligned + 12264 .syntax unified + 12265 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12266 00d0 27FB0A66 smlad r6, r7, r10, r6 + 12267 @ 0 "" 2 + 12268 @ 2051 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12269 00d4 47FB1AF7 smusdx r7, r7, r10 + 12270 @ 0 "" 2 + 12271 @ 2001 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12272 00d8 25FB1975 smladx r5, r5, r9, r7 + 12273 @ 0 "" 2 + 12274 .thumb + 12275 .syntax unified + 12276 00dc 2D14 asrs r5, r5, #16 + 12277 00de 28F8025C strh r5, [r8, #-2] @ movhi + 12278 00e2 3614 asrs r6, r6, #16 + 12279 00e4 6D42 rsbs r5, r5, #0 + 12280 00e6 BCF1010C subs ip, ip, #1 + 12281 00ea 28F8046C strh r6, [r8, #-4] @ movhi + 12282 00ee 5B44 add r3, r3, fp + 12283 00f0 8E80 strh r6, [r1, #4] @ movhi + 12284 00f2 CD80 strh r5, [r1, #6] @ movhi + 12285 00f4 5A44 add r2, r2, fp + 12286 00f6 08F10408 add r8, r8, #4 + 12287 00fa A1F10401 sub r1, r1, #4 + 12288 00fe DDD1 bne .L1485 + 12289 0100 BFE7 b .L1483 + 12291 0102 00BF .section .text.arm_rfft_q15,"ax",%progbits + 12292 .align 1 + 12293 .p2align 2,,3 + 12294 .global arm_rfft_q15 + 12295 .syntax unified + 12296 .thumb + 12297 .thumb_func + 12298 .fpu fpv4-sp-d16 + 12300 arm_rfft_q15: + 12301 @ args = 0, pretend = 0, frame = 0 + 12302 @ frame_needed = 0, uses_anonymous_args = 0 + 12303 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12304 0004 0646 mov r6, r0 + 12305 0006 1446 mov r4, r2 + 12306 0008 3279 ldrb r2, [r6, #4] @ zero_extendqisi2 + 12307 000a 3568 ldr r5, [r6] + 12308 000c 4069 ldr r0, [r0, #20] + 12309 000e 012A cmp r2, #1 + 12310 0010 83B0 sub sp, sp, #12 + ARM GAS /tmp/ccFqHvis.s page 214 + + + 12311 0012 0F46 mov r7, r1 + 12312 0014 4FEA5505 lsr r5, r5, #1 + 12313 0018 0ED0 beq .L1513 + 12314 001a 7379 ldrb r3, [r6, #5] @ zero_extendqisi2 + 12315 001c FFF7FEFF bl arm_cfft_q15 + 12316 0020 B368 ldr r3, [r6, #8] + 12317 0022 0193 str r3, [sp, #4] + 12318 0024 D6E90323 ldrd r2, r3, [r6, #12] + 12319 0028 2946 mov r1, r5 + 12320 002a 0094 str r4, [sp] + 12321 002c 3846 mov r0, r7 + 12322 002e FFF7FEFF bl arm_split_rfft_q15 + 12323 .L1495: + 12324 0032 03B0 add sp, sp, #12 + 12325 @ sp needed + 12326 0034 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12327 .L1513: + 12328 0038 D6E90331 ldrd r3, r1, [r6, #12] + 12329 003c D6F808E0 ldr lr, [r6, #8] + 12330 0040 07EB850C add ip, r7, r5, lsl #2 + 12331 0044 05B3 cbz r5, .L1497 + 12332 0046 BEF1010F cmp lr, #1 + 12333 004a 4FEA8E0B lsl fp, lr, #2 + 12334 004e A046 mov r8, r4 + 12335 0050 2DD1 bne .L1514 + 12336 .L1498: + 12337 0052 5CF804E9 ldr lr, [ip], #-4 @ unaligned + 12338 0056 51F804BB ldr fp, [r1], #4 @ unaligned + 12339 .syntax unified + 12340 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12341 005a 4EFB0BF9 smusd r9, lr, fp + 12342 @ 0 "" 2 + 12343 .thumb + 12344 .syntax unified + 12345 005e 57F804AB ldr r10, [r7], #4 @ unaligned + 12346 0062 53F8042B ldr r2, [r3], #4 @ unaligned + 12347 .syntax unified + 12348 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12349 0066 2AFB0299 smlad r9, r10, r2, r9 + 12350 @ 0 "" 2 + 12351 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12352 006a 2EFB1BFE smuadx lr, lr, fp + 12353 @ 0 "" 2 + 12354 .thumb + 12355 .syntax unified + 12356 006e CEF1000E rsb lr, lr, #0 + 12357 .syntax unified + 12358 @ 2067 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12359 0072 42FB1AE2 smlsdx r2, r2, r10, lr + 12360 @ 0 "" 2 + 12361 .thumb + 12362 .syntax unified + 12363 0076 120C lsrs r2, r2, #16 + 12364 0078 1204 lsls r2, r2, #16 + 12365 007a 42EA1942 orr r2, r2, r9, lsr #16 + 12366 007e 013D subs r5, r5, #1 + 12367 0080 48F8042B str r2, [r8], #4 @ unaligned + ARM GAS /tmp/ccFqHvis.s page 215 + + + 12368 0084 E5D1 bne .L1498 + 12369 .L1500: + 12370 0086 3279 ldrb r2, [r6, #4] @ zero_extendqisi2 + 12371 .L1497: + 12372 0088 7379 ldrb r3, [r6, #5] @ zero_extendqisi2 + 12373 008a 2146 mov r1, r4 + 12374 008c FFF7FEFF bl arm_cfft_q15 + 12375 0090 3268 ldr r2, [r6] + 12376 0092 002A cmp r2, #0 + 12377 0094 CDD0 beq .L1495 + 12378 0096 023C subs r4, r4, #2 + 12379 0098 04EB4202 add r2, r4, r2, lsl #1 + 12380 .L1503: + 12381 009c 34F9023F ldrsh r3, [r4, #2]! + 12382 00a0 5B00 lsls r3, r3, #1 + 12383 00a2 A242 cmp r2, r4 + 12384 00a4 2380 strh r3, [r4] @ movhi + 12385 00a6 F9D1 bne .L1503 + 12386 00a8 03B0 add sp, sp, #12 + 12387 @ sp needed + 12388 00aa BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12389 .L1514: + 12390 00ae 07EE900A vmov s15, r0 @ int + 12391 .L1499: + 12392 00b2 5CF804E9 ldr lr, [ip], #-4 @ unaligned + 12393 00b6 0868 ldr r0, [r1] @ unaligned + 12394 .syntax unified + 12395 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12396 00b8 4EFB00F9 smusd r9, lr, r0 + 12397 @ 0 "" 2 + 12398 .thumb + 12399 .syntax unified + 12400 00bc 57F804AB ldr r10, [r7], #4 @ unaligned + 12401 00c0 1A68 ldr r2, [r3] @ unaligned + 12402 .syntax unified + 12403 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12404 00c2 2AFB0299 smlad r9, r10, r2, r9 + 12405 @ 0 "" 2 + 12406 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12407 00c6 2EFB10FE smuadx lr, lr, r0 + 12408 @ 0 "" 2 + 12409 .thumb + 12410 .syntax unified + 12411 00ca CEF1000E rsb lr, lr, #0 + 12412 .syntax unified + 12413 @ 2067 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12414 00ce 42FB1AE2 smlsdx r2, r2, r10, lr + 12415 @ 0 "" 2 + 12416 .thumb + 12417 .syntax unified + 12418 00d2 120C lsrs r2, r2, #16 + 12419 00d4 1204 lsls r2, r2, #16 + 12420 00d6 42EA1942 orr r2, r2, r9, lsr #16 + 12421 00da 013D subs r5, r5, #1 + 12422 00dc 48F8042B str r2, [r8], #4 @ unaligned + 12423 00e0 5944 add r1, r1, fp + 12424 00e2 5B44 add r3, r3, fp + ARM GAS /tmp/ccFqHvis.s page 216 + + + 12425 00e4 E5D1 bne .L1499 + 12426 00e6 17EE900A vmov r0, s15 @ int + 12427 00ea CCE7 b .L1500 + 12429 .section .text.arm_dct4_q15,"ax",%progbits + 12430 .align 1 + 12431 .p2align 2,,3 + 12432 .global arm_dct4_q15 + 12433 .syntax unified + 12434 .thumb + 12435 .thumb_func + 12436 .fpu fpv4-sp-d16 + 12438 arm_dct4_q15: + 12439 @ args = 0, pretend = 0, frame = 0 + 12440 @ frame_needed = 0, uses_anonymous_args = 0 + 12441 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 12442 0002 0546 mov r5, r0 + 12443 0004 1446 mov r4, r2 + 12444 0006 0388 ldrh r3, [r0] + 12445 0008 8768 ldr r7, [r0, #8] + 12446 000a 0E46 mov r6, r1 + 12447 000c C168 ldr r1, [r0, #12] + 12448 000e 1046 mov r0, r2 + 12449 0010 FFF7FEFF bl arm_mult_q15 + 12450 0014 2B88 ldrh r3, [r5] + 12451 0016 2246 mov r2, r4 + 12452 0018 0121 movs r1, #1 + 12453 001a 2046 mov r0, r4 + 12454 001c FFF7FEFF bl arm_shift_q15 + 12455 0020 2988 ldrh r1, [r5] + 12456 0022 6B88 ldrh r3, [r5, #2] + 12457 0024 06EB4101 add r1, r6, r1, lsl #1 + 12458 0028 221D adds r2, r4, #4 + 12459 002a B01E subs r0, r6, #2 + 12460 .L1516: + 12461 002c 32F904CC ldrsh ip, [r2, #-4] + 12462 0030 20F802CF strh ip, [r0, #2]! @ movhi + 12463 0034 013B subs r3, r3, #1 + 12464 0036 32F902CC ldrsh ip, [r2, #-2] + 12465 003a 21F802CD strh ip, [r1, #-2]! @ movhi + 12466 003e 02F10402 add r2, r2, #4 + 12467 0042 F3D1 bne .L1516 + 12468 0044 B21C adds r2, r6, #2 + 12469 0046 B5F800E0 ldrh lr, [r5] + 12470 004a 9442 cmp r4, r2 + 12471 004c 0EF1FF32 add r2, lr, #-1 + 12472 0050 48D0 beq .L1517 + 12473 0052 092A cmp r2, #9 + 12474 0054 46D9 bls .L1517 + 12475 0056 AEF10202 sub r2, lr, #2 + 12476 005a 5208 lsrs r2, r2, #1 + 12477 005c 0132 adds r2, r2, #1 + 12478 005e 3046 mov r0, r6 + 12479 0060 2146 mov r1, r4 + 12480 .L1518: + 12481 0062 0133 adds r3, r3, #1 + 12482 0064 50F804CB ldr ip, [r0], #4 @ unaligned + 12483 0068 41F804CB str ip, [r1], #4 @ unaligned + ARM GAS /tmp/ccFqHvis.s page 217 + + + 12484 006c 9A42 cmp r2, r3 + 12485 006e F8D8 bhi .L1518 + 12486 0070 BEEB420F cmp lr, r2, lsl #1 + 12487 0074 03D0 beq .L1521 + 12488 0076 36F92230 ldrsh r3, [r6, r2, lsl #2] + 12489 007a 24F82230 strh r3, [r4, r2, lsl #2] @ movhi + 12490 .L1521: + 12491 007e 3246 mov r2, r6 + 12492 0080 2869 ldr r0, [r5, #16] + 12493 0082 2146 mov r1, r4 + 12494 0084 FFF7FEFF bl arm_rfft_q15 + 12495 0088 3246 mov r2, r6 + 12496 008a 3046 mov r0, r6 + 12497 008c 2B88 ldrh r3, [r5] + 12498 008e 3946 mov r1, r7 + 12499 0090 FFF7FEFF bl arm_cmplx_mult_cmplx_q15 + 12500 0094 2B88 ldrh r3, [r5] + 12501 0096 3246 mov r2, r6 + 12502 0098 3046 mov r0, r6 + 12503 009a 5B00 lsls r3, r3, #1 + 12504 009c 0221 movs r1, #2 + 12505 009e FFF7FEFF bl arm_shift_q15 + 12506 00a2 3146 mov r1, r6 + 12507 00a4 A21C adds r2, r4, #2 + 12508 00a6 31F9083B ldrsh r3, [r1], #8 + 12509 00aa 5B10 asrs r3, r3, #1 + 12510 00ac 2380 strh r3, [r4] @ movhi + 12511 00ae 2888 ldrh r0, [r5] + 12512 00b0 1646 mov r6, r2 + 12513 00b2 0138 subs r0, r0, #1 + 12514 .L1522: + 12515 00b4 31F8047C ldrh r7, [r1, #-4] + 12516 00b8 FB1A subs r3, r7, r3 + 12517 00ba 1BB2 sxth r3, r3 + 12518 00bc 0138 subs r0, r0, #1 + 12519 00be 26F8023B strh r3, [r6], #2 @ movhi + 12520 00c2 01F10401 add r1, r1, #4 + 12521 00c6 F5D1 bne .L1522 + 12522 00c8 2988 ldrh r1, [r5] + 12523 00ca 00E0 b .L1523 + 12524 .L1537: + 12525 00cc 0232 adds r2, r2, #2 + 12526 .L1523: + 12527 00ce 2388 ldrh r3, [r4] + 12528 00d0 A888 ldrh r0, [r5, #4] + 12529 00d2 13FB00F3 smulbb r3, r3, r0 + 12530 00d6 DB13 asrs r3, r3, #15 + 12531 00d8 0139 subs r1, r1, #1 + 12532 00da 1446 mov r4, r2 + 12533 00dc 22F8023C strh r3, [r2, #-2] @ movhi + 12534 00e0 F4D1 bne .L1537 + 12535 00e2 F8BD pop {r3, r4, r5, r6, r7, pc} + 12536 .L1517: + 12537 00e4 A11E subs r1, r4, #2 + 12538 00e6 3346 mov r3, r6 + 12539 00e8 00E0 b .L1520 + 12540 .L1538: + ARM GAS /tmp/ccFqHvis.s page 218 + + + 12541 00ea 013A subs r2, r2, #1 + 12542 .L1520: + 12543 00ec 33F9020B ldrsh r0, [r3], #2 + 12544 00f0 21F8020F strh r0, [r1, #2]! @ movhi + 12545 00f4 002A cmp r2, #0 + 12546 00f6 F8D1 bne .L1538 + 12547 00f8 C1E7 b .L1521 + 12549 00fa 00BF .section .text.arm_split_rifft_q15,"ax",%progbits + 12550 .align 1 + 12551 .p2align 2,,3 + 12552 .global arm_split_rifft_q15 + 12553 .syntax unified + 12554 .thumb + 12555 .thumb_func + 12556 .fpu fpv4-sp-d16 + 12558 arm_split_rifft_q15: + 12559 @ args = 8, pretend = 0, frame = 0 + 12560 @ frame_needed = 0, uses_anonymous_args = 0 + 12561 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 12562 0004 00EB8105 add r5, r0, r1, lsl #2 + 12563 0008 DDE90764 ldrd r6, r4, [sp, #28] + 12564 000c F9B1 cbz r1, .L1539 + 12565 000e 012C cmp r4, #1 + 12566 0010 4FEA840C lsl ip, r4, #2 + 12567 0014 1DD1 bne .L1542 + 12568 .L1541: + 12569 0016 55F804E9 ldr lr, [r5], #-4 @ unaligned + 12570 001a 53F8048B ldr r8, [r3], #4 @ unaligned + 12571 .syntax unified + 12572 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12573 001e 4EFB08F4 smusd r4, lr, r8 + 12574 @ 0 "" 2 + 12575 .thumb + 12576 .syntax unified + 12577 0022 50F8047B ldr r7, [r0], #4 @ unaligned + 12578 0026 52F804CB ldr ip, [r2], #4 @ unaligned + 12579 .syntax unified + 12580 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12581 002a 27FB0C44 smlad r4, r7, ip, r4 + 12582 @ 0 "" 2 + 12583 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12584 002e 2EFB18FE smuadx lr, lr, r8 + 12585 @ 0 "" 2 + 12586 .thumb + 12587 .syntax unified + 12588 0032 CEF1000E rsb lr, lr, #0 + 12589 .syntax unified + 12590 @ 2067 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12591 0036 4CFB17EC smlsdx ip, ip, r7, lr + 12592 @ 0 "" 2 + 12593 .thumb + 12594 .syntax unified + 12595 003a 4FEA1C4C lsr ip, ip, #16 + 12596 003e 4FEA0C4C lsl ip, ip, #16 + 12597 0042 4CEA144C orr ip, ip, r4, lsr #16 + 12598 0046 0139 subs r1, r1, #1 + 12599 0048 46F804CB str ip, [r6], #4 @ unaligned + ARM GAS /tmp/ccFqHvis.s page 219 + + + 12600 004c E3D1 bne .L1541 + 12601 .L1539: + 12602 004e BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 12603 .L1542: + 12604 0052 55F80479 ldr r7, [r5], #-4 @ unaligned + 12605 0056 D3F80090 ldr r9, [r3] @ unaligned + 12606 .syntax unified + 12607 @ 2043 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12608 005a 47FB09FE smusd lr, r7, r9 + 12609 @ 0 "" 2 + 12610 .thumb + 12611 .syntax unified + 12612 005e 50F8048B ldr r8, [r0], #4 @ unaligned + 12613 0062 1468 ldr r4, [r2] @ unaligned + 12614 .syntax unified + 12615 @ 1993 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12616 0064 28FB04EE smlad lr, r8, r4, lr + 12617 @ 0 "" 2 + 12618 @ 1985 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12619 0068 27FB19F7 smuadx r7, r7, r9 + 12620 @ 0 "" 2 + 12621 .thumb + 12622 .syntax unified + 12623 006c 7F42 rsbs r7, r7, #0 + 12624 .syntax unified + 12625 @ 2067 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 12626 006e 44FB1874 smlsdx r4, r4, r8, r7 + 12627 @ 0 "" 2 + 12628 .thumb + 12629 .syntax unified + 12630 0072 240C lsrs r4, r4, #16 + 12631 0074 2404 lsls r4, r4, #16 + 12632 0076 44EA1E44 orr r4, r4, lr, lsr #16 + 12633 007a 0139 subs r1, r1, #1 + 12634 007c 46F8044B str r4, [r6], #4 @ unaligned + 12635 0080 6344 add r3, r3, ip + 12636 0082 6244 add r2, r2, ip + 12637 0084 E5D1 bne .L1542 + 12638 0086 E2E7 b .L1539 + 12640 .section .text.arm_split_rfft_q31,"ax",%progbits + 12641 .align 1 + 12642 .p2align 2,,3 + 12643 .global arm_split_rfft_q31 + 12644 .syntax unified + 12645 .thumb + 12646 .thumb_func + 12647 .fpu fpv4-sp-d16 + 12649 arm_split_rfft_q31: + 12650 @ args = 8, pretend = 0, frame = 40 + 12651 @ frame_needed = 0, uses_anonymous_args = 0 + 12652 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12653 0004 8BB0 sub sp, sp, #44 + 12654 0006 0C46 mov r4, r1 + 12655 0008 0991 str r1, [sp, #36] + 12656 000a 1599 ldr r1, [sp, #84] + 12657 000c 0690 str r0, [sp, #24] + 12658 000e 02EBC102 add r2, r2, r1, lsl #3 + ARM GAS /tmp/ccFqHvis.s page 220 + + + 12659 0012 0392 str r2, [sp, #12] + 12660 0014 03EBC102 add r2, r3, r1, lsl #3 + 12661 0018 0492 str r2, [sp, #16] + 12662 001a 2346 mov r3, r4 + 12663 001c E200 lsls r2, r4, #3 + 12664 001e 149C ldr r4, [sp, #80] + 12665 0020 0892 str r2, [sp, #32] + 12666 0022 171F subs r7, r2, #4 + 12667 0024 04EB0318 add r8, r4, r3, lsl #4 + 12668 0028 CA00 lsls r2, r1, #3 + 12669 002a 013B subs r3, r3, #1 + 12670 002c 0744 add r7, r7, r0 + 12671 002e 0792 str r2, [sp, #28] + 12672 0030 0193 str r3, [sp, #4] + 12673 0032 74D0 beq .L1553 + 12674 0034 0129 cmp r1, #1 + 12675 0036 A8F10408 sub r8, r8, #4 + 12676 003a 40F08880 bne .L1564 + 12677 003e 069B ldr r3, [sp, #24] + 12678 0040 03F11005 add r5, r3, #16 + 12679 0044 039B ldr r3, [sp, #12] + 12680 0046 4FF00009 mov r9, #0 + 12681 004a 0433 adds r3, r3, #4 + 12682 004c A8F10808 sub r8, r8, #8 + 12683 0050 083F subs r7, r7, #8 + 12684 0052 04F1100B add fp, r4, #16 + 12685 0056 0593 str r3, [sp, #20] + 12686 0058 CE46 mov lr, r9 + 12687 .L1557: + 12688 005a 059B ldr r3, [sp, #20] + 12689 005c 55F8081C ldr r1, [r5, #-8] + 12690 0060 53F809A0 ldr r10, [r3, r9] + 12691 0064 039B ldr r3, [sp, #12] + 12692 0066 55F8042C ldr r2, [r5, #-4] + 12693 006a 53F809C0 ldr ip, [r3, r9] + 12694 006e BE68 ldr r6, [r7, #8] + 12695 0070 4FF00043 mov r3, #-2147483648 + 12696 0074 7046 mov r0, lr + 12697 0076 CCFB0130 smlal r3, r0, ip, r1 + 12698 007a 4FF00044 mov r4, #-2147483648 + 12699 007e 7346 mov r3, lr + 12700 0080 CAFB0143 smlal r4, r3, r10, r1 + 12701 0084 7146 mov r1, lr + 12702 0086 C2FB0C13 smlal r1, r3, r2, ip + 12703 008a 82FB0A2C smull r2, ip, r2, r10 + 12704 008e 0291 str r1, [sp, #8] + 12705 0090 5142 rsbs r1, r2, #0 + 12706 0092 60EB0C0C sbc ip, r0, ip + 12707 0096 049A ldr r2, [sp, #16] + 12708 0098 11F10041 adds r1, r1, #-2147483648 + 12709 009c 86FB0A40 smull r4, r0, r6, r10 + 12710 00a0 4CF1000C adc ip, ip, #0 + 12711 00a4 6442 rsbs r4, r4, #0 + 12712 00a6 52F80910 ldr r1, [r2, r9] + 12713 00aa 7A68 ldr r2, [r7, #4] + 12714 00ac 6CEB0000 sbc r0, ip, r0 + 12715 00b0 14F10044 adds r4, r4, #-2147483648 + ARM GAS /tmp/ccFqHvis.s page 221 + + + 12716 00b4 40F10000 adc r0, r0, #0 + 12717 00b8 7446 mov r4, lr + 12718 00ba C2FB0140 smlal r4, r0, r2, r1 + 12719 00be 14F10044 adds r4, r4, #-2147483648 + 12720 00c2 029C ldr r4, [sp, #8] + 12721 00c4 40F10000 adc r0, r0, #0 + 12722 00c8 14F10044 adds r4, r4, #-2147483648 + 12723 00cc 81FB0614 smull r1, r4, r1, r6 + 12724 00d0 43F10003 adc r3, r3, #0 + 12725 00d4 4942 rsbs r1, r1, #0 + 12726 00d6 63EB0403 sbc r3, r3, r4 + 12727 00da 82FB0A2C smull r2, ip, r2, r10 + 12728 00de 11F10041 adds r1, r1, #-2147483648 + 12729 00e2 43F10003 adc r3, r3, #0 + 12730 00e6 5242 rsbs r2, r2, #0 + 12731 00e8 63EB0C03 sbc r3, r3, ip + 12732 00ec 12F10042 adds r2, r2, #-2147483648 + 12733 00f0 43F10003 adc r3, r3, #0 + 12734 00f4 A8F10808 sub r8, r8, #8 + 12735 00f8 0BF1080B add fp, fp, #8 + 12736 00fc 4BE90403 strd r0, r3, [fp, #-16] + 12737 0100 5B42 rsbs r3, r3, #0 + 12738 0102 C8F81030 str r3, [r8, #16] + 12739 0106 019B ldr r3, [sp, #4] + 12740 0108 C8F80C00 str r0, [r8, #12] + 12741 010c 013B subs r3, r3, #1 + 12742 010e 05F10805 add r5, r5, #8 + 12743 0112 09F10809 add r9, r9, #8 + 12744 0116 A7F10807 sub r7, r7, #8 + 12745 011a 0193 str r3, [sp, #4] + 12746 011c 9DD1 bne .L1557 + 12747 .L1553: + 12748 011e 0698 ldr r0, [sp, #24] + 12749 0120 1499 ldr r1, [sp, #80] + 12750 0122 089A ldr r2, [sp, #32] + 12751 0124 0368 ldr r3, [r0] + 12752 0126 099C ldr r4, [sp, #36] + 12753 0128 0A44 add r2, r2, r1 + 12754 012a 4168 ldr r1, [r0, #4] + 12755 012c 5B1A subs r3, r3, r1 + 12756 012e 1499 ldr r1, [sp, #80] + 12757 0130 5B10 asrs r3, r3, #1 + 12758 0132 41F83430 str r3, [r1, r4, lsl #3] + 12759 0136 0021 movs r1, #0 + 12760 0138 5160 str r1, [r2, #4] + 12761 013a D0E90032 ldrd r3, r2, [r0] + 12762 013e 1498 ldr r0, [sp, #80] + 12763 0140 1344 add r3, r3, r2 + 12764 0142 5B10 asrs r3, r3, #1 + 12765 0144 4160 str r1, [r0, #4] + 12766 0146 0360 str r3, [r0] + 12767 0148 0BB0 add sp, sp, #44 + 12768 @ sp needed + 12769 014a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12770 .L1564: + 12771 014e 039B ldr r3, [sp, #12] + 12772 0150 4FF0000E mov lr, #0 + ARM GAS /tmp/ccFqHvis.s page 222 + + + 12773 0154 0433 adds r3, r3, #4 + 12774 0156 A7F1080B sub fp, r7, #8 + 12775 015a A8F10809 sub r9, r8, #8 + 12776 015e 00F11006 add r6, r0, #16 + 12777 0162 04F1100A add r10, r4, #16 + 12778 0166 0593 str r3, [sp, #20] + 12779 0168 7746 mov r7, lr + 12780 .L1555: + 12781 016a 059B ldr r3, [sp, #20] + 12782 016c 56F8081C ldr r1, [r6, #-8] + 12783 0170 53F80E80 ldr r8, [r3, lr] + 12784 0174 039B ldr r3, [sp, #12] + 12785 0176 56F8042C ldr r2, [r6, #-4] + 12786 017a 53F80EC0 ldr ip, [r3, lr] + 12787 017e DBF80850 ldr r5, [fp, #8] + 12788 0182 4FF00043 mov r3, #-2147483648 + 12789 0186 3846 mov r0, r7 + 12790 0188 C1FB0C30 smlal r3, r0, r1, ip + 12791 018c 4FF00044 mov r4, #-2147483648 + 12792 0190 3B46 mov r3, r7 + 12793 0192 C1FB0843 smlal r4, r3, r1, r8 + 12794 0196 3946 mov r1, r7 + 12795 0198 CCFB0213 smlal r1, r3, ip, r2 + 12796 019c 88FB022C smull r2, ip, r8, r2 + 12797 01a0 0291 str r1, [sp, #8] + 12798 01a2 5142 rsbs r1, r2, #0 + 12799 01a4 049A ldr r2, [sp, #16] + 12800 01a6 60EB0C0C sbc ip, r0, ip + 12801 01aa 11F10041 adds r1, r1, #-2147483648 + 12802 01ae 88FB0540 smull r4, r0, r8, r5 + 12803 01b2 52F80E10 ldr r1, [r2, lr] + 12804 01b6 079A ldr r2, [sp, #28] + 12805 01b8 4CF1000C adc ip, ip, #0 + 12806 01bc 6442 rsbs r4, r4, #0 + 12807 01be 6CEB0000 sbc r0, ip, r0 + 12808 01c2 9644 add lr, lr, r2 + 12809 01c4 14F10044 adds r4, r4, #-2147483648 + 12810 01c8 DBF80420 ldr r2, [fp, #4] + 12811 01cc 40F10000 adc r0, r0, #0 + 12812 01d0 3C46 mov r4, r7 + 12813 01d2 C1FB0240 smlal r4, r0, r1, r2 + 12814 01d6 14F10044 adds r4, r4, #-2147483648 + 12815 01da 029C ldr r4, [sp, #8] + 12816 01dc 40F10000 adc r0, r0, #0 + 12817 01e0 14F10044 adds r4, r4, #-2147483648 + 12818 01e4 85FB0114 smull r1, r4, r5, r1 + 12819 01e8 43F10003 adc r3, r3, #0 + 12820 01ec 4942 rsbs r1, r1, #0 + 12821 01ee 63EB0403 sbc r3, r3, r4 + 12822 01f2 88FB022C smull r2, ip, r8, r2 + 12823 01f6 11F10041 adds r1, r1, #-2147483648 + 12824 01fa 43F10003 adc r3, r3, #0 + 12825 01fe 5242 rsbs r2, r2, #0 + 12826 0200 63EB0C03 sbc r3, r3, ip + 12827 0204 12F10042 adds r2, r2, #-2147483648 + 12828 0208 43F10003 adc r3, r3, #0 + 12829 020c A9F10809 sub r9, r9, #8 + ARM GAS /tmp/ccFqHvis.s page 223 + + + 12830 0210 0AF1080A add r10, r10, #8 + 12831 0214 4AE90403 strd r0, r3, [r10, #-16] + 12832 0218 5B42 rsbs r3, r3, #0 + 12833 021a C9F81030 str r3, [r9, #16] + 12834 021e 019B ldr r3, [sp, #4] + 12835 0220 C9F80C00 str r0, [r9, #12] + 12836 0224 013B subs r3, r3, #1 + 12837 0226 06F10806 add r6, r6, #8 + 12838 022a ABF1080B sub fp, fp, #8 + 12839 022e 0193 str r3, [sp, #4] + 12840 0230 9BD1 bne .L1555 + 12841 0232 74E7 b .L1553 + 12843 .section .text.arm_split_rifft_q31,"ax",%progbits + 12844 .align 1 + 12845 .p2align 2,,3 + 12846 .global arm_split_rifft_q31 + 12847 .syntax unified + 12848 .thumb + 12849 .thumb_func + 12850 .fpu fpv4-sp-d16 + 12852 arm_split_rifft_q31: + 12853 @ args = 8, pretend = 0, frame = 32 + 12854 @ frame_needed = 0, uses_anonymous_args = 0 + 12855 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 12856 0004 89B0 sub sp, sp, #36 + 12857 0006 8A46 mov r10, r1 + 12858 0008 CDE90223 strd r2, r3, [sp, #8] + 12859 000c 1399 ldr r1, [sp, #76] + 12860 000e 00EBCA03 add r3, r0, r10, lsl #3 + 12861 0012 BAF1000F cmp r10, #0 + 12862 0016 74D0 beq .L1565 + 12863 0018 CA00 lsls r2, r1, #3 + 12864 001a 0129 cmp r1, #1 + 12865 001c 03F10403 add r3, r3, #4 + 12866 0020 0592 str r2, [sp, #20] + 12867 0022 71D1 bne .L1577 + 12868 0024 CAEB4A72 rsb r2, r10, r10, lsl #29 + 12869 0028 03EBC203 add r3, r3, r2, lsl #3 + 12870 002c 0693 str r3, [sp, #24] + 12871 002e 043B subs r3, r3, #4 + 12872 0030 0593 str r3, [sp, #20] + 12873 0032 029B ldr r3, [sp, #8] + 12874 0034 129A ldr r2, [sp, #72] + 12875 0036 4FF0000B mov fp, #0 + 12876 003a 0433 adds r3, r3, #4 + 12877 003c 00F1080C add ip, r0, #8 + 12878 0040 02F1080E add lr, r2, #8 + 12879 0044 0493 str r3, [sp, #16] + 12880 0046 5846 mov r0, fp + 12881 .L1570: + 12882 0048 029B ldr r3, [sp, #8] + 12883 004a 5CF8087C ldr r7, [ip, #-8] + 12884 004e 53F80B50 ldr r5, [r3, fp] + 12885 0052 049B ldr r3, [sp, #16] + 12886 0054 5CF8046C ldr r6, [ip, #-4] + 12887 0058 53F80B90 ldr r9, [r3, fp] + 12888 005c 0246 mov r2, r0 + ARM GAS /tmp/ccFqHvis.s page 224 + + + 12889 005e 4FF00043 mov r3, #-2147483648 + 12890 0062 C5FB0732 smlal r3, r2, r5, r7 + 12891 0066 0346 mov r3, r0 + 12892 0068 C9FB0632 smlal r3, r2, r9, r6 + 12893 006c 13F10043 adds r3, r3, #-2147483648 + 12894 0070 069B ldr r3, [sp, #24] + 12895 0072 53F83A80 ldr r8, [r3, r10, lsl #3] + 12896 0076 039B ldr r3, [sp, #12] + 12897 0078 42F10002 adc r2, r2, #0 + 12898 007c 53F80B10 ldr r1, [r3, fp] + 12899 0080 0091 str r1, [sp] + 12900 0082 0346 mov r3, r0 + 12901 0084 C8FB0932 smlal r3, r2, r8, r9 + 12902 0088 13F10043 adds r3, r3, #-2147483648 + 12903 008c 059B ldr r3, [sp, #20] + 12904 008e 42F10002 adc r2, r2, #0 + 12905 0092 53F83A40 ldr r4, [r3, r10, lsl #3] + 12906 0096 0192 str r2, [sp, #4] + 12907 0098 C9F10003 rsb r3, r9, #0 + 12908 009c 4FF00041 mov r1, #-2147483648 + 12909 00a0 0246 mov r2, r0 + 12910 00a2 C3FB0712 smlal r1, r2, r3, r7 + 12911 00a6 1346 mov r3, r2 + 12912 00a8 DDE90012 ldrd r1, r2, [sp] + 12913 00ac 0746 mov r7, r0 + 12914 00ae C6FB0573 smlal r7, r3, r6, r5 + 12915 00b2 0546 mov r5, r0 + 12916 00b4 C4FB0152 smlal r5, r2, r4, r1 + 12917 00b8 15F10045 adds r5, r5, #-2147483648 + 12918 00bc 42F10002 adc r2, r2, #0 + 12919 00c0 4EF8082C str r2, [lr, #-8] + 12920 00c4 17F10047 adds r7, r7, #-2147483648 + 12921 00c8 81FB0812 smull r1, r2, r1, r8 + 12922 00cc 43F10003 adc r3, r3, #0 + 12923 00d0 4942 rsbs r1, r1, #0 + 12924 00d2 63EB0203 sbc r3, r3, r2 + 12925 00d6 11F10041 adds r1, r1, #-2147483648 + 12926 00da 43F10003 adc r3, r3, #0 + 12927 00de 0246 mov r2, r0 + 12928 00e0 C4FB0923 smlal r2, r3, r4, r9 + 12929 00e4 12F10042 adds r2, r2, #-2147483648 + 12930 00e8 43F10003 adc r3, r3, #0 + 12931 00ec BAF1010A subs r10, r10, #1 + 12932 00f0 4EF8043C str r3, [lr, #-4] + 12933 00f4 0CF1080C add ip, ip, #8 + 12934 00f8 0BF1080B add fp, fp, #8 + 12935 00fc 0EF1080E add lr, lr, #8 + 12936 0100 A2D1 bne .L1570 + 12937 .L1565: + 12938 0102 09B0 add sp, sp, #36 + 12939 @ sp needed + 12940 0104 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 12941 .L1577: + 12942 0108 CAEB4A72 rsb r2, r10, r10, lsl #29 + 12943 010c 03EBC203 add r3, r3, r2, lsl #3 + 12944 0110 0693 str r3, [sp, #24] + 12945 0112 043B subs r3, r3, #4 + ARM GAS /tmp/ccFqHvis.s page 225 + + + 12946 0114 129A ldr r2, [sp, #72] + 12947 0116 0793 str r3, [sp, #28] + 12948 0118 029B ldr r3, [sp, #8] + 12949 011a 4FF00009 mov r9, #0 + 12950 011e 02F10806 add r6, r2, #8 + 12951 0122 0433 adds r3, r3, #4 + 12952 0124 00F1080B add fp, r0, #8 + 12953 0128 0493 str r3, [sp, #16] + 12954 012a 4846 mov r0, r9 + 12955 012c B446 mov ip, r6 + 12956 .L1568: + 12957 012e 029B ldr r3, [sp, #8] + 12958 0130 5BF8086C ldr r6, [fp, #-8] + 12959 0134 53F80970 ldr r7, [r3, r9] + 12960 0138 049B ldr r3, [sp, #16] + 12961 013a 5BF8045C ldr r5, [fp, #-4] + 12962 013e 53F80980 ldr r8, [r3, r9] + 12963 0142 0246 mov r2, r0 + 12964 0144 4FF00043 mov r3, #-2147483648 + 12965 0148 C6FB0732 smlal r3, r2, r6, r7 + 12966 014c 0346 mov r3, r0 + 12967 014e C5FB0832 smlal r3, r2, r5, r8 + 12968 0152 13F10043 adds r3, r3, #-2147483648 + 12969 0156 069B ldr r3, [sp, #24] + 12970 0158 53F83AE0 ldr lr, [r3, r10, lsl #3] + 12971 015c 039B ldr r3, [sp, #12] + 12972 015e 53F80910 ldr r1, [r3, r9] + 12973 0162 059B ldr r3, [sp, #20] + 12974 0164 0091 str r1, [sp] + 12975 0166 42F10002 adc r2, r2, #0 + 12976 016a 9944 add r9, r9, r3 + 12977 016c 0346 mov r3, r0 + 12978 016e C8FB0E32 smlal r3, r2, r8, lr + 12979 0172 13F10043 adds r3, r3, #-2147483648 + 12980 0176 079B ldr r3, [sp, #28] + 12981 0178 42F10002 adc r2, r2, #0 + 12982 017c 53F83A40 ldr r4, [r3, r10, lsl #3] + 12983 0180 0192 str r2, [sp, #4] + 12984 0182 C8F10003 rsb r3, r8, #0 + 12985 0186 4FF00041 mov r1, #-2147483648 + 12986 018a 0246 mov r2, r0 + 12987 018c C6FB0312 smlal r1, r2, r6, r3 + 12988 0190 1346 mov r3, r2 + 12989 0192 DDE90012 ldrd r1, r2, [sp] + 12990 0196 0646 mov r6, r0 + 12991 0198 C7FB0563 smlal r6, r3, r7, r5 + 12992 019c 0546 mov r5, r0 + 12993 019e C1FB0452 smlal r5, r2, r1, r4 + 12994 01a2 15F10045 adds r5, r5, #-2147483648 + 12995 01a6 42F10002 adc r2, r2, #0 + 12996 01aa 4CF8082C str r2, [ip, #-8] + 12997 01ae 16F10046 adds r6, r6, #-2147483648 + 12998 01b2 8EFB0112 smull r1, r2, lr, r1 + 12999 01b6 43F10003 adc r3, r3, #0 + 13000 01ba 4942 rsbs r1, r1, #0 + 13001 01bc 63EB0203 sbc r3, r3, r2 + 13002 01c0 11F10041 adds r1, r1, #-2147483648 + ARM GAS /tmp/ccFqHvis.s page 226 + + + 13003 01c4 43F10003 adc r3, r3, #0 + 13004 01c8 0246 mov r2, r0 + 13005 01ca C8FB0423 smlal r2, r3, r8, r4 + 13006 01ce 12F10042 adds r2, r2, #-2147483648 + 13007 01d2 43F10003 adc r3, r3, #0 + 13008 01d6 BAF1010A subs r10, r10, #1 + 13009 01da 4CF8043C str r3, [ip, #-4] + 13010 01de 0BF1080B add fp, fp, #8 + 13011 01e2 0CF1080C add ip, ip, #8 + 13012 01e6 A2D1 bne .L1568 + 13013 01e8 09B0 add sp, sp, #36 + 13014 @ sp needed + 13015 01ea BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 13017 01ee 00BF .section .text.arm_rfft_q31,"ax",%progbits + 13018 .align 1 + 13019 .p2align 2,,3 + 13020 .global arm_rfft_q31 + 13021 .syntax unified + 13022 .thumb + 13023 .thumb_func + 13024 .fpu fpv4-sp-d16 + 13026 arm_rfft_q31: + 13027 @ args = 0, pretend = 0, frame = 0 + 13028 @ frame_needed = 0, uses_anonymous_args = 0 + 13029 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 13030 0004 1546 mov r5, r2 + 13031 0006 0279 ldrb r2, [r0, #4] @ zero_extendqisi2 + 13032 0008 0368 ldr r3, [r0] + 13033 000a D0F81480 ldr r8, [r0, #20] + 13034 000e 012A cmp r2, #1 + 13035 0010 82B0 sub sp, sp, #8 + 13036 0012 0446 mov r4, r0 + 13037 0014 0F46 mov r7, r1 + 13038 0016 4FEA5306 lsr r6, r3, #1 + 13039 001a 0FD0 beq .L1586 + 13040 001c 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 + 13041 001e 4046 mov r0, r8 + 13042 0020 FFF7FEFF bl arm_cfft_q31 + 13043 0024 A368 ldr r3, [r4, #8] + 13044 0026 0193 str r3, [sp, #4] + 13045 0028 D4E90323 ldrd r2, r3, [r4, #12] + 13046 002c 3146 mov r1, r6 + 13047 002e 0095 str r5, [sp] + 13048 0030 3846 mov r0, r7 + 13049 0032 FFF7FEFF bl arm_split_rfft_q31 + 13050 .L1578: + 13051 0036 02B0 add sp, sp, #8 + 13052 @ sp needed + 13053 0038 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 13054 .L1586: + 13055 003c 0095 str r5, [sp] + 13056 003e A368 ldr r3, [r4, #8] + 13057 0040 0193 str r3, [sp, #4] + 13058 0042 D4E90323 ldrd r2, r3, [r4, #12] + 13059 0046 3146 mov r1, r6 + 13060 0048 3846 mov r0, r7 + 13061 004a FFF7FEFF bl arm_split_rifft_q31 + ARM GAS /tmp/ccFqHvis.s page 227 + + + 13062 004e 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 + 13063 0050 2279 ldrb r2, [r4, #4] @ zero_extendqisi2 + 13064 0052 4046 mov r0, r8 + 13065 0054 2946 mov r1, r5 + 13066 0056 FFF7FEFF bl arm_cfft_q31 + 13067 005a 2368 ldr r3, [r4] + 13068 005c 002B cmp r3, #0 + 13069 005e EAD0 beq .L1578 + 13070 0060 291F subs r1, r5, #4 + 13071 0062 0022 movs r2, #0 + 13072 .L1582: + 13073 0064 51F8043F ldr r3, [r1, #4]! + 13074 0068 5B00 lsls r3, r3, #1 + 13075 006a 0B60 str r3, [r1] + 13076 006c 2368 ldr r3, [r4] + 13077 006e 0132 adds r2, r2, #1 + 13078 0070 9342 cmp r3, r2 + 13079 0072 F7D8 bhi .L1582 + 13080 0074 02B0 add sp, sp, #8 + 13081 @ sp needed + 13082 0076 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 13084 007a 00BF .section .text.arm_dct4_q31,"ax",%progbits + 13085 .align 1 + 13086 .p2align 2,,3 + 13087 .global arm_dct4_q31 + 13088 .syntax unified + 13089 .thumb + 13090 .thumb_func + 13091 .fpu fpv4-sp-d16 + 13093 arm_dct4_q31: + 13094 @ args = 0, pretend = 0, frame = 0 + 13095 @ frame_needed = 0, uses_anonymous_args = 0 + 13096 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 13097 0002 0546 mov r5, r0 + 13098 0004 1446 mov r4, r2 + 13099 0006 0388 ldrh r3, [r0] + 13100 0008 8768 ldr r7, [r0, #8] + 13101 000a 0E46 mov r6, r1 + 13102 000c C168 ldr r1, [r0, #12] + 13103 000e 1046 mov r0, r2 + 13104 0010 FFF7FEFF bl arm_mult_q31 + 13105 0014 2B88 ldrh r3, [r5] + 13106 0016 2246 mov r2, r4 + 13107 0018 0121 movs r1, #1 + 13108 001a 2046 mov r0, r4 + 13109 001c FFF7FEFF bl arm_shift_q31 + 13110 0020 B5F800E0 ldrh lr, [r5] + 13111 0024 6B88 ldrh r3, [r5, #2] + 13112 0026 04F10802 add r2, r4, #8 + 13113 002a A6F1040C sub ip, r6, #4 + 13114 002e 06EB8E01 add r1, r6, lr, lsl #2 + 13115 .L1588: + 13116 0032 52F8080C ldr r0, [r2, #-8] + 13117 0036 4CF8040F str r0, [ip, #4]! + 13118 003a 013B subs r3, r3, #1 + 13119 003c 52F8040C ldr r0, [r2, #-4] + 13120 0040 41F8040D str r0, [r1, #-4]! + ARM GAS /tmp/ccFqHvis.s page 228 + + + 13121 0044 02F10802 add r2, r2, #8 + 13122 0048 F3D1 bne .L1588 + 13123 004a 44EA0601 orr r1, r4, r6 + 13124 004e 321D adds r2, r6, #4 + 13125 0050 A21A subs r2, r4, r2 + 13126 0052 C1F30201 ubfx r1, r1, #0, #3 + 13127 0056 18BF it ne + 13128 0058 0122 movne r2, #1 + 13129 005a 0029 cmp r1, #0 + 13130 005c 18BF it ne + 13131 005e 0022 movne r2, #0 + 13132 0060 002A cmp r2, #0 + 13133 0062 52D0 beq .L1610 + 13134 0064 0EF1FF32 add r2, lr, #-1 + 13135 0068 0B2A cmp r2, #11 + 13136 006a 50D9 bls .L1589 + 13137 006c AEF10202 sub r2, lr, #2 + 13138 0070 5208 lsrs r2, r2, #1 + 13139 0072 0132 adds r2, r2, #1 + 13140 0074 A6F10800 sub r0, r6, #8 + 13141 0078 2146 mov r1, r4 + 13142 .L1590: + 13143 007a 90ED027B vldr.64 d7, [r0, #8] @ int + 13144 007e 0133 adds r3, r3, #1 + 13145 0080 9A42 cmp r2, r3 + 13146 0082 00F10800 add r0, r0, #8 + 13147 0086 A1EC027B vstmia.64 r1!, {d7} @ int + 13148 008a F6D8 bhi .L1590 + 13149 008c BEEB420F cmp lr, r2, lsl #1 + 13150 0090 03D0 beq .L1593 + 13151 0092 56F83230 ldr r3, [r6, r2, lsl #3] + 13152 0096 44F83230 str r3, [r4, r2, lsl #3] + 13153 .L1593: + 13154 009a 2869 ldr r0, [r5, #16] + 13155 009c 3246 mov r2, r6 + 13156 009e 2146 mov r1, r4 + 13157 00a0 FFF7FEFF bl arm_rfft_q31 + 13158 00a4 3946 mov r1, r7 + 13159 00a6 2B88 ldrh r3, [r5] + 13160 00a8 3246 mov r2, r6 + 13161 00aa 3046 mov r0, r6 + 13162 00ac FFF7FEFF bl arm_cmplx_mult_cmplx_q31 + 13163 00b0 2B88 ldrh r3, [r5] + 13164 00b2 3246 mov r2, r6 + 13165 00b4 5B00 lsls r3, r3, #1 + 13166 00b6 3046 mov r0, r6 + 13167 00b8 0221 movs r1, #2 + 13168 00ba FFF7FEFF bl arm_shift_q31 + 13169 00be 3368 ldr r3, [r6] + 13170 00c0 2888 ldrh r0, [r5] + 13171 00c2 221D adds r2, r4, #4 + 13172 00c4 5B10 asrs r3, r3, #1 + 13173 00c6 0138 subs r0, r0, #1 + 13174 00c8 2360 str r3, [r4] + 13175 00ca 1746 mov r7, r2 + 13176 00cc 8446 mov ip, r0 + 13177 00ce 48B3 cbz r0, .L1594 + ARM GAS /tmp/ccFqHvis.s page 229 + + + 13178 00d0 06F11001 add r1, r6, #16 + 13179 .L1595: + 13180 00d4 51F8086C ldr r6, [r1, #-8] + 13181 00d8 BCF1010C subs ip, ip, #1 + 13182 00dc A6EB0303 sub r3, r6, r3 + 13183 00e0 47F8043B str r3, [r7], #4 + 13184 00e4 01F10801 add r1, r1, #8 + 13185 00e8 F4D1 bne .L1595 + 13186 00ea 01E0 b .L1596 + 13187 .L1611: + 13188 00ec 0432 adds r2, r2, #4 + 13189 00ee 0138 subs r0, r0, #1 + 13190 .L1596: + 13191 00f0 2368 ldr r3, [r4] + 13192 00f2 6968 ldr r1, [r5, #4] + 13193 00f4 83FB0131 smull r3, r1, r3, r1 + 13194 00f8 DB0F lsrs r3, r3, #31 + 13195 00fa 43EA4103 orr r3, r3, r1, lsl #1 + 13196 00fe 1446 mov r4, r2 + 13197 0100 42F8043C str r3, [r2, #-4] + 13198 0104 0028 cmp r0, #0 + 13199 0106 F1D1 bne .L1611 + 13200 0108 F8BD pop {r3, r4, r5, r6, r7, pc} + 13201 .L1610: + 13202 010a 0EF1FF32 add r2, lr, #-1 + 13203 .L1589: + 13204 010e 211F subs r1, r4, #4 + 13205 0110 3346 mov r3, r6 + 13206 0112 00E0 b .L1592 + 13207 .L1612: + 13208 0114 013A subs r2, r2, #1 + 13209 .L1592: + 13210 0116 53F8040B ldr r0, [r3], #4 + 13211 011a 41F8040F str r0, [r1, #4]! + 13212 011e 002A cmp r2, #0 + 13213 0120 F8D1 bne .L1612 + 13214 0122 BAE7 b .L1593 + 13215 .L1594: + 13216 0124 6A68 ldr r2, [r5, #4] + 13217 0126 83FB0232 smull r3, r2, r3, r2 + 13218 012a DB0F lsrs r3, r3, #31 + 13219 012c 43EA4203 orr r3, r3, r2, lsl #1 + 13220 0130 2360 str r3, [r4] + 13221 0132 F8BD pop {r3, r4, r5, r6, r7, pc} + 13223 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccFqHvis.s page 230 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 TransformFunctions.c + /tmp/ccFqHvis.s:16 .text.arm_rfft_32_fast_init_f32:0000000000000000 $t + /tmp/ccFqHvis.s:24 .text.arm_rfft_32_fast_init_f32:0000000000000000 arm_rfft_32_fast_init_f32 + /tmp/ccFqHvis.s:52 .text.arm_rfft_32_fast_init_f32:0000000000000030 $d + /tmp/ccFqHvis.s:56 .text.arm_rfft_64_fast_init_f32:0000000000000000 $t + /tmp/ccFqHvis.s:63 .text.arm_rfft_64_fast_init_f32:0000000000000000 arm_rfft_64_fast_init_f32 + /tmp/ccFqHvis.s:91 .text.arm_rfft_64_fast_init_f32:0000000000000030 $d + /tmp/ccFqHvis.s:95 .text.arm_rfft_128_fast_init_f32:0000000000000000 $t + /tmp/ccFqHvis.s:102 .text.arm_rfft_128_fast_init_f32:0000000000000000 arm_rfft_128_fast_init_f32 + /tmp/ccFqHvis.s:130 .text.arm_rfft_128_fast_init_f32:0000000000000030 $d + /tmp/ccFqHvis.s:134 .text.arm_rfft_256_fast_init_f32:0000000000000000 $t + /tmp/ccFqHvis.s:141 .text.arm_rfft_256_fast_init_f32:0000000000000000 arm_rfft_256_fast_init_f32 + /tmp/ccFqHvis.s:169 .text.arm_rfft_256_fast_init_f32:0000000000000034 $d + /tmp/ccFqHvis.s:173 .text.arm_rfft_512_fast_init_f32:0000000000000000 $t + /tmp/ccFqHvis.s:180 .text.arm_rfft_512_fast_init_f32:0000000000000000 arm_rfft_512_fast_init_f32 + /tmp/ccFqHvis.s:208 .text.arm_rfft_512_fast_init_f32:0000000000000034 $d + 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Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h Core/Inc/rx.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Core/Inc/tx.h Core/Inc/tx.h \ + Core/Inc/rx.h Core/Inc/interface.h Core/Inc/si5351.h Core/Inc/main.h \ + Core/Inc/FIRFilterCode.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cordic.h +Core/Inc/bassofono.h: +Core/Inc/main.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: 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--git a/codice/build/interface.d b/codice/build/interface.d new file mode 100644 index 0000000..d060686 --- /dev/null +++ b/codice/build/interface.d @@ -0,0 +1,93 @@ +build/interface.o: Core/Src/interface.c Core/Inc/interface.h \ + Core/Inc/bassofono.h Core/Inc/main.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h Core/Inc/rx.h \ + Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Core/Inc/tx.h +Core/Inc/interface.h: +Core/Inc/bassofono.h: +Core/Inc/main.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: +Core/Inc/rx.h: +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Core/Inc/tx.h: diff --git a/codice/build/interface.lst b/codice/build/interface.lst new file mode 100644 index 0000000..a583449 --- /dev/null +++ b/codice/build/interface.lst @@ -0,0 +1,2595 @@ +ARM GAS /tmp/ccraf9Ev.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "interface.c" + 14 .text + 15 .section .rodata.print_integer.str1.4,"aMS",%progbits,1 + 16 .align 2 + 17 .LC0: + 18 0000 252A6C64 .ascii "%*ld\000" + 18 00 + 19 .section .text.print_integer,"ax",%progbits + 20 .align 1 + 21 .p2align 2,,3 + 22 .global print_integer + 23 .arch armv7e-m + 24 .syntax unified + 25 .thumb + 26 .thumb_func + 27 .fpu fpv4-sp-d16 + 29 print_integer: + 30 @ args = 0, pretend = 0, frame = 0 + 31 @ frame_needed = 0, uses_anonymous_args = 0 + 32 0000 094A ldr r2, .L4 + 33 0002 10B5 push {r4, lr} + 34 0004 C0EBC000 rsb r0, r0, r0, lsl #3 + 35 0008 084C ldr r4, .L4+4 + 36 000a 02EBC002 add r2, r2, r0, lsl #3 + 37 000e 2188 ldrh r1, [r4] + 38 0010 D36A ldr r3, [r2, #44] + 39 0012 0748 ldr r0, .L4+8 + 40 0014 1B68 ldr r3, [r3] + 41 0016 127C ldrb r2, [r2, #16] @ zero_extendqisi2 + 42 0018 0844 add r0, r0, r1 + 43 001a 0649 ldr r1, .L4+12 + 44 001c FFF7FEFF bl sprintf + 45 0020 2388 ldrh r3, [r4] + 46 0022 1844 add r0, r0, r3 + 47 0024 2080 strh r0, [r4] @ movhi + 48 0026 10BD pop {r4, pc} + 49 .L5: + 50 .align 2 + 51 .L4: + 52 0028 00000000 .word .LANCHOR0 + 53 002c 00000000 .word uart_tx_buf_in_idx + 54 0030 00000000 .word uart_tx_buf + 55 0034 00000000 .word .LC0 + 57 .section .rodata.print_string.str1.4,"aMS",%progbits,1 + 58 .align 2 + ARM GAS /tmp/ccraf9Ev.s page 2 + + + 59 .LC1: + 60 0000 252A7300 .ascii "%*s\000" + 61 .section .text.print_string,"ax",%progbits + 62 .align 1 + 63 .p2align 2,,3 + 64 .global print_string + 65 .syntax unified + 66 .thumb + 67 .thumb_func + 68 .fpu fpv4-sp-d16 + 70 print_string: + 71 @ args = 0, pretend = 0, frame = 0 + 72 @ frame_needed = 0, uses_anonymous_args = 0 + 73 0000 10B5 push {r4, lr} + 74 0002 094A ldr r2, .L8 + 75 0004 094C ldr r4, .L8+4 + 76 0006 0A49 ldr r1, .L8+8 + 77 0008 2388 ldrh r3, [r4] + 78 000a C0EBC000 rsb r0, r0, r0, lsl #3 + 79 000e 02EBC002 add r2, r2, r0, lsl #3 + 80 0012 0848 ldr r0, .L8+12 + 81 0014 1844 add r0, r0, r3 + 82 0016 D36A ldr r3, [r2, #44] + 83 0018 127C ldrb r2, [r2, #16] @ zero_extendqisi2 + 84 001a FFF7FEFF bl sprintf + 85 001e 2388 ldrh r3, [r4] + 86 0020 1844 add r0, r0, r3 + 87 0022 2080 strh r0, [r4] @ movhi + 88 0024 10BD pop {r4, pc} + 89 .L9: + 90 0026 00BF .align 2 + 91 .L8: + 92 0028 00000000 .word .LANCHOR0 + 93 002c 00000000 .word uart_tx_buf_in_idx + 94 0030 00000000 .word .LC1 + 95 0034 00000000 .word uart_tx_buf + 97 .section .text.print_modulation,"ax",%progbits + 98 .align 1 + 99 .p2align 2,,3 + 100 .global print_modulation + 101 .syntax unified + 102 .thumb + 103 .thumb_func + 104 .fpu fpv4-sp-d16 + 106 print_modulation: + 107 @ args = 0, pretend = 0, frame = 0 + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 0000 0B4A ldr r2, .L12 + 110 0002 C0EBC000 rsb r0, r0, r0, lsl #3 + 111 0006 02EBC002 add r2, r2, r0, lsl #3 + 112 000a 38B5 push {r3, r4, r5, lr} + 113 000c D36A ldr r3, [r2, #44] + 114 000e 094C ldr r4, .L12+4 + 115 0010 1968 ldr r1, [r3] + 116 0012 2088 ldrh r0, [r4] + 117 0014 084B ldr r3, .L12+8 + 118 0016 094D ldr r5, .L12+12 + ARM GAS /tmp/ccraf9Ev.s page 3 + + + 119 0018 127C ldrb r2, [r2, #16] @ zero_extendqisi2 + 120 001a 03EB8103 add r3, r3, r1, lsl #2 + 121 001e 2844 add r0, r0, r5 + 122 0020 0749 ldr r1, .L12+16 + 123 0022 FFF7FEFF bl sprintf + 124 0026 2388 ldrh r3, [r4] + 125 0028 1844 add r0, r0, r3 + 126 002a 2080 strh r0, [r4] @ movhi + 127 002c 38BD pop {r3, r4, r5, pc} + 128 .L13: + 129 002e 00BF .align 2 + 130 .L12: + 131 0030 00000000 .word .LANCHOR0 + 132 0034 00000000 .word uart_tx_buf_in_idx + 133 0038 00000000 .word .LANCHOR1 + 134 003c 00000000 .word uart_tx_buf + 135 0040 00000000 .word .LC1 + 137 .section .text.print_bar,"ax",%progbits + 138 .align 1 + 139 .p2align 2,,3 + 140 .global print_bar + 141 .syntax unified + 142 .thumb + 143 .thumb_func + 144 .fpu fpv4-sp-d16 + 146 print_bar: + 147 @ args = 0, pretend = 0, frame = 0 + 148 @ frame_needed = 1, uses_anonymous_args = 0 + 149 0000 98B5 push {r3, r4, r7, lr} + 150 0002 1D4B ldr r3, .L26 + 151 0004 C0EBC000 rsb r0, r0, r0, lsl #3 + 152 0008 03EBC000 add r0, r3, r0, lsl #3 + 153 000c 00AF add r7, sp, #0 + 154 000e 027C ldrb r2, [r0, #16] @ zero_extendqisi2 + 155 0010 C16A ldr r1, [r0, #44] + 156 0012 D31D adds r3, r2, #7 + 157 0014 03F4FC73 and r3, r3, #504 + 158 0018 ADEB030D sub sp, sp, r3 + 159 001c 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 160 001e 6946 mov r1, sp + 161 0020 F2B1 cbz r2, .L15 + 162 0022 6846 mov r0, sp + 163 0024 0DEB020C add ip, sp, r2 + 164 0028 2024 movs r4, #32 + 165 002a 4FF0850E mov lr, #133 + 166 002e 0EE0 b .L19 + 167 .L25: + 168 0030 80F800E0 strb lr, [r0] + 169 .L17: + 170 0034 9A1F subs r2, r3, #6 + 171 0036 D2B2 uxtb r2, r2 + 172 0038 9A42 cmp r2, r3 + 173 003a 00F10100 add r0, r0, #1 + 174 003e 4FF0FF33 mov r3, #-1 + 175 0042 88BF it hi + 176 0044 0023 movhi r3, #0 + 177 0046 8445 cmp ip, r0 + ARM GAS /tmp/ccraf9Ev.s page 4 + + + 178 0048 03EA0203 and r3, r3, r2 + 179 004c 08D0 beq .L15 + 180 .L19: + 181 004e 052B cmp r3, #5 + 182 0050 EED8 bhi .L25 + 183 0052 A3F18002 sub r2, r3, #128 + 184 0056 0BB1 cbz r3, .L18 + 185 0058 0270 strb r2, [r0] + 186 005a EBE7 b .L17 + 187 .L18: + 188 005c 0470 strb r4, [r0] + 189 005e E9E7 b .L17 + 190 .L15: + 191 0060 064C ldr r4, .L26+4 + 192 0062 0748 ldr r0, .L26+8 + 193 0064 2388 ldrh r3, [r4] + 194 0066 1844 add r0, r0, r3 + 195 0068 FFF7FEFF bl sprintf + 196 006c 2388 ldrh r3, [r4] + 197 006e 1844 add r0, r0, r3 + 198 0070 2080 strh r0, [r4] @ movhi + 199 0072 BD46 mov sp, r7 + 200 @ sp needed + 201 0074 98BD pop {r3, r4, r7, pc} + 202 .L27: + 203 0076 00BF .align 2 + 204 .L26: + 205 0078 00000000 .word .LANCHOR0 + 206 007c 00000000 .word uart_tx_buf_in_idx + 207 0080 00000000 .word uart_tx_buf + 209 .section .rodata.print_frequency.str1.4,"aMS",%progbits,1 + 210 .align 2 + 211 .LC2: + 212 0000 25386C64 .ascii "%8ld\000" + 212 00 + 213 0005 000000 .align 2 + 214 .LC3: + 215 0008 257300 .ascii "%s\000" + 216 .section .text.print_frequency,"ax",%progbits + 217 .align 1 + 218 .p2align 2,,3 + 219 .global print_frequency + 220 .syntax unified + 221 .thumb + 222 .thumb_func + 223 .fpu fpv4-sp-d16 + 225 print_frequency: + 226 @ args = 0, pretend = 0, frame = 32 + 227 @ frame_needed = 0, uses_anonymous_args = 0 + 228 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 229 0004 304B ldr r3, .L40 + 230 0006 3149 ldr r1, .L40+4 + 231 0008 C0EBC000 rsb r0, r0, r0, lsl #3 + 232 000c 03EBC000 add r0, r3, r0, lsl #3 + 233 0010 89B0 sub sp, sp, #36 + 234 0012 C36A ldr r3, [r0, #44] + 235 0014 6846 mov r0, sp + ARM GAS /tmp/ccraf9Ev.s page 5 + + + 236 0016 1A68 ldr r2, [r3] + 237 0018 FFF7FEFF bl sprintf + 238 001c 9DF80090 ldrb r9, [sp] @ zero_extendqisi2 + 239 0020 B9F1000F cmp r9, #0 + 240 0024 4DD0 beq .L34 + 241 0026 0025 movs r5, #0 + 242 0028 294F ldr r7, .L40+8 + 243 002a 2C46 mov r4, r5 + 244 002c 2E46 mov r6, r5 + 245 002e 4FF02E08 mov r8, #46 + 246 .L33: + 247 0032 6846 mov r0, sp + 248 0034 FFF7FEFF bl strlen + 249 0038 001B subs r0, r0, r4 + 250 003a 07FB00F0 mul r0, r7, r0 + 251 003e B0F1553F cmp r0, #1431655765 + 252 0042 16D8 bhi .L30 + 253 0044 06F12003 add r3, r6, #32 + 254 0048 0DEB0306 add r6, sp, r3 + 255 004c 8CB1 cbz r4, .L30 + 256 004e 16F8213C ldrb r3, [r6, #-33] @ zero_extendqisi2 + 257 0052 05F12002 add r2, r5, #32 + 258 0056 202B cmp r3, #32 + 259 0058 6A44 add r2, sp, r2 + 260 005a 04BF itt eq + 261 005c 05F12002 addeq r2, r5, #32 + 262 0060 6A44 addeq r2, sp, r2 + 263 0062 05F10105 add r5, r5, #1 + 264 0066 0CBF ite eq + 265 0068 02F8103C strbeq r3, [r2, #-16] + 266 006c 02F8108C strbne r8, [r2, #-16] + 267 0070 EDB2 uxtb r5, r5 + 268 .L30: + 269 0072 0134 adds r4, r4, #1 + 270 0074 E4B2 uxtb r4, r4 + 271 0076 05F12002 add r2, r5, #32 + 272 007a 6B1C adds r3, r5, #1 + 273 007c 0DEB0205 add r5, sp, r2 + 274 0080 04F12002 add r2, r4, #32 + 275 0084 6A44 add r2, sp, r2 + 276 0086 05F8109C strb r9, [r5, #-16] + 277 008a 12F8209C ldrb r9, [r2, #-32] @ zero_extendqisi2 + 278 008e DDB2 uxtb r5, r3 + 279 0090 2646 mov r6, r4 + 280 0092 B9F1000F cmp r9, #0 + 281 0096 CCD1 bne .L33 + 282 .L29: + 283 0098 0E4C ldr r4, .L40+12 + 284 009a 0F48 ldr r0, .L40+16 + 285 009c 2388 ldrh r3, [r4] + 286 009e 0F49 ldr r1, .L40+20 + 287 00a0 1844 add r0, r0, r3 + 288 00a2 05F12003 add r3, r5, #32 + 289 00a6 0DEB0305 add r5, sp, r3 + 290 00aa 0023 movs r3, #0 + 291 00ac 05F8103C strb r3, [r5, #-16] + 292 00b0 04AA add r2, sp, #16 + ARM GAS /tmp/ccraf9Ev.s page 6 + + + 293 00b2 FFF7FEFF bl sprintf + 294 00b6 2388 ldrh r3, [r4] + 295 00b8 1844 add r0, r0, r3 + 296 00ba 2080 strh r0, [r4] @ movhi + 297 00bc 09B0 add sp, sp, #36 + 298 @ sp needed + 299 00be BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 300 .L34: + 301 00c2 4D46 mov r5, r9 + 302 00c4 E8E7 b .L29 + 303 .L41: + 304 00c6 00BF .align 2 + 305 .L40: + 306 00c8 00000000 .word .LANCHOR0 + 307 00cc 00000000 .word .LC2 + 308 00d0 ABAAAAAA .word -1431655765 + 309 00d4 00000000 .word uart_tx_buf_in_idx + 310 00d8 00000000 .word uart_tx_buf + 311 00dc 08000000 .word .LC3 + 313 .section .text.encoder_increment,"ax",%progbits + 314 .align 1 + 315 .p2align 2,,3 + 316 .global encoder_increment + 317 .syntax unified + 318 .thumb + 319 .thumb_func + 320 .fpu fpv4-sp-d16 + 322 encoder_increment: + 323 @ args = 0, pretend = 0, frame = 0 + 324 @ frame_needed = 0, uses_anonymous_args = 0 + 325 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 326 0004 154D ldr r5, .L49 + 327 0006 164C ldr r4, .L49+4 + 328 0008 2878 ldrb r0, [r5] @ zero_extendqisi2 + 329 000a C0EBC002 rsb r2, r0, r0, lsl #3 + 330 000e 04EBC202 add r2, r4, r2, lsl #3 + 331 0012 C300 lsls r3, r0, #3 + 332 0014 D17B ldrb r1, [r2, #15] @ zero_extendqisi2 + 333 0016 31B1 cbz r1, .L48 + 334 .L43: + 335 0018 181A subs r0, r3, r0 + 336 001a 04EBC000 add r0, r4, r0, lsl #3 + 337 001e BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 338 0022 036B ldr r3, [r0, #48] + 339 0024 1847 bx r3 @ indirect register sibling call + 340 .L48: + 341 0026 D66A ldr r6, [r2, #44] + 342 0028 5769 ldr r7, [r2, #20] + 343 002a 3168 ldr r1, [r6] + 344 002c 3944 add r1, r1, r7 + 345 002e 3160 str r1, [r6] + 346 0030 9769 ldr r7, [r2, #24] + 347 0032 B942 cmp r1, r7 + 348 0034 07D3 bcc .L44 + 349 0036 D269 ldr r2, [r2, #28] + 350 0038 9142 cmp r1, r2 + 351 003a 04D8 bhi .L44 + ARM GAS /tmp/ccraf9Ev.s page 7 + + + 352 .L45: + 353 003c FFF7FEFF bl set_changed + 354 0040 2878 ldrb r0, [r5] @ zero_extendqisi2 + 355 0042 C300 lsls r3, r0, #3 + 356 0044 E8E7 b .L43 + 357 .L44: + 358 0046 1B1A subs r3, r3, r0 + 359 0048 04EBC303 add r3, r4, r3, lsl #3 + 360 004c 93F82020 ldrb r2, [r3, #32] @ zero_extendqisi2 + 361 0050 0AB1 cbz r2, .L46 + 362 0052 3760 str r7, [r6] + 363 0054 F2E7 b .L45 + 364 .L46: + 365 0056 DB69 ldr r3, [r3, #28] + 366 0058 3360 str r3, [r6] + 367 005a EFE7 b .L45 + 368 .L50: + 369 .align 2 + 370 .L49: + 371 005c 00000000 .word .LANCHOR2 + 372 0060 00000000 .word .LANCHOR0 + 374 .section .text.encoder_decrement,"ax",%progbits + 375 .align 1 + 376 .p2align 2,,3 + 377 .global encoder_decrement + 378 .syntax unified + 379 .thumb + 380 .thumb_func + 381 .fpu fpv4-sp-d16 + 383 encoder_decrement: + 384 @ args = 0, pretend = 0, frame = 0 + 385 @ frame_needed = 0, uses_anonymous_args = 0 + 386 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 387 0004 154D ldr r5, .L58 + 388 0006 164C ldr r4, .L58+4 + 389 0008 2878 ldrb r0, [r5] @ zero_extendqisi2 + 390 000a C0EBC002 rsb r2, r0, r0, lsl #3 + 391 000e 04EBC202 add r2, r4, r2, lsl #3 + 392 0012 C300 lsls r3, r0, #3 + 393 0014 D17B ldrb r1, [r2, #15] @ zero_extendqisi2 + 394 0016 31B1 cbz r1, .L57 + 395 .L52: + 396 0018 181A subs r0, r3, r0 + 397 001a 04EBC000 add r0, r4, r0, lsl #3 + 398 001e BDE8F041 pop {r4, r5, r6, r7, r8, lr} + 399 0022 036B ldr r3, [r0, #48] + 400 0024 1847 bx r3 @ indirect register sibling call + 401 .L57: + 402 0026 D66A ldr r6, [r2, #44] + 403 0028 5769 ldr r7, [r2, #20] + 404 002a 3168 ldr r1, [r6] + 405 002c C91B subs r1, r1, r7 + 406 002e 3160 str r1, [r6] + 407 0030 9769 ldr r7, [r2, #24] + 408 0032 B942 cmp r1, r7 + 409 0034 07D3 bcc .L53 + 410 0036 D269 ldr r2, [r2, #28] + ARM GAS /tmp/ccraf9Ev.s page 8 + + + 411 0038 9142 cmp r1, r2 + 412 003a 04D8 bhi .L53 + 413 .L54: + 414 003c FFF7FEFF bl set_changed + 415 0040 2878 ldrb r0, [r5] @ zero_extendqisi2 + 416 0042 C300 lsls r3, r0, #3 + 417 0044 E8E7 b .L52 + 418 .L53: + 419 0046 1B1A subs r3, r3, r0 + 420 0048 04EBC303 add r3, r4, r3, lsl #3 + 421 004c 93F82020 ldrb r2, [r3, #32] @ zero_extendqisi2 + 422 0050 12B1 cbz r2, .L55 + 423 0052 DB69 ldr r3, [r3, #28] + 424 0054 3360 str r3, [r6] + 425 0056 F1E7 b .L54 + 426 .L55: + 427 0058 3760 str r7, [r6] + 428 005a EFE7 b .L54 + 429 .L59: + 430 .align 2 + 431 .L58: + 432 005c 00000000 .word .LANCHOR2 + 433 0060 00000000 .word .LANCHOR0 + 435 .section .text.joystick_dx,"ax",%progbits + 436 .align 1 + 437 .p2align 2,,3 + 438 .global joystick_dx + 439 .syntax unified + 440 .thumb + 441 .thumb_func + 442 .fpu fpv4-sp-d16 + 444 joystick_dx: + 445 @ args = 0, pretend = 0, frame = 0 + 446 @ frame_needed = 0, uses_anonymous_args = 0 + 447 @ link register save eliminated. + 448 0000 074B ldr r3, .L62 + 449 0002 084A ldr r2, .L62+4 + 450 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 451 0006 C3EBC303 rsb r3, r3, r3, lsl #3 + 452 000a 02EBC303 add r3, r2, r3, lsl #3 + 453 000e 5A69 ldr r2, [r3, #20] + 454 0010 092A cmp r2, #9 + 455 0012 04D9 bls .L60 + 456 0014 0449 ldr r1, .L62+8 + 457 0016 A1FB0212 umull r1, r2, r1, r2 + 458 001a D208 lsrs r2, r2, #3 + 459 001c 5A61 str r2, [r3, #20] + 460 .L60: + 461 001e 7047 bx lr + 462 .L63: + 463 .align 2 + 464 .L62: + 465 0020 00000000 .word .LANCHOR2 + 466 0024 00000000 .word .LANCHOR0 + 467 0028 CDCCCCCC .word -858993459 + 469 .section .text.joystick_sx,"ax",%progbits + 470 .align 1 + ARM GAS /tmp/ccraf9Ev.s page 9 + + + 471 .p2align 2,,3 + 472 .global joystick_sx + 473 .syntax unified + 474 .thumb + 475 .thumb_func + 476 .fpu fpv4-sp-d16 + 478 joystick_sx: + 479 @ args = 0, pretend = 0, frame = 0 + 480 @ frame_needed = 0, uses_anonymous_args = 0 + 481 @ link register save eliminated. + 482 0000 084B ldr r3, .L66 + 483 0002 094A ldr r2, .L66+4 + 484 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 485 0006 C3EBC303 rsb r3, r3, r3, lsl #3 + 486 000a 02EBC302 add r2, r2, r3, lsl #3 + 487 000e 5369 ldr r3, [r2, #20] + 488 0010 D169 ldr r1, [r2, #28] + 489 0012 03EB8303 add r3, r3, r3, lsl #2 + 490 0016 5800 lsls r0, r3, #1 + 491 0018 B1EB430F cmp r1, r3, lsl #1 + 492 001c 88BF it hi + 493 001e 5061 strhi r0, [r2, #20] + 494 0020 7047 bx lr + 495 .L67: + 496 0022 00BF .align 2 + 497 .L66: + 498 0024 00000000 .word .LANCHOR2 + 499 0028 00000000 .word .LANCHOR0 + 501 .section .rodata.joystick_down.str1.4,"aMS",%progbits,1 + 502 .align 2 + 503 .LC4: + 504 0000 1B5B2564 .ascii "\033[%d,%dz\000" + 504 2C25647A + 504 00 + 505 0009 000000 .align 2 + 506 .LC5: + 507 000c 25642025 .ascii "%d %-12s\000" + 507 2D313273 + 507 00 + 508 .section .text.joystick_down,"ax",%progbits + 509 .align 1 + 510 .p2align 2,,3 + 511 .global joystick_down + 512 .syntax unified + 513 .thumb + 514 .thumb_func + 515 .fpu fpv4-sp-d16 + 517 joystick_down: + 518 @ args = 0, pretend = 0, frame = 0 + 519 @ frame_needed = 0, uses_anonymous_args = 0 + 520 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 521 0002 234D ldr r5, .L81 + 522 0004 234C ldr r4, .L81+4 + 523 0006 2878 ldrb r0, [r5] @ zero_extendqisi2 + 524 0008 FFF7FEFF bl set_changed + 525 000c 2978 ldrb r1, [r5] @ zero_extendqisi2 + 526 000e 224B ldr r3, .L81+8 + ARM GAS /tmp/ccraf9Ev.s page 10 + + + 527 0010 224A ldr r2, .L81+12 + 528 0012 93F800E0 ldrb lr, [r3] @ zero_extendqisi2 + 529 0016 1778 ldrb r7, [r2] @ zero_extendqisi2 + 530 0018 0131 adds r1, r1, #1 + 531 001a C9B2 uxtb r1, r1 + 532 001c 2970 strb r1, [r5] + 533 001e 0022 movs r2, #0 + 534 .L69: + 535 0020 0846 mov r0, r1 + 536 0022 1646 mov r6, r2 + 537 0024 04E0 b .L70 + 538 .L71: + 539 0026 5FFA8CF0 uxtb r0, ip + 540 002a 8645 cmp lr, r0 + 541 002c 1646 mov r6, r2 + 542 002e F7D9 bls .L69 + 543 .L70: + 544 0030 C0EBC003 rsb r3, r0, r0, lsl #3 + 545 0034 04EBC302 add r2, r4, r3, lsl #3 + 546 0038 00F1010C add ip, r0, #1 + 547 003c D17B ldrb r1, [r2, #15] @ zero_extendqisi2 + 548 003e 0429 cmp r1, #4 + 549 0040 4FF00102 mov r2, #1 + 550 0044 4FF00001 mov r1, #0 + 551 0048 EDD0 beq .L71 + 552 004a 14F83330 ldrb r3, [r4, r3, lsl #3] @ zero_extendqisi2 + 553 004e BB42 cmp r3, r7 + 554 0050 E9D1 bne .L71 + 555 0052 06B1 cbz r6, .L72 + 556 0054 2870 strb r0, [r5] + 557 .L72: + 558 0056 124E ldr r6, .L81+16 + 559 0058 124F ldr r7, .L81+20 + 560 005a FFF7FEFF bl set_changed + 561 005e 3088 ldrh r0, [r6] + 562 0060 1149 ldr r1, .L81+24 + 563 0062 0023 movs r3, #0 + 564 0064 1A46 mov r2, r3 + 565 0066 3844 add r0, r0, r7 + 566 0068 FFF7FEFF bl sprintf + 567 006c 3388 ldrh r3, [r6] + 568 006e 2A78 ldrb r2, [r5] @ zero_extendqisi2 + 569 0070 0E49 ldr r1, .L81+28 + 570 0072 0633 adds r3, r3, #6 + 571 0074 9BB2 uxth r3, r3 + 572 0076 F818 adds r0, r7, r3 + 573 0078 3380 strh r3, [r6] @ movhi + 574 007a 3823 movs r3, #56 + 575 007c 03FB0243 mla r3, r3, r2, r4 + 576 0080 0133 adds r3, r3, #1 + 577 0082 FFF7FEFF bl sprintf + 578 0086 3388 ldrh r3, [r6] + 579 0088 1844 add r0, r0, r3 + 580 008a 3080 strh r0, [r6] @ movhi + 581 008c F8BD pop {r3, r4, r5, r6, r7, pc} + 582 .L82: + 583 008e 00BF .align 2 + ARM GAS /tmp/ccraf9Ev.s page 11 + + + 584 .L81: + 585 0090 00000000 .word .LANCHOR2 + 586 0094 00000000 .word .LANCHOR0 + 587 0098 00000000 .word .LANCHOR4 + 588 009c 00000000 .word .LANCHOR3 + 589 00a0 00000000 .word uart_tx_buf_in_idx + 590 00a4 00000000 .word uart_tx_buf + 591 00a8 00000000 .word .LC4 + 592 00ac 0C000000 .word .LC5 + 594 .section .text.joystick_button,"ax",%progbits + 595 .align 1 + 596 .p2align 2,,3 + 597 .global joystick_button + 598 .syntax unified + 599 .thumb + 600 .thumb_func + 601 .fpu fpv4-sp-d16 + 603 joystick_button: + 604 @ args = 0, pretend = 0, frame = 0 + 605 @ frame_needed = 0, uses_anonymous_args = 0 + 606 @ link register save eliminated. + 607 0000 7047 bx lr + 609 0002 00BF .section .text.menu_item_up,"ax",%progbits + 610 .align 1 + 611 .p2align 2,,3 + 612 .global menu_item_up + 613 .syntax unified + 614 .thumb + 615 .thumb_func + 616 .fpu fpv4-sp-d16 + 618 menu_item_up: + 619 @ args = 0, pretend = 0, frame = 0 + 620 @ frame_needed = 0, uses_anonymous_args = 0 + 621 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 622 0002 234D ldr r5, .L97 + 623 0004 234C ldr r4, .L97+4 + 624 0006 2878 ldrb r0, [r5] @ zero_extendqisi2 + 625 0008 FFF7FEFF bl set_changed + 626 000c 2978 ldrb r1, [r5] @ zero_extendqisi2 + 627 000e 224B ldr r3, .L97+8 + 628 0010 224A ldr r2, .L97+12 + 629 0012 93F800E0 ldrb lr, [r3] @ zero_extendqisi2 + 630 0016 1778 ldrb r7, [r2] @ zero_extendqisi2 + 631 0018 0131 adds r1, r1, #1 + 632 001a C9B2 uxtb r1, r1 + 633 001c 2970 strb r1, [r5] + 634 001e 0022 movs r2, #0 + 635 .L85: + 636 0020 0846 mov r0, r1 + 637 0022 1646 mov r6, r2 + 638 0024 04E0 b .L86 + 639 .L87: + 640 0026 5FFA8CF0 uxtb r0, ip + 641 002a 8645 cmp lr, r0 + 642 002c 1646 mov r6, r2 + 643 002e F7D9 bls .L85 + 644 .L86: + ARM GAS /tmp/ccraf9Ev.s page 12 + + + 645 0030 C0EBC003 rsb r3, r0, r0, lsl #3 + 646 0034 04EBC302 add r2, r4, r3, lsl #3 + 647 0038 00F1010C add ip, r0, #1 + 648 003c D17B ldrb r1, [r2, #15] @ zero_extendqisi2 + 649 003e 0429 cmp r1, #4 + 650 0040 4FF00102 mov r2, #1 + 651 0044 4FF00001 mov r1, #0 + 652 0048 EDD0 beq .L87 + 653 004a 14F83330 ldrb r3, [r4, r3, lsl #3] @ zero_extendqisi2 + 654 004e BB42 cmp r3, r7 + 655 0050 E9D1 bne .L87 + 656 0052 06B1 cbz r6, .L88 + 657 0054 2870 strb r0, [r5] + 658 .L88: + 659 0056 124E ldr r6, .L97+16 + 660 0058 124F ldr r7, .L97+20 + 661 005a FFF7FEFF bl set_changed + 662 005e 3088 ldrh r0, [r6] + 663 0060 1149 ldr r1, .L97+24 + 664 0062 0023 movs r3, #0 + 665 0064 1A46 mov r2, r3 + 666 0066 3844 add r0, r0, r7 + 667 0068 FFF7FEFF bl sprintf + 668 006c 3388 ldrh r3, [r6] + 669 006e 2A78 ldrb r2, [r5] @ zero_extendqisi2 + 670 0070 0E49 ldr r1, .L97+28 + 671 0072 0633 adds r3, r3, #6 + 672 0074 9BB2 uxth r3, r3 + 673 0076 F818 adds r0, r7, r3 + 674 0078 3380 strh r3, [r6] @ movhi + 675 007a 3823 movs r3, #56 + 676 007c 03FB0243 mla r3, r3, r2, r4 + 677 0080 0133 adds r3, r3, #1 + 678 0082 FFF7FEFF bl sprintf + 679 0086 3388 ldrh r3, [r6] + 680 0088 1844 add r0, r0, r3 + 681 008a 3080 strh r0, [r6] @ movhi + 682 008c F8BD pop {r3, r4, r5, r6, r7, pc} + 683 .L98: + 684 008e 00BF .align 2 + 685 .L97: + 686 0090 00000000 .word .LANCHOR2 + 687 0094 00000000 .word .LANCHOR0 + 688 0098 00000000 .word .LANCHOR4 + 689 009c 00000000 .word .LANCHOR3 + 690 00a0 00000000 .word uart_tx_buf_in_idx + 691 00a4 00000000 .word uart_tx_buf + 692 00a8 00000000 .word .LC4 + 693 00ac 0C000000 .word .LC5 + 695 .section .text.menu_item_down,"ax",%progbits + 696 .align 1 + 697 .p2align 2,,3 + 698 .global menu_item_down + 699 .syntax unified + 700 .thumb + 701 .thumb_func + 702 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccraf9Ev.s page 13 + + + 704 menu_item_down: + 705 @ args = 0, pretend = 0, frame = 0 + 706 @ frame_needed = 0, uses_anonymous_args = 0 + 707 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 708 0002 244D ldr r5, .L113 + 709 0004 2878 ldrb r0, [r5] @ zero_extendqisi2 + 710 0006 FFF7FEFF bl set_changed + 711 000a 2878 ldrb r0, [r5] @ zero_extendqisi2 + 712 000c 224B ldr r3, .L113+4 + 713 000e 0138 subs r0, r0, #1 + 714 0010 1F78 ldrb r7, [r3] @ zero_extendqisi2 + 715 0012 C0B2 uxtb r0, r0 + 716 0014 B842 cmp r0, r7 + 717 0016 2870 strb r0, [r5] + 718 0018 02D3 bcc .L100 + 719 001a 781E subs r0, r7, #1 + 720 001c C0B2 uxtb r0, r0 + 721 001e 2870 strb r0, [r5] + 722 .L100: + 723 0020 1E4B ldr r3, .L113+8 + 724 0022 1F4C ldr r4, .L113+12 + 725 0024 93F800E0 ldrb lr, [r3] @ zero_extendqisi2 + 726 0028 07F1FF3C add ip, r7, #-1 + 727 002c 0026 movs r6, #0 + 728 002e 5FFA8CFC uxtb ip, ip + 729 0032 05E0 b .L102 + 730 .L103: + 731 0034 C8B2 uxtb r0, r1 + 732 0036 8742 cmp r7, r0 + 733 0038 4FF00106 mov r6, #1 + 734 003c 98BF it ls + 735 003e 6046 movls r0, ip + 736 .L102: + 737 0040 C0EBC003 rsb r3, r0, r0, lsl #3 + 738 0044 04EBC302 add r2, r4, r3, lsl #3 + 739 0048 411E subs r1, r0, #1 + 740 004a D27B ldrb r2, [r2, #15] @ zero_extendqisi2 + 741 004c 042A cmp r2, #4 + 742 004e F1D0 beq .L103 + 743 0050 14F83330 ldrb r3, [r4, r3, lsl #3] @ zero_extendqisi2 + 744 0054 7345 cmp r3, lr + 745 0056 EDD1 bne .L103 + 746 0058 06B1 cbz r6, .L104 + 747 005a 2870 strb r0, [r5] + 748 .L104: + 749 005c 114E ldr r6, .L113+16 + 750 005e 124F ldr r7, .L113+20 + 751 0060 FFF7FEFF bl set_changed + 752 0064 3088 ldrh r0, [r6] + 753 0066 1149 ldr r1, .L113+24 + 754 0068 0023 movs r3, #0 + 755 006a 1A46 mov r2, r3 + 756 006c 3844 add r0, r0, r7 + 757 006e FFF7FEFF bl sprintf + 758 0072 3388 ldrh r3, [r6] + 759 0074 2A78 ldrb r2, [r5] @ zero_extendqisi2 + 760 0076 0E49 ldr r1, .L113+28 + ARM GAS /tmp/ccraf9Ev.s page 14 + + + 761 0078 0633 adds r3, r3, #6 + 762 007a 9BB2 uxth r3, r3 + 763 007c F818 adds r0, r7, r3 + 764 007e 3380 strh r3, [r6] @ movhi + 765 0080 3823 movs r3, #56 + 766 0082 03FB0243 mla r3, r3, r2, r4 + 767 0086 0133 adds r3, r3, #1 + 768 0088 FFF7FEFF bl sprintf + 769 008c 3388 ldrh r3, [r6] + 770 008e 1844 add r0, r0, r3 + 771 0090 3080 strh r0, [r6] @ movhi + 772 0092 F8BD pop {r3, r4, r5, r6, r7, pc} + 773 .L114: + 774 .align 2 + 775 .L113: + 776 0094 00000000 .word .LANCHOR2 + 777 0098 00000000 .word .LANCHOR4 + 778 009c 00000000 .word .LANCHOR3 + 779 00a0 00000000 .word .LANCHOR0 + 780 00a4 00000000 .word uart_tx_buf_in_idx + 781 00a8 00000000 .word uart_tx_buf + 782 00ac 00000000 .word .LC4 + 783 00b0 0C000000 .word .LC5 + 785 .section .text.joystick_up,"ax",%progbits + 786 .align 1 + 787 .p2align 2,,3 + 788 .global joystick_up + 789 .syntax unified + 790 .thumb + 791 .thumb_func + 792 .fpu fpv4-sp-d16 + 794 joystick_up: + 795 @ args = 0, pretend = 0, frame = 0 + 796 @ frame_needed = 0, uses_anonymous_args = 0 + 797 @ link register save eliminated. + 798 0000 FFF7FEBF b menu_item_down + 800 .section .text.step_up,"ax",%progbits + 801 .align 1 + 802 .p2align 2,,3 + 803 .global step_up + 804 .syntax unified + 805 .thumb + 806 .thumb_func + 807 .fpu fpv4-sp-d16 + 809 step_up: + 810 @ args = 0, pretend = 0, frame = 0 + 811 @ frame_needed = 0, uses_anonymous_args = 0 + 812 @ link register save eliminated. + 813 0000 074B ldr r3, .L118 + 814 0002 C0EBC000 rsb r0, r0, r0, lsl #3 + 815 0006 03EBC000 add r0, r3, r0, lsl #3 + 816 000a 4369 ldr r3, [r0, #20] + 817 000c C269 ldr r2, [r0, #28] + 818 000e 03EB8303 add r3, r3, r3, lsl #2 + 819 0012 5900 lsls r1, r3, #1 + 820 0014 B2EB430F cmp r2, r3, lsl #1 + 821 0018 88BF it hi + ARM GAS /tmp/ccraf9Ev.s page 15 + + + 822 001a 4161 strhi r1, [r0, #20] + 823 001c 7047 bx lr + 824 .L119: + 825 001e 00BF .align 2 + 826 .L118: + 827 0020 00000000 .word .LANCHOR0 + 829 .section .text.step_down,"ax",%progbits + 830 .align 1 + 831 .p2align 2,,3 + 832 .global step_down + 833 .syntax unified + 834 .thumb + 835 .thumb_func + 836 .fpu fpv4-sp-d16 + 838 step_down: + 839 @ args = 0, pretend = 0, frame = 0 + 840 @ frame_needed = 0, uses_anonymous_args = 0 + 841 @ link register save eliminated. + 842 0000 064B ldr r3, .L122 + 843 0002 C0EBC000 rsb r0, r0, r0, lsl #3 + 844 0006 03EBC000 add r0, r3, r0, lsl #3 + 845 000a 4369 ldr r3, [r0, #20] + 846 000c 092B cmp r3, #9 + 847 000e 04D9 bls .L120 + 848 0010 034A ldr r2, .L122+4 + 849 0012 A2FB0323 umull r2, r3, r2, r3 + 850 0016 DB08 lsrs r3, r3, #3 + 851 0018 4361 str r3, [r0, #20] + 852 .L120: + 853 001a 7047 bx lr + 854 .L123: + 855 .align 2 + 856 .L122: + 857 001c 00000000 .word .LANCHOR0 + 858 0020 CDCCCCCC .word -858993459 + 860 .section .rodata.interface_set_default.str1.4,"aMS",%progbits,1 + 861 .align 2 + 862 .LC6: + 863 0000 54582053 .ascii "TX SET MEM NO\000" + 863 4554204D + 863 454D204E + 863 4F00 + 864 .section .text.interface_set_default,"ax",%progbits + 865 .align 1 + 866 .p2align 2,,3 + 867 .global interface_set_default + 868 .syntax unified + 869 .thumb + 870 .thumb_func + 871 .fpu fpv4-sp-d16 + 873 interface_set_default: + 874 @ args = 0, pretend = 0, frame = 0 + 875 @ frame_needed = 0, uses_anonymous_args = 0 + 876 @ link register save eliminated. + 877 0000 094B ldr r3, .L126 + 878 0002 07CB ldmia r3!, {r0, r1, r2} + 879 0004 30B4 push {r4, r5} + ARM GAS /tmp/ccraf9Ev.s page 16 + + + 880 0006 094C ldr r4, .L126+4 + 881 0008 1B88 ldrh r3, [r3] @ unaligned + 882 000a A381 strh r3, [r4, #12] @ unaligned + 883 000c 084B ldr r3, .L126+8 + 884 000e 6160 str r1, [r4, #4] @ unaligned + 885 0010 A260 str r2, [r4, #8] @ unaligned + 886 0012 4FF48061 mov r1, #1024 + 887 0016 074A ldr r2, .L126+12 + 888 0018 074D ldr r5, .L126+16 + 889 001a 1980 strh r1, [r3] @ movhi + 890 001c 0023 movs r3, #0 + 891 001e 1370 strb r3, [r2] + 892 0020 2060 str r0, [r4] @ unaligned + 893 0022 2B70 strb r3, [r5] + 894 0024 30BC pop {r4, r5} + 895 0026 7047 bx lr + 896 .L127: + 897 .align 2 + 898 .L126: + 899 0028 00000000 .word .LC6 + 900 002c 00000000 .word tabstring + 901 0030 00000000 .word .LANCHOR5 + 902 0034 00000000 .word .LANCHOR3 + 903 0038 00000000 .word .LANCHOR2 + 905 .section .text.display_set_position,"ax",%progbits + 906 .align 1 + 907 .p2align 2,,3 + 908 .global display_set_position + 909 .syntax unified + 910 .thumb + 911 .thumb_func + 912 .fpu fpv4-sp-d16 + 914 display_set_position: + 915 @ args = 0, pretend = 0, frame = 0 + 916 @ frame_needed = 0, uses_anonymous_args = 0 + 917 0000 38B5 push {r3, r4, r5, lr} + 918 0002 064C ldr r4, .L130 + 919 0004 064D ldr r5, .L130+4 + 920 0006 2288 ldrh r2, [r4] + 921 0008 0346 mov r3, r0 + 922 000a A818 adds r0, r5, r2 + 923 000c 0A46 mov r2, r1 + 924 000e 0549 ldr r1, .L130+8 + 925 0010 FFF7FEFF bl sprintf + 926 0014 2388 ldrh r3, [r4] + 927 0016 1844 add r0, r0, r3 + 928 0018 2080 strh r0, [r4] @ movhi + 929 001a 38BD pop {r3, r4, r5, pc} + 930 .L131: + 931 .align 2 + 932 .L130: + 933 001c 00000000 .word uart_tx_buf_in_idx + 934 0020 00000000 .word uart_tx_buf + 935 0024 00000000 .word .LC4 + 937 .section .text.display_update_item,"ax",%progbits + 938 .align 1 + 939 .p2align 2,,3 + ARM GAS /tmp/ccraf9Ev.s page 17 + + + 940 .global display_update_item + 941 .syntax unified + 942 .thumb + 943 .thumb_func + 944 .fpu fpv4-sp-d16 + 946 display_update_item: + 947 @ args = 0, pretend = 0, frame = 0 + 948 @ frame_needed = 0, uses_anonymous_args = 0 + 949 0000 38B5 push {r3, r4, r5, lr} + 950 0002 0E4C ldr r4, .L134 + 951 0004 0E4D ldr r5, .L134+4 + 952 0006 2088 ldrh r0, [r4] + 953 0008 0E49 ldr r1, .L134+8 + 954 000a 0023 movs r3, #0 + 955 000c 1A46 mov r2, r3 + 956 000e 2844 add r0, r0, r5 + 957 0010 FFF7FEFF bl sprintf + 958 0014 2188 ldrh r1, [r4] + 959 0016 0C4B ldr r3, .L134+12 + 960 0018 0631 adds r1, r1, #6 + 961 001a 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 962 001c 0B4B ldr r3, .L134+16 + 963 001e 89B2 uxth r1, r1 + 964 0020 6818 adds r0, r5, r1 + 965 0022 2180 strh r1, [r4] @ movhi + 966 0024 3821 movs r1, #56 + 967 0026 01FB0233 mla r3, r1, r2, r3 + 968 002a 0133 adds r3, r3, #1 + 969 002c 0849 ldr r1, .L134+20 + 970 002e FFF7FEFF bl sprintf + 971 0032 2388 ldrh r3, [r4] + 972 0034 1844 add r0, r0, r3 + 973 0036 2080 strh r0, [r4] @ movhi + 974 0038 38BD pop {r3, r4, r5, pc} + 975 .L135: + 976 003a 00BF .align 2 + 977 .L134: + 978 003c 00000000 .word uart_tx_buf_in_idx + 979 0040 00000000 .word uart_tx_buf + 980 0044 00000000 .word .LC4 + 981 0048 00000000 .word .LANCHOR2 + 982 004c 00000000 .word .LANCHOR0 + 983 0050 0C000000 .word .LC5 + 985 .section .rodata.display_update_state.str1.4,"aMS",%progbits,1 + 986 .align 2 + 987 .LC7: + 988 0000 3E00 .ascii ">\000" + 989 0002 0000 .align 2 + 990 .LC8: + 991 0004 2000 .ascii " \000" + 992 .section .text.display_update_state,"ax",%progbits + 993 .align 1 + 994 .p2align 2,,3 + 995 .global display_update_state + 996 .syntax unified + 997 .thumb + 998 .thumb_func + ARM GAS /tmp/ccraf9Ev.s page 18 + + + 999 .fpu fpv4-sp-d16 + 1001 display_update_state: + 1002 @ args = 0, pretend = 0, frame = 8 + 1003 @ frame_needed = 0, uses_anonymous_args = 0 + 1004 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1005 0004 DFF80091 ldr r9, .L157+24 + 1006 0008 99F80030 ldrb r3, [r9] @ zero_extendqisi2 + 1007 000c 83B0 sub sp, sp, #12 + 1008 000e 002B cmp r3, #0 + 1009 0010 6BD0 beq .L136 + 1010 0012 0025 movs r5, #0 + 1011 0014 364F ldr r7, .L157 + 1012 0016 DFF8F480 ldr r8, .L157+28 + 1013 001a 2C46 mov r4, r5 + 1014 001c 0AE0 b .L137 + 1015 .L156: + 1016 001e FF2B cmp r3, #255 + 1017 0020 17D0 beq .L139 + 1018 .L140: + 1019 0022 2046 mov r0, r4 + 1020 0024 FFF7FEFF bl reset_changed + 1021 .L138: + 1022 0028 99F80030 ldrb r3, [r9] @ zero_extendqisi2 + 1023 002c 0135 adds r5, r5, #1 + 1024 002e ECB2 uxtb r4, r5 + 1025 0030 A342 cmp r3, r4 + 1026 0032 5AD9 bls .L136 + 1027 .L137: + 1028 0034 2046 mov r0, r4 + 1029 0036 FFF7FEFF bl get_changed + 1030 003a 0028 cmp r0, #0 + 1031 003c F4D0 beq .L138 + 1032 003e 2D4A ldr r2, .L157+4 + 1033 0040 C4EBC403 rsb r3, r4, r4, lsl #3 + 1034 0044 1278 ldrb r2, [r2] @ zero_extendqisi2 + 1035 0046 17F83330 ldrb r3, [r7, r3, lsl #3] @ zero_extendqisi2 + 1036 004a 9A42 cmp r2, r3 + 1037 004c 4FEAC406 lsl r6, r4, #3 + 1038 0050 E5D1 bne .L156 + 1039 .L139: + 1040 0052 311B subs r1, r6, r4 + 1041 0054 07EBC10A add r10, r7, r1, lsl #3 + 1042 0058 CB00 lsls r3, r1, #3 + 1043 005a 0193 str r3, [sp, #4] + 1044 005c 9AF80F30 ldrb r3, [r10, #15] @ zero_extendqisi2 + 1045 0060 052B cmp r3, #5 + 1046 0062 DED0 beq .L140 + 1047 0064 B8F80000 ldrh r0, [r8] + 1048 0068 DFF8A4B0 ldr fp, .L157+32 + 1049 006c 9AF81220 ldrb r2, [r10, #18] @ zero_extendqisi2 + 1050 0070 9AF81130 ldrb r3, [r10, #17] @ zero_extendqisi2 + 1051 0074 2049 ldr r1, .L157+8 + 1052 0076 5844 add r0, r0, fp + 1053 0078 FFF7FEFF bl sprintf + 1054 007c B8F80030 ldrh r3, [r8] + 1055 0080 1844 add r0, r0, r3 + 1056 0082 019B ldr r3, [sp, #4] + ARM GAS /tmp/ccraf9Ev.s page 19 + + + 1057 0084 80B2 uxth r0, r0 + 1058 0086 03F12101 add r1, r3, #33 + 1059 008a A8F80000 strh r0, [r8] @ movhi + 1060 008e 3944 add r1, r1, r7 + 1061 0090 5844 add r0, r0, fp + 1062 0092 FFF7FEFF bl sprintf + 1063 0096 B8F80020 ldrh r2, [r8] + 1064 009a 9AF80F30 ldrb r3, [r10, #15] @ zero_extendqisi2 + 1065 009e 1044 add r0, r0, r2 + 1066 00a0 80B2 uxth r0, r0 + 1067 00a2 042B cmp r3, #4 + 1068 00a4 A8F80000 strh r0, [r8] @ movhi + 1069 00a8 0BD0 beq .L141 + 1070 00aa 144B ldr r3, .L157+12 + 1071 00ac 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1072 00ae A342 cmp r3, r4 + 1073 00b0 0CBF ite eq + 1074 00b2 134B ldreq r3, .L157+16 + 1075 00b4 134B ldrne r3, .L157+20 + 1076 00b6 1B88 ldrh r3, [r3] @ unaligned + 1077 00b8 2BF80030 strh r3, [fp, r0] @ unaligned + 1078 00bc 0130 adds r0, r0, #1 + 1079 00be A8F80000 strh r0, [r8] @ movhi + 1080 .L141: + 1081 00c2 361B subs r6, r6, r4 + 1082 00c4 07EBC606 add r6, r7, r6, lsl #3 + 1083 00c8 2046 mov r0, r4 + 1084 00ca 736B ldr r3, [r6, #52] + 1085 00cc 9847 blx r3 + 1086 00ce 0199 ldr r1, [sp, #4] + 1087 00d0 B8F80000 ldrh r0, [r8] + 1088 00d4 2531 adds r1, r1, #37 + 1089 00d6 3944 add r1, r1, r7 + 1090 00d8 5844 add r0, r0, fp + 1091 00da FFF7FEFF bl sprintf + 1092 00de B8F80030 ldrh r3, [r8] + 1093 00e2 1844 add r0, r0, r3 + 1094 00e4 A8F80000 strh r0, [r8] @ movhi + 1095 00e8 9BE7 b .L140 + 1096 .L136: + 1097 00ea 03B0 add sp, sp, #12 + 1098 @ sp needed + 1099 00ec BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1100 .L158: + 1101 .align 2 + 1102 .L157: + 1103 00f0 00000000 .word .LANCHOR0 + 1104 00f4 00000000 .word .LANCHOR3 + 1105 00f8 00000000 .word .LC4 + 1106 00fc 00000000 .word .LANCHOR2 + 1107 0100 00000000 .word .LC7 + 1108 0104 04000000 .word .LC8 + 1109 0108 00000000 .word .LANCHOR4 + 1110 010c 00000000 .word uart_tx_buf_in_idx + 1111 0110 00000000 .word uart_tx_buf + 1113 .section .text.integer_editor_up,"ax",%progbits + 1114 .align 1 + ARM GAS /tmp/ccraf9Ev.s page 20 + + + 1115 .p2align 2,,3 + 1116 .global integer_editor_up + 1117 .syntax unified + 1118 .thumb + 1119 .thumb_func + 1120 .fpu fpv4-sp-d16 + 1122 integer_editor_up: + 1123 @ args = 0, pretend = 0, frame = 0 + 1124 @ frame_needed = 0, uses_anonymous_args = 0 + 1125 @ link register save eliminated. + 1126 0000 1149 ldr r1, .L164 + 1127 0002 C0EBC003 rsb r3, r0, r0, lsl #3 + 1128 0006 01EBC303 add r3, r1, r3, lsl #3 + 1129 000a 30B4 push {r4, r5} + 1130 000c DC6A ldr r4, [r3, #44] + 1131 000e 5D69 ldr r5, [r3, #20] + 1132 0010 2268 ldr r2, [r4] + 1133 0012 2A44 add r2, r2, r5 + 1134 0014 2260 str r2, [r4] + 1135 0016 9D69 ldr r5, [r3, #24] + 1136 0018 AA42 cmp r2, r5 + 1137 001a 4FEAC00C lsl ip, r0, #3 + 1138 001e 02D3 bcc .L160 + 1139 0020 DB69 ldr r3, [r3, #28] + 1140 0022 9A42 cmp r2, r3 + 1141 0024 07D9 bls .L161 + 1142 .L160: + 1143 0026 ACEB000C sub ip, ip, r0 + 1144 002a 01EBCC01 add r1, r1, ip, lsl #3 + 1145 002e 91F82030 ldrb r3, [r1, #32] @ zero_extendqisi2 + 1146 0032 1BB1 cbz r3, .L162 + 1147 0034 2560 str r5, [r4] + 1148 .L161: + 1149 0036 30BC pop {r4, r5} + 1150 0038 FFF7FEBF b set_changed + 1151 .L162: + 1152 003c CB69 ldr r3, [r1, #28] + 1153 003e 2360 str r3, [r4] + 1154 0040 30BC pop {r4, r5} + 1155 0042 FFF7FEBF b set_changed + 1156 .L165: + 1157 0046 00BF .align 2 + 1158 .L164: + 1159 0048 00000000 .word .LANCHOR0 + 1161 .section .text.integer_editor_down,"ax",%progbits + 1162 .align 1 + 1163 .p2align 2,,3 + 1164 .global integer_editor_down + 1165 .syntax unified + 1166 .thumb + 1167 .thumb_func + 1168 .fpu fpv4-sp-d16 + 1170 integer_editor_down: + 1171 @ args = 0, pretend = 0, frame = 0 + 1172 @ frame_needed = 0, uses_anonymous_args = 0 + 1173 @ link register save eliminated. + 1174 0000 1149 ldr r1, .L171 + ARM GAS /tmp/ccraf9Ev.s page 21 + + + 1175 0002 C0EBC003 rsb r3, r0, r0, lsl #3 + 1176 0006 01EBC303 add r3, r1, r3, lsl #3 + 1177 000a 30B4 push {r4, r5} + 1178 000c DC6A ldr r4, [r3, #44] + 1179 000e 5D69 ldr r5, [r3, #20] + 1180 0010 2268 ldr r2, [r4] + 1181 0012 521B subs r2, r2, r5 + 1182 0014 2260 str r2, [r4] + 1183 0016 9D69 ldr r5, [r3, #24] + 1184 0018 AA42 cmp r2, r5 + 1185 001a 4FEAC00C lsl ip, r0, #3 + 1186 001e 02D3 bcc .L167 + 1187 0020 DB69 ldr r3, [r3, #28] + 1188 0022 9A42 cmp r2, r3 + 1189 0024 08D9 bls .L168 + 1190 .L167: + 1191 0026 ACEB000C sub ip, ip, r0 + 1192 002a 01EBCC01 add r1, r1, ip, lsl #3 + 1193 002e 91F82030 ldrb r3, [r1, #32] @ zero_extendqisi2 + 1194 0032 23B1 cbz r3, .L169 + 1195 0034 CB69 ldr r3, [r1, #28] + 1196 0036 2360 str r3, [r4] + 1197 .L168: + 1198 0038 30BC pop {r4, r5} + 1199 003a FFF7FEBF b set_changed + 1200 .L169: + 1201 003e 2560 str r5, [r4] + 1202 0040 30BC pop {r4, r5} + 1203 0042 FFF7FEBF b set_changed + 1204 .L172: + 1205 0046 00BF .align 2 + 1206 .L171: + 1207 0048 00000000 .word .LANCHOR0 + 1209 .section .text.list_editor_down,"ax",%progbits + 1210 .align 1 + 1211 .p2align 2,,3 + 1212 .global list_editor_down + 1213 .syntax unified + 1214 .thumb + 1215 .thumb_func + 1216 .fpu fpv4-sp-d16 + 1218 list_editor_down: + 1219 @ args = 0, pretend = 0, frame = 0 + 1220 @ frame_needed = 0, uses_anonymous_args = 0 + 1221 @ link register save eliminated. + 1222 0000 7047 bx lr + 1224 0002 00BF .section .rodata.tabs_update.str1.4,"aMS",%progbits,1 + 1225 .align 2 + 1226 .LC9: + 1227 0000 0700 .ascii "\007\000" + 1228 .section .text.tabs_update,"ax",%progbits + 1229 .align 1 + 1230 .p2align 2,,3 + 1231 .global tabs_update + 1232 .syntax unified + 1233 .thumb + 1234 .thumb_func + ARM GAS /tmp/ccraf9Ev.s page 22 + + + 1235 .fpu fpv4-sp-d16 + 1237 tabs_update: + 1238 @ args = 0, pretend = 0, frame = 0 + 1239 @ frame_needed = 0, uses_anonymous_args = 0 + 1240 @ link register save eliminated. + 1241 0000 054B ldr r3, .L175 + 1242 0002 0649 ldr r1, .L175+4 + 1243 0004 1A88 ldrh r2, [r3] + 1244 0006 0648 ldr r0, .L175+8 + 1245 0008 B1F800C0 ldrh ip, [r1] @ unaligned + 1246 000c 22F800C0 strh ip, [r2, r0] @ unaligned + 1247 0010 511C adds r1, r2, #1 + 1248 0012 1980 strh r1, [r3] @ movhi + 1249 0014 7047 bx lr + 1250 .L176: + 1251 0016 00BF .align 2 + 1252 .L175: + 1253 0018 00000000 .word uart_tx_buf_in_idx + 1254 001c 00000000 .word .LC9 + 1255 0020 00000000 .word uart_tx_buf + 1257 .section .rodata.tab_up.str1.4,"aMS",%progbits,1 + 1258 .align 2 + 1259 .LC10: + 1260 0000 0C00 .ascii "\014\000" + 1261 0002 0000 .align 2 + 1262 .LC11: + 1263 0004 1B5B2564 .ascii "\033[%db\000" + 1263 6200 + 1264 000a 0000 .align 2 + 1265 .LC12: + 1266 000c 1B5B3630 .ascii "\033[600,5q\000" + 1266 302C3571 + 1266 00 + 1267 .section .text.tab_up,"ax",%progbits + 1268 .align 1 + 1269 .p2align 2,,3 + 1270 .global tab_up + 1271 .syntax unified + 1272 .thumb + 1273 .thumb_func + 1274 .fpu fpv4-sp-d16 + 1276 tab_up: + 1277 @ args = 0, pretend = 0, frame = 0 + 1278 @ frame_needed = 0, uses_anonymous_args = 0 + 1279 0000 70B5 push {r4, r5, r6, lr} + 1280 0002 0328 cmp r0, #3 + 1281 0004 12D8 bhi .L177 + 1282 0006 DFE800F0 tbb [pc, r0] + 1283 .L180: + 1284 000a 54 .byte (.L183-.L180)/2 + 1285 000b 1E .byte (.L182-.L180)/2 + 1286 000c 12 .byte (.L181-.L180)/2 + 1287 000d 02 .byte (.L179-.L180)/2 + 1288 .p2align 1 + 1289 .L179: + 1290 000e FFF7FEFF bl encoder_decrement + 1291 0012 2B49 ldr r1, .L188 + ARM GAS /tmp/ccraf9Ev.s page 23 + + + 1292 0014 2B4B ldr r3, .L188+4 + 1293 0016 0A88 ldrh r2, [r1] + 1294 0018 2B4D ldr r5, .L188+8 + 1295 001a 02F10800 add r0, r2, #8 + 1296 001e 0880 strh r0, [r1] @ movhi + 1297 0020 03CB ldmia r3!, {r0, r1} + 1298 0022 5419 adds r4, r2, r5 + 1299 0024 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1300 0026 5051 str r0, [r2, r5] @ unaligned + 1301 0028 6160 str r1, [r4, #4] @ unaligned + 1302 002a 2372 strb r3, [r4, #8] + 1303 .L177: + 1304 002c 70BD pop {r4, r5, r6, pc} + 1305 .L181: + 1306 002e 244C ldr r4, .L188 + 1307 0030 2548 ldr r0, .L188+8 + 1308 0032 2388 ldrh r3, [r4] + 1309 0034 2549 ldr r1, .L188+12 + 1310 0036 1844 add r0, r0, r3 + 1311 0038 3222 movs r2, #50 + 1312 003a FFF7FEFF bl sprintf + 1313 003e 2388 ldrh r3, [r4] + 1314 0040 0533 adds r3, r3, #5 + 1315 0042 2380 strh r3, [r4] @ movhi + 1316 0044 70BD pop {r4, r5, r6, pc} + 1317 .L182: + 1318 0046 2249 ldr r1, .L188+16 + 1319 0048 224D ldr r5, .L188+20 + 1320 004a 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 1321 004c 224A ldr r2, .L188+24 + 1322 004e 2878 ldrb r0, [r5] @ zero_extendqisi2 + 1323 0050 D054 strb r0, [r2, r3] + 1324 0052 0133 adds r3, r3, #1 + 1325 0054 DBB2 uxtb r3, r3 + 1326 0056 012B cmp r3, #1 + 1327 0058 88BF it hi + 1328 005a 0023 movhi r3, #0 + 1329 005c 184C ldr r4, .L188 + 1330 005e D25C ldrb r2, [r2, r3] @ zero_extendqisi2 + 1331 0060 0B70 strb r3, [r1] + 1332 0062 2A70 strb r2, [r5] + 1333 0064 2388 ldrh r3, [r4] + 1334 0066 1D49 ldr r1, .L188+28 + 1335 0068 1D4A ldr r2, .L188+32 + 1336 006a 174E ldr r6, .L188+8 + 1337 006c 1288 ldrh r2, [r2] @ unaligned + 1338 006e 9A53 strh r2, [r3, r6] @ unaligned + 1339 0070 4FF6FF70 movw r0, #65535 + 1340 0074 0880 strh r0, [r1] @ movhi + 1341 0076 581C adds r0, r3, #1 + 1342 0078 80B2 uxth r0, r0 + 1343 007a 0023 movs r3, #0 + 1344 007c 2080 strh r0, [r4] @ movhi + 1345 007e 1A46 mov r2, r3 + 1346 0080 1849 ldr r1, .L188+36 + 1347 0082 3044 add r0, r0, r6 + 1348 0084 FFF7FEFF bl sprintf + ARM GAS /tmp/ccraf9Ev.s page 24 + + + 1349 0088 2388 ldrh r3, [r4] + 1350 008a 2A78 ldrb r2, [r5] @ zero_extendqisi2 + 1351 008c 1649 ldr r1, .L188+40 + 1352 008e 0633 adds r3, r3, #6 + 1353 0090 9BB2 uxth r3, r3 + 1354 0092 F018 adds r0, r6, r3 + 1355 0094 2380 strh r3, [r4] @ movhi + 1356 0096 3823 movs r3, #56 + 1357 0098 03FB0213 mla r3, r3, r2, r1 + 1358 009c 0133 adds r3, r3, #1 + 1359 009e 1349 ldr r1, .L188+44 + 1360 00a0 FFF7FEFF bl sprintf + 1361 00a4 2388 ldrh r3, [r4] + 1362 00a6 1844 add r0, r0, r3 + 1363 00a8 2080 strh r0, [r4] @ movhi + 1364 00aa BDE87040 pop {r4, r5, r6, lr} + 1365 00ae FFF7FEBF b display_update_state + 1366 .L183: + 1367 00b2 FFF7FEFF bl stop_receive + 1368 00b6 BDE87040 pop {r4, r5, r6, lr} + 1369 00ba FFF7FEBF b start_transmit + 1370 .L189: + 1371 00be 00BF .align 2 + 1372 .L188: + 1373 00c0 00000000 .word uart_tx_buf_in_idx + 1374 00c4 0C000000 .word .LC12 + 1375 00c8 00000000 .word uart_tx_buf + 1376 00cc 04000000 .word .LC11 + 1377 00d0 00000000 .word .LANCHOR3 + 1378 00d4 00000000 .word .LANCHOR2 + 1379 00d8 00000000 .word .LANCHOR5 + 1380 00dc 00000000 .word state_changed + 1381 00e0 00000000 .word .LC10 + 1382 00e4 00000000 .word .LC4 + 1383 00e8 00000000 .word .LANCHOR0 + 1384 00ec 0C000000 .word .LC5 + 1386 .section .text.decode_cmd,"ax",%progbits + 1387 .align 1 + 1388 .p2align 2,,3 + 1389 .global decode_cmd + 1390 .syntax unified + 1391 .thumb + 1392 .thumb_func + 1393 .fpu fpv4-sp-d16 + 1395 decode_cmd: + 1396 @ args = 0, pretend = 0, frame = 0 + 1397 @ frame_needed = 0, uses_anonymous_args = 0 + 1398 0000 2B38 subs r0, r0, #43 + 1399 0002 38B5 push {r3, r4, r5, lr} + 1400 0004 3828 cmp r0, #56 + 1401 0006 2DD8 bhi .L190 + 1402 0008 DFE800F0 tbb [pc, r0] + 1403 .L193: + 1404 000c 39 .byte (.L205-.L193)/2 + 1405 000d 2C .byte (.L190-.L193)/2 + 1406 000e 3C .byte (.L204-.L193)/2 + 1407 000f 2C .byte (.L190-.L193)/2 + ARM GAS /tmp/ccraf9Ev.s page 25 + + + 1408 0010 2C .byte (.L190-.L193)/2 + 1409 0011 2C .byte (.L190-.L193)/2 + 1410 0012 2C .byte (.L190-.L193)/2 + 1411 0013 2C .byte (.L190-.L193)/2 + 1412 0014 2C .byte (.L190-.L193)/2 + 1413 0015 2C .byte (.L190-.L193)/2 + 1414 0016 2C .byte (.L190-.L193)/2 + 1415 0017 2C .byte (.L190-.L193)/2 + 1416 0018 2C .byte (.L190-.L193)/2 + 1417 0019 2C .byte (.L190-.L193)/2 + 1418 001a 2C .byte (.L190-.L193)/2 + 1419 001b 2C .byte (.L190-.L193)/2 + 1420 001c 2C .byte (.L190-.L193)/2 + 1421 001d 2C .byte (.L190-.L193)/2 + 1422 001e 2C .byte (.L190-.L193)/2 + 1423 001f 2C .byte (.L190-.L193)/2 + 1424 0020 2C .byte (.L190-.L193)/2 + 1425 0021 2C .byte (.L190-.L193)/2 + 1426 0022 3F .byte (.L203-.L193)/2 + 1427 0023 44 .byte (.L202-.L193)/2 + 1428 0024 49 .byte (.L201-.L193)/2 + 1429 0025 4E .byte (.L200-.L193)/2 + 1430 0026 1F .byte (.L199-.L193)/2 + 1431 0027 53 .byte (.L198-.L193)/2 + 1432 0028 65 .byte (.L197-.L193)/2 + 1433 0029 75 .byte (.L196-.L193)/2 + 1434 002a 1D .byte (.L195-.L193)/2 + 1435 002b 2C .byte (.L190-.L193)/2 + 1436 002c 2C .byte (.L190-.L193)/2 + 1437 002d 2C .byte (.L190-.L193)/2 + 1438 002e 2C .byte (.L190-.L193)/2 + 1439 002f 2C .byte (.L190-.L193)/2 + 1440 0030 2C .byte (.L190-.L193)/2 + 1441 0031 2C .byte (.L190-.L193)/2 + 1442 0032 2C .byte (.L190-.L193)/2 + 1443 0033 2C .byte (.L190-.L193)/2 + 1444 0034 2C .byte (.L190-.L193)/2 + 1445 0035 2C .byte (.L190-.L193)/2 + 1446 0036 2C .byte (.L190-.L193)/2 + 1447 0037 2C .byte (.L190-.L193)/2 + 1448 0038 2C .byte (.L190-.L193)/2 + 1449 0039 2C .byte (.L190-.L193)/2 + 1450 003a 2C .byte (.L190-.L193)/2 + 1451 003b 2C .byte (.L190-.L193)/2 + 1452 003c 2C .byte (.L190-.L193)/2 + 1453 003d 2C .byte (.L190-.L193)/2 + 1454 003e 2C .byte (.L190-.L193)/2 + 1455 003f 2C .byte (.L190-.L193)/2 + 1456 0040 2C .byte (.L190-.L193)/2 + 1457 0041 2C .byte (.L190-.L193)/2 + 1458 0042 78 .byte (.L194-.L193)/2 + 1459 0043 2C .byte (.L190-.L193)/2 + 1460 0044 2D .byte (.L192-.L193)/2 + 1461 0045 00 .p2align 1 + 1462 .L195: + 1463 0046 FFF7FEFF bl menu_item_up + 1464 .L199: + ARM GAS /tmp/ccraf9Ev.s page 26 + + + 1465 004a 2F49 ldr r1, .L209 + 1466 004c 2F4B ldr r3, .L209+4 + 1467 004e 0A88 ldrh r2, [r1] + 1468 0050 2F4D ldr r5, .L209+8 + 1469 0052 02F10800 add r0, r2, #8 + 1470 0056 0880 strh r0, [r1] @ movhi + 1471 0058 03CB ldmia r3!, {r0, r1} + 1472 005a 5419 adds r4, r2, r5 + 1473 005c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1474 005e 5051 str r0, [r2, r5] @ unaligned + 1475 0060 6160 str r1, [r4, #4] @ unaligned + 1476 0062 2372 strb r3, [r4, #8] + 1477 .L190: + 1478 0064 38BD pop {r3, r4, r5, pc} + 1479 .L192: + 1480 0066 284C ldr r4, .L209 + 1481 0068 2948 ldr r0, .L209+8 + 1482 006a 2388 ldrh r3, [r4] + 1483 006c 2949 ldr r1, .L209+12 + 1484 006e 1844 add r0, r0, r3 + 1485 0070 0022 movs r2, #0 + 1486 0072 FFF7FEFF bl sprintf + 1487 0076 2388 ldrh r3, [r4] + 1488 0078 0433 adds r3, r3, #4 + 1489 007a 2380 strh r3, [r4] @ movhi + 1490 007c 38BD pop {r3, r4, r5, pc} + 1491 .L205: + 1492 007e FFF7FEFF bl encoder_increment + 1493 0082 E2E7 b .L199 + 1494 .L204: + 1495 0084 FFF7FEFF bl encoder_decrement + 1496 0088 DFE7 b .L199 + 1497 .L203: + 1498 008a BDE83840 pop {r3, r4, r5, lr} + 1499 008e 0020 movs r0, #0 + 1500 0090 FFF7FEBF b tab_up + 1501 .L202: + 1502 0094 BDE83840 pop {r3, r4, r5, lr} + 1503 0098 0120 movs r0, #1 + 1504 009a FFF7FEBF b tab_up + 1505 .L201: + 1506 009e BDE83840 pop {r3, r4, r5, lr} + 1507 00a2 0220 movs r0, #2 + 1508 00a4 FFF7FEBF b tab_up + 1509 .L200: + 1510 00a8 BDE83840 pop {r3, r4, r5, lr} + 1511 00ac 0320 movs r0, #3 + 1512 00ae FFF7FEBF b tab_up + 1513 .L198: + 1514 00b2 194B ldr r3, .L209+16 + 1515 00b4 194A ldr r2, .L209+20 + 1516 00b6 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1517 00b8 C3EBC303 rsb r3, r3, r3, lsl #3 + 1518 00bc 02EBC302 add r2, r2, r3, lsl #3 + 1519 00c0 5369 ldr r3, [r2, #20] + 1520 00c2 D169 ldr r1, [r2, #28] + 1521 00c4 03EB8303 add r3, r3, r3, lsl #2 + ARM GAS /tmp/ccraf9Ev.s page 27 + + + 1522 00c8 B1EB430F cmp r1, r3, lsl #1 + 1523 00cc 4FEA4300 lsl r0, r3, #1 + 1524 00d0 BBD9 bls .L199 + 1525 00d2 5061 str r0, [r2, #20] + 1526 00d4 B9E7 b .L199 + 1527 .L197: + 1528 00d6 104B ldr r3, .L209+16 + 1529 00d8 104A ldr r2, .L209+20 + 1530 00da 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1531 00dc C3EBC303 rsb r3, r3, r3, lsl #3 + 1532 00e0 02EBC303 add r3, r2, r3, lsl #3 + 1533 00e4 5A69 ldr r2, [r3, #20] + 1534 00e6 092A cmp r2, #9 + 1535 00e8 AFD9 bls .L199 + 1536 00ea 0D49 ldr r1, .L209+24 + 1537 00ec A1FB0212 umull r1, r2, r1, r2 + 1538 00f0 D208 lsrs r2, r2, #3 + 1539 00f2 5A61 str r2, [r3, #20] + 1540 00f4 A9E7 b .L199 + 1541 .L196: + 1542 00f6 FFF7FEFF bl menu_item_down + 1543 00fa A6E7 b .L199 + 1544 .L194: + 1545 00fc FFF7FEFF bl stop_transmit + 1546 0100 BDE83840 pop {r3, r4, r5, lr} + 1547 0104 FFF7FEBF b start_receive + 1548 .L210: + 1549 .align 2 + 1550 .L209: + 1551 0108 00000000 .word uart_tx_buf_in_idx + 1552 010c 0C000000 .word .LC12 + 1553 0110 00000000 .word uart_tx_buf + 1554 0114 04000000 .word .LC11 + 1555 0118 00000000 .word .LANCHOR2 + 1556 011c 00000000 .word .LANCHOR0 + 1557 0120 CDCCCCCC .word -858993459 + 1559 .section .text.tab_down,"ax",%progbits + 1560 .align 1 + 1561 .p2align 2,,3 + 1562 .global tab_down + 1563 .syntax unified + 1564 .thumb + 1565 .thumb_func + 1566 .fpu fpv4-sp-d16 + 1568 tab_down: + 1569 @ args = 0, pretend = 0, frame = 0 + 1570 @ frame_needed = 0, uses_anonymous_args = 0 + 1571 0000 10B5 push {r4, lr} + 1572 0002 68B1 cbz r0, .L212 + 1573 0004 0228 cmp r0, #2 + 1574 0006 0AD1 bne .L211 + 1575 0008 084C ldr r4, .L216 + 1576 000a 0948 ldr r0, .L216+4 + 1577 000c 2388 ldrh r3, [r4] + 1578 000e 0949 ldr r1, .L216+8 + 1579 0010 1844 add r0, r0, r3 + 1580 0012 0022 movs r2, #0 + ARM GAS /tmp/ccraf9Ev.s page 28 + + + 1581 0014 FFF7FEFF bl sprintf + 1582 0018 2388 ldrh r3, [r4] + 1583 001a 0433 adds r3, r3, #4 + 1584 001c 2380 strh r3, [r4] @ movhi + 1585 .L211: + 1586 001e 10BD pop {r4, pc} + 1587 .L212: + 1588 0020 FFF7FEFF bl stop_transmit + 1589 0024 BDE81040 pop {r4, lr} + 1590 0028 FFF7FEBF b start_receive + 1591 .L217: + 1592 .align 2 + 1593 .L216: + 1594 002c 00000000 .word uart_tx_buf_in_idx + 1595 0030 00000000 .word uart_tx_buf + 1596 0034 04000000 .word .LC11 + 1598 .section .rodata.display_init.str1.4,"aMS",%progbits,1 + 1599 .align 2 + 1600 .LC13: + 1601 0000 1B5B3132 .ascii "\033[128,127,0,0,0,0,0c\000" + 1601 382C3132 + 1601 372C302C + 1601 302C302C + 1601 302C3063 + 1602 0015 000000 .align 2 + 1603 .LC14: + 1604 0018 1B5B3132 .ascii "\033[129,127,127,0,0,0,0c\000" + 1604 392C3132 + 1604 372C3132 + 1604 372C302C + 1604 302C302C + 1605 002f 00 .align 2 + 1606 .LC15: + 1607 0030 1B5B3133 .ascii "\033[130,127,127,127,0,0,0c\000" + 1607 302C3132 + 1607 372C3132 + 1607 372C3132 + 1607 372C302C + 1608 0049 000000 .align 2 + 1609 .LC16: + 1610 004c 1B5B3133 .ascii "\033[131,127,127,127,127,0,0c\000" + 1610 312C3132 + 1610 372C3132 + 1610 372C3132 + 1610 372C3132 + 1611 0067 00 .align 2 + 1612 .LC17: + 1613 0068 1B5B3133 .ascii "\033[132,127,127,127,127,127,0c\000" + 1613 322C3132 + 1613 372C3132 + 1613 372C3132 + 1613 372C3132 + 1614 0085 000000 .align 2 + 1615 .LC18: + 1616 0088 1B5B3133 .ascii "\033[133,127,127,127,127,127,127c\000" + 1616 332C3132 + 1616 372C3132 + ARM GAS /tmp/ccraf9Ev.s page 29 + + + 1616 372C3132 + 1616 372C3132 + 1617 00a7 00 .align 2 + 1618 .LC19: + 1619 00a8 1B5B2564 .ascii "\033[%ds\000" + 1619 7300 + 1620 00ae 0000 .align 2 + 1621 .LC20: + 1622 00b0 1B5B3135 .ascii "\033[150,100q\000" + 1622 302C3130 + 1622 307100 + 1623 .section .text.display_init,"ax",%progbits + 1624 .align 1 + 1625 .p2align 2,,3 + 1626 .global display_init + 1627 .syntax unified + 1628 .thumb + 1629 .thumb_func + 1630 .fpu fpv4-sp-d16 + 1632 display_init: + 1633 @ args = 0, pretend = 0, frame = 40 + 1634 @ frame_needed = 0, uses_anonymous_args = 0 + 1635 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 1636 0004 6B4E ldr r6, .L220 + 1637 0006 6C4C ldr r4, .L220+4 + 1638 0008 3388 ldrh r3, [r6] + 1639 000a 6C48 ldr r0, .L220+8 + 1640 000c DFF8CC91 ldr r9, .L220+40 + 1641 0010 DFF8CCC1 ldr ip, .L220+44 + 1642 0014 6A4E ldr r6, .L220+12 + 1643 0016 8BB0 sub sp, sp, #44 + 1644 0018 1919 adds r1, r3, r4 + 1645 001a 0693 str r3, [sp, #24] + 1646 001c 1433 adds r3, r3, #20 + 1647 001e 9FB2 uxth r7, r3 + 1648 0020 07F11603 add r3, r7, #22 + 1649 0024 1FFA83FE uxth lr, r3 + 1650 0028 0EF11803 add r3, lr, #24 + 1651 002c 0EEB040B add fp, lr, r4 + 1652 0030 CDF804E0 str lr, [sp, #4] + 1653 0034 1FFA83FE uxth lr, r3 + 1654 0038 7346 mov r3, lr + 1655 003a 1A33 adds r3, r3, #26 + 1656 003c 0EEB0408 add r8, lr, r4 + 1657 0040 CDF808E0 str lr, [sp, #8] + 1658 0044 1FFA83FE uxth lr, r3 + 1659 0048 0EF11C03 add r3, lr, #28 + 1660 004c 0EEB040A add r10, lr, r4 + 1661 0050 3A19 adds r2, r7, r4 + 1662 0052 CDF80CE0 str lr, [sp, #12] + 1663 0056 1FFA83FE uxth lr, r3 + 1664 005a 0992 str r2, [sp, #36] + 1665 005c 7246 mov r2, lr + 1666 005e 02F11E03 add r3, r2, #30 + 1667 0062 9BB2 uxth r3, r3 + 1668 0064 0546 mov r5, r0 + 1669 0066 0791 str r1, [sp, #28] + ARM GAS /tmp/ccraf9Ev.s page 30 + + + 1670 0068 0492 str r2, [sp, #16] + 1671 006a 0593 str r3, [sp, #20] + 1672 006c 0FCD ldmia r5!, {r0, r1, r2, r3} + 1673 006e 0895 str r5, [sp, #32] + 1674 0070 069D ldr r5, [sp, #24] + 1675 0072 0097 str r7, [sp] + 1676 0074 2851 str r0, [r5, r4] @ unaligned + 1677 0076 0798 ldr r0, [sp, #28] + 1678 0078 009D ldr r5, [sp] + 1679 007a C360 str r3, [r0, #12] @ unaligned + 1680 007c 089B ldr r3, [sp, #32] + 1681 007e 4160 str r1, [r0, #4] @ unaligned + 1682 0080 0146 mov r1, r0 + 1683 0082 8260 str r2, [r0, #8] @ unaligned + 1684 0084 1868 ldr r0, [r3] + 1685 0086 1B79 ldrb r3, [r3, #4] @ zero_extendqisi2 + 1686 0088 0861 str r0, [r1, #16] @ unaligned + 1687 008a 0B75 strb r3, [r1, #20] + 1688 008c B9E80F00 ldmia r9!, {r0, r1, r2, r3} + 1689 0090 2851 str r0, [r5, r4] @ unaligned + 1690 0092 0998 ldr r0, [sp, #36] + 1691 0094 019D ldr r5, [sp, #4] + 1692 0096 8260 str r2, [r0, #8] @ unaligned + 1693 0098 0246 mov r2, r0 + 1694 009a C360 str r3, [r0, #12] @ unaligned + 1695 009c B9F80430 ldrh r3, [r9, #4] @ unaligned + 1696 00a0 4160 str r1, [r0, #4] @ unaligned + 1697 00a2 9382 strh r3, [r2, #20] @ unaligned + 1698 00a4 D9F80000 ldr r0, [r9] + 1699 00a8 99F80630 ldrb r3, [r9, #6] @ zero_extendqisi2 + 1700 00ac 1061 str r0, [r2, #16] @ unaligned + 1701 00ae 9375 strb r3, [r2, #22] + 1702 00b0 BCE80F00 ldmia ip!, {r0, r1, r2, r3} + 1703 00b4 2851 str r0, [r5, r4] @ unaligned + 1704 00b6 CBF80410 str r1, [fp, #4] @ unaligned + 1705 00ba BCE80300 ldmia ip!, {r0, r1} + 1706 00be 414F ldr r7, .L220+16 + 1707 00c0 CBF80C30 str r3, [fp, #12] @ unaligned + 1708 00c4 9CF80030 ldrb r3, [ip] @ zero_extendqisi2 + 1709 00c8 CBF80820 str r2, [fp, #8] @ unaligned + 1710 00cc CBF81000 str r0, [fp, #16] @ unaligned + 1711 00d0 CBF81410 str r1, [fp, #20] @ unaligned + 1712 00d4 8BF81830 strb r3, [fp, #24] + 1713 00d8 0FCF ldmia r7!, {r0, r1, r2, r3} + 1714 00da 029D ldr r5, [sp, #8] + 1715 00dc 2851 str r0, [r5, r4] @ unaligned + 1716 00de C8F80410 str r1, [r8, #4] @ unaligned + 1717 00e2 C8F80820 str r2, [r8, #8] @ unaligned + 1718 00e6 03CF ldmia r7!, {r0, r1} + 1719 00e8 C8F80C30 str r3, [r8, #12] @ unaligned + 1720 00ec 3B88 ldrh r3, [r7] @ unaligned + 1721 00ee A8F81830 strh r3, [r8, #24] @ unaligned + 1722 00f2 BB78 ldrb r3, [r7, #2] @ zero_extendqisi2 + 1723 00f4 C8F81000 str r0, [r8, #16] @ unaligned + 1724 00f8 C8F81410 str r1, [r8, #20] @ unaligned + 1725 00fc 88F81A30 strb r3, [r8, #26] + 1726 0100 0FCE ldmia r6!, {r0, r1, r2, r3} + ARM GAS /tmp/ccraf9Ev.s page 31 + + + 1727 0102 039D ldr r5, [sp, #12] + 1728 0104 059F ldr r7, [sp, #20] + 1729 0106 2851 str r0, [r5, r4] @ unaligned + 1730 0108 CAF80410 str r1, [r10, #4] @ unaligned + 1731 010c CAF80820 str r2, [r10, #8] @ unaligned + 1732 0110 07CE ldmia r6!, {r0, r1, r2} + 1733 0112 2D4D ldr r5, .L220+20 + 1734 0114 CAF80C30 str r3, [r10, #12] @ unaligned + 1735 0118 3378 ldrb r3, [r6] @ zero_extendqisi2 + 1736 011a CAF81000 str r0, [r10, #16] @ unaligned + 1737 011e CAF81410 str r1, [r10, #20] @ unaligned + 1738 0122 CAF81820 str r2, [r10, #24] @ unaligned + 1739 0126 8AF81C30 strb r3, [r10, #28] + 1740 012a 0FCD ldmia r5!, {r0, r1, r2, r3} + 1741 012c 214E ldr r6, .L220 + 1742 012e A644 add lr, lr, r4 + 1743 0130 3780 strh r7, [r6] @ movhi + 1744 0132 0095 str r5, [sp] + 1745 0134 049D ldr r5, [sp, #16] + 1746 0136 2851 str r0, [r5, r4] @ unaligned + 1747 0138 CEF80C30 str r3, [lr, #12] @ unaligned + 1748 013c 009B ldr r3, [sp] + 1749 013e CEF80410 str r1, [lr, #4] @ unaligned + 1750 0142 CEF80820 str r2, [lr, #8] @ unaligned + 1751 0146 07CB ldmia r3!, {r0, r1, r2} + 1752 0148 CEF81820 str r2, [lr, #24] @ unaligned + 1753 014c 1A46 mov r2, r3 + 1754 014e 1B88 ldrh r3, [r3] @ unaligned + 1755 0150 AEF81C30 strh r3, [lr, #28] @ unaligned + 1756 0154 9378 ldrb r3, [r2, #2] @ zero_extendqisi2 + 1757 0156 CEF81000 str r0, [lr, #16] @ unaligned + 1758 015a CEF81410 str r1, [lr, #20] @ unaligned + 1759 015e 8EF81E30 strb r3, [lr, #30] + 1760 0162 E019 adds r0, r4, r7 + 1761 0164 1949 ldr r1, .L220+24 + 1762 0166 1A4D ldr r5, .L220+28 + 1763 0168 47F23052 movw r2, #30000 + 1764 016c FFF7FEFF bl sprintf + 1765 0170 3388 ldrh r3, [r6] + 1766 0172 03CD ldmia r5!, {r0, r1} + 1767 0174 0833 adds r3, r3, #8 + 1768 0176 9BB2 uxth r3, r3 + 1769 0178 1F19 adds r7, r3, r4 + 1770 017a 3246 mov r2, r6 + 1771 017c 03F10A06 add r6, r3, #10 + 1772 0180 1851 str r0, [r3, r4] @ unaligned + 1773 0182 B6B2 uxth r6, r6 + 1774 0184 2B88 ldrh r3, [r5] @ unaligned + 1775 0186 1680 strh r6, [r2] @ movhi + 1776 0188 A019 adds r0, r4, r6 + 1777 018a 3B81 strh r3, [r7, #8] @ unaligned + 1778 018c 094E ldr r6, .L220 + 1779 018e AB78 ldrb r3, [r5, #2] @ zero_extendqisi2 + 1780 0190 7960 str r1, [r7, #4] @ unaligned + 1781 0192 BB72 strb r3, [r7, #10] + 1782 0194 0F49 ldr r1, .L220+32 + 1783 0196 0022 movs r2, #0 + ARM GAS /tmp/ccraf9Ev.s page 32 + + + 1784 0198 FFF7FEFF bl sprintf + 1785 019c 3388 ldrh r3, [r6] + 1786 019e 0E4A ldr r2, .L220+36 + 1787 01a0 0433 adds r3, r3, #4 + 1788 01a2 1188 ldrh r1, [r2] @ unaligned + 1789 01a4 9BB2 uxth r3, r3 + 1790 01a6 5A1C adds r2, r3, #1 + 1791 01a8 1953 strh r1, [r3, r4] @ unaligned + 1792 01aa 3280 strh r2, [r6] @ movhi + 1793 01ac 0BB0 add sp, sp, #44 + 1794 @ sp needed + 1795 01ae BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 1796 .L221: + 1797 01b2 00BF .align 2 + 1798 .L220: + 1799 01b4 00000000 .word uart_tx_buf_in_idx + 1800 01b8 00000000 .word uart_tx_buf + 1801 01bc 00000000 .word .LC13 + 1802 01c0 68000000 .word .LC17 + 1803 01c4 4C000000 .word .LC16 + 1804 01c8 88000000 .word .LC18 + 1805 01cc A8000000 .word .LC19 + 1806 01d0 B0000000 .word .LC20 + 1807 01d4 04000000 .word .LC11 + 1808 01d8 00000000 .word .LC10 + 1809 01dc 18000000 .word .LC14 + 1810 01e0 30000000 .word .LC15 + 1812 .section .text.print_dummy,"ax",%progbits + 1813 .align 1 + 1814 .p2align 2,,3 + 1815 .global print_dummy + 1816 .syntax unified + 1817 .thumb + 1818 .thumb_func + 1819 .fpu fpv4-sp-d16 + 1821 print_dummy: + 1822 @ args = 0, pretend = 0, frame = 0 + 1823 @ frame_needed = 0, uses_anonymous_args = 0 + 1824 @ link register save eliminated. + 1825 0000 7047 bx lr + 1827 0002 00BF .section .text.scan_do,"ax",%progbits + 1828 .align 1 + 1829 .p2align 2,,3 + 1830 .global scan_do + 1831 .syntax unified + 1832 .thumb + 1833 .thumb_func + 1834 .fpu fpv4-sp-d16 + 1836 scan_do: + 1837 @ args = 0, pretend = 0, frame = 0 + 1838 @ frame_needed = 0, uses_anonymous_args = 0 + 1839 0000 08B5 push {r3, lr} + 1840 0002 074A ldr r2, .L225 + 1841 0004 0749 ldr r1, .L225+4 + 1842 0006 1368 ldr r3, [r2] + 1843 0008 4969 ldr r1, [r1, #20] + 1844 000a 01FB0030 mla r0, r1, r0, r3 + ARM GAS /tmp/ccraf9Ev.s page 33 + + + 1845 000e 1060 str r0, [r2] + 1846 0010 FFF7FEFF bl set_frequency + 1847 0014 BDE80840 pop {r3, lr} + 1848 0018 0020 movs r0, #0 + 1849 001a FFF7FEBF b set_changed + 1850 .L226: + 1851 001e 00BF .align 2 + 1852 .L225: + 1853 0020 00000000 .word frequency + 1854 0024 00000000 .word .LANCHOR0 + 1856 .section .text.sat_subu8b,"ax",%progbits + 1857 .align 1 + 1858 .p2align 2,,3 + 1859 .global sat_subu8b + 1860 .syntax unified + 1861 .thumb + 1862 .thumb_func + 1863 .fpu fpv4-sp-d16 + 1865 sat_subu8b: + 1866 @ args = 0, pretend = 0, frame = 0 + 1867 @ frame_needed = 0, uses_anonymous_args = 0 + 1868 @ link register save eliminated. + 1869 0000 411A subs r1, r0, r1 + 1870 0002 C9B2 uxtb r1, r1 + 1871 0004 8842 cmp r0, r1 + 1872 0006 4FF0FF30 mov r0, #-1 + 1873 000a 38BF it cc + 1874 000c 0020 movcc r0, #0 + 1875 000e 0840 ands r0, r0, r1 + 1876 0010 7047 bx lr + 1878 0012 00BF .section .text.click,"ax",%progbits + 1879 .align 1 + 1880 .p2align 2,,3 + 1881 .global click + 1882 .syntax unified + 1883 .thumb + 1884 .thumb_func + 1885 .fpu fpv4-sp-d16 + 1887 click: + 1888 @ args = 0, pretend = 0, frame = 0 + 1889 @ frame_needed = 0, uses_anonymous_args = 0 + 1890 @ link register save eliminated. + 1891 0000 0949 ldr r1, .L230 + 1892 0002 0A4B ldr r3, .L230+4 + 1893 0004 0A88 ldrh r2, [r1] + 1894 0006 02F10800 add r0, r2, #8 + 1895 000a 10B4 push {r4} + 1896 000c 084C ldr r4, .L230+8 + 1897 000e 0880 strh r0, [r1] @ movhi + 1898 0010 03CB ldmia r3!, {r0, r1} + 1899 0012 02EB040C add ip, r2, r4 + 1900 0016 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 1901 0018 1051 str r0, [r2, r4] @ unaligned + 1902 001a CCF80410 str r1, [ip, #4] @ unaligned + 1903 001e 8CF80830 strb r3, [ip, #8] + 1904 0022 5DF8044B ldr r4, [sp], #4 + 1905 0026 7047 bx lr + ARM GAS /tmp/ccraf9Ev.s page 34 + + + 1906 .L231: + 1907 .align 2 + 1908 .L230: + 1909 0028 00000000 .word uart_tx_buf_in_idx + 1910 002c 0C000000 .word .LC12 + 1911 0030 00000000 .word uart_tx_buf + 1913 .section .text.clear_display,"ax",%progbits + 1914 .align 1 + 1915 .p2align 2,,3 + 1916 .global clear_display + 1917 .syntax unified + 1918 .thumb + 1919 .thumb_func + 1920 .fpu fpv4-sp-d16 + 1922 clear_display: + 1923 @ args = 0, pretend = 0, frame = 0 + 1924 @ frame_needed = 0, uses_anonymous_args = 0 + 1925 @ link register save eliminated. + 1926 0000 054B ldr r3, .L233 + 1927 0002 0649 ldr r1, .L233+4 + 1928 0004 1A88 ldrh r2, [r3] + 1929 0006 0648 ldr r0, .L233+8 + 1930 0008 B1F800C0 ldrh ip, [r1] @ unaligned + 1931 000c 22F800C0 strh ip, [r2, r0] @ unaligned + 1932 0010 511C adds r1, r2, #1 + 1933 0012 1980 strh r1, [r3] @ movhi + 1934 0014 7047 bx lr + 1935 .L234: + 1936 0016 00BF .align 2 + 1937 .L233: + 1938 0018 00000000 .word uart_tx_buf_in_idx + 1939 001c 00000000 .word .LC10 + 1940 0020 00000000 .word uart_tx_buf + 1942 .section .text.display_backlight_on,"ax",%progbits + 1943 .align 1 + 1944 .p2align 2,,3 + 1945 .global display_backlight_on + 1946 .syntax unified + 1947 .thumb + 1948 .thumb_func + 1949 .fpu fpv4-sp-d16 + 1951 display_backlight_on: + 1952 @ args = 0, pretend = 0, frame = 0 + 1953 @ frame_needed = 0, uses_anonymous_args = 0 + 1954 0000 10B5 push {r4, lr} + 1955 0002 064C ldr r4, .L237 + 1956 0004 0648 ldr r0, .L237+4 + 1957 0006 2388 ldrh r3, [r4] + 1958 0008 0649 ldr r1, .L237+8 + 1959 000a 1844 add r0, r0, r3 + 1960 000c 3222 movs r2, #50 + 1961 000e FFF7FEFF bl sprintf + 1962 0012 2388 ldrh r3, [r4] + 1963 0014 0533 adds r3, r3, #5 + 1964 0016 2380 strh r3, [r4] @ movhi + 1965 0018 10BD pop {r4, pc} + 1966 .L238: + ARM GAS /tmp/ccraf9Ev.s page 35 + + + 1967 001a 00BF .align 2 + 1968 .L237: + 1969 001c 00000000 .word uart_tx_buf_in_idx + 1970 0020 00000000 .word uart_tx_buf + 1971 0024 04000000 .word .LC11 + 1973 .section .text.display_backlight_off,"ax",%progbits + 1974 .align 1 + 1975 .p2align 2,,3 + 1976 .global display_backlight_off + 1977 .syntax unified + 1978 .thumb + 1979 .thumb_func + 1980 .fpu fpv4-sp-d16 + 1982 display_backlight_off: + 1983 @ args = 0, pretend = 0, frame = 0 + 1984 @ frame_needed = 0, uses_anonymous_args = 0 + 1985 0000 10B5 push {r4, lr} + 1986 0002 064C ldr r4, .L241 + 1987 0004 0648 ldr r0, .L241+4 + 1988 0006 2388 ldrh r3, [r4] + 1989 0008 0649 ldr r1, .L241+8 + 1990 000a 1844 add r0, r0, r3 + 1991 000c 0022 movs r2, #0 + 1992 000e FFF7FEFF bl sprintf + 1993 0012 2388 ldrh r3, [r4] + 1994 0014 0433 adds r3, r3, #4 + 1995 0016 2380 strh r3, [r4] @ movhi + 1996 0018 10BD pop {r4, pc} + 1997 .L242: + 1998 001a 00BF .align 2 + 1999 .L241: + 2000 001c 00000000 .word uart_tx_buf_in_idx + 2001 0020 00000000 .word uart_tx_buf + 2002 0024 04000000 .word .LC11 + 2004 .global status_list_count + 2005 .global status_list + 2006 .global modulation_list_count + 2007 .global modulation_list + 2008 .global menu_item_count + 2009 .global items + 2010 .section .rodata.str1.4,"aMS",%progbits,1 + 2011 .align 2 + 2012 .LC21: + 2013 0000 50545400 .ascii "PTT\000" + 2014 .align 2 + 2015 .LC22: + 2016 0004 53455400 .ascii "SET\000" + 2017 .align 2 + 2018 .LC23: + 2019 0008 424C00 .ascii "BL\000" + 2020 000b 00 .align 2 + 2021 .LC24: + 2022 000c 2B00 .ascii "+\000" + 2023 .global menu_last_item + 2024 .global menu_page + 2025 .global menu_item + 2026 .section .bss.menu_item,"aw",%nobits + ARM GAS /tmp/ccraf9Ev.s page 36 + + + 2027 .set .LANCHOR2,. + 0 + 2030 menu_item: + 2031 0000 00 .space 1 + 2032 .section .bss.menu_last_item,"aw",%nobits + 2033 .align 2 + 2034 .set .LANCHOR5,. + 0 + 2037 menu_last_item: + 2038 0000 0000 .space 2 + 2039 .section .bss.menu_page,"aw",%nobits + 2040 .set .LANCHOR3,. + 0 + 2043 menu_page: + 2044 0000 00 .space 1 + 2045 .section .data.items,"aw" + 2046 .align 2 + 2047 .set .LANCHOR0,. + 0 + 2050 items: + 2051 0000 00 .byte 0 + 2052 0001 20204672 .ascii " Frequency\000" + 2052 65717565 + 2052 6E637900 + 2053 000d 0000 .space 2 + 2054 000f 00 .byte 0 + 2055 0010 09 .byte 9 + 2056 0011 01 .byte 1 + 2057 0012 00 .byte 0 + 2058 0013 00 .space 1 + 2059 0014 64000000 .word 100 + 2060 0018 E8030000 .word 1000 + 2061 001c F0B31A00 .word 1750000 + 2062 0020 01 .byte 1 + 2063 0021 00 .ascii "\000" + 2064 0022 000000 .space 3 + 2065 0025 20487A00 .ascii " Hz\000" + 2066 0029 000000 .space 3 + 2067 002c 00000000 .word frequency + 2068 0030 00000000 .word set_frequency + 2069 0034 00000000 .word print_frequency + 2070 0038 00 .byte 0 + 2071 0039 20202056 .ascii " Volume \000" + 2071 6F6C756D + 2071 65202000 + 2072 0045 0000 .space 2 + 2073 0047 00 .byte 0 + 2074 0048 05 .byte 5 + 2075 0049 02 .byte 2 + 2076 004a 00 .byte 0 + 2077 004b 00 .space 1 + 2078 004c 01000000 .word 1 + 2079 0050 00000000 .word 0 + 2080 0054 20000000 .word 32 + 2081 0058 00 .byte 0 + 2082 0059 00 .ascii "\000" + 2083 005a 000000 .space 3 + 2084 005d 7C00 .ascii "|\000" + 2085 005f 0000 .space 2 + 2086 0061 000000 .space 3 + 2087 0064 00000000 .word volume + ARM GAS /tmp/ccraf9Ev.s page 37 + + + 2088 0068 00000000 .word set_dummy + 2089 006c 00000000 .word print_bar + 2090 0070 00 .byte 0 + 2091 0071 20202020 .ascii " Gain \000" + 2091 4761696E + 2091 20202000 + 2092 007d 0000 .space 2 + 2093 007f 00 .byte 0 + 2094 0080 01 .byte 1 + 2095 0081 02 .byte 2 + 2096 0082 07 .byte 7 + 2097 0083 00 .space 1 + 2098 0084 01000000 .word 1 + 2099 0088 01000000 .word 1 + 2100 008c 06000000 .word 6 + 2101 0090 00 .byte 0 + 2102 0091 00 .ascii "\000" + 2103 0092 000000 .space 3 + 2104 0095 7800 .ascii "x\000" + 2105 0097 0000 .space 2 + 2106 0099 000000 .space 3 + 2107 009c 00000000 .word rx_gain + 2108 00a0 00000000 .word set_rx_gain + 2109 00a4 00000000 .word print_integer + 2110 00a8 00 .byte 0 + 2111 00a9 204D6F64 .ascii " Modulation\000" + 2111 756C6174 + 2111 696F6E00 + 2112 00b5 0000 .space 2 + 2113 00b7 00 .byte 0 + 2114 00b8 03 .byte 3 + 2115 00b9 02 .byte 2 + 2116 00ba 0A .byte 10 + 2117 00bb 00 .space 1 + 2118 00bc 01000000 .word 1 + 2119 00c0 00000000 .word 0 + 2120 00c4 06000000 .word 6 + 2121 00c8 01 .byte 1 + 2122 00c9 00 .ascii "\000" + 2123 00ca 000000 .space 3 + 2124 00cd 00 .ascii "\000" + 2125 00ce 000000 .space 3 + 2126 00d1 000000 .space 3 + 2127 00d4 00000000 .word modulation + 2128 00d8 00000000 .word set_modulation + 2129 00dc 00000000 .word print_modulation + 2130 00e0 01 .byte 1 + 2131 00e1 2046696C .ascii " Filter CF \000" + 2131 74657220 + 2131 43462000 + 2132 00ed 0000 .space 2 + 2133 00ef 00 .byte 0 + 2134 00f0 04 .byte 4 + 2135 00f1 01 .byte 1 + 2136 00f2 00 .byte 0 + 2137 00f3 00 .space 1 + 2138 00f4 32000000 .word 50 + ARM GAS /tmp/ccraf9Ev.s page 38 + + + 2139 00f8 32000000 .word 50 + 2140 00fc AC0D0000 .word 3500 + 2141 0100 00 .byte 0 + 2142 0101 00 .ascii "\000" + 2143 0102 000000 .space 3 + 2144 0105 20487A00 .ascii " Hz\000" + 2145 0109 000000 .space 3 + 2146 010c 00000000 .word audio_filter_freq + 2147 0110 00000000 .word set_rx_audio_filter + 2148 0114 00000000 .word print_integer + 2149 0118 01 .byte 1 + 2150 0119 2046696C .ascii " Filter BW \000" + 2150 74657220 + 2150 42572000 + 2151 0125 0000 .space 2 + 2152 0127 00 .byte 0 + 2153 0128 04 .byte 4 + 2154 0129 02 .byte 2 + 2155 012a 00 .byte 0 + 2156 012b 00 .space 1 + 2157 012c 32000000 .word 50 + 2158 0130 32000000 .word 50 + 2159 0134 C4090000 .word 2500 + 2160 0138 00 .byte 0 + 2161 0139 00 .ascii "\000" + 2162 013a 000000 .space 3 + 2163 013d 20487A00 .ascii " Hz\000" + 2164 0141 000000 .space 3 + 2165 0144 00000000 .word audio_filter_bw + 2166 0148 00000000 .word set_rx_audio_filter + 2167 014c 00000000 .word print_integer + 2168 0150 01 .byte 1 + 2169 0151 2046696C .ascii " Filter Q \000" + 2169 74657220 + 2169 51202000 + 2170 015d 0000 .space 2 + 2171 015f 00 .byte 0 + 2172 0160 02 .byte 2 + 2173 0161 03 .byte 3 + 2174 0162 00 .byte 0 + 2175 0163 00 .space 1 + 2176 0164 01000000 .word 1 + 2177 0168 01000000 .word 1 + 2178 016c 20000000 .word 32 + 2179 0170 00 .byte 0 + 2180 0171 00 .ascii "\000" + 2181 0172 000000 .space 3 + 2182 0175 205100 .ascii " Q\000" + 2183 0178 00 .space 1 + 2184 0179 000000 .space 3 + 2185 017c 00000000 .word audio_filter_beta + 2186 0180 00000000 .word set_rx_audio_filter + 2187 0184 00000000 .word print_integer + 2188 0188 FF .byte -1 + 2189 0189 20202053 .ascii " Signal \000" + 2189 69676E61 + 2189 6C202000 + ARM GAS /tmp/ccraf9Ev.s page 39 + + + 2190 0195 0000 .space 2 + 2191 0197 04 .byte 4 + 2192 0198 0D .byte 13 + 2193 0199 04 .byte 4 + 2194 019a 00 .byte 0 + 2195 019b 00 .space 1 + 2196 019c 00000000 .word 0 + 2197 01a0 00000000 .word 0 + 2198 01a4 00000000 .word 0 + 2199 01a8 00 .byte 0 + 2200 01a9 5300 .ascii "S\000" + 2201 01ab 0000 .space 2 + 2202 01ad 00 .ascii "\000" + 2203 01ae 000000 .space 3 + 2204 01b1 000000 .space 3 + 2205 01b4 00000000 .word s_meter + 2206 01b8 00000000 .word set_dummy + 2207 01bc 00000000 .word print_bar + 2208 01c0 FF .byte -1 + 2209 01c1 20202054 .ascii " TX tab \000" + 2209 58207461 + 2209 62202000 + 2210 01cd 0000 .space 2 + 2211 01cf 04 .byte 4 + 2212 01d0 03 .byte 3 + 2213 01d1 05 .byte 5 + 2214 01d2 00 .byte 0 + 2215 01d3 00 .space 1 + 2216 01d4 00000000 .word 0 + 2217 01d8 00000000 .word 0 + 2218 01dc 00000000 .word 0 + 2219 01e0 00 .byte 0 + 2220 01e1 00 .ascii "\000" + 2221 01e2 000000 .space 3 + 2222 01e5 00 .ascii "\000" + 2223 01e6 000000 .space 3 + 2224 01e9 000000 .space 3 + 2225 01ec 00000000 .word .LC21 + 2226 01f0 00000000 .word set_dummy + 2227 01f4 00000000 .word print_string + 2228 01f8 FF .byte -1 + 2229 01f9 20202054 .ascii " Tabs \000" + 2229 61627320 + 2229 20202000 + 2230 0205 0000 .space 2 + 2231 0207 04 .byte 4 + 2232 0208 03 .byte 3 + 2233 0209 05 .byte 5 + 2234 020a 04 .byte 4 + 2235 020b 00 .space 1 + 2236 020c 00000000 .word 0 + 2237 0210 00000000 .word 0 + 2238 0214 00000000 .word 0 + 2239 0218 00 .byte 0 + 2240 0219 00 .ascii "\000" + 2241 021a 000000 .space 3 + 2242 021d 00 .ascii "\000" + ARM GAS /tmp/ccraf9Ev.s page 40 + + + 2243 021e 000000 .space 3 + 2244 0221 000000 .space 3 + 2245 0224 04000000 .word .LC22 + 2246 0228 00000000 .word set_dummy + 2247 022c 00000000 .word print_string + 2248 0230 FF .byte -1 + 2249 0231 20202054 .ascii " Tabs \000" + 2249 61627320 + 2249 20202000 + 2250 023d 0000 .space 2 + 2251 023f 04 .byte 4 + 2252 0240 02 .byte 2 + 2253 0241 05 .byte 5 + 2254 0242 09 .byte 9 + 2255 0243 00 .space 1 + 2256 0244 00000000 .word 0 + 2257 0248 00000000 .word 0 + 2258 024c 00000000 .word 0 + 2259 0250 00 .byte 0 + 2260 0251 00 .ascii "\000" + 2261 0252 000000 .space 3 + 2262 0255 00 .ascii "\000" + 2263 0256 000000 .space 3 + 2264 0259 000000 .space 3 + 2265 025c 08000000 .word .LC23 + 2266 0260 00000000 .word set_dummy + 2267 0264 00000000 .word print_string + 2268 0268 FF .byte -1 + 2269 0269 20202054 .ascii " Tabs \000" + 2269 61627320 + 2269 20202000 + 2270 0275 0000 .space 2 + 2271 0277 04 .byte 4 + 2272 0278 01 .byte 1 + 2273 0279 05 .byte 5 + 2274 027a 0C .byte 12 + 2275 027b 00 .space 1 + 2276 027c 00000000 .word 0 + 2277 0280 00000000 .word 0 + 2278 0284 00000000 .word 0 + 2279 0288 00 .byte 0 + 2280 0289 00 .ascii "\000" + 2281 028a 000000 .space 3 + 2282 028d 00 .ascii "\000" + 2283 028e 000000 .space 3 + 2284 0291 000000 .space 3 + 2285 0294 0C000000 .word .LC24 + 2286 0298 00000000 .word set_dummy + 2287 029c 00000000 .word print_string + 2288 .section .data.menu_item_count,"aw" + 2289 .set .LANCHOR4,. + 0 + 2292 menu_item_count: + 2293 0000 0C .byte 12 + 2294 .section .data.modulation_list,"aw" + 2295 .align 2 + 2296 .set .LANCHOR1,. + 0 + 2299 modulation_list: + ARM GAS /tmp/ccraf9Ev.s page 41 + + + 2300 0000 444300 .ascii "DC\000" + 2301 0003 00 .space 1 + 2302 0004 4C534200 .ascii "LSB\000" + 2303 0008 55534200 .ascii "USB\000" + 2304 000c 43574C00 .ascii "CWL\000" + 2305 0010 43575500 .ascii "CWU\000" + 2306 0014 414D00 .ascii "AM\000" + 2307 0017 00 .space 1 + 2308 0018 464D00 .ascii "FM\000" + 2309 001b 00 .space 1 + 2310 .section .data.modulation_list_count,"aw" + 2313 modulation_list_count: + 2314 0000 07 .byte 7 + 2315 .section .data.status_list,"aw" + 2316 .align 2 + 2319 status_list: + 2320 0000 527800 .ascii "Rx\000" + 2321 0003 547800 .ascii "Tx\000" + 2322 0006 537100 .ascii "Sq\000" + 2323 .section .data.status_list_count,"aw" + 2326 status_list_count: + 2327 0000 03 .byte 3 + 2328 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccraf9Ev.s page 42 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 interface.c + /tmp/ccraf9Ev.s:16 .rodata.print_integer.str1.4:0000000000000000 $d + /tmp/ccraf9Ev.s:20 .text.print_integer:0000000000000000 $t + /tmp/ccraf9Ev.s:29 .text.print_integer:0000000000000000 print_integer + /tmp/ccraf9Ev.s:52 .text.print_integer:0000000000000028 $d + /tmp/ccraf9Ev.s:58 .rodata.print_string.str1.4:0000000000000000 $d + /tmp/ccraf9Ev.s:62 .text.print_string:0000000000000000 $t + /tmp/ccraf9Ev.s:70 .text.print_string:0000000000000000 print_string + /tmp/ccraf9Ev.s:92 .text.print_string:0000000000000028 $d + /tmp/ccraf9Ev.s:98 .text.print_modulation:0000000000000000 $t + /tmp/ccraf9Ev.s:106 .text.print_modulation:0000000000000000 print_modulation + /tmp/ccraf9Ev.s:131 .text.print_modulation:0000000000000030 $d + /tmp/ccraf9Ev.s:138 .text.print_bar:0000000000000000 $t + /tmp/ccraf9Ev.s:146 .text.print_bar:0000000000000000 print_bar + /tmp/ccraf9Ev.s:205 .text.print_bar:0000000000000078 $d + /tmp/ccraf9Ev.s:210 .rodata.print_frequency.str1.4:0000000000000000 $d + /tmp/ccraf9Ev.s:217 .text.print_frequency:0000000000000000 $t + /tmp/ccraf9Ev.s:225 .text.print_frequency:0000000000000000 print_frequency + /tmp/ccraf9Ev.s:306 .text.print_frequency:00000000000000c8 $d + /tmp/ccraf9Ev.s:314 .text.encoder_increment:0000000000000000 $t + /tmp/ccraf9Ev.s:322 .text.encoder_increment:0000000000000000 encoder_increment + /tmp/ccraf9Ev.s:371 .text.encoder_increment:000000000000005c $d + /tmp/ccraf9Ev.s:375 .text.encoder_decrement:0000000000000000 $t + /tmp/ccraf9Ev.s:383 .text.encoder_decrement:0000000000000000 encoder_decrement + /tmp/ccraf9Ev.s:432 .text.encoder_decrement:000000000000005c $d + /tmp/ccraf9Ev.s:436 .text.joystick_dx:0000000000000000 $t + /tmp/ccraf9Ev.s:444 .text.joystick_dx:0000000000000000 joystick_dx + /tmp/ccraf9Ev.s:465 .text.joystick_dx:0000000000000020 $d + /tmp/ccraf9Ev.s:470 .text.joystick_sx:0000000000000000 $t + /tmp/ccraf9Ev.s:478 .text.joystick_sx:0000000000000000 joystick_sx + /tmp/ccraf9Ev.s:498 .text.joystick_sx:0000000000000024 $d + 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/tmp/ccraf9Ev.s:809 .text.step_up:0000000000000000 step_up + /tmp/ccraf9Ev.s:827 .text.step_up:0000000000000020 $d + /tmp/ccraf9Ev.s:830 .text.step_down:0000000000000000 $t + /tmp/ccraf9Ev.s:838 .text.step_down:0000000000000000 step_down + /tmp/ccraf9Ev.s:857 .text.step_down:000000000000001c $d + /tmp/ccraf9Ev.s:861 .rodata.interface_set_default.str1.4:0000000000000000 $d + /tmp/ccraf9Ev.s:865 .text.interface_set_default:0000000000000000 $t + /tmp/ccraf9Ev.s:873 .text.interface_set_default:0000000000000000 interface_set_default + /tmp/ccraf9Ev.s:899 .text.interface_set_default:0000000000000028 $d + /tmp/ccraf9Ev.s:906 .text.display_set_position:0000000000000000 $t + ARM GAS /tmp/ccraf9Ev.s page 43 + + + /tmp/ccraf9Ev.s:914 .text.display_set_position:0000000000000000 display_set_position + /tmp/ccraf9Ev.s:933 .text.display_set_position:000000000000001c $d + /tmp/ccraf9Ev.s:938 .text.display_update_item:0000000000000000 $t + /tmp/ccraf9Ev.s:946 .text.display_update_item:0000000000000000 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+ Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h \ + Core/Inc/FIRFilterCode.h Core/Inc/bassofono.h Core/Inc/main.h \ + Core/Inc/rx.h Core/Inc/tx.h Core/Inc/rx.h +Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_cordic.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: +Core/Inc/FIRFilterCode.h: +Core/Inc/bassofono.h: +Core/Inc/main.h: +Core/Inc/rx.h: +Core/Inc/tx.h: +Core/Inc/rx.h: diff --git a/codice/build/rx.lst b/codice/build/rx.lst new file mode 100644 index 0000000..0e76446 --- /dev/null +++ b/codice/build/rx.lst @@ -0,0 +1,1325 @@ +ARM GAS /tmp/ccdwrbgC.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "rx.c" + 14 .text + 15 .section .text.rx_mixer,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global rx_mixer + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 rx_mixer: + 26 @ args = 4, pretend = 0, frame = 2096 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 29 0004 2DED028B vpush.64 {d8} + 30 0008 08EE903A vmov s17, r3 @ int + 31 000c BC4B ldr r3, .L19 + 32 000e 08EE102A vmov s16, r2 @ int + 33 0012 ADF6340D subw sp, sp, #2100 + 34 0016 1A68 ldr r2, [r3] + 35 0018 BA4B ldr r3, .L19+4 + 36 001a 5A60 str r2, [r3, #4] + 37 001c 0491 str r1, [sp, #16] + 38 001e 0029 cmp r1, #0 + 39 0020 00F06881 beq .L17 + 40 0024 831E subs r3, r0, #2 + 41 0026 0193 str r3, [sp, #4] + 42 0028 0CAB add r3, sp, #48 + 43 002a 0024 movs r4, #0 + 44 002c 0B93 str r3, [sp, #44] + 45 002e 0DF58663 add r3, sp, #1072 + 46 0032 DFF8F0A2 ldr r10, .L19+36 + 47 0036 0694 str r4, [sp, #24] + 48 0038 0394 str r4, [sp, #12] + 49 003a 0A93 str r3, [sp, #40] + 50 003c 0094 str r4, [sp] + 51 003e 1146 mov r1, r2 + 52 0040 01E0 b .L5 + 53 .L18: + 54 0042 AF4B ldr r3, .L19 + 55 0044 1968 ldr r1, [r3] + 56 .L5: + 57 0046 DDF86038 ldr r3, [sp, #2144] + 58 004a 019C ldr r4, [sp, #4] + ARM GAS /tmp/ccdwrbgC.s page 2 + + + 59 004c AD48 ldr r0, .L19+4 + 60 004e AC4A ldr r2, .L19 + 61 0050 AD4E ldr r6, .L19+8 + 62 0052 1944 add r1, r1, r3 + 63 0054 8368 ldr r3, [r0, #8] + 64 0056 1160 str r1, [r2] + 65 0058 34F8022F ldrh r2, [r4, #2]! + 66 005c 0194 str r4, [sp, #4] + 67 005e 4160 str r1, [r0, #4] + 68 0060 AA49 ldr r1, .L19+12 + 69 0062 A2F58052 sub r2, r2, #4096 + 70 0066 0D78 ldrb r5, [r1] @ zero_extendqisi2 + 71 0068 19B2 sxth r1, r3 + 72 006a 1B14 asrs r3, r3, #16 + 73 006c 02FB03F3 mul r3, r2, r3 + 74 0070 46F82530 str r3, [r6, r5, lsl #2] + 75 0074 009B ldr r3, [sp] + 76 0076 02FB01F1 mul r1, r2, r1 + 77 007a DA07 lsls r2, r3, #31 + 78 007c 4AF82510 str r1, [r10, r5, lsl #2] + 79 0080 40F11481 bpl .L3 + 80 0084 A24A ldr r2, .L19+16 + 81 0086 05F03F01 and r1, r5, #63 + 82 008a 1468 ldr r4, [r2] + 83 008c 56F82180 ldr r8, [r6, r1, lsl #2] + 84 0090 5AF821E0 ldr lr, [r10, r1, lsl #2] + 85 0094 0294 str r4, [sp, #8] + 86 0096 A5F10E03 sub r3, r5, #14 + 87 009a A81E subs r0, r5, #2 + 88 009c 3446 mov r4, r6 + 89 009e 9C49 ldr r1, .L19+16 + 90 00a0 03F03F03 and r3, r3, #63 + 91 00a4 00F03F00 and r0, r0, #63 + 92 00a8 D1F80890 ldr r9, [r1, #8] + 93 00ac 5AF82320 ldr r2, [r10, r3, lsl #2] + 94 00b0 5AF82010 ldr r1, [r10, r0, lsl #2] + 95 00b4 54F82000 ldr r0, [r4, r0, lsl #2] + 96 00b8 029C ldr r4, [sp, #8] + 97 00ba 56F82330 ldr r3, [r6, r3, lsl #2] + 98 00be 84FB022C smull r2, ip, r4, r2 + 99 00c2 CEFB042C smlal r2, ip, lr, r4 + 100 00c6 A5F10C07 sub r7, r5, #12 + 101 00ca 07F03F07 and r7, r7, #63 + 102 00ce C1FB092C smlal r2, ip, r1, r9 + 103 00d2 84FB0331 smull r3, r1, r4, r3 + 104 00d6 C8FB0431 smlal r3, r1, r8, r4 + 105 00da C0FB0931 smlal r3, r1, r0, r9 + 106 00de 8A4C ldr r4, .L19+8 + 107 00e0 5AF82700 ldr r0, [r10, r7, lsl #2] + 108 00e4 C9FB002C smlal r2, ip, r9, r0 + 109 00e8 54F82700 ldr r0, [r4, r7, lsl #2] + 110 00ec 2E1F subs r6, r5, #4 + 111 00ee 06F03F06 and r6, r6, #63 + 112 00f2 C0FB0931 smlal r3, r1, r0, r9 + 113 00f6 8648 ldr r0, .L19+16 + 114 00f8 D0F81080 ldr r8, [r0, #16] + 115 00fc 5AF82600 ldr r0, [r10, r6, lsl #2] + ARM GAS /tmp/ccdwrbgC.s page 3 + + + 116 0100 A5F10A0E sub lr, r5, #10 + 117 0104 0EF03F0E and lr, lr, #63 + 118 0108 C0FB082C smlal r2, ip, r0, r8 + 119 010c 54F82600 ldr r0, [r4, r6, lsl #2] + 120 0110 C0FB0831 smlal r3, r1, r0, r8 + 121 0114 5AF82E00 ldr r0, [r10, lr, lsl #2] + 122 0118 C8FB002C smlal r2, ip, r8, r0 + 123 011c 54F82E00 ldr r0, [r4, lr, lsl #2] + 124 0120 AF1F subs r7, r5, #6 + 125 0122 07F03F07 and r7, r7, #63 + 126 0126 C0FB0831 smlal r3, r1, r0, r8 + 127 012a 7948 ldr r0, .L19+16 + 128 012c D0F818B0 ldr fp, [r0, #24] + 129 0130 5AF82700 ldr r0, [r10, r7, lsl #2] + 130 0134 A5F10806 sub r6, r5, #8 + 131 0138 06F03F06 and r6, r6, #63 + 132 013c C0FB0B2C smlal r2, ip, r0, fp + 133 0140 54F82700 ldr r0, [r4, r7, lsl #2] + 134 0144 C0FB0B31 smlal r3, r1, r0, fp + 135 0148 5AF82600 ldr r0, [r10, r6, lsl #2] + 136 014c CBFB002C smlal r2, ip, fp, r0 + 137 0150 54F82600 ldr r0, [r4, r6, lsl #2] + 138 0154 073D subs r5, r5, #7 + 139 0156 05F03F05 and r5, r5, #63 + 140 015a C0FB0B31 smlal r3, r1, r0, fp + 141 015e 6C48 ldr r0, .L19+16 + 142 0160 C669 ldr r6, [r0, #28] + 143 0162 5AF82500 ldr r0, [r10, r5, lsl #2] + 144 0166 0596 str r6, [sp, #20] + 145 0168 C0FB062C smlal r2, ip, r0, r6 + 146 016c 54F82500 ldr r0, [r4, r5, lsl #2] + 147 0170 C0FB0631 smlal r3, r1, r0, r6 + 148 0174 DB0F lsrs r3, r3, #31 + 149 0176 43EA4103 orr r3, r3, r1, lsl #1 + 150 017a 6649 ldr r1, .L19+20 + 151 017c 664E ldr r6, .L19+24 + 152 017e 0978 ldrb r1, [r1] @ zero_extendqisi2 + 153 0180 D20F lsrs r2, r2, #31 + 154 0182 46F82130 str r3, [r6, r1, lsl #2] + 155 0186 039B ldr r3, [sp, #12] + 156 0188 42EA4C02 orr r2, r2, ip, lsl #1 + 157 018c DFF898C1 ldr ip, .L19+40 + 158 0190 DB07 lsls r3, r3, #31 + 159 0192 4CF82120 str r2, [ip, r1, lsl #2] + 160 0196 40F18180 bpl .L4 + 161 019a 8D1E subs r5, r1, #2 + 162 019c 01F01F00 and r0, r1, #31 + 163 01a0 05F01F05 and r5, r5, #31 + 164 01a4 A1F10E03 sub r3, r1, #14 + 165 01a8 03F01F03 and r3, r3, #31 + 166 01ac 56F82540 ldr r4, [r6, r5, lsl #2] + 167 01b0 5CF82070 ldr r7, [ip, r0, lsl #2] + 168 01b4 56F82000 ldr r0, [r6, r0, lsl #2] + 169 01b8 5CF82320 ldr r2, [ip, r3, lsl #2] + 170 01bc 0890 str r0, [sp, #32] + 171 01be 0994 str r4, [sp, #36] + 172 01c0 081F subs r0, r1, #4 + ARM GAS /tmp/ccdwrbgC.s page 4 + + + 173 01c2 029C ldr r4, [sp, #8] + 174 01c4 56F82330 ldr r3, [r6, r3, lsl #2] + 175 01c8 00F01F00 and r0, r0, #31 + 176 01cc 0790 str r0, [sp, #28] + 177 01ce 5CF82500 ldr r0, [ip, r5, lsl #2] + 178 01d2 84FB0225 smull r2, r5, r4, r2 + 179 01d6 C4FB0725 smlal r2, r5, r4, r7 + 180 01da C9FB0025 smlal r2, r5, r9, r0 + 181 01de A1F10C0E sub lr, r1, #12 + 182 01e2 A1F10A00 sub r0, r1, #10 + 183 01e6 089F ldr r7, [sp, #32] + 184 01e8 0EF01F0E and lr, lr, #31 + 185 01ec 00F01F00 and r0, r0, #31 + 186 01f0 0290 str r0, [sp, #8] + 187 01f2 84FB0330 smull r3, r0, r4, r3 + 188 01f6 C4FB0730 smlal r3, r0, r4, r7 + 189 01fa 5CF82E70 ldr r7, [ip, lr, lsl #2] + 190 01fe 099C ldr r4, [sp, #36] + 191 0200 C9FB0725 smlal r2, r5, r9, r7 + 192 0204 C9FB0430 smlal r3, r0, r9, r4 + 193 0208 56F82E70 ldr r7, [r6, lr, lsl #2] + 194 020c 079C ldr r4, [sp, #28] + 195 020e C9FB0730 smlal r3, r0, r9, r7 + 196 0212 5CF82470 ldr r7, [ip, r4, lsl #2] + 197 0216 C8FB0725 smlal r2, r5, r8, r7 + 198 021a 56F82470 ldr r7, [r6, r4, lsl #2] + 199 021e 029C ldr r4, [sp, #8] + 200 0220 C8FB0730 smlal r3, r0, r8, r7 + 201 0224 5CF82470 ldr r7, [ip, r4, lsl #2] + 202 0228 A1F1060E sub lr, r1, #6 + 203 022c 0EF01F0E and lr, lr, #31 + 204 0230 C8FB0725 smlal r2, r5, r8, r7 + 205 0234 56F82470 ldr r7, [r6, r4, lsl #2] + 206 0238 0B9C ldr r4, [sp, #44] + 207 023a C8FB0730 smlal r3, r0, r8, r7 + 208 023e 5CF82E70 ldr r7, [ip, lr, lsl #2] + 209 0242 A1F10809 sub r9, r1, #8 + 210 0246 09F01F09 and r9, r9, #31 + 211 024a CBFB0725 smlal r2, r5, fp, r7 + 212 024e 56F82E70 ldr r7, [r6, lr, lsl #2] + 213 0252 CBFB0730 smlal r3, r0, fp, r7 + 214 0256 5CF82970 ldr r7, [ip, r9, lsl #2] + 215 025a 0739 subs r1, r1, #7 + 216 025c 01F01F01 and r1, r1, #31 + 217 0260 CBFB0725 smlal r2, r5, fp, r7 + 218 0264 56F82970 ldr r7, [r6, r9, lsl #2] + 219 0268 CBFB0730 smlal r3, r0, fp, r7 + 220 026c 5CF82170 ldr r7, [ip, r1, lsl #2] + 221 0270 56F82110 ldr r1, [r6, r1, lsl #2] + 222 0274 059E ldr r6, [sp, #20] + 223 0276 C6FB0725 smlal r2, r5, r6, r7 + 224 027a C6FB0130 smlal r3, r0, r6, r1 + 225 027e D20F lsrs r2, r2, #31 + 226 0280 0699 ldr r1, [sp, #24] + 227 0282 42EA4502 orr r2, r2, r5, lsl #1 + 228 0286 44F82120 str r2, [r4, r1, lsl #2] + 229 028a DB0F lsrs r3, r3, #31 + ARM GAS /tmp/ccdwrbgC.s page 5 + + + 230 028c 0A9A ldr r2, [sp, #40] + 231 028e 43EA4003 orr r3, r3, r0, lsl #1 + 232 0292 42F82130 str r3, [r2, r1, lsl #2] + 233 0296 4B1C adds r3, r1, #1 + 234 0298 9BB2 uxth r3, r3 + 235 029a 0693 str r3, [sp, #24] + 236 .L4: + 237 029c 1D48 ldr r0, .L19+20 + 238 029e 1F21 movs r1, #31 + 239 02a0 FFF7FEFF bl ringbuf_increment + 240 02a4 039B ldr r3, [sp, #12] + 241 02a6 0133 adds r3, r3, #1 + 242 02a8 9BB2 uxth r3, r3 + 243 02aa 0393 str r3, [sp, #12] + 244 .L3: + 245 02ac 1748 ldr r0, .L19+12 + 246 02ae 3F21 movs r1, #63 + 247 02b0 FFF7FEFF bl ringbuf_increment + 248 02b4 009C ldr r4, [sp] + 249 02b6 049B ldr r3, [sp, #16] + 250 02b8 0134 adds r4, r4, #1 + 251 02ba A2B2 uxth r2, r4 + 252 02bc 9342 cmp r3, r2 + 253 02be 0092 str r2, [sp] + 254 02c0 7FF4BFAE bne .L18 + 255 .L2: + 256 02c4 18EE102A vmov r2, s16 @ int + 257 02c8 0B99 ldr r1, [sp, #44] + 258 02ca 1448 ldr r0, .L19+28 + 259 02cc 4FF48073 mov r3, #256 + 260 02d0 FFF7FEFF bl arm_fir_decimate_q31 + 261 02d4 1248 ldr r0, .L19+32 + 262 02d6 0A99 ldr r1, [sp, #40] + 263 02d8 18EE902A vmov r2, s17 @ int + 264 02dc 4FF48073 mov r3, #256 + 265 02e0 FFF7FEFF bl arm_fir_decimate_q31 + 266 02e4 074B ldr r3, .L19+4 + 267 02e6 9B68 ldr r3, [r3, #8] + 268 02e8 0DF6340D addw sp, sp, #2100 + 269 @ sp needed + 270 02ec BDEC028B vldm sp!, {d8} + 271 02f0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 272 .L17: + 273 02f4 0CAB add r3, sp, #48 + 274 02f6 0B93 str r3, [sp, #44] + 275 02f8 0DF58663 add r3, sp, #1072 + 276 02fc 0A93 str r3, [sp, #40] + 277 02fe E1E7 b .L2 + 278 .L20: + 279 .align 2 + 280 .L19: + 281 0300 00000000 .word .LANCHOR0 + 282 0304 000C0240 .word 1073875968 + 283 0308 00000000 .word .LANCHOR3 + 284 030c 00000000 .word .LANCHOR1 + 285 0310 00000000 .word .LANCHOR5 + 286 0314 00000000 .word .LANCHOR4 + ARM GAS /tmp/ccdwrbgC.s page 6 + + + 287 0318 00000000 .word .LANCHOR7 + 288 031c 00000000 .word .LANCHOR8 + 289 0320 00000000 .word .LANCHOR9 + 290 0324 00000000 .word .LANCHOR2 + 291 0328 00000000 .word .LANCHOR6 + 293 .section .text.am_demodulator,"ax",%progbits + 294 .align 1 + 295 .p2align 2,,3 + 296 .global am_demodulator + 297 .syntax unified + 298 .thumb + 299 .thumb_func + 300 .fpu fpv4-sp-d16 + 302 am_demodulator: + 303 @ args = 0, pretend = 0, frame = 0 + 304 @ frame_needed = 0, uses_anonymous_args = 0 + 305 0000 CAB1 cbz r2, .L29 + 306 0002 013A subs r2, r2, #1 + 307 0004 92B2 uxth r2, r2 + 308 0006 10B5 push {r4, lr} + 309 0008 A0F1040C sub ip, r0, #4 + 310 000c 0C1F subs r4, r1, #4 + 311 000e A3F1040E sub lr, r3, #4 + 312 0012 00EB8200 add r0, r0, r2, lsl #2 + 313 .L23: + 314 0016 54F8043F ldr r3, [r4, #4]! + 315 001a 5CF8042F ldr r2, [ip, #4]! + 316 001e 83FB0313 smull r1, r3, r3, r3 + 317 0022 5B10 asrs r3, r3, #1 + 318 0024 82FB0221 smull r2, r1, r2, r2 + 319 0028 03EB6103 add r3, r3, r1, asr #1 + 320 002c 6045 cmp r0, ip + 321 002e 4EF8043F str r3, [lr, #4]! + 322 0032 F0D1 bne .L23 + 323 0034 10BD pop {r4, pc} + 324 .L29: + 325 0036 7047 bx lr + 327 .section .text.ssb_demodulator,"ax",%progbits + 328 .align 1 + 329 .p2align 2,,3 + 330 .global ssb_demodulator + 331 .syntax unified + 332 .thumb + 333 .thumb_func + 334 .fpu fpv4-sp-d16 + 336 ssb_demodulator: + 337 @ args = 4, pretend = 0, frame = 8 + 338 @ frame_needed = 0, uses_anonymous_args = 0 + 339 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 340 0004 DFF898A0 ldr r10, .L42+4 + 341 0008 DFF89080 ldr r8, .L42 + 342 000c DAF80040 ldr r4, [r10] + 343 0010 C8F80440 str r4, [r8, #4] + 344 0014 83B0 sub sp, sp, #12 + 345 0016 002A cmp r2, #0 + 346 0018 3AD0 beq .L33 + 347 001a 02F1FF39 add r9, r2, #-1 + ARM GAS /tmp/ccdwrbgC.s page 7 + + + 348 001e 1FFA89F9 uxth r9, r9 + 349 0022 1E46 mov r6, r3 + 350 0024 00EB8903 add r3, r0, r9, lsl #2 + 351 0028 DFF878B0 ldr fp, .L42+8 + 352 002c DFF87890 ldr r9, .L42+12 + 353 0030 0193 str r3, [sp, #4] + 354 0032 0F1F subs r7, r1, #4 + 355 0034 051F subs r5, r0, #4 + 356 0036 01E0 b .L36 + 357 .L41: + 358 0038 DAF80040 ldr r4, [r10] + 359 .L36: + 360 003c 0C9B ldr r3, [sp, #48] + 361 003e 1919 adds r1, r3, r4 + 362 0040 D8F80840 ldr r4, [r8, #8] + 363 0044 CAF80010 str r1, [r10] + 364 0048 C8F80410 str r1, [r8, #4] + 365 004c D9F80010 ldr r1, [r9] + 366 0050 20B2 sxth r0, r4 + 367 0052 01FB00F0 mul r0, r1, r0 + 368 0056 4001 lsls r0, r0, #5 + 369 0058 55F8041F ldr r1, [r5, #4]! + 370 005c FFF7FEFF bl sat_mult_q31 + 371 0060 8446 mov ip, r0 + 372 0062 D9F80000 ldr r0, [r9] + 373 0066 57F8041F ldr r1, [r7, #4]! + 374 006a 2414 asrs r4, r4, #16 + 375 006c 04FB00F0 mul r0, r4, r0 + 376 0070 4001 lsls r0, r0, #5 + 377 0072 6446 mov r4, ip + 378 0074 FFF7FEFF bl sat_mult_q31 + 379 0078 DBF80010 ldr r1, [fp] + 380 007c 019B ldr r3, [sp, #4] + 381 007e 0229 cmp r1, #2 + 382 0080 0CBF ite eq + 383 0082 0019 addeq r0, r0, r4 + 384 0084 201A subne r0, r4, r0 + 385 0086 9D42 cmp r5, r3 + 386 0088 3060 str r0, [r6] + 387 008a 06F10406 add r6, r6, #4 + 388 008e D3D1 bne .L41 + 389 .L33: + 390 0090 024B ldr r3, .L42 + 391 0092 9B68 ldr r3, [r3, #8] + 392 0094 03B0 add sp, sp, #12 + 393 @ sp needed + 394 0096 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 395 .L43: + 396 009a 00BF .align 2 + 397 .L42: + 398 009c 000C0240 .word 1073875968 + 399 00a0 00000000 .word .LANCHOR10 + 400 00a4 00000000 .word modulation + 401 00a8 00000000 .word volume + 403 .section .text.dc_demodulator,"ax",%progbits + 404 .align 1 + 405 .p2align 2,,3 + ARM GAS /tmp/ccdwrbgC.s page 8 + + + 406 .global dc_demodulator + 407 .syntax unified + 408 .thumb + 409 .thumb_func + 410 .fpu fpv4-sp-d16 + 412 dc_demodulator: + 413 @ args = 0, pretend = 0, frame = 0 + 414 @ frame_needed = 0, uses_anonymous_args = 0 + 415 @ link register save eliminated. + 416 0000 10B4 push {r4} + 417 0002 0B4C ldr r4, .L49 + 418 0004 011F subs r1, r0, #4 + 419 0006 043A subs r2, r2, #4 + 420 0008 00F1FC0C add ip, r0, #252 + 421 .L46: + 422 000c 51F8043F ldr r3, [r1, #4]! + 423 0010 2068 ldr r0, [r4] + 424 0012 00FB03F3 mul r3, r0, r3 + 425 0016 002B cmp r3, #0 + 426 0018 B8BF it lt + 427 001a 03F6FF73 addwlt r3, r3, #4095 + 428 001e 0432 adds r2, r2, #4 + 429 0020 1B13 asrs r3, r3, #12 + 430 0022 8C45 cmp ip, r1 + 431 0024 1360 str r3, [r2] + 432 0026 F1D1 bne .L46 + 433 0028 5DF8044B ldr r4, [sp], #4 + 434 002c 7047 bx lr + 435 .L50: + 436 002e 00BF .align 2 + 437 .L49: + 438 0030 00000000 .word volume + 440 .section .text.nco,"ax",%progbits + 441 .align 1 + 442 .p2align 2,,3 + 443 .global nco + 444 .syntax unified + 445 .thumb + 446 .thumb_func + 447 .fpu fpv4-sp-d16 + 449 nco: + 450 @ args = 0, pretend = 0, frame = 0 + 451 @ frame_needed = 0, uses_anonymous_args = 0 + 452 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 453 0004 104E ldr r6, .L59 + 454 0006 114D ldr r5, .L59+4 + 455 0008 3768 ldr r7, [r6] + 456 000a 6F60 str r7, [r5, #4] + 457 000c C0B1 cbz r0, .L52 + 458 000e 0138 subs r0, r0, #1 + 459 0010 1FFA80FE uxth lr, r0 + 460 0014 1744 add r7, r7, r2 + 461 0016 DFF83880 ldr r8, .L59+8 + 462 001a 3C46 mov r4, r7 + 463 001c 081F subs r0, r1, #4 + 464 001e 01EB8E0C add ip, r1, lr, lsl #2 + 465 .L53: + ARM GAS /tmp/ccdwrbgC.s page 9 + + + 466 0022 AB68 ldr r3, [r5, #8] + 467 0024 6C60 str r4, [r5, #4] + 468 0026 D8F80010 ldr r1, [r8] + 469 002a 1B14 asrs r3, r3, #16 + 470 002c 93FBF1F3 sdiv r3, r3, r1 + 471 0030 40F8043F str r3, [r0, #4]! + 472 0034 6045 cmp r0, ip + 473 0036 1444 add r4, r4, r2 + 474 0038 F3D1 bne .L53 + 475 003a 02FB0E72 mla r2, r2, lr, r7 + 476 003e 3260 str r2, [r6] + 477 .L52: + 478 0040 024B ldr r3, .L59+4 + 479 0042 9B68 ldr r3, [r3, #8] + 480 0044 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 481 .L60: + 482 .align 2 + 483 .L59: + 484 0048 00000000 .word .LANCHOR11 + 485 004c 000C0240 .word 1073875968 + 486 0050 00000000 .word volume + 488 .section .text.hb_fir15,"ax",%progbits + 489 .align 1 + 490 .p2align 2,,3 + 491 .global hb_fir15 + 492 .syntax unified + 493 .thumb + 494 .thumb_func + 495 .fpu fpv4-sp-d16 + 497 hb_fir15: + 498 @ args = 0, pretend = 0, frame = 0 + 499 @ frame_needed = 0, uses_anonymous_args = 0 + 500 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 501 0004 1446 mov r4, r2 + 502 0006 A1F10E02 sub r2, r1, #14 + 503 000a 2240 ands r2, r2, r4 + 504 000c 0E1F subs r6, r1, #4 + 505 000e 50F822C0 ldr ip, [r0, r2, lsl #2] + 506 0012 D3F80080 ldr r8, [r3] + 507 0016 01EA0402 and r2, r1, r4 + 508 001a 0546 mov r5, r0 + 509 001c 50F82290 ldr r9, [r0, r2, lsl #2] + 510 0020 8A1E subs r2, r1, #2 + 511 0022 2240 ands r2, r2, r4 + 512 0024 2640 ands r6, r6, r4 + 513 0026 50F82220 ldr r2, [r0, r2, lsl #2] + 514 002a 55F82670 ldr r7, [r5, r6, lsl #2] + 515 002e 9E68 ldr r6, [r3, #8] + 516 0030 A1F10C00 sub r0, r1, #12 + 517 0034 2040 ands r0, r0, r4 + 518 0036 88FB0CCE smull ip, lr, r8, ip + 519 003a C9FB08CE smlal ip, lr, r9, r8 + 520 003e C2FB06CE smlal ip, lr, r2, r6 + 521 0042 55F82000 ldr r0, [r5, r0, lsl #2] + 522 0046 D3F81080 ldr r8, [r3, #16] + 523 004a 7246 mov r2, lr + 524 004c C6FB00C2 smlal ip, r2, r6, r0 + ARM GAS /tmp/ccdwrbgC.s page 10 + + + 525 0050 A1F10A00 sub r0, r1, #10 + 526 0054 2040 ands r0, r0, r4 + 527 0056 55F820E0 ldr lr, [r5, r0, lsl #2] + 528 005a 881F subs r0, r1, #6 + 529 005c 2040 ands r0, r0, r4 + 530 005e 55F82060 ldr r6, [r5, r0, lsl #2] + 531 0062 6046 mov r0, ip + 532 0064 C7FB0802 smlal r0, r2, r7, r8 + 533 0068 C8FB0E02 smlal r0, r2, r8, lr + 534 006c A1F10807 sub r7, r1, #8 + 535 0070 0739 subs r1, r1, #7 + 536 0072 9446 mov ip, r2 + 537 0074 2740 ands r7, r7, r4 + 538 0076 01EA0402 and r2, r1, r4 + 539 007a 9969 ldr r1, [r3, #24] + 540 007c 55F82240 ldr r4, [r5, r2, lsl #2] + 541 0080 55F82770 ldr r7, [r5, r7, lsl #2] + 542 0084 6246 mov r2, ip + 543 0086 C6FB0102 smlal r0, r2, r6, r1 + 544 008a C1FB0702 smlal r0, r2, r1, r7 + 545 008e D969 ldr r1, [r3, #28] + 546 0090 C4FB0102 smlal r0, r2, r4, r1 + 547 0094 C00F lsrs r0, r0, #31 + 548 0096 40EA4200 orr r0, r0, r2, lsl #1 + 549 009a BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 551 009e 00BF .section .text.st2_filter_init,"ax",%progbits + 552 .align 1 + 553 .p2align 2,,3 + 554 .global st2_filter_init + 555 .syntax unified + 556 .thumb + 557 .thumb_func + 558 .fpu fpv4-sp-d16 + 560 st2_filter_init: + 561 @ args = 0, pretend = 0, frame = 0 + 562 @ frame_needed = 0, uses_anonymous_args = 0 + 563 0000 1C4B ldr r3, .L72 + 564 0002 10B5 push {r4, lr} + 565 0004 1B68 ldr r3, [r3] + 566 0006 5A1E subs r2, r3, #1 + 567 0008 032A cmp r2, #3 + 568 000a 82B0 sub sp, sp, #8 + 569 000c 1BD9 bls .L71 + 570 000e 23B1 cbz r3, .L66 + 571 0010 053B subs r3, r3, #5 + 572 0012 012B cmp r3, #1 + 573 0014 01D9 bls .L66 + 574 0016 02B0 add sp, sp, #8 + 575 @ sp needed + 576 0018 10BD pop {r4, pc} + 577 .L66: + 578 001a 1748 ldr r0, .L72+4 + 579 001c 174B ldr r3, .L72+8 + 580 001e 4FF48074 mov r4, #256 + 581 0022 CDE90004 strd r0, r4, [sp] + 582 0026 0422 movs r2, #4 + 583 0028 8021 movs r1, #128 + ARM GAS /tmp/ccdwrbgC.s page 11 + + + 584 002a 1548 ldr r0, .L72+12 + 585 002c FFF7FEFF bl arm_fir_decimate_init_q31 + 586 0030 144A ldr r2, .L72+16 + 587 0032 124B ldr r3, .L72+8 + 588 0034 1448 ldr r0, .L72+20 + 589 0036 CDE90024 strd r2, r4, [sp] + 590 003a 8021 movs r1, #128 + 591 003c 0422 movs r2, #4 + 592 003e FFF7FEFF bl arm_fir_decimate_init_q31 + 593 0042 02B0 add sp, sp, #8 + 594 @ sp needed + 595 0044 10BD pop {r4, pc} + 596 .L71: + 597 0046 0C4A ldr r2, .L72+4 + 598 0048 104B ldr r3, .L72+24 + 599 004a 0D48 ldr r0, .L72+12 + 600 004c 4FF48074 mov r4, #256 + 601 0050 CDE90024 strd r2, r4, [sp] + 602 0054 8021 movs r1, #128 + 603 0056 0422 movs r2, #4 + 604 0058 FFF7FEFF bl arm_fir_decimate_init_q31 + 605 005c 094A ldr r2, .L72+16 + 606 005e 0B4B ldr r3, .L72+24 + 607 0060 0948 ldr r0, .L72+20 + 608 0062 CDE90024 strd r2, r4, [sp] + 609 0066 8021 movs r1, #128 + 610 0068 0422 movs r2, #4 + 611 006a FFF7FEFF bl arm_fir_decimate_init_q31 + 612 006e 02B0 add sp, sp, #8 + 613 @ sp needed + 614 0070 10BD pop {r4, pc} + 615 .L73: + 616 0072 00BF .align 2 + 617 .L72: + 618 0074 00000000 .word modulation + 619 0078 00000000 .word .LANCHOR13 + 620 007c 00000000 .word .LANCHOR15 + 621 0080 00000000 .word .LANCHOR8 + 622 0084 00000000 .word .LANCHOR14 + 623 0088 00000000 .word .LANCHOR9 + 624 008c 00000000 .word .LANCHOR12 + 626 .section .text.audio_filter_init,"ax",%progbits + 627 .align 1 + 628 .p2align 2,,3 + 629 .global audio_filter_init + 630 .syntax unified + 631 .thumb + 632 .thumb_func + 633 .fpu fpv4-sp-d16 + 635 audio_filter_init: + 636 @ args = 0, pretend = 0, frame = 0 + 637 @ frame_needed = 0, uses_anonymous_args = 0 + 638 0000 00B5 push {lr} + 639 0002 83B0 sub sp, sp, #12 + 640 0004 4021 movs r1, #64 + 641 0006 0091 str r1, [sp] + 642 0008 044B ldr r3, .L76 + ARM GAS /tmp/ccdwrbgC.s page 12 + + + 643 000a 054A ldr r2, .L76+4 + 644 000c 0548 ldr r0, .L76+8 + 645 000e 8021 movs r1, #128 + 646 0010 FFF7FEFF bl arm_fir_init_q31 + 647 0014 03B0 add sp, sp, #12 + 648 @ sp needed + 649 0016 5DF804FB ldr pc, [sp], #4 + 650 .L77: + 651 001a 00BF .align 2 + 652 .L76: + 653 001c 00000000 .word .LANCHOR16 + 654 0020 00000000 .word .LANCHOR17 + 655 0024 00000000 .word .LANCHOR18 + 657 .global __aeabi_ui2d + 658 .global __aeabi_ddiv + 659 .global __aeabi_i2d + 660 .global __aeabi_dmul + 661 .global __aeabi_d2iz + 662 .section .text.audio_filter_generate_coeffs,"ax",%progbits + 663 .align 1 + 664 .p2align 2,,3 + 665 .global audio_filter_generate_coeffs + 666 .syntax unified + 667 .thumb + 668 .thumb_func + 669 .fpu fpv4-sp-d16 + 671 audio_filter_generate_coeffs: + 672 @ args = 0, pretend = 0, frame = 1032 + 673 @ frame_needed = 0, uses_anonymous_args = 0 + 674 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 675 0004 2DED028B vpush.64 {d8} + 676 0008 0546 mov r5, r0 + 677 000a ADF5816D sub sp, sp, #1032 + 678 000e 5000 lsls r0, r2, #1 + 679 0010 1E46 mov r6, r3 + 680 0012 0F46 mov r7, r1 + 681 0014 FFF7FEFF bl __aeabi_ui2d + 682 0018 1FA3 adr r3, .L82 + 683 001a D3E90023 ldrd r2, [r3] + 684 001e FFF7FEFF bl __aeabi_ddiv + 685 0022 41EC180B vmov d8, r0, r1 + 686 0026 7800 lsls r0, r7, #1 + 687 0028 FFF7FEFF bl __aeabi_ui2d + 688 002c 1AA3 adr r3, .L82 + 689 002e D3E90023 ldrd r2, [r3] + 690 0032 FFF7FEFF bl __aeabi_ddiv + 691 0036 B0EE481A vmov.f32 s2, s16 + 692 003a F0EE681A vmov.f32 s3, s17 + 693 003e 41EC100B vmov d0, r0, r1 + 694 0042 0222 movs r2, #2 + 695 0044 8021 movs r1, #128 + 696 0046 6846 mov r0, sp + 697 0048 FFF7FEFF bl RectWinFIR + 698 004c B008 lsrs r0, r6, #2 + 699 004e FFF7FEFF bl __aeabi_i2d + 700 0052 0222 movs r2, #2 + 701 0054 41EC100B vmov d0, r0, r1 + ARM GAS /tmp/ccdwrbgC.s page 13 + + + 702 0058 6846 mov r0, sp + 703 005a 8021 movs r1, #128 + 704 005c FFF7FEFF bl FIRFilterWindow + 705 0060 0FA7 adr r7, .L82+8 + 706 0062 D7E90067 ldrd r6, [r7] + 707 0066 043D subs r5, r5, #4 + 708 0068 6C46 mov r4, sp + 709 006a 0DF58068 add r8, sp, #1024 + 710 .L79: + 711 006e F4E80201 ldrd r0, [r4], #8 + 712 0072 3246 mov r2, r6 + 713 0074 3B46 mov r3, r7 + 714 0076 FFF7FEFF bl __aeabi_dmul + 715 007a FFF7FEFF bl __aeabi_d2iz + 716 007e 4445 cmp r4, r8 + 717 0080 45F8040F str r0, [r5, #4]! + 718 0084 F3D1 bne .L79 + 719 0086 0DF5816D add sp, sp, #1032 + 720 @ sp needed + 721 008a BDEC028B vldm sp!, {d8} + 722 008e BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 723 .L83: + 724 0092 00BFAFF3 .align 3 + 724 0080 + 725 .L82: + 726 0098 00000000 .word 0 + 727 009c C05CD540 .word 1087724736 + 728 00a0 0000C0FF .word -4194304 + 729 00a4 FFFFDF41 .word 1105199103 + 731 .section .text.set_rx_audio_filter,"ax",%progbits + 732 .align 1 + 733 .p2align 2,,3 + 734 .global set_rx_audio_filter + 735 .syntax unified + 736 .thumb + 737 .thumb_func + 738 .fpu fpv4-sp-d16 + 740 set_rx_audio_filter: + 741 @ args = 0, pretend = 0, frame = 0 + 742 @ frame_needed = 0, uses_anonymous_args = 0 + 743 @ link register save eliminated. + 744 0000 044B ldr r3, .L85 + 745 0002 054A ldr r2, .L85+4 + 746 0004 0549 ldr r1, .L85+8 + 747 0006 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 748 0008 1268 ldr r2, [r2] + 749 000a 0968 ldr r1, [r1] + 750 000c 0448 ldr r0, .L85+12 + 751 000e FFF7FEBF b audio_filter_generate_coeffs + 752 .L86: + 753 0012 00BF .align 2 + 754 .L85: + 755 0014 00000000 .word audio_filter_beta + 756 0018 00000000 .word audio_filter_bw + 757 001c 00000000 .word audio_filter_freq + 758 0020 00000000 .word .LANCHOR17 + 760 .global st2_wide_taps + ARM GAS /tmp/ccdwrbgC.s page 14 + + + 761 .global st2_filter_taps + 762 .global ms_hbf_filter_taps + 763 .global audio_filter_coeffs + 764 .global audio_filter_state + 765 .global audio_filter_struct + 766 .global st2_filter_Q_state + 767 .global st2_filter_I_state + 768 .global st2_filter_Q_struct + 769 .global st2_filter_I_struct + 770 .global rx_signal_last + 771 .global rx_signal + 772 .global rx_nco1_increment + 773 .section .bss.I_mixed_2m_rb.3,"aw",%nobits + 774 .align 2 + 775 .set .LANCHOR6,. + 0 + 778 I_mixed_2m_rb.3: + 779 0000 00000000 .space 128 + 779 00000000 + 779 00000000 + 779 00000000 + 779 00000000 + 780 .section .bss.I_mixed_rb.6,"aw",%nobits + 781 .align 2 + 782 .set .LANCHOR2,. + 0 + 785 I_mixed_rb.6: + 786 0000 00000000 .space 256 + 786 00000000 + 786 00000000 + 786 00000000 + 786 00000000 + 787 .section .bss.Q_mixed_2m_rb.2,"aw",%nobits + 788 .align 2 + 789 .set .LANCHOR7,. + 0 + 792 Q_mixed_2m_rb.2: + 793 0000 00000000 .space 128 + 793 00000000 + 793 00000000 + 793 00000000 + 793 00000000 + 794 .section .bss.Q_mixed_rb.5,"aw",%nobits + 795 .align 2 + 796 .set .LANCHOR3,. + 0 + 799 Q_mixed_rb.5: + 800 0000 00000000 .space 256 + 800 00000000 + 800 00000000 + 800 00000000 + 800 00000000 + 801 .section .bss.audio_filter_coeffs,"aw",%nobits + 802 .align 2 + 803 .set .LANCHOR17,. + 0 + 806 audio_filter_coeffs: + 807 0000 00000000 .space 512 + 807 00000000 + 807 00000000 + 807 00000000 + 807 00000000 + ARM GAS /tmp/ccdwrbgC.s page 15 + + + 808 .section .bss.audio_filter_state,"aw",%nobits + 809 .align 2 + 810 .set .LANCHOR16,. + 0 + 813 audio_filter_state: + 814 0000 00000000 .space 764 + 814 00000000 + 814 00000000 + 814 00000000 + 814 00000000 + 815 .section .bss.audio_filter_struct,"aw",%nobits + 816 .align 2 + 817 .set .LANCHOR18,. + 0 + 820 audio_filter_struct: + 821 0000 00000000 .space 12 + 821 00000000 + 821 00000000 + 822 .section .bss.mixed_samples_2m_ringbuffer_index.4,"aw",%nobits + 823 .set .LANCHOR4,. + 0 + 826 mixed_samples_2m_ringbuffer_index.4: + 827 0000 00 .space 1 + 828 .section .bss.mixed_samples_ringbuffer_index.7,"aw",%nobits + 829 .set .LANCHOR1,. + 0 + 832 mixed_samples_ringbuffer_index.7: + 833 0000 00 .space 1 + 834 .section .bss.phase_accu.0,"aw",%nobits + 835 .align 2 + 836 .set .LANCHOR11,. + 0 + 839 phase_accu.0: + 840 0000 00000000 .space 4 + 841 .section .bss.phase_accu.1,"aw",%nobits + 842 .align 2 + 843 .set .LANCHOR10,. + 0 + 846 phase_accu.1: + 847 0000 00000000 .space 4 + 848 .section .bss.phase_accu.8,"aw",%nobits + 849 .align 2 + 850 .set .LANCHOR0,. + 0 + 853 phase_accu.8: + 854 0000 00000000 .space 4 + 855 .section .bss.rx_nco1_increment,"aw",%nobits + 856 .align 2 + 859 rx_nco1_increment: + 860 0000 00000000 .space 4 + 861 .section .bss.rx_signal,"aw",%nobits + 864 rx_signal: + 865 0000 00 .space 1 + 866 .section .bss.rx_signal_last,"aw",%nobits + 869 rx_signal_last: + 870 0000 00 .space 1 + 871 .section .bss.st2_filter_I_state,"aw",%nobits + 872 .align 2 + 873 .set .LANCHOR13,. + 0 + 876 st2_filter_I_state: + 877 0000 00000000 .space 1532 + 877 00000000 + 877 00000000 + 877 00000000 + ARM GAS /tmp/ccdwrbgC.s page 16 + + + 877 00000000 + 878 .section .bss.st2_filter_I_struct,"aw",%nobits + 879 .align 2 + 880 .set .LANCHOR8,. + 0 + 883 st2_filter_I_struct: + 884 0000 00000000 .space 12 + 884 00000000 + 884 00000000 + 885 .section .bss.st2_filter_Q_state,"aw",%nobits + 886 .align 2 + 887 .set .LANCHOR14,. + 0 + 890 st2_filter_Q_state: + 891 0000 00000000 .space 1532 + 891 00000000 + 891 00000000 + 891 00000000 + 891 00000000 + 892 .section .bss.st2_filter_Q_struct,"aw",%nobits + 893 .align 2 + 894 .set .LANCHOR9,. + 0 + 897 st2_filter_Q_struct: + 898 0000 00000000 .space 12 + 898 00000000 + 898 00000000 + 899 .section .data.ms_hbf_filter_taps,"aw" + 900 .align 2 + 901 .set .LANCHOR5,. + 0 + 904 ms_hbf_filter_taps: + 905 0000 D03AFDFF .word -181552 + 906 0004 00000000 .word 0 + 907 0008 54183400 .word 3414100 + 908 000c 00000000 .word 0 + 909 0010 2A04FFFE .word -16841686 + 910 0014 00000000 .word 0 + 911 0018 A9A5D004 .word 80782761 + 912 001c 00000008 .word 134217728 + 913 0020 A9A5D004 .word 80782761 + 914 0024 00000000 .word 0 + 915 0028 2A04FFFE .word -16841686 + 916 002c 00000000 .word 0 + 917 0030 54183400 .word 3414100 + 918 0034 00000000 .word 0 + 919 0038 D03AFDFF .word -181552 + 920 .section .data.st2_filter_taps,"aw" + 921 .align 2 + 922 .set .LANCHOR12,. + 0 + 925 st2_filter_taps: + 926 0000 D9D0EEFF .word -1126183 + 927 0004 A2D1EFFF .word -1060446 + 928 0008 BAB9F0FF .word -1001030 + 929 000c C297F1FF .word -944190 + 930 0010 5B7CF2FF .word -885669 + 931 0014 037AF3FF .word -820733 + 932 0018 F4A4F4FF .word -744204 + 933 001c F512F6FF .word -650507 + 934 0020 2EDBF7FF .word -533714 + 935 0024 EE15FAFF .word -387602 + ARM GAS /tmp/ccdwrbgC.s page 17 + + + 936 0028 75DCFCFF .word -205707 + 937 002c B1480000 .word 18609 + 938 0030 FE740400 .word 292094 + 939 0034 E37B0900 .word 621539 + 940 0038 C3770F00 .word 1013699 + 941 003c 99821600 .word 1475225 + 942 0040 AEB51E00 .word 2012590 + 943 0044 49292800 .word 2632009 + 944 0048 67F43200 .word 3339367 + 945 004c 732C3F00 .word 4140147 + 946 0050 FBE44C00 .word 5039355 + 947 0054 6E2F5C00 .word 6041454 + 948 0058 DA1A6D00 .word 7150298 + 949 005c ACB37F00 .word 8369068 + 950 0060 7B039400 .word 9700219 + 951 0064 D310AA00 .word 11145427 + 952 0068 06DFC100 .word 12705542 + 953 006c 096EDB00 .word 14380553 + 954 0070 52BAF600 .word 16169554 + 955 0074 C0BC1301 .word 18070720 + 956 0078 8A6A3201 .word 20081290 + 957 007c 38B55201 .word 22197560 + 958 0080 A28A7401 .word 24414882 + 959 0084 F7D49701 .word 26727671 + 960 0088 D27ABC01 .word 29129426 + 961 008c 4D5FE201 .word 31612749 + 962 0090 28620902 .word 34169384 + 963 0094 F15F3102 .word 36790257 + 964 0098 31325A02 .word 39465521 + 965 009c AEAF8302 .word 42184622 + 966 00a0 A2ACAD02 .word 44936354 + 967 00a4 08FBD702 .word 47708936 + 968 00a8 E66A0203 .word 50490086 + 969 00ac 9ECA2C03 .word 53267102 + 970 00b0 48E75603 .word 56026952 + 971 00b4 0C8D8003 .word 58756364 + 972 00b8 7E87A903 .word 61441918 + 973 00bc 01A2D103 .word 64070145 + 974 00c0 2AA8F803 .word 66627626 + 975 00c4 20661E04 .word 69101088 + 976 00c8 00A94204 .word 71477504 + 977 00cc 413F6504 .word 73744193 + 978 00d0 12F98504 .word 75888914 + 979 00d4 BAA8A404 .word 77899962 + 980 00d8 EC22C104 .word 79766252 + 981 00dc 253FDB04 .word 81477413 + 982 00e0 F6D7F204 .word 83023862 + 983 00e4 51CB0705 .word 84396881 + 984 00e8 CEFA1905 .word 85588686 + 985 00ec E64B2905 .word 86592486 + 986 00f0 2CA83505 .word 87402540 + 987 00f4 76FD3E05 .word 88014198 + 988 00f8 033E4505 .word 88423939 + 989 00fc 9B604805 .word 88629403 + 990 0100 9B604805 .word 88629403 + 991 0104 033E4505 .word 88423939 + 992 0108 76FD3E05 .word 88014198 + ARM GAS /tmp/ccdwrbgC.s page 18 + + + 993 010c 2CA83505 .word 87402540 + 994 0110 E64B2905 .word 86592486 + 995 0114 CEFA1905 .word 85588686 + 996 0118 51CB0705 .word 84396881 + 997 011c F6D7F204 .word 83023862 + 998 0120 253FDB04 .word 81477413 + 999 0124 EC22C104 .word 79766252 + 1000 0128 BAA8A404 .word 77899962 + 1001 012c 12F98504 .word 75888914 + 1002 0130 413F6504 .word 73744193 + 1003 0134 00A94204 .word 71477504 + 1004 0138 20661E04 .word 69101088 + 1005 013c 2AA8F803 .word 66627626 + 1006 0140 01A2D103 .word 64070145 + 1007 0144 7E87A903 .word 61441918 + 1008 0148 0C8D8003 .word 58756364 + 1009 014c 48E75603 .word 56026952 + 1010 0150 9ECA2C03 .word 53267102 + 1011 0154 E66A0203 .word 50490086 + 1012 0158 08FBD702 .word 47708936 + 1013 015c A2ACAD02 .word 44936354 + 1014 0160 AEAF8302 .word 42184622 + 1015 0164 31325A02 .word 39465521 + 1016 0168 F15F3102 .word 36790257 + 1017 016c 28620902 .word 34169384 + 1018 0170 4D5FE201 .word 31612749 + 1019 0174 D27ABC01 .word 29129426 + 1020 0178 F7D49701 .word 26727671 + 1021 017c A28A7401 .word 24414882 + 1022 0180 38B55201 .word 22197560 + 1023 0184 8A6A3201 .word 20081290 + 1024 0188 C0BC1301 .word 18070720 + 1025 018c 52BAF600 .word 16169554 + 1026 0190 096EDB00 .word 14380553 + 1027 0194 06DFC100 .word 12705542 + 1028 0198 D310AA00 .word 11145427 + 1029 019c 7B039400 .word 9700219 + 1030 01a0 ACB37F00 .word 8369068 + 1031 01a4 DA1A6D00 .word 7150298 + 1032 01a8 6E2F5C00 .word 6041454 + 1033 01ac FBE44C00 .word 5039355 + 1034 01b0 732C3F00 .word 4140147 + 1035 01b4 67F43200 .word 3339367 + 1036 01b8 49292800 .word 2632009 + 1037 01bc AEB51E00 .word 2012590 + 1038 01c0 99821600 .word 1475225 + 1039 01c4 C3770F00 .word 1013699 + 1040 01c8 E37B0900 .word 621539 + 1041 01cc FE740400 .word 292094 + 1042 01d0 B1480000 .word 18609 + 1043 01d4 75DCFCFF .word -205707 + 1044 01d8 EE15FAFF .word -387602 + 1045 01dc 2EDBF7FF .word -533714 + 1046 01e0 F512F6FF .word -650507 + 1047 01e4 F4A4F4FF .word -744204 + 1048 01e8 037AF3FF .word -820733 + 1049 01ec 5B7CF2FF .word -885669 + ARM GAS /tmp/ccdwrbgC.s page 19 + + + 1050 01f0 C297F1FF .word -944190 + 1051 01f4 BAB9F0FF .word -1001030 + 1052 01f8 A2D1EFFF .word -1060446 + 1053 01fc D9D0EEFF .word -1126183 + 1054 .section .data.st2_wide_taps,"aw" + 1055 .align 2 + 1056 .set .LANCHOR15,. + 0 + 1059 st2_wide_taps: + 1060 0000 4681FEFF .word -97978 + 1061 0004 D01E0500 .word 335568 + 1062 0008 8FE20B00 .word 778895 + 1063 000c A4A21200 .word 1221284 + 1064 0010 44231900 .word 1647428 + 1065 0014 D7101F00 .word 2035927 + 1066 0018 ACFD2300 .word 2358700 + 1067 001c 39642700 .word 2581561 + 1068 0020 89AE2800 .word 2666121 + 1069 0024 D3422700 .word 2573011 + 1070 0028 7F942200 .word 2266239 + 1071 002c 4F381A00 .word 1718351 + 1072 0030 C0F90D00 .word 915904 + 1073 0034 53EFFDFF .word -135341 + 1074 0038 408BEAFF .word -1406144 + 1075 003c 0BA6D4FF .word -2841077 + 1076 0040 C780BDFF .word -4357945 + 1077 0044 62BDA6FF .word -5849758 + 1078 0048 164C92FF .word -7189482 + 1079 004c 014E82FF .word -8237567 + 1080 0050 11EE78FF .word -8851951 + 1081 0054 4E3278FF .word -8900018 + 1082 0058 C5C881FF .word -8271675 + 1083 005c DBD396FF .word -6892581 + 1084 0060 9DBAB7FF .word -4736355 + 1085 0064 9901E4FF .word -1834599 + 1086 0068 D2301A00 .word 1716434 + 1087 006c 98CA5700 .word 5753496 + 1088 0070 4A569900 .word 10049098 + 1089 0074 9880DA00 .word 14319768 + 1090 0078 5C511601 .word 18239836 + 1091 007c 73754701 .word 21460339 + 1092 0080 37996801 .word 23632183 + 1093 0084 A9CE7401 .word 24432297 + 1094 0088 FFF86701 .word 23591167 + 1095 008c 3B363F01 .word 20919867 + 1096 0090 F53EF900 .word 16334581 + 1097 0094 86B49600 .word 9876614 + 1098 0098 55561A00 .word 1726037 + 1099 009c 3C1889FF .word -7792580 + 1100 00a0 A115EAFE .word -18213471 + 1101 00a4 085F46FE .word -28942584 + 1102 00a8 52A2A8FD .word -39280046 + 1103 00ac 57B01CFD .word -48451497 + 1104 00b0 3CE5AEFC .word -55646916 + 1105 00b4 047B6BFC .word -60065020 + 1106 00b8 E7CF5DFC .word -60960793 + 1107 00bc 60AB8FFC .word -57693344 + 1108 00c0 708D08FD .word -49771152 + ARM GAS /tmp/ccdwrbgC.s page 20 + + + 1109 00c4 CD13CDFD .word -36891699 + 1110 00c8 987FDEFE .word -18972776 + 1111 00cc F1643A00 .word 3826929 + 1112 00d0 538BDA01 .word 31099731 + 1113 00d4 FA02B503 .word 62194426 + 1114 00d8 5E70BC05 .word 96235614 + 1115 00dc 918BE007 .word 132156305 + 1116 00e0 FCCD0E0A .word 168742396 + 1117 00e4 F345330C .word 204686835 + 1118 00e8 1585390E .word 238650645 + 1119 00ec 7E9C0D10 .word 269327486 + 1120 00f0 B9189D11 .word 295508153 + 1121 00f4 1AEFD712 .word 316141338 + 1122 00f8 CE4EB113 .word 330387150 + 1123 00fc 7B492014 .word 337660283 + 1124 0100 7B492014 .word 337660283 + 1125 0104 CE4EB113 .word 330387150 + 1126 0108 1AEFD712 .word 316141338 + 1127 010c B9189D11 .word 295508153 + 1128 0110 7E9C0D10 .word 269327486 + 1129 0114 1585390E .word 238650645 + 1130 0118 F345330C .word 204686835 + 1131 011c FCCD0E0A .word 168742396 + 1132 0120 918BE007 .word 132156305 + 1133 0124 5E70BC05 .word 96235614 + 1134 0128 FA02B503 .word 62194426 + 1135 012c 538BDA01 .word 31099731 + 1136 0130 F1643A00 .word 3826929 + 1137 0134 987FDEFE .word -18972776 + 1138 0138 CD13CDFD .word -36891699 + 1139 013c 708D08FD .word -49771152 + 1140 0140 60AB8FFC .word -57693344 + 1141 0144 E7CF5DFC .word -60960793 + 1142 0148 047B6BFC .word -60065020 + 1143 014c 3CE5AEFC .word -55646916 + 1144 0150 57B01CFD .word -48451497 + 1145 0154 52A2A8FD .word -39280046 + 1146 0158 085F46FE .word -28942584 + 1147 015c A115EAFE .word -18213471 + 1148 0160 3C1889FF .word -7792580 + 1149 0164 55561A00 .word 1726037 + 1150 0168 86B49600 .word 9876614 + 1151 016c F53EF900 .word 16334581 + 1152 0170 3B363F01 .word 20919867 + 1153 0174 FFF86701 .word 23591167 + 1154 0178 A9CE7401 .word 24432297 + 1155 017c 37996801 .word 23632183 + 1156 0180 73754701 .word 21460339 + 1157 0184 5C511601 .word 18239836 + 1158 0188 9880DA00 .word 14319768 + 1159 018c 4A569900 .word 10049098 + 1160 0190 98CA5700 .word 5753496 + 1161 0194 D2301A00 .word 1716434 + 1162 0198 9901E4FF .word -1834599 + 1163 019c 9DBAB7FF .word -4736355 + 1164 01a0 DBD396FF .word -6892581 + 1165 01a4 C5C881FF .word -8271675 + ARM GAS /tmp/ccdwrbgC.s page 21 + + + 1166 01a8 4E3278FF .word -8900018 + 1167 01ac 11EE78FF .word -8851951 + 1168 01b0 014E82FF .word -8237567 + 1169 01b4 164C92FF .word -7189482 + 1170 01b8 62BDA6FF .word -5849758 + 1171 01bc C780BDFF .word -4357945 + 1172 01c0 0BA6D4FF .word -2841077 + 1173 01c4 408BEAFF .word -1406144 + 1174 01c8 53EFFDFF .word -135341 + 1175 01cc C0F90D00 .word 915904 + 1176 01d0 4F381A00 .word 1718351 + 1177 01d4 7F942200 .word 2266239 + 1178 01d8 D3422700 .word 2573011 + 1179 01dc 89AE2800 .word 2666121 + 1180 01e0 39642700 .word 2581561 + 1181 01e4 ACFD2300 .word 2358700 + 1182 01e8 D7101F00 .word 2035927 + 1183 01ec 44231900 .word 1647428 + 1184 01f0 A4A21200 .word 1221284 + 1185 01f4 8FE20B00 .word 778895 + 1186 01f8 D01E0500 .word 335568 + 1187 01fc 4681FEFF .word -97978 + 1188 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccdwrbgC.s page 22 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 rx.c + /tmp/ccdwrbgC.s:16 .text.rx_mixer:0000000000000000 $t + /tmp/ccdwrbgC.s:25 .text.rx_mixer:0000000000000000 rx_mixer + /tmp/ccdwrbgC.s:281 .text.rx_mixer:0000000000000300 $d + /tmp/ccdwrbgC.s:294 .text.am_demodulator:0000000000000000 $t + /tmp/ccdwrbgC.s:302 .text.am_demodulator:0000000000000000 am_demodulator + /tmp/ccdwrbgC.s:328 .text.ssb_demodulator:0000000000000000 $t + /tmp/ccdwrbgC.s:336 .text.ssb_demodulator:0000000000000000 ssb_demodulator + /tmp/ccdwrbgC.s:398 .text.ssb_demodulator:000000000000009c $d + /tmp/ccdwrbgC.s:404 .text.dc_demodulator:0000000000000000 $t + /tmp/ccdwrbgC.s:412 .text.dc_demodulator:0000000000000000 dc_demodulator + /tmp/ccdwrbgC.s:438 .text.dc_demodulator:0000000000000030 $d + /tmp/ccdwrbgC.s:441 .text.nco:0000000000000000 $t + /tmp/ccdwrbgC.s:449 .text.nco:0000000000000000 nco + /tmp/ccdwrbgC.s:484 .text.nco:0000000000000048 $d + /tmp/ccdwrbgC.s:489 .text.hb_fir15:0000000000000000 $t + /tmp/ccdwrbgC.s:497 .text.hb_fir15:0000000000000000 hb_fir15 + /tmp/ccdwrbgC.s:552 .text.st2_filter_init:0000000000000000 $t + /tmp/ccdwrbgC.s:560 .text.st2_filter_init:0000000000000000 st2_filter_init + /tmp/ccdwrbgC.s:618 .text.st2_filter_init:0000000000000074 $d + /tmp/ccdwrbgC.s:627 .text.audio_filter_init:0000000000000000 $t + /tmp/ccdwrbgC.s:635 .text.audio_filter_init:0000000000000000 audio_filter_init + /tmp/ccdwrbgC.s:653 .text.audio_filter_init:000000000000001c $d + /tmp/ccdwrbgC.s:663 .text.audio_filter_generate_coeffs:0000000000000000 $t + /tmp/ccdwrbgC.s:671 .text.audio_filter_generate_coeffs:0000000000000000 audio_filter_generate_coeffs + /tmp/ccdwrbgC.s:726 .text.audio_filter_generate_coeffs:0000000000000098 $d + /tmp/ccdwrbgC.s:732 .text.set_rx_audio_filter:0000000000000000 $t + /tmp/ccdwrbgC.s:740 .text.set_rx_audio_filter:0000000000000000 set_rx_audio_filter + /tmp/ccdwrbgC.s:755 .text.set_rx_audio_filter:0000000000000014 $d + /tmp/ccdwrbgC.s:1059 .data.st2_wide_taps:0000000000000000 st2_wide_taps + /tmp/ccdwrbgC.s:925 .data.st2_filter_taps:0000000000000000 st2_filter_taps + /tmp/ccdwrbgC.s:904 .data.ms_hbf_filter_taps:0000000000000000 ms_hbf_filter_taps + /tmp/ccdwrbgC.s:806 .bss.audio_filter_coeffs:0000000000000000 audio_filter_coeffs + /tmp/ccdwrbgC.s:813 .bss.audio_filter_state:0000000000000000 audio_filter_state + /tmp/ccdwrbgC.s:820 .bss.audio_filter_struct:0000000000000000 audio_filter_struct + /tmp/ccdwrbgC.s:890 .bss.st2_filter_Q_state:0000000000000000 st2_filter_Q_state + /tmp/ccdwrbgC.s:876 .bss.st2_filter_I_state:0000000000000000 st2_filter_I_state + /tmp/ccdwrbgC.s:897 .bss.st2_filter_Q_struct:0000000000000000 st2_filter_Q_struct + /tmp/ccdwrbgC.s:883 .bss.st2_filter_I_struct:0000000000000000 st2_filter_I_struct + /tmp/ccdwrbgC.s:869 .bss.rx_signal_last:0000000000000000 rx_signal_last + /tmp/ccdwrbgC.s:864 .bss.rx_signal:0000000000000000 rx_signal + /tmp/ccdwrbgC.s:859 .bss.rx_nco1_increment:0000000000000000 rx_nco1_increment + /tmp/ccdwrbgC.s:774 .bss.I_mixed_2m_rb.3:0000000000000000 $d + /tmp/ccdwrbgC.s:778 .bss.I_mixed_2m_rb.3:0000000000000000 I_mixed_2m_rb.3 + /tmp/ccdwrbgC.s:781 .bss.I_mixed_rb.6:0000000000000000 $d + /tmp/ccdwrbgC.s:785 .bss.I_mixed_rb.6:0000000000000000 I_mixed_rb.6 + /tmp/ccdwrbgC.s:788 .bss.Q_mixed_2m_rb.2:0000000000000000 $d + /tmp/ccdwrbgC.s:792 .bss.Q_mixed_2m_rb.2:0000000000000000 Q_mixed_2m_rb.2 + /tmp/ccdwrbgC.s:795 .bss.Q_mixed_rb.5:0000000000000000 $d + /tmp/ccdwrbgC.s:799 .bss.Q_mixed_rb.5:0000000000000000 Q_mixed_rb.5 + /tmp/ccdwrbgC.s:802 .bss.audio_filter_coeffs:0000000000000000 $d + /tmp/ccdwrbgC.s:809 .bss.audio_filter_state:0000000000000000 $d + /tmp/ccdwrbgC.s:816 .bss.audio_filter_struct:0000000000000000 $d + /tmp/ccdwrbgC.s:826 .bss.mixed_samples_2m_ringbuffer_index.4:0000000000000000 mixed_samples_2m_ringbuffer_index.4 + /tmp/ccdwrbgC.s:827 .bss.mixed_samples_2m_ringbuffer_index.4:0000000000000000 $d + /tmp/ccdwrbgC.s:832 .bss.mixed_samples_ringbuffer_index.7:0000000000000000 mixed_samples_ringbuffer_index.7 + ARM GAS /tmp/ccdwrbgC.s page 23 + + + /tmp/ccdwrbgC.s:833 .bss.mixed_samples_ringbuffer_index.7:0000000000000000 $d + /tmp/ccdwrbgC.s:835 .bss.phase_accu.0:0000000000000000 $d + /tmp/ccdwrbgC.s:839 .bss.phase_accu.0:0000000000000000 phase_accu.0 + /tmp/ccdwrbgC.s:842 .bss.phase_accu.1:0000000000000000 $d + /tmp/ccdwrbgC.s:846 .bss.phase_accu.1:0000000000000000 phase_accu.1 + /tmp/ccdwrbgC.s:849 .bss.phase_accu.8:0000000000000000 $d + /tmp/ccdwrbgC.s:853 .bss.phase_accu.8:0000000000000000 phase_accu.8 + /tmp/ccdwrbgC.s:856 .bss.rx_nco1_increment:0000000000000000 $d + /tmp/ccdwrbgC.s:865 .bss.rx_signal:0000000000000000 $d + /tmp/ccdwrbgC.s:870 .bss.rx_signal_last:0000000000000000 $d + /tmp/ccdwrbgC.s:872 .bss.st2_filter_I_state:0000000000000000 $d + /tmp/ccdwrbgC.s:879 .bss.st2_filter_I_struct:0000000000000000 $d + /tmp/ccdwrbgC.s:886 .bss.st2_filter_Q_state:0000000000000000 $d + /tmp/ccdwrbgC.s:893 .bss.st2_filter_Q_struct:0000000000000000 $d + /tmp/ccdwrbgC.s:900 .data.ms_hbf_filter_taps:0000000000000000 $d + /tmp/ccdwrbgC.s:921 .data.st2_filter_taps:0000000000000000 $d + /tmp/ccdwrbgC.s:1055 .data.st2_wide_taps:0000000000000000 $d + +UNDEFINED SYMBOLS +ringbuf_increment +arm_fir_decimate_q31 +sat_mult_q31 +modulation +volume +arm_fir_decimate_init_q31 +arm_fir_init_q31 +__aeabi_ui2d +__aeabi_ddiv +__aeabi_i2d +__aeabi_dmul +__aeabi_d2iz +RectWinFIR +FIRFilterWindow +audio_filter_beta +audio_filter_bw +audio_filter_freq diff --git a/codice/build/rx.o b/codice/build/rx.o new file mode 100644 index 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+++ b/codice/build/si5351.d @@ -0,0 +1,86 @@ +build/si5351.o: Core/Src/si5351.c Core/Inc/main.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h \ + Core/Inc/si5351.h +Core/Inc/main.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: +Core/Inc/si5351.h: diff --git a/codice/build/si5351.lst b/codice/build/si5351.lst new file mode 100644 index 0000000..6e8de91 --- /dev/null +++ b/codice/build/si5351.lst @@ -0,0 +1,972 @@ +ARM GAS /tmp/ccKBFxXV.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "si5351.c" + 14 .text + 15 .section .text.si5351_write8,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global si5351_write8 + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 si5351_write8: + 26 @ args = 0, pretend = 0, frame = 8 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 30B5 push {r4, r5, lr} + 29 0002 87B0 sub sp, sp, #28 + 30 0004 0C4C ldr r4, .L6 + 31 0006 8DF81710 strb r1, [sp, #23] + 32 000a 0546 mov r5, r0 + 33 .L2: + 34 000c 6423 movs r3, #100 + 35 000e 0322 movs r2, #3 + 36 0010 C021 movs r1, #192 + 37 0012 2046 mov r0, r4 + 38 0014 FFF7FEFF bl HAL_I2C_IsDeviceReady + 39 0018 0028 cmp r0, #0 + 40 001a F7D1 bne .L2 + 41 001c 0123 movs r3, #1 + 42 001e 0DF11702 add r2, sp, #23 + 43 0022 6421 movs r1, #100 + 44 0024 CDE90131 strd r3, r1, [sp, #4] + 45 0028 0092 str r2, [sp] + 46 002a C021 movs r1, #192 + 47 002c 2A46 mov r2, r5 + 48 002e 0248 ldr r0, .L6 + 49 0030 FFF7FEFF bl HAL_I2C_Mem_Write + 50 0034 07B0 add sp, sp, #28 + 51 @ sp needed + 52 0036 30BD pop {r4, r5, pc} + 53 .L7: + 54 .align 2 + 55 .L6: + 56 0038 00000000 .word hi2c1 + 58 .section .text.si5351_read8,"ax",%progbits + 59 .align 1 + ARM GAS /tmp/ccKBFxXV.s page 2 + + + 60 .p2align 2,,3 + 61 .global si5351_read8 + 62 .syntax unified + 63 .thumb + 64 .thumb_func + 65 .fpu fpv4-sp-d16 + 67 si5351_read8: + 68 @ args = 0, pretend = 0, frame = 8 + 69 @ frame_needed = 0, uses_anonymous_args = 0 + 70 0000 30B5 push {r4, r5, lr} + 71 0002 87B0 sub sp, sp, #28 + 72 0004 0B4C ldr r4, .L12 + 73 0006 0591 str r1, [sp, #20] + 74 0008 0546 mov r5, r0 + 75 .L9: + 76 000a 6423 movs r3, #100 + 77 000c 0322 movs r2, #3 + 78 000e C021 movs r1, #192 + 79 0010 2046 mov r0, r4 + 80 0012 FFF7FEFF bl HAL_I2C_IsDeviceReady + 81 0016 0028 cmp r0, #0 + 82 0018 F7D1 bne .L9 + 83 001a 0123 movs r3, #1 + 84 001c 05AA add r2, sp, #20 + 85 001e 6421 movs r1, #100 + 86 0020 CDE90131 strd r3, r1, [sp, #4] + 87 0024 0092 str r2, [sp] + 88 0026 C021 movs r1, #192 + 89 0028 2A46 mov r2, r5 + 90 002a 0248 ldr r0, .L12 + 91 002c FFF7FEFF bl HAL_I2C_Mem_Read + 92 0030 07B0 add sp, sp, #28 + 93 @ sp needed + 94 0032 30BD pop {r4, r5, pc} + 95 .L13: + 96 .align 2 + 97 .L12: + 98 0034 00000000 .word hi2c1 + 100 .global __aeabi_ui2d + 101 .global __aeabi_ddiv + 102 .global __aeabi_d2uiz + 103 .global __aeabi_d2iz + 104 .global __aeabi_i2d + 105 .global __aeabi_dsub + 106 .global __aeabi_dmul + 107 .global __aeabi_dadd + 108 .section .text.CalcRegisters,"ax",%progbits + 109 .align 1 + 110 .p2align 2,,3 + 111 .global CalcRegisters + 112 .syntax unified + 113 .thumb + 114 .thumb_func + 115 .fpu fpv4-sp-d16 + 117 CalcRegisters: + 118 @ args = 0, pretend = 0, frame = 0 + 119 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccKBFxXV.s page 3 + + + 120 0000 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} + 121 0004 984B ldr r3, .L40+24 + 122 0006 9842 cmp r0, r3 + 123 0008 0546 mov r5, r0 + 124 000a 0C46 mov r4, r1 + 125 000c 66D9 bls .L15 + 126 000e 4FF00008 mov r8, #0 + 127 0012 8000 lsls r0, r0, #2 + 128 0014 C246 mov r10, r8 + 129 0016 4FF00C09 mov r9, #12 + 130 .L16: + 131 001a FFF7FEFF bl __aeabi_ui2d + 132 001e 8CA3 adr r3, .L40 + 133 0020 D3E90023 ldrd r2, [r3] + 134 0024 FFF7FEFF bl __aeabi_ddiv + 135 0028 0F46 mov r7, r1 + 136 002a 0646 mov r6, r0 + 137 002c FFF7FEFF bl __aeabi_d2iz + 138 0030 0546 mov r5, r0 + 139 0032 FFF7FEFF bl __aeabi_i2d + 140 0036 0246 mov r2, r0 + 141 0038 0B46 mov r3, r1 + 142 003a 3046 mov r0, r6 + 143 003c 3946 mov r1, r7 + 144 003e FFF7FEFF bl __aeabi_dsub + 145 0042 85A3 adr r3, .L40+8 + 146 0044 D3E90023 ldrd r2, [r3] + 147 0048 0646 mov r6, r0 + 148 004a 0F46 mov r7, r1 + 149 004c FFF7FEFF bl __aeabi_dmul + 150 0050 FFF7FEFF bl __aeabi_d2uiz + 151 0054 8346 mov fp, r0 + 152 0056 E0B3 cbz r0, .L31 + 153 0058 FFF7FEFF bl __aeabi_ui2d + 154 005c 3246 mov r2, r6 + 155 005e 3B46 mov r3, r7 + 156 0060 FFF7FEFF bl __aeabi_ddiv + 157 0064 814B ldr r3, .L40+28 + 158 0066 0022 movs r2, #0 + 159 0068 FFF7FEFF bl __aeabi_dadd + 160 006c FFF7FEFF bl __aeabi_d2uiz + 161 0070 7F4A ldr r2, .L40+32 + 162 0072 9042 cmp r0, r2 + 163 0074 28BF it cs + 164 0076 1046 movcs r0, r2 + 165 0078 010B lsrs r1, r0, #12 + 166 007a 01F0F001 and r1, r1, #240 + 167 007e C0F30722 ubfx r2, r0, #8, #8 + 168 0082 C3B2 uxtb r3, r0 + 169 .L23: + 170 0084 ED01 lsls r5, r5, #7 + 171 0086 A5F50075 sub r5, r5, #512 + 172 008a 4FEACB1B lsl fp, fp, #7 + 173 008e 2270 strb r2, [r4] + 174 0090 BBFBF0F2 udiv r2, fp, r0 + 175 0094 1544 add r5, r5, r2 + 176 0096 6370 strb r3, [r4, #1] + ARM GAS /tmp/ccKBFxXV.s page 4 + + + 177 0098 00FB12B3 mls r3, r0, r2, fp + 178 009c C5F30142 ubfx r2, r5, #16, #2 + 179 00a0 41EA1341 orr r1, r1, r3, lsr #16 + 180 00a4 A270 strb r2, [r4, #2] + 181 00a6 2A0A lsrs r2, r5, #8 + 182 00a8 E270 strb r2, [r4, #3] + 183 00aa 180A lsrs r0, r3, #8 + 184 00ac 0022 movs r2, #0 + 185 00ae 6171 strb r1, [r4, #5] + 186 00b0 0121 movs r1, #1 + 187 00b2 84F80A90 strb r9, [r4, #10] + 188 00b6 84F80BA0 strb r10, [r4, #11] + 189 00ba 84F80C80 strb r8, [r4, #12] + 190 00be A071 strb r0, [r4, #6] + 191 00c0 2571 strb r5, [r4, #4] + 192 00c2 E371 strb r3, [r4, #7] + 193 00c4 2272 strb r2, [r4, #8] + 194 00c6 6172 strb r1, [r4, #9] + 195 00c8 6273 strb r2, [r4, #13] + 196 00ca A273 strb r2, [r4, #14] + 197 00cc E273 strb r2, [r4, #15] + 198 00ce BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} + 199 .L31: + 200 00d2 FF23 movs r3, #255 + 201 00d4 6648 ldr r0, .L40+32 + 202 00d6 F021 movs r1, #240 + 203 00d8 1A46 mov r2, r3 + 204 00da D3E7 b .L23 + 205 .L15: + 206 00dc 654B ldr r3, .L40+36 + 207 00de 9842 cmp r0, r3 + 208 00e0 52D8 bhi .L17 + 209 00e2 B3EB400F cmp r3, r0, lsl #1 + 210 00e6 4FEA4007 lsl r7, r0, #1 + 211 00ea C0F09D80 bcc .L24 + 212 00ee B3EB800F cmp r3, r0, lsl #2 + 213 00f2 4FEA8007 lsl r7, r0, #2 + 214 00f6 C0F09B80 bcc .L25 + 215 00fa B3EBC00F cmp r3, r0, lsl #3 + 216 00fe 4FEAC007 lsl r7, r0, #3 + 217 0102 C0F09980 bcc .L26 + 218 0106 B3EB001F cmp r3, r0, lsl #4 + 219 010a 4FEA0017 lsl r7, r0, #4 + 220 010e C0F08780 bcc .L27 + 221 0112 B3EB401F cmp r3, r0, lsl #5 + 222 0116 4FEA4017 lsl r7, r0, #5 + 223 011a C0F09180 bcc .L28 + 224 011e B3EB801F cmp r3, r0, lsl #6 + 225 0122 4FEA8017 lsl r7, r0, #6 + 226 0126 C0F08F80 bcc .L29 + 227 012a C701 lsls r7, r0, #7 + 228 012c 4FF00709 mov r9, #7 + 229 0130 8026 movs r6, #128 + 230 .L18: + 231 0132 3846 mov r0, r7 + 232 0134 FFF7FEFF bl __aeabi_ui2d + 233 0138 0B46 mov r3, r1 + ARM GAS /tmp/ccKBFxXV.s page 5 + + + 234 013a 0246 mov r2, r0 + 235 013c 48A1 adr r1, .L40+16 + 236 013e D1E90001 ldrd r0, [r1] + 237 0142 FFF7FEFF bl __aeabi_ddiv + 238 0146 FFF7FEFF bl __aeabi_d2uiz + 239 014a 10F0010F tst r0, #1 + 240 014e 8246 mov r10, r0 + 241 0150 494B ldr r3, .L40+40 + 242 0152 18BF it ne + 243 0154 00F1010A addne r10, r0, #1 + 244 0158 07FB0AF0 mul r0, r7, r10 + 245 015c 9842 cmp r0, r3 + 246 015e 4FEA0919 lsl r9, r9, #4 + 247 0162 06FB05F0 mul r0, r6, r5 + 248 0166 4AD9 bls .L20 + 249 0168 0AFB00F0 mul r0, r10, r0 + 250 016c 0AF1007A add r10, r10, #33554432 + 251 0170 AAF1040A sub r10, r10, #4 + 252 0174 4FEACA18 lsl r8, r10, #7 + 253 0178 CAF34123 ubfx r3, r10, #9, #2 + 254 017c 5FFA88F8 uxtb r8, r8 + 255 0180 9944 add r9, r9, r3 + 256 0182 CAF3470A ubfx r10, r10, #1, #8 + 257 0186 48E7 b .L16 + 258 .L17: + 259 0188 FFF7FEFF bl __aeabi_ui2d + 260 018c 0246 mov r2, r0 + 261 018e 0B46 mov r3, r1 + 262 0190 33A1 adr r1, .L40+16 + 263 0192 D1E90001 ldrd r0, [r1] + 264 0196 FFF7FEFF bl __aeabi_ddiv + 265 019a FFF7FEFF bl __aeabi_d2uiz + 266 019e 0528 cmp r0, #5 + 267 01a0 8246 mov r10, r0 + 268 01a2 16D9 bls .L30 + 269 01a4 10F0010F tst r0, #1 + 270 01a8 01D0 beq .L21 + 271 01aa 00F1010A add r10, r0, #1 + 272 .L21: + 273 01ae 324B ldr r3, .L40+40 + 274 01b0 05FB0AF0 mul r0, r5, r10 + 275 01b4 9842 cmp r0, r3 + 276 01b6 13D9 bls .L22 + 277 .L39: + 278 01b8 0AF1007A add r10, r10, #33554432 + 279 01bc AAF1040A sub r10, r10, #4 + 280 01c0 4FEACA18 lsl r8, r10, #7 + 281 01c4 CAF34129 ubfx r9, r10, #9, #2 + 282 01c8 5FFA88F8 uxtb r8, r8 + 283 01cc CAF3470A ubfx r10, r10, #1, #8 + 284 01d0 23E7 b .L16 + 285 .L30: + 286 01d2 294B ldr r3, .L40+40 + 287 01d4 4FF0060A mov r10, #6 + 288 01d8 05FB0AF0 mul r0, r5, r10 + 289 01dc 9842 cmp r0, r3 + 290 01de EBD8 bhi .L39 + ARM GAS /tmp/ccKBFxXV.s page 6 + + + 291 .L22: + 292 01e0 0AF1007A add r10, r10, #33554432 + 293 01e4 AAF1020A sub r10, r10, #2 + 294 01e8 4FEACA18 lsl r8, r10, #7 + 295 01ec CAF34129 ubfx r9, r10, #9, #2 + 296 01f0 00EB4500 add r0, r0, r5, lsl #1 + 297 01f4 CAF3470A ubfx r10, r10, #1, #8 + 298 01f8 5FFA88F8 uxtb r8, r8 + 299 01fc 0DE7 b .L16 + 300 .L20: + 301 01fe 0AF10073 add r3, r10, #33554432 + 302 0202 023B subs r3, r3, #2 + 303 0204 0AF1020A add r10, r10, #2 + 304 0208 4FEAC318 lsl r8, r3, #7 + 305 020c C3F34122 ubfx r2, r3, #9, #2 + 306 0210 00FB0AF0 mul r0, r0, r10 + 307 0214 5FFA88F8 uxtb r8, r8 + 308 0218 9144 add r9, r9, r2 + 309 021a C3F3470A ubfx r10, r3, #1, #8 + 310 021e FCE6 b .L16 + 311 .L27: + 312 0220 4FF00409 mov r9, #4 + 313 0224 1026 movs r6, #16 + 314 0226 84E7 b .L18 + 315 .L24: + 316 0228 4FF00109 mov r9, #1 + 317 022c 0226 movs r6, #2 + 318 022e 80E7 b .L18 + 319 .L25: + 320 0230 4FF00209 mov r9, #2 + 321 0234 0426 movs r6, #4 + 322 0236 7CE7 b .L18 + 323 .L26: + 324 0238 4FF00309 mov r9, #3 + 325 023c 0826 movs r6, #8 + 326 023e 78E7 b .L18 + 327 .L28: + 328 0240 4FF00509 mov r9, #5 + 329 0244 2026 movs r6, #32 + 330 0246 74E7 b .L18 + 331 .L29: + 332 0248 4FF00609 mov r9, #6 + 333 024c 4026 movs r6, #64 + 334 024e 70E7 b .L18 + 335 .L41: + 336 .align 3 + 337 .L40: + 338 0250 00000000 .word 0 + 339 0254 60E37641 .word 1098310496 + 340 0258 00000000 .word 0 + 341 025c FEFF2F41 .word 1093664766 + 342 0260 00000000 .word 0 + 343 0264 A3E1C141 .word 1103225251 + 344 0268 80D1F008 .word 150000000 + 345 026c 0000E03F .word 1071644672 + 346 0270 FFFF0F00 .word 1048575 + 347 0274 68780400 .word 292968 + ARM GAS /tmp/ccKBFxXV.s page 7 + + + 348 0278 FF45C323 .word 599999999 + 350 .section .text.si53531_initialize,"ax",%progbits + 351 .align 1 + 352 .p2align 2,,3 + 353 .global si53531_initialize + 354 .syntax unified + 355 .thumb + 356 .thumb_func + 357 .fpu fpv4-sp-d16 + 359 si53531_initialize: + 360 @ args = 0, pretend = 0, frame = 8 + 361 @ frame_needed = 0, uses_anonymous_args = 0 + 362 0000 F0B5 push {r4, r5, r6, r7, lr} + 363 0002 C84C ldr r4, .L82 + 364 0004 87B0 sub sp, sp, #28 + 365 0006 0027 movs r7, #0 + 366 0008 05AD add r5, sp, #20 + 367 000a 6426 movs r6, #100 + 368 .L44: + 369 000c 0597 str r7, [sp, #20] + 370 .L43: + 371 000e 6423 movs r3, #100 + 372 0010 0322 movs r2, #3 + 373 0012 C021 movs r1, #192 + 374 0014 2046 mov r0, r4 + 375 0016 FFF7FEFF bl HAL_I2C_IsDeviceReady + 376 001a 0028 cmp r0, #0 + 377 001c F7D1 bne .L43 + 378 001e 0123 movs r3, #1 + 379 0020 CDE90136 strd r3, r6, [sp, #4] + 380 0024 0246 mov r2, r0 + 381 0026 0095 str r5, [sp] + 382 0028 C021 movs r1, #192 + 383 002a 2046 mov r0, r4 + 384 002c FFF7FEFF bl HAL_I2C_Mem_Read + 385 0030 0306 lsls r3, r0, #24 + 386 0032 EBD4 bmi .L44 + 387 0034 FF23 movs r3, #255 + 388 0036 BB4E ldr r6, .L82 + 389 0038 8DF81430 strb r3, [sp, #20] + 390 .L45: + 391 003c 6423 movs r3, #100 + 392 003e 0322 movs r2, #3 + 393 0040 C021 movs r1, #192 + 394 0042 3046 mov r0, r6 + 395 0044 FFF7FEFF bl HAL_I2C_IsDeviceReady + 396 0048 0446 mov r4, r0 + 397 004a 0028 cmp r0, #0 + 398 004c F6D1 bne .L45 + 399 004e 0123 movs r3, #1 + 400 0050 6422 movs r2, #100 + 401 0052 CDE90132 strd r3, r2, [sp, #4] + 402 0056 B348 ldr r0, .L82 + 403 0058 0095 str r5, [sp] + 404 005a 0322 movs r2, #3 + 405 005c C021 movs r1, #192 + 406 005e B14E ldr r6, .L82 + ARM GAS /tmp/ccKBFxXV.s page 8 + + + 407 0060 FFF7FEFF bl HAL_I2C_Mem_Write + 408 0064 8DF81440 strb r4, [sp, #20] + 409 .L46: + 410 0068 6423 movs r3, #100 + 411 006a 0322 movs r2, #3 + 412 006c C021 movs r1, #192 + 413 006e 3046 mov r0, r6 + 414 0070 FFF7FEFF bl HAL_I2C_IsDeviceReady + 415 0074 0446 mov r4, r0 + 416 0076 0028 cmp r0, #0 + 417 0078 F6D1 bne .L46 + 418 007a 0123 movs r3, #1 + 419 007c 6422 movs r2, #100 + 420 007e CDE90132 strd r3, r2, [sp, #4] + 421 0082 A848 ldr r0, .L82 + 422 0084 0095 str r5, [sp] + 423 0086 0F22 movs r2, #15 + 424 0088 C021 movs r1, #192 + 425 008a A64E ldr r6, .L82 + 426 008c FFF7FEFF bl HAL_I2C_Mem_Write + 427 0090 8DF81440 strb r4, [sp, #20] + 428 .L47: + 429 0094 6423 movs r3, #100 + 430 0096 0322 movs r2, #3 + 431 0098 C021 movs r1, #192 + 432 009a 3046 mov r0, r6 + 433 009c FFF7FEFF bl HAL_I2C_IsDeviceReady + 434 00a0 0446 mov r4, r0 + 435 00a2 0028 cmp r0, #0 + 436 00a4 F6D1 bne .L47 + 437 00a6 0123 movs r3, #1 + 438 00a8 6422 movs r2, #100 + 439 00aa CDE90132 strd r3, r2, [sp, #4] + 440 00ae 9D48 ldr r0, .L82 + 441 00b0 0095 str r5, [sp] + 442 00b2 1822 movs r2, #24 + 443 00b4 C021 movs r1, #192 + 444 00b6 9B4E ldr r6, .L82 + 445 00b8 FFF7FEFF bl HAL_I2C_Mem_Write + 446 00bc 8DF81440 strb r4, [sp, #20] + 447 .L48: + 448 00c0 6423 movs r3, #100 + 449 00c2 0322 movs r2, #3 + 450 00c4 C021 movs r1, #192 + 451 00c6 3046 mov r0, r6 + 452 00c8 FFF7FEFF bl HAL_I2C_IsDeviceReady + 453 00cc 0028 cmp r0, #0 + 454 00ce F7D1 bne .L48 + 455 00d0 0124 movs r4, #1 + 456 00d2 6423 movs r3, #100 + 457 00d4 CDE90143 strd r4, r3, [sp, #4] + 458 00d8 9248 ldr r0, .L82 + 459 00da 0095 str r5, [sp] + 460 00dc 2346 mov r3, r4 + 461 00de 2A22 movs r2, #42 + 462 00e0 C021 movs r1, #192 + 463 00e2 904E ldr r6, .L82 + ARM GAS /tmp/ccKBFxXV.s page 9 + + + 464 00e4 FFF7FEFF bl HAL_I2C_Mem_Write + 465 00e8 8DF81440 strb r4, [sp, #20] + 466 .L49: + 467 00ec 6423 movs r3, #100 + 468 00ee 0322 movs r2, #3 + 469 00f0 C021 movs r1, #192 + 470 00f2 3046 mov r0, r6 + 471 00f4 FFF7FEFF bl HAL_I2C_IsDeviceReady + 472 00f8 0446 mov r4, r0 + 473 00fa 0028 cmp r0, #0 + 474 00fc F6D1 bne .L49 + 475 00fe 0123 movs r3, #1 + 476 0100 6422 movs r2, #100 + 477 0102 CDE90132 strd r3, r2, [sp, #4] + 478 0106 8748 ldr r0, .L82 + 479 0108 0095 str r5, [sp] + 480 010a 2B22 movs r2, #43 + 481 010c C021 movs r1, #192 + 482 010e 854E ldr r6, .L82 + 483 0110 FFF7FEFF bl HAL_I2C_Mem_Write + 484 0114 8DF81440 strb r4, [sp, #20] + 485 .L50: + 486 0118 6423 movs r3, #100 + 487 011a 0322 movs r2, #3 + 488 011c C021 movs r1, #192 + 489 011e 3046 mov r0, r6 + 490 0120 FFF7FEFF bl HAL_I2C_IsDeviceReady + 491 0124 0446 mov r4, r0 + 492 0126 0028 cmp r0, #0 + 493 0128 F6D1 bne .L50 + 494 012a 0123 movs r3, #1 + 495 012c 6422 movs r2, #100 + 496 012e CDE90132 strd r3, r2, [sp, #4] + 497 0132 7C48 ldr r0, .L82 + 498 0134 0095 str r5, [sp] + 499 0136 2F22 movs r2, #47 + 500 0138 C021 movs r1, #192 + 501 013a 7A4E ldr r6, .L82 + 502 013c FFF7FEFF bl HAL_I2C_Mem_Write + 503 0140 8DF81440 strb r4, [sp, #20] + 504 .L51: + 505 0144 6423 movs r3, #100 + 506 0146 0322 movs r2, #3 + 507 0148 C021 movs r1, #192 + 508 014a 3046 mov r0, r6 + 509 014c FFF7FEFF bl HAL_I2C_IsDeviceReady + 510 0150 0446 mov r4, r0 + 511 0152 0028 cmp r0, #0 + 512 0154 F6D1 bne .L51 + 513 0156 0123 movs r3, #1 + 514 0158 6422 movs r2, #100 + 515 015a CDE90132 strd r3, r2, [sp, #4] + 516 015e 7148 ldr r0, .L82 + 517 0160 0095 str r5, [sp] + 518 0162 3022 movs r2, #48 + 519 0164 C021 movs r1, #192 + 520 0166 6F4E ldr r6, .L82 + ARM GAS /tmp/ccKBFxXV.s page 10 + + + 521 0168 FFF7FEFF bl HAL_I2C_Mem_Write + 522 016c 8DF81440 strb r4, [sp, #20] + 523 .L52: + 524 0170 6423 movs r3, #100 + 525 0172 0322 movs r2, #3 + 526 0174 C021 movs r1, #192 + 527 0176 3046 mov r0, r6 + 528 0178 FFF7FEFF bl HAL_I2C_IsDeviceReady + 529 017c 0446 mov r4, r0 + 530 017e 0028 cmp r0, #0 + 531 0180 F6D1 bne .L52 + 532 0182 0123 movs r3, #1 + 533 0184 6422 movs r2, #100 + 534 0186 CDE90132 strd r3, r2, [sp, #4] + 535 018a 6648 ldr r0, .L82 + 536 018c 0095 str r5, [sp] + 537 018e 3122 movs r2, #49 + 538 0190 C021 movs r1, #192 + 539 0192 644E ldr r6, .L82 + 540 0194 FFF7FEFF bl HAL_I2C_Mem_Write + 541 0198 8DF81440 strb r4, [sp, #20] + 542 .L53: + 543 019c 6423 movs r3, #100 + 544 019e 0322 movs r2, #3 + 545 01a0 C021 movs r1, #192 + 546 01a2 3046 mov r0, r6 + 547 01a4 FFF7FEFF bl HAL_I2C_IsDeviceReady + 548 01a8 0028 cmp r0, #0 + 549 01aa F7D1 bne .L53 + 550 01ac 0124 movs r4, #1 + 551 01ae 6423 movs r3, #100 + 552 01b0 CDE90143 strd r4, r3, [sp, #4] + 553 01b4 5B48 ldr r0, .L82 + 554 01b6 0095 str r5, [sp] + 555 01b8 2346 mov r3, r4 + 556 01ba 3222 movs r2, #50 + 557 01bc C021 movs r1, #192 + 558 01be 594E ldr r6, .L82 + 559 01c0 FFF7FEFF bl HAL_I2C_Mem_Write + 560 01c4 8DF81440 strb r4, [sp, #20] + 561 .L54: + 562 01c8 6423 movs r3, #100 + 563 01ca 0322 movs r2, #3 + 564 01cc C021 movs r1, #192 + 565 01ce 3046 mov r0, r6 + 566 01d0 FFF7FEFF bl HAL_I2C_IsDeviceReady + 567 01d4 0446 mov r4, r0 + 568 01d6 0028 cmp r0, #0 + 569 01d8 F6D1 bne .L54 + 570 01da 0123 movs r3, #1 + 571 01dc 6422 movs r2, #100 + 572 01de CDE90132 strd r3, r2, [sp, #4] + 573 01e2 5048 ldr r0, .L82 + 574 01e4 0095 str r5, [sp] + 575 01e6 3322 movs r2, #51 + 576 01e8 C021 movs r1, #192 + 577 01ea 4E4E ldr r6, .L82 + ARM GAS /tmp/ccKBFxXV.s page 11 + + + 578 01ec FFF7FEFF bl HAL_I2C_Mem_Write + 579 01f0 8DF81440 strb r4, [sp, #20] + 580 .L55: + 581 01f4 6423 movs r3, #100 + 582 01f6 0322 movs r2, #3 + 583 01f8 C021 movs r1, #192 + 584 01fa 3046 mov r0, r6 + 585 01fc FFF7FEFF bl HAL_I2C_IsDeviceReady + 586 0200 0446 mov r4, r0 + 587 0202 0028 cmp r0, #0 + 588 0204 F6D1 bne .L55 + 589 0206 0123 movs r3, #1 + 590 0208 6422 movs r2, #100 + 591 020a CDE90132 strd r3, r2, [sp, #4] + 592 020e 4548 ldr r0, .L82 + 593 0210 0095 str r5, [sp] + 594 0212 3722 movs r2, #55 + 595 0214 C021 movs r1, #192 + 596 0216 434E ldr r6, .L82 + 597 0218 FFF7FEFF bl HAL_I2C_Mem_Write + 598 021c 8DF81440 strb r4, [sp, #20] + 599 .L56: + 600 0220 6423 movs r3, #100 + 601 0222 0322 movs r2, #3 + 602 0224 C021 movs r1, #192 + 603 0226 3046 mov r0, r6 + 604 0228 FFF7FEFF bl HAL_I2C_IsDeviceReady + 605 022c 0446 mov r4, r0 + 606 022e 0028 cmp r0, #0 + 607 0230 F6D1 bne .L56 + 608 0232 0123 movs r3, #1 + 609 0234 6422 movs r2, #100 + 610 0236 CDE90132 strd r3, r2, [sp, #4] + 611 023a 3A48 ldr r0, .L82 + 612 023c 0095 str r5, [sp] + 613 023e 3822 movs r2, #56 + 614 0240 C021 movs r1, #192 + 615 0242 384E ldr r6, .L82 + 616 0244 FFF7FEFF bl HAL_I2C_Mem_Write + 617 0248 8DF81440 strb r4, [sp, #20] + 618 .L57: + 619 024c 6423 movs r3, #100 + 620 024e 0322 movs r2, #3 + 621 0250 C021 movs r1, #192 + 622 0252 3046 mov r0, r6 + 623 0254 FFF7FEFF bl HAL_I2C_IsDeviceReady + 624 0258 0028 cmp r0, #0 + 625 025a F7D1 bne .L57 + 626 025c 0123 movs r3, #1 + 627 025e 6422 movs r2, #100 + 628 0260 CDE90132 strd r3, r2, [sp, #4] + 629 0264 2F48 ldr r0, .L82 + 630 0266 0095 str r5, [sp] + 631 0268 3922 movs r2, #57 + 632 026a C021 movs r1, #192 + 633 026c FFF7FEFF bl HAL_I2C_Mem_Write + 634 0270 2C4C ldr r4, .L82 + ARM GAS /tmp/ccKBFxXV.s page 12 + + + 635 0272 4F23 movs r3, #79 + 636 0274 8DF81430 strb r3, [sp, #20] + 637 .L58: + 638 0278 6423 movs r3, #100 + 639 027a 0322 movs r2, #3 + 640 027c C021 movs r1, #192 + 641 027e 2046 mov r0, r4 + 642 0280 FFF7FEFF bl HAL_I2C_IsDeviceReady + 643 0284 0028 cmp r0, #0 + 644 0286 F7D1 bne .L58 + 645 0288 0123 movs r3, #1 + 646 028a 6422 movs r2, #100 + 647 028c CDE90132 strd r3, r2, [sp, #4] + 648 0290 2448 ldr r0, .L82 + 649 0292 0095 str r5, [sp] + 650 0294 1022 movs r2, #16 + 651 0296 C021 movs r1, #192 + 652 0298 FFF7FEFF bl HAL_I2C_Mem_Write + 653 029c 214C ldr r4, .L82 + 654 029e 5F23 movs r3, #95 + 655 02a0 8DF81430 strb r3, [sp, #20] + 656 .L59: + 657 02a4 6423 movs r3, #100 + 658 02a6 0322 movs r2, #3 + 659 02a8 C021 movs r1, #192 + 660 02aa 2046 mov r0, r4 + 661 02ac FFF7FEFF bl HAL_I2C_IsDeviceReady + 662 02b0 0028 cmp r0, #0 + 663 02b2 F7D1 bne .L59 + 664 02b4 0123 movs r3, #1 + 665 02b6 6422 movs r2, #100 + 666 02b8 CDE90132 strd r3, r2, [sp, #4] + 667 02bc 1948 ldr r0, .L82 + 668 02be 0095 str r5, [sp] + 669 02c0 1122 movs r2, #17 + 670 02c2 C021 movs r1, #192 + 671 02c4 FFF7FEFF bl HAL_I2C_Mem_Write + 672 02c8 164C ldr r4, .L82 + 673 02ca 8023 movs r3, #128 + 674 02cc 8DF81430 strb r3, [sp, #20] + 675 .L60: + 676 02d0 6423 movs r3, #100 + 677 02d2 0322 movs r2, #3 + 678 02d4 C021 movs r1, #192 + 679 02d6 2046 mov r0, r4 + 680 02d8 FFF7FEFF bl HAL_I2C_IsDeviceReady + 681 02dc 0028 cmp r0, #0 + 682 02de F7D1 bne .L60 + 683 02e0 0123 movs r3, #1 + 684 02e2 6422 movs r2, #100 + 685 02e4 CDE90132 strd r3, r2, [sp, #4] + 686 02e8 0E48 ldr r0, .L82 + 687 02ea 0095 str r5, [sp] + 688 02ec 1222 movs r2, #18 + 689 02ee C021 movs r1, #192 + 690 02f0 FFF7FEFF bl HAL_I2C_Mem_Write + 691 02f4 0B4C ldr r4, .L82 + ARM GAS /tmp/ccKBFxXV.s page 13 + + + 692 02f6 1223 movs r3, #18 + 693 02f8 8DF81430 strb r3, [sp, #20] + 694 .L61: + 695 02fc 6423 movs r3, #100 + 696 02fe 0322 movs r2, #3 + 697 0300 C021 movs r1, #192 + 698 0302 2046 mov r0, r4 + 699 0304 FFF7FEFF bl HAL_I2C_IsDeviceReady + 700 0308 0028 cmp r0, #0 + 701 030a F7D1 bne .L61 + 702 030c 0123 movs r3, #1 + 703 030e 6422 movs r2, #100 + 704 0310 CDE90132 strd r3, r2, [sp, #4] + 705 0314 0095 str r5, [sp] + 706 0316 B722 movs r2, #183 + 707 0318 C021 movs r1, #192 + 708 031a 0248 ldr r0, .L82 + 709 031c FFF7FEFF bl HAL_I2C_Mem_Write + 710 0320 07B0 add sp, sp, #28 + 711 @ sp needed + 712 0322 F0BD pop {r4, r5, r6, r7, pc} + 713 .L83: + 714 .align 2 + 715 .L82: + 716 0324 00000000 .word hi2c1 + 718 .section .text.si53531_set_frequency,"ax",%progbits + 719 .align 1 + 720 .p2align 2,,3 + 721 .global si53531_set_frequency + 722 .syntax unified + 723 .thumb + 724 .thumb_func + 725 .fpu fpv4-sp-d16 + 727 si53531_set_frequency: + 728 @ args = 0, pretend = 0, frame = 24 + 729 @ frame_needed = 0, uses_anonymous_args = 0 + 730 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr} + 731 0004 8BB0 sub sp, sp, #44 + 732 0006 06A9 add r1, sp, #24 + 733 0008 FFF7FEFF bl CalcRegisters + 734 000c 06AD add r5, sp, #24 + 735 000e 2C4C ldr r4, .L96 + 736 0010 0DF12009 add r9, sp, #32 + 737 0014 C5F11908 rsb r8, r5, #25 + 738 0018 0DF11706 add r6, sp, #23 + 739 001c 6427 movs r7, #100 + 740 .L86: + 741 001e 15F8013B ldrb r3, [r5], #1 @ zero_extendqisi2 + 742 0022 8DF81730 strb r3, [sp, #23] + 743 .L85: + 744 0026 6423 movs r3, #100 + 745 0028 0322 movs r2, #3 + 746 002a C021 movs r1, #192 + 747 002c 2046 mov r0, r4 + 748 002e FFF7FEFF bl HAL_I2C_IsDeviceReady + 749 0032 0028 cmp r0, #0 + 750 0034 F7D1 bne .L85 + ARM GAS /tmp/ccKBFxXV.s page 14 + + + 751 0036 0123 movs r3, #1 + 752 0038 08EB0502 add r2, r8, r5 + 753 003c CDE90137 strd r3, r7, [sp, #4] + 754 0040 0096 str r6, [sp] + 755 0042 92B2 uxth r2, r2 + 756 0044 C021 movs r1, #192 + 757 0046 2046 mov r0, r4 + 758 0048 FFF7FEFF bl HAL_I2C_Mem_Write + 759 004c 4D45 cmp r5, r9 + 760 004e E6D1 bne .L86 + 761 0050 1B4C ldr r4, .L96 + 762 0052 0DF12207 add r7, sp, #34 + 763 0056 3425 movs r5, #52 + 764 0058 4FF06408 mov r8, #100 + 765 .L88: + 766 005c 17F8013B ldrb r3, [r7], #1 @ zero_extendqisi2 + 767 0060 8DF81730 strb r3, [sp, #23] + 768 .L87: + 769 0064 6423 movs r3, #100 + 770 0066 0322 movs r2, #3 + 771 0068 C021 movs r1, #192 + 772 006a 2046 mov r0, r4 + 773 006c FFF7FEFF bl HAL_I2C_IsDeviceReady + 774 0070 0028 cmp r0, #0 + 775 0072 F7D1 bne .L87 + 776 0074 0123 movs r3, #1 + 777 0076 2A46 mov r2, r5 + 778 0078 0135 adds r5, r5, #1 + 779 007a CDE90138 strd r3, r8, [sp, #4] + 780 007e 0096 str r6, [sp] + 781 0080 C021 movs r1, #192 + 782 0082 2046 mov r0, r4 + 783 0084 ADB2 uxth r5, r5 + 784 0086 FFF7FEFF bl HAL_I2C_Mem_Write + 785 008a 372D cmp r5, #55 + 786 008c E6D1 bne .L88 + 787 008e 2023 movs r3, #32 + 788 0090 0B4C ldr r4, .L96 + 789 0092 8DF81730 strb r3, [sp, #23] + 790 .L89: + 791 0096 6423 movs r3, #100 + 792 0098 0322 movs r2, #3 + 793 009a C021 movs r1, #192 + 794 009c 2046 mov r0, r4 + 795 009e FFF7FEFF bl HAL_I2C_IsDeviceReady + 796 00a2 0028 cmp r0, #0 + 797 00a4 F7D1 bne .L89 + 798 00a6 0123 movs r3, #1 + 799 00a8 6422 movs r2, #100 + 800 00aa CDE90132 strd r3, r2, [sp, #4] + 801 00ae 0096 str r6, [sp] + 802 00b0 B122 movs r2, #177 + 803 00b2 C021 movs r1, #192 + 804 00b4 0248 ldr r0, .L96 + 805 00b6 FFF7FEFF bl HAL_I2C_Mem_Write + 806 00ba 0BB0 add sp, sp, #44 + 807 @ sp needed + ARM GAS /tmp/ccKBFxXV.s page 15 + + + 808 00bc BDE8F083 pop {r4, r5, r6, r7, r8, r9, pc} + 809 .L97: + 810 .align 2 + 811 .L96: + 812 00c0 00000000 .word hi2c1 + 814 .section .text.si5351_off,"ax",%progbits + 815 .align 1 + 816 .p2align 2,,3 + 817 .global si5351_off + 818 .syntax unified + 819 .thumb + 820 .thumb_func + 821 .fpu fpv4-sp-d16 + 823 si5351_off: + 824 @ args = 0, pretend = 0, frame = 8 + 825 @ frame_needed = 0, uses_anonymous_args = 0 + 826 0000 10B5 push {r4, lr} + 827 0002 86B0 sub sp, sp, #24 + 828 0004 FF23 movs r3, #255 + 829 0006 0C4C ldr r4, .L102 + 830 0008 8DF81730 strb r3, [sp, #23] + 831 .L99: + 832 000c 6423 movs r3, #100 + 833 000e 0322 movs r2, #3 + 834 0010 C021 movs r1, #192 + 835 0012 2046 mov r0, r4 + 836 0014 FFF7FEFF bl HAL_I2C_IsDeviceReady + 837 0018 0028 cmp r0, #0 + 838 001a F7D1 bne .L99 + 839 001c 0123 movs r3, #1 + 840 001e 0DF11702 add r2, sp, #23 + 841 0022 6421 movs r1, #100 + 842 0024 CDE90131 strd r3, r1, [sp, #4] + 843 0028 0092 str r2, [sp] + 844 002a C021 movs r1, #192 + 845 002c 0322 movs r2, #3 + 846 002e 0248 ldr r0, .L102 + 847 0030 FFF7FEFF bl HAL_I2C_Mem_Write + 848 0034 06B0 add sp, sp, #24 + 849 @ sp needed + 850 0036 10BD pop {r4, pc} + 851 .L103: + 852 .align 2 + 853 .L102: + 854 0038 00000000 .word hi2c1 + 856 .section .text.si5351_on,"ax",%progbits + 857 .align 1 + 858 .p2align 2,,3 + 859 .global si5351_on + 860 .syntax unified + 861 .thumb + 862 .thumb_func + 863 .fpu fpv4-sp-d16 + 865 si5351_on: + 866 @ args = 0, pretend = 0, frame = 8 + 867 @ frame_needed = 0, uses_anonymous_args = 0 + 868 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccKBFxXV.s page 16 + + + 869 0002 86B0 sub sp, sp, #24 + 870 0004 FC23 movs r3, #252 + 871 0006 0C4C ldr r4, .L108 + 872 0008 8DF81730 strb r3, [sp, #23] + 873 .L105: + 874 000c 6423 movs r3, #100 + 875 000e 0322 movs r2, #3 + 876 0010 C021 movs r1, #192 + 877 0012 2046 mov r0, r4 + 878 0014 FFF7FEFF bl HAL_I2C_IsDeviceReady + 879 0018 0028 cmp r0, #0 + 880 001a F7D1 bne .L105 + 881 001c 0123 movs r3, #1 + 882 001e 0DF11702 add r2, sp, #23 + 883 0022 6421 movs r1, #100 + 884 0024 CDE90131 strd r3, r1, [sp, #4] + 885 0028 0092 str r2, [sp] + 886 002a C021 movs r1, #192 + 887 002c 0322 movs r2, #3 + 888 002e 0248 ldr r0, .L108 + 889 0030 FFF7FEFF bl HAL_I2C_Mem_Write + 890 0034 06B0 add sp, sp, #24 + 891 @ sp needed + 892 0036 10BD pop {r4, pc} + 893 .L109: + 894 .align 2 + 895 .L108: + 896 0038 00000000 .word hi2c1 + 898 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccKBFxXV.s page 17 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 si5351.c + /tmp/ccKBFxXV.s:16 .text.si5351_write8:0000000000000000 $t + /tmp/ccKBFxXV.s:25 .text.si5351_write8:0000000000000000 si5351_write8 + /tmp/ccKBFxXV.s:56 .text.si5351_write8:0000000000000038 $d + /tmp/ccKBFxXV.s:59 .text.si5351_read8:0000000000000000 $t + /tmp/ccKBFxXV.s:67 .text.si5351_read8:0000000000000000 si5351_read8 + /tmp/ccKBFxXV.s:98 .text.si5351_read8:0000000000000034 $d + /tmp/ccKBFxXV.s:109 .text.CalcRegisters:0000000000000000 $t + /tmp/ccKBFxXV.s:117 .text.CalcRegisters:0000000000000000 CalcRegisters + /tmp/ccKBFxXV.s:338 .text.CalcRegisters:0000000000000250 $d + /tmp/ccKBFxXV.s:351 .text.si53531_initialize:0000000000000000 $t + /tmp/ccKBFxXV.s:359 .text.si53531_initialize:0000000000000000 si53531_initialize + /tmp/ccKBFxXV.s:716 .text.si53531_initialize:0000000000000324 $d + /tmp/ccKBFxXV.s:719 .text.si53531_set_frequency:0000000000000000 $t + /tmp/ccKBFxXV.s:727 .text.si53531_set_frequency:0000000000000000 si53531_set_frequency + /tmp/ccKBFxXV.s:812 .text.si53531_set_frequency:00000000000000c0 $d + /tmp/ccKBFxXV.s:815 .text.si5351_off:0000000000000000 $t + /tmp/ccKBFxXV.s:823 .text.si5351_off:0000000000000000 si5351_off + /tmp/ccKBFxXV.s:854 .text.si5351_off:0000000000000038 $d + /tmp/ccKBFxXV.s:857 .text.si5351_on:0000000000000000 $t + /tmp/ccKBFxXV.s:865 .text.si5351_on:0000000000000000 si5351_on + /tmp/ccKBFxXV.s:896 .text.si5351_on:0000000000000038 $d + +UNDEFINED SYMBOLS +HAL_I2C_IsDeviceReady +HAL_I2C_Mem_Write +hi2c1 +HAL_I2C_Mem_Read +__aeabi_ui2d +__aeabi_ddiv +__aeabi_d2uiz +__aeabi_d2iz +__aeabi_i2d +__aeabi_dsub +__aeabi_dmul +__aeabi_dadd diff --git a/codice/build/si5351.o b/codice/build/si5351.o new file mode 100644 index 0000000000000000000000000000000000000000..7139950022bc9437132df770b11a3fa4e9fd37d4 GIT binary patch literal 4828 zcmbVOdrVvB6+hQ6uz9)81Lv{S*u*g`IJO~$Ce?;{+>&DAD4MiY{lhW%GCTnRY|JQ*AZ! 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file mode 100644 index 0000000..8b1d1a0 --- /dev/null +++ b/codice/build/stm32g4xx_hal_adc.d @@ -0,0 +1,84 @@ +build/stm32g4xx_hal_adc.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_adc.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_adc.lst b/codice/build/stm32g4xx_hal_adc.lst new file mode 100644 index 0000000..5b44185 --- /dev/null +++ b/codice/build/stm32g4xx_hal_adc.lst @@ -0,0 +1,3156 @@ +ARM GAS /tmp/ccB34LXC.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_adc.c" + 14 .text + 15 .section .text.HAL_ADC_MspInit,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .weak HAL_ADC_MspInit + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_ADC_MspInit: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 7047 bx lr + 31 0002 00BF .section .text.HAL_ADC_Init,"ax",%progbits + 32 .align 1 + 33 .p2align 2,,3 + 34 .global HAL_ADC_Init + 35 .syntax unified + 36 .thumb + 37 .thumb_func + 38 .fpu fpv4-sp-d16 + 40 HAL_ADC_Init: + 41 @ args = 0, pretend = 0, frame = 8 + 42 @ frame_needed = 0, uses_anonymous_args = 0 + 43 0000 30B5 push {r4, r5, lr} + 44 0002 83B0 sub sp, sp, #12 + 45 0004 0023 movs r3, #0 + 46 0006 0193 str r3, [sp, #4] + 47 0008 0028 cmp r0, #0 + 48 000a 00F0C980 beq .L24 + 49 000e C56D ldr r5, [r0, #92] + 50 0010 0446 mov r4, r0 + 51 0012 002D cmp r5, #0 + 52 0014 00F09280 beq .L40 + 53 .L5: + 54 0018 2268 ldr r2, [r4] + 55 001a 9368 ldr r3, [r2, #8] + 56 001c 9B00 lsls r3, r3, #2 + 57 001e 05D5 bpl .L6 + 58 0020 9368 ldr r3, [r2, #8] + 59 0022 23F02043 bic r3, r3, #-1610612736 + 60 0026 23F03F03 bic r3, r3, #63 + ARM GAS /tmp/ccB34LXC.s page 2 + + + 61 002a 9360 str r3, [r2, #8] + 62 .L6: + 63 002c 9368 ldr r3, [r2, #8] + 64 002e DD00 lsls r5, r3, #3 + 65 0030 19D4 bmi .L7 + 66 0032 704B ldr r3, .L46 + 67 0034 7048 ldr r0, .L46+4 + 68 0036 1B68 ldr r3, [r3] + 69 0038 9168 ldr r1, [r2, #8] + 70 003a 9B09 lsrs r3, r3, #6 + 71 003c A0FB0303 umull r0, r3, r0, r3 + 72 0040 21F01041 bic r1, r1, #-1879048192 + 73 0044 9B09 lsrs r3, r3, #6 + 74 0046 21F03F01 bic r1, r1, #63 + 75 004a 0133 adds r3, r3, #1 + 76 004c 5B00 lsls r3, r3, #1 + 77 004e 41F08051 orr r1, r1, #268435456 + 78 0052 9160 str r1, [r2, #8] + 79 0054 0193 str r3, [sp, #4] + 80 0056 019B ldr r3, [sp, #4] + 81 0058 2BB1 cbz r3, .L7 + 82 .L8: + 83 005a 019B ldr r3, [sp, #4] + 84 005c 013B subs r3, r3, #1 + 85 005e 0193 str r3, [sp, #4] + 86 0060 019B ldr r3, [sp, #4] + 87 0062 002B cmp r3, #0 + 88 0064 F9D1 bne .L8 + 89 .L7: + 90 0066 9368 ldr r3, [r2, #8] + 91 0068 D800 lsls r0, r3, #3 + 92 006a 59D4 bmi .L25 + 93 006c E36D ldr r3, [r4, #92] + 94 006e 43F01003 orr r3, r3, #16 + 95 0072 E365 str r3, [r4, #92] + 96 0074 236E ldr r3, [r4, #96] + 97 0076 0120 movs r0, #1 + 98 0078 0343 orrs r3, r3, r0 + 99 007a 2366 str r3, [r4, #96] + 100 007c 9368 ldr r3, [r2, #8] + 101 007e 13F0040F tst r3, #4 + 102 0082 E36D ldr r3, [r4, #92] + 103 0084 53D1 bne .L11 + 104 .L10: + 105 0086 D906 lsls r1, r3, #27 + 106 0088 51D4 bmi .L11 + 107 008a E36D ldr r3, [r4, #92] + 108 008c 23F48173 bic r3, r3, #258 + 109 0090 43F00203 orr r3, r3, #2 + 110 0094 E365 str r3, [r4, #92] + 111 0096 9368 ldr r3, [r2, #8] + 112 0098 DB07 lsls r3, r3, #31 + 113 009a 0ED4 bmi .L12 + 114 009c 574B ldr r3, .L46+8 + 115 009e 4FF0A041 mov r1, #1342177280 + 116 00a2 8968 ldr r1, [r1, #8] + 117 00a4 9B68 ldr r3, [r3, #8] + ARM GAS /tmp/ccB34LXC.s page 3 + + + 118 00a6 0B43 orrs r3, r3, r1 + 119 00a8 DD07 lsls r5, r3, #31 + 120 00aa 06D4 bmi .L12 + 121 00ac 5449 ldr r1, .L46+12 + 122 00ae 6568 ldr r5, [r4, #4] + 123 00b0 8B68 ldr r3, [r1, #8] + 124 00b2 23F47C13 bic r3, r3, #4128768 + 125 00b6 2B43 orrs r3, r3, r5 + 126 00b8 8B60 str r3, [r1, #8] + 127 .L12: + 128 00ba E568 ldr r5, [r4, #12] + 129 00bc E36B ldr r3, [r4, #60] + 130 00be 94F82410 ldrb r1, [r4, #36] @ zero_extendqisi2 + 131 00c2 2B43 orrs r3, r3, r5 + 132 00c4 A568 ldr r5, [r4, #8] + 133 00c6 2B43 orrs r3, r3, r5 + 134 00c8 657F ldrb r5, [r4, #29] @ zero_extendqisi2 + 135 00ca 0129 cmp r1, #1 + 136 00cc 43EA4533 orr r3, r3, r5, lsl #13 + 137 00d0 43EA0143 orr r3, r3, r1, lsl #16 + 138 00d4 5FD0 beq .L41 + 139 .L13: + 140 00d6 E16A ldr r1, [r4, #44] + 141 00d8 21B1 cbz r1, .L14 + 142 00da 256B ldr r5, [r4, #48] + 143 00dc 01F47871 and r1, r1, #992 + 144 00e0 2943 orrs r1, r1, r5 + 145 00e2 0B43 orrs r3, r3, r1 + 146 .L14: + 147 00e4 D568 ldr r5, [r2, #12] + 148 00e6 4749 ldr r1, .L46+16 + 149 00e8 2940 ands r1, r1, r5 + 150 00ea 0B43 orrs r3, r3, r1 + 151 00ec D360 str r3, [r2, #12] + 152 00ee 1369 ldr r3, [r2, #16] + 153 00f0 616B ldr r1, [r4, #52] + 154 00f2 23F04063 bic r3, r3, #201326592 + 155 00f6 0B43 orrs r3, r3, r1 + 156 00f8 1361 str r3, [r2, #16] + 157 00fa 9368 ldr r3, [r2, #8] + 158 00fc 5907 lsls r1, r3, #29 + 159 00fe 23D5 bpl .L42 + 160 0100 9368 ldr r3, [r2, #8] + 161 .L20: + 162 0102 6369 ldr r3, [r4, #20] + 163 0104 012B cmp r3, #1 + 164 0106 4ED0 beq .L43 + 165 0108 136B ldr r3, [r2, #48] + 166 010a 23F00F03 bic r3, r3, #15 + 167 010e 1363 str r3, [r2, #48] + 168 .L22: + 169 0110 E36D ldr r3, [r4, #92] + 170 0112 23F00303 bic r3, r3, #3 + 171 0116 43F00103 orr r3, r3, #1 + 172 011a E365 str r3, [r4, #92] + 173 011c 03B0 add sp, sp, #12 + 174 @ sp needed + ARM GAS /tmp/ccB34LXC.s page 4 + + + 175 011e 30BD pop {r4, r5, pc} + 176 .L25: + 177 0120 9368 ldr r3, [r2, #8] + 178 0122 13F0040F tst r3, #4 + 179 0126 4FF00000 mov r0, #0 + 180 012a E36D ldr r3, [r4, #92] + 181 012c ABD0 beq .L10 + 182 .L11: + 183 012e E36D ldr r3, [r4, #92] + 184 0130 0120 movs r0, #1 + 185 0132 43F01003 orr r3, r3, #16 + 186 0136 E365 str r3, [r4, #92] + 187 0138 03B0 add sp, sp, #12 + 188 @ sp needed + 189 013a 30BD pop {r4, r5, pc} + 190 .L40: + 191 013c FFF7FEFF bl HAL_ADC_MspInit + 192 0140 2566 str r5, [r4, #96] + 193 0142 84F85850 strb r5, [r4, #88] + 194 0146 67E7 b .L5 + 195 .L42: + 196 0148 9368 ldr r3, [r2, #8] + 197 014a 1B07 lsls r3, r3, #28 + 198 014c D9D4 bmi .L20 + 199 014e D168 ldr r1, [r2, #12] + 200 0150 94F83830 ldrb r3, [r4, #56] @ zero_extendqisi2 + 201 0154 257F ldrb r5, [r4, #28] @ zero_extendqisi2 + 202 0156 21F48041 bic r1, r1, #16384 + 203 015a 5B00 lsls r3, r3, #1 + 204 015c 21F00201 bic r1, r1, #2 + 205 0160 43EA8533 orr r3, r3, r5, lsl #14 + 206 0164 0B43 orrs r3, r3, r1 + 207 0166 2169 ldr r1, [r4, #16] + 208 0168 D360 str r3, [r2, #12] + 209 016a 1369 ldr r3, [r2, #16] + 210 016c 19BB cbnz r1, .L44 + 211 016e 23F48033 bic r3, r3, #65536 + 212 0172 1361 str r3, [r2, #16] + 213 0174 D2F8C030 ldr r3, [r2, #192] + 214 0178 23F47F53 bic r3, r3, #16320 + 215 017c 23F03F03 bic r3, r3, #63 + 216 0180 C2F8C030 str r3, [r2, #192] + 217 .L18: + 218 0184 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2 + 219 0188 012B cmp r3, #1 + 220 018a 21D0 beq .L45 + 221 018c 1369 ldr r3, [r2, #16] + 222 018e 23F00103 bic r3, r3, #1 + 223 0192 1361 str r3, [r2, #16] + 224 0194 B5E7 b .L20 + 225 .L41: + 226 0196 A16A ldr r1, [r4, #40] + 227 0198 0139 subs r1, r1, #1 + 228 019a 43EA4143 orr r3, r3, r1, lsl #17 + 229 019e 9AE7 b .L13 + 230 .L24: + 231 01a0 0120 movs r0, #1 + ARM GAS /tmp/ccB34LXC.s page 5 + + + 232 01a2 03B0 add sp, sp, #12 + 233 @ sp needed + 234 01a4 30BD pop {r4, r5, pc} + 235 .L43: + 236 01a6 116B ldr r1, [r2, #48] + 237 01a8 236A ldr r3, [r4, #32] + 238 01aa 21F00F01 bic r1, r1, #15 + 239 01ae 013B subs r3, r3, #1 + 240 01b0 0B43 orrs r3, r3, r1 + 241 01b2 1363 str r3, [r2, #48] + 242 01b4 ACE7 b .L22 + 243 .L44: + 244 01b6 43F48033 orr r3, r3, #65536 + 245 01ba 1361 str r3, [r2, #16] + 246 01bc D2F8C030 ldr r3, [r2, #192] + 247 01c0 23F47F53 bic r3, r3, #16320 + 248 01c4 23F03F03 bic r3, r3, #63 + 249 01c8 0B43 orrs r3, r3, r1 + 250 01ca C2F8C030 str r3, [r2, #192] + 251 01ce D9E7 b .L18 + 252 .L45: + 253 01d0 1169 ldr r1, [r2, #16] + 254 01d2 636C ldr r3, [r4, #68] + 255 01d4 A56C ldr r5, [r4, #72] + 256 01d6 21F4FF61 bic r1, r1, #2040 + 257 01da 21F00401 bic r1, r1, #4 + 258 01de 2B43 orrs r3, r3, r5 + 259 01e0 0B43 orrs r3, r3, r1 + 260 01e2 E16C ldr r1, [r4, #76] + 261 01e4 0B43 orrs r3, r3, r1 + 262 01e6 216D ldr r1, [r4, #80] + 263 01e8 0B43 orrs r3, r3, r1 + 264 01ea 43F00103 orr r3, r3, #1 + 265 01ee 1361 str r3, [r2, #16] + 266 01f0 87E7 b .L20 + 267 .L47: + 268 01f2 00BF .align 2 + 269 .L46: + 270 01f4 00000000 .word SystemCoreClock + 271 01f8 632D3E05 .word 87960931 + 272 01fc 00010050 .word 1342177536 + 273 0200 00030050 .word 1342178048 + 274 0204 0740F0FF .word -1032185 + 276 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 277 .align 1 + 278 .p2align 2,,3 + 279 .weak HAL_ADC_MspDeInit + 280 .syntax unified + 281 .thumb + 282 .thumb_func + 283 .fpu fpv4-sp-d16 + 285 HAL_ADC_MspDeInit: + 286 @ args = 0, pretend = 0, frame = 0 + 287 @ frame_needed = 0, uses_anonymous_args = 0 + 288 @ link register save eliminated. + 289 0000 7047 bx lr + 291 0002 00BF .section .text.HAL_ADC_PollForConversion,"ax",%progbits + ARM GAS /tmp/ccB34LXC.s page 6 + + + 292 .align 1 + 293 .p2align 2,,3 + 294 .global HAL_ADC_PollForConversion + 295 .syntax unified + 296 .thumb + 297 .thumb_func + 298 .fpu fpv4-sp-d16 + 300 HAL_ADC_PollForConversion: + 301 @ args = 0, pretend = 0, frame = 0 + 302 @ frame_needed = 0, uses_anonymous_args = 0 + 303 0000 3E4B ldr r3, .L87 + 304 0002 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 305 0006 8469 ldr r4, [r0, #24] + 306 0008 9F68 ldr r7, [r3, #8] + 307 000a 082C cmp r4, #8 + 308 000c 0546 mov r5, r0 + 309 000e 0E46 mov r6, r1 + 310 0010 07F01F07 and r7, r7, #31 + 311 0014 0BD0 beq .L50 + 312 0016 092F cmp r7, #9 + 313 0018 5DD8 bhi .L51 + 314 001a 40F22123 movw r3, #545 + 315 001e FB40 lsrs r3, r3, r7 + 316 0020 D907 lsls r1, r3, #31 + 317 0022 58D5 bpl .L51 + 318 0024 0368 ldr r3, [r0] + 319 0026 DB68 ldr r3, [r3, #12] + 320 0028 DA07 lsls r2, r3, #31 + 321 002a 59D4 bmi .L82 + 322 .L70: + 323 002c 0424 movs r4, #4 + 324 .L50: + 325 002e FFF7FEFF bl HAL_GetTick + 326 0032 2A68 ldr r2, [r5] + 327 0034 8046 mov r8, r0 + 328 .L53: + 329 0036 731C adds r3, r6, #1 + 330 0038 28D1 bne .L57 + 331 .L58: + 332 003a 1368 ldr r3, [r2] + 333 003c 1C42 tst r4, r3 + 334 003e FCD0 beq .L58 + 335 .L59: + 336 0040 EB6D ldr r3, [r5, #92] + 337 0042 43F40073 orr r3, r3, #512 + 338 0046 EB65 str r3, [r5, #92] + 339 0048 D368 ldr r3, [r2, #12] + 340 004a 13F4406F tst r3, #3072 + 341 004e 0FD1 bne .L62 + 342 0050 6B7F ldrb r3, [r5, #29] @ zero_extendqisi2 + 343 0052 6BB9 cbnz r3, .L62 + 344 0054 1368 ldr r3, [r2] + 345 0056 1807 lsls r0, r3, #28 + 346 0058 0AD5 bpl .L62 + 347 005a EB6D ldr r3, [r5, #92] + 348 005c 23F48073 bic r3, r3, #256 + 349 0060 EB65 str r3, [r5, #92] + ARM GAS /tmp/ccB34LXC.s page 7 + + + 350 0062 EB6D ldr r3, [r5, #92] + 351 0064 D904 lsls r1, r3, #19 + 352 0066 03D4 bmi .L62 + 353 0068 EB6D ldr r3, [r5, #92] + 354 006a 43F00103 orr r3, r3, #1 + 355 006e EB65 str r3, [r5, #92] + 356 .L62: + 357 0070 234B ldr r3, .L87+4 + 358 0072 9A42 cmp r2, r3 + 359 0074 29D0 beq .L64 + 360 .L68: + 361 0076 D068 ldr r0, [r2, #12] + 362 .L65: + 363 0078 082C cmp r4, #8 + 364 007a 22D0 beq .L83 + 365 007c 10F48040 ands r0, r0, #16384 + 366 0080 06BF itte eq + 367 0082 0C23 moveq r3, #12 + 368 0084 1360 streq r3, [r2] + 369 0086 0020 movne r0, #0 + 370 .L80: + 371 0088 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 372 .L57: + 373 008c 1368 ldr r3, [r2] + 374 008e 2342 tst r3, r4 + 375 0090 D6D1 bne .L59 + 376 0092 FFF7FEFF bl HAL_GetTick + 377 0096 A0EB0800 sub r0, r0, r8 + 378 009a B042 cmp r0, r6 + 379 009c 2A68 ldr r2, [r5] + 380 009e 0AD9 bls .L84 + 381 00a0 1368 ldr r3, [r2] + 382 00a2 2340 ands r3, r3, r4 + 383 00a4 C7D1 bne .L53 + 384 .L85: + 385 00a6 EA6D ldr r2, [r5, #92] + 386 00a8 85F85830 strb r3, [r5, #88] + 387 00ac 42F00402 orr r2, r2, #4 + 388 00b0 EA65 str r2, [r5, #92] + 389 00b2 0320 movs r0, #3 + 390 00b4 E8E7 b .L80 + 391 .L84: + 392 00b6 002E cmp r6, #0 + 393 00b8 BDD1 bne .L53 + 394 00ba 1368 ldr r3, [r2] + 395 00bc 2340 ands r3, r3, r4 + 396 00be BAD1 bne .L53 + 397 00c0 F1E7 b .L85 + 398 .L83: + 399 00c2 1460 str r4, [r2] + 400 00c4 0020 movs r0, #0 + 401 00c6 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 402 .L64: + 403 00ca 092F cmp r7, #9 + 404 00cc 0FD9 bls .L86 + 405 .L67: + 406 00ce 4FF0A043 mov r3, #1342177280 + ARM GAS /tmp/ccB34LXC.s page 8 + + + 407 00d2 D868 ldr r0, [r3, #12] + 408 00d4 D0E7 b .L65 + 409 .L51: + 410 00d6 094B ldr r3, .L87 + 411 00d8 9B68 ldr r3, [r3, #8] + 412 00da 13F4604F tst r3, #57344 + 413 00de A5D0 beq .L70 + 414 .L82: + 415 00e0 EB6D ldr r3, [r5, #92] + 416 00e2 43F02003 orr r3, r3, #32 + 417 00e6 0120 movs r0, #1 + 418 00e8 EB65 str r3, [r5, #92] + 419 00ea BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 420 .L86: + 421 00ee 40F22123 movw r3, #545 + 422 00f2 23FA07F7 lsr r7, r3, r7 + 423 00f6 FB07 lsls r3, r7, #31 + 424 00f8 BDD4 bmi .L68 + 425 00fa E8E7 b .L67 + 426 .L88: + 427 .align 2 + 428 .L87: + 429 00fc 00030050 .word 1342178048 + 430 0100 00010050 .word 1342177536 + 432 .section .text.HAL_ADC_PollForEvent,"ax",%progbits + 433 .align 1 + 434 .p2align 2,,3 + 435 .global HAL_ADC_PollForEvent + 436 .syntax unified + 437 .thumb + 438 .thumb_func + 439 .fpu fpv4-sp-d16 + 441 HAL_ADC_PollForEvent: + 442 @ args = 0, pretend = 0, frame = 0 + 443 @ frame_needed = 0, uses_anonymous_args = 0 + 444 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 445 0002 0546 mov r5, r0 + 446 0004 0C46 mov r4, r1 + 447 0006 1646 mov r6, r2 + 448 0008 FFF7FEFF bl HAL_GetTick + 449 000c 2968 ldr r1, [r5] + 450 000e 0746 mov r7, r0 + 451 .L90: + 452 0010 731C adds r3, r6, #1 + 453 0012 23D1 bne .L95 + 454 .L96: + 455 0014 0B68 ldr r3, [r1] + 456 0016 34EA0303 bics r3, r4, r3 + 457 001a FBD1 bne .L96 + 458 .L97: + 459 001c B4F5807F cmp r4, #256 + 460 0020 4CD0 beq .L99 + 461 0022 10D9 bls .L109 + 462 0024 B4F5007F cmp r4, #512 + 463 0028 36D0 beq .L104 + 464 002a B4F5806F cmp r4, #1024 + 465 002e 3AD1 bne .L103 + ARM GAS /tmp/ccB34LXC.s page 9 + + + 466 0030 EB6D ldr r3, [r5, #92] + 467 0032 43F48043 orr r3, r3, #16384 + 468 0036 EB65 str r3, [r5, #92] + 469 0038 2B6E ldr r3, [r5, #96] + 470 003a 43F00803 orr r3, r3, #8 + 471 003e 2B66 str r3, [r5, #96] + 472 0040 0020 movs r0, #0 + 473 0042 0C60 str r4, [r1] + 474 0044 F8BD pop {r3, r4, r5, r6, r7, pc} + 475 .L109: + 476 0046 022C cmp r4, #2 + 477 0048 3FD0 beq .L101 + 478 004a 802C cmp r4, #128 + 479 004c 2BD1 bne .L103 + 480 004e EB6D ldr r3, [r5, #92] + 481 0050 43F48033 orr r3, r3, #65536 + 482 0054 EB65 str r3, [r5, #92] + 483 0056 0020 movs r0, #0 + 484 0058 0C60 str r4, [r1] + 485 005a F8BD pop {r3, r4, r5, r6, r7, pc} + 486 .L95: + 487 005c 0B68 ldr r3, [r1] + 488 005e 34EA0303 bics r3, r4, r3 + 489 0062 DBD0 beq .L97 + 490 0064 FFF7FEFF bl HAL_GetTick + 491 0068 C01B subs r0, r0, r7 + 492 006a B042 cmp r0, r6 + 493 006c 2968 ldr r1, [r5] + 494 006e 0CD9 bls .L110 + 495 0070 0B68 ldr r3, [r1] + 496 0072 34EA0303 bics r3, r4, r3 + 497 0076 CBD0 beq .L90 + 498 .L111: + 499 0078 EB6D ldr r3, [r5, #92] + 500 007a 0022 movs r2, #0 + 501 007c 43F00403 orr r3, r3, #4 + 502 0080 85F85820 strb r2, [r5, #88] + 503 0084 EB65 str r3, [r5, #92] + 504 0086 0320 movs r0, #3 + 505 0088 F8BD pop {r3, r4, r5, r6, r7, pc} + 506 .L110: + 507 008a 002E cmp r6, #0 + 508 008c C0D1 bne .L90 + 509 008e 0B68 ldr r3, [r1] + 510 0090 34EA0303 bics r3, r4, r3 + 511 0094 BCD0 beq .L90 + 512 0096 EFE7 b .L111 + 513 .L104: + 514 0098 EB6D ldr r3, [r5, #92] + 515 009a 43F48023 orr r3, r3, #262144 + 516 009e EB65 str r3, [r5, #92] + 517 00a0 0020 movs r0, #0 + 518 00a2 0C60 str r4, [r1] + 519 00a4 F8BD pop {r3, r4, r5, r6, r7, pc} + 520 .L103: + 521 00a6 E86B ldr r0, [r5, #60] + 522 00a8 B0B9 cbnz r0, .L106 + ARM GAS /tmp/ccB34LXC.s page 10 + + + 523 00aa EB6D ldr r3, [r5, #92] + 524 00ac 43F48063 orr r3, r3, #1024 + 525 00b0 EB65 str r3, [r5, #92] + 526 00b2 2B6E ldr r3, [r5, #96] + 527 00b4 43F00203 orr r3, r3, #2 + 528 00b8 2B66 str r3, [r5, #96] + 529 00ba F8BD pop {r3, r4, r5, r6, r7, pc} + 530 .L99: + 531 00bc EB6D ldr r3, [r5, #92] + 532 00be 43F40033 orr r3, r3, #131072 + 533 00c2 EB65 str r3, [r5, #92] + 534 00c4 0020 movs r0, #0 + 535 00c6 0C60 str r4, [r1] + 536 00c8 F8BD pop {r3, r4, r5, r6, r7, pc} + 537 .L101: + 538 00ca EB6D ldr r3, [r5, #92] + 539 00cc 43F40063 orr r3, r3, #2048 + 540 00d0 EB65 str r3, [r5, #92] + 541 00d2 0020 movs r0, #0 + 542 00d4 0C60 str r4, [r1] + 543 00d6 F8BD pop {r3, r4, r5, r6, r7, pc} + 544 .L106: + 545 00d8 1023 movs r3, #16 + 546 00da 0B60 str r3, [r1] + 547 00dc 0020 movs r0, #0 + 548 00de F8BD pop {r3, r4, r5, r6, r7, pc} + 550 .section .text.HAL_ADC_GetValue,"ax",%progbits + 551 .align 1 + 552 .p2align 2,,3 + 553 .global HAL_ADC_GetValue + 554 .syntax unified + 555 .thumb + 556 .thumb_func + 557 .fpu fpv4-sp-d16 + 559 HAL_ADC_GetValue: + 560 @ args = 0, pretend = 0, frame = 0 + 561 @ frame_needed = 0, uses_anonymous_args = 0 + 562 @ link register save eliminated. + 563 0000 0368 ldr r3, [r0] + 564 0002 186C ldr r0, [r3, #64] + 565 0004 7047 bx lr + 567 0006 00BF .section .text.HAL_ADC_StartSampling,"ax",%progbits + 568 .align 1 + 569 .p2align 2,,3 + 570 .global HAL_ADC_StartSampling + 571 .syntax unified + 572 .thumb + 573 .thumb_func + 574 .fpu fpv4-sp-d16 + 576 HAL_ADC_StartSampling: + 577 @ args = 0, pretend = 0, frame = 0 + 578 @ frame_needed = 0, uses_anonymous_args = 0 + 579 @ link register save eliminated. + 580 0000 0346 mov r3, r0 + 581 0002 0020 movs r0, #0 + 582 0004 1A68 ldr r2, [r3] + 583 0006 1369 ldr r3, [r2, #16] + ARM GAS /tmp/ccB34LXC.s page 11 + + + 584 0008 43F00073 orr r3, r3, #33554432 + 585 000c 1361 str r3, [r2, #16] + 586 000e 7047 bx lr + 588 .section .text.HAL_ADC_StopSampling,"ax",%progbits + 589 .align 1 + 590 .p2align 2,,3 + 591 .global HAL_ADC_StopSampling + 592 .syntax unified + 593 .thumb + 594 .thumb_func + 595 .fpu fpv4-sp-d16 + 597 HAL_ADC_StopSampling: + 598 @ args = 0, pretend = 0, frame = 0 + 599 @ frame_needed = 0, uses_anonymous_args = 0 + 600 @ link register save eliminated. + 601 0000 0346 mov r3, r0 + 602 0002 0020 movs r0, #0 + 603 0004 1A68 ldr r2, [r3] + 604 0006 1369 ldr r3, [r2, #16] + 605 0008 23F00073 bic r3, r3, #33554432 + 606 000c 1361 str r3, [r2, #16] + 607 000e 7047 bx lr + 609 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits + 610 .align 1 + 611 .p2align 2,,3 + 612 .weak HAL_ADC_ConvCpltCallback + 613 .syntax unified + 614 .thumb + 615 .thumb_func + 616 .fpu fpv4-sp-d16 + 618 HAL_ADC_ConvCpltCallback: + 619 @ args = 0, pretend = 0, frame = 0 + 620 @ frame_needed = 0, uses_anonymous_args = 0 + 621 @ link register save eliminated. + 622 0000 7047 bx lr + 624 0002 00BF .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 625 .align 1 + 626 .p2align 2,,3 + 627 .weak HAL_ADC_ConvHalfCpltCallback + 628 .syntax unified + 629 .thumb + 630 .thumb_func + 631 .fpu fpv4-sp-d16 + 633 HAL_ADC_ConvHalfCpltCallback: + 634 @ args = 0, pretend = 0, frame = 0 + 635 @ frame_needed = 0, uses_anonymous_args = 0 + 636 @ link register save eliminated. + 637 0000 7047 bx lr + 639 0002 00BF .section .text.ADC_DMAHalfConvCplt,"ax",%progbits + 640 .align 1 + 641 .p2align 2,,3 + 642 .global ADC_DMAHalfConvCplt + 643 .syntax unified + 644 .thumb + 645 .thumb_func + 646 .fpu fpv4-sp-d16 + 648 ADC_DMAHalfConvCplt: + ARM GAS /tmp/ccB34LXC.s page 12 + + + 649 @ args = 0, pretend = 0, frame = 0 + 650 @ frame_needed = 0, uses_anonymous_args = 0 + 651 0000 08B5 push {r3, lr} + 652 0002 806A ldr r0, [r0, #40] + 653 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback + 654 0008 08BD pop {r3, pc} + 656 000a 00BF .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits + 657 .align 1 + 658 .p2align 2,,3 + 659 .weak HAL_ADC_LevelOutOfWindowCallback + 660 .syntax unified + 661 .thumb + 662 .thumb_func + 663 .fpu fpv4-sp-d16 + 665 HAL_ADC_LevelOutOfWindowCallback: + 666 @ args = 0, pretend = 0, frame = 0 + 667 @ frame_needed = 0, uses_anonymous_args = 0 + 668 @ link register save eliminated. + 669 0000 7047 bx lr + 671 0002 00BF .section .text.HAL_ADC_ErrorCallback,"ax",%progbits + 672 .align 1 + 673 .p2align 2,,3 + 674 .weak HAL_ADC_ErrorCallback + 675 .syntax unified + 676 .thumb + 677 .thumb_func + 678 .fpu fpv4-sp-d16 + 680 HAL_ADC_ErrorCallback: + 681 @ args = 0, pretend = 0, frame = 0 + 682 @ frame_needed = 0, uses_anonymous_args = 0 + 683 @ link register save eliminated. + 684 0000 7047 bx lr + 686 0002 00BF .section .text.HAL_ADC_IRQHandler,"ax",%progbits + 687 .align 1 + 688 .p2align 2,,3 + 689 .global HAL_ADC_IRQHandler + 690 .syntax unified + 691 .thumb + 692 .thumb_func + 693 .fpu fpv4-sp-d16 + 695 HAL_ADC_IRQHandler: + 696 @ args = 0, pretend = 0, frame = 0 + 697 @ frame_needed = 0, uses_anonymous_args = 0 + 698 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 699 0002 0368 ldr r3, [r0] + 700 0004 8F4A ldr r2, .L246 + 701 0006 1D68 ldr r5, [r3] + 702 0008 5E68 ldr r6, [r3, #4] + 703 000a 9768 ldr r7, [r2, #8] + 704 000c A907 lsls r1, r5, #30 + 705 000e 0446 mov r4, r0 + 706 0010 07F01F07 and r7, r7, #31 + 707 0014 02D5 bpl .L122 + 708 0016 B207 lsls r2, r6, #30 + 709 0018 00F19F80 bmi .L236 + 710 .L122: + 711 001c 6907 lsls r1, r5, #29 + ARM GAS /tmp/ccB34LXC.s page 13 + + + 712 001e 79D5 bpl .L124 + 713 0020 7207 lsls r2, r6, #29 + 714 0022 77D5 bpl .L124 + 715 .L125: + 716 0024 E26D ldr r2, [r4, #92] + 717 0026 D206 lsls r2, r2, #27 + 718 0028 03D4 bmi .L127 + 719 002a E26D ldr r2, [r4, #92] + 720 002c 42F40072 orr r2, r2, #512 + 721 0030 E265 str r2, [r4, #92] + 722 .L127: + 723 0032 DA68 ldr r2, [r3, #12] + 724 0034 12F4406F tst r2, #3072 + 725 0038 1CD1 bne .L129 + 726 003a 834A ldr r2, .L246+4 + 727 003c 9342 cmp r3, r2 + 728 003e 00F0DE80 beq .L130 + 729 .L159: + 730 0042 DA68 ldr r2, [r3, #12] + 731 .L131: + 732 0044 9004 lsls r0, r2, #18 + 733 0046 15D4 bmi .L129 + 734 0048 1A68 ldr r2, [r3] + 735 004a 1107 lsls r1, r2, #28 + 736 004c 12D5 bpl .L129 + 737 004e 9A68 ldr r2, [r3, #8] + 738 0050 5207 lsls r2, r2, #29 + 739 0052 00F1E580 bmi .L133 + 740 0056 5A68 ldr r2, [r3, #4] + 741 0058 22F00C02 bic r2, r2, #12 + 742 005c 5A60 str r2, [r3, #4] + 743 005e E36D ldr r3, [r4, #92] + 744 0060 23F48073 bic r3, r3, #256 + 745 0064 E365 str r3, [r4, #92] + 746 0066 E36D ldr r3, [r4, #92] + 747 0068 DB04 lsls r3, r3, #19 + 748 006a 03D4 bmi .L129 + 749 006c E36D ldr r3, [r4, #92] + 750 006e 43F00103 orr r3, r3, #1 + 751 0072 E365 str r3, [r4, #92] + 752 .L129: + 753 0074 2046 mov r0, r4 + 754 0076 FFF7FEFF bl HAL_ADC_ConvCpltCallback + 755 007a 2368 ldr r3, [r4] + 756 007c 0C22 movs r2, #12 + 757 007e 1A60 str r2, [r3] + 758 .L126: + 759 0080 A806 lsls r0, r5, #26 + 760 0082 4DD5 bpl .L135 + 761 .L244: + 762 0084 B106 lsls r1, r6, #26 + 763 0086 4BD5 bpl .L135 + 764 .L136: + 765 0088 E26D ldr r2, [r4, #92] + 766 008a D106 lsls r1, r2, #27 + 767 008c 03D4 bmi .L138 + 768 008e E26D ldr r2, [r4, #92] + ARM GAS /tmp/ccB34LXC.s page 14 + + + 769 0090 42F40052 orr r2, r2, #8192 + 770 0094 E265 str r2, [r4, #92] + 771 .L138: + 772 0096 6C49 ldr r1, .L246+4 + 773 0098 DA6C ldr r2, [r3, #76] + 774 009a D868 ldr r0, [r3, #12] + 775 009c 8B42 cmp r3, r1 + 776 009e 02F4C072 and r2, r2, #384 + 777 00a2 68D0 beq .L237 + 778 .L139: + 779 00a4 D968 ldr r1, [r3, #12] + 780 .L142: + 781 00a6 D2B9 cbnz r2, .L144 + 782 00a8 8A01 lsls r2, r1, #6 + 783 00aa 00F1A080 bmi .L238 + 784 .L145: + 785 00ae 1A68 ldr r2, [r3] + 786 00b0 5006 lsls r0, r2, #25 + 787 00b2 14D5 bpl .L144 + 788 00b4 8902 lsls r1, r1, #10 + 789 00b6 12D4 bmi .L144 + 790 00b8 9A68 ldr r2, [r3, #8] + 791 00ba 1207 lsls r2, r2, #28 + 792 00bc 00F1B980 bmi .L147 + 793 00c0 5A68 ldr r2, [r3, #4] + 794 00c2 22F06002 bic r2, r2, #96 + 795 00c6 5A60 str r2, [r3, #4] + 796 00c8 E36D ldr r3, [r4, #92] + 797 00ca 23F48053 bic r3, r3, #4096 + 798 00ce E365 str r3, [r4, #92] + 799 00d0 E36D ldr r3, [r4, #92] + 800 00d2 D805 lsls r0, r3, #23 + 801 00d4 03D4 bmi .L144 + 802 00d6 E36D ldr r3, [r4, #92] + 803 00d8 43F00103 orr r3, r3, #1 + 804 00dc E365 str r3, [r4, #92] + 805 .L144: + 806 00de 2046 mov r0, r4 + 807 00e0 FFF7FEFF bl HAL_ADCEx_InjectedConvCpltCallback + 808 00e4 2368 ldr r3, [r4] + 809 00e6 6022 movs r2, #96 + 810 00e8 1A60 str r2, [r3] + 811 .L137: + 812 00ea 2906 lsls r1, r5, #24 + 813 00ec 01D5 bpl .L149 + 814 00ee 3206 lsls r2, r6, #24 + 815 00f0 56D4 bmi .L239 + 816 .L149: + 817 00f2 E805 lsls r0, r5, #23 + 818 00f4 01D5 bpl .L150 + 819 00f6 F105 lsls r1, r6, #23 + 820 00f8 5DD4 bmi .L240 + 821 .L150: + 822 00fa AA05 lsls r2, r5, #22 + 823 00fc 01D5 bpl .L151 + 824 00fe B005 lsls r0, r6, #22 + 825 0100 42D4 bmi .L241 + ARM GAS /tmp/ccB34LXC.s page 15 + + + 826 .L151: + 827 0102 E906 lsls r1, r5, #27 + 828 0104 01D5 bpl .L152 + 829 0106 F206 lsls r2, r6, #27 + 830 0108 0FD4 bmi .L242 + 831 .L152: + 832 010a 6805 lsls r0, r5, #21 + 833 010c 01D5 bpl .L121 + 834 010e 7105 lsls r1, r6, #21 + 835 0110 5DD4 bmi .L243 + 836 .L121: + 837 0112 F8BD pop {r3, r4, r5, r6, r7, pc} + 838 .L124: + 839 0114 2807 lsls r0, r5, #28 + 840 0116 B3D5 bpl .L126 + 841 0118 3107 lsls r1, r6, #28 + 842 011a 83D4 bmi .L125 + 843 011c A806 lsls r0, r5, #26 + 844 011e B1D4 bmi .L244 + 845 .L135: + 846 0120 6A06 lsls r2, r5, #25 + 847 0122 E2D5 bpl .L137 + 848 0124 7006 lsls r0, r6, #25 + 849 0126 E0D5 bpl .L137 + 850 0128 AEE7 b .L136 + 851 .L242: + 852 012a E26B ldr r2, [r4, #60] + 853 012c 32B1 cbz r2, .L153 + 854 012e 002F cmp r7, #0 + 855 0130 6BD0 beq .L154 + 856 0132 444A ldr r2, .L246 + 857 0134 9268 ldr r2, [r2, #8] + 858 0136 12F4604F tst r2, #57344 + 859 013a 0BD0 beq .L155 + 860 .L153: + 861 013c E36D ldr r3, [r4, #92] + 862 013e 43F48063 orr r3, r3, #1024 + 863 0142 E365 str r3, [r4, #92] + 864 0144 236E ldr r3, [r4, #96] + 865 0146 43F00203 orr r3, r3, #2 + 866 014a 2366 str r3, [r4, #96] + 867 014c 2046 mov r0, r4 + 868 014e FFF7FEFF bl HAL_ADC_ErrorCallback + 869 0152 2368 ldr r3, [r4] + 870 .L155: + 871 0154 1022 movs r2, #16 + 872 0156 1A60 str r2, [r3] + 873 0158 D7E7 b .L152 + 874 .L236: + 875 015a C36D ldr r3, [r0, #92] + 876 015c D806 lsls r0, r3, #27 + 877 015e 03D4 bmi .L123 + 878 0160 E36D ldr r3, [r4, #92] + 879 0162 43F40063 orr r3, r3, #2048 + 880 0166 E365 str r3, [r4, #92] + 881 .L123: + 882 0168 2046 mov r0, r4 + ARM GAS /tmp/ccB34LXC.s page 16 + + + 883 016a FFF7FEFF bl HAL_ADCEx_EndOfSamplingCallback + 884 016e 2368 ldr r3, [r4] + 885 0170 0222 movs r2, #2 + 886 0172 1A60 str r2, [r3] + 887 0174 52E7 b .L122 + 888 .L237: + 889 0176 002F cmp r7, #0 + 890 0178 94D0 beq .L139 + 891 017a B91F subs r1, r7, #6 + 892 017c 0129 cmp r1, #1 + 893 017e 91D9 bls .L139 + 894 0180 4FF0A041 mov r1, #1342177280 + 895 0184 C968 ldr r1, [r1, #12] + 896 0186 8EE7 b .L142 + 897 .L241: + 898 0188 E36D ldr r3, [r4, #92] + 899 018a 43F48023 orr r3, r3, #262144 + 900 018e E365 str r3, [r4, #92] + 901 0190 2046 mov r0, r4 + 902 0192 FFF7FEFF bl HAL_ADCEx_LevelOutOfWindow3Callback + 903 0196 2368 ldr r3, [r4] + 904 0198 4FF40072 mov r2, #512 + 905 019c 1A60 str r2, [r3] + 906 019e B0E7 b .L151 + 907 .L239: + 908 01a0 E36D ldr r3, [r4, #92] + 909 01a2 43F48033 orr r3, r3, #65536 + 910 01a6 E365 str r3, [r4, #92] + 911 01a8 2046 mov r0, r4 + 912 01aa FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback + 913 01ae 2368 ldr r3, [r4] + 914 01b0 8022 movs r2, #128 + 915 01b2 1A60 str r2, [r3] + 916 01b4 9DE7 b .L149 + 917 .L240: + 918 01b6 E36D ldr r3, [r4, #92] + 919 01b8 43F40033 orr r3, r3, #131072 + 920 01bc E365 str r3, [r4, #92] + 921 01be 2046 mov r0, r4 + 922 01c0 FFF7FEFF bl HAL_ADCEx_LevelOutOfWindow2Callback + 923 01c4 2368 ldr r3, [r4] + 924 01c6 4FF48072 mov r2, #256 + 925 01ca 1A60 str r2, [r3] + 926 01cc 95E7 b .L150 + 927 .L243: + 928 01ce E26D ldr r2, [r4, #92] + 929 01d0 42F48042 orr r2, r2, #16384 + 930 01d4 E265 str r2, [r4, #92] + 931 01d6 226E ldr r2, [r4, #96] + 932 01d8 4FF48061 mov r1, #1024 + 933 01dc 42F00802 orr r2, r2, #8 + 934 01e0 2266 str r2, [r4, #96] + 935 01e2 2046 mov r0, r4 + 936 01e4 1960 str r1, [r3] + 937 01e6 BDE8F840 pop {r3, r4, r5, r6, r7, lr} + 938 01ea FFF7FEBF b HAL_ADCEx_InjectedQueueOverflowCallback + 939 .L238: + ARM GAS /tmp/ccB34LXC.s page 17 + + + 940 01ee 00F44060 and r0, r0, #3072 + 941 01f2 01F40052 and r2, r1, #8192 + 942 01f6 0243 orrs r2, r2, r0 + 943 01f8 7FF471AF bne .L144 + 944 01fc 57E7 b .L145 + 945 .L130: + 946 01fe 092F cmp r7, #9 + 947 0200 07D9 bls .L245 + 948 .L158: + 949 0202 4FF0A042 mov r2, #1342177280 + 950 0206 D268 ldr r2, [r2, #12] + 951 0208 1CE7 b .L131 + 952 .L154: + 953 020a DA68 ldr r2, [r3, #12] + 954 020c D707 lsls r7, r2, #31 + 955 020e A1D5 bpl .L155 + 956 0210 94E7 b .L153 + 957 .L245: + 958 0212 40F22122 movw r2, #545 + 959 0216 FA40 lsrs r2, r2, r7 + 960 0218 D207 lsls r2, r2, #31 + 961 021a 3FF512AF bmi .L159 + 962 021e F0E7 b .L158 + 963 .L133: + 964 0220 E36D ldr r3, [r4, #92] + 965 0222 43F01003 orr r3, r3, #16 + 966 0226 E365 str r3, [r4, #92] + 967 0228 236E ldr r3, [r4, #96] + 968 022a 43F00103 orr r3, r3, #1 + 969 022e 2366 str r3, [r4, #96] + 970 0230 20E7 b .L129 + 971 .L147: + 972 0232 E36D ldr r3, [r4, #92] + 973 0234 43F01003 orr r3, r3, #16 + 974 0238 E365 str r3, [r4, #92] + 975 023a 236E ldr r3, [r4, #96] + 976 023c 43F00103 orr r3, r3, #1 + 977 0240 2366 str r3, [r4, #96] + 978 0242 4CE7 b .L144 + 979 .L247: + 980 .align 2 + 981 .L246: + 982 0244 00030050 .word 1342178048 + 983 0248 00010050 .word 1342177536 + 985 .section .text.ADC_DMAConvCplt,"ax",%progbits + 986 .align 1 + 987 .p2align 2,,3 + 988 .global ADC_DMAConvCplt + 989 .syntax unified + 990 .thumb + 991 .thumb_func + 992 .fpu fpv4-sp-d16 + 994 ADC_DMAConvCplt: + 995 @ args = 0, pretend = 0, frame = 0 + 996 @ frame_needed = 0, uses_anonymous_args = 0 + 997 0000 836A ldr r3, [r0, #40] + 998 0002 DA6D ldr r2, [r3, #92] + ARM GAS /tmp/ccB34LXC.s page 18 + + + 999 0004 12F0500F tst r2, #80 + 1000 0008 10B5 push {r4, lr} + 1001 000a DA6D ldr r2, [r3, #92] + 1002 000c 1DD1 bne .L249 + 1003 000e 1968 ldr r1, [r3] + 1004 0010 42F40072 orr r2, r2, #512 + 1005 0014 DA65 str r2, [r3, #92] + 1006 0016 0A68 ldr r2, [r1] + 1007 0018 12F0080F tst r2, #8 + 1008 001c CA68 ldr r2, [r1, #12] + 1009 001e 1BD0 beq .L250 + 1010 0020 12F4406F tst r2, #3072 + 1011 0024 0DD1 bne .L252 + 1012 0026 CA68 ldr r2, [r1, #12] + 1013 0028 9404 lsls r4, r2, #18 + 1014 002a 0AD4 bmi .L252 + 1015 .L259: + 1016 002c DA6D ldr r2, [r3, #92] + 1017 002e 22F48072 bic r2, r2, #256 + 1018 0032 DA65 str r2, [r3, #92] + 1019 0034 DA6D ldr r2, [r3, #92] + 1020 0036 D104 lsls r1, r2, #19 + 1021 0038 03D4 bmi .L252 + 1022 003a DA6D ldr r2, [r3, #92] + 1023 003c 42F00102 orr r2, r2, #1 + 1024 0040 DA65 str r2, [r3, #92] + 1025 .L252: + 1026 0042 1846 mov r0, r3 + 1027 0044 FFF7FEFF bl HAL_ADC_ConvCpltCallback + 1028 .L248: + 1029 0048 10BD pop {r4, pc} + 1030 .L249: + 1031 004a D206 lsls r2, r2, #27 + 1032 004c 0AD4 bmi .L261 + 1033 004e 5B6D ldr r3, [r3, #84] + 1034 0050 BDE81040 pop {r4, lr} + 1035 0054 5B6B ldr r3, [r3, #52] + 1036 0056 1847 bx r3 @ indirect register sibling call + 1037 .L250: + 1038 0058 9007 lsls r0, r2, #30 + 1039 005a E7D5 bpl .L259 + 1040 005c 1846 mov r0, r3 + 1041 005e FFF7FEFF bl HAL_ADC_ConvCpltCallback + 1042 0062 F1E7 b .L248 + 1043 .L261: + 1044 0064 1846 mov r0, r3 + 1045 0066 FFF7FEFF bl HAL_ADC_ErrorCallback + 1046 006a 10BD pop {r4, pc} + 1048 .section .text.ADC_DMAError,"ax",%progbits + 1049 .align 1 + 1050 .p2align 2,,3 + 1051 .global ADC_DMAError + 1052 .syntax unified + 1053 .thumb + 1054 .thumb_func + 1055 .fpu fpv4-sp-d16 + 1057 ADC_DMAError: + ARM GAS /tmp/ccB34LXC.s page 19 + + + 1058 @ args = 0, pretend = 0, frame = 0 + 1059 @ frame_needed = 0, uses_anonymous_args = 0 + 1060 0000 806A ldr r0, [r0, #40] + 1061 0002 08B5 push {r3, lr} + 1062 0004 C36D ldr r3, [r0, #92] + 1063 0006 43F04003 orr r3, r3, #64 + 1064 000a C365 str r3, [r0, #92] + 1065 000c 036E ldr r3, [r0, #96] + 1066 000e 43F00403 orr r3, r3, #4 + 1067 0012 0366 str r3, [r0, #96] + 1068 0014 FFF7FEFF bl HAL_ADC_ErrorCallback + 1069 0018 08BD pop {r3, pc} + 1071 001a 00BF .section .text.HAL_ADC_ConfigChannel,"ax",%progbits + 1072 .align 1 + 1073 .p2align 2,,3 + 1074 .global HAL_ADC_ConfigChannel + 1075 .syntax unified + 1076 .thumb + 1077 .thumb_func + 1078 .fpu fpv4-sp-d16 + 1080 HAL_ADC_ConfigChannel: + 1081 @ args = 0, pretend = 0, frame = 8 + 1082 @ frame_needed = 0, uses_anonymous_args = 0 + 1083 0000 F0B5 push {r4, r5, r6, r7, lr} + 1084 0002 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 + 1085 0006 83B0 sub sp, sp, #12 + 1086 0008 0346 mov r3, r0 + 1087 000a 012A cmp r2, #1 + 1088 000c 4FF00000 mov r0, #0 + 1089 0010 0190 str r0, [sp, #4] + 1090 0012 00F04581 beq .L320 + 1091 0016 1C68 ldr r4, [r3] + 1092 0018 0120 movs r0, #1 + 1093 001a 83F85800 strb r0, [r3, #88] + 1094 001e A268 ldr r2, [r4, #8] + 1095 0020 5507 lsls r5, r2, #29 + 1096 0022 4CD4 bmi .L360 + 1097 0024 4868 ldr r0, [r1, #4] + 1098 0026 0A68 ldr r2, [r1] + 1099 0028 4FEA901E lsr lr, r0, #6 + 1100 002c 0EF00C0E and lr, lr, #12 + 1101 0030 04F1300C add ip, r4, #48 + 1102 0034 00F01F00 and r0, r0, #31 + 1103 0038 5EF80C50 ldr r5, [lr, ip] + 1104 003c C2F38462 ubfx r2, r2, #26, #5 + 1105 0040 1F26 movs r6, #31 + 1106 0042 8240 lsls r2, r2, r0 + 1107 0044 06FA00F0 lsl r0, r6, r0 + 1108 0048 25EA0000 bic r0, r5, r0 + 1109 004c 0243 orrs r2, r2, r0 + 1110 004e 4EF80C20 str r2, [lr, ip] + 1111 0052 A268 ldr r2, [r4, #8] + 1112 0054 5007 lsls r0, r2, #29 + 1113 0056 43D5 bpl .L361 + 1114 0058 A268 ldr r2, [r4, #8] + 1115 005a 0868 ldr r0, [r1] + 1116 .L274: + ARM GAS /tmp/ccB34LXC.s page 20 + + + 1117 005c A268 ldr r2, [r4, #8] + 1118 005e 12F0010F tst r2, #1 + 1119 0062 0246 mov r2, r0 + 1120 0064 0CD1 bne .L292 + 1121 0066 C24D ldr r5, .L366 + 1122 0068 CE68 ldr r6, [r1, #12] + 1123 006a AE42 cmp r6, r5 + 1124 006c 00F0C180 beq .L362 + 1125 0070 D4F8B010 ldr r1, [r4, #176] + 1126 0074 C0F31200 ubfx r0, r0, #0, #19 + 1127 0078 21EA0001 bic r1, r1, r0 + 1128 007c C4F8B010 str r1, [r4, #176] + 1129 .L292: + 1130 0080 BC49 ldr r1, .L366+4 + 1131 0082 0A42 tst r2, r1 + 1132 0084 2AD0 beq .L312 + 1133 0086 BC49 ldr r1, .L366+8 + 1134 0088 BC4D ldr r5, .L366+12 + 1135 008a 8868 ldr r0, [r1, #8] + 1136 008c AA42 cmp r2, r5 + 1137 008e 00F0E076 and r6, r0, #29360128 + 1138 0092 1DD0 beq .L310 + 1139 0094 BA4D ldr r5, .L366+16 + 1140 0096 AA42 cmp r2, r5 + 1141 0098 1AD0 beq .L310 + 1142 009a BA4D ldr r5, .L366+20 + 1143 009c AA42 cmp r2, r5 + 1144 009e 40F03181 bne .L314 + 1145 00a2 10F08070 ands r0, r0, #16777216 + 1146 00a6 19D1 bne .L312 + 1147 00a8 B74A ldr r2, .L366+24 + 1148 00aa 9442 cmp r4, r2 + 1149 00ac 16D0 beq .L312 + 1150 00ae 8A68 ldr r2, [r1, #8] + 1151 00b0 22F0E072 bic r2, r2, #29360128 + 1152 00b4 1643 orrs r6, r6, r2 + 1153 00b6 46F08076 orr r6, r6, #16777216 + 1154 00ba 8E60 str r6, [r1, #8] + 1155 00bc 03E0 b .L267 + 1156 .L360: + 1157 00be DA6D ldr r2, [r3, #92] + 1158 00c0 42F02002 orr r2, r2, #32 + 1159 00c4 DA65 str r2, [r3, #92] + 1160 .L267: + 1161 00c6 0022 movs r2, #0 + 1162 00c8 83F85820 strb r2, [r3, #88] + 1163 00cc 03B0 add sp, sp, #12 + 1164 @ sp needed + 1165 00ce F0BD pop {r4, r5, r6, r7, pc} + 1166 .L310: + 1167 00d0 0202 lsls r2, r0, #8 + 1168 00d2 03D4 bmi .L312 + 1169 00d4 B4F1A04F cmp r4, #1342177280 + 1170 00d8 00F0F580 beq .L363 + 1171 .L312: + 1172 00dc 0020 movs r0, #0 + 1173 00de F2E7 b .L267 + ARM GAS /tmp/ccB34LXC.s page 21 + + + 1174 .L361: + 1175 00e0 A268 ldr r2, [r4, #8] + 1176 00e2 12F00802 ands r2, r2, #8 + 1177 00e6 40F08280 bne .L359 + 1178 00ea 8868 ldr r0, [r1, #8] + 1179 00ec 0E68 ldr r6, [r1] + 1180 00ee B0F1004F cmp r0, #-2147483648 + 1181 00f2 00F01B81 beq .L364 + 1182 00f6 4FEAD65C lsr ip, r6, #23 + 1183 00fa 04F11407 add r7, r4, #20 + 1184 00fe 0CF0040C and ip, ip, #4 + 1185 0102 C6F30456 ubfx r6, r6, #20, #5 + 1186 0106 5CF80750 ldr r5, [ip, r7] + 1187 010a 4FF0070E mov lr, #7 + 1188 010e B040 lsls r0, r0, r6 + 1189 0110 0EFA06F6 lsl r6, lr, r6 + 1190 0114 25EA0605 bic r5, r5, r6 + 1191 0118 2843 orrs r0, r0, r5 + 1192 011a 4CF80700 str r0, [ip, r7] + 1193 011e 6069 ldr r0, [r4, #20] + 1194 0120 20F00040 bic r0, r0, #-2147483648 + 1195 0124 6061 str r0, [r4, #20] + 1196 .L271: + 1197 0126 0F69 ldr r7, [r1, #16] + 1198 0128 E568 ldr r5, [r4, #12] + 1199 012a 042F cmp r7, #4 + 1200 012c 2FD0 beq .L272 + 1201 012e 04F16000 add r0, r4, #96 + 1202 0132 C5F3C105 ubfx r5, r5, #3, #2 + 1203 0136 50F827E0 ldr lr, [r0, r7, lsl #2] + 1204 013a DFF85CC2 ldr ip, .L366+40 + 1205 013e 6E00 lsls r6, r5, #1 + 1206 0140 0D68 ldr r5, [r1] + 1207 0142 0EEA0C0C and ip, lr, ip + 1208 0146 05F0F845 and r5, r5, #2080374784 + 1209 014a 45EA0C0C orr ip, r5, ip + 1210 014e 4D69 ldr r5, [r1, #20] + 1211 0150 B540 lsls r5, r5, r6 + 1212 0152 45EA0C05 orr r5, r5, ip + 1213 0156 45F00045 orr r5, r5, #-2147483648 + 1214 015a 40F82750 str r5, [r0, r7, lsl #2] + 1215 015e 0F69 ldr r7, [r1, #16] + 1216 0160 8E69 ldr r6, [r1, #24] + 1217 0162 50F82750 ldr r5, [r0, r7, lsl #2] + 1218 0166 25F08075 bic r5, r5, #16777216 + 1219 016a 3543 orrs r5, r5, r6 + 1220 016c 40F82750 str r5, [r0, r7, lsl #2] + 1221 0170 0D7F ldrb r5, [r1, #28] @ zero_extendqisi2 + 1222 0172 0E69 ldr r6, [r1, #16] + 1223 0174 012D cmp r5, #1 + 1224 0176 50F82650 ldr r5, [r0, r6, lsl #2] + 1225 017a 08BF it eq + 1226 017c 4FF00072 moveq r2, #33554432 + 1227 0180 25F00075 bic r5, r5, #33554432 + 1228 0184 2A43 orrs r2, r2, r5 + 1229 0186 40F82620 str r2, [r0, r6, lsl #2] + 1230 018a 0868 ldr r0, [r1] + ARM GAS /tmp/ccB34LXC.s page 22 + + + 1231 018c 66E7 b .L274 + 1232 .L272: + 1233 018e 0868 ldr r0, [r1] + 1234 0190 226E ldr r2, [r4, #96] + 1235 0192 226E ldr r2, [r4, #96] + 1236 0194 C0F31205 ubfx r5, r0, #0, #19 + 1237 0198 C2F38462 ubfx r2, r2, #26, #5 + 1238 019c 002D cmp r5, #0 + 1239 019e 40F0FD80 bne .L275 + 1240 01a2 C0F38465 ubfx r5, r0, #26, #5 + 1241 01a6 AA42 cmp r2, r5 + 1242 01a8 00F07181 beq .L276 + 1243 01ac 626E ldr r2, [r4, #100] + 1244 01ae 666E ldr r6, [r4, #100] + 1245 01b0 04F16002 add r2, r4, #96 + 1246 01b4 C6F38466 ubfx r6, r6, #26, #5 + 1247 01b8 04F16407 add r7, r4, #100 + 1248 .L319: + 1249 01bc AE42 cmp r6, r5 + 1250 01be 00F05481 beq .L280 + 1251 01c2 9668 ldr r6, [r2, #8] + 1252 01c4 9668 ldr r6, [r2, #8] + 1253 01c6 02F10807 add r7, r2, #8 + 1254 01ca C6F38466 ubfx r6, r6, #26, #5 + 1255 .L318: + 1256 01ce AE42 cmp r6, r5 + 1257 01d0 00F03981 beq .L284 + 1258 01d4 D668 ldr r6, [r2, #12] + 1259 01d6 D668 ldr r6, [r2, #12] + 1260 01d8 02F10C07 add r7, r2, #12 + 1261 01dc C6F38462 ubfx r2, r6, #26, #5 + 1262 .L288: + 1263 01e0 9542 cmp r5, r2 + 1264 01e2 7FF43BAF bne .L274 + 1265 01e6 3A68 ldr r2, [r7] + 1266 01e8 22F00042 bic r2, r2, #-2147483648 + 1267 01ec 3A60 str r2, [r7] + 1268 .L359: + 1269 01ee 0868 ldr r0, [r1] + 1270 01f0 34E7 b .L274 + 1271 .L362: + 1272 01f2 D4F8B020 ldr r2, [r4, #176] + 1273 01f6 C0F31205 ubfx r5, r0, #0, #19 + 1274 01fa 2A43 orrs r2, r2, r5 + 1275 01fc C4F8B020 str r2, [r4, #176] + 1276 0200 002D cmp r5, #0 + 1277 0202 50D0 beq .L294 + 1278 .syntax unified + 1279 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1280 0204 90FAA0F2 rbit r2, r0 + 1281 @ 0 "" 2 + 1282 .thumb + 1283 .syntax unified + 1284 0208 002A cmp r2, #0 + 1285 020a 00F0F880 beq .L298 + 1286 020e B2FA82F2 clz r2, r2 + 1287 0212 0132 adds r2, r2, #1 + ARM GAS /tmp/ccB34LXC.s page 23 + + + 1288 0214 02F01F02 and r2, r2, #31 + 1289 0218 092A cmp r2, #9 + 1290 021a 40F2F080 bls .L298 + 1291 .syntax unified + 1292 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1293 021e 90FAA0F2 rbit r2, r0 + 1294 @ 0 "" 2 + 1295 .thumb + 1296 .syntax unified + 1297 0222 002A cmp r2, #0 + 1298 0224 00F04F81 beq .L325 + 1299 0228 B2FA82F2 clz r2, r2 + 1300 022c 0132 adds r2, r2, #1 + 1301 022e 9206 lsls r2, r2, #26 + 1302 0230 02F0F842 and r2, r2, #2080374784 + 1303 .L306: + 1304 .syntax unified + 1305 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1306 0234 90FAA0F5 rbit r5, r0 + 1307 @ 0 "" 2 + 1308 .thumb + 1309 .syntax unified + 1310 0238 002D cmp r5, #0 + 1311 023a 00F04981 beq .L326 + 1312 023e B5FA85F5 clz r5, r5 + 1313 0242 0135 adds r5, r5, #1 + 1314 0244 05F01F05 and r5, r5, #31 + 1315 0248 0126 movs r6, #1 + 1316 024a 06FA05F5 lsl r5, r6, r5 + 1317 .L307: + 1318 024e 1543 orrs r5, r5, r2 + 1319 .syntax unified + 1320 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1321 0250 90FAA0F0 rbit r0, r0 + 1322 @ 0 "" 2 + 1323 .thumb + 1324 .syntax unified + 1325 0254 0028 cmp r0, #0 + 1326 0256 00F03981 beq .L327 + 1327 025a B0FA80F0 clz r0, r0 + 1328 025e 421C adds r2, r0, #1 + 1329 0260 02F01F00 and r0, r2, #31 + 1330 0264 6FF01D06 mvn r6, #29 + 1331 0268 0322 movs r2, #3 + 1332 026a 12FB0062 smlabb r2, r2, r0, r6 + 1333 026e 1205 lsls r2, r2, #20 + 1334 0270 42F00072 orr r2, r2, #33554432 + 1335 .L305: + 1336 0274 2A43 orrs r2, r2, r5 + 1337 0276 D60D lsrs r6, r2, #23 + 1338 0278 8868 ldr r0, [r1, #8] + 1339 027a 06F00406 and r6, r6, #4 + 1340 027e 04F11405 add r5, r4, #20 + 1341 0282 C2F30452 ubfx r2, r2, #20, #5 + 1342 0286 00FA02F7 lsl r7, r0, r2 + 1343 028a 4FF0070C mov ip, #7 + 1344 028e 7059 ldr r0, [r6, r5] + ARM GAS /tmp/ccB34LXC.s page 24 + + + 1345 0290 0CFA02F2 lsl r2, ip, r2 + 1346 0294 20EA0202 bic r2, r0, r2 + 1347 0298 3A43 orrs r2, r2, r7 + 1348 029a 7251 str r2, [r6, r5] + 1349 029c 0A68 ldr r2, [r1] + 1350 029e EFE6 b .L292 + 1351 .L320: + 1352 02a0 0220 movs r0, #2 + 1353 02a2 03B0 add sp, sp, #12 + 1354 @ sp needed + 1355 02a4 F0BD pop {r4, r5, r6, r7, pc} + 1356 .L294: + 1357 02a6 800E lsrs r0, r0, #26 + 1358 02a8 0130 adds r0, r0, #1 + 1359 02aa 00F01F06 and r6, r0, #31 + 1360 02ae 092E cmp r6, #9 + 1361 02b0 50D8 bhi .L365 + 1362 02b2 8506 lsls r5, r0, #26 + 1363 02b4 0122 movs r2, #1 + 1364 02b6 B240 lsls r2, r2, r6 + 1365 02b8 05F0F845 and r5, r5, #2080374784 + 1366 02bc 1543 orrs r5, r5, r2 + 1367 02be 06EB4602 add r2, r6, r6, lsl #1 + 1368 02c2 1205 lsls r2, r2, #20 + 1369 02c4 D6E7 b .L305 + 1370 .L363: + 1371 02c6 2C49 ldr r1, .L366+8 + 1372 02c8 3048 ldr r0, .L366+28 + 1373 02ca 8A68 ldr r2, [r1, #8] + 1374 02cc 22F0E072 bic r2, r2, #29360128 + 1375 02d0 1643 orrs r6, r6, r2 + 1376 02d2 46F40006 orr r6, r6, #8388608 + 1377 02d6 8E60 str r6, [r1, #8] + 1378 02d8 0268 ldr r2, [r0] + 1379 02da 2D49 ldr r1, .L366+32 + 1380 02dc 9209 lsrs r2, r2, #6 + 1381 02de A1FB0212 umull r1, r2, r1, r2 + 1382 02e2 9209 lsrs r2, r2, #6 + 1383 02e4 0132 adds r2, r2, #1 + 1384 02e6 02EB4202 add r2, r2, r2, lsl #1 + 1385 02ea 9200 lsls r2, r2, #2 + 1386 02ec 0192 str r2, [sp, #4] + 1387 02ee 019A ldr r2, [sp, #4] + 1388 02f0 002A cmp r2, #0 + 1389 02f2 3FF4F3AE beq .L312 + 1390 .L313: + 1391 02f6 019A ldr r2, [sp, #4] + 1392 02f8 013A subs r2, r2, #1 + 1393 02fa 0192 str r2, [sp, #4] + 1394 02fc 019A ldr r2, [sp, #4] + 1395 02fe 002A cmp r2, #0 + 1396 0300 F9D1 bne .L313 + 1397 0302 EBE6 b .L312 + 1398 .L314: + 1399 0304 234D ldr r5, .L366+36 + 1400 0306 AA42 cmp r2, r5 + 1401 0308 7FF4E8AE bne .L312 + ARM GAS /tmp/ccB34LXC.s page 25 + + + 1402 030c 10F48000 ands r0, r0, #4194304 + 1403 0310 7FF4E4AE bne .L312 + 1404 0314 1C4A ldr r2, .L366+24 + 1405 0316 9442 cmp r4, r2 + 1406 0318 3FF4E0AE beq .L312 + 1407 031c 8A68 ldr r2, [r1, #8] + 1408 031e 22F0E072 bic r2, r2, #29360128 + 1409 0322 3243 orrs r2, r2, r6 + 1410 0324 42F48002 orr r2, r2, #4194304 + 1411 0328 8A60 str r2, [r1, #8] + 1412 032a CCE6 b .L267 + 1413 .L364: + 1414 032c F50D lsrs r5, r6, #23 + 1415 032e 04F11400 add r0, r4, #20 + 1416 0332 05F00405 and r5, r5, #4 + 1417 0336 C6F30456 ubfx r6, r6, #20, #5 + 1418 033a 2F58 ldr r7, [r5, r0] + 1419 033c 4FF0070C mov ip, #7 + 1420 0340 0CFA06F6 lsl r6, ip, r6 + 1421 0344 27EA0606 bic r6, r7, r6 + 1422 0348 2E50 str r6, [r5, r0] + 1423 034a 6069 ldr r0, [r4, #20] + 1424 034c 40F00040 orr r0, r0, #-2147483648 + 1425 0350 6061 str r0, [r4, #20] + 1426 0352 E8E6 b .L271 + 1427 .L365: + 1428 0354 06EB4602 add r2, r6, r6, lsl #1 + 1429 0358 8506 lsls r5, r0, #26 + 1430 035a 1E3A subs r2, r2, #30 + 1431 035c 0120 movs r0, #1 + 1432 035e 05F0F845 and r5, r5, #2080374784 + 1433 0362 1205 lsls r2, r2, #20 + 1434 0364 00FA06F6 lsl r6, r0, r6 + 1435 0368 42F00072 orr r2, r2, #33554432 + 1436 036c 3543 orrs r5, r5, r6 + 1437 036e 81E7 b .L305 + 1438 .L367: + 1439 .align 2 + 1440 .L366: + 1441 0370 00007F40 .word 1082064896 + 1442 0374 00000880 .word -2146959360 + 1443 0378 00030050 .word 1342178048 + 1444 037c 000021C3 .word -1021247488 + 1445 0380 1000C090 .word -1866465264 + 1446 0384 000052C7 .word -950927360 + 1447 0388 00010050 .word 1342177536 + 1448 038c 00000000 .word SystemCoreClock + 1449 0390 632D3E05 .word 87960931 + 1450 0394 000084CB .word -880541696 + 1451 0398 00F0FF03 .word 67104768 + 1452 .L275: + 1453 .syntax unified + 1454 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1455 039c 90FAA0F5 rbit r5, r0 + 1456 @ 0 "" 2 + 1457 .thumb + 1458 .syntax unified + ARM GAS /tmp/ccB34LXC.s page 26 + + + 1459 03a0 1DB1 cbz r5, .L278 + 1460 03a2 B5FA85F5 clz r5, r5 + 1461 03a6 AA42 cmp r2, r5 + 1462 03a8 71D0 beq .L276 + 1463 .L278: + 1464 03aa 626E ldr r2, [r4, #100] + 1465 03ac 666E ldr r6, [r4, #100] + 1466 03ae 04F16002 add r2, r4, #96 + 1467 03b2 C6F38466 ubfx r6, r6, #26, #5 + 1468 03b6 04F16407 add r7, r4, #100 + 1469 .L279: + 1470 .syntax unified + 1471 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1472 03ba 90FAA0F5 rbit r5, r0 + 1473 @ 0 "" 2 + 1474 .thumb + 1475 .syntax unified + 1476 03be 1DB1 cbz r5, .L282 + 1477 03c0 B5FA85F5 clz r5, r5 + 1478 03c4 AE42 cmp r6, r5 + 1479 03c6 50D0 beq .L280 + 1480 .L282: + 1481 03c8 9568 ldr r5, [r2, #8] + 1482 03ca 9668 ldr r6, [r2, #8] + 1483 03cc 02F10807 add r7, r2, #8 + 1484 03d0 C6F38466 ubfx r6, r6, #26, #5 + 1485 .L283: + 1486 .syntax unified + 1487 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1488 03d4 90FAA0F5 rbit r5, r0 + 1489 @ 0 "" 2 + 1490 .thumb + 1491 .syntax unified + 1492 03d8 1DB1 cbz r5, .L286 + 1493 03da B5FA85F5 clz r5, r5 + 1494 03de AE42 cmp r6, r5 + 1495 03e0 31D0 beq .L284 + 1496 .L286: + 1497 03e2 D568 ldr r5, [r2, #12] + 1498 03e4 D568 ldr r5, [r2, #12] + 1499 03e6 02F10C07 add r7, r2, #12 + 1500 03ea C5F38462 ubfx r2, r5, #26, #5 + 1501 .L287: + 1502 .syntax unified + 1503 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1504 03ee 90FAA0F5 rbit r5, r0 + 1505 @ 0 "" 2 + 1506 .thumb + 1507 .syntax unified + 1508 03f2 002D cmp r5, #0 + 1509 03f4 3FF432AE beq .L274 + 1510 03f8 B5FA85F5 clz r5, r5 + 1511 03fc F0E6 b .L288 + 1512 .L298: + 1513 .syntax unified + 1514 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1515 03fe 90FAA0F2 rbit r2, r0 + ARM GAS /tmp/ccB34LXC.s page 27 + + + 1516 @ 0 "" 2 + 1517 .thumb + 1518 .syntax unified + 1519 0402 002A cmp r2, #0 + 1520 0404 59D0 beq .L322 + 1521 0406 B2FA82F2 clz r2, r2 + 1522 040a 0132 adds r2, r2, #1 + 1523 040c 9206 lsls r2, r2, #26 + 1524 040e 02F0F842 and r2, r2, #2080374784 + 1525 .L301: + 1526 .syntax unified + 1527 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1528 0412 90FAA0F5 rbit r5, r0 + 1529 @ 0 "" 2 + 1530 .thumb + 1531 .syntax unified + 1532 0416 002D cmp r5, #0 + 1533 0418 4DD0 beq .L323 + 1534 041a B5FA85F5 clz r5, r5 + 1535 041e 0135 adds r5, r5, #1 + 1536 0420 05F01F05 and r5, r5, #31 + 1537 0424 0126 movs r6, #1 + 1538 0426 06FA05F5 lsl r5, r6, r5 + 1539 .L302: + 1540 042a 1543 orrs r5, r5, r2 + 1541 .syntax unified + 1542 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1543 042c 90FAA0F0 rbit r0, r0 + 1544 @ 0 "" 2 + 1545 .thumb + 1546 .syntax unified + 1547 0430 0028 cmp r0, #0 + 1548 0432 45D0 beq .L324 + 1549 0434 B0FA80F0 clz r0, r0 + 1550 0438 0130 adds r0, r0, #1 + 1551 043a 00F01F00 and r0, r0, #31 + 1552 043e 00EB4000 add r0, r0, r0, lsl #1 + 1553 0442 0205 lsls r2, r0, #20 + 1554 0444 16E7 b .L305 + 1555 .L284: + 1556 0446 3868 ldr r0, [r7] + 1557 0448 20F00040 bic r0, r0, #-2147483648 + 1558 044c 3860 str r0, [r7] + 1559 044e D068 ldr r0, [r2, #12] + 1560 0450 0868 ldr r0, [r1] + 1561 0452 02F10C07 add r7, r2, #12 + 1562 0456 D268 ldr r2, [r2, #12] + 1563 0458 C0F31205 ubfx r5, r0, #0, #19 + 1564 045c C2F38462 ubfx r2, r2, #26, #5 + 1565 0460 002D cmp r5, #0 + 1566 0462 C4D1 bne .L287 + 1567 0464 C0F38465 ubfx r5, r0, #26, #5 + 1568 0468 BAE6 b .L288 + 1569 .L280: + 1570 046a 3868 ldr r0, [r7] + 1571 046c 20F00040 bic r0, r0, #-2147483648 + 1572 0470 3860 str r0, [r7] + ARM GAS /tmp/ccB34LXC.s page 28 + + + 1573 0472 9068 ldr r0, [r2, #8] + 1574 0474 0868 ldr r0, [r1] + 1575 0476 9668 ldr r6, [r2, #8] + 1576 0478 C0F31205 ubfx r5, r0, #0, #19 + 1577 047c 02F10807 add r7, r2, #8 + 1578 0480 C6F38466 ubfx r6, r6, #26, #5 + 1579 0484 002D cmp r5, #0 + 1580 0486 A5D1 bne .L283 + 1581 0488 C0F38465 ubfx r5, r0, #26, #5 + 1582 048c 9FE6 b .L318 + 1583 .L276: + 1584 048e 206E ldr r0, [r4, #96] + 1585 0490 2246 mov r2, r4 + 1586 0492 20F00040 bic r0, r0, #-2147483648 + 1587 0496 42F8600F str r0, [r2, #96]! + 1588 049a 606E ldr r0, [r4, #100] + 1589 049c 0868 ldr r0, [r1] + 1590 049e 666E ldr r6, [r4, #100] + 1591 04a0 C0F31205 ubfx r5, r0, #0, #19 + 1592 04a4 04F16407 add r7, r4, #100 + 1593 04a8 C6F38466 ubfx r6, r6, #26, #5 + 1594 04ac 002D cmp r5, #0 + 1595 04ae 84D1 bne .L279 + 1596 04b0 C0F38465 ubfx r5, r0, #26, #5 + 1597 04b4 82E6 b .L319 + 1598 .L323: + 1599 04b6 0225 movs r5, #2 + 1600 04b8 B7E7 b .L302 + 1601 .L322: + 1602 04ba 4FF08062 mov r2, #67108864 + 1603 04be A8E7 b .L301 + 1604 .L324: + 1605 04c0 4FF44012 mov r2, #3145728 + 1606 04c4 D6E6 b .L305 + 1607 .L325: + 1608 04c6 4FF08062 mov r2, #67108864 + 1609 04ca B3E6 b .L306 + 1610 .L327: + 1611 04cc 014A ldr r2, .L368 + 1612 04ce D1E6 b .L305 + 1613 .L326: + 1614 04d0 0225 movs r5, #2 + 1615 04d2 BCE6 b .L307 + 1616 .L369: + 1617 .align 2 + 1618 .L368: + 1619 04d4 000050FE .word -28311552 + 1621 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits + 1622 .align 1 + 1623 .p2align 2,,3 + 1624 .global HAL_ADC_AnalogWDGConfig + 1625 .syntax unified + 1626 .thumb + 1627 .thumb_func + 1628 .fpu fpv4-sp-d16 + 1630 HAL_ADC_AnalogWDGConfig: + 1631 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccB34LXC.s page 29 + + + 1632 @ frame_needed = 0, uses_anonymous_args = 0 + 1633 0000 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 + 1634 0004 4B68 ldr r3, [r1, #4] + 1635 0006 012A cmp r2, #1 + 1636 0008 00F0FF80 beq .L409 + 1637 000c 30B5 push {r4, r5, lr} + 1638 000e 0122 movs r2, #1 + 1639 0010 0468 ldr r4, [r0] + 1640 0012 80F85820 strb r2, [r0, #88] + 1641 0016 A268 ldr r2, [r4, #8] + 1642 0018 5207 lsls r2, r2, #29 + 1643 001a 8446 mov ip, r0 + 1644 001c 35D5 bpl .L435 + 1645 001e A368 ldr r3, [r4, #8] + 1646 0020 0A68 ldr r2, [r1] + 1647 .L385: + 1648 0022 B74B ldr r3, .L440 + 1649 0024 9A42 cmp r2, r3 + 1650 0026 76D0 beq .L436 + 1651 .L403: + 1652 0028 E368 ldr r3, [r4, #12] + 1653 002a 03F01803 and r3, r3, #24 + 1654 002e 182B cmp r3, #24 + 1655 0030 00F0CF80 beq .L405 + 1656 0034 E368 ldr r3, [r4, #12] + 1657 0036 0869 ldr r0, [r1, #16] + 1658 0038 C3F3C103 ubfx r3, r3, #3, #2 + 1659 003c C3F10203 rsb r3, r3, #2 + 1660 0040 5B00 lsls r3, r3, #1 + 1661 0042 03F01E03 and r3, r3, #30 + 1662 0046 D840 lsrs r0, r0, r3 + 1663 .L406: + 1664 0048 E368 ldr r3, [r4, #12] + 1665 004a 03F01803 and r3, r3, #24 + 1666 004e 182B cmp r3, #24 + 1667 0050 4B69 ldr r3, [r1, #20] + 1668 0052 00F0BC80 beq .L407 + 1669 0056 E168 ldr r1, [r4, #12] + 1670 0058 C1F3C101 ubfx r1, r1, #3, #2 + 1671 005c C1F10201 rsb r1, r1, #2 + 1672 0060 4900 lsls r1, r1, #1 + 1673 0062 01F01E01 and r1, r1, #30 + 1674 0066 CB40 lsrs r3, r3, r1 + 1675 .L404: + 1676 0068 920C lsrs r2, r2, #18 + 1677 006a 02F00C02 and r2, r2, #12 + 1678 006e 2034 adds r4, r4, #32 + 1679 0070 43EA0043 orr r3, r3, r0, lsl #16 + 1680 0074 1159 ldr r1, [r2, r4] + 1681 0076 01F0F021 and r1, r1, #-268374016 + 1682 007a 4FF0000E mov lr, #0 + 1683 007e 0B43 orrs r3, r3, r1 + 1684 0080 1351 str r3, [r2, r4] + 1685 0082 8CF858E0 strb lr, [ip, #88] + 1686 0086 7046 mov r0, lr + 1687 0088 30BD pop {r4, r5, pc} + 1688 .L435: + ARM GAS /tmp/ccB34LXC.s page 30 + + + 1689 008a A268 ldr r2, [r4, #8] + 1690 008c 12F0080F tst r2, #8 + 1691 0090 0A68 ldr r2, [r1] + 1692 0092 C6D1 bne .L385 + 1693 0094 9A48 ldr r0, .L440 + 1694 0096 8242 cmp r2, r0 + 1695 0098 4DD0 beq .L437 + 1696 009a B3F1A07F cmp r3, #20971520 + 1697 009e 00F0A280 beq .L386 + 1698 00a2 00F29980 bhi .L387 + 1699 00a6 B3F5400F cmp r3, #12582912 + 1700 00aa 00F09C80 beq .L386 + 1701 00ae B3F1807F cmp r3, #16777216 + 1702 00b2 00F0DC80 beq .L388 + 1703 00b6 B3F5000F cmp r3, #8388608 + 1704 00ba 00F0D880 beq .L388 + 1705 .L389: + 1706 00be 02F00100 and r0, r2, #1 + 1707 00c2 C2F30153 ubfx r3, r2, #20, #2 + 1708 00c6 00EBC000 add r0, r0, r0, lsl #3 + 1709 00ca 03EB8003 add r3, r3, r0, lsl #2 + 1710 00ce 04F10C05 add r5, r4, #12 + 1711 00d2 22F00242 bic r2, r2, #-2113929216 + 1712 00d6 55F82300 ldr r0, [r5, r3, lsl #2] + 1713 00da 22F46012 bic r2, r2, #3670016 + 1714 00de 20EA0202 bic r2, r0, r2 + 1715 00e2 45F82320 str r2, [r5, r3, lsl #2] + 1716 .L399: + 1717 00e6 874B ldr r3, .L440+4 + 1718 00e8 0A68 ldr r2, [r1] + 1719 00ea 9A42 cmp r2, r3 + 1720 00ec 00F0AC80 beq .L394 + 1721 .L398: + 1722 00f0 DCF85C30 ldr r3, [ip, #92] + 1723 00f4 23F48023 bic r3, r3, #262144 + 1724 00f8 CCF85C30 str r3, [ip, #92] + 1725 00fc 4FF40073 mov r3, #512 + 1726 0100 2360 str r3, [r4] + 1727 0102 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 1728 0104 012B cmp r3, #1 + 1729 0106 6368 ldr r3, [r4, #4] + 1730 0108 0CBF ite eq + 1731 010a 43F40073 orreq r3, r3, #512 + 1732 010e 23F40073 bicne r3, r3, #512 + 1733 0112 6360 str r3, [r4, #4] + 1734 0114 85E7 b .L385 + 1735 .L436: + 1736 0116 E068 ldr r0, [r4, #12] + 1737 0118 E368 ldr r3, [r4, #12] + 1738 011a C3F3C103 ubfx r3, r3, #3, #2 + 1739 011e 4FEA430E lsl lr, r3, #1 + 1740 0122 C0F3C100 ubfx r0, r0, #3, #2 + 1741 0126 0B69 ldr r3, [r1, #16] + 1742 0128 4000 lsls r0, r0, #1 + 1743 012a 03FA00F0 lsl r0, r3, r0 + 1744 012e 4B69 ldr r3, [r1, #20] + 1745 0130 03FA0EF3 lsl r3, r3, lr + ARM GAS /tmp/ccB34LXC.s page 31 + + + 1746 0134 98E7 b .L404 + 1747 .L437: + 1748 0136 B3F1A07F cmp r3, #20971520 + 1749 013a 00F0C780 beq .L375 + 1750 013e 27D8 bhi .L376 + 1751 0140 B3F5400F cmp r3, #12582912 + 1752 0144 00F0B580 beq .L377 + 1753 0148 B3F1807F cmp r3, #16777216 + 1754 014c 33D1 bne .L438 + 1755 014e E368 ldr r3, [r4, #12] + 1756 0150 23F0FB43 bic r3, r3, #2105540608 + 1757 0154 23F48003 bic r3, r3, #4194304 + 1758 0158 43F08073 orr r3, r3, #16777216 + 1759 015c E360 str r3, [r4, #12] + 1760 .L383: + 1761 015e 236A ldr r3, [r4, #32] + 1762 0160 8A69 ldr r2, [r1, #24] + 1763 0162 23F4E043 bic r3, r3, #28672 + 1764 0166 1343 orrs r3, r3, r2 + 1765 0168 2362 str r3, [r4, #32] + 1766 016a DCF85C30 ldr r3, [ip, #92] + 1767 016e 8022 movs r2, #128 + 1768 0170 23F48033 bic r3, r3, #65536 + 1769 0174 CCF85C30 str r3, [ip, #92] + 1770 0178 2260 str r2, [r4] + 1771 017a 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 1772 017c 0A68 ldr r2, [r1] + 1773 017e 012B cmp r3, #1 + 1774 0180 6368 ldr r3, [r4, #4] + 1775 0182 0CBF ite eq + 1776 0184 43F08003 orreq r3, r3, #128 + 1777 0188 23F08003 bicne r3, r3, #128 + 1778 018c 6360 str r3, [r4, #4] + 1779 018e 48E7 b .L385 + 1780 .L376: + 1781 0190 B3F1C07F cmp r3, #25165824 + 1782 0194 3BD0 beq .L381 + 1783 0196 B3F1E07F cmp r3, #29360128 + 1784 019a 41D1 bne .L380 + 1785 019c E268 ldr r2, [r4, #12] + 1786 019e 8B68 ldr r3, [r1, #8] + 1787 01a0 22F0FB42 bic r2, r2, #2105540608 + 1788 01a4 03F0F843 and r3, r3, #2080374784 + 1789 01a8 22F48002 bic r2, r2, #4194304 + 1790 01ac 1343 orrs r3, r3, r2 + 1791 01ae 43F0E073 orr r3, r3, #29360128 + 1792 01b2 E360 str r3, [r4, #12] + 1793 01b4 D3E7 b .L383 + 1794 .L438: + 1795 01b6 B3F5000F cmp r3, #8388608 + 1796 01ba 31D1 bne .L380 + 1797 01bc E368 ldr r3, [r4, #12] + 1798 01be 23F0FB43 bic r3, r3, #2105540608 + 1799 01c2 23F48003 bic r3, r3, #4194304 + 1800 01c6 43F40003 orr r3, r3, #8388608 + 1801 01ca E360 str r3, [r4, #12] + 1802 01cc C7E7 b .L383 + ARM GAS /tmp/ccB34LXC.s page 32 + + + 1803 .L407: + 1804 01ce 9B00 lsls r3, r3, #2 + 1805 01d0 4AE7 b .L404 + 1806 .L405: + 1807 01d2 0B69 ldr r3, [r1, #16] + 1808 01d4 9800 lsls r0, r3, #2 + 1809 01d6 37E7 b .L406 + 1810 .L387: + 1811 01d8 B3F1C07F cmp r3, #25165824 + 1812 01dc 47D0 beq .L388 + 1813 01de B3F1E07F cmp r3, #29360128 + 1814 01e2 7FF46CAF bne .L389 + 1815 .L386: + 1816 01e6 474B ldr r3, .L440+4 + 1817 01e8 9A42 cmp r2, r3 + 1818 01ea 8B68 ldr r3, [r1, #8] + 1819 01ec 1FD0 beq .L439 + 1820 01ee C3F31200 ubfx r0, r3, #0, #19 + 1821 01f2 0028 cmp r0, #0 + 1822 01f4 55D1 bne .L395 + 1823 01f6 C3F38463 ubfx r3, r3, #26, #5 + 1824 01fa 0120 movs r0, #1 + 1825 01fc 9840 lsls r0, r0, r3 + 1826 .L396: + 1827 01fe D4F8A430 ldr r3, [r4, #164] + 1828 0202 0343 orrs r3, r3, r0 + 1829 0204 C4F8A430 str r3, [r4, #164] + 1830 0208 72E7 b .L398 + 1831 .L409: + 1832 020a 0220 movs r0, #2 + 1833 020c 7047 bx lr + 1834 .L381: + 1835 020e E368 ldr r3, [r4, #12] + 1836 0210 23F0FB43 bic r3, r3, #2105540608 + 1837 0214 23F48003 bic r3, r3, #4194304 + 1838 0218 43F0C073 orr r3, r3, #25165824 + 1839 021c E360 str r3, [r4, #12] + 1840 021e 9EE7 b .L383 + 1841 .L380: + 1842 0220 E368 ldr r3, [r4, #12] + 1843 0222 23F0FB43 bic r3, r3, #2105540608 + 1844 0226 23F48003 bic r3, r3, #4194304 + 1845 022a E360 str r3, [r4, #12] + 1846 022c 97E7 b .L383 + 1847 .L439: + 1848 022e C3F31202 ubfx r2, r3, #0, #19 + 1849 0232 002A cmp r2, #0 + 1850 0234 57D1 bne .L391 + 1851 0236 C3F38463 ubfx r3, r3, #26, #5 + 1852 023a 0122 movs r2, #1 + 1853 023c 9A40 lsls r2, r2, r3 + 1854 .L392: + 1855 023e D4F8A030 ldr r3, [r4, #160] + 1856 0242 1343 orrs r3, r3, r2 + 1857 0244 C4F8A030 str r3, [r4, #160] + 1858 .L394: + 1859 0248 DCF85C30 ldr r3, [ip, #92] + ARM GAS /tmp/ccB34LXC.s page 33 + + + 1860 024c 4FF48072 mov r2, #256 + 1861 0250 23F40033 bic r3, r3, #131072 + 1862 0254 CCF85C30 str r3, [ip, #92] + 1863 0258 2260 str r2, [r4] + 1864 025a 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 1865 025c 012B cmp r3, #1 + 1866 025e 6368 ldr r3, [r4, #4] + 1867 0260 0CBF ite eq + 1868 0262 1343 orreq r3, r3, r2 + 1869 0264 23F48073 bicne r3, r3, #256 + 1870 0268 264A ldr r2, .L440+4 + 1871 026a 6360 str r3, [r4, #4] + 1872 026c DCE6 b .L403 + 1873 .L388: + 1874 026e 02F00103 and r3, r2, #1 + 1875 0272 C2F3015E ubfx lr, r2, #20, #2 + 1876 0276 03EBC303 add r3, r3, r3, lsl #3 + 1877 027a 0EEB830E add lr, lr, r3, lsl #2 + 1878 027e 04F10C00 add r0, r4, #12 + 1879 0282 22F00245 bic r5, r2, #-2113929216 + 1880 0286 50F82E30 ldr r3, [r0, lr, lsl #2] + 1881 028a 25F46015 bic r5, r5, #3670016 + 1882 028e 22F07E42 bic r2, r2, #-33554432 + 1883 0292 22F4F002 bic r2, r2, #7864320 + 1884 0296 23EA0503 bic r3, r3, r5 + 1885 029a 1A43 orrs r2, r2, r3 + 1886 029c 40F82E20 str r2, [r0, lr, lsl #2] + 1887 02a0 21E7 b .L399 + 1888 .L395: + 1889 .syntax unified + 1890 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1891 02a2 93FAA3F3 rbit r3, r3 + 1892 @ 0 "" 2 + 1893 .thumb + 1894 .syntax unified + 1895 02a6 33B3 cbz r3, .L411 + 1896 02a8 B3FA83F3 clz r3, r3 + 1897 02ac 0120 movs r0, #1 + 1898 02ae 9840 lsls r0, r0, r3 + 1899 02b0 A5E7 b .L396 + 1900 .L377: + 1901 02b2 E268 ldr r2, [r4, #12] + 1902 02b4 8B68 ldr r3, [r1, #8] + 1903 02b6 22F0FB42 bic r2, r2, #2105540608 + 1904 02ba 03F0F843 and r3, r3, #2080374784 + 1905 02be 22F48002 bic r2, r2, #4194304 + 1906 02c2 1343 orrs r3, r3, r2 + 1907 02c4 43F44003 orr r3, r3, #12582912 + 1908 02c8 E360 str r3, [r4, #12] + 1909 02ca 48E7 b .L383 + 1910 .L375: + 1911 02cc E268 ldr r2, [r4, #12] + 1912 02ce 8B68 ldr r3, [r1, #8] + 1913 02d0 22F0FB42 bic r2, r2, #2105540608 + 1914 02d4 03F0F843 and r3, r3, #2080374784 + 1915 02d8 22F48002 bic r2, r2, #4194304 + 1916 02dc 1343 orrs r3, r3, r2 + ARM GAS /tmp/ccB34LXC.s page 34 + + + 1917 02de 43F0A073 orr r3, r3, #20971520 + 1918 02e2 E360 str r3, [r4, #12] + 1919 02e4 3BE7 b .L383 + 1920 .L391: + 1921 .syntax unified + 1922 @ 1055 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1923 02e6 93FAA3F3 rbit r3, r3 + 1924 @ 0 "" 2 + 1925 .thumb + 1926 .syntax unified + 1927 02ea 33B1 cbz r3, .L410 + 1928 02ec B3FA83F3 clz r3, r3 + 1929 02f0 0122 movs r2, #1 + 1930 02f2 9A40 lsls r2, r2, r3 + 1931 02f4 A3E7 b .L392 + 1932 .L411: + 1933 02f6 0120 movs r0, #1 + 1934 02f8 81E7 b .L396 + 1935 .L410: + 1936 02fa 0122 movs r2, #1 + 1937 02fc 9FE7 b .L392 + 1938 .L441: + 1939 02fe 00BF .align 2 + 1940 .L440: + 1941 0300 0000C07D .word 2109734912 + 1942 0304 FFFF1700 .word 1572863 + 1944 .section .text.HAL_ADC_GetState,"ax",%progbits + 1945 .align 1 + 1946 .p2align 2,,3 + 1947 .global HAL_ADC_GetState + 1948 .syntax unified + 1949 .thumb + 1950 .thumb_func + 1951 .fpu fpv4-sp-d16 + 1953 HAL_ADC_GetState: + 1954 @ args = 0, pretend = 0, frame = 0 + 1955 @ frame_needed = 0, uses_anonymous_args = 0 + 1956 @ link register save eliminated. + 1957 0000 C06D ldr r0, [r0, #92] + 1958 0002 7047 bx lr + 1960 .section .text.HAL_ADC_GetError,"ax",%progbits + 1961 .align 1 + 1962 .p2align 2,,3 + 1963 .global HAL_ADC_GetError + 1964 .syntax unified + 1965 .thumb + 1966 .thumb_func + 1967 .fpu fpv4-sp-d16 + 1969 HAL_ADC_GetError: + 1970 @ args = 0, pretend = 0, frame = 0 + 1971 @ frame_needed = 0, uses_anonymous_args = 0 + 1972 @ link register save eliminated. + 1973 0000 006E ldr r0, [r0, #96] + 1974 0002 7047 bx lr + 1976 .section .text.ADC_ConversionStop,"ax",%progbits + 1977 .align 1 + 1978 .p2align 2,,3 + ARM GAS /tmp/ccB34LXC.s page 35 + + + 1979 .global ADC_ConversionStop + 1980 .syntax unified + 1981 .thumb + 1982 .thumb_func + 1983 .fpu fpv4-sp-d16 + 1985 ADC_ConversionStop: + 1986 @ args = 0, pretend = 0, frame = 0 + 1987 @ frame_needed = 0, uses_anonymous_args = 0 + 1988 0000 0368 ldr r3, [r0] + 1989 0002 9A68 ldr r2, [r3, #8] + 1990 0004 5207 lsls r2, r2, #29 + 1991 0006 70B5 push {r4, r5, r6, lr} + 1992 0008 0446 mov r4, r0 + 1993 000a 36D5 bpl .L493 + 1994 000c 9A68 ldr r2, [r3, #8] + 1995 .L462: + 1996 000e DA68 ldr r2, [r3, #12] + 1997 0010 9601 lsls r6, r2, #6 + 1998 0012 04D5 bpl .L447 + 1999 0014 A08B ldrh r0, [r4, #28] + 2000 0016 40F20112 movw r2, #257 + 2001 001a 9042 cmp r0, r2 + 2002 001c 32D0 beq .L494 + 2003 .L447: + 2004 001e 0229 cmp r1, #2 + 2005 0020 9A68 ldr r2, [r3, #8] + 2006 0022 0ED0 beq .L454 + 2007 0024 5207 lsls r2, r2, #29 + 2008 0026 02D5 bpl .L455 + 2009 0028 9A68 ldr r2, [r3, #8] + 2010 002a 9607 lsls r6, r2, #30 + 2011 002c 56D5 bpl .L495 + 2012 .L455: + 2013 002e 0129 cmp r1, #1 + 2014 0030 3AD0 beq .L456 + 2015 0032 9A68 ldr r2, [r3, #8] + 2016 0034 1007 lsls r0, r2, #28 + 2017 0036 39D4 bmi .L457 + 2018 .L465: + 2019 0038 0329 cmp r1, #3 + 2020 003a 14BF ite ne + 2021 003c 0425 movne r5, #4 + 2022 003e 0C25 moveq r5, #12 + 2023 0040 02E0 b .L453 + 2024 .L454: + 2025 0042 1007 lsls r0, r2, #28 + 2026 0044 3ED4 bmi .L496 + 2027 .L463: + 2028 0046 0825 movs r5, #8 + 2029 .L453: + 2030 0048 FFF7FEFF bl HAL_GetTick + 2031 004c 2368 ldr r3, [r4] + 2032 004e 0646 mov r6, r0 + 2033 .L491: + 2034 0050 9B68 ldr r3, [r3, #8] + 2035 0052 1D42 tst r5, r3 + 2036 0054 14D0 beq .L461 + ARM GAS /tmp/ccB34LXC.s page 36 + + + 2037 0056 FFF7FEFF bl HAL_GetTick + 2038 005a 831B subs r3, r0, r6 + 2039 005c 052B cmp r3, #5 + 2040 005e 2368 ldr r3, [r4] + 2041 0060 F6D9 bls .L491 + 2042 0062 9A68 ldr r2, [r3, #8] + 2043 0064 2A42 tst r2, r5 + 2044 0066 F3D0 beq .L491 + 2045 .L492: + 2046 0068 E36D ldr r3, [r4, #92] + 2047 006a 43F01003 orr r3, r3, #16 + 2048 006e E365 str r3, [r4, #92] + 2049 0070 236E ldr r3, [r4, #96] + 2050 0072 0120 movs r0, #1 + 2051 0074 0343 orrs r3, r3, r0 + 2052 0076 2366 str r3, [r4, #96] + 2053 0078 70BD pop {r4, r5, r6, pc} + 2054 .L493: + 2055 007a 9A68 ldr r2, [r3, #8] + 2056 007c 1607 lsls r6, r2, #28 + 2057 007e C6D4 bmi .L462 + 2058 .L461: + 2059 0080 0020 movs r0, #0 + 2060 0082 70BD pop {r4, r5, r6, pc} + 2061 .L494: + 2062 0084 1A68 ldr r2, [r3] + 2063 0086 5506 lsls r5, r2, #25 + 2064 0088 06D4 bmi .L449 + 2065 008a 1E4A ldr r2, .L498 + 2066 008c 01E0 b .L448 + 2067 .L451: + 2068 008e 013A subs r2, r2, #1 + 2069 0090 EAD0 beq .L492 + 2070 .L448: + 2071 0092 1968 ldr r1, [r3] + 2072 0094 4806 lsls r0, r1, #25 + 2073 0096 FAD5 bpl .L451 + 2074 .L449: + 2075 0098 4022 movs r2, #64 + 2076 009a 1A60 str r2, [r3] + 2077 009c 9A68 ldr r2, [r3, #8] + 2078 009e 5107 lsls r1, r2, #29 + 2079 00a0 02D5 bpl .L456 + 2080 00a2 9A68 ldr r2, [r3, #8] + 2081 00a4 9207 lsls r2, r2, #30 + 2082 00a6 22D5 bpl .L497 + 2083 .L456: + 2084 00a8 0425 movs r5, #4 + 2085 00aa CDE7 b .L453 + 2086 .L457: + 2087 00ac 9A68 ldr r2, [r3, #8] + 2088 00ae 9207 lsls r2, r2, #30 + 2089 00b0 C2D4 bmi .L465 + 2090 00b2 9A68 ldr r2, [r3, #8] + 2091 00b4 22F00042 bic r2, r2, #-2147483648 + 2092 00b8 22F03F02 bic r2, r2, #63 + 2093 00bc 42F02002 orr r2, r2, #32 + ARM GAS /tmp/ccB34LXC.s page 37 + + + 2094 00c0 9A60 str r2, [r3, #8] + 2095 00c2 B9E7 b .L465 + 2096 .L496: + 2097 00c4 9A68 ldr r2, [r3, #8] + 2098 00c6 9107 lsls r1, r2, #30 + 2099 00c8 BDD4 bmi .L463 + 2100 00ca 9A68 ldr r2, [r3, #8] + 2101 00cc 22F00042 bic r2, r2, #-2147483648 + 2102 00d0 22F03F02 bic r2, r2, #63 + 2103 00d4 42F02002 orr r2, r2, #32 + 2104 00d8 9A60 str r2, [r3, #8] + 2105 00da B4E7 b .L463 + 2106 .L495: + 2107 00dc 9A68 ldr r2, [r3, #8] + 2108 00de 22F00042 bic r2, r2, #-2147483648 + 2109 00e2 22F03F02 bic r2, r2, #63 + 2110 00e6 42F01002 orr r2, r2, #16 + 2111 00ea 9A60 str r2, [r3, #8] + 2112 00ec 9FE7 b .L455 + 2113 .L497: + 2114 00ee 9A68 ldr r2, [r3, #8] + 2115 00f0 22F00042 bic r2, r2, #-2147483648 + 2116 00f4 22F03F02 bic r2, r2, #63 + 2117 00f8 42F01002 orr r2, r2, #16 + 2118 00fc 0425 movs r5, #4 + 2119 00fe 9A60 str r2, [r3, #8] + 2120 0100 A2E7 b .L453 + 2121 .L499: + 2122 0102 00BF .align 2 + 2123 .L498: + 2124 0104 000040A3 .word -1556086784 + 2126 .section .text.ADC_Enable,"ax",%progbits + 2127 .align 1 + 2128 .p2align 2,,3 + 2129 .global ADC_Enable + 2130 .syntax unified + 2131 .thumb + 2132 .thumb_func + 2133 .fpu fpv4-sp-d16 + 2135 ADC_Enable: + 2136 @ args = 0, pretend = 0, frame = 0 + 2137 @ frame_needed = 0, uses_anonymous_args = 0 + 2138 0000 0368 ldr r3, [r0] + 2139 0002 9A68 ldr r2, [r3, #8] + 2140 0004 D207 lsls r2, r2, #31 + 2141 0006 01D5 bpl .L501 + 2142 0008 0020 movs r0, #0 + 2143 000a 7047 bx lr + 2144 .L501: + 2145 000c 9968 ldr r1, [r3, #8] + 2146 000e 184A ldr r2, .L518 + 2147 0010 1142 tst r1, r2 + 2148 0012 70B5 push {r4, r5, r6, lr} + 2149 0014 0646 mov r6, r0 + 2150 0016 08D0 beq .L503 + 2151 .L515: + 2152 0018 F36D ldr r3, [r6, #92] + ARM GAS /tmp/ccB34LXC.s page 38 + + + 2153 001a 43F01003 orr r3, r3, #16 + 2154 001e F365 str r3, [r6, #92] + 2155 0020 336E ldr r3, [r6, #96] + 2156 0022 0120 movs r0, #1 + 2157 0024 0343 orrs r3, r3, r0 + 2158 0026 3366 str r3, [r6, #96] + 2159 0028 70BD pop {r4, r5, r6, pc} + 2160 .L503: + 2161 002a 9A68 ldr r2, [r3, #8] + 2162 002c 114D ldr r5, .L518+4 + 2163 002e 2A40 ands r2, r2, r5 + 2164 0030 42F00102 orr r2, r2, #1 + 2165 0034 9A60 str r2, [r3, #8] + 2166 0036 FFF7FEFF bl HAL_GetTick + 2167 003a 3368 ldr r3, [r6] + 2168 003c 0446 mov r4, r0 + 2169 .L514: + 2170 003e 1A68 ldr r2, [r3] + 2171 0040 D007 lsls r0, r2, #31 + 2172 0042 13D4 bmi .L504 + 2173 .L517: + 2174 0044 9A68 ldr r2, [r3, #8] + 2175 0046 D107 lsls r1, r2, #31 + 2176 0048 04D4 bmi .L505 + 2177 004a 9A68 ldr r2, [r3, #8] + 2178 004c 2A40 ands r2, r2, r5 + 2179 004e 42F00102 orr r2, r2, #1 + 2180 0052 9A60 str r2, [r3, #8] + 2181 .L505: + 2182 0054 FFF7FEFF bl HAL_GetTick + 2183 0058 031B subs r3, r0, r4 + 2184 005a 022B cmp r3, #2 + 2185 005c 3368 ldr r3, [r6] + 2186 005e EED9 bls .L514 + 2187 0060 1A68 ldr r2, [r3] + 2188 0062 D207 lsls r2, r2, #31 + 2189 0064 D8D5 bpl .L515 + 2190 0066 1A68 ldr r2, [r3] + 2191 0068 D007 lsls r0, r2, #31 + 2192 006a EBD5 bpl .L517 + 2193 .L504: + 2194 006c 0020 movs r0, #0 + 2195 006e 70BD pop {r4, r5, r6, pc} + 2196 .L519: + 2197 .align 2 + 2198 .L518: + 2199 0070 3F000080 .word -2147483585 + 2200 0074 C0FFFF7F .word 2147483584 + 2202 .section .text.HAL_ADC_Start,"ax",%progbits + 2203 .align 1 + 2204 .p2align 2,,3 + 2205 .global HAL_ADC_Start + 2206 .syntax unified + 2207 .thumb + 2208 .thumb_func + 2209 .fpu fpv4-sp-d16 + 2211 HAL_ADC_Start: + ARM GAS /tmp/ccB34LXC.s page 39 + + + 2212 @ args = 0, pretend = 0, frame = 0 + 2213 @ frame_needed = 0, uses_anonymous_args = 0 + 2214 0000 344A ldr r2, .L543 + 2215 0002 0368 ldr r3, [r0] + 2216 0004 70B5 push {r4, r5, r6, lr} + 2217 0006 9668 ldr r6, [r2, #8] + 2218 0008 9D68 ldr r5, [r3, #8] + 2219 000a 15F00405 ands r5, r5, #4 + 2220 000e 3ED1 bne .L532 + 2221 0010 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 + 2222 0014 012B cmp r3, #1 + 2223 0016 0446 mov r4, r0 + 2224 0018 39D0 beq .L532 + 2225 001a 0123 movs r3, #1 + 2226 001c 80F85830 strb r3, [r0, #88] + 2227 0020 FFF7FEFF bl ADC_Enable + 2228 0024 0028 cmp r0, #0 + 2229 0026 34D1 bne .L522 + 2230 0028 E36D ldr r3, [r4, #92] + 2231 002a 2268 ldr r2, [r4] + 2232 002c 23F47063 bic r3, r3, #3840 + 2233 0030 23F00103 bic r3, r3, #1 + 2234 0034 43F48073 orr r3, r3, #256 + 2235 0038 E365 str r3, [r4, #92] + 2236 003a 274B ldr r3, .L543+4 + 2237 003c 9A42 cmp r2, r3 + 2238 003e 06F01F06 and r6, r6, #31 + 2239 0042 41D0 beq .L523 + 2240 0044 1146 mov r1, r2 + 2241 .L529: + 2242 0046 E36D ldr r3, [r4, #92] + 2243 0048 23F48013 bic r3, r3, #1048576 + 2244 004c E365 str r3, [r4, #92] + 2245 .L530: + 2246 004e E36D ldr r3, [r4, #92] + 2247 0050 13F48053 ands r3, r3, #4096 + 2248 0054 1CBF itt ne + 2249 0056 236E ldrne r3, [r4, #96] + 2250 0058 23F00603 bicne r3, r3, #6 + 2251 005c 2366 str r3, [r4, #96] + 2252 005e 1C23 movs r3, #28 + 2253 0060 1360 str r3, [r2] + 2254 0062 8A42 cmp r2, r1 + 2255 0064 4FF00003 mov r3, #0 + 2256 0068 84F85830 strb r3, [r4, #88] + 2257 006c 1AD0 beq .L526 + 2258 006e 092E cmp r6, #9 + 2259 0070 12D9 bls .L542 + 2260 .L527: + 2261 0072 E36D ldr r3, [r4, #92] + 2262 0074 43F48013 orr r3, r3, #1048576 + 2263 0078 E365 str r3, [r4, #92] + 2264 007a CB68 ldr r3, [r1, #12] + 2265 007c 9B01 lsls r3, r3, #6 + 2266 007e 05D5 bpl .L534 + 2267 0080 E36D ldr r3, [r4, #92] + 2268 0082 23F44053 bic r3, r3, #12288 + ARM GAS /tmp/ccB34LXC.s page 40 + + + 2269 0086 43F48053 orr r3, r3, #4096 + 2270 008a E365 str r3, [r4, #92] + 2271 .L534: + 2272 008c 70BD pop {r4, r5, r6, pc} + 2273 .L532: + 2274 008e 0220 movs r0, #2 + 2275 0090 70BD pop {r4, r5, r6, pc} + 2276 .L522: + 2277 0092 84F85850 strb r5, [r4, #88] + 2278 0096 70BD pop {r4, r5, r6, pc} + 2279 .L542: + 2280 0098 40F22123 movw r3, #545 + 2281 009c 23FA06F6 lsr r6, r3, r6 + 2282 00a0 F507 lsls r5, r6, #31 + 2283 00a2 E6D5 bpl .L527 + 2284 .L526: + 2285 00a4 D368 ldr r3, [r2, #12] + 2286 00a6 9901 lsls r1, r3, #6 + 2287 00a8 05D5 bpl .L528 + 2288 00aa E36D ldr r3, [r4, #92] + 2289 00ac 23F44053 bic r3, r3, #12288 + 2290 00b0 43F48053 orr r3, r3, #4096 + 2291 00b4 E365 str r3, [r4, #92] + 2292 .L528: + 2293 00b6 9368 ldr r3, [r2, #8] + 2294 00b8 23F00043 bic r3, r3, #-2147483648 + 2295 00bc 23F03F03 bic r3, r3, #63 + 2296 00c0 43F00403 orr r3, r3, #4 + 2297 00c4 9360 str r3, [r2, #8] + 2298 00c6 70BD pop {r4, r5, r6, pc} + 2299 .L523: + 2300 00c8 4FF0A041 mov r1, #1342177280 + 2301 00cc 002E cmp r6, #0 + 2302 00ce BAD0 beq .L529 + 2303 00d0 BDE7 b .L530 + 2304 .L544: + 2305 00d2 00BF .align 2 + 2306 .L543: + 2307 00d4 00030050 .word 1342178048 + 2308 00d8 00010050 .word 1342177536 + 2310 .section .text.HAL_ADC_Start_IT,"ax",%progbits + 2311 .align 1 + 2312 .p2align 2,,3 + 2313 .global HAL_ADC_Start_IT + 2314 .syntax unified + 2315 .thumb + 2316 .thumb_func + 2317 .fpu fpv4-sp-d16 + 2319 HAL_ADC_Start_IT: + 2320 @ args = 0, pretend = 0, frame = 0 + 2321 @ frame_needed = 0, uses_anonymous_args = 0 + 2322 0000 4F4A ldr r2, .L575 + 2323 0002 0368 ldr r3, [r0] + 2324 0004 70B5 push {r4, r5, r6, lr} + 2325 0006 9668 ldr r6, [r2, #8] + 2326 0008 9D68 ldr r5, [r3, #8] + 2327 000a 15F00405 ands r5, r5, #4 + ARM GAS /tmp/ccB34LXC.s page 41 + + + 2328 000e 5AD1 bne .L562 + 2329 0010 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 + 2330 0014 012B cmp r3, #1 + 2331 0016 0446 mov r4, r0 + 2332 0018 55D0 beq .L562 + 2333 001a 0123 movs r3, #1 + 2334 001c 80F85830 strb r3, [r0, #88] + 2335 0020 FFF7FEFF bl ADC_Enable + 2336 0024 0028 cmp r0, #0 + 2337 0026 50D1 bne .L547 + 2338 0028 E26D ldr r2, [r4, #92] + 2339 002a 2368 ldr r3, [r4] + 2340 002c 22F47062 bic r2, r2, #3840 + 2341 0030 22F00102 bic r2, r2, #1 + 2342 0034 42F48072 orr r2, r2, #256 + 2343 0038 E265 str r2, [r4, #92] + 2344 003a 424A ldr r2, .L575+4 + 2345 003c 9342 cmp r3, r2 + 2346 003e 06F01F06 and r6, r6, #31 + 2347 0042 67D0 beq .L548 + 2348 0044 1946 mov r1, r3 + 2349 .L559: + 2350 0046 E26D ldr r2, [r4, #92] + 2351 0048 22F48012 bic r2, r2, #1048576 + 2352 004c E265 str r2, [r4, #92] + 2353 .L560: + 2354 004e E26D ldr r2, [r4, #92] + 2355 0050 A569 ldr r5, [r4, #24] + 2356 0052 12F48052 ands r2, r2, #4096 + 2357 0056 1CBF itt ne + 2358 0058 226E ldrne r2, [r4, #96] + 2359 005a 22F00602 bicne r2, r2, #6 + 2360 005e 2266 str r2, [r4, #96] + 2361 0060 1C22 movs r2, #28 + 2362 0062 1A60 str r2, [r3] + 2363 0064 0022 movs r2, #0 + 2364 0066 84F85820 strb r2, [r4, #88] + 2365 006a 5A68 ldr r2, [r3, #4] + 2366 006c 22F01C02 bic r2, r2, #28 + 2367 0070 5A60 str r2, [r3, #4] + 2368 0072 5A68 ldr r2, [r3, #4] + 2369 0074 082D cmp r5, #8 + 2370 0076 0CBF ite eq + 2371 0078 42F00802 orreq r2, r2, #8 + 2372 007c 42F00402 orrne r2, r2, #4 + 2373 0080 5A60 str r2, [r3, #4] + 2374 0082 E26B ldr r2, [r4, #60] + 2375 0084 1AB9 cbnz r2, .L553 + 2376 0086 5A68 ldr r2, [r3, #4] + 2377 0088 42F01002 orr r2, r2, #16 + 2378 008c 5A60 str r2, [r3, #4] + 2379 .L553: + 2380 008e 8B42 cmp r3, r1 + 2381 0090 24D0 beq .L554 + 2382 0092 092E cmp r6, #9 + 2383 0094 1CD9 bls .L572 + 2384 .L555: + ARM GAS /tmp/ccB34LXC.s page 42 + + + 2385 0096 E26D ldr r2, [r4, #92] + 2386 0098 42F48012 orr r2, r2, #1048576 + 2387 009c E265 str r2, [r4, #92] + 2388 009e CA68 ldr r2, [r1, #12] + 2389 00a0 9201 lsls r2, r2, #6 + 2390 00a2 0FD5 bpl .L564 + 2391 00a4 E26D ldr r2, [r4, #92] + 2392 00a6 22F44052 bic r2, r2, #12288 + 2393 00aa 42F48052 orr r2, r2, #4096 + 2394 00ae E265 str r2, [r4, #92] + 2395 00b0 082D cmp r5, #8 + 2396 00b2 5A68 ldr r2, [r3, #4] + 2397 00b4 3BD0 beq .L573 + 2398 00b6 22F04002 bic r2, r2, #64 + 2399 00ba 5A60 str r2, [r3, #4] + 2400 00bc 5A68 ldr r2, [r3, #4] + 2401 00be 42F02002 orr r2, r2, #32 + 2402 00c2 5A60 str r2, [r3, #4] + 2403 .L564: + 2404 00c4 70BD pop {r4, r5, r6, pc} + 2405 .L562: + 2406 00c6 0220 movs r0, #2 + 2407 00c8 70BD pop {r4, r5, r6, pc} + 2408 .L547: + 2409 00ca 84F85850 strb r5, [r4, #88] + 2410 00ce 70BD pop {r4, r5, r6, pc} + 2411 .L572: + 2412 00d0 40F22122 movw r2, #545 + 2413 00d4 22FA06F6 lsr r6, r2, r6 + 2414 00d8 F607 lsls r6, r6, #31 + 2415 00da DCD5 bpl .L555 + 2416 .L554: + 2417 00dc DA68 ldr r2, [r3, #12] + 2418 00de 9101 lsls r1, r2, #6 + 2419 00e0 0FD5 bpl .L556 + 2420 00e2 E26D ldr r2, [r4, #92] + 2421 00e4 22F44052 bic r2, r2, #12288 + 2422 00e8 42F48052 orr r2, r2, #4096 + 2423 00ec E265 str r2, [r4, #92] + 2424 00ee 082D cmp r5, #8 + 2425 00f0 5A68 ldr r2, [r3, #4] + 2426 00f2 14D0 beq .L574 + 2427 00f4 22F04002 bic r2, r2, #64 + 2428 00f8 5A60 str r2, [r3, #4] + 2429 00fa 5A68 ldr r2, [r3, #4] + 2430 00fc 42F02002 orr r2, r2, #32 + 2431 0100 5A60 str r2, [r3, #4] + 2432 .L556: + 2433 0102 9A68 ldr r2, [r3, #8] + 2434 0104 22F00042 bic r2, r2, #-2147483648 + 2435 0108 22F03F02 bic r2, r2, #63 + 2436 010c 42F00402 orr r2, r2, #4 + 2437 0110 9A60 str r2, [r3, #8] + 2438 0112 70BD pop {r4, r5, r6, pc} + 2439 .L548: + 2440 0114 4FF0A041 mov r1, #1342177280 + 2441 0118 002E cmp r6, #0 + ARM GAS /tmp/ccB34LXC.s page 43 + + + 2442 011a 94D0 beq .L559 + 2443 011c 97E7 b .L560 + 2444 .L574: + 2445 011e 22F02002 bic r2, r2, #32 + 2446 0122 5A60 str r2, [r3, #4] + 2447 0124 5A68 ldr r2, [r3, #4] + 2448 0126 42F04002 orr r2, r2, #64 + 2449 012a 5A60 str r2, [r3, #4] + 2450 012c E9E7 b .L556 + 2451 .L573: + 2452 012e 22F02002 bic r2, r2, #32 + 2453 0132 5A60 str r2, [r3, #4] + 2454 0134 5A68 ldr r2, [r3, #4] + 2455 0136 42F04002 orr r2, r2, #64 + 2456 013a 5A60 str r2, [r3, #4] + 2457 013c 70BD pop {r4, r5, r6, pc} + 2458 .L576: + 2459 013e 00BF .align 2 + 2460 .L575: + 2461 0140 00030050 .word 1342178048 + 2462 0144 00010050 .word 1342177536 + 2464 .section .text.HAL_ADC_Start_DMA,"ax",%progbits + 2465 .align 1 + 2466 .p2align 2,,3 + 2467 .global HAL_ADC_Start_DMA + 2468 .syntax unified + 2469 .thumb + 2470 .thumb_func + 2471 .fpu fpv4-sp-d16 + 2473 HAL_ADC_Start_DMA: + 2474 @ args = 0, pretend = 0, frame = 0 + 2475 @ frame_needed = 0, uses_anonymous_args = 0 + 2476 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 2477 0004 374B ldr r3, .L594 + 2478 0006 0568 ldr r5, [r0] + 2479 0008 9B68 ldr r3, [r3, #8] + 2480 000a AD68 ldr r5, [r5, #8] + 2481 000c 6C07 lsls r4, r5, #29 + 2482 000e 14D4 bmi .L587 + 2483 0010 1646 mov r6, r2 + 2484 0012 90F85820 ldrb r2, [r0, #88] @ zero_extendqisi2 + 2485 0016 012A cmp r2, #1 + 2486 0018 0446 mov r4, r0 + 2487 001a 0ED0 beq .L587 + 2488 001c 03F01F08 and r8, r3, #31 + 2489 0020 B8F1090F cmp r8, #9 + 2490 0024 4FF00103 mov r3, #1 + 2491 0028 80F85830 strb r3, [r0, #88] + 2492 002c 08D9 bls .L593 + 2493 .L579: + 2494 002e 0023 movs r3, #0 + 2495 0030 84F85830 strb r3, [r4, #88] + 2496 0034 0120 movs r0, #1 + 2497 0036 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2498 .L587: + 2499 003a 0220 movs r0, #2 + 2500 003c BDE8F081 pop {r4, r5, r6, r7, r8, pc} + ARM GAS /tmp/ccB34LXC.s page 44 + + + 2501 .L593: + 2502 0040 40F22123 movw r3, #545 + 2503 0044 23FA08F3 lsr r3, r3, r8 + 2504 0048 DB43 mvns r3, r3 + 2505 004a 13F00105 ands r5, r3, #1 + 2506 004e EED1 bne .L579 + 2507 0050 0F46 mov r7, r1 + 2508 0052 FFF7FEFF bl ADC_Enable + 2509 0056 0028 cmp r0, #0 + 2510 0058 3BD1 bne .L580 + 2511 005a E36D ldr r3, [r4, #92] + 2512 005c 2168 ldr r1, [r4] + 2513 005e 23F47063 bic r3, r3, #3840 + 2514 0062 23F00103 bic r3, r3, #1 + 2515 0066 43F48073 orr r3, r3, #256 + 2516 006a E365 str r3, [r4, #92] + 2517 006c 1E4B ldr r3, .L594+4 + 2518 006e 9942 cmp r1, r3 + 2519 0070 33D0 beq .L581 + 2520 .L584: + 2521 0072 E36D ldr r3, [r4, #92] + 2522 0074 23F48013 bic r3, r3, #1048576 + 2523 0078 E365 str r3, [r4, #92] + 2524 .L585: + 2525 007a E36D ldr r3, [r4, #92] + 2526 007c 606D ldr r0, [r4, #84] + 2527 007e 1B4D ldr r5, .L594+8 + 2528 0080 13F48053 ands r3, r3, #4096 + 2529 0084 1CBF itt ne + 2530 0086 236E ldrne r3, [r4, #96] + 2531 0088 23F00603 bicne r3, r3, #6 + 2532 008c 2366 str r3, [r4, #96] + 2533 008e C562 str r5, [r0, #44] + 2534 0090 174D ldr r5, .L594+12 + 2535 0092 0563 str r5, [r0, #48] + 2536 0094 174D ldr r5, .L594+16 + 2537 0096 4563 str r5, [r0, #52] + 2538 0098 1C25 movs r5, #28 + 2539 009a 0D60 str r5, [r1] + 2540 009c 0025 movs r5, #0 + 2541 009e 84F85850 strb r5, [r4, #88] + 2542 00a2 4D68 ldr r5, [r1, #4] + 2543 00a4 45F01005 orr r5, r5, #16 + 2544 00a8 4D60 str r5, [r1, #4] + 2545 00aa CD68 ldr r5, [r1, #12] + 2546 00ac 45F00105 orr r5, r5, #1 + 2547 00b0 3346 mov r3, r6 + 2548 00b2 3A46 mov r2, r7 + 2549 00b4 CD60 str r5, [r1, #12] + 2550 00b6 4031 adds r1, r1, #64 + 2551 00b8 FFF7FEFF bl HAL_DMA_Start_IT + 2552 00bc 2268 ldr r2, [r4] + 2553 00be 9368 ldr r3, [r2, #8] + 2554 00c0 23F00043 bic r3, r3, #-2147483648 + 2555 00c4 23F03F03 bic r3, r3, #63 + 2556 00c8 43F00403 orr r3, r3, #4 + 2557 00cc 9360 str r3, [r2, #8] + ARM GAS /tmp/ccB34LXC.s page 45 + + + 2558 00ce BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2559 .L580: + 2560 00d2 84F85850 strb r5, [r4, #88] + 2561 00d6 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 2562 .L581: + 2563 00da B8F1000F cmp r8, #0 + 2564 00de C8D0 beq .L584 + 2565 00e0 CBE7 b .L585 + 2566 .L595: + 2567 00e2 00BF .align 2 + 2568 .L594: + 2569 00e4 00030050 .word 1342178048 + 2570 00e8 00010050 .word 1342177536 + 2571 00ec 00000000 .word ADC_DMAConvCplt + 2572 00f0 00000000 .word ADC_DMAHalfConvCplt + 2573 00f4 00000000 .word ADC_DMAError + 2575 .section .text.ADC_Disable,"ax",%progbits + 2576 .align 1 + 2577 .p2align 2,,3 + 2578 .global ADC_Disable + 2579 .syntax unified + 2580 .thumb + 2581 .thumb_func + 2582 .fpu fpv4-sp-d16 + 2584 ADC_Disable: + 2585 @ args = 0, pretend = 0, frame = 0 + 2586 @ frame_needed = 0, uses_anonymous_args = 0 + 2587 0000 38B5 push {r3, r4, r5, lr} + 2588 0002 0368 ldr r3, [r0] + 2589 0004 9A68 ldr r2, [r3, #8] + 2590 0006 9507 lsls r5, r2, #30 + 2591 0008 02D5 bpl .L597 + 2592 000a 9B68 ldr r3, [r3, #8] + 2593 000c 0020 movs r0, #0 + 2594 000e 38BD pop {r3, r4, r5, pc} + 2595 .L597: + 2596 0010 9A68 ldr r2, [r3, #8] + 2597 0012 D407 lsls r4, r2, #31 + 2598 0014 2BD5 bpl .L602 + 2599 0016 9A68 ldr r2, [r3, #8] + 2600 0018 02F00D02 and r2, r2, #13 + 2601 001c 012A cmp r2, #1 + 2602 001e 0446 mov r4, r0 + 2603 0020 08D0 beq .L612 + 2604 .L611: + 2605 0022 E36D ldr r3, [r4, #92] + 2606 0024 43F01003 orr r3, r3, #16 + 2607 0028 E365 str r3, [r4, #92] + 2608 002a 236E ldr r3, [r4, #96] + 2609 002c 0120 movs r0, #1 + 2610 002e 0343 orrs r3, r3, r0 + 2611 0030 2366 str r3, [r4, #96] + 2612 0032 38BD pop {r3, r4, r5, pc} + 2613 .L612: + 2614 0034 9A68 ldr r2, [r3, #8] + 2615 0036 22F00042 bic r2, r2, #-2147483648 + 2616 003a 22F03F02 bic r2, r2, #63 + ARM GAS /tmp/ccB34LXC.s page 46 + + + 2617 003e 0321 movs r1, #3 + 2618 0040 42F00202 orr r2, r2, #2 + 2619 0044 9A60 str r2, [r3, #8] + 2620 0046 1960 str r1, [r3] + 2621 0048 FFF7FEFF bl HAL_GetTick + 2622 004c 2368 ldr r3, [r4] + 2623 004e 9B68 ldr r3, [r3, #8] + 2624 0050 D907 lsls r1, r3, #31 + 2625 0052 0546 mov r5, r0 + 2626 0054 0BD5 bpl .L602 + 2627 .L601: + 2628 0056 FFF7FEFF bl HAL_GetTick + 2629 005a 401B subs r0, r0, r5 + 2630 005c 0228 cmp r0, #2 + 2631 005e 2368 ldr r3, [r4] + 2632 0060 02D9 bls .L604 + 2633 0062 9A68 ldr r2, [r3, #8] + 2634 0064 D207 lsls r2, r2, #31 + 2635 0066 DCD4 bmi .L611 + 2636 .L604: + 2637 0068 9B68 ldr r3, [r3, #8] + 2638 006a DB07 lsls r3, r3, #31 + 2639 006c F3D4 bmi .L601 + 2640 .L602: + 2641 006e 0020 movs r0, #0 + 2642 0070 38BD pop {r3, r4, r5, pc} + 2644 0072 00BF .section .text.HAL_ADC_DeInit,"ax",%progbits + 2645 .align 1 + 2646 .p2align 2,,3 + 2647 .global HAL_ADC_DeInit + 2648 .syntax unified + 2649 .thumb + 2650 .thumb_func + 2651 .fpu fpv4-sp-d16 + 2653 HAL_ADC_DeInit: + 2654 @ args = 0, pretend = 0, frame = 0 + 2655 @ frame_needed = 0, uses_anonymous_args = 0 + 2656 0000 38B5 push {r3, r4, r5, lr} + 2657 0002 0028 cmp r0, #0 + 2658 0004 00F09580 beq .L618 + 2659 0008 C36D ldr r3, [r0, #92] + 2660 000a 0446 mov r4, r0 + 2661 000c 43F00203 orr r3, r3, #2 + 2662 0010 C365 str r3, [r0, #92] + 2663 0012 0321 movs r1, #3 + 2664 0014 FFF7FEFF bl ADC_ConversionStop + 2665 0018 2368 ldr r3, [r4] + 2666 001a DA68 ldr r2, [r3, #12] + 2667 001c 42F40012 orr r2, r2, #2097152 + 2668 0020 0546 mov r5, r0 + 2669 0022 DA60 str r2, [r3, #12] + 2670 0024 0028 cmp r0, #0 + 2671 0026 7BD0 beq .L620 + 2672 .L615: + 2673 0028 5968 ldr r1, [r3, #4] + 2674 002a 4448 ldr r0, .L623 + 2675 002c 40F2FF72 movw r2, #2047 + ARM GAS /tmp/ccB34LXC.s page 47 + + + 2676 0030 0140 ands r1, r1, r0 + 2677 0032 5960 str r1, [r3, #4] + 2678 0034 1A60 str r2, [r3] + 2679 0036 9968 ldr r1, [r3, #8] + 2680 0038 414A ldr r2, .L623+4 + 2681 003a 21F0A041 bic r1, r1, #1342177280 + 2682 003e 9960 str r1, [r3, #8] + 2683 0040 9968 ldr r1, [r3, #8] + 2684 0042 41F00051 orr r1, r1, #536870912 + 2685 0046 9960 str r1, [r3, #8] + 2686 0048 D968 ldr r1, [r3, #12] + 2687 004a 1140 ands r1, r1, r2 + 2688 004c D960 str r1, [r3, #12] + 2689 004e D968 ldr r1, [r3, #12] + 2690 0050 41F00041 orr r1, r1, #-2147483648 + 2691 0054 D960 str r1, [r3, #12] + 2692 0056 1A69 ldr r2, [r3, #16] + 2693 0058 0240 ands r2, r2, r0 + 2694 005a 1A61 str r2, [r3, #16] + 2695 005c 5969 ldr r1, [r3, #20] + 2696 005e 394A ldr r2, .L623+8 + 2697 0060 3948 ldr r0, .L623+12 + 2698 0062 01F08041 and r1, r1, #1073741824 + 2699 0066 5961 str r1, [r3, #20] + 2700 0068 9969 ldr r1, [r3, #24] + 2701 006a 01F07841 and r1, r1, #-134217728 + 2702 006e 9961 str r1, [r3, #24] + 2703 0070 196A ldr r1, [r3, #32] + 2704 0072 01F0F021 and r1, r1, #-268374016 + 2705 0076 1962 str r1, [r3, #32] + 2706 0078 596A ldr r1, [r3, #36] + 2707 007a 01F0FF21 and r1, r1, #-16711936 + 2708 007e 5962 str r1, [r3, #36] + 2709 0080 996A ldr r1, [r3, #40] + 2710 0082 01F0FF21 and r1, r1, #-16711936 + 2711 0086 9962 str r1, [r3, #40] + 2712 0088 196B ldr r1, [r3, #48] + 2713 008a 0A40 ands r2, r2, r1 + 2714 008c 1A63 str r2, [r3, #48] + 2715 008e 596B ldr r1, [r3, #52] + 2716 0090 0140 ands r1, r1, r0 + 2717 0092 5963 str r1, [r3, #52] + 2718 0094 9A6B ldr r2, [r3, #56] + 2719 0096 2D49 ldr r1, .L623+16 + 2720 0098 0240 ands r2, r2, r0 + 2721 009a 9A63 str r2, [r3, #56] + 2722 009c DA6B ldr r2, [r3, #60] + 2723 009e 22F4FB62 bic r2, r2, #2008 + 2724 00a2 22F00702 bic r2, r2, #7 + 2725 00a6 DA63 str r2, [r3, #60] + 2726 00a8 1A6E ldr r2, [r3, #96] + 2727 00aa 0A40 ands r2, r2, r1 + 2728 00ac 1A66 str r2, [r3, #96] + 2729 00ae 5A6E ldr r2, [r3, #100] + 2730 00b0 0A40 ands r2, r2, r1 + 2731 00b2 5A66 str r2, [r3, #100] + 2732 00b4 9A6E ldr r2, [r3, #104] + ARM GAS /tmp/ccB34LXC.s page 48 + + + 2733 00b6 0A40 ands r2, r2, r1 + 2734 00b8 9A66 str r2, [r3, #104] + 2735 00ba DA6E ldr r2, [r3, #108] + 2736 00bc 1140 ands r1, r1, r2 + 2737 00be D966 str r1, [r3, #108] + 2738 00c0 D3F8A020 ldr r2, [r3, #160] + 2739 00c4 2249 ldr r1, .L623+20 + 2740 00c6 0A40 ands r2, r2, r1 + 2741 00c8 C3F8A020 str r2, [r3, #160] + 2742 00cc D3F8A420 ldr r2, [r3, #164] + 2743 00d0 0A40 ands r2, r2, r1 + 2744 00d2 C3F8A420 str r2, [r3, #164] + 2745 00d6 D3F8B020 ldr r2, [r3, #176] + 2746 00da 0A40 ands r2, r2, r1 + 2747 00dc C3F8B020 str r2, [r3, #176] + 2748 00e0 D3F8B420 ldr r2, [r3, #180] + 2749 00e4 1B49 ldr r1, .L623+24 + 2750 00e6 22F07F12 bic r2, r2, #8323199 + 2751 00ea 4FF0A040 mov r0, #1342177280 + 2752 00ee C3F8B420 str r2, [r3, #180] + 2753 00f2 8268 ldr r2, [r0, #8] + 2754 00f4 8B68 ldr r3, [r1, #8] + 2755 00f6 1343 orrs r3, r3, r2 + 2756 00f8 DB07 lsls r3, r3, #31 + 2757 00fa 08D5 bpl .L621 + 2758 .L617: + 2759 00fc 0023 movs r3, #0 + 2760 00fe 84F85830 strb r3, [r4, #88] + 2761 0102 2366 str r3, [r4, #96] + 2762 0104 C4E91933 strd r3, r3, [r4, #100] + 2763 0108 E365 str r3, [r4, #92] + 2764 010a 2846 mov r0, r5 + 2765 010c 38BD pop {r3, r4, r5, pc} + 2766 .L621: + 2767 010e 124A ldr r2, .L623+28 + 2768 0110 1249 ldr r1, .L623+32 + 2769 0112 9368 ldr r3, [r2, #8] + 2770 0114 0B40 ands r3, r3, r1 + 2771 0116 9360 str r3, [r2, #8] + 2772 0118 2046 mov r0, r4 + 2773 011a FFF7FEFF bl HAL_ADC_MspDeInit + 2774 011e EDE7 b .L617 + 2775 .L620: + 2776 0120 2046 mov r0, r4 + 2777 0122 FFF7FEFF bl ADC_Disable + 2778 0126 0546 mov r5, r0 + 2779 0128 30B9 cbnz r0, .L622 + 2780 012a 0122 movs r2, #1 + 2781 012c 2368 ldr r3, [r4] + 2782 012e E265 str r2, [r4, #92] + 2783 0130 7AE7 b .L615 + 2784 .L618: + 2785 0132 0125 movs r5, #1 + 2786 0134 2846 mov r0, r5 + 2787 0136 38BD pop {r3, r4, r5, pc} + 2788 .L622: + 2789 0138 2368 ldr r3, [r4] + ARM GAS /tmp/ccB34LXC.s page 49 + + + 2790 013a 75E7 b .L615 + 2791 .L624: + 2792 .align 2 + 2793 .L623: + 2794 013c 00F8FFFF .word -2048 + 2795 0140 04000080 .word -2147483644 + 2796 0144 300882E0 .word -528349136 + 2797 0148 200882E0 .word -528349152 + 2798 014c 00F0FF03 .word 67104768 + 2799 0150 0000F8FF .word -524288 + 2800 0154 00010050 .word 1342177536 + 2801 0158 00030050 .word 1342178048 + 2802 015c E01000FE .word -33550112 + 2804 .section .text.HAL_ADC_Stop,"ax",%progbits + 2805 .align 1 + 2806 .p2align 2,,3 + 2807 .global HAL_ADC_Stop + 2808 .syntax unified + 2809 .thumb + 2810 .thumb_func + 2811 .fpu fpv4-sp-d16 + 2813 HAL_ADC_Stop: + 2814 @ args = 0, pretend = 0, frame = 0 + 2815 @ frame_needed = 0, uses_anonymous_args = 0 + 2816 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 + 2817 0004 012B cmp r3, #1 + 2818 0006 1DD0 beq .L628 + 2819 0008 0123 movs r3, #1 + 2820 000a 10B5 push {r4, lr} + 2821 000c 0321 movs r1, #3 + 2822 000e 80F85830 strb r3, [r0, #88] + 2823 0012 0446 mov r4, r0 + 2824 0014 FFF7FEFF bl ADC_ConversionStop + 2825 0018 18B1 cbz r0, .L633 + 2826 .L627: + 2827 001a 0023 movs r3, #0 + 2828 001c 84F85830 strb r3, [r4, #88] + 2829 0020 10BD pop {r4, pc} + 2830 .L633: + 2831 0022 2046 mov r0, r4 + 2832 0024 FFF7FEFF bl ADC_Disable + 2833 0028 0028 cmp r0, #0 + 2834 002a F6D1 bne .L627 + 2835 002c E36D ldr r3, [r4, #92] + 2836 002e 23F48853 bic r3, r3, #4352 + 2837 0032 23F00103 bic r3, r3, #1 + 2838 0036 43F00103 orr r3, r3, #1 + 2839 003a E365 str r3, [r4, #92] + 2840 003c 0023 movs r3, #0 + 2841 003e 84F85830 strb r3, [r4, #88] + 2842 0042 10BD pop {r4, pc} + 2843 .L628: + 2844 0044 0220 movs r0, #2 + 2845 0046 7047 bx lr + 2847 .section .text.HAL_ADC_Stop_IT,"ax",%progbits + 2848 .align 1 + 2849 .p2align 2,,3 + ARM GAS /tmp/ccB34LXC.s page 50 + + + 2850 .global HAL_ADC_Stop_IT + 2851 .syntax unified + 2852 .thumb + 2853 .thumb_func + 2854 .fpu fpv4-sp-d16 + 2856 HAL_ADC_Stop_IT: + 2857 @ args = 0, pretend = 0, frame = 0 + 2858 @ frame_needed = 0, uses_anonymous_args = 0 + 2859 0000 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 + 2860 0004 012B cmp r3, #1 + 2861 0006 22D0 beq .L637 + 2862 0008 0123 movs r3, #1 + 2863 000a 10B5 push {r4, lr} + 2864 000c 0321 movs r1, #3 + 2865 000e 80F85830 strb r3, [r0, #88] + 2866 0012 0446 mov r4, r0 + 2867 0014 FFF7FEFF bl ADC_ConversionStop + 2868 0018 18B1 cbz r0, .L642 + 2869 .L636: + 2870 001a 0023 movs r3, #0 + 2871 001c 84F85830 strb r3, [r4, #88] + 2872 0020 10BD pop {r4, pc} + 2873 .L642: + 2874 0022 2268 ldr r2, [r4] + 2875 0024 5368 ldr r3, [r2, #4] + 2876 0026 23F01C03 bic r3, r3, #28 + 2877 002a 2046 mov r0, r4 + 2878 002c 5360 str r3, [r2, #4] + 2879 002e FFF7FEFF bl ADC_Disable + 2880 0032 0028 cmp r0, #0 + 2881 0034 F1D1 bne .L636 + 2882 0036 E36D ldr r3, [r4, #92] + 2883 0038 23F48853 bic r3, r3, #4352 + 2884 003c 23F00103 bic r3, r3, #1 + 2885 0040 43F00103 orr r3, r3, #1 + 2886 0044 E365 str r3, [r4, #92] + 2887 0046 0023 movs r3, #0 + 2888 0048 84F85830 strb r3, [r4, #88] + 2889 004c 10BD pop {r4, pc} + 2890 .L637: + 2891 004e 0220 movs r0, #2 + 2892 0050 7047 bx lr + 2894 0052 00BF .section .text.HAL_ADC_Stop_DMA,"ax",%progbits + 2895 .align 1 + 2896 .p2align 2,,3 + 2897 .global HAL_ADC_Stop_DMA + 2898 .syntax unified + 2899 .thumb + 2900 .thumb_func + 2901 .fpu fpv4-sp-d16 + 2903 HAL_ADC_Stop_DMA: + 2904 @ args = 0, pretend = 0, frame = 0 + 2905 @ frame_needed = 0, uses_anonymous_args = 0 + 2906 0000 38B5 push {r3, r4, r5, lr} + 2907 0002 90F85830 ldrb r3, [r0, #88] @ zero_extendqisi2 + 2908 0006 012B cmp r3, #1 + 2909 0008 28D0 beq .L649 + ARM GAS /tmp/ccB34LXC.s page 51 + + + 2910 000a 0123 movs r3, #1 + 2911 000c 80F85830 strb r3, [r0, #88] + 2912 0010 0321 movs r1, #3 + 2913 0012 0446 mov r4, r0 + 2914 0014 FFF7FEFF bl ADC_ConversionStop + 2915 0018 0546 mov r5, r0 + 2916 001a D0B9 cbnz r0, .L645 + 2917 001c 2368 ldr r3, [r4] + 2918 001e 606D ldr r0, [r4, #84] + 2919 0020 DA68 ldr r2, [r3, #12] + 2920 0022 22F00102 bic r2, r2, #1 + 2921 0026 DA60 str r2, [r3, #12] + 2922 0028 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2 + 2923 002c 022A cmp r2, #2 + 2924 002e 18D0 beq .L646 + 2925 0030 5A68 ldr r2, [r3, #4] + 2926 0032 22F01002 bic r2, r2, #16 + 2927 0036 5A60 str r2, [r3, #4] + 2928 .L647: + 2929 0038 2046 mov r0, r4 + 2930 003a FFF7FEFF bl ADC_Disable + 2931 003e 0546 mov r5, r0 + 2932 0040 38B9 cbnz r0, .L645 + 2933 0042 E36D ldr r3, [r4, #92] + 2934 0044 23F48853 bic r3, r3, #4352 + 2935 0048 23F00103 bic r3, r3, #1 + 2936 004c 43F00103 orr r3, r3, #1 + 2937 0050 E365 str r3, [r4, #92] + 2938 .L645: + 2939 0052 0023 movs r3, #0 + 2940 0054 84F85830 strb r3, [r4, #88] + 2941 0058 2846 mov r0, r5 + 2942 005a 38BD pop {r3, r4, r5, pc} + 2943 .L649: + 2944 005c 0225 movs r5, #2 + 2945 005e 2846 mov r0, r5 + 2946 0060 38BD pop {r3, r4, r5, pc} + 2947 .L646: + 2948 0062 FFF7FEFF bl HAL_DMA_Abort + 2949 0066 0546 mov r5, r0 + 2950 0068 60B1 cbz r0, .L648 + 2951 006a E36D ldr r3, [r4, #92] + 2952 006c 2268 ldr r2, [r4] + 2953 006e 43F04003 orr r3, r3, #64 + 2954 0072 E365 str r3, [r4, #92] + 2955 0074 5368 ldr r3, [r2, #4] + 2956 0076 23F01003 bic r3, r3, #16 + 2957 007a 2046 mov r0, r4 + 2958 007c 5360 str r3, [r2, #4] + 2959 007e FFF7FEFF bl ADC_Disable + 2960 0082 E6E7 b .L645 + 2961 .L648: + 2962 0084 2268 ldr r2, [r4] + 2963 0086 5368 ldr r3, [r2, #4] + 2964 0088 23F01003 bic r3, r3, #16 + 2965 008c 5360 str r3, [r2, #4] + 2966 008e D3E7 b .L647 + ARM GAS /tmp/ccB34LXC.s page 52 + + + 2968 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccB34LXC.s page 53 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_adc.c + /tmp/ccB34LXC.s:16 .text.HAL_ADC_MspInit:0000000000000000 $t + /tmp/ccB34LXC.s:25 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit + /tmp/ccB34LXC.s:32 .text.HAL_ADC_Init:0000000000000000 $t + /tmp/ccB34LXC.s:40 .text.HAL_ADC_Init:0000000000000000 HAL_ADC_Init + /tmp/ccB34LXC.s:270 .text.HAL_ADC_Init:00000000000001f4 $d + /tmp/ccB34LXC.s:277 .text.HAL_ADC_MspDeInit:0000000000000000 $t + /tmp/ccB34LXC.s:285 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit + /tmp/ccB34LXC.s:292 .text.HAL_ADC_PollForConversion:0000000000000000 $t + /tmp/ccB34LXC.s:300 .text.HAL_ADC_PollForConversion:0000000000000000 HAL_ADC_PollForConversion + /tmp/ccB34LXC.s:429 .text.HAL_ADC_PollForConversion:00000000000000fc $d + /tmp/ccB34LXC.s:433 .text.HAL_ADC_PollForEvent:0000000000000000 $t + /tmp/ccB34LXC.s:441 .text.HAL_ADC_PollForEvent:0000000000000000 HAL_ADC_PollForEvent + /tmp/ccB34LXC.s:551 .text.HAL_ADC_GetValue:0000000000000000 $t + /tmp/ccB34LXC.s:559 .text.HAL_ADC_GetValue:0000000000000000 HAL_ADC_GetValue + /tmp/ccB34LXC.s:568 .text.HAL_ADC_StartSampling:0000000000000000 $t + /tmp/ccB34LXC.s:576 .text.HAL_ADC_StartSampling:0000000000000000 HAL_ADC_StartSampling + /tmp/ccB34LXC.s:589 .text.HAL_ADC_StopSampling:0000000000000000 $t + /tmp/ccB34LXC.s:597 .text.HAL_ADC_StopSampling:0000000000000000 HAL_ADC_StopSampling + /tmp/ccB34LXC.s:610 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t + /tmp/ccB34LXC.s:618 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback + /tmp/ccB34LXC.s:625 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 $t + /tmp/ccB34LXC.s:633 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 HAL_ADC_ConvHalfCpltCallback + /tmp/ccB34LXC.s:640 .text.ADC_DMAHalfConvCplt:0000000000000000 $t + /tmp/ccB34LXC.s:648 .text.ADC_DMAHalfConvCplt:0000000000000000 ADC_DMAHalfConvCplt + /tmp/ccB34LXC.s:657 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 $t + /tmp/ccB34LXC.s:665 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 HAL_ADC_LevelOutOfWindowCallback + /tmp/ccB34LXC.s:672 .text.HAL_ADC_ErrorCallback:0000000000000000 $t + /tmp/ccB34LXC.s:680 .text.HAL_ADC_ErrorCallback:0000000000000000 HAL_ADC_ErrorCallback + /tmp/ccB34LXC.s:687 .text.HAL_ADC_IRQHandler:0000000000000000 $t + /tmp/ccB34LXC.s:695 .text.HAL_ADC_IRQHandler:0000000000000000 HAL_ADC_IRQHandler + /tmp/ccB34LXC.s:982 .text.HAL_ADC_IRQHandler:0000000000000244 $d + /tmp/ccB34LXC.s:986 .text.ADC_DMAConvCplt:0000000000000000 $t + /tmp/ccB34LXC.s:994 .text.ADC_DMAConvCplt:0000000000000000 ADC_DMAConvCplt + /tmp/ccB34LXC.s:1049 .text.ADC_DMAError:0000000000000000 $t + /tmp/ccB34LXC.s:1057 .text.ADC_DMAError:0000000000000000 ADC_DMAError + /tmp/ccB34LXC.s:1072 .text.HAL_ADC_ConfigChannel:0000000000000000 $t + /tmp/ccB34LXC.s:1080 .text.HAL_ADC_ConfigChannel:0000000000000000 HAL_ADC_ConfigChannel + /tmp/ccB34LXC.s:1441 .text.HAL_ADC_ConfigChannel:0000000000000370 $d + /tmp/ccB34LXC.s:1455 .text.HAL_ADC_ConfigChannel:000000000000039c $t + /tmp/ccB34LXC.s:1619 .text.HAL_ADC_ConfigChannel:00000000000004d4 $d + /tmp/ccB34LXC.s:1622 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 $t + /tmp/ccB34LXC.s:1630 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 HAL_ADC_AnalogWDGConfig + /tmp/ccB34LXC.s:1941 .text.HAL_ADC_AnalogWDGConfig:0000000000000300 $d + /tmp/ccB34LXC.s:1945 .text.HAL_ADC_GetState:0000000000000000 $t + /tmp/ccB34LXC.s:1953 .text.HAL_ADC_GetState:0000000000000000 HAL_ADC_GetState + /tmp/ccB34LXC.s:1961 .text.HAL_ADC_GetError:0000000000000000 $t + /tmp/ccB34LXC.s:1969 .text.HAL_ADC_GetError:0000000000000000 HAL_ADC_GetError + /tmp/ccB34LXC.s:1977 .text.ADC_ConversionStop:0000000000000000 $t + /tmp/ccB34LXC.s:1985 .text.ADC_ConversionStop:0000000000000000 ADC_ConversionStop + /tmp/ccB34LXC.s:2124 .text.ADC_ConversionStop:0000000000000104 $d + /tmp/ccB34LXC.s:2127 .text.ADC_Enable:0000000000000000 $t + /tmp/ccB34LXC.s:2135 .text.ADC_Enable:0000000000000000 ADC_Enable + /tmp/ccB34LXC.s:2199 .text.ADC_Enable:0000000000000070 $d + /tmp/ccB34LXC.s:2203 .text.HAL_ADC_Start:0000000000000000 $t + /tmp/ccB34LXC.s:2211 .text.HAL_ADC_Start:0000000000000000 HAL_ADC_Start + ARM GAS /tmp/ccB34LXC.s page 54 + + + /tmp/ccB34LXC.s:2307 .text.HAL_ADC_Start:00000000000000d4 $d + /tmp/ccB34LXC.s:2311 .text.HAL_ADC_Start_IT:0000000000000000 $t + /tmp/ccB34LXC.s:2319 .text.HAL_ADC_Start_IT:0000000000000000 HAL_ADC_Start_IT + /tmp/ccB34LXC.s:2461 .text.HAL_ADC_Start_IT:0000000000000140 $d + /tmp/ccB34LXC.s:2465 .text.HAL_ADC_Start_DMA:0000000000000000 $t + /tmp/ccB34LXC.s:2473 .text.HAL_ADC_Start_DMA:0000000000000000 HAL_ADC_Start_DMA + /tmp/ccB34LXC.s:2569 .text.HAL_ADC_Start_DMA:00000000000000e4 $d + /tmp/ccB34LXC.s:2576 .text.ADC_Disable:0000000000000000 $t + /tmp/ccB34LXC.s:2584 .text.ADC_Disable:0000000000000000 ADC_Disable + /tmp/ccB34LXC.s:2645 .text.HAL_ADC_DeInit:0000000000000000 $t + /tmp/ccB34LXC.s:2653 .text.HAL_ADC_DeInit:0000000000000000 HAL_ADC_DeInit + /tmp/ccB34LXC.s:2794 .text.HAL_ADC_DeInit:000000000000013c $d + /tmp/ccB34LXC.s:2805 .text.HAL_ADC_Stop:0000000000000000 $t + /tmp/ccB34LXC.s:2813 .text.HAL_ADC_Stop:0000000000000000 HAL_ADC_Stop + /tmp/ccB34LXC.s:2848 .text.HAL_ADC_Stop_IT:0000000000000000 $t + /tmp/ccB34LXC.s:2856 .text.HAL_ADC_Stop_IT:0000000000000000 HAL_ADC_Stop_IT + /tmp/ccB34LXC.s:2895 .text.HAL_ADC_Stop_DMA:0000000000000000 $t + /tmp/ccB34LXC.s:2903 .text.HAL_ADC_Stop_DMA:0000000000000000 HAL_ADC_Stop_DMA + +UNDEFINED SYMBOLS +SystemCoreClock +HAL_GetTick +HAL_ADCEx_InjectedConvCpltCallback +HAL_ADCEx_EndOfSamplingCallback +HAL_ADCEx_LevelOutOfWindow3Callback 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Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cordic.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_cordic.lst b/codice/build/stm32g4xx_hal_cordic.lst new file mode 100644 index 0000000..389aaa3 --- /dev/null +++ b/codice/build/stm32g4xx_hal_cordic.lst @@ -0,0 +1,854 @@ +ARM GAS /tmp/ccAgrgpa.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_cordic.c" + 14 .text + 15 .section .text.HAL_CORDIC_MspInit,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .weak HAL_CORDIC_MspInit + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_CORDIC_MspInit: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 7047 bx lr + 31 0002 00BF .section .text.HAL_CORDIC_Init,"ax",%progbits + 32 .align 1 + 33 .p2align 2,,3 + 34 .global HAL_CORDIC_Init + 35 .syntax unified + 36 .thumb + 37 .thumb_func + 38 .fpu fpv4-sp-d16 + 40 HAL_CORDIC_Init: + 41 @ args = 0, pretend = 0, frame = 0 + 42 @ frame_needed = 0, uses_anonymous_args = 0 + 43 0000 B0B1 cbz r0, .L6 + 44 0002 10B5 push {r4, lr} + 45 0004 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 46 0008 0446 mov r4, r0 + 47 000a 03F0FF02 and r2, r3, #255 + 48 000e 53B1 cbz r3, .L11 + 49 .L5: + 50 0010 0020 movs r0, #0 + 51 0012 0123 movs r3, #1 + 52 0014 6062 str r0, [r4, #36] + 53 0016 84F82130 strb r3, [r4, #33] + 54 001a C4E90100 strd r0, r0, [r4, #4] + 55 001e C4E90300 strd r0, r0, [r4, #12] + 56 0022 6061 str r0, [r4, #20] + 57 0024 10BD pop {r4, pc} + 58 .L11: + 59 0026 80F82020 strb r2, [r0, #32] + 60 002a FFF7FEFF bl HAL_CORDIC_MspInit + ARM GAS /tmp/ccAgrgpa.s page 2 + + + 61 002e EFE7 b .L5 + 62 .L6: + 63 0030 0120 movs r0, #1 + 64 0032 7047 bx lr + 66 .section .text.HAL_CORDIC_MspDeInit,"ax",%progbits + 67 .align 1 + 68 .p2align 2,,3 + 69 .weak HAL_CORDIC_MspDeInit + 70 .syntax unified + 71 .thumb + 72 .thumb_func + 73 .fpu fpv4-sp-d16 + 75 HAL_CORDIC_MspDeInit: + 76 @ args = 0, pretend = 0, frame = 0 + 77 @ frame_needed = 0, uses_anonymous_args = 0 + 78 @ link register save eliminated. + 79 0000 7047 bx lr + 81 0002 00BF .section .text.HAL_CORDIC_DeInit,"ax",%progbits + 82 .align 1 + 83 .p2align 2,,3 + 84 .global HAL_CORDIC_DeInit + 85 .syntax unified + 86 .thumb + 87 .thumb_func + 88 .fpu fpv4-sp-d16 + 90 HAL_CORDIC_DeInit: + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 0000 90B1 cbz r0, .L15 + 94 0002 10B5 push {r4, lr} + 95 0004 0223 movs r3, #2 + 96 0006 0446 mov r4, r0 + 97 0008 80F82130 strb r3, [r0, #33] + 98 000c FFF7FEFF bl HAL_CORDIC_MspDeInit + 99 0010 0020 movs r0, #0 + 100 0012 6062 str r0, [r4, #36] + 101 0014 84F82000 strb r0, [r4, #32] + 102 0018 84F82100 strb r0, [r4, #33] + 103 001c C4E90100 strd r0, r0, [r4, #4] + 104 0020 C4E90300 strd r0, r0, [r4, #12] + 105 0024 6061 str r0, [r4, #20] + 106 0026 10BD pop {r4, pc} + 107 .L15: + 108 0028 0120 movs r0, #1 + 109 002a 7047 bx lr + 111 .section .text.HAL_CORDIC_Configure,"ax",%progbits + 112 .align 1 + 113 .p2align 2,,3 + 114 .global HAL_CORDIC_Configure + 115 .syntax unified + 116 .thumb + 117 .thumb_func + 118 .fpu fpv4-sp-d16 + 120 HAL_CORDIC_Configure: + 121 @ args = 0, pretend = 0, frame = 0 + 122 @ frame_needed = 0, uses_anonymous_args = 0 + 123 @ link register save eliminated. + ARM GAS /tmp/ccAgrgpa.s page 3 + + + 124 0000 90F82120 ldrb r2, [r0, #33] @ zero_extendqisi2 + 125 0004 012A cmp r2, #1 + 126 0006 0346 mov r3, r0 + 127 0008 05D0 beq .L27 + 128 000a 426A ldr r2, [r0, #36] + 129 000c 42F00202 orr r2, r2, #2 + 130 0010 0120 movs r0, #1 + 131 0012 5A62 str r2, [r3, #36] + 132 0014 7047 bx lr + 133 .L27: + 134 0016 8869 ldr r0, [r1, #24] + 135 0018 0A68 ldr r2, [r1] + 136 001a 10B4 push {r4} + 137 001c 4C68 ldr r4, [r1, #4] + 138 001e 0243 orrs r2, r2, r0 + 139 0020 1868 ldr r0, [r3] + 140 0022 42EA0403 orr r3, r2, r4 + 141 0026 D1E90442 ldrd r4, r2, [r1, #16] + 142 002a 2343 orrs r3, r3, r4 + 143 002c 1343 orrs r3, r3, r2 + 144 002e D1E90221 ldrd r2, r1, [r1, #8] + 145 0032 0468 ldr r4, [r0] + 146 0034 1343 orrs r3, r3, r2 + 147 0036 044A ldr r2, .L28 + 148 0038 0B43 orrs r3, r3, r1 + 149 003a 2240 ands r2, r2, r4 + 150 003c 1343 orrs r3, r3, r2 + 151 003e 0360 str r3, [r0] + 152 0040 5DF8044B ldr r4, [sp], #4 + 153 0044 0020 movs r0, #0 + 154 0046 7047 bx lr + 155 .L29: + 156 .align 2 + 157 .L28: + 158 0048 00F887FF .word -7866368 + 160 .section .text.HAL_CORDIC_Calculate,"ax",%progbits + 161 .align 1 + 162 .p2align 2,,3 + 163 .global HAL_CORDIC_Calculate + 164 .syntax unified + 165 .thumb + 166 .thumb_func + 167 .fpu fpv4-sp-d16 + 169 HAL_CORDIC_Calculate: + 170 @ args = 4, pretend = 0, frame = 0 + 171 @ frame_needed = 0, uses_anonymous_args = 0 + 172 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 173 0004 089F ldr r7, [sp, #32] + 174 0006 8246 mov r10, r0 + 175 0008 91B1 cbz r1, .L31 + 176 000a 1646 mov r6, r2 + 177 000c 82B1 cbz r2, .L31 + 178 000e 1D46 mov r5, r3 + 179 0010 73B1 cbz r3, .L31 + 180 0012 90F82120 ldrb r2, [r0, #33] @ zero_extendqisi2 + 181 0016 012A cmp r2, #1 + 182 0018 5FFA82F9 uxtb r9, r2 + ARM GAS /tmp/ccAgrgpa.s page 4 + + + 183 001c 13D0 beq .L65 + 184 001e 436A ldr r3, [r0, #36] + 185 0020 4FF00109 mov r9, #1 + 186 0024 43F00203 orr r3, r3, #2 + 187 0028 4362 str r3, [r0, #36] + 188 002a 4846 mov r0, r9 + 189 002c BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 190 .L31: + 191 0030 DAF82430 ldr r3, [r10, #36] + 192 0034 4FF00109 mov r9, #1 + 193 0038 43EA0903 orr r3, r3, r9 + 194 003c CAF82430 str r3, [r10, #36] + 195 .L33: + 196 0040 4846 mov r0, r9 + 197 0042 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 198 .L65: + 199 0046 0022 movs r2, #0 + 200 0048 4262 str r2, [r0, #36] + 201 004a 0222 movs r2, #2 + 202 004c 80F82120 strb r2, [r0, #33] + 203 0050 0C46 mov r4, r1 + 204 0052 FFF7FEFF bl HAL_GetTick + 205 0056 DAF80020 ldr r2, [r10] + 206 005a 8046 mov r8, r0 + 207 005c 2068 ldr r0, [r4] + 208 005e 5060 str r0, [r2, #4] + 209 0060 1068 ldr r0, [r2] + 210 0062 C102 lsls r1, r0, #11 + 211 0064 45BF ittet mi + 212 0066 6068 ldrmi r0, [r4, #4] + 213 0068 5060 strmi r0, [r2, #4] + 214 006a 0434 addpl r4, r4, #4 + 215 006c 0834 addmi r4, r4, #8 + 216 .L36: + 217 006e 013D subs r5, r5, #1 + 218 0070 2BD0 beq .L37 + 219 0072 2368 ldr r3, [r4] + 220 0074 5360 str r3, [r2, #4] + 221 0076 1368 ldr r3, [r2] + 222 0078 DB02 lsls r3, r3, #11 + 223 007a 45BF ittet mi + 224 007c 6368 ldrmi r3, [r4, #4] + 225 007e 5360 strmi r3, [r2, #4] + 226 0080 0434 addpl r4, r4, #4 + 227 0082 0834 addmi r4, r4, #8 + 228 0084 781C adds r0, r7, #1 + 229 0086 11D1 bne .L40 + 230 .L41: + 231 0088 1368 ldr r3, [r2] + 232 008a 002B cmp r3, #0 + 233 008c FCDA bge .L41 + 234 .L42: + 235 008e 9368 ldr r3, [r2, #8] + 236 0090 3360 str r3, [r6] + 237 0092 1368 ldr r3, [r2] + 238 0094 1903 lsls r1, r3, #12 + 239 0096 45BF ittet mi + ARM GAS /tmp/ccAgrgpa.s page 5 + + + 240 0098 9368 ldrmi r3, [r2, #8] + 241 009a 7360 strmi r3, [r6, #4] + 242 009c 0436 addpl r6, r6, #4 + 243 009e 0836 addmi r6, r6, #8 + 244 00a0 E5E7 b .L36 + 245 .L66: + 246 00a2 DAF80020 ldr r2, [r10] + 247 00a6 1368 ldr r3, [r2] + 248 00a8 002B cmp r3, #0 + 249 00aa F0DB blt .L42 + 250 .L40: + 251 00ac FFF7FEFF bl HAL_GetTick + 252 00b0 A0EB0803 sub r3, r0, r8 + 253 00b4 BB42 cmp r3, r7 + 254 00b6 F4D9 bls .L66 + 255 00b8 0422 movs r2, #4 + 256 00ba 0123 movs r3, #1 + 257 00bc CAF82420 str r2, [r10, #36] + 258 00c0 8AF82130 strb r3, [r10, #33] + 259 00c4 4846 mov r0, r9 + 260 00c6 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 261 .L37: + 262 00ca 9368 ldr r3, [r2, #8] + 263 00cc 3360 str r3, [r6] + 264 00ce 1368 ldr r3, [r2] + 265 00d0 1B03 lsls r3, r3, #12 + 266 00d2 44BF itt mi + 267 00d4 9368 ldrmi r3, [r2, #8] + 268 00d6 7360 strmi r3, [r6, #4] + 269 00d8 0123 movs r3, #1 + 270 00da 8AF82130 strb r3, [r10, #33] + 271 00de 4FF00009 mov r9, #0 + 272 00e2 ADE7 b .L33 + 274 .section .text.HAL_CORDIC_CalculateZO,"ax",%progbits + 275 .align 1 + 276 .p2align 2,,3 + 277 .global HAL_CORDIC_CalculateZO + 278 .syntax unified + 279 .thumb + 280 .thumb_func + 281 .fpu fpv4-sp-d16 + 283 HAL_CORDIC_CalculateZO: + 284 @ args = 4, pretend = 0, frame = 0 + 285 @ frame_needed = 0, uses_anonymous_args = 0 + 286 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} + 287 0004 0746 mov r7, r0 + 288 0006 91B1 cbz r1, .L68 + 289 0008 9246 mov r10, r2 + 290 000a 82B1 cbz r2, .L68 + 291 000c 1E46 mov r6, r3 + 292 000e 73B1 cbz r3, .L68 + 293 0010 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 294 0014 012B cmp r3, #1 + 295 0016 5FFA83F9 uxtb r9, r3 + 296 001a 11D0 beq .L104 + 297 001c 436A ldr r3, [r0, #36] + 298 001e 4FF00109 mov r9, #1 + ARM GAS /tmp/ccAgrgpa.s page 6 + + + 299 0022 43F00203 orr r3, r3, #2 + 300 0026 4362 str r3, [r0, #36] + 301 0028 4846 mov r0, r9 + 302 002a BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 303 .L68: + 304 002e 7B6A ldr r3, [r7, #36] + 305 0030 4FF00109 mov r9, #1 + 306 0034 43EA0903 orr r3, r3, r9 + 307 0038 7B62 str r3, [r7, #36] + 308 .L70: + 309 003a 4846 mov r0, r9 + 310 003c BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} + 311 .L104: + 312 0040 0023 movs r3, #0 + 313 0042 4362 str r3, [r0, #36] + 314 0044 0223 movs r3, #2 + 315 0046 0C46 mov r4, r1 + 316 0048 80F82130 strb r3, [r0, #33] + 317 004c FFF7FEFF bl HAL_GetTick + 318 0050 3D68 ldr r5, [r7] + 319 0052 2368 ldr r3, [r4] + 320 0054 6B60 str r3, [r5, #4] + 321 0056 2B68 ldr r3, [r5] + 322 0058 DA02 lsls r2, r3, #11 + 323 005a 45BF ittet mi + 324 005c 6368 ldrmi r3, [r4, #4] + 325 005e 6B60 strmi r3, [r5, #4] + 326 0060 0434 addpl r4, r4, #4 + 327 0062 0834 addmi r4, r4, #8 + 328 0064 013E subs r6, r6, #1 + 329 0066 8046 mov r8, r0 + 330 0068 1BD0 beq .L74 + 331 006a 089B ldr r3, [sp, #32] + 332 006c 0133 adds r3, r3, #1 + 333 006e 2AD1 bne .L75 + 334 .L80: + 335 0070 2368 ldr r3, [r4] + 336 0072 6B60 str r3, [r5, #4] + 337 0074 2B68 ldr r3, [r5] + 338 0076 DB02 lsls r3, r3, #11 + 339 0078 44BF itt mi + 340 007a 6368 ldrmi r3, [r4, #4] + 341 007c 6B60 strmi r3, [r5, #4] + 342 007e AB68 ldr r3, [r5, #8] + 343 0080 CAF80030 str r3, [r10] + 344 0084 2B68 ldr r3, [r5] + 345 0086 54BF ite pl + 346 0088 0434 addpl r4, r4, #4 + 347 008a 0834 addmi r4, r4, #8 + 348 008c 1803 lsls r0, r3, #12 + 349 008e 45BF ittet mi + 350 0090 AB68 ldrmi r3, [r5, #8] + 351 0092 CAF80430 strmi r3, [r10, #4] + 352 0096 0AF1040A addpl r10, r10, #4 + 353 009a 0AF1080A addmi r10, r10, #8 + 354 009e 013E subs r6, r6, #1 + 355 00a0 E6D1 bne .L80 + ARM GAS /tmp/ccAgrgpa.s page 7 + + + 356 .L74: + 357 00a2 AB68 ldr r3, [r5, #8] + 358 00a4 CAF80030 str r3, [r10] + 359 00a8 2B68 ldr r3, [r5] + 360 00aa 1B03 lsls r3, r3, #12 + 361 00ac 44BF itt mi + 362 00ae AB68 ldrmi r3, [r5, #8] + 363 00b0 CAF80430 strmi r3, [r10, #4] + 364 00b4 0123 movs r3, #1 + 365 00b6 87F82130 strb r3, [r7, #33] + 366 00ba 4FF00009 mov r9, #0 + 367 00be BCE7 b .L70 + 368 .L105: + 369 00c0 013E subs r6, r6, #1 + 370 00c2 3D68 ldr r5, [r7] + 371 00c4 EDD0 beq .L74 + 372 .L75: + 373 00c6 2368 ldr r3, [r4] + 374 00c8 6B60 str r3, [r5, #4] + 375 00ca 2B68 ldr r3, [r5] + 376 00cc D902 lsls r1, r3, #11 + 377 00ce 44BF itt mi + 378 00d0 6368 ldrmi r3, [r4, #4] + 379 00d2 6B60 strmi r3, [r5, #4] + 380 00d4 AB68 ldr r3, [r5, #8] + 381 00d6 CAF80030 str r3, [r10] + 382 00da 2B68 ldr r3, [r5] + 383 00dc 54BF ite pl + 384 00de 0434 addpl r4, r4, #4 + 385 00e0 0834 addmi r4, r4, #8 + 386 00e2 1A03 lsls r2, r3, #12 + 387 00e4 45BF ittet mi + 388 00e6 AB68 ldrmi r3, [r5, #8] + 389 00e8 CAF80430 strmi r3, [r10, #4] + 390 00ec 0AF1040A addpl r10, r10, #4 + 391 00f0 0AF1080A addmi r10, r10, #8 + 392 00f4 FFF7FEFF bl HAL_GetTick + 393 00f8 089A ldr r2, [sp, #32] + 394 00fa A0EB0803 sub r3, r0, r8 + 395 00fe 9342 cmp r3, r2 + 396 0100 DED9 bls .L105 + 397 0102 0422 movs r2, #4 + 398 0104 0123 movs r3, #1 + 399 0106 7A62 str r2, [r7, #36] + 400 0108 87F82130 strb r3, [r7, #33] + 401 010c 95E7 b .L70 + 403 010e 00BF .section .text.HAL_CORDIC_Calculate_IT,"ax",%progbits + 404 .align 1 + 405 .p2align 2,,3 + 406 .global HAL_CORDIC_Calculate_IT + 407 .syntax unified + 408 .thumb + 409 .thumb_func + 410 .fpu fpv4-sp-d16 + 412 HAL_CORDIC_Calculate_IT: + 413 @ args = 0, pretend = 0, frame = 0 + 414 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccAgrgpa.s page 8 + + + 415 @ link register save eliminated. + 416 0000 8446 mov ip, r0 + 417 0002 69B1 cbz r1, .L107 + 418 0004 62B1 cbz r2, .L107 + 419 0006 5BB1 cbz r3, .L107 + 420 0008 90F82100 ldrb r0, [r0, #33] @ zero_extendqisi2 + 421 000c 0128 cmp r0, #1 + 422 000e 0ED0 beq .L124 + 423 0010 DCF82430 ldr r3, [ip, #36] + 424 0014 43F00203 orr r3, r3, #2 + 425 0018 0120 movs r0, #1 + 426 001a CCF82430 str r3, [ip, #36] + 427 001e 7047 bx lr + 428 .L107: + 429 0020 DCF82430 ldr r3, [ip, #36] + 430 0024 0120 movs r0, #1 + 431 0026 0343 orrs r3, r3, r0 + 432 0028 CCF82430 str r3, [ip, #36] + 433 002c 7047 bx lr + 434 .L124: + 435 002e 0020 movs r0, #0 + 436 0030 10B4 push {r4} + 437 0032 CCF82400 str r0, [ip, #36] + 438 0036 DCF80040 ldr r4, [ip] + 439 003a 0220 movs r0, #2 + 440 003c 8CF82100 strb r0, [ip, #33] + 441 0040 2068 ldr r0, [r4] + 442 0042 CCF81030 str r3, [ip, #16] + 443 0046 013B subs r3, r3, #1 + 444 0048 CCF80C30 str r3, [ip, #12] + 445 004c 2368 ldr r3, [r4] + 446 004e CCF80820 str r2, [ip, #8] + 447 0052 C002 lsls r0, r0, #11 + 448 0054 4CBF ite mi + 449 0056 01F10800 addmi r0, r1, #8 + 450 005a 081D addpl r0, r1, #4 + 451 005c 43F48033 orr r3, r3, #65536 + 452 0060 CCF80400 str r0, [ip, #4] + 453 0064 2360 str r3, [r4] + 454 0066 0B68 ldr r3, [r1] + 455 0068 6360 str r3, [r4, #4] + 456 006a 2068 ldr r0, [r4] + 457 006c 10F48010 ands r0, r0, #1048576 + 458 0070 02D0 beq .L109 + 459 0072 4B68 ldr r3, [r1, #4] + 460 0074 6360 str r3, [r4, #4] + 461 0076 0020 movs r0, #0 + 462 .L109: + 463 0078 5DF8044B ldr r4, [sp], #4 + 464 007c 7047 bx lr + 466 007e 00BF .section .text.HAL_CORDIC_Calculate_DMA,"ax",%progbits + 467 .align 1 + 468 .p2align 2,,3 + 469 .global HAL_CORDIC_Calculate_DMA + 470 .syntax unified + 471 .thumb + 472 .thumb_func + ARM GAS /tmp/ccAgrgpa.s page 9 + + + 473 .fpu fpv4-sp-d16 + 475 HAL_CORDIC_Calculate_DMA: + 476 @ args = 4, pretend = 0, frame = 0 + 477 @ frame_needed = 0, uses_anonymous_args = 0 + 478 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 479 0004 069F ldr r7, [sp, #24] + 480 0006 0446 mov r4, r0 + 481 0008 002B cmp r3, #0 + 482 000a 5FD0 beq .L159 + 483 000c 1D46 mov r5, r3 + 484 000e BB1E subs r3, r7, #2 + 485 0010 012B cmp r3, #1 + 486 0012 0E46 mov r6, r1 + 487 0014 2BD9 bls .L161 + 488 0016 012F cmp r7, #1 + 489 0018 5ED1 bne .L162 + 490 .L130: + 491 001a 002E cmp r6, #0 + 492 001c 56D0 beq .L159 + 493 001e 94F82110 ldrb r1, [r4, #33] @ zero_extendqisi2 + 494 0022 0129 cmp r1, #1 + 495 0024 4BD1 bne .L134 + 496 0026 0021 movs r1, #0 + 497 0028 6162 str r1, [r4, #36] + 498 002a 012B cmp r3, #1 + 499 002c 4FF00201 mov r1, #2 + 500 0030 6761 str r7, [r4, #20] + 501 0032 84F82110 strb r1, [r4, #33] + 502 0036 27D9 bls .L143 + 503 0038 012F cmp r7, #1 + 504 003a 57D1 bne .L139 + 505 003c 2268 ldr r2, [r4] + 506 003e DFF8C480 ldr r8, .L163+4 + 507 .L138: + 508 0042 1368 ldr r3, [r2] + 509 0044 A069 ldr r0, [r4, #24] + 510 0046 2E49 ldr r1, .L163 + 511 0048 C162 str r1, [r0, #44] + 512 004a DB02 lsls r3, r3, #11 + 513 004c 48BF it mi + 514 004e 6D00 lslmi r5, r5, #1 + 515 0050 C0F83480 str r8, [r0, #52] + 516 0054 2B46 mov r3, r5 + 517 0056 0432 adds r2, r2, #4 + 518 0058 3146 mov r1, r6 + 519 005a FFF7FEFF bl HAL_DMA_Start_IT + 520 005e 0028 cmp r0, #0 + 521 0060 46D1 bne .L160 + 522 0062 2268 ldr r2, [r4] + 523 0064 1368 ldr r3, [r2] + 524 0066 43F48023 orr r3, r3, #262144 + 525 006a 1360 str r3, [r2] + 526 006c 2CE0 b .L155 + 527 .L161: + 528 006e 6AB3 cbz r2, .L159 + 529 0070 032F cmp r7, #3 + 530 0072 D2D0 beq .L130 + ARM GAS /tmp/ccAgrgpa.s page 10 + + + 531 0074 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 532 0078 012B cmp r3, #1 + 533 007a 20D1 bne .L134 + 534 007c 0223 movs r3, #2 + 535 007e 0021 movs r1, #0 + 536 0080 6162 str r1, [r4, #36] + 537 0082 6361 str r3, [r4, #20] + 538 0084 84F82130 strb r3, [r4, #33] + 539 .L143: + 540 0088 2168 ldr r1, [r4] + 541 008a E069 ldr r0, [r4, #28] + 542 008c 0B68 ldr r3, [r1] + 543 008e DFF878C0 ldr ip, .L163+8 + 544 0092 DFF87080 ldr r8, .L163+4 + 545 0096 C0F82CC0 str ip, [r0, #44] + 546 009a 1B03 lsls r3, r3, #12 + 547 009c 4CBF ite mi + 548 009e 6B00 lslmi r3, r5, #1 + 549 00a0 2B46 movpl r3, r5 + 550 00a2 C0F83480 str r8, [r0, #52] + 551 00a6 0831 adds r1, r1, #8 + 552 00a8 FFF7FEFF bl HAL_DMA_Start_IT + 553 00ac 00BB cbnz r0, .L160 + 554 00ae 2268 ldr r2, [r4] + 555 00b0 1368 ldr r3, [r2] + 556 00b2 032F cmp r7, #3 + 557 00b4 43F40033 orr r3, r3, #131072 + 558 00b8 1360 str r3, [r2] + 559 00ba C2D0 beq .L138 + 560 00bc 16E0 b .L139 + 561 .L134: + 562 00be 636A ldr r3, [r4, #36] + 563 00c0 43F00203 orr r3, r3, #2 + 564 00c4 0120 movs r0, #1 + 565 00c6 6362 str r3, [r4, #36] + 566 .L155: + 567 00c8 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 568 .L159: + 569 00cc 636A ldr r3, [r4, #36] + 570 00ce 0120 movs r0, #1 + 571 00d0 0343 orrs r3, r3, r0 + 572 00d2 6362 str r3, [r4, #36] + 573 00d4 BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 574 .L162: + 575 00d8 90F82130 ldrb r3, [r0, #33] @ zero_extendqisi2 + 576 00dc 012B cmp r3, #1 + 577 00de EED1 bne .L134 + 578 00e0 0022 movs r2, #0 + 579 00e2 0223 movs r3, #2 + 580 00e4 6262 str r2, [r4, #36] + 581 00e6 6761 str r7, [r4, #20] + 582 00e8 84F82130 strb r3, [r4, #33] + 583 .L139: + 584 00ec 0020 movs r0, #0 + 585 00ee EBE7 b .L155 + 586 .L160: + 587 00f0 636A ldr r3, [r4, #36] + ARM GAS /tmp/ccAgrgpa.s page 11 + + + 588 00f2 43F00803 orr r3, r3, #8 + 589 00f6 0120 movs r0, #1 + 590 00f8 6362 str r3, [r4, #36] + 591 00fa BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 592 .L164: + 593 00fe 00BF .align 2 + 594 .L163: + 595 0100 00000000 .word CORDIC_DMAInCplt + 596 0104 00000000 .word CORDIC_DMAError + 597 0108 00000000 .word CORDIC_DMAOutCplt + 599 .section .text.HAL_CORDIC_ErrorCallback,"ax",%progbits + 600 .align 1 + 601 .p2align 2,,3 + 602 .weak HAL_CORDIC_ErrorCallback + 603 .syntax unified + 604 .thumb + 605 .thumb_func + 606 .fpu fpv4-sp-d16 + 608 HAL_CORDIC_ErrorCallback: + 609 @ args = 0, pretend = 0, frame = 0 + 610 @ frame_needed = 0, uses_anonymous_args = 0 + 611 @ link register save eliminated. + 612 0000 7047 bx lr + 614 0002 00BF .section .text.CORDIC_DMAError,"ax",%progbits + 615 .align 1 + 616 .p2align 2,,3 + 617 .syntax unified + 618 .thumb + 619 .thumb_func + 620 .fpu fpv4-sp-d16 + 622 CORDIC_DMAError: + 623 @ args = 0, pretend = 0, frame = 0 + 624 @ frame_needed = 0, uses_anonymous_args = 0 + 625 0000 806A ldr r0, [r0, #40] + 626 0002 08B5 push {r3, lr} + 627 0004 0123 movs r3, #1 + 628 0006 80F82130 strb r3, [r0, #33] + 629 000a 436A ldr r3, [r0, #36] + 630 000c 43F00803 orr r3, r3, #8 + 631 0010 4362 str r3, [r0, #36] + 632 0012 FFF7FEFF bl HAL_CORDIC_ErrorCallback + 633 0016 08BD pop {r3, pc} + 635 .section .text.HAL_CORDIC_CalculateCpltCallback,"ax",%progbits + 636 .align 1 + 637 .p2align 2,,3 + 638 .weak HAL_CORDIC_CalculateCpltCallback + 639 .syntax unified + 640 .thumb + 641 .thumb_func + 642 .fpu fpv4-sp-d16 + 644 HAL_CORDIC_CalculateCpltCallback: + 645 @ args = 0, pretend = 0, frame = 0 + 646 @ frame_needed = 0, uses_anonymous_args = 0 + 647 @ link register save eliminated. + 648 0000 7047 bx lr + 650 0002 00BF .section .text.CORDIC_DMAInCplt,"ax",%progbits + 651 .align 1 + ARM GAS /tmp/ccAgrgpa.s page 12 + + + 652 .p2align 2,,3 + 653 .syntax unified + 654 .thumb + 655 .thumb_func + 656 .fpu fpv4-sp-d16 + 658 CORDIC_DMAInCplt: + 659 @ args = 0, pretend = 0, frame = 0 + 660 @ frame_needed = 0, uses_anonymous_args = 0 + 661 0000 806A ldr r0, [r0, #40] + 662 0002 0268 ldr r2, [r0] + 663 0004 4169 ldr r1, [r0, #20] + 664 0006 08B5 push {r3, lr} + 665 0008 1368 ldr r3, [r2] + 666 000a 0129 cmp r1, #1 + 667 000c 23F48023 bic r3, r3, #262144 + 668 0010 1360 str r3, [r2] + 669 0012 00D0 beq .L172 + 670 0014 08BD pop {r3, pc} + 671 .L172: + 672 0016 0023 movs r3, #0 + 673 0018 4361 str r3, [r0, #20] + 674 001a 80F82110 strb r1, [r0, #33] + 675 001e FFF7FEFF bl HAL_CORDIC_CalculateCpltCallback + 676 0022 08BD pop {r3, pc} + 678 .section .text.CORDIC_DMAOutCplt,"ax",%progbits + 679 .align 1 + 680 .p2align 2,,3 + 681 .syntax unified + 682 .thumb + 683 .thumb_func + 684 .fpu fpv4-sp-d16 + 686 CORDIC_DMAOutCplt: + 687 @ args = 0, pretend = 0, frame = 0 + 688 @ frame_needed = 0, uses_anonymous_args = 0 + 689 0000 806A ldr r0, [r0, #40] + 690 0002 0268 ldr r2, [r0] + 691 0004 10B5 push {r4, lr} + 692 0006 1368 ldr r3, [r2] + 693 0008 0024 movs r4, #0 + 694 000a 0121 movs r1, #1 + 695 000c 23F40033 bic r3, r3, #131072 + 696 0010 1360 str r3, [r2] + 697 0012 4461 str r4, [r0, #20] + 698 0014 80F82110 strb r1, [r0, #33] + 699 0018 FFF7FEFF bl HAL_CORDIC_CalculateCpltCallback + 700 001c 10BD pop {r4, pc} + 702 001e 00BF .section .text.HAL_CORDIC_IRQHandler,"ax",%progbits + 703 .align 1 + 704 .p2align 2,,3 + 705 .global HAL_CORDIC_IRQHandler + 706 .syntax unified + 707 .thumb + 708 .thumb_func + 709 .fpu fpv4-sp-d16 + 711 HAL_CORDIC_IRQHandler: + 712 @ args = 0, pretend = 0, frame = 0 + 713 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccAgrgpa.s page 13 + + + 714 0000 0268 ldr r2, [r0] + 715 0002 38B5 push {r3, r4, r5, lr} + 716 0004 1368 ldr r3, [r2] + 717 0006 DC03 lsls r4, r3, #15 + 718 0008 02D5 bpl .L175 + 719 000a 1368 ldr r3, [r2] + 720 000c 002B cmp r3, #0 + 721 000e 00DB blt .L190 + 722 .L175: + 723 0010 38BD pop {r3, r4, r5, pc} + 724 .L190: + 725 0012 8468 ldr r4, [r0, #8] + 726 0014 0169 ldr r1, [r0, #16] + 727 0016 9568 ldr r5, [r2, #8] + 728 0018 2346 mov r3, r4 + 729 001a 0139 subs r1, r1, #1 + 730 001c 0161 str r1, [r0, #16] + 731 001e 43F8045B str r5, [r3], #4 + 732 0022 1168 ldr r1, [r2] + 733 0024 8360 str r3, [r0, #8] + 734 0026 0903 lsls r1, r1, #12 + 735 0028 04D5 bpl .L179 + 736 002a 9168 ldr r1, [r2, #8] + 737 002c 6160 str r1, [r4, #4] + 738 002e 04F10803 add r3, r4, #8 + 739 0032 8360 str r3, [r0, #8] + 740 .L179: + 741 0034 C368 ldr r3, [r0, #12] + 742 0036 73B1 cbz r3, .L181 + 743 0038 4168 ldr r1, [r0, #4] + 744 003a 013B subs r3, r3, #1 + 745 003c 0C46 mov r4, r1 + 746 003e C360 str r3, [r0, #12] + 747 0040 54F8043B ldr r3, [r4], #4 + 748 0044 5360 str r3, [r2, #4] + 749 0046 1368 ldr r3, [r2] + 750 0048 4460 str r4, [r0, #4] + 751 004a DB02 lsls r3, r3, #11 + 752 004c 03D5 bpl .L181 + 753 004e 4B68 ldr r3, [r1, #4] + 754 0050 5360 str r3, [r2, #4] + 755 0052 0831 adds r1, r1, #8 + 756 0054 4160 str r1, [r0, #4] + 757 .L181: + 758 0056 0369 ldr r3, [r0, #16] + 759 0058 002B cmp r3, #0 + 760 005a D9D1 bne .L175 + 761 005c 1368 ldr r3, [r2] + 762 005e 0121 movs r1, #1 + 763 0060 23F48033 bic r3, r3, #65536 + 764 0064 1360 str r3, [r2] + 765 0066 80F82110 strb r1, [r0, #33] + 766 006a FFF7FEFF bl HAL_CORDIC_CalculateCpltCallback + 767 006e 38BD pop {r3, r4, r5, pc} + 769 .section .text.HAL_CORDIC_GetState,"ax",%progbits + 770 .align 1 + 771 .p2align 2,,3 + ARM GAS /tmp/ccAgrgpa.s page 14 + + + 772 .global HAL_CORDIC_GetState + 773 .syntax unified + 774 .thumb + 775 .thumb_func + 776 .fpu fpv4-sp-d16 + 778 HAL_CORDIC_GetState: + 779 @ args = 0, pretend = 0, frame = 0 + 780 @ frame_needed = 0, uses_anonymous_args = 0 + 781 @ link register save eliminated. + 782 0000 90F82100 ldrb r0, [r0, #33] @ zero_extendqisi2 + 783 0004 7047 bx lr + 785 0006 00BF .section .text.HAL_CORDIC_GetError,"ax",%progbits + 786 .align 1 + 787 .p2align 2,,3 + 788 .global HAL_CORDIC_GetError + 789 .syntax unified + 790 .thumb + 791 .thumb_func + 792 .fpu fpv4-sp-d16 + 794 HAL_CORDIC_GetError: + 795 @ args = 0, pretend = 0, frame = 0 + 796 @ frame_needed = 0, uses_anonymous_args = 0 + 797 @ link register save eliminated. + 798 0000 406A ldr r0, [r0, #36] + 799 0002 7047 bx lr + 801 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccAgrgpa.s page 15 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_cordic.c + /tmp/ccAgrgpa.s:16 .text.HAL_CORDIC_MspInit:0000000000000000 $t + /tmp/ccAgrgpa.s:25 .text.HAL_CORDIC_MspInit:0000000000000000 HAL_CORDIC_MspInit + /tmp/ccAgrgpa.s:32 .text.HAL_CORDIC_Init:0000000000000000 $t + /tmp/ccAgrgpa.s:40 .text.HAL_CORDIC_Init:0000000000000000 HAL_CORDIC_Init + /tmp/ccAgrgpa.s:67 .text.HAL_CORDIC_MspDeInit:0000000000000000 $t + /tmp/ccAgrgpa.s:75 .text.HAL_CORDIC_MspDeInit:0000000000000000 HAL_CORDIC_MspDeInit + /tmp/ccAgrgpa.s:82 .text.HAL_CORDIC_DeInit:0000000000000000 $t + /tmp/ccAgrgpa.s:90 .text.HAL_CORDIC_DeInit:0000000000000000 HAL_CORDIC_DeInit + /tmp/ccAgrgpa.s:112 .text.HAL_CORDIC_Configure:0000000000000000 $t + /tmp/ccAgrgpa.s:120 .text.HAL_CORDIC_Configure:0000000000000000 HAL_CORDIC_Configure + /tmp/ccAgrgpa.s:158 .text.HAL_CORDIC_Configure:0000000000000048 $d + /tmp/ccAgrgpa.s:161 .text.HAL_CORDIC_Calculate:0000000000000000 $t + /tmp/ccAgrgpa.s:169 .text.HAL_CORDIC_Calculate:0000000000000000 HAL_CORDIC_Calculate + /tmp/ccAgrgpa.s:275 .text.HAL_CORDIC_CalculateZO:0000000000000000 $t + /tmp/ccAgrgpa.s:283 .text.HAL_CORDIC_CalculateZO:0000000000000000 HAL_CORDIC_CalculateZO + /tmp/ccAgrgpa.s:404 .text.HAL_CORDIC_Calculate_IT:0000000000000000 $t + /tmp/ccAgrgpa.s:412 .text.HAL_CORDIC_Calculate_IT:0000000000000000 HAL_CORDIC_Calculate_IT + /tmp/ccAgrgpa.s:467 .text.HAL_CORDIC_Calculate_DMA:0000000000000000 $t + /tmp/ccAgrgpa.s:475 .text.HAL_CORDIC_Calculate_DMA:0000000000000000 HAL_CORDIC_Calculate_DMA + /tmp/ccAgrgpa.s:595 .text.HAL_CORDIC_Calculate_DMA:0000000000000100 $d + /tmp/ccAgrgpa.s:658 .text.CORDIC_DMAInCplt:0000000000000000 CORDIC_DMAInCplt + /tmp/ccAgrgpa.s:622 .text.CORDIC_DMAError:0000000000000000 CORDIC_DMAError + /tmp/ccAgrgpa.s:686 .text.CORDIC_DMAOutCplt:0000000000000000 CORDIC_DMAOutCplt + /tmp/ccAgrgpa.s:600 .text.HAL_CORDIC_ErrorCallback:0000000000000000 $t + /tmp/ccAgrgpa.s:608 .text.HAL_CORDIC_ErrorCallback:0000000000000000 HAL_CORDIC_ErrorCallback + /tmp/ccAgrgpa.s:615 .text.CORDIC_DMAError:0000000000000000 $t + /tmp/ccAgrgpa.s:636 .text.HAL_CORDIC_CalculateCpltCallback:0000000000000000 $t + /tmp/ccAgrgpa.s:644 .text.HAL_CORDIC_CalculateCpltCallback:0000000000000000 HAL_CORDIC_CalculateCpltCallback + /tmp/ccAgrgpa.s:651 .text.CORDIC_DMAInCplt:0000000000000000 $t + /tmp/ccAgrgpa.s:679 .text.CORDIC_DMAOutCplt:0000000000000000 $t + /tmp/ccAgrgpa.s:703 .text.HAL_CORDIC_IRQHandler:0000000000000000 $t + /tmp/ccAgrgpa.s:711 .text.HAL_CORDIC_IRQHandler:0000000000000000 HAL_CORDIC_IRQHandler + /tmp/ccAgrgpa.s:770 .text.HAL_CORDIC_GetState:0000000000000000 $t + /tmp/ccAgrgpa.s:778 .text.HAL_CORDIC_GetState:0000000000000000 HAL_CORDIC_GetState + /tmp/ccAgrgpa.s:786 .text.HAL_CORDIC_GetError:0000000000000000 $t + /tmp/ccAgrgpa.s:794 .text.HAL_CORDIC_GetError:0000000000000000 HAL_CORDIC_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_DMA_Start_IT diff --git a/codice/build/stm32g4xx_hal_cordic.o b/codice/build/stm32g4xx_hal_cordic.o new file mode 100644 index 0000000000000000000000000000000000000000..89e6c8d9315eb3f4e9e1f7f1d5cf53b686903626 GIT binary patch literal 4956 zcma)AU2GKB6+U-njK^yOi?_H2+jQ);8k>b>{Zm39Q0%eCcCqCGZYz-%iUE5cUMISh20COyrOLW>pz?STw%)W0Qp@ z8mm&*1W}C)Y70-+u06=N1`ONBRpN&zn^tJ)jR-9`cBMw6(Lcz8lF}6Yn<2OUzR;fu zp(J(7-R!t8>($SOJo++PqbQMezHwL1ql53?4{qpPi0u*kGdJ|PkaSo+{MQwVMd;cx zMSklOS-jJ`abId-Ud*rj9M{VngX!BK_8Gp+OUURNRK2@GbF9P}zKk>6XU;Ide8JDI ze7dX544*gWjPrZmnlpISh~TX$?9FlAt51e}`U7JQljh7$q_l>t{5tE}pEJ>Ap$}&` z8Tz&UVIBfLeJn$Bt;e~MMGCmqC6{YmcCizG%W)2k-b9)Anl=94uCNow^}pk~QO^5i zqwd`jmDWoBC9T$t-oF^Dbtys-UtNLBRV|*5q@Sam2G+JC`w;h$_LwP4D9sL#&J}*r@;LbGQN{*(Lc)HO?mXU;{KucBg?{IW*Qdr-6@|Yb#@rF2W=X%JUWiV>j@or zH1Qkp(4Vq&CYevk30{gDrHFxM{ZYIc6Z&1Y?oo8YT&rjV&%;ln6SPvMZ07h!4q60nBw~y@0LmvTi|SBCXN z>yes}Z!<5QeAQs85o7ljOia*w;__{e&f2}kj36s7U`2+J?>2d<2|;%w16o#}$y^npH? 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zcuT0b$zU}eFN?Z8-k2>OeL?Yf>nPjfJ;VY@p^Y~l&x0g8@4HwK^giW{^LC=mo_8Gc zwjoKuhvvicb|R15d7bJA@EB+=$lr4CrjTU+!r?xrk!R2QBIc$2Qt+WKF5;0s>4SCKz literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_hal_cortex.d b/codice/build/stm32g4xx_hal_cortex.d new file mode 100644 index 0000000..e9d5f6d --- /dev/null +++ b/codice/build/stm32g4xx_hal_cortex.d @@ -0,0 +1,84 @@ +build/stm32g4xx_hal_cortex.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_cortex.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_cortex.lst b/codice/build/stm32g4xx_hal_cortex.lst new file mode 100644 index 0000000..005db5b --- /dev/null +++ b/codice/build/stm32g4xx_hal_cortex.lst @@ -0,0 +1,667 @@ +ARM GAS /tmp/ccbLRFQ0.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_cortex.c" + 14 .text + 15 .section .text.HAL_NVIC_SetPriorityGrouping,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_NVIC_SetPriorityGrouping + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_NVIC_SetPriorityGrouping: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 0749 ldr r1, .L3 + 30 0002 CA68 ldr r2, [r1, #12] + 31 0004 0302 lsls r3, r0, #8 + 32 0006 4FF6FF00 movw r0, #63743 + 33 000a 03F4E063 and r3, r3, #1792 + 34 000e 0240 ands r2, r2, r0 + 35 0010 1343 orrs r3, r3, r2 + 36 0012 43F0BF63 orr r3, r3, #100139008 + 37 0016 43F40033 orr r3, r3, #131072 + 38 001a CB60 str r3, [r1, #12] + 39 001c 7047 bx lr + 40 .L4: + 41 001e 00BF .align 2 + 42 .L3: + 43 0020 00ED00E0 .word -536810240 + 45 .section .text.HAL_NVIC_SetPriority,"ax",%progbits + 46 .align 1 + 47 .p2align 2,,3 + 48 .global HAL_NVIC_SetPriority + 49 .syntax unified + 50 .thumb + 51 .thumb_func + 52 .fpu fpv4-sp-d16 + 54 HAL_NVIC_SetPriority: + 55 @ args = 0, pretend = 0, frame = 0 + 56 @ frame_needed = 0, uses_anonymous_args = 0 + 57 0000 1C4B ldr r3, .L11 + 58 0002 DB68 ldr r3, [r3, #12] + 59 0004 C3F30223 ubfx r3, r3, #8, #3 + 60 0008 00B5 push {lr} + ARM GAS /tmp/ccbLRFQ0.s page 2 + + + 61 000a C3F1070E rsb lr, r3, #7 + 62 000e BEF1040F cmp lr, #4 + 63 0012 03F1040C add ip, r3, #4 + 64 0016 28BF it cs + 65 0018 4FF0040E movcs lr, #4 + 66 001c BCF1060F cmp ip, #6 + 67 0020 1BD9 bls .L9 + 68 0022 033B subs r3, r3, #3 + 69 0024 4FF0FF3C mov ip, #-1 + 70 0028 0CFA03FC lsl ip, ip, r3 + 71 002c 22EA0C02 bic r2, r2, ip + 72 .L6: + 73 0030 4FF0FF3C mov ip, #-1 + 74 0034 0CFA0EFC lsl ip, ip, lr + 75 0038 21EA0C01 bic r1, r1, ip + 76 003c 9940 lsls r1, r1, r3 + 77 003e 0028 cmp r0, #0 + 78 0040 41EA0201 orr r1, r1, r2 + 79 0044 0CDB blt .L7 + 80 0046 00F16040 add r0, r0, #-536870912 + 81 004a 0901 lsls r1, r1, #4 + 82 004c 00F56140 add r0, r0, #57600 + 83 0050 C9B2 uxtb r1, r1 + 84 0052 80F80013 strb r1, [r0, #768] + 85 0056 5DF804FB ldr pc, [sp], #4 + 86 .L9: + 87 005a 0022 movs r2, #0 + 88 005c 1346 mov r3, r2 + 89 005e E7E7 b .L6 + 90 .L7: + 91 0060 054B ldr r3, .L11+4 + 92 0062 00F00F00 and r0, r0, #15 + 93 0066 0901 lsls r1, r1, #4 + 94 0068 0344 add r3, r3, r0 + 95 006a C9B2 uxtb r1, r1 + 96 006c 1976 strb r1, [r3, #24] + 97 006e 5DF804FB ldr pc, [sp], #4 + 98 .L12: + 99 0072 00BF .align 2 + 100 .L11: + 101 0074 00ED00E0 .word -536810240 + 102 0078 FCEC00E0 .word -536810244 + 104 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits + 105 .align 1 + 106 .p2align 2,,3 + 107 .global HAL_NVIC_EnableIRQ + 108 .syntax unified + 109 .thumb + 110 .thumb_func + 111 .fpu fpv4-sp-d16 + 113 HAL_NVIC_EnableIRQ: + 114 @ args = 0, pretend = 0, frame = 0 + 115 @ frame_needed = 0, uses_anonymous_args = 0 + 116 @ link register save eliminated. + 117 0000 0028 cmp r0, #0 + 118 0002 08DB blt .L13 + 119 0004 044A ldr r2, .L15 + ARM GAS /tmp/ccbLRFQ0.s page 3 + + + 120 0006 4109 lsrs r1, r0, #5 + 121 0008 0123 movs r3, #1 + 122 000a 00F01F00 and r0, r0, #31 + 123 000e 03FA00F0 lsl r0, r3, r0 + 124 0012 42F82100 str r0, [r2, r1, lsl #2] + 125 .L13: + 126 0016 7047 bx lr + 127 .L16: + 128 .align 2 + 129 .L15: + 130 0018 00E100E0 .word -536813312 + 132 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits + 133 .align 1 + 134 .p2align 2,,3 + 135 .global HAL_NVIC_DisableIRQ + 136 .syntax unified + 137 .thumb + 138 .thumb_func + 139 .fpu fpv4-sp-d16 + 141 HAL_NVIC_DisableIRQ: + 142 @ args = 0, pretend = 0, frame = 0 + 143 @ frame_needed = 0, uses_anonymous_args = 0 + 144 @ link register save eliminated. + 145 0000 0028 cmp r0, #0 + 146 0002 0DDB blt .L17 + 147 0004 4309 lsrs r3, r0, #5 + 148 0006 0749 ldr r1, .L19 + 149 0008 0122 movs r2, #1 + 150 000a 2033 adds r3, r3, #32 + 151 000c 00F01F00 and r0, r0, #31 + 152 0010 02FA00F0 lsl r0, r2, r0 + 153 0014 41F82300 str r0, [r1, r3, lsl #2] + 154 .syntax unified + 155 @ 946 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 156 0018 BFF34F8F dsb 0xF + 157 @ 0 "" 2 + 158 @ 935 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 159 001c BFF36F8F isb 0xF + 160 @ 0 "" 2 + 161 .thumb + 162 .syntax unified + 163 .L17: + 164 0020 7047 bx lr + 165 .L20: + 166 0022 00BF .align 2 + 167 .L19: + 168 0024 00E100E0 .word -536813312 + 170 .section .text.HAL_NVIC_SystemReset,"ax",%progbits + 171 .align 1 + 172 .p2align 2,,3 + 173 .global HAL_NVIC_SystemReset + 174 .syntax unified + 175 .thumb + 176 .thumb_func + 177 .fpu fpv4-sp-d16 + 179 HAL_NVIC_SystemReset: + 180 @ Volatile: function does not return. + ARM GAS /tmp/ccbLRFQ0.s page 4 + + + 181 @ args = 0, pretend = 0, frame = 0 + 182 @ frame_needed = 0, uses_anonymous_args = 0 + 183 @ link register save eliminated. + 184 .syntax unified + 185 @ 946 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 186 0000 BFF34F8F dsb 0xF + 187 @ 0 "" 2 + 188 .thumb + 189 .syntax unified + 190 0004 0549 ldr r1, .L23 + 191 0006 064B ldr r3, .L23+4 + 192 0008 CA68 ldr r2, [r1, #12] + 193 000a 02F4E062 and r2, r2, #1792 + 194 000e 1343 orrs r3, r3, r2 + 195 0010 CB60 str r3, [r1, #12] + 196 .syntax unified + 197 @ 946 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 198 0012 BFF34F8F dsb 0xF + 199 @ 0 "" 2 + 200 .thumb + 201 .syntax unified + 202 .L22: + 203 .syntax unified + 204 @ 1944 "Drivers/CMSIS/Include/core_cm4.h" 1 + 205 0016 00BF nop + 206 @ 0 "" 2 + 207 .thumb + 208 .syntax unified + 209 0018 FDE7 b .L22 + 210 .L24: + 211 001a 00BF .align 2 + 212 .L23: + 213 001c 00ED00E0 .word -536810240 + 214 0020 0400FA05 .word 100270084 + 216 .section .text.HAL_SYSTICK_Config,"ax",%progbits + 217 .align 1 + 218 .p2align 2,,3 + 219 .global HAL_SYSTICK_Config + 220 .syntax unified + 221 .thumb + 222 .thumb_func + 223 .fpu fpv4-sp-d16 + 225 HAL_SYSTICK_Config: + 226 @ args = 0, pretend = 0, frame = 0 + 227 @ frame_needed = 0, uses_anonymous_args = 0 + 228 @ link register save eliminated. + 229 0000 0138 subs r0, r0, #1 + 230 0002 B0F1807F cmp r0, #16777216 + 231 0006 10D2 bcs .L27 + 232 0008 10B4 push {r4} + 233 000a 4FF0E023 mov r3, #-536813568 + 234 000e 084C ldr r4, .L32 + 235 0010 5861 str r0, [r3, #20] + 236 0012 4FF0F00C mov ip, #240 + 237 0016 84F823C0 strb ip, [r4, #35] + 238 001a 0022 movs r2, #0 + 239 001c 0721 movs r1, #7 + ARM GAS /tmp/ccbLRFQ0.s page 5 + + + 240 001e 1046 mov r0, r2 + 241 0020 9A61 str r2, [r3, #24] + 242 0022 5DF8044B ldr r4, [sp], #4 + 243 0026 1961 str r1, [r3, #16] + 244 0028 7047 bx lr + 245 .L27: + 246 002a 0120 movs r0, #1 + 247 002c 7047 bx lr + 248 .L33: + 249 002e 00BF .align 2 + 250 .L32: + 251 0030 00ED00E0 .word -536810240 + 253 .section .text.HAL_NVIC_GetPriorityGrouping,"ax",%progbits + 254 .align 1 + 255 .p2align 2,,3 + 256 .global HAL_NVIC_GetPriorityGrouping + 257 .syntax unified + 258 .thumb + 259 .thumb_func + 260 .fpu fpv4-sp-d16 + 262 HAL_NVIC_GetPriorityGrouping: + 263 @ args = 0, pretend = 0, frame = 0 + 264 @ frame_needed = 0, uses_anonymous_args = 0 + 265 @ link register save eliminated. + 266 0000 024B ldr r3, .L35 + 267 0002 D868 ldr r0, [r3, #12] + 268 0004 C0F30220 ubfx r0, r0, #8, #3 + 269 0008 7047 bx lr + 270 .L36: + 271 000a 00BF .align 2 + 272 .L35: + 273 000c 00ED00E0 .word -536810240 + 275 .section .text.HAL_NVIC_GetPriority,"ax",%progbits + 276 .align 1 + 277 .p2align 2,,3 + 278 .global HAL_NVIC_GetPriority + 279 .syntax unified + 280 .thumb + 281 .thumb_func + 282 .fpu fpv4-sp-d16 + 284 HAL_NVIC_GetPriority: + 285 @ args = 0, pretend = 0, frame = 0 + 286 @ frame_needed = 0, uses_anonymous_args = 0 + 287 @ link register save eliminated. + 288 0000 0028 cmp r0, #0 + 289 0002 10B4 push {r4} + 290 0004 27DB blt .L38 + 291 0006 00F16040 add r0, r0, #-536870912 + 292 000a 00F56140 add r0, r0, #57600 + 293 000e 90F80003 ldrb r0, [r0, #768] @ zero_extendqisi2 + 294 0012 0009 lsrs r0, r0, #4 + 295 .L39: + 296 0014 01F00701 and r1, r1, #7 + 297 0018 C1F1070C rsb ip, r1, #7 + 298 001c BCF1040F cmp ip, #4 + 299 0020 01F10404 add r4, r1, #4 + 300 0024 28BF it cs + ARM GAS /tmp/ccbLRFQ0.s page 6 + + + 301 0026 4FF0040C movcs ip, #4 + 302 002a 062C cmp r4, #6 + 303 002c 11D9 bls .L41 + 304 002e 0339 subs r1, r1, #3 + 305 0030 4FF0FF34 mov r4, #-1 + 306 0034 8C40 lsls r4, r4, r1 + 307 0036 20EA0404 bic r4, r0, r4 + 308 003a C840 lsrs r0, r0, r1 + 309 .L40: + 310 003c 4FF0FF31 mov r1, #-1 + 311 0040 01FA0CF1 lsl r1, r1, ip + 312 0044 20EA0100 bic r0, r0, r1 + 313 0048 1060 str r0, [r2] + 314 004a 1C60 str r4, [r3] + 315 004c 5DF8044B ldr r4, [sp], #4 + 316 0050 7047 bx lr + 317 .L41: + 318 0052 0024 movs r4, #0 + 319 0054 F2E7 b .L40 + 320 .L38: + 321 0056 034C ldr r4, .L43 + 322 0058 00F00F00 and r0, r0, #15 + 323 005c 0444 add r4, r4, r0 + 324 005e 207E ldrb r0, [r4, #24] @ zero_extendqisi2 + 325 0060 0009 lsrs r0, r0, #4 + 326 0062 D7E7 b .L39 + 327 .L44: + 328 .align 2 + 329 .L43: + 330 0064 FCEC00E0 .word -536810244 + 332 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits + 333 .align 1 + 334 .p2align 2,,3 + 335 .global HAL_NVIC_SetPendingIRQ + 336 .syntax unified + 337 .thumb + 338 .thumb_func + 339 .fpu fpv4-sp-d16 + 341 HAL_NVIC_SetPendingIRQ: + 342 @ args = 0, pretend = 0, frame = 0 + 343 @ frame_needed = 0, uses_anonymous_args = 0 + 344 @ link register save eliminated. + 345 0000 0028 cmp r0, #0 + 346 0002 09DB blt .L45 + 347 0004 4309 lsrs r3, r0, #5 + 348 0006 0549 ldr r1, .L47 + 349 0008 00F01F00 and r0, r0, #31 + 350 000c 0122 movs r2, #1 + 351 000e 4033 adds r3, r3, #64 + 352 0010 02FA00F0 lsl r0, r2, r0 + 353 0014 41F82300 str r0, [r1, r3, lsl #2] + 354 .L45: + 355 0018 7047 bx lr + 356 .L48: + 357 001a 00BF .align 2 + 358 .L47: + 359 001c 00E100E0 .word -536813312 + ARM GAS /tmp/ccbLRFQ0.s page 7 + + + 361 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits + 362 .align 1 + 363 .p2align 2,,3 + 364 .global HAL_NVIC_GetPendingIRQ + 365 .syntax unified + 366 .thumb + 367 .thumb_func + 368 .fpu fpv4-sp-d16 + 370 HAL_NVIC_GetPendingIRQ: + 371 @ args = 0, pretend = 0, frame = 0 + 372 @ frame_needed = 0, uses_anonymous_args = 0 + 373 @ link register save eliminated. + 374 0000 0028 cmp r0, #0 + 375 0002 0BDB blt .L51 + 376 0004 4309 lsrs r3, r0, #5 + 377 0006 064A ldr r2, .L52 + 378 0008 4033 adds r3, r3, #64 + 379 000a 00F01F00 and r0, r0, #31 + 380 000e 52F82330 ldr r3, [r2, r3, lsl #2] + 381 0012 23FA00F0 lsr r0, r3, r0 + 382 0016 00F00100 and r0, r0, #1 + 383 001a 7047 bx lr + 384 .L51: + 385 001c 0020 movs r0, #0 + 386 001e 7047 bx lr + 387 .L53: + 388 .align 2 + 389 .L52: + 390 0020 00E100E0 .word -536813312 + 392 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits + 393 .align 1 + 394 .p2align 2,,3 + 395 .global HAL_NVIC_ClearPendingIRQ + 396 .syntax unified + 397 .thumb + 398 .thumb_func + 399 .fpu fpv4-sp-d16 + 401 HAL_NVIC_ClearPendingIRQ: + 402 @ args = 0, pretend = 0, frame = 0 + 403 @ frame_needed = 0, uses_anonymous_args = 0 + 404 @ link register save eliminated. + 405 0000 0028 cmp r0, #0 + 406 0002 09DB blt .L54 + 407 0004 4309 lsrs r3, r0, #5 + 408 0006 0549 ldr r1, .L56 + 409 0008 00F01F00 and r0, r0, #31 + 410 000c 0122 movs r2, #1 + 411 000e 6033 adds r3, r3, #96 + 412 0010 02FA00F0 lsl r0, r2, r0 + 413 0014 41F82300 str r0, [r1, r3, lsl #2] + 414 .L54: + 415 0018 7047 bx lr + 416 .L57: + 417 001a 00BF .align 2 + 418 .L56: + 419 001c 00E100E0 .word -536813312 + 421 .section .text.HAL_NVIC_GetActive,"ax",%progbits + ARM GAS /tmp/ccbLRFQ0.s page 8 + + + 422 .align 1 + 423 .p2align 2,,3 + 424 .global HAL_NVIC_GetActive + 425 .syntax unified + 426 .thumb + 427 .thumb_func + 428 .fpu fpv4-sp-d16 + 430 HAL_NVIC_GetActive: + 431 @ args = 0, pretend = 0, frame = 0 + 432 @ frame_needed = 0, uses_anonymous_args = 0 + 433 @ link register save eliminated. + 434 0000 0028 cmp r0, #0 + 435 0002 0BDB blt .L60 + 436 0004 4309 lsrs r3, r0, #5 + 437 0006 064A ldr r2, .L61 + 438 0008 8033 adds r3, r3, #128 + 439 000a 00F01F00 and r0, r0, #31 + 440 000e 52F82330 ldr r3, [r2, r3, lsl #2] + 441 0012 23FA00F0 lsr r0, r3, r0 + 442 0016 00F00100 and r0, r0, #1 + 443 001a 7047 bx lr + 444 .L60: + 445 001c 0020 movs r0, #0 + 446 001e 7047 bx lr + 447 .L62: + 448 .align 2 + 449 .L61: + 450 0020 00E100E0 .word -536813312 + 452 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits + 453 .align 1 + 454 .p2align 2,,3 + 455 .global HAL_SYSTICK_CLKSourceConfig + 456 .syntax unified + 457 .thumb + 458 .thumb_func + 459 .fpu fpv4-sp-d16 + 461 HAL_SYSTICK_CLKSourceConfig: + 462 @ args = 0, pretend = 0, frame = 0 + 463 @ frame_needed = 0, uses_anonymous_args = 0 + 464 @ link register save eliminated. + 465 0000 4FF0E022 mov r2, #-536813568 + 466 0004 0428 cmp r0, #4 + 467 0006 1369 ldr r3, [r2, #16] + 468 0008 0CBF ite eq + 469 000a 43F00403 orreq r3, r3, #4 + 470 000e 23F00403 bicne r3, r3, #4 + 471 0012 1361 str r3, [r2, #16] + 472 0014 7047 bx lr + 474 0016 00BF .section .text.HAL_SYSTICK_Callback,"ax",%progbits + 475 .align 1 + 476 .p2align 2,,3 + 477 .weak HAL_SYSTICK_Callback + 478 .syntax unified + 479 .thumb + 480 .thumb_func + 481 .fpu fpv4-sp-d16 + 483 HAL_SYSTICK_Callback: + ARM GAS /tmp/ccbLRFQ0.s page 9 + + + 484 @ args = 0, pretend = 0, frame = 0 + 485 @ frame_needed = 0, uses_anonymous_args = 0 + 486 @ link register save eliminated. + 487 0000 7047 bx lr + 489 0002 00BF .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits + 490 .align 1 + 491 .p2align 2,,3 + 492 .global HAL_SYSTICK_IRQHandler + 493 .syntax unified + 494 .thumb + 495 .thumb_func + 496 .fpu fpv4-sp-d16 + 498 HAL_SYSTICK_IRQHandler: + 499 @ args = 0, pretend = 0, frame = 0 + 500 @ frame_needed = 0, uses_anonymous_args = 0 + 501 0000 08B5 push {r3, lr} + 502 0002 FFF7FEFF bl HAL_SYSTICK_Callback + 503 0006 08BD pop {r3, pc} + 505 .section .text.HAL_MPU_Enable,"ax",%progbits + 506 .align 1 + 507 .p2align 2,,3 + 508 .global HAL_MPU_Enable + 509 .syntax unified + 510 .thumb + 511 .thumb_func + 512 .fpu fpv4-sp-d16 + 514 HAL_MPU_Enable: + 515 @ args = 0, pretend = 0, frame = 0 + 516 @ frame_needed = 0, uses_anonymous_args = 0 + 517 @ link register save eliminated. + 518 0000 044B ldr r3, .L70 + 519 0002 40F00100 orr r0, r0, #1 + 520 0006 C3F89400 str r0, [r3, #148] + 521 .syntax unified + 522 @ 946 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 523 000a BFF34F8F dsb 0xF + 524 @ 0 "" 2 + 525 @ 935 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 526 000e BFF36F8F isb 0xF + 527 @ 0 "" 2 + 528 .thumb + 529 .syntax unified + 530 0012 7047 bx lr + 531 .L71: + 532 .align 2 + 533 .L70: + 534 0014 00ED00E0 .word -536810240 + 536 .section .text.HAL_MPU_Disable,"ax",%progbits + 537 .align 1 + 538 .p2align 2,,3 + 539 .global HAL_MPU_Disable + 540 .syntax unified + 541 .thumb + 542 .thumb_func + 543 .fpu fpv4-sp-d16 + 545 HAL_MPU_Disable: + 546 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccbLRFQ0.s page 10 + + + 547 @ frame_needed = 0, uses_anonymous_args = 0 + 548 @ link register save eliminated. + 549 .syntax unified + 550 @ 957 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 551 0000 BFF35F8F dmb 0xF + 552 @ 0 "" 2 + 553 .thumb + 554 .syntax unified + 555 0004 024B ldr r3, .L73 + 556 0006 0022 movs r2, #0 + 557 0008 C3F89420 str r2, [r3, #148] + 558 000c 7047 bx lr + 559 .L74: + 560 000e 00BF .align 2 + 561 .L73: + 562 0010 00ED00E0 .word -536810240 + 564 .section .text.HAL_MPU_ConfigRegion,"ax",%progbits + 565 .align 1 + 566 .p2align 2,,3 + 567 .global HAL_MPU_ConfigRegion + 568 .syntax unified + 569 .thumb + 570 .thumb_func + 571 .fpu fpv4-sp-d16 + 573 HAL_MPU_ConfigRegion: + 574 @ args = 0, pretend = 0, frame = 0 + 575 @ frame_needed = 0, uses_anonymous_args = 0 + 576 0000 1749 ldr r1, .L82 + 577 0002 4378 ldrb r3, [r0, #1] @ zero_extendqisi2 + 578 0004 C1F89830 str r3, [r1, #152] + 579 0008 0278 ldrb r2, [r0] @ zero_extendqisi2 + 580 000a 22B3 cbz r2, .L76 + 581 000c 4368 ldr r3, [r0, #4] + 582 000e 00B5 push {lr} + 583 0010 C1F89C30 str r3, [r1, #156] + 584 0014 C37A ldrb r3, [r0, #11] @ zero_extendqisi2 + 585 0016 90F80CC0 ldrb ip, [r0, #12] @ zero_extendqisi2 + 586 001a 90F80FE0 ldrb lr, [r0, #15] @ zero_extendqisi2 + 587 001e 1B06 lsls r3, r3, #24 + 588 0020 43EA0C73 orr r3, r3, ip, lsl #28 + 589 0024 90F80AC0 ldrb ip, [r0, #10] @ zero_extendqisi2 + 590 0028 1343 orrs r3, r3, r2 + 591 002a 43EACC43 orr r3, r3, ip, lsl #19 + 592 002e 90F80DC0 ldrb ip, [r0, #13] @ zero_extendqisi2 + 593 0032 827B ldrb r2, [r0, #14] @ zero_extendqisi2 + 594 0034 43EA8C43 orr r3, r3, ip, lsl #18 + 595 0038 43EA4243 orr r3, r3, r2, lsl #17 + 596 003c 90F809C0 ldrb ip, [r0, #9] @ zero_extendqisi2 + 597 0040 027A ldrb r2, [r0, #8] @ zero_extendqisi2 + 598 0042 43EA0E43 orr r3, r3, lr, lsl #16 + 599 0046 43EA0C23 orr r3, r3, ip, lsl #8 + 600 004a 43EA4203 orr r3, r3, r2, lsl #1 + 601 004e C1F8A030 str r3, [r1, #160] + 602 0052 5DF804FB ldr pc, [sp], #4 + 603 .L76: + 604 0056 C1F89C20 str r2, [r1, #156] + 605 005a C1F8A020 str r2, [r1, #160] + ARM GAS /tmp/ccbLRFQ0.s page 11 + + + 606 005e 7047 bx lr + 607 .L83: + 608 .align 2 + 609 .L82: + 610 0060 00ED00E0 .word -536810240 + 612 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccbLRFQ0.s page 12 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_cortex.c + /tmp/ccbLRFQ0.s:16 .text.HAL_NVIC_SetPriorityGrouping:0000000000000000 $t + /tmp/ccbLRFQ0.s:25 .text.HAL_NVIC_SetPriorityGrouping:0000000000000000 HAL_NVIC_SetPriorityGrouping + /tmp/ccbLRFQ0.s:43 .text.HAL_NVIC_SetPriorityGrouping:0000000000000020 $d + /tmp/ccbLRFQ0.s:46 .text.HAL_NVIC_SetPriority:0000000000000000 $t + /tmp/ccbLRFQ0.s:54 .text.HAL_NVIC_SetPriority:0000000000000000 HAL_NVIC_SetPriority + /tmp/ccbLRFQ0.s:101 .text.HAL_NVIC_SetPriority:0000000000000074 $d + /tmp/ccbLRFQ0.s:105 .text.HAL_NVIC_EnableIRQ:0000000000000000 $t + /tmp/ccbLRFQ0.s:113 .text.HAL_NVIC_EnableIRQ:0000000000000000 HAL_NVIC_EnableIRQ + /tmp/ccbLRFQ0.s:130 .text.HAL_NVIC_EnableIRQ:0000000000000018 $d + /tmp/ccbLRFQ0.s:133 .text.HAL_NVIC_DisableIRQ:0000000000000000 $t + /tmp/ccbLRFQ0.s:141 .text.HAL_NVIC_DisableIRQ:0000000000000000 HAL_NVIC_DisableIRQ + /tmp/ccbLRFQ0.s:168 .text.HAL_NVIC_DisableIRQ:0000000000000024 $d + /tmp/ccbLRFQ0.s:171 .text.HAL_NVIC_SystemReset:0000000000000000 $t + /tmp/ccbLRFQ0.s:179 .text.HAL_NVIC_SystemReset:0000000000000000 HAL_NVIC_SystemReset + /tmp/ccbLRFQ0.s:213 .text.HAL_NVIC_SystemReset:000000000000001c $d + /tmp/ccbLRFQ0.s:217 .text.HAL_SYSTICK_Config:0000000000000000 $t + /tmp/ccbLRFQ0.s:225 .text.HAL_SYSTICK_Config:0000000000000000 HAL_SYSTICK_Config + /tmp/ccbLRFQ0.s:251 .text.HAL_SYSTICK_Config:0000000000000030 $d + /tmp/ccbLRFQ0.s:254 .text.HAL_NVIC_GetPriorityGrouping:0000000000000000 $t + /tmp/ccbLRFQ0.s:262 .text.HAL_NVIC_GetPriorityGrouping:0000000000000000 HAL_NVIC_GetPriorityGrouping + /tmp/ccbLRFQ0.s:273 .text.HAL_NVIC_GetPriorityGrouping:000000000000000c $d + /tmp/ccbLRFQ0.s:276 .text.HAL_NVIC_GetPriority:0000000000000000 $t + /tmp/ccbLRFQ0.s:284 .text.HAL_NVIC_GetPriority:0000000000000000 HAL_NVIC_GetPriority + /tmp/ccbLRFQ0.s:330 .text.HAL_NVIC_GetPriority:0000000000000064 $d + /tmp/ccbLRFQ0.s:333 .text.HAL_NVIC_SetPendingIRQ:0000000000000000 $t + /tmp/ccbLRFQ0.s:341 .text.HAL_NVIC_SetPendingIRQ:0000000000000000 HAL_NVIC_SetPendingIRQ + /tmp/ccbLRFQ0.s:359 .text.HAL_NVIC_SetPendingIRQ:000000000000001c $d + /tmp/ccbLRFQ0.s:362 .text.HAL_NVIC_GetPendingIRQ:0000000000000000 $t + /tmp/ccbLRFQ0.s:370 .text.HAL_NVIC_GetPendingIRQ:0000000000000000 HAL_NVIC_GetPendingIRQ + /tmp/ccbLRFQ0.s:390 .text.HAL_NVIC_GetPendingIRQ:0000000000000020 $d + /tmp/ccbLRFQ0.s:393 .text.HAL_NVIC_ClearPendingIRQ:0000000000000000 $t + /tmp/ccbLRFQ0.s:401 .text.HAL_NVIC_ClearPendingIRQ:0000000000000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccbLRFQ0.s:419 .text.HAL_NVIC_ClearPendingIRQ:000000000000001c $d + /tmp/ccbLRFQ0.s:422 .text.HAL_NVIC_GetActive:0000000000000000 $t + /tmp/ccbLRFQ0.s:430 .text.HAL_NVIC_GetActive:0000000000000000 HAL_NVIC_GetActive + /tmp/ccbLRFQ0.s:450 .text.HAL_NVIC_GetActive:0000000000000020 $d + /tmp/ccbLRFQ0.s:453 .text.HAL_SYSTICK_CLKSourceConfig:0000000000000000 $t + /tmp/ccbLRFQ0.s:461 .text.HAL_SYSTICK_CLKSourceConfig:0000000000000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccbLRFQ0.s:475 .text.HAL_SYSTICK_Callback:0000000000000000 $t + /tmp/ccbLRFQ0.s:483 .text.HAL_SYSTICK_Callback:0000000000000000 HAL_SYSTICK_Callback + /tmp/ccbLRFQ0.s:490 .text.HAL_SYSTICK_IRQHandler:0000000000000000 $t + /tmp/ccbLRFQ0.s:498 .text.HAL_SYSTICK_IRQHandler:0000000000000000 HAL_SYSTICK_IRQHandler + /tmp/ccbLRFQ0.s:506 .text.HAL_MPU_Enable:0000000000000000 $t + /tmp/ccbLRFQ0.s:514 .text.HAL_MPU_Enable:0000000000000000 HAL_MPU_Enable + /tmp/ccbLRFQ0.s:534 .text.HAL_MPU_Enable:0000000000000014 $d + /tmp/ccbLRFQ0.s:537 .text.HAL_MPU_Disable:0000000000000000 $t + /tmp/ccbLRFQ0.s:545 .text.HAL_MPU_Disable:0000000000000000 HAL_MPU_Disable + /tmp/ccbLRFQ0.s:562 .text.HAL_MPU_Disable:0000000000000010 $d + /tmp/ccbLRFQ0.s:565 .text.HAL_MPU_ConfigRegion:0000000000000000 $t + /tmp/ccbLRFQ0.s:573 .text.HAL_MPU_ConfigRegion:0000000000000000 HAL_MPU_ConfigRegion + /tmp/ccbLRFQ0.s:610 .text.HAL_MPU_ConfigRegion:0000000000000060 $d + +NO UNDEFINED SYMBOLS diff --git a/codice/build/stm32g4xx_hal_cortex.o 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+ Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_dac.lst b/codice/build/stm32g4xx_hal_dac.lst new file mode 100644 index 0000000..8a4c7b3 --- /dev/null +++ b/codice/build/stm32g4xx_hal_dac.lst @@ -0,0 +1,923 @@ +ARM GAS /tmp/ccPNfLQn.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_dac.c" + 14 .text + 15 .section .text.HAL_DAC_MspInit,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .weak HAL_DAC_MspInit + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_DAC_MspInit: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 7047 bx lr + 31 0002 00BF .section .text.HAL_DAC_Init,"ax",%progbits + 32 .align 1 + 33 .p2align 2,,3 + 34 .global HAL_DAC_Init + 35 .syntax unified + 36 .thumb + 37 .thumb_func + 38 .fpu fpv4-sp-d16 + 40 HAL_DAC_Init: + 41 @ args = 0, pretend = 0, frame = 0 + 42 @ frame_needed = 0, uses_anonymous_args = 0 + 43 0000 88B1 cbz r0, .L6 + 44 0002 10B5 push {r4, lr} + 45 0004 0379 ldrb r3, [r0, #4] @ zero_extendqisi2 + 46 0006 0446 mov r4, r0 + 47 0008 03F0FF02 and r2, r3, #255 + 48 000c 3BB1 cbz r3, .L11 + 49 .L5: + 50 000e 0023 movs r3, #0 + 51 0010 0221 movs r1, #2 + 52 0012 0122 movs r2, #1 + 53 0014 2171 strb r1, [r4, #4] + 54 0016 2361 str r3, [r4, #16] + 55 0018 2271 strb r2, [r4, #4] + 56 001a 1846 mov r0, r3 + 57 001c 10BD pop {r4, pc} + 58 .L11: + 59 001e 4271 strb r2, [r0, #5] + 60 0020 FFF7FEFF bl HAL_DAC_MspInit + ARM GAS /tmp/ccPNfLQn.s page 2 + + + 61 0024 F3E7 b .L5 + 62 .L6: + 63 0026 0120 movs r0, #1 + 64 0028 7047 bx lr + 66 002a 00BF .section .text.HAL_DAC_MspDeInit,"ax",%progbits + 67 .align 1 + 68 .p2align 2,,3 + 69 .weak HAL_DAC_MspDeInit + 70 .syntax unified + 71 .thumb + 72 .thumb_func + 73 .fpu fpv4-sp-d16 + 75 HAL_DAC_MspDeInit: + 76 @ args = 0, pretend = 0, frame = 0 + 77 @ frame_needed = 0, uses_anonymous_args = 0 + 78 @ link register save eliminated. + 79 0000 7047 bx lr + 81 0002 00BF .section .text.HAL_DAC_DeInit,"ax",%progbits + 82 .align 1 + 83 .p2align 2,,3 + 84 .global HAL_DAC_DeInit + 85 .syntax unified + 86 .thumb + 87 .thumb_func + 88 .fpu fpv4-sp-d16 + 90 HAL_DAC_DeInit: + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 0000 50B1 cbz r0, .L15 + 94 0002 10B5 push {r4, lr} + 95 0004 0223 movs r3, #2 + 96 0006 0446 mov r4, r0 + 97 0008 0371 strb r3, [r0, #4] + 98 000a FFF7FEFF bl HAL_DAC_MspDeInit + 99 000e 0020 movs r0, #0 + 100 0010 2061 str r0, [r4, #16] + 101 0012 6071 strb r0, [r4, #5] + 102 0014 2071 strb r0, [r4, #4] + 103 0016 10BD pop {r4, pc} + 104 .L15: + 105 0018 0120 movs r0, #1 + 106 001a 7047 bx lr + 108 .section .text.HAL_DAC_Start,"ax",%progbits + 109 .align 1 + 110 .p2align 2,,3 + 111 .global HAL_DAC_Start + 112 .syntax unified + 113 .thumb + 114 .thumb_func + 115 .fpu fpv4-sp-d16 + 117 HAL_DAC_Start: + 118 @ args = 0, pretend = 0, frame = 0 + 119 @ frame_needed = 0, uses_anonymous_args = 0 + 120 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 121 0002 4379 ldrb r3, [r0, #5] @ zero_extendqisi2 + 122 0004 012B cmp r3, #1 + 123 0006 2ED0 beq .L24 + ARM GAS /tmp/ccPNfLQn.s page 3 + + + 124 0008 0446 mov r4, r0 + 125 000a 0226 movs r6, #2 + 126 000c 2268 ldr r2, [r4] + 127 000e 2671 strb r6, [r4, #4] + 128 0010 0120 movs r0, #1 + 129 0012 6071 strb r0, [r4, #5] + 130 0014 0D46 mov r5, r1 + 131 0016 05F01007 and r7, r5, #16 + 132 001a 1168 ldr r1, [r2] + 133 001c 00FA07F3 lsl r3, r0, r7 + 134 0020 0B43 orrs r3, r3, r1 + 135 0022 1360 str r3, [r2] + 136 0024 FFF7FEFF bl HAL_Delay + 137 0028 2268 ldr r2, [r4] + 138 002a 6DB9 cbnz r5, .L22 + 139 002c 1368 ldr r3, [r2] + 140 002e 03F03E03 and r3, r3, #62 + 141 0032 B342 cmp r3, r6 + 142 0034 03D1 bne .L23 + 143 0036 5368 ldr r3, [r2, #4] + 144 0038 43F00103 orr r3, r3, #1 + 145 003c 5360 str r3, [r2, #4] + 146 .L23: + 147 003e 0020 movs r0, #0 + 148 0040 0123 movs r3, #1 + 149 0042 2371 strb r3, [r4, #4] + 150 0044 6071 strb r0, [r4, #5] + 151 .L21: + 152 0046 F8BD pop {r3, r4, r5, r6, r7, pc} + 153 .L22: + 154 0048 1368 ldr r3, [r2] + 155 004a BE40 lsls r6, r6, r7 + 156 004c 03F47813 and r3, r3, #4063232 + 157 0050 B342 cmp r3, r6 + 158 0052 F4D1 bne .L23 + 159 0054 5368 ldr r3, [r2, #4] + 160 0056 43F00203 orr r3, r3, #2 + 161 005a 5360 str r3, [r2, #4] + 162 005c 0020 movs r0, #0 + 163 005e 0123 movs r3, #1 + 164 0060 2371 strb r3, [r4, #4] + 165 0062 6071 strb r0, [r4, #5] + 166 0064 EFE7 b .L21 + 167 .L24: + 168 0066 0220 movs r0, #2 + 169 0068 F8BD pop {r3, r4, r5, r6, r7, pc} + 171 006a 00BF .section .text.HAL_DAC_Stop,"ax",%progbits + 172 .align 1 + 173 .p2align 2,,3 + 174 .global HAL_DAC_Stop + 175 .syntax unified + 176 .thumb + 177 .thumb_func + 178 .fpu fpv4-sp-d16 + 180 HAL_DAC_Stop: + 181 @ args = 0, pretend = 0, frame = 0 + 182 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccPNfLQn.s page 4 + + + 183 0000 0268 ldr r2, [r0] + 184 0002 38B5 push {r3, r4, r5, lr} + 185 0004 01F01001 and r1, r1, #16 + 186 0008 1368 ldr r3, [r2] + 187 000a 0125 movs r5, #1 + 188 000c 05FA01F1 lsl r1, r5, r1 + 189 0010 0446 mov r4, r0 + 190 0012 23EA0101 bic r1, r3, r1 + 191 0016 2846 mov r0, r5 + 192 0018 1160 str r1, [r2] + 193 001a FFF7FEFF bl HAL_Delay + 194 001e 2571 strb r5, [r4, #4] + 195 0020 0020 movs r0, #0 + 196 0022 38BD pop {r3, r4, r5, pc} + 198 .section .text.HAL_DAC_Start_DMA,"ax",%progbits + 199 .align 1 + 200 .p2align 2,,3 + 201 .global HAL_DAC_Start_DMA + 202 .syntax unified + 203 .thumb + 204 .thumb_func + 205 .fpu fpv4-sp-d16 + 207 HAL_DAC_Start_DMA: + 208 @ args = 4, pretend = 0, frame = 0 + 209 @ frame_needed = 0, uses_anonymous_args = 0 + 210 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 211 0002 0446 mov r4, r0 + 212 0004 4079 ldrb r0, [r0, #5] @ zero_extendqisi2 + 213 0006 069E ldr r6, [sp, #24] + 214 0008 0128 cmp r0, #1 + 215 000a 5ED0 beq .L41 + 216 000c 0D46 mov r5, r1 + 217 000e 1146 mov r1, r2 + 218 0010 0122 movs r2, #1 + 219 0012 6271 strb r2, [r4, #5] + 220 0014 0222 movs r2, #2 + 221 0016 2768 ldr r7, [r4] + 222 0018 2271 strb r2, [r4, #4] + 223 001a 3DBB cbnz r5, .L30 + 224 001c A068 ldr r0, [r4, #8] + 225 001e 3A68 ldr r2, [r7] + 226 0020 DFF8D0C0 ldr ip, .L47 + 227 0024 C0F82CC0 str ip, [r0, #44] + 228 0028 DFF8CCC0 ldr ip, .L47+4 + 229 002c C0F830C0 str ip, [r0, #48] + 230 0030 42F48052 orr r2, r2, #4096 + 231 0034 DFF8C4C0 ldr ip, .L47+8 + 232 0038 C0F834C0 str ip, [r0, #52] + 233 003c 042E cmp r6, #4 + 234 003e 3A60 str r2, [r7] + 235 0040 4CD0 beq .L31 + 236 0042 082E cmp r6, #8 + 237 0044 47D0 beq .L32 + 238 0046 002E cmp r6, #0 + 239 0048 42D0 beq .L44 + 240 004a 2A46 mov r2, r5 + 241 .L34: + ARM GAS /tmp/ccPNfLQn.s page 5 + + + 242 004c 3E68 ldr r6, [r7] + 243 004e 46F40056 orr r6, r6, #8192 + 244 0052 3E60 str r6, [r7] + 245 0054 FFF7FEFF bl HAL_DMA_Start_IT + 246 0058 0023 movs r3, #0 + 247 005a 0646 mov r6, r0 + 248 005c 6371 strb r3, [r4, #5] + 249 005e 3EB3 cbz r6, .L45 + 250 .L40: + 251 0060 2369 ldr r3, [r4, #16] + 252 0062 43F00403 orr r3, r3, #4 + 253 0066 2361 str r3, [r4, #16] + 254 0068 3046 mov r0, r6 + 255 006a F8BD pop {r3, r4, r5, r6, r7, pc} + 256 .L30: + 257 006c E068 ldr r0, [r4, #12] + 258 006e 3A68 ldr r2, [r7] + 259 0070 DFF88CC0 ldr ip, .L47+12 + 260 0074 C0F82CC0 str ip, [r0, #44] + 261 0078 DFF888C0 ldr ip, .L47+16 + 262 007c C0F830C0 str ip, [r0, #48] + 263 0080 42F08052 orr r2, r2, #268435456 + 264 0084 DFF880C0 ldr ip, .L47+20 + 265 0088 C0F834C0 str ip, [r0, #52] + 266 008c 042E cmp r6, #4 + 267 008e 3A60 str r2, [r7] + 268 0090 2DD0 beq .L35 + 269 0092 082E cmp r6, #8 + 270 0094 28D0 beq .L36 + 271 0096 26B3 cbz r6, .L46 + 272 0098 0022 movs r2, #0 + 273 .L38: + 274 009a 3E68 ldr r6, [r7] + 275 009c 46F00056 orr r6, r6, #536870912 + 276 00a0 3E60 str r6, [r7] + 277 00a2 FFF7FEFF bl HAL_DMA_Start_IT + 278 00a6 0023 movs r3, #0 + 279 00a8 0646 mov r6, r0 + 280 00aa 6371 strb r3, [r4, #5] + 281 00ac 002E cmp r6, #0 + 282 00ae D7D1 bne .L40 + 283 .L45: + 284 00b0 2368 ldr r3, [r4] + 285 00b2 0120 movs r0, #1 + 286 00b4 1A68 ldr r2, [r3] + 287 00b6 05F01005 and r5, r5, #16 + 288 00ba 00FA05F5 lsl r5, r0, r5 + 289 00be 1543 orrs r5, r5, r2 + 290 00c0 1D60 str r5, [r3] + 291 00c2 FFF7FEFF bl HAL_Delay + 292 00c6 3046 mov r0, r6 + 293 00c8 F8BD pop {r3, r4, r5, r6, r7, pc} + 294 .L41: + 295 00ca 0226 movs r6, #2 + 296 00cc 3046 mov r0, r6 + 297 00ce F8BD pop {r3, r4, r5, r6, r7, pc} + 298 .L44: + ARM GAS /tmp/ccPNfLQn.s page 6 + + + 299 00d0 07F10802 add r2, r7, #8 + 300 00d4 BAE7 b .L34 + 301 .L32: + 302 00d6 07F11002 add r2, r7, #16 + 303 00da B7E7 b .L34 + 304 .L31: + 305 00dc 07F10C02 add r2, r7, #12 + 306 00e0 B4E7 b .L34 + 307 .L46: + 308 00e2 07F11402 add r2, r7, #20 + 309 00e6 D8E7 b .L38 + 310 .L36: + 311 00e8 07F11C02 add r2, r7, #28 + 312 00ec D5E7 b .L38 + 313 .L35: + 314 00ee 07F11802 add r2, r7, #24 + 315 00f2 D2E7 b .L38 + 316 .L48: + 317 .align 2 + 318 .L47: + 319 00f4 00000000 .word DAC_DMAConvCpltCh1 + 320 00f8 00000000 .word DAC_DMAHalfConvCpltCh1 + 321 00fc 00000000 .word DAC_DMAErrorCh1 + 322 0100 00000000 .word DAC_DMAConvCpltCh2 + 323 0104 00000000 .word DAC_DMAHalfConvCpltCh2 + 324 0108 00000000 .word DAC_DMAErrorCh2 + 326 .section .text.HAL_DAC_Stop_DMA,"ax",%progbits + 327 .align 1 + 328 .p2align 2,,3 + 329 .global HAL_DAC_Stop_DMA + 330 .syntax unified + 331 .thumb + 332 .thumb_func + 333 .fpu fpv4-sp-d16 + 335 HAL_DAC_Stop_DMA: + 336 @ args = 0, pretend = 0, frame = 0 + 337 @ frame_needed = 0, uses_anonymous_args = 0 + 338 0000 38B5 push {r3, r4, r5, lr} + 339 0002 0368 ldr r3, [r0] + 340 0004 0D46 mov r5, r1 + 341 0006 05F01002 and r2, r5, #16 + 342 000a 1968 ldr r1, [r3] + 343 000c 0446 mov r4, r0 + 344 000e 4FF48050 mov r0, #4096 + 345 0012 9040 lsls r0, r0, r2 + 346 0014 21EA0001 bic r1, r1, r0 + 347 0018 1960 str r1, [r3] + 348 001a 1968 ldr r1, [r3] + 349 001c 0120 movs r0, #1 + 350 001e 00FA02F2 lsl r2, r0, r2 + 351 0022 21EA0202 bic r2, r1, r2 + 352 0026 1A60 str r2, [r3] + 353 0028 FFF7FEFF bl HAL_Delay + 354 002c 5DB9 cbnz r5, .L50 + 355 002e A068 ldr r0, [r4, #8] + 356 0030 FFF7FEFF bl HAL_DMA_Abort + 357 0034 2268 ldr r2, [r4] + ARM GAS /tmp/ccPNfLQn.s page 7 + + + 358 0036 1368 ldr r3, [r2] + 359 0038 23F40053 bic r3, r3, #8192 + 360 003c 1360 str r3, [r2] + 361 003e 0123 movs r3, #1 + 362 0040 2371 strb r3, [r4, #4] + 363 0042 0020 movs r0, #0 + 364 0044 38BD pop {r3, r4, r5, pc} + 365 .L50: + 366 0046 E068 ldr r0, [r4, #12] + 367 0048 FFF7FEFF bl HAL_DMA_Abort + 368 004c 2268 ldr r2, [r4] + 369 004e 1368 ldr r3, [r2] + 370 0050 23F00053 bic r3, r3, #536870912 + 371 0054 1360 str r3, [r2] + 372 0056 0123 movs r3, #1 + 373 0058 2371 strb r3, [r4, #4] + 374 005a 0020 movs r0, #0 + 375 005c 38BD pop {r3, r4, r5, pc} + 377 005e 00BF .section .text.HAL_DAC_SetValue,"ax",%progbits + 378 .align 1 + 379 .p2align 2,,3 + 380 .global HAL_DAC_SetValue + 381 .syntax unified + 382 .thumb + 383 .thumb_func + 384 .fpu fpv4-sp-d16 + 386 HAL_DAC_SetValue: + 387 @ args = 0, pretend = 0, frame = 8 + 388 @ frame_needed = 0, uses_anonymous_args = 0 + 389 @ link register save eliminated. + 390 0000 10B4 push {r4} + 391 0002 83B0 sub sp, sp, #12 + 392 0004 0068 ldr r0, [r0] + 393 0006 0024 movs r4, #0 + 394 0008 0194 str r4, [sp, #4] + 395 000a C46B ldr r4, [r0, #60] + 396 000c 0190 str r0, [sp, #4] + 397 000e 51B9 cbnz r1, .L54 + 398 0010 0199 ldr r1, [sp, #4] + 399 0012 0831 adds r1, r1, #8 + 400 0014 0A44 add r2, r2, r1 + 401 0016 0192 str r2, [sp, #4] + 402 .L55: + 403 0018 019A ldr r2, [sp, #4] + 404 001a 0020 movs r0, #0 + 405 001c 1360 str r3, [r2] + 406 001e 03B0 add sp, sp, #12 + 407 @ sp needed + 408 0020 5DF8044B ldr r4, [sp], #4 + 409 0024 7047 bx lr + 410 .L54: + 411 0026 0199 ldr r1, [sp, #4] + 412 0028 1431 adds r1, r1, #20 + 413 002a 0A44 add r2, r2, r1 + 414 002c 0192 str r2, [sp, #4] + 415 002e F3E7 b .L55 + 417 .section .text.HAL_DAC_ConvCpltCallbackCh1,"ax",%progbits + ARM GAS /tmp/ccPNfLQn.s page 8 + + + 418 .align 1 + 419 .p2align 2,,3 + 420 .weak HAL_DAC_ConvCpltCallbackCh1 + 421 .syntax unified + 422 .thumb + 423 .thumb_func + 424 .fpu fpv4-sp-d16 + 426 HAL_DAC_ConvCpltCallbackCh1: + 427 @ args = 0, pretend = 0, frame = 0 + 428 @ frame_needed = 0, uses_anonymous_args = 0 + 429 @ link register save eliminated. + 430 0000 7047 bx lr + 432 0002 00BF .section .text.DAC_DMAConvCpltCh1,"ax",%progbits + 433 .align 1 + 434 .p2align 2,,3 + 435 .global DAC_DMAConvCpltCh1 + 436 .syntax unified + 437 .thumb + 438 .thumb_func + 439 .fpu fpv4-sp-d16 + 441 DAC_DMAConvCpltCh1: + 442 @ args = 0, pretend = 0, frame = 0 + 443 @ frame_needed = 0, uses_anonymous_args = 0 + 444 0000 10B5 push {r4, lr} + 445 0002 846A ldr r4, [r0, #40] + 446 0004 2046 mov r0, r4 + 447 0006 FFF7FEFF bl HAL_DAC_ConvCpltCallbackCh1 + 448 000a 0123 movs r3, #1 + 449 000c 2371 strb r3, [r4, #4] + 450 000e 10BD pop {r4, pc} + 452 .section .text.HAL_DAC_ConvHalfCpltCallbackCh1,"ax",%progbits + 453 .align 1 + 454 .p2align 2,,3 + 455 .weak HAL_DAC_ConvHalfCpltCallbackCh1 + 456 .syntax unified + 457 .thumb + 458 .thumb_func + 459 .fpu fpv4-sp-d16 + 461 HAL_DAC_ConvHalfCpltCallbackCh1: + 462 @ args = 0, pretend = 0, frame = 0 + 463 @ frame_needed = 0, uses_anonymous_args = 0 + 464 @ link register save eliminated. + 465 0000 7047 bx lr + 467 0002 00BF .section .text.DAC_DMAHalfConvCpltCh1,"ax",%progbits + 468 .align 1 + 469 .p2align 2,,3 + 470 .global DAC_DMAHalfConvCpltCh1 + 471 .syntax unified + 472 .thumb + 473 .thumb_func + 474 .fpu fpv4-sp-d16 + 476 DAC_DMAHalfConvCpltCh1: + 477 @ args = 0, pretend = 0, frame = 0 + 478 @ frame_needed = 0, uses_anonymous_args = 0 + 479 0000 08B5 push {r3, lr} + 480 0002 806A ldr r0, [r0, #40] + 481 0004 FFF7FEFF bl HAL_DAC_ConvHalfCpltCallbackCh1 + ARM GAS /tmp/ccPNfLQn.s page 9 + + + 482 0008 08BD pop {r3, pc} + 484 000a 00BF .section .text.HAL_DAC_ErrorCallbackCh1,"ax",%progbits + 485 .align 1 + 486 .p2align 2,,3 + 487 .weak HAL_DAC_ErrorCallbackCh1 + 488 .syntax unified + 489 .thumb + 490 .thumb_func + 491 .fpu fpv4-sp-d16 + 493 HAL_DAC_ErrorCallbackCh1: + 494 @ args = 0, pretend = 0, frame = 0 + 495 @ frame_needed = 0, uses_anonymous_args = 0 + 496 @ link register save eliminated. + 497 0000 7047 bx lr + 499 0002 00BF .section .text.DAC_DMAErrorCh1,"ax",%progbits + 500 .align 1 + 501 .p2align 2,,3 + 502 .global DAC_DMAErrorCh1 + 503 .syntax unified + 504 .thumb + 505 .thumb_func + 506 .fpu fpv4-sp-d16 + 508 DAC_DMAErrorCh1: + 509 @ args = 0, pretend = 0, frame = 0 + 510 @ frame_needed = 0, uses_anonymous_args = 0 + 511 0000 10B5 push {r4, lr} + 512 0002 846A ldr r4, [r0, #40] + 513 0004 2369 ldr r3, [r4, #16] + 514 0006 43F00403 orr r3, r3, #4 + 515 000a 2361 str r3, [r4, #16] + 516 000c 2046 mov r0, r4 + 517 000e FFF7FEFF bl HAL_DAC_ErrorCallbackCh1 + 518 0012 0123 movs r3, #1 + 519 0014 2371 strb r3, [r4, #4] + 520 0016 10BD pop {r4, pc} + 522 .section .text.HAL_DAC_DMAUnderrunCallbackCh1,"ax",%progbits + 523 .align 1 + 524 .p2align 2,,3 + 525 .weak HAL_DAC_DMAUnderrunCallbackCh1 + 526 .syntax unified + 527 .thumb + 528 .thumb_func + 529 .fpu fpv4-sp-d16 + 531 HAL_DAC_DMAUnderrunCallbackCh1: + 532 @ args = 0, pretend = 0, frame = 0 + 533 @ frame_needed = 0, uses_anonymous_args = 0 + 534 @ link register save eliminated. + 535 0000 7047 bx lr + 537 0002 00BF .section .text.HAL_DAC_IRQHandler,"ax",%progbits + 538 .align 1 + 539 .p2align 2,,3 + 540 .global HAL_DAC_IRQHandler + 541 .syntax unified + 542 .thumb + 543 .thumb_func + 544 .fpu fpv4-sp-d16 + 546 HAL_DAC_IRQHandler: + ARM GAS /tmp/ccPNfLQn.s page 10 + + + 547 @ args = 0, pretend = 0, frame = 0 + 548 @ frame_needed = 0, uses_anonymous_args = 0 + 549 0000 0368 ldr r3, [r0] + 550 0002 1A68 ldr r2, [r3] + 551 0004 9104 lsls r1, r2, #18 + 552 0006 10B5 push {r4, lr} + 553 0008 0446 mov r4, r0 + 554 000a 02D5 bpl .L68 + 555 000c 5A6B ldr r2, [r3, #52] + 556 000e 9204 lsls r2, r2, #18 + 557 0010 18D4 bmi .L83 + 558 .L68: + 559 0012 1A68 ldr r2, [r3] + 560 0014 9100 lsls r1, r2, #2 + 561 0016 02D5 bpl .L67 + 562 0018 5A6B ldr r2, [r3, #52] + 563 001a 9200 lsls r2, r2, #2 + 564 001c 00D4 bmi .L84 + 565 .L67: + 566 001e 10BD pop {r4, pc} + 567 .L84: + 568 0020 0422 movs r2, #4 + 569 0022 2271 strb r2, [r4, #4] + 570 0024 2269 ldr r2, [r4, #16] + 571 0026 4FF00051 mov r1, #536870912 + 572 002a 42F00202 orr r2, r2, #2 + 573 002e 2261 str r2, [r4, #16] + 574 0030 5963 str r1, [r3, #52] + 575 0032 1A68 ldr r2, [r3] + 576 0034 22F08052 bic r2, r2, #268435456 + 577 0038 2046 mov r0, r4 + 578 003a 1A60 str r2, [r3] + 579 003c BDE81040 pop {r4, lr} + 580 0040 FFF7FEBF b HAL_DACEx_DMAUnderrunCallbackCh2 + 581 .L83: + 582 0044 0422 movs r2, #4 + 583 0046 0271 strb r2, [r0, #4] + 584 0048 0269 ldr r2, [r0, #16] + 585 004a 4FF40051 mov r1, #8192 + 586 004e 42F00102 orr r2, r2, #1 + 587 0052 0261 str r2, [r0, #16] + 588 0054 5963 str r1, [r3, #52] + 589 0056 1A68 ldr r2, [r3] + 590 0058 22F48052 bic r2, r2, #4096 + 591 005c 1A60 str r2, [r3] + 592 005e FFF7FEFF bl HAL_DAC_DMAUnderrunCallbackCh1 + 593 0062 2368 ldr r3, [r4] + 594 0064 D5E7 b .L68 + 596 0066 00BF .section .text.HAL_DAC_GetValue,"ax",%progbits + 597 .align 1 + 598 .p2align 2,,3 + 599 .global HAL_DAC_GetValue + 600 .syntax unified + 601 .thumb + 602 .thumb_func + 603 .fpu fpv4-sp-d16 + 605 HAL_DAC_GetValue: + ARM GAS /tmp/ccPNfLQn.s page 11 + + + 606 @ args = 0, pretend = 0, frame = 0 + 607 @ frame_needed = 0, uses_anonymous_args = 0 + 608 @ link register save eliminated. + 609 0000 0368 ldr r3, [r0] + 610 0002 09B9 cbnz r1, .L86 + 611 0004 D86A ldr r0, [r3, #44] + 612 0006 7047 bx lr + 613 .L86: + 614 0008 186B ldr r0, [r3, #48] + 615 000a 7047 bx lr + 617 .section .text.HAL_DAC_ConfigChannel,"ax",%progbits + 618 .align 1 + 619 .p2align 2,,3 + 620 .global HAL_DAC_ConfigChannel + 621 .syntax unified + 622 .thumb + 623 .thumb_func + 624 .fpu fpv4-sp-d16 + 626 HAL_DAC_ConfigChannel: + 627 @ args = 0, pretend = 0, frame = 0 + 628 @ frame_needed = 0, uses_anonymous_args = 0 + 629 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr} + 630 0004 4379 ldrb r3, [r0, #5] @ zero_extendqisi2 + 631 0006 8F68 ldr r7, [r1, #8] + 632 0008 012B cmp r3, #1 + 633 000a 00F0C680 beq .L107 + 634 000e 0123 movs r3, #1 + 635 0010 4371 strb r3, [r0, #5] + 636 0012 042F cmp r7, #4 + 637 0014 4FF00203 mov r3, #2 + 638 0018 0646 mov r6, r0 + 639 001a 0D46 mov r5, r1 + 640 001c 1446 mov r4, r2 + 641 001e 0371 strb r3, [r0, #4] + 642 0020 77D0 beq .L90 + 643 0022 0368 ldr r3, [r0] + 644 0024 02F01004 and r4, r2, #16 + 645 .L91: + 646 0028 EA69 ldr r2, [r5, #28] + 647 002a 012A cmp r2, #1 + 648 002c 08D1 bne .L97 + 649 002e 996B ldr r1, [r3, #56] + 650 0030 2A6A ldr r2, [r5, #32] + 651 0032 1F20 movs r0, #31 + 652 0034 A040 lsls r0, r0, r4 + 653 0036 A240 lsls r2, r2, r4 + 654 0038 21EA0001 bic r1, r1, r0 + 655 003c 0A43 orrs r2, r2, r1 + 656 003e 9A63 str r2, [r3, #56] + 657 .L97: + 658 0040 A969 ldr r1, [r5, #24] + 659 0042 D86B ldr r0, [r3, #60] + 660 0044 0722 movs r2, #7 + 661 0046 0129 cmp r1, #1 + 662 0048 02FA04FC lsl ip, r2, r4 + 663 004c 6A69 ldr r2, [r5, #20] + 664 004e 5ED0 beq .L115 + ARM GAS /tmp/ccPNfLQn.s page 12 + + + 665 0050 0229 cmp r1, #2 + 666 0052 16BF itet ne + 667 0054 B2FA82F1 clzne r1, r2 + 668 0058 0121 moveq r1, #1 + 669 005a 4909 lsrne r1, r1, #5 + 670 .L99: + 671 005c 1143 orrs r1, r1, r2 + 672 005e 2A79 ldrb r2, [r5, #4] @ zero_extendqisi2 + 673 0060 012A cmp r2, #1 + 674 0062 4FF40072 mov r2, #512 + 675 0066 4FF48078 mov r8, #256 + 676 006a 02FA04F2 lsl r2, r2, r4 + 677 006e 08FA04F8 lsl r8, r8, r4 + 678 0072 42EA0C02 orr r2, r2, ip + 679 0076 20EA0202 bic r2, r0, r2 + 680 007a 6FEA0808 mvn r8, r8 + 681 007e 08EA0208 and r8, r8, r2 + 682 0082 6A79 ldrb r2, [r5, #5] @ zero_extendqisi2 + 683 0084 47EA0107 orr r7, r7, r1 + 684 0088 08BF it eq + 685 008a 47F48077 orreq r7, r7, #256 + 686 008e 012A cmp r2, #1 + 687 0090 2A68 ldr r2, [r5] + 688 0092 08BF it eq + 689 0094 47F40077 orreq r7, r7, #512 + 690 0098 022A cmp r2, #2 + 691 009a 28F44048 bic r8, r8, #49152 + 692 009e 73D0 beq .L116 + 693 00a0 48EA0208 orr r8, r8, r2 + 694 .L105: + 695 00a4 A740 lsls r7, r7, r4 + 696 00a6 47EA0807 orr r7, r7, r8 + 697 00aa DF63 str r7, [r3, #60] + 698 00ac 1A68 ldr r2, [r3] + 699 00ae 4FF48041 mov r1, #16384 + 700 00b2 A140 lsls r1, r1, r4 + 701 00b4 22EA0102 bic r2, r2, r1 + 702 00b8 1A60 str r2, [r3] + 703 00ba D5E90312 ldrd r1, r2, [r5, #12] + 704 00be 1868 ldr r0, [r3] + 705 00c0 40F6FE75 movw r5, #4094 + 706 00c4 A540 lsls r5, r5, r4 + 707 00c6 20EA0505 bic r5, r0, r5 + 708 00ca 9201 lsls r2, r2, #6 + 709 00cc 01FA04F0 lsl r0, r1, r4 + 710 00d0 2843 orrs r0, r0, r5 + 711 00d2 C1F38301 ubfx r1, r1, #2, #4 + 712 00d6 02F47062 and r2, r2, #3840 + 713 00da 1860 str r0, [r3] + 714 00dc 0A43 orrs r2, r2, r1 + 715 00de 40F60F71 movw r1, #3855 + 716 00e2 01FA04F0 lsl r0, r1, r4 + 717 00e6 C025 movs r5, #192 + 718 00e8 1968 ldr r1, [r3] + 719 00ea A240 lsls r2, r2, r4 + 720 00ec 05FA04F4 lsl r4, r5, r4 + 721 00f0 21EA0404 bic r4, r1, r4 + ARM GAS /tmp/ccPNfLQn.s page 13 + + + 722 00f4 1C60 str r4, [r3] + 723 00f6 196E ldr r1, [r3, #96] + 724 00f8 21EA0001 bic r1, r1, r0 + 725 00fc 0024 movs r4, #0 + 726 00fe 0A43 orrs r2, r2, r1 + 727 0100 0121 movs r1, #1 + 728 0102 1A66 str r2, [r3, #96] + 729 0104 2046 mov r0, r4 + 730 0106 3171 strb r1, [r6, #4] + 731 0108 7471 strb r4, [r6, #5] + 732 .L89: + 733 010a BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 734 .L115: + 735 010e 0021 movs r1, #0 + 736 0110 A4E7 b .L99 + 737 .L90: + 738 0112 FFF7FEFF bl HAL_GetTick + 739 0116 0746 mov r7, r0 + 740 0118 2CB1 cbz r4, .L92 + 741 011a 14E0 b .L93 + 742 .L94: + 743 011c FFF7FEFF bl HAL_GetTick + 744 0120 C31B subs r3, r0, r7 + 745 0122 012B cmp r3, #1 + 746 0124 3CD8 bhi .L114 + 747 .L92: + 748 0126 3368 ldr r3, [r6] + 749 0128 5B6B ldr r3, [r3, #52] + 750 012a 1B04 lsls r3, r3, #16 + 751 012c F6D4 bmi .L94 + 752 012e 0120 movs r0, #1 + 753 0130 FFF7FEFF bl HAL_Delay + 754 0134 3368 ldr r3, [r6] + 755 0136 6A6A ldr r2, [r5, #36] + 756 0138 1A64 str r2, [r3, #64] + 757 013a 0EE0 b .L95 + 758 .L96: + 759 013c FFF7FEFF bl HAL_GetTick + 760 0140 C31B subs r3, r0, r7 + 761 0142 012B cmp r3, #1 + 762 0144 2CD8 bhi .L114 + 763 .L93: + 764 0146 3368 ldr r3, [r6] + 765 0148 5B6B ldr r3, [r3, #52] + 766 014a 002B cmp r3, #0 + 767 014c F6DB blt .L96 + 768 014e 0120 movs r0, #1 + 769 0150 FFF7FEFF bl HAL_Delay + 770 0154 3368 ldr r3, [r6] + 771 0156 6A6A ldr r2, [r5, #36] + 772 0158 5A64 str r2, [r3, #68] + 773 .L95: + 774 015a 9A6C ldr r2, [r3, #72] + 775 015c A96A ldr r1, [r5, #40] + 776 015e AF68 ldr r7, [r5, #8] + 777 0160 04F01004 and r4, r4, #16 + 778 0164 40F2FF30 movw r0, #1023 + ARM GAS /tmp/ccPNfLQn.s page 14 + + + 779 0168 A040 lsls r0, r0, r4 + 780 016a A140 lsls r1, r1, r4 + 781 016c 22EA0002 bic r2, r2, r0 + 782 0170 0A43 orrs r2, r2, r1 + 783 0172 9A64 str r2, [r3, #72] + 784 0174 DA6C ldr r2, [r3, #76] + 785 0176 E96A ldr r1, [r5, #44] + 786 0178 FF20 movs r0, #255 + 787 017a A040 lsls r0, r0, r4 + 788 017c A140 lsls r1, r1, r4 + 789 017e 22EA0002 bic r2, r2, r0 + 790 0182 0A43 orrs r2, r2, r1 + 791 0184 DA64 str r2, [r3, #76] + 792 0186 4FE7 b .L91 + 793 .L116: + 794 0188 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 795 018c 0C4B ldr r3, .L117 + 796 018e 9842 cmp r0, r3 + 797 0190 0ED9 bls .L104 + 798 0192 3368 ldr r3, [r6] + 799 0194 48F40048 orr r8, r8, #32768 + 800 0198 84E7 b .L105 + 801 .L107: + 802 019a 0220 movs r0, #2 + 803 019c BDE8F081 pop {r4, r5, r6, r7, r8, pc} + 804 .L114: + 805 01a0 3369 ldr r3, [r6, #16] + 806 01a2 0322 movs r2, #3 + 807 01a4 43F00803 orr r3, r3, #8 + 808 01a8 3361 str r3, [r6, #16] + 809 01aa 1046 mov r0, r2 + 810 01ac 3271 strb r2, [r6, #4] + 811 01ae ACE7 b .L89 + 812 .L104: + 813 01b0 044B ldr r3, .L117+4 + 814 01b2 9842 cmp r0, r3 + 815 01b4 88BF it hi + 816 01b6 48F48048 orrhi r8, r8, #16384 + 817 01ba 3368 ldr r3, [r6] + 818 01bc 72E7 b .L105 + 819 .L118: + 820 01be 00BF .align 2 + 821 .L117: + 822 01c0 00688909 .word 160000000 + 823 01c4 00B4C404 .word 80000000 + 825 .section .text.HAL_DAC_GetState,"ax",%progbits + 826 .align 1 + 827 .p2align 2,,3 + 828 .global HAL_DAC_GetState + 829 .syntax unified + 830 .thumb + 831 .thumb_func + 832 .fpu fpv4-sp-d16 + 834 HAL_DAC_GetState: + 835 @ args = 0, pretend = 0, frame = 0 + 836 @ frame_needed = 0, uses_anonymous_args = 0 + 837 @ link register save eliminated. + ARM GAS /tmp/ccPNfLQn.s page 15 + + + 838 0000 0079 ldrb r0, [r0, #4] @ zero_extendqisi2 + 839 0002 7047 bx lr + 841 .section .text.HAL_DAC_GetError,"ax",%progbits + 842 .align 1 + 843 .p2align 2,,3 + 844 .global HAL_DAC_GetError + 845 .syntax unified + 846 .thumb + 847 .thumb_func + 848 .fpu fpv4-sp-d16 + 850 HAL_DAC_GetError: + 851 @ args = 0, pretend = 0, frame = 0 + 852 @ frame_needed = 0, uses_anonymous_args = 0 + 853 @ link register save eliminated. + 854 0000 0069 ldr r0, [r0, #16] + 855 0002 7047 bx lr + 857 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccPNfLQn.s page 16 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_dac.c + /tmp/ccPNfLQn.s:16 .text.HAL_DAC_MspInit:0000000000000000 $t + /tmp/ccPNfLQn.s:25 .text.HAL_DAC_MspInit:0000000000000000 HAL_DAC_MspInit + /tmp/ccPNfLQn.s:32 .text.HAL_DAC_Init:0000000000000000 $t + /tmp/ccPNfLQn.s:40 .text.HAL_DAC_Init:0000000000000000 HAL_DAC_Init + /tmp/ccPNfLQn.s:67 .text.HAL_DAC_MspDeInit:0000000000000000 $t + /tmp/ccPNfLQn.s:75 .text.HAL_DAC_MspDeInit:0000000000000000 HAL_DAC_MspDeInit + /tmp/ccPNfLQn.s:82 .text.HAL_DAC_DeInit:0000000000000000 $t + /tmp/ccPNfLQn.s:90 .text.HAL_DAC_DeInit:0000000000000000 HAL_DAC_DeInit + /tmp/ccPNfLQn.s:109 .text.HAL_DAC_Start:0000000000000000 $t + /tmp/ccPNfLQn.s:117 .text.HAL_DAC_Start:0000000000000000 HAL_DAC_Start + /tmp/ccPNfLQn.s:172 .text.HAL_DAC_Stop:0000000000000000 $t + /tmp/ccPNfLQn.s:180 .text.HAL_DAC_Stop:0000000000000000 HAL_DAC_Stop + /tmp/ccPNfLQn.s:199 .text.HAL_DAC_Start_DMA:0000000000000000 $t + /tmp/ccPNfLQn.s:207 .text.HAL_DAC_Start_DMA:0000000000000000 HAL_DAC_Start_DMA + /tmp/ccPNfLQn.s:319 .text.HAL_DAC_Start_DMA:00000000000000f4 $d + /tmp/ccPNfLQn.s:441 .text.DAC_DMAConvCpltCh1:0000000000000000 DAC_DMAConvCpltCh1 + /tmp/ccPNfLQn.s:476 .text.DAC_DMAHalfConvCpltCh1:0000000000000000 DAC_DMAHalfConvCpltCh1 + /tmp/ccPNfLQn.s:508 .text.DAC_DMAErrorCh1:0000000000000000 DAC_DMAErrorCh1 + /tmp/ccPNfLQn.s:327 .text.HAL_DAC_Stop_DMA:0000000000000000 $t + /tmp/ccPNfLQn.s:335 .text.HAL_DAC_Stop_DMA:0000000000000000 HAL_DAC_Stop_DMA + /tmp/ccPNfLQn.s:378 .text.HAL_DAC_SetValue:0000000000000000 $t + /tmp/ccPNfLQn.s:386 .text.HAL_DAC_SetValue:0000000000000000 HAL_DAC_SetValue + /tmp/ccPNfLQn.s:418 .text.HAL_DAC_ConvCpltCallbackCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:426 .text.HAL_DAC_ConvCpltCallbackCh1:0000000000000000 HAL_DAC_ConvCpltCallbackCh1 + /tmp/ccPNfLQn.s:433 .text.DAC_DMAConvCpltCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:453 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:461 .text.HAL_DAC_ConvHalfCpltCallbackCh1:0000000000000000 HAL_DAC_ConvHalfCpltCallbackCh1 + /tmp/ccPNfLQn.s:468 .text.DAC_DMAHalfConvCpltCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:485 .text.HAL_DAC_ErrorCallbackCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:493 .text.HAL_DAC_ErrorCallbackCh1:0000000000000000 HAL_DAC_ErrorCallbackCh1 + /tmp/ccPNfLQn.s:500 .text.DAC_DMAErrorCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:523 .text.HAL_DAC_DMAUnderrunCallbackCh1:0000000000000000 $t + /tmp/ccPNfLQn.s:531 .text.HAL_DAC_DMAUnderrunCallbackCh1:0000000000000000 HAL_DAC_DMAUnderrunCallbackCh1 + /tmp/ccPNfLQn.s:538 .text.HAL_DAC_IRQHandler:0000000000000000 $t + /tmp/ccPNfLQn.s:546 .text.HAL_DAC_IRQHandler:0000000000000000 HAL_DAC_IRQHandler + /tmp/ccPNfLQn.s:597 .text.HAL_DAC_GetValue:0000000000000000 $t + /tmp/ccPNfLQn.s:605 .text.HAL_DAC_GetValue:0000000000000000 HAL_DAC_GetValue + /tmp/ccPNfLQn.s:618 .text.HAL_DAC_ConfigChannel:0000000000000000 $t + /tmp/ccPNfLQn.s:626 .text.HAL_DAC_ConfigChannel:0000000000000000 HAL_DAC_ConfigChannel + /tmp/ccPNfLQn.s:822 .text.HAL_DAC_ConfigChannel:00000000000001c0 $d + /tmp/ccPNfLQn.s:826 .text.HAL_DAC_GetState:0000000000000000 $t + /tmp/ccPNfLQn.s:834 .text.HAL_DAC_GetState:0000000000000000 HAL_DAC_GetState + /tmp/ccPNfLQn.s:842 .text.HAL_DAC_GetError:0000000000000000 $t + /tmp/ccPNfLQn.s:850 .text.HAL_DAC_GetError:0000000000000000 HAL_DAC_GetError + +UNDEFINED SYMBOLS +HAL_Delay +HAL_DMA_Start_IT +DAC_DMAConvCpltCh2 +DAC_DMAHalfConvCpltCh2 +DAC_DMAErrorCh2 +HAL_DMA_Abort +HAL_DACEx_DMAUnderrunCallbackCh2 +HAL_GetTick +HAL_RCC_GetHCLKFreq + ARM GAS /tmp/ccPNfLQn.s page 17 + + diff --git a/codice/build/stm32g4xx_hal_dac.o b/codice/build/stm32g4xx_hal_dac.o new file mode 100644 index 0000000000000000000000000000000000000000..f6368d140ec2bc274bef46d6136b3ac3c127fde0 GIT binary patch literal 5840 zcma)AZERE58Gg^b*VuR=GfsdcgmPntGzrAZS64(Sbz*X31{oh=NbOc)CoxE3hR_j%6qo_o%Dk5BTwjw2dl40vHs3u_jD?lKTtt5MZL9pa;%Fn{5iYet?> zG&#L0y>tz{QWf)5#l2xqyi9Y=wZ~Wg`*ij35>tsw&oSgnUgR4HsA@PASL3cZVl2-D zCfIJ@qM}JP9=#^c)KGkrW=p&5n{`;RKmJOfBt&{1eQ35sm(vI2>+SNbZat7@a(4(+ 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Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_dma.lst b/codice/build/stm32g4xx_hal_dma.lst new file mode 100644 index 0000000..47082e2 --- /dev/null +++ b/codice/build/stm32g4xx_hal_dma.lst @@ -0,0 +1,996 @@ +ARM GAS /tmp/ccsbVi89.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_dma.c" + 14 .text + 15 .section .text.HAL_DMA_Init,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_DMA_Init + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_DMA_Init: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 0028 cmp r0, #0 + 29 0002 78D0 beq .L9 + 30 0004 70B5 push {r4, r5, r6, lr} + 31 0006 3D4B ldr r3, .L18 + 32 0008 0468 ldr r4, [r0] + 33 000a 9C42 cmp r4, r3 + 34 000c 5FD9 bls .L16 + 35 000e 3C4A ldr r2, .L18+4 + 36 0010 3C4B ldr r3, .L18+8 + 37 0012 3D49 ldr r1, .L18+12 + 38 0014 2244 add r2, r2, r4 + 39 0016 A3FB0232 umull r3, r2, r3, r2 + 40 001a 1209 lsrs r2, r2, #4 + 41 001c 9200 lsls r2, r2, #2 + 42 .L4: + 43 001e 0223 movs r3, #2 + 44 0020 8568 ldr r5, [r0, #8] + 45 0022 80F82530 strb r3, [r0, #37] + 46 0026 C368 ldr r3, [r0, #12] + 47 0028 C669 ldr r6, [r0, #28] + 48 002a C0E91012 strd r1, r2, [r0, #64] + 49 002e 0169 ldr r1, [r0, #16] + 50 0030 2B43 orrs r3, r3, r5 + 51 0032 0B43 orrs r3, r3, r1 + 52 0034 4169 ldr r1, [r0, #20] + 53 0036 0B43 orrs r3, r3, r1 + 54 0038 8169 ldr r1, [r0, #24] + 55 003a 0B43 orrs r3, r3, r1 + 56 003c 3343 orrs r3, r3, r6 + 57 003e 5FFA84FC uxtb ip, r4 + 58 0042 304E ldr r6, .L18+8 + ARM GAS /tmp/ccsbVi89.s page 2 + + + 59 0044 2168 ldr r1, [r4] + 60 0046 ACF1080C sub ip, ip, #8 + 61 004a A6FB0C6C umull r6, ip, r6, ip + 62 004e 066A ldr r6, [r0, #32] + 63 0050 21F4FF41 bic r1, r1, #32640 + 64 0054 21F07001 bic r1, r1, #112 + 65 0058 3343 orrs r3, r3, r6 + 66 005a 0B43 orrs r3, r3, r1 + 67 005c 2360 str r3, [r4] + 68 005e 2B4E ldr r6, .L18+16 + 69 0060 264B ldr r3, .L18 + 70 0062 2B49 ldr r1, .L18+20 + 71 0064 CCF3041C ubfx ip, ip, #4, #5 + 72 0068 9C42 cmp r4, r3 + 73 006a 98BF it ls + 74 006c 3146 movls r1, r6 + 75 006e 4FF0010E mov lr, #1 + 76 0072 284C ldr r4, .L18+24 + 77 0074 C464 str r4, [r0, #76] + 78 0076 0EFA0CF3 lsl r3, lr, ip + 79 007a 5418 adds r4, r2, r1 + 80 007c B5F5804F cmp r5, #16384 + 81 0080 0365 str r3, [r0, #80] + 82 0082 8464 str r4, [r0, #72] + 83 0084 4FEA9202 lsr r2, r2, #2 + 84 0088 2AD0 beq .L17 + 85 008a 4568 ldr r5, [r0, #4] + 86 008c ECB2 uxtb r4, r5 + 87 008e 013D subs r5, r5, #1 + 88 0090 032D cmp r5, #3 + 89 0092 41F82240 str r4, [r1, r2, lsl #2] + 90 0096 C6F88430 str r3, [r6, #132] + 91 009a 27D8 bhi .L7 + 92 009c 1E4B ldr r3, .L18+28 + 93 009e 1F49 ldr r1, .L18+32 + 94 00a0 2344 add r3, r3, r4 + 95 00a2 013C subs r4, r4, #1 + 96 00a4 9B00 lsls r3, r3, #2 + 97 00a6 04F01F04 and r4, r4, #31 + 98 00aa 0EFA04F4 lsl r4, lr, r4 + 99 00ae 0022 movs r2, #0 + 100 00b0 C0E91531 strd r3, r1, [r0, #84] + 101 00b4 C465 str r4, [r0, #92] + 102 00b6 1A60 str r2, [r3] + 103 00b8 194B ldr r3, .L18+36 + 104 00ba 5C64 str r4, [r3, #68] + 105 .L8: + 106 00bc 0023 movs r3, #0 + 107 00be 0122 movs r2, #1 + 108 00c0 C363 str r3, [r0, #60] + 109 00c2 80F82430 strb r3, [r0, #36] + 110 00c6 80F82520 strb r2, [r0, #37] + 111 00ca 1846 mov r0, r3 + 112 00cc 70BD pop {r4, r5, r6, pc} + 113 .L16: + 114 00ce 154A ldr r2, .L18+40 + 115 00d0 0C4B ldr r3, .L18+8 + ARM GAS /tmp/ccsbVi89.s page 3 + + + 116 00d2 1549 ldr r1, .L18+44 + 117 00d4 2244 add r2, r2, r4 + 118 00d6 A3FB0232 umull r3, r2, r3, r2 + 119 00da 1209 lsrs r2, r2, #4 + 120 00dc 9200 lsls r2, r2, #2 + 121 00de 9EE7 b .L4 + 122 .L17: + 123 00e0 0024 movs r4, #0 + 124 00e2 4460 str r4, [r0, #4] + 125 00e4 41F82240 str r4, [r1, r2, lsl #2] + 126 00e8 C6F88430 str r3, [r6, #132] + 127 .L7: + 128 00ec 0023 movs r3, #0 + 129 00ee C0E91533 strd r3, r3, [r0, #84] + 130 00f2 C365 str r3, [r0, #92] + 131 00f4 E2E7 b .L8 + 132 .L9: + 133 00f6 0120 movs r0, #1 + 134 00f8 7047 bx lr + 135 .L19: + 136 00fa 00BF .align 2 + 137 .L18: + 138 00fc 07040240 .word 1073873927 + 139 0100 F8FBFDBF .word -1073873928 + 140 0104 CDCCCCCC .word -858993459 + 141 0108 00040240 .word 1073873920 + 142 010c 00080240 .word 1073874944 + 143 0110 20080240 .word 1073874976 + 144 0114 80080240 .word 1073875072 + 145 0118 3F820010 .word 268468799 + 146 011c 40090240 .word 1073875264 + 147 0120 00090240 .word 1073875200 + 148 0124 F8FFFDBF .word -1073872904 + 149 0128 00000240 .word 1073872896 + 151 .section .text.HAL_DMA_DeInit,"ax",%progbits + 152 .align 1 + 153 .p2align 2,,3 + 154 .global HAL_DMA_DeInit + 155 .syntax unified + 156 .thumb + 157 .thumb_func + 158 .fpu fpv4-sp-d16 + 160 HAL_DMA_DeInit: + 161 @ args = 0, pretend = 0, frame = 0 + 162 @ frame_needed = 0, uses_anonymous_args = 0 + 163 @ link register save eliminated. + 164 0000 0028 cmp r0, #0 + 165 0002 5FD0 beq .L25 + 166 0004 0368 ldr r3, [r0] + 167 0006 3049 ldr r1, .L31 + 168 0008 1A68 ldr r2, [r3] + 169 000a 8B42 cmp r3, r1 + 170 000c 22F00102 bic r2, r2, #1 + 171 0010 30B4 push {r4, r5} + 172 0012 1A60 str r2, [r3] + 173 0014 43D9 bls .L30 + 174 0016 2D4A ldr r2, .L31+4 + ARM GAS /tmp/ccsbVi89.s page 4 + + + 175 0018 2D49 ldr r1, .L31+8 + 176 001a 2E4C ldr r4, .L31+12 + 177 001c 1A44 add r2, r2, r3 + 178 001e A1FB0212 umull r1, r2, r1, r2 + 179 0022 1209 lsrs r2, r2, #4 + 180 0024 9200 lsls r2, r2, #2 + 181 0026 0021 movs r1, #0 + 182 0028 C0E91042 strd r4, r2, [r0, #64] + 183 002c 02F01F05 and r5, r2, #31 + 184 0030 1960 str r1, [r3] + 185 0032 0121 movs r1, #1 + 186 0034 A940 lsls r1, r1, r5 + 187 0036 6160 str r1, [r4, #4] + 188 0038 2749 ldr r1, .L31+16 + 189 .L23: + 190 003a 284D ldr r5, .L31+20 + 191 003c 4FEA920C lsr ip, r2, #2 + 192 0040 0A44 add r2, r2, r1 + 193 0042 8264 str r2, [r0, #72] + 194 0044 264A ldr r2, .L31+24 + 195 0046 C264 str r2, [r0, #76] + 196 0048 DBB2 uxtb r3, r3 + 197 004a 214A ldr r2, .L31+8 + 198 004c 083B subs r3, r3, #8 + 199 004e A2FB0323 umull r2, r3, r2, r3 + 200 0052 C3F30413 ubfx r3, r3, #4, #5 + 201 0056 0122 movs r2, #1 + 202 0058 02FA03F3 lsl r3, r2, r3 + 203 005c 0024 movs r4, #0 + 204 005e 0365 str r3, [r0, #80] + 205 0060 41F82C40 str r4, [r1, ip, lsl #2] + 206 0064 C5F88430 str r3, [r5, #132] + 207 0068 4168 ldr r1, [r0, #4] + 208 006a 4B1E subs r3, r1, #1 + 209 006c 032B cmp r3, #3 + 210 006e 06D8 bhi .L24 + 211 0070 9A40 lsls r2, r2, r3 + 212 0072 1C4B ldr r3, .L31+28 + 213 0074 0B44 add r3, r3, r1 + 214 0076 9B00 lsls r3, r3, #2 + 215 0078 1C60 str r4, [r3] + 216 007a C5F84421 str r2, [r5, #324] + 217 .L24: + 218 007e 0023 movs r3, #0 + 219 0080 C363 str r3, [r0, #60] + 220 0082 80F82430 strb r3, [r0, #36] + 221 0086 80F82530 strb r3, [r0, #37] + 222 008a C0E91533 strd r3, r3, [r0, #84] + 223 008e C0E90B33 strd r3, r3, [r0, #44] + 224 0092 C0E90D33 strd r3, r3, [r0, #52] + 225 0096 C365 str r3, [r0, #92] + 226 0098 30BC pop {r4, r5} + 227 009a 1846 mov r0, r3 + 228 009c 7047 bx lr + 229 .L30: + 230 009e 124A ldr r2, .L31+32 + 231 00a0 0B49 ldr r1, .L31+8 + ARM GAS /tmp/ccsbVi89.s page 5 + + + 232 00a2 124C ldr r4, .L31+36 + 233 00a4 1A44 add r2, r2, r3 + 234 00a6 A1FB0212 umull r1, r2, r1, r2 + 235 00aa 1209 lsrs r2, r2, #4 + 236 00ac 9200 lsls r2, r2, #2 + 237 00ae 0021 movs r1, #0 + 238 00b0 C0E91042 strd r4, r2, [r0, #64] + 239 00b4 02F01F05 and r5, r2, #31 + 240 00b8 1960 str r1, [r3] + 241 00ba 0121 movs r1, #1 + 242 00bc A940 lsls r1, r1, r5 + 243 00be 6160 str r1, [r4, #4] + 244 00c0 0649 ldr r1, .L31+20 + 245 00c2 BAE7 b .L23 + 246 .L25: + 247 00c4 0120 movs r0, #1 + 248 00c6 7047 bx lr + 249 .L32: + 250 .align 2 + 251 .L31: + 252 00c8 07040240 .word 1073873927 + 253 00cc F8FBFDBF .word -1073873928 + 254 00d0 CDCCCCCC .word -858993459 + 255 00d4 00040240 .word 1073873920 + 256 00d8 20080240 .word 1073874976 + 257 00dc 00080240 .word 1073874944 + 258 00e0 80080240 .word 1073875072 + 259 00e4 3F820010 .word 268468799 + 260 00e8 F8FFFDBF .word -1073872904 + 261 00ec 00000240 .word 1073872896 + 263 .section .text.HAL_DMA_Start,"ax",%progbits + 264 .align 1 + 265 .p2align 2,,3 + 266 .global HAL_DMA_Start + 267 .syntax unified + 268 .thumb + 269 .thumb_func + 270 .fpu fpv4-sp-d16 + 272 HAL_DMA_Start: + 273 @ args = 0, pretend = 0, frame = 0 + 274 @ frame_needed = 0, uses_anonymous_args = 0 + 275 @ link register save eliminated. + 276 0000 F0B4 push {r4, r5, r6, r7} + 277 0002 90F82440 ldrb r4, [r0, #36] @ zero_extendqisi2 + 278 0006 012C cmp r4, #1 + 279 0008 35D0 beq .L39 + 280 000a 0124 movs r4, #1 + 281 000c 80F82440 strb r4, [r0, #36] + 282 0010 90F82540 ldrb r4, [r0, #37] @ zero_extendqisi2 + 283 0014 012C cmp r4, #1 + 284 0016 05D0 beq .L44 + 285 0018 0023 movs r3, #0 + 286 001a 80F82430 strb r3, [r0, #36] + 287 001e F0BC pop {r4, r5, r6, r7} + 288 0020 0220 movs r0, #2 + 289 0022 7047 bx lr + 290 .L44: + ARM GAS /tmp/ccsbVi89.s page 6 + + + 291 0024 0224 movs r4, #2 + 292 0026 80F82540 strb r4, [r0, #37] + 293 002a 0024 movs r4, #0 + 294 002c C463 str r4, [r0, #60] + 295 002e 0468 ldr r4, [r0] + 296 0030 C66C ldr r6, [r0, #76] + 297 0032 2568 ldr r5, [r4] + 298 0034 25F00105 bic r5, r5, #1 + 299 0038 2560 str r5, [r4] + 300 003a D0E91475 ldrd r7, r5, [r0, #80] + 301 003e 7760 str r7, [r6, #4] + 302 0040 15B1 cbz r5, .L36 + 303 0042 D0E91656 ldrd r5, r6, [r0, #88] + 304 0046 6E60 str r6, [r5, #4] + 305 .L36: + 306 0048 456C ldr r5, [r0, #68] + 307 004a 066C ldr r6, [r0, #64] + 308 004c 05F01F0C and ip, r5, #31 + 309 0050 8568 ldr r5, [r0, #8] + 310 0052 0120 movs r0, #1 + 311 0054 102D cmp r5, #16 + 312 0056 00FA0CF0 lsl r0, r0, ip + 313 005a 7060 str r0, [r6, #4] + 314 005c 6360 str r3, [r4, #4] + 315 005e 0BBF itete eq + 316 0060 A260 streq r2, [r4, #8] + 317 0062 A160 strne r1, [r4, #8] + 318 0064 E160 streq r1, [r4, #12] + 319 0066 E260 strne r2, [r4, #12] + 320 0068 2368 ldr r3, [r4] + 321 006a 43F00103 orr r3, r3, #1 + 322 006e 0020 movs r0, #0 + 323 0070 2360 str r3, [r4] + 324 0072 F0BC pop {r4, r5, r6, r7} + 325 0074 7047 bx lr + 326 .L39: + 327 0076 0220 movs r0, #2 + 328 0078 F0BC pop {r4, r5, r6, r7} + 329 007a 7047 bx lr + 331 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 332 .align 1 + 333 .p2align 2,,3 + 334 .global HAL_DMA_Start_IT + 335 .syntax unified + 336 .thumb + 337 .thumb_func + 338 .fpu fpv4-sp-d16 + 340 HAL_DMA_Start_IT: + 341 @ args = 0, pretend = 0, frame = 0 + 342 @ frame_needed = 0, uses_anonymous_args = 0 + 343 @ link register save eliminated. + 344 0000 F0B4 push {r4, r5, r6, r7} + 345 0002 90F82440 ldrb r4, [r0, #36] @ zero_extendqisi2 + 346 0006 012C cmp r4, #1 + 347 0008 51D0 beq .L55 + 348 000a 0124 movs r4, #1 + 349 000c 80F82440 strb r4, [r0, #36] + ARM GAS /tmp/ccsbVi89.s page 7 + + + 350 0010 90F82540 ldrb r4, [r0, #37] @ zero_extendqisi2 + 351 0014 012C cmp r4, #1 + 352 0016 05D0 beq .L66 + 353 0018 0023 movs r3, #0 + 354 001a 80F82430 strb r3, [r0, #36] + 355 001e F0BC pop {r4, r5, r6, r7} + 356 0020 0220 movs r0, #2 + 357 0022 7047 bx lr + 358 .L66: + 359 0024 0224 movs r4, #2 + 360 0026 80F82540 strb r4, [r0, #37] + 361 002a 0024 movs r4, #0 + 362 002c C463 str r4, [r0, #60] + 363 002e 0468 ldr r4, [r0] + 364 0030 C66C ldr r6, [r0, #76] + 365 0032 2568 ldr r5, [r4] + 366 0034 25F00105 bic r5, r5, #1 + 367 0038 2560 str r5, [r4] + 368 003a D0E91475 ldrd r7, r5, [r0, #80] + 369 003e 7760 str r7, [r6, #4] + 370 0040 15B1 cbz r5, .L48 + 371 0042 D0E91667 ldrd r6, r7, [r0, #88] + 372 0046 7760 str r7, [r6, #4] + 373 .L48: + 374 0048 466C ldr r6, [r0, #68] + 375 004a 076C ldr r7, [r0, #64] + 376 004c 06F01F0C and ip, r6, #31 + 377 0050 0126 movs r6, #1 + 378 0052 06FA0CF6 lsl r6, r6, ip + 379 0056 7E60 str r6, [r7, #4] + 380 0058 6360 str r3, [r4, #4] + 381 005a 8368 ldr r3, [r0, #8] + 382 005c 102B cmp r3, #16 + 383 005e 036B ldr r3, [r0, #48] + 384 0060 0BBF itete eq + 385 0062 A260 streq r2, [r4, #8] + 386 0064 A160 strne r1, [r4, #8] + 387 0066 E160 streq r1, [r4, #12] + 388 0068 E260 strne r2, [r4, #12] + 389 006a BBB1 cbz r3, .L51 + 390 006c 2368 ldr r3, [r4] + 391 006e 43F00E03 orr r3, r3, #14 + 392 0072 2360 str r3, [r4] + 393 .L52: + 394 0074 836C ldr r3, [r0, #72] + 395 0076 1A68 ldr r2, [r3] + 396 0078 D203 lsls r2, r2, #15 + 397 007a 03D5 bpl .L53 + 398 007c 1A68 ldr r2, [r3] + 399 007e 42F48072 orr r2, r2, #256 + 400 0082 1A60 str r2, [r3] + 401 .L53: + 402 0084 1DB1 cbz r5, .L54 + 403 0086 2B68 ldr r3, [r5] + 404 0088 43F48073 orr r3, r3, #256 + 405 008c 2B60 str r3, [r5] + 406 .L54: + ARM GAS /tmp/ccsbVi89.s page 8 + + + 407 008e 2368 ldr r3, [r4] + 408 0090 43F00103 orr r3, r3, #1 + 409 0094 0020 movs r0, #0 + 410 0096 2360 str r3, [r4] + 411 0098 F0BC pop {r4, r5, r6, r7} + 412 009a 7047 bx lr + 413 .L51: + 414 009c 2368 ldr r3, [r4] + 415 009e 23F00403 bic r3, r3, #4 + 416 00a2 2360 str r3, [r4] + 417 00a4 2368 ldr r3, [r4] + 418 00a6 43F00A03 orr r3, r3, #10 + 419 00aa 2360 str r3, [r4] + 420 00ac E2E7 b .L52 + 421 .L55: + 422 00ae 0220 movs r0, #2 + 423 00b0 F0BC pop {r4, r5, r6, r7} + 424 00b2 7047 bx lr + 426 .section .text.HAL_DMA_Abort,"ax",%progbits + 427 .align 1 + 428 .p2align 2,,3 + 429 .global HAL_DMA_Abort + 430 .syntax unified + 431 .thumb + 432 .thumb_func + 433 .fpu fpv4-sp-d16 + 435 HAL_DMA_Abort: + 436 @ args = 0, pretend = 0, frame = 0 + 437 @ frame_needed = 0, uses_anonymous_args = 0 + 438 @ link register save eliminated. + 439 0000 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2 + 440 0004 022A cmp r2, #2 + 441 0006 0346 mov r3, r0 + 442 0008 09D0 beq .L68 + 443 000a 0422 movs r2, #4 + 444 000c C263 str r2, [r0, #60] + 445 000e 0121 movs r1, #1 + 446 0010 0022 movs r2, #0 + 447 0012 0120 movs r0, #1 + 448 0014 83F82510 strb r1, [r3, #37] + 449 0018 83F82420 strb r2, [r3, #36] + 450 001c 7047 bx lr + 451 .L68: + 452 001e 0268 ldr r2, [r0] + 453 0020 596C ldr r1, [r3, #68] + 454 0022 30B4 push {r4, r5} + 455 0024 846C ldr r4, [r0, #72] + 456 0026 1068 ldr r0, [r2] + 457 0028 1D6C ldr r5, [r3, #64] + 458 002a 20F00E00 bic r0, r0, #14 + 459 002e 1060 str r0, [r2] + 460 0030 2068 ldr r0, [r4] + 461 0032 20F48070 bic r0, r0, #256 + 462 0036 2060 str r0, [r4] + 463 0038 1068 ldr r0, [r2] + 464 003a DC6C ldr r4, [r3, #76] + 465 003c 20F00100 bic r0, r0, #1 + ARM GAS /tmp/ccsbVi89.s page 9 + + + 466 0040 1060 str r0, [r2] + 467 0042 01F01F01 and r1, r1, #31 + 468 0046 0122 movs r2, #1 + 469 0048 8A40 lsls r2, r2, r1 + 470 004a D3E91410 ldrd r1, r0, [r3, #80] + 471 004e 6A60 str r2, [r5, #4] + 472 0050 6160 str r1, [r4, #4] + 473 0052 38B1 cbz r0, .L69 + 474 0054 0268 ldr r2, [r0] + 475 0056 D3E91614 ldrd r1, r4, [r3, #88] + 476 005a 22F48072 bic r2, r2, #256 + 477 005e 0260 str r2, [r0] + 478 0060 4C60 str r4, [r1, #4] + 479 0062 0020 movs r0, #0 + 480 .L69: + 481 0064 0121 movs r1, #1 + 482 0066 0022 movs r2, #0 + 483 0068 83F82510 strb r1, [r3, #37] + 484 006c 83F82420 strb r2, [r3, #36] + 485 0070 30BC pop {r4, r5} + 486 0072 7047 bx lr + 488 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 489 .align 1 + 490 .p2align 2,,3 + 491 .global HAL_DMA_Abort_IT + 492 .syntax unified + 493 .thumb + 494 .thumb_func + 495 .fpu fpv4-sp-d16 + 497 HAL_DMA_Abort_IT: + 498 @ args = 0, pretend = 0, frame = 0 + 499 @ frame_needed = 0, uses_anonymous_args = 0 + 500 0000 38B5 push {r3, r4, r5, lr} + 501 0002 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2 + 502 0006 022B cmp r3, #2 + 503 0008 09D0 beq .L75 + 504 000a 0123 movs r3, #1 + 505 000c 0421 movs r1, #4 + 506 000e 0022 movs r2, #0 + 507 0010 C163 str r1, [r0, #60] + 508 0012 80F82420 strb r2, [r0, #36] + 509 0016 80F82530 strb r3, [r0, #37] + 510 001a 1846 mov r0, r3 + 511 001c 38BD pop {r3, r4, r5, pc} + 512 .L75: + 513 001e 0368 ldr r3, [r0] + 514 0020 846C ldr r4, [r0, #72] + 515 0022 1968 ldr r1, [r3] + 516 0024 426C ldr r2, [r0, #68] + 517 0026 056C ldr r5, [r0, #64] + 518 0028 21F00E01 bic r1, r1, #14 + 519 002c 1960 str r1, [r3] + 520 002e 1968 ldr r1, [r3] + 521 0030 21F00101 bic r1, r1, #1 + 522 0034 1960 str r1, [r3] + 523 0036 2368 ldr r3, [r4] + 524 0038 C16C ldr r1, [r0, #76] + ARM GAS /tmp/ccsbVi89.s page 10 + + + 525 003a 23F48073 bic r3, r3, #256 + 526 003e 2360 str r3, [r4] + 527 0040 02F01F02 and r2, r2, #31 + 528 0044 0123 movs r3, #1 + 529 0046 9340 lsls r3, r3, r2 + 530 0048 D0E91442 ldrd r4, r2, [r0, #80] + 531 004c 6B60 str r3, [r5, #4] + 532 004e 4C60 str r4, [r1, #4] + 533 0050 32B1 cbz r2, .L77 + 534 0052 1368 ldr r3, [r2] + 535 0054 D0E91614 ldrd r1, r4, [r0, #88] + 536 0058 23F48073 bic r3, r3, #256 + 537 005c 1360 str r3, [r2] + 538 005e 4C60 str r4, [r1, #4] + 539 .L77: + 540 0060 836B ldr r3, [r0, #56] + 541 0062 0122 movs r2, #1 + 542 0064 0024 movs r4, #0 + 543 0066 80F82520 strb r2, [r0, #37] + 544 006a 80F82440 strb r4, [r0, #36] + 545 006e 13B1 cbz r3, .L78 + 546 0070 9847 blx r3 + 547 0072 2046 mov r0, r4 + 548 0074 38BD pop {r3, r4, r5, pc} + 549 .L78: + 550 0076 1846 mov r0, r3 + 551 0078 38BD pop {r3, r4, r5, pc} + 553 007a 00BF .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 554 .align 1 + 555 .p2align 2,,3 + 556 .global HAL_DMA_PollForTransfer + 557 .syntax unified + 558 .thumb + 559 .thumb_func + 560 .fpu fpv4-sp-d16 + 562 HAL_DMA_PollForTransfer: + 563 @ args = 0, pretend = 0, frame = 0 + 564 @ frame_needed = 0, uses_anonymous_args = 0 + 565 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 566 0004 90F82530 ldrb r3, [r0, #37] @ zero_extendqisi2 + 567 0008 022B cmp r3, #2 + 568 000a 0446 mov r4, r0 + 569 000c 07D0 beq .L84 + 570 000e 0422 movs r2, #4 + 571 0010 0023 movs r3, #0 + 572 0012 C263 str r2, [r0, #60] + 573 0014 80F82430 strb r3, [r0, #36] + 574 0018 0120 movs r0, #1 + 575 .L85: + 576 001a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 577 .L84: + 578 001e DDB2 uxtb r5, r3 + 579 0020 0368 ldr r3, [r0] + 580 0022 1B68 ldr r3, [r3] + 581 0024 9806 lsls r0, r3, #26 + 582 0026 44D4 bmi .L113 + 583 0028 636C ldr r3, [r4, #68] + ARM GAS /tmp/ccsbVi89.s page 11 + + + 584 002a 0E46 mov r6, r1 + 585 002c 1746 mov r7, r2 + 586 002e 0029 cmp r1, #0 + 587 0030 45D1 bne .L87 + 588 .L112: + 589 0032 03F01F03 and r3, r3, #31 + 590 0036 9D40 lsls r5, r5, r3 + 591 0038 FFF7FEFF bl HAL_GetTick + 592 003c 4FF00809 mov r9, #8 + 593 0040 8046 mov r8, r0 + 594 .L89: + 595 0042 D4E91032 ldrd r3, r2, [r4, #64] + 596 0046 02F01F0C and ip, r2, #31 + 597 004a 7A1C adds r2, r7, #1 + 598 004c 39D1 bne .L92 + 599 004e 0820 movs r0, #8 + 600 0050 00FA0CF0 lsl r0, r0, ip + 601 0054 02E0 b .L95 + 602 .L114: + 603 0056 1A68 ldr r2, [r3] + 604 0058 0242 tst r2, r0 + 605 005a 4BD1 bne .L94 + 606 .L95: + 607 005c 1A68 ldr r2, [r3] + 608 005e 2A42 tst r2, r5 + 609 0060 F9D0 beq .L114 + 610 .L93: + 611 0062 626D ldr r2, [r4, #84] + 612 0064 6AB1 cbz r2, .L97 + 613 0066 D4E91610 ldrd r1, r0, [r4, #88] + 614 006a 0D68 ldr r5, [r1] + 615 006c 0542 tst r5, r0 + 616 006e 08D0 beq .L97 + 617 0070 1568 ldr r5, [r2] + 618 0072 45F48075 orr r5, r5, #256 + 619 0076 1560 str r5, [r2] + 620 0078 4860 str r0, [r1, #4] + 621 007a E26B ldr r2, [r4, #60] + 622 007c 42F48062 orr r2, r2, #1024 + 623 0080 E263 str r2, [r4, #60] + 624 .L97: + 625 0082 D4E91321 ldrd r2, r1, [r4, #76] + 626 0086 1068 ldr r0, [r2] + 627 0088 0842 tst r0, r1 + 628 008a 04D0 beq .L98 + 629 008c 5160 str r1, [r2, #4] + 630 008e E26B ldr r2, [r4, #60] + 631 0090 42F40072 orr r2, r2, #512 + 632 0094 E263 str r2, [r4, #60] + 633 .L98: + 634 0096 002E cmp r6, #0 + 635 0098 39D1 bne .L99 + 636 009a 0222 movs r2, #2 + 637 009c 02FA0CF2 lsl r2, r2, ip + 638 00a0 0121 movs r1, #1 + 639 00a2 5A60 str r2, [r3, #4] + 640 00a4 84F82510 strb r1, [r4, #37] + ARM GAS /tmp/ccsbVi89.s page 12 + + + 641 .L100: + 642 00a8 0020 movs r0, #0 + 643 00aa 84F82400 strb r0, [r4, #36] + 644 00ae BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 645 .L113: + 646 00b2 4FF48073 mov r3, #256 + 647 00b6 E363 str r3, [r4, #60] + 648 00b8 0120 movs r0, #1 + 649 00ba BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 650 .L87: + 651 00be 0425 movs r5, #4 + 652 00c0 B7E7 b .L112 + 653 .L92: + 654 00c2 1A68 ldr r2, [r3] + 655 00c4 2A42 tst r2, r5 + 656 00c6 CCD1 bne .L93 + 657 00c8 1A68 ldr r2, [r3] + 658 00ca 09FA0CF1 lsl r1, r9, ip + 659 00ce 1142 tst r1, r2 + 660 00d0 10D1 bne .L94 + 661 00d2 FFF7FEFF bl HAL_GetTick + 662 00d6 A0EB0800 sub r0, r0, r8 + 663 00da B842 cmp r0, r7 + 664 00dc 01D8 bhi .L91 + 665 00de 002F cmp r7, #0 + 666 00e0 AFD1 bne .L89 + 667 .L91: + 668 00e2 0120 movs r0, #1 + 669 00e4 2022 movs r2, #32 + 670 00e6 0023 movs r3, #0 + 671 00e8 E263 str r2, [r4, #60] + 672 00ea 84F82430 strb r3, [r4, #36] + 673 00ee 84F82500 strb r0, [r4, #37] + 674 00f2 92E7 b .L85 + 675 .L94: + 676 00f4 0122 movs r2, #1 + 677 00f6 02FA0CF0 lsl r0, r2, ip + 678 00fa 0021 movs r1, #0 + 679 00fc 5860 str r0, [r3, #4] + 680 00fe E263 str r2, [r4, #60] + 681 0100 84F82410 strb r1, [r4, #36] + 682 0104 84F82520 strb r2, [r4, #37] + 683 0108 1046 mov r0, r2 + 684 010a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 685 .L99: + 686 010e 0422 movs r2, #4 + 687 0110 02FA0CF2 lsl r2, r2, ip + 688 0114 5A60 str r2, [r3, #4] + 689 0116 C7E7 b .L100 + 691 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 692 .align 1 + 693 .p2align 2,,3 + 694 .global HAL_DMA_IRQHandler + 695 .syntax unified + 696 .thumb + 697 .thumb_func + 698 .fpu fpv4-sp-d16 + ARM GAS /tmp/ccsbVi89.s page 13 + + + 700 HAL_DMA_IRQHandler: + 701 @ args = 0, pretend = 0, frame = 0 + 702 @ frame_needed = 0, uses_anonymous_args = 0 + 703 @ link register save eliminated. + 704 0000 70B4 push {r4, r5, r6} + 705 0002 436C ldr r3, [r0, #68] + 706 0004 066C ldr r6, [r0, #64] + 707 0006 0568 ldr r5, [r0] + 708 0008 3168 ldr r1, [r6] + 709 000a 2C68 ldr r4, [r5] + 710 000c 03F01F03 and r3, r3, #31 + 711 0010 0422 movs r2, #4 + 712 0012 9A40 lsls r2, r2, r3 + 713 0014 0A42 tst r2, r1 + 714 0016 0ED0 beq .L116 + 715 0018 14F0040F tst r4, #4 + 716 001c 0BD0 beq .L116 + 717 001e 2B68 ldr r3, [r5] + 718 0020 9B06 lsls r3, r3, #26 + 719 0022 03D4 bmi .L117 + 720 0024 2B68 ldr r3, [r5] + 721 0026 23F00403 bic r3, r3, #4 + 722 002a 2B60 str r3, [r5] + 723 .L117: + 724 002c 036B ldr r3, [r0, #48] + 725 002e 7260 str r2, [r6, #4] + 726 0030 CBB1 cbz r3, .L115 + 727 .L148: + 728 0032 70BC pop {r4, r5, r6} + 729 0034 1847 bx r3 @ indirect register sibling call + 730 .L116: + 731 0036 0222 movs r2, #2 + 732 0038 9A40 lsls r2, r2, r3 + 733 003a 0A42 tst r2, r1 + 734 003c 15D0 beq .L120 + 735 003e 14F0020F tst r4, #2 + 736 0042 12D0 beq .L120 + 737 0044 2B68 ldr r3, [r5] + 738 0046 9906 lsls r1, r3, #26 + 739 0048 06D4 bmi .L121 + 740 004a 2B68 ldr r3, [r5] + 741 004c 23F00A03 bic r3, r3, #10 + 742 0050 2B60 str r3, [r5] + 743 0052 0123 movs r3, #1 + 744 0054 80F82530 strb r3, [r0, #37] + 745 .L121: + 746 0058 C36A ldr r3, [r0, #44] + 747 005a 7260 str r2, [r6, #4] + 748 005c 0021 movs r1, #0 + 749 005e 80F82410 strb r1, [r0, #36] + 750 0062 002B cmp r3, #0 + 751 0064 E5D1 bne .L148 + 752 .L115: + 753 0066 70BC pop {r4, r5, r6} + 754 0068 7047 bx lr + 755 .L120: + 756 006a 0822 movs r2, #8 + ARM GAS /tmp/ccsbVi89.s page 14 + + + 757 006c 9A40 lsls r2, r2, r3 + 758 006e 0A42 tst r2, r1 + 759 0070 F9D0 beq .L115 + 760 0072 2207 lsls r2, r4, #28 + 761 0074 F7D5 bpl .L115 + 762 0076 2A68 ldr r2, [r5] + 763 0078 416B ldr r1, [r0, #52] + 764 007a 22F00E02 bic r2, r2, #14 + 765 007e 2A60 str r2, [r5] + 766 0080 0122 movs r2, #1 + 767 0082 02FA03F3 lsl r3, r2, r3 + 768 0086 0024 movs r4, #0 + 769 0088 7360 str r3, [r6, #4] + 770 008a C263 str r2, [r0, #60] + 771 008c 80F82440 strb r4, [r0, #36] + 772 0090 80F82520 strb r2, [r0, #37] + 773 0094 0029 cmp r1, #0 + 774 0096 E6D0 beq .L115 + 775 0098 70BC pop {r4, r5, r6} + 776 009a 0847 bx r1 @ indirect register sibling call + 778 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 779 .align 1 + 780 .p2align 2,,3 + 781 .global HAL_DMA_RegisterCallback + 782 .syntax unified + 783 .thumb + 784 .thumb_func + 785 .fpu fpv4-sp-d16 + 787 HAL_DMA_RegisterCallback: + 788 @ args = 0, pretend = 0, frame = 0 + 789 @ frame_needed = 0, uses_anonymous_args = 0 + 790 @ link register save eliminated. + 791 0000 90F82430 ldrb r3, [r0, #36] @ zero_extendqisi2 + 792 0004 012B cmp r3, #1 + 793 0006 1ED0 beq .L157 + 794 0008 90F825C0 ldrb ip, [r0, #37] @ zero_extendqisi2 + 795 000c BCF1010F cmp ip, #1 + 796 0010 5FFA8CF3 uxtb r3, ip + 797 0014 05D0 beq .L159 + 798 0016 0123 movs r3, #1 + 799 .L151: + 800 0018 0022 movs r2, #0 + 801 001a 80F82420 strb r2, [r0, #36] + 802 001e 1846 mov r0, r3 + 803 0020 7047 bx lr + 804 .L159: + 805 0022 0329 cmp r1, #3 + 806 0024 F8D8 bhi .L151 + 807 0026 DFE801F0 tbb [pc, r1] + 808 .L153: + 809 002a 0B .byte (.L156-.L153)/2 + 810 002b 08 .byte (.L155-.L153)/2 + 811 002c 05 .byte (.L154-.L153)/2 + 812 002d 02 .byte (.L152-.L153)/2 + 813 .p2align 1 + 814 .L152: + 815 002e 8263 str r2, [r0, #56] + ARM GAS /tmp/ccsbVi89.s page 15 + + + 816 0030 0023 movs r3, #0 + 817 0032 F1E7 b .L151 + 818 .L154: + 819 0034 4263 str r2, [r0, #52] + 820 0036 0023 movs r3, #0 + 821 0038 EEE7 b .L151 + 822 .L155: + 823 003a 0263 str r2, [r0, #48] + 824 003c 0023 movs r3, #0 + 825 003e EBE7 b .L151 + 826 .L156: + 827 0040 C262 str r2, [r0, #44] + 828 0042 0B46 mov r3, r1 + 829 0044 E8E7 b .L151 + 830 .L157: + 831 0046 0223 movs r3, #2 + 832 0048 1846 mov r0, r3 + 833 004a 7047 bx lr + 835 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 836 .align 1 + 837 .p2align 2,,3 + 838 .global HAL_DMA_UnRegisterCallback + 839 .syntax unified + 840 .thumb + 841 .thumb_func + 842 .fpu fpv4-sp-d16 + 844 HAL_DMA_UnRegisterCallback: + 845 @ args = 0, pretend = 0, frame = 0 + 846 @ frame_needed = 0, uses_anonymous_args = 0 + 847 @ link register save eliminated. + 848 0000 90F82430 ldrb r3, [r0, #36] @ zero_extendqisi2 + 849 0004 012B cmp r3, #1 + 850 0006 15D0 beq .L169 + 851 0008 90F82520 ldrb r2, [r0, #37] @ zero_extendqisi2 + 852 000c 4FF0010C mov ip, #1 + 853 0010 6245 cmp r2, ip + 854 0012 80F824C0 strb ip, [r0, #36] + 855 0016 D3B2 uxtb r3, r2 + 856 0018 05D0 beq .L171 + 857 001a 6346 mov r3, ip + 858 .L162: + 859 001c 0022 movs r2, #0 + 860 001e 80F82420 strb r2, [r0, #36] + 861 0022 1846 mov r0, r3 + 862 0024 7047 bx lr + 863 .L171: + 864 0026 0429 cmp r1, #4 + 865 0028 F8D8 bhi .L162 + 866 002a DFE801F0 tbb [pc, r1] + 867 .L164: + 868 002e 0C .byte (.L168-.L164)/2 + 869 002f 10 .byte (.L167-.L164)/2 + 870 0030 13 .byte (.L166-.L164)/2 + 871 0031 16 .byte (.L165-.L164)/2 + 872 0032 06 .byte (.L163-.L164)/2 + 873 0033 00 .p2align 1 + 874 .L169: + ARM GAS /tmp/ccsbVi89.s page 16 + + + 875 0034 0223 movs r3, #2 + 876 0036 1846 mov r0, r3 + 877 0038 7047 bx lr + 878 .L163: + 879 003a 0023 movs r3, #0 + 880 003c C0E90B33 strd r3, r3, [r0, #44] + 881 0040 C0E90D33 strd r3, r3, [r0, #52] + 882 0044 EAE7 b .L162 + 883 .L168: + 884 0046 0023 movs r3, #0 + 885 0048 C362 str r3, [r0, #44] + 886 004a 0B46 mov r3, r1 + 887 004c E6E7 b .L162 + 888 .L167: + 889 004e 0023 movs r3, #0 + 890 0050 0363 str r3, [r0, #48] + 891 0052 E3E7 b .L162 + 892 .L166: + 893 0054 0023 movs r3, #0 + 894 0056 4363 str r3, [r0, #52] + 895 0058 E0E7 b .L162 + 896 .L165: + 897 005a 0023 movs r3, #0 + 898 005c 8363 str r3, [r0, #56] + 899 005e DDE7 b .L162 + 901 .section .text.HAL_DMA_GetState,"ax",%progbits + 902 .align 1 + 903 .p2align 2,,3 + 904 .global HAL_DMA_GetState + 905 .syntax unified + 906 .thumb + 907 .thumb_func + 908 .fpu fpv4-sp-d16 + 910 HAL_DMA_GetState: + 911 @ args = 0, pretend = 0, frame = 0 + 912 @ frame_needed = 0, uses_anonymous_args = 0 + 913 @ link register save eliminated. + 914 0000 90F82500 ldrb r0, [r0, #37] @ zero_extendqisi2 + 915 0004 7047 bx lr + 917 0006 00BF .section .text.HAL_DMA_GetError,"ax",%progbits + 918 .align 1 + 919 .p2align 2,,3 + 920 .global HAL_DMA_GetError + 921 .syntax unified + 922 .thumb + 923 .thumb_func + 924 .fpu fpv4-sp-d16 + 926 HAL_DMA_GetError: + 927 @ args = 0, pretend = 0, frame = 0 + 928 @ frame_needed = 0, uses_anonymous_args = 0 + 929 @ link register save eliminated. + 930 0000 C06B ldr r0, [r0, #60] + 931 0002 7047 bx lr + 933 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccsbVi89.s page 17 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_dma.c + /tmp/ccsbVi89.s:16 .text.HAL_DMA_Init:0000000000000000 $t + /tmp/ccsbVi89.s:25 .text.HAL_DMA_Init:0000000000000000 HAL_DMA_Init + /tmp/ccsbVi89.s:138 .text.HAL_DMA_Init:00000000000000fc $d + /tmp/ccsbVi89.s:152 .text.HAL_DMA_DeInit:0000000000000000 $t + /tmp/ccsbVi89.s:160 .text.HAL_DMA_DeInit:0000000000000000 HAL_DMA_DeInit + /tmp/ccsbVi89.s:252 .text.HAL_DMA_DeInit:00000000000000c8 $d + /tmp/ccsbVi89.s:264 .text.HAL_DMA_Start:0000000000000000 $t + /tmp/ccsbVi89.s:272 .text.HAL_DMA_Start:0000000000000000 HAL_DMA_Start + /tmp/ccsbVi89.s:332 .text.HAL_DMA_Start_IT:0000000000000000 $t + /tmp/ccsbVi89.s:340 .text.HAL_DMA_Start_IT:0000000000000000 HAL_DMA_Start_IT + /tmp/ccsbVi89.s:427 .text.HAL_DMA_Abort:0000000000000000 $t + /tmp/ccsbVi89.s:435 .text.HAL_DMA_Abort:0000000000000000 HAL_DMA_Abort + /tmp/ccsbVi89.s:489 .text.HAL_DMA_Abort_IT:0000000000000000 $t + /tmp/ccsbVi89.s:497 .text.HAL_DMA_Abort_IT:0000000000000000 HAL_DMA_Abort_IT + /tmp/ccsbVi89.s:554 .text.HAL_DMA_PollForTransfer:0000000000000000 $t + /tmp/ccsbVi89.s:562 .text.HAL_DMA_PollForTransfer:0000000000000000 HAL_DMA_PollForTransfer + /tmp/ccsbVi89.s:692 .text.HAL_DMA_IRQHandler:0000000000000000 $t + /tmp/ccsbVi89.s:700 .text.HAL_DMA_IRQHandler:0000000000000000 HAL_DMA_IRQHandler + /tmp/ccsbVi89.s:779 .text.HAL_DMA_RegisterCallback:0000000000000000 $t + /tmp/ccsbVi89.s:787 .text.HAL_DMA_RegisterCallback:0000000000000000 HAL_DMA_RegisterCallback + /tmp/ccsbVi89.s:809 .text.HAL_DMA_RegisterCallback:000000000000002a $d + /tmp/ccsbVi89.s:813 .text.HAL_DMA_RegisterCallback:000000000000002e $t + /tmp/ccsbVi89.s:836 .text.HAL_DMA_UnRegisterCallback:0000000000000000 $t + /tmp/ccsbVi89.s:844 .text.HAL_DMA_UnRegisterCallback:0000000000000000 HAL_DMA_UnRegisterCallback + /tmp/ccsbVi89.s:868 .text.HAL_DMA_UnRegisterCallback:000000000000002e $d + /tmp/ccsbVi89.s:902 .text.HAL_DMA_GetState:0000000000000000 $t + /tmp/ccsbVi89.s:910 .text.HAL_DMA_GetState:0000000000000000 HAL_DMA_GetState + /tmp/ccsbVi89.s:918 .text.HAL_DMA_GetError:0000000000000000 $t + /tmp/ccsbVi89.s:926 .text.HAL_DMA_GetError:0000000000000000 HAL_DMA_GetError + /tmp/ccsbVi89.s:873 .text.HAL_DMA_UnRegisterCallback:0000000000000033 $d + /tmp/ccsbVi89.s:873 .text.HAL_DMA_UnRegisterCallback:0000000000000034 $t + +UNDEFINED SYMBOLS +HAL_GetTick diff --git a/codice/build/stm32g4xx_hal_dma.o b/codice/build/stm32g4xx_hal_dma.o new file mode 100644 index 0000000000000000000000000000000000000000..c983e5288437c80e139d32db79c5ba00fc373b69 GIT binary patch literal 4196 zcmbtWeN0=|6+idAXJf#aR|6@KG(7v61aR;Sq)XZ*s=qKXkfuqqYO5;ojPdda4`LZd z&8lf-flAf7Nmcq!+GJBdq)D5qO+-YSHX>-gHfc;UO)8~Yt7TNJ<93=J3tL^%E<5+x z&)BcohqNo*k8^&%d+t5w-h1AAws$a02m!qiXoC$2V9lx_rkz^X2AiM(pzTCDaenUr zC!Y-ry}PG>&%oY@GxWwCrrTb53K;P@c`DcHy(C{9UCi=!GU^Ui2mPbf!S7-12@b8# zeC~bJA-}n5vHs+aRWToRtljlH)CB24o+!B=-8SHkEZyd|oDG~_=n5ZDiLGt$@`!ES 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Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_exti.lst b/codice/build/stm32g4xx_hal_exti.lst new file mode 100644 index 0000000..0f07b30 --- /dev/null +++ b/codice/build/stm32g4xx_hal_exti.lst @@ -0,0 +1,471 @@ +ARM GAS /tmp/ccc0dyYu.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_exti.c" + 14 .text + 15 .section .text.HAL_EXTI_SetConfigLine,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_EXTI_SetConfigLine + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_EXTI_SetConfigLine: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 0028 cmp r0, #0 + 29 0002 56D0 beq .L14 + 30 0004 0029 cmp r1, #0 + 31 0006 54D0 beq .L14 + 32 0008 0B68 ldr r3, [r1] + 33 000a 70B5 push {r4, r5, r6, lr} + 34 000c 0122 movs r2, #1 + 35 000e 03F01F0C and ip, r3, #31 + 36 0012 0360 str r3, [r0] + 37 0014 9801 lsls r0, r3, #6 + 38 0016 C3F30044 ubfx r4, r3, #16, #1 + 39 001a 02FA0CF2 lsl r2, r2, ip + 40 001e 17D4 bmi .L3 + 41 0020 6001 lsls r0, r4, #5 + 42 .L4: + 43 0022 00F18043 add r3, r0, #1073741824 + 44 0026 03F58233 add r3, r3, #66560 + 45 002a 4D68 ldr r5, [r1, #4] + 46 002c 1C68 ldr r4, [r3] + 47 002e ED07 lsls r5, r5, #31 + 48 0030 4CBF ite mi + 49 0032 1443 orrmi r4, r4, r2 + 50 0034 9443 bicpl r4, r4, r2 + 51 0036 1C60 str r4, [r3] + 52 0038 1F4B ldr r3, .L20 + 53 003a 4C68 ldr r4, [r1, #4] + 54 003c C118 adds r1, r0, r3 + 55 003e C358 ldr r3, [r0, r3] + 56 0040 A007 lsls r0, r4, #30 + 57 0042 4CBF ite mi + 58 0044 1A43 orrmi r2, r2, r3 + ARM GAS /tmp/ccc0dyYu.s page 2 + + + 59 0046 23EA0202 bicpl r2, r3, r2 + 60 004a 0A60 str r2, [r1] + 61 004c 0020 movs r0, #0 + 62 004e 70BD pop {r4, r5, r6, pc} + 63 .L3: + 64 0050 6001 lsls r0, r4, #5 + 65 0052 1A4D ldr r5, .L20+4 + 66 0054 8E68 ldr r6, [r1, #8] + 67 0056 05EB4414 add r4, r5, r4, lsl #5 + 68 005a 4559 ldr r5, [r0, r5] + 69 005c F607 lsls r6, r6, #31 + 70 005e 4CBF ite mi + 71 0060 1543 orrmi r5, r5, r2 + 72 0062 9543 bicpl r5, r5, r2 + 73 0064 2560 str r5, [r4] + 74 0066 164C ldr r4, .L20+8 + 75 0068 8E68 ldr r6, [r1, #8] + 76 006a 0559 ldr r5, [r0, r4] + 77 006c B607 lsls r6, r6, #30 + 78 006e 0444 add r4, r4, r0 + 79 0070 4CBF ite mi + 80 0072 1543 orrmi r5, r5, r2 + 81 0074 9543 bicpl r5, r5, r2 + 82 0076 2560 str r5, [r4] + 83 0078 0C68 ldr r4, [r1] + 84 007a 04F0C064 and r4, r4, #100663296 + 85 007e B4F1C06F cmp r4, #100663296 + 86 0082 CED1 bne .L4 + 87 0084 0CF01C0C and ip, ip, #28 + 88 0088 0CF1804C add ip, ip, #1073741824 + 89 008c 0CF5803C add ip, ip, #65536 + 90 0090 CC68 ldr r4, [r1, #12] + 91 0092 DCF80850 ldr r5, [ip, #8] + 92 0096 03F00303 and r3, r3, #3 + 93 009a 9B00 lsls r3, r3, #2 + 94 009c 4FF0070E mov lr, #7 + 95 00a0 9C40 lsls r4, r4, r3 + 96 00a2 0EFA03F3 lsl r3, lr, r3 + 97 00a6 25EA0303 bic r3, r5, r3 + 98 00aa 1C43 orrs r4, r4, r3 + 99 00ac CCF80840 str r4, [ip, #8] + 100 00b0 B7E7 b .L4 + 101 .L14: + 102 00b2 0120 movs r0, #1 + 103 00b4 7047 bx lr + 104 .L21: + 105 00b6 00BF .align 2 + 106 .L20: + 107 00b8 04040140 .word 1073808388 + 108 00bc 08040140 .word 1073808392 + 109 00c0 0C040140 .word 1073808396 + 111 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits + 112 .align 1 + 113 .p2align 2,,3 + 114 .global HAL_EXTI_GetConfigLine + 115 .syntax unified + 116 .thumb + ARM GAS /tmp/ccc0dyYu.s page 3 + + + 117 .thumb_func + 118 .fpu fpv4-sp-d16 + 120 HAL_EXTI_GetConfigLine: + 121 @ args = 0, pretend = 0, frame = 0 + 122 @ frame_needed = 0, uses_anonymous_args = 0 + 123 0000 0028 cmp r0, #0 + 124 0002 3BD0 beq .L30 + 125 0004 0029 cmp r1, #0 + 126 0006 39D0 beq .L30 + 127 0008 0368 ldr r3, [r0] + 128 000a 0B60 str r3, [r1] + 129 000c C3F3004C ubfx ip, r3, #16, #1 + 130 0010 4FEA4C1C lsl ip, ip, #5 + 131 0014 0CF18042 add r2, ip, #1073741824 + 132 0018 02F58232 add r2, r2, #66560 + 133 001c 10B5 push {r4, lr} + 134 001e 1068 ldr r0, [r2] + 135 0020 1E4C ldr r4, .L44 + 136 0022 03F01F0E and lr, r3, #31 + 137 0026 0122 movs r2, #1 + 138 0028 02FA0EF2 lsl r2, r2, lr + 139 002c 0242 tst r2, r0 + 140 002e 14BF ite ne + 141 0030 0120 movne r0, #1 + 142 0032 0020 moveq r0, #0 + 143 0034 4860 str r0, [r1, #4] + 144 0036 5CF80440 ldr r4, [ip, r4] + 145 003a 2242 tst r2, r4 + 146 003c 1CBF itt ne + 147 003e 40F00200 orrne r0, r0, #2 + 148 0042 4860 strne r0, [r1, #4] + 149 0044 0020 movs r0, #0 + 150 0046 C1E90200 strd r0, r0, [r1, #8] + 151 004a 9801 lsls r0, r3, #6 + 152 004c 14D5 bpl .L42 + 153 004e 1448 ldr r0, .L44+4 + 154 0050 5CF80000 ldr r0, [ip, r0] + 155 0054 0242 tst r2, r0 + 156 0056 1CBF itt ne + 157 0058 0120 movne r0, #1 + 158 005a 8860 strne r0, [r1, #8] + 159 005c 1148 ldr r0, .L44+8 + 160 005e 5CF80000 ldr r0, [ip, r0] + 161 0062 14BF ite ne + 162 0064 0324 movne r4, #3 + 163 0066 0224 moveq r4, #2 + 164 0068 0242 tst r2, r0 + 165 006a 03F0C062 and r2, r3, #100663296 + 166 006e 18BF it ne + 167 0070 8C60 strne r4, [r1, #8] + 168 0072 B2F1C06F cmp r2, #100663296 + 169 0076 03D0 beq .L43 + 170 .L42: + 171 0078 0020 movs r0, #0 + 172 007a 10BD pop {r4, pc} + 173 .L30: + 174 007c 0120 movs r0, #1 + ARM GAS /tmp/ccc0dyYu.s page 4 + + + 175 007e 7047 bx lr + 176 .L43: + 177 0080 4FEA9E02 lsr r2, lr, #2 + 178 0084 0848 ldr r0, .L44+12 + 179 0086 0232 adds r2, r2, #2 + 180 0088 03F00303 and r3, r3, #3 + 181 008c 50F82220 ldr r2, [r0, r2, lsl #2] + 182 0090 9B00 lsls r3, r3, #2 + 183 0092 22FA03F3 lsr r3, r2, r3 + 184 0096 CB60 str r3, [r1, #12] + 185 0098 0020 movs r0, #0 + 186 009a 10BD pop {r4, pc} + 187 .L45: + 188 .align 2 + 189 .L44: + 190 009c 04040140 .word 1073808388 + 191 00a0 08040140 .word 1073808392 + 192 00a4 0C040140 .word 1073808396 + 193 00a8 00000140 .word 1073807360 + 195 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits + 196 .align 1 + 197 .p2align 2,,3 + 198 .global HAL_EXTI_ClearConfigLine + 199 .syntax unified + 200 .thumb + 201 .thumb_func + 202 .fpu fpv4-sp-d16 + 204 HAL_EXTI_ClearConfigLine: + 205 @ args = 0, pretend = 0, frame = 0 + 206 @ frame_needed = 0, uses_anonymous_args = 0 + 207 0000 0028 cmp r0, #0 + 208 0002 41D0 beq .L50 + 209 0004 30B5 push {r4, r5, lr} + 210 0006 0568 ldr r5, [r0] + 211 0008 C5F30043 ubfx r3, r5, #16, #1 + 212 000c 5B01 lsls r3, r3, #5 + 213 000e 03F18041 add r1, r3, #1073741824 + 214 0012 01F58231 add r1, r1, #66560 + 215 0016 05F01F0C and ip, r5, #31 + 216 001a 0C68 ldr r4, [r1] + 217 001c 0122 movs r2, #1 + 218 001e 02FA0CF2 lsl r2, r2, ip + 219 0022 24EA0204 bic r4, r4, r2 + 220 0026 0C60 str r4, [r1] + 221 0028 184C ldr r4, .L57 + 222 002a 1959 ldr r1, [r3, r4] + 223 002c 6FEA020E mvn lr, r2 + 224 0030 21EA0202 bic r2, r1, r2 + 225 0034 1A51 str r2, [r3, r4] + 226 0036 0268 ldr r2, [r0] + 227 0038 9201 lsls r2, r2, #6 + 228 003a 0FD5 bpl .L55 + 229 003c 144C ldr r4, .L57+4 + 230 003e 1549 ldr r1, .L57+8 + 231 0040 1A59 ldr r2, [r3, r4] + 232 0042 0EEA0202 and r2, lr, r2 + 233 0046 1A51 str r2, [r3, r4] + ARM GAS /tmp/ccc0dyYu.s page 5 + + + 234 0048 5A58 ldr r2, [r3, r1] + 235 004a 0EEA0202 and r2, lr, r2 + 236 004e 5A50 str r2, [r3, r1] + 237 0050 0368 ldr r3, [r0] + 238 0052 03F0C063 and r3, r3, #100663296 + 239 0056 B3F1C06F cmp r3, #100663296 + 240 005a 01D0 beq .L56 + 241 .L55: + 242 005c 0020 movs r0, #0 + 243 005e 30BD pop {r4, r5, pc} + 244 .L56: + 245 0060 0CF01C0C and ip, ip, #28 + 246 0064 0CF1804C add ip, ip, #1073741824 + 247 0068 0CF5803C add ip, ip, #65536 + 248 006c 05F00305 and r5, r5, #3 + 249 0070 DCF80830 ldr r3, [ip, #8] + 250 0074 0722 movs r2, #7 + 251 0076 AD00 lsls r5, r5, #2 + 252 0078 02FA05F5 lsl r5, r2, r5 + 253 007c 23EA0505 bic r5, r3, r5 + 254 0080 CCF80850 str r5, [ip, #8] + 255 0084 0020 movs r0, #0 + 256 0086 30BD pop {r4, r5, pc} + 257 .L50: + 258 0088 0120 movs r0, #1 + 259 008a 7047 bx lr + 260 .L58: + 261 .align 2 + 262 .L57: + 263 008c 04040140 .word 1073808388 + 264 0090 08040140 .word 1073808392 + 265 0094 0C040140 .word 1073808396 + 267 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits + 268 .align 1 + 269 .p2align 2,,3 + 270 .global HAL_EXTI_RegisterCallback + 271 .syntax unified + 272 .thumb + 273 .thumb_func + 274 .fpu fpv4-sp-d16 + 276 HAL_EXTI_RegisterCallback: + 277 @ args = 0, pretend = 0, frame = 0 + 278 @ frame_needed = 0, uses_anonymous_args = 0 + 279 @ link register save eliminated. + 280 0000 0029 cmp r1, #0 + 281 0002 1CBF itt ne + 282 0004 0022 movne r2, #0 + 283 0006 0121 movne r1, #1 + 284 0008 4260 str r2, [r0, #4] + 285 000a 0846 mov r0, r1 + 286 000c 7047 bx lr + 288 000e 00BF .section .text.HAL_EXTI_GetHandle,"ax",%progbits + 289 .align 1 + 290 .p2align 2,,3 + 291 .global HAL_EXTI_GetHandle + 292 .syntax unified + 293 .thumb + ARM GAS /tmp/ccc0dyYu.s page 6 + + + 294 .thumb_func + 295 .fpu fpv4-sp-d16 + 297 HAL_EXTI_GetHandle: + 298 @ args = 0, pretend = 0, frame = 0 + 299 @ frame_needed = 0, uses_anonymous_args = 0 + 300 @ link register save eliminated. + 301 0000 10B1 cbz r0, .L66 + 302 0002 0160 str r1, [r0] + 303 0004 0020 movs r0, #0 + 304 0006 7047 bx lr + 305 .L66: + 306 0008 0120 movs r0, #1 + 307 000a 7047 bx lr + 309 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits + 310 .align 1 + 311 .p2align 2,,3 + 312 .global HAL_EXTI_IRQHandler + 313 .syntax unified + 314 .thumb + 315 .thumb_func + 316 .fpu fpv4-sp-d16 + 318 HAL_EXTI_IRQHandler: + 319 @ args = 0, pretend = 0, frame = 0 + 320 @ frame_needed = 0, uses_anonymous_args = 0 + 321 @ link register save eliminated. + 322 0000 0368 ldr r3, [r0] + 323 0002 C3F30042 ubfx r2, r3, #16, #1 + 324 0006 10B4 push {r4} + 325 0008 5201 lsls r2, r2, #5 + 326 000a 094C ldr r4, .L75 + 327 000c 0121 movs r1, #1 + 328 000e 03F01F03 and r3, r3, #31 + 329 0012 01FA03F3 lsl r3, r1, r3 + 330 0016 1159 ldr r1, [r2, r4] + 331 0018 1942 tst r1, r3 + 332 001a 05D0 beq .L67 + 333 001c 4168 ldr r1, [r0, #4] + 334 001e 1351 str r3, [r2, r4] + 335 0020 11B1 cbz r1, .L67 + 336 0022 5DF8044B ldr r4, [sp], #4 + 337 0026 0847 bx r1 @ indirect register sibling call + 338 .L67: + 339 0028 5DF8044B ldr r4, [sp], #4 + 340 002c 7047 bx lr + 341 .L76: + 342 002e 00BF .align 2 + 343 .L75: + 344 0030 14040140 .word 1073808404 + 346 .section .text.HAL_EXTI_GetPending,"ax",%progbits + 347 .align 1 + 348 .p2align 2,,3 + 349 .global HAL_EXTI_GetPending + 350 .syntax unified + 351 .thumb + 352 .thumb_func + 353 .fpu fpv4-sp-d16 + 355 HAL_EXTI_GetPending: + ARM GAS /tmp/ccc0dyYu.s page 7 + + + 356 @ args = 0, pretend = 0, frame = 0 + 357 @ frame_needed = 0, uses_anonymous_args = 0 + 358 @ link register save eliminated. + 359 0000 0368 ldr r3, [r0] + 360 0002 0649 ldr r1, .L78 + 361 0004 C3F30042 ubfx r2, r3, #16, #1 + 362 0008 5201 lsls r2, r2, #5 + 363 000a 03F01F03 and r3, r3, #31 + 364 000e 5258 ldr r2, [r2, r1] + 365 0010 0120 movs r0, #1 + 366 0012 9840 lsls r0, r0, r3 + 367 0014 1040 ands r0, r0, r2 + 368 0016 D840 lsrs r0, r0, r3 + 369 0018 7047 bx lr + 370 .L79: + 371 001a 00BF .align 2 + 372 .L78: + 373 001c 14040140 .word 1073808404 + 375 .section .text.HAL_EXTI_ClearPending,"ax",%progbits + 376 .align 1 + 377 .p2align 2,,3 + 378 .global HAL_EXTI_ClearPending + 379 .syntax unified + 380 .thumb + 381 .thumb_func + 382 .fpu fpv4-sp-d16 + 384 HAL_EXTI_ClearPending: + 385 @ args = 0, pretend = 0, frame = 0 + 386 @ frame_needed = 0, uses_anonymous_args = 0 + 387 @ link register save eliminated. + 388 0000 0368 ldr r3, [r0] + 389 0002 C3F30042 ubfx r2, r3, #16, #1 + 390 0006 10B4 push {r4} + 391 0008 0121 movs r1, #1 + 392 000a 054C ldr r4, .L82 + 393 000c 03F01F03 and r3, r3, #31 + 394 0010 5201 lsls r2, r2, #5 + 395 0012 01FA03F3 lsl r3, r1, r3 + 396 0016 1351 str r3, [r2, r4] + 397 0018 5DF8044B ldr r4, [sp], #4 + 398 001c 7047 bx lr + 399 .L83: + 400 001e 00BF .align 2 + 401 .L82: + 402 0020 14040140 .word 1073808404 + 404 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits + 405 .align 1 + 406 .p2align 2,,3 + 407 .global HAL_EXTI_GenerateSWI + 408 .syntax unified + 409 .thumb + 410 .thumb_func + 411 .fpu fpv4-sp-d16 + 413 HAL_EXTI_GenerateSWI: + 414 @ args = 0, pretend = 0, frame = 0 + 415 @ frame_needed = 0, uses_anonymous_args = 0 + 416 @ link register save eliminated. + ARM GAS /tmp/ccc0dyYu.s page 8 + + + 417 0000 0368 ldr r3, [r0] + 418 0002 C3F30042 ubfx r2, r3, #16, #1 + 419 0006 10B4 push {r4} + 420 0008 0121 movs r1, #1 + 421 000a 054C ldr r4, .L86 + 422 000c 03F01F03 and r3, r3, #31 + 423 0010 5201 lsls r2, r2, #5 + 424 0012 01FA03F3 lsl r3, r1, r3 + 425 0016 1351 str r3, [r2, r4] + 426 0018 5DF8044B ldr r4, [sp], #4 + 427 001c 7047 bx lr + 428 .L87: + 429 001e 00BF .align 2 + 430 .L86: + 431 0020 10040140 .word 1073808400 + 433 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccc0dyYu.s page 9 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_exti.c + /tmp/ccc0dyYu.s:16 .text.HAL_EXTI_SetConfigLine:0000000000000000 $t + /tmp/ccc0dyYu.s:25 .text.HAL_EXTI_SetConfigLine:0000000000000000 HAL_EXTI_SetConfigLine + /tmp/ccc0dyYu.s:107 .text.HAL_EXTI_SetConfigLine:00000000000000b8 $d + /tmp/ccc0dyYu.s:112 .text.HAL_EXTI_GetConfigLine:0000000000000000 $t + /tmp/ccc0dyYu.s:120 .text.HAL_EXTI_GetConfigLine:0000000000000000 HAL_EXTI_GetConfigLine + /tmp/ccc0dyYu.s:190 .text.HAL_EXTI_GetConfigLine:000000000000009c $d + /tmp/ccc0dyYu.s:196 .text.HAL_EXTI_ClearConfigLine:0000000000000000 $t + /tmp/ccc0dyYu.s:204 .text.HAL_EXTI_ClearConfigLine:0000000000000000 HAL_EXTI_ClearConfigLine + /tmp/ccc0dyYu.s:263 .text.HAL_EXTI_ClearConfigLine:000000000000008c $d + /tmp/ccc0dyYu.s:268 .text.HAL_EXTI_RegisterCallback:0000000000000000 $t + /tmp/ccc0dyYu.s:276 .text.HAL_EXTI_RegisterCallback:0000000000000000 HAL_EXTI_RegisterCallback + /tmp/ccc0dyYu.s:289 .text.HAL_EXTI_GetHandle:0000000000000000 $t + /tmp/ccc0dyYu.s:297 .text.HAL_EXTI_GetHandle:0000000000000000 HAL_EXTI_GetHandle + /tmp/ccc0dyYu.s:310 .text.HAL_EXTI_IRQHandler:0000000000000000 $t + /tmp/ccc0dyYu.s:318 .text.HAL_EXTI_IRQHandler:0000000000000000 HAL_EXTI_IRQHandler + /tmp/ccc0dyYu.s:344 .text.HAL_EXTI_IRQHandler:0000000000000030 $d + /tmp/ccc0dyYu.s:347 .text.HAL_EXTI_GetPending:0000000000000000 $t + /tmp/ccc0dyYu.s:355 .text.HAL_EXTI_GetPending:0000000000000000 HAL_EXTI_GetPending + /tmp/ccc0dyYu.s:373 .text.HAL_EXTI_GetPending:000000000000001c $d + /tmp/ccc0dyYu.s:376 .text.HAL_EXTI_ClearPending:0000000000000000 $t + /tmp/ccc0dyYu.s:384 .text.HAL_EXTI_ClearPending:0000000000000000 HAL_EXTI_ClearPending + /tmp/ccc0dyYu.s:402 .text.HAL_EXTI_ClearPending:0000000000000020 $d + /tmp/ccc0dyYu.s:405 .text.HAL_EXTI_GenerateSWI:0000000000000000 $t + /tmp/ccc0dyYu.s:413 .text.HAL_EXTI_GenerateSWI:0000000000000000 HAL_EXTI_GenerateSWI + /tmp/ccc0dyYu.s:431 .text.HAL_EXTI_GenerateSWI:0000000000000020 $d + +NO UNDEFINED SYMBOLS diff --git a/codice/build/stm32g4xx_hal_exti.o b/codice/build/stm32g4xx_hal_exti.o new file mode 100644 index 0000000000000000000000000000000000000000..6a12d032b89c6d725e536ba1e992fd4b42d84b65 GIT binary patch literal 2788 zcma);O>7%Q6oB9C?AlJUHBRcbNotji>k3Drmg5vEN)L{=X%f0o6Ssn-6va-m%~~W* zWG_-VAfif094b^HkRr809LlX63N3I6ZdEu@6(dop2W}h?1|%mXD9Q!itUb18-s_4=nzKC;pp-io| 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Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_flash_ex.lst b/codice/build/stm32g4xx_hal_flash_ex.lst new file mode 100644 index 0000000..809ee60 --- /dev/null +++ b/codice/build/stm32g4xx_hal_flash_ex.lst @@ -0,0 +1,934 @@ +ARM GAS /tmp/cctzdw5o.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_flash_ex.c" + 14 .text + 15 .section .text.HAL_FLASHEx_Erase,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_FLASHEx_Erase + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_FLASHEx_Erase: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 29 0004 534F ldr r7, .L26 + 30 0006 3B78 ldrb r3, [r7] @ zero_extendqisi2 + 31 0008 012B cmp r3, #1 + 32 000a 7AD0 beq .L16 + 33 000c 8146 mov r9, r0 + 34 000e 0124 movs r4, #1 + 35 0010 4FF47A70 mov r0, #1000 + 36 0014 8846 mov r8, r1 + 37 0016 3C70 strb r4, [r7] + 38 0018 FFF7FEFF bl FLASH_WaitForLastOperation + 39 001c 0646 mov r6, r0 + 40 001e 20B1 cbz r0, .L23 + 41 .L3: + 42 0020 0023 movs r3, #0 + 43 0022 3B70 strb r3, [r7] + 44 0024 3046 mov r0, r6 + 45 0026 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 46 .L23: + 47 002a 4B4B ldr r3, .L26+4 + 48 002c 7860 str r0, [r7, #4] + 49 002e 1A68 ldr r2, [r3] + 50 0030 12F4007F tst r2, #512 + 51 0034 1A68 ldr r2, [r3] + 52 0036 68D1 bne .L24 + 53 0038 5205 lsls r2, r2, #21 + 54 003a 40F18980 bpl .L7 + 55 003e 1A68 ldr r2, [r3] + 56 0040 22F48062 bic r2, r2, #1024 + 57 0044 1A60 str r2, [r3] + 58 0046 0223 movs r3, #2 + ARM GAS /tmp/cctzdw5o.s page 2 + + + 59 0048 3B77 strb r3, [r7, #28] + 60 .L6: + 61 004a D9F80030 ldr r3, [r9] + 62 004e 012B cmp r3, #1 + 63 0050 64D0 beq .L25 + 64 0052 4FF0FF33 mov r3, #-1 + 65 0056 C8F80030 str r3, [r8] + 66 005a D9E90253 ldrd r5, r3, [r9, #8] + 67 005e 2B44 add r3, r3, r5 + 68 0060 9D42 cmp r5, r3 + 69 0062 24D2 bcs .L10 + 70 0064 3C4C ldr r4, .L26+4 + 71 0066 05E0 b .L13 + 72 .L12: + 73 0068 D9E90232 ldrd r3, r2, [r9, #8] + 74 006c 0135 adds r5, r5, #1 + 75 006e 1344 add r3, r3, r2 + 76 0070 AB42 cmp r3, r5 + 77 0072 1CD9 bls .L10 + 78 .L13: + 79 0074 6269 ldr r2, [r4, #20] + 80 0076 EB00 lsls r3, r5, #3 + 81 0078 22F4FC72 bic r2, r2, #504 + 82 007c 03F4FF63 and r3, r3, #2040 + 83 0080 1343 orrs r3, r3, r2 + 84 0082 6361 str r3, [r4, #20] + 85 0084 6369 ldr r3, [r4, #20] + 86 0086 43F00203 orr r3, r3, #2 + 87 008a 6361 str r3, [r4, #20] + 88 008c 6369 ldr r3, [r4, #20] + 89 008e 43F48033 orr r3, r3, #65536 + 90 0092 6361 str r3, [r4, #20] + 91 0094 4FF47A70 mov r0, #1000 + 92 0098 FFF7FEFF bl FLASH_WaitForLastOperation + 93 009c 6369 ldr r3, [r4, #20] + 94 009e 23F4FD73 bic r3, r3, #506 + 95 00a2 6361 str r3, [r4, #20] + 96 00a4 0028 cmp r0, #0 + 97 00a6 DFD0 beq .L12 + 98 00a8 C8F80050 str r5, [r8] + 99 00ac 0646 mov r6, r0 + 100 .L10: + 101 00ae 3B7F ldrb r3, [r7, #28] @ zero_extendqisi2 + 102 00b0 03F0FD02 and r2, r3, #253 + 103 00b4 012A cmp r2, #1 + 104 00b6 DBB2 uxtb r3, r3 + 105 00b8 10D1 bne .L14 + 106 00ba 274A ldr r2, .L26+4 + 107 00bc 1168 ldr r1, [r2] + 108 00be 21F40071 bic r1, r1, #512 + 109 00c2 1160 str r1, [r2] + 110 00c4 1168 ldr r1, [r2] + 111 00c6 41F40061 orr r1, r1, #2048 + 112 00ca 1160 str r1, [r2] + 113 00cc 1168 ldr r1, [r2] + 114 00ce 21F40061 bic r1, r1, #2048 + 115 00d2 1160 str r1, [r2] + ARM GAS /tmp/cctzdw5o.s page 3 + + + 116 00d4 1168 ldr r1, [r2] + 117 00d6 41F40071 orr r1, r1, #512 + 118 00da 1160 str r1, [r2] + 119 .L14: + 120 00dc 023B subs r3, r3, #2 + 121 00de 012B cmp r3, #1 + 122 00e0 0CD8 bhi .L15 + 123 00e2 1D4B ldr r3, .L26+4 + 124 00e4 1A68 ldr r2, [r3] + 125 00e6 42F48052 orr r2, r2, #4096 + 126 00ea 1A60 str r2, [r3] + 127 00ec 1A68 ldr r2, [r3] + 128 00ee 22F48052 bic r2, r2, #4096 + 129 00f2 1A60 str r2, [r3] + 130 00f4 1A68 ldr r2, [r3] + 131 00f6 42F48062 orr r2, r2, #1024 + 132 00fa 1A60 str r2, [r3] + 133 .L15: + 134 00fc 0023 movs r3, #0 + 135 00fe 3B77 strb r3, [r7, #28] + 136 0100 8EE7 b .L3 + 137 .L16: + 138 0102 0226 movs r6, #2 + 139 0104 3046 mov r0, r6 + 140 0106 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 141 .L24: + 142 010a 5105 lsls r1, r2, #21 + 143 010c 1ED5 bpl .L5 + 144 010e 1A68 ldr r2, [r3] + 145 0110 22F48062 bic r2, r2, #1024 + 146 0114 1A60 str r2, [r3] + 147 0116 0323 movs r3, #3 + 148 0118 3B77 strb r3, [r7, #28] + 149 011a 96E7 b .L6 + 150 .L25: + 151 011c D9F80430 ldr r3, [r9, #4] + 152 0120 DB07 lsls r3, r3, #31 + 153 0122 04D5 bpl .L9 + 154 0124 0C4A ldr r2, .L26+4 + 155 0126 5369 ldr r3, [r2, #20] + 156 0128 43F00403 orr r3, r3, #4 + 157 012c 5361 str r3, [r2, #20] + 158 .L9: + 159 012e 0A4C ldr r4, .L26+4 + 160 0130 6369 ldr r3, [r4, #20] + 161 0132 43F48033 orr r3, r3, #65536 + 162 0136 6361 str r3, [r4, #20] + 163 0138 4FF47A70 mov r0, #1000 + 164 013c FFF7FEFF bl FLASH_WaitForLastOperation + 165 0140 6369 ldr r3, [r4, #20] + 166 0142 23F00403 bic r3, r3, #4 + 167 0146 0646 mov r6, r0 + 168 0148 6361 str r3, [r4, #20] + 169 014a B0E7 b .L10 + 170 .L5: + 171 014c 3C77 strb r4, [r7, #28] + 172 014e 7CE7 b .L6 + ARM GAS /tmp/cctzdw5o.s page 4 + + + 173 .L7: + 174 0150 3877 strb r0, [r7, #28] + 175 0152 7AE7 b .L6 + 176 .L27: + 177 .align 2 + 178 .L26: + 179 0154 00000000 .word pFlash + 180 0158 00200240 .word 1073881088 + 182 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits + 183 .align 1 + 184 .p2align 2,,3 + 185 .global HAL_FLASHEx_Erase_IT + 186 .syntax unified + 187 .thumb + 188 .thumb_func + 189 .fpu fpv4-sp-d16 + 191 HAL_FLASHEx_Erase_IT: + 192 @ args = 0, pretend = 0, frame = 0 + 193 @ frame_needed = 0, uses_anonymous_args = 0 + 194 @ link register save eliminated. + 195 0000 2C4B ldr r3, .L46 + 196 0002 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 197 0004 012A cmp r2, #1 + 198 0006 53D0 beq .L36 + 199 0008 10B4 push {r4} + 200 000a 2B4A ldr r2, .L46+4 + 201 000c 0024 movs r4, #0 + 202 000e 0121 movs r1, #1 + 203 0010 1970 strb r1, [r3] + 204 0012 5C60 str r4, [r3, #4] + 205 0014 1468 ldr r4, [r2] + 206 0016 A405 lsls r4, r4, #22 + 207 0018 2DD4 bmi .L44 + 208 001a 1168 ldr r1, [r2] + 209 001c 11F48061 ands r1, r1, #1024 + 210 0020 33D0 beq .L33 + 211 0022 1168 ldr r1, [r2] + 212 0024 0224 movs r4, #2 + 213 0026 21F48061 bic r1, r1, #1024 + 214 002a 1160 str r1, [r2] + 215 002c 1C77 strb r4, [r3, #28] + 216 .L32: + 217 002e 224A ldr r2, .L46+4 + 218 0030 5169 ldr r1, [r2, #20] + 219 0032 41F04071 orr r1, r1, #50331648 + 220 0036 5161 str r1, [r2, #20] + 221 0038 D0E90041 ldrd r4, r1, [r0] + 222 003c 012C cmp r4, #1 + 223 003e 1961 str r1, [r3, #16] + 224 0040 25D0 beq .L45 + 225 0042 0121 movs r1, #1 + 226 0044 1972 strb r1, [r3, #8] + 227 0046 D0E90214 ldrd r1, r4, [r0, #8] + 228 004a 9C61 str r4, [r3, #24] + 229 004c 5961 str r1, [r3, #20] + 230 004e 5369 ldr r3, [r2, #20] + 231 0050 5DF8044B ldr r4, [sp], #4 + ARM GAS /tmp/cctzdw5o.s page 5 + + + 232 0054 C900 lsls r1, r1, #3 + 233 0056 23F4FC73 bic r3, r3, #504 + 234 005a 01F4FF61 and r1, r1, #2040 + 235 005e 1943 orrs r1, r1, r3 + 236 0060 5161 str r1, [r2, #20] + 237 0062 5369 ldr r3, [r2, #20] + 238 0064 43F00203 orr r3, r3, #2 + 239 0068 5361 str r3, [r2, #20] + 240 006a 5369 ldr r3, [r2, #20] + 241 006c 43F48033 orr r3, r3, #65536 + 242 0070 0020 movs r0, #0 + 243 0072 5361 str r3, [r2, #20] + 244 0074 7047 bx lr + 245 .L44: + 246 0076 1468 ldr r4, [r2] + 247 0078 6405 lsls r4, r4, #21 + 248 007a 06D5 bpl .L33 + 249 007c 1168 ldr r1, [r2] + 250 007e 0324 movs r4, #3 + 251 0080 21F48061 bic r1, r1, #1024 + 252 0084 1160 str r1, [r2] + 253 0086 1C77 strb r4, [r3, #28] + 254 0088 D1E7 b .L32 + 255 .L33: + 256 008a 1977 strb r1, [r3, #28] + 257 008c CFE7 b .L32 + 258 .L45: + 259 008e 0220 movs r0, #2 + 260 0090 1872 strb r0, [r3, #8] + 261 0092 CB07 lsls r3, r1, #31 + 262 0094 03D5 bpl .L35 + 263 0096 5369 ldr r3, [r2, #20] + 264 0098 43F00403 orr r3, r3, #4 + 265 009c 5361 str r3, [r2, #20] + 266 .L35: + 267 009e 064A ldr r2, .L46+4 + 268 00a0 5DF8044B ldr r4, [sp], #4 + 269 00a4 5369 ldr r3, [r2, #20] + 270 00a6 43F48033 orr r3, r3, #65536 + 271 00aa 0020 movs r0, #0 + 272 00ac 5361 str r3, [r2, #20] + 273 00ae 7047 bx lr + 274 .L36: + 275 00b0 0220 movs r0, #2 + 276 00b2 7047 bx lr + 277 .L47: + 278 .align 2 + 279 .L46: + 280 00b4 00000000 .word pFlash + 281 00b8 00200240 .word 1073881088 + 283 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits + 284 .align 1 + 285 .p2align 2,,3 + 286 .global HAL_FLASHEx_OBProgram + 287 .syntax unified + 288 .thumb + 289 .thumb_func + ARM GAS /tmp/cctzdw5o.s page 6 + + + 290 .fpu fpv4-sp-d16 + 292 HAL_FLASHEx_OBProgram: + 293 @ args = 0, pretend = 0, frame = 0 + 294 @ frame_needed = 0, uses_anonymous_args = 0 + 295 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 296 0004 B34E ldr r6, .L160 + 297 0006 3378 ldrb r3, [r6] @ zero_extendqisi2 + 298 0008 012B cmp r3, #1 + 299 000a 00F05E81 beq .L86 + 300 000e 0125 movs r5, #1 + 301 0010 3570 strb r5, [r6] + 302 0012 0368 ldr r3, [r0] + 303 0014 0022 movs r2, #0 + 304 0016 13EA0507 ands r7, r3, r5 + 305 001a 0446 mov r4, r0 + 306 001c 7260 str r2, [r6, #4] + 307 001e 40F0DB80 bne .L150 + 308 .L50: + 309 0022 9A07 lsls r2, r3, #30 + 310 0024 00F1CE80 bmi .L151 + 311 .L54: + 312 0028 5D07 lsls r5, r3, #29 + 313 002a 42D4 bmi .L152 + 314 .L57: + 315 002c 1907 lsls r1, r3, #28 + 316 002e 0AD4 bmi .L153 + 317 .L75: + 318 0030 9A06 lsls r2, r3, #26 + 319 0032 00F1F980 bmi .L154 + 320 .L79: + 321 0036 DB06 lsls r3, r3, #27 + 322 0038 00F1ED80 bmi .L155 + 323 .L83: + 324 003c 0023 movs r3, #0 + 325 003e 3370 strb r3, [r6] + 326 0040 3846 mov r0, r7 + 327 0042 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 328 .L153: + 329 0046 D4E90885 ldrd r8, r5, [r4, #32] + 330 004a A845 cmp r8, r5 + 331 004c F0D0 beq .L75 + 332 004e 4FF47A70 mov r0, #1000 + 333 0052 D4F81C90 ldr r9, [r4, #28] + 334 0056 FFF7FEFF bl FLASH_WaitForLastOperation + 335 005a 0028 cmp r0, #0 + 336 005c 40F00C81 bne .L156 + 337 0060 19F0010F tst r9, #1 + 338 0064 0FD0 beq .L77 + 339 0066 9C49 ldr r1, .L160+4 + 340 0068 9C48 ldr r0, .L160+8 + 341 006a 4A6A ldr r2, [r1, #36] + 342 006c 08F17848 add r8, r8, #-134217728 + 343 0070 0240 ands r2, r2, r0 + 344 0072 42EAD802 orr r2, r2, r8, lsr #3 + 345 0076 4A62 str r2, [r1, #36] + 346 0078 8B6A ldr r3, [r1, #40] + 347 007a 05F17845 add r5, r5, #-134217728 + ARM GAS /tmp/cctzdw5o.s page 7 + + + 348 007e 0340 ands r3, r3, r0 + 349 0080 43EAD505 orr r5, r3, r5, lsr #3 + 350 0084 8D62 str r5, [r1, #40] + 351 .L77: + 352 0086 944A ldr r2, .L160+4 + 353 0088 936A ldr r3, [r2, #40] + 354 008a 09F00049 and r9, r9, #-2147483648 + 355 008e 23F00043 bic r3, r3, #-2147483648 + 356 0092 43EA0903 orr r3, r3, r9 + 357 0096 9362 str r3, [r2, #40] + 358 0098 5369 ldr r3, [r2, #20] + 359 009a 43F40033 orr r3, r3, #131072 + 360 009e 5361 str r3, [r2, #20] + 361 00a0 4FF47A70 mov r0, #1000 + 362 00a4 FFF7FEFF bl FLASH_WaitForLastOperation + 363 00a8 2368 ldr r3, [r4] + 364 00aa 0028 cmp r0, #0 + 365 00ac C0D0 beq .L75 + 366 00ae 0127 movs r7, #1 + 367 00b0 BEE7 b .L75 + 368 .L152: + 369 00b2 4FF47A70 mov r0, #1000 + 370 00b6 D4E90558 ldrd r5, r8, [r4, #20] + 371 00ba FFF7FEFF bl FLASH_WaitForLastOperation + 372 00be 0028 cmp r0, #0 + 373 00c0 40F0D480 bne .L157 + 374 00c4 15F00103 ands r3, r5, #1 + 375 00c8 00F00A81 beq .L88 + 376 00cc 08F4E063 and r3, r8, #1792 + 377 00d0 4FF4B851 mov r1, #5888 + 378 00d4 4FF4E062 mov r2, #1792 + 379 .L59: + 380 00d8 A807 lsls r0, r5, #30 + 381 00da 03D5 bpl .L60 + 382 00dc 0A46 mov r2, r1 + 383 00de 08F48051 and r1, r8, #4096 + 384 00e2 0B43 orrs r3, r3, r1 + 385 .L60: + 386 00e4 6807 lsls r0, r5, #29 + 387 00e6 04D5 bpl .L61 + 388 00e8 08F40051 and r1, r8, #8192 + 389 00ec 42F40052 orr r2, r2, #8192 + 390 00f0 0B43 orrs r3, r3, r1 + 391 .L61: + 392 00f2 E904 lsls r1, r5, #19 + 393 00f4 04D5 bpl .L62 + 394 00f6 08F48041 and r1, r8, #16384 + 395 00fa 42F48042 orr r2, r2, #16384 + 396 00fe 0B43 orrs r3, r3, r1 + 397 .L62: + 398 0100 2807 lsls r0, r5, #28 + 399 0102 04D5 bpl .L63 + 400 0104 08F48031 and r1, r8, #65536 + 401 0108 42F48032 orr r2, r2, #65536 + 402 010c 0B43 orrs r3, r3, r1 + 403 .L63: + 404 010e E906 lsls r1, r5, #27 + ARM GAS /tmp/cctzdw5o.s page 8 + + + 405 0110 04D5 bpl .L64 + 406 0112 08F40031 and r1, r8, #131072 + 407 0116 42F40032 orr r2, r2, #131072 + 408 011a 0B43 orrs r3, r3, r1 + 409 .L64: + 410 011c A806 lsls r0, r5, #26 + 411 011e 04D5 bpl .L65 + 412 0120 08F48021 and r1, r8, #262144 + 413 0124 42F48022 orr r2, r2, #262144 + 414 0128 0B43 orrs r3, r3, r1 + 415 .L65: + 416 012a 6906 lsls r1, r5, #25 + 417 012c 04D5 bpl .L66 + 418 012e 08F40021 and r1, r8, #524288 + 419 0132 42F40022 orr r2, r2, #524288 + 420 0136 0B43 orrs r3, r3, r1 + 421 .L66: + 422 0138 A805 lsls r0, r5, #22 + 423 013a 04D5 bpl .L67 + 424 013c 08F40001 and r1, r8, #8388608 + 425 0140 42F40002 orr r2, r2, #8388608 + 426 0144 0B43 orrs r3, r3, r1 + 427 .L67: + 428 0146 6905 lsls r1, r5, #21 + 429 0148 04D5 bpl .L68 + 430 014a 08F08071 and r1, r8, #16777216 + 431 014e 42F08072 orr r2, r2, #16777216 + 432 0152 0B43 orrs r3, r3, r1 + 433 .L68: + 434 0154 2805 lsls r0, r5, #20 + 435 0156 04D5 bpl .L69 + 436 0158 08F00071 and r1, r8, #33554432 + 437 015c 42F00072 orr r2, r2, #33554432 + 438 0160 0B43 orrs r3, r3, r1 + 439 .L69: + 440 0162 A904 lsls r1, r5, #18 + 441 0164 04D5 bpl .L70 + 442 0166 08F08061 and r1, r8, #67108864 + 443 016a 42F08062 orr r2, r2, #67108864 + 444 016e 0B43 orrs r3, r3, r1 + 445 .L70: + 446 0170 6804 lsls r0, r5, #17 + 447 0172 04D5 bpl .L71 + 448 0174 08F00061 and r1, r8, #134217728 + 449 0178 42F00062 orr r2, r2, #134217728 + 450 017c 0B43 orrs r3, r3, r1 + 451 .L71: + 452 017e 2904 lsls r1, r5, #16 + 453 0180 04D5 bpl .L72 + 454 0182 08F04051 and r1, r8, #805306368 + 455 0186 42F04052 orr r2, r2, #805306368 + 456 018a 0B43 orrs r3, r3, r1 + 457 .L72: + 458 018c E803 lsls r0, r5, #15 + 459 018e 05D5 bpl .L73 + 460 0190 08F08048 and r8, r8, #1073741824 + 461 0194 43EA0803 orr r3, r3, r8 + ARM GAS /tmp/cctzdw5o.s page 9 + + + 462 0198 42F08042 orr r2, r2, #1073741824 + 463 .L73: + 464 019c 4E4D ldr r5, .L160+4 + 465 019e 296A ldr r1, [r5, #32] + 466 01a0 21EA0202 bic r2, r1, r2 + 467 01a4 1343 orrs r3, r3, r2 + 468 01a6 2B62 str r3, [r5, #32] + 469 01a8 6B69 ldr r3, [r5, #20] + 470 01aa 43F40033 orr r3, r3, #131072 + 471 01ae 6B61 str r3, [r5, #20] + 472 01b0 4FF47A70 mov r0, #1000 + 473 01b4 FFF7FEFF bl FLASH_WaitForLastOperation + 474 01b8 2368 ldr r3, [r4] + 475 01ba 0028 cmp r0, #0 + 476 01bc 3FF436AF beq .L57 + 477 01c0 0127 movs r7, #1 + 478 01c2 33E7 b .L57 + 479 .L151: + 480 01c4 4FF47A70 mov r0, #1000 + 481 01c8 2569 ldr r5, [r4, #16] + 482 01ca FFF7FEFF bl FLASH_WaitForLastOperation + 483 01ce 0028 cmp r0, #0 + 484 01d0 55D0 beq .L55 + 485 01d2 2368 ldr r3, [r4] + 486 01d4 0127 movs r7, #1 + 487 01d6 27E7 b .L54 + 488 .L150: + 489 01d8 D0E90187 ldrd r8, r7, [r0, #4] + 490 01dc 4FF47A70 mov r0, #1000 + 491 01e0 D4F80C90 ldr r9, [r4, #12] + 492 01e4 FFF7FEFF bl FLASH_WaitForLastOperation + 493 01e8 0028 cmp r0, #0 + 494 01ea 3CD1 bne .L158 + 495 01ec B8F1000F cmp r8, #0 + 496 01f0 7AD1 bne .L52 + 497 01f2 394B ldr r3, .L160+4 + 498 01f4 47EA0947 orr r7, r7, r9, lsl #16 + 499 01f8 DF62 str r7, [r3, #44] + 500 .L53: + 501 01fa 374A ldr r2, .L160+4 + 502 01fc 5369 ldr r3, [r2, #20] + 503 01fe 43F40033 orr r3, r3, #131072 + 504 0202 5361 str r3, [r2, #20] + 505 0204 4FF47A70 mov r0, #1000 + 506 0208 FFF7FEFF bl FLASH_WaitForLastOperation + 507 020c 071E subs r7, r0, #0 + 508 020e 2368 ldr r3, [r4] + 509 0210 18BF it ne + 510 0212 0127 movne r7, #1 + 511 0214 05E7 b .L50 + 512 .L155: + 513 0216 4FF47A70 mov r0, #1000 + 514 021a A46A ldr r4, [r4, #40] + 515 021c FFF7FEFF bl FLASH_WaitForLastOperation + 516 0220 0028 cmp r0, #0 + 517 0222 40D0 beq .L84 + 518 .L85: + ARM GAS /tmp/cctzdw5o.s page 10 + + + 519 0224 0127 movs r7, #1 + 520 0226 09E7 b .L83 + 521 .L154: + 522 0228 4FF47A70 mov r0, #1000 + 523 022c D4E90B58 ldrd r5, r8, [r4, #44] + 524 0230 FFF7FEFF bl FLASH_WaitForLastOperation + 525 0234 E8B9 cbnz r0, .L159 + 526 0236 012D cmp r5, #1 + 527 0238 06D1 bne .L81 + 528 023a 274A ldr r2, .L160+4 + 529 023c 136F ldr r3, [r2, #112] + 530 023e 23F07F03 bic r3, r3, #127 + 531 0242 43EA0803 orr r3, r3, r8 + 532 0246 1367 str r3, [r2, #112] + 533 .L81: + 534 0248 234A ldr r2, .L160+4 + 535 024a 5369 ldr r3, [r2, #20] + 536 024c 43F40033 orr r3, r3, #131072 + 537 0250 5361 str r3, [r2, #20] + 538 0252 4FF47A70 mov r0, #1000 + 539 0256 FFF7FEFF bl FLASH_WaitForLastOperation + 540 025a 2368 ldr r3, [r4] + 541 025c 0028 cmp r0, #0 + 542 025e 3FF4EAAE beq .L79 + 543 0262 0127 movs r7, #1 + 544 0264 E7E6 b .L79 + 545 .L158: + 546 0266 2368 ldr r3, [r4] + 547 0268 2F46 mov r7, r5 + 548 026a DAE6 b .L50 + 549 .L157: + 550 026c 2368 ldr r3, [r4] + 551 026e 0127 movs r7, #1 + 552 0270 DCE6 b .L57 + 553 .L159: + 554 0272 2368 ldr r3, [r4] + 555 0274 0127 movs r7, #1 + 556 0276 DEE6 b .L79 + 557 .L156: + 558 0278 2368 ldr r3, [r4] + 559 027a 0127 movs r7, #1 + 560 027c D8E6 b .L75 + 561 .L55: + 562 027e 164A ldr r2, .L160+4 + 563 0280 136A ldr r3, [r2, #32] + 564 0282 23F0FF03 bic r3, r3, #255 + 565 0286 2B43 orrs r3, r3, r5 + 566 0288 1362 str r3, [r2, #32] + 567 028a 5369 ldr r3, [r2, #20] + 568 028c 43F40033 orr r3, r3, #131072 + 569 0290 5361 str r3, [r2, #20] + 570 0292 4FF47A70 mov r0, #1000 + 571 0296 FFF7FEFF bl FLASH_WaitForLastOperation + 572 029a 2368 ldr r3, [r4] + 573 029c 0028 cmp r0, #0 + 574 029e 3FF4C3AE beq .L54 + 575 02a2 0127 movs r7, #1 + ARM GAS /tmp/cctzdw5o.s page 11 + + + 576 02a4 C0E6 b .L54 + 577 .L84: + 578 02a6 0C4A ldr r2, .L160+4 + 579 02a8 136F ldr r3, [r2, #112] + 580 02aa 23F48033 bic r3, r3, #65536 + 581 02ae 2343 orrs r3, r3, r4 + 582 02b0 1367 str r3, [r2, #112] + 583 02b2 5369 ldr r3, [r2, #20] + 584 02b4 43F40033 orr r3, r3, #131072 + 585 02b8 4FF47A70 mov r0, #1000 + 586 02bc 5361 str r3, [r2, #20] + 587 02be FFF7FEFF bl FLASH_WaitForLastOperation + 588 02c2 0028 cmp r0, #0 + 589 02c4 3FF4BAAE beq .L83 + 590 02c8 ACE7 b .L85 + 591 .L86: + 592 02ca 0227 movs r7, #2 + 593 02cc 3846 mov r0, r7 + 594 02ce BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 595 .L161: + 596 02d2 00BF .align 2 + 597 .L160: + 598 02d4 00000000 .word pFlash + 599 02d8 00200240 .word 1073881088 + 600 02dc 00C0FFFF .word -16384 + 601 .L88: + 602 02e0 1A46 mov r2, r3 + 603 02e2 4FF48051 mov r1, #4096 + 604 02e6 F7E6 b .L59 + 605 .L52: + 606 02e8 B8F1010F cmp r8, #1 + 607 02ec 85D1 bne .L53 + 608 02ee 024B ldr r3, .L162 + 609 02f0 47EA0947 orr r7, r7, r9, lsl #16 + 610 02f4 1F63 str r7, [r3, #48] + 611 02f6 80E7 b .L53 + 612 .L163: + 613 .align 2 + 614 .L162: + 615 02f8 00200240 .word 1073881088 + 617 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits + 618 .align 1 + 619 .p2align 2,,3 + 620 .global HAL_FLASHEx_OBGetConfig + 621 .syntax unified + 622 .thumb + 623 .thumb_func + 624 .fpu fpv4-sp-d16 + 626 HAL_FLASHEx_OBGetConfig: + 627 @ args = 0, pretend = 0, frame = 0 + 628 @ frame_needed = 0, uses_anonymous_args = 0 + 629 @ link register save eliminated. + 630 0000 4368 ldr r3, [r0, #4] + 631 0002 012B cmp r3, #1 + 632 0004 10B4 push {r4} + 633 0006 3BD9 bls .L176 + 634 0008 0622 movs r2, #6 + ARM GAS /tmp/cctzdw5o.s page 12 + + + 635 .L165: + 636 000a 284B ldr r3, .L177 + 637 000c 1B6A ldr r3, [r3, #32] + 638 000e DBB2 uxtb r3, r3 + 639 0010 AA2B cmp r3, #170 + 640 0012 02D0 beq .L167 + 641 0014 CC2B cmp r3, #204 + 642 0016 18BF it ne + 643 0018 BB23 movne r3, #187 + 644 .L167: + 645 001a 2449 ldr r1, .L177 + 646 001c 0361 str r3, [r0, #16] + 647 001e 0B6A ldr r3, [r1, #32] + 648 0020 C469 ldr r4, [r0, #28] + 649 0022 23F0FF03 bic r3, r3, #255 + 650 0026 012C cmp r4, #1 + 651 0028 8361 str r3, [r0, #24] + 652 002a 14D1 bne .L168 + 653 002c 4C6A ldr r4, [r1, #36] + 654 002e 204B ldr r3, .L177+4 + 655 0030 03EAC404 and r4, r3, r4, lsl #3 + 656 0034 04F10064 add r4, r4, #134217728 + 657 0038 0462 str r4, [r0, #32] + 658 003a 8C6A ldr r4, [r1, #40] + 659 003c 03EAC403 and r3, r3, r4, lsl #3 + 660 0040 03F10063 add r3, r3, #134217728 + 661 0044 4362 str r3, [r0, #36] + 662 0046 8B6A ldr r3, [r1, #40] + 663 0048 03F00043 and r3, r3, #-2147483648 + 664 004c 43F00103 orr r3, r3, #1 + 665 0050 42F00802 orr r2, r2, #8 + 666 0054 C361 str r3, [r0, #28] + 667 .L168: + 668 0056 42F01003 orr r3, r2, #16 + 669 005a 1449 ldr r1, .L177 + 670 005c 0360 str r3, [r0] + 671 005e 0B6F ldr r3, [r1, #112] + 672 0060 C46A ldr r4, [r0, #44] + 673 0062 03F48033 and r3, r3, #65536 + 674 0066 012C cmp r4, #1 + 675 0068 8362 str r3, [r0, #40] + 676 006a 06D1 bne .L164 + 677 006c 42F03002 orr r2, r2, #48 + 678 0070 0260 str r2, [r0] + 679 0072 0B6F ldr r3, [r1, #112] + 680 0074 03F07F03 and r3, r3, #127 + 681 0078 0363 str r3, [r0, #48] + 682 .L164: + 683 007a 5DF8044B ldr r4, [sp], #4 + 684 007e 7047 bx lr + 685 .L176: + 686 0080 0722 movs r2, #7 + 687 0082 0A49 ldr r1, .L177 + 688 0084 0260 str r2, [r0] + 689 0086 43B9 cbnz r3, .L166 + 690 0088 CB6A ldr r3, [r1, #44] + 691 008a 03F03F03 and r3, r3, #63 + ARM GAS /tmp/cctzdw5o.s page 13 + + + 692 008e 8360 str r3, [r0, #8] + 693 0090 CB6A ldr r3, [r1, #44] + 694 0092 C3F30543 ubfx r3, r3, #16, #6 + 695 0096 C360 str r3, [r0, #12] + 696 0098 B7E7 b .L165 + 697 .L166: + 698 009a 0B6B ldr r3, [r1, #48] + 699 009c 03F03F03 and r3, r3, #63 + 700 00a0 8360 str r3, [r0, #8] + 701 00a2 0B6B ldr r3, [r1, #48] + 702 00a4 C3F30543 ubfx r3, r3, #16, #6 + 703 00a8 C360 str r3, [r0, #12] + 704 00aa AEE7 b .L165 + 705 .L178: + 706 .align 2 + 707 .L177: + 708 00ac 00200240 .word 1073881088 + 709 00b0 F8FF0100 .word 131064 + 711 .section .text.HAL_FLASHEx_EnableSecMemProtection,"ax",%progbits + 712 .align 1 + 713 .p2align 2,,3 + 714 .global HAL_FLASHEx_EnableSecMemProtection + 715 .syntax unified + 716 .thumb + 717 .thumb_func + 718 .fpu fpv4-sp-d16 + 720 HAL_FLASHEx_EnableSecMemProtection: + 721 @ args = 0, pretend = 0, frame = 0 + 722 @ frame_needed = 0, uses_anonymous_args = 0 + 723 @ link register save eliminated. + 724 0000 034A ldr r2, .L180 + 725 0002 5369 ldr r3, [r2, #20] + 726 0004 43F08053 orr r3, r3, #268435456 + 727 0008 0020 movs r0, #0 + 728 000a 5361 str r3, [r2, #20] + 729 000c 7047 bx lr + 730 .L181: + 731 000e 00BF .align 2 + 732 .L180: + 733 0010 00200240 .word 1073881088 + 735 .section .text.HAL_FLASHEx_EnableDebugger,"ax",%progbits + 736 .align 1 + 737 .p2align 2,,3 + 738 .global HAL_FLASHEx_EnableDebugger + 739 .syntax unified + 740 .thumb + 741 .thumb_func + 742 .fpu fpv4-sp-d16 + 744 HAL_FLASHEx_EnableDebugger: + 745 @ args = 0, pretend = 0, frame = 0 + 746 @ frame_needed = 0, uses_anonymous_args = 0 + 747 @ link register save eliminated. + 748 0000 024A ldr r2, .L183 + 749 0002 1368 ldr r3, [r2] + 750 0004 43F48023 orr r3, r3, #262144 + 751 0008 1360 str r3, [r2] + 752 000a 7047 bx lr + ARM GAS /tmp/cctzdw5o.s page 14 + + + 753 .L184: + 754 .align 2 + 755 .L183: + 756 000c 00200240 .word 1073881088 + 758 .section .text.HAL_FLASHEx_DisableDebugger,"ax",%progbits + 759 .align 1 + 760 .p2align 2,,3 + 761 .global HAL_FLASHEx_DisableDebugger + 762 .syntax unified + 763 .thumb + 764 .thumb_func + 765 .fpu fpv4-sp-d16 + 767 HAL_FLASHEx_DisableDebugger: + 768 @ args = 0, pretend = 0, frame = 0 + 769 @ frame_needed = 0, uses_anonymous_args = 0 + 770 @ link register save eliminated. + 771 0000 024A ldr r2, .L186 + 772 0002 1368 ldr r3, [r2] + 773 0004 23F48023 bic r3, r3, #262144 + 774 0008 1360 str r3, [r2] + 775 000a 7047 bx lr + 776 .L187: + 777 .align 2 + 778 .L186: + 779 000c 00200240 .word 1073881088 + 781 .section .text.FLASH_PageErase,"ax",%progbits + 782 .align 1 + 783 .p2align 2,,3 + 784 .global FLASH_PageErase + 785 .syntax unified + 786 .thumb + 787 .thumb_func + 788 .fpu fpv4-sp-d16 + 790 FLASH_PageErase: + 791 @ args = 0, pretend = 0, frame = 0 + 792 @ frame_needed = 0, uses_anonymous_args = 0 + 793 @ link register save eliminated. + 794 0000 084B ldr r3, .L189 + 795 0002 5A69 ldr r2, [r3, #20] + 796 0004 C000 lsls r0, r0, #3 + 797 0006 22F4FC72 bic r2, r2, #504 + 798 000a 00F4FF60 and r0, r0, #2040 + 799 000e 1043 orrs r0, r0, r2 + 800 0010 5861 str r0, [r3, #20] + 801 0012 5A69 ldr r2, [r3, #20] + 802 0014 42F00202 orr r2, r2, #2 + 803 0018 5A61 str r2, [r3, #20] + 804 001a 5A69 ldr r2, [r3, #20] + 805 001c 42F48032 orr r2, r2, #65536 + 806 0020 5A61 str r2, [r3, #20] + 807 0022 7047 bx lr + 808 .L190: + 809 .align 2 + 810 .L189: + 811 0024 00200240 .word 1073881088 + 813 .section .text.FLASH_FlushCaches,"ax",%progbits + 814 .align 1 + ARM GAS /tmp/cctzdw5o.s page 15 + + + 815 .p2align 2,,3 + 816 .global FLASH_FlushCaches + 817 .syntax unified + 818 .thumb + 819 .thumb_func + 820 .fpu fpv4-sp-d16 + 822 FLASH_FlushCaches: + 823 @ args = 0, pretend = 0, frame = 0 + 824 @ frame_needed = 0, uses_anonymous_args = 0 + 825 @ link register save eliminated. + 826 0000 1549 ldr r1, .L194 + 827 0002 0B7F ldrb r3, [r1, #28] @ zero_extendqisi2 + 828 0004 03F0FD02 and r2, r3, #253 + 829 0008 012A cmp r2, #1 + 830 000a DBB2 uxtb r3, r3 + 831 000c 10D1 bne .L192 + 832 000e 134A ldr r2, .L194+4 + 833 0010 1068 ldr r0, [r2] + 834 0012 20F40070 bic r0, r0, #512 + 835 0016 1060 str r0, [r2] + 836 0018 1068 ldr r0, [r2] + 837 001a 40F40060 orr r0, r0, #2048 + 838 001e 1060 str r0, [r2] + 839 0020 1068 ldr r0, [r2] + 840 0022 20F40060 bic r0, r0, #2048 + 841 0026 1060 str r0, [r2] + 842 0028 1068 ldr r0, [r2] + 843 002a 40F40070 orr r0, r0, #512 + 844 002e 1060 str r0, [r2] + 845 .L192: + 846 0030 023B subs r3, r3, #2 + 847 0032 012B cmp r3, #1 + 848 0034 0CD8 bhi .L193 + 849 0036 094B ldr r3, .L194+4 + 850 0038 1A68 ldr r2, [r3] + 851 003a 42F48052 orr r2, r2, #4096 + 852 003e 1A60 str r2, [r3] + 853 0040 1A68 ldr r2, [r3] + 854 0042 22F48052 bic r2, r2, #4096 + 855 0046 1A60 str r2, [r3] + 856 0048 1A68 ldr r2, [r3] + 857 004a 42F48062 orr r2, r2, #1024 + 858 004e 1A60 str r2, [r3] + 859 .L193: + 860 0050 0023 movs r3, #0 + 861 0052 0B77 strb r3, [r1, #28] + 862 0054 7047 bx lr + 863 .L195: + 864 0056 00BF .align 2 + 865 .L194: + 866 0058 00000000 .word pFlash + 867 005c 00200240 .word 1073881088 + 869 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/cctzdw5o.s page 16 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_flash_ex.c + /tmp/cctzdw5o.s:16 .text.HAL_FLASHEx_Erase:0000000000000000 $t + /tmp/cctzdw5o.s:25 .text.HAL_FLASHEx_Erase:0000000000000000 HAL_FLASHEx_Erase + /tmp/cctzdw5o.s:179 .text.HAL_FLASHEx_Erase:0000000000000154 $d + /tmp/cctzdw5o.s:183 .text.HAL_FLASHEx_Erase_IT:0000000000000000 $t + /tmp/cctzdw5o.s:191 .text.HAL_FLASHEx_Erase_IT:0000000000000000 HAL_FLASHEx_Erase_IT + /tmp/cctzdw5o.s:280 .text.HAL_FLASHEx_Erase_IT:00000000000000b4 $d + /tmp/cctzdw5o.s:284 .text.HAL_FLASHEx_OBProgram:0000000000000000 $t + /tmp/cctzdw5o.s:292 .text.HAL_FLASHEx_OBProgram:0000000000000000 HAL_FLASHEx_OBProgram + /tmp/cctzdw5o.s:598 .text.HAL_FLASHEx_OBProgram:00000000000002d4 $d + /tmp/cctzdw5o.s:602 .text.HAL_FLASHEx_OBProgram:00000000000002e0 $t + /tmp/cctzdw5o.s:615 .text.HAL_FLASHEx_OBProgram:00000000000002f8 $d + /tmp/cctzdw5o.s:618 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 $t + /tmp/cctzdw5o.s:626 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 HAL_FLASHEx_OBGetConfig + /tmp/cctzdw5o.s:708 .text.HAL_FLASHEx_OBGetConfig:00000000000000ac $d + /tmp/cctzdw5o.s:712 .text.HAL_FLASHEx_EnableSecMemProtection:0000000000000000 $t + /tmp/cctzdw5o.s:720 .text.HAL_FLASHEx_EnableSecMemProtection:0000000000000000 HAL_FLASHEx_EnableSecMemProtection + /tmp/cctzdw5o.s:733 .text.HAL_FLASHEx_EnableSecMemProtection:0000000000000010 $d + /tmp/cctzdw5o.s:736 .text.HAL_FLASHEx_EnableDebugger:0000000000000000 $t + /tmp/cctzdw5o.s:744 .text.HAL_FLASHEx_EnableDebugger:0000000000000000 HAL_FLASHEx_EnableDebugger + /tmp/cctzdw5o.s:756 .text.HAL_FLASHEx_EnableDebugger:000000000000000c $d + /tmp/cctzdw5o.s:759 .text.HAL_FLASHEx_DisableDebugger:0000000000000000 $t + /tmp/cctzdw5o.s:767 .text.HAL_FLASHEx_DisableDebugger:0000000000000000 HAL_FLASHEx_DisableDebugger + /tmp/cctzdw5o.s:779 .text.HAL_FLASHEx_DisableDebugger:000000000000000c $d + /tmp/cctzdw5o.s:782 .text.FLASH_PageErase:0000000000000000 $t + /tmp/cctzdw5o.s:790 .text.FLASH_PageErase:0000000000000000 FLASH_PageErase + /tmp/cctzdw5o.s:811 .text.FLASH_PageErase:0000000000000024 $d + /tmp/cctzdw5o.s:814 .text.FLASH_FlushCaches:0000000000000000 $t + /tmp/cctzdw5o.s:822 .text.FLASH_FlushCaches:0000000000000000 FLASH_FlushCaches + /tmp/cctzdw5o.s:866 .text.FLASH_FlushCaches:0000000000000058 $d + +UNDEFINED SYMBOLS +FLASH_WaitForLastOperation +pFlash diff --git a/codice/build/stm32g4xx_hal_flash_ex.o b/codice/build/stm32g4xx_hal_flash_ex.o new file mode 100644 index 0000000000000000000000000000000000000000..8b87ce3678bea61f2d76120b12af6521cbe187db GIT binary patch literal 4232 zcma)8Z){W76+iDi+i~JRoH%qOQ0By;HZ}2_1WMN+;rJ0Jah!%=)-lvBel~8N4I#!h zN`@w3gsQIEA64qqRu%ikB(_y->ySpft{}mOZA_grB@&Ej<->$YwrS7WlbT6%-Z}4& z^K78omEJq|ch2vgd+s^+-uKQ7M?wt4fZiDJz&Zlhyg{*;cPYXHPrxSVU0LI!lYPiMXr+MB6-`k#s=~`$`NpS1!c8BY3)WuCtCo_*0B zZWX&^IN2I&6^CRHNFr7wV$`#PjJNsLljEIYP%a$o#ON_vMIy$iac%S8E3r?h>zguf zTh`aZq2Dl?yB_+L1Hn4NN zbAfp}TC`vGhM|Y)>d3qpYZot=dzV_pR=FSy6kA2Mrwen~Tb5fz zuIhQQ)G_~u66@TYz1hGm>ua%u$)9l~>&%SkvD3cz#q$HWFF^YGS!Vn03@1XjW7XVX z3T0yf=}zID1}J}Ac&Q<{)X~ti^o|9}|1R9Y_dg2Y8pu4W?3tw%>nj(Br6N^yX>IH4 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zXGVX1LdY8V4M&5_G4&y%6 GdH)6KhpcY^ literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_hal_flash_ramfunc.d b/codice/build/stm32g4xx_hal_flash_ramfunc.d new file mode 100644 index 0000000..b967f38 --- /dev/null +++ b/codice/build/stm32g4xx_hal_flash_ramfunc.d @@ -0,0 +1,84 @@ +build/stm32g4xx_hal_flash_ramfunc.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_flash_ramfunc.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_flash_ramfunc.lst b/codice/build/stm32g4xx_hal_flash_ramfunc.lst new file mode 100644 index 0000000..fe9b8ad --- /dev/null +++ b/codice/build/stm32g4xx_hal_flash_ramfunc.lst @@ -0,0 +1,90 @@ +ARM GAS /tmp/ccJNvkTm.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_flash_ramfunc.c" + 14 .text + 15 .section .RamFunc,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_FLASHEx_EnableRunPowerDown + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_FLASHEx_EnableRunPowerDown: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 054B ldr r3, .L3 + 30 0002 0649 ldr r1, .L3+4 + 31 0004 064A ldr r2, .L3+8 + 32 0006 5960 str r1, [r3, #4] + 33 0008 5A60 str r2, [r3, #4] + 34 000a 1A68 ldr r2, [r3] + 35 000c 42F40052 orr r2, r2, #8192 + 36 0010 0020 movs r0, #0 + 37 0012 1A60 str r2, [r3] + 38 0014 7047 bx lr + 39 .L4: + 40 0016 00BF .align 2 + 41 .L3: + 42 0018 00200240 .word 1073881088 + 43 001c 37261504 .word 68494903 + 44 0020 FDFCFBFA .word -84148995 + 46 .align 1 + 47 .p2align 2,,3 + 48 .global HAL_FLASHEx_DisableRunPowerDown + 49 .syntax unified + 50 .thumb + 51 .thumb_func + 52 .fpu fpv4-sp-d16 + 54 HAL_FLASHEx_DisableRunPowerDown: + 55 @ args = 0, pretend = 0, frame = 0 + 56 @ frame_needed = 0, uses_anonymous_args = 0 + 57 @ link register save eliminated. + 58 0024 054B ldr r3, .L6 + 59 0026 0649 ldr r1, .L6+4 + 60 0028 064A ldr r2, .L6+8 + ARM GAS /tmp/ccJNvkTm.s page 2 + + + 61 002a 5960 str r1, [r3, #4] + 62 002c 5A60 str r2, [r3, #4] + 63 002e 1A68 ldr r2, [r3] + 64 0030 22F40052 bic r2, r2, #8192 + 65 0034 0020 movs r0, #0 + 66 0036 1A60 str r2, [r3] + 67 0038 7047 bx lr + 68 .L7: + 69 003a 00BF .align 2 + 70 .L6: + 71 003c 00200240 .word 1073881088 + 72 0040 37261504 .word 68494903 + 73 0044 FDFCFBFA .word -84148995 + 75 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccJNvkTm.s page 3 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_flash_ramfunc.c + /tmp/ccJNvkTm.s:16 .RamFunc:0000000000000000 $t + /tmp/ccJNvkTm.s:25 .RamFunc:0000000000000000 HAL_FLASHEx_EnableRunPowerDown + /tmp/ccJNvkTm.s:42 .RamFunc:0000000000000018 $d + /tmp/ccJNvkTm.s:46 .RamFunc:0000000000000024 $t + /tmp/ccJNvkTm.s:54 .RamFunc:0000000000000024 HAL_FLASHEx_DisableRunPowerDown + /tmp/ccJNvkTm.s:71 .RamFunc:000000000000003c $d + +NO UNDEFINED SYMBOLS diff --git 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Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_pcd.lst b/codice/build/stm32g4xx_hal_pcd.lst new file mode 100644 index 0000000..d80ac9a --- /dev/null +++ b/codice/build/stm32g4xx_hal_pcd.lst @@ -0,0 +1,2030 @@ +ARM GAS /tmp/ccl2eyqE.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_pcd.c" + 14 .text + 15 .section .text.HAL_PCD_MspInit,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .weak HAL_PCD_MspInit + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_PCD_MspInit: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 7047 bx lr + 31 0002 00BF .section .text.HAL_PCD_Init,"ax",%progbits + 32 .align 1 + 33 .p2align 2,,3 + 34 .global HAL_PCD_Init + 35 .syntax unified + 36 .thumb + 37 .thumb_func + 38 .fpu fpv4-sp-d16 + 40 HAL_PCD_Init: + 41 @ args = 0, pretend = 0, frame = 0 + 42 @ frame_needed = 0, uses_anonymous_args = 0 + 43 0000 0028 cmp r0, #0 + 44 0002 5ED0 beq .L9 + 45 0004 F0B5 push {r4, r5, r6, r7, lr} + 46 0006 90F8A932 ldrb r3, [r0, #681] @ zero_extendqisi2 + 47 000a 87B0 sub sp, sp, #28 + 48 000c 0446 mov r4, r0 + 49 000e 03F0FF02 and r2, r3, #255 + 50 0012 002B cmp r3, #0 + 51 0014 50D0 beq .L20 + 52 .L5: + 53 0016 0323 movs r3, #3 + 54 0018 2068 ldr r0, [r4] + 55 001a 84F8A932 strb r3, [r4, #681] + 56 001e FFF7FEFF bl USB_DisableGlobalInt + 57 0022 6568 ldr r5, [r4, #4] + 58 0024 5DB3 cbz r5, .L6 + 59 0026 0023 movs r3, #0 + 60 0028 4FF0010E mov lr, #1 + ARM GAS /tmp/ccl2eyqE.s page 2 + + + 61 002c 1846 mov r0, r3 + 62 .L7: + 63 002e 03EB8301 add r1, r3, r3, lsl #2 + 64 0032 04EBC102 add r2, r4, r1, lsl #3 + 65 0036 03F1010C add ip, r3, #1 + 66 003a 82F82830 strb r3, [r2, #40] + 67 003e D386 strh r3, [r2, #54] @ movhi + 68 0040 5FFA8CF3 uxtb r3, ip + 69 0044 AB42 cmp r3, r5 + 70 0046 C2E90E00 strd r0, r0, [r2, #56] + 71 004a 82F829E0 strb lr, [r2, #41] + 72 004e 82F82B00 strb r0, [r2, #43] + 73 0052 1064 str r0, [r2, #64] + 74 0054 EBD3 bcc .L7 + 75 0056 0022 movs r2, #0 + 76 0058 1146 mov r1, r2 + 77 .L8: + 78 005a 02EB8203 add r3, r2, r2, lsl #2 + 79 005e 04EBC303 add r3, r4, r3, lsl #3 + 80 0062 501C adds r0, r2, #1 + 81 0064 83F86821 strb r2, [r3, #360] + 82 0068 C2B2 uxtb r2, r0 + 83 006a AA42 cmp r2, r5 + 84 006c C3E95E11 strd r1, r1, [r3, #376] + 85 0070 83F86911 strb r1, [r3, #361] + 86 0074 83F86B11 strb r1, [r3, #363] + 87 0078 C3F88011 str r1, [r3, #384] + 88 007c EDD3 bcc .L8 + 89 .L6: + 90 007e 2546 mov r5, r4 + 91 0080 EC46 mov ip, sp + 92 0082 55F8107B ldr r7, [r5], #16 + 93 0086 0FCD ldmia r5!, {r0, r1, r2, r3} + 94 0088 ACE80F00 stmia ip!, {r0, r1, r2, r3} + 95 008c 2B68 ldr r3, [r5] + 96 008e CCF80030 str r3, [ip] + 97 0092 04F1040E add lr, r4, #4 + 98 0096 9EE80E00 ldm lr, {r1, r2, r3} + 99 009a 3846 mov r0, r7 + 100 009c FFF7FEFF bl USB_DevInit + 101 00a0 E369 ldr r3, [r4, #28] + 102 00a2 0122 movs r2, #1 + 103 00a4 0026 movs r6, #0 + 104 00a6 9342 cmp r3, r2 + 105 00a8 84F82460 strb r6, [r4, #36] + 106 00ac 84F8A922 strb r2, [r4, #681] + 107 00b0 09D0 beq .L21 + 108 00b2 3046 mov r0, r6 + 109 00b4 07B0 add sp, sp, #28 + 110 @ sp needed + 111 00b6 F0BD pop {r4, r5, r6, r7, pc} + 112 .L20: + 113 00b8 80F8A822 strb r2, [r0, #680] + 114 00bc FFF7FEFF bl HAL_PCD_MspInit + 115 00c0 A9E7 b .L5 + 116 .L9: + 117 00c2 0120 movs r0, #1 + ARM GAS /tmp/ccl2eyqE.s page 3 + + + 118 00c4 7047 bx lr + 119 .L21: + 120 00c6 2046 mov r0, r4 + 121 00c8 FFF7FEFF bl HAL_PCDEx_ActivateLPM + 122 00cc 3046 mov r0, r6 + 123 00ce 07B0 add sp, sp, #28 + 124 @ sp needed + 125 00d0 F0BD pop {r4, r5, r6, r7, pc} + 127 00d2 00BF .section .text.HAL_PCD_MspDeInit,"ax",%progbits + 128 .align 1 + 129 .p2align 2,,3 + 130 .weak HAL_PCD_MspDeInit + 131 .syntax unified + 132 .thumb + 133 .thumb_func + 134 .fpu fpv4-sp-d16 + 136 HAL_PCD_MspDeInit: + 137 @ args = 0, pretend = 0, frame = 0 + 138 @ frame_needed = 0, uses_anonymous_args = 0 + 139 @ link register save eliminated. + 140 0000 7047 bx lr + 142 0002 00BF .section .text.HAL_PCD_DeInit,"ax",%progbits + 143 .align 1 + 144 .p2align 2,,3 + 145 .global HAL_PCD_DeInit + 146 .syntax unified + 147 .thumb + 148 .thumb_func + 149 .fpu fpv4-sp-d16 + 151 HAL_PCD_DeInit: + 152 @ args = 0, pretend = 0, frame = 0 + 153 @ frame_needed = 0, uses_anonymous_args = 0 + 154 0000 38B5 push {r3, r4, r5, lr} + 155 0002 40B1 cbz r0, .L26 + 156 0004 0446 mov r4, r0 + 157 0006 0323 movs r3, #3 + 158 0008 0068 ldr r0, [r0] + 159 000a 84F8A932 strb r3, [r4, #681] + 160 000e FFF7FEFF bl USB_StopDevice + 161 0012 0546 mov r5, r0 + 162 0014 10B1 cbz r0, .L28 + 163 .L26: + 164 0016 0125 movs r5, #1 + 165 0018 2846 mov r0, r5 + 166 001a 38BD pop {r3, r4, r5, pc} + 167 .L28: + 168 001c 2046 mov r0, r4 + 169 001e FFF7FEFF bl HAL_PCD_MspDeInit + 170 0022 84F8A952 strb r5, [r4, #681] + 171 0026 2846 mov r0, r5 + 172 0028 38BD pop {r3, r4, r5, pc} + 174 002a 00BF .section .text.HAL_PCD_Start,"ax",%progbits + 175 .align 1 + 176 .p2align 2,,3 + 177 .global HAL_PCD_Start + 178 .syntax unified + 179 .thumb + ARM GAS /tmp/ccl2eyqE.s page 4 + + + 180 .thumb_func + 181 .fpu fpv4-sp-d16 + 183 HAL_PCD_Start: + 184 @ args = 0, pretend = 0, frame = 0 + 185 @ frame_needed = 0, uses_anonymous_args = 0 + 186 0000 90F8A832 ldrb r3, [r0, #680] @ zero_extendqisi2 + 187 0004 012B cmp r3, #1 + 188 0006 0ED0 beq .L31 + 189 0008 10B5 push {r4, lr} + 190 000a 0446 mov r4, r0 + 191 000c 0123 movs r3, #1 + 192 000e 0068 ldr r0, [r0] + 193 0010 84F8A832 strb r3, [r4, #680] + 194 0014 FFF7FEFF bl USB_EnableGlobalInt + 195 0018 2068 ldr r0, [r4] + 196 001a FFF7FEFF bl USB_DevConnect + 197 001e 0020 movs r0, #0 + 198 0020 84F8A802 strb r0, [r4, #680] + 199 0024 10BD pop {r4, pc} + 200 .L31: + 201 0026 0220 movs r0, #2 + 202 0028 7047 bx lr + 204 002a 00BF .section .text.HAL_PCD_Stop,"ax",%progbits + 205 .align 1 + 206 .p2align 2,,3 + 207 .global HAL_PCD_Stop + 208 .syntax unified + 209 .thumb + 210 .thumb_func + 211 .fpu fpv4-sp-d16 + 213 HAL_PCD_Stop: + 214 @ args = 0, pretend = 0, frame = 0 + 215 @ frame_needed = 0, uses_anonymous_args = 0 + 216 0000 90F8A832 ldrb r3, [r0, #680] @ zero_extendqisi2 + 217 0004 012B cmp r3, #1 + 218 0006 0ED0 beq .L38 + 219 0008 10B5 push {r4, lr} + 220 000a 0446 mov r4, r0 + 221 000c 0123 movs r3, #1 + 222 000e 0068 ldr r0, [r0] + 223 0010 84F8A832 strb r3, [r4, #680] + 224 0014 FFF7FEFF bl USB_DisableGlobalInt + 225 0018 2068 ldr r0, [r4] + 226 001a FFF7FEFF bl USB_DevDisconnect + 227 001e 0020 movs r0, #0 + 228 0020 84F8A802 strb r0, [r4, #680] + 229 0024 10BD pop {r4, pc} + 230 .L38: + 231 0026 0220 movs r0, #2 + 232 0028 7047 bx lr + 234 002a 00BF .section .text.HAL_PCD_DataOutStageCallback,"ax",%progbits + 235 .align 1 + 236 .p2align 2,,3 + 237 .weak HAL_PCD_DataOutStageCallback + 238 .syntax unified + 239 .thumb + 240 .thumb_func + ARM GAS /tmp/ccl2eyqE.s page 5 + + + 241 .fpu fpv4-sp-d16 + 243 HAL_PCD_DataOutStageCallback: + 244 @ args = 0, pretend = 0, frame = 0 + 245 @ frame_needed = 0, uses_anonymous_args = 0 + 246 @ link register save eliminated. + 247 0000 7047 bx lr + 249 0002 00BF .section .text.HAL_PCD_DataInStageCallback,"ax",%progbits + 250 .align 1 + 251 .p2align 2,,3 + 252 .weak HAL_PCD_DataInStageCallback + 253 .syntax unified + 254 .thumb + 255 .thumb_func + 256 .fpu fpv4-sp-d16 + 258 HAL_PCD_DataInStageCallback: + 259 @ args = 0, pretend = 0, frame = 0 + 260 @ frame_needed = 0, uses_anonymous_args = 0 + 261 @ link register save eliminated. + 262 0000 7047 bx lr + 264 0002 00BF .section .text.HAL_PCD_SetupStageCallback,"ax",%progbits + 265 .align 1 + 266 .p2align 2,,3 + 267 .weak HAL_PCD_SetupStageCallback + 268 .syntax unified + 269 .thumb + 270 .thumb_func + 271 .fpu fpv4-sp-d16 + 273 HAL_PCD_SetupStageCallback: + 274 @ args = 0, pretend = 0, frame = 0 + 275 @ frame_needed = 0, uses_anonymous_args = 0 + 276 @ link register save eliminated. + 277 0000 7047 bx lr + 279 0002 00BF .section .text.HAL_PCD_SOFCallback,"ax",%progbits + 280 .align 1 + 281 .p2align 2,,3 + 282 .weak HAL_PCD_SOFCallback + 283 .syntax unified + 284 .thumb + 285 .thumb_func + 286 .fpu fpv4-sp-d16 + 288 HAL_PCD_SOFCallback: + 289 @ args = 0, pretend = 0, frame = 0 + 290 @ frame_needed = 0, uses_anonymous_args = 0 + 291 @ link register save eliminated. + 292 0000 7047 bx lr + 294 0002 00BF .section .text.HAL_PCD_ResetCallback,"ax",%progbits + 295 .align 1 + 296 .p2align 2,,3 + 297 .weak HAL_PCD_ResetCallback + 298 .syntax unified + 299 .thumb + 300 .thumb_func + 301 .fpu fpv4-sp-d16 + 303 HAL_PCD_ResetCallback: + 304 @ args = 0, pretend = 0, frame = 0 + 305 @ frame_needed = 0, uses_anonymous_args = 0 + 306 @ link register save eliminated. + ARM GAS /tmp/ccl2eyqE.s page 6 + + + 307 0000 7047 bx lr + 309 0002 00BF .section .text.HAL_PCD_SuspendCallback,"ax",%progbits + 310 .align 1 + 311 .p2align 2,,3 + 312 .weak HAL_PCD_SuspendCallback + 313 .syntax unified + 314 .thumb + 315 .thumb_func + 316 .fpu fpv4-sp-d16 + 318 HAL_PCD_SuspendCallback: + 319 @ args = 0, pretend = 0, frame = 0 + 320 @ frame_needed = 0, uses_anonymous_args = 0 + 321 @ link register save eliminated. + 322 0000 7047 bx lr + 324 0002 00BF .section .text.HAL_PCD_ResumeCallback,"ax",%progbits + 325 .align 1 + 326 .p2align 2,,3 + 327 .weak HAL_PCD_ResumeCallback + 328 .syntax unified + 329 .thumb + 330 .thumb_func + 331 .fpu fpv4-sp-d16 + 333 HAL_PCD_ResumeCallback: + 334 @ args = 0, pretend = 0, frame = 0 + 335 @ frame_needed = 0, uses_anonymous_args = 0 + 336 @ link register save eliminated. + 337 0000 7047 bx lr + 339 0002 00BF .section .text.HAL_PCD_IRQHandler,"ax",%progbits + 340 .align 1 + 341 .p2align 2,,3 + 342 .global HAL_PCD_IRQHandler + 343 .syntax unified + 344 .thumb + 345 .thumb_func + 346 .fpu fpv4-sp-d16 + 348 HAL_PCD_IRQHandler: + 349 @ args = 0, pretend = 0, frame = 8 + 350 @ frame_needed = 0, uses_anonymous_args = 0 + 351 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 352 0004 0446 mov r4, r0 + 353 0006 83B0 sub sp, sp, #12 + 354 0008 0068 ldr r0, [r0] + 355 000a FFF7FEFF bl USB_ReadInterrupts + 356 000e 10F40045 ands r5, r0, #32768 + 357 0012 2CD1 bne .L185 + 358 0014 4305 lsls r3, r0, #21 + 359 0016 00F17881 bmi .L186 + 360 001a 4704 lsls r7, r0, #17 + 361 001c 1BD4 bmi .L187 + 362 001e 10F40051 ands r1, r0, #8192 + 363 0022 40F0E281 bne .L188 + 364 0026 C604 lsls r6, r0, #19 + 365 0028 00F18B80 bmi .L189 + 366 002c 0505 lsls r5, r0, #20 + 367 002e 00F1F282 bmi .L190 + 368 0032 0106 lsls r1, r0, #24 + 369 0034 00F17482 bmi .L191 + ARM GAS /tmp/ccl2eyqE.s page 7 + + + 370 0038 8205 lsls r2, r0, #22 + 371 003a 00F1BA83 bmi .L192 + 372 003e C305 lsls r3, r0, #23 + 373 0040 12D5 bpl .L50 + 374 0042 2268 ldr r2, [r4] + 375 0044 B2F84430 ldrh r3, [r2, #68] + 376 0048 23F48073 bic r3, r3, #256 + 377 004c 1B04 lsls r3, r3, #16 + 378 004e 1B0C lsrs r3, r3, #16 + 379 0050 A2F84430 strh r3, [r2, #68] @ movhi + 380 0054 08E0 b .L50 + 381 .L187: + 382 0056 2268 ldr r2, [r4] + 383 0058 B2F84430 ldrh r3, [r2, #68] + 384 005c 23F48043 bic r3, r3, #16384 + 385 0060 1B04 lsls r3, r3, #16 + 386 0062 1B0C lsrs r3, r3, #16 + 387 0064 A2F84430 strh r3, [r2, #68] @ movhi + 388 .L50: + 389 0068 03B0 add sp, sp, #12 + 390 @ sp needed + 391 006a BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 392 .L185: + 393 006e 2068 ldr r0, [r4] + 394 0070 B0F84430 ldrh r3, [r0, #68] + 395 0074 1A04 lsls r2, r3, #16 + 396 0076 F7D5 bpl .L50 + 397 0078 DFF858A6 ldr r10, .L204+4 + 398 007c DFF858B6 ldr fp, .L204+8 + 399 0080 10E0 b .L52 + 400 .L196: + 401 0082 11F01001 ands r1, r1, #16 + 402 0086 00F0C180 beq .L193 + 403 008a 0188 ldrh r1, [r0] + 404 008c 11F40065 ands r5, r1, #2048 + 405 0090 8BB2 uxth r3, r1 + 406 0092 40F0E580 bne .L194 + 407 0096 1B04 lsls r3, r3, #16 + 408 0098 00F15681 bmi .L195 + 409 .L57: + 410 009c B0F84430 ldrh r3, [r0, #68] + 411 00a0 1A04 lsls r2, r3, #16 + 412 00a2 E1D5 bpl .L50 + 413 .L52: + 414 00a4 B0F84450 ldrh r5, [r0, #68] + 415 00a8 A9B2 uxth r1, r5 + 416 00aa 15F00F05 ands r5, r5, #15 + 417 00ae E8D0 beq .L196 + 418 00b0 2EB2 sxth r6, r5 + 419 00b2 30F82630 ldrh r3, [r0, r6, lsl #2] + 420 00b6 1F04 lsls r7, r3, #16 + 421 00b8 1FFA83F8 uxth r8, r3 + 422 00bc 64D4 bmi .L197 + 423 .L66: + 424 00be 18F0800F tst r8, #128 + 425 00c2 EBD0 beq .L57 + 426 00c4 30F82630 ldrh r3, [r0, r6, lsl #2] + ARM GAS /tmp/ccl2eyqE.s page 8 + + + 427 00c8 9BB2 uxth r3, r3 + 428 00ca 03EA0A03 and r3, r3, r10 + 429 00ce 43F40043 orr r3, r3, #32768 + 430 00d2 20F82630 strh r3, [r0, r6, lsl #2] @ movhi + 431 00d6 06EB8606 add r6, r6, r6, lsl #2 + 432 00da 04EBC606 add r6, r4, r6, lsl #3 + 433 00de 96F82B30 ldrb r3, [r6, #43] @ zero_extendqisi2 + 434 00e2 022B cmp r3, #2 + 435 00e4 00F08D81 beq .L80 + 436 00e8 05EB8505 add r5, r5, r5, lsl #2 + 437 00ec 04EBC505 add r5, r4, r5, lsl #3 + 438 00f0 0023 movs r3, #0 + 439 00f2 95F83420 ldrb r2, [r5, #52] @ zero_extendqisi2 + 440 00f6 2B64 str r3, [r5, #64] + 441 00f8 E2B1 cbz r2, .L81 + 442 00fa 18F04008 ands r8, r8, #64 + 443 00fe 00F0B581 beq .L82 + 444 0102 96F82920 ldrb r2, [r6, #41] @ zero_extendqisi2 + 445 0106 002A cmp r2, #0 + 446 0108 40F0F381 bne .L83 + 447 010c 96F82830 ldrb r3, [r6, #40] @ zero_extendqisi2 + 448 0110 B0F85010 ldrh r1, [r0, #80] + 449 0114 00EBC303 add r3, r0, r3, lsl #3 + 450 0118 03F20243 addw r3, r3, #1026 + 451 .L183: + 452 011c 89B2 uxth r1, r1 + 453 011e 5A5A ldrh r2, [r3, r1] + 454 0120 22F4F842 bic r2, r2, #31744 + 455 0124 1204 lsls r2, r2, #16 + 456 0126 120C lsrs r2, r2, #16 + 457 0128 5A52 strh r2, [r3, r1] @ movhi + 458 012a 5A5A ldrh r2, [r3, r1] + 459 012c 92B2 uxth r2, r2 + 460 012e 42F40042 orr r2, r2, #32768 + 461 0132 5A52 strh r2, [r3, r1] @ movhi + 462 .L81: + 463 0134 2046 mov r0, r4 + 464 0136 96F82810 ldrb r1, [r6, #40] @ zero_extendqisi2 + 465 013a FFF7FEFF bl HAL_PCD_DataInStageCallback + 466 013e 2068 ldr r0, [r4] + 467 0140 ACE7 b .L57 + 468 .L189: + 469 0142 2268 ldr r2, [r4] + 470 0144 B2F84030 ldrh r3, [r2, #64] + 471 0148 23F00403 bic r3, r3, #4 + 472 014c 1B04 lsls r3, r3, #16 + 473 014e 1B0C lsrs r3, r3, #16 + 474 0150 A2F84030 strh r3, [r2, #64] @ movhi + 475 0154 B2F84030 ldrh r3, [r2, #64] + 476 0158 23F00803 bic r3, r3, #8 + 477 015c 1B04 lsls r3, r3, #16 + 478 015e 1B0C lsrs r3, r3, #16 + 479 0160 A2F84030 strh r3, [r2, #64] @ movhi + 480 0164 94F8E032 ldrb r3, [r4, #736] @ zero_extendqisi2 + 481 0168 012B cmp r3, #1 + 482 016a 00F02F83 beq .L198 + 483 .L125: + ARM GAS /tmp/ccl2eyqE.s page 9 + + + 484 016e 2046 mov r0, r4 + 485 0170 FFF7FEFF bl HAL_PCD_ResumeCallback + 486 0174 2268 ldr r2, [r4] + 487 0176 B2F84430 ldrh r3, [r2, #68] + 488 017a 23F48053 bic r3, r3, #4096 + 489 017e 1B04 lsls r3, r3, #16 + 490 0180 1B0C lsrs r3, r3, #16 + 491 0182 A2F84430 strh r3, [r2, #68] @ movhi + 492 0186 6FE7 b .L50 + 493 .L197: + 494 0188 30F82620 ldrh r2, [r0, r6, lsl #2] + 495 018c 40F68F73 movw r3, #3983 + 496 0190 1340 ands r3, r3, r2 + 497 0192 43F08003 orr r3, r3, #128 + 498 0196 05EB8501 add r1, r5, r5, lsl #2 + 499 019a 20F82630 strh r3, [r0, r6, lsl #2] @ movhi + 500 019e 04EBC101 add r1, r4, r1, lsl #3 + 501 01a2 4FEA8509 lsl r9, r5, #2 + 502 01a6 91F87431 ldrb r3, [r1, #372] @ zero_extendqisi2 + 503 01aa 002B cmp r3, #0 + 504 01ac 7AD1 bne .L67 + 505 01ae B0F85030 ldrh r3, [r0, #80] + 506 01b2 00F20642 addw r2, r0, #1030 + 507 01b6 12FA83F3 uxtah r3, r2, r3 + 508 01ba 91F86821 ldrb r2, [r1, #360] @ zero_extendqisi2 + 509 01be 33F83270 ldrh r7, [r3, r2, lsl #3] + 510 01c2 C7F30907 ubfx r7, r7, #0, #10 + 511 01c6 002F cmp r7, #0 + 512 01c8 40F07681 bne .L199 + 513 .L68: + 514 01cc 09EB0503 add r3, r9, r5 + 515 01d0 04EBC303 add r3, r4, r3, lsl #3 + 516 01d4 D3F88421 ldr r2, [r3, #388] + 517 01d8 3A44 add r2, r2, r7 + 518 01da C3F88421 str r2, [r3, #388] + 519 01de D3F87C21 ldr r2, [r3, #380] + 520 01e2 3A44 add r2, r2, r7 + 521 01e4 C3F87C21 str r2, [r3, #380] + 522 01e8 D3F88021 ldr r2, [r3, #384] + 523 01ec 22B1 cbz r2, .L78 + 524 01ee D3F87831 ldr r3, [r3, #376] + 525 01f2 BB42 cmp r3, r7 + 526 01f4 40F23081 bls .L79 + 527 .L78: + 528 01f8 A944 add r9, r9, r5 + 529 01fa 04EBC909 add r9, r4, r9, lsl #3 + 530 01fe 2046 mov r0, r4 + 531 0200 99F86811 ldrb r1, [r9, #360] @ zero_extendqisi2 + 532 0204 FFF7FEFF bl HAL_PCD_DataOutStageCallback + 533 0208 2068 ldr r0, [r4] + 534 020a 58E7 b .L66 + 535 .L193: + 536 020c 0388 ldrh r3, [r0] + 537 020e 9BB2 uxth r3, r3 + 538 0210 03EA0A03 and r3, r3, r10 + 539 0214 43F40043 orr r3, r3, #32768 + 540 0218 0380 strh r3, [r0] @ movhi + ARM GAS /tmp/ccl2eyqE.s page 10 + + + 541 021a B0F85030 ldrh r3, [r0, #80] + 542 021e 94F82820 ldrb r2, [r4, #40] @ zero_extendqisi2 + 543 0222 10FA83F0 uxtah r0, r0, r3 + 544 0226 40F20243 movw r3, #1026 + 545 022a 03EBC203 add r3, r3, r2, lsl #3 + 546 022e E26B ldr r2, [r4, #60] + 547 0230 C35A ldrh r3, [r0, r3] + 548 0232 C3F30903 ubfx r3, r3, #0, #10 + 549 0236 6364 str r3, [r4, #68] + 550 0238 1344 add r3, r3, r2 + 551 023a E363 str r3, [r4, #60] + 552 023c 2046 mov r0, r4 + 553 023e FFF7FEFF bl HAL_PCD_DataInStageCallback + 554 0242 94F82430 ldrb r3, [r4, #36] @ zero_extendqisi2 + 555 0246 5BB3 cbz r3, .L184 + 556 0248 236C ldr r3, [r4, #64] + 557 024a 4BBB cbnz r3, .L184 + 558 024c 94F82420 ldrb r2, [r4, #36] @ zero_extendqisi2 + 559 0250 2068 ldr r0, [r4] + 560 0252 42F08002 orr r2, r2, #128 + 561 0256 A0F84C20 strh r2, [r0, #76] @ movhi + 562 025a 84F82430 strb r3, [r4, #36] + 563 025e 1DE7 b .L57 + 564 .L194: + 565 0260 B0F85020 ldrh r2, [r0, #80] + 566 0264 94F86811 ldrb r1, [r4, #360] @ zero_extendqisi2 + 567 0268 40F20643 movw r3, #1030 + 568 026c 10FA82F2 uxtah r2, r0, r2 + 569 0270 03EBC103 add r3, r3, r1, lsl #3 + 570 0274 04F52C71 add r1, r4, #688 + 571 0278 D35A ldrh r3, [r2, r3] + 572 027a B4F86E21 ldrh r2, [r4, #366] + 573 027e C3F30903 ubfx r3, r3, #0, #10 + 574 0282 C4F88431 str r3, [r4, #388] + 575 0286 FFF7FEFF bl USB_ReadPMA + 576 028a 2268 ldr r2, [r4] + 577 028c 1188 ldrh r1, [r2] + 578 028e 40F68F73 movw r3, #3983 + 579 0292 0B40 ands r3, r3, r1 + 580 0294 43F08003 orr r3, r3, #128 + 581 0298 1380 strh r3, [r2] @ movhi + 582 029a 2046 mov r0, r4 + 583 029c FFF7FEFF bl HAL_PCD_SetupStageCallback + 584 .L184: + 585 02a0 2068 ldr r0, [r4] + 586 02a2 FBE6 b .L57 + 587 .L67: + 588 02a4 91F86B31 ldrb r3, [r1, #363] @ zero_extendqisi2 + 589 02a8 022B cmp r3, #2 + 590 02aa 00F0CF81 beq .L200 + 591 02ae 91F86821 ldrb r2, [r1, #360] @ zero_extendqisi2 + 592 02b2 30F82230 ldrh r3, [r0, r2, lsl #2] + 593 02b6 23F4E043 bic r3, r3, #28672 + 594 02ba 23F07003 bic r3, r3, #112 + 595 02be 1B04 lsls r3, r3, #16 + 596 02c0 1B0C lsrs r3, r3, #16 + 597 02c2 43F40043 orr r3, r3, #32768 + ARM GAS /tmp/ccl2eyqE.s page 11 + + + 598 02c6 43F0C003 orr r3, r3, #192 + 599 02ca 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 600 02ce 91F86831 ldrb r3, [r1, #360] @ zero_extendqisi2 + 601 02d2 1AB2 sxth r2, r3 + 602 02d4 30F82220 ldrh r2, [r0, r2, lsl #2] + 603 02d8 12F4804F tst r2, #16384 + 604 02dc B0F85020 ldrh r2, [r0, #80] + 605 02e0 00F0D780 beq .L77 + 606 02e4 00F20247 addw r7, r0, #1026 + 607 02e8 17FA82F2 uxtah r2, r7, r2 + 608 02ec 32F83370 ldrh r7, [r2, r3, lsl #3] + 609 02f0 C7F30907 ubfx r7, r7, #0, #10 + 610 02f4 002F cmp r7, #0 + 611 02f6 3FF469AF beq .L68 + 612 02fa B1F87021 ldrh r2, [r1, #368] + 613 02fe D1F87C11 ldr r1, [r1, #380] + 614 0302 3B46 mov r3, r7 + 615 0304 FFF7FEFF bl USB_ReadPMA + 616 0308 60E7 b .L68 + 617 .L186: + 618 030a 2268 ldr r2, [r4] + 619 030c B2F84430 ldrh r3, [r2, #68] + 620 0310 23F48063 bic r3, r3, #1024 + 621 0314 1B04 lsls r3, r3, #16 + 622 0316 1B0C lsrs r3, r3, #16 + 623 0318 A2F84430 strh r3, [r2, #68] @ movhi + 624 031c 2046 mov r0, r4 + 625 031e FFF7FEFF bl HAL_PCD_ResetCallback + 626 0322 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 627 0326 012B cmp r3, #1 + 628 0328 3FF49EAE beq .L50 + 629 032c 0123 movs r3, #1 + 630 032e 2068 ldr r0, [r4] + 631 0330 84F8A832 strb r3, [r4, #680] + 632 0334 84F82450 strb r5, [r4, #36] + 633 0338 2946 mov r1, r5 + 634 033a FFF7FEFF bl USB_SetDevAddress + 635 033e 84F8A852 strb r5, [r4, #680] + 636 0342 03B0 add sp, sp, #12 + 637 @ sp needed + 638 0344 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 639 .L195: + 640 0348 0288 ldrh r2, [r0] + 641 034a 40F68F73 movw r3, #3983 + 642 034e 1340 ands r3, r3, r2 + 643 0350 43F08003 orr r3, r3, #128 + 644 0354 0380 strh r3, [r0] @ movhi + 645 0356 B0F85020 ldrh r2, [r0, #80] + 646 035a 94F86811 ldrb r1, [r4, #360] @ zero_extendqisi2 + 647 035e 40F20643 movw r3, #1030 + 648 0362 10FA82F2 uxtah r2, r0, r2 + 649 0366 03EBC103 add r3, r3, r1, lsl #3 + 650 036a D35A ldrh r3, [r2, r3] + 651 036c C3F30903 ubfx r3, r3, #0, #10 + 652 0370 C4F88431 str r3, [r4, #388] + 653 0374 93B1 cbz r3, .L60 + 654 0376 D4F87C11 ldr r1, [r4, #380] + ARM GAS /tmp/ccl2eyqE.s page 12 + + + 655 037a 79B1 cbz r1, .L60 + 656 037c B4F86E21 ldrh r2, [r4, #366] + 657 0380 FFF7FEFF bl USB_ReadPMA + 658 0384 D4F87C31 ldr r3, [r4, #380] + 659 0388 D4F88421 ldr r2, [r4, #388] + 660 038c 1344 add r3, r3, r2 + 661 038e 2046 mov r0, r4 + 662 0390 2946 mov r1, r5 + 663 0392 C4F87C31 str r3, [r4, #380] + 664 0396 FFF7FEFF bl HAL_PCD_DataOutStageCallback + 665 039a 2068 ldr r0, [r4] + 666 .L60: + 667 039c 0388 ldrh r3, [r0] + 668 039e 1F05 lsls r7, r3, #20 + 669 03a0 3FF57CAE bmi .L57 + 670 03a4 D4F87821 ldr r2, [r4, #376] + 671 03a8 B0F85030 ldrh r3, [r0, #80] + 672 03ac 3E2A cmp r2, #62 + 673 03ae 9BB2 uxth r3, r3 + 674 03b0 00F20645 addw r5, r0, #1030 + 675 03b4 40F28E80 bls .L61 + 676 03b8 5109 lsrs r1, r2, #5 + 677 03ba D606 lsls r6, r2, #27 + 678 03bc C44A ldr r2, .L204 + 679 03be 08BF it eq + 680 03c0 01F1FF31 addeq r1, r1, #-1 + 681 03c4 42EA8121 orr r1, r2, r1, lsl #10 + 682 03c8 89B2 uxth r1, r1 + 683 03ca E952 strh r1, [r5, r3] @ movhi + 684 .L63: + 685 03cc 0388 ldrh r3, [r0] + 686 03ce 23F48043 bic r3, r3, #16384 + 687 03d2 23F07003 bic r3, r3, #112 + 688 03d6 1B04 lsls r3, r3, #16 + 689 03d8 1B0C lsrs r3, r3, #16 + 690 03da 83F44053 eor r3, r3, #12288 + 691 03de 43F40043 orr r3, r3, #32768 + 692 03e2 43F08003 orr r3, r3, #128 + 693 03e6 0380 strh r3, [r0] @ movhi + 694 03e8 58E6 b .L57 + 695 .L188: + 696 03ea 2268 ldr r2, [r4] + 697 03ec B2F84430 ldrh r3, [r2, #68] + 698 03f0 23F40053 bic r3, r3, #8192 + 699 03f4 1B04 lsls r3, r3, #16 + 700 03f6 1B0C lsrs r3, r3, #16 + 701 03f8 A2F84430 strh r3, [r2, #68] @ movhi + 702 03fc 03B0 add sp, sp, #12 + 703 @ sp needed + 704 03fe BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 705 .L80: + 706 0402 18F48077 ands r7, r8, #256 + 707 0406 40F0B880 bne .L85 + 708 040a 96F82810 ldrb r1, [r6, #40] @ zero_extendqisi2 + 709 040e B0F85020 ldrh r2, [r0, #80] + 710 0412 40F20243 movw r3, #1026 + 711 0416 03EBC103 add r3, r3, r1, lsl #3 + ARM GAS /tmp/ccl2eyqE.s page 13 + + + 712 041a 10FA82F2 uxtah r2, r0, r2 + 713 041e D25A ldrh r2, [r2, r3] + 714 0420 05EB8503 add r3, r5, r5, lsl #2 + 715 0424 04EBC303 add r3, r4, r3, lsl #3 + 716 0428 C2F30902 ubfx r2, r2, #0, #10 + 717 042c 1E6C ldr r6, [r3, #64] + 718 042e 9642 cmp r6, r2 + 719 0430 4AD9 bls .L86 + 720 0432 B61A subs r6, r6, r2 + 721 0434 1E64 str r6, [r3, #64] + 722 0436 002E cmp r6, #0 + 723 0438 47D0 beq .L130 + 724 043a 0135 adds r5, r5, #1 + 725 043c 05EB8505 add r5, r5, r5, lsl #2 + 726 0440 04EBC501 add r1, r4, r5, lsl #3 + 727 0444 DD6B ldr r5, [r3, #60] + 728 0446 1544 add r5, r5, r2 + 729 0448 DD63 str r5, [r3, #60] + 730 044a 5D6C ldr r5, [r3, #68] + 731 044c 2A44 add r2, r2, r5 + 732 044e 5A64 str r2, [r3, #68] + 733 0450 FFF7FEFF bl USB_EPStartXfer + 734 0454 2068 ldr r0, [r4] + 735 0456 21E6 b .L57 + 736 .L79: + 737 0458 2821 movs r1, #40 + 738 045a 01FB0541 mla r1, r1, r5, r4 + 739 045e 2068 ldr r0, [r4] + 740 0460 01F5B471 add r1, r1, #360 + 741 0464 FFF7FEFF bl USB_EPStartXfer + 742 0468 2068 ldr r0, [r4] + 743 046a 28E6 b .L66 + 744 .L82: + 745 046c 96F82930 ldrb r3, [r6, #41] @ zero_extendqisi2 + 746 0470 002B cmp r3, #0 + 747 0472 4CD0 beq .L201 + 748 0474 012B cmp r3, #1 + 749 0476 7FF45DAE bne .L81 + 750 047a 96F82830 ldrb r3, [r6, #40] @ zero_extendqisi2 + 751 047e B0F85020 ldrh r2, [r0, #80] + 752 0482 00EBC303 add r3, r0, r3, lsl #3 + 753 0486 03F20643 addw r3, r3, #1030 + 754 048a 92B2 uxth r2, r2 + 755 048c 23F80280 strh r8, [r3, r2] @ movhi + 756 0490 50E6 b .L81 + 757 .L77: + 758 0492 00F20647 addw r7, r0, #1030 + 759 0496 17FA82F2 uxtah r2, r7, r2 + 760 049a 32F83370 ldrh r7, [r2, r3, lsl #3] + 761 049e C7F30907 ubfx r7, r7, #0, #10 + 762 04a2 002F cmp r7, #0 + 763 04a4 3FF492AE beq .L68 + 764 04a8 B1F87221 ldrh r2, [r1, #370] + 765 04ac D1F87C11 ldr r1, [r1, #380] + 766 04b0 3B46 mov r3, r7 + 767 04b2 FFF7FEFF bl USB_ReadPMA + 768 04b6 89E6 b .L68 + ARM GAS /tmp/ccl2eyqE.s page 14 + + + 769 .L199: + 770 04b8 B1F86E21 ldrh r2, [r1, #366] + 771 04bc D1F87C11 ldr r1, [r1, #380] + 772 04c0 3B46 mov r3, r7 + 773 04c2 FFF7FEFF bl USB_ReadPMA + 774 04c6 81E6 b .L68 + 775 .L86: + 776 04c8 1F64 str r7, [r3, #64] + 777 .L130: + 778 04ca 2046 mov r0, r4 + 779 04cc FFF7FEFF bl HAL_PCD_DataInStageCallback + 780 04d0 2068 ldr r0, [r4] + 781 04d2 E3E5 b .L57 + 782 .L61: + 783 04d4 002A cmp r2, #0 + 784 04d6 40F07F81 bne .L64 + 785 04da EA5A ldrh r2, [r5, r3] + 786 04dc 22F4F842 bic r2, r2, #31744 + 787 04e0 1204 lsls r2, r2, #16 + 788 04e2 120C lsrs r2, r2, #16 + 789 04e4 EA52 strh r2, [r5, r3] @ movhi + 790 04e6 EA5A ldrh r2, [r5, r3] + 791 04e8 92B2 uxth r2, r2 + 792 04ea 42F40042 orr r2, r2, #32768 + 793 04ee EA52 strh r2, [r5, r3] @ movhi + 794 04f0 6CE7 b .L63 + 795 .L83: + 796 04f2 012A cmp r2, #1 + 797 04f4 7FF41EAE bne .L81 + 798 04f8 96F82820 ldrb r2, [r6, #40] @ zero_extendqisi2 + 799 04fc B0F85010 ldrh r1, [r0, #80] + 800 0500 00EBC202 add r2, r0, r2, lsl #3 + 801 0504 02F20242 addw r2, r2, #1026 + 802 0508 89B2 uxth r1, r1 + 803 050a 5352 strh r3, [r2, r1] @ movhi + 804 050c 12E6 b .L81 + 805 .L201: + 806 050e 96F82830 ldrb r3, [r6, #40] @ zero_extendqisi2 + 807 0512 B0F85010 ldrh r1, [r0, #80] + 808 0516 00EBC303 add r3, r0, r3, lsl #3 + 809 051a 03F20643 addw r3, r3, #1030 + 810 051e FDE5 b .L183 + 811 .L191: + 812 0520 2268 ldr r2, [r4] + 813 0522 B2F84430 ldrh r3, [r2, #68] + 814 0526 23F08003 bic r3, r3, #128 + 815 052a 1B04 lsls r3, r3, #16 + 816 052c 1B0C lsrs r3, r3, #16 + 817 052e A2F84430 strh r3, [r2, #68] @ movhi + 818 0532 94F8E032 ldrb r3, [r4, #736] @ zero_extendqisi2 + 819 0536 002B cmp r3, #0 + 820 0538 40F0C580 bne .L128 + 821 053c B2F84030 ldrh r3, [r2, #64] + 822 0540 9BB2 uxth r3, r3 + 823 0542 43F00403 orr r3, r3, #4 + 824 0546 A2F84030 strh r3, [r2, #64] @ movhi + 825 054a B2F84030 ldrh r3, [r2, #64] + ARM GAS /tmp/ccl2eyqE.s page 15 + + + 826 054e 9BB2 uxth r3, r3 + 827 0550 0121 movs r1, #1 + 828 0552 43F00803 orr r3, r3, #8 + 829 0556 A2F84030 strh r3, [r2, #64] @ movhi + 830 055a 84F8E012 strb r1, [r4, #736] + 831 055e B2F85430 ldrh r3, [r2, #84] + 832 0562 C3F38D03 ubfx r3, r3, #2, #14 + 833 0566 03F03C03 and r3, r3, #60 + 834 056a 2046 mov r0, r4 + 835 056c C4F8E432 str r3, [r4, #740] + 836 0570 03B0 add sp, sp, #12 + 837 @ sp needed + 838 0572 BDE8F04F pop {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 839 0576 FFF7FEBF b HAL_PCDEx_LPM_Callback + 840 .L85: + 841 057a 18F04003 ands r3, r8, #64 + 842 057e 0093 str r3, [sp] + 843 0580 00F0AC80 beq .L88 + 844 0584 96F828C0 ldrb ip, [r6, #40] @ zero_extendqisi2 + 845 0588 B0F85030 ldrh r3, [r0, #80] + 846 058c 4FEACC07 lsl r7, ip, #3 + 847 0590 17FA83F3 uxtah r3, r7, r3 + 848 0594 00F20242 addw r2, r0, #1026 + 849 0598 0092 str r2, [sp] + 850 059a 9A5A ldrh r2, [r3, r2] + 851 059c 05EB8503 add r3, r5, r5, lsl #2 + 852 05a0 04EBC303 add r3, r4, r3, lsl #3 + 853 05a4 C2F30902 ubfx r2, r2, #0, #10 + 854 05a8 196C ldr r1, [r3, #64] + 855 05aa 9142 cmp r1, r2 + 856 05ac 0FFA8CFE sxth lr, ip + 857 05b0 4FEA8509 lsl r9, r5, #2 + 858 05b4 40F29581 bls .L89 + 859 05b8 891A subs r1, r1, r2 + 860 05ba 1964 str r1, [r3, #64] + 861 05bc 0029 cmp r1, #0 + 862 05be 00F09281 beq .L131 + 863 05c2 18F4804F tst r8, #16384 + 864 05c6 0DD0 beq .L95 + 865 05c8 30F82E30 ldrh r3, [r0, lr, lsl #2] + 866 05cc 23F4E043 bic r3, r3, #28672 + 867 05d0 23F07003 bic r3, r3, #112 + 868 05d4 1B04 lsls r3, r3, #16 + 869 05d6 1B0C lsrs r3, r3, #16 + 870 05d8 43F44043 orr r3, r3, #49152 + 871 05dc 43F08003 orr r3, r3, #128 + 872 05e0 20F82E30 strh r3, [r0, lr, lsl #2] @ movhi + 873 .L95: + 874 05e4 09EB0507 add r7, r9, r5 + 875 05e8 04EBC707 add r7, r4, r7, lsl #3 + 876 05ec 97F84C30 ldrb r3, [r7, #76] @ zero_extendqisi2 + 877 05f0 012B cmp r3, #1 + 878 05f2 00F0F981 beq .L202 + 879 .L94: + 880 05f6 96F82820 ldrb r2, [r6, #40] @ zero_extendqisi2 + 881 05fa 30F82230 ldrh r3, [r0, r2, lsl #2] + 882 05fe 9BB2 uxth r3, r3 + ARM GAS /tmp/ccl2eyqE.s page 16 + + + 883 0600 03EA0B03 and r3, r3, fp + 884 0604 83F03003 eor r3, r3, #48 + 885 0608 43F40043 orr r3, r3, #32768 + 886 060c 43F08003 orr r3, r3, #128 + 887 0610 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 888 0614 42E5 b .L57 + 889 .L190: + 890 0616 2268 ldr r2, [r4] + 891 0618 B2F84030 ldrh r3, [r2, #64] + 892 061c 9BB2 uxth r3, r3 + 893 061e 43F00803 orr r3, r3, #8 + 894 0622 A2F84030 strh r3, [r2, #64] @ movhi + 895 0626 B2F84430 ldrh r3, [r2, #68] + 896 062a 23F40063 bic r3, r3, #2048 + 897 062e 1B04 lsls r3, r3, #16 + 898 0630 1B0C lsrs r3, r3, #16 + 899 0632 A2F84430 strh r3, [r2, #68] @ movhi + 900 0636 B2F84030 ldrh r3, [r2, #64] + 901 063a 9BB2 uxth r3, r3 + 902 063c 43F00403 orr r3, r3, #4 + 903 0640 2046 mov r0, r4 + 904 0642 A2F84030 strh r3, [r2, #64] @ movhi + 905 0646 FFF7FEFF bl HAL_PCD_SuspendCallback + 906 064a 0DE5 b .L50 + 907 .L200: + 908 064c 18F48042 ands r2, r8, #16384 + 909 0650 B0F85030 ldrh r3, [r0, #80] + 910 0654 00F0C880 beq .L70 + 911 0658 00F20242 addw r2, r0, #1026 + 912 065c 12FA83F3 uxtah r3, r2, r3 + 913 0660 91F868C1 ldrb ip, [r1, #360] @ zero_extendqisi2 + 914 0664 D1F88021 ldr r2, [r1, #384] + 915 0668 33F83C30 ldrh r3, [r3, ip, lsl #3] + 916 066c C3F30903 ubfx r3, r3, #0, #10 + 917 0670 9A42 cmp r2, r3 + 918 0672 1F46 mov r7, r3 + 919 0674 C0F07E81 bcc .L71 + 920 0678 D21A subs r2, r2, r3 + 921 067a C1F88021 str r2, [r1, #384] + 922 067e 002A cmp r2, #0 + 923 0680 00F07B81 beq .L133 + 924 .L72: + 925 0684 18F0400F tst r8, #64 + 926 0688 0FD0 beq .L73 + 927 068a 0FFA8CFC sxth ip, ip + 928 068e 30F82C20 ldrh r2, [r0, ip, lsl #2] + 929 0692 22F4E042 bic r2, r2, #28672 + 930 0696 22F07002 bic r2, r2, #112 + 931 069a 1204 lsls r2, r2, #16 + 932 069c 120C lsrs r2, r2, #16 + 933 069e 42F40042 orr r2, r2, #32768 + 934 06a2 42F0C002 orr r2, r2, #192 + 935 06a6 20F82C20 strh r2, [r0, ip, lsl #2] @ movhi + 936 .L73: + 937 06aa 0BB9 cbnz r3, .L203 + 938 .L137: + 939 06ac 1F46 mov r7, r3 + ARM GAS /tmp/ccl2eyqE.s page 17 + + + 940 06ae 8DE5 b .L68 + 941 .L203: + 942 06b0 09EB0501 add r1, r9, r5 + 943 06b4 04EBC101 add r1, r4, r1, lsl #3 + 944 06b8 B1F87021 ldrh r2, [r1, #368] + 945 06bc D1F87C11 ldr r1, [r1, #380] + 946 06c0 FFF7FEFF bl USB_ReadPMA + 947 06c4 82E5 b .L68 + 948 .L128: + 949 06c6 2046 mov r0, r4 + 950 06c8 FFF7FEFF bl HAL_PCD_SuspendCallback + 951 06cc CCE4 b .L50 + 952 .L205: + 953 06ce 00BF .align 2 + 954 .L204: + 955 06d0 0080FFFF .word -32768 + 956 06d4 0F8FFFFF .word -28913 + 957 06d8 BF8FFFFF .word -28737 + 958 .L88: + 959 06dc 96F82810 ldrb r1, [r6, #40] @ zero_extendqisi2 + 960 06e0 B0F85030 ldrh r3, [r0, #80] + 961 06e4 CA00 lsls r2, r1, #3 + 962 06e6 00F20647 addw r7, r0, #1030 + 963 06ea 12FA83F3 uxtah r3, r2, r3 + 964 06ee 0197 str r7, [sp, #4] + 965 06f0 DB5B ldrh r3, [r3, r7] + 966 06f2 C3F3090E ubfx lr, r3, #0, #10 + 967 06f6 05EB8503 add r3, r5, r5, lsl #2 + 968 06fa 04EBC303 add r3, r4, r3, lsl #3 + 969 06fe 0FFA81FC sxth ip, r1 + 970 0702 1F6C ldr r7, [r3, #64] + 971 0704 7745 cmp r7, lr + 972 0706 4FEA8509 lsl r9, r5, #2 + 973 070a C0F0A580 bcc .L105 + 974 070e A7EB0E07 sub r7, r7, lr + 975 0712 1F64 str r7, [r3, #64] + 976 0714 002F cmp r7, #0 + 977 0716 00F0A180 beq .L132 + 978 071a 18F4804F tst r8, #16384 + 979 071e 0DD1 bne .L110 + 980 0720 30F82C30 ldrh r3, [r0, ip, lsl #2] + 981 0724 23F4E043 bic r3, r3, #28672 + 982 0728 23F07003 bic r3, r3, #112 + 983 072c 1B04 lsls r3, r3, #16 + 984 072e 1B0C lsrs r3, r3, #16 + 985 0730 43F44043 orr r3, r3, #49152 + 986 0734 43F08003 orr r3, r3, #128 + 987 0738 20F82C30 strh r3, [r0, ip, lsl #2] @ movhi + 988 .L110: + 989 073c 09EB0502 add r2, r9, r5 + 990 0740 04EBC202 add r2, r4, r2, lsl #3 + 991 0744 92F84C30 ldrb r3, [r2, #76] @ zero_extendqisi2 + 992 0748 012B cmp r3, #1 + 993 074a 7FF454AF bne .L94 + 994 074e D36B ldr r3, [r2, #60] + 995 0750 976C ldr r7, [r2, #72] + 996 0752 03EB0E08 add r8, r3, lr + ARM GAS /tmp/ccl2eyqE.s page 18 + + + 997 0756 536C ldr r3, [r2, #68] + 998 0758 C2F83C80 str r8, [r2, #60] + 999 075c 7344 add r3, r3, lr + 1000 075e 5364 str r3, [r2, #68] + 1001 0760 936B ldr r3, [r2, #56] + 1002 0762 9F42 cmp r7, r3 + 1003 0764 C0F07C81 bcc .L111 + 1004 0768 FF1A subs r7, r7, r3 + 1005 076a 9764 str r7, [r2, #72] + 1006 .L112: + 1007 076c 96F82920 ldrb r2, [r6, #41] @ zero_extendqisi2 + 1008 0770 002A cmp r2, #0 + 1009 0772 40F06981 bne .L114 + 1010 0776 B0F85020 ldrh r2, [r0, #80] + 1011 077a 019F ldr r7, [sp, #4] + 1012 077c 3E2B cmp r3, #62 + 1013 077e 17FA82F2 uxtah r2, r7, r2 + 1014 0782 40F2A081 bls .L115 + 1015 0786 5F09 lsrs r7, r3, #5 + 1016 0788 D906 lsls r1, r3, #27 + 1017 078a C949 ldr r1, .L206 + 1018 078c 08BF it eq + 1019 078e 07F1FF37 addeq r7, r7, #-1 + 1020 0792 41EA8727 orr r7, r1, r7, lsl #10 + 1021 0796 BFB2 uxth r7, r7 + 1022 0798 22F83C70 strh r7, [r2, ip, lsl #3] @ movhi + 1023 079c 9BB2 uxth r3, r3 + 1024 .L117: + 1025 079e 09EB0502 add r2, r9, r5 + 1026 07a2 04EBC202 add r2, r4, r2, lsl #3 + 1027 07a6 4146 mov r1, r8 + 1028 07a8 528E ldrh r2, [r2, #50] + 1029 07aa FFF7FEFF bl USB_WritePMA + 1030 07ae 2068 ldr r0, [r4] + 1031 07b0 21E7 b .L94 + 1032 .L192: + 1033 07b2 2268 ldr r2, [r4] + 1034 07b4 B2F84430 ldrh r3, [r2, #68] + 1035 07b8 23F40073 bic r3, r3, #512 + 1036 07bc 1B04 lsls r3, r3, #16 + 1037 07be 1B0C lsrs r3, r3, #16 + 1038 07c0 2046 mov r0, r4 + 1039 07c2 A2F84430 strh r3, [r2, #68] @ movhi + 1040 07c6 FFF7FEFF bl HAL_PCD_SOFCallback + 1041 07ca 4DE4 b .L50 + 1042 .L198: + 1043 07cc 84F8E012 strb r1, [r4, #736] + 1044 07d0 2046 mov r0, r4 + 1045 07d2 FFF7FEFF bl HAL_PCDEx_LPM_Callback + 1046 07d6 CAE4 b .L125 + 1047 .L64: + 1048 07d8 5108 lsrs r1, r2, #1 + 1049 07da D207 lsls r2, r2, #31 + 1050 07dc 48BF it mi + 1051 07de 0131 addmi r1, r1, #1 + 1052 07e0 8A02 lsls r2, r1, #10 + 1053 07e2 92B2 uxth r2, r2 + ARM GAS /tmp/ccl2eyqE.s page 19 + + + 1054 07e4 EA52 strh r2, [r5, r3] @ movhi + 1055 07e6 F1E5 b .L63 + 1056 .L70: + 1057 07e8 00F20647 addw r7, r0, #1030 + 1058 07ec 17FA83F3 uxtah r3, r7, r3 + 1059 07f0 91F868C1 ldrb ip, [r1, #360] @ zero_extendqisi2 + 1060 07f4 D1F880E1 ldr lr, [r1, #384] + 1061 07f8 33F83C30 ldrh r3, [r3, ip, lsl #3] + 1062 07fc C3F30903 ubfx r3, r3, #0, #10 + 1063 0800 9E45 cmp lr, r3 + 1064 0802 1F46 mov r7, r3 + 1065 0804 C0F0A180 bcc .L74 + 1066 0808 AEEB0302 sub r2, lr, r3 + 1067 080c C1F88021 str r2, [r1, #384] + 1068 0810 002A cmp r2, #0 + 1069 0812 00F09C80 beq .L134 + 1070 .L75: + 1071 0816 18F0400F tst r8, #64 + 1072 081a 0FD1 bne .L76 + 1073 081c 0FFA8CFC sxth ip, ip + 1074 0820 30F82C20 ldrh r2, [r0, ip, lsl #2] + 1075 0824 22F4E042 bic r2, r2, #28672 + 1076 0828 22F07002 bic r2, r2, #112 + 1077 082c 1204 lsls r2, r2, #16 + 1078 082e 120C lsrs r2, r2, #16 + 1079 0830 42F40042 orr r2, r2, #32768 + 1080 0834 42F0C002 orr r2, r2, #192 + 1081 0838 20F82C20 strh r2, [r0, ip, lsl #2] @ movhi + 1082 .L76: + 1083 083c 002B cmp r3, #0 + 1084 083e 3FF435AF beq .L137 + 1085 0842 09EB0501 add r1, r9, r5 + 1086 0846 04EBC101 add r1, r4, r1, lsl #3 + 1087 084a B1F87221 ldrh r2, [r1, #370] + 1088 084e D1F87C11 ldr r1, [r1, #380] + 1089 0852 FFF7FEFF bl USB_ReadPMA + 1090 0856 B9E4 b .L68 + 1091 .L105: + 1092 0858 009D ldr r5, [sp] + 1093 085a 1D64 str r5, [r3, #64] + 1094 .L132: + 1095 085c 96F82930 ldrb r3, [r6, #41] @ zero_extendqisi2 + 1096 0860 002B cmp r3, #0 + 1097 0862 40F09D80 bne .L107 + 1098 0866 02F20242 addw r2, r2, #1026 + 1099 086a 8518 adds r5, r0, r2 + 1100 086c B0F85020 ldrh r2, [r0, #80] + 1101 0870 92B2 uxth r2, r2 + 1102 0872 AB5A ldrh r3, [r5, r2] + 1103 0874 23F4F843 bic r3, r3, #31744 + 1104 0878 1B04 lsls r3, r3, #16 + 1105 087a 1B0C lsrs r3, r3, #16 + 1106 087c AB52 strh r3, [r5, r2] @ movhi + 1107 087e AB5A ldrh r3, [r5, r2] + 1108 0880 9BB2 uxth r3, r3 + 1109 0882 43F40043 orr r3, r3, #32768 + 1110 0886 AB52 strh r3, [r5, r2] @ movhi + ARM GAS /tmp/ccl2eyqE.s page 20 + + + 1111 0888 019B ldr r3, [sp, #4] + 1112 088a B0F85020 ldrh r2, [r0, #80] + 1113 088e 13FA82F2 uxtah r2, r3, r2 + 1114 0892 32F83C30 ldrh r3, [r2, ip, lsl #3] + 1115 0896 23F4F843 bic r3, r3, #31744 + 1116 089a 1B04 lsls r3, r3, #16 + 1117 089c 1B0C lsrs r3, r3, #16 + 1118 089e 22F83C30 strh r3, [r2, ip, lsl #3] @ movhi + 1119 08a2 32F83C30 ldrh r3, [r2, ip, lsl #3] + 1120 08a6 9BB2 uxth r3, r3 + 1121 08a8 43F40043 orr r3, r3, #32768 + 1122 08ac 22F83C30 strh r3, [r2, ip, lsl #3] @ movhi + 1123 .L108: + 1124 08b0 2046 mov r0, r4 + 1125 08b2 FFF7FEFF bl HAL_PCD_DataInStageCallback + 1126 08b6 18F4804F tst r8, #16384 + 1127 08ba 2068 ldr r0, [r4] + 1128 08bc 7FF49BAE bne .L94 + 1129 .L109: + 1130 08c0 96F82820 ldrb r2, [r6, #40] @ zero_extendqisi2 + 1131 08c4 30F82230 ldrh r3, [r0, r2, lsl #2] + 1132 08c8 23F4E043 bic r3, r3, #28672 + 1133 08cc 23F07003 bic r3, r3, #112 + 1134 08d0 1B04 lsls r3, r3, #16 + 1135 08d2 1B0C lsrs r3, r3, #16 + 1136 08d4 43F44043 orr r3, r3, #49152 + 1137 08d8 43F08003 orr r3, r3, #128 + 1138 08dc 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1139 08e0 89E6 b .L94 + 1140 .L89: + 1141 08e2 0022 movs r2, #0 + 1142 08e4 1A64 str r2, [r3, #64] + 1143 .L131: + 1144 08e6 96F82930 ldrb r3, [r6, #41] @ zero_extendqisi2 + 1145 08ea 002B cmp r3, #0 + 1146 08ec 6AD1 bne .L91 + 1147 08ee B0F85010 ldrh r1, [r0, #80] + 1148 08f2 009B ldr r3, [sp] + 1149 08f4 13FA81F1 uxtah r1, r3, r1 + 1150 08f8 07F20642 addw r2, r7, #1030 + 1151 08fc 31F83E30 ldrh r3, [r1, lr, lsl #3] + 1152 0900 23F4F843 bic r3, r3, #31744 + 1153 0904 1B04 lsls r3, r3, #16 + 1154 0906 1B0C lsrs r3, r3, #16 + 1155 0908 21F83E30 strh r3, [r1, lr, lsl #3] @ movhi + 1156 090c 31F83E30 ldrh r3, [r1, lr, lsl #3] + 1157 0910 9BB2 uxth r3, r3 + 1158 0912 43F40043 orr r3, r3, #32768 + 1159 0916 21F83E30 strh r3, [r1, lr, lsl #3] @ movhi + 1160 091a B0F85010 ldrh r1, [r0, #80] + 1161 091e 0244 add r2, r2, r0 + 1162 0920 89B2 uxth r1, r1 + 1163 0922 535A ldrh r3, [r2, r1] + 1164 0924 23F4F843 bic r3, r3, #31744 + 1165 0928 1B04 lsls r3, r3, #16 + 1166 092a 1B0C lsrs r3, r3, #16 + 1167 092c 5352 strh r3, [r2, r1] @ movhi + ARM GAS /tmp/ccl2eyqE.s page 21 + + + 1168 092e 535A ldrh r3, [r2, r1] + 1169 0930 9BB2 uxth r3, r3 + 1170 0932 43F40043 orr r3, r3, #32768 + 1171 0936 5352 strh r3, [r2, r1] @ movhi + 1172 .L92: + 1173 0938 2046 mov r0, r4 + 1174 093a 6146 mov r1, ip + 1175 093c FFF7FEFF bl HAL_PCD_DataInStageCallback + 1176 0940 18F4804F tst r8, #16384 + 1177 0944 2068 ldr r0, [r4] + 1178 0946 BBD1 bne .L109 + 1179 0948 55E6 b .L94 + 1180 .L74: + 1181 094a C1F88021 str r2, [r1, #384] + 1182 .L134: + 1183 094e 0FFA8CF1 sxth r1, ip + 1184 0952 30F82120 ldrh r2, [r0, r1, lsl #2] + 1185 0956 22F48042 bic r2, r2, #16384 + 1186 095a 22F07002 bic r2, r2, #112 + 1187 095e 1204 lsls r2, r2, #16 + 1188 0960 120C lsrs r2, r2, #16 + 1189 0962 82F40052 eor r2, r2, #8192 + 1190 0966 42F40042 orr r2, r2, #32768 + 1191 096a 42F08002 orr r2, r2, #128 + 1192 096e 20F82120 strh r2, [r0, r1, lsl #2] @ movhi + 1193 0972 50E7 b .L75 + 1194 .L71: + 1195 0974 0022 movs r2, #0 + 1196 0976 C1F88021 str r2, [r1, #384] + 1197 .L133: + 1198 097a 0FFA8CF1 sxth r1, ip + 1199 097e 30F82120 ldrh r2, [r0, r1, lsl #2] + 1200 0982 22F48042 bic r2, r2, #16384 + 1201 0986 22F07002 bic r2, r2, #112 + 1202 098a 1204 lsls r2, r2, #16 + 1203 098c 120C lsrs r2, r2, #16 + 1204 098e 82F40052 eor r2, r2, #8192 + 1205 0992 42F40042 orr r2, r2, #32768 + 1206 0996 42F08002 orr r2, r2, #128 + 1207 099a 20F82120 strh r2, [r0, r1, lsl #2] @ movhi + 1208 099e 71E6 b .L72 + 1209 .L107: + 1210 09a0 012B cmp r3, #1 + 1211 09a2 85D1 bne .L108 + 1212 09a4 B0F85030 ldrh r3, [r0, #80] + 1213 09a8 02F20242 addw r2, r2, #1026 + 1214 09ac 0244 add r2, r2, r0 + 1215 09ae 9BB2 uxth r3, r3 + 1216 09b0 0025 movs r5, #0 + 1217 09b2 D552 strh r5, [r2, r3] @ movhi + 1218 09b4 019A ldr r2, [sp, #4] + 1219 09b6 B0F85030 ldrh r3, [r0, #80] + 1220 09ba 12FA83F3 uxtah r3, r2, r3 + 1221 09be 23F83C50 strh r5, [r3, ip, lsl #3] @ movhi + 1222 09c2 75E7 b .L108 + 1223 .L91: + 1224 09c4 012B cmp r3, #1 + ARM GAS /tmp/ccl2eyqE.s page 22 + + + 1225 09c6 B7D1 bne .L92 + 1226 09c8 B0F85030 ldrh r3, [r0, #80] + 1227 09cc 0099 ldr r1, [sp] + 1228 09ce 11FA83F3 uxtah r3, r1, r3 + 1229 09d2 0021 movs r1, #0 + 1230 09d4 23F83E10 strh r1, [r3, lr, lsl #3] @ movhi + 1231 09d8 B0F85030 ldrh r3, [r0, #80] + 1232 09dc 07F20642 addw r2, r7, #1030 + 1233 09e0 0244 add r2, r2, r0 + 1234 09e2 9BB2 uxth r3, r3 + 1235 09e4 D152 strh r1, [r2, r3] @ movhi + 1236 09e6 A7E7 b .L92 + 1237 .L202: + 1238 09e8 FB6B ldr r3, [r7, #60] + 1239 09ea D7F848C0 ldr ip, [r7, #72] + 1240 09ee 03EB0208 add r8, r3, r2 + 1241 09f2 7B6C ldr r3, [r7, #68] + 1242 09f4 C7F83C80 str r8, [r7, #60] + 1243 09f8 1344 add r3, r3, r2 + 1244 09fa 7B64 str r3, [r7, #68] + 1245 09fc BB6B ldr r3, [r7, #56] + 1246 09fe 9C45 cmp ip, r3 + 1247 0a00 42D3 bcc .L96 + 1248 0a02 ACEB0302 sub r2, ip, r3 + 1249 0a06 BA64 str r2, [r7, #72] + 1250 .L97: + 1251 0a08 96F82920 ldrb r2, [r6, #41] @ zero_extendqisi2 + 1252 0a0c 82BB cbnz r2, .L99 + 1253 0a0e B0F85020 ldrh r2, [r0, #80] + 1254 0a12 009F ldr r7, [sp] + 1255 0a14 3E2B cmp r3, #62 + 1256 0a16 17FA82F2 uxtah r2, r7, r2 + 1257 0a1a 65D9 bls .L100 + 1258 0a1c 5F09 lsrs r7, r3, #5 + 1259 0a1e D906 lsls r1, r3, #27 + 1260 0a20 2349 ldr r1, .L206 + 1261 0a22 08BF it eq + 1262 0a24 07F1FF37 addeq r7, r7, #-1 + 1263 0a28 41EA8727 orr r7, r1, r7, lsl #10 + 1264 0a2c BFB2 uxth r7, r7 + 1265 0a2e 22F83E70 strh r7, [r2, lr, lsl #3] @ movhi + 1266 0a32 9BB2 uxth r3, r3 + 1267 .L102: + 1268 0a34 09EB0502 add r2, r9, r5 + 1269 0a38 04EBC202 add r2, r4, r2, lsl #3 + 1270 0a3c 4146 mov r1, r8 + 1271 0a3e 128E ldrh r2, [r2, #48] + 1272 0a40 FFF7FEFF bl USB_WritePMA + 1273 0a44 2068 ldr r0, [r4] + 1274 0a46 D6E5 b .L94 + 1275 .L114: + 1276 0a48 012A cmp r2, #1 + 1277 0a4a 02BF ittt eq + 1278 0a4c B0F85020 ldrheq r2, [r0, #80] + 1279 0a50 0199 ldreq r1, [sp, #4] + 1280 0a52 11FA82F2 uxtaheq r2, r1, r2 + 1281 0a56 9BB2 uxth r3, r3 + ARM GAS /tmp/ccl2eyqE.s page 23 + + + 1282 0a58 08BF it eq + 1283 0a5a 22F83C30 strheq r3, [r2, ip, lsl #3] @ movhi + 1284 0a5e 9EE6 b .L117 + 1285 .L111: + 1286 0a60 E7B9 cbnz r7, .L113 + 1287 0a62 2822 movs r2, #40 + 1288 0a64 02FB0542 mla r2, r2, r5, r4 + 1289 0a68 7346 mov r3, lr + 1290 0a6a 82F84C70 strb r7, [r2, #76] + 1291 0a6e 7DE6 b .L112 + 1292 .L99: + 1293 0a70 012A cmp r2, #1 + 1294 0a72 02BF ittt eq + 1295 0a74 B0F85020 ldrheq r2, [r0, #80] + 1296 0a78 0099 ldreq r1, [sp] + 1297 0a7a 11FA82F2 uxtaheq r2, r1, r2 + 1298 0a7e 9BB2 uxth r3, r3 + 1299 0a80 08BF it eq + 1300 0a82 22F83E30 strheq r3, [r2, lr, lsl #3] @ movhi + 1301 0a86 D5E7 b .L102 + 1302 .L96: + 1303 0a88 BCF1000F cmp ip, #0 + 1304 0a8c 12D1 bne .L98 + 1305 0a8e 1346 mov r3, r2 + 1306 0a90 2822 movs r2, #40 + 1307 0a92 02FB0542 mla r2, r2, r5, r4 + 1308 0a96 82F84CC0 strb ip, [r2, #76] + 1309 0a9a B5E7 b .L97 + 1310 .L113: + 1311 0a9c 2822 movs r2, #40 + 1312 0a9e 02FB0542 mla r2, r2, r5, r4 + 1313 0aa2 3B46 mov r3, r7 + 1314 0aa4 0027 movs r7, #0 + 1315 0aa6 9764 str r7, [r2, #72] + 1316 0aa8 82F84C70 strb r7, [r2, #76] + 1317 0aac 5EE6 b .L112 + 1318 .L207: + 1319 0aae 00BF .align 2 + 1320 .L206: + 1321 0ab0 0080FFFF .word -32768 + 1322 .L98: + 1323 0ab4 2822 movs r2, #40 + 1324 0ab6 02FB0542 mla r2, r2, r5, r4 + 1325 0aba 0027 movs r7, #0 + 1326 0abc 6346 mov r3, ip + 1327 0abe 82F84C70 strb r7, [r2, #76] + 1328 0ac2 9764 str r7, [r2, #72] + 1329 0ac4 A0E7 b .L97 + 1330 .L115: + 1331 0ac6 03BB cbnz r3, .L118 + 1332 0ac8 32F83C70 ldrh r7, [r2, ip, lsl #3] + 1333 0acc 27F4F847 bic r7, r7, #31744 + 1334 0ad0 3F04 lsls r7, r7, #16 + 1335 0ad2 3F0C lsrs r7, r7, #16 + 1336 0ad4 22F83C70 strh r7, [r2, ip, lsl #3] @ movhi + 1337 0ad8 32F83C70 ldrh r7, [r2, ip, lsl #3] + 1338 0adc BFB2 uxth r7, r7 + ARM GAS /tmp/ccl2eyqE.s page 24 + + + 1339 0ade 47F40047 orr r7, r7, #32768 + 1340 0ae2 22F83C70 strh r7, [r2, ip, lsl #3] @ movhi + 1341 0ae6 5AE6 b .L117 + 1342 .L100: + 1343 0ae8 CBB9 cbnz r3, .L103 + 1344 0aea 32F83E70 ldrh r7, [r2, lr, lsl #3] + 1345 0aee 27F4F847 bic r7, r7, #31744 + 1346 0af2 3F04 lsls r7, r7, #16 + 1347 0af4 3F0C lsrs r7, r7, #16 + 1348 0af6 22F83E70 strh r7, [r2, lr, lsl #3] @ movhi + 1349 0afa 32F83E70 ldrh r7, [r2, lr, lsl #3] + 1350 0afe BFB2 uxth r7, r7 + 1351 0b00 47F40047 orr r7, r7, #32768 + 1352 0b04 22F83E70 strh r7, [r2, lr, lsl #3] @ movhi + 1353 0b08 94E7 b .L102 + 1354 .L118: + 1355 0b0a 5F08 lsrs r7, r3, #1 + 1356 0b0c D907 lsls r1, r3, #31 + 1357 0b0e 48BF it mi + 1358 0b10 0137 addmi r7, r7, #1 + 1359 0b12 BF02 lsls r7, r7, #10 + 1360 0b14 BFB2 uxth r7, r7 + 1361 0b16 22F83C70 strh r7, [r2, ip, lsl #3] @ movhi + 1362 0b1a 9BB2 uxth r3, r3 + 1363 0b1c 3FE6 b .L117 + 1364 .L103: + 1365 0b1e 5F08 lsrs r7, r3, #1 + 1366 0b20 D907 lsls r1, r3, #31 + 1367 0b22 48BF it mi + 1368 0b24 0137 addmi r7, r7, #1 + 1369 0b26 BF02 lsls r7, r7, #10 + 1370 0b28 BFB2 uxth r7, r7 + 1371 0b2a 22F83E70 strh r7, [r2, lr, lsl #3] @ movhi + 1372 0b2e 9BB2 uxth r3, r3 + 1373 0b30 80E7 b .L102 + 1375 0b32 00BF .section .text.HAL_PCD_ISOOUTIncompleteCallback,"ax",%progbits + 1376 .align 1 + 1377 .p2align 2,,3 + 1378 .weak HAL_PCD_ISOOUTIncompleteCallback + 1379 .syntax unified + 1380 .thumb + 1381 .thumb_func + 1382 .fpu fpv4-sp-d16 + 1384 HAL_PCD_ISOOUTIncompleteCallback: + 1385 @ args = 0, pretend = 0, frame = 0 + 1386 @ frame_needed = 0, uses_anonymous_args = 0 + 1387 @ link register save eliminated. + 1388 0000 7047 bx lr + 1390 0002 00BF .section .text.HAL_PCD_ISOINIncompleteCallback,"ax",%progbits + 1391 .align 1 + 1392 .p2align 2,,3 + 1393 .weak HAL_PCD_ISOINIncompleteCallback + 1394 .syntax unified + 1395 .thumb + 1396 .thumb_func + 1397 .fpu fpv4-sp-d16 + 1399 HAL_PCD_ISOINIncompleteCallback: + ARM GAS /tmp/ccl2eyqE.s page 25 + + + 1400 @ args = 0, pretend = 0, frame = 0 + 1401 @ frame_needed = 0, uses_anonymous_args = 0 + 1402 @ link register save eliminated. + 1403 0000 7047 bx lr + 1405 0002 00BF .section .text.HAL_PCD_ConnectCallback,"ax",%progbits + 1406 .align 1 + 1407 .p2align 2,,3 + 1408 .weak HAL_PCD_ConnectCallback + 1409 .syntax unified + 1410 .thumb + 1411 .thumb_func + 1412 .fpu fpv4-sp-d16 + 1414 HAL_PCD_ConnectCallback: + 1415 @ args = 0, pretend = 0, frame = 0 + 1416 @ frame_needed = 0, uses_anonymous_args = 0 + 1417 @ link register save eliminated. + 1418 0000 7047 bx lr + 1420 0002 00BF .section .text.HAL_PCD_DisconnectCallback,"ax",%progbits + 1421 .align 1 + 1422 .p2align 2,,3 + 1423 .weak HAL_PCD_DisconnectCallback + 1424 .syntax unified + 1425 .thumb + 1426 .thumb_func + 1427 .fpu fpv4-sp-d16 + 1429 HAL_PCD_DisconnectCallback: + 1430 @ args = 0, pretend = 0, frame = 0 + 1431 @ frame_needed = 0, uses_anonymous_args = 0 + 1432 @ link register save eliminated. + 1433 0000 7047 bx lr + 1435 0002 00BF .section .text.HAL_PCD_DevConnect,"ax",%progbits + 1436 .align 1 + 1437 .p2align 2,,3 + 1438 .global HAL_PCD_DevConnect + 1439 .syntax unified + 1440 .thumb + 1441 .thumb_func + 1442 .fpu fpv4-sp-d16 + 1444 HAL_PCD_DevConnect: + 1445 @ args = 0, pretend = 0, frame = 0 + 1446 @ frame_needed = 0, uses_anonymous_args = 0 + 1447 0000 90F8A832 ldrb r3, [r0, #680] @ zero_extendqisi2 + 1448 0004 012B cmp r3, #1 + 1449 0006 0BD0 beq .L214 + 1450 0008 10B5 push {r4, lr} + 1451 000a 0446 mov r4, r0 + 1452 000c 0123 movs r3, #1 + 1453 000e 0068 ldr r0, [r0] + 1454 0010 84F8A832 strb r3, [r4, #680] + 1455 0014 FFF7FEFF bl USB_DevConnect + 1456 0018 0020 movs r0, #0 + 1457 001a 84F8A802 strb r0, [r4, #680] + 1458 001e 10BD pop {r4, pc} + 1459 .L214: + 1460 0020 0220 movs r0, #2 + 1461 0022 7047 bx lr + 1463 .section .text.HAL_PCD_DevDisconnect,"ax",%progbits + ARM GAS /tmp/ccl2eyqE.s page 26 + + + 1464 .align 1 + 1465 .p2align 2,,3 + 1466 .global HAL_PCD_DevDisconnect + 1467 .syntax unified + 1468 .thumb + 1469 .thumb_func + 1470 .fpu fpv4-sp-d16 + 1472 HAL_PCD_DevDisconnect: + 1473 @ args = 0, pretend = 0, frame = 0 + 1474 @ frame_needed = 0, uses_anonymous_args = 0 + 1475 0000 90F8A832 ldrb r3, [r0, #680] @ zero_extendqisi2 + 1476 0004 012B cmp r3, #1 + 1477 0006 0BD0 beq .L221 + 1478 0008 10B5 push {r4, lr} + 1479 000a 0446 mov r4, r0 + 1480 000c 0123 movs r3, #1 + 1481 000e 0068 ldr r0, [r0] + 1482 0010 84F8A832 strb r3, [r4, #680] + 1483 0014 FFF7FEFF bl USB_DevDisconnect + 1484 0018 0020 movs r0, #0 + 1485 001a 84F8A802 strb r0, [r4, #680] + 1486 001e 10BD pop {r4, pc} + 1487 .L221: + 1488 0020 0220 movs r0, #2 + 1489 0022 7047 bx lr + 1491 .section .text.HAL_PCD_SetAddress,"ax",%progbits + 1492 .align 1 + 1493 .p2align 2,,3 + 1494 .global HAL_PCD_SetAddress + 1495 .syntax unified + 1496 .thumb + 1497 .thumb_func + 1498 .fpu fpv4-sp-d16 + 1500 HAL_PCD_SetAddress: + 1501 @ args = 0, pretend = 0, frame = 0 + 1502 @ frame_needed = 0, uses_anonymous_args = 0 + 1503 0000 90F8A822 ldrb r2, [r0, #680] @ zero_extendqisi2 + 1504 0004 012A cmp r2, #1 + 1505 0006 0DD0 beq .L228 + 1506 0008 10B5 push {r4, lr} + 1507 000a 0446 mov r4, r0 + 1508 000c 0122 movs r2, #1 + 1509 000e 0068 ldr r0, [r0] + 1510 0010 84F8A822 strb r2, [r4, #680] + 1511 0014 84F82410 strb r1, [r4, #36] + 1512 0018 FFF7FEFF bl USB_SetDevAddress + 1513 001c 0020 movs r0, #0 + 1514 001e 84F8A802 strb r0, [r4, #680] + 1515 0022 10BD pop {r4, pc} + 1516 .L228: + 1517 0024 0220 movs r0, #2 + 1518 0026 7047 bx lr + 1520 .section .text.HAL_PCD_EP_Open,"ax",%progbits + 1521 .align 1 + 1522 .p2align 2,,3 + 1523 .global HAL_PCD_EP_Open + 1524 .syntax unified + ARM GAS /tmp/ccl2eyqE.s page 27 + + + 1525 .thumb + 1526 .thumb_func + 1527 .fpu fpv4-sp-d16 + 1529 HAL_PCD_EP_Open: + 1530 @ args = 0, pretend = 0, frame = 0 + 1531 @ frame_needed = 0, uses_anonymous_args = 0 + 1532 0000 10B5 push {r4, lr} + 1533 0002 01F0070E and lr, r1, #7 + 1534 0006 0906 lsls r1, r1, #24 + 1535 0008 0446 mov r4, r0 + 1536 000a 27D4 bmi .L244 + 1537 000c 4FF0280C mov ip, #40 + 1538 0010 0CFB0E0C mla ip, ip, lr, r0 + 1539 0014 0CF5B471 add r1, ip, #360 + 1540 0018 0EEB8E0C add ip, lr, lr, lsl #2 + 1541 001c 00EBCC0C add ip, r0, ip, lsl #3 + 1542 0020 0020 movs r0, #0 + 1543 0022 8CF86901 strb r0, [ip, #361] + 1544 .L235: + 1545 0026 0A61 str r2, [r1, #16] + 1546 0028 4A78 ldrb r2, [r1, #1] @ zero_extendqisi2 + 1547 002a 81F800E0 strb lr, [r1] + 1548 002e CB70 strb r3, [r1, #3] + 1549 0030 0AB1 cbz r2, .L236 + 1550 0032 A1F80EE0 strh lr, [r1, #14] @ movhi + 1551 .L236: + 1552 0036 022B cmp r3, #2 + 1553 0038 04BF itt eq + 1554 003a 0023 moveq r3, #0 + 1555 003c 0B71 strbeq r3, [r1, #4] + 1556 003e 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1557 0042 012B cmp r3, #1 + 1558 0044 15D0 beq .L239 + 1559 0046 0123 movs r3, #1 + 1560 0048 84F8A832 strb r3, [r4, #680] + 1561 004c 2068 ldr r0, [r4] + 1562 004e FFF7FEFF bl USB_ActivateEndpoint + 1563 0052 0023 movs r3, #0 + 1564 0054 84F8A832 strb r3, [r4, #680] + 1565 0058 1846 mov r0, r3 + 1566 005a 10BD pop {r4, pc} + 1567 .L244: + 1568 005c 0EF1010C add ip, lr, #1 + 1569 0060 0CEB8C0C add ip, ip, ip, lsl #2 + 1570 0064 00EBCC0C add ip, r0, ip, lsl #3 + 1571 0068 0120 movs r0, #1 + 1572 006a 6146 mov r1, ip + 1573 006c 8CF80100 strb r0, [ip, #1] + 1574 0070 D9E7 b .L235 + 1575 .L239: + 1576 0072 0220 movs r0, #2 + 1577 0074 10BD pop {r4, pc} + 1579 0076 00BF .section .text.HAL_PCD_EP_Close,"ax",%progbits + 1580 .align 1 + 1581 .p2align 2,,3 + 1582 .global HAL_PCD_EP_Close + 1583 .syntax unified + ARM GAS /tmp/ccl2eyqE.s page 28 + + + 1584 .thumb + 1585 .thumb_func + 1586 .fpu fpv4-sp-d16 + 1588 HAL_PCD_EP_Close: + 1589 @ args = 0, pretend = 0, frame = 0 + 1590 @ frame_needed = 0, uses_anonymous_args = 0 + 1591 0000 0A06 lsls r2, r1, #24 + 1592 0002 10B5 push {r4, lr} + 1593 0004 01F00703 and r3, r1, #7 + 1594 0008 0446 mov r4, r0 + 1595 000a 1AD4 bmi .L251 + 1596 000c 2821 movs r1, #40 + 1597 000e 01FB0301 mla r1, r1, r3, r0 + 1598 0012 03EB8302 add r2, r3, r3, lsl #2 + 1599 0016 00EBC202 add r2, r0, r2, lsl #3 + 1600 001a 01F5B471 add r1, r1, #360 + 1601 001e 0020 movs r0, #0 + 1602 0020 82F86901 strb r0, [r2, #361] + 1603 0024 0B70 strb r3, [r1] + 1604 0026 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1605 002a 012B cmp r3, #1 + 1606 002c 16D0 beq .L249 + 1607 .L252: + 1608 002e 0123 movs r3, #1 + 1609 0030 2068 ldr r0, [r4] + 1610 0032 84F8A832 strb r3, [r4, #680] + 1611 0036 FFF7FEFF bl USB_DeactivateEndpoint + 1612 003a 0020 movs r0, #0 + 1613 003c 84F8A802 strb r0, [r4, #680] + 1614 0040 10BD pop {r4, pc} + 1615 .L251: + 1616 0042 5A1C adds r2, r3, #1 + 1617 0044 02EB8202 add r2, r2, r2, lsl #2 + 1618 0048 00EBC202 add r2, r0, r2, lsl #3 + 1619 004c 1146 mov r1, r2 + 1620 004e 0120 movs r0, #1 + 1621 0050 5070 strb r0, [r2, #1] + 1622 0052 0B70 strb r3, [r1] + 1623 0054 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1624 0058 012B cmp r3, #1 + 1625 005a E8D1 bne .L252 + 1626 .L249: + 1627 005c 0220 movs r0, #2 + 1628 005e 10BD pop {r4, pc} + 1630 .section .text.HAL_PCD_EP_Receive,"ax",%progbits + 1631 .align 1 + 1632 .p2align 2,,3 + 1633 .global HAL_PCD_EP_Receive + 1634 .syntax unified + 1635 .thumb + 1636 .thumb_func + 1637 .fpu fpv4-sp-d16 + 1639 HAL_PCD_EP_Receive: + 1640 @ args = 0, pretend = 0, frame = 0 + 1641 @ frame_needed = 0, uses_anonymous_args = 0 + 1642 0000 01F00701 and r1, r1, #7 + 1643 0004 01EB810C add ip, r1, r1, lsl #2 + ARM GAS /tmp/ccl2eyqE.s page 29 + + + 1644 0008 10B5 push {r4, lr} + 1645 000a 00EBCC0C add ip, r0, ip, lsl #3 + 1646 000e 0024 movs r4, #0 + 1647 0010 CCF87C21 str r2, [ip, #380] + 1648 0014 2822 movs r2, #40 + 1649 0016 02FB0102 mla r2, r2, r1, r0 + 1650 001a 8CF86811 strb r1, [ip, #360] + 1651 001e 0068 ldr r0, [r0] + 1652 0020 8CF86941 strb r4, [ip, #361] + 1653 0024 CCE96034 strd r3, r4, [ip, #384] + 1654 0028 02F5B471 add r1, r2, #360 + 1655 002c FFF7FEFF bl USB_EPStartXfer + 1656 0030 2046 mov r0, r4 + 1657 0032 10BD pop {r4, pc} + 1659 .section .text.HAL_PCD_EP_GetRxCount,"ax",%progbits + 1660 .align 1 + 1661 .p2align 2,,3 + 1662 .global HAL_PCD_EP_GetRxCount + 1663 .syntax unified + 1664 .thumb + 1665 .thumb_func + 1666 .fpu fpv4-sp-d16 + 1668 HAL_PCD_EP_GetRxCount: + 1669 @ args = 0, pretend = 0, frame = 0 + 1670 @ frame_needed = 0, uses_anonymous_args = 0 + 1671 @ link register save eliminated. + 1672 0000 01F00701 and r1, r1, #7 + 1673 0004 01EB8101 add r1, r1, r1, lsl #2 + 1674 0008 00EBC101 add r1, r0, r1, lsl #3 + 1675 000c D1F88401 ldr r0, [r1, #388] + 1676 0010 7047 bx lr + 1678 0012 00BF .section .text.HAL_PCD_EP_Transmit,"ax",%progbits + 1679 .align 1 + 1680 .p2align 2,,3 + 1681 .global HAL_PCD_EP_Transmit + 1682 .syntax unified + 1683 .thumb + 1684 .thumb_func + 1685 .fpu fpv4-sp-d16 + 1687 HAL_PCD_EP_Transmit: + 1688 @ args = 0, pretend = 0, frame = 0 + 1689 @ frame_needed = 0, uses_anonymous_args = 0 + 1690 0000 01F00701 and r1, r1, #7 + 1691 0004 01EB810C add ip, r1, r1, lsl #2 + 1692 0008 10B5 push {r4, lr} + 1693 000a 00EBCC0C add ip, r0, ip, lsl #3 + 1694 000e 8646 mov lr, r0 + 1695 0010 0120 movs r0, #1 + 1696 0012 CCF84030 str r3, [ip, #64] + 1697 0016 CCF84830 str r3, [ip, #72] + 1698 001a 0B18 adds r3, r1, r0 + 1699 001c 0024 movs r4, #0 + 1700 001e 03EB8303 add r3, r3, r3, lsl #2 + 1701 0022 8CF84C00 strb r0, [ip, #76] + 1702 0026 8CF82900 strb r0, [ip, #41] + 1703 002a 8CF82810 strb r1, [ip, #40] + 1704 002e DEF80000 ldr r0, [lr] + ARM GAS /tmp/ccl2eyqE.s page 30 + + + 1705 0032 CCF83C20 str r2, [ip, #60] + 1706 0036 CCF84440 str r4, [ip, #68] + 1707 003a 0EEBC301 add r1, lr, r3, lsl #3 + 1708 003e FFF7FEFF bl USB_EPStartXfer + 1709 0042 2046 mov r0, r4 + 1710 0044 10BD pop {r4, pc} + 1712 0046 00BF .section .text.HAL_PCD_EP_SetStall,"ax",%progbits + 1713 .align 1 + 1714 .p2align 2,,3 + 1715 .global HAL_PCD_EP_SetStall + 1716 .syntax unified + 1717 .thumb + 1718 .thumb_func + 1719 .fpu fpv4-sp-d16 + 1721 HAL_PCD_EP_SetStall: + 1722 @ args = 0, pretend = 0, frame = 0 + 1723 @ frame_needed = 0, uses_anonymous_args = 0 + 1724 0000 4268 ldr r2, [r0, #4] + 1725 0002 01F00703 and r3, r1, #7 + 1726 0006 9342 cmp r3, r2 + 1727 0008 30D8 bhi .L262 + 1728 000a 0A06 lsls r2, r1, #24 + 1729 000c 10B5 push {r4, lr} + 1730 000e 0446 mov r4, r0 + 1731 0010 1BD4 bmi .L268 + 1732 0012 01EB8102 add r2, r1, r1, lsl #2 + 1733 0016 2820 movs r0, #40 + 1734 0018 00FB0141 mla r1, r0, r1, r4 + 1735 001c 04EBC202 add r2, r4, r2, lsl #3 + 1736 0020 01F5B471 add r1, r1, #360 + 1737 0024 0020 movs r0, #0 + 1738 0026 82F86901 strb r0, [r2, #361] + 1739 002a 0122 movs r2, #1 + 1740 002c 8A70 strb r2, [r1, #2] + 1741 002e 0B70 strb r3, [r1] + 1742 0030 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1743 0034 9342 cmp r3, r2 + 1744 0036 17D0 beq .L263 + 1745 .L269: + 1746 0038 2068 ldr r0, [r4] + 1747 003a 84F8A822 strb r2, [r4, #680] + 1748 003e FFF7FEFF bl USB_EPSetStall + 1749 0042 0020 movs r0, #0 + 1750 0044 84F8A802 strb r0, [r4, #680] + 1751 0048 10BD pop {r4, pc} + 1752 .L268: + 1753 004a 5A1C adds r2, r3, #1 + 1754 004c 02EB8202 add r2, r2, r2, lsl #2 + 1755 0050 00EBC202 add r2, r0, r2, lsl #3 + 1756 0054 1146 mov r1, r2 + 1757 0056 0120 movs r0, #1 + 1758 0058 5070 strb r0, [r2, #1] + 1759 005a 0122 movs r2, #1 + 1760 005c 8A70 strb r2, [r1, #2] + 1761 005e 0B70 strb r3, [r1] + 1762 0060 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1763 0064 9342 cmp r3, r2 + ARM GAS /tmp/ccl2eyqE.s page 31 + + + 1764 0066 E7D1 bne .L269 + 1765 .L263: + 1766 0068 0220 movs r0, #2 + 1767 006a 10BD pop {r4, pc} + 1768 .L262: + 1769 006c 0120 movs r0, #1 + 1770 006e 7047 bx lr + 1772 .section .text.HAL_PCD_EP_ClrStall,"ax",%progbits + 1773 .align 1 + 1774 .p2align 2,,3 + 1775 .global HAL_PCD_EP_ClrStall + 1776 .syntax unified + 1777 .thumb + 1778 .thumb_func + 1779 .fpu fpv4-sp-d16 + 1781 HAL_PCD_EP_ClrStall: + 1782 @ args = 0, pretend = 0, frame = 0 + 1783 @ frame_needed = 0, uses_anonymous_args = 0 + 1784 0000 38B5 push {r3, r4, r5, lr} + 1785 0002 4368 ldr r3, [r0, #4] + 1786 0004 01F00F02 and r2, r1, #15 + 1787 0008 9A42 cmp r2, r3 + 1788 000a 32D8 bhi .L274 + 1789 000c 0A06 lsls r2, r1, #24 + 1790 000e 0446 mov r4, r0 + 1791 0010 01F00703 and r3, r1, #7 + 1792 0014 1CD4 bmi .L277 + 1793 0016 2821 movs r1, #40 + 1794 0018 01FB0301 mla r1, r1, r3, r0 + 1795 001c 03EB8302 add r2, r3, r3, lsl #2 + 1796 0020 00EBC202 add r2, r0, r2, lsl #3 + 1797 0024 01F5B471 add r1, r1, #360 + 1798 0028 0020 movs r0, #0 + 1799 002a 0025 movs r5, #0 + 1800 002c 82F86901 strb r0, [r2, #361] + 1801 0030 8D70 strb r5, [r1, #2] + 1802 0032 0B70 strb r3, [r1] + 1803 0034 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1804 0038 012B cmp r3, #1 + 1805 003a 18D0 beq .L275 + 1806 .L278: + 1807 003c 0123 movs r3, #1 + 1808 003e 2068 ldr r0, [r4] + 1809 0040 84F8A832 strb r3, [r4, #680] + 1810 0044 FFF7FEFF bl USB_EPClearStall + 1811 0048 84F8A852 strb r5, [r4, #680] + 1812 004c 2846 mov r0, r5 + 1813 004e 38BD pop {r3, r4, r5, pc} + 1814 .L277: + 1815 0050 5A1C adds r2, r3, #1 + 1816 0052 02EB8202 add r2, r2, r2, lsl #2 + 1817 0056 00EBC202 add r2, r0, r2, lsl #3 + 1818 005a 1146 mov r1, r2 + 1819 005c 0120 movs r0, #1 + 1820 005e 0025 movs r5, #0 + 1821 0060 5070 strb r0, [r2, #1] + 1822 0062 8D70 strb r5, [r1, #2] + ARM GAS /tmp/ccl2eyqE.s page 32 + + + 1823 0064 0B70 strb r3, [r1] + 1824 0066 94F8A832 ldrb r3, [r4, #680] @ zero_extendqisi2 + 1825 006a 012B cmp r3, #1 + 1826 006c E6D1 bne .L278 + 1827 .L275: + 1828 006e 0220 movs r0, #2 + 1829 0070 38BD pop {r3, r4, r5, pc} + 1830 .L274: + 1831 0072 0120 movs r0, #1 + 1832 0074 38BD pop {r3, r4, r5, pc} + 1834 0076 00BF .section .text.HAL_PCD_EP_Flush,"ax",%progbits + 1835 .align 1 + 1836 .p2align 2,,3 + 1837 .global HAL_PCD_EP_Flush + 1838 .syntax unified + 1839 .thumb + 1840 .thumb_func + 1841 .fpu fpv4-sp-d16 + 1843 HAL_PCD_EP_Flush: + 1844 @ args = 0, pretend = 0, frame = 0 + 1845 @ frame_needed = 0, uses_anonymous_args = 0 + 1846 @ link register save eliminated. + 1847 0000 0020 movs r0, #0 + 1848 0002 7047 bx lr + 1850 .section .text.HAL_PCD_ActivateRemoteWakeup,"ax",%progbits + 1851 .align 1 + 1852 .p2align 2,,3 + 1853 .global HAL_PCD_ActivateRemoteWakeup + 1854 .syntax unified + 1855 .thumb + 1856 .thumb_func + 1857 .fpu fpv4-sp-d16 + 1859 HAL_PCD_ActivateRemoteWakeup: + 1860 @ args = 0, pretend = 0, frame = 0 + 1861 @ frame_needed = 0, uses_anonymous_args = 0 + 1862 @ link register save eliminated. + 1863 0000 0068 ldr r0, [r0] + 1864 0002 FFF7FEBF b USB_ActivateRemoteWakeup + 1866 0006 00BF .section .text.HAL_PCD_DeActivateRemoteWakeup,"ax",%progbits + 1867 .align 1 + 1868 .p2align 2,,3 + 1869 .global HAL_PCD_DeActivateRemoteWakeup + 1870 .syntax unified + 1871 .thumb + 1872 .thumb_func + 1873 .fpu fpv4-sp-d16 + 1875 HAL_PCD_DeActivateRemoteWakeup: + 1876 @ args = 0, pretend = 0, frame = 0 + 1877 @ frame_needed = 0, uses_anonymous_args = 0 + 1878 @ link register save eliminated. + 1879 0000 0068 ldr r0, [r0] + 1880 0002 FFF7FEBF b USB_DeActivateRemoteWakeup + 1882 0006 00BF .section .text.HAL_PCD_GetState,"ax",%progbits + 1883 .align 1 + 1884 .p2align 2,,3 + 1885 .global HAL_PCD_GetState + 1886 .syntax unified + ARM GAS /tmp/ccl2eyqE.s page 33 + + + 1887 .thumb + 1888 .thumb_func + 1889 .fpu fpv4-sp-d16 + 1891 HAL_PCD_GetState: + 1892 @ args = 0, pretend = 0, frame = 0 + 1893 @ frame_needed = 0, uses_anonymous_args = 0 + 1894 @ link register save eliminated. + 1895 0000 90F8A902 ldrb r0, [r0, #681] @ zero_extendqisi2 + 1896 0004 7047 bx lr + 1898 0006 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccl2eyqE.s page 34 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_pcd.c + /tmp/ccl2eyqE.s:16 .text.HAL_PCD_MspInit:0000000000000000 $t + /tmp/ccl2eyqE.s:25 .text.HAL_PCD_MspInit:0000000000000000 HAL_PCD_MspInit + /tmp/ccl2eyqE.s:32 .text.HAL_PCD_Init:0000000000000000 $t + /tmp/ccl2eyqE.s:40 .text.HAL_PCD_Init:0000000000000000 HAL_PCD_Init + /tmp/ccl2eyqE.s:128 .text.HAL_PCD_MspDeInit:0000000000000000 $t + /tmp/ccl2eyqE.s:136 .text.HAL_PCD_MspDeInit:0000000000000000 HAL_PCD_MspDeInit + /tmp/ccl2eyqE.s:143 .text.HAL_PCD_DeInit:0000000000000000 $t + /tmp/ccl2eyqE.s:151 .text.HAL_PCD_DeInit:0000000000000000 HAL_PCD_DeInit + /tmp/ccl2eyqE.s:175 .text.HAL_PCD_Start:0000000000000000 $t + /tmp/ccl2eyqE.s:183 .text.HAL_PCD_Start:0000000000000000 HAL_PCD_Start + /tmp/ccl2eyqE.s:205 .text.HAL_PCD_Stop:0000000000000000 $t + /tmp/ccl2eyqE.s:213 .text.HAL_PCD_Stop:0000000000000000 HAL_PCD_Stop + /tmp/ccl2eyqE.s:235 .text.HAL_PCD_DataOutStageCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:243 .text.HAL_PCD_DataOutStageCallback:0000000000000000 HAL_PCD_DataOutStageCallback + /tmp/ccl2eyqE.s:250 .text.HAL_PCD_DataInStageCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:258 .text.HAL_PCD_DataInStageCallback:0000000000000000 HAL_PCD_DataInStageCallback + /tmp/ccl2eyqE.s:265 .text.HAL_PCD_SetupStageCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:273 .text.HAL_PCD_SetupStageCallback:0000000000000000 HAL_PCD_SetupStageCallback + /tmp/ccl2eyqE.s:280 .text.HAL_PCD_SOFCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:288 .text.HAL_PCD_SOFCallback:0000000000000000 HAL_PCD_SOFCallback + /tmp/ccl2eyqE.s:295 .text.HAL_PCD_ResetCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:303 .text.HAL_PCD_ResetCallback:0000000000000000 HAL_PCD_ResetCallback + /tmp/ccl2eyqE.s:310 .text.HAL_PCD_SuspendCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:318 .text.HAL_PCD_SuspendCallback:0000000000000000 HAL_PCD_SuspendCallback + /tmp/ccl2eyqE.s:325 .text.HAL_PCD_ResumeCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:333 .text.HAL_PCD_ResumeCallback:0000000000000000 HAL_PCD_ResumeCallback + /tmp/ccl2eyqE.s:340 .text.HAL_PCD_IRQHandler:0000000000000000 $t + /tmp/ccl2eyqE.s:348 .text.HAL_PCD_IRQHandler:0000000000000000 HAL_PCD_IRQHandler + /tmp/ccl2eyqE.s:955 .text.HAL_PCD_IRQHandler:00000000000006d0 $d + /tmp/ccl2eyqE.s:959 .text.HAL_PCD_IRQHandler:00000000000006dc $t + /tmp/ccl2eyqE.s:1321 .text.HAL_PCD_IRQHandler:0000000000000ab0 $d + /tmp/ccl2eyqE.s:1323 .text.HAL_PCD_IRQHandler:0000000000000ab4 $t + /tmp/ccl2eyqE.s:1376 .text.HAL_PCD_ISOOUTIncompleteCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:1384 .text.HAL_PCD_ISOOUTIncompleteCallback:0000000000000000 HAL_PCD_ISOOUTIncompleteCallback + /tmp/ccl2eyqE.s:1391 .text.HAL_PCD_ISOINIncompleteCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:1399 .text.HAL_PCD_ISOINIncompleteCallback:0000000000000000 HAL_PCD_ISOINIncompleteCallback + /tmp/ccl2eyqE.s:1406 .text.HAL_PCD_ConnectCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:1414 .text.HAL_PCD_ConnectCallback:0000000000000000 HAL_PCD_ConnectCallback + /tmp/ccl2eyqE.s:1421 .text.HAL_PCD_DisconnectCallback:0000000000000000 $t + /tmp/ccl2eyqE.s:1429 .text.HAL_PCD_DisconnectCallback:0000000000000000 HAL_PCD_DisconnectCallback + /tmp/ccl2eyqE.s:1436 .text.HAL_PCD_DevConnect:0000000000000000 $t + /tmp/ccl2eyqE.s:1444 .text.HAL_PCD_DevConnect:0000000000000000 HAL_PCD_DevConnect + /tmp/ccl2eyqE.s:1464 .text.HAL_PCD_DevDisconnect:0000000000000000 $t + /tmp/ccl2eyqE.s:1472 .text.HAL_PCD_DevDisconnect:0000000000000000 HAL_PCD_DevDisconnect + /tmp/ccl2eyqE.s:1492 .text.HAL_PCD_SetAddress:0000000000000000 $t + /tmp/ccl2eyqE.s:1500 .text.HAL_PCD_SetAddress:0000000000000000 HAL_PCD_SetAddress + /tmp/ccl2eyqE.s:1521 .text.HAL_PCD_EP_Open:0000000000000000 $t + /tmp/ccl2eyqE.s:1529 .text.HAL_PCD_EP_Open:0000000000000000 HAL_PCD_EP_Open + /tmp/ccl2eyqE.s:1580 .text.HAL_PCD_EP_Close:0000000000000000 $t + /tmp/ccl2eyqE.s:1588 .text.HAL_PCD_EP_Close:0000000000000000 HAL_PCD_EP_Close + /tmp/ccl2eyqE.s:1631 .text.HAL_PCD_EP_Receive:0000000000000000 $t + /tmp/ccl2eyqE.s:1639 .text.HAL_PCD_EP_Receive:0000000000000000 HAL_PCD_EP_Receive + /tmp/ccl2eyqE.s:1660 .text.HAL_PCD_EP_GetRxCount:0000000000000000 $t + /tmp/ccl2eyqE.s:1668 .text.HAL_PCD_EP_GetRxCount:0000000000000000 HAL_PCD_EP_GetRxCount + /tmp/ccl2eyqE.s:1679 .text.HAL_PCD_EP_Transmit:0000000000000000 $t + ARM GAS /tmp/ccl2eyqE.s page 35 + + + /tmp/ccl2eyqE.s:1687 .text.HAL_PCD_EP_Transmit:0000000000000000 HAL_PCD_EP_Transmit + /tmp/ccl2eyqE.s:1713 .text.HAL_PCD_EP_SetStall:0000000000000000 $t + /tmp/ccl2eyqE.s:1721 .text.HAL_PCD_EP_SetStall:0000000000000000 HAL_PCD_EP_SetStall + /tmp/ccl2eyqE.s:1773 .text.HAL_PCD_EP_ClrStall:0000000000000000 $t + /tmp/ccl2eyqE.s:1781 .text.HAL_PCD_EP_ClrStall:0000000000000000 HAL_PCD_EP_ClrStall + /tmp/ccl2eyqE.s:1835 .text.HAL_PCD_EP_Flush:0000000000000000 $t + /tmp/ccl2eyqE.s:1843 .text.HAL_PCD_EP_Flush:0000000000000000 HAL_PCD_EP_Flush + /tmp/ccl2eyqE.s:1851 .text.HAL_PCD_ActivateRemoteWakeup:0000000000000000 $t + /tmp/ccl2eyqE.s:1859 .text.HAL_PCD_ActivateRemoteWakeup:0000000000000000 HAL_PCD_ActivateRemoteWakeup + /tmp/ccl2eyqE.s:1867 .text.HAL_PCD_DeActivateRemoteWakeup:0000000000000000 $t + /tmp/ccl2eyqE.s:1875 .text.HAL_PCD_DeActivateRemoteWakeup:0000000000000000 HAL_PCD_DeActivateRemoteWakeup + /tmp/ccl2eyqE.s:1883 .text.HAL_PCD_GetState:0000000000000000 $t + /tmp/ccl2eyqE.s:1891 .text.HAL_PCD_GetState:0000000000000000 HAL_PCD_GetState + +UNDEFINED SYMBOLS +USB_DisableGlobalInt +USB_DevInit +HAL_PCDEx_ActivateLPM +USB_StopDevice +USB_EnableGlobalInt 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z54$mW4>R&AP@V;G?a}nx&d3YuK3EhCk_kS7MhkgJ6 literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_hal_pcd_ex.d b/codice/build/stm32g4xx_hal_pcd_ex.d new file mode 100644 index 0000000..2be80d1 --- /dev/null +++ b/codice/build/stm32g4xx_hal_pcd_ex.d @@ -0,0 +1,84 @@ +build/stm32g4xx_hal_pcd_ex.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pcd_ex.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_pcd_ex.lst b/codice/build/stm32g4xx_hal_pcd_ex.lst new file mode 100644 index 0000000..614fdac --- /dev/null +++ b/codice/build/stm32g4xx_hal_pcd_ex.lst @@ -0,0 +1,329 @@ +ARM GAS /tmp/ccwIICsF.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_pcd_ex.c" + 14 .text + 15 .section .text.HAL_PCDEx_PMAConfig,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_PCDEx_PMAConfig + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_PCDEx_PMAConfig: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 11F0800F tst r1, #128 + 30 0004 0BD0 beq .L2 + 31 0006 01F00701 and r1, r1, #7 + 32 000a 0131 adds r1, r1, #1 + 33 000c 01EB8101 add r1, r1, r1, lsl #2 + 34 0010 00EBC101 add r1, r0, r1, lsl #3 + 35 0014 5AB9 cbnz r2, .L4 + 36 .L7: + 37 0016 CB80 strh r3, [r1, #6] @ movhi + 38 0018 0A73 strb r2, [r1, #12] + 39 001a 0020 movs r0, #0 + 40 001c 7047 bx lr + 41 .L2: + 42 001e 01EB8101 add r1, r1, r1, lsl #2 + 43 0022 00EBC101 add r1, r0, r1, lsl #3 + 44 0026 01F5B471 add r1, r1, #360 + 45 002a 002A cmp r2, #0 + 46 002c F3D0 beq .L7 + 47 .L4: + 48 002e 0122 movs r2, #1 + 49 0030 8B60 str r3, [r1, #8] + 50 0032 0A73 strb r2, [r1, #12] + 51 0034 0020 movs r0, #0 + 52 0036 7047 bx lr + 54 .section .text.HAL_PCDEx_ActivateBCD,"ax",%progbits + 55 .align 1 + 56 .p2align 2,,3 + 57 .global HAL_PCDEx_ActivateBCD + 58 .syntax unified + 59 .thumb + ARM GAS /tmp/ccwIICsF.s page 2 + + + 60 .thumb_func + 61 .fpu fpv4-sp-d16 + 63 HAL_PCDEx_ActivateBCD: + 64 @ args = 0, pretend = 0, frame = 0 + 65 @ frame_needed = 0, uses_anonymous_args = 0 + 66 @ link register save eliminated. + 67 0000 0368 ldr r3, [r0] + 68 0002 0122 movs r2, #1 + 69 0004 C0F8EC22 str r2, [r0, #748] + 70 0008 B3F85820 ldrh r2, [r3, #88] + 71 000c 92B2 uxth r2, r2 + 72 000e 42F00102 orr r2, r2, #1 + 73 0012 A3F85820 strh r2, [r3, #88] @ movhi + 74 0016 B3F85820 ldrh r2, [r3, #88] + 75 001a 22F00402 bic r2, r2, #4 + 76 001e 1204 lsls r2, r2, #16 + 77 0020 120C lsrs r2, r2, #16 + 78 0022 A3F85820 strh r2, [r3, #88] @ movhi + 79 0026 B3F85820 ldrh r2, [r3, #88] + 80 002a 22F00802 bic r2, r2, #8 + 81 002e 1204 lsls r2, r2, #16 + 82 0030 120C lsrs r2, r2, #16 + 83 0032 A3F85820 strh r2, [r3, #88] @ movhi + 84 0036 B3F85820 ldrh r2, [r3, #88] + 85 003a 92B2 uxth r2, r2 + 86 003c 42F00202 orr r2, r2, #2 + 87 0040 0020 movs r0, #0 + 88 0042 A3F85820 strh r2, [r3, #88] @ movhi + 89 0046 7047 bx lr + 91 .section .text.HAL_PCDEx_DeActivateBCD,"ax",%progbits + 92 .align 1 + 93 .p2align 2,,3 + 94 .global HAL_PCDEx_DeActivateBCD + 95 .syntax unified + 96 .thumb + 97 .thumb_func + 98 .fpu fpv4-sp-d16 + 100 HAL_PCDEx_DeActivateBCD: + 101 @ args = 0, pretend = 0, frame = 0 + 102 @ frame_needed = 0, uses_anonymous_args = 0 + 103 @ link register save eliminated. + 104 0000 0268 ldr r2, [r0] + 105 0002 B2F85830 ldrh r3, [r2, #88] + 106 0006 23F00103 bic r3, r3, #1 + 107 000a 1B04 lsls r3, r3, #16 + 108 000c 0021 movs r1, #0 + 109 000e 1B0C lsrs r3, r3, #16 + 110 0010 C0F8EC12 str r1, [r0, #748] + 111 0014 0846 mov r0, r1 + 112 0016 A2F85830 strh r3, [r2, #88] @ movhi + 113 001a 7047 bx lr + 115 .section .text.HAL_PCDEx_ActivateLPM,"ax",%progbits + 116 .align 1 + 117 .p2align 2,,3 + 118 .global HAL_PCDEx_ActivateLPM + 119 .syntax unified + 120 .thumb + ARM GAS /tmp/ccwIICsF.s page 3 + + + 121 .thumb_func + 122 .fpu fpv4-sp-d16 + 124 HAL_PCDEx_ActivateLPM: + 125 @ args = 0, pretend = 0, frame = 0 + 126 @ frame_needed = 0, uses_anonymous_args = 0 + 127 @ link register save eliminated. + 128 0000 0268 ldr r2, [r0] + 129 0002 0021 movs r1, #0 + 130 0004 10B4 push {r4} + 131 0006 80F8E012 strb r1, [r0, #736] + 132 000a B2F85430 ldrh r3, [r2, #84] + 133 000e 0124 movs r4, #1 + 134 0010 9BB2 uxth r3, r3 + 135 0012 2343 orrs r3, r3, r4 + 136 0014 C0F8E842 str r4, [r0, #744] + 137 0018 A2F85430 strh r3, [r2, #84] @ movhi + 138 001c B2F85430 ldrh r3, [r2, #84] + 139 0020 5DF8044B ldr r4, [sp], #4 + 140 0024 9BB2 uxth r3, r3 + 141 0026 43F00203 orr r3, r3, #2 + 142 002a 0846 mov r0, r1 + 143 002c A2F85430 strh r3, [r2, #84] @ movhi + 144 0030 7047 bx lr + 146 0032 00BF .section .text.HAL_PCDEx_DeActivateLPM,"ax",%progbits + 147 .align 1 + 148 .p2align 2,,3 + 149 .global HAL_PCDEx_DeActivateLPM + 150 .syntax unified + 151 .thumb + 152 .thumb_func + 153 .fpu fpv4-sp-d16 + 155 HAL_PCDEx_DeActivateLPM: + 156 @ args = 0, pretend = 0, frame = 0 + 157 @ frame_needed = 0, uses_anonymous_args = 0 + 158 @ link register save eliminated. + 159 0000 0268 ldr r2, [r0] + 160 0002 B2F85430 ldrh r3, [r2, #84] + 161 0006 23F00103 bic r3, r3, #1 + 162 000a 1B04 lsls r3, r3, #16 + 163 000c 0021 movs r1, #0 + 164 000e 1B0C lsrs r3, r3, #16 + 165 0010 C0F8E812 str r1, [r0, #744] + 166 0014 A2F85430 strh r3, [r2, #84] @ movhi + 167 0018 B2F85430 ldrh r3, [r2, #84] + 168 001c 23F00203 bic r3, r3, #2 + 169 0020 1B04 lsls r3, r3, #16 + 170 0022 1B0C lsrs r3, r3, #16 + 171 0024 0846 mov r0, r1 + 172 0026 A2F85430 strh r3, [r2, #84] @ movhi + 173 002a 7047 bx lr + 175 .section .text.HAL_PCDEx_LPM_Callback,"ax",%progbits + 176 .align 1 + 177 .p2align 2,,3 + 178 .weak HAL_PCDEx_LPM_Callback + 179 .syntax unified + 180 .thumb + 181 .thumb_func + ARM GAS /tmp/ccwIICsF.s page 4 + + + 182 .fpu fpv4-sp-d16 + 184 HAL_PCDEx_LPM_Callback: + 185 @ args = 0, pretend = 0, frame = 0 + 186 @ frame_needed = 0, uses_anonymous_args = 0 + 187 @ link register save eliminated. + 188 0000 7047 bx lr + 190 0002 00BF .section .text.HAL_PCDEx_BCD_Callback,"ax",%progbits + 191 .align 1 + 192 .p2align 2,,3 + 193 .weak HAL_PCDEx_BCD_Callback + 194 .syntax unified + 195 .thumb + 196 .thumb_func + 197 .fpu fpv4-sp-d16 + 199 HAL_PCDEx_BCD_Callback: + 200 @ args = 0, pretend = 0, frame = 0 + 201 @ frame_needed = 0, uses_anonymous_args = 0 + 202 @ link register save eliminated. + 203 0000 7047 bx lr + 205 0002 00BF .section .text.HAL_PCDEx_BCD_VBUSDetect,"ax",%progbits + 206 .align 1 + 207 .p2align 2,,3 + 208 .global HAL_PCDEx_BCD_VBUSDetect + 209 .syntax unified + 210 .thumb + 211 .thumb_func + 212 .fpu fpv4-sp-d16 + 214 HAL_PCDEx_BCD_VBUSDetect: + 215 @ args = 0, pretend = 0, frame = 0 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 0000 70B5 push {r4, r5, r6, lr} + 218 0002 0468 ldr r4, [r0] + 219 0004 0646 mov r6, r0 + 220 0006 FFF7FEFF bl HAL_GetTick + 221 000a 0546 mov r5, r0 + 222 000c 05E0 b .L16 + 223 .L18: + 224 000e FFF7FEFF bl HAL_GetTick + 225 0012 431B subs r3, r0, r5 + 226 0014 B3F57A7F cmp r3, #1000 + 227 0018 56D8 bhi .L28 + 228 .L16: + 229 001a B4F85830 ldrh r3, [r4, #88] + 230 001e D806 lsls r0, r3, #27 + 231 0020 F5D5 bpl .L18 + 232 0022 C820 movs r0, #200 + 233 0024 FFF7FEFF bl HAL_Delay + 234 0028 B4F85830 ldrh r3, [r4, #88] + 235 002c D906 lsls r1, r3, #27 + 236 002e 50D4 bmi .L29 + 237 .L19: + 238 0030 B4F85830 ldrh r3, [r4, #88] + 239 0034 23F00203 bic r3, r3, #2 + 240 0038 1B04 lsls r3, r3, #16 + 241 003a 1B0C lsrs r3, r3, #16 + 242 003c 3220 movs r0, #50 + 243 003e A4F85830 strh r3, [r4, #88] @ movhi + ARM GAS /tmp/ccwIICsF.s page 5 + + + 244 0042 FFF7FEFF bl HAL_Delay + 245 0046 B4F85830 ldrh r3, [r4, #88] + 246 004a 9BB2 uxth r3, r3 + 247 004c 43F00403 orr r3, r3, #4 + 248 0050 A4F85830 strh r3, [r4, #88] @ movhi + 249 0054 3220 movs r0, #50 + 250 0056 FFF7FEFF bl HAL_Delay + 251 005a B4F85830 ldrh r3, [r4, #88] + 252 005e 9A06 lsls r2, r3, #26 + 253 0060 13D4 bmi .L30 + 254 0062 FD21 movs r1, #253 + 255 0064 3046 mov r0, r6 + 256 0066 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 257 .L22: + 258 006a 3268 ldr r2, [r6] + 259 006c B2F85830 ldrh r3, [r2, #88] + 260 0070 23F00103 bic r3, r3, #1 + 261 0074 1B04 lsls r3, r3, #16 + 262 0076 0021 movs r1, #0 + 263 0078 1B0C lsrs r3, r3, #16 + 264 007a C6F8EC12 str r1, [r6, #748] + 265 007e 3046 mov r0, r6 + 266 0080 A2F85830 strh r3, [r2, #88] @ movhi + 267 0084 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 268 0088 70BD pop {r4, r5, r6, pc} + 269 .L30: + 270 008a B4F85830 ldrh r3, [r4, #88] + 271 008e 23F00403 bic r3, r3, #4 + 272 0092 1B04 lsls r3, r3, #16 + 273 0094 1B0C lsrs r3, r3, #16 + 274 0096 A4F85830 strh r3, [r4, #88] @ movhi + 275 009a 3220 movs r0, #50 + 276 009c FFF7FEFF bl HAL_Delay + 277 00a0 B4F85830 ldrh r3, [r4, #88] + 278 00a4 9BB2 uxth r3, r3 + 279 00a6 43F00803 orr r3, r3, #8 + 280 00aa A4F85830 strh r3, [r4, #88] @ movhi + 281 00ae 3220 movs r0, #50 + 282 00b0 FFF7FEFF bl HAL_Delay + 283 00b4 B4F85830 ldrh r3, [r4, #88] + 284 00b8 5B06 lsls r3, r3, #25 + 285 00ba 4CBF ite mi + 286 00bc FB21 movmi r1, #251 + 287 00be FC21 movpl r1, #252 + 288 00c0 3046 mov r0, r6 + 289 00c2 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 290 00c6 D0E7 b .L22 + 291 .L28: + 292 00c8 FF21 movs r1, #255 + 293 00ca 3046 mov r0, r6 + 294 00cc FFF7FEFF bl HAL_PCDEx_BCD_Callback + 295 00d0 70BD pop {r4, r5, r6, pc} + 296 .L29: + 297 00d2 FE21 movs r1, #254 + 298 00d4 3046 mov r0, r6 + 299 00d6 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 300 00da A9E7 b .L19 + ARM GAS /tmp/ccwIICsF.s page 6 + + + 302 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccwIICsF.s page 7 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_pcd_ex.c + /tmp/ccwIICsF.s:16 .text.HAL_PCDEx_PMAConfig:0000000000000000 $t + /tmp/ccwIICsF.s:25 .text.HAL_PCDEx_PMAConfig:0000000000000000 HAL_PCDEx_PMAConfig + /tmp/ccwIICsF.s:55 .text.HAL_PCDEx_ActivateBCD:0000000000000000 $t + /tmp/ccwIICsF.s:63 .text.HAL_PCDEx_ActivateBCD:0000000000000000 HAL_PCDEx_ActivateBCD + /tmp/ccwIICsF.s:92 .text.HAL_PCDEx_DeActivateBCD:0000000000000000 $t + /tmp/ccwIICsF.s:100 .text.HAL_PCDEx_DeActivateBCD:0000000000000000 HAL_PCDEx_DeActivateBCD + /tmp/ccwIICsF.s:116 .text.HAL_PCDEx_ActivateLPM:0000000000000000 $t + /tmp/ccwIICsF.s:124 .text.HAL_PCDEx_ActivateLPM:0000000000000000 HAL_PCDEx_ActivateLPM + /tmp/ccwIICsF.s:147 .text.HAL_PCDEx_DeActivateLPM:0000000000000000 $t + /tmp/ccwIICsF.s:155 .text.HAL_PCDEx_DeActivateLPM:0000000000000000 HAL_PCDEx_DeActivateLPM + /tmp/ccwIICsF.s:176 .text.HAL_PCDEx_LPM_Callback:0000000000000000 $t + /tmp/ccwIICsF.s:184 .text.HAL_PCDEx_LPM_Callback:0000000000000000 HAL_PCDEx_LPM_Callback + /tmp/ccwIICsF.s:191 .text.HAL_PCDEx_BCD_Callback:0000000000000000 $t + /tmp/ccwIICsF.s:199 .text.HAL_PCDEx_BCD_Callback:0000000000000000 HAL_PCDEx_BCD_Callback + /tmp/ccwIICsF.s:206 .text.HAL_PCDEx_BCD_VBUSDetect:0000000000000000 $t + /tmp/ccwIICsF.s:214 .text.HAL_PCDEx_BCD_VBUSDetect:0000000000000000 HAL_PCDEx_BCD_VBUSDetect + +UNDEFINED SYMBOLS +HAL_GetTick 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Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_pwr_ex.lst b/codice/build/stm32g4xx_hal_pwr_ex.lst new file mode 100644 index 0000000..8a7ba03 --- /dev/null +++ b/codice/build/stm32g4xx_hal_pwr_ex.lst @@ -0,0 +1,1719 @@ +ARM GAS /tmp/ccDVoEp0.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_pwr_ex.c" + 14 .text + 15 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global HAL_PWREx_GetVoltageRange + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 HAL_PWREx_GetVoltageRange: + 26 @ args = 0, pretend = 0, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 074B ldr r3, .L8 + 30 0002 1868 ldr r0, [r3] + 31 0004 00F4C060 and r0, r0, #1536 + 32 0008 B0F5806F cmp r0, #1024 + 33 000c 06D0 beq .L1 + 34 000e D3F88000 ldr r0, [r3, #128] + 35 0012 10F48070 ands r0, r0, #256 + 36 0016 18BF it ne + 37 0018 4FF40070 movne r0, #512 + 38 .L1: + 39 001c 7047 bx lr + 40 .L9: + 41 001e 00BF .align 2 + 42 .L8: + 43 0020 00700040 .word 1073770496 + 45 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits + 46 .align 1 + 47 .p2align 2,,3 + 48 .global HAL_PWREx_ControlVoltageScaling + 49 .syntax unified + 50 .thumb + 51 .thumb_func + 52 .fpu fpv4-sp-d16 + 54 HAL_PWREx_ControlVoltageScaling: + 55 @ args = 0, pretend = 0, frame = 0 + 56 @ frame_needed = 0, uses_anonymous_args = 0 + 57 @ link register save eliminated. + 58 0000 10B4 push {r4} + 59 0002 3B4A ldr r2, .L42 + 60 0004 70B9 cbnz r0, .L11 + ARM GAS /tmp/ccDVoEp0.s page 2 + + + 61 0006 1368 ldr r3, [r2] + 62 0008 03F4C063 and r3, r3, #1536 + 63 000c B3F5806F cmp r3, #1024 + 64 0010 D2F88030 ldr r3, [r2, #128] + 65 0014 23D0 beq .L37 + 66 0016 23F48073 bic r3, r3, #256 + 67 001a 5DF8044B ldr r4, [sp], #4 + 68 001e C2F88030 str r3, [r2, #128] + 69 0022 7047 bx lr + 70 .L11: + 71 0024 B0F5007F cmp r0, #512 + 72 0028 09D0 beq .L38 + 73 002a 1368 ldr r3, [r2] + 74 002c 5DF8044B ldr r4, [sp], #4 + 75 0030 23F4C063 bic r3, r3, #1536 + 76 0034 43F48063 orr r3, r3, #1024 + 77 0038 0020 movs r0, #0 + 78 003a 1360 str r3, [r2] + 79 003c 7047 bx lr + 80 .L38: + 81 003e 1368 ldr r3, [r2] + 82 0040 03F4C063 and r3, r3, #1536 + 83 0044 B3F5806F cmp r3, #1024 + 84 0048 D2F88030 ldr r3, [r2, #128] + 85 004c 2FD0 beq .L39 + 86 004e 43F48073 orr r3, r3, #256 + 87 0052 0020 movs r0, #0 + 88 0054 5DF8044B ldr r4, [sp], #4 + 89 0058 C2F88030 str r3, [r2, #128] + 90 005c 7047 bx lr + 91 .L37: + 92 005e 23F48073 bic r3, r3, #256 + 93 0062 C2F88030 str r3, [r2, #128] + 94 0066 1168 ldr r1, [r2] + 95 0068 224C ldr r4, .L42+4 + 96 006a 2348 ldr r0, .L42+8 + 97 006c 21F4C061 bic r1, r1, #1536 + 98 0070 41F40071 orr r1, r1, #512 + 99 0074 1160 str r1, [r2] + 100 0076 2368 ldr r3, [r4] + 101 0078 3221 movs r1, #50 + 102 007a 01FB03F3 mul r3, r1, r3 + 103 007e 5169 ldr r1, [r2, #20] + 104 0080 A0FB0303 umull r0, r3, r0, r3 + 105 0084 9B0C lsrs r3, r3, #18 + 106 0086 4805 lsls r0, r1, #21 + 107 0088 03F10103 add r3, r3, #1 + 108 008c 06D5 bpl .L13 + 109 008e 00E0 b .L14 + 110 .L40: + 111 0090 23B1 cbz r3, .L13 + 112 .L14: + 113 0092 5169 ldr r1, [r2, #20] + 114 0094 4905 lsls r1, r1, #21 + 115 0096 03F1FF33 add r3, r3, #-1 + 116 009a F9D4 bmi .L40 + 117 .L13: + ARM GAS /tmp/ccDVoEp0.s page 3 + + + 118 009c 144B ldr r3, .L42 + 119 009e 5B69 ldr r3, [r3, #20] + 120 00a0 5C05 lsls r4, r3, #21 + 121 00a2 54BF ite pl + 122 00a4 0020 movpl r0, #0 + 123 00a6 0320 movmi r0, #3 + 124 00a8 5DF8044B ldr r4, [sp], #4 + 125 00ac 7047 bx lr + 126 .L39: + 127 00ae 43F48073 orr r3, r3, #256 + 128 00b2 C2F88030 str r3, [r2, #128] + 129 00b6 1168 ldr r1, [r2] + 130 00b8 0E4C ldr r4, .L42+4 + 131 00ba 0F48 ldr r0, .L42+8 + 132 00bc 21F4C061 bic r1, r1, #1536 + 133 00c0 41F40071 orr r1, r1, #512 + 134 00c4 1160 str r1, [r2] + 135 00c6 2368 ldr r3, [r4] + 136 00c8 3221 movs r1, #50 + 137 00ca 01FB03F3 mul r3, r1, r3 + 138 00ce 5169 ldr r1, [r2, #20] + 139 00d0 A0FB0303 umull r0, r3, r0, r3 + 140 00d4 9B0C lsrs r3, r3, #18 + 141 00d6 4805 lsls r0, r1, #21 + 142 00d8 03F10103 add r3, r3, #1 + 143 00dc DED5 bpl .L13 + 144 00de 01E0 b .L20 + 145 .L41: + 146 00e0 002B cmp r3, #0 + 147 00e2 DBD0 beq .L13 + 148 .L20: + 149 00e4 5169 ldr r1, [r2, #20] + 150 00e6 4905 lsls r1, r1, #21 + 151 00e8 03F1FF33 add r3, r3, #-1 + 152 00ec D6D5 bpl .L13 + 153 00ee F7E7 b .L41 + 154 .L43: + 155 .align 2 + 156 .L42: + 157 00f0 00700040 .word 1073770496 + 158 00f4 00000000 .word SystemCoreClock + 159 00f8 83DE1B43 .word 1125899907 + 161 .section .text.HAL_PWREx_EnableBatteryCharging,"ax",%progbits + 162 .align 1 + 163 .p2align 2,,3 + 164 .global HAL_PWREx_EnableBatteryCharging + 165 .syntax unified + 166 .thumb + 167 .thumb_func + 168 .fpu fpv4-sp-d16 + 170 HAL_PWREx_EnableBatteryCharging: + 171 @ args = 0, pretend = 0, frame = 0 + 172 @ frame_needed = 0, uses_anonymous_args = 0 + 173 @ link register save eliminated. + 174 0000 054A ldr r2, .L45 + 175 0002 D368 ldr r3, [r2, #12] + 176 0004 23F40073 bic r3, r3, #512 + ARM GAS /tmp/ccDVoEp0.s page 4 + + + 177 0008 1843 orrs r0, r0, r3 + 178 000a D060 str r0, [r2, #12] + 179 000c D368 ldr r3, [r2, #12] + 180 000e 43F48073 orr r3, r3, #256 + 181 0012 D360 str r3, [r2, #12] + 182 0014 7047 bx lr + 183 .L46: + 184 0016 00BF .align 2 + 185 .L45: + 186 0018 00700040 .word 1073770496 + 188 .section .text.HAL_PWREx_DisableBatteryCharging,"ax",%progbits + 189 .align 1 + 190 .p2align 2,,3 + 191 .global HAL_PWREx_DisableBatteryCharging + 192 .syntax unified + 193 .thumb + 194 .thumb_func + 195 .fpu fpv4-sp-d16 + 197 HAL_PWREx_DisableBatteryCharging: + 198 @ args = 0, pretend = 0, frame = 0 + 199 @ frame_needed = 0, uses_anonymous_args = 0 + 200 @ link register save eliminated. + 201 0000 024A ldr r2, .L48 + 202 0002 D368 ldr r3, [r2, #12] + 203 0004 23F48073 bic r3, r3, #256 + 204 0008 D360 str r3, [r2, #12] + 205 000a 7047 bx lr + 206 .L49: + 207 .align 2 + 208 .L48: + 209 000c 00700040 .word 1073770496 + 211 .section .text.HAL_PWREx_EnableInternalWakeUpLine,"ax",%progbits + 212 .align 1 + 213 .p2align 2,,3 + 214 .global HAL_PWREx_EnableInternalWakeUpLine + 215 .syntax unified + 216 .thumb + 217 .thumb_func + 218 .fpu fpv4-sp-d16 + 220 HAL_PWREx_EnableInternalWakeUpLine: + 221 @ args = 0, pretend = 0, frame = 0 + 222 @ frame_needed = 0, uses_anonymous_args = 0 + 223 @ link register save eliminated. + 224 0000 024A ldr r2, .L51 + 225 0002 9368 ldr r3, [r2, #8] + 226 0004 43F40043 orr r3, r3, #32768 + 227 0008 9360 str r3, [r2, #8] + 228 000a 7047 bx lr + 229 .L52: + 230 .align 2 + 231 .L51: + 232 000c 00700040 .word 1073770496 + 234 .section .text.HAL_PWREx_DisableInternalWakeUpLine,"ax",%progbits + 235 .align 1 + 236 .p2align 2,,3 + 237 .global HAL_PWREx_DisableInternalWakeUpLine + 238 .syntax unified + ARM GAS /tmp/ccDVoEp0.s page 5 + + + 239 .thumb + 240 .thumb_func + 241 .fpu fpv4-sp-d16 + 243 HAL_PWREx_DisableInternalWakeUpLine: + 244 @ args = 0, pretend = 0, frame = 0 + 245 @ frame_needed = 0, uses_anonymous_args = 0 + 246 @ link register save eliminated. + 247 0000 024A ldr r2, .L54 + 248 0002 9368 ldr r3, [r2, #8] + 249 0004 23F40043 bic r3, r3, #32768 + 250 0008 9360 str r3, [r2, #8] + 251 000a 7047 bx lr + 252 .L55: + 253 .align 2 + 254 .L54: + 255 000c 00700040 .word 1073770496 + 257 .section .text.HAL_PWREx_EnableGPIOPullUp,"ax",%progbits + 258 .align 1 + 259 .p2align 2,,3 + 260 .global HAL_PWREx_EnableGPIOPullUp + 261 .syntax unified + 262 .thumb + 263 .thumb_func + 264 .fpu fpv4-sp-d16 + 266 HAL_PWREx_EnableGPIOPullUp: + 267 @ args = 0, pretend = 0, frame = 0 + 268 @ frame_needed = 0, uses_anonymous_args = 0 + 269 @ link register save eliminated. + 270 0000 0628 cmp r0, #6 + 271 0002 54D8 bhi .L66 + 272 0004 DFE800F0 tbb [pc, r0] + 273 .L59: + 274 0008 0E .byte (.L65-.L59)/2 + 275 0009 1C .byte (.L64-.L59)/2 + 276 000a 28 .byte (.L63-.L59)/2 + 277 000b 32 .byte (.L62-.L59)/2 + 278 000c 3C .byte (.L61-.L59)/2 + 279 000d 46 .byte (.L60-.L59)/2 + 280 000e 04 .byte (.L58-.L59)/2 + 281 000f 00 .p2align 1 + 282 .L58: + 283 0010 284B ldr r3, .L67 + 284 0012 1A6D ldr r2, [r3, #80] + 285 0014 01F48061 and r1, r1, #1024 + 286 0018 1143 orrs r1, r1, r2 + 287 001a 1965 str r1, [r3, #80] + 288 001c 5A6D ldr r2, [r3, #84] + 289 001e 5A65 str r2, [r3, #84] + 290 0020 0020 movs r0, #0 + 291 0022 7047 bx lr + 292 .L65: + 293 0024 234B ldr r3, .L67 + 294 0026 186A ldr r0, [r3, #32] + 295 0028 21F48042 bic r2, r1, #16384 + 296 002c 0243 orrs r2, r2, r0 + 297 002e 1A62 str r2, [r3, #32] + 298 0030 5A6A ldr r2, [r3, #36] + ARM GAS /tmp/ccDVoEp0.s page 6 + + + 299 0032 21F42041 bic r1, r1, #40960 + 300 0036 22EA0101 bic r1, r2, r1 + 301 003a 0020 movs r0, #0 + 302 003c 5962 str r1, [r3, #36] + 303 003e 7047 bx lr + 304 .L64: + 305 0040 1C4B ldr r3, .L67 + 306 0042 9A6A ldr r2, [r3, #40] + 307 0044 21F0100C bic ip, r1, #16 + 308 0048 1143 orrs r1, r1, r2 + 309 004a 9962 str r1, [r3, #40] + 310 004c DA6A ldr r2, [r3, #44] + 311 004e 22EA0C02 bic r2, r2, ip + 312 0052 0020 movs r0, #0 + 313 0054 DA62 str r2, [r3, #44] + 314 0056 7047 bx lr + 315 .L63: + 316 0058 164B ldr r3, .L67 + 317 005a 1A6B ldr r2, [r3, #48] + 318 005c 0A43 orrs r2, r2, r1 + 319 005e 1A63 str r2, [r3, #48] + 320 0060 5A6B ldr r2, [r3, #52] + 321 0062 22EA0101 bic r1, r2, r1 + 322 0066 0020 movs r0, #0 + 323 0068 5963 str r1, [r3, #52] + 324 006a 7047 bx lr + 325 .L62: + 326 006c 114B ldr r3, .L67 + 327 006e 9A6B ldr r2, [r3, #56] + 328 0070 0A43 orrs r2, r2, r1 + 329 0072 9A63 str r2, [r3, #56] + 330 0074 DA6B ldr r2, [r3, #60] + 331 0076 22EA0101 bic r1, r2, r1 + 332 007a 0020 movs r0, #0 + 333 007c D963 str r1, [r3, #60] + 334 007e 7047 bx lr + 335 .L61: + 336 0080 0C4B ldr r3, .L67 + 337 0082 1A6C ldr r2, [r3, #64] + 338 0084 0A43 orrs r2, r2, r1 + 339 0086 1A64 str r2, [r3, #64] + 340 0088 5A6C ldr r2, [r3, #68] + 341 008a 22EA0101 bic r1, r2, r1 + 342 008e 0020 movs r0, #0 + 343 0090 5964 str r1, [r3, #68] + 344 0092 7047 bx lr + 345 .L60: + 346 0094 074B ldr r3, .L67 + 347 0096 40F20762 movw r2, #1543 + 348 009a 986C ldr r0, [r3, #72] + 349 009c 1140 ands r1, r1, r2 + 350 009e 0843 orrs r0, r0, r1 + 351 00a0 9864 str r0, [r3, #72] + 352 00a2 DA6C ldr r2, [r3, #76] + 353 00a4 22EA0101 bic r1, r2, r1 + 354 00a8 0020 movs r0, #0 + 355 00aa D964 str r1, [r3, #76] + ARM GAS /tmp/ccDVoEp0.s page 7 + + + 356 00ac 7047 bx lr + 357 .L66: + 358 00ae 0120 movs r0, #1 + 359 00b0 7047 bx lr + 360 .L68: + 361 00b2 00BF .align 2 + 362 .L67: + 363 00b4 00700040 .word 1073770496 + 365 .section .text.HAL_PWREx_DisableGPIOPullUp,"ax",%progbits + 366 .align 1 + 367 .p2align 2,,3 + 368 .global HAL_PWREx_DisableGPIOPullUp + 369 .syntax unified + 370 .thumb + 371 .thumb_func + 372 .fpu fpv4-sp-d16 + 374 HAL_PWREx_DisableGPIOPullUp: + 375 @ args = 0, pretend = 0, frame = 0 + 376 @ frame_needed = 0, uses_anonymous_args = 0 + 377 @ link register save eliminated. + 378 0000 0628 cmp r0, #6 + 379 0002 3DD8 bhi .L79 + 380 0004 DFE800F0 tbb [pc, r0] + 381 .L72: + 382 0008 0D .byte (.L78-.L72)/2 + 383 0009 16 .byte (.L77-.L72)/2 + 384 000a 1D .byte (.L76-.L72)/2 + 385 000b 24 .byte (.L75-.L72)/2 + 386 000c 2B .byte (.L74-.L72)/2 + 387 000d 32 .byte (.L73-.L72)/2 + 388 000e 04 .byte (.L71-.L72)/2 + 389 000f 00 .p2align 1 + 390 .L71: + 391 0010 1C4A ldr r2, .L80 + 392 0012 136D ldr r3, [r2, #80] + 393 0014 01F48061 and r1, r1, #1024 + 394 0018 23EA0101 bic r1, r3, r1 + 395 001c 0020 movs r0, #0 + 396 001e 1165 str r1, [r2, #80] + 397 0020 7047 bx lr + 398 .L78: + 399 0022 184A ldr r2, .L80 + 400 0024 136A ldr r3, [r2, #32] + 401 0026 21F48041 bic r1, r1, #16384 + 402 002a 23EA0101 bic r1, r3, r1 + 403 002e 0020 movs r0, #0 + 404 0030 1162 str r1, [r2, #32] + 405 0032 7047 bx lr + 406 .L77: + 407 0034 134A ldr r2, .L80 + 408 0036 936A ldr r3, [r2, #40] + 409 0038 23EA0101 bic r1, r3, r1 + 410 003c 0020 movs r0, #0 + 411 003e 9162 str r1, [r2, #40] + 412 0040 7047 bx lr + 413 .L76: + 414 0042 104A ldr r2, .L80 + ARM GAS /tmp/ccDVoEp0.s page 8 + + + 415 0044 136B ldr r3, [r2, #48] + 416 0046 23EA0101 bic r1, r3, r1 + 417 004a 0020 movs r0, #0 + 418 004c 1163 str r1, [r2, #48] + 419 004e 7047 bx lr + 420 .L75: + 421 0050 0C4A ldr r2, .L80 + 422 0052 936B ldr r3, [r2, #56] + 423 0054 23EA0101 bic r1, r3, r1 + 424 0058 0020 movs r0, #0 + 425 005a 9163 str r1, [r2, #56] + 426 005c 7047 bx lr + 427 .L74: + 428 005e 094A ldr r2, .L80 + 429 0060 136C ldr r3, [r2, #64] + 430 0062 23EA0101 bic r1, r3, r1 + 431 0066 0020 movs r0, #0 + 432 0068 1164 str r1, [r2, #64] + 433 006a 7047 bx lr + 434 .L73: + 435 006c 0548 ldr r0, .L80 + 436 006e 40F20762 movw r2, #1543 + 437 0072 836C ldr r3, [r0, #72] + 438 0074 1140 ands r1, r1, r2 + 439 0076 23EA0101 bic r1, r3, r1 + 440 007a 8164 str r1, [r0, #72] + 441 007c 0020 movs r0, #0 + 442 007e 7047 bx lr + 443 .L79: + 444 0080 0120 movs r0, #1 + 445 0082 7047 bx lr + 446 .L81: + 447 .align 2 + 448 .L80: + 449 0084 00700040 .word 1073770496 + 451 .section .text.HAL_PWREx_EnableGPIOPullDown,"ax",%progbits + 452 .align 1 + 453 .p2align 2,,3 + 454 .global HAL_PWREx_EnableGPIOPullDown + 455 .syntax unified + 456 .thumb + 457 .thumb_func + 458 .fpu fpv4-sp-d16 + 460 HAL_PWREx_EnableGPIOPullDown: + 461 @ args = 0, pretend = 0, frame = 0 + 462 @ frame_needed = 0, uses_anonymous_args = 0 + 463 @ link register save eliminated. + 464 0000 0628 cmp r0, #6 + 465 0002 58D8 bhi .L92 + 466 0004 DFE800F0 tbb [pc, r0] + 467 .L85: + 468 0008 0F .byte (.L91-.L85)/2 + 469 0009 1D .byte (.L90-.L85)/2 + 470 000a 2C .byte (.L89-.L85)/2 + 471 000b 36 .byte (.L88-.L85)/2 + 472 000c 40 .byte (.L87-.L85)/2 + 473 000d 4A .byte (.L86-.L85)/2 + ARM GAS /tmp/ccDVoEp0.s page 9 + + + 474 000e 04 .byte (.L84-.L85)/2 + 475 000f 00 .p2align 1 + 476 .L84: + 477 0010 2A4B ldr r3, .L96 + 478 0012 5A6D ldr r2, [r3, #84] + 479 0014 5A65 str r2, [r3, #84] + 480 0016 1A6D ldr r2, [r3, #80] + 481 0018 01F48061 and r1, r1, #1024 + 482 001c 22EA0101 bic r1, r2, r1 + 483 0020 0020 movs r0, #0 + 484 0022 1965 str r1, [r3, #80] + 485 0024 7047 bx lr + 486 .L91: + 487 0026 254B ldr r3, .L96 + 488 0028 586A ldr r0, [r3, #36] + 489 002a 21F42042 bic r2, r1, #40960 + 490 002e 0243 orrs r2, r2, r0 + 491 0030 5A62 str r2, [r3, #36] + 492 0032 1A6A ldr r2, [r3, #32] + 493 0034 21F48041 bic r1, r1, #16384 + 494 0038 22EA0101 bic r1, r2, r1 + 495 003c 0020 movs r0, #0 + 496 003e 1962 str r1, [r3, #32] + 497 0040 7047 bx lr + 498 .L90: + 499 0042 1E4B ldr r3, .L96 + 500 0044 10B4 push {r4} + 501 0046 DC6A ldr r4, [r3, #44] + 502 0048 21F01002 bic r2, r1, #16 + 503 004c 2243 orrs r2, r2, r4 + 504 004e DA62 str r2, [r3, #44] + 505 0050 9A6A ldr r2, [r3, #40] + 506 0052 5DF8044B ldr r4, [sp], #4 + 507 0056 22EA0101 bic r1, r2, r1 + 508 005a 0020 movs r0, #0 + 509 005c 9962 str r1, [r3, #40] + 510 005e 7047 bx lr + 511 .L89: + 512 0060 164B ldr r3, .L96 + 513 0062 5A6B ldr r2, [r3, #52] + 514 0064 0A43 orrs r2, r2, r1 + 515 0066 5A63 str r2, [r3, #52] + 516 0068 1A6B ldr r2, [r3, #48] + 517 006a 22EA0101 bic r1, r2, r1 + 518 006e 0020 movs r0, #0 + 519 0070 1963 str r1, [r3, #48] + 520 0072 7047 bx lr + 521 .L88: + 522 0074 114B ldr r3, .L96 + 523 0076 DA6B ldr r2, [r3, #60] + 524 0078 0A43 orrs r2, r2, r1 + 525 007a DA63 str r2, [r3, #60] + 526 007c 9A6B ldr r2, [r3, #56] + 527 007e 22EA0101 bic r1, r2, r1 + 528 0082 0020 movs r0, #0 + 529 0084 9963 str r1, [r3, #56] + 530 0086 7047 bx lr + ARM GAS /tmp/ccDVoEp0.s page 10 + + + 531 .L87: + 532 0088 0C4B ldr r3, .L96 + 533 008a 5A6C ldr r2, [r3, #68] + 534 008c 0A43 orrs r2, r2, r1 + 535 008e 5A64 str r2, [r3, #68] + 536 0090 1A6C ldr r2, [r3, #64] + 537 0092 22EA0101 bic r1, r2, r1 + 538 0096 0020 movs r0, #0 + 539 0098 1964 str r1, [r3, #64] + 540 009a 7047 bx lr + 541 .L86: + 542 009c 074B ldr r3, .L96 + 543 009e 40F20762 movw r2, #1543 + 544 00a2 D86C ldr r0, [r3, #76] + 545 00a4 1140 ands r1, r1, r2 + 546 00a6 0843 orrs r0, r0, r1 + 547 00a8 D864 str r0, [r3, #76] + 548 00aa 9A6C ldr r2, [r3, #72] + 549 00ac 22EA0101 bic r1, r2, r1 + 550 00b0 0020 movs r0, #0 + 551 00b2 9964 str r1, [r3, #72] + 552 00b4 7047 bx lr + 553 .L92: + 554 00b6 0120 movs r0, #1 + 555 00b8 7047 bx lr + 556 .L97: + 557 00ba 00BF .align 2 + 558 .L96: + 559 00bc 00700040 .word 1073770496 + 561 .section .text.HAL_PWREx_DisableGPIOPullDown,"ax",%progbits + 562 .align 1 + 563 .p2align 2,,3 + 564 .global HAL_PWREx_DisableGPIOPullDown + 565 .syntax unified + 566 .thumb + 567 .thumb_func + 568 .fpu fpv4-sp-d16 + 570 HAL_PWREx_DisableGPIOPullDown: + 571 @ args = 0, pretend = 0, frame = 0 + 572 @ frame_needed = 0, uses_anonymous_args = 0 + 573 @ link register save eliminated. + 574 0000 0628 cmp r0, #6 + 575 0002 3BD8 bhi .L108 + 576 0004 DFE800F0 tbb [pc, r0] + 577 .L101: + 578 0008 09 .byte (.L107-.L101)/2 + 579 0009 12 .byte (.L106-.L101)/2 + 580 000a 1B .byte (.L105-.L101)/2 + 581 000b 22 .byte (.L104-.L101)/2 + 582 000c 29 .byte (.L103-.L101)/2 + 583 000d 30 .byte (.L102-.L101)/2 + 584 000e 04 .byte (.L100-.L101)/2 + 585 000f 00 .p2align 1 + 586 .L100: + 587 0010 1B4B ldr r3, .L109 + 588 0012 5A6D ldr r2, [r3, #84] + 589 0014 5A65 str r2, [r3, #84] + ARM GAS /tmp/ccDVoEp0.s page 11 + + + 590 0016 0020 movs r0, #0 + 591 0018 7047 bx lr + 592 .L107: + 593 001a 194A ldr r2, .L109 + 594 001c 536A ldr r3, [r2, #36] + 595 001e 21F42041 bic r1, r1, #40960 + 596 0022 23EA0101 bic r1, r3, r1 + 597 0026 0020 movs r0, #0 + 598 0028 5162 str r1, [r2, #36] + 599 002a 7047 bx lr + 600 .L106: + 601 002c 144A ldr r2, .L109 + 602 002e D36A ldr r3, [r2, #44] + 603 0030 21F01001 bic r1, r1, #16 + 604 0034 23EA0101 bic r1, r3, r1 + 605 0038 0020 movs r0, #0 + 606 003a D162 str r1, [r2, #44] + 607 003c 7047 bx lr + 608 .L105: + 609 003e 104A ldr r2, .L109 + 610 0040 536B ldr r3, [r2, #52] + 611 0042 23EA0101 bic r1, r3, r1 + 612 0046 0020 movs r0, #0 + 613 0048 5163 str r1, [r2, #52] + 614 004a 7047 bx lr + 615 .L104: + 616 004c 0C4A ldr r2, .L109 + 617 004e D36B ldr r3, [r2, #60] + 618 0050 23EA0101 bic r1, r3, r1 + 619 0054 0020 movs r0, #0 + 620 0056 D163 str r1, [r2, #60] + 621 0058 7047 bx lr + 622 .L103: + 623 005a 094A ldr r2, .L109 + 624 005c 536C ldr r3, [r2, #68] + 625 005e 23EA0101 bic r1, r3, r1 + 626 0062 0020 movs r0, #0 + 627 0064 5164 str r1, [r2, #68] + 628 0066 7047 bx lr + 629 .L102: + 630 0068 054A ldr r2, .L109 + 631 006a 40F20760 movw r0, #1543 + 632 006e D36C ldr r3, [r2, #76] + 633 0070 0140 ands r1, r1, r0 + 634 0072 23EA0101 bic r1, r3, r1 + 635 0076 D164 str r1, [r2, #76] + 636 0078 0020 movs r0, #0 + 637 007a 7047 bx lr + 638 .L108: + 639 007c 0120 movs r0, #1 + 640 007e 7047 bx lr + 641 .L110: + 642 .align 2 + 643 .L109: + 644 0080 00700040 .word 1073770496 + 646 .section .text.HAL_PWREx_EnablePullUpPullDownConfig,"ax",%progbits + 647 .align 1 + ARM GAS /tmp/ccDVoEp0.s page 12 + + + 648 .p2align 2,,3 + 649 .global HAL_PWREx_EnablePullUpPullDownConfig + 650 .syntax unified + 651 .thumb + 652 .thumb_func + 653 .fpu fpv4-sp-d16 + 655 HAL_PWREx_EnablePullUpPullDownConfig: + 656 @ args = 0, pretend = 0, frame = 0 + 657 @ frame_needed = 0, uses_anonymous_args = 0 + 658 @ link register save eliminated. + 659 0000 024A ldr r2, .L112 + 660 0002 9368 ldr r3, [r2, #8] + 661 0004 43F48063 orr r3, r3, #1024 + 662 0008 9360 str r3, [r2, #8] + 663 000a 7047 bx lr + 664 .L113: + 665 .align 2 + 666 .L112: + 667 000c 00700040 .word 1073770496 + 669 .section .text.HAL_PWREx_DisablePullUpPullDownConfig,"ax",%progbits + 670 .align 1 + 671 .p2align 2,,3 + 672 .global HAL_PWREx_DisablePullUpPullDownConfig + 673 .syntax unified + 674 .thumb + 675 .thumb_func + 676 .fpu fpv4-sp-d16 + 678 HAL_PWREx_DisablePullUpPullDownConfig: + 679 @ args = 0, pretend = 0, frame = 0 + 680 @ frame_needed = 0, uses_anonymous_args = 0 + 681 @ link register save eliminated. + 682 0000 024A ldr r2, .L115 + 683 0002 9368 ldr r3, [r2, #8] + 684 0004 23F48063 bic r3, r3, #1024 + 685 0008 9360 str r3, [r2, #8] + 686 000a 7047 bx lr + 687 .L116: + 688 .align 2 + 689 .L115: + 690 000c 00700040 .word 1073770496 + 692 .section .text.HAL_PWREx_EnableSRAM2ContentRetention,"ax",%progbits + 693 .align 1 + 694 .p2align 2,,3 + 695 .global HAL_PWREx_EnableSRAM2ContentRetention + 696 .syntax unified + 697 .thumb + 698 .thumb_func + 699 .fpu fpv4-sp-d16 + 701 HAL_PWREx_EnableSRAM2ContentRetention: + 702 @ args = 0, pretend = 0, frame = 0 + 703 @ frame_needed = 0, uses_anonymous_args = 0 + 704 @ link register save eliminated. + 705 0000 024A ldr r2, .L118 + 706 0002 9368 ldr r3, [r2, #8] + 707 0004 43F48073 orr r3, r3, #256 + 708 0008 9360 str r3, [r2, #8] + 709 000a 7047 bx lr + ARM GAS /tmp/ccDVoEp0.s page 13 + + + 710 .L119: + 711 .align 2 + 712 .L118: + 713 000c 00700040 .word 1073770496 + 715 .section .text.HAL_PWREx_DisableSRAM2ContentRetention,"ax",%progbits + 716 .align 1 + 717 .p2align 2,,3 + 718 .global HAL_PWREx_DisableSRAM2ContentRetention + 719 .syntax unified + 720 .thumb + 721 .thumb_func + 722 .fpu fpv4-sp-d16 + 724 HAL_PWREx_DisableSRAM2ContentRetention: + 725 @ args = 0, pretend = 0, frame = 0 + 726 @ frame_needed = 0, uses_anonymous_args = 0 + 727 @ link register save eliminated. + 728 0000 024A ldr r2, .L121 + 729 0002 9368 ldr r3, [r2, #8] + 730 0004 23F48073 bic r3, r3, #256 + 731 0008 9360 str r3, [r2, #8] + 732 000a 7047 bx lr + 733 .L122: + 734 .align 2 + 735 .L121: + 736 000c 00700040 .word 1073770496 + 738 .section .text.HAL_PWREx_EnablePVM1,"ax",%progbits + 739 .align 1 + 740 .p2align 2,,3 + 741 .global HAL_PWREx_EnablePVM1 + 742 .syntax unified + 743 .thumb + 744 .thumb_func + 745 .fpu fpv4-sp-d16 + 747 HAL_PWREx_EnablePVM1: + 748 @ args = 0, pretend = 0, frame = 0 + 749 @ frame_needed = 0, uses_anonymous_args = 0 + 750 @ link register save eliminated. + 751 0000 024A ldr r2, .L124 + 752 0002 5368 ldr r3, [r2, #4] + 753 0004 43F01003 orr r3, r3, #16 + 754 0008 5360 str r3, [r2, #4] + 755 000a 7047 bx lr + 756 .L125: + 757 .align 2 + 758 .L124: + 759 000c 00700040 .word 1073770496 + 761 .section .text.HAL_PWREx_DisablePVM1,"ax",%progbits + 762 .align 1 + 763 .p2align 2,,3 + 764 .global HAL_PWREx_DisablePVM1 + 765 .syntax unified + 766 .thumb + 767 .thumb_func + 768 .fpu fpv4-sp-d16 + 770 HAL_PWREx_DisablePVM1: + 771 @ args = 0, pretend = 0, frame = 0 + 772 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccDVoEp0.s page 14 + + + 773 @ link register save eliminated. + 774 0000 024A ldr r2, .L127 + 775 0002 5368 ldr r3, [r2, #4] + 776 0004 23F01003 bic r3, r3, #16 + 777 0008 5360 str r3, [r2, #4] + 778 000a 7047 bx lr + 779 .L128: + 780 .align 2 + 781 .L127: + 782 000c 00700040 .word 1073770496 + 784 .section .text.HAL_PWREx_EnablePVM2,"ax",%progbits + 785 .align 1 + 786 .p2align 2,,3 + 787 .global HAL_PWREx_EnablePVM2 + 788 .syntax unified + 789 .thumb + 790 .thumb_func + 791 .fpu fpv4-sp-d16 + 793 HAL_PWREx_EnablePVM2: + 794 @ args = 0, pretend = 0, frame = 0 + 795 @ frame_needed = 0, uses_anonymous_args = 0 + 796 @ link register save eliminated. + 797 0000 024A ldr r2, .L130 + 798 0002 5368 ldr r3, [r2, #4] + 799 0004 43F02003 orr r3, r3, #32 + 800 0008 5360 str r3, [r2, #4] + 801 000a 7047 bx lr + 802 .L131: + 803 .align 2 + 804 .L130: + 805 000c 00700040 .word 1073770496 + 807 .section .text.HAL_PWREx_DisablePVM2,"ax",%progbits + 808 .align 1 + 809 .p2align 2,,3 + 810 .global HAL_PWREx_DisablePVM2 + 811 .syntax unified + 812 .thumb + 813 .thumb_func + 814 .fpu fpv4-sp-d16 + 816 HAL_PWREx_DisablePVM2: + 817 @ args = 0, pretend = 0, frame = 0 + 818 @ frame_needed = 0, uses_anonymous_args = 0 + 819 @ link register save eliminated. + 820 0000 024A ldr r2, .L133 + 821 0002 5368 ldr r3, [r2, #4] + 822 0004 23F02003 bic r3, r3, #32 + 823 0008 5360 str r3, [r2, #4] + 824 000a 7047 bx lr + 825 .L134: + 826 .align 2 + 827 .L133: + 828 000c 00700040 .word 1073770496 + 830 .section .text.HAL_PWREx_EnablePVM3,"ax",%progbits + 831 .align 1 + 832 .p2align 2,,3 + 833 .global HAL_PWREx_EnablePVM3 + 834 .syntax unified + ARM GAS /tmp/ccDVoEp0.s page 15 + + + 835 .thumb + 836 .thumb_func + 837 .fpu fpv4-sp-d16 + 839 HAL_PWREx_EnablePVM3: + 840 @ args = 0, pretend = 0, frame = 0 + 841 @ frame_needed = 0, uses_anonymous_args = 0 + 842 @ link register save eliminated. + 843 0000 024A ldr r2, .L136 + 844 0002 5368 ldr r3, [r2, #4] + 845 0004 43F04003 orr r3, r3, #64 + 846 0008 5360 str r3, [r2, #4] + 847 000a 7047 bx lr + 848 .L137: + 849 .align 2 + 850 .L136: + 851 000c 00700040 .word 1073770496 + 853 .section .text.HAL_PWREx_DisablePVM3,"ax",%progbits + 854 .align 1 + 855 .p2align 2,,3 + 856 .global HAL_PWREx_DisablePVM3 + 857 .syntax unified + 858 .thumb + 859 .thumb_func + 860 .fpu fpv4-sp-d16 + 862 HAL_PWREx_DisablePVM3: + 863 @ args = 0, pretend = 0, frame = 0 + 864 @ frame_needed = 0, uses_anonymous_args = 0 + 865 @ link register save eliminated. + 866 0000 024A ldr r2, .L139 + 867 0002 5368 ldr r3, [r2, #4] + 868 0004 23F04003 bic r3, r3, #64 + 869 0008 5360 str r3, [r2, #4] + 870 000a 7047 bx lr + 871 .L140: + 872 .align 2 + 873 .L139: + 874 000c 00700040 .word 1073770496 + 876 .section .text.HAL_PWREx_EnablePVM4,"ax",%progbits + 877 .align 1 + 878 .p2align 2,,3 + 879 .global HAL_PWREx_EnablePVM4 + 880 .syntax unified + 881 .thumb + 882 .thumb_func + 883 .fpu fpv4-sp-d16 + 885 HAL_PWREx_EnablePVM4: + 886 @ args = 0, pretend = 0, frame = 0 + 887 @ frame_needed = 0, uses_anonymous_args = 0 + 888 @ link register save eliminated. + 889 0000 024A ldr r2, .L142 + 890 0002 5368 ldr r3, [r2, #4] + 891 0004 43F08003 orr r3, r3, #128 + 892 0008 5360 str r3, [r2, #4] + 893 000a 7047 bx lr + 894 .L143: + 895 .align 2 + 896 .L142: + ARM GAS /tmp/ccDVoEp0.s page 16 + + + 897 000c 00700040 .word 1073770496 + 899 .section .text.HAL_PWREx_DisablePVM4,"ax",%progbits + 900 .align 1 + 901 .p2align 2,,3 + 902 .global HAL_PWREx_DisablePVM4 + 903 .syntax unified + 904 .thumb + 905 .thumb_func + 906 .fpu fpv4-sp-d16 + 908 HAL_PWREx_DisablePVM4: + 909 @ args = 0, pretend = 0, frame = 0 + 910 @ frame_needed = 0, uses_anonymous_args = 0 + 911 @ link register save eliminated. + 912 0000 024A ldr r2, .L145 + 913 0002 5368 ldr r3, [r2, #4] + 914 0004 23F08003 bic r3, r3, #128 + 915 0008 5360 str r3, [r2, #4] + 916 000a 7047 bx lr + 917 .L146: + 918 .align 2 + 919 .L145: + 920 000c 00700040 .word 1073770496 + 922 .section .text.HAL_PWREx_ConfigPVM,"ax",%progbits + 923 .align 1 + 924 .p2align 2,,3 + 925 .global HAL_PWREx_ConfigPVM + 926 .syntax unified + 927 .thumb + 928 .thumb_func + 929 .fpu fpv4-sp-d16 + 931 HAL_PWREx_ConfigPVM: + 932 @ args = 0, pretend = 0, frame = 0 + 933 @ frame_needed = 0, uses_anonymous_args = 0 + 934 @ link register save eliminated. + 935 0000 0368 ldr r3, [r0] + 936 0002 402B cmp r3, #64 + 937 0004 64D0 beq .L148 + 938 0006 32D8 bhi .L149 + 939 0008 102B cmp r3, #16 + 940 000a 7FD0 beq .L150 + 941 000c 202B cmp r3, #32 + 942 000e 7BD1 bne .L213 + 943 0010 654B ldr r3, .L218 + 944 0012 5A6A ldr r2, [r3, #36] + 945 0014 22F01002 bic r2, r2, #16 + 946 0018 5A62 str r2, [r3, #36] + 947 001a 1A6A ldr r2, [r3, #32] + 948 001c 22F01002 bic r2, r2, #16 + 949 0020 1A62 str r2, [r3, #32] + 950 0022 DA6A ldr r2, [r3, #44] + 951 0024 22F01002 bic r2, r2, #16 + 952 0028 DA62 str r2, [r3, #44] + 953 002a 9A6A ldr r2, [r3, #40] + 954 002c 22F01002 bic r2, r2, #16 + 955 0030 9A62 str r2, [r3, #40] + 956 0032 4268 ldr r2, [r0, #4] + 957 0034 D103 lsls r1, r2, #15 + ARM GAS /tmp/ccDVoEp0.s page 17 + + + 958 0036 03D5 bpl .L158 + 959 0038 196A ldr r1, [r3, #32] + 960 003a 41F01001 orr r1, r1, #16 + 961 003e 1962 str r1, [r3, #32] + 962 .L158: + 963 0040 9003 lsls r0, r2, #14 + 964 0042 04D5 bpl .L159 + 965 0044 5849 ldr r1, .L218 + 966 0046 4B6A ldr r3, [r1, #36] + 967 0048 43F01003 orr r3, r3, #16 + 968 004c 4B62 str r3, [r1, #36] + 969 .L159: + 970 004e D107 lsls r1, r2, #31 + 971 0050 04D5 bpl .L160 + 972 0052 5549 ldr r1, .L218 + 973 0054 8B6A ldr r3, [r1, #40] + 974 0056 43F01003 orr r3, r3, #16 + 975 005a 8B62 str r3, [r1, #40] + 976 .L160: + 977 005c 9307 lsls r3, r2, #30 + 978 005e 51D5 bpl .L161 + 979 0060 514A ldr r2, .L218 + 980 0062 D36A ldr r3, [r2, #44] + 981 0064 43F01003 orr r3, r3, #16 + 982 0068 0020 movs r0, #0 + 983 006a D362 str r3, [r2, #44] + 984 006c 7047 bx lr + 985 .L149: + 986 006e 802B cmp r3, #128 + 987 0070 4AD1 bne .L213 + 988 0072 4D4B ldr r3, .L218 + 989 0074 5A6A ldr r2, [r3, #36] + 990 0076 22F04002 bic r2, r2, #64 + 991 007a 5A62 str r2, [r3, #36] + 992 007c 1A6A ldr r2, [r3, #32] + 993 007e 22F04002 bic r2, r2, #64 + 994 0082 1A62 str r2, [r3, #32] + 995 0084 DA6A ldr r2, [r3, #44] + 996 0086 22F04002 bic r2, r2, #64 + 997 008a DA62 str r2, [r3, #44] + 998 008c 9A6A ldr r2, [r3, #40] + 999 008e 22F04002 bic r2, r2, #64 + 1000 0092 9A62 str r2, [r3, #40] + 1001 0094 4268 ldr r2, [r0, #4] + 1002 0096 D103 lsls r1, r2, #15 + 1003 0098 03D5 bpl .L165 + 1004 009a 196A ldr r1, [r3, #32] + 1005 009c 41F04001 orr r1, r1, #64 + 1006 00a0 1962 str r1, [r3, #32] + 1007 .L165: + 1008 00a2 9003 lsls r0, r2, #14 + 1009 00a4 04D5 bpl .L166 + 1010 00a6 4049 ldr r1, .L218 + 1011 00a8 4B6A ldr r3, [r1, #36] + 1012 00aa 43F04003 orr r3, r3, #64 + 1013 00ae 4B62 str r3, [r1, #36] + 1014 .L166: + ARM GAS /tmp/ccDVoEp0.s page 18 + + + 1015 00b0 D107 lsls r1, r2, #31 + 1016 00b2 04D5 bpl .L167 + 1017 00b4 3C49 ldr r1, .L218 + 1018 00b6 8B6A ldr r3, [r1, #40] + 1019 00b8 43F04003 orr r3, r3, #64 + 1020 00bc 8B62 str r3, [r1, #40] + 1021 .L167: + 1022 00be 9307 lsls r3, r2, #30 + 1023 00c0 20D5 bpl .L161 + 1024 00c2 394A ldr r2, .L218 + 1025 00c4 D36A ldr r3, [r2, #44] + 1026 00c6 43F04003 orr r3, r3, #64 + 1027 00ca 0020 movs r0, #0 + 1028 00cc D362 str r3, [r2, #44] + 1029 00ce 7047 bx lr + 1030 .L148: + 1031 00d0 354B ldr r3, .L218 + 1032 00d2 5A6A ldr r2, [r3, #36] + 1033 00d4 22F02002 bic r2, r2, #32 + 1034 00d8 5A62 str r2, [r3, #36] + 1035 00da 1A6A ldr r2, [r3, #32] + 1036 00dc 22F02002 bic r2, r2, #32 + 1037 00e0 1A62 str r2, [r3, #32] + 1038 00e2 DA6A ldr r2, [r3, #44] + 1039 00e4 22F02002 bic r2, r2, #32 + 1040 00e8 DA62 str r2, [r3, #44] + 1041 00ea 9A6A ldr r2, [r3, #40] + 1042 00ec 22F02002 bic r2, r2, #32 + 1043 00f0 9A62 str r2, [r3, #40] + 1044 00f2 4268 ldr r2, [r0, #4] + 1045 00f4 D003 lsls r0, r2, #15 + 1046 00f6 4FD4 bmi .L214 + 1047 00f8 9103 lsls r1, r2, #14 + 1048 00fa 45D4 bmi .L215 + 1049 .L163: + 1050 00fc D307 lsls r3, r2, #31 + 1051 00fe 3BD4 bmi .L216 + 1052 .L164: + 1053 0100 9007 lsls r0, r2, #30 + 1054 0102 32D4 bmi .L217 + 1055 .L161: + 1056 0104 0020 movs r0, #0 + 1057 0106 7047 bx lr + 1058 .L213: + 1059 0108 0120 movs r0, #1 + 1060 010a 7047 bx lr + 1061 .L150: + 1062 010c 264B ldr r3, .L218 + 1063 010e 5A6A ldr r2, [r3, #36] + 1064 0110 22F00802 bic r2, r2, #8 + 1065 0114 5A62 str r2, [r3, #36] + 1066 0116 1A6A ldr r2, [r3, #32] + 1067 0118 22F00802 bic r2, r2, #8 + 1068 011c 1A62 str r2, [r3, #32] + 1069 011e DA6A ldr r2, [r3, #44] + 1070 0120 22F00802 bic r2, r2, #8 + 1071 0124 DA62 str r2, [r3, #44] + ARM GAS /tmp/ccDVoEp0.s page 19 + + + 1072 0126 9A6A ldr r2, [r3, #40] + 1073 0128 22F00802 bic r2, r2, #8 + 1074 012c 9A62 str r2, [r3, #40] + 1075 012e 4268 ldr r2, [r0, #4] + 1076 0130 D003 lsls r0, r2, #15 + 1077 0132 03D5 bpl .L154 + 1078 0134 196A ldr r1, [r3, #32] + 1079 0136 41F00801 orr r1, r1, #8 + 1080 013a 1962 str r1, [r3, #32] + 1081 .L154: + 1082 013c 9103 lsls r1, r2, #14 + 1083 013e 04D5 bpl .L155 + 1084 0140 1949 ldr r1, .L218 + 1085 0142 4B6A ldr r3, [r1, #36] + 1086 0144 43F00803 orr r3, r3, #8 + 1087 0148 4B62 str r3, [r1, #36] + 1088 .L155: + 1089 014a D307 lsls r3, r2, #31 + 1090 014c 04D5 bpl .L156 + 1091 014e 1649 ldr r1, .L218 + 1092 0150 8B6A ldr r3, [r1, #40] + 1093 0152 43F00803 orr r3, r3, #8 + 1094 0156 8B62 str r3, [r1, #40] + 1095 .L156: + 1096 0158 9007 lsls r0, r2, #30 + 1097 015a D3D5 bpl .L161 + 1098 015c 124A ldr r2, .L218 + 1099 015e D36A ldr r3, [r2, #44] + 1100 0160 43F00803 orr r3, r3, #8 + 1101 0164 0020 movs r0, #0 + 1102 0166 D362 str r3, [r2, #44] + 1103 0168 7047 bx lr + 1104 .L217: + 1105 016a 0F4A ldr r2, .L218 + 1106 016c D36A ldr r3, [r2, #44] + 1107 016e 43F02003 orr r3, r3, #32 + 1108 0172 0020 movs r0, #0 + 1109 0174 D362 str r3, [r2, #44] + 1110 0176 7047 bx lr + 1111 .L216: + 1112 0178 0B49 ldr r1, .L218 + 1113 017a 8B6A ldr r3, [r1, #40] + 1114 017c 9007 lsls r0, r2, #30 + 1115 017e 43F02003 orr r3, r3, #32 + 1116 0182 8B62 str r3, [r1, #40] + 1117 0184 BED5 bpl .L161 + 1118 0186 F0E7 b .L217 + 1119 .L215: + 1120 0188 0749 ldr r1, .L218 + 1121 018a 4B6A ldr r3, [r1, #36] + 1122 018c 43F02003 orr r3, r3, #32 + 1123 0190 4B62 str r3, [r1, #36] + 1124 0192 D307 lsls r3, r2, #31 + 1125 0194 B4D5 bpl .L164 + 1126 0196 EFE7 b .L216 + 1127 .L214: + 1128 0198 196A ldr r1, [r3, #32] + ARM GAS /tmp/ccDVoEp0.s page 20 + + + 1129 019a 41F02001 orr r1, r1, #32 + 1130 019e 1962 str r1, [r3, #32] + 1131 01a0 9103 lsls r1, r2, #14 + 1132 01a2 ABD5 bpl .L163 + 1133 01a4 F0E7 b .L215 + 1134 .L219: + 1135 01a6 00BF .align 2 + 1136 .L218: + 1137 01a8 00040140 .word 1073808384 + 1139 .section .text.HAL_PWREx_EnableLowPowerRunMode,"ax",%progbits + 1140 .align 1 + 1141 .p2align 2,,3 + 1142 .global HAL_PWREx_EnableLowPowerRunMode + 1143 .syntax unified + 1144 .thumb + 1145 .thumb_func + 1146 .fpu fpv4-sp-d16 + 1148 HAL_PWREx_EnableLowPowerRunMode: + 1149 @ args = 0, pretend = 0, frame = 0 + 1150 @ frame_needed = 0, uses_anonymous_args = 0 + 1151 @ link register save eliminated. + 1152 0000 024A ldr r2, .L221 + 1153 0002 1368 ldr r3, [r2] + 1154 0004 43F48043 orr r3, r3, #16384 + 1155 0008 1360 str r3, [r2] + 1156 000a 7047 bx lr + 1157 .L222: + 1158 .align 2 + 1159 .L221: + 1160 000c 00700040 .word 1073770496 + 1162 .section .text.HAL_PWREx_DisableLowPowerRunMode,"ax",%progbits + 1163 .align 1 + 1164 .p2align 2,,3 + 1165 .global HAL_PWREx_DisableLowPowerRunMode + 1166 .syntax unified + 1167 .thumb + 1168 .thumb_func + 1169 .fpu fpv4-sp-d16 + 1171 HAL_PWREx_DisableLowPowerRunMode: + 1172 @ args = 0, pretend = 0, frame = 0 + 1173 @ frame_needed = 0, uses_anonymous_args = 0 + 1174 @ link register save eliminated. + 1175 0000 1049 ldr r1, .L240 + 1176 0002 114B ldr r3, .L240+4 + 1177 0004 0A68 ldr r2, [r1] + 1178 0006 22F48042 bic r2, r2, #16384 + 1179 000a 10B4 push {r4} + 1180 000c 0A60 str r2, [r1] + 1181 000e 0F4C ldr r4, .L240+8 + 1182 0010 1B68 ldr r3, [r3] + 1183 0012 4A69 ldr r2, [r1, #20] + 1184 0014 A4FB0343 umull r4, r3, r4, r3 + 1185 0018 3220 movs r0, #50 + 1186 001a 9B0C lsrs r3, r3, #18 + 1187 001c 9405 lsls r4, r2, #22 + 1188 001e 00FB03F3 mul r3, r0, r3 + 1189 0022 05D5 bpl .L224 + ARM GAS /tmp/ccDVoEp0.s page 21 + + + 1190 .L239: + 1191 0024 23B1 cbz r3, .L224 + 1192 0026 4A69 ldr r2, [r1, #20] + 1193 0028 9205 lsls r2, r2, #22 + 1194 002a 03F1FF33 add r3, r3, #-1 + 1195 002e F9D4 bmi .L239 + 1196 .L224: + 1197 0030 044B ldr r3, .L240 + 1198 0032 5DF8044B ldr r4, [sp], #4 + 1199 0036 5B69 ldr r3, [r3, #20] + 1200 0038 13F4007F tst r3, #512 + 1201 003c 14BF ite ne + 1202 003e 0320 movne r0, #3 + 1203 0040 0020 moveq r0, #0 + 1204 0042 7047 bx lr + 1205 .L241: + 1206 .align 2 + 1207 .L240: + 1208 0044 00700040 .word 1073770496 + 1209 0048 00000000 .word SystemCoreClock + 1210 004c 83DE1B43 .word 1125899907 + 1212 .section .text.HAL_PWREx_EnterSTOP0Mode,"ax",%progbits + 1213 .align 1 + 1214 .p2align 2,,3 + 1215 .global HAL_PWREx_EnterSTOP0Mode + 1216 .syntax unified + 1217 .thumb + 1218 .thumb_func + 1219 .fpu fpv4-sp-d16 + 1221 HAL_PWREx_EnterSTOP0Mode: + 1222 @ args = 0, pretend = 0, frame = 0 + 1223 @ frame_needed = 0, uses_anonymous_args = 0 + 1224 @ link register save eliminated. + 1225 0000 0B49 ldr r1, .L246 + 1226 0002 0C4A ldr r2, .L246+4 + 1227 0004 0B68 ldr r3, [r1] + 1228 0006 23F00703 bic r3, r3, #7 + 1229 000a 0B60 str r3, [r1] + 1230 000c 1369 ldr r3, [r2, #16] + 1231 000e 0128 cmp r0, #1 + 1232 0010 43F00403 orr r3, r3, #4 + 1233 0014 1361 str r3, [r2, #16] + 1234 0016 08D0 beq .L245 + 1235 .syntax unified + 1236 @ 914 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1237 0018 40BF sev + 1238 @ 0 "" 2 + 1239 @ 915 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1240 001a 20BF wfe + 1241 @ 0 "" 2 + 1242 @ 916 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1243 001c 20BF wfe + 1244 @ 0 "" 2 + 1245 .thumb + 1246 .syntax unified + 1247 .L244: + 1248 001e 054A ldr r2, .L246+4 + ARM GAS /tmp/ccDVoEp0.s page 22 + + + 1249 0020 1369 ldr r3, [r2, #16] + 1250 0022 23F00403 bic r3, r3, #4 + 1251 0026 1361 str r3, [r2, #16] + 1252 0028 7047 bx lr + 1253 .L245: + 1254 .syntax unified + 1255 @ 909 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1256 002a 30BF wfi + 1257 @ 0 "" 2 + 1258 .thumb + 1259 .syntax unified + 1260 002c F7E7 b .L244 + 1261 .L247: + 1262 002e 00BF .align 2 + 1263 .L246: + 1264 0030 00700040 .word 1073770496 + 1265 0034 00ED00E0 .word -536810240 + 1267 .section .text.HAL_PWREx_EnterSTOP1Mode,"ax",%progbits + 1268 .align 1 + 1269 .p2align 2,,3 + 1270 .global HAL_PWREx_EnterSTOP1Mode + 1271 .syntax unified + 1272 .thumb + 1273 .thumb_func + 1274 .fpu fpv4-sp-d16 + 1276 HAL_PWREx_EnterSTOP1Mode: + 1277 @ args = 0, pretend = 0, frame = 0 + 1278 @ frame_needed = 0, uses_anonymous_args = 0 + 1279 @ link register save eliminated. + 1280 0000 0C49 ldr r1, .L252 + 1281 0002 0D4A ldr r2, .L252+4 + 1282 0004 0B68 ldr r3, [r1] + 1283 0006 23F00703 bic r3, r3, #7 + 1284 000a 43F00103 orr r3, r3, #1 + 1285 000e 0B60 str r3, [r1] + 1286 0010 1369 ldr r3, [r2, #16] + 1287 0012 0128 cmp r0, #1 + 1288 0014 43F00403 orr r3, r3, #4 + 1289 0018 1361 str r3, [r2, #16] + 1290 001a 08D0 beq .L251 + 1291 .syntax unified + 1292 @ 965 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1293 001c 40BF sev + 1294 @ 0 "" 2 + 1295 @ 966 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1296 001e 20BF wfe + 1297 @ 0 "" 2 + 1298 @ 967 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1299 0020 20BF wfe + 1300 @ 0 "" 2 + 1301 .thumb + 1302 .syntax unified + 1303 .L250: + 1304 0022 054A ldr r2, .L252+4 + 1305 0024 1369 ldr r3, [r2, #16] + 1306 0026 23F00403 bic r3, r3, #4 + 1307 002a 1361 str r3, [r2, #16] + ARM GAS /tmp/ccDVoEp0.s page 23 + + + 1308 002c 7047 bx lr + 1309 .L251: + 1310 .syntax unified + 1311 @ 960 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1312 002e 30BF wfi + 1313 @ 0 "" 2 + 1314 .thumb + 1315 .syntax unified + 1316 0030 F7E7 b .L250 + 1317 .L253: + 1318 0032 00BF .align 2 + 1319 .L252: + 1320 0034 00700040 .word 1073770496 + 1321 0038 00ED00E0 .word -536810240 + 1323 .section .text.HAL_PWREx_EnterSHUTDOWNMode,"ax",%progbits + 1324 .align 1 + 1325 .p2align 2,,3 + 1326 .global HAL_PWREx_EnterSHUTDOWNMode + 1327 .syntax unified + 1328 .thumb + 1329 .thumb_func + 1330 .fpu fpv4-sp-d16 + 1332 HAL_PWREx_EnterSHUTDOWNMode: + 1333 @ args = 0, pretend = 0, frame = 0 + 1334 @ frame_needed = 0, uses_anonymous_args = 0 + 1335 @ link register save eliminated. + 1336 0000 0649 ldr r1, .L255 + 1337 0002 074A ldr r2, .L255+4 + 1338 0004 0B68 ldr r3, [r1] + 1339 0006 23F00703 bic r3, r3, #7 + 1340 000a 43F00403 orr r3, r3, #4 + 1341 000e 0B60 str r3, [r1] + 1342 0010 1369 ldr r3, [r2, #16] + 1343 0012 43F00403 orr r3, r3, #4 + 1344 0016 1361 str r3, [r2, #16] + 1345 .syntax unified + 1346 @ 1000 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_pwr_ex.c" 1 + 1347 0018 30BF wfi + 1348 @ 0 "" 2 + 1349 .thumb + 1350 .syntax unified + 1351 001a 7047 bx lr + 1352 .L256: + 1353 .align 2 + 1354 .L255: + 1355 001c 00700040 .word 1073770496 + 1356 0020 00ED00E0 .word -536810240 + 1358 .section .text.HAL_PWREx_PVM1Callback,"ax",%progbits + 1359 .align 1 + 1360 .p2align 2,,3 + 1361 .weak HAL_PWREx_PVM1Callback + 1362 .syntax unified + 1363 .thumb + 1364 .thumb_func + 1365 .fpu fpv4-sp-d16 + 1367 HAL_PWREx_PVM1Callback: + 1368 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccDVoEp0.s page 24 + + + 1369 @ frame_needed = 0, uses_anonymous_args = 0 + 1370 @ link register save eliminated. + 1371 0000 7047 bx lr + 1373 0002 00BF .section .text.HAL_PWREx_PVM2Callback,"ax",%progbits + 1374 .align 1 + 1375 .p2align 2,,3 + 1376 .weak HAL_PWREx_PVM2Callback + 1377 .syntax unified + 1378 .thumb + 1379 .thumb_func + 1380 .fpu fpv4-sp-d16 + 1382 HAL_PWREx_PVM2Callback: + 1383 @ args = 0, pretend = 0, frame = 0 + 1384 @ frame_needed = 0, uses_anonymous_args = 0 + 1385 @ link register save eliminated. + 1386 0000 7047 bx lr + 1388 0002 00BF .section .text.HAL_PWREx_PVM3Callback,"ax",%progbits + 1389 .align 1 + 1390 .p2align 2,,3 + 1391 .weak HAL_PWREx_PVM3Callback + 1392 .syntax unified + 1393 .thumb + 1394 .thumb_func + 1395 .fpu fpv4-sp-d16 + 1397 HAL_PWREx_PVM3Callback: + 1398 @ args = 0, pretend = 0, frame = 0 + 1399 @ frame_needed = 0, uses_anonymous_args = 0 + 1400 @ link register save eliminated. + 1401 0000 7047 bx lr + 1403 0002 00BF .section .text.HAL_PWREx_PVM4Callback,"ax",%progbits + 1404 .align 1 + 1405 .p2align 2,,3 + 1406 .weak HAL_PWREx_PVM4Callback + 1407 .syntax unified + 1408 .thumb + 1409 .thumb_func + 1410 .fpu fpv4-sp-d16 + 1412 HAL_PWREx_PVM4Callback: + 1413 @ args = 0, pretend = 0, frame = 0 + 1414 @ frame_needed = 0, uses_anonymous_args = 0 + 1415 @ link register save eliminated. + 1416 0000 7047 bx lr + 1418 0002 00BF .section .text.HAL_PWREx_PVD_PVM_IRQHandler,"ax",%progbits + 1419 .align 1 + 1420 .p2align 2,,3 + 1421 .global HAL_PWREx_PVD_PVM_IRQHandler + 1422 .syntax unified + 1423 .thumb + 1424 .thumb_func + 1425 .fpu fpv4-sp-d16 + 1427 HAL_PWREx_PVD_PVM_IRQHandler: + 1428 @ args = 0, pretend = 0, frame = 0 + 1429 @ frame_needed = 0, uses_anonymous_args = 0 + 1430 0000 10B5 push {r4, lr} + 1431 0002 174C ldr r4, .L288 + 1432 0004 6369 ldr r3, [r4, #20] + 1433 0006 DB03 lsls r3, r3, #15 + ARM GAS /tmp/ccDVoEp0.s page 25 + + + 1434 0008 24D4 bmi .L283 + 1435 .L262: + 1436 000a 154C ldr r4, .L288 + 1437 000c 636B ldr r3, [r4, #52] + 1438 000e 1807 lsls r0, r3, #28 + 1439 0010 1BD4 bmi .L284 + 1440 .L263: + 1441 0012 134C ldr r4, .L288 + 1442 0014 636B ldr r3, [r4, #52] + 1443 0016 D906 lsls r1, r3, #27 + 1444 0018 12D4 bmi .L285 + 1445 .L264: + 1446 001a 114C ldr r4, .L288 + 1447 001c 636B ldr r3, [r4, #52] + 1448 001e 9A06 lsls r2, r3, #26 + 1449 0020 09D4 bmi .L286 + 1450 .L265: + 1451 0022 0F4C ldr r4, .L288 + 1452 0024 636B ldr r3, [r4, #52] + 1453 0026 5B06 lsls r3, r3, #25 + 1454 0028 00D4 bmi .L287 + 1455 002a 10BD pop {r4, pc} + 1456 .L287: + 1457 002c FFF7FEFF bl HAL_PWREx_PVM4Callback + 1458 0030 4023 movs r3, #64 + 1459 0032 6363 str r3, [r4, #52] + 1460 0034 10BD pop {r4, pc} + 1461 .L286: + 1462 0036 FFF7FEFF bl HAL_PWREx_PVM3Callback + 1463 003a 2023 movs r3, #32 + 1464 003c 6363 str r3, [r4, #52] + 1465 003e F0E7 b .L265 + 1466 .L285: + 1467 0040 FFF7FEFF bl HAL_PWREx_PVM2Callback + 1468 0044 1023 movs r3, #16 + 1469 0046 6363 str r3, [r4, #52] + 1470 0048 E7E7 b .L264 + 1471 .L284: + 1472 004a FFF7FEFF bl HAL_PWREx_PVM1Callback + 1473 004e 0823 movs r3, #8 + 1474 0050 6363 str r3, [r4, #52] + 1475 0052 DEE7 b .L263 + 1476 .L283: + 1477 0054 FFF7FEFF bl HAL_PWR_PVDCallback + 1478 0058 4FF48033 mov r3, #65536 + 1479 005c 6361 str r3, [r4, #20] + 1480 005e D4E7 b .L262 + 1481 .L289: + 1482 .align 2 + 1483 .L288: + 1484 0060 00040140 .word 1073808384 + 1486 .section .text.HAL_PWREx_EnableUCPDStandbyMode,"ax",%progbits + 1487 .align 1 + 1488 .p2align 2,,3 + 1489 .global HAL_PWREx_EnableUCPDStandbyMode + 1490 .syntax unified + 1491 .thumb + ARM GAS /tmp/ccDVoEp0.s page 26 + + + 1492 .thumb_func + 1493 .fpu fpv4-sp-d16 + 1495 HAL_PWREx_EnableUCPDStandbyMode: + 1496 @ args = 0, pretend = 0, frame = 0 + 1497 @ frame_needed = 0, uses_anonymous_args = 0 + 1498 @ link register save eliminated. + 1499 0000 024A ldr r2, .L291 + 1500 0002 9368 ldr r3, [r2, #8] + 1501 0004 43F40053 orr r3, r3, #8192 + 1502 0008 9360 str r3, [r2, #8] + 1503 000a 7047 bx lr + 1504 .L292: + 1505 .align 2 + 1506 .L291: + 1507 000c 00700040 .word 1073770496 + 1509 .section .text.HAL_PWREx_DisableUCPDStandbyMode,"ax",%progbits + 1510 .align 1 + 1511 .p2align 2,,3 + 1512 .global HAL_PWREx_DisableUCPDStandbyMode + 1513 .syntax unified + 1514 .thumb + 1515 .thumb_func + 1516 .fpu fpv4-sp-d16 + 1518 HAL_PWREx_DisableUCPDStandbyMode: + 1519 @ args = 0, pretend = 0, frame = 0 + 1520 @ frame_needed = 0, uses_anonymous_args = 0 + 1521 @ link register save eliminated. + 1522 0000 024A ldr r2, .L294 + 1523 0002 9368 ldr r3, [r2, #8] + 1524 0004 23F40053 bic r3, r3, #8192 + 1525 0008 9360 str r3, [r2, #8] + 1526 000a 7047 bx lr + 1527 .L295: + 1528 .align 2 + 1529 .L294: + 1530 000c 00700040 .word 1073770496 + 1532 .section .text.HAL_PWREx_EnableUCPDDeadBattery,"ax",%progbits + 1533 .align 1 + 1534 .p2align 2,,3 + 1535 .global HAL_PWREx_EnableUCPDDeadBattery + 1536 .syntax unified + 1537 .thumb + 1538 .thumb_func + 1539 .fpu fpv4-sp-d16 + 1541 HAL_PWREx_EnableUCPDDeadBattery: + 1542 @ args = 0, pretend = 0, frame = 0 + 1543 @ frame_needed = 0, uses_anonymous_args = 0 + 1544 @ link register save eliminated. + 1545 0000 024A ldr r2, .L297 + 1546 0002 9368 ldr r3, [r2, #8] + 1547 0004 23F48043 bic r3, r3, #16384 + 1548 0008 9360 str r3, [r2, #8] + 1549 000a 7047 bx lr + 1550 .L298: + 1551 .align 2 + 1552 .L297: + 1553 000c 00700040 .word 1073770496 + ARM GAS /tmp/ccDVoEp0.s page 27 + + + 1555 .section .text.HAL_PWREx_DisableUCPDDeadBattery,"ax",%progbits + 1556 .align 1 + 1557 .p2align 2,,3 + 1558 .global HAL_PWREx_DisableUCPDDeadBattery + 1559 .syntax unified + 1560 .thumb + 1561 .thumb_func + 1562 .fpu fpv4-sp-d16 + 1564 HAL_PWREx_DisableUCPDDeadBattery: + 1565 @ args = 0, pretend = 0, frame = 0 + 1566 @ frame_needed = 0, uses_anonymous_args = 0 + 1567 @ link register save eliminated. + 1568 0000 024A ldr r2, .L300 + 1569 0002 9368 ldr r3, [r2, #8] + 1570 0004 43F48043 orr r3, r3, #16384 + 1571 0008 9360 str r3, [r2, #8] + 1572 000a 7047 bx lr + 1573 .L301: + 1574 .align 2 + 1575 .L300: + 1576 000c 00700040 .word 1073770496 + 1578 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccDVoEp0.s page 28 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_pwr_ex.c + /tmp/ccDVoEp0.s:16 .text.HAL_PWREx_GetVoltageRange:0000000000000000 $t + /tmp/ccDVoEp0.s:25 .text.HAL_PWREx_GetVoltageRange:0000000000000000 HAL_PWREx_GetVoltageRange + /tmp/ccDVoEp0.s:43 .text.HAL_PWREx_GetVoltageRange:0000000000000020 $d + /tmp/ccDVoEp0.s:46 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 $t + /tmp/ccDVoEp0.s:54 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 HAL_PWREx_ControlVoltageScaling + /tmp/ccDVoEp0.s:157 .text.HAL_PWREx_ControlVoltageScaling:00000000000000f0 $d + /tmp/ccDVoEp0.s:162 .text.HAL_PWREx_EnableBatteryCharging:0000000000000000 $t + /tmp/ccDVoEp0.s:170 .text.HAL_PWREx_EnableBatteryCharging:0000000000000000 HAL_PWREx_EnableBatteryCharging + /tmp/ccDVoEp0.s:186 .text.HAL_PWREx_EnableBatteryCharging:0000000000000018 $d + /tmp/ccDVoEp0.s:189 .text.HAL_PWREx_DisableBatteryCharging:0000000000000000 $t + /tmp/ccDVoEp0.s:197 .text.HAL_PWREx_DisableBatteryCharging:0000000000000000 HAL_PWREx_DisableBatteryCharging + /tmp/ccDVoEp0.s:209 .text.HAL_PWREx_DisableBatteryCharging:000000000000000c $d + /tmp/ccDVoEp0.s:212 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000000000000 $t + /tmp/ccDVoEp0.s:220 .text.HAL_PWREx_EnableInternalWakeUpLine:0000000000000000 HAL_PWREx_EnableInternalWakeUpLine + /tmp/ccDVoEp0.s:232 .text.HAL_PWREx_EnableInternalWakeUpLine:000000000000000c $d + /tmp/ccDVoEp0.s:235 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000000000000 $t + /tmp/ccDVoEp0.s:243 .text.HAL_PWREx_DisableInternalWakeUpLine:0000000000000000 HAL_PWREx_DisableInternalWakeUpLine + /tmp/ccDVoEp0.s:255 .text.HAL_PWREx_DisableInternalWakeUpLine:000000000000000c $d + /tmp/ccDVoEp0.s:258 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000000 $t + /tmp/ccDVoEp0.s:266 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000000 HAL_PWREx_EnableGPIOPullUp + /tmp/ccDVoEp0.s:274 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000008 $d + /tmp/ccDVoEp0.s:363 .text.HAL_PWREx_EnableGPIOPullUp:00000000000000b4 $d + /tmp/ccDVoEp0.s:366 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000000 $t + /tmp/ccDVoEp0.s:374 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000000 HAL_PWREx_DisableGPIOPullUp + /tmp/ccDVoEp0.s:382 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000008 $d + /tmp/ccDVoEp0.s:449 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000084 $d + /tmp/ccDVoEp0.s:452 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000000 $t + /tmp/ccDVoEp0.s:460 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000000 HAL_PWREx_EnableGPIOPullDown + /tmp/ccDVoEp0.s:468 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000008 $d + /tmp/ccDVoEp0.s:559 .text.HAL_PWREx_EnableGPIOPullDown:00000000000000bc $d + /tmp/ccDVoEp0.s:562 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000000 $t + /tmp/ccDVoEp0.s:570 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000000 HAL_PWREx_DisableGPIOPullDown + /tmp/ccDVoEp0.s:578 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000008 $d + /tmp/ccDVoEp0.s:644 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000080 $d + /tmp/ccDVoEp0.s:647 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000000000000 $t + /tmp/ccDVoEp0.s:655 .text.HAL_PWREx_EnablePullUpPullDownConfig:0000000000000000 HAL_PWREx_EnablePullUpPullDownConfig + /tmp/ccDVoEp0.s:667 .text.HAL_PWREx_EnablePullUpPullDownConfig:000000000000000c $d + /tmp/ccDVoEp0.s:670 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000000000000 $t + /tmp/ccDVoEp0.s:678 .text.HAL_PWREx_DisablePullUpPullDownConfig:0000000000000000 HAL_PWREx_DisablePullUpPullDownConfig + /tmp/ccDVoEp0.s:690 .text.HAL_PWREx_DisablePullUpPullDownConfig:000000000000000c $d + /tmp/ccDVoEp0.s:693 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000000000000 $t + /tmp/ccDVoEp0.s:701 .text.HAL_PWREx_EnableSRAM2ContentRetention:0000000000000000 HAL_PWREx_EnableSRAM2ContentRetention + /tmp/ccDVoEp0.s:713 .text.HAL_PWREx_EnableSRAM2ContentRetention:000000000000000c $d + /tmp/ccDVoEp0.s:716 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000000000000 $t + /tmp/ccDVoEp0.s:724 .text.HAL_PWREx_DisableSRAM2ContentRetention:0000000000000000 HAL_PWREx_DisableSRAM2ContentRetention + /tmp/ccDVoEp0.s:736 .text.HAL_PWREx_DisableSRAM2ContentRetention:000000000000000c $d + /tmp/ccDVoEp0.s:739 .text.HAL_PWREx_EnablePVM1:0000000000000000 $t + /tmp/ccDVoEp0.s:747 .text.HAL_PWREx_EnablePVM1:0000000000000000 HAL_PWREx_EnablePVM1 + /tmp/ccDVoEp0.s:759 .text.HAL_PWREx_EnablePVM1:000000000000000c $d + /tmp/ccDVoEp0.s:762 .text.HAL_PWREx_DisablePVM1:0000000000000000 $t + /tmp/ccDVoEp0.s:770 .text.HAL_PWREx_DisablePVM1:0000000000000000 HAL_PWREx_DisablePVM1 + /tmp/ccDVoEp0.s:782 .text.HAL_PWREx_DisablePVM1:000000000000000c $d + /tmp/ccDVoEp0.s:785 .text.HAL_PWREx_EnablePVM2:0000000000000000 $t + /tmp/ccDVoEp0.s:793 .text.HAL_PWREx_EnablePVM2:0000000000000000 HAL_PWREx_EnablePVM2 + /tmp/ccDVoEp0.s:805 .text.HAL_PWREx_EnablePVM2:000000000000000c $d + ARM GAS /tmp/ccDVoEp0.s page 29 + + + /tmp/ccDVoEp0.s:808 .text.HAL_PWREx_DisablePVM2:0000000000000000 $t + /tmp/ccDVoEp0.s:816 .text.HAL_PWREx_DisablePVM2:0000000000000000 HAL_PWREx_DisablePVM2 + /tmp/ccDVoEp0.s:828 .text.HAL_PWREx_DisablePVM2:000000000000000c $d + /tmp/ccDVoEp0.s:831 .text.HAL_PWREx_EnablePVM3:0000000000000000 $t + /tmp/ccDVoEp0.s:839 .text.HAL_PWREx_EnablePVM3:0000000000000000 HAL_PWREx_EnablePVM3 + /tmp/ccDVoEp0.s:851 .text.HAL_PWREx_EnablePVM3:000000000000000c $d + /tmp/ccDVoEp0.s:854 .text.HAL_PWREx_DisablePVM3:0000000000000000 $t + /tmp/ccDVoEp0.s:862 .text.HAL_PWREx_DisablePVM3:0000000000000000 HAL_PWREx_DisablePVM3 + /tmp/ccDVoEp0.s:874 .text.HAL_PWREx_DisablePVM3:000000000000000c $d + /tmp/ccDVoEp0.s:877 .text.HAL_PWREx_EnablePVM4:0000000000000000 $t + /tmp/ccDVoEp0.s:885 .text.HAL_PWREx_EnablePVM4:0000000000000000 HAL_PWREx_EnablePVM4 + /tmp/ccDVoEp0.s:897 .text.HAL_PWREx_EnablePVM4:000000000000000c $d + /tmp/ccDVoEp0.s:900 .text.HAL_PWREx_DisablePVM4:0000000000000000 $t + /tmp/ccDVoEp0.s:908 .text.HAL_PWREx_DisablePVM4:0000000000000000 HAL_PWREx_DisablePVM4 + /tmp/ccDVoEp0.s:920 .text.HAL_PWREx_DisablePVM4:000000000000000c $d + /tmp/ccDVoEp0.s:923 .text.HAL_PWREx_ConfigPVM:0000000000000000 $t + /tmp/ccDVoEp0.s:931 .text.HAL_PWREx_ConfigPVM:0000000000000000 HAL_PWREx_ConfigPVM + /tmp/ccDVoEp0.s:1137 .text.HAL_PWREx_ConfigPVM:00000000000001a8 $d + /tmp/ccDVoEp0.s:1140 .text.HAL_PWREx_EnableLowPowerRunMode:0000000000000000 $t + /tmp/ccDVoEp0.s:1148 .text.HAL_PWREx_EnableLowPowerRunMode:0000000000000000 HAL_PWREx_EnableLowPowerRunMode + /tmp/ccDVoEp0.s:1160 .text.HAL_PWREx_EnableLowPowerRunMode:000000000000000c $d + /tmp/ccDVoEp0.s:1163 .text.HAL_PWREx_DisableLowPowerRunMode:0000000000000000 $t + /tmp/ccDVoEp0.s:1171 .text.HAL_PWREx_DisableLowPowerRunMode:0000000000000000 HAL_PWREx_DisableLowPowerRunMode + /tmp/ccDVoEp0.s:1208 .text.HAL_PWREx_DisableLowPowerRunMode:0000000000000044 $d + /tmp/ccDVoEp0.s:1213 .text.HAL_PWREx_EnterSTOP0Mode:0000000000000000 $t + /tmp/ccDVoEp0.s:1221 .text.HAL_PWREx_EnterSTOP0Mode:0000000000000000 HAL_PWREx_EnterSTOP0Mode + /tmp/ccDVoEp0.s:1264 .text.HAL_PWREx_EnterSTOP0Mode:0000000000000030 $d + /tmp/ccDVoEp0.s:1268 .text.HAL_PWREx_EnterSTOP1Mode:0000000000000000 $t + /tmp/ccDVoEp0.s:1276 .text.HAL_PWREx_EnterSTOP1Mode:0000000000000000 HAL_PWREx_EnterSTOP1Mode + /tmp/ccDVoEp0.s:1320 .text.HAL_PWREx_EnterSTOP1Mode:0000000000000034 $d + /tmp/ccDVoEp0.s:1324 .text.HAL_PWREx_EnterSHUTDOWNMode:0000000000000000 $t + /tmp/ccDVoEp0.s:1332 .text.HAL_PWREx_EnterSHUTDOWNMode:0000000000000000 HAL_PWREx_EnterSHUTDOWNMode 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/tmp/ccDVoEp0.s:1487 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000000000000 $t + /tmp/ccDVoEp0.s:1495 .text.HAL_PWREx_EnableUCPDStandbyMode:0000000000000000 HAL_PWREx_EnableUCPDStandbyMode + /tmp/ccDVoEp0.s:1507 .text.HAL_PWREx_EnableUCPDStandbyMode:000000000000000c $d + /tmp/ccDVoEp0.s:1510 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000000000000 $t + /tmp/ccDVoEp0.s:1518 .text.HAL_PWREx_DisableUCPDStandbyMode:0000000000000000 HAL_PWREx_DisableUCPDStandbyMode + /tmp/ccDVoEp0.s:1530 .text.HAL_PWREx_DisableUCPDStandbyMode:000000000000000c $d + /tmp/ccDVoEp0.s:1533 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000000000000 $t + /tmp/ccDVoEp0.s:1541 .text.HAL_PWREx_EnableUCPDDeadBattery:0000000000000000 HAL_PWREx_EnableUCPDDeadBattery + /tmp/ccDVoEp0.s:1553 .text.HAL_PWREx_EnableUCPDDeadBattery:000000000000000c $d + /tmp/ccDVoEp0.s:1556 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000000000000 $t + /tmp/ccDVoEp0.s:1564 .text.HAL_PWREx_DisableUCPDDeadBattery:0000000000000000 HAL_PWREx_DisableUCPDDeadBattery + /tmp/ccDVoEp0.s:1576 .text.HAL_PWREx_DisableUCPDDeadBattery:000000000000000c $d + /tmp/ccDVoEp0.s:281 .text.HAL_PWREx_EnableGPIOPullUp:000000000000000f $d + ARM GAS /tmp/ccDVoEp0.s page 30 + + + /tmp/ccDVoEp0.s:281 .text.HAL_PWREx_EnableGPIOPullUp:0000000000000010 $t + /tmp/ccDVoEp0.s:389 .text.HAL_PWREx_DisableGPIOPullUp:000000000000000f $d + /tmp/ccDVoEp0.s:389 .text.HAL_PWREx_DisableGPIOPullUp:0000000000000010 $t + /tmp/ccDVoEp0.s:475 .text.HAL_PWREx_EnableGPIOPullDown:000000000000000f $d + /tmp/ccDVoEp0.s:475 .text.HAL_PWREx_EnableGPIOPullDown:0000000000000010 $t + /tmp/ccDVoEp0.s:585 .text.HAL_PWREx_DisableGPIOPullDown:000000000000000f $d + /tmp/ccDVoEp0.s:585 .text.HAL_PWREx_DisableGPIOPullDown:0000000000000010 $t + +UNDEFINED SYMBOLS +SystemCoreClock +HAL_PWR_PVDCallback diff --git a/codice/build/stm32g4xx_hal_pwr_ex.o b/codice/build/stm32g4xx_hal_pwr_ex.o new file mode 100644 index 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Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_tim.lst b/codice/build/stm32g4xx_hal_tim.lst new file mode 100644 index 0000000..7c00b8c --- /dev/null +++ b/codice/build/stm32g4xx_hal_tim.lst @@ -0,0 +1,10083 @@ +ARM GAS /tmp/cc6kdh5W.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_tim.c" + 14 .text + 15 .section .text.TIM_OC1_SetConfig,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .arch armv7e-m + 19 .syntax unified + 20 .thumb + 21 .thumb_func + 22 .fpu fpv4-sp-d16 + 24 TIM_OC1_SetConfig: + 25 @ args = 0, pretend = 0, frame = 0 + 26 @ frame_needed = 0, uses_anonymous_args = 0 + 27 @ link register save eliminated. + 28 0000 036A ldr r3, [r0, #32] + 29 0002 23F00103 bic r3, r3, #1 + 30 0006 0362 str r3, [r0, #32] + 31 0008 036A ldr r3, [r0, #32] + 32 000a 70B4 push {r4, r5, r6} + 33 000c 4468 ldr r4, [r0, #4] + 34 000e 8269 ldr r2, [r0, #24] + 35 0010 0D68 ldr r5, [r1] + 36 0012 22F48032 bic r2, r2, #65536 + 37 0016 22F07302 bic r2, r2, #115 + 38 001a 2A43 orrs r2, r2, r5 + 39 001c 8D68 ldr r5, [r1, #8] + 40 001e 23F00203 bic r3, r3, #2 + 41 0022 2B43 orrs r3, r3, r5 + 42 0024 134D ldr r5, .L12 + 43 0026 A842 cmp r0, r5 + 44 0028 0FD0 beq .L4 + 45 002a 05F50065 add r5, r5, #2048 + 46 002e A842 cmp r0, r5 + 47 0030 0BD0 beq .L4 + 48 0032 05F54065 add r5, r5, #3072 + 49 0036 A842 cmp r0, r5 + 50 0038 07D0 beq .L4 + 51 003a 05F58065 add r5, r5, #1024 + 52 003e A842 cmp r0, r5 + 53 0040 03D0 beq .L4 + 54 0042 05F58065 add r5, r5, #1024 + 55 0046 A842 cmp r0, r5 + 56 0048 0DD1 bne .L7 + 57 .L4: + 58 004a CD68 ldr r5, [r1, #12] + ARM GAS /tmp/cc6kdh5W.s page 2 + + + 59 004c 23F00803 bic r3, r3, #8 + 60 0050 2B43 orrs r3, r3, r5 + 61 0052 D1E90565 ldrd r6, r5, [r1, #20] + 62 0056 24F44074 bic r4, r4, #768 + 63 005a 46EA050C orr ip, r6, r5 + 64 005e 23F00403 bic r3, r3, #4 + 65 0062 4CEA0404 orr r4, ip, r4 + 66 .L7: + 67 0066 4968 ldr r1, [r1, #4] + 68 0068 4460 str r4, [r0, #4] + 69 006a 8261 str r2, [r0, #24] + 70 006c 70BC pop {r4, r5, r6} + 71 006e 4163 str r1, [r0, #52] + 72 0070 0362 str r3, [r0, #32] + 73 0072 7047 bx lr + 74 .L13: + 75 .align 2 + 76 .L12: + 77 0074 002C0140 .word 1073818624 + 79 .section .text.TIM_OC3_SetConfig,"ax",%progbits + 80 .align 1 + 81 .p2align 2,,3 + 82 .syntax unified + 83 .thumb + 84 .thumb_func + 85 .fpu fpv4-sp-d16 + 87 TIM_OC3_SetConfig: + 88 @ args = 0, pretend = 0, frame = 0 + 89 @ frame_needed = 0, uses_anonymous_args = 0 + 90 @ link register save eliminated. + 91 0000 036A ldr r3, [r0, #32] + 92 0002 23F48073 bic r3, r3, #256 + 93 0006 0362 str r3, [r0, #32] + 94 0008 036A ldr r3, [r0, #32] + 95 000a 70B4 push {r4, r5, r6} + 96 000c 4468 ldr r4, [r0, #4] + 97 000e C269 ldr r2, [r0, #28] + 98 0010 0D68 ldr r5, [r1] + 99 0012 22F48032 bic r2, r2, #65536 + 100 0016 22F07302 bic r2, r2, #115 + 101 001a 2A43 orrs r2, r2, r5 + 102 001c 8D68 ldr r5, [r1, #8] + 103 001e 23F40073 bic r3, r3, #512 + 104 0022 43EA0523 orr r3, r3, r5, lsl #8 + 105 0026 154D ldr r5, .L21 + 106 0028 A842 cmp r0, r5 + 107 002a 10D0 beq .L16 + 108 002c 05F50065 add r5, r5, #2048 + 109 0030 A842 cmp r0, r5 + 110 0032 0CD0 beq .L16 + 111 0034 05F54065 add r5, r5, #3072 + 112 0038 A842 cmp r0, r5 + 113 003a 0FD0 beq .L17 + 114 003c 05F58065 add r5, r5, #1024 + 115 0040 A842 cmp r0, r5 + 116 0042 0BD0 beq .L17 + 117 0044 05F58065 add r5, r5, #1024 + ARM GAS /tmp/cc6kdh5W.s page 3 + + + 118 0048 A842 cmp r0, r5 + 119 004a 0FD1 bne .L18 + 120 004c 06E0 b .L17 + 121 .L16: + 122 004e CD68 ldr r5, [r1, #12] + 123 0050 23F40063 bic r3, r3, #2048 + 124 0054 43EA0523 orr r3, r3, r5, lsl #8 + 125 0058 23F48063 bic r3, r3, #1024 + 126 .L17: + 127 005c D1E90565 ldrd r6, r5, [r1, #20] + 128 0060 24F44054 bic r4, r4, #12288 + 129 0064 46EA050C orr ip, r6, r5 + 130 0068 44EA0C14 orr r4, r4, ip, lsl #4 + 131 .L18: + 132 006c 4968 ldr r1, [r1, #4] + 133 006e 4460 str r4, [r0, #4] + 134 0070 C261 str r2, [r0, #28] + 135 0072 70BC pop {r4, r5, r6} + 136 0074 C163 str r1, [r0, #60] + 137 0076 0362 str r3, [r0, #32] + 138 0078 7047 bx lr + 139 .L22: + 140 007a 00BF .align 2 + 141 .L21: + 142 007c 002C0140 .word 1073818624 + 144 .section .text.TIM_OC4_SetConfig,"ax",%progbits + 145 .align 1 + 146 .p2align 2,,3 + 147 .syntax unified + 148 .thumb + 149 .thumb_func + 150 .fpu fpv4-sp-d16 + 152 TIM_OC4_SetConfig: + 153 @ args = 0, pretend = 0, frame = 0 + 154 @ frame_needed = 0, uses_anonymous_args = 0 + 155 @ link register save eliminated. + 156 0000 036A ldr r3, [r0, #32] + 157 0002 23F48053 bic r3, r3, #4096 + 158 0006 0362 str r3, [r0, #32] + 159 0008 036A ldr r3, [r0, #32] + 160 000a 70B4 push {r4, r5, r6} + 161 000c 4468 ldr r4, [r0, #4] + 162 000e C269 ldr r2, [r0, #28] + 163 0010 0D68 ldr r5, [r1] + 164 0012 22F08072 bic r2, r2, #16777216 + 165 0016 22F4E642 bic r2, r2, #29440 + 166 001a 42EA0522 orr r2, r2, r5, lsl #8 + 167 001e 8D68 ldr r5, [r1, #8] + 168 0020 23F40053 bic r3, r3, #8192 + 169 0024 43EA0533 orr r3, r3, r5, lsl #12 + 170 0028 144D ldr r5, .L30 + 171 002a A842 cmp r0, r5 + 172 002c 10D0 beq .L25 + 173 002e 05F50065 add r5, r5, #2048 + 174 0032 A842 cmp r0, r5 + 175 0034 0CD0 beq .L25 + 176 0036 05F54065 add r5, r5, #3072 + ARM GAS /tmp/cc6kdh5W.s page 4 + + + 177 003a A842 cmp r0, r5 + 178 003c 0FD0 beq .L26 + 179 003e 05F58065 add r5, r5, #1024 + 180 0042 A842 cmp r0, r5 + 181 0044 0BD0 beq .L26 + 182 0046 05F58065 add r5, r5, #1024 + 183 004a A842 cmp r0, r5 + 184 004c 0FD1 bne .L27 + 185 004e 06E0 b .L26 + 186 .L25: + 187 0050 CD68 ldr r5, [r1, #12] + 188 0052 23F40043 bic r3, r3, #32768 + 189 0056 43EA0533 orr r3, r3, r5, lsl #12 + 190 005a 23F48043 bic r3, r3, #16384 + 191 .L26: + 192 005e D1E90565 ldrd r6, r5, [r1, #20] + 193 0062 24F44044 bic r4, r4, #49152 + 194 0066 46EA050C orr ip, r6, r5 + 195 006a 44EA8C14 orr r4, r4, ip, lsl #6 + 196 .L27: + 197 006e 4968 ldr r1, [r1, #4] + 198 0070 4460 str r4, [r0, #4] + 199 0072 C261 str r2, [r0, #28] + 200 0074 70BC pop {r4, r5, r6} + 201 0076 0164 str r1, [r0, #64] + 202 0078 0362 str r3, [r0, #32] + 203 007a 7047 bx lr + 204 .L31: + 205 .align 2 + 206 .L30: + 207 007c 002C0140 .word 1073818624 + 209 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits + 210 .align 1 + 211 .p2align 2,,3 + 212 .weak HAL_TIM_Base_MspInit + 213 .syntax unified + 214 .thumb + 215 .thumb_func + 216 .fpu fpv4-sp-d16 + 218 HAL_TIM_Base_MspInit: + 219 @ args = 0, pretend = 0, frame = 0 + 220 @ frame_needed = 0, uses_anonymous_args = 0 + 221 @ link register save eliminated. + 222 0000 7047 bx lr + 224 0002 00BF .section .text.HAL_TIM_Base_Init,"ax",%progbits + 225 .align 1 + 226 .p2align 2,,3 + 227 .global HAL_TIM_Base_Init + 228 .syntax unified + 229 .thumb + 230 .thumb_func + 231 .fpu fpv4-sp-d16 + 233 HAL_TIM_Base_Init: + 234 @ args = 0, pretend = 0, frame = 0 + 235 @ frame_needed = 0, uses_anonymous_args = 0 + 236 0000 0028 cmp r0, #0 + 237 0002 00F08180 beq .L48 + ARM GAS /tmp/cc6kdh5W.s page 5 + + + 238 0006 10B5 push {r4, lr} + 239 0008 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 240 000c 0446 mov r4, r0 + 241 000e 03F0FF02 and r2, r3, #255 + 242 0012 002B cmp r3, #0 + 243 0014 6DD0 beq .L56 + 244 .L35: + 245 0016 2268 ldr r2, [r4] + 246 0018 3C49 ldr r1, .L57 + 247 001a 0223 movs r3, #2 + 248 001c 84F83D30 strb r3, [r4, #61] + 249 0020 8A42 cmp r2, r1 + 250 0022 1368 ldr r3, [r2] + 251 0024 51D0 beq .L40 + 252 0026 B2F1804F cmp r2, #1073741824 + 253 002a 21D0 beq .L38 + 254 002c A1F59431 sub r1, r1, #75776 + 255 0030 8A42 cmp r2, r1 + 256 0032 1DD0 beq .L38 + 257 0034 01F58061 add r1, r1, #1024 + 258 0038 8A42 cmp r2, r1 + 259 003a 19D0 beq .L38 + 260 003c 01F59631 add r1, r1, #76800 + 261 0040 8A42 cmp r2, r1 + 262 0042 42D0 beq .L40 + 263 0044 01F54061 add r1, r1, #3072 + 264 0048 8A42 cmp r2, r1 + 265 004a 57D0 beq .L41 + 266 004c 01F58061 add r1, r1, #1024 + 267 0050 8A42 cmp r2, r1 + 268 0052 53D0 beq .L41 + 269 0054 01F58061 add r1, r1, #1024 + 270 0058 8A42 cmp r2, r1 + 271 005a 4FD0 beq .L41 + 272 005c A069 ldr r0, [r4, #24] + 273 005e E168 ldr r1, [r4, #12] + 274 0060 23F08003 bic r3, r3, #128 + 275 0064 0343 orrs r3, r3, r0 + 276 0066 1360 str r3, [r2] + 277 0068 6368 ldr r3, [r4, #4] + 278 006a D162 str r1, [r2, #44] + 279 006c 9362 str r3, [r2, #40] + 280 006e 10E0 b .L45 + 281 .L38: + 282 0070 A168 ldr r1, [r4, #8] + 283 0072 2069 ldr r0, [r4, #16] + 284 0074 23F07003 bic r3, r3, #112 + 285 0078 0B43 orrs r3, r3, r1 + 286 007a 23F44073 bic r3, r3, #768 + 287 007e A169 ldr r1, [r4, #24] + 288 0080 0343 orrs r3, r3, r0 + 289 0082 23F08003 bic r3, r3, #128 + 290 0086 E068 ldr r0, [r4, #12] + 291 0088 0B43 orrs r3, r3, r1 + 292 008a 6168 ldr r1, [r4, #4] + 293 008c 1360 str r3, [r2] + 294 008e D062 str r0, [r2, #44] + ARM GAS /tmp/cc6kdh5W.s page 6 + + + 295 0090 9162 str r1, [r2, #40] + 296 .L45: + 297 0092 0123 movs r3, #1 + 298 0094 5361 str r3, [r2, #20] + 299 0096 84F84830 strb r3, [r4, #72] + 300 009a 84F83E30 strb r3, [r4, #62] + 301 009e 84F83F30 strb r3, [r4, #63] + 302 00a2 84F84030 strb r3, [r4, #64] + 303 00a6 84F84130 strb r3, [r4, #65] + 304 00aa 84F84230 strb r3, [r4, #66] + 305 00ae 84F84330 strb r3, [r4, #67] + 306 00b2 84F84430 strb r3, [r4, #68] + 307 00b6 84F84530 strb r3, [r4, #69] + 308 00ba 84F84630 strb r3, [r4, #70] + 309 00be 84F84730 strb r3, [r4, #71] + 310 00c2 84F83D30 strb r3, [r4, #61] + 311 00c6 0020 movs r0, #0 + 312 00c8 10BD pop {r4, pc} + 313 .L40: + 314 00ca A068 ldr r0, [r4, #8] + 315 00cc 2169 ldr r1, [r4, #16] + 316 00ce 23F07003 bic r3, r3, #112 + 317 00d2 0343 orrs r3, r3, r0 + 318 00d4 23F44073 bic r3, r3, #768 + 319 00d8 0B43 orrs r3, r3, r1 + 320 00da A169 ldr r1, [r4, #24] + 321 .L55: + 322 00dc 23F08003 bic r3, r3, #128 + 323 00e0 0B43 orrs r3, r3, r1 + 324 00e2 1360 str r3, [r2] + 325 00e4 E368 ldr r3, [r4, #12] + 326 00e6 D362 str r3, [r2, #44] + 327 00e8 6368 ldr r3, [r4, #4] + 328 00ea 9362 str r3, [r2, #40] + 329 00ec 6369 ldr r3, [r4, #20] + 330 00ee 1363 str r3, [r2, #48] + 331 00f0 CFE7 b .L45 + 332 .L56: + 333 00f2 80F83C20 strb r2, [r0, #60] + 334 00f6 FFF7FEFF bl HAL_TIM_Base_MspInit + 335 00fa 8CE7 b .L35 + 336 .L41: + 337 00fc 2069 ldr r0, [r4, #16] + 338 00fe A169 ldr r1, [r4, #24] + 339 0100 23F44073 bic r3, r3, #768 + 340 0104 0343 orrs r3, r3, r0 + 341 0106 E9E7 b .L55 + 342 .L48: + 343 0108 0120 movs r0, #1 + 344 010a 7047 bx lr + 345 .L58: + 346 .align 2 + 347 .L57: + 348 010c 002C0140 .word 1073818624 + 350 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits + 351 .align 1 + 352 .p2align 2,,3 + ARM GAS /tmp/cc6kdh5W.s page 7 + + + 353 .weak HAL_TIM_Base_MspDeInit + 354 .syntax unified + 355 .thumb + 356 .thumb_func + 357 .fpu fpv4-sp-d16 + 359 HAL_TIM_Base_MspDeInit: + 360 @ args = 0, pretend = 0, frame = 0 + 361 @ frame_needed = 0, uses_anonymous_args = 0 + 362 @ link register save eliminated. + 363 0000 7047 bx lr + 365 0002 00BF .section .text.HAL_TIM_Base_DeInit,"ax",%progbits + 366 .align 1 + 367 .p2align 2,,3 + 368 .global HAL_TIM_Base_DeInit + 369 .syntax unified + 370 .thumb + 371 .thumb_func + 372 .fpu fpv4-sp-d16 + 374 HAL_TIM_Base_DeInit: + 375 @ args = 0, pretend = 0, frame = 0 + 376 @ frame_needed = 0, uses_anonymous_args = 0 + 377 0000 0222 movs r2, #2 + 378 0002 0368 ldr r3, [r0] + 379 0004 10B5 push {r4, lr} + 380 0006 80F83D20 strb r2, [r0, #61] + 381 000a 196A ldr r1, [r3, #32] + 382 000c 41F21112 movw r2, #4369 + 383 0010 1142 tst r1, r2 + 384 0012 0446 mov r4, r0 + 385 0014 08D1 bne .L61 + 386 0016 196A ldr r1, [r3, #32] + 387 0018 44F24442 movw r2, #17476 + 388 001c 1142 tst r1, r2 + 389 001e 03D1 bne .L61 + 390 0020 1A68 ldr r2, [r3] + 391 0022 22F00102 bic r2, r2, #1 + 392 0026 1A60 str r2, [r3] + 393 .L61: + 394 0028 2046 mov r0, r4 + 395 002a FFF7FEFF bl HAL_TIM_Base_MspDeInit + 396 002e 0020 movs r0, #0 + 397 0030 84F84800 strb r0, [r4, #72] + 398 0034 84F83C00 strb r0, [r4, #60] + 399 0038 84F83E00 strb r0, [r4, #62] + 400 003c 84F83F00 strb r0, [r4, #63] + 401 0040 84F84000 strb r0, [r4, #64] + 402 0044 84F84100 strb r0, [r4, #65] + 403 0048 84F84200 strb r0, [r4, #66] + 404 004c 84F84300 strb r0, [r4, #67] + 405 0050 84F84400 strb r0, [r4, #68] + 406 0054 84F84500 strb r0, [r4, #69] + 407 0058 84F84600 strb r0, [r4, #70] + 408 005c 84F84700 strb r0, [r4, #71] + 409 0060 84F83D00 strb r0, [r4, #61] + 410 0064 10BD pop {r4, pc} + 412 0066 00BF .section .text.HAL_TIM_Base_Start,"ax",%progbits + 413 .align 1 + ARM GAS /tmp/cc6kdh5W.s page 8 + + + 414 .p2align 2,,3 + 415 .global HAL_TIM_Base_Start + 416 .syntax unified + 417 .thumb + 418 .thumb_func + 419 .fpu fpv4-sp-d16 + 421 HAL_TIM_Base_Start: + 422 @ args = 0, pretend = 0, frame = 0 + 423 @ frame_needed = 0, uses_anonymous_args = 0 + 424 @ link register save eliminated. + 425 0000 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 426 0004 012B cmp r3, #1 + 427 0006 1FD1 bne .L67 + 428 0008 0368 ldr r3, [r0] + 429 000a 154A ldr r2, .L73 + 430 000c 0221 movs r1, #2 + 431 000e 9342 cmp r3, r2 + 432 0010 80F83D10 strb r1, [r0, #61] + 433 0014 1AD0 beq .L65 + 434 0016 B3F1804F cmp r3, #1073741824 + 435 001a 17D0 beq .L65 + 436 001c A2F59432 sub r2, r2, #75776 + 437 0020 9342 cmp r3, r2 + 438 0022 13D0 beq .L65 + 439 0024 02F58062 add r2, r2, #1024 + 440 0028 9342 cmp r3, r2 + 441 002a 0FD0 beq .L65 + 442 002c 02F59632 add r2, r2, #76800 + 443 0030 9342 cmp r3, r2 + 444 0032 0BD0 beq .L65 + 445 0034 02F54062 add r2, r2, #3072 + 446 0038 9342 cmp r3, r2 + 447 003a 07D0 beq .L65 + 448 .L66: + 449 003c 1A68 ldr r2, [r3] + 450 003e 42F00102 orr r2, r2, #1 + 451 0042 0020 movs r0, #0 + 452 0044 1A60 str r2, [r3] + 453 0046 7047 bx lr + 454 .L67: + 455 0048 0120 movs r0, #1 + 456 004a 7047 bx lr + 457 .L65: + 458 004c 9968 ldr r1, [r3, #8] + 459 004e 054A ldr r2, .L73+4 + 460 0050 0A40 ands r2, r2, r1 + 461 0052 062A cmp r2, #6 + 462 0054 02D0 beq .L69 + 463 0056 B2F5803F cmp r2, #65536 + 464 005a EFD1 bne .L66 + 465 .L69: + 466 005c 0020 movs r0, #0 + 467 005e 7047 bx lr + 468 .L74: + 469 .align 2 + 470 .L73: + 471 0060 002C0140 .word 1073818624 + ARM GAS /tmp/cc6kdh5W.s page 9 + + + 472 0064 07000100 .word 65543 + 474 .section .text.HAL_TIM_Base_Stop,"ax",%progbits + 475 .align 1 + 476 .p2align 2,,3 + 477 .global HAL_TIM_Base_Stop + 478 .syntax unified + 479 .thumb + 480 .thumb_func + 481 .fpu fpv4-sp-d16 + 483 HAL_TIM_Base_Stop: + 484 @ args = 0, pretend = 0, frame = 0 + 485 @ frame_needed = 0, uses_anonymous_args = 0 + 486 @ link register save eliminated. + 487 0000 0368 ldr r3, [r0] + 488 0002 196A ldr r1, [r3, #32] + 489 0004 41F21112 movw r2, #4369 + 490 0008 1142 tst r1, r2 + 491 000a 08D1 bne .L76 + 492 000c 196A ldr r1, [r3, #32] + 493 000e 44F24442 movw r2, #17476 + 494 0012 1142 tst r1, r2 + 495 0014 03D1 bne .L76 + 496 0016 1A68 ldr r2, [r3] + 497 0018 22F00102 bic r2, r2, #1 + 498 001c 1A60 str r2, [r3] + 499 .L76: + 500 001e 0123 movs r3, #1 + 501 0020 80F83D30 strb r3, [r0, #61] + 502 0024 0020 movs r0, #0 + 503 0026 7047 bx lr + 505 .section .text.HAL_TIM_Base_Start_IT,"ax",%progbits + 506 .align 1 + 507 .p2align 2,,3 + 508 .global HAL_TIM_Base_Start_IT + 509 .syntax unified + 510 .thumb + 511 .thumb_func + 512 .fpu fpv4-sp-d16 + 514 HAL_TIM_Base_Start_IT: + 515 @ args = 0, pretend = 0, frame = 0 + 516 @ frame_needed = 0, uses_anonymous_args = 0 + 517 @ link register save eliminated. + 518 0000 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 519 0004 012B cmp r3, #1 + 520 0006 22D1 bne .L81 + 521 0008 0368 ldr r3, [r0] + 522 000a 1749 ldr r1, .L87 + 523 000c 0222 movs r2, #2 + 524 000e 80F83D20 strb r2, [r0, #61] + 525 0012 DA68 ldr r2, [r3, #12] + 526 0014 8B42 cmp r3, r1 + 527 0016 42F00102 orr r2, r2, #1 + 528 001a DA60 str r2, [r3, #12] + 529 001c 19D0 beq .L79 + 530 001e B3F1804F cmp r3, #1073741824 + 531 0022 16D0 beq .L79 + 532 0024 114A ldr r2, .L87+4 + ARM GAS /tmp/cc6kdh5W.s page 10 + + + 533 0026 9342 cmp r3, r2 + 534 0028 13D0 beq .L79 + 535 002a 02F58062 add r2, r2, #1024 + 536 002e 9342 cmp r3, r2 + 537 0030 0FD0 beq .L79 + 538 0032 02F59632 add r2, r2, #76800 + 539 0036 9342 cmp r3, r2 + 540 0038 0BD0 beq .L79 + 541 003a 02F54062 add r2, r2, #3072 + 542 003e 9342 cmp r3, r2 + 543 0040 07D0 beq .L79 + 544 .L80: + 545 0042 1A68 ldr r2, [r3] + 546 0044 42F00102 orr r2, r2, #1 + 547 0048 0020 movs r0, #0 + 548 004a 1A60 str r2, [r3] + 549 004c 7047 bx lr + 550 .L81: + 551 004e 0120 movs r0, #1 + 552 0050 7047 bx lr + 553 .L79: + 554 0052 9968 ldr r1, [r3, #8] + 555 0054 064A ldr r2, .L87+8 + 556 0056 0A40 ands r2, r2, r1 + 557 0058 062A cmp r2, #6 + 558 005a 02D0 beq .L83 + 559 005c B2F5803F cmp r2, #65536 + 560 0060 EFD1 bne .L80 + 561 .L83: + 562 0062 0020 movs r0, #0 + 563 0064 7047 bx lr + 564 .L88: + 565 0066 00BF .align 2 + 566 .L87: + 567 0068 002C0140 .word 1073818624 + 568 006c 00040040 .word 1073742848 + 569 0070 07000100 .word 65543 + 571 .section .text.HAL_TIM_Base_Stop_IT,"ax",%progbits + 572 .align 1 + 573 .p2align 2,,3 + 574 .global HAL_TIM_Base_Stop_IT + 575 .syntax unified + 576 .thumb + 577 .thumb_func + 578 .fpu fpv4-sp-d16 + 580 HAL_TIM_Base_Stop_IT: + 581 @ args = 0, pretend = 0, frame = 0 + 582 @ frame_needed = 0, uses_anonymous_args = 0 + 583 @ link register save eliminated. + 584 0000 0368 ldr r3, [r0] + 585 0002 DA68 ldr r2, [r3, #12] + 586 0004 22F00102 bic r2, r2, #1 + 587 0008 DA60 str r2, [r3, #12] + 588 000a 1A6A ldr r2, [r3, #32] + 589 000c 41F21111 movw r1, #4369 + 590 0010 0A42 tst r2, r1 + 591 0012 08D1 bne .L90 + ARM GAS /tmp/cc6kdh5W.s page 11 + + + 592 0014 196A ldr r1, [r3, #32] + 593 0016 44F24442 movw r2, #17476 + 594 001a 1142 tst r1, r2 + 595 001c 03D1 bne .L90 + 596 001e 1A68 ldr r2, [r3] + 597 0020 22F00102 bic r2, r2, #1 + 598 0024 1A60 str r2, [r3] + 599 .L90: + 600 0026 0123 movs r3, #1 + 601 0028 80F83D30 strb r3, [r0, #61] + 602 002c 0020 movs r0, #0 + 603 002e 7047 bx lr + 605 .section .text.HAL_TIM_Base_Start_DMA,"ax",%progbits + 606 .align 1 + 607 .p2align 2,,3 + 608 .global HAL_TIM_Base_Start_DMA + 609 .syntax unified + 610 .thumb + 611 .thumb_func + 612 .fpu fpv4-sp-d16 + 614 HAL_TIM_Base_Start_DMA: + 615 @ args = 0, pretend = 0, frame = 0 + 616 @ frame_needed = 0, uses_anonymous_args = 0 + 617 0000 38B5 push {r3, r4, r5, lr} + 618 0002 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 619 0006 022B cmp r3, #2 + 620 0008 0446 mov r4, r0 + 621 000a D8B2 uxtb r0, r3 + 622 000c 3BD0 beq .L92 + 623 000e 94F83D30 ldrb r3, [r4, #61] @ zero_extendqisi2 + 624 0012 012B cmp r3, #1 + 625 0014 3AD1 bne .L95 + 626 0016 0029 cmp r1, #0 + 627 0018 36D0 beq .L111 + 628 .L94: + 629 001a 206A ldr r0, [r4, #32] + 630 001c 1C4D ldr r5, .L112 + 631 001e 0223 movs r3, #2 + 632 0020 84F83D30 strb r3, [r4, #61] + 633 0024 1346 mov r3, r2 + 634 0026 1B4A ldr r2, .L112+4 + 635 0028 0263 str r2, [r0, #48] + 636 002a 1B4A ldr r2, .L112+8 + 637 002c 4263 str r2, [r0, #52] + 638 002e 2268 ldr r2, [r4] + 639 0030 C562 str r5, [r0, #44] + 640 0032 2C32 adds r2, r2, #44 + 641 0034 FFF7FEFF bl HAL_DMA_Start_IT + 642 0038 40BB cbnz r0, .L95 + 643 003a 2368 ldr r3, [r4] + 644 003c 1749 ldr r1, .L112+12 + 645 003e DA68 ldr r2, [r3, #12] + 646 0040 8B42 cmp r3, r1 + 647 0042 42F48072 orr r2, r2, #256 + 648 0046 DA60 str r2, [r3, #12] + 649 0048 11D0 beq .L96 + 650 004a B3F1804F cmp r3, #1073741824 + ARM GAS /tmp/cc6kdh5W.s page 12 + + + 651 004e 0ED0 beq .L96 + 652 0050 134A ldr r2, .L112+16 + 653 0052 9342 cmp r3, r2 + 654 0054 0BD0 beq .L96 + 655 0056 02F58062 add r2, r2, #1024 + 656 005a 9342 cmp r3, r2 + 657 005c 07D0 beq .L96 + 658 005e 02F59632 add r2, r2, #76800 + 659 0062 9342 cmp r3, r2 + 660 0064 03D0 beq .L96 + 661 0066 02F54062 add r2, r2, #3072 + 662 006a 9342 cmp r3, r2 + 663 006c 07D1 bne .L97 + 664 .L96: + 665 006e 9968 ldr r1, [r3, #8] + 666 0070 0C4A ldr r2, .L112+20 + 667 0072 0A40 ands r2, r2, r1 + 668 0074 062A cmp r2, #6 + 669 0076 06D0 beq .L92 + 670 0078 B2F5803F cmp r2, #65536 + 671 007c 03D0 beq .L92 + 672 .L97: + 673 007e 1A68 ldr r2, [r3] + 674 0080 42F00102 orr r2, r2, #1 + 675 0084 1A60 str r2, [r3] + 676 .L92: + 677 0086 38BD pop {r3, r4, r5, pc} + 678 .L111: + 679 0088 002A cmp r2, #0 + 680 008a C6D0 beq .L94 + 681 .L95: + 682 008c 0120 movs r0, #1 + 683 008e 38BD pop {r3, r4, r5, pc} + 684 .L113: + 685 .align 2 + 686 .L112: + 687 0090 00000000 .word TIM_DMAPeriodElapsedCplt + 688 0094 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 689 0098 00000000 .word TIM_DMAError + 690 009c 002C0140 .word 1073818624 + 691 00a0 00040040 .word 1073742848 + 692 00a4 07000100 .word 65543 + 694 .section .text.HAL_TIM_Base_Stop_DMA,"ax",%progbits + 695 .align 1 + 696 .p2align 2,,3 + 697 .global HAL_TIM_Base_Stop_DMA + 698 .syntax unified + 699 .thumb + 700 .thumb_func + 701 .fpu fpv4-sp-d16 + 703 HAL_TIM_Base_Stop_DMA: + 704 @ args = 0, pretend = 0, frame = 0 + 705 @ frame_needed = 0, uses_anonymous_args = 0 + 706 0000 0268 ldr r2, [r0] + 707 0002 D368 ldr r3, [r2, #12] + 708 0004 10B5 push {r4, lr} + 709 0006 23F48073 bic r3, r3, #256 + ARM GAS /tmp/cc6kdh5W.s page 13 + + + 710 000a 0446 mov r4, r0 + 711 000c 006A ldr r0, [r0, #32] + 712 000e D360 str r3, [r2, #12] + 713 0010 FFF7FEFF bl HAL_DMA_Abort_IT + 714 0014 2368 ldr r3, [r4] + 715 0016 196A ldr r1, [r3, #32] + 716 0018 41F21112 movw r2, #4369 + 717 001c 1142 tst r1, r2 + 718 001e 08D1 bne .L115 + 719 0020 196A ldr r1, [r3, #32] + 720 0022 44F24442 movw r2, #17476 + 721 0026 1142 tst r1, r2 + 722 0028 03D1 bne .L115 + 723 002a 1A68 ldr r2, [r3] + 724 002c 22F00102 bic r2, r2, #1 + 725 0030 1A60 str r2, [r3] + 726 .L115: + 727 0032 0123 movs r3, #1 + 728 0034 84F83D30 strb r3, [r4, #61] + 729 0038 0020 movs r0, #0 + 730 003a 10BD pop {r4, pc} + 732 .section .text.HAL_TIM_OC_MspInit,"ax",%progbits + 733 .align 1 + 734 .p2align 2,,3 + 735 .weak HAL_TIM_OC_MspInit + 736 .syntax unified + 737 .thumb + 738 .thumb_func + 739 .fpu fpv4-sp-d16 + 741 HAL_TIM_OC_MspInit: + 742 @ args = 0, pretend = 0, frame = 0 + 743 @ frame_needed = 0, uses_anonymous_args = 0 + 744 @ link register save eliminated. + 745 0000 7047 bx lr + 747 0002 00BF .section .text.HAL_TIM_OC_Init,"ax",%progbits + 748 .align 1 + 749 .p2align 2,,3 + 750 .global HAL_TIM_OC_Init + 751 .syntax unified + 752 .thumb + 753 .thumb_func + 754 .fpu fpv4-sp-d16 + 756 HAL_TIM_OC_Init: + 757 @ args = 0, pretend = 0, frame = 0 + 758 @ frame_needed = 0, uses_anonymous_args = 0 + 759 0000 0028 cmp r0, #0 + 760 0002 00F08180 beq .L133 + 761 0006 10B5 push {r4, lr} + 762 0008 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 763 000c 0446 mov r4, r0 + 764 000e 03F0FF02 and r2, r3, #255 + 765 0012 002B cmp r3, #0 + 766 0014 6DD0 beq .L141 + 767 .L120: + 768 0016 2268 ldr r2, [r4] + 769 0018 3C49 ldr r1, .L142 + 770 001a 0223 movs r3, #2 + ARM GAS /tmp/cc6kdh5W.s page 14 + + + 771 001c 84F83D30 strb r3, [r4, #61] + 772 0020 8A42 cmp r2, r1 + 773 0022 1368 ldr r3, [r2] + 774 0024 51D0 beq .L125 + 775 0026 B2F1804F cmp r2, #1073741824 + 776 002a 21D0 beq .L123 + 777 002c A1F59431 sub r1, r1, #75776 + 778 0030 8A42 cmp r2, r1 + 779 0032 1DD0 beq .L123 + 780 0034 01F58061 add r1, r1, #1024 + 781 0038 8A42 cmp r2, r1 + 782 003a 19D0 beq .L123 + 783 003c 01F59631 add r1, r1, #76800 + 784 0040 8A42 cmp r2, r1 + 785 0042 42D0 beq .L125 + 786 0044 01F54061 add r1, r1, #3072 + 787 0048 8A42 cmp r2, r1 + 788 004a 57D0 beq .L126 + 789 004c 01F58061 add r1, r1, #1024 + 790 0050 8A42 cmp r2, r1 + 791 0052 53D0 beq .L126 + 792 0054 01F58061 add r1, r1, #1024 + 793 0058 8A42 cmp r2, r1 + 794 005a 4FD0 beq .L126 + 795 005c A069 ldr r0, [r4, #24] + 796 005e E168 ldr r1, [r4, #12] + 797 0060 23F08003 bic r3, r3, #128 + 798 0064 0343 orrs r3, r3, r0 + 799 0066 1360 str r3, [r2] + 800 0068 6368 ldr r3, [r4, #4] + 801 006a D162 str r1, [r2, #44] + 802 006c 9362 str r3, [r2, #40] + 803 006e 10E0 b .L130 + 804 .L123: + 805 0070 A168 ldr r1, [r4, #8] + 806 0072 2069 ldr r0, [r4, #16] + 807 0074 23F07003 bic r3, r3, #112 + 808 0078 0B43 orrs r3, r3, r1 + 809 007a 23F44073 bic r3, r3, #768 + 810 007e A169 ldr r1, [r4, #24] + 811 0080 0343 orrs r3, r3, r0 + 812 0082 23F08003 bic r3, r3, #128 + 813 0086 E068 ldr r0, [r4, #12] + 814 0088 0B43 orrs r3, r3, r1 + 815 008a 6168 ldr r1, [r4, #4] + 816 008c 1360 str r3, [r2] + 817 008e D062 str r0, [r2, #44] + 818 0090 9162 str r1, [r2, #40] + 819 .L130: + 820 0092 0123 movs r3, #1 + 821 0094 5361 str r3, [r2, #20] + 822 0096 84F84830 strb r3, [r4, #72] + 823 009a 84F83E30 strb r3, [r4, #62] + 824 009e 84F83F30 strb r3, [r4, #63] + 825 00a2 84F84030 strb r3, [r4, #64] + 826 00a6 84F84130 strb r3, [r4, #65] + 827 00aa 84F84230 strb r3, [r4, #66] + ARM GAS /tmp/cc6kdh5W.s page 15 + + + 828 00ae 84F84330 strb r3, [r4, #67] + 829 00b2 84F84430 strb r3, [r4, #68] + 830 00b6 84F84530 strb r3, [r4, #69] + 831 00ba 84F84630 strb r3, [r4, #70] + 832 00be 84F84730 strb r3, [r4, #71] + 833 00c2 84F83D30 strb r3, [r4, #61] + 834 00c6 0020 movs r0, #0 + 835 00c8 10BD pop {r4, pc} + 836 .L125: + 837 00ca A068 ldr r0, [r4, #8] + 838 00cc 2169 ldr r1, [r4, #16] + 839 00ce 23F07003 bic r3, r3, #112 + 840 00d2 0343 orrs r3, r3, r0 + 841 00d4 23F44073 bic r3, r3, #768 + 842 00d8 0B43 orrs r3, r3, r1 + 843 00da A169 ldr r1, [r4, #24] + 844 .L140: + 845 00dc 23F08003 bic r3, r3, #128 + 846 00e0 0B43 orrs r3, r3, r1 + 847 00e2 1360 str r3, [r2] + 848 00e4 E368 ldr r3, [r4, #12] + 849 00e6 D362 str r3, [r2, #44] + 850 00e8 6368 ldr r3, [r4, #4] + 851 00ea 9362 str r3, [r2, #40] + 852 00ec 6369 ldr r3, [r4, #20] + 853 00ee 1363 str r3, [r2, #48] + 854 00f0 CFE7 b .L130 + 855 .L141: + 856 00f2 80F83C20 strb r2, [r0, #60] + 857 00f6 FFF7FEFF bl HAL_TIM_OC_MspInit + 858 00fa 8CE7 b .L120 + 859 .L126: + 860 00fc 2069 ldr r0, [r4, #16] + 861 00fe A169 ldr r1, [r4, #24] + 862 0100 23F44073 bic r3, r3, #768 + 863 0104 0343 orrs r3, r3, r0 + 864 0106 E9E7 b .L140 + 865 .L133: + 866 0108 0120 movs r0, #1 + 867 010a 7047 bx lr + 868 .L143: + 869 .align 2 + 870 .L142: + 871 010c 002C0140 .word 1073818624 + 873 .section .text.HAL_TIM_OC_MspDeInit,"ax",%progbits + 874 .align 1 + 875 .p2align 2,,3 + 876 .weak HAL_TIM_OC_MspDeInit + 877 .syntax unified + 878 .thumb + 879 .thumb_func + 880 .fpu fpv4-sp-d16 + 882 HAL_TIM_OC_MspDeInit: + 883 @ args = 0, pretend = 0, frame = 0 + 884 @ frame_needed = 0, uses_anonymous_args = 0 + 885 @ link register save eliminated. + 886 0000 7047 bx lr + ARM GAS /tmp/cc6kdh5W.s page 16 + + + 888 0002 00BF .section .text.HAL_TIM_OC_DeInit,"ax",%progbits + 889 .align 1 + 890 .p2align 2,,3 + 891 .global HAL_TIM_OC_DeInit + 892 .syntax unified + 893 .thumb + 894 .thumb_func + 895 .fpu fpv4-sp-d16 + 897 HAL_TIM_OC_DeInit: + 898 @ args = 0, pretend = 0, frame = 0 + 899 @ frame_needed = 0, uses_anonymous_args = 0 + 900 0000 0222 movs r2, #2 + 901 0002 0368 ldr r3, [r0] + 902 0004 10B5 push {r4, lr} + 903 0006 80F83D20 strb r2, [r0, #61] + 904 000a 196A ldr r1, [r3, #32] + 905 000c 41F21112 movw r2, #4369 + 906 0010 1142 tst r1, r2 + 907 0012 0446 mov r4, r0 + 908 0014 08D1 bne .L146 + 909 0016 196A ldr r1, [r3, #32] + 910 0018 44F24442 movw r2, #17476 + 911 001c 1142 tst r1, r2 + 912 001e 03D1 bne .L146 + 913 0020 1A68 ldr r2, [r3] + 914 0022 22F00102 bic r2, r2, #1 + 915 0026 1A60 str r2, [r3] + 916 .L146: + 917 0028 2046 mov r0, r4 + 918 002a FFF7FEFF bl HAL_TIM_OC_MspDeInit + 919 002e 0020 movs r0, #0 + 920 0030 84F84800 strb r0, [r4, #72] + 921 0034 84F83C00 strb r0, [r4, #60] + 922 0038 84F83E00 strb r0, [r4, #62] + 923 003c 84F83F00 strb r0, [r4, #63] + 924 0040 84F84000 strb r0, [r4, #64] + 925 0044 84F84100 strb r0, [r4, #65] + 926 0048 84F84200 strb r0, [r4, #66] + 927 004c 84F84300 strb r0, [r4, #67] + 928 0050 84F84400 strb r0, [r4, #68] + 929 0054 84F84500 strb r0, [r4, #69] + 930 0058 84F84600 strb r0, [r4, #70] + 931 005c 84F84700 strb r0, [r4, #71] + 932 0060 84F83D00 strb r0, [r4, #61] + 933 0064 10BD pop {r4, pc} + 935 0066 00BF .section .text.HAL_TIM_OC_Start,"ax",%progbits + 936 .align 1 + 937 .p2align 2,,3 + 938 .global HAL_TIM_OC_Start + 939 .syntax unified + 940 .thumb + 941 .thumb_func + 942 .fpu fpv4-sp-d16 + 944 HAL_TIM_OC_Start: + 945 @ args = 0, pretend = 0, frame = 0 + 946 @ frame_needed = 0, uses_anonymous_args = 0 + 947 @ link register save eliminated. + ARM GAS /tmp/cc6kdh5W.s page 17 + + + 948 0000 0029 cmp r1, #0 + 949 0002 4AD1 bne .L149 + 950 0004 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 951 0008 012B cmp r3, #1 + 952 000a 50D1 bne .L174 + 953 000c 0223 movs r3, #2 + 954 000e 80F83E30 strb r3, [r0, #62] + 955 .L160: + 956 0012 0368 ldr r3, [r0] + 957 0014 0122 movs r2, #1 + 958 0016 186A ldr r0, [r3, #32] + 959 0018 01F01F01 and r1, r1, #31 + 960 001c 02FA01F1 lsl r1, r2, r1 + 961 0020 20EA0100 bic r0, r0, r1 + 962 0024 1862 str r0, [r3, #32] + 963 0026 186A ldr r0, [r3, #32] + 964 0028 3B4A ldr r2, .L188 + 965 002a 0143 orrs r1, r1, r0 + 966 002c 9342 cmp r3, r2 + 967 002e 1962 str r1, [r3, #32] + 968 0030 51D0 beq .L164 + 969 0032 02F50062 add r2, r2, #2048 + 970 0036 9342 cmp r3, r2 + 971 0038 0BD0 beq .L165 + 972 003a 02F54062 add r2, r2, #3072 + 973 003e 9342 cmp r3, r2 + 974 0040 07D0 beq .L165 + 975 0042 02F58062 add r2, r2, #1024 + 976 0046 9342 cmp r3, r2 + 977 0048 03D0 beq .L165 + 978 004a 02F58062 add r2, r2, #1024 + 979 004e 9342 cmp r3, r2 + 980 0050 03D1 bne .L168 + 981 .L165: + 982 0052 5A6C ldr r2, [r3, #68] + 983 0054 42F40042 orr r2, r2, #32768 + 984 0058 5A64 str r2, [r3, #68] + 985 .L168: + 986 005a B3F1804F cmp r3, #1073741824 + 987 005e 0ED0 beq .L166 + 988 0060 2E4A ldr r2, .L188+4 + 989 0062 9342 cmp r3, r2 + 990 0064 0BD0 beq .L166 + 991 0066 02F58062 add r2, r2, #1024 + 992 006a 9342 cmp r3, r2 + 993 006c 07D0 beq .L166 + 994 006e 02F59632 add r2, r2, #76800 + 995 0072 9342 cmp r3, r2 + 996 0074 03D0 beq .L166 + 997 0076 02F54062 add r2, r2, #3072 + 998 007a 9342 cmp r3, r2 + 999 007c 07D1 bne .L167 + 1000 .L166: + 1001 007e 9968 ldr r1, [r3, #8] + 1002 0080 274A ldr r2, .L188+8 + 1003 0082 0A40 ands r2, r2, r1 + 1004 0084 062A cmp r2, #6 + ARM GAS /tmp/cc6kdh5W.s page 18 + + + 1005 0086 14D0 beq .L176 + 1006 0088 B2F5803F cmp r2, #65536 + 1007 008c 11D0 beq .L176 + 1008 .L167: + 1009 008e 1A68 ldr r2, [r3] + 1010 0090 42F00102 orr r2, r2, #1 + 1011 0094 0020 movs r0, #0 + 1012 0096 1A60 str r2, [r3] + 1013 0098 7047 bx lr + 1014 .L149: + 1015 009a 0429 cmp r1, #4 + 1016 009c 20D0 beq .L185 + 1017 009e 0829 cmp r1, #8 + 1018 00a0 26D0 beq .L186 + 1019 00a2 0C29 cmp r1, #12 + 1020 00a4 07D1 bne .L156 + 1021 00a6 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 1022 00aa 012B cmp r3, #1 + 1023 00ac 28D0 beq .L157 + 1024 .L174: + 1025 00ae 0120 movs r0, #1 + 1026 00b0 7047 bx lr + 1027 .L176: + 1028 00b2 0020 movs r0, #0 + 1029 00b4 7047 bx lr + 1030 .L156: + 1031 00b6 1029 cmp r1, #16 + 1032 00b8 26D0 beq .L187 + 1033 00ba 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 1034 00be 012B cmp r3, #1 + 1035 00c0 F5D1 bne .L174 + 1036 00c2 0829 cmp r1, #8 + 1037 00c4 18D0 beq .L155 + 1038 00c6 0C29 cmp r1, #12 + 1039 00c8 1AD0 beq .L157 + 1040 00ca 1029 cmp r1, #16 + 1041 00cc 20D0 beq .L182 + 1042 00ce 0223 movs r3, #2 + 1043 00d0 80F84330 strb r3, [r0, #67] + 1044 00d4 9DE7 b .L160 + 1045 .L164: + 1046 00d6 5A6C ldr r2, [r3, #68] + 1047 00d8 42F40042 orr r2, r2, #32768 + 1048 00dc 5A64 str r2, [r3, #68] + 1049 00de CEE7 b .L166 + 1050 .L185: + 1051 00e0 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 1052 00e4 012B cmp r3, #1 + 1053 00e6 E2D1 bne .L174 + 1054 00e8 0223 movs r3, #2 + 1055 00ea 80F83F30 strb r3, [r0, #63] + 1056 00ee 90E7 b .L160 + 1057 .L186: + 1058 00f0 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 1059 00f4 012B cmp r3, #1 + 1060 00f6 DAD1 bne .L174 + 1061 .L155: + ARM GAS /tmp/cc6kdh5W.s page 19 + + + 1062 00f8 0223 movs r3, #2 + 1063 00fa 80F84030 strb r3, [r0, #64] + 1064 00fe 88E7 b .L160 + 1065 .L157: + 1066 0100 0223 movs r3, #2 + 1067 0102 80F84130 strb r3, [r0, #65] + 1068 0106 84E7 b .L160 + 1069 .L187: + 1070 0108 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 1071 010c 012B cmp r3, #1 + 1072 010e CED1 bne .L174 + 1073 .L182: + 1074 0110 0223 movs r3, #2 + 1075 0112 80F84230 strb r3, [r0, #66] + 1076 0116 7CE7 b .L160 + 1077 .L189: + 1078 .align 2 + 1079 .L188: + 1080 0118 002C0140 .word 1073818624 + 1081 011c 00040040 .word 1073742848 + 1082 0120 07000100 .word 65543 + 1084 .section .text.HAL_TIM_OC_Stop,"ax",%progbits + 1085 .align 1 + 1086 .p2align 2,,3 + 1087 .global HAL_TIM_OC_Stop + 1088 .syntax unified + 1089 .thumb + 1090 .thumb_func + 1091 .fpu fpv4-sp-d16 + 1093 HAL_TIM_OC_Stop: + 1094 @ args = 0, pretend = 0, frame = 0 + 1095 @ frame_needed = 0, uses_anonymous_args = 0 + 1096 @ link register save eliminated. + 1097 0000 0368 ldr r3, [r0] + 1098 0002 10B4 push {r4} + 1099 0004 1A6A ldr r2, [r3, #32] + 1100 0006 01F01F04 and r4, r1, #31 + 1101 000a 4FF0010C mov ip, #1 + 1102 000e 0CFA04FC lsl ip, ip, r4 + 1103 0012 22EA0C02 bic r2, r2, ip + 1104 0016 1A62 str r2, [r3, #32] + 1105 0018 2C4A ldr r2, .L205 + 1106 001a 1C6A ldr r4, [r3, #32] + 1107 001c 1C62 str r4, [r3, #32] + 1108 001e 9342 cmp r3, r2 + 1109 0020 21D0 beq .L191 + 1110 0022 02F50062 add r2, r2, #2048 + 1111 0026 9342 cmp r3, r2 + 1112 0028 1DD0 beq .L191 + 1113 002a 02F54062 add r2, r2, #3072 + 1114 002e 9342 cmp r3, r2 + 1115 0030 19D0 beq .L191 + 1116 0032 02F58062 add r2, r2, #1024 + 1117 0036 9342 cmp r3, r2 + 1118 0038 15D0 beq .L191 + 1119 003a 02F58062 add r2, r2, #1024 + 1120 003e 9342 cmp r3, r2 + ARM GAS /tmp/cc6kdh5W.s page 20 + + + 1121 0040 11D0 beq .L191 + 1122 .L192: + 1123 0042 1C6A ldr r4, [r3, #32] + 1124 0044 41F21112 movw r2, #4369 + 1125 0048 1442 tst r4, r2 + 1126 004a 04D1 bne .L193 + 1127 004c 1C6A ldr r4, [r3, #32] + 1128 004e 44F24442 movw r2, #17476 + 1129 0052 1442 tst r4, r2 + 1130 0054 26D0 beq .L201 + 1131 .L193: + 1132 0056 0123 movs r3, #1 + 1133 0058 A1B9 cbnz r1, .L194 + 1134 005a 80F83E30 strb r3, [r0, #62] + 1135 .L195: + 1136 005e 0020 movs r0, #0 + 1137 0060 5DF8044B ldr r4, [sp], #4 + 1138 0064 7047 bx lr + 1139 .L191: + 1140 0066 1C6A ldr r4, [r3, #32] + 1141 0068 41F21112 movw r2, #4369 + 1142 006c 1442 tst r4, r2 + 1143 006e E8D1 bne .L192 + 1144 0070 1C6A ldr r4, [r3, #32] + 1145 0072 44F24442 movw r2, #17476 + 1146 0076 1442 tst r4, r2 + 1147 0078 E3D1 bne .L192 + 1148 007a 5A6C ldr r2, [r3, #68] + 1149 007c 22F40042 bic r2, r2, #32768 + 1150 0080 5A64 str r2, [r3, #68] + 1151 0082 DEE7 b .L192 + 1152 .L194: + 1153 0084 0429 cmp r1, #4 + 1154 0086 12D0 beq .L202 + 1155 0088 0829 cmp r1, #8 + 1156 008a 19D0 beq .L203 + 1157 008c 0C29 cmp r1, #12 + 1158 008e 14D0 beq .L204 + 1159 0090 1029 cmp r1, #16 + 1160 0092 0CBF ite eq + 1161 0094 80F84230 strbeq r3, [r0, #66] + 1162 0098 80F84330 strbne r3, [r0, #67] + 1163 009c 5DF8044B ldr r4, [sp], #4 + 1164 00a0 0020 movs r0, #0 + 1165 00a2 7047 bx lr + 1166 .L201: + 1167 00a4 1A68 ldr r2, [r3] + 1168 00a6 22F00102 bic r2, r2, #1 + 1169 00aa 1A60 str r2, [r3] + 1170 00ac D3E7 b .L193 + 1171 .L202: + 1172 00ae 80F83F30 strb r3, [r0, #63] + 1173 00b2 5DF8044B ldr r4, [sp], #4 + 1174 00b6 0020 movs r0, #0 + 1175 00b8 7047 bx lr + 1176 .L204: + 1177 00ba 80F84130 strb r3, [r0, #65] + ARM GAS /tmp/cc6kdh5W.s page 21 + + + 1178 00be CEE7 b .L195 + 1179 .L203: + 1180 00c0 80F84030 strb r3, [r0, #64] + 1181 00c4 5DF8044B ldr r4, [sp], #4 + 1182 00c8 0020 movs r0, #0 + 1183 00ca 7047 bx lr + 1184 .L206: + 1185 .align 2 + 1186 .L205: + 1187 00cc 002C0140 .word 1073818624 + 1189 .section .text.HAL_TIM_OC_Start_IT,"ax",%progbits + 1190 .align 1 + 1191 .p2align 2,,3 + 1192 .global HAL_TIM_OC_Start_IT + 1193 .syntax unified + 1194 .thumb + 1195 .thumb_func + 1196 .fpu fpv4-sp-d16 + 1198 HAL_TIM_OC_Start_IT: + 1199 @ args = 0, pretend = 0, frame = 0 + 1200 @ frame_needed = 0, uses_anonymous_args = 0 + 1201 @ link register save eliminated. + 1202 0000 0029 cmp r1, #0 + 1203 0002 4FD1 bne .L208 + 1204 0004 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 1205 0008 012B cmp r3, #1 + 1206 000a 55D1 bne .L238 + 1207 000c 0368 ldr r3, [r0] + 1208 000e 0222 movs r2, #2 + 1209 0010 80F83E20 strb r2, [r0, #62] + 1210 0014 DA68 ldr r2, [r3, #12] + 1211 0016 42F00202 orr r2, r2, #2 + 1212 001a DA60 str r2, [r3, #12] + 1213 .L219: + 1214 001c 186A ldr r0, [r3, #32] + 1215 001e 0122 movs r2, #1 + 1216 0020 01F01F01 and r1, r1, #31 + 1217 0024 02FA01F1 lsl r1, r2, r1 + 1218 0028 20EA0100 bic r0, r0, r1 + 1219 002c 1862 str r0, [r3, #32] + 1220 002e 186A ldr r0, [r3, #32] + 1221 0030 504A ldr r2, .L252 + 1222 0032 0143 orrs r1, r1, r0 + 1223 0034 9342 cmp r3, r2 + 1224 0036 1962 str r1, [r3, #32] + 1225 0038 00F08D80 beq .L227 + 1226 003c 02F50062 add r2, r2, #2048 + 1227 0040 9342 cmp r3, r2 + 1228 0042 0BD0 beq .L228 + 1229 0044 02F54062 add r2, r2, #3072 + 1230 0048 9342 cmp r3, r2 + 1231 004a 07D0 beq .L228 + 1232 004c 02F58062 add r2, r2, #1024 + 1233 0050 9342 cmp r3, r2 + 1234 0052 03D0 beq .L228 + 1235 0054 02F58062 add r2, r2, #1024 + 1236 0058 9342 cmp r3, r2 + ARM GAS /tmp/cc6kdh5W.s page 22 + + + 1237 005a 03D1 bne .L231 + 1238 .L228: + 1239 005c 5A6C ldr r2, [r3, #68] + 1240 005e 42F40042 orr r2, r2, #32768 + 1241 0062 5A64 str r2, [r3, #68] + 1242 .L231: + 1243 0064 B3F1804F cmp r3, #1073741824 + 1244 0068 0ED0 beq .L229 + 1245 006a 434A ldr r2, .L252+4 + 1246 006c 9342 cmp r3, r2 + 1247 006e 0BD0 beq .L229 + 1248 0070 02F58062 add r2, r2, #1024 + 1249 0074 9342 cmp r3, r2 + 1250 0076 07D0 beq .L229 + 1251 0078 02F59632 add r2, r2, #76800 + 1252 007c 9342 cmp r3, r2 + 1253 007e 03D0 beq .L229 + 1254 0080 02F54062 add r2, r2, #3072 + 1255 0084 9342 cmp r3, r2 + 1256 0086 07D1 bne .L230 + 1257 .L229: + 1258 0088 9968 ldr r1, [r3, #8] + 1259 008a 3C4A ldr r2, .L252+8 + 1260 008c 0A40 ands r2, r2, r1 + 1261 008e 062A cmp r2, #6 + 1262 0090 14D0 beq .L240 + 1263 0092 B2F5803F cmp r2, #65536 + 1264 0096 11D0 beq .L240 + 1265 .L230: + 1266 0098 1A68 ldr r2, [r3] + 1267 009a 42F00102 orr r2, r2, #1 + 1268 009e 0020 movs r0, #0 + 1269 00a0 1A60 str r2, [r3] + 1270 00a2 7047 bx lr + 1271 .L208: + 1272 00a4 0429 cmp r1, #4 + 1273 00a6 40D0 beq .L249 + 1274 00a8 0829 cmp r1, #8 + 1275 00aa 31D0 beq .L250 + 1276 00ac 0C29 cmp r1, #12 + 1277 00ae 07D1 bne .L215 + 1278 00b0 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 1279 00b4 012B cmp r3, #1 + 1280 00b6 45D0 beq .L216 + 1281 .L238: + 1282 00b8 0120 movs r0, #1 + 1283 00ba 7047 bx lr + 1284 .L240: + 1285 00bc 0020 movs r0, #0 + 1286 00be 7047 bx lr + 1287 .L215: + 1288 00c0 1029 cmp r1, #16 + 1289 00c2 4DD0 beq .L251 + 1290 00c4 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 1291 00c8 012B cmp r3, #1 + 1292 00ca F5D1 bne .L238 + 1293 00cc 0829 cmp r1, #8 + ARM GAS /tmp/cc6kdh5W.s page 23 + + + 1294 00ce 23D0 beq .L214 + 1295 00d0 0C29 cmp r1, #12 + 1296 00d2 37D0 beq .L216 + 1297 00d4 1029 cmp r1, #16 + 1298 00d6 47D0 beq .L246 + 1299 00d8 0222 movs r2, #2 + 1300 00da 0B1F subs r3, r1, #4 + 1301 00dc 80F84320 strb r2, [r0, #67] + 1302 00e0 082B cmp r3, #8 + 1303 00e2 E9D8 bhi .L238 + 1304 00e4 01A2 adr r2, .L226 + 1305 00e6 52F823F0 ldr pc, [r2, r3, lsl #2] + 1306 00ea 00BF .p2align 2 + 1307 .L226: + 1308 00ec 39010000 .word .L220+1 + 1309 00f0 B9000000 .word .L238+1 + 1310 00f4 B9000000 .word .L238+1 + 1311 00f8 B9000000 .word .L238+1 + 1312 00fc 1F010000 .word .L222+1 + 1313 0100 B9000000 .word .L238+1 + 1314 0104 B9000000 .word .L238+1 + 1315 0108 B9000000 .word .L238+1 + 1316 010c 4B010000 .word .L224+1 + 1317 .p2align 1 + 1318 .L250: + 1319 0110 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 1320 0114 012B cmp r3, #1 + 1321 0116 CFD1 bne .L238 + 1322 .L214: + 1323 0118 0223 movs r3, #2 + 1324 011a 80F84030 strb r3, [r0, #64] + 1325 .L222: + 1326 011e 0368 ldr r3, [r0] + 1327 0120 DA68 ldr r2, [r3, #12] + 1328 0122 42F00802 orr r2, r2, #8 + 1329 0126 DA60 str r2, [r3, #12] + 1330 0128 78E7 b .L219 + 1331 .L249: + 1332 012a 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 1333 012e 012B cmp r3, #1 + 1334 0130 C2D1 bne .L238 + 1335 0132 0223 movs r3, #2 + 1336 0134 80F83F30 strb r3, [r0, #63] + 1337 .L220: + 1338 0138 0368 ldr r3, [r0] + 1339 013a DA68 ldr r2, [r3, #12] + 1340 013c 42F00402 orr r2, r2, #4 + 1341 0140 DA60 str r2, [r3, #12] + 1342 0142 6BE7 b .L219 + 1343 .L216: + 1344 0144 0223 movs r3, #2 + 1345 0146 80F84130 strb r3, [r0, #65] + 1346 .L224: + 1347 014a 0368 ldr r3, [r0] + 1348 014c DA68 ldr r2, [r3, #12] + 1349 014e 42F01002 orr r2, r2, #16 + 1350 0152 DA60 str r2, [r3, #12] + ARM GAS /tmp/cc6kdh5W.s page 24 + + + 1351 0154 62E7 b .L219 + 1352 .L227: + 1353 0156 5A6C ldr r2, [r3, #68] + 1354 0158 42F40042 orr r2, r2, #32768 + 1355 015c 5A64 str r2, [r3, #68] + 1356 015e 93E7 b .L229 + 1357 .L251: + 1358 0160 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 1359 0164 012B cmp r3, #1 + 1360 0166 A7D1 bne .L238 + 1361 .L246: + 1362 0168 0223 movs r3, #2 + 1363 016a 80F84230 strb r3, [r0, #66] + 1364 016e 0120 movs r0, #1 + 1365 0170 7047 bx lr + 1366 .L253: + 1367 0172 00BF .align 2 + 1368 .L252: + 1369 0174 002C0140 .word 1073818624 + 1370 0178 00040040 .word 1073742848 + 1371 017c 07000100 .word 65543 + 1373 .section .text.HAL_TIM_OC_Stop_IT,"ax",%progbits + 1374 .align 1 + 1375 .p2align 2,,3 + 1376 .global HAL_TIM_OC_Stop_IT + 1377 .syntax unified + 1378 .thumb + 1379 .thumb_func + 1380 .fpu fpv4-sp-d16 + 1382 HAL_TIM_OC_Stop_IT: + 1383 @ args = 0, pretend = 0, frame = 0 + 1384 @ frame_needed = 0, uses_anonymous_args = 0 + 1385 @ link register save eliminated. + 1386 0000 0C29 cmp r1, #12 + 1387 0002 08D8 bhi .L270 + 1388 0004 DFE801F0 tbb [pc, r1] + 1389 .L257: + 1390 0008 50 .byte (.L260-.L257)/2 + 1391 0009 07 .byte (.L270-.L257)/2 + 1392 000a 07 .byte (.L270-.L257)/2 + 1393 000b 07 .byte (.L270-.L257)/2 + 1394 000c 4A .byte (.L259-.L257)/2 + 1395 000d 07 .byte (.L270-.L257)/2 + 1396 000e 07 .byte (.L270-.L257)/2 + 1397 000f 07 .byte (.L270-.L257)/2 + 1398 0010 44 .byte (.L258-.L257)/2 + 1399 0011 07 .byte (.L270-.L257)/2 + 1400 0012 07 .byte (.L270-.L257)/2 + 1401 0013 07 .byte (.L270-.L257)/2 + 1402 0014 09 .byte (.L256-.L257)/2 + 1403 0015 00 .p2align 1 + 1404 .L270: + 1405 0016 0120 movs r0, #1 + 1406 0018 7047 bx lr + 1407 .L256: + 1408 001a 0368 ldr r3, [r0] + 1409 001c DA68 ldr r2, [r3, #12] + ARM GAS /tmp/cc6kdh5W.s page 25 + + + 1410 001e 22F01002 bic r2, r2, #16 + 1411 0022 DA60 str r2, [r3, #12] + 1412 .L261: + 1413 0024 1A6A ldr r2, [r3, #32] + 1414 0026 10B4 push {r4} + 1415 0028 4FF0010C mov ip, #1 + 1416 002c 01F01F04 and r4, r1, #31 + 1417 0030 0CFA04FC lsl ip, ip, r4 + 1418 0034 22EA0C02 bic r2, r2, ip + 1419 0038 1A62 str r2, [r3, #32] + 1420 003a 354A ldr r2, .L277 + 1421 003c 1C6A ldr r4, [r3, #32] + 1422 003e 1C62 str r4, [r3, #32] + 1423 0040 9342 cmp r3, r2 + 1424 0042 37D0 beq .L262 + 1425 0044 02F50062 add r2, r2, #2048 + 1426 0048 9342 cmp r3, r2 + 1427 004a 33D0 beq .L262 + 1428 004c 02F54062 add r2, r2, #3072 + 1429 0050 9342 cmp r3, r2 + 1430 0052 2FD0 beq .L262 + 1431 0054 02F58062 add r2, r2, #1024 + 1432 0058 9342 cmp r3, r2 + 1433 005a 2BD0 beq .L262 + 1434 005c 02F58062 add r2, r2, #1024 + 1435 0060 9342 cmp r3, r2 + 1436 0062 27D0 beq .L262 + 1437 .L263: + 1438 0064 1C6A ldr r4, [r3, #32] + 1439 0066 41F21112 movw r2, #4369 + 1440 006a 1442 tst r4, r2 + 1441 006c 08D1 bne .L264 + 1442 006e 1C6A ldr r4, [r3, #32] + 1443 0070 44F24442 movw r2, #17476 + 1444 0074 1442 tst r4, r2 + 1445 0076 03D1 bne .L264 + 1446 0078 1A68 ldr r2, [r3] + 1447 007a 22F00102 bic r2, r2, #1 + 1448 007e 1A60 str r2, [r3] + 1449 .L264: + 1450 0080 0123 movs r3, #1 + 1451 0082 31BB cbnz r1, .L265 + 1452 0084 80F83E30 strb r3, [r0, #62] + 1453 0088 0846 mov r0, r1 + 1454 .L255: + 1455 008a 5DF8044B ldr r4, [sp], #4 + 1456 008e 7047 bx lr + 1457 .L258: + 1458 0090 0368 ldr r3, [r0] + 1459 0092 DA68 ldr r2, [r3, #12] + 1460 0094 22F00802 bic r2, r2, #8 + 1461 0098 DA60 str r2, [r3, #12] + 1462 009a C3E7 b .L261 + 1463 .L259: + 1464 009c 0368 ldr r3, [r0] + 1465 009e DA68 ldr r2, [r3, #12] + 1466 00a0 22F00402 bic r2, r2, #4 + ARM GAS /tmp/cc6kdh5W.s page 26 + + + 1467 00a4 DA60 str r2, [r3, #12] + 1468 00a6 BDE7 b .L261 + 1469 .L260: + 1470 00a8 0368 ldr r3, [r0] + 1471 00aa DA68 ldr r2, [r3, #12] + 1472 00ac 22F00202 bic r2, r2, #2 + 1473 00b0 DA60 str r2, [r3, #12] + 1474 00b2 B7E7 b .L261 + 1475 .L262: + 1476 00b4 1C6A ldr r4, [r3, #32] + 1477 00b6 41F21112 movw r2, #4369 + 1478 00ba 1442 tst r4, r2 + 1479 00bc D2D1 bne .L263 + 1480 00be 1C6A ldr r4, [r3, #32] + 1481 00c0 44F24442 movw r2, #17476 + 1482 00c4 1442 tst r4, r2 + 1483 00c6 CDD1 bne .L263 + 1484 00c8 5A6C ldr r2, [r3, #68] + 1485 00ca 22F40042 bic r2, r2, #32768 + 1486 00ce 5A64 str r2, [r3, #68] + 1487 00d0 C8E7 b .L263 + 1488 .L265: + 1489 00d2 0429 cmp r1, #4 + 1490 00d4 11D0 beq .L274 + 1491 00d6 0829 cmp r1, #8 + 1492 00d8 0BD0 beq .L275 + 1493 00da 0C29 cmp r1, #12 + 1494 00dc 13D0 beq .L276 + 1495 00de 1029 cmp r1, #16 + 1496 00e0 0CBF ite eq + 1497 00e2 80F84230 strbeq r3, [r0, #66] + 1498 00e6 80F84330 strbne r3, [r0, #67] + 1499 00ea 5DF8044B ldr r4, [sp], #4 + 1500 00ee 0020 movs r0, #0 + 1501 00f0 7047 bx lr + 1502 .L275: + 1503 00f2 80F84030 strb r3, [r0, #64] + 1504 00f6 0020 movs r0, #0 + 1505 00f8 C7E7 b .L255 + 1506 .L274: + 1507 00fa 80F83F30 strb r3, [r0, #63] + 1508 00fe 5DF8044B ldr r4, [sp], #4 + 1509 0102 0020 movs r0, #0 + 1510 0104 7047 bx lr + 1511 .L276: + 1512 0106 80F84130 strb r3, [r0, #65] + 1513 010a 0020 movs r0, #0 + 1514 010c BDE7 b .L255 + 1515 .L278: + 1516 010e 00BF .align 2 + 1517 .L277: + 1518 0110 002C0140 .word 1073818624 + 1520 .section .text.HAL_TIM_OC_Start_DMA,"ax",%progbits + 1521 .align 1 + 1522 .p2align 2,,3 + 1523 .global HAL_TIM_OC_Start_DMA + 1524 .syntax unified + ARM GAS /tmp/cc6kdh5W.s page 27 + + + 1525 .thumb + 1526 .thumb_func + 1527 .fpu fpv4-sp-d16 + 1529 HAL_TIM_OC_Start_DMA: + 1530 @ args = 0, pretend = 0, frame = 0 + 1531 @ frame_needed = 0, uses_anonymous_args = 0 + 1532 0000 70B5 push {r4, r5, r6, lr} + 1533 0002 0546 mov r5, r0 + 1534 0004 0C46 mov r4, r1 + 1535 0006 0029 cmp r1, #0 + 1536 0008 40F09A80 bne .L280 + 1537 000c 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 1538 0010 A0F10200 sub r0, #2 + 1539 0014 B0FA80F0 clz r0, r0 + 1540 0018 4009 lsrs r0, r0, #5 + 1541 .L281: + 1542 001a 38BB cbnz r0, .L325 + 1543 001c 44B3 cbz r4, .L326 + 1544 001e 042C cmp r4, #4 + 1545 0020 00F0D880 beq .L327 + 1546 0024 082C cmp r4, #8 + 1547 0026 00F09D80 beq .L328 + 1548 002a 0C2C cmp r4, #12 + 1549 002c 00F00081 beq .L329 + 1550 0030 102C cmp r4, #16 + 1551 0032 00F02681 beq .L330 + 1552 0036 95F84310 ldrb r1, [r5, #67] @ zero_extendqisi2 + 1553 003a 0129 cmp r1, #1 + 1554 003c 7ED1 bne .L324 + 1555 003e 002A cmp r2, #0 + 1556 0040 00F02781 beq .L331 + 1557 .L304: + 1558 0044 0221 movs r1, #2 + 1559 0046 85F84310 strb r1, [r5, #67] + 1560 004a 0C2C cmp r4, #12 + 1561 004c 76D8 bhi .L324 + 1562 004e DFE814F0 tbh [pc, r4, lsl #1] + 1563 .L305: + 1564 0052 2000 .2byte (.L297-.L305)/2 + 1565 0054 7500 .2byte (.L324-.L305)/2 + 1566 0056 7500 .2byte (.L324-.L305)/2 + 1567 0058 7500 .2byte (.L324-.L305)/2 + 1568 005a D600 .2byte (.L299-.L305)/2 + 1569 005c 7500 .2byte (.L324-.L305)/2 + 1570 005e 7500 .2byte (.L324-.L305)/2 + 1571 0060 7500 .2byte (.L324-.L305)/2 + 1572 0062 A500 .2byte (.L301-.L305)/2 + 1573 0064 7500 .2byte (.L324-.L305)/2 + 1574 0066 7500 .2byte (.L324-.L305)/2 + 1575 0068 7500 .2byte (.L324-.L305)/2 + 1576 006a FC00 .2byte (.L303-.L305)/2 + 1577 .p2align 1 + 1578 .L325: + 1579 006c 0220 movs r0, #2 + 1580 006e 70BD pop {r4, r5, r6, pc} + 1581 .L326: + 1582 0070 95F83E10 ldrb r1, [r5, #62] @ zero_extendqisi2 + ARM GAS /tmp/cc6kdh5W.s page 28 + + + 1583 0074 A1F10101 sub r1, #1 + 1584 0078 B1FA81F1 clz r1, r1 + 1585 007c 4909 lsrs r1, r1, #5 + 1586 .L287: + 1587 007e 0029 cmp r1, #0 + 1588 0080 5CD0 beq .L324 + 1589 0082 002A cmp r2, #0 + 1590 0084 58D0 beq .L332 + 1591 .L294: + 1592 0086 002C cmp r4, #0 + 1593 0088 40F08180 bne .L296 + 1594 008c 0221 movs r1, #2 + 1595 008e 85F83E10 strb r1, [r5, #62] + 1596 .L297: + 1597 0092 686A ldr r0, [r5, #36] + 1598 0094 814E ldr r6, .L337 + 1599 0096 1146 mov r1, r2 + 1600 0098 2A68 ldr r2, [r5] + 1601 009a C662 str r6, [r0, #44] + 1602 009c 804E ldr r6, .L337+4 + 1603 009e 0663 str r6, [r0, #48] + 1604 00a0 804E ldr r6, .L337+8 + 1605 00a2 4663 str r6, [r0, #52] + 1606 00a4 3432 adds r2, r2, #52 + 1607 00a6 FFF7FEFF bl HAL_DMA_Start_IT + 1608 00aa 0028 cmp r0, #0 + 1609 00ac 46D1 bne .L324 + 1610 00ae 2B68 ldr r3, [r5] + 1611 00b0 DA68 ldr r2, [r3, #12] + 1612 00b2 42F40072 orr r2, r2, #512 + 1613 00b6 DA60 str r2, [r3, #12] + 1614 .L306: + 1615 00b8 186A ldr r0, [r3, #32] + 1616 00ba 0122 movs r2, #1 + 1617 00bc 04F01F04 and r4, r4, #31 + 1618 00c0 02FA04F4 lsl r4, r2, r4 + 1619 00c4 20EA0400 bic r0, r0, r4 + 1620 00c8 1862 str r0, [r3, #32] + 1621 00ca 196A ldr r1, [r3, #32] + 1622 00cc 764A ldr r2, .L337+12 + 1623 00ce 0C43 orrs r4, r4, r1 + 1624 00d0 9342 cmp r3, r2 + 1625 00d2 1C62 str r4, [r3, #32] + 1626 00d4 00F0A780 beq .L307 + 1627 00d8 02F50062 add r2, r2, #2048 + 1628 00dc 9342 cmp r3, r2 + 1629 00de 51D0 beq .L308 + 1630 00e0 02F54062 add r2, r2, #3072 + 1631 00e4 9342 cmp r3, r2 + 1632 00e6 4DD0 beq .L308 + 1633 00e8 02F58062 add r2, r2, #1024 + 1634 00ec 9342 cmp r3, r2 + 1635 00ee 49D0 beq .L308 + 1636 00f0 02F58062 add r2, r2, #1024 + 1637 00f4 9342 cmp r3, r2 + 1638 00f6 45D0 beq .L308 + 1639 .L311: + ARM GAS /tmp/cc6kdh5W.s page 29 + + + 1640 00f8 B3F1804F cmp r3, #1073741824 + 1641 00fc 0ED0 beq .L309 + 1642 00fe 6B4A ldr r2, .L337+16 + 1643 0100 9342 cmp r3, r2 + 1644 0102 0BD0 beq .L309 + 1645 0104 02F58062 add r2, r2, #1024 + 1646 0108 9342 cmp r3, r2 + 1647 010a 07D0 beq .L309 + 1648 010c 02F59632 add r2, r2, #76800 + 1649 0110 9342 cmp r3, r2 + 1650 0112 03D0 beq .L309 + 1651 0114 02F54062 add r2, r2, #3072 + 1652 0118 9342 cmp r3, r2 + 1653 011a 07D1 bne .L310 + 1654 .L309: + 1655 011c 9968 ldr r1, [r3, #8] + 1656 011e 644A ldr r2, .L337+20 + 1657 0120 0A40 ands r2, r2, r1 + 1658 0122 062A cmp r2, #6 + 1659 0124 5ED0 beq .L316 + 1660 0126 B2F5803F cmp r2, #65536 + 1661 012a 5BD0 beq .L316 + 1662 .L310: + 1663 012c 1A68 ldr r2, [r3] + 1664 012e 42F00102 orr r2, r2, #1 + 1665 0132 0020 movs r0, #0 + 1666 0134 1A60 str r2, [r3] + 1667 0136 70BD pop {r4, r5, r6, pc} + 1668 .L332: + 1669 0138 002B cmp r3, #0 + 1670 013a A4D0 beq .L294 + 1671 .L324: + 1672 013c 0120 movs r0, #1 + 1673 013e 70BD pop {r4, r5, r6, pc} + 1674 .L280: + 1675 0140 0429 cmp r1, #4 + 1676 0142 3FD0 beq .L333 + 1677 0144 0829 cmp r1, #8 + 1678 0146 4FD0 beq .L334 + 1679 0148 0C29 cmp r1, #12 + 1680 014a 13D0 beq .L335 + 1681 014c 1029 cmp r1, #16 + 1682 014e 0CBF ite eq + 1683 0150 90F84200 ldrbeq r0, [r0, #66] @ zero_extendqisi2 + 1684 0154 95F84300 ldrbne r0, [r5, #67] @ zero_extendqisi2 + 1685 0158 A0F10200 sub r0, #2 + 1686 015c B0FA80F0 clz r0, r0 + 1687 0160 4009 lsrs r0, r0, #5 + 1688 0162 5AE7 b .L281 + 1689 .L328: + 1690 0164 95F84010 ldrb r1, [r5, #64] @ zero_extendqisi2 + 1691 0168 A1F10101 sub r1, #1 + 1692 016c B1FA81F1 clz r1, r1 + 1693 0170 4909 lsrs r1, r1, #5 + 1694 0172 84E7 b .L287 + 1695 .L335: + 1696 0174 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + ARM GAS /tmp/cc6kdh5W.s page 30 + + + 1697 0178 A0F10200 sub r0, #2 + 1698 017c B0FA80F0 clz r0, r0 + 1699 0180 4009 lsrs r0, r0, #5 + 1700 0182 4AE7 b .L281 + 1701 .L308: + 1702 0184 5A6C ldr r2, [r3, #68] + 1703 0186 42F40042 orr r2, r2, #32768 + 1704 018a 5A64 str r2, [r3, #68] + 1705 018c B4E7 b .L311 + 1706 .L296: + 1707 018e 042C cmp r4, #4 + 1708 0190 32D0 beq .L336 + 1709 0192 082C cmp r4, #8 + 1710 0194 54D1 bne .L300 + 1711 0196 0221 movs r1, #2 + 1712 0198 85F84010 strb r1, [r5, #64] + 1713 .L301: + 1714 019c E86A ldr r0, [r5, #44] + 1715 019e 3F4E ldr r6, .L337 + 1716 01a0 1146 mov r1, r2 + 1717 01a2 2A68 ldr r2, [r5] + 1718 01a4 C662 str r6, [r0, #44] + 1719 01a6 3E4E ldr r6, .L337+4 + 1720 01a8 0663 str r6, [r0, #48] + 1721 01aa 3E4E ldr r6, .L337+8 + 1722 01ac 4663 str r6, [r0, #52] + 1723 01ae 3C32 adds r2, r2, #60 + 1724 01b0 FFF7FEFF bl HAL_DMA_Start_IT + 1725 01b4 0028 cmp r0, #0 + 1726 01b6 C1D1 bne .L324 + 1727 01b8 2B68 ldr r3, [r5] + 1728 01ba DA68 ldr r2, [r3, #12] + 1729 01bc 42F40062 orr r2, r2, #2048 + 1730 01c0 DA60 str r2, [r3, #12] + 1731 01c2 79E7 b .L306 + 1732 .L333: + 1733 01c4 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 1734 01c8 A0F10200 sub r0, #2 + 1735 01cc B0FA80F0 clz r0, r0 + 1736 01d0 4009 lsrs r0, r0, #5 + 1737 01d2 22E7 b .L281 + 1738 .L327: + 1739 01d4 95F83F10 ldrb r1, [r5, #63] @ zero_extendqisi2 + 1740 01d8 A1F10101 sub r1, #1 + 1741 01dc B1FA81F1 clz r1, r1 + 1742 01e0 4909 lsrs r1, r1, #5 + 1743 01e2 4CE7 b .L287 + 1744 .L316: + 1745 01e4 0020 movs r0, #0 + 1746 01e6 70BD pop {r4, r5, r6, pc} + 1747 .L334: + 1748 01e8 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 1749 01ec A0F10200 sub r0, #2 + 1750 01f0 B0FA80F0 clz r0, r0 + 1751 01f4 4009 lsrs r0, r0, #5 + 1752 01f6 10E7 b .L281 + 1753 .L336: + ARM GAS /tmp/cc6kdh5W.s page 31 + + + 1754 01f8 0221 movs r1, #2 + 1755 01fa 85F83F10 strb r1, [r5, #63] + 1756 .L299: + 1757 01fe A86A ldr r0, [r5, #40] + 1758 0200 264E ldr r6, .L337 + 1759 0202 1146 mov r1, r2 + 1760 0204 2A68 ldr r2, [r5] + 1761 0206 C662 str r6, [r0, #44] + 1762 0208 254E ldr r6, .L337+4 + 1763 020a 0663 str r6, [r0, #48] + 1764 020c 254E ldr r6, .L337+8 + 1765 020e 4663 str r6, [r0, #52] + 1766 0210 3832 adds r2, r2, #56 + 1767 0212 FFF7FEFF bl HAL_DMA_Start_IT + 1768 0216 0028 cmp r0, #0 + 1769 0218 90D1 bne .L324 + 1770 021a 2B68 ldr r3, [r5] + 1771 021c DA68 ldr r2, [r3, #12] + 1772 021e 42F48062 orr r2, r2, #1024 + 1773 0222 DA60 str r2, [r3, #12] + 1774 0224 48E7 b .L306 + 1775 .L307: + 1776 0226 5A6C ldr r2, [r3, #68] + 1777 0228 42F40042 orr r2, r2, #32768 + 1778 022c 5A64 str r2, [r3, #68] + 1779 022e 75E7 b .L309 + 1780 .L329: + 1781 0230 95F84110 ldrb r1, [r5, #65] @ zero_extendqisi2 + 1782 0234 A1F10101 sub r1, #1 + 1783 0238 B1FA81F1 clz r1, r1 + 1784 023c 4909 lsrs r1, r1, #5 + 1785 023e 1EE7 b .L287 + 1786 .L300: + 1787 0240 0C2C cmp r4, #12 + 1788 0242 17D1 bne .L302 + 1789 0244 0221 movs r1, #2 + 1790 0246 85F84110 strb r1, [r5, #65] + 1791 .L303: + 1792 024a 286B ldr r0, [r5, #48] + 1793 024c 134E ldr r6, .L337 + 1794 024e 1146 mov r1, r2 + 1795 0250 2A68 ldr r2, [r5] + 1796 0252 C662 str r6, [r0, #44] + 1797 0254 124E ldr r6, .L337+4 + 1798 0256 0663 str r6, [r0, #48] + 1799 0258 124E ldr r6, .L337+8 + 1800 025a 4663 str r6, [r0, #52] + 1801 025c 4032 adds r2, r2, #64 + 1802 025e FFF7FEFF bl HAL_DMA_Start_IT + 1803 0262 0028 cmp r0, #0 + 1804 0264 7FF46AAF bne .L324 + 1805 0268 2B68 ldr r3, [r5] + 1806 026a DA68 ldr r2, [r3, #12] + 1807 026c 42F48052 orr r2, r2, #4096 + 1808 0270 DA60 str r2, [r3, #12] + 1809 0272 21E7 b .L306 + 1810 .L302: + ARM GAS /tmp/cc6kdh5W.s page 32 + + + 1811 0274 102C cmp r4, #16 + 1812 0276 7FF4E5AE bne .L304 + 1813 027a 0223 movs r3, #2 + 1814 027c 85F84230 strb r3, [r5, #66] + 1815 0280 5CE7 b .L324 + 1816 .L330: + 1817 0282 95F84210 ldrb r1, [r5, #66] @ zero_extendqisi2 + 1818 0286 A1F10101 sub r1, #1 + 1819 028a B1FA81F1 clz r1, r1 + 1820 028e 4909 lsrs r1, r1, #5 + 1821 0290 F5E6 b .L287 + 1822 .L331: + 1823 0292 002B cmp r3, #0 + 1824 0294 3FF4D6AE beq .L304 + 1825 0298 50E7 b .L324 + 1826 .L338: + 1827 029a 00BF .align 2 + 1828 .L337: + 1829 029c 00000000 .word TIM_DMADelayPulseCplt + 1830 02a0 00000000 .word TIM_DMADelayPulseHalfCplt + 1831 02a4 00000000 .word TIM_DMAError + 1832 02a8 002C0140 .word 1073818624 + 1833 02ac 00040040 .word 1073742848 + 1834 02b0 07000100 .word 65543 + 1836 .section .text.HAL_TIM_OC_Stop_DMA,"ax",%progbits + 1837 .align 1 + 1838 .p2align 2,,3 + 1839 .global HAL_TIM_OC_Stop_DMA + 1840 .syntax unified + 1841 .thumb + 1842 .thumb_func + 1843 .fpu fpv4-sp-d16 + 1845 HAL_TIM_OC_Stop_DMA: + 1846 @ args = 0, pretend = 0, frame = 0 + 1847 @ frame_needed = 0, uses_anonymous_args = 0 + 1848 0000 38B5 push {r3, r4, r5, lr} + 1849 0002 0C46 mov r4, r1 + 1850 0004 0546 mov r5, r0 + 1851 0006 0C29 cmp r1, #12 + 1852 0008 08D8 bhi .L355 + 1853 000a DFE801F0 tbb [pc, r1] + 1854 .L342: + 1855 000e 55 .byte (.L345-.L342)/2 + 1856 000f 07 .byte (.L355-.L342)/2 + 1857 0010 07 .byte (.L355-.L342)/2 + 1858 0011 07 .byte (.L355-.L342)/2 + 1859 0012 4C .byte (.L344-.L342)/2 + 1860 0013 07 .byte (.L355-.L342)/2 + 1861 0014 07 .byte (.L355-.L342)/2 + 1862 0015 07 .byte (.L355-.L342)/2 + 1863 0016 43 .byte (.L343-.L342)/2 + 1864 0017 07 .byte (.L355-.L342)/2 + 1865 0018 07 .byte (.L355-.L342)/2 + 1866 0019 07 .byte (.L355-.L342)/2 + 1867 001a 09 .byte (.L341-.L342)/2 + 1868 001b 00 .p2align 1 + 1869 .L355: + ARM GAS /tmp/cc6kdh5W.s page 33 + + + 1870 001c 0120 movs r0, #1 + 1871 001e 38BD pop {r3, r4, r5, pc} + 1872 .L341: + 1873 0020 0268 ldr r2, [r0] + 1874 0022 006B ldr r0, [r0, #48] + 1875 0024 D368 ldr r3, [r2, #12] + 1876 0026 23F48053 bic r3, r3, #4096 + 1877 002a D360 str r3, [r2, #12] + 1878 002c FFF7FEFF bl HAL_DMA_Abort_IT + 1879 .L346: + 1880 0030 2B68 ldr r3, [r5] + 1881 0032 04F01F00 and r0, r4, #31 + 1882 0036 1A6A ldr r2, [r3, #32] + 1883 0038 0121 movs r1, #1 + 1884 003a 8140 lsls r1, r1, r0 + 1885 003c 22EA0102 bic r2, r2, r1 + 1886 0040 1A62 str r2, [r3, #32] + 1887 0042 364A ldr r2, .L360 + 1888 0044 196A ldr r1, [r3, #32] + 1889 0046 1962 str r1, [r3, #32] + 1890 0048 9342 cmp r3, r2 + 1891 004a 3ED0 beq .L347 + 1892 004c 02F50062 add r2, r2, #2048 + 1893 0050 9342 cmp r3, r2 + 1894 0052 3AD0 beq .L347 + 1895 0054 02F54062 add r2, r2, #3072 + 1896 0058 9342 cmp r3, r2 + 1897 005a 36D0 beq .L347 + 1898 005c 02F58062 add r2, r2, #1024 + 1899 0060 9342 cmp r3, r2 + 1900 0062 32D0 beq .L347 + 1901 0064 02F58062 add r2, r2, #1024 + 1902 0068 9342 cmp r3, r2 + 1903 006a 2ED0 beq .L347 + 1904 .L348: + 1905 006c 196A ldr r1, [r3, #32] + 1906 006e 41F21112 movw r2, #4369 + 1907 0072 1142 tst r1, r2 + 1908 0074 08D1 bne .L349 + 1909 0076 196A ldr r1, [r3, #32] + 1910 0078 44F24442 movw r2, #17476 + 1911 007c 1142 tst r1, r2 + 1912 007e 03D1 bne .L349 + 1913 0080 1A68 ldr r2, [r3] + 1914 0082 22F00102 bic r2, r2, #1 + 1915 0086 1A60 str r2, [r3] + 1916 .L349: + 1917 0088 0123 movs r3, #1 + 1918 008a 6CBB cbnz r4, .L350 + 1919 008c 85F83E30 strb r3, [r5, #62] + 1920 0090 2046 mov r0, r4 + 1921 0092 38BD pop {r3, r4, r5, pc} + 1922 .L343: + 1923 0094 0268 ldr r2, [r0] + 1924 0096 C06A ldr r0, [r0, #44] + 1925 0098 D368 ldr r3, [r2, #12] + 1926 009a 23F40063 bic r3, r3, #2048 + ARM GAS /tmp/cc6kdh5W.s page 34 + + + 1927 009e D360 str r3, [r2, #12] + 1928 00a0 FFF7FEFF bl HAL_DMA_Abort_IT + 1929 00a4 C4E7 b .L346 + 1930 .L344: + 1931 00a6 0268 ldr r2, [r0] + 1932 00a8 806A ldr r0, [r0, #40] + 1933 00aa D368 ldr r3, [r2, #12] + 1934 00ac 23F48063 bic r3, r3, #1024 + 1935 00b0 D360 str r3, [r2, #12] + 1936 00b2 FFF7FEFF bl HAL_DMA_Abort_IT + 1937 00b6 BBE7 b .L346 + 1938 .L345: + 1939 00b8 0268 ldr r2, [r0] + 1940 00ba 406A ldr r0, [r0, #36] + 1941 00bc D368 ldr r3, [r2, #12] + 1942 00be 23F40073 bic r3, r3, #512 + 1943 00c2 D360 str r3, [r2, #12] + 1944 00c4 FFF7FEFF bl HAL_DMA_Abort_IT + 1945 00c8 B2E7 b .L346 + 1946 .L347: + 1947 00ca 196A ldr r1, [r3, #32] + 1948 00cc 41F21112 movw r2, #4369 + 1949 00d0 1142 tst r1, r2 + 1950 00d2 CBD1 bne .L348 + 1951 00d4 196A ldr r1, [r3, #32] + 1952 00d6 44F24442 movw r2, #17476 + 1953 00da 1142 tst r1, r2 + 1954 00dc C6D1 bne .L348 + 1955 00de 5A6C ldr r2, [r3, #68] + 1956 00e0 22F40042 bic r2, r2, #32768 + 1957 00e4 5A64 str r2, [r3, #68] + 1958 00e6 C1E7 b .L348 + 1959 .L350: + 1960 00e8 042C cmp r4, #4 + 1961 00ea 0FD0 beq .L357 + 1962 00ec 082C cmp r4, #8 + 1963 00ee 09D0 beq .L358 + 1964 00f0 0C2C cmp r4, #12 + 1965 00f2 0FD0 beq .L359 + 1966 00f4 102C cmp r4, #16 + 1967 00f6 0CBF ite eq + 1968 00f8 85F84230 strbeq r3, [r5, #66] + 1969 00fc 85F84330 strbne r3, [r5, #67] + 1970 0100 0020 movs r0, #0 + 1971 0102 38BD pop {r3, r4, r5, pc} + 1972 .L358: + 1973 0104 85F84030 strb r3, [r5, #64] + 1974 0108 0020 movs r0, #0 + 1975 010a 38BD pop {r3, r4, r5, pc} + 1976 .L357: + 1977 010c 85F83F30 strb r3, [r5, #63] + 1978 0110 0020 movs r0, #0 + 1979 0112 38BD pop {r3, r4, r5, pc} + 1980 .L359: + 1981 0114 85F84130 strb r3, [r5, #65] + 1982 0118 0020 movs r0, #0 + 1983 011a 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/cc6kdh5W.s page 35 + + + 1984 .L361: + 1985 .align 2 + 1986 .L360: + 1987 011c 002C0140 .word 1073818624 + 1989 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits + 1990 .align 1 + 1991 .p2align 2,,3 + 1992 .weak HAL_TIM_PWM_MspInit + 1993 .syntax unified + 1994 .thumb + 1995 .thumb_func + 1996 .fpu fpv4-sp-d16 + 1998 HAL_TIM_PWM_MspInit: + 1999 @ args = 0, pretend = 0, frame = 0 + 2000 @ frame_needed = 0, uses_anonymous_args = 0 + 2001 @ link register save eliminated. + 2002 0000 7047 bx lr + 2004 0002 00BF .section .text.HAL_TIM_PWM_Init,"ax",%progbits + 2005 .align 1 + 2006 .p2align 2,,3 + 2007 .global HAL_TIM_PWM_Init + 2008 .syntax unified + 2009 .thumb + 2010 .thumb_func + 2011 .fpu fpv4-sp-d16 + 2013 HAL_TIM_PWM_Init: + 2014 @ args = 0, pretend = 0, frame = 0 + 2015 @ frame_needed = 0, uses_anonymous_args = 0 + 2016 0000 0028 cmp r0, #0 + 2017 0002 00F08180 beq .L378 + 2018 0006 10B5 push {r4, lr} + 2019 0008 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 2020 000c 0446 mov r4, r0 + 2021 000e 03F0FF02 and r2, r3, #255 + 2022 0012 002B cmp r3, #0 + 2023 0014 6DD0 beq .L386 + 2024 .L365: + 2025 0016 2268 ldr r2, [r4] + 2026 0018 3C49 ldr r1, .L387 + 2027 001a 0223 movs r3, #2 + 2028 001c 84F83D30 strb r3, [r4, #61] + 2029 0020 8A42 cmp r2, r1 + 2030 0022 1368 ldr r3, [r2] + 2031 0024 51D0 beq .L370 + 2032 0026 B2F1804F cmp r2, #1073741824 + 2033 002a 21D0 beq .L368 + 2034 002c A1F59431 sub r1, r1, #75776 + 2035 0030 8A42 cmp r2, r1 + 2036 0032 1DD0 beq .L368 + 2037 0034 01F58061 add r1, r1, #1024 + 2038 0038 8A42 cmp r2, r1 + 2039 003a 19D0 beq .L368 + 2040 003c 01F59631 add r1, r1, #76800 + 2041 0040 8A42 cmp r2, r1 + 2042 0042 42D0 beq .L370 + 2043 0044 01F54061 add r1, r1, #3072 + 2044 0048 8A42 cmp r2, r1 + ARM GAS /tmp/cc6kdh5W.s page 36 + + + 2045 004a 57D0 beq .L371 + 2046 004c 01F58061 add r1, r1, #1024 + 2047 0050 8A42 cmp r2, r1 + 2048 0052 53D0 beq .L371 + 2049 0054 01F58061 add r1, r1, #1024 + 2050 0058 8A42 cmp r2, r1 + 2051 005a 4FD0 beq .L371 + 2052 005c A069 ldr r0, [r4, #24] + 2053 005e E168 ldr r1, [r4, #12] + 2054 0060 23F08003 bic r3, r3, #128 + 2055 0064 0343 orrs r3, r3, r0 + 2056 0066 1360 str r3, [r2] + 2057 0068 6368 ldr r3, [r4, #4] + 2058 006a D162 str r1, [r2, #44] + 2059 006c 9362 str r3, [r2, #40] + 2060 006e 10E0 b .L375 + 2061 .L368: + 2062 0070 A168 ldr r1, [r4, #8] + 2063 0072 2069 ldr r0, [r4, #16] + 2064 0074 23F07003 bic r3, r3, #112 + 2065 0078 0B43 orrs r3, r3, r1 + 2066 007a 23F44073 bic r3, r3, #768 + 2067 007e A169 ldr r1, [r4, #24] + 2068 0080 0343 orrs r3, r3, r0 + 2069 0082 23F08003 bic r3, r3, #128 + 2070 0086 E068 ldr r0, [r4, #12] + 2071 0088 0B43 orrs r3, r3, r1 + 2072 008a 6168 ldr r1, [r4, #4] + 2073 008c 1360 str r3, [r2] + 2074 008e D062 str r0, [r2, #44] + 2075 0090 9162 str r1, [r2, #40] + 2076 .L375: + 2077 0092 0123 movs r3, #1 + 2078 0094 5361 str r3, [r2, #20] + 2079 0096 84F84830 strb r3, [r4, #72] + 2080 009a 84F83E30 strb r3, [r4, #62] + 2081 009e 84F83F30 strb r3, [r4, #63] + 2082 00a2 84F84030 strb r3, [r4, #64] + 2083 00a6 84F84130 strb r3, [r4, #65] + 2084 00aa 84F84230 strb r3, [r4, #66] + 2085 00ae 84F84330 strb r3, [r4, #67] + 2086 00b2 84F84430 strb r3, [r4, #68] + 2087 00b6 84F84530 strb r3, [r4, #69] + 2088 00ba 84F84630 strb r3, [r4, #70] + 2089 00be 84F84730 strb r3, [r4, #71] + 2090 00c2 84F83D30 strb r3, [r4, #61] + 2091 00c6 0020 movs r0, #0 + 2092 00c8 10BD pop {r4, pc} + 2093 .L370: + 2094 00ca A068 ldr r0, [r4, #8] + 2095 00cc 2169 ldr r1, [r4, #16] + 2096 00ce 23F07003 bic r3, r3, #112 + 2097 00d2 0343 orrs r3, r3, r0 + 2098 00d4 23F44073 bic r3, r3, #768 + 2099 00d8 0B43 orrs r3, r3, r1 + 2100 00da A169 ldr r1, [r4, #24] + 2101 .L385: + ARM GAS /tmp/cc6kdh5W.s page 37 + + + 2102 00dc 23F08003 bic r3, r3, #128 + 2103 00e0 0B43 orrs r3, r3, r1 + 2104 00e2 1360 str r3, [r2] + 2105 00e4 E368 ldr r3, [r4, #12] + 2106 00e6 D362 str r3, [r2, #44] + 2107 00e8 6368 ldr r3, [r4, #4] + 2108 00ea 9362 str r3, [r2, #40] + 2109 00ec 6369 ldr r3, [r4, #20] + 2110 00ee 1363 str r3, [r2, #48] + 2111 00f0 CFE7 b .L375 + 2112 .L386: + 2113 00f2 80F83C20 strb r2, [r0, #60] + 2114 00f6 FFF7FEFF bl HAL_TIM_PWM_MspInit + 2115 00fa 8CE7 b .L365 + 2116 .L371: + 2117 00fc 2069 ldr r0, [r4, #16] + 2118 00fe A169 ldr r1, [r4, #24] + 2119 0100 23F44073 bic r3, r3, #768 + 2120 0104 0343 orrs r3, r3, r0 + 2121 0106 E9E7 b .L385 + 2122 .L378: + 2123 0108 0120 movs r0, #1 + 2124 010a 7047 bx lr + 2125 .L388: + 2126 .align 2 + 2127 .L387: + 2128 010c 002C0140 .word 1073818624 + 2130 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits + 2131 .align 1 + 2132 .p2align 2,,3 + 2133 .weak HAL_TIM_PWM_MspDeInit + 2134 .syntax unified + 2135 .thumb + 2136 .thumb_func + 2137 .fpu fpv4-sp-d16 + 2139 HAL_TIM_PWM_MspDeInit: + 2140 @ args = 0, pretend = 0, frame = 0 + 2141 @ frame_needed = 0, uses_anonymous_args = 0 + 2142 @ link register save eliminated. + 2143 0000 7047 bx lr + 2145 0002 00BF .section .text.HAL_TIM_PWM_DeInit,"ax",%progbits + 2146 .align 1 + 2147 .p2align 2,,3 + 2148 .global HAL_TIM_PWM_DeInit + 2149 .syntax unified + 2150 .thumb + 2151 .thumb_func + 2152 .fpu fpv4-sp-d16 + 2154 HAL_TIM_PWM_DeInit: + 2155 @ args = 0, pretend = 0, frame = 0 + 2156 @ frame_needed = 0, uses_anonymous_args = 0 + 2157 0000 0222 movs r2, #2 + 2158 0002 0368 ldr r3, [r0] + 2159 0004 10B5 push {r4, lr} + 2160 0006 80F83D20 strb r2, [r0, #61] + 2161 000a 196A ldr r1, [r3, #32] + 2162 000c 41F21112 movw r2, #4369 + ARM GAS /tmp/cc6kdh5W.s page 38 + + + 2163 0010 1142 tst r1, r2 + 2164 0012 0446 mov r4, r0 + 2165 0014 08D1 bne .L391 + 2166 0016 196A ldr r1, [r3, #32] + 2167 0018 44F24442 movw r2, #17476 + 2168 001c 1142 tst r1, r2 + 2169 001e 03D1 bne .L391 + 2170 0020 1A68 ldr r2, [r3] + 2171 0022 22F00102 bic r2, r2, #1 + 2172 0026 1A60 str r2, [r3] + 2173 .L391: + 2174 0028 2046 mov r0, r4 + 2175 002a FFF7FEFF bl HAL_TIM_PWM_MspDeInit + 2176 002e 0020 movs r0, #0 + 2177 0030 84F84800 strb r0, [r4, #72] + 2178 0034 84F83C00 strb r0, [r4, #60] + 2179 0038 84F83E00 strb r0, [r4, #62] + 2180 003c 84F83F00 strb r0, [r4, #63] + 2181 0040 84F84000 strb r0, [r4, #64] + 2182 0044 84F84100 strb r0, [r4, #65] + 2183 0048 84F84200 strb r0, [r4, #66] + 2184 004c 84F84300 strb r0, [r4, #67] + 2185 0050 84F84400 strb r0, [r4, #68] + 2186 0054 84F84500 strb r0, [r4, #69] + 2187 0058 84F84600 strb r0, [r4, #70] + 2188 005c 84F84700 strb r0, [r4, #71] + 2189 0060 84F83D00 strb r0, [r4, #61] + 2190 0064 10BD pop {r4, pc} + 2192 0066 00BF .section .text.HAL_TIM_PWM_Start,"ax",%progbits + 2193 .align 1 + 2194 .p2align 2,,3 + 2195 .global HAL_TIM_PWM_Start + 2196 .syntax unified + 2197 .thumb + 2198 .thumb_func + 2199 .fpu fpv4-sp-d16 + 2201 HAL_TIM_PWM_Start: + 2202 @ args = 0, pretend = 0, frame = 0 + 2203 @ frame_needed = 0, uses_anonymous_args = 0 + 2204 @ link register save eliminated. + 2205 0000 0029 cmp r1, #0 + 2206 0002 4AD1 bne .L394 + 2207 0004 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 2208 0008 012B cmp r3, #1 + 2209 000a 60D1 bne .L419 + 2210 000c 0223 movs r3, #2 + 2211 000e 80F83E30 strb r3, [r0, #62] + 2212 .L405: + 2213 0012 0368 ldr r3, [r0] + 2214 0014 0122 movs r2, #1 + 2215 0016 186A ldr r0, [r3, #32] + 2216 0018 01F01F01 and r1, r1, #31 + 2217 001c 02FA01F1 lsl r1, r2, r1 + 2218 0020 20EA0100 bic r0, r0, r1 + 2219 0024 1862 str r0, [r3, #32] + 2220 0026 186A ldr r0, [r3, #32] + 2221 0028 3B4A ldr r2, .L434 + ARM GAS /tmp/cc6kdh5W.s page 39 + + + 2222 002a 0143 orrs r1, r1, r0 + 2223 002c 9342 cmp r3, r2 + 2224 002e 1962 str r1, [r3, #32] + 2225 0030 59D0 beq .L409 + 2226 0032 02F50062 add r2, r2, #2048 + 2227 0036 9342 cmp r3, r2 + 2228 0038 0BD0 beq .L410 + 2229 003a 02F54062 add r2, r2, #3072 + 2230 003e 9342 cmp r3, r2 + 2231 0040 07D0 beq .L410 + 2232 0042 02F58062 add r2, r2, #1024 + 2233 0046 9342 cmp r3, r2 + 2234 0048 03D0 beq .L410 + 2235 004a 02F58062 add r2, r2, #1024 + 2236 004e 9342 cmp r3, r2 + 2237 0050 03D1 bne .L413 + 2238 .L410: + 2239 0052 5A6C ldr r2, [r3, #68] + 2240 0054 42F40042 orr r2, r2, #32768 + 2241 0058 5A64 str r2, [r3, #68] + 2242 .L413: + 2243 005a B3F1804F cmp r3, #1073741824 + 2244 005e 0ED0 beq .L411 + 2245 0060 2E4A ldr r2, .L434+4 + 2246 0062 9342 cmp r3, r2 + 2247 0064 0BD0 beq .L411 + 2248 0066 02F58062 add r2, r2, #1024 + 2249 006a 9342 cmp r3, r2 + 2250 006c 07D0 beq .L411 + 2251 006e 02F59632 add r2, r2, #76800 + 2252 0072 9342 cmp r3, r2 + 2253 0074 03D0 beq .L411 + 2254 0076 02F54062 add r2, r2, #3072 + 2255 007a 9342 cmp r3, r2 + 2256 007c 07D1 bne .L412 + 2257 .L411: + 2258 007e 9968 ldr r1, [r3, #8] + 2259 0080 274A ldr r2, .L434+8 + 2260 0082 0A40 ands r2, r2, r1 + 2261 0084 062A cmp r2, #6 + 2262 0086 24D0 beq .L421 + 2263 0088 B2F5803F cmp r2, #65536 + 2264 008c 21D0 beq .L421 + 2265 .L412: + 2266 008e 1A68 ldr r2, [r3] + 2267 0090 42F00102 orr r2, r2, #1 + 2268 0094 0020 movs r0, #0 + 2269 0096 1A60 str r2, [r3] + 2270 0098 7047 bx lr + 2271 .L394: + 2272 009a 0429 cmp r1, #4 + 2273 009c 1BD0 beq .L430 + 2274 009e 0829 cmp r1, #8 + 2275 00a0 26D0 beq .L431 + 2276 00a2 0C29 cmp r1, #12 + 2277 00a4 0FD0 beq .L432 + 2278 00a6 1029 cmp r1, #16 + ARM GAS /tmp/cc6kdh5W.s page 40 + + + 2279 00a8 2ED0 beq .L433 + 2280 00aa 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 2281 00ae 012B cmp r3, #1 + 2282 00b0 0DD1 bne .L419 + 2283 00b2 0829 cmp r1, #8 + 2284 00b4 20D0 beq .L400 + 2285 00b6 0C29 cmp r1, #12 + 2286 00b8 22D0 beq .L402 + 2287 00ba 1029 cmp r1, #16 + 2288 00bc 28D0 beq .L427 + 2289 00be 0223 movs r3, #2 + 2290 00c0 80F84330 strb r3, [r0, #67] + 2291 00c4 A5E7 b .L405 + 2292 .L432: + 2293 00c6 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 2294 00ca 012B cmp r3, #1 + 2295 00cc 18D0 beq .L402 + 2296 .L419: + 2297 00ce 0120 movs r0, #1 + 2298 00d0 7047 bx lr + 2299 .L421: + 2300 00d2 0020 movs r0, #0 + 2301 00d4 7047 bx lr + 2302 .L430: + 2303 00d6 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 2304 00da 012B cmp r3, #1 + 2305 00dc F7D1 bne .L419 + 2306 00de 0223 movs r3, #2 + 2307 00e0 80F83F30 strb r3, [r0, #63] + 2308 00e4 95E7 b .L405 + 2309 .L409: + 2310 00e6 5A6C ldr r2, [r3, #68] + 2311 00e8 42F40042 orr r2, r2, #32768 + 2312 00ec 5A64 str r2, [r3, #68] + 2313 00ee C6E7 b .L411 + 2314 .L431: + 2315 00f0 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2316 00f4 012B cmp r3, #1 + 2317 00f6 EAD1 bne .L419 + 2318 .L400: + 2319 00f8 0223 movs r3, #2 + 2320 00fa 80F84030 strb r3, [r0, #64] + 2321 00fe 88E7 b .L405 + 2322 .L402: + 2323 0100 0223 movs r3, #2 + 2324 0102 80F84130 strb r3, [r0, #65] + 2325 0106 84E7 b .L405 + 2326 .L433: + 2327 0108 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 2328 010c 012B cmp r3, #1 + 2329 010e DED1 bne .L419 + 2330 .L427: + 2331 0110 0223 movs r3, #2 + 2332 0112 80F84230 strb r3, [r0, #66] + 2333 0116 7CE7 b .L405 + 2334 .L435: + 2335 .align 2 + ARM GAS /tmp/cc6kdh5W.s page 41 + + + 2336 .L434: + 2337 0118 002C0140 .word 1073818624 + 2338 011c 00040040 .word 1073742848 + 2339 0120 07000100 .word 65543 + 2341 .section .text.HAL_TIM_PWM_Stop,"ax",%progbits + 2342 .align 1 + 2343 .p2align 2,,3 + 2344 .global HAL_TIM_PWM_Stop + 2345 .syntax unified + 2346 .thumb + 2347 .thumb_func + 2348 .fpu fpv4-sp-d16 + 2350 HAL_TIM_PWM_Stop: + 2351 @ args = 0, pretend = 0, frame = 0 + 2352 @ frame_needed = 0, uses_anonymous_args = 0 + 2353 @ link register save eliminated. + 2354 0000 0368 ldr r3, [r0] + 2355 0002 10B4 push {r4} + 2356 0004 1A6A ldr r2, [r3, #32] + 2357 0006 01F01F04 and r4, r1, #31 + 2358 000a 4FF0010C mov ip, #1 + 2359 000e 0CFA04FC lsl ip, ip, r4 + 2360 0012 22EA0C02 bic r2, r2, ip + 2361 0016 1A62 str r2, [r3, #32] + 2362 0018 2C4A ldr r2, .L451 + 2363 001a 1C6A ldr r4, [r3, #32] + 2364 001c 1C62 str r4, [r3, #32] + 2365 001e 9342 cmp r3, r2 + 2366 0020 21D0 beq .L437 + 2367 0022 02F50062 add r2, r2, #2048 + 2368 0026 9342 cmp r3, r2 + 2369 0028 1DD0 beq .L437 + 2370 002a 02F54062 add r2, r2, #3072 + 2371 002e 9342 cmp r3, r2 + 2372 0030 19D0 beq .L437 + 2373 0032 02F58062 add r2, r2, #1024 + 2374 0036 9342 cmp r3, r2 + 2375 0038 15D0 beq .L437 + 2376 003a 02F58062 add r2, r2, #1024 + 2377 003e 9342 cmp r3, r2 + 2378 0040 11D0 beq .L437 + 2379 .L438: + 2380 0042 1C6A ldr r4, [r3, #32] + 2381 0044 41F21112 movw r2, #4369 + 2382 0048 1442 tst r4, r2 + 2383 004a 04D1 bne .L439 + 2384 004c 1C6A ldr r4, [r3, #32] + 2385 004e 44F24442 movw r2, #17476 + 2386 0052 1442 tst r4, r2 + 2387 0054 26D0 beq .L447 + 2388 .L439: + 2389 0056 0123 movs r3, #1 + 2390 0058 A1B9 cbnz r1, .L440 + 2391 005a 80F83E30 strb r3, [r0, #62] + 2392 .L441: + 2393 005e 0020 movs r0, #0 + 2394 0060 5DF8044B ldr r4, [sp], #4 + ARM GAS /tmp/cc6kdh5W.s page 42 + + + 2395 0064 7047 bx lr + 2396 .L437: + 2397 0066 1C6A ldr r4, [r3, #32] + 2398 0068 41F21112 movw r2, #4369 + 2399 006c 1442 tst r4, r2 + 2400 006e E8D1 bne .L438 + 2401 0070 1C6A ldr r4, [r3, #32] + 2402 0072 44F24442 movw r2, #17476 + 2403 0076 1442 tst r4, r2 + 2404 0078 E3D1 bne .L438 + 2405 007a 5A6C ldr r2, [r3, #68] + 2406 007c 22F40042 bic r2, r2, #32768 + 2407 0080 5A64 str r2, [r3, #68] + 2408 0082 DEE7 b .L438 + 2409 .L440: + 2410 0084 0429 cmp r1, #4 + 2411 0086 12D0 beq .L448 + 2412 0088 0829 cmp r1, #8 + 2413 008a 19D0 beq .L449 + 2414 008c 0C29 cmp r1, #12 + 2415 008e 14D0 beq .L450 + 2416 0090 1029 cmp r1, #16 + 2417 0092 0CBF ite eq + 2418 0094 80F84230 strbeq r3, [r0, #66] + 2419 0098 80F84330 strbne r3, [r0, #67] + 2420 009c 5DF8044B ldr r4, [sp], #4 + 2421 00a0 0020 movs r0, #0 + 2422 00a2 7047 bx lr + 2423 .L447: + 2424 00a4 1A68 ldr r2, [r3] + 2425 00a6 22F00102 bic r2, r2, #1 + 2426 00aa 1A60 str r2, [r3] + 2427 00ac D3E7 b .L439 + 2428 .L448: + 2429 00ae 80F83F30 strb r3, [r0, #63] + 2430 00b2 5DF8044B ldr r4, [sp], #4 + 2431 00b6 0020 movs r0, #0 + 2432 00b8 7047 bx lr + 2433 .L450: + 2434 00ba 80F84130 strb r3, [r0, #65] + 2435 00be CEE7 b .L441 + 2436 .L449: + 2437 00c0 80F84030 strb r3, [r0, #64] + 2438 00c4 5DF8044B ldr r4, [sp], #4 + 2439 00c8 0020 movs r0, #0 + 2440 00ca 7047 bx lr + 2441 .L452: + 2442 .align 2 + 2443 .L451: + 2444 00cc 002C0140 .word 1073818624 + 2446 .section .text.HAL_TIM_PWM_Start_IT,"ax",%progbits + 2447 .align 1 + 2448 .p2align 2,,3 + 2449 .global HAL_TIM_PWM_Start_IT + 2450 .syntax unified + 2451 .thumb + 2452 .thumb_func + ARM GAS /tmp/cc6kdh5W.s page 43 + + + 2453 .fpu fpv4-sp-d16 + 2455 HAL_TIM_PWM_Start_IT: + 2456 @ args = 0, pretend = 0, frame = 0 + 2457 @ frame_needed = 0, uses_anonymous_args = 0 + 2458 @ link register save eliminated. + 2459 0000 0029 cmp r1, #0 + 2460 0002 4FD1 bne .L454 + 2461 0004 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 2462 0008 012B cmp r3, #1 + 2463 000a 55D1 bne .L484 + 2464 000c 0368 ldr r3, [r0] + 2465 000e 0222 movs r2, #2 + 2466 0010 80F83E20 strb r2, [r0, #62] + 2467 0014 DA68 ldr r2, [r3, #12] + 2468 0016 42F00202 orr r2, r2, #2 + 2469 001a DA60 str r2, [r3, #12] + 2470 .L465: + 2471 001c 186A ldr r0, [r3, #32] + 2472 001e 0122 movs r2, #1 + 2473 0020 01F01F01 and r1, r1, #31 + 2474 0024 02FA01F1 lsl r1, r2, r1 + 2475 0028 20EA0100 bic r0, r0, r1 + 2476 002c 1862 str r0, [r3, #32] + 2477 002e 186A ldr r0, [r3, #32] + 2478 0030 504A ldr r2, .L498 + 2479 0032 0143 orrs r1, r1, r0 + 2480 0034 9342 cmp r3, r2 + 2481 0036 1962 str r1, [r3, #32] + 2482 0038 00F08D80 beq .L473 + 2483 003c 02F50062 add r2, r2, #2048 + 2484 0040 9342 cmp r3, r2 + 2485 0042 0BD0 beq .L474 + 2486 0044 02F54062 add r2, r2, #3072 + 2487 0048 9342 cmp r3, r2 + 2488 004a 07D0 beq .L474 + 2489 004c 02F58062 add r2, r2, #1024 + 2490 0050 9342 cmp r3, r2 + 2491 0052 03D0 beq .L474 + 2492 0054 02F58062 add r2, r2, #1024 + 2493 0058 9342 cmp r3, r2 + 2494 005a 03D1 bne .L477 + 2495 .L474: + 2496 005c 5A6C ldr r2, [r3, #68] + 2497 005e 42F40042 orr r2, r2, #32768 + 2498 0062 5A64 str r2, [r3, #68] + 2499 .L477: + 2500 0064 B3F1804F cmp r3, #1073741824 + 2501 0068 0ED0 beq .L475 + 2502 006a 434A ldr r2, .L498+4 + 2503 006c 9342 cmp r3, r2 + 2504 006e 0BD0 beq .L475 + 2505 0070 02F58062 add r2, r2, #1024 + 2506 0074 9342 cmp r3, r2 + 2507 0076 07D0 beq .L475 + 2508 0078 02F59632 add r2, r2, #76800 + 2509 007c 9342 cmp r3, r2 + 2510 007e 03D0 beq .L475 + ARM GAS /tmp/cc6kdh5W.s page 44 + + + 2511 0080 02F54062 add r2, r2, #3072 + 2512 0084 9342 cmp r3, r2 + 2513 0086 07D1 bne .L476 + 2514 .L475: + 2515 0088 9968 ldr r1, [r3, #8] + 2516 008a 3C4A ldr r2, .L498+8 + 2517 008c 0A40 ands r2, r2, r1 + 2518 008e 062A cmp r2, #6 + 2519 0090 14D0 beq .L486 + 2520 0092 B2F5803F cmp r2, #65536 + 2521 0096 11D0 beq .L486 + 2522 .L476: + 2523 0098 1A68 ldr r2, [r3] + 2524 009a 42F00102 orr r2, r2, #1 + 2525 009e 0020 movs r0, #0 + 2526 00a0 1A60 str r2, [r3] + 2527 00a2 7047 bx lr + 2528 .L454: + 2529 00a4 0429 cmp r1, #4 + 2530 00a6 40D0 beq .L495 + 2531 00a8 0829 cmp r1, #8 + 2532 00aa 31D0 beq .L496 + 2533 00ac 0C29 cmp r1, #12 + 2534 00ae 07D1 bne .L461 + 2535 00b0 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 2536 00b4 012B cmp r3, #1 + 2537 00b6 45D0 beq .L462 + 2538 .L484: + 2539 00b8 0120 movs r0, #1 + 2540 00ba 7047 bx lr + 2541 .L486: + 2542 00bc 0020 movs r0, #0 + 2543 00be 7047 bx lr + 2544 .L461: + 2545 00c0 1029 cmp r1, #16 + 2546 00c2 4DD0 beq .L497 + 2547 00c4 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2 + 2548 00c8 012B cmp r3, #1 + 2549 00ca F5D1 bne .L484 + 2550 00cc 0829 cmp r1, #8 + 2551 00ce 23D0 beq .L460 + 2552 00d0 0C29 cmp r1, #12 + 2553 00d2 37D0 beq .L462 + 2554 00d4 1029 cmp r1, #16 + 2555 00d6 47D0 beq .L492 + 2556 00d8 0222 movs r2, #2 + 2557 00da 0B1F subs r3, r1, #4 + 2558 00dc 80F84320 strb r2, [r0, #67] + 2559 00e0 082B cmp r3, #8 + 2560 00e2 E9D8 bhi .L484 + 2561 00e4 01A2 adr r2, .L472 + 2562 00e6 52F823F0 ldr pc, [r2, r3, lsl #2] + 2563 00ea 00BF .p2align 2 + 2564 .L472: + 2565 00ec 39010000 .word .L466+1 + 2566 00f0 B9000000 .word .L484+1 + 2567 00f4 B9000000 .word .L484+1 + ARM GAS /tmp/cc6kdh5W.s page 45 + + + 2568 00f8 B9000000 .word .L484+1 + 2569 00fc 1F010000 .word .L468+1 + 2570 0100 B9000000 .word .L484+1 + 2571 0104 B9000000 .word .L484+1 + 2572 0108 B9000000 .word .L484+1 + 2573 010c 4B010000 .word .L470+1 + 2574 .p2align 1 + 2575 .L496: + 2576 0110 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 2577 0114 012B cmp r3, #1 + 2578 0116 CFD1 bne .L484 + 2579 .L460: + 2580 0118 0223 movs r3, #2 + 2581 011a 80F84030 strb r3, [r0, #64] + 2582 .L468: + 2583 011e 0368 ldr r3, [r0] + 2584 0120 DA68 ldr r2, [r3, #12] + 2585 0122 42F00802 orr r2, r2, #8 + 2586 0126 DA60 str r2, [r3, #12] + 2587 0128 78E7 b .L465 + 2588 .L495: + 2589 012a 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 2590 012e 012B cmp r3, #1 + 2591 0130 C2D1 bne .L484 + 2592 0132 0223 movs r3, #2 + 2593 0134 80F83F30 strb r3, [r0, #63] + 2594 .L466: + 2595 0138 0368 ldr r3, [r0] + 2596 013a DA68 ldr r2, [r3, #12] + 2597 013c 42F00402 orr r2, r2, #4 + 2598 0140 DA60 str r2, [r3, #12] + 2599 0142 6BE7 b .L465 + 2600 .L462: + 2601 0144 0223 movs r3, #2 + 2602 0146 80F84130 strb r3, [r0, #65] + 2603 .L470: + 2604 014a 0368 ldr r3, [r0] + 2605 014c DA68 ldr r2, [r3, #12] + 2606 014e 42F01002 orr r2, r2, #16 + 2607 0152 DA60 str r2, [r3, #12] + 2608 0154 62E7 b .L465 + 2609 .L473: + 2610 0156 5A6C ldr r2, [r3, #68] + 2611 0158 42F40042 orr r2, r2, #32768 + 2612 015c 5A64 str r2, [r3, #68] + 2613 015e 93E7 b .L475 + 2614 .L497: + 2615 0160 90F84230 ldrb r3, [r0, #66] @ zero_extendqisi2 + 2616 0164 012B cmp r3, #1 + 2617 0166 A7D1 bne .L484 + 2618 .L492: + 2619 0168 0223 movs r3, #2 + 2620 016a 80F84230 strb r3, [r0, #66] + 2621 016e 0120 movs r0, #1 + 2622 0170 7047 bx lr + 2623 .L499: + 2624 0172 00BF .align 2 + ARM GAS /tmp/cc6kdh5W.s page 46 + + + 2625 .L498: + 2626 0174 002C0140 .word 1073818624 + 2627 0178 00040040 .word 1073742848 + 2628 017c 07000100 .word 65543 + 2630 .section .text.HAL_TIM_PWM_Stop_IT,"ax",%progbits + 2631 .align 1 + 2632 .p2align 2,,3 + 2633 .global HAL_TIM_PWM_Stop_IT + 2634 .syntax unified + 2635 .thumb + 2636 .thumb_func + 2637 .fpu fpv4-sp-d16 + 2639 HAL_TIM_PWM_Stop_IT: + 2640 @ args = 0, pretend = 0, frame = 0 + 2641 @ frame_needed = 0, uses_anonymous_args = 0 + 2642 @ link register save eliminated. + 2643 0000 0C29 cmp r1, #12 + 2644 0002 08D8 bhi .L516 + 2645 0004 DFE801F0 tbb [pc, r1] + 2646 .L503: + 2647 0008 50 .byte (.L506-.L503)/2 + 2648 0009 07 .byte (.L516-.L503)/2 + 2649 000a 07 .byte (.L516-.L503)/2 + 2650 000b 07 .byte (.L516-.L503)/2 + 2651 000c 4A .byte (.L505-.L503)/2 + 2652 000d 07 .byte (.L516-.L503)/2 + 2653 000e 07 .byte (.L516-.L503)/2 + 2654 000f 07 .byte (.L516-.L503)/2 + 2655 0010 44 .byte (.L504-.L503)/2 + 2656 0011 07 .byte (.L516-.L503)/2 + 2657 0012 07 .byte (.L516-.L503)/2 + 2658 0013 07 .byte (.L516-.L503)/2 + 2659 0014 09 .byte (.L502-.L503)/2 + 2660 0015 00 .p2align 1 + 2661 .L516: + 2662 0016 0120 movs r0, #1 + 2663 0018 7047 bx lr + 2664 .L502: + 2665 001a 0368 ldr r3, [r0] + 2666 001c DA68 ldr r2, [r3, #12] + 2667 001e 22F01002 bic r2, r2, #16 + 2668 0022 DA60 str r2, [r3, #12] + 2669 .L507: + 2670 0024 1A6A ldr r2, [r3, #32] + 2671 0026 10B4 push {r4} + 2672 0028 4FF0010C mov ip, #1 + 2673 002c 01F01F04 and r4, r1, #31 + 2674 0030 0CFA04FC lsl ip, ip, r4 + 2675 0034 22EA0C02 bic r2, r2, ip + 2676 0038 1A62 str r2, [r3, #32] + 2677 003a 354A ldr r2, .L523 + 2678 003c 1C6A ldr r4, [r3, #32] + 2679 003e 1C62 str r4, [r3, #32] + 2680 0040 9342 cmp r3, r2 + 2681 0042 37D0 beq .L508 + 2682 0044 02F50062 add r2, r2, #2048 + 2683 0048 9342 cmp r3, r2 + ARM GAS /tmp/cc6kdh5W.s page 47 + + + 2684 004a 33D0 beq .L508 + 2685 004c 02F54062 add r2, r2, #3072 + 2686 0050 9342 cmp r3, r2 + 2687 0052 2FD0 beq .L508 + 2688 0054 02F58062 add r2, r2, #1024 + 2689 0058 9342 cmp r3, r2 + 2690 005a 2BD0 beq .L508 + 2691 005c 02F58062 add r2, r2, #1024 + 2692 0060 9342 cmp r3, r2 + 2693 0062 27D0 beq .L508 + 2694 .L509: + 2695 0064 1C6A ldr r4, [r3, #32] + 2696 0066 41F21112 movw r2, #4369 + 2697 006a 1442 tst r4, r2 + 2698 006c 08D1 bne .L510 + 2699 006e 1C6A ldr r4, [r3, #32] + 2700 0070 44F24442 movw r2, #17476 + 2701 0074 1442 tst r4, r2 + 2702 0076 03D1 bne .L510 + 2703 0078 1A68 ldr r2, [r3] + 2704 007a 22F00102 bic r2, r2, #1 + 2705 007e 1A60 str r2, [r3] + 2706 .L510: + 2707 0080 0123 movs r3, #1 + 2708 0082 31BB cbnz r1, .L511 + 2709 0084 80F83E30 strb r3, [r0, #62] + 2710 0088 0846 mov r0, r1 + 2711 .L501: + 2712 008a 5DF8044B ldr r4, [sp], #4 + 2713 008e 7047 bx lr + 2714 .L504: + 2715 0090 0368 ldr r3, [r0] + 2716 0092 DA68 ldr r2, [r3, #12] + 2717 0094 22F00802 bic r2, r2, #8 + 2718 0098 DA60 str r2, [r3, #12] + 2719 009a C3E7 b .L507 + 2720 .L505: + 2721 009c 0368 ldr r3, [r0] + 2722 009e DA68 ldr r2, [r3, #12] + 2723 00a0 22F00402 bic r2, r2, #4 + 2724 00a4 DA60 str r2, [r3, #12] + 2725 00a6 BDE7 b .L507 + 2726 .L506: + 2727 00a8 0368 ldr r3, [r0] + 2728 00aa DA68 ldr r2, [r3, #12] + 2729 00ac 22F00202 bic r2, r2, #2 + 2730 00b0 DA60 str r2, [r3, #12] + 2731 00b2 B7E7 b .L507 + 2732 .L508: + 2733 00b4 1C6A ldr r4, [r3, #32] + 2734 00b6 41F21112 movw r2, #4369 + 2735 00ba 1442 tst r4, r2 + 2736 00bc D2D1 bne .L509 + 2737 00be 1C6A ldr r4, [r3, #32] + 2738 00c0 44F24442 movw r2, #17476 + 2739 00c4 1442 tst r4, r2 + 2740 00c6 CDD1 bne .L509 + ARM GAS /tmp/cc6kdh5W.s page 48 + + + 2741 00c8 5A6C ldr r2, [r3, #68] + 2742 00ca 22F40042 bic r2, r2, #32768 + 2743 00ce 5A64 str r2, [r3, #68] + 2744 00d0 C8E7 b .L509 + 2745 .L511: + 2746 00d2 0429 cmp r1, #4 + 2747 00d4 11D0 beq .L520 + 2748 00d6 0829 cmp r1, #8 + 2749 00d8 0BD0 beq .L521 + 2750 00da 0C29 cmp r1, #12 + 2751 00dc 13D0 beq .L522 + 2752 00de 1029 cmp r1, #16 + 2753 00e0 0CBF ite eq + 2754 00e2 80F84230 strbeq r3, [r0, #66] + 2755 00e6 80F84330 strbne r3, [r0, #67] + 2756 00ea 5DF8044B ldr r4, [sp], #4 + 2757 00ee 0020 movs r0, #0 + 2758 00f0 7047 bx lr + 2759 .L521: + 2760 00f2 80F84030 strb r3, [r0, #64] + 2761 00f6 0020 movs r0, #0 + 2762 00f8 C7E7 b .L501 + 2763 .L520: + 2764 00fa 80F83F30 strb r3, [r0, #63] + 2765 00fe 5DF8044B ldr r4, [sp], #4 + 2766 0102 0020 movs r0, #0 + 2767 0104 7047 bx lr + 2768 .L522: + 2769 0106 80F84130 strb r3, [r0, #65] + 2770 010a 0020 movs r0, #0 + 2771 010c BDE7 b .L501 + 2772 .L524: + 2773 010e 00BF .align 2 + 2774 .L523: + 2775 0110 002C0140 .word 1073818624 + 2777 .section .text.HAL_TIM_PWM_Start_DMA,"ax",%progbits + 2778 .align 1 + 2779 .p2align 2,,3 + 2780 .global HAL_TIM_PWM_Start_DMA + 2781 .syntax unified + 2782 .thumb + 2783 .thumb_func + 2784 .fpu fpv4-sp-d16 + 2786 HAL_TIM_PWM_Start_DMA: + 2787 @ args = 0, pretend = 0, frame = 0 + 2788 @ frame_needed = 0, uses_anonymous_args = 0 + 2789 0000 70B5 push {r4, r5, r6, lr} + 2790 0002 0546 mov r5, r0 + 2791 0004 0C46 mov r4, r1 + 2792 0006 0029 cmp r1, #0 + 2793 0008 40F09A80 bne .L526 + 2794 000c 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 2795 0010 A0F10200 sub r0, #2 + 2796 0014 B0FA80F0 clz r0, r0 + 2797 0018 4009 lsrs r0, r0, #5 + 2798 .L527: + 2799 001a 38BB cbnz r0, .L571 + ARM GAS /tmp/cc6kdh5W.s page 49 + + + 2800 001c 44B3 cbz r4, .L572 + 2801 001e 042C cmp r4, #4 + 2802 0020 00F0D880 beq .L573 + 2803 0024 082C cmp r4, #8 + 2804 0026 00F09D80 beq .L574 + 2805 002a 0C2C cmp r4, #12 + 2806 002c 00F00081 beq .L575 + 2807 0030 102C cmp r4, #16 + 2808 0032 00F02681 beq .L576 + 2809 0036 95F84310 ldrb r1, [r5, #67] @ zero_extendqisi2 + 2810 003a 0129 cmp r1, #1 + 2811 003c 7ED1 bne .L570 + 2812 003e 002A cmp r2, #0 + 2813 0040 00F02781 beq .L577 + 2814 .L550: + 2815 0044 0221 movs r1, #2 + 2816 0046 85F84310 strb r1, [r5, #67] + 2817 004a 0C2C cmp r4, #12 + 2818 004c 76D8 bhi .L570 + 2819 004e DFE814F0 tbh [pc, r4, lsl #1] + 2820 .L551: + 2821 0052 2000 .2byte (.L543-.L551)/2 + 2822 0054 7500 .2byte (.L570-.L551)/2 + 2823 0056 7500 .2byte (.L570-.L551)/2 + 2824 0058 7500 .2byte (.L570-.L551)/2 + 2825 005a D600 .2byte (.L545-.L551)/2 + 2826 005c 7500 .2byte (.L570-.L551)/2 + 2827 005e 7500 .2byte (.L570-.L551)/2 + 2828 0060 7500 .2byte (.L570-.L551)/2 + 2829 0062 A500 .2byte (.L547-.L551)/2 + 2830 0064 7500 .2byte (.L570-.L551)/2 + 2831 0066 7500 .2byte (.L570-.L551)/2 + 2832 0068 7500 .2byte (.L570-.L551)/2 + 2833 006a FC00 .2byte (.L549-.L551)/2 + 2834 .p2align 1 + 2835 .L571: + 2836 006c 0220 movs r0, #2 + 2837 006e 70BD pop {r4, r5, r6, pc} + 2838 .L572: + 2839 0070 95F83E10 ldrb r1, [r5, #62] @ zero_extendqisi2 + 2840 0074 A1F10101 sub r1, #1 + 2841 0078 B1FA81F1 clz r1, r1 + 2842 007c 4909 lsrs r1, r1, #5 + 2843 .L533: + 2844 007e 0029 cmp r1, #0 + 2845 0080 5CD0 beq .L570 + 2846 0082 002A cmp r2, #0 + 2847 0084 58D0 beq .L578 + 2848 .L540: + 2849 0086 002C cmp r4, #0 + 2850 0088 40F08180 bne .L542 + 2851 008c 0221 movs r1, #2 + 2852 008e 85F83E10 strb r1, [r5, #62] + 2853 .L543: + 2854 0092 686A ldr r0, [r5, #36] + 2855 0094 814E ldr r6, .L583 + 2856 0096 1146 mov r1, r2 + ARM GAS /tmp/cc6kdh5W.s page 50 + + + 2857 0098 2A68 ldr r2, [r5] + 2858 009a C662 str r6, [r0, #44] + 2859 009c 804E ldr r6, .L583+4 + 2860 009e 0663 str r6, [r0, #48] + 2861 00a0 804E ldr r6, .L583+8 + 2862 00a2 4663 str r6, [r0, #52] + 2863 00a4 3432 adds r2, r2, #52 + 2864 00a6 FFF7FEFF bl HAL_DMA_Start_IT + 2865 00aa 0028 cmp r0, #0 + 2866 00ac 46D1 bne .L570 + 2867 00ae 2B68 ldr r3, [r5] + 2868 00b0 DA68 ldr r2, [r3, #12] + 2869 00b2 42F40072 orr r2, r2, #512 + 2870 00b6 DA60 str r2, [r3, #12] + 2871 .L552: + 2872 00b8 186A ldr r0, [r3, #32] + 2873 00ba 0122 movs r2, #1 + 2874 00bc 04F01F04 and r4, r4, #31 + 2875 00c0 02FA04F4 lsl r4, r2, r4 + 2876 00c4 20EA0400 bic r0, r0, r4 + 2877 00c8 1862 str r0, [r3, #32] + 2878 00ca 196A ldr r1, [r3, #32] + 2879 00cc 764A ldr r2, .L583+12 + 2880 00ce 0C43 orrs r4, r4, r1 + 2881 00d0 9342 cmp r3, r2 + 2882 00d2 1C62 str r4, [r3, #32] + 2883 00d4 00F0A780 beq .L553 + 2884 00d8 02F50062 add r2, r2, #2048 + 2885 00dc 9342 cmp r3, r2 + 2886 00de 51D0 beq .L554 + 2887 00e0 02F54062 add r2, r2, #3072 + 2888 00e4 9342 cmp r3, r2 + 2889 00e6 4DD0 beq .L554 + 2890 00e8 02F58062 add r2, r2, #1024 + 2891 00ec 9342 cmp r3, r2 + 2892 00ee 49D0 beq .L554 + 2893 00f0 02F58062 add r2, r2, #1024 + 2894 00f4 9342 cmp r3, r2 + 2895 00f6 45D0 beq .L554 + 2896 .L557: + 2897 00f8 B3F1804F cmp r3, #1073741824 + 2898 00fc 0ED0 beq .L555 + 2899 00fe 6B4A ldr r2, .L583+16 + 2900 0100 9342 cmp r3, r2 + 2901 0102 0BD0 beq .L555 + 2902 0104 02F58062 add r2, r2, #1024 + 2903 0108 9342 cmp r3, r2 + 2904 010a 07D0 beq .L555 + 2905 010c 02F59632 add r2, r2, #76800 + 2906 0110 9342 cmp r3, r2 + 2907 0112 03D0 beq .L555 + 2908 0114 02F54062 add r2, r2, #3072 + 2909 0118 9342 cmp r3, r2 + 2910 011a 07D1 bne .L556 + 2911 .L555: + 2912 011c 9968 ldr r1, [r3, #8] + 2913 011e 644A ldr r2, .L583+20 + ARM GAS /tmp/cc6kdh5W.s page 51 + + + 2914 0120 0A40 ands r2, r2, r1 + 2915 0122 062A cmp r2, #6 + 2916 0124 5ED0 beq .L562 + 2917 0126 B2F5803F cmp r2, #65536 + 2918 012a 5BD0 beq .L562 + 2919 .L556: + 2920 012c 1A68 ldr r2, [r3] + 2921 012e 42F00102 orr r2, r2, #1 + 2922 0132 0020 movs r0, #0 + 2923 0134 1A60 str r2, [r3] + 2924 0136 70BD pop {r4, r5, r6, pc} + 2925 .L578: + 2926 0138 002B cmp r3, #0 + 2927 013a A4D0 beq .L540 + 2928 .L570: + 2929 013c 0120 movs r0, #1 + 2930 013e 70BD pop {r4, r5, r6, pc} + 2931 .L526: + 2932 0140 0429 cmp r1, #4 + 2933 0142 3FD0 beq .L579 + 2934 0144 0829 cmp r1, #8 + 2935 0146 4FD0 beq .L580 + 2936 0148 0C29 cmp r1, #12 + 2937 014a 13D0 beq .L581 + 2938 014c 1029 cmp r1, #16 + 2939 014e 0CBF ite eq + 2940 0150 90F84200 ldrbeq r0, [r0, #66] @ zero_extendqisi2 + 2941 0154 95F84300 ldrbne r0, [r5, #67] @ zero_extendqisi2 + 2942 0158 A0F10200 sub r0, #2 + 2943 015c B0FA80F0 clz r0, r0 + 2944 0160 4009 lsrs r0, r0, #5 + 2945 0162 5AE7 b .L527 + 2946 .L574: + 2947 0164 95F84010 ldrb r1, [r5, #64] @ zero_extendqisi2 + 2948 0168 A1F10101 sub r1, #1 + 2949 016c B1FA81F1 clz r1, r1 + 2950 0170 4909 lsrs r1, r1, #5 + 2951 0172 84E7 b .L533 + 2952 .L581: + 2953 0174 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 2954 0178 A0F10200 sub r0, #2 + 2955 017c B0FA80F0 clz r0, r0 + 2956 0180 4009 lsrs r0, r0, #5 + 2957 0182 4AE7 b .L527 + 2958 .L554: + 2959 0184 5A6C ldr r2, [r3, #68] + 2960 0186 42F40042 orr r2, r2, #32768 + 2961 018a 5A64 str r2, [r3, #68] + 2962 018c B4E7 b .L557 + 2963 .L542: + 2964 018e 042C cmp r4, #4 + 2965 0190 32D0 beq .L582 + 2966 0192 082C cmp r4, #8 + 2967 0194 54D1 bne .L546 + 2968 0196 0221 movs r1, #2 + 2969 0198 85F84010 strb r1, [r5, #64] + 2970 .L547: + ARM GAS /tmp/cc6kdh5W.s page 52 + + + 2971 019c E86A ldr r0, [r5, #44] + 2972 019e 3F4E ldr r6, .L583 + 2973 01a0 1146 mov r1, r2 + 2974 01a2 2A68 ldr r2, [r5] + 2975 01a4 C662 str r6, [r0, #44] + 2976 01a6 3E4E ldr r6, .L583+4 + 2977 01a8 0663 str r6, [r0, #48] + 2978 01aa 3E4E ldr r6, .L583+8 + 2979 01ac 4663 str r6, [r0, #52] + 2980 01ae 3C32 adds r2, r2, #60 + 2981 01b0 FFF7FEFF bl HAL_DMA_Start_IT + 2982 01b4 0028 cmp r0, #0 + 2983 01b6 C1D1 bne .L570 + 2984 01b8 2B68 ldr r3, [r5] + 2985 01ba DA68 ldr r2, [r3, #12] + 2986 01bc 42F40062 orr r2, r2, #2048 + 2987 01c0 DA60 str r2, [r3, #12] + 2988 01c2 79E7 b .L552 + 2989 .L579: + 2990 01c4 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 2991 01c8 A0F10200 sub r0, #2 + 2992 01cc B0FA80F0 clz r0, r0 + 2993 01d0 4009 lsrs r0, r0, #5 + 2994 01d2 22E7 b .L527 + 2995 .L573: + 2996 01d4 95F83F10 ldrb r1, [r5, #63] @ zero_extendqisi2 + 2997 01d8 A1F10101 sub r1, #1 + 2998 01dc B1FA81F1 clz r1, r1 + 2999 01e0 4909 lsrs r1, r1, #5 + 3000 01e2 4CE7 b .L533 + 3001 .L562: + 3002 01e4 0020 movs r0, #0 + 3003 01e6 70BD pop {r4, r5, r6, pc} + 3004 .L580: + 3005 01e8 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 3006 01ec A0F10200 sub r0, #2 + 3007 01f0 B0FA80F0 clz r0, r0 + 3008 01f4 4009 lsrs r0, r0, #5 + 3009 01f6 10E7 b .L527 + 3010 .L582: + 3011 01f8 0221 movs r1, #2 + 3012 01fa 85F83F10 strb r1, [r5, #63] + 3013 .L545: + 3014 01fe A86A ldr r0, [r5, #40] + 3015 0200 264E ldr r6, .L583 + 3016 0202 1146 mov r1, r2 + 3017 0204 2A68 ldr r2, [r5] + 3018 0206 C662 str r6, [r0, #44] + 3019 0208 254E ldr r6, .L583+4 + 3020 020a 0663 str r6, [r0, #48] + 3021 020c 254E ldr r6, .L583+8 + 3022 020e 4663 str r6, [r0, #52] + 3023 0210 3832 adds r2, r2, #56 + 3024 0212 FFF7FEFF bl HAL_DMA_Start_IT + 3025 0216 0028 cmp r0, #0 + 3026 0218 90D1 bne .L570 + 3027 021a 2B68 ldr r3, [r5] + ARM GAS /tmp/cc6kdh5W.s page 53 + + + 3028 021c DA68 ldr r2, [r3, #12] + 3029 021e 42F48062 orr r2, r2, #1024 + 3030 0222 DA60 str r2, [r3, #12] + 3031 0224 48E7 b .L552 + 3032 .L553: + 3033 0226 5A6C ldr r2, [r3, #68] + 3034 0228 42F40042 orr r2, r2, #32768 + 3035 022c 5A64 str r2, [r3, #68] + 3036 022e 75E7 b .L555 + 3037 .L575: + 3038 0230 95F84110 ldrb r1, [r5, #65] @ zero_extendqisi2 + 3039 0234 A1F10101 sub r1, #1 + 3040 0238 B1FA81F1 clz r1, r1 + 3041 023c 4909 lsrs r1, r1, #5 + 3042 023e 1EE7 b .L533 + 3043 .L546: + 3044 0240 0C2C cmp r4, #12 + 3045 0242 17D1 bne .L548 + 3046 0244 0221 movs r1, #2 + 3047 0246 85F84110 strb r1, [r5, #65] + 3048 .L549: + 3049 024a 286B ldr r0, [r5, #48] + 3050 024c 134E ldr r6, .L583 + 3051 024e 1146 mov r1, r2 + 3052 0250 2A68 ldr r2, [r5] + 3053 0252 C662 str r6, [r0, #44] + 3054 0254 124E ldr r6, .L583+4 + 3055 0256 0663 str r6, [r0, #48] + 3056 0258 124E ldr r6, .L583+8 + 3057 025a 4663 str r6, [r0, #52] + 3058 025c 4032 adds r2, r2, #64 + 3059 025e FFF7FEFF bl HAL_DMA_Start_IT + 3060 0262 0028 cmp r0, #0 + 3061 0264 7FF46AAF bne .L570 + 3062 0268 2B68 ldr r3, [r5] + 3063 026a DA68 ldr r2, [r3, #12] + 3064 026c 42F48052 orr r2, r2, #4096 + 3065 0270 DA60 str r2, [r3, #12] + 3066 0272 21E7 b .L552 + 3067 .L548: + 3068 0274 102C cmp r4, #16 + 3069 0276 7FF4E5AE bne .L550 + 3070 027a 0223 movs r3, #2 + 3071 027c 85F84230 strb r3, [r5, #66] + 3072 0280 5CE7 b .L570 + 3073 .L576: + 3074 0282 95F84210 ldrb r1, [r5, #66] @ zero_extendqisi2 + 3075 0286 A1F10101 sub r1, #1 + 3076 028a B1FA81F1 clz r1, r1 + 3077 028e 4909 lsrs r1, r1, #5 + 3078 0290 F5E6 b .L533 + 3079 .L577: + 3080 0292 002B cmp r3, #0 + 3081 0294 3FF4D6AE beq .L550 + 3082 0298 50E7 b .L570 + 3083 .L584: + 3084 029a 00BF .align 2 + ARM GAS /tmp/cc6kdh5W.s page 54 + + + 3085 .L583: + 3086 029c 00000000 .word TIM_DMADelayPulseCplt + 3087 02a0 00000000 .word TIM_DMADelayPulseHalfCplt + 3088 02a4 00000000 .word TIM_DMAError + 3089 02a8 002C0140 .word 1073818624 + 3090 02ac 00040040 .word 1073742848 + 3091 02b0 07000100 .word 65543 + 3093 .section .text.HAL_TIM_PWM_Stop_DMA,"ax",%progbits + 3094 .align 1 + 3095 .p2align 2,,3 + 3096 .global HAL_TIM_PWM_Stop_DMA + 3097 .syntax unified + 3098 .thumb + 3099 .thumb_func + 3100 .fpu fpv4-sp-d16 + 3102 HAL_TIM_PWM_Stop_DMA: + 3103 @ args = 0, pretend = 0, frame = 0 + 3104 @ frame_needed = 0, uses_anonymous_args = 0 + 3105 0000 38B5 push {r3, r4, r5, lr} + 3106 0002 0C46 mov r4, r1 + 3107 0004 0546 mov r5, r0 + 3108 0006 0C29 cmp r1, #12 + 3109 0008 08D8 bhi .L601 + 3110 000a DFE801F0 tbb [pc, r1] + 3111 .L588: + 3112 000e 55 .byte (.L591-.L588)/2 + 3113 000f 07 .byte (.L601-.L588)/2 + 3114 0010 07 .byte (.L601-.L588)/2 + 3115 0011 07 .byte (.L601-.L588)/2 + 3116 0012 4C .byte (.L590-.L588)/2 + 3117 0013 07 .byte (.L601-.L588)/2 + 3118 0014 07 .byte (.L601-.L588)/2 + 3119 0015 07 .byte (.L601-.L588)/2 + 3120 0016 43 .byte (.L589-.L588)/2 + 3121 0017 07 .byte (.L601-.L588)/2 + 3122 0018 07 .byte (.L601-.L588)/2 + 3123 0019 07 .byte (.L601-.L588)/2 + 3124 001a 09 .byte (.L587-.L588)/2 + 3125 001b 00 .p2align 1 + 3126 .L601: + 3127 001c 0120 movs r0, #1 + 3128 001e 38BD pop {r3, r4, r5, pc} + 3129 .L587: + 3130 0020 0268 ldr r2, [r0] + 3131 0022 006B ldr r0, [r0, #48] + 3132 0024 D368 ldr r3, [r2, #12] + 3133 0026 23F48053 bic r3, r3, #4096 + 3134 002a D360 str r3, [r2, #12] + 3135 002c FFF7FEFF bl HAL_DMA_Abort_IT + 3136 .L592: + 3137 0030 2B68 ldr r3, [r5] + 3138 0032 04F01F00 and r0, r4, #31 + 3139 0036 1A6A ldr r2, [r3, #32] + 3140 0038 0121 movs r1, #1 + 3141 003a 8140 lsls r1, r1, r0 + 3142 003c 22EA0102 bic r2, r2, r1 + 3143 0040 1A62 str r2, [r3, #32] + ARM GAS /tmp/cc6kdh5W.s page 55 + + + 3144 0042 364A ldr r2, .L606 + 3145 0044 196A ldr r1, [r3, #32] + 3146 0046 1962 str r1, [r3, #32] + 3147 0048 9342 cmp r3, r2 + 3148 004a 3ED0 beq .L593 + 3149 004c 02F50062 add r2, r2, #2048 + 3150 0050 9342 cmp r3, r2 + 3151 0052 3AD0 beq .L593 + 3152 0054 02F54062 add r2, r2, #3072 + 3153 0058 9342 cmp r3, r2 + 3154 005a 36D0 beq .L593 + 3155 005c 02F58062 add r2, r2, #1024 + 3156 0060 9342 cmp r3, r2 + 3157 0062 32D0 beq .L593 + 3158 0064 02F58062 add r2, r2, #1024 + 3159 0068 9342 cmp r3, r2 + 3160 006a 2ED0 beq .L593 + 3161 .L594: + 3162 006c 196A ldr r1, [r3, #32] + 3163 006e 41F21112 movw r2, #4369 + 3164 0072 1142 tst r1, r2 + 3165 0074 08D1 bne .L595 + 3166 0076 196A ldr r1, [r3, #32] + 3167 0078 44F24442 movw r2, #17476 + 3168 007c 1142 tst r1, r2 + 3169 007e 03D1 bne .L595 + 3170 0080 1A68 ldr r2, [r3] + 3171 0082 22F00102 bic r2, r2, #1 + 3172 0086 1A60 str r2, [r3] + 3173 .L595: + 3174 0088 0123 movs r3, #1 + 3175 008a 6CBB cbnz r4, .L596 + 3176 008c 85F83E30 strb r3, [r5, #62] + 3177 0090 2046 mov r0, r4 + 3178 0092 38BD pop {r3, r4, r5, pc} + 3179 .L589: + 3180 0094 0268 ldr r2, [r0] + 3181 0096 C06A ldr r0, [r0, #44] + 3182 0098 D368 ldr r3, [r2, #12] + 3183 009a 23F40063 bic r3, r3, #2048 + 3184 009e D360 str r3, [r2, #12] + 3185 00a0 FFF7FEFF bl HAL_DMA_Abort_IT + 3186 00a4 C4E7 b .L592 + 3187 .L590: + 3188 00a6 0268 ldr r2, [r0] + 3189 00a8 806A ldr r0, [r0, #40] + 3190 00aa D368 ldr r3, [r2, #12] + 3191 00ac 23F48063 bic r3, r3, #1024 + 3192 00b0 D360 str r3, [r2, #12] + 3193 00b2 FFF7FEFF bl HAL_DMA_Abort_IT + 3194 00b6 BBE7 b .L592 + 3195 .L591: + 3196 00b8 0268 ldr r2, [r0] + 3197 00ba 406A ldr r0, [r0, #36] + 3198 00bc D368 ldr r3, [r2, #12] + 3199 00be 23F40073 bic r3, r3, #512 + 3200 00c2 D360 str r3, [r2, #12] + ARM GAS /tmp/cc6kdh5W.s page 56 + + + 3201 00c4 FFF7FEFF bl HAL_DMA_Abort_IT + 3202 00c8 B2E7 b .L592 + 3203 .L593: + 3204 00ca 196A ldr r1, [r3, #32] + 3205 00cc 41F21112 movw r2, #4369 + 3206 00d0 1142 tst r1, r2 + 3207 00d2 CBD1 bne .L594 + 3208 00d4 196A ldr r1, [r3, #32] + 3209 00d6 44F24442 movw r2, #17476 + 3210 00da 1142 tst r1, r2 + 3211 00dc C6D1 bne .L594 + 3212 00de 5A6C ldr r2, [r3, #68] + 3213 00e0 22F40042 bic r2, r2, #32768 + 3214 00e4 5A64 str r2, [r3, #68] + 3215 00e6 C1E7 b .L594 + 3216 .L596: + 3217 00e8 042C cmp r4, #4 + 3218 00ea 0FD0 beq .L603 + 3219 00ec 082C cmp r4, #8 + 3220 00ee 09D0 beq .L604 + 3221 00f0 0C2C cmp r4, #12 + 3222 00f2 0FD0 beq .L605 + 3223 00f4 102C cmp r4, #16 + 3224 00f6 0CBF ite eq + 3225 00f8 85F84230 strbeq r3, [r5, #66] + 3226 00fc 85F84330 strbne r3, [r5, #67] + 3227 0100 0020 movs r0, #0 + 3228 0102 38BD pop {r3, r4, r5, pc} + 3229 .L604: + 3230 0104 85F84030 strb r3, [r5, #64] + 3231 0108 0020 movs r0, #0 + 3232 010a 38BD pop {r3, r4, r5, pc} + 3233 .L603: + 3234 010c 85F83F30 strb r3, [r5, #63] + 3235 0110 0020 movs r0, #0 + 3236 0112 38BD pop {r3, r4, r5, pc} + 3237 .L605: + 3238 0114 85F84130 strb r3, [r5, #65] + 3239 0118 0020 movs r0, #0 + 3240 011a 38BD pop {r3, r4, r5, pc} + 3241 .L607: + 3242 .align 2 + 3243 .L606: + 3244 011c 002C0140 .word 1073818624 + 3246 .section .text.HAL_TIM_IC_MspInit,"ax",%progbits + 3247 .align 1 + 3248 .p2align 2,,3 + 3249 .weak HAL_TIM_IC_MspInit + 3250 .syntax unified + 3251 .thumb + 3252 .thumb_func + 3253 .fpu fpv4-sp-d16 + 3255 HAL_TIM_IC_MspInit: + 3256 @ args = 0, pretend = 0, frame = 0 + 3257 @ frame_needed = 0, uses_anonymous_args = 0 + 3258 @ link register save eliminated. + 3259 0000 7047 bx lr + ARM GAS /tmp/cc6kdh5W.s page 57 + + + 3261 0002 00BF .section .text.HAL_TIM_IC_Init,"ax",%progbits + 3262 .align 1 + 3263 .p2align 2,,3 + 3264 .global HAL_TIM_IC_Init + 3265 .syntax unified + 3266 .thumb + 3267 .thumb_func + 3268 .fpu fpv4-sp-d16 + 3270 HAL_TIM_IC_Init: + 3271 @ args = 0, pretend = 0, frame = 0 + 3272 @ frame_needed = 0, uses_anonymous_args = 0 + 3273 0000 0028 cmp r0, #0 + 3274 0002 00F08180 beq .L624 + 3275 0006 10B5 push {r4, lr} + 3276 0008 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 3277 000c 0446 mov r4, r0 + 3278 000e 03F0FF02 and r2, r3, #255 + 3279 0012 002B cmp r3, #0 + 3280 0014 6DD0 beq .L632 + 3281 .L611: + 3282 0016 2268 ldr r2, [r4] + 3283 0018 3C49 ldr r1, .L633 + 3284 001a 0223 movs r3, #2 + 3285 001c 84F83D30 strb r3, [r4, #61] + 3286 0020 8A42 cmp r2, r1 + 3287 0022 1368 ldr r3, [r2] + 3288 0024 51D0 beq .L616 + 3289 0026 B2F1804F cmp r2, #1073741824 + 3290 002a 21D0 beq .L614 + 3291 002c A1F59431 sub r1, r1, #75776 + 3292 0030 8A42 cmp r2, r1 + 3293 0032 1DD0 beq .L614 + 3294 0034 01F58061 add r1, r1, #1024 + 3295 0038 8A42 cmp r2, r1 + 3296 003a 19D0 beq .L614 + 3297 003c 01F59631 add r1, r1, #76800 + 3298 0040 8A42 cmp r2, r1 + 3299 0042 42D0 beq .L616 + 3300 0044 01F54061 add r1, r1, #3072 + 3301 0048 8A42 cmp r2, r1 + 3302 004a 57D0 beq .L617 + 3303 004c 01F58061 add r1, r1, #1024 + 3304 0050 8A42 cmp r2, r1 + 3305 0052 53D0 beq .L617 + 3306 0054 01F58061 add r1, r1, #1024 + 3307 0058 8A42 cmp r2, r1 + 3308 005a 4FD0 beq .L617 + 3309 005c A069 ldr r0, [r4, #24] + 3310 005e E168 ldr r1, [r4, #12] + 3311 0060 23F08003 bic r3, r3, #128 + 3312 0064 0343 orrs r3, r3, r0 + 3313 0066 1360 str r3, [r2] + 3314 0068 6368 ldr r3, [r4, #4] + 3315 006a D162 str r1, [r2, #44] + 3316 006c 9362 str r3, [r2, #40] + 3317 006e 10E0 b .L621 + 3318 .L614: + ARM GAS /tmp/cc6kdh5W.s page 58 + + + 3319 0070 A168 ldr r1, [r4, #8] + 3320 0072 2069 ldr r0, [r4, #16] + 3321 0074 23F07003 bic r3, r3, #112 + 3322 0078 0B43 orrs r3, r3, r1 + 3323 007a 23F44073 bic r3, r3, #768 + 3324 007e A169 ldr r1, [r4, #24] + 3325 0080 0343 orrs r3, r3, r0 + 3326 0082 23F08003 bic r3, r3, #128 + 3327 0086 E068 ldr r0, [r4, #12] + 3328 0088 0B43 orrs r3, r3, r1 + 3329 008a 6168 ldr r1, [r4, #4] + 3330 008c 1360 str r3, [r2] + 3331 008e D062 str r0, [r2, #44] + 3332 0090 9162 str r1, [r2, #40] + 3333 .L621: + 3334 0092 0123 movs r3, #1 + 3335 0094 5361 str r3, [r2, #20] + 3336 0096 84F84830 strb r3, [r4, #72] + 3337 009a 84F83E30 strb r3, [r4, #62] + 3338 009e 84F83F30 strb r3, [r4, #63] + 3339 00a2 84F84030 strb r3, [r4, #64] + 3340 00a6 84F84130 strb r3, [r4, #65] + 3341 00aa 84F84230 strb r3, [r4, #66] + 3342 00ae 84F84330 strb r3, [r4, #67] + 3343 00b2 84F84430 strb r3, [r4, #68] + 3344 00b6 84F84530 strb r3, [r4, #69] + 3345 00ba 84F84630 strb r3, [r4, #70] + 3346 00be 84F84730 strb r3, [r4, #71] + 3347 00c2 84F83D30 strb r3, [r4, #61] + 3348 00c6 0020 movs r0, #0 + 3349 00c8 10BD pop {r4, pc} + 3350 .L616: + 3351 00ca A068 ldr r0, [r4, #8] + 3352 00cc 2169 ldr r1, [r4, #16] + 3353 00ce 23F07003 bic r3, r3, #112 + 3354 00d2 0343 orrs r3, r3, r0 + 3355 00d4 23F44073 bic r3, r3, #768 + 3356 00d8 0B43 orrs r3, r3, r1 + 3357 00da A169 ldr r1, [r4, #24] + 3358 .L631: + 3359 00dc 23F08003 bic r3, r3, #128 + 3360 00e0 0B43 orrs r3, r3, r1 + 3361 00e2 1360 str r3, [r2] + 3362 00e4 E368 ldr r3, [r4, #12] + 3363 00e6 D362 str r3, [r2, #44] + 3364 00e8 6368 ldr r3, [r4, #4] + 3365 00ea 9362 str r3, [r2, #40] + 3366 00ec 6369 ldr r3, [r4, #20] + 3367 00ee 1363 str r3, [r2, #48] + 3368 00f0 CFE7 b .L621 + 3369 .L632: + 3370 00f2 80F83C20 strb r2, [r0, #60] + 3371 00f6 FFF7FEFF bl HAL_TIM_IC_MspInit + 3372 00fa 8CE7 b .L611 + 3373 .L617: + 3374 00fc 2069 ldr r0, [r4, #16] + 3375 00fe A169 ldr r1, [r4, #24] + ARM GAS /tmp/cc6kdh5W.s page 59 + + + 3376 0100 23F44073 bic r3, r3, #768 + 3377 0104 0343 orrs r3, r3, r0 + 3378 0106 E9E7 b .L631 + 3379 .L624: + 3380 0108 0120 movs r0, #1 + 3381 010a 7047 bx lr + 3382 .L634: + 3383 .align 2 + 3384 .L633: + 3385 010c 002C0140 .word 1073818624 + 3387 .section .text.HAL_TIM_IC_MspDeInit,"ax",%progbits + 3388 .align 1 + 3389 .p2align 2,,3 + 3390 .weak HAL_TIM_IC_MspDeInit + 3391 .syntax unified + 3392 .thumb + 3393 .thumb_func + 3394 .fpu fpv4-sp-d16 + 3396 HAL_TIM_IC_MspDeInit: + 3397 @ args = 0, pretend = 0, frame = 0 + 3398 @ frame_needed = 0, uses_anonymous_args = 0 + 3399 @ link register save eliminated. + 3400 0000 7047 bx lr + 3402 0002 00BF .section .text.HAL_TIM_IC_DeInit,"ax",%progbits + 3403 .align 1 + 3404 .p2align 2,,3 + 3405 .global HAL_TIM_IC_DeInit + 3406 .syntax unified + 3407 .thumb + 3408 .thumb_func + 3409 .fpu fpv4-sp-d16 + 3411 HAL_TIM_IC_DeInit: + 3412 @ args = 0, pretend = 0, frame = 0 + 3413 @ frame_needed = 0, uses_anonymous_args = 0 + 3414 0000 0222 movs r2, #2 + 3415 0002 0368 ldr r3, [r0] + 3416 0004 10B5 push {r4, lr} + 3417 0006 80F83D20 strb r2, [r0, #61] + 3418 000a 196A ldr r1, [r3, #32] + 3419 000c 41F21112 movw r2, #4369 + 3420 0010 1142 tst r1, r2 + 3421 0012 0446 mov r4, r0 + 3422 0014 08D1 bne .L637 + 3423 0016 196A ldr r1, [r3, #32] + 3424 0018 44F24442 movw r2, #17476 + 3425 001c 1142 tst r1, r2 + 3426 001e 03D1 bne .L637 + 3427 0020 1A68 ldr r2, [r3] + 3428 0022 22F00102 bic r2, r2, #1 + 3429 0026 1A60 str r2, [r3] + 3430 .L637: + 3431 0028 2046 mov r0, r4 + 3432 002a FFF7FEFF bl HAL_TIM_IC_MspDeInit + 3433 002e 0020 movs r0, #0 + 3434 0030 84F84800 strb r0, [r4, #72] + 3435 0034 84F83C00 strb r0, [r4, #60] + 3436 0038 84F83E00 strb r0, [r4, #62] + ARM GAS /tmp/cc6kdh5W.s page 60 + + + 3437 003c 84F83F00 strb r0, [r4, #63] + 3438 0040 84F84000 strb r0, [r4, #64] + 3439 0044 84F84100 strb r0, [r4, #65] + 3440 0048 84F84200 strb r0, [r4, #66] + 3441 004c 84F84300 strb r0, [r4, #67] + 3442 0050 84F84400 strb r0, [r4, #68] + 3443 0054 84F84500 strb r0, [r4, #69] + 3444 0058 84F84600 strb r0, [r4, #70] + 3445 005c 84F84700 strb r0, [r4, #71] + 3446 0060 84F83D00 strb r0, [r4, #61] + 3447 0064 10BD pop {r4, pc} + 3449 0066 00BF .section .text.HAL_TIM_IC_Start,"ax",%progbits + 3450 .align 1 + 3451 .p2align 2,,3 + 3452 .global HAL_TIM_IC_Start + 3453 .syntax unified + 3454 .thumb + 3455 .thumb_func + 3456 .fpu fpv4-sp-d16 + 3458 HAL_TIM_IC_Start: + 3459 @ args = 0, pretend = 0, frame = 0 + 3460 @ frame_needed = 0, uses_anonymous_args = 0 + 3461 @ link register save eliminated. + 3462 0000 71B9 cbnz r1, .L640 + 3463 0002 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 3464 0006 90F84420 ldrb r2, [r0, #68] @ zero_extendqisi2 + 3465 000a DBB2 uxtb r3, r3 + 3466 000c D2B2 uxtb r2, r2 + 3467 .L641: + 3468 000e 012B cmp r3, #1 + 3469 0010 03D1 bne .L657 + 3470 0012 012A cmp r2, #1 + 3471 0014 15D0 beq .L664 + 3472 0016 1846 mov r0, r3 + 3473 0018 7047 bx lr + 3474 .L657: + 3475 001a 0123 movs r3, #1 + 3476 001c 1846 mov r0, r3 + 3477 001e 7047 bx lr + 3478 .L640: + 3479 0020 0429 cmp r1, #4 + 3480 0022 47D0 beq .L665 + 3481 0024 0829 cmp r1, #8 + 3482 0026 63D0 beq .L666 + 3483 0028 0C29 cmp r1, #12 + 3484 002a 5AD0 beq .L667 + 3485 002c 1029 cmp r1, #16 + 3486 002e 0CBF ite eq + 3487 0030 90F84230 ldrbeq r3, [r0, #66] @ zero_extendqisi2 + 3488 0034 90F84330 ldrbne r3, [r0, #67] @ zero_extendqisi2 + 3489 0038 DBB2 uxtb r3, r3 + 3490 .L645: + 3491 003a 90F84720 ldrb r2, [r0, #71] @ zero_extendqisi2 + 3492 003e D2B2 uxtb r2, r2 + 3493 0040 E5E7 b .L641 + 3494 .L664: + 3495 0042 0223 movs r3, #2 + ARM GAS /tmp/cc6kdh5W.s page 61 + + + 3496 0044 0029 cmp r1, #0 + 3497 0046 3CD1 bne .L648 + 3498 0048 80F83E30 strb r3, [r0, #62] + 3499 004c 80F84430 strb r3, [r0, #68] + 3500 .L649: + 3501 0050 0268 ldr r2, [r0] + 3502 0052 0123 movs r3, #1 + 3503 0054 106A ldr r0, [r2, #32] + 3504 0056 01F01F01 and r1, r1, #31 + 3505 005a 03FA01F1 lsl r1, r3, r1 + 3506 005e 20EA0100 bic r0, r0, r1 + 3507 0062 1062 str r0, [r2, #32] + 3508 0064 106A ldr r0, [r2, #32] + 3509 0066 2C4B ldr r3, .L671 + 3510 0068 0143 orrs r1, r1, r0 + 3511 006a 9A42 cmp r2, r3 + 3512 006c 1162 str r1, [r2, #32] + 3513 006e 12D0 beq .L655 + 3514 0070 B2F1804F cmp r2, #1073741824 + 3515 0074 0FD0 beq .L655 + 3516 0076 A3F59433 sub r3, r3, #75776 + 3517 007a 9A42 cmp r2, r3 + 3518 007c 0BD0 beq .L655 + 3519 007e 03F58063 add r3, r3, #1024 + 3520 0082 9A42 cmp r2, r3 + 3521 0084 07D0 beq .L655 + 3522 0086 03F59633 add r3, r3, #76800 + 3523 008a 9A42 cmp r2, r3 + 3524 008c 03D0 beq .L655 + 3525 008e 03F54063 add r3, r3, #3072 + 3526 0092 9A42 cmp r2, r3 + 3527 0094 07D1 bne .L656 + 3528 .L655: + 3529 0096 9168 ldr r1, [r2, #8] + 3530 0098 204B ldr r3, .L671+4 + 3531 009a 0B40 ands r3, r3, r1 + 3532 009c 062B cmp r3, #6 + 3533 009e 24D0 beq .L659 + 3534 00a0 B3F5803F cmp r3, #65536 + 3535 00a4 21D0 beq .L659 + 3536 .L656: + 3537 00a6 1168 ldr r1, [r2] + 3538 00a8 0023 movs r3, #0 + 3539 00aa 41F00101 orr r1, r1, #1 + 3540 00ae 1160 str r1, [r2] + 3541 00b0 1846 mov r0, r3 + 3542 00b2 7047 bx lr + 3543 .L665: + 3544 00b4 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 3545 00b8 90F84520 ldrb r2, [r0, #69] @ zero_extendqisi2 + 3546 00bc DBB2 uxtb r3, r3 + 3547 00be D2B2 uxtb r2, r2 + 3548 00c0 A5E7 b .L641 + 3549 .L648: + 3550 00c2 0429 cmp r1, #4 + 3551 00c4 1ED0 beq .L668 + 3552 00c6 0829 cmp r1, #8 + ARM GAS /tmp/cc6kdh5W.s page 62 + + + 3553 00c8 21D0 beq .L669 + 3554 00ca 0C29 cmp r1, #12 + 3555 00cc 17D0 beq .L670 + 3556 00ce 1029 cmp r1, #16 + 3557 00d0 0CBF ite eq + 3558 00d2 80F84230 strbeq r3, [r0, #66] + 3559 00d6 80F84330 strbne r3, [r0, #67] + 3560 .L653: + 3561 00da 0223 movs r3, #2 + 3562 00dc 80F84730 strb r3, [r0, #71] + 3563 00e0 B6E7 b .L649 + 3564 .L667: + 3565 00e2 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 3566 00e6 DBB2 uxtb r3, r3 + 3567 00e8 A7E7 b .L645 + 3568 .L659: + 3569 00ea 0023 movs r3, #0 + 3570 00ec 1846 mov r0, r3 + 3571 00ee 7047 bx lr + 3572 .L666: + 3573 00f0 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 3574 00f4 90F84620 ldrb r2, [r0, #70] @ zero_extendqisi2 + 3575 00f8 DBB2 uxtb r3, r3 + 3576 00fa D2B2 uxtb r2, r2 + 3577 00fc 87E7 b .L641 + 3578 .L670: + 3579 00fe 80F84130 strb r3, [r0, #65] + 3580 0102 EAE7 b .L653 + 3581 .L668: + 3582 0104 80F83F30 strb r3, [r0, #63] + 3583 0108 80F84530 strb r3, [r0, #69] + 3584 010c A0E7 b .L649 + 3585 .L669: + 3586 010e 80F84030 strb r3, [r0, #64] + 3587 0112 80F84630 strb r3, [r0, #70] + 3588 0116 9BE7 b .L649 + 3589 .L672: + 3590 .align 2 + 3591 .L671: + 3592 0118 002C0140 .word 1073818624 + 3593 011c 07000100 .word 65543 + 3595 .section .text.HAL_TIM_IC_Stop,"ax",%progbits + 3596 .align 1 + 3597 .p2align 2,,3 + 3598 .global HAL_TIM_IC_Stop + 3599 .syntax unified + 3600 .thumb + 3601 .thumb_func + 3602 .fpu fpv4-sp-d16 + 3604 HAL_TIM_IC_Stop: + 3605 @ args = 0, pretend = 0, frame = 0 + 3606 @ frame_needed = 0, uses_anonymous_args = 0 + 3607 @ link register save eliminated. + 3608 0000 0368 ldr r3, [r0] + 3609 0002 10B4 push {r4} + 3610 0004 1A6A ldr r2, [r3, #32] + 3611 0006 01F01F04 and r4, r1, #31 + ARM GAS /tmp/cc6kdh5W.s page 63 + + + 3612 000a 4FF0010C mov ip, #1 + 3613 000e 0CFA04FC lsl ip, ip, r4 + 3614 0012 22EA0C02 bic r2, r2, ip + 3615 0016 1A62 str r2, [r3, #32] + 3616 0018 1A6A ldr r2, [r3, #32] + 3617 001a 1A62 str r2, [r3, #32] + 3618 001c 1C6A ldr r4, [r3, #32] + 3619 001e 41F21112 movw r2, #4369 + 3620 0022 1442 tst r4, r2 + 3621 0024 04D1 bne .L674 + 3622 0026 1C6A ldr r4, [r3, #32] + 3623 0028 44F24442 movw r2, #17476 + 3624 002c 1442 tst r4, r2 + 3625 002e 1CD0 beq .L684 + 3626 .L674: + 3627 0030 0123 movs r3, #1 + 3628 0032 39B9 cbnz r1, .L675 + 3629 0034 80F83E30 strb r3, [r0, #62] + 3630 0038 80F84430 strb r3, [r0, #68] + 3631 003c 5DF8044B ldr r4, [sp], #4 + 3632 0040 0020 movs r0, #0 + 3633 0042 7047 bx lr + 3634 .L675: + 3635 0044 0429 cmp r1, #4 + 3636 0046 15D0 beq .L685 + 3637 0048 0829 cmp r1, #8 + 3638 004a 1ED0 beq .L686 + 3639 004c 0C29 cmp r1, #12 + 3640 004e 19D0 beq .L687 + 3641 0050 1029 cmp r1, #16 + 3642 0052 0CBF ite eq + 3643 0054 80F84230 strbeq r3, [r0, #66] + 3644 0058 80F84330 strbne r3, [r0, #67] + 3645 .L680: + 3646 005c 0123 movs r3, #1 + 3647 005e 80F84730 strb r3, [r0, #71] + 3648 0062 5DF8044B ldr r4, [sp], #4 + 3649 0066 0020 movs r0, #0 + 3650 0068 7047 bx lr + 3651 .L684: + 3652 006a 1A68 ldr r2, [r3] + 3653 006c 22F00102 bic r2, r2, #1 + 3654 0070 1A60 str r2, [r3] + 3655 0072 DDE7 b .L674 + 3656 .L685: + 3657 0074 80F83F30 strb r3, [r0, #63] + 3658 0078 80F84530 strb r3, [r0, #69] + 3659 007c 5DF8044B ldr r4, [sp], #4 + 3660 0080 0020 movs r0, #0 + 3661 0082 7047 bx lr + 3662 .L687: + 3663 0084 80F84130 strb r3, [r0, #65] + 3664 0088 E8E7 b .L680 + 3665 .L686: + 3666 008a 80F84030 strb r3, [r0, #64] + 3667 008e 80F84630 strb r3, [r0, #70] + 3668 0092 5DF8044B ldr r4, [sp], #4 + ARM GAS /tmp/cc6kdh5W.s page 64 + + + 3669 0096 0020 movs r0, #0 + 3670 0098 7047 bx lr + 3672 009a 00BF .section .text.HAL_TIM_IC_Start_IT,"ax",%progbits + 3673 .align 1 + 3674 .p2align 2,,3 + 3675 .global HAL_TIM_IC_Start_IT + 3676 .syntax unified + 3677 .thumb + 3678 .thumb_func + 3679 .fpu fpv4-sp-d16 + 3681 HAL_TIM_IC_Start_IT: + 3682 @ args = 0, pretend = 0, frame = 0 + 3683 @ frame_needed = 0, uses_anonymous_args = 0 + 3684 @ link register save eliminated. + 3685 0000 0029 cmp r1, #0 + 3686 0002 4BD1 bne .L689 + 3687 0004 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 3688 0008 90F84420 ldrb r2, [r0, #68] @ zero_extendqisi2 + 3689 000c DBB2 uxtb r3, r3 + 3690 000e D2B2 uxtb r2, r2 + 3691 .L690: + 3692 0010 012B cmp r3, #1 + 3693 0012 03D1 bne .L710 + 3694 0014 012A cmp r2, #1 + 3695 0016 04D0 beq .L717 + 3696 .L713: + 3697 0018 1846 mov r0, r3 + 3698 001a 7047 bx lr + 3699 .L710: + 3700 001c 0123 movs r3, #1 + 3701 001e 1846 mov r0, r3 + 3702 0020 7047 bx lr + 3703 .L717: + 3704 0022 0029 cmp r1, #0 + 3705 0024 4BD1 bne .L697 + 3706 0026 0223 movs r3, #2 + 3707 0028 0268 ldr r2, [r0] + 3708 002a 80F83E30 strb r3, [r0, #62] + 3709 002e 80F84430 strb r3, [r0, #68] + 3710 0032 D368 ldr r3, [r2, #12] + 3711 0034 43F00203 orr r3, r3, #2 + 3712 0038 D360 str r3, [r2, #12] + 3713 .L698: + 3714 003a 106A ldr r0, [r2, #32] + 3715 003c 0123 movs r3, #1 + 3716 003e 01F01F01 and r1, r1, #31 + 3717 0042 03FA01F1 lsl r1, r3, r1 + 3718 0046 20EA0100 bic r0, r0, r1 + 3719 004a 1062 str r0, [r2, #32] + 3720 004c 106A ldr r0, [r2, #32] + 3721 004e 4C4B ldr r3, .L725 + 3722 0050 0143 orrs r1, r1, r0 + 3723 0052 9A42 cmp r2, r3 + 3724 0054 1162 str r1, [r2, #32] + 3725 0056 12D0 beq .L707 + 3726 0058 B2F1804F cmp r2, #1073741824 + 3727 005c 0FD0 beq .L707 + ARM GAS /tmp/cc6kdh5W.s page 65 + + + 3728 005e A3F59433 sub r3, r3, #75776 + 3729 0062 9A42 cmp r2, r3 + 3730 0064 0BD0 beq .L707 + 3731 0066 03F58063 add r3, r3, #1024 + 3732 006a 9A42 cmp r2, r3 + 3733 006c 07D0 beq .L707 + 3734 006e 03F59633 add r3, r3, #76800 + 3735 0072 9A42 cmp r2, r3 + 3736 0074 03D0 beq .L707 + 3737 0076 03F54063 add r3, r3, #3072 + 3738 007a 9A42 cmp r2, r3 + 3739 007c 07D1 bne .L708 + 3740 .L707: + 3741 007e 9168 ldr r1, [r2, #8] + 3742 0080 404B ldr r3, .L725+4 + 3743 0082 0B40 ands r3, r3, r1 + 3744 0084 062B cmp r3, #6 + 3745 0086 53D0 beq .L712 + 3746 0088 B3F5803F cmp r3, #65536 + 3747 008c 50D0 beq .L712 + 3748 .L708: + 3749 008e 1168 ldr r1, [r2] + 3750 0090 0023 movs r3, #0 + 3751 0092 41F00101 orr r1, r1, #1 + 3752 0096 1160 str r1, [r2] + 3753 0098 1846 mov r0, r3 + 3754 009a 7047 bx lr + 3755 .L689: + 3756 009c 0429 cmp r1, #4 + 3757 009e 39D0 beq .L718 + 3758 00a0 0829 cmp r1, #8 + 3759 00a2 3ED0 beq .L719 + 3760 00a4 0C29 cmp r1, #12 + 3761 00a6 31D0 beq .L720 + 3762 00a8 1029 cmp r1, #16 + 3763 00aa 0CBF ite eq + 3764 00ac 90F84230 ldrbeq r3, [r0, #66] @ zero_extendqisi2 + 3765 00b0 90F84330 ldrbne r3, [r0, #67] @ zero_extendqisi2 + 3766 00b4 DBB2 uxtb r3, r3 + 3767 .L694: + 3768 00b6 90F84720 ldrb r2, [r0, #71] @ zero_extendqisi2 + 3769 00ba D2B2 uxtb r2, r2 + 3770 00bc A8E7 b .L690 + 3771 .L697: + 3772 00be 0429 cmp r1, #4 + 3773 00c0 43D0 beq .L721 + 3774 00c2 0829 cmp r1, #8 + 3775 00c4 36D0 beq .L722 + 3776 00c6 0C29 cmp r1, #12 + 3777 00c8 4AD0 beq .L723 + 3778 00ca 1029 cmp r1, #16 + 3779 00cc 4FF00202 mov r2, #2 + 3780 00d0 51D0 beq .L724 + 3781 00d2 0B1F subs r3, r1, #4 + 3782 00d4 80F84320 strb r2, [r0, #67] + 3783 00d8 80F84720 strb r2, [r0, #71] + 3784 00dc 082B cmp r3, #8 + ARM GAS /tmp/cc6kdh5W.s page 66 + + + 3785 00de 9DD8 bhi .L710 + 3786 00e0 01A2 adr r2, .L706 + 3787 00e2 52F823F0 ldr pc, [r2, r3, lsl #2] + 3788 00e6 00BF .p2align 2 + 3789 .L706: + 3790 00e8 55010000 .word .L700+1 + 3791 00ec 1D000000 .word .L710+1 + 3792 00f0 1D000000 .word .L710+1 + 3793 00f4 1D000000 .word .L710+1 + 3794 00f8 3F010000 .word .L702+1 + 3795 00fc 1D000000 .word .L710+1 + 3796 0100 1D000000 .word .L710+1 + 3797 0104 1D000000 .word .L710+1 + 3798 0108 6B010000 .word .L704+1 + 3799 .p2align 1 + 3800 .L720: + 3801 010c 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2 + 3802 0110 DBB2 uxtb r3, r3 + 3803 0112 D0E7 b .L694 + 3804 .L718: + 3805 0114 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 3806 0118 90F84520 ldrb r2, [r0, #69] @ zero_extendqisi2 + 3807 011c DBB2 uxtb r3, r3 + 3808 011e D2B2 uxtb r2, r2 + 3809 0120 76E7 b .L690 + 3810 .L719: + 3811 0122 90F84030 ldrb r3, [r0, #64] @ zero_extendqisi2 + 3812 0126 90F84620 ldrb r2, [r0, #70] @ zero_extendqisi2 + 3813 012a DBB2 uxtb r3, r3 + 3814 012c D2B2 uxtb r2, r2 + 3815 012e 6FE7 b .L690 + 3816 .L712: + 3817 0130 0023 movs r3, #0 + 3818 0132 71E7 b .L713 + 3819 .L722: + 3820 0134 0223 movs r3, #2 + 3821 0136 80F84030 strb r3, [r0, #64] + 3822 013a 80F84630 strb r3, [r0, #70] + 3823 .L702: + 3824 013e 0268 ldr r2, [r0] + 3825 0140 D368 ldr r3, [r2, #12] + 3826 0142 43F00803 orr r3, r3, #8 + 3827 0146 D360 str r3, [r2, #12] + 3828 0148 77E7 b .L698 + 3829 .L721: + 3830 014a 0223 movs r3, #2 + 3831 014c 80F83F30 strb r3, [r0, #63] + 3832 0150 80F84530 strb r3, [r0, #69] + 3833 .L700: + 3834 0154 0268 ldr r2, [r0] + 3835 0156 D368 ldr r3, [r2, #12] + 3836 0158 43F00403 orr r3, r3, #4 + 3837 015c D360 str r3, [r2, #12] + 3838 015e 6CE7 b .L698 + 3839 .L723: + 3840 0160 0223 movs r3, #2 + 3841 0162 80F84130 strb r3, [r0, #65] + ARM GAS /tmp/cc6kdh5W.s page 67 + + + 3842 0166 80F84730 strb r3, [r0, #71] + 3843 .L704: + 3844 016a 0268 ldr r2, [r0] + 3845 016c D368 ldr r3, [r2, #12] + 3846 016e 43F01003 orr r3, r3, #16 + 3847 0172 D360 str r3, [r2, #12] + 3848 0174 61E7 b .L698 + 3849 .L724: + 3850 0176 80F84220 strb r2, [r0, #66] + 3851 017a 80F84720 strb r2, [r0, #71] + 3852 017e 4BE7 b .L713 + 3853 .L726: + 3854 .align 2 + 3855 .L725: + 3856 0180 002C0140 .word 1073818624 + 3857 0184 07000100 .word 65543 + 3859 .section .text.HAL_TIM_IC_Stop_IT,"ax",%progbits + 3860 .align 1 + 3861 .p2align 2,,3 + 3862 .global HAL_TIM_IC_Stop_IT + 3863 .syntax unified + 3864 .thumb + 3865 .thumb_func + 3866 .fpu fpv4-sp-d16 + 3868 HAL_TIM_IC_Stop_IT: + 3869 @ args = 0, pretend = 0, frame = 0 + 3870 @ frame_needed = 0, uses_anonymous_args = 0 + 3871 @ link register save eliminated. + 3872 0000 10B4 push {r4} + 3873 0002 0246 mov r2, r0 + 3874 0004 0C29 cmp r1, #12 + 3875 0006 08D8 bhi .L747 + 3876 0008 DFE801F0 tbb [pc, r1] + 3877 .L730: + 3878 000c 70 .byte (.L733-.L730)/2 + 3879 000d 07 .byte (.L747-.L730)/2 + 3880 000e 07 .byte (.L747-.L730)/2 + 3881 000f 07 .byte (.L747-.L730)/2 + 3882 0010 56 .byte (.L732-.L730)/2 + 3883 0011 07 .byte (.L747-.L730)/2 + 3884 0012 07 .byte (.L747-.L730)/2 + 3885 0013 07 .byte (.L747-.L730)/2 + 3886 0014 39 .byte (.L731-.L730)/2 + 3887 0015 07 .byte (.L747-.L730)/2 + 3888 0016 07 .byte (.L747-.L730)/2 + 3889 0017 07 .byte (.L747-.L730)/2 + 3890 0018 0B .byte (.L729-.L730)/2 + 3891 0019 00 .p2align 1 + 3892 .L747: + 3893 001a 0120 movs r0, #1 + 3894 .L766: + 3895 001c 5DF8044B ldr r4, [sp], #4 + 3896 0020 7047 bx lr + 3897 .L729: + 3898 0022 0368 ldr r3, [r0] + 3899 0024 D868 ldr r0, [r3, #12] + 3900 0026 20F01000 bic r0, r0, #16 + ARM GAS /tmp/cc6kdh5W.s page 68 + + + 3901 002a D860 str r0, [r3, #12] + 3902 002c 186A ldr r0, [r3, #32] + 3903 002e 20F48050 bic r0, r0, #4096 + 3904 0032 1862 str r0, [r3, #32] + 3905 0034 186A ldr r0, [r3, #32] + 3906 0036 1862 str r0, [r3, #32] + 3907 0038 186A ldr r0, [r3, #32] + 3908 003a 41F2111C movw ip, #4369 + 3909 003e 10EA0C0F tst r0, ip + 3910 0042 7CD1 bne .L740 + 3911 0044 1C6A ldr r4, [r3, #32] + 3912 0046 44F24440 movw r0, #17476 + 3913 004a 0442 tst r4, r0 + 3914 004c 77D1 bne .L740 + 3915 .L742: + 3916 004e 1868 ldr r0, [r3] + 3917 0050 0429 cmp r1, #4 + 3918 0052 20F00100 bic r0, r0, #1 + 3919 0056 1860 str r0, [r3] + 3920 0058 3FD0 beq .L745 + 3921 005a 0829 cmp r1, #8 + 3922 005c 25D0 beq .L739 + 3923 005e 0C29 cmp r1, #12 + 3924 0060 6DD0 beq .L740 + 3925 0062 0123 movs r3, #1 + 3926 0064 1029 cmp r1, #16 + 3927 0066 0CBF ite eq + 3928 0068 82F84230 strbeq r3, [r2, #66] + 3929 006c 82F84330 strbne r3, [r2, #67] + 3930 .L738: + 3931 0070 0123 movs r3, #1 + 3932 0072 82F84730 strb r3, [r2, #71] + 3933 0076 0020 movs r0, #0 + 3934 0078 5DF8044B ldr r4, [sp], #4 + 3935 007c 7047 bx lr + 3936 .L731: + 3937 007e 0368 ldr r3, [r0] + 3938 0080 D868 ldr r0, [r3, #12] + 3939 0082 20F00800 bic r0, r0, #8 + 3940 0086 D860 str r0, [r3, #12] + 3941 0088 186A ldr r0, [r3, #32] + 3942 008a 20F48070 bic r0, r0, #256 + 3943 008e 1862 str r0, [r3, #32] + 3944 0090 186A ldr r0, [r3, #32] + 3945 0092 1862 str r0, [r3, #32] + 3946 0094 186A ldr r0, [r3, #32] + 3947 0096 41F2111C movw ip, #4369 + 3948 009a 10EA0C0F tst r0, ip + 3949 009e 04D1 bne .L739 + 3950 00a0 1C6A ldr r4, [r3, #32] + 3951 00a2 44F24440 movw r0, #17476 + 3952 00a6 0442 tst r4, r0 + 3953 00a8 D1D0 beq .L742 + 3954 .L739: + 3955 00aa 0123 movs r3, #1 + 3956 00ac 82F84030 strb r3, [r2, #64] + 3957 00b0 0020 movs r0, #0 + ARM GAS /tmp/cc6kdh5W.s page 69 + + + 3958 00b2 82F84630 strb r3, [r2, #70] + 3959 00b6 B1E7 b .L766 + 3960 .L732: + 3961 00b8 0368 ldr r3, [r0] + 3962 00ba D868 ldr r0, [r3, #12] + 3963 00bc 20F00400 bic r0, r0, #4 + 3964 00c0 D860 str r0, [r3, #12] + 3965 00c2 186A ldr r0, [r3, #32] + 3966 00c4 20F01000 bic r0, r0, #16 + 3967 00c8 1862 str r0, [r3, #32] + 3968 00ca 186A ldr r0, [r3, #32] + 3969 00cc 1862 str r0, [r3, #32] + 3970 00ce 186A ldr r0, [r3, #32] + 3971 00d0 41F2111C movw ip, #4369 + 3972 00d4 10EA0C0F tst r0, ip + 3973 00d8 21D0 beq .L735 + 3974 .L745: + 3975 00da 0123 movs r3, #1 + 3976 00dc 82F83F30 strb r3, [r2, #63] + 3977 00e0 82F84530 strb r3, [r2, #69] + 3978 00e4 0020 movs r0, #0 + 3979 00e6 5DF8044B ldr r4, [sp], #4 + 3980 00ea 7047 bx lr + 3981 .L733: + 3982 00ec 0368 ldr r3, [r0] + 3983 00ee D968 ldr r1, [r3, #12] + 3984 00f0 21F00201 bic r1, r1, #2 + 3985 00f4 D960 str r1, [r3, #12] + 3986 00f6 196A ldr r1, [r3, #32] + 3987 00f8 21F00101 bic r1, r1, #1 + 3988 00fc 1962 str r1, [r3, #32] + 3989 00fe 196A ldr r1, [r3, #32] + 3990 0100 1962 str r1, [r3, #32] + 3991 0102 196A ldr r1, [r3, #32] + 3992 0104 41F21110 movw r0, #4369 + 3993 0108 0142 tst r1, r0 + 3994 010a 0ED0 beq .L734 + 3995 .L744: + 3996 010c 0123 movs r3, #1 + 3997 010e 82F83E30 strb r3, [r2, #62] + 3998 0112 82F84430 strb r3, [r2, #68] + 3999 0116 0020 movs r0, #0 + 4000 0118 5DF8044B ldr r4, [sp], #4 + 4001 011c 7047 bx lr + 4002 .L735: + 4003 011e 1C6A ldr r4, [r3, #32] + 4004 0120 44F24440 movw r0, #17476 + 4005 0124 0442 tst r4, r0 + 4006 0126 92D0 beq .L742 + 4007 0128 D7E7 b .L745 + 4008 .L734: + 4009 012a 186A ldr r0, [r3, #32] + 4010 012c 44F24441 movw r1, #17476 + 4011 0130 0842 tst r0, r1 + 4012 0132 EBD1 bne .L744 + 4013 0134 1968 ldr r1, [r3] + 4014 0136 21F00101 bic r1, r1, #1 + ARM GAS /tmp/cc6kdh5W.s page 70 + + + 4015 013a 1960 str r1, [r3] + 4016 013c E6E7 b .L744 + 4017 .L740: + 4018 013e 0123 movs r3, #1 + 4019 0140 82F84130 strb r3, [r2, #65] + 4020 0144 94E7 b .L738 + 4022 0146 00BF .section .text.HAL_TIM_IC_Start_DMA,"ax",%progbits + 4023 .align 1 + 4024 .p2align 2,,3 + 4025 .global HAL_TIM_IC_Start_DMA + 4026 .syntax unified + 4027 .thumb + 4028 .thumb_func + 4029 .fpu fpv4-sp-d16 + 4031 HAL_TIM_IC_Start_DMA: + 4032 @ args = 0, pretend = 0, frame = 0 + 4033 @ frame_needed = 0, uses_anonymous_args = 0 + 4034 0000 70B5 push {r4, r5, r6, lr} + 4035 0002 0446 mov r4, r0 + 4036 0004 0029 cmp r1, #0 + 4037 0006 51D1 bne .L770 + 4038 0008 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 4039 000c 94F844C0 ldrb ip, [r4, #68] @ zero_extendqisi2 + 4040 0010 C0B2 uxtb r0, r0 + 4041 0012 5FFA8CFC uxtb ip, ip + 4042 .L771: + 4043 0016 0228 cmp r0, #2 + 4044 0018 43D0 beq .L796 + 4045 001a BCF1020F cmp ip, #2 + 4046 001e 74D0 beq .L794 + 4047 0020 0128 cmp r0, #1 + 4048 0022 41D1 bne .L779 + 4049 0024 BCF1010F cmp ip, #1 + 4050 0028 3ED1 bne .L779 + 4051 002a 002A cmp r2, #0 + 4052 002c 3AD0 beq .L811 + 4053 .L780: + 4054 002e 0029 cmp r1, #0 + 4055 0030 6DD1 bne .L781 + 4056 0032 2168 ldr r1, [r4] + 4057 0034 844D ldr r5, .L819 + 4058 0036 0220 movs r0, #2 + 4059 0038 84F83E00 strb r0, [r4, #62] + 4060 003c 84F84400 strb r0, [r4, #68] + 4061 0040 086A ldr r0, [r1, #32] + 4062 0042 20F00100 bic r0, r0, #1 + 4063 0046 0862 str r0, [r1, #32] + 4064 0048 086A ldr r0, [r1, #32] + 4065 004a 40F00100 orr r0, r0, #1 + 4066 004e 0862 str r0, [r1, #32] + 4067 0050 606A ldr r0, [r4, #36] + 4068 0052 C562 str r5, [r0, #44] + 4069 0054 7D4D ldr r5, .L819+4 + 4070 0056 0563 str r5, [r0, #48] + 4071 0058 7D4D ldr r5, .L819+8 + 4072 005a 4563 str r5, [r0, #52] + 4073 005c 3431 adds r1, r1, #52 + ARM GAS /tmp/cc6kdh5W.s page 71 + + + 4074 005e FFF7FEFF bl HAL_DMA_Start_IT + 4075 0062 08BB cbnz r0, .L779 + 4076 0064 2668 ldr r6, [r4] + 4077 0066 F368 ldr r3, [r6, #12] + 4078 0068 43F40073 orr r3, r3, #512 + 4079 006c F360 str r3, [r6, #12] + 4080 .L790: + 4081 006e 794B ldr r3, .L819+12 + 4082 0070 9E42 cmp r6, r3 + 4083 0072 31D0 beq .L792 + 4084 0074 B6F1804F cmp r6, #1073741824 + 4085 0078 2ED0 beq .L792 + 4086 007a A3F59433 sub r3, r3, #75776 + 4087 007e 9E42 cmp r6, r3 + 4088 0080 2AD0 beq .L792 + 4089 0082 03F58063 add r3, r3, #1024 + 4090 0086 9E42 cmp r6, r3 + 4091 0088 26D0 beq .L792 + 4092 008a 03F59633 add r3, r3, #76800 + 4093 008e 9E42 cmp r6, r3 + 4094 0090 22D0 beq .L792 + 4095 0092 03F54063 add r3, r3, #3072 + 4096 0096 9E42 cmp r6, r3 + 4097 0098 1ED0 beq .L792 + 4098 .L793: + 4099 009a 3368 ldr r3, [r6] + 4100 009c 43F00103 orr r3, r3, #1 + 4101 00a0 3360 str r3, [r6] + 4102 .L796: + 4103 00a2 70BD pop {r4, r5, r6, pc} + 4104 .L811: + 4105 00a4 002B cmp r3, #0 + 4106 00a6 C2D0 beq .L780 + 4107 .L779: + 4108 00a8 0120 movs r0, #1 + 4109 00aa 70BD pop {r4, r5, r6, pc} + 4110 .L770: + 4111 00ac 0429 cmp r1, #4 + 4112 00ae 1CD0 beq .L812 + 4113 00b0 0829 cmp r1, #8 + 4114 00b2 22D0 beq .L813 + 4115 00b4 0C29 cmp r1, #12 + 4116 00b6 0BD0 beq .L814 + 4117 00b8 1029 cmp r1, #16 + 4118 00ba 0CBF ite eq + 4119 00bc 90F84200 ldrbeq r0, [r0, #66] @ zero_extendqisi2 + 4120 00c0 94F84300 ldrbne r0, [r4, #67] @ zero_extendqisi2 + 4121 00c4 C0B2 uxtb r0, r0 + 4122 .L775: + 4123 00c6 94F847C0 ldrb ip, [r4, #71] @ zero_extendqisi2 + 4124 00ca 5FFA8CFC uxtb ip, ip + 4125 00ce A2E7 b .L771 + 4126 .L814: + 4127 00d0 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 4128 00d4 C0B2 uxtb r0, r0 + 4129 00d6 F6E7 b .L775 + 4130 .L792: + ARM GAS /tmp/cc6kdh5W.s page 72 + + + 4131 00d8 B268 ldr r2, [r6, #8] + 4132 00da 5F4B ldr r3, .L819+16 + 4133 00dc 1340 ands r3, r3, r2 + 4134 00de 062B cmp r3, #6 + 4135 00e0 DFD0 beq .L796 + 4136 00e2 B3F5803F cmp r3, #65536 + 4137 00e6 D8D1 bne .L793 + 4138 00e8 DBE7 b .L796 + 4139 .L812: + 4140 00ea 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 4141 00ee 94F845C0 ldrb ip, [r4, #69] @ zero_extendqisi2 + 4142 00f2 C0B2 uxtb r0, r0 + 4143 00f4 5FFA8CFC uxtb ip, ip + 4144 00f8 8DE7 b .L771 + 4145 .L813: + 4146 00fa 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 4147 00fe 94F846C0 ldrb ip, [r4, #70] @ zero_extendqisi2 + 4148 0102 C0B2 uxtb r0, r0 + 4149 0104 5FFA8CFC uxtb ip, ip + 4150 0108 85E7 b .L771 + 4151 .L794: + 4152 010a 6046 mov r0, ip + 4153 010c 70BD pop {r4, r5, r6, pc} + 4154 .L781: + 4155 010e 0429 cmp r1, #4 + 4156 0110 45D0 beq .L815 + 4157 0112 0829 cmp r1, #8 + 4158 0114 22D0 beq .L816 + 4159 0116 0C29 cmp r1, #12 + 4160 0118 63D0 beq .L817 + 4161 011a 1029 cmp r1, #16 + 4162 011c 00F08380 beq .L818 + 4163 0120 2668 ldr r6, [r4] + 4164 0122 0220 movs r0, #2 + 4165 0124 84F84300 strb r0, [r4, #67] + 4166 0128 84F84700 strb r0, [r4, #71] + 4167 012c 356A ldr r5, [r6, #32] + 4168 012e 01F01F0C and ip, r1, #31 + 4169 0132 0120 movs r0, #1 + 4170 0134 00FA0CF0 lsl r0, r0, ip + 4171 0138 25EA0005 bic r5, r5, r0 + 4172 013c 3562 str r5, [r6, #32] + 4173 013e 356A ldr r5, [r6, #32] + 4174 0140 0439 subs r1, r1, #4 + 4175 0142 2843 orrs r0, r0, r5 + 4176 0144 3062 str r0, [r6, #32] + 4177 0146 0829 cmp r1, #8 + 4178 0148 06D8 bhi .L795 + 4179 014a DFE801F0 tbb [pc, r1] + 4180 .L791: + 4181 014e 36 .byte (.L784-.L791)/2 + 4182 014f 05 .byte (.L795-.L791)/2 + 4183 0150 05 .byte (.L795-.L791)/2 + 4184 0151 05 .byte (.L795-.L791)/2 + 4185 0152 15 .byte (.L786-.L791)/2 + 4186 0153 05 .byte (.L795-.L791)/2 + 4187 0154 05 .byte (.L795-.L791)/2 + ARM GAS /tmp/cc6kdh5W.s page 73 + + + 4188 0155 05 .byte (.L795-.L791)/2 + 4189 0156 58 .byte (.L788-.L791)/2 + 4190 0157 00 .p2align 1 + 4191 .L795: + 4192 0158 0120 movs r0, #1 + 4193 015a 88E7 b .L790 + 4194 .L816: + 4195 015c 2668 ldr r6, [r4] + 4196 015e 0221 movs r1, #2 + 4197 0160 84F84010 strb r1, [r4, #64] + 4198 0164 84F84610 strb r1, [r4, #70] + 4199 0168 316A ldr r1, [r6, #32] + 4200 016a 21F48071 bic r1, r1, #256 + 4201 016e 3162 str r1, [r6, #32] + 4202 0170 316A ldr r1, [r6, #32] + 4203 0172 41F48071 orr r1, r1, #256 + 4204 0176 3162 str r1, [r6, #32] + 4205 .L786: + 4206 0178 E06A ldr r0, [r4, #44] + 4207 017a 334D ldr r5, .L819 + 4208 017c C562 str r5, [r0, #44] + 4209 017e 334D ldr r5, .L819+4 + 4210 0180 0563 str r5, [r0, #48] + 4211 0182 334D ldr r5, .L819+8 + 4212 0184 4563 str r5, [r0, #52] + 4213 0186 06F13C01 add r1, r6, #60 + 4214 018a FFF7FEFF bl HAL_DMA_Start_IT + 4215 018e 0028 cmp r0, #0 + 4216 0190 8AD1 bne .L779 + 4217 0192 2668 ldr r6, [r4] + 4218 0194 F368 ldr r3, [r6, #12] + 4219 0196 43F40063 orr r3, r3, #2048 + 4220 019a F360 str r3, [r6, #12] + 4221 019c 67E7 b .L790 + 4222 .L815: + 4223 019e 2668 ldr r6, [r4] + 4224 01a0 0221 movs r1, #2 + 4225 01a2 84F83F10 strb r1, [r4, #63] + 4226 01a6 84F84510 strb r1, [r4, #69] + 4227 01aa 316A ldr r1, [r6, #32] + 4228 01ac 21F01001 bic r1, r1, #16 + 4229 01b0 3162 str r1, [r6, #32] + 4230 01b2 316A ldr r1, [r6, #32] + 4231 01b4 41F01001 orr r1, r1, #16 + 4232 01b8 3162 str r1, [r6, #32] + 4233 .L784: + 4234 01ba A06A ldr r0, [r4, #40] + 4235 01bc 224D ldr r5, .L819 + 4236 01be C562 str r5, [r0, #44] + 4237 01c0 224D ldr r5, .L819+4 + 4238 01c2 0563 str r5, [r0, #48] + 4239 01c4 224D ldr r5, .L819+8 + 4240 01c6 4563 str r5, [r0, #52] + 4241 01c8 06F13801 add r1, r6, #56 + 4242 01cc FFF7FEFF bl HAL_DMA_Start_IT + 4243 01d0 0028 cmp r0, #0 + 4244 01d2 7FF469AF bne .L779 + ARM GAS /tmp/cc6kdh5W.s page 74 + + + 4245 01d6 2668 ldr r6, [r4] + 4246 01d8 F368 ldr r3, [r6, #12] + 4247 01da 43F48063 orr r3, r3, #1024 + 4248 01de F360 str r3, [r6, #12] + 4249 01e0 45E7 b .L790 + 4250 .L817: + 4251 01e2 2668 ldr r6, [r4] + 4252 01e4 0221 movs r1, #2 + 4253 01e6 84F84110 strb r1, [r4, #65] + 4254 01ea 84F84710 strb r1, [r4, #71] + 4255 01ee 316A ldr r1, [r6, #32] + 4256 01f0 21F48051 bic r1, r1, #4096 + 4257 01f4 3162 str r1, [r6, #32] + 4258 01f6 316A ldr r1, [r6, #32] + 4259 01f8 41F48051 orr r1, r1, #4096 + 4260 01fc 3162 str r1, [r6, #32] + 4261 .L788: + 4262 01fe 206B ldr r0, [r4, #48] + 4263 0200 114D ldr r5, .L819 + 4264 0202 C562 str r5, [r0, #44] + 4265 0204 114D ldr r5, .L819+4 + 4266 0206 0563 str r5, [r0, #48] + 4267 0208 114D ldr r5, .L819+8 + 4268 020a 4563 str r5, [r0, #52] + 4269 020c 06F14001 add r1, r6, #64 + 4270 0210 FFF7FEFF bl HAL_DMA_Start_IT + 4271 0214 0028 cmp r0, #0 + 4272 0216 7FF447AF bne .L779 + 4273 021a 2668 ldr r6, [r4] + 4274 021c F368 ldr r3, [r6, #12] + 4275 021e 43F48053 orr r3, r3, #4096 + 4276 0222 F360 str r3, [r6, #12] + 4277 0224 23E7 b .L790 + 4278 .L818: + 4279 0226 2668 ldr r6, [r4] + 4280 0228 0223 movs r3, #2 + 4281 022a 84F84230 strb r3, [r4, #66] + 4282 022e 84F84730 strb r3, [r4, #71] + 4283 0232 336A ldr r3, [r6, #32] + 4284 0234 23F48033 bic r3, r3, #65536 + 4285 0238 3362 str r3, [r6, #32] + 4286 023a 336A ldr r3, [r6, #32] + 4287 023c 43F48033 orr r3, r3, #65536 + 4288 0240 0120 movs r0, #1 + 4289 0242 3362 str r3, [r6, #32] + 4290 0244 13E7 b .L790 + 4291 .L820: + 4292 0246 00BF .align 2 + 4293 .L819: + 4294 0248 00000000 .word TIM_DMACaptureCplt + 4295 024c 00000000 .word TIM_DMACaptureHalfCplt + 4296 0250 00000000 .word TIM_DMAError + 4297 0254 002C0140 .word 1073818624 + 4298 0258 07000100 .word 65543 + 4300 .section .text.HAL_TIM_IC_Stop_DMA,"ax",%progbits + 4301 .align 1 + 4302 .p2align 2,,3 + ARM GAS /tmp/cc6kdh5W.s page 75 + + + 4303 .global HAL_TIM_IC_Stop_DMA + 4304 .syntax unified + 4305 .thumb + 4306 .thumb_func + 4307 .fpu fpv4-sp-d16 + 4309 HAL_TIM_IC_Stop_DMA: + 4310 @ args = 0, pretend = 0, frame = 0 + 4311 @ frame_needed = 0, uses_anonymous_args = 0 + 4312 0000 38B5 push {r3, r4, r5, lr} + 4313 0002 0368 ldr r3, [r0] + 4314 0004 0446 mov r4, r0 + 4315 0006 1A6A ldr r2, [r3, #32] + 4316 0008 01F01F00 and r0, r1, #31 + 4317 000c 0D46 mov r5, r1 + 4318 000e 0121 movs r1, #1 + 4319 0010 8140 lsls r1, r1, r0 + 4320 0012 22EA0102 bic r2, r2, r1 + 4321 0016 1A62 str r2, [r3, #32] + 4322 0018 1A6A ldr r2, [r3, #32] + 4323 001a 1A62 str r2, [r3, #32] + 4324 001c 0C2D cmp r5, #12 + 4325 001e 08D8 bhi .L841 + 4326 0020 DFE805F0 tbb [pc, r5] + 4327 .L824: + 4328 0024 5E .byte (.L827-.L824)/2 + 4329 0025 07 .byte (.L841-.L824)/2 + 4330 0026 07 .byte (.L841-.L824)/2 + 4331 0027 07 .byte (.L841-.L824)/2 + 4332 0028 4A .byte (.L826-.L824)/2 + 4333 0029 07 .byte (.L841-.L824)/2 + 4334 002a 07 .byte (.L841-.L824)/2 + 4335 002b 07 .byte (.L841-.L824)/2 + 4336 002c 31 .byte (.L825-.L824)/2 + 4337 002d 07 .byte (.L841-.L824)/2 + 4338 002e 07 .byte (.L841-.L824)/2 + 4339 002f 07 .byte (.L841-.L824)/2 + 4340 0030 09 .byte (.L823-.L824)/2 + 4341 0031 00 .p2align 1 + 4342 .L841: + 4343 0032 0120 movs r0, #1 + 4344 0034 38BD pop {r3, r4, r5, pc} + 4345 .L823: + 4346 0036 DA68 ldr r2, [r3, #12] + 4347 0038 206B ldr r0, [r4, #48] + 4348 003a 22F48052 bic r2, r2, #4096 + 4349 003e DA60 str r2, [r3, #12] + 4350 0040 FFF7FEFF bl HAL_DMA_Abort_IT + 4351 0044 2368 ldr r3, [r4] + 4352 0046 196A ldr r1, [r3, #32] + 4353 0048 41F21112 movw r2, #4369 + 4354 004c 1142 tst r1, r2 + 4355 004e 6BD1 bne .L834 + 4356 0050 196A ldr r1, [r3, #32] + 4357 0052 44F24442 movw r2, #17476 + 4358 0056 1142 tst r1, r2 + 4359 0058 66D1 bne .L834 + 4360 .L836: + ARM GAS /tmp/cc6kdh5W.s page 76 + + + 4361 005a 1A68 ldr r2, [r3] + 4362 005c 042D cmp r5, #4 + 4363 005e 22F00102 bic r2, r2, #1 + 4364 0062 1A60 str r2, [r3] + 4365 0064 35D0 beq .L839 + 4366 0066 082D cmp r5, #8 + 4367 0068 1FD0 beq .L833 + 4368 006a 0C2D cmp r5, #12 + 4369 006c 5CD0 beq .L834 + 4370 006e 0123 movs r3, #1 + 4371 0070 102D cmp r5, #16 + 4372 0072 0CBF ite eq + 4373 0074 84F84230 strbeq r3, [r4, #66] + 4374 0078 84F84330 strbne r3, [r4, #67] + 4375 .L832: + 4376 007c 0123 movs r3, #1 + 4377 007e 84F84730 strb r3, [r4, #71] + 4378 0082 0020 movs r0, #0 + 4379 0084 38BD pop {r3, r4, r5, pc} + 4380 .L825: + 4381 0086 DA68 ldr r2, [r3, #12] + 4382 0088 E06A ldr r0, [r4, #44] + 4383 008a 22F40062 bic r2, r2, #2048 + 4384 008e DA60 str r2, [r3, #12] + 4385 0090 FFF7FEFF bl HAL_DMA_Abort_IT + 4386 0094 2368 ldr r3, [r4] + 4387 0096 196A ldr r1, [r3, #32] + 4388 0098 41F21112 movw r2, #4369 + 4389 009c 1142 tst r1, r2 + 4390 009e 04D1 bne .L833 + 4391 00a0 196A ldr r1, [r3, #32] + 4392 00a2 44F24442 movw r2, #17476 + 4393 00a6 1142 tst r1, r2 + 4394 00a8 D7D0 beq .L836 + 4395 .L833: + 4396 00aa 0123 movs r3, #1 + 4397 00ac 84F84030 strb r3, [r4, #64] + 4398 00b0 84F84630 strb r3, [r4, #70] + 4399 00b4 0020 movs r0, #0 + 4400 00b6 38BD pop {r3, r4, r5, pc} + 4401 .L826: + 4402 00b8 DA68 ldr r2, [r3, #12] + 4403 00ba A06A ldr r0, [r4, #40] + 4404 00bc 22F48062 bic r2, r2, #1024 + 4405 00c0 DA60 str r2, [r3, #12] + 4406 00c2 FFF7FEFF bl HAL_DMA_Abort_IT + 4407 00c6 2368 ldr r3, [r4] + 4408 00c8 196A ldr r1, [r3, #32] + 4409 00ca 41F21112 movw r2, #4369 + 4410 00ce 1142 tst r1, r2 + 4411 00d0 1AD0 beq .L829 + 4412 .L839: + 4413 00d2 0123 movs r3, #1 + 4414 00d4 84F83F30 strb r3, [r4, #63] + 4415 00d8 84F84530 strb r3, [r4, #69] + 4416 00dc 0020 movs r0, #0 + 4417 00de 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/cc6kdh5W.s page 77 + + + 4418 .L827: + 4419 00e0 DA68 ldr r2, [r3, #12] + 4420 00e2 606A ldr r0, [r4, #36] + 4421 00e4 22F40072 bic r2, r2, #512 + 4422 00e8 DA60 str r2, [r3, #12] + 4423 00ea FFF7FEFF bl HAL_DMA_Abort_IT + 4424 00ee 2368 ldr r3, [r4] + 4425 00f0 196A ldr r1, [r3, #32] + 4426 00f2 41F21112 movw r2, #4369 + 4427 00f6 1142 tst r1, r2 + 4428 00f8 0CD0 beq .L828 + 4429 .L838: + 4430 00fa 0123 movs r3, #1 + 4431 00fc 84F83E30 strb r3, [r4, #62] + 4432 0100 84F84430 strb r3, [r4, #68] + 4433 0104 0020 movs r0, #0 + 4434 0106 38BD pop {r3, r4, r5, pc} + 4435 .L829: + 4436 0108 196A ldr r1, [r3, #32] + 4437 010a 44F24442 movw r2, #17476 + 4438 010e 1142 tst r1, r2 + 4439 0110 A3D0 beq .L836 + 4440 0112 DEE7 b .L839 + 4441 .L828: + 4442 0114 196A ldr r1, [r3, #32] + 4443 0116 44F24442 movw r2, #17476 + 4444 011a 1142 tst r1, r2 + 4445 011c EDD1 bne .L838 + 4446 011e 1A68 ldr r2, [r3] + 4447 0120 22F00102 bic r2, r2, #1 + 4448 0124 1A60 str r2, [r3] + 4449 0126 E8E7 b .L838 + 4450 .L834: + 4451 0128 0123 movs r3, #1 + 4452 012a 84F84130 strb r3, [r4, #65] + 4453 012e A5E7 b .L832 + 4455 .section .text.HAL_TIM_OnePulse_MspInit,"ax",%progbits + 4456 .align 1 + 4457 .p2align 2,,3 + 4458 .weak HAL_TIM_OnePulse_MspInit + 4459 .syntax unified + 4460 .thumb + 4461 .thumb_func + 4462 .fpu fpv4-sp-d16 + 4464 HAL_TIM_OnePulse_MspInit: + 4465 @ args = 0, pretend = 0, frame = 0 + 4466 @ frame_needed = 0, uses_anonymous_args = 0 + 4467 @ link register save eliminated. + 4468 0000 7047 bx lr + 4470 0002 00BF .section .text.HAL_TIM_OnePulse_Init,"ax",%progbits + 4471 .align 1 + 4472 .p2align 2,,3 + 4473 .global HAL_TIM_OnePulse_Init + 4474 .syntax unified + 4475 .thumb + 4476 .thumb_func + 4477 .fpu fpv4-sp-d16 + ARM GAS /tmp/cc6kdh5W.s page 78 + + + 4479 HAL_TIM_OnePulse_Init: + 4480 @ args = 0, pretend = 0, frame = 0 + 4481 @ frame_needed = 0, uses_anonymous_args = 0 + 4482 0000 0028 cmp r0, #0 + 4483 0002 6DD0 beq .L879 + 4484 0004 38B5 push {r3, r4, r5, lr} + 4485 0006 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 4486 000a 0D46 mov r5, r1 + 4487 000c 0446 mov r4, r0 + 4488 000e 03F0FF02 and r2, r3, #255 + 4489 0012 002B cmp r3, #0 + 4490 0014 5FD0 beq .L888 + 4491 .L866: + 4492 0016 2368 ldr r3, [r4] + 4493 0018 3249 ldr r1, .L889 + 4494 001a 0222 movs r2, #2 + 4495 001c 84F83D20 strb r2, [r4, #61] + 4496 0020 8B42 cmp r3, r1 + 4497 0022 1A68 ldr r2, [r3] + 4498 0024 43D0 beq .L871 + 4499 0026 B3F1804F cmp r3, #1073741824 + 4500 002a 18D0 beq .L869 + 4501 002c A1F59431 sub r1, r1, #75776 + 4502 0030 8B42 cmp r3, r1 + 4503 0032 14D0 beq .L869 + 4504 0034 01F58061 add r1, r1, #1024 + 4505 0038 8B42 cmp r3, r1 + 4506 003a 10D0 beq .L869 + 4507 003c 01F59631 add r1, r1, #76800 + 4508 0040 8B42 cmp r3, r1 + 4509 0042 34D0 beq .L871 + 4510 0044 01F54061 add r1, r1, #3072 + 4511 0048 8B42 cmp r3, r1 + 4512 004a 34D0 beq .L886 + 4513 004c 01F58061 add r1, r1, #1024 + 4514 0050 8B42 cmp r3, r1 + 4515 0052 30D0 beq .L886 + 4516 0054 01F58061 add r1, r1, #1024 + 4517 0058 8B42 cmp r3, r1 + 4518 005a 08D1 bne .L887 + 4519 005c 2BE0 b .L886 + 4520 .L869: + 4521 005e A168 ldr r1, [r4, #8] + 4522 0060 22F07002 bic r2, r2, #112 + 4523 0064 0A43 orrs r2, r2, r1 + 4524 0066 2169 ldr r1, [r4, #16] + 4525 0068 22F44072 bic r2, r2, #768 + 4526 006c 0A43 orrs r2, r2, r1 + 4527 .L887: + 4528 006e A169 ldr r1, [r4, #24] + 4529 0070 22F08002 bic r2, r2, #128 + 4530 0074 0A43 orrs r2, r2, r1 + 4531 0076 E168 ldr r1, [r4, #12] + 4532 0078 1A60 str r2, [r3] + 4533 007a D962 str r1, [r3, #44] + 4534 007c 6268 ldr r2, [r4, #4] + 4535 007e 9A62 str r2, [r3, #40] + ARM GAS /tmp/cc6kdh5W.s page 79 + + + 4536 .L876: + 4537 0080 0122 movs r2, #1 + 4538 0082 5A61 str r2, [r3, #20] + 4539 0084 1868 ldr r0, [r3] + 4540 0086 20F00800 bic r0, r0, #8 + 4541 008a 1860 str r0, [r3] + 4542 008c 1868 ldr r0, [r3] + 4543 008e 2843 orrs r0, r0, r5 + 4544 0090 1860 str r0, [r3] + 4545 0092 84F84820 strb r2, [r4, #72] + 4546 0096 84F83E20 strb r2, [r4, #62] + 4547 009a 84F83F20 strb r2, [r4, #63] + 4548 009e 84F84420 strb r2, [r4, #68] + 4549 00a2 84F84520 strb r2, [r4, #69] + 4550 00a6 84F83D20 strb r2, [r4, #61] + 4551 00aa 0020 movs r0, #0 + 4552 00ac 38BD pop {r3, r4, r5, pc} + 4553 .L871: + 4554 00ae A168 ldr r1, [r4, #8] + 4555 00b0 22F07002 bic r2, r2, #112 + 4556 00b4 0A43 orrs r2, r2, r1 + 4557 .L886: + 4558 00b6 2169 ldr r1, [r4, #16] + 4559 00b8 22F44072 bic r2, r2, #768 + 4560 00bc 0A43 orrs r2, r2, r1 + 4561 00be A169 ldr r1, [r4, #24] + 4562 00c0 22F08002 bic r2, r2, #128 + 4563 00c4 0A43 orrs r2, r2, r1 + 4564 00c6 1A60 str r2, [r3] + 4565 00c8 E268 ldr r2, [r4, #12] + 4566 00ca DA62 str r2, [r3, #44] + 4567 00cc 6268 ldr r2, [r4, #4] + 4568 00ce 9A62 str r2, [r3, #40] + 4569 00d0 6269 ldr r2, [r4, #20] + 4570 00d2 1A63 str r2, [r3, #48] + 4571 00d4 D4E7 b .L876 + 4572 .L888: + 4573 00d6 80F83C20 strb r2, [r0, #60] + 4574 00da FFF7FEFF bl HAL_TIM_OnePulse_MspInit + 4575 00de 9AE7 b .L866 + 4576 .L879: + 4577 00e0 0120 movs r0, #1 + 4578 00e2 7047 bx lr + 4579 .L890: + 4580 .align 2 + 4581 .L889: + 4582 00e4 002C0140 .word 1073818624 + 4584 .section .text.HAL_TIM_OnePulse_MspDeInit,"ax",%progbits + 4585 .align 1 + 4586 .p2align 2,,3 + 4587 .weak HAL_TIM_OnePulse_MspDeInit + 4588 .syntax unified + 4589 .thumb + 4590 .thumb_func + 4591 .fpu fpv4-sp-d16 + 4593 HAL_TIM_OnePulse_MspDeInit: + 4594 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc6kdh5W.s page 80 + + + 4595 @ frame_needed = 0, uses_anonymous_args = 0 + 4596 @ link register save eliminated. + 4597 0000 7047 bx lr + 4599 0002 00BF .section .text.HAL_TIM_OnePulse_DeInit,"ax",%progbits + 4600 .align 1 + 4601 .p2align 2,,3 + 4602 .global HAL_TIM_OnePulse_DeInit + 4603 .syntax unified + 4604 .thumb + 4605 .thumb_func + 4606 .fpu fpv4-sp-d16 + 4608 HAL_TIM_OnePulse_DeInit: + 4609 @ args = 0, pretend = 0, frame = 0 + 4610 @ frame_needed = 0, uses_anonymous_args = 0 + 4611 0000 0222 movs r2, #2 + 4612 0002 0368 ldr r3, [r0] + 4613 0004 10B5 push {r4, lr} + 4614 0006 80F83D20 strb r2, [r0, #61] + 4615 000a 196A ldr r1, [r3, #32] + 4616 000c 41F21112 movw r2, #4369 + 4617 0010 1142 tst r1, r2 + 4618 0012 0446 mov r4, r0 + 4619 0014 08D1 bne .L893 + 4620 0016 196A ldr r1, [r3, #32] + 4621 0018 44F24442 movw r2, #17476 + 4622 001c 1142 tst r1, r2 + 4623 001e 03D1 bne .L893 + 4624 0020 1A68 ldr r2, [r3] + 4625 0022 22F00102 bic r2, r2, #1 + 4626 0026 1A60 str r2, [r3] + 4627 .L893: + 4628 0028 2046 mov r0, r4 + 4629 002a FFF7FEFF bl HAL_TIM_OnePulse_MspDeInit + 4630 002e 0020 movs r0, #0 + 4631 0030 84F84800 strb r0, [r4, #72] + 4632 0034 84F83C00 strb r0, [r4, #60] + 4633 0038 84F83E00 strb r0, [r4, #62] + 4634 003c 84F83F00 strb r0, [r4, #63] + 4635 0040 84F84400 strb r0, [r4, #68] + 4636 0044 84F84500 strb r0, [r4, #69] + 4637 0048 84F83D00 strb r0, [r4, #61] + 4638 004c 10BD pop {r4, pc} + 4640 004e 00BF .section .text.HAL_TIM_OnePulse_Start,"ax",%progbits + 4641 .align 1 + 4642 .p2align 2,,3 + 4643 .global HAL_TIM_OnePulse_Start + 4644 .syntax unified + 4645 .thumb + 4646 .thumb_func + 4647 .fpu fpv4-sp-d16 + 4649 HAL_TIM_OnePulse_Start: + 4650 @ args = 0, pretend = 0, frame = 0 + 4651 @ frame_needed = 0, uses_anonymous_args = 0 + 4652 0000 00B5 push {lr} + 4653 0002 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2 + 4654 0006 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 4655 000a 90F84420 ldrb r2, [r0, #68] @ zero_extendqisi2 + ARM GAS /tmp/cc6kdh5W.s page 81 + + + 4656 000e 90F84510 ldrb r1, [r0, #69] @ zero_extendqisi2 + 4657 0012 BCF1010F cmp ip, #1 + 4658 0016 07D1 bne .L898 + 4659 0018 DBB2 uxtb r3, r3 + 4660 001a 012B cmp r3, #1 + 4661 001c 5FFA8CFE uxtb lr, ip + 4662 0020 07D0 beq .L903 + 4663 .L896: + 4664 0022 7046 mov r0, lr + 4665 0024 5DF804FB ldr pc, [sp], #4 + 4666 .L898: + 4667 0028 4FF0010E mov lr, #1 + 4668 002c 7046 mov r0, lr + 4669 002e 5DF804FB ldr pc, [sp], #4 + 4670 .L903: + 4671 0032 D2B2 uxtb r2, r2 + 4672 0034 012A cmp r2, #1 + 4673 0036 F4D1 bne .L896 + 4674 0038 C9B2 uxtb r1, r1 + 4675 003a 0129 cmp r1, #1 + 4676 003c F1D1 bne .L896 + 4677 003e 0368 ldr r3, [r0] + 4678 0040 1A49 ldr r1, .L904 + 4679 0042 0222 movs r2, #2 + 4680 0044 80F83E20 strb r2, [r0, #62] + 4681 0048 80F83F20 strb r2, [r0, #63] + 4682 004c 80F84420 strb r2, [r0, #68] + 4683 0050 80F84520 strb r2, [r0, #69] + 4684 0054 1A6A ldr r2, [r3, #32] + 4685 0056 22F00102 bic r2, r2, #1 + 4686 005a 1A62 str r2, [r3, #32] + 4687 005c 1A6A ldr r2, [r3, #32] + 4688 005e 42F00102 orr r2, r2, #1 + 4689 0062 1A62 str r2, [r3, #32] + 4690 0064 1A6A ldr r2, [r3, #32] + 4691 0066 22F01002 bic r2, r2, #16 + 4692 006a 1A62 str r2, [r3, #32] + 4693 006c 1A6A ldr r2, [r3, #32] + 4694 006e 8B42 cmp r3, r1 + 4695 0070 42F01002 orr r2, r2, #16 + 4696 0074 1A62 str r2, [r3, #32] + 4697 0076 11D0 beq .L897 + 4698 0078 0D4A ldr r2, .L904+4 + 4699 007a 9342 cmp r3, r2 + 4700 007c 0ED0 beq .L897 + 4701 007e 02F54062 add r2, r2, #3072 + 4702 0082 9342 cmp r3, r2 + 4703 0084 0AD0 beq .L897 + 4704 0086 02F58062 add r2, r2, #1024 + 4705 008a 9342 cmp r3, r2 + 4706 008c 06D0 beq .L897 + 4707 008e 02F58062 add r2, r2, #1024 + 4708 0092 9342 cmp r3, r2 + 4709 0094 02D0 beq .L897 + 4710 0096 4FF0000E mov lr, #0 + 4711 009a C2E7 b .L896 + 4712 .L897: + ARM GAS /tmp/cc6kdh5W.s page 82 + + + 4713 009c 5A6C ldr r2, [r3, #68] + 4714 009e 42F40042 orr r2, r2, #32768 + 4715 00a2 4FF0000E mov lr, #0 + 4716 00a6 5A64 str r2, [r3, #68] + 4717 00a8 BBE7 b .L896 + 4718 .L905: + 4719 00aa 00BF .align 2 + 4720 .L904: + 4721 00ac 002C0140 .word 1073818624 + 4722 00b0 00340140 .word 1073820672 + 4724 .section .text.HAL_TIM_OnePulse_Stop,"ax",%progbits + 4725 .align 1 + 4726 .p2align 2,,3 + 4727 .global HAL_TIM_OnePulse_Stop + 4728 .syntax unified + 4729 .thumb + 4730 .thumb_func + 4731 .fpu fpv4-sp-d16 + 4733 HAL_TIM_OnePulse_Stop: + 4734 @ args = 0, pretend = 0, frame = 0 + 4735 @ frame_needed = 0, uses_anonymous_args = 0 + 4736 @ link register save eliminated. + 4737 0000 0246 mov r2, r0 + 4738 0002 2348 ldr r0, .L910 + 4739 0004 1368 ldr r3, [r2] + 4740 0006 196A ldr r1, [r3, #32] + 4741 0008 21F00101 bic r1, r1, #1 + 4742 000c 1962 str r1, [r3, #32] + 4743 000e 196A ldr r1, [r3, #32] + 4744 0010 1962 str r1, [r3, #32] + 4745 0012 196A ldr r1, [r3, #32] + 4746 0014 21F01001 bic r1, r1, #16 + 4747 0018 1962 str r1, [r3, #32] + 4748 001a 196A ldr r1, [r3, #32] + 4749 001c 1962 str r1, [r3, #32] + 4750 001e 8342 cmp r3, r0 + 4751 0020 27D0 beq .L907 + 4752 0022 1C49 ldr r1, .L910+4 + 4753 0024 8B42 cmp r3, r1 + 4754 0026 24D0 beq .L907 + 4755 0028 01F54061 add r1, r1, #3072 + 4756 002c 8B42 cmp r3, r1 + 4757 002e 20D0 beq .L907 + 4758 0030 01F58061 add r1, r1, #1024 + 4759 0034 8B42 cmp r3, r1 + 4760 0036 1CD0 beq .L907 + 4761 0038 01F58061 add r1, r1, #1024 + 4762 003c 8B42 cmp r3, r1 + 4763 003e 18D0 beq .L907 + 4764 .L908: + 4765 0040 186A ldr r0, [r3, #32] + 4766 0042 41F21111 movw r1, #4369 + 4767 0046 0842 tst r0, r1 + 4768 0048 08D1 bne .L909 + 4769 004a 186A ldr r0, [r3, #32] + 4770 004c 44F24441 movw r1, #17476 + 4771 0050 0842 tst r0, r1 + ARM GAS /tmp/cc6kdh5W.s page 83 + + + 4772 0052 03D1 bne .L909 + 4773 0054 1968 ldr r1, [r3] + 4774 0056 21F00101 bic r1, r1, #1 + 4775 005a 1960 str r1, [r3] + 4776 .L909: + 4777 005c 0123 movs r3, #1 + 4778 005e 82F83E30 strb r3, [r2, #62] + 4779 0062 0020 movs r0, #0 + 4780 0064 82F83F30 strb r3, [r2, #63] + 4781 0068 82F84430 strb r3, [r2, #68] + 4782 006c 82F84530 strb r3, [r2, #69] + 4783 0070 7047 bx lr + 4784 .L907: + 4785 0072 186A ldr r0, [r3, #32] + 4786 0074 41F21111 movw r1, #4369 + 4787 0078 0842 tst r0, r1 + 4788 007a E1D1 bne .L908 + 4789 007c 186A ldr r0, [r3, #32] + 4790 007e 44F24441 movw r1, #17476 + 4791 0082 0842 tst r0, r1 + 4792 0084 DCD1 bne .L908 + 4793 0086 596C ldr r1, [r3, #68] + 4794 0088 21F40041 bic r1, r1, #32768 + 4795 008c 5964 str r1, [r3, #68] + 4796 008e D7E7 b .L908 + 4797 .L911: + 4798 .align 2 + 4799 .L910: + 4800 0090 002C0140 .word 1073818624 + 4801 0094 00340140 .word 1073820672 + 4803 .section .text.HAL_TIM_OnePulse_Start_IT,"ax",%progbits + 4804 .align 1 + 4805 .p2align 2,,3 + 4806 .global HAL_TIM_OnePulse_Start_IT + 4807 .syntax unified + 4808 .thumb + 4809 .thumb_func + 4810 .fpu fpv4-sp-d16 + 4812 HAL_TIM_OnePulse_Start_IT: + 4813 @ args = 0, pretend = 0, frame = 0 + 4814 @ frame_needed = 0, uses_anonymous_args = 0 + 4815 0000 00B5 push {lr} + 4816 0002 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2 + 4817 0006 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 4818 000a 90F84420 ldrb r2, [r0, #68] @ zero_extendqisi2 + 4819 000e 90F84510 ldrb r1, [r0, #69] @ zero_extendqisi2 + 4820 0012 BCF1010F cmp ip, #1 + 4821 0016 07D1 bne .L915 + 4822 0018 DBB2 uxtb r3, r3 + 4823 001a 012B cmp r3, #1 + 4824 001c 5FFA8CFE uxtb lr, ip + 4825 0020 07D0 beq .L920 + 4826 .L913: + 4827 0022 7046 mov r0, lr + 4828 0024 5DF804FB ldr pc, [sp], #4 + 4829 .L915: + 4830 0028 4FF0010E mov lr, #1 + ARM GAS /tmp/cc6kdh5W.s page 84 + + + 4831 002c 7046 mov r0, lr + 4832 002e 5DF804FB ldr pc, [sp], #4 + 4833 .L920: + 4834 0032 D2B2 uxtb r2, r2 + 4835 0034 012A cmp r2, #1 + 4836 0036 F4D1 bne .L913 + 4837 0038 C9B2 uxtb r1, r1 + 4838 003a 0129 cmp r1, #1 + 4839 003c F1D1 bne .L913 + 4840 003e 0368 ldr r3, [r0] + 4841 0040 1E49 ldr r1, .L921 + 4842 0042 0222 movs r2, #2 + 4843 0044 80F83E20 strb r2, [r0, #62] + 4844 0048 80F83F20 strb r2, [r0, #63] + 4845 004c 80F84420 strb r2, [r0, #68] + 4846 0050 80F84520 strb r2, [r0, #69] + 4847 0054 DA68 ldr r2, [r3, #12] + 4848 0056 42F00202 orr r2, r2, #2 + 4849 005a DA60 str r2, [r3, #12] + 4850 005c DA68 ldr r2, [r3, #12] + 4851 005e 42F00402 orr r2, r2, #4 + 4852 0062 DA60 str r2, [r3, #12] + 4853 0064 1A6A ldr r2, [r3, #32] + 4854 0066 22F00102 bic r2, r2, #1 + 4855 006a 1A62 str r2, [r3, #32] + 4856 006c 1A6A ldr r2, [r3, #32] + 4857 006e 42F00102 orr r2, r2, #1 + 4858 0072 1A62 str r2, [r3, #32] + 4859 0074 1A6A ldr r2, [r3, #32] + 4860 0076 22F01002 bic r2, r2, #16 + 4861 007a 1A62 str r2, [r3, #32] + 4862 007c 1A6A ldr r2, [r3, #32] + 4863 007e 8B42 cmp r3, r1 + 4864 0080 42F01002 orr r2, r2, #16 + 4865 0084 1A62 str r2, [r3, #32] + 4866 0086 11D0 beq .L914 + 4867 0088 0D4A ldr r2, .L921+4 + 4868 008a 9342 cmp r3, r2 + 4869 008c 0ED0 beq .L914 + 4870 008e 02F54062 add r2, r2, #3072 + 4871 0092 9342 cmp r3, r2 + 4872 0094 0AD0 beq .L914 + 4873 0096 02F58062 add r2, r2, #1024 + 4874 009a 9342 cmp r3, r2 + 4875 009c 06D0 beq .L914 + 4876 009e 02F58062 add r2, r2, #1024 + 4877 00a2 9342 cmp r3, r2 + 4878 00a4 02D0 beq .L914 + 4879 00a6 4FF0000E mov lr, #0 + 4880 00aa BAE7 b .L913 + 4881 .L914: + 4882 00ac 5A6C ldr r2, [r3, #68] + 4883 00ae 42F40042 orr r2, r2, #32768 + 4884 00b2 4FF0000E mov lr, #0 + 4885 00b6 5A64 str r2, [r3, #68] + 4886 00b8 B3E7 b .L913 + 4887 .L922: + ARM GAS /tmp/cc6kdh5W.s page 85 + + + 4888 00ba 00BF .align 2 + 4889 .L921: + 4890 00bc 002C0140 .word 1073818624 + 4891 00c0 00340140 .word 1073820672 + 4893 .section .text.HAL_TIM_OnePulse_Stop_IT,"ax",%progbits + 4894 .align 1 + 4895 .p2align 2,,3 + 4896 .global HAL_TIM_OnePulse_Stop_IT + 4897 .syntax unified + 4898 .thumb + 4899 .thumb_func + 4900 .fpu fpv4-sp-d16 + 4902 HAL_TIM_OnePulse_Stop_IT: + 4903 @ args = 0, pretend = 0, frame = 0 + 4904 @ frame_needed = 0, uses_anonymous_args = 0 + 4905 @ link register save eliminated. + 4906 0000 0246 mov r2, r0 + 4907 0002 2748 ldr r0, .L927 + 4908 0004 1368 ldr r3, [r2] + 4909 0006 D968 ldr r1, [r3, #12] + 4910 0008 21F00201 bic r1, r1, #2 + 4911 000c D960 str r1, [r3, #12] + 4912 000e D968 ldr r1, [r3, #12] + 4913 0010 21F00401 bic r1, r1, #4 + 4914 0014 D960 str r1, [r3, #12] + 4915 0016 196A ldr r1, [r3, #32] + 4916 0018 21F00101 bic r1, r1, #1 + 4917 001c 1962 str r1, [r3, #32] + 4918 001e 196A ldr r1, [r3, #32] + 4919 0020 1962 str r1, [r3, #32] + 4920 0022 196A ldr r1, [r3, #32] + 4921 0024 21F01001 bic r1, r1, #16 + 4922 0028 1962 str r1, [r3, #32] + 4923 002a 196A ldr r1, [r3, #32] + 4924 002c 1962 str r1, [r3, #32] + 4925 002e 8342 cmp r3, r0 + 4926 0030 27D0 beq .L924 + 4927 0032 1C49 ldr r1, .L927+4 + 4928 0034 8B42 cmp r3, r1 + 4929 0036 24D0 beq .L924 + 4930 0038 01F54061 add r1, r1, #3072 + 4931 003c 8B42 cmp r3, r1 + 4932 003e 20D0 beq .L924 + 4933 0040 01F58061 add r1, r1, #1024 + 4934 0044 8B42 cmp r3, r1 + 4935 0046 1CD0 beq .L924 + 4936 0048 01F58061 add r1, r1, #1024 + 4937 004c 8B42 cmp r3, r1 + 4938 004e 18D0 beq .L924 + 4939 .L925: + 4940 0050 186A ldr r0, [r3, #32] + 4941 0052 41F21111 movw r1, #4369 + 4942 0056 0842 tst r0, r1 + 4943 0058 08D1 bne .L926 + 4944 005a 186A ldr r0, [r3, #32] + 4945 005c 44F24441 movw r1, #17476 + 4946 0060 0842 tst r0, r1 + ARM GAS /tmp/cc6kdh5W.s page 86 + + + 4947 0062 03D1 bne .L926 + 4948 0064 1968 ldr r1, [r3] + 4949 0066 21F00101 bic r1, r1, #1 + 4950 006a 1960 str r1, [r3] + 4951 .L926: + 4952 006c 0123 movs r3, #1 + 4953 006e 82F83E30 strb r3, [r2, #62] + 4954 0072 0020 movs r0, #0 + 4955 0074 82F83F30 strb r3, [r2, #63] + 4956 0078 82F84430 strb r3, [r2, #68] + 4957 007c 82F84530 strb r3, [r2, #69] + 4958 0080 7047 bx lr + 4959 .L924: + 4960 0082 186A ldr r0, [r3, #32] + 4961 0084 41F21111 movw r1, #4369 + 4962 0088 0842 tst r0, r1 + 4963 008a E1D1 bne .L925 + 4964 008c 186A ldr r0, [r3, #32] + 4965 008e 44F24441 movw r1, #17476 + 4966 0092 0842 tst r0, r1 + 4967 0094 DCD1 bne .L925 + 4968 0096 596C ldr r1, [r3, #68] + 4969 0098 21F40041 bic r1, r1, #32768 + 4970 009c 5964 str r1, [r3, #68] + 4971 009e D7E7 b .L925 + 4972 .L928: + 4973 .align 2 + 4974 .L927: + 4975 00a0 002C0140 .word 1073818624 + 4976 00a4 00340140 .word 1073820672 + 4978 .section .text.HAL_TIM_Encoder_MspInit,"ax",%progbits + 4979 .align 1 + 4980 .p2align 2,,3 + 4981 .weak HAL_TIM_Encoder_MspInit + 4982 .syntax unified + 4983 .thumb + 4984 .thumb_func + 4985 .fpu fpv4-sp-d16 + 4987 HAL_TIM_Encoder_MspInit: + 4988 @ args = 0, pretend = 0, frame = 0 + 4989 @ frame_needed = 0, uses_anonymous_args = 0 + 4990 @ link register save eliminated. + 4991 0000 7047 bx lr + 4993 0002 00BF .section .text.HAL_TIM_Encoder_Init,"ax",%progbits + 4994 .align 1 + 4995 .p2align 2,,3 + 4996 .global HAL_TIM_Encoder_Init + 4997 .syntax unified + 4998 .thumb + 4999 .thumb_func + 5000 .fpu fpv4-sp-d16 + 5002 HAL_TIM_Encoder_Init: + 5003 @ args = 0, pretend = 0, frame = 0 + 5004 @ frame_needed = 0, uses_anonymous_args = 0 + 5005 0000 0028 cmp r0, #0 + 5006 0002 00F09680 beq .L945 + 5007 0006 F8B5 push {r3, r4, r5, r6, r7, lr} + ARM GAS /tmp/cc6kdh5W.s page 87 + + + 5008 0008 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + 5009 000c 0D46 mov r5, r1 + 5010 000e 0446 mov r4, r0 + 5011 0010 03F0FF02 and r2, r3, #255 + 5012 0014 002B cmp r3, #0 + 5013 0016 00F08780 beq .L954 + 5014 .L932: + 5015 001a 2368 ldr r3, [r4] + 5016 001c 4649 ldr r1, .L955 + 5017 001e 0222 movs r2, #2 + 5018 0020 84F83D20 strb r2, [r4, #61] + 5019 0024 9A68 ldr r2, [r3, #8] + 5020 0026 22F4A032 bic r2, r2, #81920 + 5021 002a 22F00702 bic r2, r2, #7 + 5022 002e 9A60 str r2, [r3, #8] + 5023 0030 8B42 cmp r3, r1 + 5024 0032 1A68 ldr r2, [r3] + 5025 0034 64D0 beq .L937 + 5026 0036 B3F1804F cmp r3, #1073741824 + 5027 003a 18D0 beq .L935 + 5028 003c A1F59431 sub r1, r1, #75776 + 5029 0040 8B42 cmp r3, r1 + 5030 0042 14D0 beq .L935 + 5031 0044 01F58061 add r1, r1, #1024 + 5032 0048 8B42 cmp r3, r1 + 5033 004a 10D0 beq .L935 + 5034 004c 01F59631 add r1, r1, #76800 + 5035 0050 8B42 cmp r3, r1 + 5036 0052 55D0 beq .L937 + 5037 0054 01F54061 add r1, r1, #3072 + 5038 0058 8B42 cmp r3, r1 + 5039 005a 55D0 beq .L952 + 5040 005c 01F58061 add r1, r1, #1024 + 5041 0060 8B42 cmp r3, r1 + 5042 0062 51D0 beq .L952 + 5043 0064 01F58061 add r1, r1, #1024 + 5044 0068 8B42 cmp r3, r1 + 5045 006a 08D1 bne .L953 + 5046 006c 4CE0 b .L952 + 5047 .L935: + 5048 006e A168 ldr r1, [r4, #8] + 5049 0070 22F07002 bic r2, r2, #112 + 5050 0074 0A43 orrs r2, r2, r1 + 5051 0076 2169 ldr r1, [r4, #16] + 5052 0078 22F44072 bic r2, r2, #768 + 5053 007c 0A43 orrs r2, r2, r1 + 5054 .L953: + 5055 007e A169 ldr r1, [r4, #24] + 5056 0080 22F08002 bic r2, r2, #128 + 5057 0084 0A43 orrs r2, r2, r1 + 5058 0086 E168 ldr r1, [r4, #12] + 5059 0088 1A60 str r2, [r3] + 5060 008a D962 str r1, [r3, #44] + 5061 008c 6268 ldr r2, [r4, #4] + 5062 008e 9A62 str r2, [r3, #40] + 5063 .L942: + 5064 0090 0126 movs r6, #1 + ARM GAS /tmp/cc6kdh5W.s page 88 + + + 5065 0092 5E61 str r6, [r3, #20] + 5066 0094 9868 ldr r0, [r3, #8] + 5067 0096 9969 ldr r1, [r3, #24] + 5068 0098 AF68 ldr r7, [r5, #8] + 5069 009a AA69 ldr r2, [r5, #24] + 5070 009c 21F44071 bic r1, r1, #768 + 5071 00a0 21F00301 bic r1, r1, #3 + 5072 00a4 47EA0222 orr r2, r7, r2, lsl #8 + 5073 00a8 0A43 orrs r2, r2, r1 + 5074 00aa 22F47C41 bic r1, r2, #64512 + 5075 00ae 2A69 ldr r2, [r5, #16] + 5076 00b0 EF69 ldr r7, [r5, #28] + 5077 00b2 1201 lsls r2, r2, #4 + 5078 00b4 42EA0722 orr r2, r2, r7, lsl #8 + 5079 00b8 EF68 ldr r7, [r5, #12] + 5080 00ba 3A43 orrs r2, r2, r7 + 5081 00bc 1F6A ldr r7, [r3, #32] + 5082 00be 27F0AA0C bic ip, r7, #170 + 5083 00c2 2F6A ldr r7, [r5, #32] + 5084 00c4 21F0FC01 bic r1, r1, #252 + 5085 00c8 42EA0732 orr r2, r2, r7, lsl #12 + 5086 00cc 0A43 orrs r2, r2, r1 + 5087 00ce 6F69 ldr r7, [r5, #20] + 5088 00d0 6968 ldr r1, [r5, #4] + 5089 00d2 2D68 ldr r5, [r5] + 5090 00d4 41EA0711 orr r1, r1, r7, lsl #4 + 5091 00d8 2843 orrs r0, r0, r5 + 5092 00da 41EA0C01 orr r1, r1, ip + 5093 00de 9860 str r0, [r3, #8] + 5094 00e0 9A61 str r2, [r3, #24] + 5095 00e2 1962 str r1, [r3, #32] + 5096 00e4 84F84860 strb r6, [r4, #72] + 5097 00e8 84F83E60 strb r6, [r4, #62] + 5098 00ec 84F83F60 strb r6, [r4, #63] + 5099 00f0 84F84460 strb r6, [r4, #68] + 5100 00f4 84F84560 strb r6, [r4, #69] + 5101 00f8 84F83D60 strb r6, [r4, #61] + 5102 00fc 0020 movs r0, #0 + 5103 00fe F8BD pop {r3, r4, r5, r6, r7, pc} + 5104 .L937: + 5105 0100 A168 ldr r1, [r4, #8] + 5106 0102 22F07002 bic r2, r2, #112 + 5107 0106 0A43 orrs r2, r2, r1 + 5108 .L952: + 5109 0108 2169 ldr r1, [r4, #16] + 5110 010a 22F44072 bic r2, r2, #768 + 5111 010e 0A43 orrs r2, r2, r1 + 5112 0110 A169 ldr r1, [r4, #24] + 5113 0112 22F08002 bic r2, r2, #128 + 5114 0116 0A43 orrs r2, r2, r1 + 5115 0118 1A60 str r2, [r3] + 5116 011a E268 ldr r2, [r4, #12] + 5117 011c DA62 str r2, [r3, #44] + 5118 011e 6268 ldr r2, [r4, #4] + 5119 0120 9A62 str r2, [r3, #40] + 5120 0122 6269 ldr r2, [r4, #20] + 5121 0124 1A63 str r2, [r3, #48] + ARM GAS /tmp/cc6kdh5W.s page 89 + + + 5122 0126 B3E7 b .L942 + 5123 .L954: + 5124 0128 80F83C20 strb r2, [r0, #60] + 5125 012c FFF7FEFF bl HAL_TIM_Encoder_MspInit + 5126 0130 73E7 b .L932 + 5127 .L945: + 5128 0132 0120 movs r0, #1 + 5129 0134 7047 bx lr + 5130 .L956: + 5131 0136 00BF .align 2 + 5132 .L955: + 5133 0138 002C0140 .word 1073818624 + 5135 .section .text.HAL_TIM_Encoder_MspDeInit,"ax",%progbits + 5136 .align 1 + 5137 .p2align 2,,3 + 5138 .weak HAL_TIM_Encoder_MspDeInit + 5139 .syntax unified + 5140 .thumb + 5141 .thumb_func + 5142 .fpu fpv4-sp-d16 + 5144 HAL_TIM_Encoder_MspDeInit: + 5145 @ args = 0, pretend = 0, frame = 0 + 5146 @ frame_needed = 0, uses_anonymous_args = 0 + 5147 @ link register save eliminated. + 5148 0000 7047 bx lr + 5150 0002 00BF .section .text.HAL_TIM_Encoder_DeInit,"ax",%progbits + 5151 .align 1 + 5152 .p2align 2,,3 + 5153 .global HAL_TIM_Encoder_DeInit + 5154 .syntax unified + 5155 .thumb + 5156 .thumb_func + 5157 .fpu fpv4-sp-d16 + 5159 HAL_TIM_Encoder_DeInit: + 5160 @ args = 0, pretend = 0, frame = 0 + 5161 @ frame_needed = 0, uses_anonymous_args = 0 + 5162 0000 0222 movs r2, #2 + 5163 0002 0368 ldr r3, [r0] + 5164 0004 10B5 push {r4, lr} + 5165 0006 80F83D20 strb r2, [r0, #61] + 5166 000a 196A ldr r1, [r3, #32] + 5167 000c 41F21112 movw r2, #4369 + 5168 0010 1142 tst r1, r2 + 5169 0012 0446 mov r4, r0 + 5170 0014 08D1 bne .L959 + 5171 0016 196A ldr r1, [r3, #32] + 5172 0018 44F24442 movw r2, #17476 + 5173 001c 1142 tst r1, r2 + 5174 001e 03D1 bne .L959 + 5175 0020 1A68 ldr r2, [r3] + 5176 0022 22F00102 bic r2, r2, #1 + 5177 0026 1A60 str r2, [r3] + 5178 .L959: + 5179 0028 2046 mov r0, r4 + 5180 002a FFF7FEFF bl HAL_TIM_Encoder_MspDeInit + 5181 002e 0020 movs r0, #0 + 5182 0030 84F84800 strb r0, [r4, #72] + ARM GAS /tmp/cc6kdh5W.s page 90 + + + 5183 0034 84F83C00 strb r0, [r4, #60] + 5184 0038 84F83E00 strb r0, [r4, #62] + 5185 003c 84F83F00 strb r0, [r4, #63] + 5186 0040 84F84400 strb r0, [r4, #68] + 5187 0044 84F84500 strb r0, [r4, #69] + 5188 0048 84F83D00 strb r0, [r4, #61] + 5189 004c 10BD pop {r4, pc} + 5191 004e 00BF .section .text.HAL_TIM_Encoder_Start,"ax",%progbits + 5192 .align 1 + 5193 .p2align 2,,3 + 5194 .global HAL_TIM_Encoder_Start + 5195 .syntax unified + 5196 .thumb + 5197 .thumb_func + 5198 .fpu fpv4-sp-d16 + 5200 HAL_TIM_Encoder_Start: + 5201 @ args = 0, pretend = 0, frame = 0 + 5202 @ frame_needed = 0, uses_anonymous_args = 0 + 5203 0000 00B5 push {lr} + 5204 0002 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 5205 0006 90F83F20 ldrb r2, [r0, #63] @ zero_extendqisi2 + 5206 000a 90F844C0 ldrb ip, [r0, #68] @ zero_extendqisi2 + 5207 000e 90F845E0 ldrb lr, [r0, #69] @ zero_extendqisi2 + 5208 0012 DBB2 uxtb r3, r3 + 5209 0014 5FFA8CFC uxtb ip, ip + 5210 0018 F1B9 cbnz r1, .L962 + 5211 001a 012B cmp r3, #1 + 5212 001c 03D0 beq .L974 + 5213 .L969: + 5214 001e 0123 movs r3, #1 + 5215 .L963: + 5216 0020 1846 mov r0, r3 + 5217 0022 5DF804FB ldr pc, [sp], #4 + 5218 .L974: + 5219 0026 BCF1010F cmp ip, #1 + 5220 002a F9D1 bne .L963 + 5221 002c 0268 ldr r2, [r0] + 5222 002e 0223 movs r3, #2 + 5223 0030 80F83E30 strb r3, [r0, #62] + 5224 0034 80F84430 strb r3, [r0, #68] + 5225 0038 136A ldr r3, [r2, #32] + 5226 003a 23F00103 bic r3, r3, #1 + 5227 003e 1362 str r3, [r2, #32] + 5228 0040 136A ldr r3, [r2, #32] + 5229 0042 43F00103 orr r3, r3, #1 + 5230 0046 1362 str r3, [r2, #32] + 5231 .L964: + 5232 0048 1168 ldr r1, [r2] + 5233 004a 0023 movs r3, #0 + 5234 004c 41F00101 orr r1, r1, #1 + 5235 0050 1160 str r1, [r2] + 5236 0052 1846 mov r0, r3 + 5237 0054 5DF804FB ldr pc, [sp], #4 + 5238 .L962: + 5239 0058 0429 cmp r1, #4 + 5240 005a D2B2 uxtb r2, r2 + 5241 005c 5FFA8EFE uxtb lr, lr + ARM GAS /tmp/cc6kdh5W.s page 91 + + + 5242 0060 1CD0 beq .L975 + 5243 0062 012B cmp r3, #1 + 5244 0064 DBD1 bne .L969 + 5245 0066 012A cmp r2, #1 + 5246 0068 DAD1 bne .L963 + 5247 006a BCF1010F cmp ip, #1 + 5248 006e D7D1 bne .L963 + 5249 0070 BEF1010F cmp lr, #1 + 5250 0074 D4D1 bne .L963 + 5251 0076 0223 movs r3, #2 + 5252 0078 0268 ldr r2, [r0] + 5253 007a 80F83E30 strb r3, [r0, #62] + 5254 007e 80F83F30 strb r3, [r0, #63] + 5255 0082 80F84430 strb r3, [r0, #68] + 5256 0086 80F84530 strb r3, [r0, #69] + 5257 008a 136A ldr r3, [r2, #32] + 5258 008c 23F00103 bic r3, r3, #1 + 5259 0090 1362 str r3, [r2, #32] + 5260 0092 136A ldr r3, [r2, #32] + 5261 0094 43F00103 orr r3, r3, #1 + 5262 0098 1362 str r3, [r2, #32] + 5263 009a 0AE0 b .L973 + 5264 .L975: + 5265 009c 012A cmp r2, #1 + 5266 009e BED1 bne .L969 + 5267 00a0 BEF1010F cmp lr, #1 + 5268 00a4 BBD1 bne .L969 + 5269 00a6 0223 movs r3, #2 + 5270 00a8 0268 ldr r2, [r0] + 5271 00aa 80F83F30 strb r3, [r0, #63] + 5272 00ae 80F84530 strb r3, [r0, #69] + 5273 .L973: + 5274 00b2 136A ldr r3, [r2, #32] + 5275 00b4 23F01003 bic r3, r3, #16 + 5276 00b8 1362 str r3, [r2, #32] + 5277 00ba 136A ldr r3, [r2, #32] + 5278 00bc 43F01003 orr r3, r3, #16 + 5279 00c0 1362 str r3, [r2, #32] + 5280 00c2 C1E7 b .L964 + 5282 .section .text.HAL_TIM_Encoder_Stop,"ax",%progbits + 5283 .align 1 + 5284 .p2align 2,,3 + 5285 .global HAL_TIM_Encoder_Stop + 5286 .syntax unified + 5287 .thumb + 5288 .thumb_func + 5289 .fpu fpv4-sp-d16 + 5291 HAL_TIM_Encoder_Stop: + 5292 @ args = 0, pretend = 0, frame = 0 + 5293 @ frame_needed = 0, uses_anonymous_args = 0 + 5294 @ link register save eliminated. + 5295 0000 10B4 push {r4} + 5296 0002 0029 cmp r1, #0 + 5297 0004 40D0 beq .L977 + 5298 0006 0429 cmp r1, #4 + 5299 0008 3CD0 beq .L978 + 5300 000a 0368 ldr r3, [r0] + ARM GAS /tmp/cc6kdh5W.s page 92 + + + 5301 000c 1A6A ldr r2, [r3, #32] + 5302 000e 22F00102 bic r2, r2, #1 + 5303 0012 1A62 str r2, [r3, #32] + 5304 0014 1A6A ldr r2, [r3, #32] + 5305 0016 1A62 str r2, [r3, #32] + 5306 .L997: + 5307 0018 1A6A ldr r2, [r3, #32] + 5308 001a 22F01002 bic r2, r2, #16 + 5309 001e 1A62 str r2, [r3, #32] + 5310 0020 1A6A ldr r2, [r3, #32] + 5311 0022 1A62 str r2, [r3, #32] + 5312 0024 1C6A ldr r4, [r3, #32] + 5313 0026 41F21112 movw r2, #4369 + 5314 002a 1442 tst r4, r2 + 5315 002c 12D1 bne .L983 + 5316 002e 1C6A ldr r4, [r3, #32] + 5317 0030 44F24442 movw r2, #17476 + 5318 0034 1442 tst r4, r2 + 5319 0036 03D1 bne .L984 + 5320 .L1000: + 5321 0038 1A68 ldr r2, [r3] + 5322 003a 22F00102 bic r2, r2, #1 + 5323 003e 1A60 str r2, [r3] + 5324 .L984: + 5325 0040 41B9 cbnz r1, .L983 + 5326 .L981: + 5327 0042 0123 movs r3, #1 + 5328 0044 80F83E30 strb r3, [r0, #62] + 5329 0048 80F84430 strb r3, [r0, #68] + 5330 004c 5DF8044B ldr r4, [sp], #4 + 5331 0050 0020 movs r0, #0 + 5332 0052 7047 bx lr + 5333 .L983: + 5334 0054 0429 cmp r1, #4 + 5335 0056 0CD0 beq .L999 + 5336 0058 0123 movs r3, #1 + 5337 005a 80F83E30 strb r3, [r0, #62] + 5338 005e 80F83F30 strb r3, [r0, #63] + 5339 0062 80F84430 strb r3, [r0, #68] + 5340 0066 80F84530 strb r3, [r0, #69] + 5341 006a 5DF8044B ldr r4, [sp], #4 + 5342 006e 0020 movs r0, #0 + 5343 0070 7047 bx lr + 5344 .L999: + 5345 0072 0123 movs r3, #1 + 5346 0074 80F83F30 strb r3, [r0, #63] + 5347 0078 80F84530 strb r3, [r0, #69] + 5348 007c 5DF8044B ldr r4, [sp], #4 + 5349 0080 0020 movs r0, #0 + 5350 0082 7047 bx lr + 5351 .L978: + 5352 0084 0368 ldr r3, [r0] + 5353 0086 C7E7 b .L997 + 5354 .L977: + 5355 0088 0368 ldr r3, [r0] + 5356 008a 1A6A ldr r2, [r3, #32] + 5357 008c 22F00102 bic r2, r2, #1 + ARM GAS /tmp/cc6kdh5W.s page 93 + + + 5358 0090 1A62 str r2, [r3, #32] + 5359 0092 1A6A ldr r2, [r3, #32] + 5360 0094 1A62 str r2, [r3, #32] + 5361 0096 1A6A ldr r2, [r3, #32] + 5362 0098 41F21114 movw r4, #4369 + 5363 009c 2242 tst r2, r4 + 5364 009e D0D1 bne .L981 + 5365 00a0 1C6A ldr r4, [r3, #32] + 5366 00a2 44F24442 movw r2, #17476 + 5367 00a6 1442 tst r4, r2 + 5368 00a8 CAD1 bne .L984 + 5369 00aa C5E7 b .L1000 + 5371 .section .text.HAL_TIM_Encoder_Start_IT,"ax",%progbits + 5372 .align 1 + 5373 .p2align 2,,3 + 5374 .global HAL_TIM_Encoder_Start_IT + 5375 .syntax unified + 5376 .thumb + 5377 .thumb_func + 5378 .fpu fpv4-sp-d16 + 5380 HAL_TIM_Encoder_Start_IT: + 5381 @ args = 0, pretend = 0, frame = 0 + 5382 @ frame_needed = 0, uses_anonymous_args = 0 + 5383 0000 00B5 push {lr} + 5384 0002 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2 + 5385 0006 90F83F20 ldrb r2, [r0, #63] @ zero_extendqisi2 + 5386 000a 90F844C0 ldrb ip, [r0, #68] @ zero_extendqisi2 + 5387 000e 90F845E0 ldrb lr, [r0, #69] @ zero_extendqisi2 + 5388 0012 DBB2 uxtb r3, r3 + 5389 0014 5FFA8CFC uxtb ip, ip + 5390 0018 11BB cbnz r1, .L1002 + 5391 001a 012B cmp r3, #1 + 5392 001c 03D0 beq .L1013 + 5393 .L1009: + 5394 001e 0123 movs r3, #1 + 5395 .L1003: + 5396 0020 1846 mov r0, r3 + 5397 0022 5DF804FB ldr pc, [sp], #4 + 5398 .L1013: + 5399 0026 BCF1010F cmp ip, #1 + 5400 002a F9D1 bne .L1003 + 5401 002c 0268 ldr r2, [r0] + 5402 002e 0223 movs r3, #2 + 5403 0030 80F83E30 strb r3, [r0, #62] + 5404 0034 80F84430 strb r3, [r0, #68] + 5405 0038 136A ldr r3, [r2, #32] + 5406 003a 23F00103 bic r3, r3, #1 + 5407 003e 1362 str r3, [r2, #32] + 5408 0040 136A ldr r3, [r2, #32] + 5409 0042 43F00103 orr r3, r3, #1 + 5410 0046 1362 str r3, [r2, #32] + 5411 0048 D368 ldr r3, [r2, #12] + 5412 004a 43F00203 orr r3, r3, #2 + 5413 004e D360 str r3, [r2, #12] + 5414 .L1004: + 5415 0050 1168 ldr r1, [r2] + 5416 0052 0023 movs r3, #0 + ARM GAS /tmp/cc6kdh5W.s page 94 + + + 5417 0054 41F00101 orr r1, r1, #1 + 5418 0058 1160 str r1, [r2] + 5419 005a 1846 mov r0, r3 + 5420 005c 5DF804FB ldr pc, [sp], #4 + 5421 .L1002: + 5422 0060 0429 cmp r1, #4 + 5423 0062 D2B2 uxtb r2, r2 + 5424 0064 5FFA8EFE uxtb lr, lr + 5425 0068 2CD0 beq .L1014 + 5426 006a 012B cmp r3, #1 + 5427 006c D7D1 bne .L1009 + 5428 006e 012A cmp r2, #1 + 5429 0070 D6D1 bne .L1003 + 5430 0072 BCF1010F cmp ip, #1 + 5431 0076 D3D1 bne .L1003 + 5432 0078 BEF1010F cmp lr, #1 + 5433 007c D0D1 bne .L1003 + 5434 007e 0268 ldr r2, [r0] + 5435 0080 0223 movs r3, #2 + 5436 0082 80F83E30 strb r3, [r0, #62] + 5437 0086 80F83F30 strb r3, [r0, #63] + 5438 008a 80F84430 strb r3, [r0, #68] + 5439 008e 80F84530 strb r3, [r0, #69] + 5440 0092 136A ldr r3, [r2, #32] + 5441 0094 23F00103 bic r3, r3, #1 + 5442 0098 1362 str r3, [r2, #32] + 5443 009a 136A ldr r3, [r2, #32] + 5444 009c 43F00103 orr r3, r3, #1 + 5445 00a0 1362 str r3, [r2, #32] + 5446 00a2 136A ldr r3, [r2, #32] + 5447 00a4 23F01003 bic r3, r3, #16 + 5448 00a8 1362 str r3, [r2, #32] + 5449 00aa 136A ldr r3, [r2, #32] + 5450 00ac 43F01003 orr r3, r3, #16 + 5451 00b0 1362 str r3, [r2, #32] + 5452 00b2 D368 ldr r3, [r2, #12] + 5453 00b4 43F00203 orr r3, r3, #2 + 5454 00b8 D360 str r3, [r2, #12] + 5455 00ba D368 ldr r3, [r2, #12] + 5456 00bc 43F00403 orr r3, r3, #4 + 5457 00c0 D360 str r3, [r2, #12] + 5458 00c2 C5E7 b .L1004 + 5459 .L1014: + 5460 00c4 012A cmp r2, #1 + 5461 00c6 AAD1 bne .L1009 + 5462 00c8 BEF1010F cmp lr, #1 + 5463 00cc A7D1 bne .L1009 + 5464 00ce 0268 ldr r2, [r0] + 5465 00d0 0223 movs r3, #2 + 5466 00d2 80F83F30 strb r3, [r0, #63] + 5467 00d6 80F84530 strb r3, [r0, #69] + 5468 00da 136A ldr r3, [r2, #32] + 5469 00dc 23F01003 bic r3, r3, #16 + 5470 00e0 1362 str r3, [r2, #32] + 5471 00e2 136A ldr r3, [r2, #32] + 5472 00e4 43F01003 orr r3, r3, #16 + 5473 00e8 1362 str r3, [r2, #32] + ARM GAS /tmp/cc6kdh5W.s page 95 + + + 5474 00ea D368 ldr r3, [r2, #12] + 5475 00ec 43F00403 orr r3, r3, #4 + 5476 00f0 D360 str r3, [r2, #12] + 5477 00f2 ADE7 b .L1004 + 5479 .section .text.HAL_TIM_Encoder_Stop_IT,"ax",%progbits + 5480 .align 1 + 5481 .p2align 2,,3 + 5482 .global HAL_TIM_Encoder_Stop_IT + 5483 .syntax unified + 5484 .thumb + 5485 .thumb_func + 5486 .fpu fpv4-sp-d16 + 5488 HAL_TIM_Encoder_Stop_IT: + 5489 @ args = 0, pretend = 0, frame = 0 + 5490 @ frame_needed = 0, uses_anonymous_args = 0 + 5491 @ link register save eliminated. + 5492 0000 F9B9 cbnz r1, .L1016 + 5493 0002 0368 ldr r3, [r0] + 5494 0004 1A6A ldr r2, [r3, #32] + 5495 0006 22F00102 bic r2, r2, #1 + 5496 000a 1A62 str r2, [r3, #32] + 5497 000c 1A6A ldr r2, [r3, #32] + 5498 000e 1A62 str r2, [r3, #32] + 5499 0010 DA68 ldr r2, [r3, #12] + 5500 0012 22F00202 bic r2, r2, #2 + 5501 0016 DA60 str r2, [r3, #12] + 5502 0018 1A6A ldr r2, [r3, #32] + 5503 001a 41F21111 movw r1, #4369 + 5504 001e 0A42 tst r2, r1 + 5505 0020 08D1 bne .L1024 + 5506 0022 196A ldr r1, [r3, #32] + 5507 0024 44F24442 movw r2, #17476 + 5508 0028 1142 tst r1, r2 + 5509 002a 03D1 bne .L1024 + 5510 002c 1A68 ldr r2, [r3] + 5511 002e 22F00102 bic r2, r2, #1 + 5512 0032 1A60 str r2, [r3] + 5513 .L1024: + 5514 0034 0123 movs r3, #1 + 5515 0036 80F83E30 strb r3, [r0, #62] + 5516 003a 80F84430 strb r3, [r0, #68] + 5517 003e 0020 movs r0, #0 + 5518 0040 7047 bx lr + 5519 .L1016: + 5520 0042 0429 cmp r1, #4 + 5521 0044 10B4 push {r4} + 5522 0046 0368 ldr r3, [r0] + 5523 0048 26D0 beq .L1036 + 5524 004a 1A6A ldr r2, [r3, #32] + 5525 004c 22F00102 bic r2, r2, #1 + 5526 0050 1A62 str r2, [r3, #32] + 5527 0052 1A6A ldr r2, [r3, #32] + 5528 0054 1A62 str r2, [r3, #32] + 5529 0056 1A6A ldr r2, [r3, #32] + 5530 0058 22F01002 bic r2, r2, #16 + 5531 005c 1A62 str r2, [r3, #32] + 5532 005e 1A6A ldr r2, [r3, #32] + ARM GAS /tmp/cc6kdh5W.s page 96 + + + 5533 0060 1A62 str r2, [r3, #32] + 5534 0062 DA68 ldr r2, [r3, #12] + 5535 0064 22F00202 bic r2, r2, #2 + 5536 0068 DA60 str r2, [r3, #12] + 5537 006a DA68 ldr r2, [r3, #12] + 5538 006c 22F00402 bic r2, r2, #4 + 5539 0070 DA60 str r2, [r3, #12] + 5540 0072 1A6A ldr r2, [r3, #32] + 5541 0074 41F2111C movw ip, #4369 + 5542 0078 12EA0C0F tst r2, ip + 5543 007c 1BD0 beq .L1020 + 5544 .L1022: + 5545 007e 0123 movs r3, #1 + 5546 0080 80F83E30 strb r3, [r0, #62] + 5547 0084 80F83F30 strb r3, [r0, #63] + 5548 0088 80F84430 strb r3, [r0, #68] + 5549 008c 80F84530 strb r3, [r0, #69] + 5550 0090 5DF8044B ldr r4, [sp], #4 + 5551 0094 0020 movs r0, #0 + 5552 0096 7047 bx lr + 5553 .L1036: + 5554 0098 1A6A ldr r2, [r3, #32] + 5555 009a 22F01002 bic r2, r2, #16 + 5556 009e 1A62 str r2, [r3, #32] + 5557 00a0 1A6A ldr r2, [r3, #32] + 5558 00a2 1A62 str r2, [r3, #32] + 5559 00a4 DA68 ldr r2, [r3, #12] + 5560 00a6 22F00402 bic r2, r2, #4 + 5561 00aa DA60 str r2, [r3, #12] + 5562 00ac 1A6A ldr r2, [r3, #32] + 5563 00ae 41F21114 movw r4, #4369 + 5564 00b2 2242 tst r2, r4 + 5565 00b4 0AD1 bne .L1021 + 5566 .L1020: + 5567 00b6 1C6A ldr r4, [r3, #32] + 5568 00b8 44F24442 movw r2, #17476 + 5569 00bc 1442 tst r4, r2 + 5570 00be 03D1 bne .L1025 + 5571 00c0 1A68 ldr r2, [r3] + 5572 00c2 22F00102 bic r2, r2, #1 + 5573 00c6 1A60 str r2, [r3] + 5574 .L1025: + 5575 00c8 0429 cmp r1, #4 + 5576 00ca D8D1 bne .L1022 + 5577 .L1021: + 5578 00cc 0123 movs r3, #1 + 5579 00ce 80F83F30 strb r3, [r0, #63] + 5580 00d2 80F84530 strb r3, [r0, #69] + 5581 00d6 5DF8044B ldr r4, [sp], #4 + 5582 00da 0020 movs r0, #0 + 5583 00dc 7047 bx lr + 5585 00de 00BF .section .text.HAL_TIM_Encoder_Start_DMA,"ax",%progbits + 5586 .align 1 + 5587 .p2align 2,,3 + 5588 .global HAL_TIM_Encoder_Start_DMA + 5589 .syntax unified + 5590 .thumb + ARM GAS /tmp/cc6kdh5W.s page 97 + + + 5591 .thumb_func + 5592 .fpu fpv4-sp-d16 + 5594 HAL_TIM_Encoder_Start_DMA: + 5595 @ args = 4, pretend = 0, frame = 0 + 5596 @ frame_needed = 0, uses_anonymous_args = 0 + 5597 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} + 5598 0004 0446 mov r4, r0 + 5599 0006 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 5600 000a 94F83FC0 ldrb ip, [r4, #63] @ zero_extendqisi2 + 5601 000e BDF82060 ldrh r6, [sp, #32] + 5602 0012 1D46 mov r5, r3 + 5603 0014 5FFA8CF3 uxtb r3, ip + 5604 0018 94F844C0 ldrb ip, [r4, #68] @ zero_extendqisi2 + 5605 001c 94F845E0 ldrb lr, [r4, #69] @ zero_extendqisi2 + 5606 0020 C0B2 uxtb r0, r0 + 5607 0022 5FFA8CFC uxtb ip, ip + 5608 0026 0029 cmp r1, #0 + 5609 0028 31D1 bne .L1038 + 5610 002a 0228 cmp r0, #2 + 5611 002c 2DD0 beq .L1039 + 5612 002e BCF1020F cmp ip, #2 + 5613 0032 67D0 beq .L1054 + 5614 0034 0128 cmp r0, #1 + 5615 0036 3CD1 bne .L1041 + 5616 0038 BCF1010F cmp ip, #1 + 5617 003c 39D1 bne .L1041 + 5618 003e 002A cmp r2, #0 + 5619 0040 00F0B580 beq .L1070 + 5620 .L1042: + 5621 0044 606A ldr r0, [r4, #36] + 5622 0046 0221 movs r1, #2 + 5623 0048 84F83E10 strb r1, [r4, #62] + 5624 004c 84F84410 strb r1, [r4, #68] + 5625 0050 5C49 ldr r1, .L1074 + 5626 0052 C162 str r1, [r0, #44] + 5627 0054 5C49 ldr r1, .L1074+4 + 5628 0056 0163 str r1, [r0, #48] + 5629 0058 5C49 ldr r1, .L1074+8 + 5630 005a 4163 str r1, [r0, #52] + 5631 005c 2168 ldr r1, [r4] + 5632 005e 3346 mov r3, r6 + 5633 0060 3431 adds r1, r1, #52 + 5634 0062 FFF7FEFF bl HAL_DMA_Start_IT + 5635 0066 20BB cbnz r0, .L1041 + 5636 0068 2368 ldr r3, [r4] + 5637 006a DA68 ldr r2, [r3, #12] + 5638 006c 42F40072 orr r2, r2, #512 + 5639 0070 DA60 str r2, [r3, #12] + 5640 0072 1A6A ldr r2, [r3, #32] + 5641 0074 22F00102 bic r2, r2, #1 + 5642 0078 1A62 str r2, [r3, #32] + 5643 007a 1A6A ldr r2, [r3, #32] + 5644 007c 42F00102 orr r2, r2, #1 + 5645 0080 1A62 str r2, [r3, #32] + 5646 0082 1A68 ldr r2, [r3] + 5647 0084 42F00102 orr r2, r2, #1 + 5648 0088 1A60 str r2, [r3] + ARM GAS /tmp/cc6kdh5W.s page 98 + + + 5649 .L1039: + 5650 008a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 5651 .L1038: + 5652 008e 0429 cmp r1, #4 + 5653 0090 5FFA8EFE uxtb lr, lr + 5654 0094 10D0 beq .L1071 + 5655 0096 0228 cmp r0, #2 + 5656 0098 F7D0 beq .L1039 + 5657 009a 022B cmp r3, #2 + 5658 009c 34D0 beq .L1053 + 5659 009e BCF1020F cmp ip, #2 + 5660 00a2 2FD0 beq .L1054 + 5661 00a4 BEF1020F cmp lr, #2 + 5662 00a8 7FD0 beq .L1055 + 5663 00aa 0128 cmp r0, #1 + 5664 00ac 01D1 bne .L1041 + 5665 00ae 012B cmp r3, #1 + 5666 00b0 2CD0 beq .L1072 + 5667 .L1041: + 5668 00b2 0120 movs r0, #1 + 5669 00b4 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} + 5670 .L1071: + 5671 00b8 022B cmp r3, #2 + 5672 00ba 25D0 beq .L1053 + 5673 00bc BEF1020F cmp lr, #2 + 5674 00c0 73D0 beq .L1055 + 5675 00c2 012B cmp r3, #1 + 5676 00c4 F5D1 bne .L1041 + 5677 00c6 BEF1010F cmp lr, #1 + 5678 00ca F2D1 bne .L1041 + 5679 00cc 002D cmp r5, #0 + 5680 00ce 72D0 beq .L1073 + 5681 .L1045: + 5682 00d0 A06A ldr r0, [r4, #40] + 5683 00d2 2168 ldr r1, [r4] + 5684 00d4 0222 movs r2, #2 + 5685 00d6 84F83F20 strb r2, [r4, #63] + 5686 00da 84F84520 strb r2, [r4, #69] + 5687 00de 394A ldr r2, .L1074 + 5688 00e0 C262 str r2, [r0, #44] + 5689 00e2 394A ldr r2, .L1074+4 + 5690 00e4 0263 str r2, [r0, #48] + 5691 00e6 394A ldr r2, .L1074+8 + 5692 00e8 4263 str r2, [r0, #52] + 5693 00ea 3346 mov r3, r6 + 5694 00ec 2A46 mov r2, r5 + 5695 00ee 3831 adds r1, r1, #56 + 5696 00f0 FFF7FEFF bl HAL_DMA_Start_IT + 5697 00f4 0028 cmp r0, #0 + 5698 00f6 DCD1 bne .L1041 + 5699 00f8 2368 ldr r3, [r4] + 5700 00fa DA68 ldr r2, [r3, #12] + 5701 00fc 42F48062 orr r2, r2, #1024 + 5702 0100 DA60 str r2, [r3, #12] + 5703 0102 45E0 b .L1069 + 5704 .L1054: + 5705 0104 6046 mov r0, ip + ARM GAS /tmp/cc6kdh5W.s page 99 + + + 5706 0106 C0E7 b .L1039 + 5707 .L1053: + 5708 0108 1846 mov r0, r3 + 5709 010a BEE7 b .L1039 + 5710 .L1072: + 5711 010c BCF1010F cmp ip, #1 + 5712 0110 CFD1 bne .L1041 + 5713 0112 BEF1010F cmp lr, #1 + 5714 0116 CCD1 bne .L1041 + 5715 0118 002A cmp r2, #0 + 5716 011a 4FD0 beq .L1047 + 5717 011c 002D cmp r5, #0 + 5718 011e 4DD0 beq .L1047 + 5719 .L1048: + 5720 0120 2168 ldr r1, [r4] + 5721 0122 606A ldr r0, [r4, #36] + 5722 0124 DFF89C90 ldr r9, .L1074 + 5723 0128 DFF89C80 ldr r8, .L1074+4 + 5724 012c 274F ldr r7, .L1074+8 + 5725 012e 0223 movs r3, #2 + 5726 0130 84F83E30 strb r3, [r4, #62] + 5727 0134 3431 adds r1, r1, #52 + 5728 0136 84F83F30 strb r3, [r4, #63] + 5729 013a 84F84430 strb r3, [r4, #68] + 5730 013e 84F84530 strb r3, [r4, #69] + 5731 0142 C0F82C90 str r9, [r0, #44] + 5732 0146 C0F83080 str r8, [r0, #48] + 5733 014a 4763 str r7, [r0, #52] + 5734 014c 3346 mov r3, r6 + 5735 014e FFF7FEFF bl HAL_DMA_Start_IT + 5736 0152 0028 cmp r0, #0 + 5737 0154 ADD1 bne .L1041 + 5738 0156 A06A ldr r0, [r4, #40] + 5739 0158 2168 ldr r1, [r4] + 5740 015a 4763 str r7, [r0, #52] + 5741 015c C0E90B98 strd r9, r8, [r0, #44] + 5742 0160 3346 mov r3, r6 + 5743 0162 2A46 mov r2, r5 + 5744 0164 3831 adds r1, r1, #56 + 5745 0166 FFF7FEFF bl HAL_DMA_Start_IT + 5746 016a 0028 cmp r0, #0 + 5747 016c A1D1 bne .L1041 + 5748 016e 2368 ldr r3, [r4] + 5749 0170 DA68 ldr r2, [r3, #12] + 5750 0172 42F40072 orr r2, r2, #512 + 5751 0176 DA60 str r2, [r3, #12] + 5752 0178 DA68 ldr r2, [r3, #12] + 5753 017a 42F48062 orr r2, r2, #1024 + 5754 017e DA60 str r2, [r3, #12] + 5755 0180 1A6A ldr r2, [r3, #32] + 5756 0182 22F00102 bic r2, r2, #1 + 5757 0186 1A62 str r2, [r3, #32] + 5758 0188 1A6A ldr r2, [r3, #32] + 5759 018a 42F00102 orr r2, r2, #1 + 5760 018e 1A62 str r2, [r3, #32] + 5761 .L1069: + 5762 0190 1A6A ldr r2, [r3, #32] + ARM GAS /tmp/cc6kdh5W.s page 100 + + + 5763 0192 22F01002 bic r2, r2, #16 + 5764 0196 1A62 str r2, [r3, #32] + 5765 0198 1A6A ldr r2, [r3, #32] + 5766 019a 42F01002 orr r2, r2, #16 + 5767 019e 1A62 str r2, [r3, #32] + 5768 01a0 1A68 ldr r2, [r3] + 5769 01a2 42F00102 orr r2, r2, #1 + 5770 01a6 1A60 str r2, [r3] + 5771 01a8 6FE7 b .L1039 + 5772 .L1055: + 5773 01aa 7046 mov r0, lr + 5774 01ac 6DE7 b .L1039 + 5775 .L1070: + 5776 01ae 002E cmp r6, #0 + 5777 01b0 3FF448AF beq .L1042 + 5778 01b4 7DE7 b .L1041 + 5779 .L1073: + 5780 01b6 002E cmp r6, #0 + 5781 01b8 8AD0 beq .L1045 + 5782 01ba 7AE7 b .L1041 + 5783 .L1047: + 5784 01bc 002E cmp r6, #0 + 5785 01be AFD0 beq .L1048 + 5786 01c0 77E7 b .L1041 + 5787 .L1075: + 5788 01c2 00BF .align 2 + 5789 .L1074: + 5790 01c4 00000000 .word TIM_DMACaptureCplt + 5791 01c8 00000000 .word TIM_DMACaptureHalfCplt + 5792 01cc 00000000 .word TIM_DMAError + 5794 .section .text.HAL_TIM_Encoder_Stop_DMA,"ax",%progbits + 5795 .align 1 + 5796 .p2align 2,,3 + 5797 .global HAL_TIM_Encoder_Stop_DMA + 5798 .syntax unified + 5799 .thumb + 5800 .thumb_func + 5801 .fpu fpv4-sp-d16 + 5803 HAL_TIM_Encoder_Stop_DMA: + 5804 @ args = 0, pretend = 0, frame = 0 + 5805 @ frame_needed = 0, uses_anonymous_args = 0 + 5806 0000 38B5 push {r3, r4, r5, lr} + 5807 0002 0446 mov r4, r0 + 5808 0004 0029 cmp r1, #0 + 5809 0006 53D0 beq .L1095 + 5810 0008 0429 cmp r1, #4 + 5811 000a 0368 ldr r3, [r0] + 5812 000c 0D46 mov r5, r1 + 5813 000e 35D0 beq .L1096 + 5814 0010 1A6A ldr r2, [r3, #32] + 5815 0012 406A ldr r0, [r0, #36] + 5816 0014 22F00102 bic r2, r2, #1 + 5817 0018 1A62 str r2, [r3, #32] + 5818 001a 1A6A ldr r2, [r3, #32] + 5819 001c 1A62 str r2, [r3, #32] + 5820 001e 1A6A ldr r2, [r3, #32] + 5821 0020 22F01002 bic r2, r2, #16 + ARM GAS /tmp/cc6kdh5W.s page 101 + + + 5822 0024 1A62 str r2, [r3, #32] + 5823 0026 1A6A ldr r2, [r3, #32] + 5824 0028 1A62 str r2, [r3, #32] + 5825 002a DA68 ldr r2, [r3, #12] + 5826 002c 22F40072 bic r2, r2, #512 + 5827 0030 DA60 str r2, [r3, #12] + 5828 0032 DA68 ldr r2, [r3, #12] + 5829 0034 22F48062 bic r2, r2, #1024 + 5830 0038 DA60 str r2, [r3, #12] + 5831 003a FFF7FEFF bl HAL_DMA_Abort_IT + 5832 003e A06A ldr r0, [r4, #40] + 5833 0040 FFF7FEFF bl HAL_DMA_Abort_IT + 5834 0044 2368 ldr r3, [r4] + 5835 0046 196A ldr r1, [r3, #32] + 5836 0048 41F21112 movw r2, #4369 + 5837 004c 1142 tst r1, r2 + 5838 004e 0AD1 bne .L1083 + 5839 .L1081: + 5840 0050 196A ldr r1, [r3, #32] + 5841 0052 44F24442 movw r2, #17476 + 5842 0056 1142 tst r1, r2 + 5843 0058 03D1 bne .L1086 + 5844 005a 1A68 ldr r2, [r3] + 5845 005c 22F00102 bic r2, r2, #1 + 5846 0060 1A60 str r2, [r3] + 5847 .L1086: + 5848 0062 042D cmp r5, #4 + 5849 0064 1DD0 beq .L1082 + 5850 .L1083: + 5851 0066 0123 movs r3, #1 + 5852 0068 84F83E30 strb r3, [r4, #62] + 5853 006c 84F83F30 strb r3, [r4, #63] + 5854 0070 84F84430 strb r3, [r4, #68] + 5855 0074 84F84530 strb r3, [r4, #69] + 5856 0078 0020 movs r0, #0 + 5857 007a 38BD pop {r3, r4, r5, pc} + 5858 .L1096: + 5859 007c 1A6A ldr r2, [r3, #32] + 5860 007e 806A ldr r0, [r0, #40] + 5861 0080 22F01002 bic r2, r2, #16 + 5862 0084 1A62 str r2, [r3, #32] + 5863 0086 1A6A ldr r2, [r3, #32] + 5864 0088 1A62 str r2, [r3, #32] + 5865 008a DA68 ldr r2, [r3, #12] + 5866 008c 22F48062 bic r2, r2, #1024 + 5867 0090 DA60 str r2, [r3, #12] + 5868 0092 FFF7FEFF bl HAL_DMA_Abort_IT + 5869 0096 2368 ldr r3, [r4] + 5870 0098 196A ldr r1, [r3, #32] + 5871 009a 41F21112 movw r2, #4369 + 5872 009e 1142 tst r1, r2 + 5873 00a0 D6D0 beq .L1081 + 5874 .L1082: + 5875 00a2 0123 movs r3, #1 + 5876 00a4 84F83F30 strb r3, [r4, #63] + 5877 00a8 84F84530 strb r3, [r4, #69] + 5878 00ac 0020 movs r0, #0 + ARM GAS /tmp/cc6kdh5W.s page 102 + + + 5879 00ae 38BD pop {r3, r4, r5, pc} + 5880 .L1095: + 5881 00b0 0368 ldr r3, [r0] + 5882 00b2 406A ldr r0, [r0, #36] + 5883 00b4 1A6A ldr r2, [r3, #32] + 5884 00b6 22F00102 bic r2, r2, #1 + 5885 00ba 1A62 str r2, [r3, #32] + 5886 00bc 1A6A ldr r2, [r3, #32] + 5887 00be 1A62 str r2, [r3, #32] + 5888 00c0 DA68 ldr r2, [r3, #12] + 5889 00c2 22F40072 bic r2, r2, #512 + 5890 00c6 DA60 str r2, [r3, #12] + 5891 00c8 FFF7FEFF bl HAL_DMA_Abort_IT + 5892 00cc 2368 ldr r3, [r4] + 5893 00ce 196A ldr r1, [r3, #32] + 5894 00d0 41F21112 movw r2, #4369 + 5895 00d4 1142 tst r1, r2 + 5896 00d6 08D1 bne .L1085 + 5897 00d8 196A ldr r1, [r3, #32] + 5898 00da 44F24442 movw r2, #17476 + 5899 00de 1142 tst r1, r2 + 5900 00e0 03D1 bne .L1085 + 5901 00e2 1A68 ldr r2, [r3] + 5902 00e4 22F00102 bic r2, r2, #1 + 5903 00e8 1A60 str r2, [r3] + 5904 .L1085: + 5905 00ea 0123 movs r3, #1 + 5906 00ec 84F83E30 strb r3, [r4, #62] + 5907 00f0 84F84430 strb r3, [r4, #68] + 5908 00f4 0020 movs r0, #0 + 5909 00f6 38BD pop {r3, r4, r5, pc} + 5911 .section .text.HAL_TIM_IC_ConfigChannel,"ax",%progbits + 5912 .align 1 + 5913 .p2align 2,,3 + 5914 .global HAL_TIM_IC_ConfigChannel + 5915 .syntax unified + 5916 .thumb + 5917 .thumb_func + 5918 .fpu fpv4-sp-d16 + 5920 HAL_TIM_IC_ConfigChannel: + 5921 @ args = 0, pretend = 0, frame = 0 + 5922 @ frame_needed = 0, uses_anonymous_args = 0 + 5923 @ link register save eliminated. + 5924 0000 0346 mov r3, r0 + 5925 0002 90F83C00 ldrb r0, [r0, #60] @ zero_extendqisi2 + 5926 0006 0128 cmp r0, #1 + 5927 0008 00F0CC80 beq .L1105 + 5928 000c 0120 movs r0, #1 + 5929 000e F0B4 push {r4, r5, r6, r7} + 5930 0010 83F83C00 strb r0, [r3, #60] + 5931 0014 5AB1 cbz r2, .L1114 + 5932 0016 042A cmp r2, #4 + 5933 0018 4CD0 beq .L1115 + 5934 001a 082A cmp r2, #8 + 5935 001c 00F09A80 beq .L1116 + 5936 0020 0C2A cmp r2, #12 + 5937 0022 71D0 beq .L1117 + ARM GAS /tmp/cc6kdh5W.s page 103 + + + 5938 .L1102: + 5939 0024 0022 movs r2, #0 + 5940 0026 83F83C20 strb r2, [r3, #60] + 5941 002a F0BC pop {r4, r5, r6, r7} + 5942 002c 7047 bx lr + 5943 .L1114: + 5944 002e 1A68 ldr r2, [r3] + 5945 0030 DFF874C1 ldr ip, .L1118 + 5946 0034 166A ldr r6, [r2, #32] + 5947 0036 C868 ldr r0, [r1, #12] + 5948 0038 26F00106 bic r6, r6, #1 + 5949 003c D1E90045 ldrd r4, r5, [r1] + 5950 0040 6245 cmp r2, ip + 5951 0042 1662 str r6, [r2, #32] + 5952 0044 9769 ldr r7, [r2, #24] + 5953 0046 166A ldr r6, [r2, #32] + 5954 0048 15D0 beq .L1100 + 5955 004a B2F1804F cmp r2, #1073741824 + 5956 004e 12D0 beq .L1100 + 5957 0050 ACF5943C sub ip, ip, #75776 + 5958 0054 6245 cmp r2, ip + 5959 0056 0ED0 beq .L1100 + 5960 0058 0CF5806C add ip, ip, #1024 + 5961 005c 6245 cmp r2, ip + 5962 005e 0AD0 beq .L1100 + 5963 0060 0CF5963C add ip, ip, #76800 + 5964 0064 6245 cmp r2, ip + 5965 0066 06D0 beq .L1100 + 5966 0068 0CF5406C add ip, ip, #3072 + 5967 006c 6245 cmp r2, ip + 5968 006e 02D0 beq .L1100 + 5969 0070 47F0010C orr ip, r7, #1 + 5970 0074 03E0 b .L1101 + 5971 .L1100: + 5972 0076 27F0030C bic ip, r7, #3 + 5973 007a 45EA0C0C orr ip, r5, ip + 5974 .L1101: + 5975 007e 0001 lsls r0, r0, #4 + 5976 0080 2CF0F00C bic ip, ip, #240 + 5977 0084 C0B2 uxtb r0, r0 + 5978 0086 40EA0C00 orr r0, r0, ip + 5979 008a 9061 str r0, [r2, #24] + 5980 008c 26F00A05 bic r5, r6, #10 + 5981 0090 04F00A00 and r0, r4, #10 + 5982 0094 2843 orrs r0, r0, r5 + 5983 0096 1062 str r0, [r2, #32] + 5984 0098 9069 ldr r0, [r2, #24] + 5985 009a 8C68 ldr r4, [r1, #8] + 5986 009c 20F00C00 bic r0, r0, #12 + 5987 00a0 9061 str r0, [r2, #24] + 5988 00a2 9169 ldr r1, [r2, #24] + 5989 00a4 2143 orrs r1, r1, r4 + 5990 00a6 9161 str r1, [r2, #24] + 5991 00a8 0022 movs r2, #0 + 5992 00aa 83F83C20 strb r2, [r3, #60] + 5993 00ae 0020 movs r0, #0 + 5994 00b0 F0BC pop {r4, r5, r6, r7} + ARM GAS /tmp/cc6kdh5W.s page 104 + + + 5995 00b2 7047 bx lr + 5996 .L1115: + 5997 00b4 1A68 ldr r2, [r3] + 5998 00b6 D1E90006 ldrd r0, r6, [r1] + 5999 00ba 156A ldr r5, [r2, #32] + 6000 00bc 0001 lsls r0, r0, #4 + 6001 00be 25F01005 bic r5, r5, #16 + 6002 00c2 00F0A004 and r4, r0, #160 + 6003 00c6 C868 ldr r0, [r1, #12] + 6004 00c8 1562 str r5, [r2, #32] + 6005 00ca 8D68 ldr r5, [r1, #8] + 6006 00cc 9169 ldr r1, [r2, #24] + 6007 00ce 21F44071 bic r1, r1, #768 + 6008 00d2 41EA0621 orr r1, r1, r6, lsl #8 + 6009 00d6 0003 lsls r0, r0, #12 + 6010 00d8 80B2 uxth r0, r0 + 6011 00da 21F47041 bic r1, r1, #61440 + 6012 00de 0143 orrs r1, r1, r0 + 6013 00e0 106A ldr r0, [r2, #32] + 6014 00e2 9161 str r1, [r2, #24] + 6015 00e4 20F0A000 bic r0, r0, #160 + 6016 00e8 2043 orrs r0, r0, r4 + 6017 00ea 1062 str r0, [r2, #32] + 6018 00ec 9469 ldr r4, [r2, #24] + 6019 00ee 24F44064 bic r4, r4, #3072 + 6020 00f2 9461 str r4, [r2, #24] + 6021 00f4 9169 ldr r1, [r2, #24] + 6022 00f6 41EA0521 orr r1, r1, r5, lsl #8 + 6023 00fa 9161 str r1, [r2, #24] + 6024 00fc 0022 movs r2, #0 + 6025 00fe 83F83C20 strb r2, [r3, #60] + 6026 0102 0020 movs r0, #0 + 6027 0104 F0BC pop {r4, r5, r6, r7} + 6028 0106 7047 bx lr + 6029 .L1117: + 6030 0108 1A68 ldr r2, [r3] + 6031 010a D1E90006 ldrd r0, r6, [r1] + 6032 010e 156A ldr r5, [r2, #32] + 6033 0110 0003 lsls r0, r0, #12 + 6034 0112 25F48055 bic r5, r5, #4096 + 6035 0116 00F42044 and r4, r0, #40960 + 6036 011a C868 ldr r0, [r1, #12] + 6037 011c 1562 str r5, [r2, #32] + 6038 011e 8D68 ldr r5, [r1, #8] + 6039 0120 D169 ldr r1, [r2, #28] + 6040 0122 21F44071 bic r1, r1, #768 + 6041 0126 0003 lsls r0, r0, #12 + 6042 0128 41EA0621 orr r1, r1, r6, lsl #8 + 6043 012c 80B2 uxth r0, r0 + 6044 012e 21F47041 bic r1, r1, #61440 + 6045 0132 0143 orrs r1, r1, r0 + 6046 0134 106A ldr r0, [r2, #32] + 6047 0136 D161 str r1, [r2, #28] + 6048 0138 20F42040 bic r0, r0, #40960 + 6049 013c 2043 orrs r0, r0, r4 + 6050 013e 1062 str r0, [r2, #32] + 6051 0140 D469 ldr r4, [r2, #28] + ARM GAS /tmp/cc6kdh5W.s page 105 + + + 6052 0142 24F44064 bic r4, r4, #3072 + 6053 0146 D461 str r4, [r2, #28] + 6054 0148 D169 ldr r1, [r2, #28] + 6055 014a 41EA0521 orr r1, r1, r5, lsl #8 + 6056 014e 0020 movs r0, #0 + 6057 0150 D161 str r1, [r2, #28] + 6058 0152 67E7 b .L1102 + 6059 .L1116: + 6060 0154 1A68 ldr r2, [r3] + 6061 0156 D1E90004 ldrd r0, r4, [r1] + 6062 015a 166A ldr r6, [r2, #32] + 6063 015c 0002 lsls r0, r0, #8 + 6064 015e 26F48076 bic r6, r6, #256 + 6065 0162 00F42065 and r5, r0, #2560 + 6066 0166 C868 ldr r0, [r1, #12] + 6067 0168 1662 str r6, [r2, #32] + 6068 016a 8E68 ldr r6, [r1, #8] + 6069 016c D169 ldr r1, [r2, #28] + 6070 016e 21F00301 bic r1, r1, #3 + 6071 0172 2143 orrs r1, r1, r4 + 6072 0174 0001 lsls r0, r0, #4 + 6073 0176 C0B2 uxtb r0, r0 + 6074 0178 21F0F001 bic r1, r1, #240 + 6075 017c 0143 orrs r1, r1, r0 + 6076 017e 106A ldr r0, [r2, #32] + 6077 0180 D161 str r1, [r2, #28] + 6078 0182 20F42060 bic r0, r0, #2560 + 6079 0186 2843 orrs r0, r0, r5 + 6080 0188 1062 str r0, [r2, #32] + 6081 018a D469 ldr r4, [r2, #28] + 6082 018c 24F00C04 bic r4, r4, #12 + 6083 0190 D461 str r4, [r2, #28] + 6084 0192 D169 ldr r1, [r2, #28] + 6085 0194 3143 orrs r1, r1, r6 + 6086 0196 D161 str r1, [r2, #28] + 6087 0198 0022 movs r2, #0 + 6088 019a 83F83C20 strb r2, [r3, #60] + 6089 019e 0020 movs r0, #0 + 6090 01a0 F0BC pop {r4, r5, r6, r7} + 6091 01a2 7047 bx lr + 6092 .L1105: + 6093 01a4 0220 movs r0, #2 + 6094 01a6 7047 bx lr + 6095 .L1119: + 6096 .align 2 + 6097 .L1118: + 6098 01a8 002C0140 .word 1073818624 + 6100 .section .text.HAL_TIM_DMABurst_WriteStart,"ax",%progbits + 6101 .align 1 + 6102 .p2align 2,,3 + 6103 .global HAL_TIM_DMABurst_WriteStart + 6104 .syntax unified + 6105 .thumb + 6106 .thumb_func + 6107 .fpu fpv4-sp-d16 + 6109 HAL_TIM_DMABurst_WriteStart: + 6110 @ args = 4, pretend = 0, frame = 0 + ARM GAS /tmp/cc6kdh5W.s page 106 + + + 6111 @ frame_needed = 0, uses_anonymous_args = 0 + 6112 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 6113 0002 1446 mov r4, r2 + 6114 0004 90F84820 ldrb r2, [r0, #72] @ zero_extendqisi2 + 6115 0008 069F ldr r7, [sp, #24] + 6116 000a 022A cmp r2, #2 + 6117 000c 0546 mov r5, r0 + 6118 000e D0B2 uxtb r0, r2 + 6119 0010 2ED0 beq .L1121 + 6120 0012 95F84820 ldrb r2, [r5, #72] @ zero_extendqisi2 + 6121 0016 0E46 mov r6, r1 + 6122 0018 012A cmp r2, #1 + 6123 001a 1946 mov r1, r3 + 6124 001c 4FEA1723 lsr r3, r7, #8 + 6125 0020 03F10103 add r3, r3, #1 + 6126 0024 4CD0 beq .L1151 + 6127 0026 B4F5006F cmp r4, #2048 + 6128 002a 51D0 beq .L1124 + 6129 .L1155: + 6130 002c 21D8 bhi .L1125 + 6131 002e B4F5007F cmp r4, #512 + 6132 0032 5AD0 beq .L1126 + 6133 0034 B4F5806F cmp r4, #1024 + 6134 0038 34D1 bne .L1152 + 6135 003a A86A ldr r0, [r5, #40] + 6136 .L1149: + 6137 003c 2A68 ldr r2, [r5] + 6138 003e DFF8B0C0 ldr ip, .L1156 + 6139 0042 C0F82CC0 str ip, [r0, #44] + 6140 0046 DFF8ACC0 ldr ip, .L1156+4 + 6141 004a 02F57872 add r2, r2, #992 + 6142 .L1146: + 6143 004e C0F830C0 str ip, [r0, #48] + 6144 0052 DFF8A4C0 ldr ip, .L1156+8 + 6145 0056 C0F834C0 str ip, [r0, #52] + 6146 005a FFF7FEFF bl HAL_DMA_Start_IT + 6147 005e D0B9 cbnz r0, .L1150 + 6148 0060 2B68 ldr r3, [r5] + 6149 0062 3E43 orrs r6, r6, r7 + 6150 0064 C3F8DC63 str r6, [r3, #988] + 6151 0068 DA68 ldr r2, [r3, #12] + 6152 006a 1443 orrs r4, r4, r2 + 6153 006c 0020 movs r0, #0 + 6154 006e DC60 str r4, [r3, #12] + 6155 .L1121: + 6156 0070 F8BD pop {r3, r4, r5, r6, r7, pc} + 6157 .L1125: + 6158 0072 B4F5005F cmp r4, #8192 + 6159 0076 2DD0 beq .L1129 + 6160 0078 B4F5804F cmp r4, #16384 + 6161 007c 0DD1 bne .L1153 + 6162 007e 2A68 ldr r2, [r5] + 6163 0080 A86B ldr r0, [r5, #56] + 6164 0082 DFF878C0 ldr ip, .L1156+12 + 6165 0086 C0F82CC0 str ip, [r0, #44] + 6166 008a 02F57872 add r2, r2, #992 + 6167 008e DFF870C0 ldr ip, .L1156+16 + ARM GAS /tmp/cc6kdh5W.s page 107 + + + 6168 0092 DCE7 b .L1146 + 6169 .L1154: + 6170 0094 B7B1 cbz r7, .L1123 + 6171 .L1150: + 6172 0096 0120 movs r0, #1 + 6173 0098 F8BD pop {r3, r4, r5, r6, r7, pc} + 6174 .L1153: + 6175 009a B4F5805F cmp r4, #4096 + 6176 009e FAD1 bne .L1150 + 6177 00a0 286B ldr r0, [r5, #48] + 6178 00a2 CBE7 b .L1149 + 6179 .L1152: + 6180 00a4 B4F5807F cmp r4, #256 + 6181 00a8 F5D1 bne .L1150 + 6182 00aa 2A68 ldr r2, [r5] + 6183 00ac 286A ldr r0, [r5, #32] + 6184 00ae DFF854C0 ldr ip, .L1156+20 + 6185 00b2 C0F82CC0 str ip, [r0, #44] + 6186 00b6 02F57872 add r2, r2, #992 + 6187 00ba DFF84CC0 ldr ip, .L1156+24 + 6188 00be C6E7 b .L1146 + 6189 .L1151: + 6190 00c0 0029 cmp r1, #0 + 6191 00c2 E7D0 beq .L1154 + 6192 .L1123: + 6193 00c4 0222 movs r2, #2 + 6194 00c6 B4F5006F cmp r4, #2048 + 6195 00ca 85F84820 strb r2, [r5, #72] + 6196 00ce ADD1 bne .L1155 + 6197 .L1124: + 6198 00d0 E86A ldr r0, [r5, #44] + 6199 00d2 B3E7 b .L1149 + 6200 .L1129: + 6201 00d4 2A68 ldr r2, [r5] + 6202 00d6 686B ldr r0, [r5, #52] + 6203 00d8 DFF830C0 ldr ip, .L1156+28 + 6204 00dc C0F82CC0 str ip, [r0, #44] + 6205 00e0 02F57872 add r2, r2, #992 + 6206 00e4 DFF828C0 ldr ip, .L1156+32 + 6207 00e8 B1E7 b .L1146 + 6208 .L1126: + 6209 00ea 686A ldr r0, [r5, #36] + 6210 00ec A6E7 b .L1149 + 6211 .L1157: + 6212 00ee 00BF .align 2 + 6213 .L1156: + 6214 00f0 00000000 .word TIM_DMADelayPulseCplt + 6215 00f4 00000000 .word TIM_DMADelayPulseHalfCplt + 6216 00f8 00000000 .word TIM_DMAError + 6217 00fc 00000000 .word TIM_DMATriggerCplt + 6218 0100 00000000 .word TIM_DMATriggerHalfCplt + 6219 0104 00000000 .word TIM_DMAPeriodElapsedCplt + 6220 0108 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 6221 010c 00000000 .word TIMEx_DMACommutationCplt + 6222 0110 00000000 .word TIMEx_DMACommutationHalfCplt + 6224 .section .text.HAL_TIM_DMABurst_MultiWriteStart,"ax",%progbits + 6225 .align 1 + ARM GAS /tmp/cc6kdh5W.s page 108 + + + 6226 .p2align 2,,3 + 6227 .global HAL_TIM_DMABurst_MultiWriteStart + 6228 .syntax unified + 6229 .thumb + 6230 .thumb_func + 6231 .fpu fpv4-sp-d16 + 6233 HAL_TIM_DMABurst_MultiWriteStart: + 6234 @ args = 8, pretend = 0, frame = 0 + 6235 @ frame_needed = 0, uses_anonymous_args = 0 + 6236 0000 70B5 push {r4, r5, r6, lr} + 6237 0002 90F848C0 ldrb ip, [r0, #72] @ zero_extendqisi2 + 6238 0006 BCF1020F cmp ip, #2 + 6239 000a 0546 mov r5, r0 + 6240 000c 5FFA8CF0 uxtb r0, ip + 6241 0010 27D0 beq .L1159 + 6242 0012 1446 mov r4, r2 + 6243 0014 95F84820 ldrb r2, [r5, #72] @ zero_extendqisi2 + 6244 0018 012A cmp r2, #1 + 6245 001a 0E46 mov r6, r1 + 6246 001c 1946 mov r1, r3 + 6247 001e 43D0 beq .L1189 + 6248 0020 B4F5006F cmp r4, #2048 + 6249 0024 48D0 beq .L1162 + 6250 .L1193: + 6251 0026 1DD8 bhi .L1163 + 6252 0028 B4F5007F cmp r4, #512 + 6253 002c 4ED0 beq .L1164 + 6254 002e B4F5806F cmp r4, #1024 + 6255 0032 2ED1 bne .L1190 + 6256 0034 A86A ldr r0, [r5, #40] + 6257 .L1187: + 6258 0036 2A68 ldr r2, [r5] + 6259 0038 254B ldr r3, .L1194 + 6260 003a C362 str r3, [r0, #44] + 6261 003c 254B ldr r3, .L1194+4 + 6262 003e 02F57872 add r2, r2, #992 + 6263 .L1184: + 6264 0042 0363 str r3, [r0, #48] + 6265 0044 244B ldr r3, .L1194+8 + 6266 0046 4363 str r3, [r0, #52] + 6267 0048 059B ldr r3, [sp, #20] + 6268 004a FFF7FEFF bl HAL_DMA_Start_IT + 6269 004e C8B9 cbnz r0, .L1188 + 6270 0050 049A ldr r2, [sp, #16] + 6271 0052 2B68 ldr r3, [r5] + 6272 0054 1643 orrs r6, r6, r2 + 6273 0056 C3F8DC63 str r6, [r3, #988] + 6274 005a DA68 ldr r2, [r3, #12] + 6275 005c 1443 orrs r4, r4, r2 + 6276 005e 0020 movs r0, #0 + 6277 0060 DC60 str r4, [r3, #12] + 6278 .L1159: + 6279 0062 70BD pop {r4, r5, r6, pc} + 6280 .L1163: + 6281 0064 B4F5005F cmp r4, #8192 + 6282 0068 28D0 beq .L1167 + 6283 006a B4F5804F cmp r4, #16384 + ARM GAS /tmp/cc6kdh5W.s page 109 + + + 6284 006e 0BD1 bne .L1191 + 6285 0070 2A68 ldr r2, [r5] + 6286 0072 A86B ldr r0, [r5, #56] + 6287 0074 194B ldr r3, .L1194+12 + 6288 0076 C362 str r3, [r0, #44] + 6289 0078 02F57872 add r2, r2, #992 + 6290 007c 184B ldr r3, .L1194+16 + 6291 007e E0E7 b .L1184 + 6292 .L1192: + 6293 0080 049B ldr r3, [sp, #16] + 6294 0082 9BB1 cbz r3, .L1161 + 6295 .L1188: + 6296 0084 0120 movs r0, #1 + 6297 0086 70BD pop {r4, r5, r6, pc} + 6298 .L1191: + 6299 0088 B4F5805F cmp r4, #4096 + 6300 008c FAD1 bne .L1188 + 6301 008e 286B ldr r0, [r5, #48] + 6302 0090 D1E7 b .L1187 + 6303 .L1190: + 6304 0092 B4F5807F cmp r4, #256 + 6305 0096 F5D1 bne .L1188 + 6306 0098 2A68 ldr r2, [r5] + 6307 009a 286A ldr r0, [r5, #32] + 6308 009c 114B ldr r3, .L1194+20 + 6309 009e C362 str r3, [r0, #44] + 6310 00a0 02F57872 add r2, r2, #992 + 6311 00a4 104B ldr r3, .L1194+24 + 6312 00a6 CCE7 b .L1184 + 6313 .L1189: + 6314 00a8 002B cmp r3, #0 + 6315 00aa E9D0 beq .L1192 + 6316 .L1161: + 6317 00ac 0222 movs r2, #2 + 6318 00ae B4F5006F cmp r4, #2048 + 6319 00b2 85F84820 strb r2, [r5, #72] + 6320 00b6 B6D1 bne .L1193 + 6321 .L1162: + 6322 00b8 E86A ldr r0, [r5, #44] + 6323 00ba BCE7 b .L1187 + 6324 .L1167: + 6325 00bc 2A68 ldr r2, [r5] + 6326 00be 686B ldr r0, [r5, #52] + 6327 00c0 0A4B ldr r3, .L1194+28 + 6328 00c2 C362 str r3, [r0, #44] + 6329 00c4 02F57872 add r2, r2, #992 + 6330 00c8 094B ldr r3, .L1194+32 + 6331 00ca BAE7 b .L1184 + 6332 .L1164: + 6333 00cc 686A ldr r0, [r5, #36] + 6334 00ce B2E7 b .L1187 + 6335 .L1195: + 6336 .align 2 + 6337 .L1194: + 6338 00d0 00000000 .word TIM_DMADelayPulseCplt + 6339 00d4 00000000 .word TIM_DMADelayPulseHalfCplt + 6340 00d8 00000000 .word TIM_DMAError + ARM GAS /tmp/cc6kdh5W.s page 110 + + + 6341 00dc 00000000 .word TIM_DMATriggerCplt + 6342 00e0 00000000 .word TIM_DMATriggerHalfCplt + 6343 00e4 00000000 .word TIM_DMAPeriodElapsedCplt + 6344 00e8 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 6345 00ec 00000000 .word TIMEx_DMACommutationCplt + 6346 00f0 00000000 .word TIMEx_DMACommutationHalfCplt + 6348 .section .text.HAL_TIM_DMABurst_WriteStop,"ax",%progbits + 6349 .align 1 + 6350 .p2align 2,,3 + 6351 .global HAL_TIM_DMABurst_WriteStop + 6352 .syntax unified + 6353 .thumb + 6354 .thumb_func + 6355 .fpu fpv4-sp-d16 + 6357 HAL_TIM_DMABurst_WriteStop: + 6358 @ args = 0, pretend = 0, frame = 0 + 6359 @ frame_needed = 0, uses_anonymous_args = 0 + 6360 0000 B1F5006F cmp r1, #2048 + 6361 0004 38B5 push {r3, r4, r5, lr} + 6362 0006 0C46 mov r4, r1 + 6363 0008 0546 mov r5, r0 + 6364 000a 35D0 beq .L1197 + 6365 000c 19D8 bhi .L1198 + 6366 000e B1F5007F cmp r1, #512 + 6367 0012 29D0 beq .L1199 + 6368 0014 B1F5806F cmp r1, #1024 + 6369 0018 0CD1 bne .L1209 + 6370 001a 806A ldr r0, [r0, #40] + 6371 001c FFF7FEFF bl HAL_DMA_Abort_IT + 6372 .L1206: + 6373 0020 2B68 ldr r3, [r5] + 6374 0022 D968 ldr r1, [r3, #12] + 6375 0024 0122 movs r2, #1 + 6376 0026 21EA0404 bic r4, r1, r4 + 6377 002a DC60 str r4, [r3, #12] + 6378 002c 85F84820 strb r2, [r5, #72] + 6379 0030 0020 movs r0, #0 + 6380 0032 38BD pop {r3, r4, r5, pc} + 6381 .L1209: + 6382 0034 B1F5807F cmp r1, #256 + 6383 0038 14D1 bne .L1208 + 6384 003a 006A ldr r0, [r0, #32] + 6385 003c FFF7FEFF bl HAL_DMA_Abort_IT + 6386 0040 EEE7 b .L1206 + 6387 .L1198: + 6388 0042 B1F5005F cmp r1, #8192 + 6389 0046 13D0 beq .L1203 + 6390 0048 B1F5804F cmp r1, #16384 + 6391 004c 03D1 bne .L1210 + 6392 004e 806B ldr r0, [r0, #56] + 6393 0050 FFF7FEFF bl HAL_DMA_Abort_IT + 6394 0054 E4E7 b .L1206 + 6395 .L1210: + 6396 0056 B1F5805F cmp r1, #4096 + 6397 005a 03D1 bne .L1208 + 6398 005c 006B ldr r0, [r0, #48] + 6399 005e FFF7FEFF bl HAL_DMA_Abort_IT + ARM GAS /tmp/cc6kdh5W.s page 111 + + + 6400 0062 DDE7 b .L1206 + 6401 .L1208: + 6402 0064 0120 movs r0, #1 + 6403 0066 38BD pop {r3, r4, r5, pc} + 6404 .L1199: + 6405 0068 406A ldr r0, [r0, #36] + 6406 006a FFF7FEFF bl HAL_DMA_Abort_IT + 6407 006e D7E7 b .L1206 + 6408 .L1203: + 6409 0070 406B ldr r0, [r0, #52] + 6410 0072 FFF7FEFF bl HAL_DMA_Abort_IT + 6411 0076 D3E7 b .L1206 + 6412 .L1197: + 6413 0078 C06A ldr r0, [r0, #44] + 6414 007a FFF7FEFF bl HAL_DMA_Abort_IT + 6415 007e CFE7 b .L1206 + 6417 .section .text.HAL_TIM_DMABurst_ReadStart,"ax",%progbits + 6418 .align 1 + 6419 .p2align 2,,3 + 6420 .global HAL_TIM_DMABurst_ReadStart + 6421 .syntax unified + 6422 .thumb + 6423 .thumb_func + 6424 .fpu fpv4-sp-d16 + 6426 HAL_TIM_DMABurst_ReadStart: + 6427 @ args = 4, pretend = 0, frame = 0 + 6428 @ frame_needed = 0, uses_anonymous_args = 0 + 6429 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 6430 0002 0E46 mov r6, r1 + 6431 0004 90F84810 ldrb r1, [r0, #72] @ zero_extendqisi2 + 6432 0008 069F ldr r7, [sp, #24] + 6433 000a 0229 cmp r1, #2 + 6434 000c 0546 mov r5, r0 + 6435 000e C8B2 uxtb r0, r1 + 6436 0010 2ED0 beq .L1212 + 6437 0012 95F84810 ldrb r1, [r5, #72] @ zero_extendqisi2 + 6438 0016 1446 mov r4, r2 + 6439 0018 0129 cmp r1, #1 + 6440 001a 1A46 mov r2, r3 + 6441 001c 4FEA1723 lsr r3, r7, #8 + 6442 0020 03F10103 add r3, r3, #1 + 6443 0024 4CD0 beq .L1242 + 6444 0026 B4F5006F cmp r4, #2048 + 6445 002a 51D0 beq .L1215 + 6446 .L1246: + 6447 002c 21D8 bhi .L1216 + 6448 002e B4F5007F cmp r4, #512 + 6449 0032 5AD0 beq .L1217 + 6450 0034 B4F5806F cmp r4, #1024 + 6451 0038 34D1 bne .L1243 + 6452 003a A86A ldr r0, [r5, #40] + 6453 .L1240: + 6454 003c 2968 ldr r1, [r5] + 6455 003e DFF8B0C0 ldr ip, .L1247 + 6456 0042 C0F82CC0 str ip, [r0, #44] + 6457 0046 DFF8ACC0 ldr ip, .L1247+4 + 6458 004a 01F57871 add r1, r1, #992 + ARM GAS /tmp/cc6kdh5W.s page 112 + + + 6459 .L1237: + 6460 004e C0F830C0 str ip, [r0, #48] + 6461 0052 DFF8A4C0 ldr ip, .L1247+8 + 6462 0056 C0F834C0 str ip, [r0, #52] + 6463 005a FFF7FEFF bl HAL_DMA_Start_IT + 6464 005e D0B9 cbnz r0, .L1241 + 6465 0060 2B68 ldr r3, [r5] + 6466 0062 3E43 orrs r6, r6, r7 + 6467 0064 C3F8DC63 str r6, [r3, #988] + 6468 0068 DA68 ldr r2, [r3, #12] + 6469 006a 1443 orrs r4, r4, r2 + 6470 006c 0020 movs r0, #0 + 6471 006e DC60 str r4, [r3, #12] + 6472 .L1212: + 6473 0070 F8BD pop {r3, r4, r5, r6, r7, pc} + 6474 .L1216: + 6475 0072 B4F5005F cmp r4, #8192 + 6476 0076 2DD0 beq .L1220 + 6477 0078 B4F5804F cmp r4, #16384 + 6478 007c 0DD1 bne .L1244 + 6479 007e 2968 ldr r1, [r5] + 6480 0080 A86B ldr r0, [r5, #56] + 6481 0082 DFF878C0 ldr ip, .L1247+12 + 6482 0086 C0F82CC0 str ip, [r0, #44] + 6483 008a 01F57871 add r1, r1, #992 + 6484 008e DFF870C0 ldr ip, .L1247+16 + 6485 0092 DCE7 b .L1237 + 6486 .L1245: + 6487 0094 B7B1 cbz r7, .L1214 + 6488 .L1241: + 6489 0096 0120 movs r0, #1 + 6490 0098 F8BD pop {r3, r4, r5, r6, r7, pc} + 6491 .L1244: + 6492 009a B4F5805F cmp r4, #4096 + 6493 009e FAD1 bne .L1241 + 6494 00a0 286B ldr r0, [r5, #48] + 6495 00a2 CBE7 b .L1240 + 6496 .L1243: + 6497 00a4 B4F5807F cmp r4, #256 + 6498 00a8 F5D1 bne .L1241 + 6499 00aa 2968 ldr r1, [r5] + 6500 00ac 286A ldr r0, [r5, #32] + 6501 00ae DFF854C0 ldr ip, .L1247+20 + 6502 00b2 C0F82CC0 str ip, [r0, #44] + 6503 00b6 01F57871 add r1, r1, #992 + 6504 00ba DFF84CC0 ldr ip, .L1247+24 + 6505 00be C6E7 b .L1237 + 6506 .L1242: + 6507 00c0 002A cmp r2, #0 + 6508 00c2 E7D0 beq .L1245 + 6509 .L1214: + 6510 00c4 0221 movs r1, #2 + 6511 00c6 B4F5006F cmp r4, #2048 + 6512 00ca 85F84810 strb r1, [r5, #72] + 6513 00ce ADD1 bne .L1246 + 6514 .L1215: + 6515 00d0 E86A ldr r0, [r5, #44] + ARM GAS /tmp/cc6kdh5W.s page 113 + + + 6516 00d2 B3E7 b .L1240 + 6517 .L1220: + 6518 00d4 2968 ldr r1, [r5] + 6519 00d6 686B ldr r0, [r5, #52] + 6520 00d8 DFF830C0 ldr ip, .L1247+28 + 6521 00dc C0F82CC0 str ip, [r0, #44] + 6522 00e0 01F57871 add r1, r1, #992 + 6523 00e4 DFF828C0 ldr ip, .L1247+32 + 6524 00e8 B1E7 b .L1237 + 6525 .L1217: + 6526 00ea 686A ldr r0, [r5, #36] + 6527 00ec A6E7 b .L1240 + 6528 .L1248: + 6529 00ee 00BF .align 2 + 6530 .L1247: + 6531 00f0 00000000 .word TIM_DMACaptureCplt + 6532 00f4 00000000 .word TIM_DMACaptureHalfCplt + 6533 00f8 00000000 .word TIM_DMAError + 6534 00fc 00000000 .word TIM_DMATriggerCplt + 6535 0100 00000000 .word TIM_DMATriggerHalfCplt + 6536 0104 00000000 .word TIM_DMAPeriodElapsedCplt + 6537 0108 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 6538 010c 00000000 .word TIMEx_DMACommutationCplt + 6539 0110 00000000 .word TIMEx_DMACommutationHalfCplt + 6541 .section .text.HAL_TIM_DMABurst_MultiReadStart,"ax",%progbits + 6542 .align 1 + 6543 .p2align 2,,3 + 6544 .global HAL_TIM_DMABurst_MultiReadStart + 6545 .syntax unified + 6546 .thumb + 6547 .thumb_func + 6548 .fpu fpv4-sp-d16 + 6550 HAL_TIM_DMABurst_MultiReadStart: + 6551 @ args = 8, pretend = 0, frame = 0 + 6552 @ frame_needed = 0, uses_anonymous_args = 0 + 6553 0000 70B5 push {r4, r5, r6, lr} + 6554 0002 90F848C0 ldrb ip, [r0, #72] @ zero_extendqisi2 + 6555 0006 BCF1020F cmp ip, #2 + 6556 000a 0546 mov r5, r0 + 6557 000c 5FFA8CF0 uxtb r0, ip + 6558 0010 27D0 beq .L1250 + 6559 0012 1446 mov r4, r2 + 6560 0014 95F84820 ldrb r2, [r5, #72] @ zero_extendqisi2 + 6561 0018 012A cmp r2, #1 + 6562 001a 0E46 mov r6, r1 + 6563 001c 46D0 beq .L1280 + 6564 001e B4F5006F cmp r4, #2048 + 6565 0022 4BD0 beq .L1253 + 6566 .L1284: + 6567 0024 1ED8 bhi .L1254 + 6568 0026 B4F5007F cmp r4, #512 + 6569 002a 52D0 beq .L1255 + 6570 002c B4F5806F cmp r4, #1024 + 6571 0030 30D1 bne .L1281 + 6572 0032 A86A ldr r0, [r5, #40] + 6573 .L1278: + 6574 0034 2968 ldr r1, [r5] + ARM GAS /tmp/cc6kdh5W.s page 114 + + + 6575 0036 1A46 mov r2, r3 + 6576 0038 274B ldr r3, .L1285 + 6577 003a C362 str r3, [r0, #44] + 6578 003c 274B ldr r3, .L1285+4 + 6579 003e 01F57871 add r1, r1, #992 + 6580 .L1275: + 6581 0042 0363 str r3, [r0, #48] + 6582 0044 264B ldr r3, .L1285+8 + 6583 0046 4363 str r3, [r0, #52] + 6584 0048 059B ldr r3, [sp, #20] + 6585 004a FFF7FEFF bl HAL_DMA_Start_IT + 6586 004e D0B9 cbnz r0, .L1279 + 6587 0050 049A ldr r2, [sp, #16] + 6588 0052 2B68 ldr r3, [r5] + 6589 0054 1643 orrs r6, r6, r2 + 6590 0056 C3F8DC63 str r6, [r3, #988] + 6591 005a DA68 ldr r2, [r3, #12] + 6592 005c 1443 orrs r4, r4, r2 + 6593 005e 0020 movs r0, #0 + 6594 0060 DC60 str r4, [r3, #12] + 6595 .L1250: + 6596 0062 70BD pop {r4, r5, r6, pc} + 6597 .L1254: + 6598 0064 B4F5005F cmp r4, #8192 + 6599 0068 2AD0 beq .L1258 + 6600 006a B4F5804F cmp r4, #16384 + 6601 006e 0CD1 bne .L1282 + 6602 0070 2968 ldr r1, [r5] + 6603 0072 A86B ldr r0, [r5, #56] + 6604 0074 1A46 mov r2, r3 + 6605 0076 1B4B ldr r3, .L1285+12 + 6606 0078 C362 str r3, [r0, #44] + 6607 007a 01F57871 add r1, r1, #992 + 6608 007e 1A4B ldr r3, .L1285+16 + 6609 0080 DFE7 b .L1275 + 6610 .L1283: + 6611 0082 049A ldr r2, [sp, #16] + 6612 0084 A2B1 cbz r2, .L1252 + 6613 .L1279: + 6614 0086 0120 movs r0, #1 + 6615 0088 70BD pop {r4, r5, r6, pc} + 6616 .L1282: + 6617 008a B4F5805F cmp r4, #4096 + 6618 008e FAD1 bne .L1279 + 6619 0090 286B ldr r0, [r5, #48] + 6620 0092 CFE7 b .L1278 + 6621 .L1281: + 6622 0094 B4F5807F cmp r4, #256 + 6623 0098 F5D1 bne .L1279 + 6624 009a 2968 ldr r1, [r5] + 6625 009c 286A ldr r0, [r5, #32] + 6626 009e 1A46 mov r2, r3 + 6627 00a0 124B ldr r3, .L1285+20 + 6628 00a2 C362 str r3, [r0, #44] + 6629 00a4 01F57871 add r1, r1, #992 + 6630 00a8 114B ldr r3, .L1285+24 + 6631 00aa CAE7 b .L1275 + ARM GAS /tmp/cc6kdh5W.s page 115 + + + 6632 .L1280: + 6633 00ac 002B cmp r3, #0 + 6634 00ae E8D0 beq .L1283 + 6635 .L1252: + 6636 00b0 0222 movs r2, #2 + 6637 00b2 B4F5006F cmp r4, #2048 + 6638 00b6 85F84820 strb r2, [r5, #72] + 6639 00ba B3D1 bne .L1284 + 6640 .L1253: + 6641 00bc E86A ldr r0, [r5, #44] + 6642 00be B9E7 b .L1278 + 6643 .L1258: + 6644 00c0 2968 ldr r1, [r5] + 6645 00c2 686B ldr r0, [r5, #52] + 6646 00c4 1A46 mov r2, r3 + 6647 00c6 0B4B ldr r3, .L1285+28 + 6648 00c8 C362 str r3, [r0, #44] + 6649 00ca 01F57871 add r1, r1, #992 + 6650 00ce 0A4B ldr r3, .L1285+32 + 6651 00d0 B7E7 b .L1275 + 6652 .L1255: + 6653 00d2 686A ldr r0, [r5, #36] + 6654 00d4 AEE7 b .L1278 + 6655 .L1286: + 6656 00d6 00BF .align 2 + 6657 .L1285: + 6658 00d8 00000000 .word TIM_DMACaptureCplt + 6659 00dc 00000000 .word TIM_DMACaptureHalfCplt + 6660 00e0 00000000 .word TIM_DMAError + 6661 00e4 00000000 .word TIM_DMATriggerCplt + 6662 00e8 00000000 .word TIM_DMATriggerHalfCplt + 6663 00ec 00000000 .word TIM_DMAPeriodElapsedCplt + 6664 00f0 00000000 .word TIM_DMAPeriodElapsedHalfCplt + 6665 00f4 00000000 .word TIMEx_DMACommutationCplt + 6666 00f8 00000000 .word TIMEx_DMACommutationHalfCplt + 6668 .section .text.HAL_TIM_DMABurst_ReadStop,"ax",%progbits + 6669 .align 1 + 6670 .p2align 2,,3 + 6671 .global HAL_TIM_DMABurst_ReadStop + 6672 .syntax unified + 6673 .thumb + 6674 .thumb_func + 6675 .fpu fpv4-sp-d16 + 6677 HAL_TIM_DMABurst_ReadStop: + 6678 @ args = 0, pretend = 0, frame = 0 + 6679 @ frame_needed = 0, uses_anonymous_args = 0 + 6680 0000 B1F5006F cmp r1, #2048 + 6681 0004 38B5 push {r3, r4, r5, lr} + 6682 0006 0C46 mov r4, r1 + 6683 0008 0546 mov r5, r0 + 6684 000a 35D0 beq .L1288 + 6685 000c 19D8 bhi .L1289 + 6686 000e B1F5007F cmp r1, #512 + 6687 0012 29D0 beq .L1290 + 6688 0014 B1F5806F cmp r1, #1024 + 6689 0018 0CD1 bne .L1300 + 6690 001a 806A ldr r0, [r0, #40] + ARM GAS /tmp/cc6kdh5W.s page 116 + + + 6691 001c FFF7FEFF bl HAL_DMA_Abort_IT + 6692 .L1297: + 6693 0020 2B68 ldr r3, [r5] + 6694 0022 D968 ldr r1, [r3, #12] + 6695 0024 0122 movs r2, #1 + 6696 0026 21EA0404 bic r4, r1, r4 + 6697 002a DC60 str r4, [r3, #12] + 6698 002c 85F84820 strb r2, [r5, #72] + 6699 0030 0020 movs r0, #0 + 6700 0032 38BD pop {r3, r4, r5, pc} + 6701 .L1300: + 6702 0034 B1F5807F cmp r1, #256 + 6703 0038 14D1 bne .L1299 + 6704 003a 006A ldr r0, [r0, #32] + 6705 003c FFF7FEFF bl HAL_DMA_Abort_IT + 6706 0040 EEE7 b .L1297 + 6707 .L1289: + 6708 0042 B1F5005F cmp r1, #8192 + 6709 0046 13D0 beq .L1294 + 6710 0048 B1F5804F cmp r1, #16384 + 6711 004c 03D1 bne .L1301 + 6712 004e 806B ldr r0, [r0, #56] + 6713 0050 FFF7FEFF bl HAL_DMA_Abort_IT + 6714 0054 E4E7 b .L1297 + 6715 .L1301: + 6716 0056 B1F5805F cmp r1, #4096 + 6717 005a 03D1 bne .L1299 + 6718 005c 006B ldr r0, [r0, #48] + 6719 005e FFF7FEFF bl HAL_DMA_Abort_IT + 6720 0062 DDE7 b .L1297 + 6721 .L1299: + 6722 0064 0120 movs r0, #1 + 6723 0066 38BD pop {r3, r4, r5, pc} + 6724 .L1290: + 6725 0068 406A ldr r0, [r0, #36] + 6726 006a FFF7FEFF bl HAL_DMA_Abort_IT + 6727 006e D7E7 b .L1297 + 6728 .L1294: + 6729 0070 406B ldr r0, [r0, #52] + 6730 0072 FFF7FEFF bl HAL_DMA_Abort_IT + 6731 0076 D3E7 b .L1297 + 6732 .L1288: + 6733 0078 C06A ldr r0, [r0, #44] + 6734 007a FFF7FEFF bl HAL_DMA_Abort_IT + 6735 007e CFE7 b .L1297 + 6737 .section .text.HAL_TIM_GenerateEvent,"ax",%progbits + 6738 .align 1 + 6739 .p2align 2,,3 + 6740 .global HAL_TIM_GenerateEvent + 6741 .syntax unified + 6742 .thumb + 6743 .thumb_func + 6744 .fpu fpv4-sp-d16 + 6746 HAL_TIM_GenerateEvent: + 6747 @ args = 0, pretend = 0, frame = 0 + 6748 @ frame_needed = 0, uses_anonymous_args = 0 + 6749 @ link register save eliminated. + ARM GAS /tmp/cc6kdh5W.s page 117 + + + 6750 0000 90F83C20 ldrb r2, [r0, #60] @ zero_extendqisi2 + 6751 0004 012A cmp r2, #1 + 6752 0006 0346 mov r3, r0 + 6753 0008 0ED0 beq .L1304 + 6754 000a 0068 ldr r0, [r0] + 6755 000c 4FF0020C mov ip, #2 + 6756 0010 83F83DC0 strb ip, [r3, #61] + 6757 0014 0022 movs r2, #0 + 6758 0016 4FF0010C mov ip, #1 + 6759 001a 4161 str r1, [r0, #20] + 6760 001c 1046 mov r0, r2 + 6761 001e 83F83DC0 strb ip, [r3, #61] + 6762 0022 83F83C20 strb r2, [r3, #60] + 6763 0026 7047 bx lr + 6764 .L1304: + 6765 0028 0220 movs r0, #2 + 6766 002a 7047 bx lr + 6768 .section .text.HAL_TIM_ConfigOCrefClear,"ax",%progbits + 6769 .align 1 + 6770 .p2align 2,,3 + 6771 .global HAL_TIM_ConfigOCrefClear + 6772 .syntax unified + 6773 .thumb + 6774 .thumb_func + 6775 .fpu fpv4-sp-d16 + 6777 HAL_TIM_ConfigOCrefClear: + 6778 @ args = 0, pretend = 0, frame = 0 + 6779 @ frame_needed = 0, uses_anonymous_args = 0 + 6780 @ link register save eliminated. + 6781 0000 0346 mov r3, r0 + 6782 0002 90F83C00 ldrb r0, [r0, #60] @ zero_extendqisi2 + 6783 0006 0128 cmp r0, #1 + 6784 0008 00F0E780 beq .L1330 + 6785 000c 70B4 push {r4, r5, r6} + 6786 000e 0120 movs r0, #1 + 6787 0010 0224 movs r4, #2 + 6788 0012 83F83C00 strb r0, [r3, #60] + 6789 0016 83F83D40 strb r4, [r3, #61] + 6790 001a 4C68 ldr r4, [r1, #4] + 6791 001c B4F5003F cmp r4, #131072 + 6792 0020 32D0 beq .L1307 + 6793 0022 0CD8 bhi .L1308 + 6794 0024 8442 cmp r4, r0 + 6795 0026 54D0 beq .L1309 + 6796 0028 34F48035 bics r5, r4, #65536 + 6797 002c 2CD0 beq .L1307 + 6798 .L1310: + 6799 002e 0121 movs r1, #1 + 6800 0030 0022 movs r2, #0 + 6801 0032 83F83D10 strb r1, [r3, #61] + 6802 0036 83F83C20 strb r2, [r3, #60] + 6803 .L1306: + 6804 003a 70BC pop {r4, r5, r6} + 6805 003c 7047 bx lr + 6806 .L1308: + 6807 003e B4F5403F cmp r4, #196608 + 6808 0042 21D0 beq .L1307 + ARM GAS /tmp/cc6kdh5W.s page 118 + + + 6809 0044 0134 adds r4, r4, #1 + 6810 0046 F2D1 bne .L1310 + 6811 0048 1D68 ldr r5, [r3] + 6812 004a 7148 ldr r0, .L1356 + 6813 004c 8542 cmp r5, r0 + 6814 004e 70D0 beq .L1311 + 6815 0050 B5F1804F cmp r5, #1073741824 + 6816 0054 6DD0 beq .L1311 + 6817 0056 A0F59430 sub r0, r0, #75776 + 6818 005a 8542 cmp r5, r0 + 6819 005c 69D0 beq .L1311 + 6820 005e 00F59830 add r0, r0, #77824 + 6821 0062 8542 cmp r5, r0 + 6822 0064 65D0 beq .L1311 + 6823 0066 00F54060 add r0, r0, #3072 + 6824 006a 8542 cmp r5, r0 + 6825 006c 61D0 beq .L1311 + 6826 006e 00F58060 add r0, r0, #1024 + 6827 0072 8542 cmp r5, r0 + 6828 0074 5DD0 beq .L1311 + 6829 0076 00F58060 add r0, r0, #1024 + 6830 007a 8542 cmp r5, r0 + 6831 007c 59D0 beq .L1311 + 6832 007e A868 ldr r0, [r5, #8] + 6833 0080 20F47F40 bic r0, r0, #65280 + 6834 0084 A860 str r0, [r5, #8] + 6835 0086 5EE0 b .L1313 + 6836 .L1307: + 6837 0088 1D68 ldr r5, [r3] + 6838 008a 6148 ldr r0, .L1356 + 6839 008c 8542 cmp r5, r0 + 6840 008e 16D0 beq .L1314 + 6841 0090 B5F1804F cmp r5, #1073741824 + 6842 0094 13D0 beq .L1314 + 6843 0096 A0F59430 sub r0, r0, #75776 + 6844 009a 8542 cmp r5, r0 + 6845 009c 0FD0 beq .L1314 + 6846 009e 00F59830 add r0, r0, #77824 + 6847 00a2 8542 cmp r5, r0 + 6848 00a4 0BD0 beq .L1314 + 6849 00a6 00F54060 add r0, r0, #3072 + 6850 00aa 8542 cmp r5, r0 + 6851 00ac 07D0 beq .L1314 + 6852 00ae 00F58060 add r0, r0, #1024 + 6853 00b2 8542 cmp r5, r0 + 6854 00b4 03D0 beq .L1314 + 6855 00b6 00F58060 add r0, r0, #1024 + 6856 00ba 8542 cmp r5, r0 + 6857 00bc 43D1 bne .L1313 + 6858 .L1314: + 6859 00be A868 ldr r0, [r5, #8] + 6860 00c0 20F00800 bic r0, r0, #8 + 6861 00c4 A860 str r0, [r5, #8] + 6862 00c6 686E ldr r0, [r5, #100] + 6863 00c8 20F4E020 bic r0, r0, #458752 + 6864 00cc 2043 orrs r0, r0, r4 + 6865 00ce 6866 str r0, [r5, #100] + ARM GAS /tmp/cc6kdh5W.s page 119 + + + 6866 00d0 39E0 b .L1313 + 6867 .L1309: + 6868 00d2 C868 ldr r0, [r1, #12] + 6869 00d4 0028 cmp r0, #0 + 6870 00d6 47D1 bne .L1355 + 6871 00d8 1D68 ldr r5, [r3] + 6872 00da 8868 ldr r0, [r1, #8] + 6873 00dc AC68 ldr r4, [r5, #8] + 6874 00de 0E69 ldr r6, [r1, #16] + 6875 00e0 24F47F44 bic r4, r4, #65280 + 6876 00e4 40EA0620 orr r0, r0, r6, lsl #8 + 6877 00e8 2043 orrs r0, r0, r4 + 6878 00ea A860 str r0, [r5, #8] + 6879 00ec 4848 ldr r0, .L1356 + 6880 00ee 8542 cmp r5, r0 + 6881 00f0 16D0 beq .L1316 + 6882 00f2 B5F1804F cmp r5, #1073741824 + 6883 00f6 13D0 beq .L1316 + 6884 00f8 A0F59430 sub r0, r0, #75776 + 6885 00fc 8542 cmp r5, r0 + 6886 00fe 0FD0 beq .L1316 + 6887 0100 00F59830 add r0, r0, #77824 + 6888 0104 8542 cmp r5, r0 + 6889 0106 0BD0 beq .L1316 + 6890 0108 00F54060 add r0, r0, #3072 + 6891 010c 8542 cmp r5, r0 + 6892 010e 07D0 beq .L1316 + 6893 0110 00F58060 add r0, r0, #1024 + 6894 0114 8542 cmp r5, r0 + 6895 0116 03D0 beq .L1316 + 6896 0118 00F58060 add r0, r0, #1024 + 6897 011c 8542 cmp r5, r0 + 6898 011e 12D1 bne .L1313 + 6899 .L1316: + 6900 0120 A868 ldr r0, [r5, #8] + 6901 0122 40F00800 orr r0, r0, #8 + 6902 0126 A860 str r0, [r5, #8] + 6903 0128 686E ldr r0, [r5, #100] + 6904 012a 20F4E020 bic r0, r0, #458752 + 6905 012e 6866 str r0, [r5, #100] + 6906 0130 09E0 b .L1313 + 6907 .L1311: + 6908 0132 A868 ldr r0, [r5, #8] + 6909 0134 20F47F40 bic r0, r0, #65280 + 6910 0138 20F00800 bic r0, r0, #8 + 6911 013c A860 str r0, [r5, #8] + 6912 013e 686E ldr r0, [r5, #100] + 6913 0140 20F4E020 bic r0, r0, #458752 + 6914 0144 6866 str r0, [r5, #100] + 6915 .L1313: + 6916 0146 142A cmp r2, #20 + 6917 0148 0CD8 bhi .L1332 + 6918 014a DFE802F0 tbb [pc, r2] + 6919 .L1318: + 6920 014e 3E .byte (.L1323-.L1318)/2 + 6921 014f 0B .byte (.L1332-.L1318)/2 + 6922 0150 0B .byte (.L1332-.L1318)/2 + ARM GAS /tmp/cc6kdh5W.s page 120 + + + 6923 0151 0B .byte (.L1332-.L1318)/2 + 6924 0152 2E .byte (.L1322-.L1318)/2 + 6925 0153 0B .byte (.L1332-.L1318)/2 + 6926 0154 0B .byte (.L1332-.L1318)/2 + 6927 0155 0B .byte (.L1332-.L1318)/2 + 6928 0156 26 .byte (.L1321-.L1318)/2 + 6929 0157 0B .byte (.L1332-.L1318)/2 + 6930 0158 0B .byte (.L1332-.L1318)/2 + 6931 0159 0B .byte (.L1332-.L1318)/2 + 6932 015a 1D .byte (.L1320-.L1318)/2 + 6933 015b 0B .byte (.L1332-.L1318)/2 + 6934 015c 0B .byte (.L1332-.L1318)/2 + 6935 015d 0B .byte (.L1332-.L1318)/2 + 6936 015e 14 .byte (.L1319-.L1318)/2 + 6937 015f 0B .byte (.L1332-.L1318)/2 + 6938 0160 0B .byte (.L1332-.L1318)/2 + 6939 0161 0B .byte (.L1332-.L1318)/2 + 6940 0162 36 .byte (.L1317-.L1318)/2 + 6941 0163 00 .p2align 1 + 6942 .L1332: + 6943 0164 0020 movs r0, #0 + 6944 0166 62E7 b .L1310 + 6945 .L1355: + 6946 0168 0022 movs r2, #0 + 6947 016a 83F83D40 strb r4, [r3, #61] + 6948 016e 83F83C20 strb r2, [r3, #60] + 6949 0172 2046 mov r0, r4 + 6950 0174 61E7 b .L1306 + 6951 .L1319: + 6952 0176 0868 ldr r0, [r1] + 6953 0178 2A6D ldr r2, [r5, #80] + 6954 017a 0028 cmp r0, #0 + 6955 017c 43D0 beq .L1328 + 6956 017e 42F08002 orr r2, r2, #128 + 6957 0182 0020 movs r0, #0 + 6958 0184 2A65 str r2, [r5, #80] + 6959 0186 52E7 b .L1310 + 6960 .L1320: + 6961 0188 0868 ldr r0, [r1] + 6962 018a EA69 ldr r2, [r5, #28] + 6963 018c 0028 cmp r0, #0 + 6964 018e 36D0 beq .L1327 + 6965 0190 42F40042 orr r2, r2, #32768 + 6966 0194 0020 movs r0, #0 + 6967 0196 EA61 str r2, [r5, #28] + 6968 0198 49E7 b .L1310 + 6969 .L1321: + 6970 019a 0868 ldr r0, [r1] + 6971 019c EA69 ldr r2, [r5, #28] + 6972 019e 50B3 cbz r0, .L1326 + 6973 01a0 42F08002 orr r2, r2, #128 + 6974 01a4 0020 movs r0, #0 + 6975 01a6 EA61 str r2, [r5, #28] + 6976 01a8 41E7 b .L1310 + 6977 .L1322: + 6978 01aa 0868 ldr r0, [r1] + 6979 01ac AA69 ldr r2, [r5, #24] + ARM GAS /tmp/cc6kdh5W.s page 121 + + + 6980 01ae F0B1 cbz r0, .L1325 + 6981 01b0 42F40042 orr r2, r2, #32768 + 6982 01b4 0020 movs r0, #0 + 6983 01b6 AA61 str r2, [r5, #24] + 6984 01b8 39E7 b .L1310 + 6985 .L1317: + 6986 01ba 0868 ldr r0, [r1] + 6987 01bc 2A6D ldr r2, [r5, #80] + 6988 01be 90B1 cbz r0, .L1329 + 6989 01c0 42F40042 orr r2, r2, #32768 + 6990 01c4 0020 movs r0, #0 + 6991 01c6 2A65 str r2, [r5, #80] + 6992 01c8 31E7 b .L1310 + 6993 .L1323: + 6994 01ca 0868 ldr r0, [r1] + 6995 01cc AA69 ldr r2, [r5, #24] + 6996 01ce 30B1 cbz r0, .L1324 + 6997 01d0 42F08002 orr r2, r2, #128 + 6998 01d4 0020 movs r0, #0 + 6999 01d6 AA61 str r2, [r5, #24] + 7000 01d8 29E7 b .L1310 + 7001 .L1330: + 7002 01da 0220 movs r0, #2 + 7003 01dc 7047 bx lr + 7004 .L1324: + 7005 01de 22F08002 bic r2, r2, #128 + 7006 01e2 AA61 str r2, [r5, #24] + 7007 01e4 23E7 b .L1310 + 7008 .L1329: + 7009 01e6 22F40042 bic r2, r2, #32768 + 7010 01ea 2A65 str r2, [r5, #80] + 7011 01ec 1FE7 b .L1310 + 7012 .L1325: + 7013 01ee 22F40042 bic r2, r2, #32768 + 7014 01f2 AA61 str r2, [r5, #24] + 7015 01f4 1BE7 b .L1310 + 7016 .L1326: + 7017 01f6 22F08002 bic r2, r2, #128 + 7018 01fa EA61 str r2, [r5, #28] + 7019 01fc 17E7 b .L1310 + 7020 .L1327: + 7021 01fe 22F40042 bic r2, r2, #32768 + 7022 0202 EA61 str r2, [r5, #28] + 7023 0204 13E7 b .L1310 + 7024 .L1328: + 7025 0206 22F08002 bic r2, r2, #128 + 7026 020a 2A65 str r2, [r5, #80] + 7027 020c 0FE7 b .L1310 + 7028 .L1357: + 7029 020e 00BF .align 2 + 7030 .L1356: + 7031 0210 002C0140 .word 1073818624 + 7033 .section .text.HAL_TIM_ConfigClockSource,"ax",%progbits + 7034 .align 1 + 7035 .p2align 2,,3 + 7036 .global HAL_TIM_ConfigClockSource + 7037 .syntax unified + ARM GAS /tmp/cc6kdh5W.s page 122 + + + 7038 .thumb + 7039 .thumb_func + 7040 .fpu fpv4-sp-d16 + 7042 HAL_TIM_ConfigClockSource: + 7043 @ args = 0, pretend = 0, frame = 0 + 7044 @ frame_needed = 0, uses_anonymous_args = 0 + 7045 @ link register save eliminated. + 7046 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7047 0004 012B cmp r3, #1 + 7048 0006 00F08980 beq .L1372 + 7049 000a 70B4 push {r4, r5, r6} + 7050 000c 0223 movs r3, #2 + 7051 000e 0468 ldr r4, [r0] + 7052 0010 80F83D30 strb r3, [r0, #61] + 7053 0014 0122 movs r2, #1 + 7054 0016 80F83C20 strb r2, [r0, #60] + 7055 001a A568 ldr r5, [r4, #8] + 7056 001c 5F4B ldr r3, .L1396 + 7057 001e 2B40 ands r3, r3, r5 + 7058 0020 A360 str r3, [r4, #8] + 7059 0022 0B68 ldr r3, [r1] + 7060 0024 702B cmp r3, #112 + 7061 0026 00F0A880 beq .L1360 + 7062 002a 28D8 bhi .L1361 + 7063 002c 502B cmp r3, #80 + 7064 002e 78D0 beq .L1362 + 7065 0030 3ED9 bls .L1391 + 7066 0032 602B cmp r3, #96 + 7067 0034 1AD1 bne .L1365 + 7068 0036 CB68 ldr r3, [r1, #12] + 7069 0038 4D68 ldr r5, [r1, #4] + 7070 003a 216A ldr r1, [r4, #32] + 7071 003c 21F01001 bic r1, r1, #16 + 7072 0040 2162 str r1, [r4, #32] + 7073 0042 A269 ldr r2, [r4, #24] + 7074 0044 22F47042 bic r2, r2, #61440 + 7075 0048 42EA0332 orr r2, r2, r3, lsl #12 + 7076 004c 236A ldr r3, [r4, #32] + 7077 004e A261 str r2, [r4, #24] + 7078 0050 23F0A003 bic r3, r3, #160 + 7079 0054 43EA0513 orr r3, r3, r5, lsl #4 + 7080 0058 2362 str r3, [r4, #32] + 7081 005a A368 ldr r3, [r4, #8] + 7082 005c 23F44013 bic r3, r3, #3145728 + 7083 0060 23F07003 bic r3, r3, #112 + 7084 0064 43F06703 orr r3, r3, #103 + 7085 0068 0022 movs r2, #0 + 7086 006a A360 str r3, [r4, #8] + 7087 .L1365: + 7088 006c 0121 movs r1, #1 + 7089 006e 0023 movs r3, #0 + 7090 0070 80F83D10 strb r1, [r0, #61] + 7091 0074 80F83C30 strb r3, [r0, #60] + 7092 0078 70BC pop {r4, r5, r6} + 7093 007a 1046 mov r0, r2 + 7094 007c 7047 bx lr + 7095 .L1361: + ARM GAS /tmp/cc6kdh5W.s page 123 + + + 7096 007e B3F5005F cmp r3, #8192 + 7097 0082 69D0 beq .L1369 + 7098 0084 38D9 bls .L1392 + 7099 0086 4649 ldr r1, .L1396+4 + 7100 0088 8B42 cmp r3, r1 + 7101 008a 06D0 beq .L1366 + 7102 008c 2DD9 bls .L1393 + 7103 008e 4549 ldr r1, .L1396+8 + 7104 0090 8B42 cmp r3, r1 + 7105 0092 02D0 beq .L1366 + 7106 0094 3031 adds r1, r1, #48 + 7107 0096 8B42 cmp r3, r1 + 7108 0098 E8D1 bne .L1365 + 7109 .L1366: + 7110 009a A168 ldr r1, [r4, #8] + 7111 009c 21F44011 bic r1, r1, #3145728 + 7112 00a0 21F07001 bic r1, r1, #112 + 7113 00a4 0B43 orrs r3, r3, r1 + 7114 00a6 43F00703 orr r3, r3, #7 + 7115 00aa 0022 movs r2, #0 + 7116 00ac A360 str r3, [r4, #8] + 7117 00ae DDE7 b .L1365 + 7118 .L1391: + 7119 00b0 402B cmp r3, #64 + 7120 00b2 26D1 bne .L1394 + 7121 00b4 4A68 ldr r2, [r1, #4] + 7122 00b6 CE68 ldr r6, [r1, #12] + 7123 00b8 216A ldr r1, [r4, #32] + 7124 00ba 256A ldr r5, [r4, #32] + 7125 00bc 25F00105 bic r5, r5, #1 + 7126 00c0 2562 str r5, [r4, #32] + 7127 00c2 A369 ldr r3, [r4, #24] + 7128 00c4 21F00A01 bic r1, r1, #10 + 7129 00c8 23F0F003 bic r3, r3, #240 + 7130 00cc 1143 orrs r1, r1, r2 + 7131 00ce 43EA0613 orr r3, r3, r6, lsl #4 + 7132 00d2 A361 str r3, [r4, #24] + 7133 00d4 2162 str r1, [r4, #32] + 7134 00d6 A368 ldr r3, [r4, #8] + 7135 00d8 23F44013 bic r3, r3, #3145728 + 7136 00dc 23F07003 bic r3, r3, #112 + 7137 00e0 43F04703 orr r3, r3, #71 + 7138 00e4 0022 movs r2, #0 + 7139 00e6 A360 str r3, [r4, #8] + 7140 00e8 C0E7 b .L1365 + 7141 .L1393: + 7142 00ea B3F1101F cmp r3, #1048592 + 7143 00ee D4D0 beq .L1366 + 7144 00f0 1039 subs r1, r1, #16 + 7145 00f2 8B42 cmp r3, r1 + 7146 00f4 D1D0 beq .L1366 + 7147 00f6 B9E7 b .L1365 + 7148 .L1392: + 7149 00f8 B3F58052 subs r2, r3, #4096 + 7150 00fc 18BF it ne + 7151 00fe 0122 movne r2, #1 + 7152 0100 B4E7 b .L1365 + ARM GAS /tmp/cc6kdh5W.s page 124 + + + 7153 .L1394: + 7154 0102 B3D8 bhi .L1365 + 7155 0104 202B cmp r3, #32 + 7156 0106 C8D0 beq .L1366 + 7157 0108 03D9 bls .L1395 + 7158 010a 302B cmp r3, #48 + 7159 010c C5D0 beq .L1366 + 7160 010e 0122 movs r2, #1 + 7161 0110 ACE7 b .L1365 + 7162 .L1395: + 7163 0112 33F01002 bics r2, r3, #16 + 7164 0116 C0D0 beq .L1366 + 7165 0118 0122 movs r2, #1 + 7166 011a A7E7 b .L1365 + 7167 .L1372: + 7168 011c 0222 movs r2, #2 + 7169 011e 1046 mov r0, r2 + 7170 0120 7047 bx lr + 7171 .L1362: + 7172 0122 4A68 ldr r2, [r1, #4] + 7173 0124 CE68 ldr r6, [r1, #12] + 7174 0126 216A ldr r1, [r4, #32] + 7175 0128 256A ldr r5, [r4, #32] + 7176 012a 25F00105 bic r5, r5, #1 + 7177 012e 2562 str r5, [r4, #32] + 7178 0130 A369 ldr r3, [r4, #24] + 7179 0132 21F00A01 bic r1, r1, #10 + 7180 0136 23F0F003 bic r3, r3, #240 + 7181 013a 1143 orrs r1, r1, r2 + 7182 013c 43EA0613 orr r3, r3, r6, lsl #4 + 7183 0140 A361 str r3, [r4, #24] + 7184 0142 2162 str r1, [r4, #32] + 7185 0144 A368 ldr r3, [r4, #8] + 7186 0146 23F44013 bic r3, r3, #3145728 + 7187 014a 23F07003 bic r3, r3, #112 + 7188 014e 43F05703 orr r3, r3, #87 + 7189 0152 0022 movs r2, #0 + 7190 0154 A360 str r3, [r4, #8] + 7191 0156 89E7 b .L1365 + 7192 .L1369: + 7193 0158 D1E90153 ldrd r5, r3, [r1, #4] + 7194 015c A268 ldr r2, [r4, #8] + 7195 015e C968 ldr r1, [r1, #12] + 7196 0160 2B43 orrs r3, r3, r5 + 7197 0162 22F47F42 bic r2, r2, #65280 + 7198 0166 43EA0123 orr r3, r3, r1, lsl #8 + 7199 016a 1343 orrs r3, r3, r2 + 7200 016c A360 str r3, [r4, #8] + 7201 016e A368 ldr r3, [r4, #8] + 7202 0170 43F48043 orr r3, r3, #16384 + 7203 0174 0022 movs r2, #0 + 7204 0176 A360 str r3, [r4, #8] + 7205 0178 78E7 b .L1365 + 7206 .L1360: + 7207 017a D1E90153 ldrd r5, r3, [r1, #4] + 7208 017e A268 ldr r2, [r4, #8] + 7209 0180 C968 ldr r1, [r1, #12] + ARM GAS /tmp/cc6kdh5W.s page 125 + + + 7210 0182 2B43 orrs r3, r3, r5 + 7211 0184 22F47F42 bic r2, r2, #65280 + 7212 0188 43EA0123 orr r3, r3, r1, lsl #8 + 7213 018c 1343 orrs r3, r3, r2 + 7214 018e A360 str r3, [r4, #8] + 7215 0190 A368 ldr r3, [r4, #8] + 7216 0192 43F07703 orr r3, r3, #119 + 7217 0196 0022 movs r2, #0 + 7218 0198 A360 str r3, [r4, #8] + 7219 019a 67E7 b .L1365 + 7220 .L1397: + 7221 .align 2 + 7222 .L1396: + 7223 019c 8800CEFF .word -3276664 + 7224 01a0 30001000 .word 1048624 + 7225 01a4 40001000 .word 1048640 + 7227 .section .text.HAL_TIM_ConfigTI1Input,"ax",%progbits + 7228 .align 1 + 7229 .p2align 2,,3 + 7230 .global HAL_TIM_ConfigTI1Input + 7231 .syntax unified + 7232 .thumb + 7233 .thumb_func + 7234 .fpu fpv4-sp-d16 + 7236 HAL_TIM_ConfigTI1Input: + 7237 @ args = 0, pretend = 0, frame = 0 + 7238 @ frame_needed = 0, uses_anonymous_args = 0 + 7239 @ link register save eliminated. + 7240 0000 0268 ldr r2, [r0] + 7241 0002 5368 ldr r3, [r2, #4] + 7242 0004 23F08003 bic r3, r3, #128 + 7243 0008 1943 orrs r1, r1, r3 + 7244 000a 0020 movs r0, #0 + 7245 000c 5160 str r1, [r2, #4] + 7246 000e 7047 bx lr + 7248 .section .text.HAL_TIM_SlaveConfigSynchro,"ax",%progbits + 7249 .align 1 + 7250 .p2align 2,,3 + 7251 .global HAL_TIM_SlaveConfigSynchro + 7252 .syntax unified + 7253 .thumb + 7254 .thumb_func + 7255 .fpu fpv4-sp-d16 + 7257 HAL_TIM_SlaveConfigSynchro: + 7258 @ args = 0, pretend = 0, frame = 0 + 7259 @ frame_needed = 0, uses_anonymous_args = 0 + 7260 @ link register save eliminated. + 7261 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7262 0004 012B cmp r3, #1 + 7263 0006 69D0 beq .L1411 + 7264 0008 8446 mov ip, r0 + 7265 000a 0122 movs r2, #1 + 7266 000c 0068 ldr r0, [r0] + 7267 000e 0223 movs r3, #2 + 7268 0010 10B4 push {r4} + 7269 0012 8CF83C20 strb r2, [ip, #60] + 7270 0016 8CF83D30 strb r3, [ip, #61] + ARM GAS /tmp/cc6kdh5W.s page 126 + + + 7271 001a 8268 ldr r2, [r0, #8] + 7272 001c 4B68 ldr r3, [r1, #4] + 7273 001e 0C68 ldr r4, [r1] + 7274 0020 22F44012 bic r2, r2, #3145728 + 7275 0024 22F07002 bic r2, r2, #112 + 7276 0028 1A43 orrs r2, r2, r3 + 7277 002a 22F48032 bic r2, r2, #65536 + 7278 002e 22F00702 bic r2, r2, #7 + 7279 0032 2243 orrs r2, r2, r4 + 7280 0034 602B cmp r3, #96 + 7281 0036 8260 str r2, [r0, #8] + 7282 0038 5ED0 beq .L1401 + 7283 003a 16D8 bhi .L1402 + 7284 003c 402B cmp r3, #64 + 7285 003e 6ED0 beq .L1403 + 7286 0040 33D9 bls .L1434 + 7287 0042 502B cmp r3, #80 + 7288 0044 41D1 bne .L1407 + 7289 0046 8A68 ldr r2, [r1, #8] + 7290 0048 0C69 ldr r4, [r1, #16] + 7291 004a 016A ldr r1, [r0, #32] + 7292 004c 21F00A01 bic r1, r1, #10 + 7293 0050 0A43 orrs r2, r2, r1 + 7294 0052 016A ldr r1, [r0, #32] + 7295 0054 21F00101 bic r1, r1, #1 + 7296 0058 0162 str r1, [r0, #32] + 7297 005a 8369 ldr r3, [r0, #24] + 7298 005c 23F0F003 bic r3, r3, #240 + 7299 0060 43EA0413 orr r3, r3, r4, lsl #4 + 7300 0064 8361 str r3, [r0, #24] + 7301 0066 0262 str r2, [r0, #32] + 7302 0068 0DE0 b .L1405 + 7303 .L1402: + 7304 006a 702B cmp r3, #112 + 7305 006c 38D0 beq .L1409 + 7306 006e 6F2B cmp r3, #111 + 7307 0070 2BD9 bls .L1407 + 7308 0072 344A ldr r2, .L1437 + 7309 0074 9342 cmp r3, r2 + 7310 0076 06D0 beq .L1405 + 7311 0078 1DD9 bls .L1435 + 7312 007a 334A ldr r2, .L1437+4 + 7313 007c 9342 cmp r3, r2 + 7314 007e 02D0 beq .L1405 + 7315 0080 3032 adds r2, r2, #48 + 7316 0082 9342 cmp r3, r2 + 7317 0084 21D1 bne .L1407 + 7318 .L1405: + 7319 0086 C368 ldr r3, [r0, #12] + 7320 0088 23F04003 bic r3, r3, #64 + 7321 008c C360 str r3, [r0, #12] + 7322 008e C368 ldr r3, [r0, #12] + 7323 0090 0022 movs r2, #0 + 7324 0092 0121 movs r1, #1 + 7325 0094 23F48043 bic r3, r3, #16384 + 7326 0098 C360 str r3, [r0, #12] + 7327 009a 8CF83D10 strb r1, [ip, #61] + ARM GAS /tmp/cc6kdh5W.s page 127 + + + 7328 009e 8CF83C20 strb r2, [ip, #60] + 7329 00a2 1046 mov r0, r2 + 7330 00a4 5DF8044B ldr r4, [sp], #4 + 7331 00a8 7047 bx lr + 7332 .L1434: + 7333 00aa 202B cmp r3, #32 + 7334 00ac EBD0 beq .L1405 + 7335 00ae 09D9 bls .L1436 + 7336 00b0 302B cmp r3, #48 + 7337 00b2 0AD1 bne .L1407 + 7338 00b4 E7E7 b .L1405 + 7339 .L1435: + 7340 00b6 B3F1101F cmp r3, #1048592 + 7341 00ba E4D0 beq .L1405 + 7342 00bc 103A subs r2, r2, #16 + 7343 00be 9342 cmp r3, r2 + 7344 00c0 E1D0 beq .L1405 + 7345 00c2 02E0 b .L1407 + 7346 .L1436: + 7347 00c4 33F01003 bics r3, r3, #16 + 7348 00c8 DDD0 beq .L1405 + 7349 .L1407: + 7350 00ca 0120 movs r0, #1 + 7351 00cc 0023 movs r3, #0 + 7352 00ce 8CF83D00 strb r0, [ip, #61] + 7353 00d2 8CF83C30 strb r3, [ip, #60] + 7354 00d6 5DF8044B ldr r4, [sp], #4 + 7355 00da 7047 bx lr + 7356 .L1411: + 7357 00dc 0220 movs r0, #2 + 7358 00de 7047 bx lr + 7359 .L1409: + 7360 00e0 D1E90243 ldrd r4, r3, [r1, #8] + 7361 00e4 8268 ldr r2, [r0, #8] + 7362 00e6 0969 ldr r1, [r1, #16] + 7363 00e8 2343 orrs r3, r3, r4 + 7364 00ea 22F47F42 bic r2, r2, #65280 + 7365 00ee 43EA0123 orr r3, r3, r1, lsl #8 + 7366 00f2 1343 orrs r3, r3, r2 + 7367 00f4 8360 str r3, [r0, #8] + 7368 00f6 C6E7 b .L1405 + 7369 .L1401: + 7370 00f8 0B69 ldr r3, [r1, #16] + 7371 00fa 8C68 ldr r4, [r1, #8] + 7372 00fc 016A ldr r1, [r0, #32] + 7373 00fe 21F01001 bic r1, r1, #16 + 7374 0102 0162 str r1, [r0, #32] + 7375 0104 8269 ldr r2, [r0, #24] + 7376 0106 22F47042 bic r2, r2, #61440 + 7377 010a 42EA0332 orr r2, r2, r3, lsl #12 + 7378 010e 036A ldr r3, [r0, #32] + 7379 0110 8261 str r2, [r0, #24] + 7380 0112 23F0A003 bic r3, r3, #160 + 7381 0116 43EA0413 orr r3, r3, r4, lsl #4 + 7382 011a 0362 str r3, [r0, #32] + 7383 011c B3E7 b .L1405 + 7384 .L1403: + ARM GAS /tmp/cc6kdh5W.s page 128 + + + 7385 011e 052C cmp r4, #5 + 7386 0120 D3D0 beq .L1407 + 7387 0122 B4F1011F cmp r4, #65537 + 7388 0126 D0D0 beq .L1407 + 7389 0128 046A ldr r4, [r0, #32] + 7390 012a 026A ldr r2, [r0, #32] + 7391 012c 0969 ldr r1, [r1, #16] + 7392 012e 22F00102 bic r2, r2, #1 + 7393 0132 0262 str r2, [r0, #32] + 7394 0134 8369 ldr r3, [r0, #24] + 7395 0136 23F0F003 bic r3, r3, #240 + 7396 013a 43EA0113 orr r3, r3, r1, lsl #4 + 7397 013e 8361 str r3, [r0, #24] + 7398 0140 0462 str r4, [r0, #32] + 7399 0142 A0E7 b .L1405 + 7400 .L1438: + 7401 .align 2 + 7402 .L1437: + 7403 0144 30001000 .word 1048624 + 7404 0148 40001000 .word 1048640 + 7406 .section .text.HAL_TIM_SlaveConfigSynchro_IT,"ax",%progbits + 7407 .align 1 + 7408 .p2align 2,,3 + 7409 .global HAL_TIM_SlaveConfigSynchro_IT + 7410 .syntax unified + 7411 .thumb + 7412 .thumb_func + 7413 .fpu fpv4-sp-d16 + 7415 HAL_TIM_SlaveConfigSynchro_IT: + 7416 @ args = 0, pretend = 0, frame = 0 + 7417 @ frame_needed = 0, uses_anonymous_args = 0 + 7418 @ link register save eliminated. + 7419 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 7420 0004 012B cmp r3, #1 + 7421 0006 69D0 beq .L1451 + 7422 0008 8446 mov ip, r0 + 7423 000a 0122 movs r2, #1 + 7424 000c 0068 ldr r0, [r0] + 7425 000e 0223 movs r3, #2 + 7426 0010 10B4 push {r4} + 7427 0012 8CF83C20 strb r2, [ip, #60] + 7428 0016 8CF83D30 strb r3, [ip, #61] + 7429 001a 8268 ldr r2, [r0, #8] + 7430 001c 4B68 ldr r3, [r1, #4] + 7431 001e 0C68 ldr r4, [r1] + 7432 0020 22F44012 bic r2, r2, #3145728 + 7433 0024 22F07002 bic r2, r2, #112 + 7434 0028 1A43 orrs r2, r2, r3 + 7435 002a 22F48032 bic r2, r2, #65536 + 7436 002e 22F00702 bic r2, r2, #7 + 7437 0032 2243 orrs r2, r2, r4 + 7438 0034 602B cmp r3, #96 + 7439 0036 8260 str r2, [r0, #8] + 7440 0038 5ED0 beq .L1441 + 7441 003a 16D8 bhi .L1442 + 7442 003c 402B cmp r3, #64 + 7443 003e 6ED0 beq .L1443 + ARM GAS /tmp/cc6kdh5W.s page 129 + + + 7444 0040 33D9 bls .L1474 + 7445 0042 502B cmp r3, #80 + 7446 0044 41D1 bne .L1447 + 7447 0046 8A68 ldr r2, [r1, #8] + 7448 0048 0C69 ldr r4, [r1, #16] + 7449 004a 016A ldr r1, [r0, #32] + 7450 004c 21F00A01 bic r1, r1, #10 + 7451 0050 0A43 orrs r2, r2, r1 + 7452 0052 016A ldr r1, [r0, #32] + 7453 0054 21F00101 bic r1, r1, #1 + 7454 0058 0162 str r1, [r0, #32] + 7455 005a 8369 ldr r3, [r0, #24] + 7456 005c 23F0F003 bic r3, r3, #240 + 7457 0060 43EA0413 orr r3, r3, r4, lsl #4 + 7458 0064 8361 str r3, [r0, #24] + 7459 0066 0262 str r2, [r0, #32] + 7460 0068 0DE0 b .L1445 + 7461 .L1442: + 7462 006a 702B cmp r3, #112 + 7463 006c 38D0 beq .L1449 + 7464 006e 6F2B cmp r3, #111 + 7465 0070 2BD9 bls .L1447 + 7466 0072 344A ldr r2, .L1477 + 7467 0074 9342 cmp r3, r2 + 7468 0076 06D0 beq .L1445 + 7469 0078 1DD9 bls .L1475 + 7470 007a 334A ldr r2, .L1477+4 + 7471 007c 9342 cmp r3, r2 + 7472 007e 02D0 beq .L1445 + 7473 0080 3032 adds r2, r2, #48 + 7474 0082 9342 cmp r3, r2 + 7475 0084 21D1 bne .L1447 + 7476 .L1445: + 7477 0086 C368 ldr r3, [r0, #12] + 7478 0088 43F04003 orr r3, r3, #64 + 7479 008c C360 str r3, [r0, #12] + 7480 008e C368 ldr r3, [r0, #12] + 7481 0090 0022 movs r2, #0 + 7482 0092 0121 movs r1, #1 + 7483 0094 23F48043 bic r3, r3, #16384 + 7484 0098 C360 str r3, [r0, #12] + 7485 009a 8CF83D10 strb r1, [ip, #61] + 7486 009e 8CF83C20 strb r2, [ip, #60] + 7487 00a2 1046 mov r0, r2 + 7488 00a4 5DF8044B ldr r4, [sp], #4 + 7489 00a8 7047 bx lr + 7490 .L1474: + 7491 00aa 202B cmp r3, #32 + 7492 00ac EBD0 beq .L1445 + 7493 00ae 09D9 bls .L1476 + 7494 00b0 302B cmp r3, #48 + 7495 00b2 0AD1 bne .L1447 + 7496 00b4 E7E7 b .L1445 + 7497 .L1475: + 7498 00b6 B3F1101F cmp r3, #1048592 + 7499 00ba E4D0 beq .L1445 + 7500 00bc 103A subs r2, r2, #16 + ARM GAS /tmp/cc6kdh5W.s page 130 + + + 7501 00be 9342 cmp r3, r2 + 7502 00c0 E1D0 beq .L1445 + 7503 00c2 02E0 b .L1447 + 7504 .L1476: + 7505 00c4 33F01003 bics r3, r3, #16 + 7506 00c8 DDD0 beq .L1445 + 7507 .L1447: + 7508 00ca 0120 movs r0, #1 + 7509 00cc 0023 movs r3, #0 + 7510 00ce 8CF83D00 strb r0, [ip, #61] + 7511 00d2 8CF83C30 strb r3, [ip, #60] + 7512 00d6 5DF8044B ldr r4, [sp], #4 + 7513 00da 7047 bx lr + 7514 .L1451: + 7515 00dc 0220 movs r0, #2 + 7516 00de 7047 bx lr + 7517 .L1449: + 7518 00e0 D1E90243 ldrd r4, r3, [r1, #8] + 7519 00e4 8268 ldr r2, [r0, #8] + 7520 00e6 0969 ldr r1, [r1, #16] + 7521 00e8 2343 orrs r3, r3, r4 + 7522 00ea 22F47F42 bic r2, r2, #65280 + 7523 00ee 43EA0123 orr r3, r3, r1, lsl #8 + 7524 00f2 1343 orrs r3, r3, r2 + 7525 00f4 8360 str r3, [r0, #8] + 7526 00f6 C6E7 b .L1445 + 7527 .L1441: + 7528 00f8 0B69 ldr r3, [r1, #16] + 7529 00fa 8C68 ldr r4, [r1, #8] + 7530 00fc 016A ldr r1, [r0, #32] + 7531 00fe 21F01001 bic r1, r1, #16 + 7532 0102 0162 str r1, [r0, #32] + 7533 0104 8269 ldr r2, [r0, #24] + 7534 0106 22F47042 bic r2, r2, #61440 + 7535 010a 42EA0332 orr r2, r2, r3, lsl #12 + 7536 010e 036A ldr r3, [r0, #32] + 7537 0110 8261 str r2, [r0, #24] + 7538 0112 23F0A003 bic r3, r3, #160 + 7539 0116 43EA0413 orr r3, r3, r4, lsl #4 + 7540 011a 0362 str r3, [r0, #32] + 7541 011c B3E7 b .L1445 + 7542 .L1443: + 7543 011e 052C cmp r4, #5 + 7544 0120 D3D0 beq .L1447 + 7545 0122 B4F1011F cmp r4, #65537 + 7546 0126 D0D0 beq .L1447 + 7547 0128 046A ldr r4, [r0, #32] + 7548 012a 026A ldr r2, [r0, #32] + 7549 012c 0969 ldr r1, [r1, #16] + 7550 012e 22F00102 bic r2, r2, #1 + 7551 0132 0262 str r2, [r0, #32] + 7552 0134 8369 ldr r3, [r0, #24] + 7553 0136 23F0F003 bic r3, r3, #240 + 7554 013a 43EA0113 orr r3, r3, r1, lsl #4 + 7555 013e 8361 str r3, [r0, #24] + 7556 0140 0462 str r4, [r0, #32] + 7557 0142 A0E7 b .L1445 + ARM GAS /tmp/cc6kdh5W.s page 131 + + + 7558 .L1478: + 7559 .align 2 + 7560 .L1477: + 7561 0144 30001000 .word 1048624 + 7562 0148 40001000 .word 1048640 + 7564 .section .text.HAL_TIM_ReadCapturedValue,"ax",%progbits + 7565 .align 1 + 7566 .p2align 2,,3 + 7567 .global HAL_TIM_ReadCapturedValue + 7568 .syntax unified + 7569 .thumb + 7570 .thumb_func + 7571 .fpu fpv4-sp-d16 + 7573 HAL_TIM_ReadCapturedValue: + 7574 @ args = 0, pretend = 0, frame = 0 + 7575 @ frame_needed = 0, uses_anonymous_args = 0 + 7576 @ link register save eliminated. + 7577 0000 0C29 cmp r1, #12 + 7578 0002 08D8 bhi .L1486 + 7579 0004 DFE801F0 tbb [pc, r1] + 7580 .L1482: + 7581 0008 12 .byte (.L1485-.L1482)/2 + 7582 0009 07 .byte (.L1486-.L1482)/2 + 7583 000a 07 .byte (.L1486-.L1482)/2 + 7584 000b 07 .byte (.L1486-.L1482)/2 + 7585 000c 0F .byte (.L1484-.L1482)/2 + 7586 000d 07 .byte (.L1486-.L1482)/2 + 7587 000e 07 .byte (.L1486-.L1482)/2 + 7588 000f 07 .byte (.L1486-.L1482)/2 + 7589 0010 0C .byte (.L1483-.L1482)/2 + 7590 0011 07 .byte (.L1486-.L1482)/2 + 7591 0012 07 .byte (.L1486-.L1482)/2 + 7592 0013 07 .byte (.L1486-.L1482)/2 + 7593 0014 09 .byte (.L1481-.L1482)/2 + 7594 0015 00 .p2align 1 + 7595 .L1486: + 7596 0016 0020 movs r0, #0 + 7597 0018 7047 bx lr + 7598 .L1481: + 7599 001a 0368 ldr r3, [r0] + 7600 001c 186C ldr r0, [r3, #64] + 7601 001e 7047 bx lr + 7602 .L1483: + 7603 0020 0368 ldr r3, [r0] + 7604 0022 D86B ldr r0, [r3, #60] + 7605 0024 7047 bx lr + 7606 .L1484: + 7607 0026 0368 ldr r3, [r0] + 7608 0028 986B ldr r0, [r3, #56] + 7609 002a 7047 bx lr + 7610 .L1485: + 7611 002c 0368 ldr r3, [r0] + 7612 002e 586B ldr r0, [r3, #52] + 7613 0030 7047 bx lr + 7615 0032 00BF .section .text.HAL_TIM_PeriodElapsedCallback,"ax",%progbits + 7616 .align 1 + 7617 .p2align 2,,3 + ARM GAS /tmp/cc6kdh5W.s page 132 + + + 7618 .weak HAL_TIM_PeriodElapsedCallback + 7619 .syntax unified + 7620 .thumb + 7621 .thumb_func + 7622 .fpu fpv4-sp-d16 + 7624 HAL_TIM_PeriodElapsedCallback: + 7625 @ args = 0, pretend = 0, frame = 0 + 7626 @ frame_needed = 0, uses_anonymous_args = 0 + 7627 @ link register save eliminated. + 7628 0000 7047 bx lr + 7630 0002 00BF .section .text.TIM_DMAPeriodElapsedCplt,"ax",%progbits + 7631 .align 1 + 7632 .p2align 2,,3 + 7633 .syntax unified + 7634 .thumb + 7635 .thumb_func + 7636 .fpu fpv4-sp-d16 + 7638 TIM_DMAPeriodElapsedCplt: + 7639 @ args = 0, pretend = 0, frame = 0 + 7640 @ frame_needed = 0, uses_anonymous_args = 0 + 7641 0000 806A ldr r0, [r0, #40] + 7642 0002 08B5 push {r3, lr} + 7643 0004 036A ldr r3, [r0, #32] + 7644 0006 DB69 ldr r3, [r3, #28] + 7645 0008 13B9 cbnz r3, .L1489 + 7646 000a 0123 movs r3, #1 + 7647 000c 80F83D30 strb r3, [r0, #61] + 7648 .L1489: + 7649 0010 FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 7650 0014 08BD pop {r3, pc} + 7652 0016 00BF .section .text.HAL_TIM_PeriodElapsedHalfCpltCallback,"ax",%progbits + 7653 .align 1 + 7654 .p2align 2,,3 + 7655 .weak HAL_TIM_PeriodElapsedHalfCpltCallback + 7656 .syntax unified + 7657 .thumb + 7658 .thumb_func + 7659 .fpu fpv4-sp-d16 + 7661 HAL_TIM_PeriodElapsedHalfCpltCallback: + 7662 @ args = 0, pretend = 0, frame = 0 + 7663 @ frame_needed = 0, uses_anonymous_args = 0 + 7664 @ link register save eliminated. + 7665 0000 7047 bx lr + 7667 0002 00BF .section .text.TIM_DMAPeriodElapsedHalfCplt,"ax",%progbits + 7668 .align 1 + 7669 .p2align 2,,3 + 7670 .syntax unified + 7671 .thumb + 7672 .thumb_func + 7673 .fpu fpv4-sp-d16 + 7675 TIM_DMAPeriodElapsedHalfCplt: + 7676 @ args = 0, pretend = 0, frame = 0 + 7677 @ frame_needed = 0, uses_anonymous_args = 0 + 7678 0000 08B5 push {r3, lr} + 7679 0002 806A ldr r0, [r0, #40] + 7680 0004 FFF7FEFF bl HAL_TIM_PeriodElapsedHalfCpltCallback + 7681 0008 08BD pop {r3, pc} + ARM GAS /tmp/cc6kdh5W.s page 133 + + + 7683 000a 00BF .section .text.HAL_TIM_OC_DelayElapsedCallback,"ax",%progbits + 7684 .align 1 + 7685 .p2align 2,,3 + 7686 .weak HAL_TIM_OC_DelayElapsedCallback + 7687 .syntax unified + 7688 .thumb + 7689 .thumb_func + 7690 .fpu fpv4-sp-d16 + 7692 HAL_TIM_OC_DelayElapsedCallback: + 7693 @ args = 0, pretend = 0, frame = 0 + 7694 @ frame_needed = 0, uses_anonymous_args = 0 + 7695 @ link register save eliminated. + 7696 0000 7047 bx lr + 7698 0002 00BF .section .text.HAL_TIM_IC_CaptureCallback,"ax",%progbits + 7699 .align 1 + 7700 .p2align 2,,3 + 7701 .weak HAL_TIM_IC_CaptureCallback + 7702 .syntax unified + 7703 .thumb + 7704 .thumb_func + 7705 .fpu fpv4-sp-d16 + 7707 HAL_TIM_IC_CaptureCallback: + 7708 @ args = 0, pretend = 0, frame = 0 + 7709 @ frame_needed = 0, uses_anonymous_args = 0 + 7710 @ link register save eliminated. + 7711 0000 7047 bx lr + 7713 0002 00BF .section .text.TIM_DMACaptureCplt,"ax",%progbits + 7714 .align 1 + 7715 .p2align 2,,3 + 7716 .global TIM_DMACaptureCplt + 7717 .syntax unified + 7718 .thumb + 7719 .thumb_func + 7720 .fpu fpv4-sp-d16 + 7722 TIM_DMACaptureCplt: + 7723 @ args = 0, pretend = 0, frame = 0 + 7724 @ frame_needed = 0, uses_anonymous_args = 0 + 7725 0000 10B5 push {r4, lr} + 7726 0002 846A ldr r4, [r0, #40] + 7727 0004 636A ldr r3, [r4, #36] + 7728 0006 8342 cmp r3, r0 + 7729 0008 1ED0 beq .L1504 + 7730 000a A36A ldr r3, [r4, #40] + 7731 000c 8342 cmp r3, r0 + 7732 000e 0BD0 beq .L1505 + 7733 0010 E36A ldr r3, [r4, #44] + 7734 0012 8342 cmp r3, r0 + 7735 0014 27D0 beq .L1506 + 7736 0016 236B ldr r3, [r4, #48] + 7737 0018 8342 cmp r3, r0 + 7738 001a 2FD0 beq .L1507 + 7739 .L1499: + 7740 001c 2046 mov r0, r4 + 7741 001e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 7742 0022 0023 movs r3, #0 + 7743 0024 2377 strb r3, [r4, #28] + 7744 0026 10BD pop {r4, pc} + ARM GAS /tmp/cc6kdh5W.s page 134 + + + 7745 .L1505: + 7746 0028 0222 movs r2, #2 + 7747 002a 2277 strb r2, [r4, #28] + 7748 002c DB69 ldr r3, [r3, #28] + 7749 002e 002B cmp r3, #0 + 7750 0030 F4D1 bne .L1499 + 7751 0032 0123 movs r3, #1 + 7752 0034 84F83F30 strb r3, [r4, #63] + 7753 0038 2046 mov r0, r4 + 7754 003a 84F84530 strb r3, [r4, #69] + 7755 003e FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 7756 0042 0023 movs r3, #0 + 7757 0044 2377 strb r3, [r4, #28] + 7758 0046 10BD pop {r4, pc} + 7759 .L1504: + 7760 0048 0122 movs r2, #1 + 7761 004a 2277 strb r2, [r4, #28] + 7762 004c DB69 ldr r3, [r3, #28] + 7763 004e 002B cmp r3, #0 + 7764 0050 E4D1 bne .L1499 + 7765 0052 84F83E20 strb r2, [r4, #62] + 7766 0056 2046 mov r0, r4 + 7767 0058 84F84420 strb r2, [r4, #68] + 7768 005c FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 7769 0060 0023 movs r3, #0 + 7770 0062 2377 strb r3, [r4, #28] + 7771 0064 10BD pop {r4, pc} + 7772 .L1506: + 7773 0066 0422 movs r2, #4 + 7774 0068 2277 strb r2, [r4, #28] + 7775 006a DB69 ldr r3, [r3, #28] + 7776 006c 002B cmp r3, #0 + 7777 006e D5D1 bne .L1499 + 7778 0070 0123 movs r3, #1 + 7779 0072 84F84030 strb r3, [r4, #64] + 7780 0076 84F84630 strb r3, [r4, #70] + 7781 007a CFE7 b .L1499 + 7782 .L1507: + 7783 007c 0822 movs r2, #8 + 7784 007e 2277 strb r2, [r4, #28] + 7785 0080 DB69 ldr r3, [r3, #28] + 7786 0082 002B cmp r3, #0 + 7787 0084 CAD1 bne .L1499 + 7788 0086 0123 movs r3, #1 + 7789 0088 84F84130 strb r3, [r4, #65] + 7790 008c 84F84730 strb r3, [r4, #71] + 7791 0090 C4E7 b .L1499 + 7793 0092 00BF .section .text.HAL_TIM_IC_CaptureHalfCpltCallback,"ax",%progbits + 7794 .align 1 + 7795 .p2align 2,,3 + 7796 .weak HAL_TIM_IC_CaptureHalfCpltCallback + 7797 .syntax unified + 7798 .thumb + 7799 .thumb_func + 7800 .fpu fpv4-sp-d16 + 7802 HAL_TIM_IC_CaptureHalfCpltCallback: + 7803 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/cc6kdh5W.s page 135 + + + 7804 @ frame_needed = 0, uses_anonymous_args = 0 + 7805 @ link register save eliminated. + 7806 0000 7047 bx lr + 7808 0002 00BF .section .text.TIM_DMACaptureHalfCplt,"ax",%progbits + 7809 .align 1 + 7810 .p2align 2,,3 + 7811 .global TIM_DMACaptureHalfCplt + 7812 .syntax unified + 7813 .thumb + 7814 .thumb_func + 7815 .fpu fpv4-sp-d16 + 7817 TIM_DMACaptureHalfCplt: + 7818 @ args = 0, pretend = 0, frame = 0 + 7819 @ frame_needed = 0, uses_anonymous_args = 0 + 7820 0000 10B5 push {r4, lr} + 7821 0002 846A ldr r4, [r0, #40] + 7822 0004 636A ldr r3, [r4, #36] + 7823 0006 8342 cmp r3, r0 + 7824 0008 18D0 beq .L1515 + 7825 000a A36A ldr r3, [r4, #40] + 7826 000c 8342 cmp r3, r0 + 7827 000e 0DD0 beq .L1516 + 7828 0010 E36A ldr r3, [r4, #44] + 7829 0012 8342 cmp r3, r0 + 7830 0014 1AD0 beq .L1517 + 7831 0016 236B ldr r3, [r4, #48] + 7832 0018 8342 cmp r3, r0 + 7833 001a 04BF itt eq + 7834 001c 0823 moveq r3, #8 + 7835 001e 2377 strbeq r3, [r4, #28] + 7836 0020 2046 mov r0, r4 + 7837 0022 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 7838 0026 0023 movs r3, #0 + 7839 0028 2377 strb r3, [r4, #28] + 7840 002a 10BD pop {r4, pc} + 7841 .L1516: + 7842 002c 0223 movs r3, #2 + 7843 002e 2377 strb r3, [r4, #28] + 7844 0030 2046 mov r0, r4 + 7845 0032 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 7846 0036 0023 movs r3, #0 + 7847 0038 2377 strb r3, [r4, #28] + 7848 003a 10BD pop {r4, pc} + 7849 .L1515: + 7850 003c 0123 movs r3, #1 + 7851 003e 2377 strb r3, [r4, #28] + 7852 0040 2046 mov r0, r4 + 7853 0042 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 7854 0046 0023 movs r3, #0 + 7855 0048 2377 strb r3, [r4, #28] + 7856 004a 10BD pop {r4, pc} + 7857 .L1517: + 7858 004c 0423 movs r3, #4 + 7859 004e 2377 strb r3, [r4, #28] + 7860 0050 2046 mov r0, r4 + 7861 0052 FFF7FEFF bl HAL_TIM_IC_CaptureHalfCpltCallback + 7862 0056 0023 movs r3, #0 + ARM GAS /tmp/cc6kdh5W.s page 136 + + + 7863 0058 2377 strb r3, [r4, #28] + 7864 005a 10BD pop {r4, pc} + 7866 .section .text.HAL_TIM_PWM_PulseFinishedCallback,"ax",%progbits + 7867 .align 1 + 7868 .p2align 2,,3 + 7869 .weak HAL_TIM_PWM_PulseFinishedCallback + 7870 .syntax unified + 7871 .thumb + 7872 .thumb_func + 7873 .fpu fpv4-sp-d16 + 7875 HAL_TIM_PWM_PulseFinishedCallback: + 7876 @ args = 0, pretend = 0, frame = 0 + 7877 @ frame_needed = 0, uses_anonymous_args = 0 + 7878 @ link register save eliminated. + 7879 0000 7047 bx lr + 7881 0002 00BF .section .text.TIM_DMADelayPulseCplt,"ax",%progbits + 7882 .align 1 + 7883 .p2align 2,,3 + 7884 .syntax unified + 7885 .thumb + 7886 .thumb_func + 7887 .fpu fpv4-sp-d16 + 7889 TIM_DMADelayPulseCplt: + 7890 @ args = 0, pretend = 0, frame = 0 + 7891 @ frame_needed = 0, uses_anonymous_args = 0 + 7892 0000 10B5 push {r4, lr} + 7893 0002 846A ldr r4, [r0, #40] + 7894 0004 636A ldr r3, [r4, #36] + 7895 0006 8342 cmp r3, r0 + 7896 0008 1CD0 beq .L1527 + 7897 000a A36A ldr r3, [r4, #40] + 7898 000c 8342 cmp r3, r0 + 7899 000e 0BD0 beq .L1528 + 7900 0010 E36A ldr r3, [r4, #44] + 7901 0012 8342 cmp r3, r0 + 7902 0014 23D0 beq .L1529 + 7903 0016 236B ldr r3, [r4, #48] + 7904 0018 8342 cmp r3, r0 + 7905 001a 29D0 beq .L1530 + 7906 .L1522: + 7907 001c 2046 mov r0, r4 + 7908 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 7909 0022 0023 movs r3, #0 + 7910 0024 2377 strb r3, [r4, #28] + 7911 0026 10BD pop {r4, pc} + 7912 .L1528: + 7913 0028 0222 movs r2, #2 + 7914 002a 2277 strb r2, [r4, #28] + 7915 002c DB69 ldr r3, [r3, #28] + 7916 002e 002B cmp r3, #0 + 7917 0030 F4D1 bne .L1522 + 7918 0032 0123 movs r3, #1 + 7919 0034 84F83F30 strb r3, [r4, #63] + 7920 0038 2046 mov r0, r4 + 7921 003a FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 7922 003e 0023 movs r3, #0 + 7923 0040 2377 strb r3, [r4, #28] + ARM GAS /tmp/cc6kdh5W.s page 137 + + + 7924 0042 10BD pop {r4, pc} + 7925 .L1527: + 7926 0044 0122 movs r2, #1 + 7927 0046 2277 strb r2, [r4, #28] + 7928 0048 DB69 ldr r3, [r3, #28] + 7929 004a 002B cmp r3, #0 + 7930 004c E6D1 bne .L1522 + 7931 004e 84F83E20 strb r2, [r4, #62] + 7932 0052 2046 mov r0, r4 + 7933 0054 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 7934 0058 0023 movs r3, #0 + 7935 005a 2377 strb r3, [r4, #28] + 7936 005c 10BD pop {r4, pc} + 7937 .L1529: + 7938 005e 0422 movs r2, #4 + 7939 0060 2277 strb r2, [r4, #28] + 7940 0062 DB69 ldr r3, [r3, #28] + 7941 0064 002B cmp r3, #0 + 7942 0066 D9D1 bne .L1522 + 7943 0068 0123 movs r3, #1 + 7944 006a 84F84030 strb r3, [r4, #64] + 7945 006e D5E7 b .L1522 + 7946 .L1530: + 7947 0070 0822 movs r2, #8 + 7948 0072 2277 strb r2, [r4, #28] + 7949 0074 DB69 ldr r3, [r3, #28] + 7950 0076 002B cmp r3, #0 + 7951 0078 D0D1 bne .L1522 + 7952 007a 0123 movs r3, #1 + 7953 007c 84F84130 strb r3, [r4, #65] + 7954 0080 CCE7 b .L1522 + 7956 0082 00BF .section .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback,"ax",%progbits + 7957 .align 1 + 7958 .p2align 2,,3 + 7959 .weak HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 7960 .syntax unified + 7961 .thumb + 7962 .thumb_func + 7963 .fpu fpv4-sp-d16 + 7965 HAL_TIM_PWM_PulseFinishedHalfCpltCallback: + 7966 @ args = 0, pretend = 0, frame = 0 + 7967 @ frame_needed = 0, uses_anonymous_args = 0 + 7968 @ link register save eliminated. + 7969 0000 7047 bx lr + 7971 0002 00BF .section .text.TIM_DMADelayPulseHalfCplt,"ax",%progbits + 7972 .align 1 + 7973 .p2align 2,,3 + 7974 .global TIM_DMADelayPulseHalfCplt + 7975 .syntax unified + 7976 .thumb + 7977 .thumb_func + 7978 .fpu fpv4-sp-d16 + 7980 TIM_DMADelayPulseHalfCplt: + 7981 @ args = 0, pretend = 0, frame = 0 + 7982 @ frame_needed = 0, uses_anonymous_args = 0 + 7983 0000 10B5 push {r4, lr} + 7984 0002 846A ldr r4, [r0, #40] + ARM GAS /tmp/cc6kdh5W.s page 138 + + + 7985 0004 636A ldr r3, [r4, #36] + 7986 0006 8342 cmp r3, r0 + 7987 0008 18D0 beq .L1538 + 7988 000a A36A ldr r3, [r4, #40] + 7989 000c 8342 cmp r3, r0 + 7990 000e 0DD0 beq .L1539 + 7991 0010 E36A ldr r3, [r4, #44] + 7992 0012 8342 cmp r3, r0 + 7993 0014 1AD0 beq .L1540 + 7994 0016 236B ldr r3, [r4, #48] + 7995 0018 8342 cmp r3, r0 + 7996 001a 04BF itt eq + 7997 001c 0823 moveq r3, #8 + 7998 001e 2377 strbeq r3, [r4, #28] + 7999 0020 2046 mov r0, r4 + 8000 0022 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 8001 0026 0023 movs r3, #0 + 8002 0028 2377 strb r3, [r4, #28] + 8003 002a 10BD pop {r4, pc} + 8004 .L1539: + 8005 002c 0223 movs r3, #2 + 8006 002e 2377 strb r3, [r4, #28] + 8007 0030 2046 mov r0, r4 + 8008 0032 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 8009 0036 0023 movs r3, #0 + 8010 0038 2377 strb r3, [r4, #28] + 8011 003a 10BD pop {r4, pc} + 8012 .L1538: + 8013 003c 0123 movs r3, #1 + 8014 003e 2377 strb r3, [r4, #28] + 8015 0040 2046 mov r0, r4 + 8016 0042 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 8017 0046 0023 movs r3, #0 + 8018 0048 2377 strb r3, [r4, #28] + 8019 004a 10BD pop {r4, pc} + 8020 .L1540: + 8021 004c 0423 movs r3, #4 + 8022 004e 2377 strb r3, [r4, #28] + 8023 0050 2046 mov r0, r4 + 8024 0052 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedHalfCpltCallback + 8025 0056 0023 movs r3, #0 + 8026 0058 2377 strb r3, [r4, #28] + 8027 005a 10BD pop {r4, pc} + 8029 .section .text.HAL_TIM_TriggerCallback,"ax",%progbits + 8030 .align 1 + 8031 .p2align 2,,3 + 8032 .weak HAL_TIM_TriggerCallback + 8033 .syntax unified + 8034 .thumb + 8035 .thumb_func + 8036 .fpu fpv4-sp-d16 + 8038 HAL_TIM_TriggerCallback: + 8039 @ args = 0, pretend = 0, frame = 0 + 8040 @ frame_needed = 0, uses_anonymous_args = 0 + 8041 @ link register save eliminated. + 8042 0000 7047 bx lr + 8044 0002 00BF .section .text.HAL_TIM_IRQHandler,"ax",%progbits + ARM GAS /tmp/cc6kdh5W.s page 139 + + + 8045 .align 1 + 8046 .p2align 2,,3 + 8047 .global HAL_TIM_IRQHandler + 8048 .syntax unified + 8049 .thumb + 8050 .thumb_func + 8051 .fpu fpv4-sp-d16 + 8053 HAL_TIM_IRQHandler: + 8054 @ args = 0, pretend = 0, frame = 0 + 8055 @ frame_needed = 0, uses_anonymous_args = 0 + 8056 0000 0368 ldr r3, [r0] + 8057 0002 1A69 ldr r2, [r3, #16] + 8058 0004 9107 lsls r1, r2, #30 + 8059 0006 10B5 push {r4, lr} + 8060 0008 0446 mov r4, r0 + 8061 000a 03D5 bpl .L1543 + 8062 000c DA68 ldr r2, [r3, #12] + 8063 000e 9207 lsls r2, r2, #30 + 8064 0010 00F18A80 bmi .L1643 + 8065 .L1543: + 8066 0014 1A69 ldr r2, [r3, #16] + 8067 0016 5207 lsls r2, r2, #29 + 8068 0018 02D5 bpl .L1546 + 8069 001a DA68 ldr r2, [r3, #12] + 8070 001c 5007 lsls r0, r2, #29 + 8071 001e 70D4 bmi .L1644 + 8072 .L1546: + 8073 0020 1A69 ldr r2, [r3, #16] + 8074 0022 1107 lsls r1, r2, #28 + 8075 0024 02D5 bpl .L1549 + 8076 0026 DA68 ldr r2, [r3, #12] + 8077 0028 1207 lsls r2, r2, #28 + 8078 002a 58D4 bmi .L1645 + 8079 .L1549: + 8080 002c 1A69 ldr r2, [r3, #16] + 8081 002e D106 lsls r1, r2, #27 + 8082 0030 02D5 bpl .L1552 + 8083 0032 DA68 ldr r2, [r3, #12] + 8084 0034 D206 lsls r2, r2, #27 + 8085 0036 3ED4 bmi .L1646 + 8086 .L1552: + 8087 0038 1A69 ldr r2, [r3, #16] + 8088 003a D007 lsls r0, r2, #31 + 8089 003c 03D5 bpl .L1555 + 8090 003e DA68 ldr r2, [r3, #12] + 8091 0040 D107 lsls r1, r2, #31 + 8092 0042 00F18A80 bmi .L1647 + 8093 .L1555: + 8094 0046 1A69 ldr r2, [r3, #16] + 8095 0048 1206 lsls r2, r2, #24 + 8096 004a 03D5 bpl .L1556 + 8097 004c DA68 ldr r2, [r3, #12] + 8098 004e 1006 lsls r0, r2, #24 + 8099 0050 00F18B80 bmi .L1648 + 8100 .L1556: + 8101 0054 1A69 ldr r2, [r3, #16] + 8102 0056 D105 lsls r1, r2, #23 + ARM GAS /tmp/cc6kdh5W.s page 140 + + + 8103 0058 03D5 bpl .L1557 + 8104 005a DA68 ldr r2, [r3, #12] + 8105 005c 1206 lsls r2, r2, #24 + 8106 005e 00F18C80 bmi .L1649 + 8107 .L1557: + 8108 0062 1A69 ldr r2, [r3, #16] + 8109 0064 5006 lsls r0, r2, #25 + 8110 0066 03D5 bpl .L1558 + 8111 0068 DA68 ldr r2, [r3, #12] + 8112 006a 5106 lsls r1, r2, #25 + 8113 006c 00F18D80 bmi .L1650 + 8114 .L1558: + 8115 0070 1A69 ldr r2, [r3, #16] + 8116 0072 9206 lsls r2, r2, #26 + 8117 0074 03D5 bpl .L1559 + 8118 0076 DA68 ldr r2, [r3, #12] + 8119 0078 9006 lsls r0, r2, #26 + 8120 007a 00F18E80 bmi .L1651 + 8121 .L1559: + 8122 007e 1A69 ldr r2, [r3, #16] + 8123 0080 D102 lsls r1, r2, #11 + 8124 0082 03D5 bpl .L1560 + 8125 0084 DA68 ldr r2, [r3, #12] + 8126 0086 D202 lsls r2, r2, #11 + 8127 0088 00F18F80 bmi .L1652 + 8128 .L1560: + 8129 008c 1A69 ldr r2, [r3, #16] + 8130 008e 9002 lsls r0, r2, #10 + 8131 0090 03D5 bpl .L1561 + 8132 0092 DA68 ldr r2, [r3, #12] + 8133 0094 9102 lsls r1, r2, #10 + 8134 0096 00F19080 bmi .L1653 + 8135 .L1561: + 8136 009a 1A69 ldr r2, [r3, #16] + 8137 009c 5202 lsls r2, r2, #9 + 8138 009e 03D5 bpl .L1562 + 8139 00a0 DA68 ldr r2, [r3, #12] + 8140 00a2 5002 lsls r0, r2, #9 + 8141 00a4 00F19180 bmi .L1654 + 8142 .L1562: + 8143 00a8 1A69 ldr r2, [r3, #16] + 8144 00aa 1102 lsls r1, r2, #8 + 8145 00ac 02D5 bpl .L1542 + 8146 00ae DA68 ldr r2, [r3, #12] + 8147 00b0 1202 lsls r2, r2, #8 + 8148 00b2 4AD4 bmi .L1655 + 8149 .L1542: + 8150 00b4 10BD pop {r4, pc} + 8151 .L1646: + 8152 00b6 6FF01001 mvn r1, #16 + 8153 00ba 0822 movs r2, #8 + 8154 00bc 1961 str r1, [r3, #16] + 8155 00be 2277 strb r2, [r4, #28] + 8156 00c0 DB69 ldr r3, [r3, #28] + 8157 00c2 13F4407F tst r3, #768 + 8158 00c6 2046 mov r0, r4 + 8159 00c8 40F09080 bne .L1656 + ARM GAS /tmp/cc6kdh5W.s page 141 + + + 8160 00cc FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 8161 00d0 2046 mov r0, r4 + 8162 00d2 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 8163 .L1554: + 8164 00d6 0022 movs r2, #0 + 8165 00d8 2368 ldr r3, [r4] + 8166 00da 2277 strb r2, [r4, #28] + 8167 00dc ACE7 b .L1552 + 8168 .L1645: + 8169 00de 6FF00801 mvn r1, #8 + 8170 00e2 0422 movs r2, #4 + 8171 00e4 1961 str r1, [r3, #16] + 8172 00e6 2277 strb r2, [r4, #28] + 8173 00e8 DB69 ldr r3, [r3, #28] + 8174 00ea 9B07 lsls r3, r3, #30 + 8175 00ec 2046 mov r0, r4 + 8176 00ee 7AD1 bne .L1657 + 8177 00f0 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 8178 00f4 2046 mov r0, r4 + 8179 00f6 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 8180 .L1551: + 8181 00fa 0022 movs r2, #0 + 8182 00fc 2368 ldr r3, [r4] + 8183 00fe 2277 strb r2, [r4, #28] + 8184 0100 94E7 b .L1549 + 8185 .L1644: + 8186 0102 6FF00401 mvn r1, #4 + 8187 0106 0222 movs r2, #2 + 8188 0108 1961 str r1, [r3, #16] + 8189 010a 2277 strb r2, [r4, #28] + 8190 010c 9B69 ldr r3, [r3, #24] + 8191 010e 13F4407F tst r3, #768 + 8192 0112 2046 mov r0, r4 + 8193 0114 64D1 bne .L1658 + 8194 0116 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 8195 011a 2046 mov r0, r4 + 8196 011c FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 8197 .L1548: + 8198 0120 0022 movs r2, #0 + 8199 0122 2368 ldr r3, [r4] + 8200 0124 2277 strb r2, [r4, #28] + 8201 0126 7BE7 b .L1546 + 8202 .L1643: + 8203 0128 6FF00201 mvn r1, #2 + 8204 012c 0122 movs r2, #1 + 8205 012e 1961 str r1, [r3, #16] + 8206 0130 0277 strb r2, [r0, #28] + 8207 0132 9B69 ldr r3, [r3, #24] + 8208 0134 9907 lsls r1, r3, #30 + 8209 0136 50D1 bne .L1659 + 8210 0138 FFF7FEFF bl HAL_TIM_OC_DelayElapsedCallback + 8211 013c 2046 mov r0, r4 + 8212 013e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 8213 .L1545: + 8214 0142 0022 movs r2, #0 + 8215 0144 2368 ldr r3, [r4] + 8216 0146 2277 strb r2, [r4, #28] + ARM GAS /tmp/cc6kdh5W.s page 142 + + + 8217 0148 64E7 b .L1543 + 8218 .L1655: + 8219 014a 6FF40002 mvn r2, #8388608 + 8220 014e 2046 mov r0, r4 + 8221 0150 1A61 str r2, [r3, #16] + 8222 0152 BDE81040 pop {r4, lr} + 8223 0156 FFF7FEBF b HAL_TIMEx_TransitionErrorCallback + 8224 .L1647: + 8225 015a 6FF00102 mvn r2, #1 + 8226 015e 1A61 str r2, [r3, #16] + 8227 0160 2046 mov r0, r4 + 8228 0162 FFF7FEFF bl HAL_TIM_PeriodElapsedCallback + 8229 0166 2368 ldr r3, [r4] + 8230 0168 6DE7 b .L1555 + 8231 .L1648: + 8232 016a 6FF08002 mvn r2, #128 + 8233 016e 1A61 str r2, [r3, #16] + 8234 0170 2046 mov r0, r4 + 8235 0172 FFF7FEFF bl HAL_TIMEx_BreakCallback + 8236 0176 2368 ldr r3, [r4] + 8237 0178 6CE7 b .L1556 + 8238 .L1649: + 8239 017a 6FF48072 mvn r2, #256 + 8240 017e 1A61 str r2, [r3, #16] + 8241 0180 2046 mov r0, r4 + 8242 0182 FFF7FEFF bl HAL_TIMEx_Break2Callback + 8243 0186 2368 ldr r3, [r4] + 8244 0188 6BE7 b .L1557 + 8245 .L1650: + 8246 018a 6FF04002 mvn r2, #64 + 8247 018e 1A61 str r2, [r3, #16] + 8248 0190 2046 mov r0, r4 + 8249 0192 FFF7FEFF bl HAL_TIM_TriggerCallback + 8250 0196 2368 ldr r3, [r4] + 8251 0198 6AE7 b .L1558 + 8252 .L1651: + 8253 019a 6FF02002 mvn r2, #32 + 8254 019e 1A61 str r2, [r3, #16] + 8255 01a0 2046 mov r0, r4 + 8256 01a2 FFF7FEFF bl HAL_TIMEx_CommutCallback + 8257 01a6 2368 ldr r3, [r4] + 8258 01a8 69E7 b .L1559 + 8259 .L1652: + 8260 01aa 6FF48012 mvn r2, #1048576 + 8261 01ae 1A61 str r2, [r3, #16] + 8262 01b0 2046 mov r0, r4 + 8263 01b2 FFF7FEFF bl HAL_TIMEx_EncoderIndexCallback + 8264 01b6 2368 ldr r3, [r4] + 8265 01b8 68E7 b .L1560 + 8266 .L1653: + 8267 01ba 6FF40012 mvn r2, #2097152 + 8268 01be 1A61 str r2, [r3, #16] + 8269 01c0 2046 mov r0, r4 + 8270 01c2 FFF7FEFF bl HAL_TIMEx_DirectionChangeCallback + 8271 01c6 2368 ldr r3, [r4] + 8272 01c8 67E7 b .L1561 + 8273 .L1654: + ARM GAS /tmp/cc6kdh5W.s page 143 + + + 8274 01ca 6FF48002 mvn r2, #4194304 + 8275 01ce 1A61 str r2, [r3, #16] + 8276 01d0 2046 mov r0, r4 + 8277 01d2 FFF7FEFF bl HAL_TIMEx_IndexErrorCallback + 8278 01d6 2368 ldr r3, [r4] + 8279 01d8 66E7 b .L1562 + 8280 .L1659: + 8281 01da FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 8282 01de B0E7 b .L1545 + 8283 .L1658: + 8284 01e0 FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 8285 01e4 9CE7 b .L1548 + 8286 .L1657: + 8287 01e6 FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 8288 01ea 86E7 b .L1551 + 8289 .L1656: + 8290 01ec FFF7FEFF bl HAL_TIM_IC_CaptureCallback + 8291 01f0 71E7 b .L1554 + 8293 01f2 00BF .section .text.TIM_DMATriggerCplt,"ax",%progbits + 8294 .align 1 + 8295 .p2align 2,,3 + 8296 .syntax unified + 8297 .thumb + 8298 .thumb_func + 8299 .fpu fpv4-sp-d16 + 8301 TIM_DMATriggerCplt: + 8302 @ args = 0, pretend = 0, frame = 0 + 8303 @ frame_needed = 0, uses_anonymous_args = 0 + 8304 0000 806A ldr r0, [r0, #40] + 8305 0002 08B5 push {r3, lr} + 8306 0004 836B ldr r3, [r0, #56] + 8307 0006 DB69 ldr r3, [r3, #28] + 8308 0008 13B9 cbnz r3, .L1661 + 8309 000a 0123 movs r3, #1 + 8310 000c 80F83D30 strb r3, [r0, #61] + 8311 .L1661: + 8312 0010 FFF7FEFF bl HAL_TIM_TriggerCallback + 8313 0014 08BD pop {r3, pc} + 8315 0016 00BF .section .text.HAL_TIM_TriggerHalfCpltCallback,"ax",%progbits + 8316 .align 1 + 8317 .p2align 2,,3 + 8318 .weak HAL_TIM_TriggerHalfCpltCallback + 8319 .syntax unified + 8320 .thumb + 8321 .thumb_func + 8322 .fpu fpv4-sp-d16 + 8324 HAL_TIM_TriggerHalfCpltCallback: + 8325 @ args = 0, pretend = 0, frame = 0 + 8326 @ frame_needed = 0, uses_anonymous_args = 0 + 8327 @ link register save eliminated. + 8328 0000 7047 bx lr + 8330 0002 00BF .section .text.TIM_DMATriggerHalfCplt,"ax",%progbits + 8331 .align 1 + 8332 .p2align 2,,3 + 8333 .syntax unified + 8334 .thumb + 8335 .thumb_func + ARM GAS /tmp/cc6kdh5W.s page 144 + + + 8336 .fpu fpv4-sp-d16 + 8338 TIM_DMATriggerHalfCplt: + 8339 @ args = 0, pretend = 0, frame = 0 + 8340 @ frame_needed = 0, uses_anonymous_args = 0 + 8341 0000 08B5 push {r3, lr} + 8342 0002 806A ldr r0, [r0, #40] + 8343 0004 FFF7FEFF bl HAL_TIM_TriggerHalfCpltCallback + 8344 0008 08BD pop {r3, pc} + 8346 000a 00BF .section .text.HAL_TIM_ErrorCallback,"ax",%progbits + 8347 .align 1 + 8348 .p2align 2,,3 + 8349 .weak HAL_TIM_ErrorCallback + 8350 .syntax unified + 8351 .thumb + 8352 .thumb_func + 8353 .fpu fpv4-sp-d16 + 8355 HAL_TIM_ErrorCallback: + 8356 @ args = 0, pretend = 0, frame = 0 + 8357 @ frame_needed = 0, uses_anonymous_args = 0 + 8358 @ link register save eliminated. + 8359 0000 7047 bx lr + 8361 0002 00BF .section .text.TIM_DMAError,"ax",%progbits + 8362 .align 1 + 8363 .p2align 2,,3 + 8364 .global TIM_DMAError + 8365 .syntax unified + 8366 .thumb + 8367 .thumb_func + 8368 .fpu fpv4-sp-d16 + 8370 TIM_DMAError: + 8371 @ args = 0, pretend = 0, frame = 0 + 8372 @ frame_needed = 0, uses_anonymous_args = 0 + 8373 0000 10B5 push {r4, lr} + 8374 0002 846A ldr r4, [r0, #40] + 8375 0004 636A ldr r3, [r4, #36] + 8376 0006 8342 cmp r3, r0 + 8377 0008 1CD0 beq .L1674 + 8378 000a A36A ldr r3, [r4, #40] + 8379 000c 8342 cmp r3, r0 + 8380 000e 0ED0 beq .L1675 + 8381 0010 E36A ldr r3, [r4, #44] + 8382 0012 8342 cmp r3, r0 + 8383 0014 20D0 beq .L1676 + 8384 0016 236B ldr r3, [r4, #48] + 8385 0018 8342 cmp r3, r0 + 8386 001a 28D0 beq .L1677 + 8387 001c 0123 movs r3, #1 + 8388 001e 84F83D30 strb r3, [r4, #61] + 8389 0022 2046 mov r0, r4 + 8390 0024 FFF7FEFF bl HAL_TIM_ErrorCallback + 8391 0028 0023 movs r3, #0 + 8392 002a 2377 strb r3, [r4, #28] + 8393 002c 10BD pop {r4, pc} + 8394 .L1675: + 8395 002e 0123 movs r3, #1 + 8396 0030 0222 movs r2, #2 + 8397 0032 84F83F30 strb r3, [r4, #63] + ARM GAS /tmp/cc6kdh5W.s page 145 + + + 8398 0036 2277 strb r2, [r4, #28] + 8399 0038 2046 mov r0, r4 + 8400 003a FFF7FEFF bl HAL_TIM_ErrorCallback + 8401 003e 0023 movs r3, #0 + 8402 0040 2377 strb r3, [r4, #28] + 8403 0042 10BD pop {r4, pc} + 8404 .L1674: + 8405 0044 0123 movs r3, #1 + 8406 0046 2377 strb r3, [r4, #28] + 8407 0048 84F83E30 strb r3, [r4, #62] + 8408 004c 2046 mov r0, r4 + 8409 004e FFF7FEFF bl HAL_TIM_ErrorCallback + 8410 0052 0023 movs r3, #0 + 8411 0054 2377 strb r3, [r4, #28] + 8412 0056 10BD pop {r4, pc} + 8413 .L1676: + 8414 0058 0123 movs r3, #1 + 8415 005a 0422 movs r2, #4 + 8416 005c 84F84030 strb r3, [r4, #64] + 8417 0060 2277 strb r2, [r4, #28] + 8418 0062 2046 mov r0, r4 + 8419 0064 FFF7FEFF bl HAL_TIM_ErrorCallback + 8420 0068 0023 movs r3, #0 + 8421 006a 2377 strb r3, [r4, #28] + 8422 006c 10BD pop {r4, pc} + 8423 .L1677: + 8424 006e 0123 movs r3, #1 + 8425 0070 0822 movs r2, #8 + 8426 0072 84F84130 strb r3, [r4, #65] + 8427 0076 2277 strb r2, [r4, #28] + 8428 0078 2046 mov r0, r4 + 8429 007a FFF7FEFF bl HAL_TIM_ErrorCallback + 8430 007e 0023 movs r3, #0 + 8431 0080 2377 strb r3, [r4, #28] + 8432 0082 10BD pop {r4, pc} + 8434 .section .text.HAL_TIM_Base_GetState,"ax",%progbits + 8435 .align 1 + 8436 .p2align 2,,3 + 8437 .global HAL_TIM_Base_GetState + 8438 .syntax unified + 8439 .thumb + 8440 .thumb_func + 8441 .fpu fpv4-sp-d16 + 8443 HAL_TIM_Base_GetState: + 8444 @ args = 0, pretend = 0, frame = 0 + 8445 @ frame_needed = 0, uses_anonymous_args = 0 + 8446 @ link register save eliminated. + 8447 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 8448 0004 7047 bx lr + 8450 0006 00BF .section .text.HAL_TIM_OC_GetState,"ax",%progbits + 8451 .align 1 + 8452 .p2align 2,,3 + 8453 .global HAL_TIM_OC_GetState + 8454 .syntax unified + 8455 .thumb + 8456 .thumb_func + 8457 .fpu fpv4-sp-d16 + ARM GAS /tmp/cc6kdh5W.s page 146 + + + 8459 HAL_TIM_OC_GetState: + 8460 @ args = 0, pretend = 0, frame = 0 + 8461 @ frame_needed = 0, uses_anonymous_args = 0 + 8462 @ link register save eliminated. + 8463 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 8464 0004 7047 bx lr + 8466 0006 00BF .section .text.HAL_TIM_PWM_GetState,"ax",%progbits + 8467 .align 1 + 8468 .p2align 2,,3 + 8469 .global HAL_TIM_PWM_GetState + 8470 .syntax unified + 8471 .thumb + 8472 .thumb_func + 8473 .fpu fpv4-sp-d16 + 8475 HAL_TIM_PWM_GetState: + 8476 @ args = 0, pretend = 0, frame = 0 + 8477 @ frame_needed = 0, uses_anonymous_args = 0 + 8478 @ link register save eliminated. + 8479 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 8480 0004 7047 bx lr + 8482 0006 00BF .section .text.HAL_TIM_IC_GetState,"ax",%progbits + 8483 .align 1 + 8484 .p2align 2,,3 + 8485 .global HAL_TIM_IC_GetState + 8486 .syntax unified + 8487 .thumb + 8488 .thumb_func + 8489 .fpu fpv4-sp-d16 + 8491 HAL_TIM_IC_GetState: + 8492 @ args = 0, pretend = 0, frame = 0 + 8493 @ frame_needed = 0, uses_anonymous_args = 0 + 8494 @ link register save eliminated. + 8495 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 8496 0004 7047 bx lr + 8498 0006 00BF .section .text.HAL_TIM_OnePulse_GetState,"ax",%progbits + 8499 .align 1 + 8500 .p2align 2,,3 + 8501 .global HAL_TIM_OnePulse_GetState + 8502 .syntax unified + 8503 .thumb + 8504 .thumb_func + 8505 .fpu fpv4-sp-d16 + 8507 HAL_TIM_OnePulse_GetState: + 8508 @ args = 0, pretend = 0, frame = 0 + 8509 @ frame_needed = 0, uses_anonymous_args = 0 + 8510 @ link register save eliminated. + 8511 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 8512 0004 7047 bx lr + 8514 0006 00BF .section .text.HAL_TIM_Encoder_GetState,"ax",%progbits + 8515 .align 1 + 8516 .p2align 2,,3 + 8517 .global HAL_TIM_Encoder_GetState + 8518 .syntax unified + 8519 .thumb + 8520 .thumb_func + 8521 .fpu fpv4-sp-d16 + 8523 HAL_TIM_Encoder_GetState: + ARM GAS /tmp/cc6kdh5W.s page 147 + + + 8524 @ args = 0, pretend = 0, frame = 0 + 8525 @ frame_needed = 0, uses_anonymous_args = 0 + 8526 @ link register save eliminated. + 8527 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 8528 0004 7047 bx lr + 8530 0006 00BF .section .text.HAL_TIM_GetActiveChannel,"ax",%progbits + 8531 .align 1 + 8532 .p2align 2,,3 + 8533 .global HAL_TIM_GetActiveChannel + 8534 .syntax unified + 8535 .thumb + 8536 .thumb_func + 8537 .fpu fpv4-sp-d16 + 8539 HAL_TIM_GetActiveChannel: + 8540 @ args = 0, pretend = 0, frame = 0 + 8541 @ frame_needed = 0, uses_anonymous_args = 0 + 8542 @ link register save eliminated. + 8543 0000 007F ldrb r0, [r0, #28] @ zero_extendqisi2 + 8544 0002 7047 bx lr + 8546 .section .text.HAL_TIM_GetChannelState,"ax",%progbits + 8547 .align 1 + 8548 .p2align 2,,3 + 8549 .global HAL_TIM_GetChannelState + 8550 .syntax unified + 8551 .thumb + 8552 .thumb_func + 8553 .fpu fpv4-sp-d16 + 8555 HAL_TIM_GetChannelState: + 8556 @ args = 0, pretend = 0, frame = 0 + 8557 @ frame_needed = 0, uses_anonymous_args = 0 + 8558 @ link register save eliminated. + 8559 0000 19B9 cbnz r1, .L1686 + 8560 0002 90F83E00 ldrb r0, [r0, #62] @ zero_extendqisi2 + 8561 0006 C0B2 uxtb r0, r0 + 8562 0008 7047 bx lr + 8563 .L1686: + 8564 000a 0429 cmp r1, #4 + 8565 000c 0BD0 beq .L1692 + 8566 000e 0829 cmp r1, #8 + 8567 0010 11D0 beq .L1693 + 8568 0012 0C29 cmp r1, #12 + 8569 0014 0BD0 beq .L1694 + 8570 0016 1029 cmp r1, #16 + 8571 0018 0CBF ite eq + 8572 001a 90F84200 ldrbeq r0, [r0, #66] @ zero_extendqisi2 + 8573 001e 90F84300 ldrbne r0, [r0, #67] @ zero_extendqisi2 + 8574 0022 C0B2 uxtb r0, r0 + 8575 0024 7047 bx lr + 8576 .L1692: + 8577 0026 90F83F00 ldrb r0, [r0, #63] @ zero_extendqisi2 + 8578 002a C0B2 uxtb r0, r0 + 8579 002c 7047 bx lr + 8580 .L1694: + 8581 002e 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2 + 8582 0032 C0B2 uxtb r0, r0 + 8583 0034 7047 bx lr + 8584 .L1693: + ARM GAS /tmp/cc6kdh5W.s page 148 + + + 8585 0036 90F84000 ldrb r0, [r0, #64] @ zero_extendqisi2 + 8586 003a C0B2 uxtb r0, r0 + 8587 003c 7047 bx lr + 8589 003e 00BF .section .text.HAL_TIM_DMABurstState,"ax",%progbits + 8590 .align 1 + 8591 .p2align 2,,3 + 8592 .global HAL_TIM_DMABurstState + 8593 .syntax unified + 8594 .thumb + 8595 .thumb_func + 8596 .fpu fpv4-sp-d16 + 8598 HAL_TIM_DMABurstState: + 8599 @ args = 0, pretend = 0, frame = 0 + 8600 @ frame_needed = 0, uses_anonymous_args = 0 + 8601 @ link register save eliminated. + 8602 0000 90F84800 ldrb r0, [r0, #72] @ zero_extendqisi2 + 8603 0004 7047 bx lr + 8605 0006 00BF .section .text.TIM_Base_SetConfig,"ax",%progbits + 8606 .align 1 + 8607 .p2align 2,,3 + 8608 .global TIM_Base_SetConfig + 8609 .syntax unified + 8610 .thumb + 8611 .thumb_func + 8612 .fpu fpv4-sp-d16 + 8614 TIM_Base_SetConfig: + 8615 @ args = 0, pretend = 0, frame = 0 + 8616 @ frame_needed = 0, uses_anonymous_args = 0 + 8617 @ link register save eliminated. + 8618 0000 324A ldr r2, .L1713 + 8619 0002 0368 ldr r3, [r0] + 8620 0004 9042 cmp r0, r2 + 8621 0006 30B4 push {r4, r5} + 8622 0008 39D0 beq .L1697 + 8623 000a B0F1804F cmp r0, #1073741824 + 8624 000e 21D0 beq .L1699 + 8625 0010 A2F59432 sub r2, r2, #75776 + 8626 0014 9042 cmp r0, r2 + 8627 0016 1DD0 beq .L1699 + 8628 0018 02F58062 add r2, r2, #1024 + 8629 001c 9042 cmp r0, r2 + 8630 001e 19D0 beq .L1699 + 8631 0020 02F59632 add r2, r2, #76800 + 8632 0024 9042 cmp r0, r2 + 8633 0026 41D0 beq .L1701 + 8634 0028 02F54062 add r2, r2, #3072 + 8635 002c 9042 cmp r0, r2 + 8636 002e 47D0 beq .L1702 + 8637 0030 02F58062 add r2, r2, #1024 + 8638 0034 9042 cmp r0, r2 + 8639 0036 43D0 beq .L1702 + 8640 0038 02F58062 add r2, r2, #1024 + 8641 003c 9042 cmp r0, r2 + 8642 003e 3FD0 beq .L1702 + 8643 0040 4D69 ldr r5, [r1, #20] + 8644 0042 8C68 ldr r4, [r1, #8] + 8645 0044 0A68 ldr r2, [r1] + ARM GAS /tmp/cc6kdh5W.s page 149 + + + 8646 0046 23F08003 bic r3, r3, #128 + 8647 004a 2B43 orrs r3, r3, r5 + 8648 004c 0360 str r3, [r0] + 8649 004e C462 str r4, [r0, #44] + 8650 0050 8262 str r2, [r0, #40] + 8651 0052 10E0 b .L1706 + 8652 .L1699: + 8653 0054 4A68 ldr r2, [r1, #4] + 8654 0056 CC68 ldr r4, [r1, #12] + 8655 0058 23F07003 bic r3, r3, #112 + 8656 005c 1343 orrs r3, r3, r2 + 8657 005e 23F44073 bic r3, r3, #768 + 8658 0062 4A69 ldr r2, [r1, #20] + 8659 0064 2343 orrs r3, r3, r4 + 8660 0066 23F08003 bic r3, r3, #128 + 8661 006a 8C68 ldr r4, [r1, #8] + 8662 006c 1343 orrs r3, r3, r2 + 8663 006e 0A68 ldr r2, [r1] + 8664 0070 0360 str r3, [r0] + 8665 0072 C462 str r4, [r0, #44] + 8666 0074 8262 str r2, [r0, #40] + 8667 .L1706: + 8668 0076 0123 movs r3, #1 + 8669 0078 30BC pop {r4, r5} + 8670 007a 4361 str r3, [r0, #20] + 8671 007c 7047 bx lr + 8672 .L1697: + 8673 007e 4C68 ldr r4, [r1, #4] + 8674 0080 CA68 ldr r2, [r1, #12] + 8675 0082 23F07003 bic r3, r3, #112 + 8676 0086 2343 orrs r3, r3, r4 + 8677 0088 23F44073 bic r3, r3, #768 + 8678 008c 1343 orrs r3, r3, r2 + 8679 008e 4A69 ldr r2, [r1, #20] + 8680 .L1712: + 8681 0090 23F08003 bic r3, r3, #128 + 8682 0094 1343 orrs r3, r3, r2 + 8683 0096 0360 str r3, [r0] + 8684 0098 8B68 ldr r3, [r1, #8] + 8685 009a C362 str r3, [r0, #44] + 8686 009c 0B68 ldr r3, [r1] + 8687 009e 8362 str r3, [r0, #40] + 8688 00a0 0B69 ldr r3, [r1, #16] + 8689 00a2 0363 str r3, [r0, #48] + 8690 00a4 0123 movs r3, #1 + 8691 00a6 30BC pop {r4, r5} + 8692 00a8 4361 str r3, [r0, #20] + 8693 00aa 7047 bx lr + 8694 .L1701: + 8695 00ac 4C68 ldr r4, [r1, #4] + 8696 00ae CA68 ldr r2, [r1, #12] + 8697 00b0 23F07003 bic r3, r3, #112 + 8698 00b4 2343 orrs r3, r3, r4 + 8699 00b6 23F44073 bic r3, r3, #768 + 8700 00ba 1343 orrs r3, r3, r2 + 8701 00bc 4A69 ldr r2, [r1, #20] + 8702 00be E7E7 b .L1712 + ARM GAS /tmp/cc6kdh5W.s page 150 + + + 8703 .L1702: + 8704 00c0 CC68 ldr r4, [r1, #12] + 8705 00c2 4A69 ldr r2, [r1, #20] + 8706 00c4 23F44073 bic r3, r3, #768 + 8707 00c8 2343 orrs r3, r3, r4 + 8708 00ca E1E7 b .L1712 + 8709 .L1714: + 8710 .align 2 + 8711 .L1713: + 8712 00cc 002C0140 .word 1073818624 + 8714 .section .text.TIM_OC2_SetConfig,"ax",%progbits + 8715 .align 1 + 8716 .p2align 2,,3 + 8717 .global TIM_OC2_SetConfig + 8718 .syntax unified + 8719 .thumb + 8720 .thumb_func + 8721 .fpu fpv4-sp-d16 + 8723 TIM_OC2_SetConfig: + 8724 @ args = 0, pretend = 0, frame = 0 + 8725 @ frame_needed = 0, uses_anonymous_args = 0 + 8726 @ link register save eliminated. + 8727 0000 036A ldr r3, [r0, #32] + 8728 0002 23F01003 bic r3, r3, #16 + 8729 0006 0362 str r3, [r0, #32] + 8730 0008 036A ldr r3, [r0, #32] + 8731 000a 70B4 push {r4, r5, r6} + 8732 000c 4468 ldr r4, [r0, #4] + 8733 000e 8269 ldr r2, [r0, #24] + 8734 0010 0D68 ldr r5, [r1] + 8735 0012 22F08072 bic r2, r2, #16777216 + 8736 0016 22F4E642 bic r2, r2, #29440 + 8737 001a 42EA0522 orr r2, r2, r5, lsl #8 + 8738 001e 8D68 ldr r5, [r1, #8] + 8739 0020 23F02003 bic r3, r3, #32 + 8740 0024 43EA0513 orr r3, r3, r5, lsl #4 + 8741 0028 144D ldr r5, .L1722 + 8742 002a A842 cmp r0, r5 + 8743 002c 10D0 beq .L1717 + 8744 002e 05F50065 add r5, r5, #2048 + 8745 0032 A842 cmp r0, r5 + 8746 0034 0CD0 beq .L1717 + 8747 0036 05F54065 add r5, r5, #3072 + 8748 003a A842 cmp r0, r5 + 8749 003c 0FD0 beq .L1718 + 8750 003e 05F58065 add r5, r5, #1024 + 8751 0042 A842 cmp r0, r5 + 8752 0044 0BD0 beq .L1718 + 8753 0046 05F58065 add r5, r5, #1024 + 8754 004a A842 cmp r0, r5 + 8755 004c 0FD1 bne .L1719 + 8756 004e 06E0 b .L1718 + 8757 .L1717: + 8758 0050 CD68 ldr r5, [r1, #12] + 8759 0052 23F08003 bic r3, r3, #128 + 8760 0056 43EA0513 orr r3, r3, r5, lsl #4 + 8761 005a 23F04003 bic r3, r3, #64 + ARM GAS /tmp/cc6kdh5W.s page 151 + + + 8762 .L1718: + 8763 005e D1E90565 ldrd r6, r5, [r1, #20] + 8764 0062 24F44064 bic r4, r4, #3072 + 8765 0066 46EA050C orr ip, r6, r5 + 8766 006a 44EA8C04 orr r4, r4, ip, lsl #2 + 8767 .L1719: + 8768 006e 4968 ldr r1, [r1, #4] + 8769 0070 4460 str r4, [r0, #4] + 8770 0072 8261 str r2, [r0, #24] + 8771 0074 70BC pop {r4, r5, r6} + 8772 0076 8163 str r1, [r0, #56] + 8773 0078 0362 str r3, [r0, #32] + 8774 007a 7047 bx lr + 8775 .L1723: + 8776 .align 2 + 8777 .L1722: + 8778 007c 002C0140 .word 1073818624 + 8780 .section .text.HAL_TIM_OC_ConfigChannel,"ax",%progbits + 8781 .align 1 + 8782 .p2align 2,,3 + 8783 .global HAL_TIM_OC_ConfigChannel + 8784 .syntax unified + 8785 .thumb + 8786 .thumb_func + 8787 .fpu fpv4-sp-d16 + 8789 HAL_TIM_OC_ConfigChannel: + 8790 @ args = 0, pretend = 0, frame = 0 + 8791 @ frame_needed = 0, uses_anonymous_args = 0 + 8792 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 8793 0004 012B cmp r3, #1 + 8794 0006 00F0A480 beq .L1738 + 8795 000a 0123 movs r3, #1 + 8796 000c 70B5 push {r4, r5, r6, lr} + 8797 000e 0446 mov r4, r0 + 8798 0010 80F83C30 strb r3, [r0, #60] + 8799 0014 142A cmp r2, #20 + 8800 0016 0CD8 bhi .L1739 + 8801 0018 DFE802F0 tbb [pc, r2] + 8802 .L1728: + 8803 001c 46 .byte (.L1733-.L1728)/2 + 8804 001d 0B .byte (.L1739-.L1728)/2 + 8805 001e 0B .byte (.L1739-.L1728)/2 + 8806 001f 0B .byte (.L1739-.L1728)/2 + 8807 0020 4E .byte (.L1732-.L1728)/2 + 8808 0021 0B .byte (.L1739-.L1728)/2 + 8809 0022 0B .byte (.L1739-.L1728)/2 + 8810 0023 0B .byte (.L1739-.L1728)/2 + 8811 0024 56 .byte (.L1731-.L1728)/2 + 8812 0025 0B .byte (.L1739-.L1728)/2 + 8813 0026 0B .byte (.L1739-.L1728)/2 + 8814 0027 0B .byte (.L1739-.L1728)/2 + 8815 0028 5E .byte (.L1730-.L1728)/2 + 8816 0029 0B .byte (.L1739-.L1728)/2 + 8817 002a 0B .byte (.L1739-.L1728)/2 + 8818 002b 0B .byte (.L1739-.L1728)/2 + 8819 002c 66 .byte (.L1729-.L1728)/2 + 8820 002d 0B .byte (.L1739-.L1728)/2 + ARM GAS /tmp/cc6kdh5W.s page 152 + + + 8821 002e 0B .byte (.L1739-.L1728)/2 + 8822 002f 0B .byte (.L1739-.L1728)/2 + 8823 0030 10 .byte (.L1727-.L1728)/2 + 8824 0031 00 .p2align 1 + 8825 .L1739: + 8826 0032 0023 movs r3, #0 + 8827 0034 84F83C30 strb r3, [r4, #60] + 8828 0038 0120 movs r0, #1 + 8829 003a 70BD pop {r4, r5, r6, pc} + 8830 .L1727: + 8831 003c 0368 ldr r3, [r0] + 8832 003e 0E68 ldr r6, [r1] + 8833 0040 1A6A ldr r2, [r3, #32] + 8834 0042 22F48012 bic r2, r2, #1048576 + 8835 0046 1A62 str r2, [r3, #32] + 8836 0048 1A6A ldr r2, [r3, #32] + 8837 004a 5D68 ldr r5, [r3, #4] + 8838 004c 186D ldr r0, [r3, #80] + 8839 004e 20F08070 bic r0, r0, #16777216 + 8840 0052 20F4E040 bic r0, r0, #28672 + 8841 0056 40EA0620 orr r0, r0, r6, lsl #8 + 8842 005a 8E68 ldr r6, [r1, #8] + 8843 005c 22F40012 bic r2, r2, #2097152 + 8844 0060 42EA0652 orr r2, r2, r6, lsl #20 + 8845 0064 3C4E ldr r6, .L1744 + 8846 0066 B342 cmp r3, r6 + 8847 0068 0FD0 beq .L1736 + 8848 006a 06F50066 add r6, r6, #2048 + 8849 006e B342 cmp r3, r6 + 8850 0070 0BD0 beq .L1736 + 8851 0072 06F54066 add r6, r6, #3072 + 8852 0076 B342 cmp r3, r6 + 8853 0078 07D0 beq .L1736 + 8854 007a 06F58066 add r6, r6, #1024 + 8855 007e B342 cmp r3, r6 + 8856 0080 03D0 beq .L1736 + 8857 0082 06F58066 add r6, r6, #1024 + 8858 0086 B342 cmp r3, r6 + 8859 0088 04D1 bne .L1737 + 8860 .L1736: + 8861 008a 4E69 ldr r6, [r1, #20] + 8862 008c 25F48025 bic r5, r5, #262144 + 8863 0090 45EA8625 orr r5, r5, r6, lsl #10 + 8864 .L1737: + 8865 0094 4968 ldr r1, [r1, #4] + 8866 0096 5D60 str r5, [r3, #4] + 8867 0098 1865 str r0, [r3, #80] + 8868 009a D964 str r1, [r3, #76] + 8869 009c 1A62 str r2, [r3, #32] + 8870 009e 0023 movs r3, #0 + 8871 00a0 84F83C30 strb r3, [r4, #60] + 8872 00a4 0020 movs r0, #0 + 8873 00a6 70BD pop {r4, r5, r6, pc} + 8874 .L1733: + 8875 00a8 0068 ldr r0, [r0] + 8876 00aa FFF7FEFF bl TIM_OC1_SetConfig + 8877 00ae 0023 movs r3, #0 + ARM GAS /tmp/cc6kdh5W.s page 153 + + + 8878 00b0 84F83C30 strb r3, [r4, #60] + 8879 00b4 0020 movs r0, #0 + 8880 00b6 70BD pop {r4, r5, r6, pc} + 8881 .L1732: + 8882 00b8 0068 ldr r0, [r0] + 8883 00ba FFF7FEFF bl TIM_OC2_SetConfig + 8884 00be 0023 movs r3, #0 + 8885 00c0 84F83C30 strb r3, [r4, #60] + 8886 00c4 0020 movs r0, #0 + 8887 00c6 70BD pop {r4, r5, r6, pc} + 8888 .L1731: + 8889 00c8 0068 ldr r0, [r0] + 8890 00ca FFF7FEFF bl TIM_OC3_SetConfig + 8891 00ce 0023 movs r3, #0 + 8892 00d0 84F83C30 strb r3, [r4, #60] + 8893 00d4 0020 movs r0, #0 + 8894 00d6 70BD pop {r4, r5, r6, pc} + 8895 .L1730: + 8896 00d8 0068 ldr r0, [r0] + 8897 00da FFF7FEFF bl TIM_OC4_SetConfig + 8898 00de 0023 movs r3, #0 + 8899 00e0 84F83C30 strb r3, [r4, #60] + 8900 00e4 0020 movs r0, #0 + 8901 00e6 70BD pop {r4, r5, r6, pc} + 8902 .L1729: + 8903 00e8 0368 ldr r3, [r0] + 8904 00ea 0E68 ldr r6, [r1] + 8905 00ec 1A6A ldr r2, [r3, #32] + 8906 00ee 22F48032 bic r2, r2, #65536 + 8907 00f2 1A62 str r2, [r3, #32] + 8908 00f4 1A6A ldr r2, [r3, #32] + 8909 00f6 5D68 ldr r5, [r3, #4] + 8910 00f8 186D ldr r0, [r3, #80] + 8911 00fa 20F48030 bic r0, r0, #65536 + 8912 00fe 20F07000 bic r0, r0, #112 + 8913 0102 3043 orrs r0, r0, r6 + 8914 0104 8E68 ldr r6, [r1, #8] + 8915 0106 22F40032 bic r2, r2, #131072 + 8916 010a 42EA0642 orr r2, r2, r6, lsl #16 + 8917 010e 124E ldr r6, .L1744 + 8918 0110 B342 cmp r3, r6 + 8919 0112 0FD0 beq .L1734 + 8920 0114 06F50066 add r6, r6, #2048 + 8921 0118 B342 cmp r3, r6 + 8922 011a 0BD0 beq .L1734 + 8923 011c 06F54066 add r6, r6, #3072 + 8924 0120 B342 cmp r3, r6 + 8925 0122 07D0 beq .L1734 + 8926 0124 06F58066 add r6, r6, #1024 + 8927 0128 B342 cmp r3, r6 + 8928 012a 03D0 beq .L1734 + 8929 012c 06F58066 add r6, r6, #1024 + 8930 0130 B342 cmp r3, r6 + 8931 0132 04D1 bne .L1735 + 8932 .L1734: + 8933 0134 4E69 ldr r6, [r1, #20] + 8934 0136 25F48035 bic r5, r5, #65536 + ARM GAS /tmp/cc6kdh5W.s page 154 + + + 8935 013a 45EA0625 orr r5, r5, r6, lsl #8 + 8936 .L1735: + 8937 013e 4968 ldr r1, [r1, #4] + 8938 0140 5D60 str r5, [r3, #4] + 8939 0142 1865 str r0, [r3, #80] + 8940 0144 9964 str r1, [r3, #72] + 8941 0146 1A62 str r2, [r3, #32] + 8942 0148 0023 movs r3, #0 + 8943 014a 84F83C30 strb r3, [r4, #60] + 8944 014e 0020 movs r0, #0 + 8945 0150 70BD pop {r4, r5, r6, pc} + 8946 .L1738: + 8947 0152 0220 movs r0, #2 + 8948 0154 7047 bx lr + 8949 .L1745: + 8950 0156 00BF .align 2 + 8951 .L1744: + 8952 0158 002C0140 .word 1073818624 + 8954 .section .text.HAL_TIM_PWM_ConfigChannel,"ax",%progbits + 8955 .align 1 + 8956 .p2align 2,,3 + 8957 .global HAL_TIM_PWM_ConfigChannel + 8958 .syntax unified + 8959 .thumb + 8960 .thumb_func + 8961 .fpu fpv4-sp-d16 + 8963 HAL_TIM_PWM_ConfigChannel: + 8964 @ args = 0, pretend = 0, frame = 0 + 8965 @ frame_needed = 0, uses_anonymous_args = 0 + 8966 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 8967 0004 012B cmp r3, #1 + 8968 0006 00F0F480 beq .L1760 + 8969 000a 0123 movs r3, #1 + 8970 000c 70B5 push {r4, r5, r6, lr} + 8971 000e 0446 mov r4, r0 + 8972 0010 0D46 mov r5, r1 + 8973 0012 80F83C30 strb r3, [r0, #60] + 8974 0016 142A cmp r2, #20 + 8975 0018 0CD8 bhi .L1761 + 8976 001a DFE802F0 tbb [pc, r2] + 8977 .L1750: + 8978 001e 53 .byte (.L1755-.L1750)/2 + 8979 001f 0B .byte (.L1761-.L1750)/2 + 8980 0020 0B .byte (.L1761-.L1750)/2 + 8981 0021 0B .byte (.L1761-.L1750)/2 + 8982 0022 68 .byte (.L1754-.L1750)/2 + 8983 0023 0B .byte (.L1761-.L1750)/2 + 8984 0024 0B .byte (.L1761-.L1750)/2 + 8985 0025 0B .byte (.L1761-.L1750)/2 + 8986 0026 7E .byte (.L1753-.L1750)/2 + 8987 0027 0B .byte (.L1761-.L1750)/2 + 8988 0028 0B .byte (.L1761-.L1750)/2 + 8989 0029 0B .byte (.L1761-.L1750)/2 + 8990 002a 93 .byte (.L1752-.L1750)/2 + 8991 002b 0B .byte (.L1761-.L1750)/2 + 8992 002c 0B .byte (.L1761-.L1750)/2 + 8993 002d 0B .byte (.L1761-.L1750)/2 + ARM GAS /tmp/cc6kdh5W.s page 155 + + + 8994 002e A9 .byte (.L1751-.L1750)/2 + 8995 002f 0B .byte (.L1761-.L1750)/2 + 8996 0030 0B .byte (.L1761-.L1750)/2 + 8997 0031 0B .byte (.L1761-.L1750)/2 + 8998 0032 10 .byte (.L1749-.L1750)/2 + 8999 0033 00 .p2align 1 + 9000 .L1761: + 9001 0034 0023 movs r3, #0 + 9002 0036 84F83C30 strb r3, [r4, #60] + 9003 003a 0120 movs r0, #1 + 9004 003c 70BD pop {r4, r5, r6, pc} + 9005 .L1749: + 9006 003e 0368 ldr r3, [r0] + 9007 0040 2E68 ldr r6, [r5] + 9008 0042 1A6A ldr r2, [r3, #32] + 9009 0044 22F48012 bic r2, r2, #1048576 + 9010 0048 1A62 str r2, [r3, #32] + 9011 004a 1A6A ldr r2, [r3, #32] + 9012 004c 5868 ldr r0, [r3, #4] + 9013 004e 196D ldr r1, [r3, #80] + 9014 0050 21F08071 bic r1, r1, #16777216 + 9015 0054 21F4E041 bic r1, r1, #28672 + 9016 0058 41EA0621 orr r1, r1, r6, lsl #8 + 9017 005c AE68 ldr r6, [r5, #8] + 9018 005e 22F40012 bic r2, r2, #2097152 + 9019 0062 42EA0652 orr r2, r2, r6, lsl #20 + 9020 0066 644E ldr r6, .L1766 + 9021 0068 B342 cmp r3, r6 + 9022 006a 0FD0 beq .L1758 + 9023 006c 06F50066 add r6, r6, #2048 + 9024 0070 B342 cmp r3, r6 + 9025 0072 0BD0 beq .L1758 + 9026 0074 06F54066 add r6, r6, #3072 + 9027 0078 B342 cmp r3, r6 + 9028 007a 07D0 beq .L1758 + 9029 007c 06F58066 add r6, r6, #1024 + 9030 0080 B342 cmp r3, r6 + 9031 0082 03D0 beq .L1758 + 9032 0084 06F58066 add r6, r6, #1024 + 9033 0088 B342 cmp r3, r6 + 9034 008a 04D1 bne .L1759 + 9035 .L1758: + 9036 008c 6E69 ldr r6, [r5, #20] + 9037 008e 20F48020 bic r0, r0, #262144 + 9038 0092 40EA8620 orr r0, r0, r6, lsl #10 + 9039 .L1759: + 9040 0096 5860 str r0, [r3, #4] + 9041 0098 1965 str r1, [r3, #80] + 9042 009a 6968 ldr r1, [r5, #4] + 9043 009c D964 str r1, [r3, #76] + 9044 009e 1A62 str r2, [r3, #32] + 9045 00a0 196D ldr r1, [r3, #80] + 9046 00a2 2D69 ldr r5, [r5, #16] + 9047 00a4 41F40061 orr r1, r1, #2048 + 9048 00a8 1965 str r1, [r3, #80] + 9049 00aa 196D ldr r1, [r3, #80] + 9050 00ac 21F48061 bic r1, r1, #1024 + ARM GAS /tmp/cc6kdh5W.s page 156 + + + 9051 00b0 1965 str r1, [r3, #80] + 9052 00b2 1A6D ldr r2, [r3, #80] + 9053 00b4 42EA0522 orr r2, r2, r5, lsl #8 + 9054 00b8 1A65 str r2, [r3, #80] + 9055 00ba 0023 movs r3, #0 + 9056 00bc 84F83C30 strb r3, [r4, #60] + 9057 00c0 0020 movs r0, #0 + 9058 00c2 70BD pop {r4, r5, r6, pc} + 9059 .L1755: + 9060 00c4 0068 ldr r0, [r0] + 9061 00c6 FFF7FEFF bl TIM_OC1_SetConfig + 9062 00ca 2368 ldr r3, [r4] + 9063 00cc 2869 ldr r0, [r5, #16] + 9064 00ce 9969 ldr r1, [r3, #24] + 9065 00d0 41F00801 orr r1, r1, #8 + 9066 00d4 9961 str r1, [r3, #24] + 9067 00d6 9969 ldr r1, [r3, #24] + 9068 00d8 21F00401 bic r1, r1, #4 + 9069 00dc 9961 str r1, [r3, #24] + 9070 00de 9A69 ldr r2, [r3, #24] + 9071 00e0 0243 orrs r2, r2, r0 + 9072 00e2 9A61 str r2, [r3, #24] + 9073 00e4 0023 movs r3, #0 + 9074 00e6 84F83C30 strb r3, [r4, #60] + 9075 00ea 0020 movs r0, #0 + 9076 00ec 70BD pop {r4, r5, r6, pc} + 9077 .L1754: + 9078 00ee 0068 ldr r0, [r0] + 9079 00f0 FFF7FEFF bl TIM_OC2_SetConfig + 9080 00f4 2368 ldr r3, [r4] + 9081 00f6 2869 ldr r0, [r5, #16] + 9082 00f8 9969 ldr r1, [r3, #24] + 9083 00fa 41F40061 orr r1, r1, #2048 + 9084 00fe 9961 str r1, [r3, #24] + 9085 0100 9969 ldr r1, [r3, #24] + 9086 0102 21F48061 bic r1, r1, #1024 + 9087 0106 9961 str r1, [r3, #24] + 9088 0108 9A69 ldr r2, [r3, #24] + 9089 010a 42EA0022 orr r2, r2, r0, lsl #8 + 9090 010e 9A61 str r2, [r3, #24] + 9091 0110 0023 movs r3, #0 + 9092 0112 84F83C30 strb r3, [r4, #60] + 9093 0116 0020 movs r0, #0 + 9094 0118 70BD pop {r4, r5, r6, pc} + 9095 .L1753: + 9096 011a 0068 ldr r0, [r0] + 9097 011c FFF7FEFF bl TIM_OC3_SetConfig + 9098 0120 2368 ldr r3, [r4] + 9099 0122 2869 ldr r0, [r5, #16] + 9100 0124 D969 ldr r1, [r3, #28] + 9101 0126 41F00801 orr r1, r1, #8 + 9102 012a D961 str r1, [r3, #28] + 9103 012c D969 ldr r1, [r3, #28] + 9104 012e 21F00401 bic r1, r1, #4 + 9105 0132 D961 str r1, [r3, #28] + 9106 0134 DA69 ldr r2, [r3, #28] + 9107 0136 0243 orrs r2, r2, r0 + ARM GAS /tmp/cc6kdh5W.s page 157 + + + 9108 0138 DA61 str r2, [r3, #28] + 9109 013a 0023 movs r3, #0 + 9110 013c 84F83C30 strb r3, [r4, #60] + 9111 0140 0020 movs r0, #0 + 9112 0142 70BD pop {r4, r5, r6, pc} + 9113 .L1752: + 9114 0144 0068 ldr r0, [r0] + 9115 0146 FFF7FEFF bl TIM_OC4_SetConfig + 9116 014a 2368 ldr r3, [r4] + 9117 014c 2869 ldr r0, [r5, #16] + 9118 014e D969 ldr r1, [r3, #28] + 9119 0150 41F40061 orr r1, r1, #2048 + 9120 0154 D961 str r1, [r3, #28] + 9121 0156 D969 ldr r1, [r3, #28] + 9122 0158 21F48061 bic r1, r1, #1024 + 9123 015c D961 str r1, [r3, #28] + 9124 015e DA69 ldr r2, [r3, #28] + 9125 0160 42EA0022 orr r2, r2, r0, lsl #8 + 9126 0164 DA61 str r2, [r3, #28] + 9127 0166 0023 movs r3, #0 + 9128 0168 84F83C30 strb r3, [r4, #60] + 9129 016c 0020 movs r0, #0 + 9130 016e 70BD pop {r4, r5, r6, pc} + 9131 .L1751: + 9132 0170 0368 ldr r3, [r0] + 9133 0172 2E68 ldr r6, [r5] + 9134 0174 1A6A ldr r2, [r3, #32] + 9135 0176 22F48032 bic r2, r2, #65536 + 9136 017a 1A62 str r2, [r3, #32] + 9137 017c 1A6A ldr r2, [r3, #32] + 9138 017e 5868 ldr r0, [r3, #4] + 9139 0180 196D ldr r1, [r3, #80] + 9140 0182 21F48031 bic r1, r1, #65536 + 9141 0186 21F07001 bic r1, r1, #112 + 9142 018a 3143 orrs r1, r1, r6 + 9143 018c AE68 ldr r6, [r5, #8] + 9144 018e 22F40032 bic r2, r2, #131072 + 9145 0192 42EA0642 orr r2, r2, r6, lsl #16 + 9146 0196 184E ldr r6, .L1766 + 9147 0198 B342 cmp r3, r6 + 9148 019a 0FD0 beq .L1756 + 9149 019c 06F50066 add r6, r6, #2048 + 9150 01a0 B342 cmp r3, r6 + 9151 01a2 0BD0 beq .L1756 + 9152 01a4 06F54066 add r6, r6, #3072 + 9153 01a8 B342 cmp r3, r6 + 9154 01aa 07D0 beq .L1756 + 9155 01ac 06F58066 add r6, r6, #1024 + 9156 01b0 B342 cmp r3, r6 + 9157 01b2 03D0 beq .L1756 + 9158 01b4 06F58066 add r6, r6, #1024 + 9159 01b8 B342 cmp r3, r6 + 9160 01ba 04D1 bne .L1757 + 9161 .L1756: + 9162 01bc 6E69 ldr r6, [r5, #20] + 9163 01be 20F48030 bic r0, r0, #65536 + 9164 01c2 40EA0620 orr r0, r0, r6, lsl #8 + ARM GAS /tmp/cc6kdh5W.s page 158 + + + 9165 .L1757: + 9166 01c6 5860 str r0, [r3, #4] + 9167 01c8 1965 str r1, [r3, #80] + 9168 01ca 6968 ldr r1, [r5, #4] + 9169 01cc 9964 str r1, [r3, #72] + 9170 01ce 1A62 str r2, [r3, #32] + 9171 01d0 196D ldr r1, [r3, #80] + 9172 01d2 2D69 ldr r5, [r5, #16] + 9173 01d4 41F00801 orr r1, r1, #8 + 9174 01d8 1965 str r1, [r3, #80] + 9175 01da 196D ldr r1, [r3, #80] + 9176 01dc 21F00401 bic r1, r1, #4 + 9177 01e0 1965 str r1, [r3, #80] + 9178 01e2 1A6D ldr r2, [r3, #80] + 9179 01e4 2A43 orrs r2, r2, r5 + 9180 01e6 1A65 str r2, [r3, #80] + 9181 01e8 0023 movs r3, #0 + 9182 01ea 84F83C30 strb r3, [r4, #60] + 9183 01ee 0020 movs r0, #0 + 9184 01f0 70BD pop {r4, r5, r6, pc} + 9185 .L1760: + 9186 01f2 0220 movs r0, #2 + 9187 01f4 7047 bx lr + 9188 .L1767: + 9189 01f6 00BF .align 2 + 9190 .L1766: + 9191 01f8 002C0140 .word 1073818624 + 9193 .section .text.HAL_TIM_OnePulse_ConfigChannel,"ax",%progbits + 9194 .align 1 + 9195 .p2align 2,,3 + 9196 .global HAL_TIM_OnePulse_ConfigChannel + 9197 .syntax unified + 9198 .thumb + 9199 .thumb_func + 9200 .fpu fpv4-sp-d16 + 9202 HAL_TIM_OnePulse_ConfigChannel: + 9203 @ args = 0, pretend = 0, frame = 32 + 9204 @ frame_needed = 0, uses_anonymous_args = 0 + 9205 0000 9A42 cmp r2, r3 + 9206 0002 00F08F80 beq .L1779 + 9207 0006 F0B5 push {r4, r5, r6, r7, lr} + 9208 0008 1E46 mov r6, r3 + 9209 000a 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 9210 000e 012B cmp r3, #1 + 9211 0010 89B0 sub sp, sp, #36 + 9212 0012 0546 mov r5, r0 + 9213 0014 00F08880 beq .L1780 + 9214 0018 0123 movs r3, #1 + 9215 001a 80F83C30 strb r3, [r0, #60] + 9216 001e 0223 movs r3, #2 + 9217 0020 80F83D30 strb r3, [r0, #61] + 9218 0024 4B68 ldr r3, [r1, #4] + 9219 0026 0293 str r3, [sp, #8] + 9220 0028 4B69 ldr r3, [r1, #20] + 9221 002a 0793 str r3, [sp, #28] + 9222 002c 8B68 ldr r3, [r1, #8] + 9223 002e 0393 str r3, [sp, #12] + ARM GAS /tmp/cc6kdh5W.s page 159 + + + 9224 0030 CB68 ldr r3, [r1, #12] + 9225 0032 0493 str r3, [sp, #16] + 9226 0034 0B68 ldr r3, [r1] + 9227 0036 0193 str r3, [sp, #4] + 9228 0038 0B69 ldr r3, [r1, #16] + 9229 003a 0693 str r3, [sp, #24] + 9230 003c 0C46 mov r4, r1 + 9231 003e 002A cmp r2, #0 + 9232 0040 47D0 beq .L1770 + 9233 0042 042A cmp r2, #4 + 9234 0044 08D0 beq .L1771 + 9235 .L1776: + 9236 0046 0120 movs r0, #1 + 9237 .L1772: + 9238 0048 0122 movs r2, #1 + 9239 004a 0023 movs r3, #0 + 9240 004c 85F83D20 strb r2, [r5, #61] + 9241 0050 85F83C30 strb r3, [r5, #60] + 9242 0054 09B0 add sp, sp, #36 + 9243 @ sp needed + 9244 0056 F0BD pop {r4, r5, r6, r7, pc} + 9245 .L1771: + 9246 0058 0068 ldr r0, [r0] + 9247 005a 01A9 add r1, sp, #4 + 9248 005c FFF7FEFF bl TIM_OC2_SetConfig + 9249 0060 002E cmp r6, #0 + 9250 0062 3CD0 beq .L1774 + 9251 .L1789: + 9252 0064 042E cmp r6, #4 + 9253 0066 EED1 bne .L1776 + 9254 0068 2B68 ldr r3, [r5] + 9255 006a 216A ldr r1, [r4, #32] + 9256 006c D4E90626 ldrd r2, r6, [r4, #24] + 9257 0070 1C6A ldr r4, [r3, #32] + 9258 0072 24F01004 bic r4, r4, #16 + 9259 0076 1C62 str r4, [r3, #32] + 9260 0078 9869 ldr r0, [r3, #24] + 9261 007a 20F44070 bic r0, r0, #768 + 9262 007e 0903 lsls r1, r1, #12 + 9263 0080 40EA0620 orr r0, r0, r6, lsl #8 + 9264 0084 20F47040 bic r0, r0, #61440 + 9265 0088 89B2 uxth r1, r1 + 9266 008a 0143 orrs r1, r1, r0 + 9267 008c 186A ldr r0, [r3, #32] + 9268 008e 9961 str r1, [r3, #24] + 9269 0090 1201 lsls r2, r2, #4 + 9270 0092 20F0A001 bic r1, r0, #160 + 9271 0096 02F0A002 and r2, r2, #160 + 9272 009a 0A43 orrs r2, r2, r1 + 9273 009c 1A62 str r2, [r3, #32] + 9274 009e 9A69 ldr r2, [r3, #24] + 9275 00a0 22F44062 bic r2, r2, #3072 + 9276 00a4 9A61 str r2, [r3, #24] + 9277 00a6 9A68 ldr r2, [r3, #8] + 9278 00a8 22F44012 bic r2, r2, #3145728 + 9279 00ac 22F07002 bic r2, r2, #112 + 9280 00b0 9A60 str r2, [r3, #8] + ARM GAS /tmp/cc6kdh5W.s page 160 + + + 9281 00b2 9A68 ldr r2, [r3, #8] + 9282 00b4 0020 movs r0, #0 + 9283 00b6 42F06002 orr r2, r2, #96 + 9284 .L1788: + 9285 00ba 9A60 str r2, [r3, #8] + 9286 00bc 9A68 ldr r2, [r3, #8] + 9287 00be 22F48032 bic r2, r2, #65536 + 9288 00c2 22F00702 bic r2, r2, #7 + 9289 00c6 9A60 str r2, [r3, #8] + 9290 00c8 9A68 ldr r2, [r3, #8] + 9291 00ca 42F00602 orr r2, r2, #6 + 9292 00ce 9A60 str r2, [r3, #8] + 9293 00d0 BAE7 b .L1772 + 9294 .L1770: + 9295 00d2 0068 ldr r0, [r0] + 9296 00d4 01A9 add r1, sp, #4 + 9297 00d6 FFF7FEFF bl TIM_OC1_SetConfig + 9298 00da 002E cmp r6, #0 + 9299 00dc C2D1 bne .L1789 + 9300 .L1774: + 9301 00de 2B68 ldr r3, [r5] + 9302 00e0 226A ldr r2, [r4, #32] + 9303 00e2 224F ldr r7, .L1790 + 9304 00e4 D4E90610 ldrd r1, r0, [r4, #24] + 9305 00e8 1C6A ldr r4, [r3, #32] + 9306 00ea 24F00104 bic r4, r4, #1 + 9307 00ee 1C62 str r4, [r3, #32] + 9308 00f0 BB42 cmp r3, r7 + 9309 00f2 9E69 ldr r6, [r3, #24] + 9310 00f4 1C6A ldr r4, [r3, #32] + 9311 00f6 1AD0 beq .L1777 + 9312 00f8 B3F1804F cmp r3, #1073741824 + 9313 00fc 17D0 beq .L1777 + 9314 00fe A7F59437 sub r7, r7, #75776 + 9315 0102 BB42 cmp r3, r7 + 9316 0104 13D0 beq .L1777 + 9317 0106 07F58067 add r7, r7, #1024 + 9318 010a BB42 cmp r3, r7 + 9319 010c 0FD0 beq .L1777 + 9320 010e 07F59637 add r7, r7, #76800 + 9321 0112 BB42 cmp r3, r7 + 9322 0114 0BD0 beq .L1777 + 9323 0116 07F54067 add r7, r7, #3072 + 9324 011a BB42 cmp r3, r7 + 9325 011c 07D0 beq .L1777 + 9326 011e 46F00100 orr r0, r6, #1 + 9327 0122 07E0 b .L1778 + 9328 .L1779: + 9329 0124 0120 movs r0, #1 + 9330 0126 7047 bx lr + 9331 .L1780: + 9332 0128 0220 movs r0, #2 + 9333 012a 09B0 add sp, sp, #36 + 9334 @ sp needed + 9335 012c F0BD pop {r4, r5, r6, r7, pc} + 9336 .L1777: + 9337 012e 26F00306 bic r6, r6, #3 + ARM GAS /tmp/cc6kdh5W.s page 161 + + + 9338 0132 3043 orrs r0, r0, r6 + 9339 .L1778: + 9340 0134 1201 lsls r2, r2, #4 + 9341 0136 20F0F000 bic r0, r0, #240 + 9342 013a D2B2 uxtb r2, r2 + 9343 013c 0243 orrs r2, r2, r0 + 9344 013e 01F00A01 and r1, r1, #10 + 9345 0142 24F00A00 bic r0, r4, #10 + 9346 0146 0143 orrs r1, r1, r0 + 9347 0148 9A61 str r2, [r3, #24] + 9348 014a 1962 str r1, [r3, #32] + 9349 014c 9A69 ldr r2, [r3, #24] + 9350 014e 22F00C02 bic r2, r2, #12 + 9351 0152 9A61 str r2, [r3, #24] + 9352 0154 9A68 ldr r2, [r3, #8] + 9353 0156 22F44012 bic r2, r2, #3145728 + 9354 015a 22F07002 bic r2, r2, #112 + 9355 015e 9A60 str r2, [r3, #8] + 9356 0160 9A68 ldr r2, [r3, #8] + 9357 0162 0020 movs r0, #0 + 9358 0164 42F05002 orr r2, r2, #80 + 9359 0168 A7E7 b .L1788 + 9360 .L1791: + 9361 016a 00BF .align 2 + 9362 .L1790: + 9363 016c 002C0140 .word 1073818624 + 9365 .section .text.TIM_TI1_SetConfig,"ax",%progbits + 9366 .align 1 + 9367 .p2align 2,,3 + 9368 .global TIM_TI1_SetConfig + 9369 .syntax unified + 9370 .thumb + 9371 .thumb_func + 9372 .fpu fpv4-sp-d16 + 9374 TIM_TI1_SetConfig: + 9375 @ args = 0, pretend = 0, frame = 0 + 9376 @ frame_needed = 0, uses_anonymous_args = 0 + 9377 @ link register save eliminated. + 9378 0000 70B4 push {r4, r5, r6} + 9379 0002 056A ldr r5, [r0, #32] + 9380 0004 174E ldr r6, .L1799 + 9381 0006 25F00105 bic r5, r5, #1 + 9382 000a 0562 str r5, [r0, #32] + 9383 000c B042 cmp r0, r6 + 9384 000e 8469 ldr r4, [r0, #24] + 9385 0010 056A ldr r5, [r0, #32] + 9386 0012 15D0 beq .L1793 + 9387 0014 B0F1804F cmp r0, #1073741824 + 9388 0018 12D0 beq .L1793 + 9389 001a A6F59436 sub r6, r6, #75776 + 9390 001e B042 cmp r0, r6 + 9391 0020 0ED0 beq .L1793 + 9392 0022 06F58066 add r6, r6, #1024 + 9393 0026 B042 cmp r0, r6 + 9394 0028 0AD0 beq .L1793 + 9395 002a 06F59636 add r6, r6, #76800 + 9396 002e B042 cmp r0, r6 + ARM GAS /tmp/cc6kdh5W.s page 162 + + + 9397 0030 06D0 beq .L1793 + 9398 0032 06F54066 add r6, r6, #3072 + 9399 0036 B042 cmp r0, r6 + 9400 0038 02D0 beq .L1793 + 9401 003a 44F00102 orr r2, r4, #1 + 9402 003e 02E0 b .L1794 + 9403 .L1793: + 9404 0040 24F00304 bic r4, r4, #3 + 9405 0044 2243 orrs r2, r2, r4 + 9406 .L1794: + 9407 0046 1B01 lsls r3, r3, #4 + 9408 0048 25F00A04 bic r4, r5, #10 + 9409 004c 22F0F002 bic r2, r2, #240 + 9410 0050 DBB2 uxtb r3, r3 + 9411 0052 01F00A01 and r1, r1, #10 + 9412 0056 2143 orrs r1, r1, r4 + 9413 0058 1343 orrs r3, r3, r2 + 9414 005a 8361 str r3, [r0, #24] + 9415 005c 70BC pop {r4, r5, r6} + 9416 005e 0162 str r1, [r0, #32] + 9417 0060 7047 bx lr + 9418 .L1800: + 9419 0062 00BF .align 2 + 9420 .L1799: + 9421 0064 002C0140 .word 1073818624 + 9423 .section .text.TIM_ETR_SetConfig,"ax",%progbits + 9424 .align 1 + 9425 .p2align 2,,3 + 9426 .global TIM_ETR_SetConfig + 9427 .syntax unified + 9428 .thumb + 9429 .thumb_func + 9430 .fpu fpv4-sp-d16 + 9432 TIM_ETR_SetConfig: + 9433 @ args = 0, pretend = 0, frame = 0 + 9434 @ frame_needed = 0, uses_anonymous_args = 0 + 9435 @ link register save eliminated. + 9436 0000 10B4 push {r4} + 9437 0002 8468 ldr r4, [r0, #8] + 9438 0004 1143 orrs r1, r1, r2 + 9439 0006 24F47F44 bic r4, r4, #65280 + 9440 000a 41EA0323 orr r3, r1, r3, lsl #8 + 9441 000e 2343 orrs r3, r3, r4 + 9442 0010 8360 str r3, [r0, #8] + 9443 0012 5DF8044B ldr r4, [sp], #4 + 9444 0016 7047 bx lr + 9446 .section .text.TIM_CCxChannelCmd,"ax",%progbits + 9447 .align 1 + 9448 .p2align 2,,3 + 9449 .global TIM_CCxChannelCmd + 9450 .syntax unified + 9451 .thumb + 9452 .thumb_func + 9453 .fpu fpv4-sp-d16 + 9455 TIM_CCxChannelCmd: + 9456 @ args = 0, pretend = 0, frame = 0 + 9457 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/cc6kdh5W.s page 163 + + + 9458 @ link register save eliminated. + 9459 0000 036A ldr r3, [r0, #32] + 9460 0002 01F01F01 and r1, r1, #31 + 9461 0006 4FF0010C mov ip, #1 + 9462 000a 0CFA01FC lsl ip, ip, r1 + 9463 000e 23EA0C03 bic r3, r3, ip + 9464 0012 0362 str r3, [r0, #32] + 9465 0014 036A ldr r3, [r0, #32] + 9466 0016 8A40 lsls r2, r2, r1 + 9467 0018 1A43 orrs r2, r2, r3 + 9468 001a 0262 str r2, [r0, #32] + 9469 001c 7047 bx lr + 9471 001e 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/cc6kdh5W.s page 164 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_tim.c + /tmp/cc6kdh5W.s:16 .text.TIM_OC1_SetConfig:0000000000000000 $t + /tmp/cc6kdh5W.s:24 .text.TIM_OC1_SetConfig:0000000000000000 TIM_OC1_SetConfig + /tmp/cc6kdh5W.s:77 .text.TIM_OC1_SetConfig:0000000000000074 $d + /tmp/cc6kdh5W.s:80 .text.TIM_OC3_SetConfig:0000000000000000 $t + /tmp/cc6kdh5W.s:87 .text.TIM_OC3_SetConfig:0000000000000000 TIM_OC3_SetConfig + /tmp/cc6kdh5W.s:142 .text.TIM_OC3_SetConfig:000000000000007c $d + /tmp/cc6kdh5W.s:145 .text.TIM_OC4_SetConfig:0000000000000000 $t + /tmp/cc6kdh5W.s:152 .text.TIM_OC4_SetConfig:0000000000000000 TIM_OC4_SetConfig + /tmp/cc6kdh5W.s:207 .text.TIM_OC4_SetConfig:000000000000007c $d + /tmp/cc6kdh5W.s:210 .text.HAL_TIM_Base_MspInit:0000000000000000 $t + /tmp/cc6kdh5W.s:218 .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit + /tmp/cc6kdh5W.s:225 .text.HAL_TIM_Base_Init:0000000000000000 $t + /tmp/cc6kdh5W.s:233 .text.HAL_TIM_Base_Init:0000000000000000 HAL_TIM_Base_Init + /tmp/cc6kdh5W.s:348 .text.HAL_TIM_Base_Init:000000000000010c $d + /tmp/cc6kdh5W.s:351 .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:359 .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit + /tmp/cc6kdh5W.s:366 .text.HAL_TIM_Base_DeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:374 .text.HAL_TIM_Base_DeInit:0000000000000000 HAL_TIM_Base_DeInit + /tmp/cc6kdh5W.s:413 .text.HAL_TIM_Base_Start:0000000000000000 $t + /tmp/cc6kdh5W.s:421 .text.HAL_TIM_Base_Start:0000000000000000 HAL_TIM_Base_Start + /tmp/cc6kdh5W.s:471 .text.HAL_TIM_Base_Start:0000000000000060 $d + /tmp/cc6kdh5W.s:475 .text.HAL_TIM_Base_Stop:0000000000000000 $t + /tmp/cc6kdh5W.s:483 .text.HAL_TIM_Base_Stop:0000000000000000 HAL_TIM_Base_Stop + /tmp/cc6kdh5W.s:506 .text.HAL_TIM_Base_Start_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:514 .text.HAL_TIM_Base_Start_IT:0000000000000000 HAL_TIM_Base_Start_IT + /tmp/cc6kdh5W.s:567 .text.HAL_TIM_Base_Start_IT:0000000000000068 $d + /tmp/cc6kdh5W.s:572 .text.HAL_TIM_Base_Stop_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:580 .text.HAL_TIM_Base_Stop_IT:0000000000000000 HAL_TIM_Base_Stop_IT + /tmp/cc6kdh5W.s:606 .text.HAL_TIM_Base_Start_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:614 .text.HAL_TIM_Base_Start_DMA:0000000000000000 HAL_TIM_Base_Start_DMA + /tmp/cc6kdh5W.s:687 .text.HAL_TIM_Base_Start_DMA:0000000000000090 $d + /tmp/cc6kdh5W.s:7638 .text.TIM_DMAPeriodElapsedCplt:0000000000000000 TIM_DMAPeriodElapsedCplt + /tmp/cc6kdh5W.s:7675 .text.TIM_DMAPeriodElapsedHalfCplt:0000000000000000 TIM_DMAPeriodElapsedHalfCplt + /tmp/cc6kdh5W.s:8370 .text.TIM_DMAError:0000000000000000 TIM_DMAError + /tmp/cc6kdh5W.s:695 .text.HAL_TIM_Base_Stop_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:703 .text.HAL_TIM_Base_Stop_DMA:0000000000000000 HAL_TIM_Base_Stop_DMA + /tmp/cc6kdh5W.s:733 .text.HAL_TIM_OC_MspInit:0000000000000000 $t + /tmp/cc6kdh5W.s:741 .text.HAL_TIM_OC_MspInit:0000000000000000 HAL_TIM_OC_MspInit + /tmp/cc6kdh5W.s:748 .text.HAL_TIM_OC_Init:0000000000000000 $t + /tmp/cc6kdh5W.s:756 .text.HAL_TIM_OC_Init:0000000000000000 HAL_TIM_OC_Init + /tmp/cc6kdh5W.s:871 .text.HAL_TIM_OC_Init:000000000000010c $d + /tmp/cc6kdh5W.s:874 .text.HAL_TIM_OC_MspDeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:882 .text.HAL_TIM_OC_MspDeInit:0000000000000000 HAL_TIM_OC_MspDeInit + /tmp/cc6kdh5W.s:889 .text.HAL_TIM_OC_DeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:897 .text.HAL_TIM_OC_DeInit:0000000000000000 HAL_TIM_OC_DeInit + /tmp/cc6kdh5W.s:936 .text.HAL_TIM_OC_Start:0000000000000000 $t + /tmp/cc6kdh5W.s:944 .text.HAL_TIM_OC_Start:0000000000000000 HAL_TIM_OC_Start + /tmp/cc6kdh5W.s:1080 .text.HAL_TIM_OC_Start:0000000000000118 $d + /tmp/cc6kdh5W.s:1085 .text.HAL_TIM_OC_Stop:0000000000000000 $t + /tmp/cc6kdh5W.s:1093 .text.HAL_TIM_OC_Stop:0000000000000000 HAL_TIM_OC_Stop + /tmp/cc6kdh5W.s:1187 .text.HAL_TIM_OC_Stop:00000000000000cc $d + /tmp/cc6kdh5W.s:1190 .text.HAL_TIM_OC_Start_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:1198 .text.HAL_TIM_OC_Start_IT:0000000000000000 HAL_TIM_OC_Start_IT + /tmp/cc6kdh5W.s:1308 .text.HAL_TIM_OC_Start_IT:00000000000000ec $d + /tmp/cc6kdh5W.s:1317 .text.HAL_TIM_OC_Start_IT:0000000000000110 $t + ARM GAS /tmp/cc6kdh5W.s page 165 + + + /tmp/cc6kdh5W.s:1369 .text.HAL_TIM_OC_Start_IT:0000000000000174 $d + /tmp/cc6kdh5W.s:1374 .text.HAL_TIM_OC_Stop_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:1382 .text.HAL_TIM_OC_Stop_IT:0000000000000000 HAL_TIM_OC_Stop_IT + /tmp/cc6kdh5W.s:1390 .text.HAL_TIM_OC_Stop_IT:0000000000000008 $d + /tmp/cc6kdh5W.s:1518 .text.HAL_TIM_OC_Stop_IT:0000000000000110 $d + /tmp/cc6kdh5W.s:1521 .text.HAL_TIM_OC_Start_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:1529 .text.HAL_TIM_OC_Start_DMA:0000000000000000 HAL_TIM_OC_Start_DMA + /tmp/cc6kdh5W.s:1564 .text.HAL_TIM_OC_Start_DMA:0000000000000052 $d + /tmp/cc6kdh5W.s:1577 .text.HAL_TIM_OC_Start_DMA:000000000000006c $t + /tmp/cc6kdh5W.s:1829 .text.HAL_TIM_OC_Start_DMA:000000000000029c $d + /tmp/cc6kdh5W.s:7889 .text.TIM_DMADelayPulseCplt:0000000000000000 TIM_DMADelayPulseCplt + /tmp/cc6kdh5W.s:7980 .text.TIM_DMADelayPulseHalfCplt:0000000000000000 TIM_DMADelayPulseHalfCplt + /tmp/cc6kdh5W.s:1837 .text.HAL_TIM_OC_Stop_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:1845 .text.HAL_TIM_OC_Stop_DMA:0000000000000000 HAL_TIM_OC_Stop_DMA + /tmp/cc6kdh5W.s:1855 .text.HAL_TIM_OC_Stop_DMA:000000000000000e $d + /tmp/cc6kdh5W.s:1987 .text.HAL_TIM_OC_Stop_DMA:000000000000011c $d + /tmp/cc6kdh5W.s:1990 .text.HAL_TIM_PWM_MspInit:0000000000000000 $t + /tmp/cc6kdh5W.s:1998 .text.HAL_TIM_PWM_MspInit:0000000000000000 HAL_TIM_PWM_MspInit + /tmp/cc6kdh5W.s:2005 .text.HAL_TIM_PWM_Init:0000000000000000 $t + /tmp/cc6kdh5W.s:2013 .text.HAL_TIM_PWM_Init:0000000000000000 HAL_TIM_PWM_Init + /tmp/cc6kdh5W.s:2128 .text.HAL_TIM_PWM_Init:000000000000010c $d + /tmp/cc6kdh5W.s:2131 .text.HAL_TIM_PWM_MspDeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:2139 .text.HAL_TIM_PWM_MspDeInit:0000000000000000 HAL_TIM_PWM_MspDeInit + /tmp/cc6kdh5W.s:2146 .text.HAL_TIM_PWM_DeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:2154 .text.HAL_TIM_PWM_DeInit:0000000000000000 HAL_TIM_PWM_DeInit + /tmp/cc6kdh5W.s:2193 .text.HAL_TIM_PWM_Start:0000000000000000 $t + /tmp/cc6kdh5W.s:2201 .text.HAL_TIM_PWM_Start:0000000000000000 HAL_TIM_PWM_Start + /tmp/cc6kdh5W.s:2337 .text.HAL_TIM_PWM_Start:0000000000000118 $d + /tmp/cc6kdh5W.s:2342 .text.HAL_TIM_PWM_Stop:0000000000000000 $t + /tmp/cc6kdh5W.s:2350 .text.HAL_TIM_PWM_Stop:0000000000000000 HAL_TIM_PWM_Stop + /tmp/cc6kdh5W.s:2444 .text.HAL_TIM_PWM_Stop:00000000000000cc $d + /tmp/cc6kdh5W.s:2447 .text.HAL_TIM_PWM_Start_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:2455 .text.HAL_TIM_PWM_Start_IT:0000000000000000 HAL_TIM_PWM_Start_IT + /tmp/cc6kdh5W.s:2565 .text.HAL_TIM_PWM_Start_IT:00000000000000ec $d + /tmp/cc6kdh5W.s:2574 .text.HAL_TIM_PWM_Start_IT:0000000000000110 $t + /tmp/cc6kdh5W.s:2626 .text.HAL_TIM_PWM_Start_IT:0000000000000174 $d + /tmp/cc6kdh5W.s:2631 .text.HAL_TIM_PWM_Stop_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:2639 .text.HAL_TIM_PWM_Stop_IT:0000000000000000 HAL_TIM_PWM_Stop_IT + /tmp/cc6kdh5W.s:2647 .text.HAL_TIM_PWM_Stop_IT:0000000000000008 $d + /tmp/cc6kdh5W.s:2775 .text.HAL_TIM_PWM_Stop_IT:0000000000000110 $d + /tmp/cc6kdh5W.s:2778 .text.HAL_TIM_PWM_Start_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:2786 .text.HAL_TIM_PWM_Start_DMA:0000000000000000 HAL_TIM_PWM_Start_DMA + /tmp/cc6kdh5W.s:2821 .text.HAL_TIM_PWM_Start_DMA:0000000000000052 $d + /tmp/cc6kdh5W.s:2834 .text.HAL_TIM_PWM_Start_DMA:000000000000006c $t + /tmp/cc6kdh5W.s:3086 .text.HAL_TIM_PWM_Start_DMA:000000000000029c $d + /tmp/cc6kdh5W.s:3094 .text.HAL_TIM_PWM_Stop_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:3102 .text.HAL_TIM_PWM_Stop_DMA:0000000000000000 HAL_TIM_PWM_Stop_DMA + /tmp/cc6kdh5W.s:3112 .text.HAL_TIM_PWM_Stop_DMA:000000000000000e $d + /tmp/cc6kdh5W.s:3244 .text.HAL_TIM_PWM_Stop_DMA:000000000000011c $d + /tmp/cc6kdh5W.s:3247 .text.HAL_TIM_IC_MspInit:0000000000000000 $t + /tmp/cc6kdh5W.s:3255 .text.HAL_TIM_IC_MspInit:0000000000000000 HAL_TIM_IC_MspInit + /tmp/cc6kdh5W.s:3262 .text.HAL_TIM_IC_Init:0000000000000000 $t + /tmp/cc6kdh5W.s:3270 .text.HAL_TIM_IC_Init:0000000000000000 HAL_TIM_IC_Init + /tmp/cc6kdh5W.s:3385 .text.HAL_TIM_IC_Init:000000000000010c $d + /tmp/cc6kdh5W.s:3388 .text.HAL_TIM_IC_MspDeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:3396 .text.HAL_TIM_IC_MspDeInit:0000000000000000 HAL_TIM_IC_MspDeInit + /tmp/cc6kdh5W.s:3403 .text.HAL_TIM_IC_DeInit:0000000000000000 $t + ARM GAS /tmp/cc6kdh5W.s page 166 + + + /tmp/cc6kdh5W.s:3411 .text.HAL_TIM_IC_DeInit:0000000000000000 HAL_TIM_IC_DeInit + /tmp/cc6kdh5W.s:3450 .text.HAL_TIM_IC_Start:0000000000000000 $t + /tmp/cc6kdh5W.s:3458 .text.HAL_TIM_IC_Start:0000000000000000 HAL_TIM_IC_Start + /tmp/cc6kdh5W.s:3592 .text.HAL_TIM_IC_Start:0000000000000118 $d + /tmp/cc6kdh5W.s:3596 .text.HAL_TIM_IC_Stop:0000000000000000 $t + /tmp/cc6kdh5W.s:3604 .text.HAL_TIM_IC_Stop:0000000000000000 HAL_TIM_IC_Stop + /tmp/cc6kdh5W.s:3673 .text.HAL_TIM_IC_Start_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:3681 .text.HAL_TIM_IC_Start_IT:0000000000000000 HAL_TIM_IC_Start_IT + /tmp/cc6kdh5W.s:3790 .text.HAL_TIM_IC_Start_IT:00000000000000e8 $d + /tmp/cc6kdh5W.s:3799 .text.HAL_TIM_IC_Start_IT:000000000000010c $t + /tmp/cc6kdh5W.s:3856 .text.HAL_TIM_IC_Start_IT:0000000000000180 $d + /tmp/cc6kdh5W.s:3860 .text.HAL_TIM_IC_Stop_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:3868 .text.HAL_TIM_IC_Stop_IT:0000000000000000 HAL_TIM_IC_Stop_IT + /tmp/cc6kdh5W.s:3878 .text.HAL_TIM_IC_Stop_IT:000000000000000c $d + /tmp/cc6kdh5W.s:4023 .text.HAL_TIM_IC_Start_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:4031 .text.HAL_TIM_IC_Start_DMA:0000000000000000 HAL_TIM_IC_Start_DMA + /tmp/cc6kdh5W.s:4181 .text.HAL_TIM_IC_Start_DMA:000000000000014e $d + /tmp/cc6kdh5W.s:4294 .text.HAL_TIM_IC_Start_DMA:0000000000000248 $d + /tmp/cc6kdh5W.s:7722 .text.TIM_DMACaptureCplt:0000000000000000 TIM_DMACaptureCplt + /tmp/cc6kdh5W.s:7817 .text.TIM_DMACaptureHalfCplt:0000000000000000 TIM_DMACaptureHalfCplt + /tmp/cc6kdh5W.s:4301 .text.HAL_TIM_IC_Stop_DMA:0000000000000000 $t + /tmp/cc6kdh5W.s:4309 .text.HAL_TIM_IC_Stop_DMA:0000000000000000 HAL_TIM_IC_Stop_DMA + /tmp/cc6kdh5W.s:4328 .text.HAL_TIM_IC_Stop_DMA:0000000000000024 $d + /tmp/cc6kdh5W.s:4456 .text.HAL_TIM_OnePulse_MspInit:0000000000000000 $t + /tmp/cc6kdh5W.s:4464 .text.HAL_TIM_OnePulse_MspInit:0000000000000000 HAL_TIM_OnePulse_MspInit + /tmp/cc6kdh5W.s:4471 .text.HAL_TIM_OnePulse_Init:0000000000000000 $t + /tmp/cc6kdh5W.s:4479 .text.HAL_TIM_OnePulse_Init:0000000000000000 HAL_TIM_OnePulse_Init + /tmp/cc6kdh5W.s:4582 .text.HAL_TIM_OnePulse_Init:00000000000000e4 $d + /tmp/cc6kdh5W.s:4585 .text.HAL_TIM_OnePulse_MspDeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:4593 .text.HAL_TIM_OnePulse_MspDeInit:0000000000000000 HAL_TIM_OnePulse_MspDeInit + /tmp/cc6kdh5W.s:4600 .text.HAL_TIM_OnePulse_DeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:4608 .text.HAL_TIM_OnePulse_DeInit:0000000000000000 HAL_TIM_OnePulse_DeInit + /tmp/cc6kdh5W.s:4641 .text.HAL_TIM_OnePulse_Start:0000000000000000 $t + /tmp/cc6kdh5W.s:4649 .text.HAL_TIM_OnePulse_Start:0000000000000000 HAL_TIM_OnePulse_Start + /tmp/cc6kdh5W.s:4721 .text.HAL_TIM_OnePulse_Start:00000000000000ac $d + /tmp/cc6kdh5W.s:4725 .text.HAL_TIM_OnePulse_Stop:0000000000000000 $t + /tmp/cc6kdh5W.s:4733 .text.HAL_TIM_OnePulse_Stop:0000000000000000 HAL_TIM_OnePulse_Stop + /tmp/cc6kdh5W.s:4800 .text.HAL_TIM_OnePulse_Stop:0000000000000090 $d + /tmp/cc6kdh5W.s:4804 .text.HAL_TIM_OnePulse_Start_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:4812 .text.HAL_TIM_OnePulse_Start_IT:0000000000000000 HAL_TIM_OnePulse_Start_IT + /tmp/cc6kdh5W.s:4890 .text.HAL_TIM_OnePulse_Start_IT:00000000000000bc $d + /tmp/cc6kdh5W.s:4894 .text.HAL_TIM_OnePulse_Stop_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:4902 .text.HAL_TIM_OnePulse_Stop_IT:0000000000000000 HAL_TIM_OnePulse_Stop_IT + /tmp/cc6kdh5W.s:4975 .text.HAL_TIM_OnePulse_Stop_IT:00000000000000a0 $d + /tmp/cc6kdh5W.s:4979 .text.HAL_TIM_Encoder_MspInit:0000000000000000 $t + /tmp/cc6kdh5W.s:4987 .text.HAL_TIM_Encoder_MspInit:0000000000000000 HAL_TIM_Encoder_MspInit + /tmp/cc6kdh5W.s:4994 .text.HAL_TIM_Encoder_Init:0000000000000000 $t + /tmp/cc6kdh5W.s:5002 .text.HAL_TIM_Encoder_Init:0000000000000000 HAL_TIM_Encoder_Init + /tmp/cc6kdh5W.s:5133 .text.HAL_TIM_Encoder_Init:0000000000000138 $d + /tmp/cc6kdh5W.s:5136 .text.HAL_TIM_Encoder_MspDeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:5144 .text.HAL_TIM_Encoder_MspDeInit:0000000000000000 HAL_TIM_Encoder_MspDeInit + /tmp/cc6kdh5W.s:5151 .text.HAL_TIM_Encoder_DeInit:0000000000000000 $t + /tmp/cc6kdh5W.s:5159 .text.HAL_TIM_Encoder_DeInit:0000000000000000 HAL_TIM_Encoder_DeInit + /tmp/cc6kdh5W.s:5192 .text.HAL_TIM_Encoder_Start:0000000000000000 $t + /tmp/cc6kdh5W.s:5200 .text.HAL_TIM_Encoder_Start:0000000000000000 HAL_TIM_Encoder_Start + /tmp/cc6kdh5W.s:5283 .text.HAL_TIM_Encoder_Stop:0000000000000000 $t + /tmp/cc6kdh5W.s:5291 .text.HAL_TIM_Encoder_Stop:0000000000000000 HAL_TIM_Encoder_Stop + ARM GAS /tmp/cc6kdh5W.s page 167 + + + /tmp/cc6kdh5W.s:5372 .text.HAL_TIM_Encoder_Start_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:5380 .text.HAL_TIM_Encoder_Start_IT:0000000000000000 HAL_TIM_Encoder_Start_IT + /tmp/cc6kdh5W.s:5480 .text.HAL_TIM_Encoder_Stop_IT:0000000000000000 $t + /tmp/cc6kdh5W.s:5488 .text.HAL_TIM_Encoder_Stop_IT:0000000000000000 HAL_TIM_Encoder_Stop_IT + /tmp/cc6kdh5W.s:5586 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a#?D1wFfWorS1E2M&JX|H30us|#Qk3)4K3vW literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_hal_tim_ex.d b/codice/build/stm32g4xx_hal_tim_ex.d new file mode 100644 index 0000000..388f0e6 --- /dev/null +++ b/codice/build/stm32g4xx_hal_tim_ex.d @@ -0,0 +1,84 @@ +build/stm32g4xx_hal_tim_ex.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_tim_ex.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_hal_tim_ex.lst b/codice/build/stm32g4xx_hal_tim_ex.lst new file mode 100644 index 0000000..197511a --- /dev/null +++ b/codice/build/stm32g4xx_hal_tim_ex.lst @@ -0,0 +1,4376 @@ +ARM GAS /tmp/ccY6LI9P.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_hal_tim_ex.c" + 14 .text + 15 .section .text.TIM_DMAErrorCCxN,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .arch armv7e-m + 19 .syntax unified + 20 .thumb + 21 .thumb_func + 22 .fpu fpv4-sp-d16 + 24 TIM_DMAErrorCCxN: + 25 @ args = 0, pretend = 0, frame = 0 + 26 @ frame_needed = 0, uses_anonymous_args = 0 + 27 0000 10B5 push {r4, lr} + 28 0002 846A ldr r4, [r0, #40] + 29 0004 636A ldr r3, [r4, #36] + 30 0006 8342 cmp r3, r0 + 31 0008 16D0 beq .L7 + 32 000a A36A ldr r3, [r4, #40] + 33 000c 8342 cmp r3, r0 + 34 000e 08D0 beq .L8 + 35 0010 E36A ldr r3, [r4, #44] + 36 0012 8342 cmp r3, r0 + 37 0014 1AD0 beq .L9 + 38 0016 2046 mov r0, r4 + 39 0018 FFF7FEFF bl HAL_TIM_ErrorCallback + 40 001c 0023 movs r3, #0 + 41 001e 2377 strb r3, [r4, #28] + 42 0020 10BD pop {r4, pc} + 43 .L8: + 44 0022 0123 movs r3, #1 + 45 0024 0222 movs r2, #2 + 46 0026 84F84530 strb r3, [r4, #69] + 47 002a 2277 strb r2, [r4, #28] + 48 002c 2046 mov r0, r4 + 49 002e FFF7FEFF bl HAL_TIM_ErrorCallback + 50 0032 0023 movs r3, #0 + 51 0034 2377 strb r3, [r4, #28] + 52 0036 10BD pop {r4, pc} + 53 .L7: + 54 0038 0123 movs r3, #1 + 55 003a 2377 strb r3, [r4, #28] + 56 003c 84F84430 strb r3, [r4, #68] + 57 0040 2046 mov r0, r4 + 58 0042 FFF7FEFF bl HAL_TIM_ErrorCallback + ARM GAS /tmp/ccY6LI9P.s page 2 + + + 59 0046 0023 movs r3, #0 + 60 0048 2377 strb r3, [r4, #28] + 61 004a 10BD pop {r4, pc} + 62 .L9: + 63 004c 0123 movs r3, #1 + 64 004e 0422 movs r2, #4 + 65 0050 84F84630 strb r3, [r4, #70] + 66 0054 2277 strb r2, [r4, #28] + 67 0056 2046 mov r0, r4 + 68 0058 FFF7FEFF bl HAL_TIM_ErrorCallback + 69 005c 0023 movs r3, #0 + 70 005e 2377 strb r3, [r4, #28] + 71 0060 10BD pop {r4, pc} + 73 0062 00BF .section .text.TIM_DMADelayPulseNCplt,"ax",%progbits + 74 .align 1 + 75 .p2align 2,,3 + 76 .syntax unified + 77 .thumb + 78 .thumb_func + 79 .fpu fpv4-sp-d16 + 81 TIM_DMADelayPulseNCplt: + 82 @ args = 0, pretend = 0, frame = 0 + 83 @ frame_needed = 0, uses_anonymous_args = 0 + 84 0000 10B5 push {r4, lr} + 85 0002 846A ldr r4, [r0, #40] + 86 0004 636A ldr r3, [r4, #36] + 87 0006 8342 cmp r3, r0 + 88 0008 1CD0 beq .L18 + 89 000a A36A ldr r3, [r4, #40] + 90 000c 8342 cmp r3, r0 + 91 000e 0BD0 beq .L19 + 92 0010 E36A ldr r3, [r4, #44] + 93 0012 8342 cmp r3, r0 + 94 0014 23D0 beq .L20 + 95 0016 236B ldr r3, [r4, #48] + 96 0018 8342 cmp r3, r0 + 97 001a 29D0 beq .L21 + 98 .L13: + 99 001c 2046 mov r0, r4 + 100 001e FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 101 0022 0023 movs r3, #0 + 102 0024 2377 strb r3, [r4, #28] + 103 0026 10BD pop {r4, pc} + 104 .L19: + 105 0028 0222 movs r2, #2 + 106 002a 2277 strb r2, [r4, #28] + 107 002c DB69 ldr r3, [r3, #28] + 108 002e 002B cmp r3, #0 + 109 0030 F4D1 bne .L13 + 110 0032 0123 movs r3, #1 + 111 0034 84F84530 strb r3, [r4, #69] + 112 0038 2046 mov r0, r4 + 113 003a FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 114 003e 0023 movs r3, #0 + 115 0040 2377 strb r3, [r4, #28] + 116 0042 10BD pop {r4, pc} + 117 .L18: + ARM GAS /tmp/ccY6LI9P.s page 3 + + + 118 0044 0122 movs r2, #1 + 119 0046 2277 strb r2, [r4, #28] + 120 0048 DB69 ldr r3, [r3, #28] + 121 004a 002B cmp r3, #0 + 122 004c E6D1 bne .L13 + 123 004e 84F84420 strb r2, [r4, #68] + 124 0052 2046 mov r0, r4 + 125 0054 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback + 126 0058 0023 movs r3, #0 + 127 005a 2377 strb r3, [r4, #28] + 128 005c 10BD pop {r4, pc} + 129 .L20: + 130 005e 0422 movs r2, #4 + 131 0060 2277 strb r2, [r4, #28] + 132 0062 DB69 ldr r3, [r3, #28] + 133 0064 002B cmp r3, #0 + 134 0066 D9D1 bne .L13 + 135 0068 0123 movs r3, #1 + 136 006a 84F84630 strb r3, [r4, #70] + 137 006e D5E7 b .L13 + 138 .L21: + 139 0070 0822 movs r2, #8 + 140 0072 2277 strb r2, [r4, #28] + 141 0074 DB69 ldr r3, [r3, #28] + 142 0076 002B cmp r3, #0 + 143 0078 D0D1 bne .L13 + 144 007a 0123 movs r3, #1 + 145 007c 84F84730 strb r3, [r4, #71] + 146 0080 CCE7 b .L13 + 148 0082 00BF .section .text.HAL_TIMEx_HallSensor_MspInit,"ax",%progbits + 149 .align 1 + 150 .p2align 2,,3 + 151 .weak HAL_TIMEx_HallSensor_MspInit + 152 .syntax unified + 153 .thumb + 154 .thumb_func + 155 .fpu fpv4-sp-d16 + 157 HAL_TIMEx_HallSensor_MspInit: + 158 @ args = 0, pretend = 0, frame = 0 + 159 @ frame_needed = 0, uses_anonymous_args = 0 + 160 @ link register save eliminated. + 161 0000 7047 bx lr + 163 0002 00BF .section .text.HAL_TIMEx_HallSensor_Init,"ax",%progbits + 164 .align 1 + 165 .p2align 2,,3 + 166 .global HAL_TIMEx_HallSensor_Init + 167 .syntax unified + 168 .thumb + 169 .thumb_func + 170 .fpu fpv4-sp-d16 + 172 HAL_TIMEx_HallSensor_Init: + 173 @ args = 0, pretend = 0, frame = 32 + 174 @ frame_needed = 0, uses_anonymous_args = 0 + 175 0000 0028 cmp r0, #0 + 176 0002 65D0 beq .L26 + 177 0004 70B5 push {r4, r5, r6, lr} + 178 0006 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2 + ARM GAS /tmp/ccY6LI9P.s page 4 + + + 179 000a 88B0 sub sp, sp, #32 + 180 000c 0D46 mov r5, r1 + 181 000e 0446 mov r4, r0 + 182 0010 03F0FF02 and r2, r3, #255 + 183 0014 002B cmp r3, #0 + 184 0016 56D0 beq .L31 + 185 .L25: + 186 0018 2146 mov r1, r4 + 187 001a 0223 movs r3, #2 + 188 001c 84F83D30 strb r3, [r4, #61] + 189 0020 51F8040B ldr r0, [r1], #4 + 190 0024 FFF7FEFF bl TIM_Base_SetConfig + 191 0028 AB68 ldr r3, [r5, #8] + 192 002a 2968 ldr r1, [r5] + 193 002c 2068 ldr r0, [r4] + 194 002e 0322 movs r2, #3 + 195 0030 FFF7FEFF bl TIM_TI1_SetConfig + 196 0034 2068 ldr r0, [r4] + 197 0036 6E68 ldr r6, [r5, #4] + 198 0038 8269 ldr r2, [r0, #24] + 199 003a E968 ldr r1, [r5, #12] + 200 003c 22F00C02 bic r2, r2, #12 + 201 0040 8261 str r2, [r0, #24] + 202 0042 8369 ldr r3, [r0, #24] + 203 0044 3343 orrs r3, r3, r6 + 204 0046 8361 str r3, [r0, #24] + 205 0048 4368 ldr r3, [r0, #4] + 206 004a 43F08003 orr r3, r3, #128 + 207 004e 4360 str r3, [r0, #4] + 208 0050 8368 ldr r3, [r0, #8] + 209 0052 0291 str r1, [sp, #8] + 210 0054 23F44013 bic r3, r3, #3145728 + 211 0058 23F07003 bic r3, r3, #112 + 212 005c 8360 str r3, [r0, #8] + 213 005e 8368 ldr r3, [r0, #8] + 214 0060 43F04003 orr r3, r3, #64 + 215 0064 8360 str r3, [r0, #8] + 216 0066 8368 ldr r3, [r0, #8] + 217 0068 23F48033 bic r3, r3, #65536 + 218 006c 23F00703 bic r3, r3, #7 + 219 0070 8360 str r3, [r0, #8] + 220 0072 8368 ldr r3, [r0, #8] + 221 0074 43F00403 orr r3, r3, #4 + 222 0078 8360 str r3, [r0, #8] + 223 007a 0025 movs r5, #0 + 224 007c 01A9 add r1, sp, #4 + 225 007e 7023 movs r3, #112 + 226 0080 0193 str r3, [sp, #4] + 227 0082 CDE90555 strd r5, r5, [sp, #20] + 228 0086 CDE90355 strd r5, r5, [sp, #12] + 229 008a 0795 str r5, [sp, #28] + 230 008c FFF7FEFF bl TIM_OC2_SetConfig + 231 0090 2168 ldr r1, [r4] + 232 0092 4A68 ldr r2, [r1, #4] + 233 0094 22F00072 bic r2, r2, #33554432 + 234 0098 22F07002 bic r2, r2, #112 + 235 009c 4A60 str r2, [r1, #4] + ARM GAS /tmp/ccY6LI9P.s page 5 + + + 236 009e 4A68 ldr r2, [r1, #4] + 237 00a0 0123 movs r3, #1 + 238 00a2 2846 mov r0, r5 + 239 00a4 42F05002 orr r2, r2, #80 + 240 00a8 4A60 str r2, [r1, #4] + 241 00aa 84F84830 strb r3, [r4, #72] + 242 00ae 84F83E30 strb r3, [r4, #62] + 243 00b2 84F83F30 strb r3, [r4, #63] + 244 00b6 84F84430 strb r3, [r4, #68] + 245 00ba 84F84530 strb r3, [r4, #69] + 246 00be 84F83D30 strb r3, [r4, #61] + 247 00c2 08B0 add sp, sp, #32 + 248 @ sp needed + 249 00c4 70BD pop {r4, r5, r6, pc} + 250 .L31: + 251 00c6 80F83C20 strb r2, [r0, #60] + 252 00ca FFF7FEFF bl HAL_TIMEx_HallSensor_MspInit + 253 00ce A3E7 b .L25 + 254 .L26: + 255 00d0 0120 movs r0, #1 + 256 00d2 7047 bx lr + 258 .section .text.HAL_TIMEx_HallSensor_MspDeInit,"ax",%progbits + 259 .align 1 + 260 .p2align 2,,3 + 261 .weak HAL_TIMEx_HallSensor_MspDeInit + 262 .syntax unified + 263 .thumb + 264 .thumb_func + 265 .fpu fpv4-sp-d16 + 267 HAL_TIMEx_HallSensor_MspDeInit: + 268 @ args = 0, pretend = 0, frame = 0 + 269 @ frame_needed = 0, uses_anonymous_args = 0 + 270 @ link register save eliminated. + 271 0000 7047 bx lr + 273 0002 00BF .section .text.HAL_TIMEx_HallSensor_DeInit,"ax",%progbits + 274 .align 1 + 275 .p2align 2,,3 + 276 .global HAL_TIMEx_HallSensor_DeInit + 277 .syntax unified + 278 .thumb + 279 .thumb_func + 280 .fpu fpv4-sp-d16 + 282 HAL_TIMEx_HallSensor_DeInit: + 283 @ args = 0, pretend = 0, frame = 0 + 284 @ frame_needed = 0, uses_anonymous_args = 0 + 285 0000 0222 movs r2, #2 + 286 0002 0368 ldr r3, [r0] + 287 0004 10B5 push {r4, lr} + 288 0006 80F83D20 strb r2, [r0, #61] + 289 000a 196A ldr r1, [r3, #32] + 290 000c 41F21112 movw r2, #4369 + 291 0010 1142 tst r1, r2 + 292 0012 0446 mov r4, r0 + 293 0014 08D1 bne .L34 + 294 0016 196A ldr r1, [r3, #32] + 295 0018 44F24442 movw r2, #17476 + 296 001c 1142 tst r1, r2 + ARM GAS /tmp/ccY6LI9P.s page 6 + + + 297 001e 03D1 bne .L34 + 298 0020 1A68 ldr r2, [r3] + 299 0022 22F00102 bic r2, r2, #1 + 300 0026 1A60 str r2, [r3] + 301 .L34: + 302 0028 2046 mov r0, r4 + 303 002a FFF7FEFF bl HAL_TIMEx_HallSensor_MspDeInit + 304 002e 0020 movs r0, #0 + 305 0030 84F84800 strb r0, [r4, #72] + 306 0034 84F83C00 strb r0, [r4, #60] + 307 0038 84F83E00 strb r0, [r4, #62] + 308 003c 84F83F00 strb r0, [r4, #63] + 309 0040 84F84400 strb r0, [r4, #68] + 310 0044 84F84500 strb r0, [r4, #69] + 311 0048 84F83D00 strb r0, [r4, #61] + 312 004c 10BD pop {r4, pc} + 314 004e 00BF .section .text.HAL_TIMEx_HallSensor_Start,"ax",%progbits + 315 .align 1 + 316 .p2align 2,,3 + 317 .global HAL_TIMEx_HallSensor_Start + 318 .syntax unified + 319 .thumb + 320 .thumb_func + 321 .fpu fpv4-sp-d16 + 323 HAL_TIMEx_HallSensor_Start: + 324 @ args = 0, pretend = 0, frame = 0 + 325 @ frame_needed = 0, uses_anonymous_args = 0 + 326 0000 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2 + 327 0004 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 328 0008 90F84410 ldrb r1, [r0, #68] @ zero_extendqisi2 + 329 000c 90F84520 ldrb r2, [r0, #69] @ zero_extendqisi2 + 330 0010 BCF1010F cmp ip, #1 + 331 0014 07D1 bne .L40 + 332 0016 DBB2 uxtb r3, r3 + 333 0018 012B cmp r3, #1 + 334 001a 10B5 push {r4, lr} + 335 001c 0446 mov r4, r0 + 336 001e 5FFA8CF0 uxtb r0, ip + 337 0022 02D0 beq .L52 + 338 .L37: + 339 0024 10BD pop {r4, pc} + 340 .L40: + 341 0026 0120 movs r0, #1 + 342 0028 7047 bx lr + 343 .L52: + 344 002a C9B2 uxtb r1, r1 + 345 002c 0129 cmp r1, #1 + 346 002e F9D1 bne .L37 + 347 0030 D2B2 uxtb r2, r2 + 348 0032 012A cmp r2, #1 + 349 0034 F6D1 bne .L37 + 350 0036 0223 movs r3, #2 + 351 0038 84F83E30 strb r3, [r4, #62] + 352 003c 2068 ldr r0, [r4] + 353 003e 84F83F30 strb r3, [r4, #63] + 354 0042 0021 movs r1, #0 + 355 0044 84F84430 strb r3, [r4, #68] + ARM GAS /tmp/ccY6LI9P.s page 7 + + + 356 0048 84F84530 strb r3, [r4, #69] + 357 004c FFF7FEFF bl TIM_CCxChannelCmd + 358 0050 2368 ldr r3, [r4] + 359 0052 134A ldr r2, .L53 + 360 0054 9342 cmp r3, r2 + 361 0056 18D0 beq .L38 + 362 0058 B3F1804F cmp r3, #1073741824 + 363 005c 15D0 beq .L38 + 364 005e A2F59432 sub r2, r2, #75776 + 365 0062 9342 cmp r3, r2 + 366 0064 11D0 beq .L38 + 367 0066 02F58062 add r2, r2, #1024 + 368 006a 9342 cmp r3, r2 + 369 006c 0DD0 beq .L38 + 370 006e 02F59632 add r2, r2, #76800 + 371 0072 9342 cmp r3, r2 + 372 0074 09D0 beq .L38 + 373 0076 02F54062 add r2, r2, #3072 + 374 007a 9342 cmp r3, r2 + 375 007c 05D0 beq .L38 + 376 .L39: + 377 007e 1A68 ldr r2, [r3] + 378 0080 42F00102 orr r2, r2, #1 + 379 0084 0020 movs r0, #0 + 380 0086 1A60 str r2, [r3] + 381 0088 10BD pop {r4, pc} + 382 .L38: + 383 008a 9968 ldr r1, [r3, #8] + 384 008c 054A ldr r2, .L53+4 + 385 008e 0A40 ands r2, r2, r1 + 386 0090 062A cmp r2, #6 + 387 0092 02D0 beq .L44 + 388 0094 B2F5803F cmp r2, #65536 + 389 0098 F1D1 bne .L39 + 390 .L44: + 391 009a 0020 movs r0, #0 + 392 009c 10BD pop {r4, pc} + 393 .L54: + 394 009e 00BF .align 2 + 395 .L53: + 396 00a0 002C0140 .word 1073818624 + 397 00a4 07000100 .word 65543 + 399 .section .text.HAL_TIMEx_HallSensor_Stop,"ax",%progbits + 400 .align 1 + 401 .p2align 2,,3 + 402 .global HAL_TIMEx_HallSensor_Stop + 403 .syntax unified + 404 .thumb + 405 .thumb_func + 406 .fpu fpv4-sp-d16 + 408 HAL_TIMEx_HallSensor_Stop: + 409 @ args = 0, pretend = 0, frame = 0 + 410 @ frame_needed = 0, uses_anonymous_args = 0 + 411 0000 0022 movs r2, #0 + 412 0002 10B5 push {r4, lr} + 413 0004 0446 mov r4, r0 + 414 0006 1146 mov r1, r2 + ARM GAS /tmp/ccY6LI9P.s page 8 + + + 415 0008 0068 ldr r0, [r0] + 416 000a FFF7FEFF bl TIM_CCxChannelCmd + 417 000e 2368 ldr r3, [r4] + 418 0010 196A ldr r1, [r3, #32] + 419 0012 41F21112 movw r2, #4369 + 420 0016 1142 tst r1, r2 + 421 0018 08D1 bne .L56 + 422 001a 196A ldr r1, [r3, #32] + 423 001c 44F24442 movw r2, #17476 + 424 0020 1142 tst r1, r2 + 425 0022 03D1 bne .L56 + 426 0024 1A68 ldr r2, [r3] + 427 0026 22F00102 bic r2, r2, #1 + 428 002a 1A60 str r2, [r3] + 429 .L56: + 430 002c 0123 movs r3, #1 + 431 002e 84F83E30 strb r3, [r4, #62] + 432 0032 84F83F30 strb r3, [r4, #63] + 433 0036 84F84430 strb r3, [r4, #68] + 434 003a 84F84530 strb r3, [r4, #69] + 435 003e 0020 movs r0, #0 + 436 0040 10BD pop {r4, pc} + 438 0042 00BF .section .text.HAL_TIMEx_HallSensor_Start_IT,"ax",%progbits + 439 .align 1 + 440 .p2align 2,,3 + 441 .global HAL_TIMEx_HallSensor_Start_IT + 442 .syntax unified + 443 .thumb + 444 .thumb_func + 445 .fpu fpv4-sp-d16 + 447 HAL_TIMEx_HallSensor_Start_IT: + 448 @ args = 0, pretend = 0, frame = 0 + 449 @ frame_needed = 0, uses_anonymous_args = 0 + 450 0000 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2 + 451 0004 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 452 0008 90F84410 ldrb r1, [r0, #68] @ zero_extendqisi2 + 453 000c 90F84520 ldrb r2, [r0, #69] @ zero_extendqisi2 + 454 0010 BCF1010F cmp ip, #1 + 455 0014 07D1 bne .L62 + 456 0016 DBB2 uxtb r3, r3 + 457 0018 012B cmp r3, #1 + 458 001a 10B5 push {r4, lr} + 459 001c 0446 mov r4, r0 + 460 001e 5FFA8CF0 uxtb r0, ip + 461 0022 02D0 beq .L74 + 462 .L59: + 463 0024 10BD pop {r4, pc} + 464 .L62: + 465 0026 0120 movs r0, #1 + 466 0028 7047 bx lr + 467 .L74: + 468 002a C9B2 uxtb r1, r1 + 469 002c 0129 cmp r1, #1 + 470 002e F9D1 bne .L59 + 471 0030 D2B2 uxtb r2, r2 + 472 0032 012A cmp r2, #1 + 473 0034 F6D1 bne .L59 + ARM GAS /tmp/ccY6LI9P.s page 9 + + + 474 0036 0223 movs r3, #2 + 475 0038 2068 ldr r0, [r4] + 476 003a 84F83E30 strb r3, [r4, #62] + 477 003e 84F83F30 strb r3, [r4, #63] + 478 0042 84F84430 strb r3, [r4, #68] + 479 0046 84F84530 strb r3, [r4, #69] + 480 004a C368 ldr r3, [r0, #12] + 481 004c 43F00203 orr r3, r3, #2 + 482 0050 C360 str r3, [r0, #12] + 483 0052 0021 movs r1, #0 + 484 0054 FFF7FEFF bl TIM_CCxChannelCmd + 485 0058 2368 ldr r3, [r4] + 486 005a 134A ldr r2, .L75 + 487 005c 9342 cmp r3, r2 + 488 005e 18D0 beq .L60 + 489 0060 B3F1804F cmp r3, #1073741824 + 490 0064 15D0 beq .L60 + 491 0066 A2F59432 sub r2, r2, #75776 + 492 006a 9342 cmp r3, r2 + 493 006c 11D0 beq .L60 + 494 006e 02F58062 add r2, r2, #1024 + 495 0072 9342 cmp r3, r2 + 496 0074 0DD0 beq .L60 + 497 0076 02F59632 add r2, r2, #76800 + 498 007a 9342 cmp r3, r2 + 499 007c 09D0 beq .L60 + 500 007e 02F54062 add r2, r2, #3072 + 501 0082 9342 cmp r3, r2 + 502 0084 05D0 beq .L60 + 503 .L61: + 504 0086 1A68 ldr r2, [r3] + 505 0088 42F00102 orr r2, r2, #1 + 506 008c 0020 movs r0, #0 + 507 008e 1A60 str r2, [r3] + 508 0090 10BD pop {r4, pc} + 509 .L60: + 510 0092 9968 ldr r1, [r3, #8] + 511 0094 054A ldr r2, .L75+4 + 512 0096 0A40 ands r2, r2, r1 + 513 0098 062A cmp r2, #6 + 514 009a 02D0 beq .L66 + 515 009c B2F5803F cmp r2, #65536 + 516 00a0 F1D1 bne .L61 + 517 .L66: + 518 00a2 0020 movs r0, #0 + 519 00a4 10BD pop {r4, pc} + 520 .L76: + 521 00a6 00BF .align 2 + 522 .L75: + 523 00a8 002C0140 .word 1073818624 + 524 00ac 07000100 .word 65543 + 526 .section .text.HAL_TIMEx_HallSensor_Stop_IT,"ax",%progbits + 527 .align 1 + 528 .p2align 2,,3 + 529 .global HAL_TIMEx_HallSensor_Stop_IT + 530 .syntax unified + 531 .thumb + ARM GAS /tmp/ccY6LI9P.s page 10 + + + 532 .thumb_func + 533 .fpu fpv4-sp-d16 + 535 HAL_TIMEx_HallSensor_Stop_IT: + 536 @ args = 0, pretend = 0, frame = 0 + 537 @ frame_needed = 0, uses_anonymous_args = 0 + 538 0000 0022 movs r2, #0 + 539 0002 10B5 push {r4, lr} + 540 0004 0446 mov r4, r0 + 541 0006 1146 mov r1, r2 + 542 0008 0068 ldr r0, [r0] + 543 000a FFF7FEFF bl TIM_CCxChannelCmd + 544 000e 2368 ldr r3, [r4] + 545 0010 DA68 ldr r2, [r3, #12] + 546 0012 22F00202 bic r2, r2, #2 + 547 0016 DA60 str r2, [r3, #12] + 548 0018 1A6A ldr r2, [r3, #32] + 549 001a 41F21111 movw r1, #4369 + 550 001e 0A42 tst r2, r1 + 551 0020 08D1 bne .L78 + 552 0022 196A ldr r1, [r3, #32] + 553 0024 44F24442 movw r2, #17476 + 554 0028 1142 tst r1, r2 + 555 002a 03D1 bne .L78 + 556 002c 1A68 ldr r2, [r3] + 557 002e 22F00102 bic r2, r2, #1 + 558 0032 1A60 str r2, [r3] + 559 .L78: + 560 0034 0123 movs r3, #1 + 561 0036 84F83E30 strb r3, [r4, #62] + 562 003a 84F83F30 strb r3, [r4, #63] + 563 003e 84F84430 strb r3, [r4, #68] + 564 0042 84F84530 strb r3, [r4, #69] + 565 0046 0020 movs r0, #0 + 566 0048 10BD pop {r4, pc} + 568 004a 00BF .section .text.HAL_TIMEx_HallSensor_Start_DMA,"ax",%progbits + 569 .align 1 + 570 .p2align 2,,3 + 571 .global HAL_TIMEx_HallSensor_Start_DMA + 572 .syntax unified + 573 .thumb + 574 .thumb_func + 575 .fpu fpv4-sp-d16 + 577 HAL_TIMEx_HallSensor_Start_DMA: + 578 @ args = 0, pretend = 0, frame = 0 + 579 @ frame_needed = 0, uses_anonymous_args = 0 + 580 0000 70B5 push {r4, r5, r6, lr} + 581 0002 90F83EE0 ldrb lr, [r0, #62] @ zero_extendqisi2 + 582 0006 0446 mov r4, r0 + 583 0008 BEF1020F cmp lr, #2 + 584 000c 94F844C0 ldrb ip, [r4, #68] @ zero_extendqisi2 + 585 0010 5FFA8EF0 uxtb r0, lr + 586 0014 43D0 beq .L81 + 587 0016 5FFA8CFC uxtb ip, ip + 588 001a BCF1020F cmp ip, #2 + 589 001e 4CD0 beq .L87 + 590 0020 0128 cmp r0, #1 + 591 0022 3FD1 bne .L83 + ARM GAS /tmp/ccY6LI9P.s page 11 + + + 592 0024 BCF1010F cmp ip, #1 + 593 0028 3CD1 bne .L83 + 594 002a 0D46 mov r5, r1 + 595 002c 1646 mov r6, r2 + 596 002e 0029 cmp r1, #0 + 597 0030 36D0 beq .L101 + 598 .L84: + 599 0032 0221 movs r1, #2 + 600 0034 84F83E10 strb r1, [r4, #62] + 601 0038 2068 ldr r0, [r4] + 602 003a 84F84410 strb r1, [r4, #68] + 603 003e 0122 movs r2, #1 + 604 0040 0021 movs r1, #0 + 605 0042 FFF7FEFF bl TIM_CCxChannelCmd + 606 0046 606A ldr r0, [r4, #36] + 607 0048 1D4B ldr r3, .L102 + 608 004a 2168 ldr r1, [r4] + 609 004c C362 str r3, [r0, #44] + 610 004e 1D4B ldr r3, .L102+4 + 611 0050 0363 str r3, [r0, #48] + 612 0052 1D4B ldr r3, .L102+8 + 613 0054 4363 str r3, [r0, #52] + 614 0056 2A46 mov r2, r5 + 615 0058 3346 mov r3, r6 + 616 005a 3431 adds r1, r1, #52 + 617 005c FFF7FEFF bl HAL_DMA_Start_IT + 618 0060 00BB cbnz r0, .L83 + 619 0062 2368 ldr r3, [r4] + 620 0064 1949 ldr r1, .L102+12 + 621 0066 DA68 ldr r2, [r3, #12] + 622 0068 8B42 cmp r3, r1 + 623 006a 42F40072 orr r2, r2, #512 + 624 006e DA60 str r2, [r3, #12] + 625 0070 1AD0 beq .L85 + 626 0072 B3F1804F cmp r3, #1073741824 + 627 0076 17D0 beq .L85 + 628 0078 154A ldr r2, .L102+16 + 629 007a 9342 cmp r3, r2 + 630 007c 14D0 beq .L85 + 631 007e 02F58062 add r2, r2, #1024 + 632 0082 9342 cmp r3, r2 + 633 0084 10D0 beq .L85 + 634 0086 02F59632 add r2, r2, #76800 + 635 008a 9342 cmp r3, r2 + 636 008c 0CD0 beq .L85 + 637 008e 02F54062 add r2, r2, #3072 + 638 0092 9342 cmp r3, r2 + 639 0094 08D0 beq .L85 + 640 .L86: + 641 0096 1A68 ldr r2, [r3] + 642 0098 42F00102 orr r2, r2, #1 + 643 009c 1A60 str r2, [r3] + 644 .L81: + 645 009e 70BD pop {r4, r5, r6, pc} + 646 .L101: + 647 00a0 002A cmp r2, #0 + 648 00a2 C6D0 beq .L84 + ARM GAS /tmp/ccY6LI9P.s page 12 + + + 649 .L83: + 650 00a4 0120 movs r0, #1 + 651 00a6 70BD pop {r4, r5, r6, pc} + 652 .L85: + 653 00a8 9968 ldr r1, [r3, #8] + 654 00aa 0A4A ldr r2, .L102+20 + 655 00ac 0A40 ands r2, r2, r1 + 656 00ae 062A cmp r2, #6 + 657 00b0 F5D0 beq .L81 + 658 00b2 B2F5803F cmp r2, #65536 + 659 00b6 EED1 bne .L86 + 660 00b8 F1E7 b .L81 + 661 .L87: + 662 00ba 6046 mov r0, ip + 663 00bc 70BD pop {r4, r5, r6, pc} + 664 .L103: + 665 00be 00BF .align 2 + 666 .L102: + 667 00c0 00000000 .word TIM_DMACaptureCplt + 668 00c4 00000000 .word TIM_DMACaptureHalfCplt + 669 00c8 00000000 .word TIM_DMAError + 670 00cc 002C0140 .word 1073818624 + 671 00d0 00040040 .word 1073742848 + 672 00d4 07000100 .word 65543 + 674 .section .text.HAL_TIMEx_HallSensor_Stop_DMA,"ax",%progbits + 675 .align 1 + 676 .p2align 2,,3 + 677 .global HAL_TIMEx_HallSensor_Stop_DMA + 678 .syntax unified + 679 .thumb + 680 .thumb_func + 681 .fpu fpv4-sp-d16 + 683 HAL_TIMEx_HallSensor_Stop_DMA: + 684 @ args = 0, pretend = 0, frame = 0 + 685 @ frame_needed = 0, uses_anonymous_args = 0 + 686 0000 10B5 push {r4, lr} + 687 0002 0022 movs r2, #0 + 688 0004 0446 mov r4, r0 + 689 0006 1146 mov r1, r2 + 690 0008 0068 ldr r0, [r0] + 691 000a FFF7FEFF bl TIM_CCxChannelCmd + 692 000e 2268 ldr r2, [r4] + 693 0010 606A ldr r0, [r4, #36] + 694 0012 D368 ldr r3, [r2, #12] + 695 0014 23F40073 bic r3, r3, #512 + 696 0018 D360 str r3, [r2, #12] + 697 001a FFF7FEFF bl HAL_DMA_Abort_IT + 698 001e 2368 ldr r3, [r4] + 699 0020 196A ldr r1, [r3, #32] + 700 0022 41F21112 movw r2, #4369 + 701 0026 1142 tst r1, r2 + 702 0028 08D1 bne .L105 + 703 002a 196A ldr r1, [r3, #32] + 704 002c 44F24442 movw r2, #17476 + 705 0030 1142 tst r1, r2 + 706 0032 03D1 bne .L105 + 707 0034 1A68 ldr r2, [r3] + ARM GAS /tmp/ccY6LI9P.s page 13 + + + 708 0036 22F00102 bic r2, r2, #1 + 709 003a 1A60 str r2, [r3] + 710 .L105: + 711 003c 0123 movs r3, #1 + 712 003e 84F83E30 strb r3, [r4, #62] + 713 0042 84F84430 strb r3, [r4, #68] + 714 0046 0020 movs r0, #0 + 715 0048 10BD pop {r4, pc} + 717 004a 00BF .section .text.HAL_TIMEx_OCN_Start,"ax",%progbits + 718 .align 1 + 719 .p2align 2,,3 + 720 .global HAL_TIMEx_OCN_Start + 721 .syntax unified + 722 .thumb + 723 .thumb_func + 724 .fpu fpv4-sp-d16 + 726 HAL_TIMEx_OCN_Start: + 727 @ args = 0, pretend = 0, frame = 0 + 728 @ frame_needed = 0, uses_anonymous_args = 0 + 729 @ link register save eliminated. + 730 0000 0029 cmp r1, #0 + 731 0002 3AD1 bne .L108 + 732 0004 90F84430 ldrb r3, [r0, #68] @ zero_extendqisi2 + 733 0008 012B cmp r3, #1 + 734 000a 3ED1 bne .L123 + 735 000c 0223 movs r3, #2 + 736 000e 80F84430 strb r3, [r0, #68] + 737 .L116: + 738 0012 0368 ldr r3, [r0] + 739 0014 0422 movs r2, #4 + 740 0016 186A ldr r0, [r3, #32] + 741 0018 01F01F01 and r1, r1, #31 + 742 001c 02FA01F1 lsl r1, r2, r1 + 743 0020 20EA0100 bic r0, r0, r1 + 744 0024 1862 str r0, [r3, #32] + 745 0026 1A6A ldr r2, [r3, #32] + 746 0028 2448 ldr r0, .L135 + 747 002a 1143 orrs r1, r1, r2 + 748 002c 1962 str r1, [r3, #32] + 749 002e 5A6C ldr r2, [r3, #68] + 750 0030 8342 cmp r3, r0 + 751 0032 42F40042 orr r2, r2, #32768 + 752 0036 5A64 str r2, [r3, #68] + 753 0038 11D0 beq .L118 + 754 003a B3F1804F cmp r3, #1073741824 + 755 003e 0ED0 beq .L118 + 756 0040 1F4A ldr r2, .L135+4 + 757 0042 9342 cmp r3, r2 + 758 0044 0BD0 beq .L118 + 759 0046 02F58062 add r2, r2, #1024 + 760 004a 9342 cmp r3, r2 + 761 004c 07D0 beq .L118 + 762 004e 02F59632 add r2, r2, #76800 + 763 0052 9342 cmp r3, r2 + 764 0054 03D0 beq .L118 + 765 0056 02F54062 add r2, r2, #3072 + 766 005a 9342 cmp r3, r2 + ARM GAS /tmp/ccY6LI9P.s page 14 + + + 767 005c 07D1 bne .L119 + 768 .L118: + 769 005e 9968 ldr r1, [r3, #8] + 770 0060 184A ldr r2, .L135+8 + 771 0062 0A40 ands r2, r2, r1 + 772 0064 062A cmp r2, #6 + 773 0066 12D0 beq .L125 + 774 0068 B2F5803F cmp r2, #65536 + 775 006c 0FD0 beq .L125 + 776 .L119: + 777 006e 1A68 ldr r2, [r3] + 778 0070 42F00102 orr r2, r2, #1 + 779 0074 0020 movs r0, #0 + 780 0076 1A60 str r2, [r3] + 781 0078 7047 bx lr + 782 .L108: + 783 007a 0429 cmp r1, #4 + 784 007c 0DD0 beq .L133 + 785 007e 0829 cmp r1, #8 + 786 0080 13D0 beq .L134 + 787 0082 90F84730 ldrb r3, [r0, #71] @ zero_extendqisi2 + 788 0086 012B cmp r3, #1 + 789 0088 03D0 beq .L132 + 790 .L123: + 791 008a 0120 movs r0, #1 + 792 008c 7047 bx lr + 793 .L125: + 794 008e 0020 movs r0, #0 + 795 0090 7047 bx lr + 796 .L132: + 797 0092 0223 movs r3, #2 + 798 0094 80F84730 strb r3, [r0, #71] + 799 0098 BBE7 b .L116 + 800 .L133: + 801 009a 90F84530 ldrb r3, [r0, #69] @ zero_extendqisi2 + 802 009e 012B cmp r3, #1 + 803 00a0 F3D1 bne .L123 + 804 00a2 0223 movs r3, #2 + 805 00a4 80F84530 strb r3, [r0, #69] + 806 00a8 B3E7 b .L116 + 807 .L134: + 808 00aa 90F84630 ldrb r3, [r0, #70] @ zero_extendqisi2 + 809 00ae 012B cmp r3, #1 + 810 00b0 EBD1 bne .L123 + 811 00b2 0223 movs r3, #2 + 812 00b4 80F84630 strb r3, [r0, #70] + 813 00b8 ABE7 b .L116 + 814 .L136: + 815 00ba 00BF .align 2 + 816 .L135: + 817 00bc 002C0140 .word 1073818624 + 818 00c0 00040040 .word 1073742848 + 819 00c4 07000100 .word 65543 + 821 .section .text.HAL_TIMEx_OCN_Stop,"ax",%progbits + 822 .align 1 + 823 .p2align 2,,3 + 824 .global HAL_TIMEx_OCN_Stop + ARM GAS /tmp/ccY6LI9P.s page 15 + + + 825 .syntax unified + 826 .thumb + 827 .thumb_func + 828 .fpu fpv4-sp-d16 + 830 HAL_TIMEx_OCN_Stop: + 831 @ args = 0, pretend = 0, frame = 0 + 832 @ frame_needed = 0, uses_anonymous_args = 0 + 833 @ link register save eliminated. + 834 0000 0368 ldr r3, [r0] + 835 0002 10B4 push {r4} + 836 0004 1A6A ldr r2, [r3, #32] + 837 0006 01F01F04 and r4, r1, #31 + 838 000a 4FF0040C mov ip, #4 + 839 000e 0CFA04FC lsl ip, ip, r4 + 840 0012 22EA0C02 bic r2, r2, ip + 841 0016 1A62 str r2, [r3, #32] + 842 0018 1A6A ldr r2, [r3, #32] + 843 001a 1A62 str r2, [r3, #32] + 844 001c 1C6A ldr r4, [r3, #32] + 845 001e 41F21112 movw r2, #4369 + 846 0022 1442 tst r4, r2 + 847 0024 04D1 bne .L138 + 848 0026 1C6A ldr r4, [r3, #32] + 849 0028 44F24442 movw r2, #17476 + 850 002c 1442 tst r4, r2 + 851 002e 22D0 beq .L145 + 852 .L138: + 853 0030 1C6A ldr r4, [r3, #32] + 854 0032 41F21112 movw r2, #4369 + 855 0036 1442 tst r4, r2 + 856 0038 04D1 bne .L139 + 857 003a 1C6A ldr r4, [r3, #32] + 858 003c 44F24442 movw r2, #17476 + 859 0040 1442 tst r4, r2 + 860 0042 13D0 beq .L146 + 861 .L139: + 862 0044 0123 movs r3, #1 + 863 0046 29B9 cbnz r1, .L140 + 864 0048 80F84430 strb r3, [r0, #68] + 865 004c 5DF8044B ldr r4, [sp], #4 + 866 0050 0020 movs r0, #0 + 867 0052 7047 bx lr + 868 .L140: + 869 0054 0429 cmp r1, #4 + 870 0056 13D0 beq .L147 + 871 0058 0829 cmp r1, #8 + 872 005a 0CBF ite eq + 873 005c 80F84630 strbeq r3, [r0, #70] + 874 0060 80F84730 strbne r3, [r0, #71] + 875 0064 5DF8044B ldr r4, [sp], #4 + 876 0068 0020 movs r0, #0 + 877 006a 7047 bx lr + 878 .L146: + 879 006c 1A68 ldr r2, [r3] + 880 006e 22F00102 bic r2, r2, #1 + 881 0072 1A60 str r2, [r3] + 882 0074 E6E7 b .L139 + ARM GAS /tmp/ccY6LI9P.s page 16 + + + 883 .L145: + 884 0076 5A6C ldr r2, [r3, #68] + 885 0078 22F40042 bic r2, r2, #32768 + 886 007c 5A64 str r2, [r3, #68] + 887 007e D7E7 b .L138 + 888 .L147: + 889 0080 80F84530 strb r3, [r0, #69] + 890 0084 5DF8044B ldr r4, [sp], #4 + 891 0088 0020 movs r0, #0 + 892 008a 7047 bx lr + 894 .section .text.HAL_TIMEx_OCN_Start_IT,"ax",%progbits + 895 .align 1 + 896 .p2align 2,,3 + 897 .global HAL_TIMEx_OCN_Start_IT + 898 .syntax unified + 899 .thumb + 900 .thumb_func + 901 .fpu fpv4-sp-d16 + 903 HAL_TIMEx_OCN_Start_IT: + 904 @ args = 0, pretend = 0, frame = 0 + 905 @ frame_needed = 0, uses_anonymous_args = 0 + 906 @ link register save eliminated. + 907 0000 0029 cmp r1, #0 + 908 0002 42D1 bne .L149 + 909 0004 90F84430 ldrb r3, [r0, #68] @ zero_extendqisi2 + 910 0008 012B cmp r3, #1 + 911 000a 46D1 bne .L169 + 912 000c 0368 ldr r3, [r0] + 913 000e 0222 movs r2, #2 + 914 0010 80F84420 strb r2, [r0, #68] + 915 0014 DA68 ldr r2, [r3, #12] + 916 0016 42F00202 orr r2, r2, #2 + 917 001a DA60 str r2, [r3, #12] + 918 .L156: + 919 001c DA68 ldr r2, [r3, #12] + 920 001e 42F08002 orr r2, r2, #128 + 921 0022 DA60 str r2, [r3, #12] + 922 0024 186A ldr r0, [r3, #32] + 923 0026 0422 movs r2, #4 + 924 0028 01F01F01 and r1, r1, #31 + 925 002c 02FA01F1 lsl r1, r2, r1 + 926 0030 20EA0100 bic r0, r0, r1 + 927 0034 1862 str r0, [r3, #32] + 928 0036 1A6A ldr r2, [r3, #32] + 929 0038 3948 ldr r0, .L180 + 930 003a 1143 orrs r1, r1, r2 + 931 003c 1962 str r1, [r3, #32] + 932 003e 5A6C ldr r2, [r3, #68] + 933 0040 8342 cmp r3, r0 + 934 0042 42F40042 orr r2, r2, #32768 + 935 0046 5A64 str r2, [r3, #68] + 936 0048 11D0 beq .L163 + 937 004a B3F1804F cmp r3, #1073741824 + 938 004e 0ED0 beq .L163 + 939 0050 344A ldr r2, .L180+4 + 940 0052 9342 cmp r3, r2 + 941 0054 0BD0 beq .L163 + ARM GAS /tmp/ccY6LI9P.s page 17 + + + 942 0056 02F58062 add r2, r2, #1024 + 943 005a 9342 cmp r3, r2 + 944 005c 07D0 beq .L163 + 945 005e 02F59632 add r2, r2, #76800 + 946 0062 9342 cmp r3, r2 + 947 0064 03D0 beq .L163 + 948 0066 02F54062 add r2, r2, #3072 + 949 006a 9342 cmp r3, r2 + 950 006c 07D1 bne .L164 + 951 .L163: + 952 006e 9968 ldr r1, [r3, #8] + 953 0070 2D4A ldr r2, .L180+8 + 954 0072 0A40 ands r2, r2, r1 + 955 0074 062A cmp r2, #6 + 956 0076 31D0 beq .L171 + 957 0078 B2F5803F cmp r2, #65536 + 958 007c 2ED0 beq .L171 + 959 .L164: + 960 007e 1A68 ldr r2, [r3] + 961 0080 42F00102 orr r2, r2, #1 + 962 0084 0020 movs r0, #0 + 963 0086 1A60 str r2, [r3] + 964 0088 7047 bx lr + 965 .L149: + 966 008a 0429 cmp r1, #4 + 967 008c 35D0 beq .L178 + 968 008e 0829 cmp r1, #8 + 969 0090 26D0 beq .L179 + 970 0092 90F84730 ldrb r3, [r0, #71] @ zero_extendqisi2 + 971 0096 012B cmp r3, #1 + 972 0098 01D0 beq .L177 + 973 .L169: + 974 009a 0120 movs r0, #1 + 975 009c 7047 bx lr + 976 .L177: + 977 009e 0429 cmp r1, #4 + 978 00a0 2FD0 beq .L153 + 979 00a2 0829 cmp r1, #8 + 980 00a4 20D0 beq .L176 + 981 00a6 0222 movs r2, #2 + 982 00a8 0B1F subs r3, r1, #4 + 983 00aa 80F84720 strb r2, [r0, #71] + 984 00ae 082B cmp r3, #8 + 985 00b0 F3D8 bhi .L169 + 986 00b2 01A2 adr r2, .L162 + 987 00b4 52F823F0 ldr pc, [r2, r3, lsl #2] + 988 .p2align 2 + 989 .L162: + 990 00b8 09010000 .word .L158+1 + 991 00bc 9B000000 .word .L169+1 + 992 00c0 9B000000 .word .L169+1 + 993 00c4 9B000000 .word .L169+1 + 994 00c8 EF000000 .word .L160+1 + 995 00cc 9B000000 .word .L169+1 + 996 00d0 9B000000 .word .L169+1 + 997 00d4 9B000000 .word .L169+1 + 998 00d8 15010000 .word .L161+1 + ARM GAS /tmp/ccY6LI9P.s page 18 + + + 999 .p2align 1 + 1000 .L171: + 1001 00dc 0020 movs r0, #0 + 1002 00de 7047 bx lr + 1003 .L179: + 1004 00e0 90F84630 ldrb r3, [r0, #70] @ zero_extendqisi2 + 1005 00e4 012B cmp r3, #1 + 1006 00e6 D8D1 bne .L169 + 1007 .L176: + 1008 00e8 0223 movs r3, #2 + 1009 00ea 80F84630 strb r3, [r0, #70] + 1010 .L160: + 1011 00ee 0368 ldr r3, [r0] + 1012 00f0 DA68 ldr r2, [r3, #12] + 1013 00f2 42F00802 orr r2, r2, #8 + 1014 00f6 DA60 str r2, [r3, #12] + 1015 00f8 90E7 b .L156 + 1016 .L178: + 1017 00fa 90F84530 ldrb r3, [r0, #69] @ zero_extendqisi2 + 1018 00fe 012B cmp r3, #1 + 1019 0100 CBD1 bne .L169 + 1020 .L153: + 1021 0102 0223 movs r3, #2 + 1022 0104 80F84530 strb r3, [r0, #69] + 1023 .L158: + 1024 0108 0368 ldr r3, [r0] + 1025 010a DA68 ldr r2, [r3, #12] + 1026 010c 42F00402 orr r2, r2, #4 + 1027 0110 DA60 str r2, [r3, #12] + 1028 0112 83E7 b .L156 + 1029 .L161: + 1030 0114 0368 ldr r3, [r0] + 1031 0116 DA68 ldr r2, [r3, #12] + 1032 0118 42F01002 orr r2, r2, #16 + 1033 011c DA60 str r2, [r3, #12] + 1034 011e 7DE7 b .L156 + 1035 .L181: + 1036 .align 2 + 1037 .L180: + 1038 0120 002C0140 .word 1073818624 + 1039 0124 00040040 .word 1073742848 + 1040 0128 07000100 .word 65543 + 1042 .section .text.HAL_TIMEx_OCN_Stop_IT,"ax",%progbits + 1043 .align 1 + 1044 .p2align 2,,3 + 1045 .global HAL_TIMEx_OCN_Stop_IT + 1046 .syntax unified + 1047 .thumb + 1048 .thumb_func + 1049 .fpu fpv4-sp-d16 + 1051 HAL_TIMEx_OCN_Stop_IT: + 1052 @ args = 0, pretend = 0, frame = 0 + 1053 @ frame_needed = 0, uses_anonymous_args = 0 + 1054 @ link register save eliminated. + 1055 0000 0C29 cmp r1, #12 + 1056 0002 08D8 bhi .L196 + 1057 0004 DFE801F0 tbb [pc, r1] + ARM GAS /tmp/ccY6LI9P.s page 19 + + + 1058 .L185: + 1059 0008 54 .byte (.L188-.L185)/2 + 1060 0009 07 .byte (.L196-.L185)/2 + 1061 000a 07 .byte (.L196-.L185)/2 + 1062 000b 07 .byte (.L196-.L185)/2 + 1063 000c 4E .byte (.L187-.L185)/2 + 1064 000d 07 .byte (.L196-.L185)/2 + 1065 000e 07 .byte (.L196-.L185)/2 + 1066 000f 07 .byte (.L196-.L185)/2 + 1067 0010 48 .byte (.L186-.L185)/2 + 1068 0011 07 .byte (.L196-.L185)/2 + 1069 0012 07 .byte (.L196-.L185)/2 + 1070 0013 07 .byte (.L196-.L185)/2 + 1071 0014 09 .byte (.L184-.L185)/2 + 1072 0015 00 .p2align 1 + 1073 .L196: + 1074 0016 0120 movs r0, #1 + 1075 0018 7047 bx lr + 1076 .L184: + 1077 001a 0368 ldr r3, [r0] + 1078 001c DA68 ldr r2, [r3, #12] + 1079 001e 22F01002 bic r2, r2, #16 + 1080 0022 DA60 str r2, [r3, #12] + 1081 .L189: + 1082 0024 1A6A ldr r2, [r3, #32] + 1083 0026 10B4 push {r4} + 1084 0028 4FF0040C mov ip, #4 + 1085 002c 01F01F04 and r4, r1, #31 + 1086 0030 0CFA04FC lsl ip, ip, r4 + 1087 0034 22EA0C02 bic r2, r2, ip + 1088 0038 1A62 str r2, [r3, #32] + 1089 003a 1A6A ldr r2, [r3, #32] + 1090 003c 1A62 str r2, [r3, #32] + 1091 003e 1C6A ldr r4, [r3, #32] + 1092 0040 44F24442 movw r2, #17476 + 1093 0044 1442 tst r4, r2 + 1094 0046 03D1 bne .L190 + 1095 0048 DA68 ldr r2, [r3, #12] + 1096 004a 22F08002 bic r2, r2, #128 + 1097 004e DA60 str r2, [r3, #12] + 1098 .L190: + 1099 0050 1C6A ldr r4, [r3, #32] + 1100 0052 41F21112 movw r2, #4369 + 1101 0056 1442 tst r4, r2 + 1102 0058 08D1 bne .L191 + 1103 005a 1C6A ldr r4, [r3, #32] + 1104 005c 44F24442 movw r2, #17476 + 1105 0060 1442 tst r4, r2 + 1106 0062 03D1 bne .L191 + 1107 0064 5A6C ldr r2, [r3, #68] + 1108 0066 22F40042 bic r2, r2, #32768 + 1109 006a 5A64 str r2, [r3, #68] + 1110 .L191: + 1111 006c 1C6A ldr r4, [r3, #32] + 1112 006e 41F21112 movw r2, #4369 + 1113 0072 1442 tst r4, r2 + 1114 0074 08D1 bne .L192 + ARM GAS /tmp/ccY6LI9P.s page 20 + + + 1115 0076 1C6A ldr r4, [r3, #32] + 1116 0078 44F24442 movw r2, #17476 + 1117 007c 1442 tst r4, r2 + 1118 007e 03D1 bne .L192 + 1119 0080 1A68 ldr r2, [r3] + 1120 0082 22F00102 bic r2, r2, #1 + 1121 0086 1A60 str r2, [r3] + 1122 .L192: + 1123 0088 0123 movs r3, #1 + 1124 008a B9B9 cbnz r1, .L193 + 1125 008c 80F84430 strb r3, [r0, #68] + 1126 0090 5DF8044B ldr r4, [sp], #4 + 1127 0094 0846 mov r0, r1 + 1128 0096 7047 bx lr + 1129 .L186: + 1130 0098 0368 ldr r3, [r0] + 1131 009a DA68 ldr r2, [r3, #12] + 1132 009c 22F00802 bic r2, r2, #8 + 1133 00a0 DA60 str r2, [r3, #12] + 1134 00a2 BFE7 b .L189 + 1135 .L187: + 1136 00a4 0368 ldr r3, [r0] + 1137 00a6 DA68 ldr r2, [r3, #12] + 1138 00a8 22F00402 bic r2, r2, #4 + 1139 00ac DA60 str r2, [r3, #12] + 1140 00ae B9E7 b .L189 + 1141 .L188: + 1142 00b0 0368 ldr r3, [r0] + 1143 00b2 DA68 ldr r2, [r3, #12] + 1144 00b4 22F00202 bic r2, r2, #2 + 1145 00b8 DA60 str r2, [r3, #12] + 1146 00ba B3E7 b .L189 + 1147 .L193: + 1148 00bc 0429 cmp r1, #4 + 1149 00be 09D0 beq .L200 + 1150 00c0 0829 cmp r1, #8 + 1151 00c2 0CBF ite eq + 1152 00c4 80F84630 strbeq r3, [r0, #70] + 1153 00c8 80F84730 strbne r3, [r0, #71] + 1154 00cc 5DF8044B ldr r4, [sp], #4 + 1155 00d0 0020 movs r0, #0 + 1156 00d2 7047 bx lr + 1157 .L200: + 1158 00d4 80F84530 strb r3, [r0, #69] + 1159 00d8 5DF8044B ldr r4, [sp], #4 + 1160 00dc 0020 movs r0, #0 + 1161 00de 7047 bx lr + 1163 .section .text.HAL_TIMEx_OCN_Start_DMA,"ax",%progbits + 1164 .align 1 + 1165 .p2align 2,,3 + 1166 .global HAL_TIMEx_OCN_Start_DMA + 1167 .syntax unified + 1168 .thumb + 1169 .thumb_func + 1170 .fpu fpv4-sp-d16 + 1172 HAL_TIMEx_OCN_Start_DMA: + 1173 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccY6LI9P.s page 21 + + + 1174 @ frame_needed = 0, uses_anonymous_args = 0 + 1175 0000 70B5 push {r4, r5, r6, lr} + 1176 0002 0546 mov r5, r0 + 1177 0004 0C46 mov r4, r1 + 1178 0006 0029 cmp r1, #0 + 1179 0008 5DD1 bne .L202 + 1180 000a 90F84410 ldrb r1, [r0, #68] @ zero_extendqisi2 + 1181 000e 0229 cmp r1, #2 + 1182 0010 C8B2 uxtb r0, r1 + 1183 0012 57D0 beq .L235 + 1184 .L204: + 1185 0014 95F84410 ldrb r1, [r5, #68] @ zero_extendqisi2 + 1186 0018 A1F10101 sub r1, #1 + 1187 001c B1FA81F1 clz r1, r1 + 1188 0020 4909 lsrs r1, r1, #5 + 1189 .L209: + 1190 0022 0029 cmp r1, #0 + 1191 0024 6CD0 beq .L231 + 1192 0026 002A cmp r2, #0 + 1193 0028 68D0 beq .L227 + 1194 .L215: + 1195 002a 002C cmp r4, #0 + 1196 002c 40F0C180 bne .L216 + 1197 0030 0221 movs r1, #2 + 1198 0032 85F84410 strb r1, [r5, #68] + 1199 .L217: + 1200 0036 686A ldr r0, [r5, #36] + 1201 0038 754E ldr r6, .L251 + 1202 003a 1146 mov r1, r2 + 1203 003c 2A68 ldr r2, [r5] + 1204 003e C662 str r6, [r0, #44] + 1205 0040 744E ldr r6, .L251+4 + 1206 0042 0663 str r6, [r0, #48] + 1207 0044 744E ldr r6, .L251+8 + 1208 0046 4663 str r6, [r0, #52] + 1209 0048 3432 adds r2, r2, #52 + 1210 004a FFF7FEFF bl HAL_DMA_Start_IT + 1211 004e 0028 cmp r0, #0 + 1212 0050 56D1 bne .L231 + 1213 0052 2B68 ldr r3, [r5] + 1214 0054 DA68 ldr r2, [r3, #12] + 1215 0056 42F40072 orr r2, r2, #512 + 1216 005a DA60 str r2, [r3, #12] + 1217 .L224: + 1218 005c 186A ldr r0, [r3, #32] + 1219 005e 6F49 ldr r1, .L251+12 + 1220 0060 0422 movs r2, #4 + 1221 0062 04F01F04 and r4, r4, #31 + 1222 0066 02FA04F4 lsl r4, r2, r4 + 1223 006a 20EA0400 bic r0, r0, r4 + 1224 006e 1862 str r0, [r3, #32] + 1225 0070 1A6A ldr r2, [r3, #32] + 1226 0072 1443 orrs r4, r4, r2 + 1227 0074 1C62 str r4, [r3, #32] + 1228 0076 5A6C ldr r2, [r3, #68] + 1229 0078 8B42 cmp r3, r1 + 1230 007a 42F40042 orr r2, r2, #32768 + ARM GAS /tmp/ccY6LI9P.s page 22 + + + 1231 007e 5A64 str r2, [r3, #68] + 1232 0080 11D0 beq .L225 + 1233 0082 B3F1804F cmp r3, #1073741824 + 1234 0086 0ED0 beq .L225 + 1235 0088 654A ldr r2, .L251+16 + 1236 008a 9342 cmp r3, r2 + 1237 008c 0BD0 beq .L225 + 1238 008e 02F58062 add r2, r2, #1024 + 1239 0092 9342 cmp r3, r2 + 1240 0094 07D0 beq .L225 + 1241 0096 02F59632 add r2, r2, #76800 + 1242 009a 9342 cmp r3, r2 + 1243 009c 03D0 beq .L225 + 1244 009e 02F54062 add r2, r2, #3072 + 1245 00a2 9342 cmp r3, r2 + 1246 00a4 09D1 bne .L226 + 1247 .L225: + 1248 00a6 9968 ldr r1, [r3, #8] + 1249 00a8 5E4A ldr r2, .L251+20 + 1250 00aa 0A40 ands r2, r2, r1 + 1251 00ac 062A cmp r2, #6 + 1252 00ae 00F0A980 beq .L233 + 1253 00b2 B2F5803F cmp r2, #65536 + 1254 00b6 00F0A580 beq .L233 + 1255 .L226: + 1256 00ba 1A68 ldr r2, [r3] + 1257 00bc 42F00102 orr r2, r2, #1 + 1258 00c0 0020 movs r0, #0 + 1259 00c2 1A60 str r2, [r3] + 1260 .L235: + 1261 00c4 70BD pop {r4, r5, r6, pc} + 1262 .L202: + 1263 00c6 0429 cmp r1, #4 + 1264 00c8 00F08C80 beq .L247 + 1265 00cc 0829 cmp r1, #8 + 1266 00ce 0CBF ite eq + 1267 00d0 90F84610 ldrbeq r1, [r0, #70] @ zero_extendqisi2 + 1268 00d4 90F84710 ldrbne r1, [r0, #71] @ zero_extendqisi2 + 1269 00d8 A1F10201 sub r1, #2 + 1270 00dc B1FA81F1 clz r1, r1 + 1271 00e0 4909 lsrs r1, r1, #5 + 1272 .L206: + 1273 00e2 79B9 cbnz r1, .L248 + 1274 00e4 002C cmp r4, #0 + 1275 00e6 95D0 beq .L204 + 1276 00e8 042C cmp r4, #4 + 1277 00ea 00F08380 beq .L249 + 1278 00ee 082C cmp r4, #8 + 1279 00f0 0AD1 bne .L211 + 1280 00f2 95F84610 ldrb r1, [r5, #70] @ zero_extendqisi2 + 1281 00f6 0129 cmp r1, #1 + 1282 00f8 02D1 bne .L231 + 1283 00fa 7ABB cbnz r2, .L228 + 1284 .L227: + 1285 00fc 002B cmp r3, #0 + 1286 00fe 94D0 beq .L215 + 1287 .L231: + ARM GAS /tmp/ccY6LI9P.s page 23 + + + 1288 0100 0120 movs r0, #1 + 1289 0102 70BD pop {r4, r5, r6, pc} + 1290 .L248: + 1291 0104 0220 movs r0, #2 + 1292 0106 70BD pop {r4, r5, r6, pc} + 1293 .L211: + 1294 0108 95F84710 ldrb r1, [r5, #71] @ zero_extendqisi2 + 1295 010c 0129 cmp r1, #1 + 1296 010e F7D1 bne .L231 + 1297 0110 002A cmp r2, #0 + 1298 0112 79D0 beq .L250 + 1299 .L220: + 1300 0114 0221 movs r1, #2 + 1301 0116 85F84710 strb r1, [r5, #71] + 1302 011a 0C2C cmp r4, #12 + 1303 011c F0D8 bhi .L231 + 1304 011e 01A1 adr r1, .L223 + 1305 0120 51F824F0 ldr pc, [r1, r4, lsl #2] + 1306 .p2align 2 + 1307 .L223: + 1308 0124 37000000 .word .L217+1 + 1309 0128 01010000 .word .L231+1 + 1310 012c 01010000 .word .L231+1 + 1311 0130 01010000 .word .L231+1 + 1312 0134 BD010000 .word .L219+1 + 1313 0138 01010000 .word .L231+1 + 1314 013c 01010000 .word .L231+1 + 1315 0140 01010000 .word .L231+1 + 1316 0144 63010000 .word .L221+1 + 1317 0148 01010000 .word .L231+1 + 1318 014c 01010000 .word .L231+1 + 1319 0150 01010000 .word .L231+1 + 1320 0154 8B010000 .word .L222+1 + 1321 .p2align 1 + 1322 .L218: + 1323 0158 082C cmp r4, #8 + 1324 015a DBD1 bne .L220 + 1325 .L228: + 1326 015c 0221 movs r1, #2 + 1327 015e 85F84610 strb r1, [r5, #70] + 1328 .L221: + 1329 0162 E86A ldr r0, [r5, #44] + 1330 0164 2A4E ldr r6, .L251 + 1331 0166 1146 mov r1, r2 + 1332 0168 2A68 ldr r2, [r5] + 1333 016a C662 str r6, [r0, #44] + 1334 016c 294E ldr r6, .L251+4 + 1335 016e 0663 str r6, [r0, #48] + 1336 0170 294E ldr r6, .L251+8 + 1337 0172 4663 str r6, [r0, #52] + 1338 0174 3C32 adds r2, r2, #60 + 1339 0176 FFF7FEFF bl HAL_DMA_Start_IT + 1340 017a 0028 cmp r0, #0 + 1341 017c C0D1 bne .L231 + 1342 017e 2B68 ldr r3, [r5] + 1343 0180 DA68 ldr r2, [r3, #12] + 1344 0182 42F40062 orr r2, r2, #2048 + ARM GAS /tmp/ccY6LI9P.s page 24 + + + 1345 0186 DA60 str r2, [r3, #12] + 1346 0188 68E7 b .L224 + 1347 .L222: + 1348 018a 286B ldr r0, [r5, #48] + 1349 018c 204E ldr r6, .L251 + 1350 018e 1146 mov r1, r2 + 1351 0190 2A68 ldr r2, [r5] + 1352 0192 C662 str r6, [r0, #44] + 1353 0194 1F4E ldr r6, .L251+4 + 1354 0196 0663 str r6, [r0, #48] + 1355 0198 1F4E ldr r6, .L251+8 + 1356 019a 4663 str r6, [r0, #52] + 1357 019c 4032 adds r2, r2, #64 + 1358 019e FFF7FEFF bl HAL_DMA_Start_IT + 1359 01a2 0028 cmp r0, #0 + 1360 01a4 ACD1 bne .L231 + 1361 01a6 2B68 ldr r3, [r5] + 1362 01a8 DA68 ldr r2, [r3, #12] + 1363 01aa 42F48052 orr r2, r2, #4096 + 1364 01ae DA60 str r2, [r3, #12] + 1365 01b0 54E7 b .L224 + 1366 .L216: + 1367 01b2 042C cmp r4, #4 + 1368 01b4 D0D1 bne .L218 + 1369 01b6 0221 movs r1, #2 + 1370 01b8 85F84510 strb r1, [r5, #69] + 1371 .L219: + 1372 01bc A86A ldr r0, [r5, #40] + 1373 01be 144E ldr r6, .L251 + 1374 01c0 1146 mov r1, r2 + 1375 01c2 2A68 ldr r2, [r5] + 1376 01c4 C662 str r6, [r0, #44] + 1377 01c6 134E ldr r6, .L251+4 + 1378 01c8 0663 str r6, [r0, #48] + 1379 01ca 134E ldr r6, .L251+8 + 1380 01cc 4663 str r6, [r0, #52] + 1381 01ce 3832 adds r2, r2, #56 + 1382 01d0 FFF7FEFF bl HAL_DMA_Start_IT + 1383 01d4 0028 cmp r0, #0 + 1384 01d6 93D1 bne .L231 + 1385 01d8 2B68 ldr r3, [r5] + 1386 01da DA68 ldr r2, [r3, #12] + 1387 01dc 42F48062 orr r2, r2, #1024 + 1388 01e0 DA60 str r2, [r3, #12] + 1389 01e2 3BE7 b .L224 + 1390 .L247: + 1391 01e4 90F84510 ldrb r1, [r0, #69] @ zero_extendqisi2 + 1392 01e8 A1F10201 sub r1, #2 + 1393 01ec B1FA81F1 clz r1, r1 + 1394 01f0 4909 lsrs r1, r1, #5 + 1395 01f2 76E7 b .L206 + 1396 .L249: + 1397 01f4 95F84510 ldrb r1, [r5, #69] @ zero_extendqisi2 + 1398 01f8 A1F10101 sub r1, #1 + 1399 01fc B1FA81F1 clz r1, r1 + 1400 0200 4909 lsrs r1, r1, #5 + 1401 0202 0EE7 b .L209 + ARM GAS /tmp/ccY6LI9P.s page 25 + + + 1402 .L233: + 1403 0204 0020 movs r0, #0 + 1404 0206 70BD pop {r4, r5, r6, pc} + 1405 .L250: + 1406 0208 002B cmp r3, #0 + 1407 020a 83D0 beq .L220 + 1408 020c 78E7 b .L231 + 1409 .L252: + 1410 020e 00BF .align 2 + 1411 .L251: + 1412 0210 00000000 .word TIM_DMADelayPulseNCplt + 1413 0214 00000000 .word TIM_DMADelayPulseHalfCplt + 1414 0218 00000000 .word TIM_DMAErrorCCxN + 1415 021c 002C0140 .word 1073818624 + 1416 0220 00040040 .word 1073742848 + 1417 0224 07000100 .word 65543 + 1419 .section .text.HAL_TIMEx_OCN_Stop_DMA,"ax",%progbits + 1420 .align 1 + 1421 .p2align 2,,3 + 1422 .global HAL_TIMEx_OCN_Stop_DMA + 1423 .syntax unified + 1424 .thumb + 1425 .thumb_func + 1426 .fpu fpv4-sp-d16 + 1428 HAL_TIMEx_OCN_Stop_DMA: + 1429 @ args = 0, pretend = 0, frame = 0 + 1430 @ frame_needed = 0, uses_anonymous_args = 0 + 1431 0000 38B5 push {r3, r4, r5, lr} + 1432 0002 0C46 mov r4, r1 + 1433 0004 0546 mov r5, r0 + 1434 0006 0C29 cmp r1, #12 + 1435 0008 08D8 bhi .L266 + 1436 000a DFE801F0 tbb [pc, r1] + 1437 .L256: + 1438 000e 50 .byte (.L259-.L256)/2 + 1439 000f 07 .byte (.L266-.L256)/2 + 1440 0010 07 .byte (.L266-.L256)/2 + 1441 0011 07 .byte (.L266-.L256)/2 + 1442 0012 47 .byte (.L258-.L256)/2 + 1443 0013 07 .byte (.L266-.L256)/2 + 1444 0014 07 .byte (.L266-.L256)/2 + 1445 0015 07 .byte (.L266-.L256)/2 + 1446 0016 3E .byte (.L257-.L256)/2 + 1447 0017 07 .byte (.L266-.L256)/2 + 1448 0018 07 .byte (.L266-.L256)/2 + 1449 0019 07 .byte (.L266-.L256)/2 + 1450 001a 09 .byte (.L255-.L256)/2 + 1451 001b 00 .p2align 1 + 1452 .L266: + 1453 001c 0120 movs r0, #1 + 1454 001e 38BD pop {r3, r4, r5, pc} + 1455 .L255: + 1456 0020 0268 ldr r2, [r0] + 1457 0022 006B ldr r0, [r0, #48] + 1458 0024 D368 ldr r3, [r2, #12] + 1459 0026 23F48053 bic r3, r3, #4096 + 1460 002a D360 str r3, [r2, #12] + ARM GAS /tmp/ccY6LI9P.s page 26 + + + 1461 002c FFF7FEFF bl HAL_DMA_Abort_IT + 1462 .L260: + 1463 0030 2B68 ldr r3, [r5] + 1464 0032 04F01F00 and r0, r4, #31 + 1465 0036 1A6A ldr r2, [r3, #32] + 1466 0038 0421 movs r1, #4 + 1467 003a 8140 lsls r1, r1, r0 + 1468 003c 22EA0102 bic r2, r2, r1 + 1469 0040 1A62 str r2, [r3, #32] + 1470 0042 1A6A ldr r2, [r3, #32] + 1471 0044 1A62 str r2, [r3, #32] + 1472 0046 196A ldr r1, [r3, #32] + 1473 0048 41F21112 movw r2, #4369 + 1474 004c 1142 tst r1, r2 + 1475 004e 08D1 bne .L261 + 1476 0050 196A ldr r1, [r3, #32] + 1477 0052 44F24442 movw r2, #17476 + 1478 0056 1142 tst r1, r2 + 1479 0058 03D1 bne .L261 + 1480 005a 5A6C ldr r2, [r3, #68] + 1481 005c 22F40042 bic r2, r2, #32768 + 1482 0060 5A64 str r2, [r3, #68] + 1483 .L261: + 1484 0062 196A ldr r1, [r3, #32] + 1485 0064 41F21112 movw r2, #4369 + 1486 0068 1142 tst r1, r2 + 1487 006a 08D1 bne .L262 + 1488 006c 196A ldr r1, [r3, #32] + 1489 006e 44F24442 movw r2, #17476 + 1490 0072 1142 tst r1, r2 + 1491 0074 03D1 bne .L262 + 1492 0076 1A68 ldr r2, [r3] + 1493 0078 22F00102 bic r2, r2, #1 + 1494 007c 1A60 str r2, [r3] + 1495 .L262: + 1496 007e 0123 movs r3, #1 + 1497 0080 F4B9 cbnz r4, .L263 + 1498 0082 85F84430 strb r3, [r5, #68] + 1499 0086 2046 mov r0, r4 + 1500 0088 38BD pop {r3, r4, r5, pc} + 1501 .L257: + 1502 008a 0268 ldr r2, [r0] + 1503 008c C06A ldr r0, [r0, #44] + 1504 008e D368 ldr r3, [r2, #12] + 1505 0090 23F40063 bic r3, r3, #2048 + 1506 0094 D360 str r3, [r2, #12] + 1507 0096 FFF7FEFF bl HAL_DMA_Abort_IT + 1508 009a C9E7 b .L260 + 1509 .L258: + 1510 009c 0268 ldr r2, [r0] + 1511 009e 806A ldr r0, [r0, #40] + 1512 00a0 D368 ldr r3, [r2, #12] + 1513 00a2 23F48063 bic r3, r3, #1024 + 1514 00a6 D360 str r3, [r2, #12] + 1515 00a8 FFF7FEFF bl HAL_DMA_Abort_IT + 1516 00ac C0E7 b .L260 + 1517 .L259: + ARM GAS /tmp/ccY6LI9P.s page 27 + + + 1518 00ae 0268 ldr r2, [r0] + 1519 00b0 406A ldr r0, [r0, #36] + 1520 00b2 D368 ldr r3, [r2, #12] + 1521 00b4 23F40073 bic r3, r3, #512 + 1522 00b8 D360 str r3, [r2, #12] + 1523 00ba FFF7FEFF bl HAL_DMA_Abort_IT + 1524 00be B7E7 b .L260 + 1525 .L263: + 1526 00c0 042C cmp r4, #4 + 1527 00c2 07D0 beq .L268 + 1528 00c4 082C cmp r4, #8 + 1529 00c6 0CBF ite eq + 1530 00c8 85F84630 strbeq r3, [r5, #70] + 1531 00cc 85F84730 strbne r3, [r5, #71] + 1532 00d0 0020 movs r0, #0 + 1533 00d2 38BD pop {r3, r4, r5, pc} + 1534 .L268: + 1535 00d4 85F84530 strb r3, [r5, #69] + 1536 00d8 0020 movs r0, #0 + 1537 00da 38BD pop {r3, r4, r5, pc} + 1539 .section .text.HAL_TIMEx_PWMN_Start,"ax",%progbits + 1540 .align 1 + 1541 .p2align 2,,3 + 1542 .global HAL_TIMEx_PWMN_Start + 1543 .syntax unified + 1544 .thumb + 1545 .thumb_func + 1546 .fpu fpv4-sp-d16 + 1548 HAL_TIMEx_PWMN_Start: + 1549 @ args = 0, pretend = 0, frame = 0 + 1550 @ frame_needed = 0, uses_anonymous_args = 0 + 1551 @ link register save eliminated. + 1552 0000 0029 cmp r1, #0 + 1553 0002 3AD1 bne .L270 + 1554 0004 90F84430 ldrb r3, [r0, #68] @ zero_extendqisi2 + 1555 0008 012B cmp r3, #1 + 1556 000a 42D1 bne .L285 + 1557 000c 0223 movs r3, #2 + 1558 000e 80F84430 strb r3, [r0, #68] + 1559 .L278: + 1560 0012 0368 ldr r3, [r0] + 1561 0014 0422 movs r2, #4 + 1562 0016 186A ldr r0, [r3, #32] + 1563 0018 01F01F01 and r1, r1, #31 + 1564 001c 02FA01F1 lsl r1, r2, r1 + 1565 0020 20EA0100 bic r0, r0, r1 + 1566 0024 1862 str r0, [r3, #32] + 1567 0026 1A6A ldr r2, [r3, #32] + 1568 0028 2448 ldr r0, .L297 + 1569 002a 1143 orrs r1, r1, r2 + 1570 002c 1962 str r1, [r3, #32] + 1571 002e 5A6C ldr r2, [r3, #68] + 1572 0030 8342 cmp r3, r0 + 1573 0032 42F40042 orr r2, r2, #32768 + 1574 0036 5A64 str r2, [r3, #68] + 1575 0038 11D0 beq .L280 + 1576 003a B3F1804F cmp r3, #1073741824 + ARM GAS /tmp/ccY6LI9P.s page 28 + + + 1577 003e 0ED0 beq .L280 + 1578 0040 1F4A ldr r2, .L297+4 + 1579 0042 9342 cmp r3, r2 + 1580 0044 0BD0 beq .L280 + 1581 0046 02F58062 add r2, r2, #1024 + 1582 004a 9342 cmp r3, r2 + 1583 004c 07D0 beq .L280 + 1584 004e 02F59632 add r2, r2, #76800 + 1585 0052 9342 cmp r3, r2 + 1586 0054 03D0 beq .L280 + 1587 0056 02F54062 add r2, r2, #3072 + 1588 005a 9342 cmp r3, r2 + 1589 005c 07D1 bne .L281 + 1590 .L280: + 1591 005e 9968 ldr r1, [r3, #8] + 1592 0060 184A ldr r2, .L297+8 + 1593 0062 0A40 ands r2, r2, r1 + 1594 0064 062A cmp r2, #6 + 1595 0066 16D0 beq .L287 + 1596 0068 B2F5803F cmp r2, #65536 + 1597 006c 13D0 beq .L287 + 1598 .L281: + 1599 006e 1A68 ldr r2, [r3] + 1600 0070 42F00102 orr r2, r2, #1 + 1601 0074 0020 movs r0, #0 + 1602 0076 1A60 str r2, [r3] + 1603 0078 7047 bx lr + 1604 .L270: + 1605 007a 0429 cmp r1, #4 + 1606 007c 0DD0 beq .L295 + 1607 007e 0829 cmp r1, #8 + 1608 0080 13D0 beq .L296 + 1609 0082 90F84730 ldrb r3, [r0, #71] @ zero_extendqisi2 + 1610 0086 012B cmp r3, #1 + 1611 0088 03D1 bne .L285 + 1612 008a 0223 movs r3, #2 + 1613 008c 80F84730 strb r3, [r0, #71] + 1614 0090 BFE7 b .L278 + 1615 .L285: + 1616 0092 0120 movs r0, #1 + 1617 0094 7047 bx lr + 1618 .L287: + 1619 0096 0020 movs r0, #0 + 1620 0098 7047 bx lr + 1621 .L295: + 1622 009a 90F84530 ldrb r3, [r0, #69] @ zero_extendqisi2 + 1623 009e 012B cmp r3, #1 + 1624 00a0 F7D1 bne .L285 + 1625 00a2 0223 movs r3, #2 + 1626 00a4 80F84530 strb r3, [r0, #69] + 1627 00a8 B3E7 b .L278 + 1628 .L296: + 1629 00aa 90F84630 ldrb r3, [r0, #70] @ zero_extendqisi2 + 1630 00ae 012B cmp r3, #1 + 1631 00b0 EFD1 bne .L285 + 1632 00b2 0223 movs r3, #2 + 1633 00b4 80F84630 strb r3, [r0, #70] + ARM GAS /tmp/ccY6LI9P.s page 29 + + + 1634 00b8 ABE7 b .L278 + 1635 .L298: + 1636 00ba 00BF .align 2 + 1637 .L297: + 1638 00bc 002C0140 .word 1073818624 + 1639 00c0 00040040 .word 1073742848 + 1640 00c4 07000100 .word 65543 + 1642 .section .text.HAL_TIMEx_PWMN_Stop,"ax",%progbits + 1643 .align 1 + 1644 .p2align 2,,3 + 1645 .global HAL_TIMEx_PWMN_Stop + 1646 .syntax unified + 1647 .thumb + 1648 .thumb_func + 1649 .fpu fpv4-sp-d16 + 1651 HAL_TIMEx_PWMN_Stop: + 1652 @ args = 0, pretend = 0, frame = 0 + 1653 @ frame_needed = 0, uses_anonymous_args = 0 + 1654 @ link register save eliminated. + 1655 0000 0368 ldr r3, [r0] + 1656 0002 10B4 push {r4} + 1657 0004 1A6A ldr r2, [r3, #32] + 1658 0006 01F01F04 and r4, r1, #31 + 1659 000a 4FF0040C mov ip, #4 + 1660 000e 0CFA04FC lsl ip, ip, r4 + 1661 0012 22EA0C02 bic r2, r2, ip + 1662 0016 1A62 str r2, [r3, #32] + 1663 0018 1A6A ldr r2, [r3, #32] + 1664 001a 1A62 str r2, [r3, #32] + 1665 001c 1C6A ldr r4, [r3, #32] + 1666 001e 41F21112 movw r2, #4369 + 1667 0022 1442 tst r4, r2 + 1668 0024 04D1 bne .L300 + 1669 0026 1C6A ldr r4, [r3, #32] + 1670 0028 44F24442 movw r2, #17476 + 1671 002c 1442 tst r4, r2 + 1672 002e 22D0 beq .L307 + 1673 .L300: + 1674 0030 1C6A ldr r4, [r3, #32] + 1675 0032 41F21112 movw r2, #4369 + 1676 0036 1442 tst r4, r2 + 1677 0038 04D1 bne .L301 + 1678 003a 1C6A ldr r4, [r3, #32] + 1679 003c 44F24442 movw r2, #17476 + 1680 0040 1442 tst r4, r2 + 1681 0042 13D0 beq .L308 + 1682 .L301: + 1683 0044 0123 movs r3, #1 + 1684 0046 29B9 cbnz r1, .L302 + 1685 0048 80F84430 strb r3, [r0, #68] + 1686 004c 5DF8044B ldr r4, [sp], #4 + 1687 0050 0020 movs r0, #0 + 1688 0052 7047 bx lr + 1689 .L302: + 1690 0054 0429 cmp r1, #4 + 1691 0056 13D0 beq .L309 + 1692 0058 0829 cmp r1, #8 + ARM GAS /tmp/ccY6LI9P.s page 30 + + + 1693 005a 0CBF ite eq + 1694 005c 80F84630 strbeq r3, [r0, #70] + 1695 0060 80F84730 strbne r3, [r0, #71] + 1696 0064 5DF8044B ldr r4, [sp], #4 + 1697 0068 0020 movs r0, #0 + 1698 006a 7047 bx lr + 1699 .L308: + 1700 006c 1A68 ldr r2, [r3] + 1701 006e 22F00102 bic r2, r2, #1 + 1702 0072 1A60 str r2, [r3] + 1703 0074 E6E7 b .L301 + 1704 .L307: + 1705 0076 5A6C ldr r2, [r3, #68] + 1706 0078 22F40042 bic r2, r2, #32768 + 1707 007c 5A64 str r2, [r3, #68] + 1708 007e D7E7 b .L300 + 1709 .L309: + 1710 0080 80F84530 strb r3, [r0, #69] + 1711 0084 5DF8044B ldr r4, [sp], #4 + 1712 0088 0020 movs r0, #0 + 1713 008a 7047 bx lr + 1715 .section .text.HAL_TIMEx_PWMN_Start_IT,"ax",%progbits + 1716 .align 1 + 1717 .p2align 2,,3 + 1718 .global HAL_TIMEx_PWMN_Start_IT + 1719 .syntax unified + 1720 .thumb + 1721 .thumb_func + 1722 .fpu fpv4-sp-d16 + 1724 HAL_TIMEx_PWMN_Start_IT: + 1725 @ args = 0, pretend = 0, frame = 0 + 1726 @ frame_needed = 0, uses_anonymous_args = 0 + 1727 @ link register save eliminated. + 1728 0000 0029 cmp r1, #0 + 1729 0002 42D1 bne .L311 + 1730 0004 90F84430 ldrb r3, [r0, #68] @ zero_extendqisi2 + 1731 0008 012B cmp r3, #1 + 1732 000a 46D1 bne .L331 + 1733 000c 0368 ldr r3, [r0] + 1734 000e 0222 movs r2, #2 + 1735 0010 80F84420 strb r2, [r0, #68] + 1736 0014 DA68 ldr r2, [r3, #12] + 1737 0016 42F00202 orr r2, r2, #2 + 1738 001a DA60 str r2, [r3, #12] + 1739 .L318: + 1740 001c DA68 ldr r2, [r3, #12] + 1741 001e 42F08002 orr r2, r2, #128 + 1742 0022 DA60 str r2, [r3, #12] + 1743 0024 186A ldr r0, [r3, #32] + 1744 0026 0422 movs r2, #4 + 1745 0028 01F01F01 and r1, r1, #31 + 1746 002c 02FA01F1 lsl r1, r2, r1 + 1747 0030 20EA0100 bic r0, r0, r1 + 1748 0034 1862 str r0, [r3, #32] + 1749 0036 1A6A ldr r2, [r3, #32] + 1750 0038 3948 ldr r0, .L342 + 1751 003a 1143 orrs r1, r1, r2 + ARM GAS /tmp/ccY6LI9P.s page 31 + + + 1752 003c 1962 str r1, [r3, #32] + 1753 003e 5A6C ldr r2, [r3, #68] + 1754 0040 8342 cmp r3, r0 + 1755 0042 42F40042 orr r2, r2, #32768 + 1756 0046 5A64 str r2, [r3, #68] + 1757 0048 11D0 beq .L325 + 1758 004a B3F1804F cmp r3, #1073741824 + 1759 004e 0ED0 beq .L325 + 1760 0050 344A ldr r2, .L342+4 + 1761 0052 9342 cmp r3, r2 + 1762 0054 0BD0 beq .L325 + 1763 0056 02F58062 add r2, r2, #1024 + 1764 005a 9342 cmp r3, r2 + 1765 005c 07D0 beq .L325 + 1766 005e 02F59632 add r2, r2, #76800 + 1767 0062 9342 cmp r3, r2 + 1768 0064 03D0 beq .L325 + 1769 0066 02F54062 add r2, r2, #3072 + 1770 006a 9342 cmp r3, r2 + 1771 006c 07D1 bne .L326 + 1772 .L325: + 1773 006e 9968 ldr r1, [r3, #8] + 1774 0070 2D4A ldr r2, .L342+8 + 1775 0072 0A40 ands r2, r2, r1 + 1776 0074 062A cmp r2, #6 + 1777 0076 31D0 beq .L333 + 1778 0078 B2F5803F cmp r2, #65536 + 1779 007c 2ED0 beq .L333 + 1780 .L326: + 1781 007e 1A68 ldr r2, [r3] + 1782 0080 42F00102 orr r2, r2, #1 + 1783 0084 0020 movs r0, #0 + 1784 0086 1A60 str r2, [r3] + 1785 0088 7047 bx lr + 1786 .L311: + 1787 008a 0429 cmp r1, #4 + 1788 008c 35D0 beq .L340 + 1789 008e 0829 cmp r1, #8 + 1790 0090 26D0 beq .L341 + 1791 0092 90F84730 ldrb r3, [r0, #71] @ zero_extendqisi2 + 1792 0096 012B cmp r3, #1 + 1793 0098 01D0 beq .L339 + 1794 .L331: + 1795 009a 0120 movs r0, #1 + 1796 009c 7047 bx lr + 1797 .L339: + 1798 009e 0429 cmp r1, #4 + 1799 00a0 2FD0 beq .L315 + 1800 00a2 0829 cmp r1, #8 + 1801 00a4 20D0 beq .L338 + 1802 00a6 0222 movs r2, #2 + 1803 00a8 0B1F subs r3, r1, #4 + 1804 00aa 80F84720 strb r2, [r0, #71] + 1805 00ae 082B cmp r3, #8 + 1806 00b0 F3D8 bhi .L331 + 1807 00b2 01A2 adr r2, .L324 + 1808 00b4 52F823F0 ldr pc, [r2, r3, lsl #2] + ARM GAS /tmp/ccY6LI9P.s page 32 + + + 1809 .p2align 2 + 1810 .L324: + 1811 00b8 09010000 .word .L320+1 + 1812 00bc 9B000000 .word .L331+1 + 1813 00c0 9B000000 .word .L331+1 + 1814 00c4 9B000000 .word .L331+1 + 1815 00c8 EF000000 .word .L322+1 + 1816 00cc 9B000000 .word .L331+1 + 1817 00d0 9B000000 .word .L331+1 + 1818 00d4 9B000000 .word .L331+1 + 1819 00d8 15010000 .word .L323+1 + 1820 .p2align 1 + 1821 .L333: + 1822 00dc 0020 movs r0, #0 + 1823 00de 7047 bx lr + 1824 .L341: + 1825 00e0 90F84630 ldrb r3, [r0, #70] @ zero_extendqisi2 + 1826 00e4 012B cmp r3, #1 + 1827 00e6 D8D1 bne .L331 + 1828 .L338: + 1829 00e8 0223 movs r3, #2 + 1830 00ea 80F84630 strb r3, [r0, #70] + 1831 .L322: + 1832 00ee 0368 ldr r3, [r0] + 1833 00f0 DA68 ldr r2, [r3, #12] + 1834 00f2 42F00802 orr r2, r2, #8 + 1835 00f6 DA60 str r2, [r3, #12] + 1836 00f8 90E7 b .L318 + 1837 .L340: + 1838 00fa 90F84530 ldrb r3, [r0, #69] @ zero_extendqisi2 + 1839 00fe 012B cmp r3, #1 + 1840 0100 CBD1 bne .L331 + 1841 .L315: + 1842 0102 0223 movs r3, #2 + 1843 0104 80F84530 strb r3, [r0, #69] + 1844 .L320: + 1845 0108 0368 ldr r3, [r0] + 1846 010a DA68 ldr r2, [r3, #12] + 1847 010c 42F00402 orr r2, r2, #4 + 1848 0110 DA60 str r2, [r3, #12] + 1849 0112 83E7 b .L318 + 1850 .L323: + 1851 0114 0368 ldr r3, [r0] + 1852 0116 DA68 ldr r2, [r3, #12] + 1853 0118 42F01002 orr r2, r2, #16 + 1854 011c DA60 str r2, [r3, #12] + 1855 011e 7DE7 b .L318 + 1856 .L343: + 1857 .align 2 + 1858 .L342: + 1859 0120 002C0140 .word 1073818624 + 1860 0124 00040040 .word 1073742848 + 1861 0128 07000100 .word 65543 + 1863 .section .text.HAL_TIMEx_PWMN_Stop_IT,"ax",%progbits + 1864 .align 1 + 1865 .p2align 2,,3 + 1866 .global HAL_TIMEx_PWMN_Stop_IT + ARM GAS /tmp/ccY6LI9P.s page 33 + + + 1867 .syntax unified + 1868 .thumb + 1869 .thumb_func + 1870 .fpu fpv4-sp-d16 + 1872 HAL_TIMEx_PWMN_Stop_IT: + 1873 @ args = 0, pretend = 0, frame = 0 + 1874 @ frame_needed = 0, uses_anonymous_args = 0 + 1875 @ link register save eliminated. + 1876 0000 0C29 cmp r1, #12 + 1877 0002 08D8 bhi .L358 + 1878 0004 DFE801F0 tbb [pc, r1] + 1879 .L347: + 1880 0008 54 .byte (.L350-.L347)/2 + 1881 0009 07 .byte (.L358-.L347)/2 + 1882 000a 07 .byte (.L358-.L347)/2 + 1883 000b 07 .byte (.L358-.L347)/2 + 1884 000c 4E .byte (.L349-.L347)/2 + 1885 000d 07 .byte (.L358-.L347)/2 + 1886 000e 07 .byte (.L358-.L347)/2 + 1887 000f 07 .byte (.L358-.L347)/2 + 1888 0010 48 .byte (.L348-.L347)/2 + 1889 0011 07 .byte (.L358-.L347)/2 + 1890 0012 07 .byte (.L358-.L347)/2 + 1891 0013 07 .byte (.L358-.L347)/2 + 1892 0014 09 .byte (.L346-.L347)/2 + 1893 0015 00 .p2align 1 + 1894 .L358: + 1895 0016 0120 movs r0, #1 + 1896 0018 7047 bx lr + 1897 .L346: + 1898 001a 0368 ldr r3, [r0] + 1899 001c DA68 ldr r2, [r3, #12] + 1900 001e 22F01002 bic r2, r2, #16 + 1901 0022 DA60 str r2, [r3, #12] + 1902 .L351: + 1903 0024 1A6A ldr r2, [r3, #32] + 1904 0026 10B4 push {r4} + 1905 0028 4FF0040C mov ip, #4 + 1906 002c 01F01F04 and r4, r1, #31 + 1907 0030 0CFA04FC lsl ip, ip, r4 + 1908 0034 22EA0C02 bic r2, r2, ip + 1909 0038 1A62 str r2, [r3, #32] + 1910 003a 1A6A ldr r2, [r3, #32] + 1911 003c 1A62 str r2, [r3, #32] + 1912 003e 1C6A ldr r4, [r3, #32] + 1913 0040 44F24442 movw r2, #17476 + 1914 0044 1442 tst r4, r2 + 1915 0046 03D1 bne .L352 + 1916 0048 DA68 ldr r2, [r3, #12] + 1917 004a 22F08002 bic r2, r2, #128 + 1918 004e DA60 str r2, [r3, #12] + 1919 .L352: + 1920 0050 1C6A ldr r4, [r3, #32] + 1921 0052 41F21112 movw r2, #4369 + 1922 0056 1442 tst r4, r2 + 1923 0058 08D1 bne .L353 + 1924 005a 1C6A ldr r4, [r3, #32] + ARM GAS /tmp/ccY6LI9P.s page 34 + + + 1925 005c 44F24442 movw r2, #17476 + 1926 0060 1442 tst r4, r2 + 1927 0062 03D1 bne .L353 + 1928 0064 5A6C ldr r2, [r3, #68] + 1929 0066 22F40042 bic r2, r2, #32768 + 1930 006a 5A64 str r2, [r3, #68] + 1931 .L353: + 1932 006c 1C6A ldr r4, [r3, #32] + 1933 006e 41F21112 movw r2, #4369 + 1934 0072 1442 tst r4, r2 + 1935 0074 08D1 bne .L354 + 1936 0076 1C6A ldr r4, [r3, #32] + 1937 0078 44F24442 movw r2, #17476 + 1938 007c 1442 tst r4, r2 + 1939 007e 03D1 bne .L354 + 1940 0080 1A68 ldr r2, [r3] + 1941 0082 22F00102 bic r2, r2, #1 + 1942 0086 1A60 str r2, [r3] + 1943 .L354: + 1944 0088 0123 movs r3, #1 + 1945 008a B9B9 cbnz r1, .L355 + 1946 008c 80F84430 strb r3, [r0, #68] + 1947 0090 5DF8044B ldr r4, [sp], #4 + 1948 0094 0846 mov r0, r1 + 1949 0096 7047 bx lr + 1950 .L348: + 1951 0098 0368 ldr r3, [r0] + 1952 009a DA68 ldr r2, [r3, #12] + 1953 009c 22F00802 bic r2, r2, #8 + 1954 00a0 DA60 str r2, [r3, #12] + 1955 00a2 BFE7 b .L351 + 1956 .L349: + 1957 00a4 0368 ldr r3, [r0] + 1958 00a6 DA68 ldr r2, [r3, #12] + 1959 00a8 22F00402 bic r2, r2, #4 + 1960 00ac DA60 str r2, [r3, #12] + 1961 00ae B9E7 b .L351 + 1962 .L350: + 1963 00b0 0368 ldr r3, [r0] + 1964 00b2 DA68 ldr r2, [r3, #12] + 1965 00b4 22F00202 bic r2, r2, #2 + 1966 00b8 DA60 str r2, [r3, #12] + 1967 00ba B3E7 b .L351 + 1968 .L355: + 1969 00bc 0429 cmp r1, #4 + 1970 00be 09D0 beq .L362 + 1971 00c0 0829 cmp r1, #8 + 1972 00c2 0CBF ite eq + 1973 00c4 80F84630 strbeq r3, [r0, #70] + 1974 00c8 80F84730 strbne r3, [r0, #71] + 1975 00cc 5DF8044B ldr r4, [sp], #4 + 1976 00d0 0020 movs r0, #0 + 1977 00d2 7047 bx lr + 1978 .L362: + 1979 00d4 80F84530 strb r3, [r0, #69] + 1980 00d8 5DF8044B ldr r4, [sp], #4 + 1981 00dc 0020 movs r0, #0 + ARM GAS /tmp/ccY6LI9P.s page 35 + + + 1982 00de 7047 bx lr + 1984 .section .text.HAL_TIMEx_PWMN_Start_DMA,"ax",%progbits + 1985 .align 1 + 1986 .p2align 2,,3 + 1987 .global HAL_TIMEx_PWMN_Start_DMA + 1988 .syntax unified + 1989 .thumb + 1990 .thumb_func + 1991 .fpu fpv4-sp-d16 + 1993 HAL_TIMEx_PWMN_Start_DMA: + 1994 @ args = 0, pretend = 0, frame = 0 + 1995 @ frame_needed = 0, uses_anonymous_args = 0 + 1996 0000 70B5 push {r4, r5, r6, lr} + 1997 0002 0546 mov r5, r0 + 1998 0004 0C46 mov r4, r1 + 1999 0006 0029 cmp r1, #0 + 2000 0008 5DD1 bne .L364 + 2001 000a 90F84410 ldrb r1, [r0, #68] @ zero_extendqisi2 + 2002 000e 0229 cmp r1, #2 + 2003 0010 C8B2 uxtb r0, r1 + 2004 0012 57D0 beq .L397 + 2005 .L366: + 2006 0014 95F84410 ldrb r1, [r5, #68] @ zero_extendqisi2 + 2007 0018 A1F10101 sub r1, #1 + 2008 001c B1FA81F1 clz r1, r1 + 2009 0020 4909 lsrs r1, r1, #5 + 2010 .L371: + 2011 0022 0029 cmp r1, #0 + 2012 0024 6CD0 beq .L393 + 2013 0026 002A cmp r2, #0 + 2014 0028 68D0 beq .L389 + 2015 .L377: + 2016 002a 002C cmp r4, #0 + 2017 002c 40F0C180 bne .L378 + 2018 0030 0221 movs r1, #2 + 2019 0032 85F84410 strb r1, [r5, #68] + 2020 .L379: + 2021 0036 686A ldr r0, [r5, #36] + 2022 0038 754E ldr r6, .L413 + 2023 003a 1146 mov r1, r2 + 2024 003c 2A68 ldr r2, [r5] + 2025 003e C662 str r6, [r0, #44] + 2026 0040 744E ldr r6, .L413+4 + 2027 0042 0663 str r6, [r0, #48] + 2028 0044 744E ldr r6, .L413+8 + 2029 0046 4663 str r6, [r0, #52] + 2030 0048 3432 adds r2, r2, #52 + 2031 004a FFF7FEFF bl HAL_DMA_Start_IT + 2032 004e 0028 cmp r0, #0 + 2033 0050 56D1 bne .L393 + 2034 0052 2B68 ldr r3, [r5] + 2035 0054 DA68 ldr r2, [r3, #12] + 2036 0056 42F40072 orr r2, r2, #512 + 2037 005a DA60 str r2, [r3, #12] + 2038 .L386: + 2039 005c 186A ldr r0, [r3, #32] + 2040 005e 6F49 ldr r1, .L413+12 + ARM GAS /tmp/ccY6LI9P.s page 36 + + + 2041 0060 0422 movs r2, #4 + 2042 0062 04F01F04 and r4, r4, #31 + 2043 0066 02FA04F4 lsl r4, r2, r4 + 2044 006a 20EA0400 bic r0, r0, r4 + 2045 006e 1862 str r0, [r3, #32] + 2046 0070 1A6A ldr r2, [r3, #32] + 2047 0072 1443 orrs r4, r4, r2 + 2048 0074 1C62 str r4, [r3, #32] + 2049 0076 5A6C ldr r2, [r3, #68] + 2050 0078 8B42 cmp r3, r1 + 2051 007a 42F40042 orr r2, r2, #32768 + 2052 007e 5A64 str r2, [r3, #68] + 2053 0080 11D0 beq .L387 + 2054 0082 B3F1804F cmp r3, #1073741824 + 2055 0086 0ED0 beq .L387 + 2056 0088 654A ldr r2, .L413+16 + 2057 008a 9342 cmp r3, r2 + 2058 008c 0BD0 beq .L387 + 2059 008e 02F58062 add r2, r2, #1024 + 2060 0092 9342 cmp r3, r2 + 2061 0094 07D0 beq .L387 + 2062 0096 02F59632 add r2, r2, #76800 + 2063 009a 9342 cmp r3, r2 + 2064 009c 03D0 beq .L387 + 2065 009e 02F54062 add r2, r2, #3072 + 2066 00a2 9342 cmp r3, r2 + 2067 00a4 09D1 bne .L388 + 2068 .L387: + 2069 00a6 9968 ldr r1, [r3, #8] + 2070 00a8 5E4A ldr r2, .L413+20 + 2071 00aa 0A40 ands r2, r2, r1 + 2072 00ac 062A cmp r2, #6 + 2073 00ae 00F0A980 beq .L395 + 2074 00b2 B2F5803F cmp r2, #65536 + 2075 00b6 00F0A580 beq .L395 + 2076 .L388: + 2077 00ba 1A68 ldr r2, [r3] + 2078 00bc 42F00102 orr r2, r2, #1 + 2079 00c0 0020 movs r0, #0 + 2080 00c2 1A60 str r2, [r3] + 2081 .L397: + 2082 00c4 70BD pop {r4, r5, r6, pc} + 2083 .L364: + 2084 00c6 0429 cmp r1, #4 + 2085 00c8 00F08C80 beq .L409 + 2086 00cc 0829 cmp r1, #8 + 2087 00ce 0CBF ite eq + 2088 00d0 90F84610 ldrbeq r1, [r0, #70] @ zero_extendqisi2 + 2089 00d4 90F84710 ldrbne r1, [r0, #71] @ zero_extendqisi2 + 2090 00d8 A1F10201 sub r1, #2 + 2091 00dc B1FA81F1 clz r1, r1 + 2092 00e0 4909 lsrs r1, r1, #5 + 2093 .L368: + 2094 00e2 79B9 cbnz r1, .L410 + 2095 00e4 002C cmp r4, #0 + 2096 00e6 95D0 beq .L366 + 2097 00e8 042C cmp r4, #4 + ARM GAS /tmp/ccY6LI9P.s page 37 + + + 2098 00ea 00F08380 beq .L411 + 2099 00ee 082C cmp r4, #8 + 2100 00f0 0AD1 bne .L373 + 2101 00f2 95F84610 ldrb r1, [r5, #70] @ zero_extendqisi2 + 2102 00f6 0129 cmp r1, #1 + 2103 00f8 02D1 bne .L393 + 2104 00fa 7ABB cbnz r2, .L390 + 2105 .L389: + 2106 00fc 002B cmp r3, #0 + 2107 00fe 94D0 beq .L377 + 2108 .L393: + 2109 0100 0120 movs r0, #1 + 2110 0102 70BD pop {r4, r5, r6, pc} + 2111 .L410: + 2112 0104 0220 movs r0, #2 + 2113 0106 70BD pop {r4, r5, r6, pc} + 2114 .L373: + 2115 0108 95F84710 ldrb r1, [r5, #71] @ zero_extendqisi2 + 2116 010c 0129 cmp r1, #1 + 2117 010e F7D1 bne .L393 + 2118 0110 002A cmp r2, #0 + 2119 0112 79D0 beq .L412 + 2120 .L382: + 2121 0114 0221 movs r1, #2 + 2122 0116 85F84710 strb r1, [r5, #71] + 2123 011a 0C2C cmp r4, #12 + 2124 011c F0D8 bhi .L393 + 2125 011e 01A1 adr r1, .L385 + 2126 0120 51F824F0 ldr pc, [r1, r4, lsl #2] + 2127 .p2align 2 + 2128 .L385: + 2129 0124 37000000 .word .L379+1 + 2130 0128 01010000 .word .L393+1 + 2131 012c 01010000 .word .L393+1 + 2132 0130 01010000 .word .L393+1 + 2133 0134 BD010000 .word .L381+1 + 2134 0138 01010000 .word .L393+1 + 2135 013c 01010000 .word .L393+1 + 2136 0140 01010000 .word .L393+1 + 2137 0144 63010000 .word .L383+1 + 2138 0148 01010000 .word .L393+1 + 2139 014c 01010000 .word .L393+1 + 2140 0150 01010000 .word .L393+1 + 2141 0154 8B010000 .word .L384+1 + 2142 .p2align 1 + 2143 .L380: + 2144 0158 082C cmp r4, #8 + 2145 015a DBD1 bne .L382 + 2146 .L390: + 2147 015c 0221 movs r1, #2 + 2148 015e 85F84610 strb r1, [r5, #70] + 2149 .L383: + 2150 0162 E86A ldr r0, [r5, #44] + 2151 0164 2A4E ldr r6, .L413 + 2152 0166 1146 mov r1, r2 + 2153 0168 2A68 ldr r2, [r5] + 2154 016a C662 str r6, [r0, #44] + ARM GAS /tmp/ccY6LI9P.s page 38 + + + 2155 016c 294E ldr r6, .L413+4 + 2156 016e 0663 str r6, [r0, #48] + 2157 0170 294E ldr r6, .L413+8 + 2158 0172 4663 str r6, [r0, #52] + 2159 0174 3C32 adds r2, r2, #60 + 2160 0176 FFF7FEFF bl HAL_DMA_Start_IT + 2161 017a 0028 cmp r0, #0 + 2162 017c C0D1 bne .L393 + 2163 017e 2B68 ldr r3, [r5] + 2164 0180 DA68 ldr r2, [r3, #12] + 2165 0182 42F40062 orr r2, r2, #2048 + 2166 0186 DA60 str r2, [r3, #12] + 2167 0188 68E7 b .L386 + 2168 .L384: + 2169 018a 286B ldr r0, [r5, #48] + 2170 018c 204E ldr r6, .L413 + 2171 018e 1146 mov r1, r2 + 2172 0190 2A68 ldr r2, [r5] + 2173 0192 C662 str r6, [r0, #44] + 2174 0194 1F4E ldr r6, .L413+4 + 2175 0196 0663 str r6, [r0, #48] + 2176 0198 1F4E ldr r6, .L413+8 + 2177 019a 4663 str r6, [r0, #52] + 2178 019c 4032 adds r2, r2, #64 + 2179 019e FFF7FEFF bl HAL_DMA_Start_IT + 2180 01a2 0028 cmp r0, #0 + 2181 01a4 ACD1 bne .L393 + 2182 01a6 2B68 ldr r3, [r5] + 2183 01a8 DA68 ldr r2, [r3, #12] + 2184 01aa 42F48052 orr r2, r2, #4096 + 2185 01ae DA60 str r2, [r3, #12] + 2186 01b0 54E7 b .L386 + 2187 .L378: + 2188 01b2 042C cmp r4, #4 + 2189 01b4 D0D1 bne .L380 + 2190 01b6 0221 movs r1, #2 + 2191 01b8 85F84510 strb r1, [r5, #69] + 2192 .L381: + 2193 01bc A86A ldr r0, [r5, #40] + 2194 01be 144E ldr r6, .L413 + 2195 01c0 1146 mov r1, r2 + 2196 01c2 2A68 ldr r2, [r5] + 2197 01c4 C662 str r6, [r0, #44] + 2198 01c6 134E ldr r6, .L413+4 + 2199 01c8 0663 str r6, [r0, #48] + 2200 01ca 134E ldr r6, .L413+8 + 2201 01cc 4663 str r6, [r0, #52] + 2202 01ce 3832 adds r2, r2, #56 + 2203 01d0 FFF7FEFF bl HAL_DMA_Start_IT + 2204 01d4 0028 cmp r0, #0 + 2205 01d6 93D1 bne .L393 + 2206 01d8 2B68 ldr r3, [r5] + 2207 01da DA68 ldr r2, [r3, #12] + 2208 01dc 42F48062 orr r2, r2, #1024 + 2209 01e0 DA60 str r2, [r3, #12] + 2210 01e2 3BE7 b .L386 + 2211 .L409: + ARM GAS /tmp/ccY6LI9P.s page 39 + + + 2212 01e4 90F84510 ldrb r1, [r0, #69] @ zero_extendqisi2 + 2213 01e8 A1F10201 sub r1, #2 + 2214 01ec B1FA81F1 clz r1, r1 + 2215 01f0 4909 lsrs r1, r1, #5 + 2216 01f2 76E7 b .L368 + 2217 .L411: + 2218 01f4 95F84510 ldrb r1, [r5, #69] @ zero_extendqisi2 + 2219 01f8 A1F10101 sub r1, #1 + 2220 01fc B1FA81F1 clz r1, r1 + 2221 0200 4909 lsrs r1, r1, #5 + 2222 0202 0EE7 b .L371 + 2223 .L395: + 2224 0204 0020 movs r0, #0 + 2225 0206 70BD pop {r4, r5, r6, pc} + 2226 .L412: + 2227 0208 002B cmp r3, #0 + 2228 020a 83D0 beq .L382 + 2229 020c 78E7 b .L393 + 2230 .L414: + 2231 020e 00BF .align 2 + 2232 .L413: + 2233 0210 00000000 .word TIM_DMADelayPulseNCplt + 2234 0214 00000000 .word TIM_DMADelayPulseHalfCplt + 2235 0218 00000000 .word TIM_DMAErrorCCxN + 2236 021c 002C0140 .word 1073818624 + 2237 0220 00040040 .word 1073742848 + 2238 0224 07000100 .word 65543 + 2240 .section .text.HAL_TIMEx_PWMN_Stop_DMA,"ax",%progbits + 2241 .align 1 + 2242 .p2align 2,,3 + 2243 .global HAL_TIMEx_PWMN_Stop_DMA + 2244 .syntax unified + 2245 .thumb + 2246 .thumb_func + 2247 .fpu fpv4-sp-d16 + 2249 HAL_TIMEx_PWMN_Stop_DMA: + 2250 @ args = 0, pretend = 0, frame = 0 + 2251 @ frame_needed = 0, uses_anonymous_args = 0 + 2252 0000 38B5 push {r3, r4, r5, lr} + 2253 0002 0C46 mov r4, r1 + 2254 0004 0546 mov r5, r0 + 2255 0006 0C29 cmp r1, #12 + 2256 0008 08D8 bhi .L428 + 2257 000a DFE801F0 tbb [pc, r1] + 2258 .L418: + 2259 000e 50 .byte (.L421-.L418)/2 + 2260 000f 07 .byte (.L428-.L418)/2 + 2261 0010 07 .byte (.L428-.L418)/2 + 2262 0011 07 .byte (.L428-.L418)/2 + 2263 0012 47 .byte (.L420-.L418)/2 + 2264 0013 07 .byte (.L428-.L418)/2 + 2265 0014 07 .byte (.L428-.L418)/2 + 2266 0015 07 .byte (.L428-.L418)/2 + 2267 0016 3E .byte (.L419-.L418)/2 + 2268 0017 07 .byte (.L428-.L418)/2 + 2269 0018 07 .byte (.L428-.L418)/2 + 2270 0019 07 .byte (.L428-.L418)/2 + ARM GAS /tmp/ccY6LI9P.s page 40 + + + 2271 001a 09 .byte (.L417-.L418)/2 + 2272 001b 00 .p2align 1 + 2273 .L428: + 2274 001c 0120 movs r0, #1 + 2275 001e 38BD pop {r3, r4, r5, pc} + 2276 .L417: + 2277 0020 0268 ldr r2, [r0] + 2278 0022 006B ldr r0, [r0, #48] + 2279 0024 D368 ldr r3, [r2, #12] + 2280 0026 23F48053 bic r3, r3, #4096 + 2281 002a D360 str r3, [r2, #12] + 2282 002c FFF7FEFF bl HAL_DMA_Abort_IT + 2283 .L422: + 2284 0030 2B68 ldr r3, [r5] + 2285 0032 04F01F00 and r0, r4, #31 + 2286 0036 1A6A ldr r2, [r3, #32] + 2287 0038 0421 movs r1, #4 + 2288 003a 8140 lsls r1, r1, r0 + 2289 003c 22EA0102 bic r2, r2, r1 + 2290 0040 1A62 str r2, [r3, #32] + 2291 0042 1A6A ldr r2, [r3, #32] + 2292 0044 1A62 str r2, [r3, #32] + 2293 0046 196A ldr r1, [r3, #32] + 2294 0048 41F21112 movw r2, #4369 + 2295 004c 1142 tst r1, r2 + 2296 004e 08D1 bne .L423 + 2297 0050 196A ldr r1, [r3, #32] + 2298 0052 44F24442 movw r2, #17476 + 2299 0056 1142 tst r1, r2 + 2300 0058 03D1 bne .L423 + 2301 005a 5A6C ldr r2, [r3, #68] + 2302 005c 22F40042 bic r2, r2, #32768 + 2303 0060 5A64 str r2, [r3, #68] + 2304 .L423: + 2305 0062 196A ldr r1, [r3, #32] + 2306 0064 41F21112 movw r2, #4369 + 2307 0068 1142 tst r1, r2 + 2308 006a 08D1 bne .L424 + 2309 006c 196A ldr r1, [r3, #32] + 2310 006e 44F24442 movw r2, #17476 + 2311 0072 1142 tst r1, r2 + 2312 0074 03D1 bne .L424 + 2313 0076 1A68 ldr r2, [r3] + 2314 0078 22F00102 bic r2, r2, #1 + 2315 007c 1A60 str r2, [r3] + 2316 .L424: + 2317 007e 0123 movs r3, #1 + 2318 0080 F4B9 cbnz r4, .L425 + 2319 0082 85F84430 strb r3, [r5, #68] + 2320 0086 2046 mov r0, r4 + 2321 0088 38BD pop {r3, r4, r5, pc} + 2322 .L419: + 2323 008a 0268 ldr r2, [r0] + 2324 008c C06A ldr r0, [r0, #44] + 2325 008e D368 ldr r3, [r2, #12] + 2326 0090 23F40063 bic r3, r3, #2048 + 2327 0094 D360 str r3, [r2, #12] + ARM GAS /tmp/ccY6LI9P.s page 41 + + + 2328 0096 FFF7FEFF bl HAL_DMA_Abort_IT + 2329 009a C9E7 b .L422 + 2330 .L420: + 2331 009c 0268 ldr r2, [r0] + 2332 009e 806A ldr r0, [r0, #40] + 2333 00a0 D368 ldr r3, [r2, #12] + 2334 00a2 23F48063 bic r3, r3, #1024 + 2335 00a6 D360 str r3, [r2, #12] + 2336 00a8 FFF7FEFF bl HAL_DMA_Abort_IT + 2337 00ac C0E7 b .L422 + 2338 .L421: + 2339 00ae 0268 ldr r2, [r0] + 2340 00b0 406A ldr r0, [r0, #36] + 2341 00b2 D368 ldr r3, [r2, #12] + 2342 00b4 23F40073 bic r3, r3, #512 + 2343 00b8 D360 str r3, [r2, #12] + 2344 00ba FFF7FEFF bl HAL_DMA_Abort_IT + 2345 00be B7E7 b .L422 + 2346 .L425: + 2347 00c0 042C cmp r4, #4 + 2348 00c2 07D0 beq .L430 + 2349 00c4 082C cmp r4, #8 + 2350 00c6 0CBF ite eq + 2351 00c8 85F84630 strbeq r3, [r5, #70] + 2352 00cc 85F84730 strbne r3, [r5, #71] + 2353 00d0 0020 movs r0, #0 + 2354 00d2 38BD pop {r3, r4, r5, pc} + 2355 .L430: + 2356 00d4 85F84530 strb r3, [r5, #69] + 2357 00d8 0020 movs r0, #0 + 2358 00da 38BD pop {r3, r4, r5, pc} + 2360 .section .text.HAL_TIMEx_OnePulseN_Start,"ax",%progbits + 2361 .align 1 + 2362 .p2align 2,,3 + 2363 .global HAL_TIMEx_OnePulseN_Start + 2364 .syntax unified + 2365 .thumb + 2366 .thumb_func + 2367 .fpu fpv4-sp-d16 + 2369 HAL_TIMEx_OnePulseN_Start: + 2370 @ args = 0, pretend = 0, frame = 0 + 2371 @ frame_needed = 0, uses_anonymous_args = 0 + 2372 0000 70B5 push {r4, r5, r6, lr} + 2373 0002 90F83EE0 ldrb lr, [r0, #62] @ zero_extendqisi2 + 2374 0006 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + 2375 000a 90F84420 ldrb r2, [r0, #68] @ zero_extendqisi2 + 2376 000e 0029 cmp r1, #0 + 2377 0010 0CBF ite eq + 2378 0012 0425 moveq r5, #4 + 2379 0014 0025 movne r5, #0 + 2380 0016 BEF1010F cmp lr, #1 + 2381 001a 0446 mov r4, r0 + 2382 001c 90F84500 ldrb r0, [r0, #69] @ zero_extendqisi2 + 2383 0020 07D1 bne .L435 + 2384 0022 DBB2 uxtb r3, r3 + 2385 0024 012B cmp r3, #1 + 2386 0026 5FFA80FC uxtb ip, r0 + ARM GAS /tmp/ccY6LI9P.s page 42 + + + 2387 002a 5FFA8EF0 uxtb r0, lr + 2388 002e 02D0 beq .L439 + 2389 .L433: + 2390 0030 70BD pop {r4, r5, r6, pc} + 2391 .L435: + 2392 0032 0120 movs r0, #1 + 2393 0034 70BD pop {r4, r5, r6, pc} + 2394 .L439: + 2395 0036 D2B2 uxtb r2, r2 + 2396 0038 012A cmp r2, #1 + 2397 003a F9D1 bne .L433 + 2398 003c BCF1010F cmp ip, #1 + 2399 0040 F6D1 bne .L433 + 2400 0042 2668 ldr r6, [r4] + 2401 0044 0223 movs r3, #2 + 2402 0046 84F83E30 strb r3, [r4, #62] + 2403 004a 84F83F30 strb r3, [r4, #63] + 2404 004e 84F84430 strb r3, [r4, #68] + 2405 0052 84F84530 strb r3, [r4, #69] + 2406 0056 0246 mov r2, r0 + 2407 0058 01F01F03 and r3, r1, #31 + 2408 005c 306A ldr r0, [r6, #32] + 2409 005e 2946 mov r1, r5 + 2410 0060 0425 movs r5, #4 + 2411 0062 05FA03F3 lsl r3, r5, r3 + 2412 0066 20EA0300 bic r0, r0, r3 + 2413 006a 3062 str r0, [r6, #32] + 2414 006c 306A ldr r0, [r6, #32] + 2415 006e 0343 orrs r3, r3, r0 + 2416 0070 3362 str r3, [r6, #32] + 2417 0072 3046 mov r0, r6 + 2418 0074 FFF7FEFF bl TIM_CCxChannelCmd + 2419 0078 2268 ldr r2, [r4] + 2420 007a 536C ldr r3, [r2, #68] + 2421 007c 43F40043 orr r3, r3, #32768 + 2422 0080 0020 movs r0, #0 + 2423 0082 5364 str r3, [r2, #68] + 2424 0084 70BD pop {r4, r5, r6, pc} + 2426 0086 00BF .section .text.HAL_TIMEx_OnePulseN_Stop,"ax",%progbits + 2427 .align 1 + 2428 .p2align 2,,3 + 2429 .global HAL_TIMEx_OnePulseN_Stop + 2430 .syntax unified + 2431 .thumb + 2432 .thumb_func + 2433 .fpu fpv4-sp-d16 + 2435 HAL_TIMEx_OnePulseN_Stop: + 2436 @ args = 0, pretend = 0, frame = 0 + 2437 @ frame_needed = 0, uses_anonymous_args = 0 + 2438 0000 10B5 push {r4, lr} + 2439 0002 0446 mov r4, r0 + 2440 0004 0068 ldr r0, [r0] + 2441 0006 0029 cmp r1, #0 + 2442 0008 036A ldr r3, [r0, #32] + 2443 000a 4FF00402 mov r2, #4 + 2444 000e 01F01F01 and r1, r1, #31 + 2445 0012 02FA01F1 lsl r1, r2, r1 + ARM GAS /tmp/ccY6LI9P.s page 43 + + + 2446 0016 23EA0101 bic r1, r3, r1 + 2447 001a 0162 str r1, [r0, #32] + 2448 001c 036A ldr r3, [r0, #32] + 2449 001e 0362 str r3, [r0, #32] + 2450 0020 4FF00002 mov r2, #0 + 2451 0024 14BF ite ne + 2452 0026 1146 movne r1, r2 + 2453 0028 0421 moveq r1, #4 + 2454 002a FFF7FEFF bl TIM_CCxChannelCmd + 2455 002e 2368 ldr r3, [r4] + 2456 0030 196A ldr r1, [r3, #32] + 2457 0032 41F21112 movw r2, #4369 + 2458 0036 1142 tst r1, r2 + 2459 0038 04D1 bne .L442 + 2460 003a 196A ldr r1, [r3, #32] + 2461 003c 44F24442 movw r2, #17476 + 2462 0040 1142 tst r1, r2 + 2463 0042 18D0 beq .L446 + 2464 .L442: + 2465 0044 196A ldr r1, [r3, #32] + 2466 0046 41F21112 movw r2, #4369 + 2467 004a 1142 tst r1, r2 + 2468 004c 08D1 bne .L443 + 2469 004e 196A ldr r1, [r3, #32] + 2470 0050 44F24442 movw r2, #17476 + 2471 0054 1142 tst r1, r2 + 2472 0056 03D1 bne .L443 + 2473 0058 1A68 ldr r2, [r3] + 2474 005a 22F00102 bic r2, r2, #1 + 2475 005e 1A60 str r2, [r3] + 2476 .L443: + 2477 0060 0123 movs r3, #1 + 2478 0062 84F83E30 strb r3, [r4, #62] + 2479 0066 84F83F30 strb r3, [r4, #63] + 2480 006a 84F84430 strb r3, [r4, #68] + 2481 006e 84F84530 strb r3, [r4, #69] + 2482 0072 0020 movs r0, #0 + 2483 0074 10BD pop {r4, pc} + 2484 .L446: + 2485 0076 5A6C ldr r2, [r3, #68] + 2486 0078 22F40042 bic r2, r2, #32768 + 2487 007c 5A64 str r2, [r3, #68] + 2488 007e E1E7 b .L442 + 2490 .section .text.HAL_TIMEx_OnePulseN_Start_IT,"ax",%progbits + 2491 .align 1 + 2492 .p2align 2,,3 + 2493 .global HAL_TIMEx_OnePulseN_Start_IT + 2494 .syntax unified + 2495 .thumb + 2496 .thumb_func + 2497 .fpu fpv4-sp-d16 + 2499 HAL_TIMEx_OnePulseN_Start_IT: + 2500 @ args = 0, pretend = 0, frame = 0 + 2501 @ frame_needed = 0, uses_anonymous_args = 0 + 2502 0000 70B5 push {r4, r5, r6, lr} + 2503 0002 90F83EE0 ldrb lr, [r0, #62] @ zero_extendqisi2 + 2504 0006 90F83F30 ldrb r3, [r0, #63] @ zero_extendqisi2 + ARM GAS /tmp/ccY6LI9P.s page 44 + + + 2505 000a 90F84420 ldrb r2, [r0, #68] @ zero_extendqisi2 + 2506 000e 0029 cmp r1, #0 + 2507 0010 0CBF ite eq + 2508 0012 0425 moveq r5, #4 + 2509 0014 0025 movne r5, #0 + 2510 0016 BEF1010F cmp lr, #1 + 2511 001a 0446 mov r4, r0 + 2512 001c 90F84500 ldrb r0, [r0, #69] @ zero_extendqisi2 + 2513 0020 07D1 bne .L451 + 2514 0022 DBB2 uxtb r3, r3 + 2515 0024 012B cmp r3, #1 + 2516 0026 5FFA80FC uxtb ip, r0 + 2517 002a 5FFA8EF0 uxtb r0, lr + 2518 002e 02D0 beq .L455 + 2519 .L449: + 2520 0030 70BD pop {r4, r5, r6, pc} + 2521 .L451: + 2522 0032 0120 movs r0, #1 + 2523 0034 70BD pop {r4, r5, r6, pc} + 2524 .L455: + 2525 0036 D2B2 uxtb r2, r2 + 2526 0038 012A cmp r2, #1 + 2527 003a F9D1 bne .L449 + 2528 003c BCF1010F cmp ip, #1 + 2529 0040 F6D1 bne .L449 + 2530 0042 2668 ldr r6, [r4] + 2531 0044 0223 movs r3, #2 + 2532 0046 84F83E30 strb r3, [r4, #62] + 2533 004a 84F83F30 strb r3, [r4, #63] + 2534 004e 84F84430 strb r3, [r4, #68] + 2535 0052 84F84530 strb r3, [r4, #69] + 2536 0056 0246 mov r2, r0 + 2537 0058 F068 ldr r0, [r6, #12] + 2538 005a 40F00200 orr r0, r0, #2 + 2539 005e F060 str r0, [r6, #12] + 2540 0060 F068 ldr r0, [r6, #12] + 2541 0062 40F00400 orr r0, r0, #4 + 2542 0066 F060 str r0, [r6, #12] + 2543 0068 01F01F03 and r3, r1, #31 + 2544 006c 0420 movs r0, #4 + 2545 006e 2946 mov r1, r5 + 2546 0070 356A ldr r5, [r6, #32] + 2547 0072 00FA03F3 lsl r3, r0, r3 + 2548 0076 25EA0305 bic r5, r5, r3 + 2549 007a 3562 str r5, [r6, #32] + 2550 007c 306A ldr r0, [r6, #32] + 2551 007e 0343 orrs r3, r3, r0 + 2552 0080 3362 str r3, [r6, #32] + 2553 0082 3046 mov r0, r6 + 2554 0084 FFF7FEFF bl TIM_CCxChannelCmd + 2555 0088 2268 ldr r2, [r4] + 2556 008a 536C ldr r3, [r2, #68] + 2557 008c 43F40043 orr r3, r3, #32768 + 2558 0090 0020 movs r0, #0 + 2559 0092 5364 str r3, [r2, #68] + 2560 0094 70BD pop {r4, r5, r6, pc} + 2562 0096 00BF .section .text.HAL_TIMEx_OnePulseN_Stop_IT,"ax",%progbits + ARM GAS /tmp/ccY6LI9P.s page 45 + + + 2563 .align 1 + 2564 .p2align 2,,3 + 2565 .global HAL_TIMEx_OnePulseN_Stop_IT + 2566 .syntax unified + 2567 .thumb + 2568 .thumb_func + 2569 .fpu fpv4-sp-d16 + 2571 HAL_TIMEx_OnePulseN_Stop_IT: + 2572 @ args = 0, pretend = 0, frame = 0 + 2573 @ frame_needed = 0, uses_anonymous_args = 0 + 2574 0000 10B5 push {r4, lr} + 2575 0002 0446 mov r4, r0 + 2576 0004 0068 ldr r0, [r0] + 2577 0006 C368 ldr r3, [r0, #12] + 2578 0008 23F00203 bic r3, r3, #2 + 2579 000c C360 str r3, [r0, #12] + 2580 000e C368 ldr r3, [r0, #12] + 2581 0010 23F00403 bic r3, r3, #4 + 2582 0014 0029 cmp r1, #0 + 2583 0016 C360 str r3, [r0, #12] + 2584 0018 036A ldr r3, [r0, #32] + 2585 001a 4FF00402 mov r2, #4 + 2586 001e 01F01F01 and r1, r1, #31 + 2587 0022 02FA01F1 lsl r1, r2, r1 + 2588 0026 23EA0101 bic r1, r3, r1 + 2589 002a 0162 str r1, [r0, #32] + 2590 002c 036A ldr r3, [r0, #32] + 2591 002e 0362 str r3, [r0, #32] + 2592 0030 4FF00002 mov r2, #0 + 2593 0034 14BF ite ne + 2594 0036 1146 movne r1, r2 + 2595 0038 0421 moveq r1, #4 + 2596 003a FFF7FEFF bl TIM_CCxChannelCmd + 2597 003e 2368 ldr r3, [r4] + 2598 0040 196A ldr r1, [r3, #32] + 2599 0042 41F21112 movw r2, #4369 + 2600 0046 1142 tst r1, r2 + 2601 0048 04D1 bne .L458 + 2602 004a 196A ldr r1, [r3, #32] + 2603 004c 44F24442 movw r2, #17476 + 2604 0050 1142 tst r1, r2 + 2605 0052 18D0 beq .L462 + 2606 .L458: + 2607 0054 196A ldr r1, [r3, #32] + 2608 0056 41F21112 movw r2, #4369 + 2609 005a 1142 tst r1, r2 + 2610 005c 08D1 bne .L459 + 2611 005e 196A ldr r1, [r3, #32] + 2612 0060 44F24442 movw r2, #17476 + 2613 0064 1142 tst r1, r2 + 2614 0066 03D1 bne .L459 + 2615 0068 1A68 ldr r2, [r3] + 2616 006a 22F00102 bic r2, r2, #1 + 2617 006e 1A60 str r2, [r3] + 2618 .L459: + 2619 0070 0123 movs r3, #1 + 2620 0072 84F83E30 strb r3, [r4, #62] + ARM GAS /tmp/ccY6LI9P.s page 46 + + + 2621 0076 84F83F30 strb r3, [r4, #63] + 2622 007a 84F84430 strb r3, [r4, #68] + 2623 007e 84F84530 strb r3, [r4, #69] + 2624 0082 0020 movs r0, #0 + 2625 0084 10BD pop {r4, pc} + 2626 .L462: + 2627 0086 5A6C ldr r2, [r3, #68] + 2628 0088 22F40042 bic r2, r2, #32768 + 2629 008c 5A64 str r2, [r3, #68] + 2630 008e E1E7 b .L458 + 2632 .section .text.HAL_TIMEx_ConfigCommutEvent,"ax",%progbits + 2633 .align 1 + 2634 .p2align 2,,3 + 2635 .global HAL_TIMEx_ConfigCommutEvent + 2636 .syntax unified + 2637 .thumb + 2638 .thumb_func + 2639 .fpu fpv4-sp-d16 + 2641 HAL_TIMEx_ConfigCommutEvent: + 2642 @ args = 0, pretend = 0, frame = 0 + 2643 @ frame_needed = 0, uses_anonymous_args = 0 + 2644 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 2645 0004 012B cmp r3, #1 + 2646 0006 3CD0 beq .L467 + 2647 0008 0123 movs r3, #1 + 2648 000a 00B5 push {lr} + 2649 000c 80F83C30 strb r3, [r0, #60] + 2650 0010 31F03003 bics r3, r1, #48 + 2651 0014 8446 mov ip, r0 + 2652 0016 0FD0 beq .L465 + 2653 0018 21F02003 bic r3, r1, #32 + 2654 001c B3F1101F cmp r3, #1048592 + 2655 0020 0AD0 beq .L465 + 2656 0022 194B ldr r3, .L478 + 2657 0024 9942 cmp r1, r3 + 2658 0026 07D0 beq .L465 + 2659 0028 2033 adds r3, r3, #32 + 2660 002a 9942 cmp r1, r3 + 2661 002c 04D0 beq .L465 + 2662 002e 3033 adds r3, r3, #48 + 2663 0030 9942 cmp r1, r3 + 2664 0032 01D0 beq .L465 + 2665 0034 0368 ldr r3, [r0] + 2666 0036 0AE0 b .L466 + 2667 .L465: + 2668 0038 DCF80030 ldr r3, [ip] + 2669 003c 9868 ldr r0, [r3, #8] + 2670 003e 20F44010 bic r0, r0, #3145728 + 2671 0042 20F07000 bic r0, r0, #112 + 2672 0046 9860 str r0, [r3, #8] + 2673 0048 9868 ldr r0, [r3, #8] + 2674 004a 0143 orrs r1, r1, r0 + 2675 004c 9960 str r1, [r3, #8] + 2676 .L466: + 2677 004e 5968 ldr r1, [r3, #4] + 2678 0050 41F00101 orr r1, r1, #1 + 2679 0054 5960 str r1, [r3, #4] + ARM GAS /tmp/ccY6LI9P.s page 47 + + + 2680 0056 5968 ldr r1, [r3, #4] + 2681 0058 21F00401 bic r1, r1, #4 + 2682 005c 5960 str r1, [r3, #4] + 2683 005e 5968 ldr r1, [r3, #4] + 2684 0060 0A43 orrs r2, r2, r1 + 2685 0062 5A60 str r2, [r3, #4] + 2686 0064 DA68 ldr r2, [r3, #12] + 2687 0066 22F02002 bic r2, r2, #32 + 2688 006a DA60 str r2, [r3, #12] + 2689 006c DA68 ldr r2, [r3, #12] + 2690 006e 4FF0000E mov lr, #0 + 2691 0072 22F40052 bic r2, r2, #8192 + 2692 0076 DA60 str r2, [r3, #12] + 2693 0078 8CF83CE0 strb lr, [ip, #60] + 2694 007c 7046 mov r0, lr + 2695 007e 5DF804FB ldr pc, [sp], #4 + 2696 .L467: + 2697 0082 0220 movs r0, #2 + 2698 0084 7047 bx lr + 2699 .L479: + 2700 0086 00BF .align 2 + 2701 .L478: + 2702 0088 20001000 .word 1048608 + 2704 .section .text.HAL_TIMEx_ConfigCommutEvent_IT,"ax",%progbits + 2705 .align 1 + 2706 .p2align 2,,3 + 2707 .global HAL_TIMEx_ConfigCommutEvent_IT + 2708 .syntax unified + 2709 .thumb + 2710 .thumb_func + 2711 .fpu fpv4-sp-d16 + 2713 HAL_TIMEx_ConfigCommutEvent_IT: + 2714 @ args = 0, pretend = 0, frame = 0 + 2715 @ frame_needed = 0, uses_anonymous_args = 0 + 2716 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 2717 0004 012B cmp r3, #1 + 2718 0006 3CD0 beq .L484 + 2719 0008 0123 movs r3, #1 + 2720 000a 00B5 push {lr} + 2721 000c 80F83C30 strb r3, [r0, #60] + 2722 0010 31F03003 bics r3, r1, #48 + 2723 0014 8446 mov ip, r0 + 2724 0016 0FD0 beq .L482 + 2725 0018 21F02003 bic r3, r1, #32 + 2726 001c B3F1101F cmp r3, #1048592 + 2727 0020 0AD0 beq .L482 + 2728 0022 194B ldr r3, .L495 + 2729 0024 9942 cmp r1, r3 + 2730 0026 07D0 beq .L482 + 2731 0028 2033 adds r3, r3, #32 + 2732 002a 9942 cmp r1, r3 + 2733 002c 04D0 beq .L482 + 2734 002e 3033 adds r3, r3, #48 + 2735 0030 9942 cmp r1, r3 + 2736 0032 01D0 beq .L482 + 2737 0034 0368 ldr r3, [r0] + 2738 0036 0AE0 b .L483 + ARM GAS /tmp/ccY6LI9P.s page 48 + + + 2739 .L482: + 2740 0038 DCF80030 ldr r3, [ip] + 2741 003c 9868 ldr r0, [r3, #8] + 2742 003e 20F44010 bic r0, r0, #3145728 + 2743 0042 20F07000 bic r0, r0, #112 + 2744 0046 9860 str r0, [r3, #8] + 2745 0048 9868 ldr r0, [r3, #8] + 2746 004a 0143 orrs r1, r1, r0 + 2747 004c 9960 str r1, [r3, #8] + 2748 .L483: + 2749 004e 5968 ldr r1, [r3, #4] + 2750 0050 41F00101 orr r1, r1, #1 + 2751 0054 5960 str r1, [r3, #4] + 2752 0056 5968 ldr r1, [r3, #4] + 2753 0058 21F00401 bic r1, r1, #4 + 2754 005c 5960 str r1, [r3, #4] + 2755 005e 5968 ldr r1, [r3, #4] + 2756 0060 0A43 orrs r2, r2, r1 + 2757 0062 5A60 str r2, [r3, #4] + 2758 0064 DA68 ldr r2, [r3, #12] + 2759 0066 22F40052 bic r2, r2, #8192 + 2760 006a DA60 str r2, [r3, #12] + 2761 006c DA68 ldr r2, [r3, #12] + 2762 006e 4FF0000E mov lr, #0 + 2763 0072 42F02002 orr r2, r2, #32 + 2764 0076 DA60 str r2, [r3, #12] + 2765 0078 8CF83CE0 strb lr, [ip, #60] + 2766 007c 7046 mov r0, lr + 2767 007e 5DF804FB ldr pc, [sp], #4 + 2768 .L484: + 2769 0082 0220 movs r0, #2 + 2770 0084 7047 bx lr + 2771 .L496: + 2772 0086 00BF .align 2 + 2773 .L495: + 2774 0088 20001000 .word 1048608 + 2776 .section .text.HAL_TIMEx_ConfigCommutEvent_DMA,"ax",%progbits + 2777 .align 1 + 2778 .p2align 2,,3 + 2779 .global HAL_TIMEx_ConfigCommutEvent_DMA + 2780 .syntax unified + 2781 .thumb + 2782 .thumb_func + 2783 .fpu fpv4-sp-d16 + 2785 HAL_TIMEx_ConfigCommutEvent_DMA: + 2786 @ args = 0, pretend = 0, frame = 0 + 2787 @ frame_needed = 0, uses_anonymous_args = 0 + 2788 @ link register save eliminated. + 2789 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 2790 0004 012B cmp r3, #1 + 2791 0006 8446 mov ip, r0 + 2792 0008 40D0 beq .L501 + 2793 000a 0123 movs r3, #1 + 2794 000c 80F83C30 strb r3, [r0, #60] + 2795 0010 31F03003 bics r3, r1, #48 + 2796 0014 0FD0 beq .L499 + 2797 0016 21F02003 bic r3, r1, #32 + ARM GAS /tmp/ccY6LI9P.s page 49 + + + 2798 001a B3F1101F cmp r3, #1048592 + 2799 001e 0AD0 beq .L499 + 2800 0020 1B4B ldr r3, .L508 + 2801 0022 9942 cmp r1, r3 + 2802 0024 07D0 beq .L499 + 2803 0026 2033 adds r3, r3, #32 + 2804 0028 9942 cmp r1, r3 + 2805 002a 04D0 beq .L499 + 2806 002c 3033 adds r3, r3, #48 + 2807 002e 9942 cmp r1, r3 + 2808 0030 01D0 beq .L499 + 2809 0032 0368 ldr r3, [r0] + 2810 0034 0AE0 b .L500 + 2811 .L499: + 2812 0036 DCF80030 ldr r3, [ip] + 2813 003a 9868 ldr r0, [r3, #8] + 2814 003c 20F44010 bic r0, r0, #3145728 + 2815 0040 20F07000 bic r0, r0, #112 + 2816 0044 9860 str r0, [r3, #8] + 2817 0046 9868 ldr r0, [r3, #8] + 2818 0048 0143 orrs r1, r1, r0 + 2819 004a 9960 str r1, [r3, #8] + 2820 .L500: + 2821 004c 5868 ldr r0, [r3, #4] + 2822 004e DCF83410 ldr r1, [ip, #52] + 2823 0052 40F00100 orr r0, r0, #1 + 2824 0056 5860 str r0, [r3, #4] + 2825 0058 5868 ldr r0, [r3, #4] + 2826 005a 20F00400 bic r0, r0, #4 + 2827 005e 5860 str r0, [r3, #4] + 2828 0060 5868 ldr r0, [r3, #4] + 2829 0062 0243 orrs r2, r2, r0 + 2830 0064 5A60 str r2, [r3, #4] + 2831 0066 DA68 ldr r2, [r3, #12] + 2832 0068 0A48 ldr r0, .L508+4 + 2833 006a C862 str r0, [r1, #44] + 2834 006c 0A48 ldr r0, .L508+8 + 2835 006e 0863 str r0, [r1, #48] + 2836 0070 22F02002 bic r2, r2, #32 + 2837 0074 0948 ldr r0, .L508+12 + 2838 0076 4863 str r0, [r1, #52] + 2839 0078 DA60 str r2, [r3, #12] + 2840 007a DA68 ldr r2, [r3, #12] + 2841 007c 0021 movs r1, #0 + 2842 007e 42F40052 orr r2, r2, #8192 + 2843 0082 DA60 str r2, [r3, #12] + 2844 0084 0846 mov r0, r1 + 2845 0086 8CF83C10 strb r1, [ip, #60] + 2846 008a 7047 bx lr + 2847 .L501: + 2848 008c 0220 movs r0, #2 + 2849 008e 7047 bx lr + 2850 .L509: + 2851 .align 2 + 2852 .L508: + 2853 0090 20001000 .word 1048608 + 2854 0094 00000000 .word TIMEx_DMACommutationCplt + ARM GAS /tmp/ccY6LI9P.s page 50 + + + 2855 0098 00000000 .word TIMEx_DMACommutationHalfCplt + 2856 009c 00000000 .word TIM_DMAError + 2858 .section .text.HAL_TIMEx_MasterConfigSynchronization,"ax",%progbits + 2859 .align 1 + 2860 .p2align 2,,3 + 2861 .global HAL_TIMEx_MasterConfigSynchronization + 2862 .syntax unified + 2863 .thumb + 2864 .thumb_func + 2865 .fpu fpv4-sp-d16 + 2867 HAL_TIMEx_MasterConfigSynchronization: + 2868 @ args = 0, pretend = 0, frame = 0 + 2869 @ frame_needed = 0, uses_anonymous_args = 0 + 2870 @ link register save eliminated. + 2871 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 2872 0004 012B cmp r3, #1 + 2873 0006 3ED0 beq .L518 + 2874 0008 70B4 push {r4, r5, r6} + 2875 000a 0268 ldr r2, [r0] + 2876 000c 1F4D ldr r5, .L529 + 2877 000e 0223 movs r3, #2 + 2878 0010 80F83D30 strb r3, [r0, #61] + 2879 0014 AA42 cmp r2, r5 + 2880 0016 5368 ldr r3, [r2, #4] + 2881 0018 9468 ldr r4, [r2, #8] + 2882 001a 28D0 beq .L513 + 2883 001c 05F50065 add r5, r5, #2048 + 2884 0020 AA42 cmp r2, r5 + 2885 0022 24D0 beq .L513 + 2886 0024 0E68 ldr r6, [r1] + 2887 0026 23F00073 bic r3, r3, #33554432 + 2888 002a 23F07003 bic r3, r3, #112 + 2889 002e 3343 orrs r3, r3, r6 + 2890 0030 B2F1804F cmp r2, #1073741824 + 2891 0034 5360 str r3, [r2, #4] + 2892 0036 0CD0 beq .L515 + 2893 0038 154B ldr r3, .L529+4 + 2894 003a 9A42 cmp r2, r3 + 2895 003c 09D0 beq .L515 + 2896 003e 03F58063 add r3, r3, #1024 + 2897 0042 9A42 cmp r2, r3 + 2898 0044 05D0 beq .L515 + 2899 0046 AA42 cmp r2, r5 + 2900 0048 03D0 beq .L515 + 2901 004a 03F59C33 add r3, r3, #79872 + 2902 004e 9A42 cmp r2, r3 + 2903 0050 04D1 bne .L516 + 2904 .L515: + 2905 0052 8B68 ldr r3, [r1, #8] + 2906 0054 24F08004 bic r4, r4, #128 + 2907 0058 1C43 orrs r4, r4, r3 + 2908 005a 9460 str r4, [r2, #8] + 2909 .L516: + 2910 005c 0023 movs r3, #0 + 2911 005e 0122 movs r2, #1 + 2912 0060 80F83D20 strb r2, [r0, #61] + 2913 0064 80F83C30 strb r3, [r0, #60] + ARM GAS /tmp/ccY6LI9P.s page 51 + + + 2914 0068 70BC pop {r4, r5, r6} + 2915 006a 1846 mov r0, r3 + 2916 006c 7047 bx lr + 2917 .L513: + 2918 006e 4D68 ldr r5, [r1, #4] + 2919 0070 23F47003 bic r3, r3, #15728640 + 2920 0074 2B43 orrs r3, r3, r5 + 2921 0076 23F00073 bic r3, r3, #33554432 + 2922 007a 0D68 ldr r5, [r1] + 2923 007c 23F07003 bic r3, r3, #112 + 2924 0080 2B43 orrs r3, r3, r5 + 2925 0082 5360 str r3, [r2, #4] + 2926 0084 E5E7 b .L515 + 2927 .L518: + 2928 0086 0220 movs r0, #2 + 2929 0088 7047 bx lr + 2930 .L530: + 2931 008a 00BF .align 2 + 2932 .L529: + 2933 008c 002C0140 .word 1073818624 + 2934 0090 00040040 .word 1073742848 + 2936 .section .text.HAL_TIMEx_ConfigBreakDeadTime,"ax",%progbits + 2937 .align 1 + 2938 .p2align 2,,3 + 2939 .global HAL_TIMEx_ConfigBreakDeadTime + 2940 .syntax unified + 2941 .thumb + 2942 .thumb_func + 2943 .fpu fpv4-sp-d16 + 2945 HAL_TIMEx_ConfigBreakDeadTime: + 2946 @ args = 0, pretend = 0, frame = 0 + 2947 @ frame_needed = 0, uses_anonymous_args = 0 + 2948 @ link register save eliminated. + 2949 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 2950 0004 012B cmp r3, #1 + 2951 0006 45D0 beq .L537 + 2952 0008 10B4 push {r4} + 2953 000a D1E90243 ldrd r4, r3, [r1, #8] + 2954 000e 23F44073 bic r3, r3, #768 + 2955 0012 0246 mov r2, r0 + 2956 0014 2343 orrs r3, r3, r4 + 2957 0016 4868 ldr r0, [r1, #4] + 2958 0018 0C68 ldr r4, [r1] + 2959 001a 23F48063 bic r3, r3, #1024 + 2960 001e 0343 orrs r3, r3, r0 + 2961 0020 23F40063 bic r3, r3, #2048 + 2962 0024 0869 ldr r0, [r1, #16] + 2963 0026 2343 orrs r3, r3, r4 + 2964 0028 23F48053 bic r3, r3, #4096 + 2965 002c 4C69 ldr r4, [r1, #20] + 2966 002e 0343 orrs r3, r3, r0 + 2967 0030 23F40053 bic r3, r3, #8192 + 2968 0034 086B ldr r0, [r1, #48] + 2969 0036 2343 orrs r3, r3, r4 + 2970 0038 23F48043 bic r3, r3, #16384 + 2971 003c 8C69 ldr r4, [r1, #24] + 2972 003e 0343 orrs r3, r3, r0 + ARM GAS /tmp/ccY6LI9P.s page 52 + + + 2973 0040 23F47023 bic r3, r3, #983040 + 2974 0044 1068 ldr r0, [r2] + 2975 0046 43EA0443 orr r3, r3, r4, lsl #16 + 2976 004a 134C ldr r4, .L543 + 2977 004c A042 cmp r0, r4 + 2978 004e 0BD0 beq .L534 + 2979 0050 04F50064 add r4, r4, #2048 + 2980 0054 A042 cmp r0, r4 + 2981 0056 07D0 beq .L534 + 2982 .L535: + 2983 0058 0021 movs r1, #0 + 2984 005a 4364 str r3, [r0, #68] + 2985 005c 82F83C10 strb r1, [r2, #60] + 2986 0060 0846 mov r0, r1 + 2987 0062 5DF8044B ldr r4, [sp], #4 + 2988 0066 7047 bx lr + 2989 .L534: + 2990 0068 CC69 ldr r4, [r1, #28] + 2991 006a 23F08053 bic r3, r3, #268435456 + 2992 006e 2343 orrs r3, r3, r4 + 2993 0070 8C6A ldr r4, [r1, #40] + 2994 0072 23F47003 bic r3, r3, #15728640 + 2995 0076 43EA0453 orr r3, r3, r4, lsl #20 + 2996 007a 0C6A ldr r4, [r1, #32] + 2997 007c 23F08073 bic r3, r3, #16777216 + 2998 0080 2343 orrs r3, r3, r4 + 2999 0082 4C6A ldr r4, [r1, #36] + 3000 0084 C96A ldr r1, [r1, #44] + 3001 0086 23F00073 bic r3, r3, #33554432 + 3002 008a 2343 orrs r3, r3, r4 + 3003 008c 23F00053 bic r3, r3, #536870912 + 3004 0090 0B43 orrs r3, r3, r1 + 3005 0092 E1E7 b .L535 + 3006 .L537: + 3007 0094 0220 movs r0, #2 + 3008 0096 7047 bx lr + 3009 .L544: + 3010 .align 2 + 3011 .L543: + 3012 0098 002C0140 .word 1073818624 + 3014 .section .text.HAL_TIMEx_ConfigBreakInput,"ax",%progbits + 3015 .align 1 + 3016 .p2align 2,,3 + 3017 .global HAL_TIMEx_ConfigBreakInput + 3018 .syntax unified + 3019 .thumb + 3020 .thumb_func + 3021 .fpu fpv4-sp-d16 + 3023 HAL_TIMEx_ConfigBreakInput: + 3024 @ args = 0, pretend = 0, frame = 0 + 3025 @ frame_needed = 0, uses_anonymous_args = 0 + 3026 @ link register save eliminated. + 3027 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 3028 0004 012B cmp r3, #1 + 3029 0006 4BD0 beq .L551 + 3030 0008 1368 ldr r3, [r2] + 3031 000a 013B subs r3, r3, #1 + ARM GAS /tmp/ccY6LI9P.s page 53 + + + 3032 000c 0F2B cmp r3, #15 + 3033 000e F0B4 push {r4, r5, r6, r7} + 3034 0010 24D8 bhi .L552 + 3035 0012 254C ldr r4, .L559 + 3036 0014 254E ldr r6, .L559+4 + 3037 0016 54F82350 ldr r5, [r4, r3, lsl #2] + 3038 001a 56F823C0 ldr ip, [r6, r3, lsl #2] + 3039 001e 244C ldr r4, .L559+8 + 3040 0020 244E ldr r6, .L559+12 + 3041 0022 54F82340 ldr r4, [r4, r3, lsl #2] + 3042 0026 56F82370 ldr r7, [r6, r3, lsl #2] + 3043 002a 0129 cmp r1, #1 + 3044 002c 1CD0 beq .L548 + 3045 .L558: + 3046 002e 0229 cmp r1, #2 + 3047 0030 2FD1 bne .L557 + 3048 0032 5168 ldr r1, [r2, #4] + 3049 0034 0668 ldr r6, [r0] + 3050 0036 9268 ldr r2, [r2, #8] + 3051 0038 01FA0CF3 lsl r3, r1, ip + 3052 003c 716E ldr r1, [r6, #100] + 3053 003e 4B40 eors r3, r3, r1 + 3054 0040 2B40 ands r3, r3, r5 + 3055 0042 BA40 lsls r2, r2, r7 + 3056 0044 4B40 eors r3, r3, r1 + 3057 0046 5A40 eors r2, r2, r3 + 3058 0048 1440 ands r4, r4, r2 + 3059 004a 6340 eors r3, r3, r4 + 3060 004c 0022 movs r2, #0 + 3061 004e 7366 str r3, [r6, #100] + 3062 0050 80F83C20 strb r2, [r0, #60] + 3063 0054 0023 movs r3, #0 + 3064 0056 1846 mov r0, r3 + 3065 0058 F0BC pop {r4, r5, r6, r7} + 3066 005a 7047 bx lr + 3067 .L552: + 3068 005c 0027 movs r7, #0 + 3069 005e 0129 cmp r1, #1 + 3070 0060 BC46 mov ip, r7 + 3071 0062 3C46 mov r4, r7 + 3072 0064 3D46 mov r5, r7 + 3073 0066 E2D1 bne .L558 + 3074 .L548: + 3075 0068 0668 ldr r6, [r0] + 3076 006a 5368 ldr r3, [r2, #4] + 3077 006c 316E ldr r1, [r6, #96] + 3078 006e 9268 ldr r2, [r2, #8] + 3079 0070 03FA0CF3 lsl r3, r3, ip + 3080 0074 4B40 eors r3, r3, r1 + 3081 0076 2B40 ands r3, r3, r5 + 3082 0078 BA40 lsls r2, r2, r7 + 3083 007a 4B40 eors r3, r3, r1 + 3084 007c 5A40 eors r2, r2, r3 + 3085 007e 1440 ands r4, r4, r2 + 3086 0080 6340 eors r3, r3, r4 + 3087 0082 0022 movs r2, #0 + 3088 0084 3366 str r3, [r6, #96] + ARM GAS /tmp/ccY6LI9P.s page 54 + + + 3089 0086 80F83C20 strb r2, [r0, #60] + 3090 008a 0023 movs r3, #0 + 3091 008c 1846 mov r0, r3 + 3092 008e F0BC pop {r4, r5, r6, r7} + 3093 0090 7047 bx lr + 3094 .L557: + 3095 0092 0022 movs r2, #0 + 3096 0094 80F83C20 strb r2, [r0, #60] + 3097 0098 0123 movs r3, #1 + 3098 009a 1846 mov r0, r3 + 3099 009c F0BC pop {r4, r5, r6, r7} + 3100 009e 7047 bx lr + 3101 .L551: + 3102 00a0 0223 movs r3, #2 + 3103 00a2 1846 mov r0, r3 + 3104 00a4 7047 bx lr + 3105 .L560: + 3106 00a6 00BF .align 2 + 3107 .L559: + 3108 00a8 00000000 .word .LANCHOR0 + 3109 00ac 00000000 .word .LANCHOR2 + 3110 00b0 00000000 .word .LANCHOR1 + 3111 00b4 00000000 .word .LANCHOR3 + 3113 .section .text.HAL_TIMEx_RemapConfig,"ax",%progbits + 3114 .align 1 + 3115 .p2align 2,,3 + 3116 .global HAL_TIMEx_RemapConfig + 3117 .syntax unified + 3118 .thumb + 3119 .thumb_func + 3120 .fpu fpv4-sp-d16 + 3122 HAL_TIMEx_RemapConfig: + 3123 @ args = 0, pretend = 0, frame = 0 + 3124 @ frame_needed = 0, uses_anonymous_args = 0 + 3125 @ link register save eliminated. + 3126 0000 90F83C20 ldrb r2, [r0, #60] @ zero_extendqisi2 + 3127 0004 012A cmp r2, #1 + 3128 0006 0346 mov r3, r0 + 3129 0008 0BD0 beq .L563 + 3130 000a 0068 ldr r0, [r0] + 3131 000c 026E ldr r2, [r0, #96] + 3132 000e 22F47032 bic r2, r2, #245760 + 3133 0012 4FF0000C mov ip, #0 + 3134 0016 1143 orrs r1, r1, r2 + 3135 0018 0166 str r1, [r0, #96] + 3136 001a 6046 mov r0, ip + 3137 001c 83F83CC0 strb ip, [r3, #60] + 3138 0020 7047 bx lr + 3139 .L563: + 3140 0022 0220 movs r0, #2 + 3141 0024 7047 bx lr + 3143 0026 00BF .section .text.HAL_TIMEx_TISelection,"ax",%progbits + 3144 .align 1 + 3145 .p2align 2,,3 + 3146 .global HAL_TIMEx_TISelection + 3147 .syntax unified + 3148 .thumb + ARM GAS /tmp/ccY6LI9P.s page 55 + + + 3149 .thumb_func + 3150 .fpu fpv4-sp-d16 + 3152 HAL_TIMEx_TISelection: + 3153 @ args = 0, pretend = 0, frame = 0 + 3154 @ frame_needed = 0, uses_anonymous_args = 0 + 3155 @ link register save eliminated. + 3156 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 3157 0004 012B cmp r3, #1 + 3158 0006 40D0 beq .L574 + 3159 0008 0123 movs r3, #1 + 3160 000a 10B4 push {r4} + 3161 000c 80F83C30 strb r3, [r0, #60] + 3162 0010 0C2A cmp r2, #12 + 3163 0012 08D8 bhi .L575 + 3164 0014 DFE802F0 tbb [pc, r2] + 3165 .L568: + 3166 0018 17 .byte (.L571-.L568)/2 + 3167 0019 07 .byte (.L575-.L568)/2 + 3168 001a 07 .byte (.L575-.L568)/2 + 3169 001b 07 .byte (.L575-.L568)/2 + 3170 001c 29 .byte (.L570-.L568)/2 + 3171 001d 07 .byte (.L575-.L568)/2 + 3172 001e 07 .byte (.L575-.L568)/2 + 3173 001f 07 .byte (.L575-.L568)/2 + 3174 0020 31 .byte (.L569-.L568)/2 + 3175 0021 07 .byte (.L575-.L568)/2 + 3176 0022 07 .byte (.L575-.L568)/2 + 3177 0023 07 .byte (.L575-.L568)/2 + 3178 0024 0F .byte (.L567-.L568)/2 + 3179 0025 00 .p2align 1 + 3180 .L575: + 3181 0026 0123 movs r3, #1 + 3182 .L566: + 3183 0028 0022 movs r2, #0 + 3184 002a 80F83C20 strb r2, [r0, #60] + 3185 002e 5DF8044B ldr r4, [sp], #4 + 3186 0032 1846 mov r0, r3 + 3187 0034 7047 bx lr + 3188 .L567: + 3189 0036 0468 ldr r4, [r0] + 3190 0038 E26D ldr r2, [r4, #92] + 3191 003a 22F07062 bic r2, r2, #251658240 + 3192 003e 1143 orrs r1, r1, r2 + 3193 0040 0023 movs r3, #0 + 3194 0042 E165 str r1, [r4, #92] + 3195 0044 F0E7 b .L566 + 3196 .L571: + 3197 0046 0268 ldr r2, [r0] + 3198 0048 144C ldr r4, .L580 + 3199 004a D36D ldr r3, [r2, #92] + 3200 004c 23F00F03 bic r3, r3, #15 + 3201 0050 1943 orrs r1, r1, r3 + 3202 0052 D165 str r1, [r2, #92] + 3203 0054 A242 cmp r2, r4 + 3204 0056 916E ldr r1, [r2, #104] + 3205 0058 1AD0 beq .L572 + 3206 005a 114B ldr r3, .L580+4 + ARM GAS /tmp/ccY6LI9P.s page 56 + + + 3207 005c 9A42 cmp r2, r3 + 3208 005e 17D0 beq .L572 + 3209 0060 21F00101 bic r1, r1, #1 + 3210 0064 0023 movs r3, #0 + 3211 0066 9166 str r1, [r2, #104] + 3212 0068 DEE7 b .L566 + 3213 .L570: + 3214 006a 0468 ldr r4, [r0] + 3215 006c E26D ldr r2, [r4, #92] + 3216 006e 22F47062 bic r2, r2, #3840 + 3217 0072 1143 orrs r1, r1, r2 + 3218 0074 0023 movs r3, #0 + 3219 0076 E165 str r1, [r4, #92] + 3220 0078 D6E7 b .L566 + 3221 .L569: + 3222 007a 0468 ldr r4, [r0] + 3223 007c E26D ldr r2, [r4, #92] + 3224 007e 22F47022 bic r2, r2, #983040 + 3225 0082 1143 orrs r1, r1, r2 + 3226 0084 0023 movs r3, #0 + 3227 0086 E165 str r1, [r4, #92] + 3228 0088 CEE7 b .L566 + 3229 .L574: + 3230 008a 0223 movs r3, #2 + 3231 008c 1846 mov r0, r3 + 3232 008e 7047 bx lr + 3233 .L572: + 3234 0090 41F00101 orr r1, r1, #1 + 3235 0094 0023 movs r3, #0 + 3236 0096 9166 str r1, [r2, #104] + 3237 0098 C6E7 b .L566 + 3238 .L581: + 3239 009a 00BF .align 2 + 3240 .L580: + 3241 009c 00440140 .word 1073824768 + 3242 00a0 00480140 .word 1073825792 + 3244 .section .text.HAL_TIMEx_GroupChannel5,"ax",%progbits + 3245 .align 1 + 3246 .p2align 2,,3 + 3247 .global HAL_TIMEx_GroupChannel5 + 3248 .syntax unified + 3249 .thumb + 3250 .thumb_func + 3251 .fpu fpv4-sp-d16 + 3253 HAL_TIMEx_GroupChannel5: + 3254 @ args = 0, pretend = 0, frame = 0 + 3255 @ frame_needed = 0, uses_anonymous_args = 0 + 3256 0000 90F83C20 ldrb r2, [r0, #60] @ zero_extendqisi2 + 3257 0004 012A cmp r2, #1 + 3258 0006 17D0 beq .L584 + 3259 0008 0346 mov r3, r0 + 3260 000a 0268 ldr r2, [r0] + 3261 000c 0220 movs r0, #2 + 3262 000e 00B5 push {lr} + 3263 0010 83F83D00 strb r0, [r3, #61] + 3264 0014 906C ldr r0, [r2, #72] + 3265 0016 20F06040 bic r0, r0, #-536870912 + ARM GAS /tmp/ccY6LI9P.s page 57 + + + 3266 001a 9064 str r0, [r2, #72] + 3267 001c 906C ldr r0, [r2, #72] + 3268 001e 4FF0000C mov ip, #0 + 3269 0022 0143 orrs r1, r1, r0 + 3270 0024 4FF0010E mov lr, #1 + 3271 0028 9164 str r1, [r2, #72] + 3272 002a 83F83DE0 strb lr, [r3, #61] + 3273 002e 83F83CC0 strb ip, [r3, #60] + 3274 0032 6046 mov r0, ip + 3275 0034 5DF804FB ldr pc, [sp], #4 + 3276 .L584: + 3277 0038 0220 movs r0, #2 + 3278 003a 7047 bx lr + 3280 .section .text.HAL_TIMEx_DisarmBreakInput,"ax",%progbits + 3281 .align 1 + 3282 .p2align 2,,3 + 3283 .global HAL_TIMEx_DisarmBreakInput + 3284 .syntax unified + 3285 .thumb + 3286 .thumb_func + 3287 .fpu fpv4-sp-d16 + 3289 HAL_TIMEx_DisarmBreakInput: + 3290 @ args = 0, pretend = 0, frame = 0 + 3291 @ frame_needed = 0, uses_anonymous_args = 0 + 3292 @ link register save eliminated. + 3293 0000 0129 cmp r1, #1 + 3294 0002 0CD0 beq .L590 + 3295 0004 0229 cmp r1, #2 + 3296 0006 08D1 bne .L595 + 3297 0008 0268 ldr r2, [r0] + 3298 000a 0E4B ldr r3, .L597 + 3299 000c 516C ldr r1, [r2, #68] + 3300 000e 0B40 ands r3, r3, r1 + 3301 0010 B3F1005F cmp r3, #536870912 + 3302 0014 10D0 beq .L596 + 3303 .L594: + 3304 0016 0020 movs r0, #0 + 3305 0018 7047 bx lr + 3306 .L595: + 3307 001a 0120 movs r0, #1 + 3308 001c 7047 bx lr + 3309 .L590: + 3310 001e 0268 ldr r2, [r0] + 3311 0020 094B ldr r3, .L597+4 + 3312 0022 516C ldr r1, [r2, #68] + 3313 0024 0B40 ands r3, r3, r1 + 3314 0026 B3F1805F cmp r3, #268435456 + 3315 002a F4D1 bne .L594 + 3316 002c 536C ldr r3, [r2, #68] + 3317 002e 43F08063 orr r3, r3, #67108864 + 3318 0032 0020 movs r0, #0 + 3319 0034 5364 str r3, [r2, #68] + 3320 0036 7047 bx lr + 3321 .L596: + 3322 0038 536C ldr r3, [r2, #68] + 3323 003a 43F00063 orr r3, r3, #134217728 + 3324 003e 0020 movs r0, #0 + ARM GAS /tmp/ccY6LI9P.s page 58 + + + 3325 0040 5364 str r3, [r2, #68] + 3326 0042 7047 bx lr + 3327 .L598: + 3328 .align 2 + 3329 .L597: + 3330 0044 00800020 .word 536903680 + 3331 0048 00800010 .word 268468224 + 3333 .section .text.HAL_TIMEx_ReArmBreakInput,"ax",%progbits + 3334 .align 1 + 3335 .p2align 2,,3 + 3336 .global HAL_TIMEx_ReArmBreakInput + 3337 .syntax unified + 3338 .thumb + 3339 .thumb_func + 3340 .fpu fpv4-sp-d16 + 3342 HAL_TIMEx_ReArmBreakInput: + 3343 @ args = 0, pretend = 0, frame = 0 + 3344 @ frame_needed = 0, uses_anonymous_args = 0 + 3345 0000 0129 cmp r1, #1 + 3346 0002 38B5 push {r3, r4, r5, lr} + 3347 0004 0446 mov r4, r0 + 3348 0006 09D0 beq .L600 + 3349 0008 0229 cmp r1, #2 + 3350 000a 05D1 bne .L629 + 3351 000c 0368 ldr r3, [r0] + 3352 000e 5B6C ldr r3, [r3, #68] + 3353 0010 9800 lsls r0, r3, #2 + 3354 0012 19D4 bmi .L630 + 3355 .L604: + 3356 0014 0020 movs r0, #0 + 3357 0016 38BD pop {r3, r4, r5, pc} + 3358 .L629: + 3359 0018 0120 movs r0, #1 + 3360 001a 38BD pop {r3, r4, r5, pc} + 3361 .L600: + 3362 001c 0368 ldr r3, [r0] + 3363 001e 5B6C ldr r3, [r3, #68] + 3364 0020 D800 lsls r0, r3, #3 + 3365 0022 F7D5 bpl .L604 + 3366 0024 FFF7FEFF bl HAL_GetTick + 3367 0028 2368 ldr r3, [r4] + 3368 002a 0546 mov r5, r0 + 3369 .L627: + 3370 002c 5B6C ldr r3, [r3, #68] + 3371 002e 5901 lsls r1, r3, #5 + 3372 0030 F0D5 bpl .L604 + 3373 0032 FFF7FEFF bl HAL_GetTick + 3374 0036 401B subs r0, r0, r5 + 3375 0038 0528 cmp r0, #5 + 3376 003a 2368 ldr r3, [r4] + 3377 003c F6D9 bls .L627 + 3378 003e 5A6C ldr r2, [r3, #68] + 3379 0040 5201 lsls r2, r2, #5 + 3380 0042 F3D5 bpl .L627 + 3381 .L610: + 3382 0044 0320 movs r0, #3 + 3383 0046 38BD pop {r3, r4, r5, pc} + ARM GAS /tmp/ccY6LI9P.s page 59 + + + 3384 .L630: + 3385 0048 FFF7FEFF bl HAL_GetTick + 3386 004c 2368 ldr r3, [r4] + 3387 004e 0546 mov r5, r0 + 3388 .L628: + 3389 0050 5B6C ldr r3, [r3, #68] + 3390 0052 1901 lsls r1, r3, #4 + 3391 0054 DED5 bpl .L604 + 3392 0056 FFF7FEFF bl HAL_GetTick + 3393 005a 401B subs r0, r0, r5 + 3394 005c 0528 cmp r0, #5 + 3395 005e 2368 ldr r3, [r4] + 3396 0060 F6D9 bls .L628 + 3397 0062 5A6C ldr r2, [r3, #68] + 3398 0064 1201 lsls r2, r2, #4 + 3399 0066 EDD4 bmi .L610 + 3400 0068 F2E7 b .L628 + 3402 006a 00BF .section .text.HAL_TIMEx_DitheringEnable,"ax",%progbits + 3403 .align 1 + 3404 .p2align 2,,3 + 3405 .global HAL_TIMEx_DitheringEnable + 3406 .syntax unified + 3407 .thumb + 3408 .thumb_func + 3409 .fpu fpv4-sp-d16 + 3411 HAL_TIMEx_DitheringEnable: + 3412 @ args = 0, pretend = 0, frame = 0 + 3413 @ frame_needed = 0, uses_anonymous_args = 0 + 3414 @ link register save eliminated. + 3415 0000 0346 mov r3, r0 + 3416 0002 0020 movs r0, #0 + 3417 0004 1A68 ldr r2, [r3] + 3418 0006 1368 ldr r3, [r2] + 3419 0008 43F48053 orr r3, r3, #4096 + 3420 000c 1360 str r3, [r2] + 3421 000e 7047 bx lr + 3423 .section .text.HAL_TIMEx_DitheringDisable,"ax",%progbits + 3424 .align 1 + 3425 .p2align 2,,3 + 3426 .global HAL_TIMEx_DitheringDisable + 3427 .syntax unified + 3428 .thumb + 3429 .thumb_func + 3430 .fpu fpv4-sp-d16 + 3432 HAL_TIMEx_DitheringDisable: + 3433 @ args = 0, pretend = 0, frame = 0 + 3434 @ frame_needed = 0, uses_anonymous_args = 0 + 3435 @ link register save eliminated. + 3436 0000 0346 mov r3, r0 + 3437 0002 0020 movs r0, #0 + 3438 0004 1A68 ldr r2, [r3] + 3439 0006 1368 ldr r3, [r2] + 3440 0008 23F48053 bic r3, r3, #4096 + 3441 000c 1360 str r3, [r2] + 3442 000e 7047 bx lr + 3444 .section .text.HAL_TIMEx_OC_ConfigPulseOnCompare,"ax",%progbits + 3445 .align 1 + ARM GAS /tmp/ccY6LI9P.s page 60 + + + 3446 .p2align 2,,3 + 3447 .global HAL_TIMEx_OC_ConfigPulseOnCompare + 3448 .syntax unified + 3449 .thumb + 3450 .thumb_func + 3451 .fpu fpv4-sp-d16 + 3453 HAL_TIMEx_OC_ConfigPulseOnCompare: + 3454 @ args = 0, pretend = 0, frame = 0 + 3455 @ frame_needed = 0, uses_anonymous_args = 0 + 3456 @ link register save eliminated. + 3457 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 3458 0004 012B cmp r3, #1 + 3459 0006 19D0 beq .L635 + 3460 0008 10B4 push {r4} + 3461 000a 0223 movs r3, #2 + 3462 000c 0468 ldr r4, [r0] + 3463 000e 80F83D30 strb r3, [r0, #61] + 3464 0012 8446 mov ip, r0 + 3465 0014 A06D ldr r0, [r4, #88] + 3466 0016 1304 lsls r3, r2, #16 + 3467 0018 20F0FF60 bic r0, r0, #133693440 + 3468 001c 43EA0162 orr r2, r3, r1, lsl #24 + 3469 0020 20F4E020 bic r0, r0, #458752 + 3470 0024 0023 movs r3, #0 + 3471 0026 0243 orrs r2, r2, r0 + 3472 0028 0121 movs r1, #1 + 3473 002a A265 str r2, [r4, #88] + 3474 002c 8CF83D10 strb r1, [ip, #61] + 3475 0030 8CF83C30 strb r3, [ip, #60] + 3476 0034 1846 mov r0, r3 + 3477 0036 5DF8044B ldr r4, [sp], #4 + 3478 003a 7047 bx lr + 3479 .L635: + 3480 003c 0220 movs r0, #2 + 3481 003e 7047 bx lr + 3483 .section .text.HAL_TIMEx_ConfigSlaveModePreload,"ax",%progbits + 3484 .align 1 + 3485 .p2align 2,,3 + 3486 .global HAL_TIMEx_ConfigSlaveModePreload + 3487 .syntax unified + 3488 .thumb + 3489 .thumb_func + 3490 .fpu fpv4-sp-d16 + 3492 HAL_TIMEx_ConfigSlaveModePreload: + 3493 @ args = 0, pretend = 0, frame = 0 + 3494 @ frame_needed = 0, uses_anonymous_args = 0 + 3495 @ link register save eliminated. + 3496 0000 0268 ldr r2, [r0] + 3497 0002 9368 ldr r3, [r2, #8] + 3498 0004 23F00073 bic r3, r3, #33554432 + 3499 0008 1943 orrs r1, r1, r3 + 3500 000a 0020 movs r0, #0 + 3501 000c 9160 str r1, [r2, #8] + 3502 000e 7047 bx lr + 3504 .section .text.HAL_TIMEx_EnableSlaveModePreload,"ax",%progbits + 3505 .align 1 + 3506 .p2align 2,,3 + ARM GAS /tmp/ccY6LI9P.s page 61 + + + 3507 .global HAL_TIMEx_EnableSlaveModePreload + 3508 .syntax unified + 3509 .thumb + 3510 .thumb_func + 3511 .fpu fpv4-sp-d16 + 3513 HAL_TIMEx_EnableSlaveModePreload: + 3514 @ args = 0, pretend = 0, frame = 0 + 3515 @ frame_needed = 0, uses_anonymous_args = 0 + 3516 @ link register save eliminated. + 3517 0000 0346 mov r3, r0 + 3518 0002 0020 movs r0, #0 + 3519 0004 1A68 ldr r2, [r3] + 3520 0006 9368 ldr r3, [r2, #8] + 3521 0008 43F08073 orr r3, r3, #16777216 + 3522 000c 9360 str r3, [r2, #8] + 3523 000e 7047 bx lr + 3525 .section .text.HAL_TIMEx_DisableSlaveModePreload,"ax",%progbits + 3526 .align 1 + 3527 .p2align 2,,3 + 3528 .global HAL_TIMEx_DisableSlaveModePreload + 3529 .syntax unified + 3530 .thumb + 3531 .thumb_func + 3532 .fpu fpv4-sp-d16 + 3534 HAL_TIMEx_DisableSlaveModePreload: + 3535 @ args = 0, pretend = 0, frame = 0 + 3536 @ frame_needed = 0, uses_anonymous_args = 0 + 3537 @ link register save eliminated. + 3538 0000 0346 mov r3, r0 + 3539 0002 0020 movs r0, #0 + 3540 0004 1A68 ldr r2, [r3] + 3541 0006 9368 ldr r3, [r2, #8] + 3542 0008 23F08073 bic r3, r3, #16777216 + 3543 000c 9360 str r3, [r2, #8] + 3544 000e 7047 bx lr + 3546 .section .text.HAL_TIMEx_EnableDeadTimePreload,"ax",%progbits + 3547 .align 1 + 3548 .p2align 2,,3 + 3549 .global HAL_TIMEx_EnableDeadTimePreload + 3550 .syntax unified + 3551 .thumb + 3552 .thumb_func + 3553 .fpu fpv4-sp-d16 + 3555 HAL_TIMEx_EnableDeadTimePreload: + 3556 @ args = 0, pretend = 0, frame = 0 + 3557 @ frame_needed = 0, uses_anonymous_args = 0 + 3558 @ link register save eliminated. + 3559 0000 0346 mov r3, r0 + 3560 0002 0020 movs r0, #0 + 3561 0004 1A68 ldr r2, [r3] + 3562 0006 536D ldr r3, [r2, #84] + 3563 0008 43F40033 orr r3, r3, #131072 + 3564 000c 5365 str r3, [r2, #84] + 3565 000e 7047 bx lr + 3567 .section .text.HAL_TIMEx_DisableDeadTimePreload,"ax",%progbits + 3568 .align 1 + 3569 .p2align 2,,3 + ARM GAS /tmp/ccY6LI9P.s page 62 + + + 3570 .global HAL_TIMEx_DisableDeadTimePreload + 3571 .syntax unified + 3572 .thumb + 3573 .thumb_func + 3574 .fpu fpv4-sp-d16 + 3576 HAL_TIMEx_DisableDeadTimePreload: + 3577 @ args = 0, pretend = 0, frame = 0 + 3578 @ frame_needed = 0, uses_anonymous_args = 0 + 3579 @ link register save eliminated. + 3580 0000 0346 mov r3, r0 + 3581 0002 0020 movs r0, #0 + 3582 0004 1A68 ldr r2, [r3] + 3583 0006 536D ldr r3, [r2, #84] + 3584 0008 23F40033 bic r3, r3, #131072 + 3585 000c 5365 str r3, [r2, #84] + 3586 000e 7047 bx lr + 3588 .section .text.HAL_TIMEx_ConfigDeadTime,"ax",%progbits + 3589 .align 1 + 3590 .p2align 2,,3 + 3591 .global HAL_TIMEx_ConfigDeadTime + 3592 .syntax unified + 3593 .thumb + 3594 .thumb_func + 3595 .fpu fpv4-sp-d16 + 3597 HAL_TIMEx_ConfigDeadTime: + 3598 @ args = 0, pretend = 0, frame = 0 + 3599 @ frame_needed = 0, uses_anonymous_args = 0 + 3600 @ link register save eliminated. + 3601 0000 0268 ldr r2, [r0] + 3602 0002 536C ldr r3, [r2, #68] + 3603 0004 23F0FF03 bic r3, r3, #255 + 3604 0008 1943 orrs r1, r1, r3 + 3605 000a 0020 movs r0, #0 + 3606 000c 5164 str r1, [r2, #68] + 3607 000e 7047 bx lr + 3609 .section .text.HAL_TIMEx_ConfigAsymmetricalDeadTime,"ax",%progbits + 3610 .align 1 + 3611 .p2align 2,,3 + 3612 .global HAL_TIMEx_ConfigAsymmetricalDeadTime + 3613 .syntax unified + 3614 .thumb + 3615 .thumb_func + 3616 .fpu fpv4-sp-d16 + 3618 HAL_TIMEx_ConfigAsymmetricalDeadTime: + 3619 @ args = 0, pretend = 0, frame = 0 + 3620 @ frame_needed = 0, uses_anonymous_args = 0 + 3621 @ link register save eliminated. + 3622 0000 0268 ldr r2, [r0] + 3623 0002 536D ldr r3, [r2, #84] + 3624 0004 23F0FF03 bic r3, r3, #255 + 3625 0008 1943 orrs r1, r1, r3 + 3626 000a 0020 movs r0, #0 + 3627 000c 5165 str r1, [r2, #84] + 3628 000e 7047 bx lr + 3630 .section .text.HAL_TIMEx_EnableAsymmetricalDeadTime,"ax",%progbits + 3631 .align 1 + 3632 .p2align 2,,3 + ARM GAS /tmp/ccY6LI9P.s page 63 + + + 3633 .global HAL_TIMEx_EnableAsymmetricalDeadTime + 3634 .syntax unified + 3635 .thumb + 3636 .thumb_func + 3637 .fpu fpv4-sp-d16 + 3639 HAL_TIMEx_EnableAsymmetricalDeadTime: + 3640 @ args = 0, pretend = 0, frame = 0 + 3641 @ frame_needed = 0, uses_anonymous_args = 0 + 3642 @ link register save eliminated. + 3643 0000 0346 mov r3, r0 + 3644 0002 0020 movs r0, #0 + 3645 0004 1A68 ldr r2, [r3] + 3646 0006 536D ldr r3, [r2, #84] + 3647 0008 43F48033 orr r3, r3, #65536 + 3648 000c 5365 str r3, [r2, #84] + 3649 000e 7047 bx lr + 3651 .section .text.HAL_TIMEx_DisableAsymmetricalDeadTime,"ax",%progbits + 3652 .align 1 + 3653 .p2align 2,,3 + 3654 .global HAL_TIMEx_DisableAsymmetricalDeadTime + 3655 .syntax unified + 3656 .thumb + 3657 .thumb_func + 3658 .fpu fpv4-sp-d16 + 3660 HAL_TIMEx_DisableAsymmetricalDeadTime: + 3661 @ args = 0, pretend = 0, frame = 0 + 3662 @ frame_needed = 0, uses_anonymous_args = 0 + 3663 @ link register save eliminated. + 3664 0000 0346 mov r3, r0 + 3665 0002 0020 movs r0, #0 + 3666 0004 1A68 ldr r2, [r3] + 3667 0006 536D ldr r3, [r2, #84] + 3668 0008 23F48033 bic r3, r3, #65536 + 3669 000c 5365 str r3, [r2, #84] + 3670 000e 7047 bx lr + 3672 .section .text.HAL_TIMEx_ConfigEncoderIndex,"ax",%progbits + 3673 .align 1 + 3674 .p2align 2,,3 + 3675 .global HAL_TIMEx_ConfigEncoderIndex + 3676 .syntax unified + 3677 .thumb + 3678 .thumb_func + 3679 .fpu fpv4-sp-d16 + 3681 HAL_TIMEx_ConfigEncoderIndex: + 3682 @ args = 0, pretend = 0, frame = 0 + 3683 @ frame_needed = 0, uses_anonymous_args = 0 + 3684 0000 38B5 push {r3, r4, r5, lr} + 3685 0002 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2 + 3686 0006 012B cmp r3, #1 + 3687 0008 21D0 beq .L652 + 3688 000a 0123 movs r3, #1 + 3689 000c 0C46 mov r4, r1 + 3690 000e 0546 mov r5, r0 + 3691 0010 80F83C30 strb r3, [r0, #60] + 3692 0014 8B68 ldr r3, [r1, #8] + 3693 0016 0068 ldr r0, [r0] + 3694 0018 D1E90021 ldrd r2, r1, [r1] + ARM GAS /tmp/ccY6LI9P.s page 64 + + + 3695 001c FFF7FEFF bl TIM_ETR_SetConfig + 3696 0020 207B ldrb r0, [r4, #12] @ zero_extendqisi2 + 3697 0022 2269 ldr r2, [r4, #16] + 3698 0024 6369 ldr r3, [r4, #20] + 3699 0026 2968 ldr r1, [r5] + 3700 0028 0128 cmp r0, #1 + 3701 002a 43EA0203 orr r3, r3, r2 + 3702 002e 8A6D ldr r2, [r1, #88] + 3703 0030 0CBF ite eq + 3704 0032 2020 moveq r0, #32 + 3705 0034 0020 movne r0, #0 + 3706 0036 0343 orrs r3, r3, r0 + 3707 0038 22F0E602 bic r2, r2, #230 + 3708 003c 1343 orrs r3, r3, r2 + 3709 003e 43F00103 orr r3, r3, #1 + 3710 0042 0022 movs r2, #0 + 3711 0044 8B65 str r3, [r1, #88] + 3712 0046 85F83C20 strb r2, [r5, #60] + 3713 004a 1046 mov r0, r2 + 3714 004c 38BD pop {r3, r4, r5, pc} + 3715 .L652: + 3716 004e 0220 movs r0, #2 + 3717 0050 38BD pop {r3, r4, r5, pc} + 3719 0052 00BF .section .text.HAL_TIMEx_EnableEncoderIndex,"ax",%progbits + 3720 .align 1 + 3721 .p2align 2,,3 + 3722 .global HAL_TIMEx_EnableEncoderIndex + 3723 .syntax unified + 3724 .thumb + 3725 .thumb_func + 3726 .fpu fpv4-sp-d16 + 3728 HAL_TIMEx_EnableEncoderIndex: + 3729 @ args = 0, pretend = 0, frame = 0 + 3730 @ frame_needed = 0, uses_anonymous_args = 0 + 3731 @ link register save eliminated. + 3732 0000 0346 mov r3, r0 + 3733 0002 0020 movs r0, #0 + 3734 0004 1A68 ldr r2, [r3] + 3735 0006 936D ldr r3, [r2, #88] + 3736 0008 43F00103 orr r3, r3, #1 + 3737 000c 9365 str r3, [r2, #88] + 3738 000e 7047 bx lr + 3740 .section .text.HAL_TIMEx_DisableEncoderIndex,"ax",%progbits + 3741 .align 1 + 3742 .p2align 2,,3 + 3743 .global HAL_TIMEx_DisableEncoderIndex + 3744 .syntax unified + 3745 .thumb + 3746 .thumb_func + 3747 .fpu fpv4-sp-d16 + 3749 HAL_TIMEx_DisableEncoderIndex: + 3750 @ args = 0, pretend = 0, frame = 0 + 3751 @ frame_needed = 0, uses_anonymous_args = 0 + 3752 @ link register save eliminated. + 3753 0000 0346 mov r3, r0 + 3754 0002 0020 movs r0, #0 + 3755 0004 1A68 ldr r2, [r3] + ARM GAS /tmp/ccY6LI9P.s page 65 + + + 3756 0006 936D ldr r3, [r2, #88] + 3757 0008 23F00103 bic r3, r3, #1 + 3758 000c 9365 str r3, [r2, #88] + 3759 000e 7047 bx lr + 3761 .section .text.HAL_TIMEx_EnableEncoderFirstIndex,"ax",%progbits + 3762 .align 1 + 3763 .p2align 2,,3 + 3764 .global HAL_TIMEx_EnableEncoderFirstIndex + 3765 .syntax unified + 3766 .thumb + 3767 .thumb_func + 3768 .fpu fpv4-sp-d16 + 3770 HAL_TIMEx_EnableEncoderFirstIndex: + 3771 @ args = 0, pretend = 0, frame = 0 + 3772 @ frame_needed = 0, uses_anonymous_args = 0 + 3773 @ link register save eliminated. + 3774 0000 0346 mov r3, r0 + 3775 0002 0020 movs r0, #0 + 3776 0004 1A68 ldr r2, [r3] + 3777 0006 936D ldr r3, [r2, #88] + 3778 0008 43F02003 orr r3, r3, #32 + 3779 000c 9365 str r3, [r2, #88] + 3780 000e 7047 bx lr + 3782 .section .text.HAL_TIMEx_DisableEncoderFirstIndex,"ax",%progbits + 3783 .align 1 + 3784 .p2align 2,,3 + 3785 .global HAL_TIMEx_DisableEncoderFirstIndex + 3786 .syntax unified + 3787 .thumb + 3788 .thumb_func + 3789 .fpu fpv4-sp-d16 + 3791 HAL_TIMEx_DisableEncoderFirstIndex: + 3792 @ args = 0, pretend = 0, frame = 0 + 3793 @ frame_needed = 0, uses_anonymous_args = 0 + 3794 @ link register save eliminated. + 3795 0000 0346 mov r3, r0 + 3796 0002 0020 movs r0, #0 + 3797 0004 1A68 ldr r2, [r3] + 3798 0006 936D ldr r3, [r2, #88] + 3799 0008 23F02003 bic r3, r3, #32 + 3800 000c 9365 str r3, [r2, #88] + 3801 000e 7047 bx lr + 3803 .section .text.HAL_TIMEx_CommutCallback,"ax",%progbits + 3804 .align 1 + 3805 .p2align 2,,3 + 3806 .weak HAL_TIMEx_CommutCallback + 3807 .syntax unified + 3808 .thumb + 3809 .thumb_func + 3810 .fpu fpv4-sp-d16 + 3812 HAL_TIMEx_CommutCallback: + 3813 @ args = 0, pretend = 0, frame = 0 + 3814 @ frame_needed = 0, uses_anonymous_args = 0 + 3815 @ link register save eliminated. + 3816 0000 7047 bx lr + 3818 0002 00BF .section .text.TIMEx_DMACommutationCplt,"ax",%progbits + 3819 .align 1 + ARM GAS /tmp/ccY6LI9P.s page 66 + + + 3820 .p2align 2,,3 + 3821 .global TIMEx_DMACommutationCplt + 3822 .syntax unified + 3823 .thumb + 3824 .thumb_func + 3825 .fpu fpv4-sp-d16 + 3827 TIMEx_DMACommutationCplt: + 3828 @ args = 0, pretend = 0, frame = 0 + 3829 @ frame_needed = 0, uses_anonymous_args = 0 + 3830 0000 08B5 push {r3, lr} + 3831 0002 806A ldr r0, [r0, #40] + 3832 0004 0123 movs r3, #1 + 3833 0006 80F83D30 strb r3, [r0, #61] + 3834 000a FFF7FEFF bl HAL_TIMEx_CommutCallback + 3835 000e 08BD pop {r3, pc} + 3837 .section .text.HAL_TIMEx_CommutHalfCpltCallback,"ax",%progbits + 3838 .align 1 + 3839 .p2align 2,,3 + 3840 .weak HAL_TIMEx_CommutHalfCpltCallback + 3841 .syntax unified + 3842 .thumb + 3843 .thumb_func + 3844 .fpu fpv4-sp-d16 + 3846 HAL_TIMEx_CommutHalfCpltCallback: + 3847 @ args = 0, pretend = 0, frame = 0 + 3848 @ frame_needed = 0, uses_anonymous_args = 0 + 3849 @ link register save eliminated. + 3850 0000 7047 bx lr + 3852 0002 00BF .section .text.TIMEx_DMACommutationHalfCplt,"ax",%progbits + 3853 .align 1 + 3854 .p2align 2,,3 + 3855 .global TIMEx_DMACommutationHalfCplt + 3856 .syntax unified + 3857 .thumb + 3858 .thumb_func + 3859 .fpu fpv4-sp-d16 + 3861 TIMEx_DMACommutationHalfCplt: + 3862 @ args = 0, pretend = 0, frame = 0 + 3863 @ frame_needed = 0, uses_anonymous_args = 0 + 3864 0000 08B5 push {r3, lr} + 3865 0002 806A ldr r0, [r0, #40] + 3866 0004 0123 movs r3, #1 + 3867 0006 80F83D30 strb r3, [r0, #61] + 3868 000a FFF7FEFF bl HAL_TIMEx_CommutHalfCpltCallback + 3869 000e 08BD pop {r3, pc} + 3871 .section .text.HAL_TIMEx_BreakCallback,"ax",%progbits + 3872 .align 1 + 3873 .p2align 2,,3 + 3874 .weak HAL_TIMEx_BreakCallback + 3875 .syntax unified + 3876 .thumb + 3877 .thumb_func + 3878 .fpu fpv4-sp-d16 + 3880 HAL_TIMEx_BreakCallback: + 3881 @ args = 0, pretend = 0, frame = 0 + 3882 @ frame_needed = 0, uses_anonymous_args = 0 + 3883 @ link register save eliminated. + ARM GAS /tmp/ccY6LI9P.s page 67 + + + 3884 0000 7047 bx lr + 3886 0002 00BF .section .text.HAL_TIMEx_Break2Callback,"ax",%progbits + 3887 .align 1 + 3888 .p2align 2,,3 + 3889 .weak HAL_TIMEx_Break2Callback + 3890 .syntax unified + 3891 .thumb + 3892 .thumb_func + 3893 .fpu fpv4-sp-d16 + 3895 HAL_TIMEx_Break2Callback: + 3896 @ args = 0, pretend = 0, frame = 0 + 3897 @ frame_needed = 0, uses_anonymous_args = 0 + 3898 @ link register save eliminated. + 3899 0000 7047 bx lr + 3901 0002 00BF .section .text.HAL_TIMEx_EncoderIndexCallback,"ax",%progbits + 3902 .align 1 + 3903 .p2align 2,,3 + 3904 .weak HAL_TIMEx_EncoderIndexCallback + 3905 .syntax unified + 3906 .thumb + 3907 .thumb_func + 3908 .fpu fpv4-sp-d16 + 3910 HAL_TIMEx_EncoderIndexCallback: + 3911 @ args = 0, pretend = 0, frame = 0 + 3912 @ frame_needed = 0, uses_anonymous_args = 0 + 3913 @ link register save eliminated. + 3914 0000 7047 bx lr + 3916 0002 00BF .section .text.HAL_TIMEx_DirectionChangeCallback,"ax",%progbits + 3917 .align 1 + 3918 .p2align 2,,3 + 3919 .weak HAL_TIMEx_DirectionChangeCallback + 3920 .syntax unified + 3921 .thumb + 3922 .thumb_func + 3923 .fpu fpv4-sp-d16 + 3925 HAL_TIMEx_DirectionChangeCallback: + 3926 @ args = 0, pretend = 0, frame = 0 + 3927 @ frame_needed = 0, uses_anonymous_args = 0 + 3928 @ link register save eliminated. + 3929 0000 7047 bx lr + 3931 0002 00BF .section .text.HAL_TIMEx_IndexErrorCallback,"ax",%progbits + 3932 .align 1 + 3933 .p2align 2,,3 + 3934 .weak HAL_TIMEx_IndexErrorCallback + 3935 .syntax unified + 3936 .thumb + 3937 .thumb_func + 3938 .fpu fpv4-sp-d16 + 3940 HAL_TIMEx_IndexErrorCallback: + 3941 @ args = 0, pretend = 0, frame = 0 + 3942 @ frame_needed = 0, uses_anonymous_args = 0 + 3943 @ link register save eliminated. + 3944 0000 7047 bx lr + 3946 0002 00BF .section .text.HAL_TIMEx_TransitionErrorCallback,"ax",%progbits + 3947 .align 1 + 3948 .p2align 2,,3 + 3949 .weak HAL_TIMEx_TransitionErrorCallback + ARM GAS /tmp/ccY6LI9P.s page 68 + + + 3950 .syntax unified + 3951 .thumb + 3952 .thumb_func + 3953 .fpu fpv4-sp-d16 + 3955 HAL_TIMEx_TransitionErrorCallback: + 3956 @ args = 0, pretend = 0, frame = 0 + 3957 @ frame_needed = 0, uses_anonymous_args = 0 + 3958 @ link register save eliminated. + 3959 0000 7047 bx lr + 3961 0002 00BF .section .text.HAL_TIMEx_HallSensor_GetState,"ax",%progbits + 3962 .align 1 + 3963 .p2align 2,,3 + 3964 .global HAL_TIMEx_HallSensor_GetState + 3965 .syntax unified + 3966 .thumb + 3967 .thumb_func + 3968 .fpu fpv4-sp-d16 + 3970 HAL_TIMEx_HallSensor_GetState: + 3971 @ args = 0, pretend = 0, frame = 0 + 3972 @ frame_needed = 0, uses_anonymous_args = 0 + 3973 @ link register save eliminated. + 3974 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2 + 3975 0004 7047 bx lr + 3977 0006 00BF .section .text.HAL_TIMEx_GetChannelNState,"ax",%progbits + 3978 .align 1 + 3979 .p2align 2,,3 + 3980 .global HAL_TIMEx_GetChannelNState + 3981 .syntax unified + 3982 .thumb + 3983 .thumb_func + 3984 .fpu fpv4-sp-d16 + 3986 HAL_TIMEx_GetChannelNState: + 3987 @ args = 0, pretend = 0, frame = 0 + 3988 @ frame_needed = 0, uses_anonymous_args = 0 + 3989 @ link register save eliminated. + 3990 0000 19B9 cbnz r1, .L673 + 3991 0002 90F84400 ldrb r0, [r0, #68] @ zero_extendqisi2 + 3992 0006 C0B2 uxtb r0, r0 + 3993 0008 7047 bx lr + 3994 .L673: + 3995 000a 0429 cmp r1, #4 + 3996 000c 07D0 beq .L677 + 3997 000e 0829 cmp r1, #8 + 3998 0010 0CBF ite eq + 3999 0012 90F84600 ldrbeq r0, [r0, #70] @ zero_extendqisi2 + 4000 0016 90F84700 ldrbne r0, [r0, #71] @ zero_extendqisi2 + 4001 001a C0B2 uxtb r0, r0 + 4002 001c 7047 bx lr + 4003 .L677: + 4004 001e 90F84500 ldrb r0, [r0, #69] @ zero_extendqisi2 + 4005 0022 C0B2 uxtb r0, r0 + 4006 0024 7047 bx lr + 4008 0026 00BF .section .rodata.CSWTCH.112,"a" + 4009 .align 2 + 4010 .set .LANCHOR0,. + 0 + 4013 CSWTCH.112: + 4014 0000 01000000 .word 1 + ARM GAS /tmp/ccY6LI9P.s page 69 + + + 4015 0004 02000000 .word 2 + 4016 0008 00000000 .word 0 + 4017 000c 04000000 .word 4 + 4018 0010 00000000 .word 0 + 4019 0014 00000000 .word 0 + 4020 0018 00000000 .word 0 + 4021 001c 08000000 .word 8 + 4022 0020 00000000 .word 0 + 4023 0024 00000000 .word 0 + 4024 0028 00000000 .word 0 + 4025 002c 00000000 .word 0 + 4026 0030 00000000 .word 0 + 4027 0034 00000000 .word 0 + 4028 0038 00000000 .word 0 + 4029 003c 10000000 .word 16 + 4030 .section .rodata.CSWTCH.113,"a" + 4031 .align 2 + 4032 .set .LANCHOR1,. + 0 + 4035 CSWTCH.113: + 4036 0000 00020000 .word 512 + 4037 0004 00040000 .word 1024 + 4038 0008 00000000 .word 0 + 4039 000c 00080000 .word 2048 + 4040 0010 00000000 .word 0 + 4041 0014 00000000 .word 0 + 4042 0018 00000000 .word 0 + 4043 001c 00100000 .word 4096 + 4044 0020 00000000 .word 0 + 4045 0024 00000000 .word 0 + 4046 0028 00000000 .word 0 + 4047 002c 00000000 .word 0 + 4048 0030 00000000 .word 0 + 4049 0034 00000000 .word 0 + 4050 0038 00000000 .word 0 + 4051 003c 00200000 .word 8192 + 4052 .section .rodata.CSWTCH.114,"a" + 4053 .align 2 + 4054 .set .LANCHOR2,. + 0 + 4057 CSWTCH.114: + 4058 0000 00000000 .word 0 + 4059 0004 01000000 .word 1 + 4060 0008 00000000 .word 0 + 4061 000c 02000000 .word 2 + 4062 0010 00000000 .word 0 + 4063 0014 00000000 .word 0 + 4064 0018 00000000 .word 0 + 4065 001c 03000000 .word 3 + 4066 0020 00000000 .word 0 + 4067 0024 00000000 .word 0 + 4068 0028 00000000 .word 0 + 4069 002c 00000000 .word 0 + 4070 0030 00000000 .word 0 + 4071 0034 00000000 .word 0 + 4072 0038 00000000 .word 0 + 4073 003c 04000000 .word 4 + 4074 .section .rodata.CSWTCH.115,"a" + 4075 .align 2 + ARM GAS /tmp/ccY6LI9P.s page 70 + + + 4076 .set .LANCHOR3,. + 0 + 4079 CSWTCH.115: + 4080 0000 09000000 .word 9 + 4081 0004 0A000000 .word 10 + 4082 0008 00000000 .word 0 + 4083 000c 0B000000 .word 11 + 4084 0010 00000000 .word 0 + 4085 0014 00000000 .word 0 + 4086 0018 00000000 .word 0 + 4087 001c 0C000000 .word 12 + 4088 0020 00000000 .word 0 + 4089 0024 00000000 .word 0 + 4090 0028 00000000 .word 0 + 4091 002c 00000000 .word 0 + 4092 0030 00000000 .word 0 + 4093 0034 00000000 .word 0 + 4094 0038 00000000 .word 0 + 4095 003c 0D000000 .word 13 + 4096 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccY6LI9P.s page 71 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_hal_tim_ex.c + /tmp/ccY6LI9P.s:16 .text.TIM_DMAErrorCCxN:0000000000000000 $t + /tmp/ccY6LI9P.s:24 .text.TIM_DMAErrorCCxN:0000000000000000 TIM_DMAErrorCCxN + /tmp/ccY6LI9P.s:74 .text.TIM_DMADelayPulseNCplt:0000000000000000 $t + /tmp/ccY6LI9P.s:81 .text.TIM_DMADelayPulseNCplt:0000000000000000 TIM_DMADelayPulseNCplt + /tmp/ccY6LI9P.s:149 .text.HAL_TIMEx_HallSensor_MspInit:0000000000000000 $t + /tmp/ccY6LI9P.s:157 .text.HAL_TIMEx_HallSensor_MspInit:0000000000000000 HAL_TIMEx_HallSensor_MspInit + /tmp/ccY6LI9P.s:164 .text.HAL_TIMEx_HallSensor_Init:0000000000000000 $t + /tmp/ccY6LI9P.s:172 .text.HAL_TIMEx_HallSensor_Init:0000000000000000 HAL_TIMEx_HallSensor_Init + /tmp/ccY6LI9P.s:259 .text.HAL_TIMEx_HallSensor_MspDeInit:0000000000000000 $t + /tmp/ccY6LI9P.s:267 .text.HAL_TIMEx_HallSensor_MspDeInit:0000000000000000 HAL_TIMEx_HallSensor_MspDeInit + /tmp/ccY6LI9P.s:274 .text.HAL_TIMEx_HallSensor_DeInit:0000000000000000 $t + /tmp/ccY6LI9P.s:282 .text.HAL_TIMEx_HallSensor_DeInit:0000000000000000 HAL_TIMEx_HallSensor_DeInit + /tmp/ccY6LI9P.s:315 .text.HAL_TIMEx_HallSensor_Start:0000000000000000 $t + /tmp/ccY6LI9P.s:323 .text.HAL_TIMEx_HallSensor_Start:0000000000000000 HAL_TIMEx_HallSensor_Start + /tmp/ccY6LI9P.s:396 .text.HAL_TIMEx_HallSensor_Start:00000000000000a0 $d + /tmp/ccY6LI9P.s:400 .text.HAL_TIMEx_HallSensor_Stop:0000000000000000 $t + /tmp/ccY6LI9P.s:408 .text.HAL_TIMEx_HallSensor_Stop:0000000000000000 HAL_TIMEx_HallSensor_Stop + /tmp/ccY6LI9P.s:439 .text.HAL_TIMEx_HallSensor_Start_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:447 .text.HAL_TIMEx_HallSensor_Start_IT:0000000000000000 HAL_TIMEx_HallSensor_Start_IT + /tmp/ccY6LI9P.s:523 .text.HAL_TIMEx_HallSensor_Start_IT:00000000000000a8 $d + /tmp/ccY6LI9P.s:527 .text.HAL_TIMEx_HallSensor_Stop_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:535 .text.HAL_TIMEx_HallSensor_Stop_IT:0000000000000000 HAL_TIMEx_HallSensor_Stop_IT + /tmp/ccY6LI9P.s:569 .text.HAL_TIMEx_HallSensor_Start_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:577 .text.HAL_TIMEx_HallSensor_Start_DMA:0000000000000000 HAL_TIMEx_HallSensor_Start_DMA + /tmp/ccY6LI9P.s:667 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000000000c0 $d + /tmp/ccY6LI9P.s:675 .text.HAL_TIMEx_HallSensor_Stop_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:683 .text.HAL_TIMEx_HallSensor_Stop_DMA:0000000000000000 HAL_TIMEx_HallSensor_Stop_DMA + /tmp/ccY6LI9P.s:718 .text.HAL_TIMEx_OCN_Start:0000000000000000 $t + /tmp/ccY6LI9P.s:726 .text.HAL_TIMEx_OCN_Start:0000000000000000 HAL_TIMEx_OCN_Start + /tmp/ccY6LI9P.s:817 .text.HAL_TIMEx_OCN_Start:00000000000000bc $d + /tmp/ccY6LI9P.s:822 .text.HAL_TIMEx_OCN_Stop:0000000000000000 $t + /tmp/ccY6LI9P.s:830 .text.HAL_TIMEx_OCN_Stop:0000000000000000 HAL_TIMEx_OCN_Stop + /tmp/ccY6LI9P.s:895 .text.HAL_TIMEx_OCN_Start_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:903 .text.HAL_TIMEx_OCN_Start_IT:0000000000000000 HAL_TIMEx_OCN_Start_IT + /tmp/ccY6LI9P.s:990 .text.HAL_TIMEx_OCN_Start_IT:00000000000000b8 $d + /tmp/ccY6LI9P.s:999 .text.HAL_TIMEx_OCN_Start_IT:00000000000000dc $t + /tmp/ccY6LI9P.s:1038 .text.HAL_TIMEx_OCN_Start_IT:0000000000000120 $d + /tmp/ccY6LI9P.s:1043 .text.HAL_TIMEx_OCN_Stop_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:1051 .text.HAL_TIMEx_OCN_Stop_IT:0000000000000000 HAL_TIMEx_OCN_Stop_IT + /tmp/ccY6LI9P.s:1059 .text.HAL_TIMEx_OCN_Stop_IT:0000000000000008 $d + /tmp/ccY6LI9P.s:1164 .text.HAL_TIMEx_OCN_Start_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:1172 .text.HAL_TIMEx_OCN_Start_DMA:0000000000000000 HAL_TIMEx_OCN_Start_DMA + /tmp/ccY6LI9P.s:1308 .text.HAL_TIMEx_OCN_Start_DMA:0000000000000124 $d + /tmp/ccY6LI9P.s:1321 .text.HAL_TIMEx_OCN_Start_DMA:0000000000000158 $t + /tmp/ccY6LI9P.s:1412 .text.HAL_TIMEx_OCN_Start_DMA:0000000000000210 $d + /tmp/ccY6LI9P.s:1420 .text.HAL_TIMEx_OCN_Stop_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:1428 .text.HAL_TIMEx_OCN_Stop_DMA:0000000000000000 HAL_TIMEx_OCN_Stop_DMA + /tmp/ccY6LI9P.s:1438 .text.HAL_TIMEx_OCN_Stop_DMA:000000000000000e $d + /tmp/ccY6LI9P.s:1540 .text.HAL_TIMEx_PWMN_Start:0000000000000000 $t + /tmp/ccY6LI9P.s:1548 .text.HAL_TIMEx_PWMN_Start:0000000000000000 HAL_TIMEx_PWMN_Start + /tmp/ccY6LI9P.s:1638 .text.HAL_TIMEx_PWMN_Start:00000000000000bc $d + /tmp/ccY6LI9P.s:1643 .text.HAL_TIMEx_PWMN_Stop:0000000000000000 $t + /tmp/ccY6LI9P.s:1651 .text.HAL_TIMEx_PWMN_Stop:0000000000000000 HAL_TIMEx_PWMN_Stop + /tmp/ccY6LI9P.s:1716 .text.HAL_TIMEx_PWMN_Start_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:1724 .text.HAL_TIMEx_PWMN_Start_IT:0000000000000000 HAL_TIMEx_PWMN_Start_IT + ARM GAS /tmp/ccY6LI9P.s page 72 + + + /tmp/ccY6LI9P.s:1811 .text.HAL_TIMEx_PWMN_Start_IT:00000000000000b8 $d + /tmp/ccY6LI9P.s:1820 .text.HAL_TIMEx_PWMN_Start_IT:00000000000000dc $t + /tmp/ccY6LI9P.s:1859 .text.HAL_TIMEx_PWMN_Start_IT:0000000000000120 $d + /tmp/ccY6LI9P.s:1864 .text.HAL_TIMEx_PWMN_Stop_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:1872 .text.HAL_TIMEx_PWMN_Stop_IT:0000000000000000 HAL_TIMEx_PWMN_Stop_IT + /tmp/ccY6LI9P.s:1880 .text.HAL_TIMEx_PWMN_Stop_IT:0000000000000008 $d + /tmp/ccY6LI9P.s:1985 .text.HAL_TIMEx_PWMN_Start_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:1993 .text.HAL_TIMEx_PWMN_Start_DMA:0000000000000000 HAL_TIMEx_PWMN_Start_DMA + /tmp/ccY6LI9P.s:2129 .text.HAL_TIMEx_PWMN_Start_DMA:0000000000000124 $d + /tmp/ccY6LI9P.s:2142 .text.HAL_TIMEx_PWMN_Start_DMA:0000000000000158 $t + /tmp/ccY6LI9P.s:2233 .text.HAL_TIMEx_PWMN_Start_DMA:0000000000000210 $d + /tmp/ccY6LI9P.s:2241 .text.HAL_TIMEx_PWMN_Stop_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:2249 .text.HAL_TIMEx_PWMN_Stop_DMA:0000000000000000 HAL_TIMEx_PWMN_Stop_DMA + /tmp/ccY6LI9P.s:2259 .text.HAL_TIMEx_PWMN_Stop_DMA:000000000000000e $d + /tmp/ccY6LI9P.s:2361 .text.HAL_TIMEx_OnePulseN_Start:0000000000000000 $t + /tmp/ccY6LI9P.s:2369 .text.HAL_TIMEx_OnePulseN_Start:0000000000000000 HAL_TIMEx_OnePulseN_Start + /tmp/ccY6LI9P.s:2427 .text.HAL_TIMEx_OnePulseN_Stop:0000000000000000 $t + /tmp/ccY6LI9P.s:2435 .text.HAL_TIMEx_OnePulseN_Stop:0000000000000000 HAL_TIMEx_OnePulseN_Stop + /tmp/ccY6LI9P.s:2491 .text.HAL_TIMEx_OnePulseN_Start_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:2499 .text.HAL_TIMEx_OnePulseN_Start_IT:0000000000000000 HAL_TIMEx_OnePulseN_Start_IT + /tmp/ccY6LI9P.s:2563 .text.HAL_TIMEx_OnePulseN_Stop_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:2571 .text.HAL_TIMEx_OnePulseN_Stop_IT:0000000000000000 HAL_TIMEx_OnePulseN_Stop_IT + /tmp/ccY6LI9P.s:2633 .text.HAL_TIMEx_ConfigCommutEvent:0000000000000000 $t + /tmp/ccY6LI9P.s:2641 .text.HAL_TIMEx_ConfigCommutEvent:0000000000000000 HAL_TIMEx_ConfigCommutEvent + /tmp/ccY6LI9P.s:2702 .text.HAL_TIMEx_ConfigCommutEvent:0000000000000088 $d + /tmp/ccY6LI9P.s:2705 .text.HAL_TIMEx_ConfigCommutEvent_IT:0000000000000000 $t + /tmp/ccY6LI9P.s:2713 .text.HAL_TIMEx_ConfigCommutEvent_IT:0000000000000000 HAL_TIMEx_ConfigCommutEvent_IT + /tmp/ccY6LI9P.s:2774 .text.HAL_TIMEx_ConfigCommutEvent_IT:0000000000000088 $d + /tmp/ccY6LI9P.s:2777 .text.HAL_TIMEx_ConfigCommutEvent_DMA:0000000000000000 $t + /tmp/ccY6LI9P.s:2785 .text.HAL_TIMEx_ConfigCommutEvent_DMA:0000000000000000 HAL_TIMEx_ConfigCommutEvent_DMA + /tmp/ccY6LI9P.s:2853 .text.HAL_TIMEx_ConfigCommutEvent_DMA:0000000000000090 $d + /tmp/ccY6LI9P.s:3827 .text.TIMEx_DMACommutationCplt:0000000000000000 TIMEx_DMACommutationCplt + /tmp/ccY6LI9P.s:3861 .text.TIMEx_DMACommutationHalfCplt:0000000000000000 TIMEx_DMACommutationHalfCplt + /tmp/ccY6LI9P.s:2859 .text.HAL_TIMEx_MasterConfigSynchronization:0000000000000000 $t + /tmp/ccY6LI9P.s:2867 .text.HAL_TIMEx_MasterConfigSynchronization:0000000000000000 HAL_TIMEx_MasterConfigSynchronization + /tmp/ccY6LI9P.s:2933 .text.HAL_TIMEx_MasterConfigSynchronization:000000000000008c $d + /tmp/ccY6LI9P.s:2937 .text.HAL_TIMEx_ConfigBreakDeadTime:0000000000000000 $t + /tmp/ccY6LI9P.s:2945 .text.HAL_TIMEx_ConfigBreakDeadTime:0000000000000000 HAL_TIMEx_ConfigBreakDeadTime + /tmp/ccY6LI9P.s:3012 .text.HAL_TIMEx_ConfigBreakDeadTime:0000000000000098 $d + /tmp/ccY6LI9P.s:3015 .text.HAL_TIMEx_ConfigBreakInput:0000000000000000 $t + /tmp/ccY6LI9P.s:3023 .text.HAL_TIMEx_ConfigBreakInput:0000000000000000 HAL_TIMEx_ConfigBreakInput + /tmp/ccY6LI9P.s:3108 .text.HAL_TIMEx_ConfigBreakInput:00000000000000a8 $d + /tmp/ccY6LI9P.s:3114 .text.HAL_TIMEx_RemapConfig:0000000000000000 $t + /tmp/ccY6LI9P.s:3122 .text.HAL_TIMEx_RemapConfig:0000000000000000 HAL_TIMEx_RemapConfig + /tmp/ccY6LI9P.s:3144 .text.HAL_TIMEx_TISelection:0000000000000000 $t + /tmp/ccY6LI9P.s:3152 .text.HAL_TIMEx_TISelection:0000000000000000 HAL_TIMEx_TISelection + /tmp/ccY6LI9P.s:3166 .text.HAL_TIMEx_TISelection:0000000000000018 $d + /tmp/ccY6LI9P.s:3241 .text.HAL_TIMEx_TISelection:000000000000009c $d + /tmp/ccY6LI9P.s:3245 .text.HAL_TIMEx_GroupChannel5:0000000000000000 $t + /tmp/ccY6LI9P.s:3253 .text.HAL_TIMEx_GroupChannel5:0000000000000000 HAL_TIMEx_GroupChannel5 + /tmp/ccY6LI9P.s:3281 .text.HAL_TIMEx_DisarmBreakInput:0000000000000000 $t + /tmp/ccY6LI9P.s:3289 .text.HAL_TIMEx_DisarmBreakInput:0000000000000000 HAL_TIMEx_DisarmBreakInput + /tmp/ccY6LI9P.s:3330 .text.HAL_TIMEx_DisarmBreakInput:0000000000000044 $d + /tmp/ccY6LI9P.s:3334 .text.HAL_TIMEx_ReArmBreakInput:0000000000000000 $t + /tmp/ccY6LI9P.s:3342 .text.HAL_TIMEx_ReArmBreakInput:0000000000000000 HAL_TIMEx_ReArmBreakInput + /tmp/ccY6LI9P.s:3403 .text.HAL_TIMEx_DitheringEnable:0000000000000000 $t + /tmp/ccY6LI9P.s:3411 .text.HAL_TIMEx_DitheringEnable:0000000000000000 HAL_TIMEx_DitheringEnable + ARM GAS /tmp/ccY6LI9P.s page 73 + + + /tmp/ccY6LI9P.s:3424 .text.HAL_TIMEx_DitheringDisable:0000000000000000 $t + /tmp/ccY6LI9P.s:3432 .text.HAL_TIMEx_DitheringDisable:0000000000000000 HAL_TIMEx_DitheringDisable + /tmp/ccY6LI9P.s:3445 .text.HAL_TIMEx_OC_ConfigPulseOnCompare:0000000000000000 $t + /tmp/ccY6LI9P.s:3453 .text.HAL_TIMEx_OC_ConfigPulseOnCompare:0000000000000000 HAL_TIMEx_OC_ConfigPulseOnCompare + /tmp/ccY6LI9P.s:3484 .text.HAL_TIMEx_ConfigSlaveModePreload:0000000000000000 $t + /tmp/ccY6LI9P.s:3492 .text.HAL_TIMEx_ConfigSlaveModePreload:0000000000000000 HAL_TIMEx_ConfigSlaveModePreload + /tmp/ccY6LI9P.s:3505 .text.HAL_TIMEx_EnableSlaveModePreload:0000000000000000 $t + /tmp/ccY6LI9P.s:3513 .text.HAL_TIMEx_EnableSlaveModePreload:0000000000000000 HAL_TIMEx_EnableSlaveModePreload + /tmp/ccY6LI9P.s:3526 .text.HAL_TIMEx_DisableSlaveModePreload:0000000000000000 $t + /tmp/ccY6LI9P.s:3534 .text.HAL_TIMEx_DisableSlaveModePreload:0000000000000000 HAL_TIMEx_DisableSlaveModePreload + /tmp/ccY6LI9P.s:3547 .text.HAL_TIMEx_EnableDeadTimePreload:0000000000000000 $t + /tmp/ccY6LI9P.s:3555 .text.HAL_TIMEx_EnableDeadTimePreload:0000000000000000 HAL_TIMEx_EnableDeadTimePreload + /tmp/ccY6LI9P.s:3568 .text.HAL_TIMEx_DisableDeadTimePreload:0000000000000000 $t + /tmp/ccY6LI9P.s:3576 .text.HAL_TIMEx_DisableDeadTimePreload:0000000000000000 HAL_TIMEx_DisableDeadTimePreload + /tmp/ccY6LI9P.s:3589 .text.HAL_TIMEx_ConfigDeadTime:0000000000000000 $t + /tmp/ccY6LI9P.s:3597 .text.HAL_TIMEx_ConfigDeadTime:0000000000000000 HAL_TIMEx_ConfigDeadTime + /tmp/ccY6LI9P.s:3610 .text.HAL_TIMEx_ConfigAsymmetricalDeadTime:0000000000000000 $t + /tmp/ccY6LI9P.s:3618 .text.HAL_TIMEx_ConfigAsymmetricalDeadTime:0000000000000000 HAL_TIMEx_ConfigAsymmetricalDeadTime + /tmp/ccY6LI9P.s:3631 .text.HAL_TIMEx_EnableAsymmetricalDeadTime:0000000000000000 $t + /tmp/ccY6LI9P.s:3639 .text.HAL_TIMEx_EnableAsymmetricalDeadTime:0000000000000000 HAL_TIMEx_EnableAsymmetricalDeadTime + /tmp/ccY6LI9P.s:3652 .text.HAL_TIMEx_DisableAsymmetricalDeadTime:0000000000000000 $t + /tmp/ccY6LI9P.s:3660 .text.HAL_TIMEx_DisableAsymmetricalDeadTime:0000000000000000 HAL_TIMEx_DisableAsymmetricalDeadTime + /tmp/ccY6LI9P.s:3673 .text.HAL_TIMEx_ConfigEncoderIndex:0000000000000000 $t + /tmp/ccY6LI9P.s:3681 .text.HAL_TIMEx_ConfigEncoderIndex:0000000000000000 HAL_TIMEx_ConfigEncoderIndex + /tmp/ccY6LI9P.s:3720 .text.HAL_TIMEx_EnableEncoderIndex:0000000000000000 $t + /tmp/ccY6LI9P.s:3728 .text.HAL_TIMEx_EnableEncoderIndex:0000000000000000 HAL_TIMEx_EnableEncoderIndex + /tmp/ccY6LI9P.s:3741 .text.HAL_TIMEx_DisableEncoderIndex:0000000000000000 $t + /tmp/ccY6LI9P.s:3749 .text.HAL_TIMEx_DisableEncoderIndex:0000000000000000 HAL_TIMEx_DisableEncoderIndex + /tmp/ccY6LI9P.s:3762 .text.HAL_TIMEx_EnableEncoderFirstIndex:0000000000000000 $t + /tmp/ccY6LI9P.s:3770 .text.HAL_TIMEx_EnableEncoderFirstIndex:0000000000000000 HAL_TIMEx_EnableEncoderFirstIndex + /tmp/ccY6LI9P.s:3783 .text.HAL_TIMEx_DisableEncoderFirstIndex:0000000000000000 $t + /tmp/ccY6LI9P.s:3791 .text.HAL_TIMEx_DisableEncoderFirstIndex:0000000000000000 HAL_TIMEx_DisableEncoderFirstIndex + /tmp/ccY6LI9P.s:3804 .text.HAL_TIMEx_CommutCallback:0000000000000000 $t + /tmp/ccY6LI9P.s:3812 .text.HAL_TIMEx_CommutCallback:0000000000000000 HAL_TIMEx_CommutCallback + /tmp/ccY6LI9P.s:3819 .text.TIMEx_DMACommutationCplt:0000000000000000 $t + /tmp/ccY6LI9P.s:3838 .text.HAL_TIMEx_CommutHalfCpltCallback:0000000000000000 $t + /tmp/ccY6LI9P.s:3846 .text.HAL_TIMEx_CommutHalfCpltCallback:0000000000000000 HAL_TIMEx_CommutHalfCpltCallback + /tmp/ccY6LI9P.s:3853 .text.TIMEx_DMACommutationHalfCplt:0000000000000000 $t + /tmp/ccY6LI9P.s:3872 .text.HAL_TIMEx_BreakCallback:0000000000000000 $t + /tmp/ccY6LI9P.s:3880 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z-UeA7VN{;Shratyp7yepyzeu;nK#4Lq*ELBR_G?*vLMEybcVi0^2@(C_Xwbw07pZ3Y+lv0)X#ZI+6|* Q`m4>#`!}x3*&Mw80H40H2LJ#7 literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_it.d b/codice/build/stm32g4xx_it.d new file mode 100644 index 0000000..42c6ee3 --- /dev/null +++ b/codice/build/stm32g4xx_it.d @@ -0,0 +1,86 @@ +build/stm32g4xx_it.o: Core/Src/stm32g4xx_it.c Core/Inc/main.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h \ + Core/Inc/stm32g4xx_it.h +Core/Inc/main.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: +Core/Inc/stm32g4xx_it.h: diff --git a/codice/build/stm32g4xx_it.lst b/codice/build/stm32g4xx_it.lst new file mode 100644 index 0000000..73555a6 --- /dev/null +++ b/codice/build/stm32g4xx_it.lst @@ -0,0 +1,347 @@ +ARM GAS /tmp/ccROtrd2.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_it.c" + 14 .text + 15 .section .text.NMI_Handler,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global NMI_Handler + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 NMI_Handler: + 26 @ Volatile: function does not return. + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 @ link register save eliminated. + 30 .L2: + 31 0000 FEE7 b .L2 + 33 0002 00BF .section .text.HardFault_Handler,"ax",%progbits + 34 .align 1 + 35 .p2align 2,,3 + 36 .global HardFault_Handler + 37 .syntax unified + 38 .thumb + 39 .thumb_func + 40 .fpu fpv4-sp-d16 + 42 HardFault_Handler: + 43 @ Volatile: function does not return. + 44 @ args = 0, pretend = 0, frame = 0 + 45 @ frame_needed = 0, uses_anonymous_args = 0 + 46 @ link register save eliminated. + 47 .L5: + 48 0000 FEE7 b .L5 + 50 0002 00BF .section .text.MemManage_Handler,"ax",%progbits + 51 .align 1 + 52 .p2align 2,,3 + 53 .global MemManage_Handler + 54 .syntax unified + 55 .thumb + 56 .thumb_func + 57 .fpu fpv4-sp-d16 + 59 MemManage_Handler: + 60 @ Volatile: function does not return. + 61 @ args = 0, pretend = 0, frame = 0 + 62 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccROtrd2.s page 2 + + + 63 @ link register save eliminated. + 64 .L7: + 65 0000 FEE7 b .L7 + 67 0002 00BF .section .text.BusFault_Handler,"ax",%progbits + 68 .align 1 + 69 .p2align 2,,3 + 70 .global BusFault_Handler + 71 .syntax unified + 72 .thumb + 73 .thumb_func + 74 .fpu fpv4-sp-d16 + 76 BusFault_Handler: + 77 @ Volatile: function does not return. + 78 @ args = 0, pretend = 0, frame = 0 + 79 @ frame_needed = 0, uses_anonymous_args = 0 + 80 @ link register save eliminated. + 81 .L9: + 82 0000 FEE7 b .L9 + 84 0002 00BF .section .text.UsageFault_Handler,"ax",%progbits + 85 .align 1 + 86 .p2align 2,,3 + 87 .global UsageFault_Handler + 88 .syntax unified + 89 .thumb + 90 .thumb_func + 91 .fpu fpv4-sp-d16 + 93 UsageFault_Handler: + 94 @ Volatile: function does not return. + 95 @ args = 0, pretend = 0, frame = 0 + 96 @ frame_needed = 0, uses_anonymous_args = 0 + 97 @ link register save eliminated. + 98 .L11: + 99 0000 FEE7 b .L11 + 101 0002 00BF .section .text.SVC_Handler,"ax",%progbits + 102 .align 1 + 103 .p2align 2,,3 + 104 .global SVC_Handler + 105 .syntax unified + 106 .thumb + 107 .thumb_func + 108 .fpu fpv4-sp-d16 + 110 SVC_Handler: + 111 @ args = 0, pretend = 0, frame = 0 + 112 @ frame_needed = 0, uses_anonymous_args = 0 + 113 @ link register save eliminated. + 114 0000 7047 bx lr + 116 0002 00BF .section .text.DebugMon_Handler,"ax",%progbits + 117 .align 1 + 118 .p2align 2,,3 + 119 .global DebugMon_Handler + 120 .syntax unified + 121 .thumb + 122 .thumb_func + 123 .fpu fpv4-sp-d16 + 125 DebugMon_Handler: + 126 @ args = 0, pretend = 0, frame = 0 + 127 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccROtrd2.s page 3 + + + 128 @ link register save eliminated. + 129 0000 7047 bx lr + 131 0002 00BF .section .text.PendSV_Handler,"ax",%progbits + 132 .align 1 + 133 .p2align 2,,3 + 134 .global PendSV_Handler + 135 .syntax unified + 136 .thumb + 137 .thumb_func + 138 .fpu fpv4-sp-d16 + 140 PendSV_Handler: + 141 @ args = 0, pretend = 0, frame = 0 + 142 @ frame_needed = 0, uses_anonymous_args = 0 + 143 @ link register save eliminated. + 144 0000 7047 bx lr + 146 0002 00BF .section .text.SysTick_Handler,"ax",%progbits + 147 .align 1 + 148 .p2align 2,,3 + 149 .global SysTick_Handler + 150 .syntax unified + 151 .thumb + 152 .thumb_func + 153 .fpu fpv4-sp-d16 + 155 SysTick_Handler: + 156 @ args = 0, pretend = 0, frame = 0 + 157 @ frame_needed = 0, uses_anonymous_args = 0 + 158 @ link register save eliminated. + 159 0000 FFF7FEBF b HAL_IncTick + 161 .section .text.DMA1_Channel1_IRQHandler,"ax",%progbits + 162 .align 1 + 163 .p2align 2,,3 + 164 .global DMA1_Channel1_IRQHandler + 165 .syntax unified + 166 .thumb + 167 .thumb_func + 168 .fpu fpv4-sp-d16 + 170 DMA1_Channel1_IRQHandler: + 171 @ args = 0, pretend = 0, frame = 0 + 172 @ frame_needed = 0, uses_anonymous_args = 0 + 173 @ link register save eliminated. + 174 0000 0148 ldr r0, .L17 + 175 0002 FFF7FEBF b HAL_DMA_IRQHandler + 176 .L18: + 177 0006 00BF .align 2 + 178 .L17: + 179 0008 00000000 .word hdma_adc1 + 181 .section .text.DMA1_Channel2_IRQHandler,"ax",%progbits + 182 .align 1 + 183 .p2align 2,,3 + 184 .global DMA1_Channel2_IRQHandler + 185 .syntax unified + 186 .thumb + 187 .thumb_func + 188 .fpu fpv4-sp-d16 + 190 DMA1_Channel2_IRQHandler: + 191 @ args = 0, pretend = 0, frame = 0 + 192 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccROtrd2.s page 4 + + + 193 @ link register save eliminated. + 194 0000 0148 ldr r0, .L20 + 195 0002 FFF7FEBF b HAL_DMA_IRQHandler + 196 .L21: + 197 0006 00BF .align 2 + 198 .L20: + 199 0008 00000000 .word hdma_dac1_ch1 + 201 .section .text.DMA1_Channel4_IRQHandler,"ax",%progbits + 202 .align 1 + 203 .p2align 2,,3 + 204 .global DMA1_Channel4_IRQHandler + 205 .syntax unified + 206 .thumb + 207 .thumb_func + 208 .fpu fpv4-sp-d16 + 210 DMA1_Channel4_IRQHandler: + 211 @ args = 0, pretend = 0, frame = 0 + 212 @ frame_needed = 0, uses_anonymous_args = 0 + 213 @ link register save eliminated. + 214 0000 0148 ldr r0, .L23 + 215 0002 FFF7FEBF b HAL_DMA_IRQHandler + 216 .L24: + 217 0006 00BF .align 2 + 218 .L23: + 219 0008 00000000 .word hdma_dac1_ch2 + 221 .section .text.DMA1_Channel5_IRQHandler,"ax",%progbits + 222 .align 1 + 223 .p2align 2,,3 + 224 .global DMA1_Channel5_IRQHandler + 225 .syntax unified + 226 .thumb + 227 .thumb_func + 228 .fpu fpv4-sp-d16 + 230 DMA1_Channel5_IRQHandler: + 231 @ args = 0, pretend = 0, frame = 0 + 232 @ frame_needed = 0, uses_anonymous_args = 0 + 233 @ link register save eliminated. + 234 0000 0148 ldr r0, .L26 + 235 0002 FFF7FEBF b HAL_DMA_IRQHandler + 236 .L27: + 237 0006 00BF .align 2 + 238 .L26: + 239 0008 00000000 .word hdma_usart1_tx + 241 .section .text.ADC1_2_IRQHandler,"ax",%progbits + 242 .align 1 + 243 .p2align 2,,3 + 244 .global ADC1_2_IRQHandler + 245 .syntax unified + 246 .thumb + 247 .thumb_func + 248 .fpu fpv4-sp-d16 + 250 ADC1_2_IRQHandler: + 251 @ args = 0, pretend = 0, frame = 0 + 252 @ frame_needed = 0, uses_anonymous_args = 0 + 253 0000 08B5 push {r3, lr} + 254 0002 0448 ldr r0, .L30 + 255 0004 FFF7FEFF bl HAL_ADC_IRQHandler + ARM GAS /tmp/ccROtrd2.s page 5 + + + 256 0008 BDE80840 pop {r3, lr} + 257 000c 0248 ldr r0, .L30+4 + 258 000e FFF7FEBF b HAL_ADC_IRQHandler + 259 .L31: + 260 0012 00BF .align 2 + 261 .L30: + 262 0014 00000000 .word hadc1 + 263 0018 00000000 .word hadc2 + 265 .section .text.USART1_IRQHandler,"ax",%progbits + 266 .align 1 + 267 .p2align 2,,3 + 268 .global USART1_IRQHandler + 269 .syntax unified + 270 .thumb + 271 .thumb_func + 272 .fpu fpv4-sp-d16 + 274 USART1_IRQHandler: + 275 @ args = 0, pretend = 0, frame = 0 + 276 @ frame_needed = 0, uses_anonymous_args = 0 + 277 @ link register save eliminated. + 278 0000 0148 ldr r0, .L33 + 279 0002 FFF7FEBF b HAL_UART_IRQHandler + 280 .L34: + 281 0006 00BF .align 2 + 282 .L33: + 283 0008 00000000 .word huart1 + 285 .section .text.TIM7_IRQHandler,"ax",%progbits + 286 .align 1 + 287 .p2align 2,,3 + 288 .global TIM7_IRQHandler + 289 .syntax unified + 290 .thumb + 291 .thumb_func + 292 .fpu fpv4-sp-d16 + 294 TIM7_IRQHandler: + 295 @ args = 0, pretend = 0, frame = 0 + 296 @ frame_needed = 0, uses_anonymous_args = 0 + 297 @ link register save eliminated. + 298 0000 0148 ldr r0, .L36 + 299 0002 FFF7FEBF b HAL_TIM_IRQHandler + 300 .L37: + 301 0006 00BF .align 2 + 302 .L36: + 303 0008 00000000 .word htim7 + 305 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccROtrd2.s page 6 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_it.c + /tmp/ccROtrd2.s:16 .text.NMI_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:25 .text.NMI_Handler:0000000000000000 NMI_Handler + /tmp/ccROtrd2.s:34 .text.HardFault_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:42 .text.HardFault_Handler:0000000000000000 HardFault_Handler + /tmp/ccROtrd2.s:51 .text.MemManage_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:59 .text.MemManage_Handler:0000000000000000 MemManage_Handler + /tmp/ccROtrd2.s:68 .text.BusFault_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:76 .text.BusFault_Handler:0000000000000000 BusFault_Handler + /tmp/ccROtrd2.s:85 .text.UsageFault_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:93 .text.UsageFault_Handler:0000000000000000 UsageFault_Handler + /tmp/ccROtrd2.s:102 .text.SVC_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:110 .text.SVC_Handler:0000000000000000 SVC_Handler + /tmp/ccROtrd2.s:117 .text.DebugMon_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:125 .text.DebugMon_Handler:0000000000000000 DebugMon_Handler + /tmp/ccROtrd2.s:132 .text.PendSV_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:140 .text.PendSV_Handler:0000000000000000 PendSV_Handler + /tmp/ccROtrd2.s:147 .text.SysTick_Handler:0000000000000000 $t + /tmp/ccROtrd2.s:155 .text.SysTick_Handler:0000000000000000 SysTick_Handler + /tmp/ccROtrd2.s:162 .text.DMA1_Channel1_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:170 .text.DMA1_Channel1_IRQHandler:0000000000000000 DMA1_Channel1_IRQHandler + /tmp/ccROtrd2.s:179 .text.DMA1_Channel1_IRQHandler:0000000000000008 $d + /tmp/ccROtrd2.s:182 .text.DMA1_Channel2_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:190 .text.DMA1_Channel2_IRQHandler:0000000000000000 DMA1_Channel2_IRQHandler + /tmp/ccROtrd2.s:199 .text.DMA1_Channel2_IRQHandler:0000000000000008 $d + /tmp/ccROtrd2.s:202 .text.DMA1_Channel4_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:210 .text.DMA1_Channel4_IRQHandler:0000000000000000 DMA1_Channel4_IRQHandler + /tmp/ccROtrd2.s:219 .text.DMA1_Channel4_IRQHandler:0000000000000008 $d + /tmp/ccROtrd2.s:222 .text.DMA1_Channel5_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:230 .text.DMA1_Channel5_IRQHandler:0000000000000000 DMA1_Channel5_IRQHandler + /tmp/ccROtrd2.s:239 .text.DMA1_Channel5_IRQHandler:0000000000000008 $d + /tmp/ccROtrd2.s:242 .text.ADC1_2_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:250 .text.ADC1_2_IRQHandler:0000000000000000 ADC1_2_IRQHandler + /tmp/ccROtrd2.s:262 .text.ADC1_2_IRQHandler:0000000000000014 $d + /tmp/ccROtrd2.s:266 .text.USART1_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:274 .text.USART1_IRQHandler:0000000000000000 USART1_IRQHandler + /tmp/ccROtrd2.s:283 .text.USART1_IRQHandler:0000000000000008 $d + /tmp/ccROtrd2.s:286 .text.TIM7_IRQHandler:0000000000000000 $t + /tmp/ccROtrd2.s:294 .text.TIM7_IRQHandler:0000000000000000 TIM7_IRQHandler + /tmp/ccROtrd2.s:303 .text.TIM7_IRQHandler:0000000000000008 $d + +UNDEFINED SYMBOLS +HAL_IncTick +HAL_DMA_IRQHandler +hdma_adc1 +hdma_dac1_ch1 +hdma_dac1_ch2 +hdma_usart1_tx +HAL_ADC_IRQHandler +hadc1 +hadc2 +HAL_UART_IRQHandler +huart1 +HAL_TIM_IRQHandler +htim7 diff --git a/codice/build/stm32g4xx_it.o b/codice/build/stm32g4xx_it.o new file mode 100644 index 0000000000000000000000000000000000000000..6f23716cc18cd47792928b7be8d090d668d45ee1 GIT binary patch literal 3932 zcma)9O>7%Q6n<+vwv&_)j0tX<8n=o>B9WEXaT|y#WY=jDqZms5;DoidS8*VABYTZf z2?+_r--#Q?N+85JLh1zta;d}tjycl80YooIAR&-AG`zRFohZP0aEbbS2*T%e+7<3J^lN^v9?OTa7@D zq7kQG-;d@3(%AnR4=aVjVrs^?v}mOD`MFFwW9aFHx$JC;ux_L%lD?cVQZp@U&obNA zEad0W(X`CUE@-pZ9a^|HSAy^(kqC6dRJIefo z;Ez)$==}s079a=#nMNFBI0WNLB&47q3^9I)@nOb?86RPMgz-_vM;SlN_+iG6Fy2iV zAqv7M<3|PMv_Uw-_%nBpH~o$VmRm_EkzG3Fm<`Z&|anSO%l zCmg-6nqc|_(gAiO)@DR}6_xUg^D>wqLC^!nQ zD|i^*RPYFVpx{yX#KV;NG0cZAuoZr1S3eaeg&jKO!|mpg+XORhb{n{#nOTtCU1<%p}M`>SP=P|#2%f6 zfkk)!CZF^06^5T@IOk*9cOzE;=u8R}0O*7XECKE`fF#Bp{}oSc(EZ#PRktYAE;qPxp-HCtp|osuF$N z63YEOi&${j?e@2s4!2g9lXXp|%MH-I$8@;W`ug2sy43-?L#A6Bp!=5Tt`E@t#B`ej zbU$F6z6NtxsT@Vz^+{r%-fc9Ov|j&UmGj_L#Kemt=KL=V$bNUwkKV`RM`w}nJCA0v zUk$l_erHi6`<+OBLil~d{0;~BeZ~B;k{^Ag z3cnN2FO4xOM_A=E0cmIb?_vkf0$MJo{Eoj|M+E7`Swnal1BZCAr?9VMrR$DkrCbqb d3wGfI|7!h0gS{fUk0F+IOZXhW2@*Nc{THd&;Y$Dj literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_ll_adc.d b/codice/build/stm32g4xx_ll_adc.d new file mode 100644 index 0000000..d414128 --- /dev/null +++ b/codice/build/stm32g4xx_ll_adc.d @@ -0,0 +1,2 @@ +build/stm32g4xx_ll_adc.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_adc.c diff --git a/codice/build/stm32g4xx_ll_adc.lst b/codice/build/stm32g4xx_ll_adc.lst new file mode 100644 index 0000000..fc7d28f --- /dev/null +++ b/codice/build/stm32g4xx_ll_adc.lst @@ -0,0 +1,25 @@ +ARM GAS /tmp/ccxRdDYx.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_ll_adc.c" + 14 .text + 15 .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccxRdDYx.s page 2 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_ll_adc.c + +NO UNDEFINED SYMBOLS diff --git a/codice/build/stm32g4xx_ll_adc.o b/codice/build/stm32g4xx_ll_adc.o new file mode 100644 index 0000000000000000000000000000000000000000..f2eaefd60b822f84fb7ca30ebeb29400fc66b2ba GIT binary patch literal 728 zcmah`+fKqj5S;}I*2F{&#tX(&Uo44i+ETpmMhN<1U;F{Gg^iF;>HEN412xoQPIRQGCuS=y~0R_g4C9hXno zDLZ2gcFrzJSNUGD9(4pzfv@k30hG78Ctk{5BQFyb$Wl-sKY<^JN;j}n>3$;NJhH6mhzEz(6QzcVQmxqKBO^$u1lzUrSng8 kdQ?lDw!e>VqU#wjggQQ~Q;?d@cYr*vv+-h}MTlDW17x8&e*gdg literal 0 HcmV?d00001 diff --git a/codice/build/stm32g4xx_ll_usb.d b/codice/build/stm32g4xx_ll_usb.d new file mode 100644 index 0000000..40ea134 --- /dev/null +++ b/codice/build/stm32g4xx_ll_usb.d @@ -0,0 +1,84 @@ +build/stm32g4xx_ll_usb.o: \ + Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usb.c \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h \ + Core/Inc/stm32g4xx_hal_conf.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h \ + Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Include/mpu_armv7.h \ + Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h \ + Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h: +Core/Inc/stm32g4xx_hal_conf.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h: +Drivers/CMSIS/Include/core_cm4.h: +Drivers/CMSIS/Include/cmsis_version.h: +Drivers/CMSIS/Include/cmsis_compiler.h: +Drivers/CMSIS/Include/cmsis_gcc.h: +Drivers/CMSIS/Include/mpu_armv7.h: +Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h: +Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dma_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cortex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_adc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_exti.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash_ramfunc.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_i2c_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_ll_usb.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pcd_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_pwr_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_tim_ex.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h: +Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart_ex.h: diff --git a/codice/build/stm32g4xx_ll_usb.lst b/codice/build/stm32g4xx_ll_usb.lst new file mode 100644 index 0000000..e2ad054 --- /dev/null +++ b/codice/build/stm32g4xx_ll_usb.lst @@ -0,0 +1,1562 @@ +ARM GAS /tmp/ccw23tFd.s page 1 + + + 1 .cpu cortex-m4 + 2 .eabi_attribute 27, 1 + 3 .eabi_attribute 28, 1 + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 34, 1 + 12 .eabi_attribute 18, 4 + 13 .file "stm32g4xx_ll_usb.c" + 14 .text + 15 .section .text.USB_CoreInit,"ax",%progbits + 16 .align 1 + 17 .p2align 2,,3 + 18 .global USB_CoreInit + 19 .arch armv7e-m + 20 .syntax unified + 21 .thumb + 22 .thumb_func + 23 .fpu fpv4-sp-d16 + 25 USB_CoreInit: + 26 @ args = 36, pretend = 16, frame = 0 + 27 @ frame_needed = 0, uses_anonymous_args = 0 + 28 @ link register save eliminated. + 29 0000 84B0 sub sp, sp, #16 + 30 0002 01A8 add r0, sp, #4 + 31 0004 80E80E00 stm r0, {r1, r2, r3} + 32 0008 04B0 add sp, sp, #16 + 33 000a 0020 movs r0, #0 + 34 000c 7047 bx lr + 36 000e 00BF .section .text.USB_EnableGlobalInt,"ax",%progbits + 37 .align 1 + 38 .p2align 2,,3 + 39 .global USB_EnableGlobalInt + 40 .syntax unified + 41 .thumb + 42 .thumb_func + 43 .fpu fpv4-sp-d16 + 45 USB_EnableGlobalInt: + 46 @ args = 0, pretend = 0, frame = 0 + 47 @ frame_needed = 0, uses_anonymous_args = 0 + 48 @ link register save eliminated. + 49 0000 0346 mov r3, r0 + 50 0002 4BF68072 movw r2, #49024 + 51 0006 0020 movs r0, #0 + 52 0008 A3F84400 strh r0, [r3, #68] @ movhi + 53 000c A3F84020 strh r2, [r3, #64] @ movhi + 54 0010 7047 bx lr + 56 0012 00BF .section .text.USB_DisableGlobalInt,"ax",%progbits + 57 .align 1 + 58 .p2align 2,,3 + 59 .global USB_DisableGlobalInt + 60 .syntax unified + 61 .thumb + ARM GAS /tmp/ccw23tFd.s page 2 + + + 62 .thumb_func + 63 .fpu fpv4-sp-d16 + 65 USB_DisableGlobalInt: + 66 @ args = 0, pretend = 0, frame = 0 + 67 @ frame_needed = 0, uses_anonymous_args = 0 + 68 @ link register save eliminated. + 69 0000 B0F84010 ldrh r1, [r0, #64] + 70 0004 0346 mov r3, r0 + 71 0006 44F27F02 movw r2, #16511 + 72 000a 0A40 ands r2, r2, r1 + 73 000c 0020 movs r0, #0 + 74 000e A3F84020 strh r2, [r3, #64] @ movhi + 75 0012 7047 bx lr + 77 .section .text.USB_SetCurrentMode,"ax",%progbits + 78 .align 1 + 79 .p2align 2,,3 + 80 .global USB_SetCurrentMode + 81 .syntax unified + 82 .thumb + 83 .thumb_func + 84 .fpu fpv4-sp-d16 + 86 USB_SetCurrentMode: + 87 @ args = 0, pretend = 0, frame = 0 + 88 @ frame_needed = 0, uses_anonymous_args = 0 + 89 @ link register save eliminated. + 90 0000 0020 movs r0, #0 + 91 0002 7047 bx lr + 93 .section .text.USB_DevInit,"ax",%progbits + 94 .align 1 + 95 .p2align 2,,3 + 96 .global USB_DevInit + 97 .syntax unified + 98 .thumb + 99 .thumb_func + 100 .fpu fpv4-sp-d16 + 102 USB_DevInit: + 103 @ args = 36, pretend = 16, frame = 0 + 104 @ frame_needed = 0, uses_anonymous_args = 0 + 105 @ link register save eliminated. + 106 0000 84B0 sub sp, sp, #16 + 107 0002 8446 mov ip, r0 + 108 0004 01A8 add r0, sp, #4 + 109 0006 80E80E00 stm r0, {r1, r2, r3} + 110 000a 0020 movs r0, #0 + 111 000c 0123 movs r3, #1 + 112 000e ACF84030 strh r3, [ip, #64] @ movhi + 113 0012 04B0 add sp, sp, #16 + 114 0014 ACF84000 strh r0, [ip, #64] @ movhi + 115 0018 ACF84400 strh r0, [ip, #68] @ movhi + 116 001c ACF85000 strh r0, [ip, #80] @ movhi + 117 0020 7047 bx lr + 119 0022 00BF .section .text.USB_ActivateEndpoint,"ax",%progbits + 120 .align 1 + 121 .p2align 2,,3 + 122 .global USB_ActivateEndpoint + 123 .syntax unified + 124 .thumb + ARM GAS /tmp/ccw23tFd.s page 3 + + + 125 .thumb_func + 126 .fpu fpv4-sp-d16 + 128 USB_ActivateEndpoint: + 129 @ args = 0, pretend = 0, frame = 0 + 130 @ frame_needed = 0, uses_anonymous_args = 0 + 131 0000 70B5 push {r4, r5, r6, lr} + 132 0002 91F800C0 ldrb ip, [r1] @ zero_extendqisi2 + 133 0006 91F803E0 ldrb lr, [r1, #3] @ zero_extendqisi2 + 134 000a 0FFA8CF2 sxth r2, ip + 135 000e 30F82230 ldrh r3, [r0, r2, lsl #2] + 136 0012 23F4EC43 bic r3, r3, #30208 + 137 0016 23F07003 bic r3, r3, #112 + 138 001a 1B04 lsls r3, r3, #16 + 139 001c 1B0C lsrs r3, r3, #16 + 140 001e BEF1030F cmp lr, #3 + 141 0022 00F28681 bhi .L10 + 142 0026 DFE80EF0 tbb [pc, lr] + 143 .L12: + 144 002a BC .byte (.L15-.L12)/2 + 145 002b BF .byte (.L14-.L12)/2 + 146 002c 73 .byte (.L13-.L12)/2 + 147 002d 02 .byte (.L11-.L12)/2 + 148 .p2align 1 + 149 .L11: + 150 002e 43F4C063 orr r3, r3, #1536 + 151 .L16: + 152 0032 48F28004 movw r4, #32896 + 153 0036 2343 orrs r3, r3, r4 + 154 0038 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 155 003c 30F82230 ldrh r3, [r0, r2, lsl #2] + 156 0040 23F4E043 bic r3, r3, #28672 + 157 0044 23F07003 bic r3, r3, #112 + 158 0048 1B04 lsls r3, r3, #16 + 159 004a 1B0C lsrs r3, r3, #16 + 160 004c 43EA0C03 orr r3, r3, ip + 161 0050 2343 orrs r3, r3, r4 + 162 0052 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 163 0056 0C7B ldrb r4, [r1, #12] @ zero_extendqisi2 + 164 0058 002C cmp r4, #0 + 165 005a 6CD0 beq .L36 + 166 005c 0024 movs r4, #0 + 167 .L17: + 168 005e 30F82230 ldrh r3, [r0, r2, lsl #2] + 169 0062 23F4E243 bic r3, r3, #28928 + 170 0066 23F07003 bic r3, r3, #112 + 171 006a 1B04 lsls r3, r3, #16 + 172 006c 1B0C lsrs r3, r3, #16 + 173 006e 43F40043 orr r3, r3, #32768 + 174 0072 43F08003 orr r3, r3, #128 + 175 0076 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 176 .L28: + 177 007a B0F85050 ldrh r5, [r0, #80] + 178 007e 0B89 ldrh r3, [r1, #8] + 179 0080 00EBCC0C add ip, r0, ip, lsl #3 + 180 0084 1CFA85F5 uxtah r5, ip, r5 + 181 0088 5B08 lsrs r3, r3, #1 + 182 008a 5B00 lsls r3, r3, #1 + ARM GAS /tmp/ccw23tFd.s page 4 + + + 183 008c A5F80034 strh r3, [r5, #1024] @ movhi + 184 0090 B0F85030 ldrh r3, [r0, #80] + 185 0094 1CFA83FC uxtah ip, ip, r3 + 186 0098 4B89 ldrh r3, [r1, #10] + 187 009a 5B08 lsrs r3, r3, #1 + 188 009c 5B00 lsls r3, r3, #1 + 189 009e ACF80434 strh r3, [ip, #1028] @ movhi + 190 00a2 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 191 00a4 002B cmp r3, #0 + 192 00a6 40F0CD80 bne .L29 + 193 00aa 30F82230 ldrh r3, [r0, r2, lsl #2] + 194 00ae 5E04 lsls r6, r3, #17 + 195 00b0 0DD5 bpl .L30 + 196 00b2 30F82230 ldrh r3, [r0, r2, lsl #2] + 197 00b6 23F4E043 bic r3, r3, #28672 + 198 00ba 23F07003 bic r3, r3, #112 + 199 00be 1B04 lsls r3, r3, #16 + 200 00c0 1B0C lsrs r3, r3, #16 + 201 00c2 43F44043 orr r3, r3, #49152 + 202 00c6 43F08003 orr r3, r3, #128 + 203 00ca 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 204 .L30: + 205 00ce 30F82230 ldrh r3, [r0, r2, lsl #2] + 206 00d2 5D06 lsls r5, r3, #25 + 207 00d4 00F1FD80 bmi .L70 + 208 .L31: + 209 00d8 30F82230 ldrh r3, [r0, r2, lsl #2] + 210 00dc 23F48043 bic r3, r3, #16384 + 211 00e0 23F07003 bic r3, r3, #112 + 212 00e4 1B04 lsls r3, r3, #16 + 213 00e6 1B0C lsrs r3, r3, #16 + 214 00e8 48F28001 movw r1, #32896 + 215 00ec 83F44053 eor r3, r3, #12288 + 216 00f0 0B43 orrs r3, r3, r1 + 217 00f2 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 218 00f6 30F82230 ldrh r3, [r0, r2, lsl #2] + 219 00fa 23F4E043 bic r3, r3, #28672 + 220 00fe 23F04003 bic r3, r3, #64 + 221 0102 1B04 lsls r3, r3, #16 + 222 0104 1B0C lsrs r3, r3, #16 + 223 0106 0B43 orrs r3, r3, r1 + 224 0108 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 225 010c 2046 mov r0, r4 + 226 010e 70BD pop {r4, r5, r6, pc} + 227 .L13: + 228 0110 48F28005 movw r5, #32896 + 229 0114 2B43 orrs r3, r3, r5 + 230 0116 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 231 011a 30F82240 ldrh r4, [r0, r2, lsl #2] + 232 011e 914E ldr r6, .L73 + 233 0120 A4B2 uxth r4, r4 + 234 0122 3440 ands r4, r4, r6 + 235 0124 44EA0C04 orr r4, r4, ip + 236 0128 2C43 orrs r4, r4, r5 + 237 012a 20F82240 strh r4, [r0, r2, lsl #2] @ movhi + 238 012e 0C7B ldrb r4, [r1, #12] @ zero_extendqisi2 + 239 0130 002C cmp r4, #0 + ARM GAS /tmp/ccw23tFd.s page 5 + + + 240 0132 40F0E980 bne .L71 + 241 .L36: + 242 0136 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 243 0138 CBB3 cbz r3, .L18 + 244 013a CB88 ldrh r3, [r1, #6] + 245 013c B0F85010 ldrh r1, [r0, #80] + 246 0140 00EBCC0C add ip, r0, ip, lsl #3 + 247 0144 0CF5806C add ip, ip, #1024 + 248 0148 5B08 lsrs r3, r3, #1 + 249 014a 89B2 uxth r1, r1 + 250 014c 5B00 lsls r3, r3, #1 + 251 014e 2CF80130 strh r3, [ip, r1] @ movhi + 252 0152 30F82230 ldrh r3, [r0, r2, lsl #2] + 253 0156 5B06 lsls r3, r3, #25 + 254 0158 0DD5 bpl .L19 + 255 015a 30F82230 ldrh r3, [r0, r2, lsl #2] + 256 015e 23F4E043 bic r3, r3, #28672 + 257 0162 23F07003 bic r3, r3, #112 + 258 0166 1B04 lsls r3, r3, #16 + 259 0168 1B0C lsrs r3, r3, #16 + 260 016a 43F40043 orr r3, r3, #32768 + 261 016e 43F0C003 orr r3, r3, #192 + 262 0172 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 263 .L19: + 264 0176 30F82230 ldrh r3, [r0, r2, lsl #2] + 265 017a 23F4E043 bic r3, r3, #28672 + 266 017e 23F04003 bic r3, r3, #64 + 267 0182 1B04 lsls r3, r3, #16 + 268 0184 BEF1010F cmp lr, #1 + 269 0188 4FEA1343 lsr r3, r3, #16 + 270 018c 52D0 beq .L69 + 271 018e 83F02003 eor r3, r3, #32 + 272 0192 43F40043 orr r3, r3, #32768 + 273 0196 43F08003 orr r3, r3, #128 + 274 019a 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 275 019e 2046 mov r0, r4 + 276 01a0 70BD pop {r4, r5, r6, pc} + 277 .L15: + 278 01a2 43F40073 orr r3, r3, #512 + 279 01a6 44E7 b .L16 + 280 .L14: + 281 01a8 43F48063 orr r3, r3, #1024 + 282 01ac 41E7 b .L16 + 283 .L18: + 284 01ae B0F85050 ldrh r5, [r0, #80] + 285 01b2 CB88 ldrh r3, [r1, #6] + 286 01b4 0969 ldr r1, [r1, #16] + 287 01b6 00EBCC0C add ip, r0, ip, lsl #3 + 288 01ba 1CFA85F5 uxtah r5, ip, r5 + 289 01be 5B08 lsrs r3, r3, #1 + 290 01c0 5B00 lsls r3, r3, #1 + 291 01c2 A5F80434 strh r3, [r5, #1028] @ movhi + 292 01c6 B0F85030 ldrh r3, [r0, #80] + 293 01ca 3E29 cmp r1, #62 + 294 01cc 1CFA83FC uxtah ip, ip, r3 + 295 01d0 00F28E80 bhi .L72 + 296 01d4 0029 cmp r1, #0 + ARM GAS /tmp/ccw23tFd.s page 6 + + + 297 01d6 40F0A380 bne .L25 + 298 01da BCF80634 ldrh r3, [ip, #1030] + 299 01de 23F4F843 bic r3, r3, #31744 + 300 01e2 1B04 lsls r3, r3, #16 + 301 01e4 1B0C lsrs r3, r3, #16 + 302 01e6 ACF80634 strh r3, [ip, #1030] @ movhi + 303 01ea BCF80634 ldrh r3, [ip, #1030] + 304 01ee 6FEA4343 mvn r3, r3, lsl #17 + 305 01f2 6FEA5343 mvn r3, r3, lsr #17 + 306 01f6 9BB2 uxth r3, r3 + 307 01f8 ACF80634 strh r3, [ip, #1030] @ movhi + 308 .L24: + 309 01fc 30F82230 ldrh r3, [r0, r2, lsl #2] + 310 0200 5B04 lsls r3, r3, #17 + 311 0202 0DD5 bpl .L27 + 312 0204 30F82230 ldrh r3, [r0, r2, lsl #2] + 313 0208 23F4E043 bic r3, r3, #28672 + 314 020c 23F07003 bic r3, r3, #112 + 315 0210 1B04 lsls r3, r3, #16 + 316 0212 1B0C lsrs r3, r3, #16 + 317 0214 43F44043 orr r3, r3, #49152 + 318 0218 43F08003 orr r3, r3, #128 + 319 021c 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 320 .L27: + 321 0220 30F82230 ldrh r3, [r0, r2, lsl #2] + 322 0224 23F48043 bic r3, r3, #16384 + 323 0228 23F07003 bic r3, r3, #112 + 324 022c 1B04 lsls r3, r3, #16 + 325 022e 1B0C lsrs r3, r3, #16 + 326 0230 83F44053 eor r3, r3, #12288 + 327 .L69: + 328 0234 43F40043 orr r3, r3, #32768 + 329 0238 43F08003 orr r3, r3, #128 + 330 023c 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 331 0240 2046 mov r0, r4 + 332 0242 70BD pop {r4, r5, r6, pc} + 333 .L29: + 334 0244 30F82230 ldrh r3, [r0, r2, lsl #2] + 335 0248 5904 lsls r1, r3, #17 + 336 024a 0DD5 bpl .L32 + 337 024c 30F82230 ldrh r3, [r0, r2, lsl #2] + 338 0250 23F4E043 bic r3, r3, #28672 + 339 0254 23F07003 bic r3, r3, #112 + 340 0258 1B04 lsls r3, r3, #16 + 341 025a 1B0C lsrs r3, r3, #16 + 342 025c 43F44043 orr r3, r3, #49152 + 343 0260 43F08003 orr r3, r3, #128 + 344 0264 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 345 .L32: + 346 0268 30F82230 ldrh r3, [r0, r2, lsl #2] + 347 026c 5B06 lsls r3, r3, #25 + 348 026e 0DD5 bpl .L33 + 349 0270 30F82230 ldrh r3, [r0, r2, lsl #2] + 350 0274 23F4E043 bic r3, r3, #28672 + 351 0278 23F07003 bic r3, r3, #112 + 352 027c 1B04 lsls r3, r3, #16 + 353 027e 1B0C lsrs r3, r3, #16 + ARM GAS /tmp/ccw23tFd.s page 7 + + + 354 0280 43F40043 orr r3, r3, #32768 + 355 0284 43F0C003 orr r3, r3, #192 + 356 0288 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 357 .L33: + 358 028c 30F82230 ldrh r3, [r0, r2, lsl #2] + 359 0290 23F4E043 bic r3, r3, #28672 + 360 0294 23F04003 bic r3, r3, #64 + 361 0298 1B04 lsls r3, r3, #16 + 362 029a 1B0C lsrs r3, r3, #16 + 363 029c BEF1010F cmp lr, #1 + 364 02a0 18BF it ne + 365 02a2 83F02003 eorne r3, r3, #32 + 366 02a6 43F40043 orr r3, r3, #32768 + 367 02aa 43F08003 orr r3, r3, #128 + 368 02ae 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 369 02b2 30F82230 ldrh r3, [r0, r2, lsl #2] + 370 02b6 23F48043 bic r3, r3, #16384 + 371 02ba 23F07003 bic r3, r3, #112 + 372 02be 1B04 lsls r3, r3, #16 + 373 02c0 1B0C lsrs r3, r3, #16 + 374 02c2 43F40043 orr r3, r3, #32768 + 375 02c6 43F08003 orr r3, r3, #128 + 376 02ca 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 377 02ce 2046 mov r0, r4 + 378 02d0 70BD pop {r4, r5, r6, pc} + 379 .L70: + 380 02d2 30F82230 ldrh r3, [r0, r2, lsl #2] + 381 02d6 23F4E043 bic r3, r3, #28672 + 382 02da 23F07003 bic r3, r3, #112 + 383 02de 1B04 lsls r3, r3, #16 + 384 02e0 1B0C lsrs r3, r3, #16 + 385 02e2 43F40043 orr r3, r3, #32768 + 386 02e6 43F0C003 orr r3, r3, #192 + 387 02ea 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 388 02ee F3E6 b .L31 + 389 .L72: + 390 02f0 4D09 lsrs r5, r1, #5 + 391 02f2 1D4B ldr r3, .L73+4 + 392 02f4 CE06 lsls r6, r1, #27 + 393 02f6 08BF it eq + 394 02f8 05F1FF35 addeq r5, r5, #-1 + 395 02fc 43EA8523 orr r3, r3, r5, lsl #10 + 396 0300 9BB2 uxth r3, r3 + 397 0302 ACF80634 strh r3, [ip, #1030] @ movhi + 398 0306 79E7 b .L24 + 399 .L71: + 400 0308 30F82230 ldrh r3, [r0, r2, lsl #2] + 401 030c 9BB2 uxth r3, r3 + 402 030e 3340 ands r3, r3, r6 + 403 0310 43F40143 orr r3, r3, #33024 + 404 0314 43F08003 orr r3, r3, #128 + 405 0318 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 406 031c 0024 movs r4, #0 + 407 031e ACE6 b .L28 + 408 .L25: + 409 0320 4B08 lsrs r3, r1, #1 + 410 0322 C907 lsls r1, r1, #31 + ARM GAS /tmp/ccw23tFd.s page 8 + + + 411 0324 48BF it mi + 412 0326 0133 addmi r3, r3, #1 + 413 0328 9B02 lsls r3, r3, #10 + 414 032a 9BB2 uxth r3, r3 + 415 032c ACF80634 strh r3, [ip, #1030] @ movhi + 416 0330 64E7 b .L24 + 417 .L10: + 418 0332 48F28004 movw r4, #32896 + 419 0336 2343 orrs r3, r3, r4 + 420 0338 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 421 033c 30F82230 ldrh r3, [r0, r2, lsl #2] + 422 0340 23F4E043 bic r3, r3, #28672 + 423 0344 23F07003 bic r3, r3, #112 + 424 0348 1B04 lsls r3, r3, #16 + 425 034a 1B0C lsrs r3, r3, #16 + 426 034c 43EA0C03 orr r3, r3, ip + 427 0350 2343 orrs r3, r3, r4 + 428 0352 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 429 0356 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 430 0358 0124 movs r4, #1 + 431 035a 002B cmp r3, #0 + 432 035c 7FF47FAE bne .L17 + 433 0360 E9E6 b .L36 + 434 .L74: + 435 0362 00BF .align 2 + 436 .L73: + 437 0364 8F8FFFFF .word -28785 + 438 0368 0080FFFF .word -32768 + 440 .section .text.USB_DeactivateEndpoint,"ax",%progbits + 441 .align 1 + 442 .p2align 2,,3 + 443 .global USB_DeactivateEndpoint + 444 .syntax unified + 445 .thumb + 446 .thumb_func + 447 .fpu fpv4-sp-d16 + 449 USB_DeactivateEndpoint: + 450 @ args = 0, pretend = 0, frame = 0 + 451 @ frame_needed = 0, uses_anonymous_args = 0 + 452 @ link register save eliminated. + 453 0000 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 454 0002 CBB9 cbnz r3, .L76 + 455 0004 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 456 0006 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 457 0008 002B cmp r3, #0 + 458 000a 00F0B180 beq .L77 + 459 000e 30F82230 ldrh r3, [r0, r2, lsl #2] + 460 0012 5906 lsls r1, r3, #25 + 461 0014 00F1C580 bmi .L105 + 462 .L78: + 463 0018 30F82230 ldrh r3, [r0, r2, lsl #2] + 464 001c 23F4E043 bic r3, r3, #28672 + 465 0020 23F04003 bic r3, r3, #64 + 466 .L104: + 467 0024 1B04 lsls r3, r3, #16 + 468 0026 1B0C lsrs r3, r3, #16 + 469 0028 43F40043 orr r3, r3, #32768 + ARM GAS /tmp/ccw23tFd.s page 9 + + + 470 002c 43F08003 orr r3, r3, #128 + 471 0030 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 472 0034 0020 movs r0, #0 + 473 0036 7047 bx lr + 474 .L76: + 475 0038 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 476 003a 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 477 003c 002B cmp r3, #0 + 478 003e 4BD1 bne .L81 + 479 0040 30F82230 ldrh r3, [r0, r2, lsl #2] + 480 0044 5904 lsls r1, r3, #17 + 481 0046 0DD5 bpl .L82 + 482 0048 30F82230 ldrh r3, [r0, r2, lsl #2] + 483 004c 23F4E043 bic r3, r3, #28672 + 484 0050 23F07003 bic r3, r3, #112 + 485 0054 1B04 lsls r3, r3, #16 + 486 0056 1B0C lsrs r3, r3, #16 + 487 0058 43F44043 orr r3, r3, #49152 + 488 005c 43F08003 orr r3, r3, #128 + 489 0060 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 490 .L82: + 491 0064 30F82230 ldrh r3, [r0, r2, lsl #2] + 492 0068 5B06 lsls r3, r3, #25 + 493 006a 0DD5 bpl .L83 + 494 006c 30F82230 ldrh r3, [r0, r2, lsl #2] + 495 0070 23F4E043 bic r3, r3, #28672 + 496 0074 23F07003 bic r3, r3, #112 + 497 0078 1B04 lsls r3, r3, #16 + 498 007a 1B0C lsrs r3, r3, #16 + 499 007c 43F40043 orr r3, r3, #32768 + 500 0080 43F0C003 orr r3, r3, #192 + 501 0084 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 502 .L83: + 503 0088 30F82230 ldrh r3, [r0, r2, lsl #2] + 504 008c 23F4E043 bic r3, r3, #28672 + 505 0090 23F07003 bic r3, r3, #112 + 506 0094 1B04 lsls r3, r3, #16 + 507 0096 1B0C lsrs r3, r3, #16 + 508 0098 43F40043 orr r3, r3, #32768 + 509 009c 43F0C003 orr r3, r3, #192 + 510 00a0 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 511 00a4 30F82230 ldrh r3, [r0, r2, lsl #2] + 512 00a8 23F48043 bic r3, r3, #16384 + 513 00ac 23F07003 bic r3, r3, #112 + 514 00b0 1B04 lsls r3, r3, #16 + 515 00b2 48F28001 movw r1, #32896 + 516 00b6 1B0C lsrs r3, r3, #16 + 517 00b8 0B43 orrs r3, r3, r1 + 518 00ba 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 519 00be 30F82230 ldrh r3, [r0, r2, lsl #2] + 520 00c2 23F4E043 bic r3, r3, #28672 + 521 00c6 23F04003 bic r3, r3, #64 + 522 00ca 1B04 lsls r3, r3, #16 + 523 00cc 1B0C lsrs r3, r3, #16 + 524 00ce 0B43 orrs r3, r3, r1 + 525 00d0 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 526 00d4 0020 movs r0, #0 + ARM GAS /tmp/ccw23tFd.s page 10 + + + 527 00d6 7047 bx lr + 528 .L81: + 529 00d8 30F82230 ldrh r3, [r0, r2, lsl #2] + 530 00dc 5904 lsls r1, r3, #17 + 531 00de 0DD5 bpl .L84 + 532 00e0 30F82230 ldrh r3, [r0, r2, lsl #2] + 533 00e4 23F4E043 bic r3, r3, #28672 + 534 00e8 23F07003 bic r3, r3, #112 + 535 00ec 1B04 lsls r3, r3, #16 + 536 00ee 1B0C lsrs r3, r3, #16 + 537 00f0 43F44043 orr r3, r3, #49152 + 538 00f4 43F08003 orr r3, r3, #128 + 539 00f8 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 540 .L84: + 541 00fc 30F82230 ldrh r3, [r0, r2, lsl #2] + 542 0100 5B06 lsls r3, r3, #25 + 543 0102 0DD5 bpl .L85 + 544 0104 30F82230 ldrh r3, [r0, r2, lsl #2] + 545 0108 23F4E043 bic r3, r3, #28672 + 546 010c 23F07003 bic r3, r3, #112 + 547 0110 1B04 lsls r3, r3, #16 + 548 0112 1B0C lsrs r3, r3, #16 + 549 0114 43F40043 orr r3, r3, #32768 + 550 0118 43F0C003 orr r3, r3, #192 + 551 011c 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 552 .L85: + 553 0120 30F82230 ldrh r3, [r0, r2, lsl #2] + 554 0124 23F4E043 bic r3, r3, #28672 + 555 0128 23F07003 bic r3, r3, #112 + 556 012c 1B04 lsls r3, r3, #16 + 557 012e 1B0C lsrs r3, r3, #16 + 558 0130 43F44043 orr r3, r3, #49152 + 559 0134 43F08003 orr r3, r3, #128 + 560 0138 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 561 013c 30F82230 ldrh r3, [r0, r2, lsl #2] + 562 0140 23F4E043 bic r3, r3, #28672 + 563 0144 23F04003 bic r3, r3, #64 + 564 0148 1B04 lsls r3, r3, #16 + 565 014a 48F28001 movw r1, #32896 + 566 014e 1B0C lsrs r3, r3, #16 + 567 0150 0B43 orrs r3, r3, r1 + 568 0152 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 569 0156 30F82230 ldrh r3, [r0, r2, lsl #2] + 570 015a 23F48043 bic r3, r3, #16384 + 571 015e 23F07003 bic r3, r3, #112 + 572 0162 1B04 lsls r3, r3, #16 + 573 0164 1B0C lsrs r3, r3, #16 + 574 0166 0B43 orrs r3, r3, r1 + 575 0168 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 576 016c 0020 movs r0, #0 + 577 016e 7047 bx lr + 578 .L77: + 579 0170 30F82230 ldrh r3, [r0, r2, lsl #2] + 580 0174 5B04 lsls r3, r3, #17 + 581 0176 0DD5 bpl .L80 + 582 0178 30F82230 ldrh r3, [r0, r2, lsl #2] + 583 017c 23F4E043 bic r3, r3, #28672 + ARM GAS /tmp/ccw23tFd.s page 11 + + + 584 0180 23F07003 bic r3, r3, #112 + 585 0184 1B04 lsls r3, r3, #16 + 586 0186 1B0C lsrs r3, r3, #16 + 587 0188 43F44043 orr r3, r3, #49152 + 588 018c 43F08003 orr r3, r3, #128 + 589 0190 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 590 .L80: + 591 0194 30F82230 ldrh r3, [r0, r2, lsl #2] + 592 0198 23F48043 bic r3, r3, #16384 + 593 019c 23F07003 bic r3, r3, #112 + 594 01a0 40E7 b .L104 + 595 .L105: + 596 01a2 30F82230 ldrh r3, [r0, r2, lsl #2] + 597 01a6 23F4E043 bic r3, r3, #28672 + 598 01aa 23F07003 bic r3, r3, #112 + 599 01ae 1B04 lsls r3, r3, #16 + 600 01b0 1B0C lsrs r3, r3, #16 + 601 01b2 43F40043 orr r3, r3, #32768 + 602 01b6 43F0C003 orr r3, r3, #192 + 603 01ba 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 604 01be 2BE7 b .L78 + 606 .section .text.USB_EPStartXfer,"ax",%progbits + 607 .align 1 + 608 .p2align 2,,3 + 609 .global USB_EPStartXfer + 610 .syntax unified + 611 .thumb + 612 .thumb_func + 613 .fpu fpv4-sp-d16 + 615 USB_EPStartXfer: + 616 @ args = 0, pretend = 0, frame = 0 + 617 @ frame_needed = 0, uses_anonymous_args = 0 + 618 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr} + 619 0004 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 620 0006 012B cmp r3, #1 + 621 0008 0246 mov r2, r0 + 622 000a 00F08480 beq .L205 + 623 000e 087B ldrb r0, [r1, #12] @ zero_extendqisi2 + 624 0010 0028 cmp r0, #0 + 625 0012 48D0 beq .L206 + 626 0014 C878 ldrb r0, [r1, #3] @ zero_extendqisi2 + 627 0016 0228 cmp r0, #2 + 628 0018 00F00C81 beq .L207 + 629 001c 0128 cmp r0, #1 + 630 001e 40F0EE80 bne .L162 + 631 0022 8869 ldr r0, [r1, #24] + 632 0024 0C69 ldr r4, [r1, #16] + 633 0026 A042 cmp r0, r4 + 634 0028 8ABF itet hi + 635 002a 051B subhi r5, r0, r4 + 636 002c 0025 movls r5, #0 + 637 002e 2046 movhi r0, r4 + 638 0030 8D61 str r5, [r1, #24] + 639 0032 002B cmp r3, #0 + 640 0034 40F0FC80 bne .L204 + 641 0038 B2F85050 ldrh r5, [r2, #80] + 642 003c 0C78 ldrb r4, [r1] @ zero_extendqisi2 + ARM GAS /tmp/ccw23tFd.s page 12 + + + 643 003e 02F20243 addw r3, r2, #1026 + 644 0042 3E28 cmp r0, #62 + 645 0044 13FA85F3 uxtah r3, r3, r5 + 646 0048 00F21582 bhi .L208 + 647 004c 0028 cmp r0, #0 + 648 004e 40F0D980 bne .L158 + 649 0052 33F83400 ldrh r0, [r3, r4, lsl #3] + 650 0056 20F4F840 bic r0, r0, #31744 + 651 005a 0004 lsls r0, r0, #16 + 652 005c 000C lsrs r0, r0, #16 + 653 005e 23F83400 strh r0, [r3, r4, lsl #3] @ movhi + 654 0062 33F83400 ldrh r0, [r3, r4, lsl #3] + 655 0066 6FEA4040 mvn r0, r0, lsl #17 + 656 006a 6FEA5040 mvn r0, r0, lsr #17 + 657 006e 80B2 uxth r0, r0 + 658 0070 23F83400 strh r0, [r3, r4, lsl #3] @ movhi + 659 0074 B2F85030 ldrh r3, [r2, #80] + 660 0078 02F20640 addw r0, r2, #1030 + 661 007c 10FA83F0 uxtah r0, r0, r3 + 662 0080 30F83430 ldrh r3, [r0, r4, lsl #3] + 663 0084 23F4F843 bic r3, r3, #31744 + 664 0088 1B04 lsls r3, r3, #16 + 665 008a 1B0C lsrs r3, r3, #16 + 666 008c 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 667 0090 30F83430 ldrh r3, [r0, r4, lsl #3] + 668 0094 6FEA4343 mvn r3, r3, lsl #17 + 669 0098 6FEA5343 mvn r3, r3, lsr #17 + 670 009c 9BB2 uxth r3, r3 + 671 009e 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 672 00a2 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 673 00a4 23E0 b .L139 + 674 .L206: + 675 00a6 8C69 ldr r4, [r1, #24] + 676 00a8 0B69 ldr r3, [r1, #16] + 677 00aa 9C42 cmp r4, r3 + 678 00ac 84BF itt hi + 679 00ae E01A subhi r0, r4, r3 + 680 00b0 1C46 movhi r4, r3 + 681 00b2 B2F85030 ldrh r3, [r2, #80] + 682 00b6 8861 str r0, [r1, #24] + 683 00b8 02F2064C addw ip, r2, #1030 + 684 00bc 0878 ldrb r0, [r1] @ zero_extendqisi2 + 685 00be 1CFA83F3 uxtah r3, ip, r3 + 686 00c2 3E2C cmp r4, #62 + 687 00c4 03EBC003 add r3, r3, r0, lsl #3 + 688 00c8 00F28C80 bhi .L209 + 689 00cc 002C cmp r4, #0 + 690 00ce 40F0F880 bne .L140 + 691 00d2 1888 ldrh r0, [r3] + 692 00d4 20F4F840 bic r0, r0, #31744 + 693 00d8 0004 lsls r0, r0, #16 + 694 00da 000C lsrs r0, r0, #16 + 695 00dc 1880 strh r0, [r3] @ movhi + 696 00de 1888 ldrh r0, [r3] + 697 00e0 6FEA4040 mvn r0, r0, lsl #17 + 698 00e4 6FEA5040 mvn r0, r0, lsr #17 + 699 00e8 80B2 uxth r0, r0 + ARM GAS /tmp/ccw23tFd.s page 13 + + + 700 00ea 1880 strh r0, [r3] @ movhi + 701 00ec 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 702 .L139: + 703 00ee 19B2 sxth r1, r3 + 704 00f0 0020 movs r0, #0 + 705 00f2 32F82130 ldrh r3, [r2, r1, lsl #2] + 706 00f6 23F48043 bic r3, r3, #16384 + 707 00fa 23F07003 bic r3, r3, #112 + 708 00fe 1B04 lsls r3, r3, #16 + 709 0100 1B0C lsrs r3, r3, #16 + 710 0102 83F44053 eor r3, r3, #12288 + 711 0106 43F40043 orr r3, r3, #32768 + 712 010a 43F08003 orr r3, r3, #128 + 713 010e 22F82130 strh r3, [r2, r1, lsl #2] @ movhi + 714 0112 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 715 .L205: + 716 0116 0C69 ldr r4, [r1, #16] + 717 0118 8869 ldr r0, [r1, #24] + 718 011a 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 719 011c A042 cmp r0, r4 + 720 011e 28BF it cs + 721 0120 2046 movcs r0, r4 + 722 0122 93BB cbnz r3, .L108 + 723 0124 84B2 uxth r4, r0 + 724 0126 2046 mov r0, r4 + 725 0128 B1F806E0 ldrh lr, [r1, #6] + 726 012c 4B69 ldr r3, [r1, #20] + 727 012e 0130 adds r0, r0, #1 + 728 0130 02F58065 add r5, r2, #1024 + 729 0134 4008 lsrs r0, r0, #1 + 730 0136 AE44 add lr, lr, r5 + 731 0138 09D0 beq .L112 + 732 013a 03EB400C add ip, r3, r0, lsl #1 + 733 013e AEEB030E sub lr, lr, r3 + 734 .L111: + 735 0142 1888 ldrh r0, [r3] @ unaligned + 736 0144 23F80E00 strh r0, [r3, lr] @ movhi + 737 0148 0233 adds r3, r3, #2 + 738 014a 6345 cmp r3, ip + 739 014c F9D1 bne .L111 + 740 .L112: + 741 014e B2F85030 ldrh r3, [r2, #80] + 742 0152 0878 ldrb r0, [r1] @ zero_extendqisi2 + 743 0154 02F20245 addw r5, r2, #1026 + 744 0158 15FA83F3 uxtah r3, r5, r3 + 745 015c 03EBC003 add r3, r3, r0, lsl #3 + 746 0160 1C80 strh r4, [r3] @ movhi + 747 .L110: + 748 0162 0978 ldrb r1, [r1] @ zero_extendqisi2 + 749 0164 32F82130 ldrh r3, [r2, r1, lsl #2] + 750 0168 23F4E043 bic r3, r3, #28672 + 751 016c 23F04003 bic r3, r3, #64 + 752 0170 1B04 lsls r3, r3, #16 + 753 0172 1B0C lsrs r3, r3, #16 + 754 0174 83F03003 eor r3, r3, #48 + 755 0178 43F40043 orr r3, r3, #32768 + 756 017c 43F08003 orr r3, r3, #128 + ARM GAS /tmp/ccw23tFd.s page 14 + + + 757 0180 22F82130 strh r3, [r2, r1, lsl #2] @ movhi + 758 0184 0020 movs r0, #0 + 759 0186 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 760 .L108: + 761 018a CB78 ldrb r3, [r1, #3] @ zero_extendqisi2 + 762 018c 022B cmp r3, #2 + 763 018e 00F0A180 beq .L210 + 764 0192 0B6A ldr r3, [r1, #32] + 765 0194 0C78 ldrb r4, [r1] @ zero_extendqisi2 + 766 0196 1B1A subs r3, r3, r0 + 767 0198 0B62 str r3, [r1, #32] + 768 019a 23B2 sxth r3, r4 + 769 019c 32F82330 ldrh r3, [r2, r3, lsl #2] + 770 01a0 13F0400F tst r3, #64 + 771 01a4 B2F85030 ldrh r3, [r2, #80] + 772 01a8 00F0F180 beq .L131 + 773 01ac 02F20645 addw r5, r2, #1030 + 774 01b0 15FA83F3 uxtah r3, r5, r3 + 775 01b4 03EBC403 add r3, r3, r4, lsl #3 + 776 01b8 84B2 uxth r4, r0 + 777 01ba 1C80 strh r4, [r3] @ movhi + 778 01bc 2046 mov r0, r4 + 779 01be 0130 adds r0, r0, #1 + 780 01c0 4C89 ldrh r4, [r1, #10] + 781 01c2 4B69 ldr r3, [r1, #20] + 782 01c4 02F5806C add ip, r2, #1024 + 783 01c8 4008 lsrs r0, r0, #1 + 784 01ca A444 add ip, ip, r4 + 785 01cc C9D0 beq .L110 + 786 01ce 03EB4004 add r4, r3, r0, lsl #1 + 787 01d2 ACEB030C sub ip, ip, r3 + 788 .L132: + 789 01d6 1888 ldrh r0, [r3] @ unaligned + 790 01d8 23F80C00 strh r0, [r3, ip] @ movhi + 791 01dc 0233 adds r3, r3, #2 + 792 01de A342 cmp r3, r4 + 793 01e0 F9D1 bne .L132 + 794 01e2 BEE7 b .L110 + 795 .L209: + 796 01e4 4FEA541C lsr ip, r4, #5 + 797 01e8 AD48 ldr r0, .L213 + 798 01ea E506 lsls r5, r4, #27 + 799 01ec 08BF it eq + 800 01ee 0CF1FF3C addeq ip, ip, #-1 + 801 01f2 40EA8C20 orr r0, r0, ip, lsl #10 + 802 01f6 80B2 uxth r0, r0 + 803 01f8 1880 strh r0, [r3] @ movhi + 804 01fa 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 805 01fc 77E7 b .L139 + 806 .L162: + 807 01fe 0120 movs r0, #1 + 808 0200 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc} + 809 .L158: + 810 0204 4508 lsrs r5, r0, #1 + 811 0206 10F00100 ands r0, r0, #1 + 812 020a 2E46 mov r6, r5 + 813 020c 18BF it ne + ARM GAS /tmp/ccw23tFd.s page 15 + + + 814 020e 6E1C addne r6, r5, #1 + 815 0210 B602 lsls r6, r6, #10 + 816 0212 B6B2 uxth r6, r6 + 817 0214 23F83460 strh r6, [r3, r4, lsl #3] @ movhi + 818 0218 B2F85060 ldrh r6, [r2, #80] + 819 021c 02F20643 addw r3, r2, #1030 + 820 0220 13FA86F6 uxtah r6, r3, r6 + 821 0224 00B1 cbz r0, .L160 + 822 0226 0135 adds r5, r5, #1 + 823 .L160: + 824 0228 AD02 lsls r5, r5, #10 + 825 022a ABB2 uxth r3, r5 + 826 022c 26F83430 strh r3, [r6, r4, lsl #3] @ movhi + 827 .L204: + 828 0230 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 829 0232 5CE7 b .L139 + 830 .L207: + 831 0234 2BBB cbnz r3, .L143 + 832 0236 0B69 ldr r3, [r1, #16] + 833 0238 B2F85050 ldrh r5, [r2, #80] + 834 023c 0C78 ldrb r4, [r1] @ zero_extendqisi2 + 835 023e 02F20240 addw r0, r2, #1026 + 836 0242 3E2B cmp r3, #62 + 837 0244 10FA85F0 uxtah r0, r0, r5 + 838 0248 40F2EA80 bls .L144 + 839 024c 5E09 lsrs r6, r3, #5 + 840 024e 944D ldr r5, .L213 + 841 0250 13F01F03 ands r3, r3, #31 + 842 0254 3746 mov r7, r6 + 843 0256 08BF it eq + 844 0258 06F1FF37 addeq r7, r6, #-1 + 845 025c 45EA8725 orr r5, r5, r7, lsl #10 + 846 0260 ADB2 uxth r5, r5 + 847 0262 20F83450 strh r5, [r0, r4, lsl #3] @ movhi + 848 0266 B2F85050 ldrh r5, [r2, #80] + 849 026a 02F20640 addw r0, r2, #1030 + 850 026e 10FA85F0 uxtah r0, r0, r5 + 851 0272 03B9 cbnz r3, .L147 + 852 0274 013E subs r6, r6, #1 + 853 .L147: + 854 0276 8A4B ldr r3, .L213 + 855 0278 43EA8623 orr r3, r3, r6, lsl #10 + 856 027c 9BB2 uxth r3, r3 + 857 027e 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 858 .L143: + 859 0282 CB69 ldr r3, [r1, #28] + 860 0284 002B cmp r3, #0 + 861 0286 D3D0 beq .L204 + 862 0288 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 863 028a 18B2 sxth r0, r3 + 864 028c 44F24004 movw r4, #16448 + 865 0290 32F82050 ldrh r5, [r2, r0, lsl #2] + 866 0294 04EA0506 and r6, r4, r5 + 867 0298 AC43 bics r4, r4, r5 + 868 029a 02D0 beq .L153 + 869 029c 002E cmp r6, #0 + 870 029e 7FF426AF bne .L139 + ARM GAS /tmp/ccw23tFd.s page 16 + + + 871 .L153: + 872 02a2 32F82030 ldrh r3, [r2, r0, lsl #2] + 873 02a6 23F4E043 bic r3, r3, #28672 + 874 02aa 23F07003 bic r3, r3, #112 + 875 02ae 1B04 lsls r3, r3, #16 + 876 02b0 1B0C lsrs r3, r3, #16 + 877 02b2 43F40043 orr r3, r3, #32768 + 878 02b6 43F0C003 orr r3, r3, #192 + 879 02ba 22F82030 strh r3, [r2, r0, lsl #2] @ movhi + 880 02be 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 881 02c0 15E7 b .L139 + 882 .L140: + 883 02c2 6008 lsrs r0, r4, #1 + 884 02c4 E407 lsls r4, r4, #31 + 885 02c6 48BF it mi + 886 02c8 0130 addmi r0, r0, #1 + 887 02ca 8002 lsls r0, r0, #10 + 888 02cc 80B2 uxth r0, r0 + 889 02ce 1880 strh r0, [r3] @ movhi + 890 02d0 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 891 02d2 0CE7 b .L139 + 892 .L210: + 893 02d4 0B6A ldr r3, [r1, #32] + 894 02d6 9C42 cmp r4, r3 + 895 02d8 76D2 bcs .L114 + 896 02da 0D78 ldrb r5, [r1] @ zero_extendqisi2 + 897 02dc 32F825C0 ldrh ip, [r2, r5, lsl #2] + 898 02e0 2CF4E04C bic ip, ip, #28672 + 899 02e4 2CF0700C bic ip, ip, #112 + 900 02e8 4FEA0C4C lsl ip, ip, #16 + 901 02ec 4FEA1C4C lsr ip, ip, #16 + 902 02f0 4CF4014C orr ip, ip, #33024 + 903 02f4 4CF0800C orr ip, ip, #128 + 904 02f8 22F825C0 strh ip, [r2, r5, lsl #2] @ movhi + 905 02fc 32F82560 ldrh r6, [r2, r5, lsl #2] + 906 0300 1B1A subs r3, r3, r0 + 907 0302 16F0400F tst r6, #64 + 908 0306 0B62 str r3, [r1, #32] + 909 0308 B2F85060 ldrh r6, [r2, #80] + 910 030c 00F0CA80 beq .L115 + 911 0310 02F20647 addw r7, r2, #1030 + 912 0314 17FA86F6 uxtah r6, r7, r6 + 913 0318 1FFA80FA uxth r10, r0 + 914 031c 26F835A0 strh r10, [r6, r5, lsl #3] @ movhi + 915 0320 5746 mov r7, r10 + 916 0322 4E89 ldrh r6, [r1, #10] + 917 0324 D1F814C0 ldr ip, [r1, #20] + 918 0328 0137 adds r7, r7, #1 + 919 032a 02F58069 add r9, r2, #1024 + 920 032e 7F08 lsrs r7, r7, #1 + 921 0330 4E44 add r6, r6, r9 + 922 0332 0CD0 beq .L120 + 923 0334 A6EB0C08 sub r8, r6, ip + 924 0338 0CEB470B add fp, ip, r7, lsl #1 + 925 033c E646 mov lr, ip + 926 .L119: + 927 033e BEF80060 ldrh r6, [lr] @ unaligned + ARM GAS /tmp/ccw23tFd.s page 17 + + + 928 0342 2EF80860 strh r6, [lr, r8] @ movhi + 929 0346 0EF1020E add lr, lr, #2 + 930 034a F345 cmp fp, lr + 931 034c F7D1 bne .L119 + 932 .L120: + 933 034e 0CEB0006 add r6, ip, r0 + 934 0352 9C42 cmp r4, r3 + 935 0354 4E61 str r6, [r1, #20] + 936 0356 80F00181 bcs .L211 + 937 035a 1B1A subs r3, r3, r0 + 938 .L121: + 939 035c 0B62 str r3, [r1, #32] + 940 035e B2F85030 ldrh r3, [r2, #80] + 941 0362 02F20240 addw r0, r2, #1026 + 942 0366 10FA83F3 uxtah r3, r0, r3 + 943 036a 23F835A0 strh r10, [r3, r5, lsl #3] @ movhi + 944 036e 0B89 ldrh r3, [r1, #8] + 945 0370 03EB0905 add r5, r3, r9 + 946 0374 002F cmp r7, #0 + 947 0376 3FF4F4AE beq .L110 + 948 037a 06EB4704 add r4, r6, r7, lsl #1 + 949 037e 3346 mov r3, r6 + 950 0380 AD1B subs r5, r5, r6 + 951 .L122: + 952 0382 1888 ldrh r0, [r3] @ unaligned + 953 0384 5853 strh r0, [r3, r5] @ movhi + 954 0386 0233 adds r3, r3, #2 + 955 0388 9C42 cmp r4, r3 + 956 038a FAD1 bne .L122 + 957 038c E9E6 b .L110 + 958 .L131: + 959 038e 02F20245 addw r5, r2, #1026 + 960 0392 15FA83F3 uxtah r3, r5, r3 + 961 0396 03EBC403 add r3, r3, r4, lsl #3 + 962 039a 84B2 uxth r4, r0 + 963 039c 1C80 strh r4, [r3] @ movhi + 964 039e 2046 mov r0, r4 + 965 03a0 0130 adds r0, r0, #1 + 966 03a2 0C89 ldrh r4, [r1, #8] + 967 03a4 4B69 ldr r3, [r1, #20] + 968 03a6 02F5806C add ip, r2, #1024 + 969 03aa 4008 lsrs r0, r0, #1 + 970 03ac A444 add ip, ip, r4 + 971 03ae 3FF4D8AE beq .L110 + 972 03b2 03EB4000 add r0, r3, r0, lsl #1 + 973 03b6 ACEB030C sub ip, ip, r3 + 974 .L133: + 975 03ba 1C88 ldrh r4, [r3] @ unaligned + 976 03bc 23F80C40 strh r4, [r3, ip] @ movhi + 977 03c0 0233 adds r3, r3, #2 + 978 03c2 8342 cmp r3, r0 + 979 03c4 F9D1 bne .L133 + 980 03c6 CCE6 b .L110 + 981 .L114: + 982 03c8 0E78 ldrb r6, [r1] @ zero_extendqisi2 + 983 03ca 34B2 sxth r4, r6 + 984 03cc 02F20245 addw r5, r2, #1026 + ARM GAS /tmp/ccw23tFd.s page 18 + + + 985 03d0 32F82400 ldrh r0, [r2, r4, lsl #2] + 986 03d4 20F4E240 bic r0, r0, #28928 + 987 03d8 20F07000 bic r0, r0, #112 + 988 03dc 0004 lsls r0, r0, #16 + 989 03de 000C lsrs r0, r0, #16 + 990 03e0 40F40040 orr r0, r0, #32768 + 991 03e4 40F08000 orr r0, r0, #128 + 992 03e8 22F82400 strh r0, [r2, r4, lsl #2] @ movhi + 993 03ec B2F85040 ldrh r4, [r2, #80] + 994 03f0 9FB2 uxth r7, r3 + 995 03f2 15FA84F3 uxtah r3, r5, r4 + 996 03f6 03EBC603 add r3, r3, r6, lsl #3 + 997 03fa 781C adds r0, r7, #1 + 998 03fc 1F80 strh r7, [r3] @ movhi + 999 03fe 0C89 ldrh r4, [r1, #8] + 1000 0400 4B69 ldr r3, [r1, #20] + 1001 0402 02F58065 add r5, r2, #1024 + 1002 0406 4008 lsrs r0, r0, #1 + 1003 0408 2544 add r5, r5, r4 + 1004 040a 3FF4AAAE beq .L110 + 1005 040e 03EB4000 add r0, r3, r0, lsl #1 + 1006 0412 ED1A subs r5, r5, r3 + 1007 .L130: + 1008 0414 1C88 ldrh r4, [r3] @ unaligned + 1009 0416 5C53 strh r4, [r3, r5] @ movhi + 1010 0418 0233 adds r3, r3, #2 + 1011 041a 9842 cmp r0, r3 + 1012 041c FAD1 bne .L130 + 1013 041e A0E6 b .L110 + 1014 .L144: + 1015 0420 002B cmp r3, #0 + 1016 0422 7DD1 bne .L148 + 1017 0424 30F83430 ldrh r3, [r0, r4, lsl #3] + 1018 0428 23F4F843 bic r3, r3, #31744 + 1019 042c 1B04 lsls r3, r3, #16 + 1020 042e 1B0C lsrs r3, r3, #16 + 1021 0430 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 1022 0434 30F83430 ldrh r3, [r0, r4, lsl #3] + 1023 0438 6FEA4343 mvn r3, r3, lsl #17 + 1024 043c 6FEA5343 mvn r3, r3, lsr #17 + 1025 0440 9BB2 uxth r3, r3 + 1026 0442 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 1027 0446 B2F85030 ldrh r3, [r2, #80] + 1028 044a 02F20640 addw r0, r2, #1030 + 1029 044e 10FA83F0 uxtah r0, r0, r3 + 1030 0452 30F83430 ldrh r3, [r0, r4, lsl #3] + 1031 0456 23F4F843 bic r3, r3, #31744 + 1032 045a 1B04 lsls r3, r3, #16 + 1033 045c 1B0C lsrs r3, r3, #16 + 1034 045e 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 1035 0462 30F83430 ldrh r3, [r0, r4, lsl #3] + 1036 0466 6FEA4343 mvn r3, r3, lsl #17 + 1037 046a 6FEA5343 mvn r3, r3, lsr #17 + 1038 046e 9BB2 uxth r3, r3 + 1039 0470 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 1040 0474 05E7 b .L143 + 1041 .L208: + ARM GAS /tmp/ccw23tFd.s page 19 + + + 1042 0476 4509 lsrs r5, r0, #5 + 1043 0478 C006 lsls r0, r0, #27 + 1044 047a 0948 ldr r0, .L213 + 1045 047c 08BF it eq + 1046 047e 05F1FF35 addeq r5, r5, #-1 + 1047 0482 40EA8520 orr r0, r0, r5, lsl #10 + 1048 0486 80B2 uxth r0, r0 + 1049 0488 23F83400 strh r0, [r3, r4, lsl #3] @ movhi + 1050 048c B2F85030 ldrh r3, [r2, #80] + 1051 0490 02F20645 addw r5, r2, #1030 + 1052 0494 15FA83F3 uxtah r3, r5, r3 + 1053 0498 23F83400 strh r0, [r3, r4, lsl #3] @ movhi + 1054 049c 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 1055 049e 26E6 b .L139 + 1056 .L214: + 1057 .align 2 + 1058 .L213: + 1059 04a0 0080FFFF .word -32768 + 1060 .L115: + 1061 04a4 02F20247 addw r7, r2, #1026 + 1062 04a8 17FA86F6 uxtah r6, r7, r6 + 1063 04ac 1FFA80F9 uxth r9, r0 + 1064 04b0 26F83590 strh r9, [r6, r5, lsl #3] @ movhi + 1065 04b4 4F46 mov r7, r9 + 1066 04b6 0E89 ldrh r6, [r1, #8] + 1067 04b8 D1F814C0 ldr ip, [r1, #20] + 1068 04bc 0137 adds r7, r7, #1 + 1069 04be 02F58068 add r8, r2, #1024 + 1070 04c2 7F08 lsrs r7, r7, #1 + 1071 04c4 4644 add r6, r6, r8 + 1072 04c6 0CD0 beq .L127 + 1073 04c8 A6EB0C0A sub r10, r6, ip + 1074 04cc 0CEB470B add fp, ip, r7, lsl #1 + 1075 04d0 E646 mov lr, ip + 1076 .L126: + 1077 04d2 BEF80060 ldrh r6, [lr] @ unaligned + 1078 04d6 2EF80A60 strh r6, [lr, r10] @ movhi + 1079 04da 0EF1020E add lr, lr, #2 + 1080 04de F345 cmp fp, lr + 1081 04e0 F7D1 bne .L126 + 1082 .L127: + 1083 04e2 0CEB0006 add r6, ip, r0 + 1084 04e6 9C42 cmp r4, r3 + 1085 04e8 4E61 str r6, [r1, #20] + 1086 04ea 30D2 bcs .L212 + 1087 04ec 1B1A subs r3, r3, r0 + 1088 .L128: + 1089 04ee 0B62 str r3, [r1, #32] + 1090 04f0 B2F85030 ldrh r3, [r2, #80] + 1091 04f4 02F20640 addw r0, r2, #1030 + 1092 04f8 10FA83F3 uxtah r3, r0, r3 + 1093 04fc 23F83590 strh r9, [r3, r5, lsl #3] @ movhi + 1094 0500 4B89 ldrh r3, [r1, #10] + 1095 0502 03EB0805 add r5, r3, r8 + 1096 0506 002F cmp r7, #0 + 1097 0508 3FF42BAE beq .L110 + 1098 050c 06EB4704 add r4, r6, r7, lsl #1 + ARM GAS /tmp/ccw23tFd.s page 20 + + + 1099 0510 3346 mov r3, r6 + 1100 0512 AD1B subs r5, r5, r6 + 1101 .L129: + 1102 0514 1888 ldrh r0, [r3] @ unaligned + 1103 0516 5853 strh r0, [r3, r5] @ movhi + 1104 0518 0233 adds r3, r3, #2 + 1105 051a 9C42 cmp r4, r3 + 1106 051c FAD1 bne .L129 + 1107 051e 20E6 b .L110 + 1108 .L148: + 1109 0520 5D08 lsrs r5, r3, #1 + 1110 0522 13F00103 ands r3, r3, #1 + 1111 0526 2E46 mov r6, r5 + 1112 0528 18BF it ne + 1113 052a 6E1C addne r6, r5, #1 + 1114 052c B602 lsls r6, r6, #10 + 1115 052e B6B2 uxth r6, r6 + 1116 0530 20F83460 strh r6, [r0, r4, lsl #3] @ movhi + 1117 0534 B2F85000 ldrh r0, [r2, #80] + 1118 0538 02F20646 addw r6, r2, #1030 + 1119 053c 16FA80F0 uxtah r0, r6, r0 + 1120 0540 03B1 cbz r3, .L151 + 1121 0542 0135 adds r5, r5, #1 + 1122 .L151: + 1123 0544 AD02 lsls r5, r5, #10 + 1124 0546 ABB2 uxth r3, r5 + 1125 0548 20F83430 strh r3, [r0, r4, lsl #3] @ movhi + 1126 054c 99E6 b .L143 + 1127 .L212: + 1128 054e 9CB2 uxth r4, r3 + 1129 0550 0134 adds r4, r4, #1 + 1130 0552 1FFA83F9 uxth r9, r3 + 1131 0556 6708 lsrs r7, r4, #1 + 1132 0558 0023 movs r3, #0 + 1133 055a C8E7 b .L128 + 1134 .L211: + 1135 055c 9CB2 uxth r4, r3 + 1136 055e 0134 adds r4, r4, #1 + 1137 0560 1FFA83FA uxth r10, r3 + 1138 0564 6708 lsrs r7, r4, #1 + 1139 0566 0023 movs r3, #0 + 1140 0568 F8E6 b .L121 + 1142 056a 00BF .section .text.USB_EPSetStall,"ax",%progbits + 1143 .align 1 + 1144 .p2align 2,,3 + 1145 .global USB_EPSetStall + 1146 .syntax unified + 1147 .thumb + 1148 .thumb_func + 1149 .fpu fpv4-sp-d16 + 1151 USB_EPSetStall: + 1152 @ args = 0, pretend = 0, frame = 0 + 1153 @ frame_needed = 0, uses_anonymous_args = 0 + 1154 @ link register save eliminated. + 1155 0000 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 1156 0002 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 1157 0004 8BB1 cbz r3, .L216 + ARM GAS /tmp/ccw23tFd.s page 21 + + + 1158 0006 30F82230 ldrh r3, [r0, r2, lsl #2] + 1159 000a 23F4E043 bic r3, r3, #28672 + 1160 000e 23F04003 bic r3, r3, #64 + 1161 0012 1B04 lsls r3, r3, #16 + 1162 0014 1B0C lsrs r3, r3, #16 + 1163 0016 83F01003 eor r3, r3, #16 + 1164 001a 43F40043 orr r3, r3, #32768 + 1165 001e 43F08003 orr r3, r3, #128 + 1166 0022 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1167 0026 0020 movs r0, #0 + 1168 0028 7047 bx lr + 1169 .L216: + 1170 002a 30F82230 ldrh r3, [r0, r2, lsl #2] + 1171 002e 23F48043 bic r3, r3, #16384 + 1172 0032 23F07003 bic r3, r3, #112 + 1173 0036 1B04 lsls r3, r3, #16 + 1174 0038 1B0C lsrs r3, r3, #16 + 1175 003a 83F48053 eor r3, r3, #4096 + 1176 003e 43F40043 orr r3, r3, #32768 + 1177 0042 43F08003 orr r3, r3, #128 + 1178 0046 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1179 004a 0020 movs r0, #0 + 1180 004c 7047 bx lr + 1182 004e 00BF .section .text.USB_EPClearStall,"ax",%progbits + 1183 .align 1 + 1184 .p2align 2,,3 + 1185 .global USB_EPClearStall + 1186 .syntax unified + 1187 .thumb + 1188 .thumb_func + 1189 .fpu fpv4-sp-d16 + 1191 USB_EPClearStall: + 1192 @ args = 0, pretend = 0, frame = 0 + 1193 @ frame_needed = 0, uses_anonymous_args = 0 + 1194 @ link register save eliminated. + 1195 0000 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2 + 1196 0002 3BBB cbnz r3, .L220 + 1197 0004 4B78 ldrb r3, [r1, #1] @ zero_extendqisi2 + 1198 0006 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 1199 0008 33B3 cbz r3, .L221 + 1200 000a 30F82230 ldrh r3, [r0, r2, lsl #2] + 1201 000e 5B06 lsls r3, r3, #25 + 1202 0010 0DD5 bpl .L222 + 1203 0012 30F82230 ldrh r3, [r0, r2, lsl #2] + 1204 0016 23F4E043 bic r3, r3, #28672 + 1205 001a 23F07003 bic r3, r3, #112 + 1206 001e 1B04 lsls r3, r3, #16 + 1207 0020 1B0C lsrs r3, r3, #16 + 1208 0022 43F40043 orr r3, r3, #32768 + 1209 0026 43F0C003 orr r3, r3, #192 + 1210 002a 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1211 .L222: + 1212 002e CB78 ldrb r3, [r1, #3] @ zero_extendqisi2 + 1213 0030 012B cmp r3, #1 + 1214 0032 0FD0 beq .L220 + 1215 0034 30F82230 ldrh r3, [r0, r2, lsl #2] + 1216 0038 23F4E043 bic r3, r3, #28672 + ARM GAS /tmp/ccw23tFd.s page 22 + + + 1217 003c 23F04003 bic r3, r3, #64 + 1218 0040 1B04 lsls r3, r3, #16 + 1219 0042 1B0C lsrs r3, r3, #16 + 1220 0044 83F02003 eor r3, r3, #32 + 1221 0048 43F40043 orr r3, r3, #32768 + 1222 004c 43F08003 orr r3, r3, #128 + 1223 0050 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1224 .L220: + 1225 0054 0020 movs r0, #0 + 1226 0056 7047 bx lr + 1227 .L221: + 1228 0058 30F82230 ldrh r3, [r0, r2, lsl #2] + 1229 005c 5B04 lsls r3, r3, #17 + 1230 005e 0DD5 bpl .L224 + 1231 0060 30F82230 ldrh r3, [r0, r2, lsl #2] + 1232 0064 23F4E043 bic r3, r3, #28672 + 1233 0068 23F07003 bic r3, r3, #112 + 1234 006c 1B04 lsls r3, r3, #16 + 1235 006e 1B0C lsrs r3, r3, #16 + 1236 0070 43F44043 orr r3, r3, #49152 + 1237 0074 43F08003 orr r3, r3, #128 + 1238 0078 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1239 .L224: + 1240 007c 30F82230 ldrh r3, [r0, r2, lsl #2] + 1241 0080 23F48043 bic r3, r3, #16384 + 1242 0084 23F07003 bic r3, r3, #112 + 1243 0088 1B04 lsls r3, r3, #16 + 1244 008a 1B0C lsrs r3, r3, #16 + 1245 008c 83F44053 eor r3, r3, #12288 + 1246 0090 43F40043 orr r3, r3, #32768 + 1247 0094 43F08003 orr r3, r3, #128 + 1248 0098 20F82230 strh r3, [r0, r2, lsl #2] @ movhi + 1249 009c 0020 movs r0, #0 + 1250 009e 7047 bx lr + 1252 .section .text.USB_StopDevice,"ax",%progbits + 1253 .align 1 + 1254 .p2align 2,,3 + 1255 .global USB_StopDevice + 1256 .syntax unified + 1257 .thumb + 1258 .thumb_func + 1259 .fpu fpv4-sp-d16 + 1261 USB_StopDevice: + 1262 @ args = 0, pretend = 0, frame = 0 + 1263 @ frame_needed = 0, uses_anonymous_args = 0 + 1264 @ link register save eliminated. + 1265 0000 0346 mov r3, r0 + 1266 0002 0121 movs r1, #1 + 1267 0004 0020 movs r0, #0 + 1268 0006 0322 movs r2, #3 + 1269 0008 A3F84010 strh r1, [r3, #64] @ movhi + 1270 000c A3F84400 strh r0, [r3, #68] @ movhi + 1271 0010 A3F84020 strh r2, [r3, #64] @ movhi + 1272 0014 7047 bx lr + 1274 0016 00BF .section .text.USB_SetDevAddress,"ax",%progbits + 1275 .align 1 + 1276 .p2align 2,,3 + ARM GAS /tmp/ccw23tFd.s page 23 + + + 1277 .global USB_SetDevAddress + 1278 .syntax unified + 1279 .thumb + 1280 .thumb_func + 1281 .fpu fpv4-sp-d16 + 1283 USB_SetDevAddress: + 1284 @ args = 0, pretend = 0, frame = 0 + 1285 @ frame_needed = 0, uses_anonymous_args = 0 + 1286 @ link register save eliminated. + 1287 0000 11B9 cbnz r1, .L236 + 1288 0002 8023 movs r3, #128 + 1289 0004 A0F84C30 strh r3, [r0, #76] @ movhi + 1290 .L236: + 1291 0008 0020 movs r0, #0 + 1292 000a 7047 bx lr + 1294 .section .text.USB_DevConnect,"ax",%progbits + 1295 .align 1 + 1296 .p2align 2,,3 + 1297 .global USB_DevConnect + 1298 .syntax unified + 1299 .thumb + 1300 .thumb_func + 1301 .fpu fpv4-sp-d16 + 1303 USB_DevConnect: + 1304 @ args = 0, pretend = 0, frame = 0 + 1305 @ frame_needed = 0, uses_anonymous_args = 0 + 1306 @ link register save eliminated. + 1307 0000 0246 mov r2, r0 + 1308 0002 0020 movs r0, #0 + 1309 0004 B2F85830 ldrh r3, [r2, #88] + 1310 0008 6FEA4343 mvn r3, r3, lsl #17 + 1311 000c 6FEA5343 mvn r3, r3, lsr #17 + 1312 0010 9BB2 uxth r3, r3 + 1313 0012 A2F85830 strh r3, [r2, #88] @ movhi + 1314 0016 7047 bx lr + 1316 .section .text.USB_DevDisconnect,"ax",%progbits + 1317 .align 1 + 1318 .p2align 2,,3 + 1319 .global USB_DevDisconnect + 1320 .syntax unified + 1321 .thumb + 1322 .thumb_func + 1323 .fpu fpv4-sp-d16 + 1325 USB_DevDisconnect: + 1326 @ args = 0, pretend = 0, frame = 0 + 1327 @ frame_needed = 0, uses_anonymous_args = 0 + 1328 @ link register save eliminated. + 1329 0000 0346 mov r3, r0 + 1330 0002 0020 movs r0, #0 + 1331 0004 B3F85820 ldrh r2, [r3, #88] + 1332 0008 C2F30E02 ubfx r2, r2, #0, #15 + 1333 000c A3F85820 strh r2, [r3, #88] @ movhi + 1334 0010 7047 bx lr + 1336 0012 00BF .section .text.USB_ReadInterrupts,"ax",%progbits + 1337 .align 1 + 1338 .p2align 2,,3 + 1339 .global USB_ReadInterrupts + ARM GAS /tmp/ccw23tFd.s page 24 + + + 1340 .syntax unified + 1341 .thumb + 1342 .thumb_func + 1343 .fpu fpv4-sp-d16 + 1345 USB_ReadInterrupts: + 1346 @ args = 0, pretend = 0, frame = 0 + 1347 @ frame_needed = 0, uses_anonymous_args = 0 + 1348 @ link register save eliminated. + 1349 0000 B0F84400 ldrh r0, [r0, #68] + 1350 0004 80B2 uxth r0, r0 + 1351 0006 7047 bx lr + 1353 .section .text.USB_ActivateRemoteWakeup,"ax",%progbits + 1354 .align 1 + 1355 .p2align 2,,3 + 1356 .global USB_ActivateRemoteWakeup + 1357 .syntax unified + 1358 .thumb + 1359 .thumb_func + 1360 .fpu fpv4-sp-d16 + 1362 USB_ActivateRemoteWakeup: + 1363 @ args = 0, pretend = 0, frame = 0 + 1364 @ frame_needed = 0, uses_anonymous_args = 0 + 1365 @ link register save eliminated. + 1366 0000 0246 mov r2, r0 + 1367 0002 0020 movs r0, #0 + 1368 0004 B2F84030 ldrh r3, [r2, #64] + 1369 0008 9BB2 uxth r3, r3 + 1370 000a 43F01003 orr r3, r3, #16 + 1371 000e A2F84030 strh r3, [r2, #64] @ movhi + 1372 0012 7047 bx lr + 1374 .section .text.USB_DeActivateRemoteWakeup,"ax",%progbits + 1375 .align 1 + 1376 .p2align 2,,3 + 1377 .global USB_DeActivateRemoteWakeup + 1378 .syntax unified + 1379 .thumb + 1380 .thumb_func + 1381 .fpu fpv4-sp-d16 + 1383 USB_DeActivateRemoteWakeup: + 1384 @ args = 0, pretend = 0, frame = 0 + 1385 @ frame_needed = 0, uses_anonymous_args = 0 + 1386 @ link register save eliminated. + 1387 0000 0246 mov r2, r0 + 1388 0002 0020 movs r0, #0 + 1389 0004 B2F84030 ldrh r3, [r2, #64] + 1390 0008 23F01003 bic r3, r3, #16 + 1391 000c 1B04 lsls r3, r3, #16 + 1392 000e 1B0C lsrs r3, r3, #16 + 1393 0010 A2F84030 strh r3, [r2, #64] @ movhi + 1394 0014 7047 bx lr + 1396 0016 00BF .section .text.USB_WritePMA,"ax",%progbits + 1397 .align 1 + 1398 .p2align 2,,3 + 1399 .global USB_WritePMA + 1400 .syntax unified + 1401 .thumb + 1402 .thumb_func + ARM GAS /tmp/ccw23tFd.s page 25 + + + 1403 .fpu fpv4-sp-d16 + 1405 USB_WritePMA: + 1406 @ args = 0, pretend = 0, frame = 0 + 1407 @ frame_needed = 0, uses_anonymous_args = 0 + 1408 @ link register save eliminated. + 1409 0000 02F58062 add r2, r2, #1024 + 1410 0004 0133 adds r3, r3, #1 + 1411 0006 1044 add r0, r0, r2 + 1412 0008 5A08 lsrs r2, r3, #1 + 1413 000a 08D0 beq .L242 + 1414 000c 0B46 mov r3, r1 + 1415 000e C01A subs r0, r0, r3 + 1416 0010 01EB4201 add r1, r1, r2, lsl #1 + 1417 .L244: + 1418 0014 1A88 ldrh r2, [r3] @ unaligned + 1419 0016 1A52 strh r2, [r3, r0] @ movhi + 1420 0018 0233 adds r3, r3, #2 + 1421 001a 9942 cmp r1, r3 + 1422 001c FAD1 bne .L244 + 1423 .L242: + 1424 001e 7047 bx lr + 1426 .section .text.USB_ReadPMA,"ax",%progbits + 1427 .align 1 + 1428 .p2align 2,,3 + 1429 .global USB_ReadPMA + 1430 .syntax unified + 1431 .thumb + 1432 .thumb_func + 1433 .fpu fpv4-sp-d16 + 1435 USB_ReadPMA: + 1436 @ args = 0, pretend = 0, frame = 0 + 1437 @ frame_needed = 0, uses_anonymous_args = 0 + 1438 0000 70B5 push {r4, r5, r6, lr} + 1439 0002 02F58062 add r2, r2, #1024 + 1440 0006 5E08 lsrs r6, r3, #1 + 1441 0008 1044 add r0, r0, r2 + 1442 000a 1CD0 beq .L258 + 1443 000c 6FF00105 mvn r5, #1 + 1444 0010 6D1A subs r5, r5, r1 + 1445 0012 8A1C adds r2, r1, #2 + 1446 0014 0544 add r5, r5, r0 + 1447 0016 B646 mov lr, r6 + 1448 .L249: + 1449 0018 35F802C0 ldrh ip, [r5, r2] + 1450 001c 0232 adds r2, r2, #2 + 1451 001e 1FFA8CFC uxth ip, ip + 1452 0022 4FEA1C24 lsr r4, ip, #8 + 1453 0026 BEF1010E subs lr, lr, #1 + 1454 002a 02F804CC strb ip, [r2, #-4] + 1455 002e 02F8034C strb r4, [r2, #-3] + 1456 0032 F1D1 bne .L249 + 1457 0034 00EB4602 add r2, r0, r6, lsl #1 + 1458 0038 DB07 lsls r3, r3, #31 + 1459 003a 01EB4601 add r1, r1, r6, lsl #1 + 1460 003e 44BF itt mi + 1461 0040 1388 ldrhmi r3, [r2] + 1462 0042 0B70 strbmi r3, [r1] + ARM GAS /tmp/ccw23tFd.s page 26 + + + 1463 0044 70BD pop {r4, r5, r6, pc} + 1464 .L258: + 1465 0046 0246 mov r2, r0 + 1466 0048 DB07 lsls r3, r3, #31 + 1467 004a 44BF itt mi + 1468 004c 1388 ldrhmi r3, [r2] + 1469 004e 0B70 strbmi r3, [r1] + 1470 0050 70BD pop {r4, r5, r6, pc} + 1472 0052 00BF .ident "GCC: (15:10.3-2021.07-4) 10.3.1 20210621 (release)" + ARM GAS /tmp/ccw23tFd.s page 27 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32g4xx_ll_usb.c + /tmp/ccw23tFd.s:16 .text.USB_CoreInit:0000000000000000 $t + /tmp/ccw23tFd.s:25 .text.USB_CoreInit:0000000000000000 USB_CoreInit + /tmp/ccw23tFd.s:37 .text.USB_EnableGlobalInt:0000000000000000 $t + /tmp/ccw23tFd.s:45 .text.USB_EnableGlobalInt:0000000000000000 USB_EnableGlobalInt + /tmp/ccw23tFd.s:57 .text.USB_DisableGlobalInt:0000000000000000 $t + /tmp/ccw23tFd.s:65 .text.USB_DisableGlobalInt:0000000000000000 USB_DisableGlobalInt + /tmp/ccw23tFd.s:78 .text.USB_SetCurrentMode:0000000000000000 $t + /tmp/ccw23tFd.s:86 .text.USB_SetCurrentMode:0000000000000000 USB_SetCurrentMode + /tmp/ccw23tFd.s:94 .text.USB_DevInit:0000000000000000 $t + /tmp/ccw23tFd.s:102 .text.USB_DevInit:0000000000000000 USB_DevInit + /tmp/ccw23tFd.s:120 .text.USB_ActivateEndpoint:0000000000000000 $t + /tmp/ccw23tFd.s:128 .text.USB_ActivateEndpoint:0000000000000000 USB_ActivateEndpoint + /tmp/ccw23tFd.s:144 .text.USB_ActivateEndpoint:000000000000002a $d + /tmp/ccw23tFd.s:148 .text.USB_ActivateEndpoint:000000000000002e $t + /tmp/ccw23tFd.s:437 .text.USB_ActivateEndpoint:0000000000000364 $d + /tmp/ccw23tFd.s:441 .text.USB_DeactivateEndpoint:0000000000000000 $t + /tmp/ccw23tFd.s:449 .text.USB_DeactivateEndpoint:0000000000000000 USB_DeactivateEndpoint + /tmp/ccw23tFd.s:607 .text.USB_EPStartXfer:0000000000000000 $t + /tmp/ccw23tFd.s:615 .text.USB_EPStartXfer:0000000000000000 USB_EPStartXfer + /tmp/ccw23tFd.s:1059 .text.USB_EPStartXfer:00000000000004a0 $d + /tmp/ccw23tFd.s:1061 .text.USB_EPStartXfer:00000000000004a4 $t + /tmp/ccw23tFd.s:1143 .text.USB_EPSetStall:0000000000000000 $t + /tmp/ccw23tFd.s:1151 .text.USB_EPSetStall:0000000000000000 USB_EPSetStall + /tmp/ccw23tFd.s:1183 .text.USB_EPClearStall:0000000000000000 $t + /tmp/ccw23tFd.s:1191 .text.USB_EPClearStall:0000000000000000 USB_EPClearStall + /tmp/ccw23tFd.s:1253 .text.USB_StopDevice:0000000000000000 $t + /tmp/ccw23tFd.s:1261 .text.USB_StopDevice:0000000000000000 USB_StopDevice + /tmp/ccw23tFd.s:1275 .text.USB_SetDevAddress:0000000000000000 $t + /tmp/ccw23tFd.s:1283 .text.USB_SetDevAddress:0000000000000000 USB_SetDevAddress + /tmp/ccw23tFd.s:1295 .text.USB_DevConnect:0000000000000000 $t + /tmp/ccw23tFd.s:1303 .text.USB_DevConnect:0000000000000000 USB_DevConnect + /tmp/ccw23tFd.s:1317 .text.USB_DevDisconnect:0000000000000000 $t + /tmp/ccw23tFd.s:1325 .text.USB_DevDisconnect:0000000000000000 USB_DevDisconnect + /tmp/ccw23tFd.s:1337 .text.USB_ReadInterrupts:0000000000000000 $t + /tmp/ccw23tFd.s:1345 .text.USB_ReadInterrupts:0000000000000000 USB_ReadInterrupts + /tmp/ccw23tFd.s:1354 .text.USB_ActivateRemoteWakeup:0000000000000000 $t + /tmp/ccw23tFd.s:1362 .text.USB_ActivateRemoteWakeup:0000000000000000 USB_ActivateRemoteWakeup + /tmp/ccw23tFd.s:1375 .text.USB_DeActivateRemoteWakeup:0000000000000000 $t + /tmp/ccw23tFd.s:1383 .text.USB_DeActivateRemoteWakeup:0000000000000000 USB_DeActivateRemoteWakeup + /tmp/ccw23tFd.s:1397 .text.USB_WritePMA:0000000000000000 $t + /tmp/ccw23tFd.s:1405 .text.USB_WritePMA:0000000000000000 USB_WritePMA + /tmp/ccw23tFd.s:1427 .text.USB_ReadPMA:0000000000000000 $t + /tmp/ccw23tFd.s:1435 .text.USB_ReadPMA:0000000000000000 USB_ReadPMA + +NO UNDEFINED SYMBOLS diff --git a/codice/build/stm32g4xx_ll_usb.o b/codice/build/stm32g4xx_ll_usb.o new file mode 100644 index 0000000000000000000000000000000000000000..02af8270b6ad4863ea98c739f753170260a0e47c GIT binary patch literal 6564 zcmcIoeM}qY8Gr817=sUROh_qs%N3K14B|Q9ENV9;7i>%_AVHy1)6tI@@LG2UTgJ&; zr4!eMbfinyR_h5~sc5-i{7vMQG;19Gnf))OeS9FxT3U#XC+p(HD?(Rl_T||L^wmN9 zXFnFA{kD_oerS;>IV%0u_537jpOM$DuYt^eaha+*kgfI~oI5UZjNcF=;t|TDfkl5# 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