diff --git a/codice/Core/Inc/.bassofono.h.swp b/codice/Core/Inc/.bassofono.h.swp
new file mode 100644
index 0000000..fdac3a0
Binary files /dev/null and b/codice/Core/Inc/.bassofono.h.swp differ
diff --git a/codice/Core/Inc/bassofono.h b/codice/Core/Inc/bassofono.h
index 843b452..820ea51 100644
--- a/codice/Core/Inc/bassofono.h
+++ b/codice/Core/Inc/bassofono.h
@@ -5,34 +5,42 @@
 #include "rx.h"
 #include "tx.h"
 
+/*
 #define TX_TYPE_NONE		0
 #define TX_TYPE_DAC		1
 #define TX_TYPE_PWM		2
 #define TX_TYPE_SI5351		3
 // #define TX_TYPE			TX_TYPE_SI5351
 #define TX_TYPE			TX_TYPE_NONE
+*/
 
-#define	IF_TYPE_NOIF		0
-#define	IF_TYPE_LOMIX		1
+#define	IF_TYPE_NOIF		0	// la frequenza del dac o del dds e' pari alla frequenza impostata
+#define	IF_TYPE_LOMIX		1	
 #define	IF_TYPE			IF_TYPE_NOIF
 
 #define LO_TYPE_FIX		0
 #define LO_TYPE_SI5351		1
 #define LO_TYPE			LO_TYPE_SI5351
 
+#define LO_TYPE_FIX_FREQ	0	// frequenza di LO
+
 #define CLOCK			(168000000UL)
 
+/* 
 // RX ADC
 #define ADC_CLOCK		(700000L) 	// (168000000/((47,5+12,5)*4)
-#define OVERSAMPLING		(2)
-#define ADC_SAMPLE_RATE		(ADC_CLOCK/OVERSAMPLING)
+#define ADC_OVERSAMPLING	(2)
+#define ADC_SAMPLE_RATE		(ADC_CLOCK/ADC_OVERSAMPLING)
 #define ADC_BUFFER_SIZE         (1024)
-#define SAMPLES_BUFFER_RATE	(ADC_SAMPLE_RATE/ADC_BUFFER_SIZE)
+#define ADC_SAMPLES_BUFFER_RATE	(ADC_SAMPLE_RATE/ADC_BUFFER_SIZE)
+*/
 
+/*
 // TX DAC
 #define TX_DAC_SAMPLE_RATE	(CLOCK/480)
 #define TX_DAC_BUFFER_SIZE	(1024)
 #define TX_DAC_BUFFER_RATE	(TX_DAC_SAMPLE_RATE/TX_DAC_BUFFER_SIZE)
+*/
 
 #define MOD_DC          0
 #define MOD_LSB         1
@@ -43,9 +51,11 @@
 #define STATUS_TX	1
 #define STATUS_SQ	2
 
+/*
 // === DAC ===
-#define DAC_DIVISOR		7680
-#define DAC_SAMPLE_RATE		(CLOCK/DAC_DIVISOR)
+#define RX_DAC_DIVISOR		7680
+#define RX_DAC_SAMPLE_RATE		(CLOCK/RX_DAC_DIVISOR)
+*/
 
 // === UART ===
 #define RX_CMD_RB_SIZE			(32)
@@ -84,7 +94,7 @@ extern char uart_tx_buf[UART_TX_BUFFER_SIZE];
 extern uint16_t uart_tx_buf_in_idx;
 
 // rx adc
-extern uint16_t adc_buffer[ADC_BUFFER_SIZE];
+extern uint16_t adc_buffer[RX_ADC_BUFFER_SIZE];
 
 // tx dac
 extern q31_t tx_dac_buffer[2][TX_DAC_BUFFER_SIZE];
diff --git a/codice/Core/Inc/interface.h b/codice/Core/Inc/interface.h
index 9880c23..6ffdf75 100644
--- a/codice/Core/Inc/interface.h
+++ b/codice/Core/Inc/interface.h
@@ -48,7 +48,7 @@
 #define MENU_NAME_ROW		0
 #define MENU_NAME_COL		0
 
-#define DISPLAY_BL_DIM		0
+#define DISPLAY_BL_DIM		50
 #define DISPLAY_ROWS		6
 #define DISPLAY_COLS		14
 
@@ -110,3 +110,6 @@ char * valToStr(uint32_t val, char *buf, uint8_t bufSize, char sepChar);
 uint8_t sat_subu8b(uint8_t x, uint8_t y);
 void menu_item_up(void);
 void menu_item_down(void);
+
+void display_backlight_on(void);
+void display_backlight_off(void);
diff --git a/codice/Core/Inc/rx.h b/codice/Core/Inc/rx.h
index f407fe6..bcd035c 100644
--- a/codice/Core/Inc/rx.h
+++ b/codice/Core/Inc/rx.h
@@ -4,8 +4,16 @@
 #include <stdint.h>
 #include <arm_math.h>
 
+// RX ADC
+#define RX_ADC_CLOCK               (700000L)       // (168000000/((47,5+12,5)*4)
+#define RX_ADC_OVERSAMPLING        (2)
+#define RX_ADC_SAMPLE_RATE         (RX_ADC_CLOCK/RX_ADC_OVERSAMPLING)
+#define RX_ADC_BUFFER_SIZE         (1024)
+#define RX_ADC_SAMPLES_BUFFER_RATE (RX_ADC_SAMPLE_RATE/RX_ADC_BUFFER_SIZE)
+
+
 #define NCO2_INCREMENT          (343597383L)
-#define NCO2_FREQUENCY          (DAC_SAMPLE_RATE/((0xFFFFFFFF)/NCO2_INCREMENT))
+#define NCO2_FREQUENCY          (RX_DAC_SAMPLE_RATE/((0xFFFFFFFF)/NCO2_INCREMENT))
 
 // 1° stadio
 // decimazione del singolo stadio
@@ -18,7 +26,7 @@
 #define MIXED_SAMPLES_2M_RINGBUFFER_SIZE        (MIXED_SAMPLES_RINGBUFFER_SIZE / 2)
 #define MIXED_SAMPLES_2M_RINGBUFFER_SIZE_MASK   (MIXED_SAMPLES_2M_RINGBUFFER_SIZE - 1)
 
-#define ST1_OUT_SAMPLE_RATE     (ADC_SAMPLE_RATE/(MS_DECIMATION_FACTOR*2))
+#define ST1_OUT_SAMPLE_RATE     (RX_ADC_SAMPLE_RATE/(MS_DECIMATION_FACTOR*2))
 
 // 2° stadio
 #define ST2_BUFFER_SIZE         (256)
@@ -32,14 +40,18 @@
 // audio filter
 #define AUDIO_FILTER_TAP_NUM    128
 #define AUDIO_FILTER_FREQ_DEF   (1250)
-#define AUDIO_FILTER_FREQ_MAX   (DAC_SAMPLE_RATE/2)
+#define AUDIO_FILTER_FREQ_MAX   (RX_DAC_SAMPLE_RATE/2)
 #define AUDIO_FILTER_BW_DEF     (2000)
-#define AUDIO_FILTER_BW_MAX     (DAC_SAMPLE_RATE/2)
+#define AUDIO_FILTER_BW_MAX     (RX_DAC_SAMPLE_RATE/2)
 #define AUDIO_FILTER_BETA_DEF   (16)
 #define AUDIO_FILTER_BLOCK_SIZE LF_BUFFER_SIZE
 
 #define RX_SMETER_SCALE		4
 
+// === DAC ===
+#define RX_DAC_DIVISOR          7680
+#define RX_DAC_SAMPLE_RATE              (CLOCK/RX_DAC_DIVISOR)
+
 extern uint8_t rx_signal, rx_signal_last;
 extern q31_t rx_nco1_increment;
 
diff --git a/codice/Core/Inc/tx.h b/codice/Core/Inc/tx.h
index e0f7bea..1bd1482 100644
--- a/codice/Core/Inc/tx.h
+++ b/codice/Core/Inc/tx.h
@@ -4,10 +4,22 @@
 #include <stdint.h>
 #include <arm_math.h>
 
+#define TX_TYPE_NONE            0
+#define TX_TYPE_DAC             1
+#define TX_TYPE_PWM             2
+#define TX_TYPE_SI5351          3
+// #define TX_TYPE                      TX_TYPE_SI5351
+#define TX_TYPE                 TX_TYPE_NONE
+
 #define TX_AUDIO_FILTER_INTERPOLATION_FACTOR (16)
 #define TX_AUDIO_FILTER_BLOCK_SIZE (1024)
 #define TX_AUDIO_FILTER_TAP_NUM (128)
 
+// TX DAC
+#define TX_DAC_SAMPLE_RATE      (CLOCK/480)
+#define TX_DAC_BUFFER_SIZE      (1024)
+#define TX_DAC_BUFFER_RATE      (TX_DAC_SAMPLE_RATE/TX_DAC_BUFFER_SIZE)
+
 extern uint8_t tx_signal, tx_signal_last;
 extern q31_t tx_nco1_increment;
 
diff --git a/codice/Core/Src/bassofono.c b/codice/Core/Src/bassofono.c
index 179f368..d5ffc2d 100644
--- a/codice/Core/Src/bassofono.c
+++ b/codice/Core/Src/bassofono.c
@@ -60,7 +60,7 @@ char uart_tx_buf[UART_TX_BUFFER_SIZE];
 uint16_t uart_tx_buf_in_idx;
 
 // bufffah
-uint16_t adc_buffer[ADC_BUFFER_SIZE];
+uint16_t adc_buffer[RX_ADC_BUFFER_SIZE];
 
 q31_t if_I[LF_BUFFER_SIZE];
 q31_t if_Q[LF_BUFFER_SIZE];
@@ -81,7 +81,7 @@ int32_t set_nco1_freq(int32_t freq){
 	int64_t tmp_increment;
 	if(modulation == MOD_USB) freq += (NCO2_FREQUENCY);
 	else if(modulation == MOD_LSB) freq -= (NCO2_FREQUENCY);
-	tmp_increment = ((int64_t)freq * 0x100000000LL)/ADC_SAMPLE_RATE;
+	tmp_increment = ((int64_t)freq * 0x100000000LL)/RX_ADC_SAMPLE_RATE;
 	return (int32_t)tmp_increment;
 }
 
@@ -180,8 +180,8 @@ void state_set_default(void){
 // diag
 
 void diag(void){
-	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"ADC sample rate: %d\nADC oversampling: %d\n", ADC_SAMPLE_RATE, OVERSAMPLING);
-	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"ADC buffer size: %d\n1st decimation factor: %d\n", ADC_BUFFER_SIZE, MS_DECIMATION_FACTOR * 2);
+	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"ADC sample rate: %d\nADC oversampling: %d\n", RX_ADC_SAMPLE_RATE, RX_ADC_OVERSAMPLING);
+	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"ADC buffer size: %d\n1st decimation factor: %d\n", RX_ADC_BUFFER_SIZE, MS_DECIMATION_FACTOR * 2);
 	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"1st out sample rate: %d\n", ST1_OUT_SAMPLE_RATE);
 	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"2st buffer size: %d\n2st decimation factor: %d\n", ST2_BUFFER_SIZE, ST2_DECIMATION_FACTOR * 2);
 	uart_tx_buf_in_idx += sprintf(uart_tx_buf,"2st out sample rate: %d\n", ST2_OUT_SAMPLE_RATE);
diff --git a/codice/Core/Src/interface.c b/codice/Core/Src/interface.c
index 2183f37..e6e8fc1 100644
--- a/codice/Core/Src/interface.c
+++ b/codice/Core/Src/interface.c
@@ -46,7 +46,7 @@ struct menu_item items[] = {
 	{MENU_PAGE_ALL, "   Signal  ", 	   TYP_NED, 13,	4,  0,	 0,	0,	0,	SAT,	"S",  "",	&s_meter,	 	&set_dummy,	&print_bar},
 	{MENU_PAGE_ALL, "   TX tab  ",     TYP_NED, 3,	5,  0,	 0,	0,	0,	SAT,	"",  "",	"PTT", 		&set_dummy,	&print_string},
 	{MENU_PAGE_ALL, "   Tabs    ",     TYP_NED, 3,	5,  4,	 0,	0,	0,	SAT,	"",  "",	"SET", 		&set_dummy,	&print_string},
-	{MENU_PAGE_ALL, "   Tabs    ",     TYP_NED, 1,	5,  9,	 0,	0,	0,	SAT,	"",  "",	"-", 		&set_dummy,	&print_string},
+	{MENU_PAGE_ALL, "   Tabs    ",     TYP_NED, 2,	5,  9,	 0,	0,	0,	SAT,	"",  "",	"BL", 		&set_dummy,	&print_string},
 	{MENU_PAGE_ALL, "   Tabs    ",     TYP_NED, 1,	5,  12,	 0,	0,	0,	SAT,	"",  "",	"+", 		&set_dummy,	&print_string},
 };
 
@@ -307,8 +307,9 @@ void tab_up(uint8_t tab){
 			display_update_state();
                         break;
                case 2:
-                        encoder_increment();
-                        click();
+//                        encoder_increment();
+//                        click();
+			display_backlight_on();
                         break;
                case 3:
                         encoder_decrement();
@@ -323,6 +324,9 @@ void tab_down(uint8_t tab){
                         stop_transmit();
                         start_receive();
                         break;
+                case 2:
+                	display_backlight_off();
+                	break;
         }
 
 }
@@ -339,7 +343,7 @@ void display_init(void){
 
 	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%ds",DISPLAY_STANDBY_TIMER);
 	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[150,100q");
-	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%db",DISPLAY_BL_DIM);
+	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%db",0);
 //	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\a");
 	clear_display();
 }
@@ -424,3 +428,11 @@ void click(void){
 void clear_display(void){
 	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\f");
 }
+
+void display_backlight_on(void){
+	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%db",DISPLAY_BL_DIM);
+}
+
+void display_backlight_off(void){
+	uart_tx_buf_in_idx += sprintf(uart_tx_buf+uart_tx_buf_in_idx,"\x1B[%db",0);
+}
diff --git a/codice/Core/Src/main.c b/codice/Core/Src/main.c
index b957adc..fada472 100644
--- a/codice/Core/Src/main.c
+++ b/codice/Core/Src/main.c
@@ -45,17 +45,20 @@
 
 /* Private variables ---------------------------------------------------------*/
 ADC_HandleTypeDef hadc1;
+ADC_HandleTypeDef hadc2;
 DMA_HandleTypeDef hdma_adc1;
 
 CORDIC_HandleTypeDef hcordic;
 
 DAC_HandleTypeDef hdac1;
+DAC_HandleTypeDef hdac3;
 DMA_HandleTypeDef hdma_dac1_ch1;
 DMA_HandleTypeDef hdma_dac1_ch2;
 
 I2C_HandleTypeDef hi2c1;
 
 OPAMP_HandleTypeDef hopamp1;
+OPAMP_HandleTypeDef hopamp2;
 
 TIM_HandleTypeDef htim6;
 TIM_HandleTypeDef htim7;
@@ -90,6 +93,9 @@ static void MX_USART1_UART_Init(void);
 static void MX_TIM8_Init(void);
 static void MX_OPAMP1_Init(void);
 static void MX_I2C1_Init(void);
+static void MX_ADC2_Init(void);
+static void MX_DAC3_Init(void);
+static void MX_OPAMP2_Init(void);
 /* USER CODE BEGIN PFP */
 
 /* USER CODE END PFP */
@@ -248,7 +254,7 @@ void stop_transmit(void){
 void start_receive(void){
         receive = 1;
         // ADC
-        HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, ADC_BUFFER_SIZE);
+        HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_buffer, RX_ADC_BUFFER_SIZE);
 
         // DAC
         HAL_TIM_Base_Start(&htim6);
@@ -338,6 +344,9 @@ int main(void)
   MX_TIM8_Init();
   MX_OPAMP1_Init();
   MX_I2C1_Init();
+  MX_ADC2_Init();
+  MX_DAC3_Init();
+  MX_OPAMP2_Init();
   /* USER CODE BEGIN 2 */
 
 	HAL_Delay(10);
@@ -379,7 +388,7 @@ int main(void)
 	if(receive){
 		if(rx_adc_buffer_ready){
 //			HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, SET);
-			rx_mixer(adc_buffer, ADC_BUFFER_SIZE, if_I, if_Q, rx_nco1_increment);
+			rx_mixer(adc_buffer, RX_ADC_BUFFER_SIZE, if_I, if_Q, rx_nco1_increment);
 //			HAL_GPIO_WritePin(OUT_GPIO_Port, OUT_Pin, RESET);
 			rx_adc_buffer_ready = 0;
 		}
@@ -581,6 +590,63 @@ static void MX_ADC1_Init(void)
 
 }
 
+/**
+  * @brief ADC2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_ADC2_Init(void)
+{
+
+  /* USER CODE BEGIN ADC2_Init 0 */
+
+  /* USER CODE END ADC2_Init 0 */
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN ADC2_Init 1 */
+
+  /* USER CODE END ADC2_Init 1 */
+  /** Common config
+  */
+  hadc2.Instance = ADC2;
+  hadc2.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4;
+  hadc2.Init.Resolution = ADC_RESOLUTION_12B;
+  hadc2.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc2.Init.GainCompensation = 0;
+  hadc2.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc2.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc2.Init.LowPowerAutoWait = DISABLE;
+  hadc2.Init.ContinuousConvMode = DISABLE;
+  hadc2.Init.NbrOfConversion = 1;
+  hadc2.Init.DiscontinuousConvMode = DISABLE;
+  hadc2.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+  hadc2.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+  hadc2.Init.DMAContinuousRequests = DISABLE;
+  hadc2.Init.Overrun = ADC_OVR_DATA_PRESERVED;
+  hadc2.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** Configure Regular Channel
+  */
+  sConfig.Channel = ADC_CHANNEL_VOPAMP2;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc2, &sConfig) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN ADC2_Init 2 */
+
+  /* USER CODE END ADC2_Init 2 */
+
+}
+
 /**
   * @brief CORDIC Initialization Function
   * @param None
@@ -667,6 +733,51 @@ static void MX_DAC1_Init(void)
 
 }
 
+/**
+  * @brief DAC3 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_DAC3_Init(void)
+{
+
+  /* USER CODE BEGIN DAC3_Init 0 */
+
+  /* USER CODE END DAC3_Init 0 */
+
+  DAC_ChannelConfTypeDef sConfig = {0};
+
+  /* USER CODE BEGIN DAC3_Init 1 */
+
+  /* USER CODE END DAC3_Init 1 */
+  /** DAC Initialization
+  */
+  hdac3.Instance = DAC3;
+  if (HAL_DAC_Init(&hdac3) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /** DAC channel OUT1 config
+  */
+  sConfig.DAC_HighFrequency = DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC;
+  sConfig.DAC_DMADoubleDataMode = DISABLE;
+  sConfig.DAC_SignedFormat = DISABLE;
+  sConfig.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_DISABLE;
+  sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
+  sConfig.DAC_Trigger2 = DAC_TRIGGER_NONE;
+  sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_DISABLE;
+  sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_INTERNAL;
+  sConfig.DAC_UserTrimming = DAC_TRIMMING_FACTORY;
+  if (HAL_DAC_ConfigChannel(&hdac3, &sConfig, DAC_CHANNEL_1) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN DAC3_Init 2 */
+
+  /* USER CODE END DAC3_Init 2 */
+
+}
+
 /**
   * @brief I2C1 Initialization Function
   * @param None
@@ -747,6 +858,38 @@ static void MX_OPAMP1_Init(void)
 
 }
 
+/**
+  * @brief OPAMP2 Initialization Function
+  * @param None
+  * @retval None
+  */
+static void MX_OPAMP2_Init(void)
+{
+
+  /* USER CODE BEGIN OPAMP2_Init 0 */
+
+  /* USER CODE END OPAMP2_Init 0 */
+
+  /* USER CODE BEGIN OPAMP2_Init 1 */
+
+  /* USER CODE END OPAMP2_Init 1 */
+  hopamp2.Instance = OPAMP2;
+  hopamp2.Init.PowerMode = OPAMP_POWERMODE_NORMALSPEED;
+  hopamp2.Init.Mode = OPAMP_FOLLOWER_MODE;
+  hopamp2.Init.NonInvertingInput = OPAMP_NONINVERTINGINPUT_IO0;
+  hopamp2.Init.InternalOutput = ENABLE;
+  hopamp2.Init.TimerControlledMuxmode = OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE;
+  hopamp2.Init.UserTrimming = OPAMP_TRIMMING_FACTORY;
+  if (HAL_OPAMP_Init(&hopamp2) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  /* USER CODE BEGIN OPAMP2_Init 2 */
+
+  /* USER CODE END OPAMP2_Init 2 */
+
+}
+
 /**
   * @brief TIM6 Initialization Function
   * @param None
diff --git a/codice/Core/Src/rx.c b/codice/Core/Src/rx.c
index ca22988..9c01039 100644
--- a/codice/Core/Src/rx.c
+++ b/codice/Core/Src/rx.c
@@ -250,8 +250,8 @@ void audio_filter_init(void){
 void audio_filter_generate_coeffs(int32_t *Coeffs, uint32_t freq, uint32_t bw, uint8_t beta){
         double FPCoeff[AUDIO_FILTER_TAP_NUM + 1];
         double normalized_center_freq, normalized_bw, fp_beta;
-        normalized_center_freq = (double)(freq*2)/DAC_SAMPLE_RATE;
-        normalized_bw = (double)(bw*2)/DAC_SAMPLE_RATE;
+        normalized_center_freq = (double)(freq*2)/RX_DAC_SAMPLE_RATE;
+        normalized_bw = (double)(bw*2)/RX_DAC_SAMPLE_RATE;
         fp_beta = beta/4;
         RectWinFIR(FPCoeff, AUDIO_FILTER_TAP_NUM, firBPF, normalized_center_freq, normalized_bw);
         FIRFilterWindow(FPCoeff, AUDIO_FILTER_TAP_NUM, wtKAISER, fp_beta);
diff --git a/codice/Core/Src/stm32g4xx_hal_msp.c b/codice/Core/Src/stm32g4xx_hal_msp.c
index ab0274c..a1a9607 100644
--- a/codice/Core/Src/stm32g4xx_hal_msp.c
+++ b/codice/Core/Src/stm32g4xx_hal_msp.c
@@ -88,6 +88,8 @@ void HAL_MspInit(void)
   /* USER CODE END MspInit 1 */
 }
 
+static uint32_t HAL_RCC_ADC12_CLK_ENABLED=0;
+
 /**
 * @brief ADC MSP Initialization
 * This function configures the hardware resources used in this example
@@ -112,7 +114,10 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
     }
 
     /* Peripheral clock enable */
-    __HAL_RCC_ADC12_CLK_ENABLE();
+    HAL_RCC_ADC12_CLK_ENABLED++;
+    if(HAL_RCC_ADC12_CLK_ENABLED==1){
+      __HAL_RCC_ADC12_CLK_ENABLE();
+    }
 
     /* ADC1 DMA Init */
     /* ADC1 Init */
@@ -139,6 +144,33 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
 
   /* USER CODE END ADC1_MspInit 1 */
   }
+  else if(hadc->Instance==ADC2)
+  {
+  /* USER CODE BEGIN ADC2_MspInit 0 */
+
+  /* USER CODE END ADC2_MspInit 0 */
+
+  /** Initializes the peripherals clocks
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC12;
+    PeriphClkInit.Adc12ClockSelection = RCC_ADC12CLKSOURCE_SYSCLK;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    HAL_RCC_ADC12_CLK_ENABLED++;
+    if(HAL_RCC_ADC12_CLK_ENABLED==1){
+      __HAL_RCC_ADC12_CLK_ENABLE();
+    }
+    /* ADC2 interrupt Init */
+    HAL_NVIC_SetPriority(ADC1_2_IRQn, 0, 0);
+    HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
+  /* USER CODE BEGIN ADC2_MspInit 1 */
+
+  /* USER CODE END ADC2_MspInit 1 */
+  }
 
 }
 
@@ -156,17 +188,51 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
 
   /* USER CODE END ADC1_MspDeInit 0 */
     /* Peripheral clock disable */
-    __HAL_RCC_ADC12_CLK_DISABLE();
+    HAL_RCC_ADC12_CLK_ENABLED--;
+    if(HAL_RCC_ADC12_CLK_ENABLED==0){
+      __HAL_RCC_ADC12_CLK_DISABLE();
+    }
 
     /* ADC1 DMA DeInit */
     HAL_DMA_DeInit(hadc->DMA_Handle);
 
     /* ADC1 interrupt DeInit */
-    HAL_NVIC_DisableIRQ(ADC1_2_IRQn);
+  /* USER CODE BEGIN ADC1:ADC1_2_IRQn disable */
+    /**
+    * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
+    * Be aware, disabling shared interrupt may affect other IPs
+    */
+    /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
+  /* USER CODE END ADC1:ADC1_2_IRQn disable */
+
   /* USER CODE BEGIN ADC1_MspDeInit 1 */
 
   /* USER CODE END ADC1_MspDeInit 1 */
   }
+  else if(hadc->Instance==ADC2)
+  {
+  /* USER CODE BEGIN ADC2_MspDeInit 0 */
+
+  /* USER CODE END ADC2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    HAL_RCC_ADC12_CLK_ENABLED--;
+    if(HAL_RCC_ADC12_CLK_ENABLED==0){
+      __HAL_RCC_ADC12_CLK_DISABLE();
+    }
+
+    /* ADC2 interrupt DeInit */
+  /* USER CODE BEGIN ADC2:ADC1_2_IRQn disable */
+    /**
+    * Uncomment the line below to disable the "ADC1_2_IRQn" interrupt
+    * Be aware, disabling shared interrupt may affect other IPs
+    */
+    /* HAL_NVIC_DisableIRQ(ADC1_2_IRQn); */
+  /* USER CODE END ADC2:ADC1_2_IRQn disable */
+
+  /* USER CODE BEGIN ADC2_MspDeInit 1 */
+
+  /* USER CODE END ADC2_MspDeInit 1 */
+  }
 
 }
 
@@ -280,6 +346,17 @@ void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
 
   /* USER CODE END DAC1_MspInit 1 */
   }
+  else if(hdac->Instance==DAC3)
+  {
+  /* USER CODE BEGIN DAC3_MspInit 0 */
+
+  /* USER CODE END DAC3_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DAC3_CLK_ENABLE();
+  /* USER CODE BEGIN DAC3_MspInit 1 */
+
+  /* USER CODE END DAC3_MspInit 1 */
+  }
 
 }
 
@@ -312,6 +389,17 @@ void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
 
   /* USER CODE END DAC1_MspDeInit 1 */
   }
+  else if(hdac->Instance==DAC3)
+  {
+  /* USER CODE BEGIN DAC3_MspDeInit 0 */
+
+  /* USER CODE END DAC3_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DAC3_CLK_DISABLE();
+  /* USER CODE BEGIN DAC3_MspDeInit 1 */
+
+  /* USER CODE END DAC3_MspDeInit 1 */
+  }
 
 }
 
@@ -420,6 +508,25 @@ void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef* hopamp)
 
   /* USER CODE END OPAMP1_MspInit 1 */
   }
+  else if(hopamp->Instance==OPAMP2)
+  {
+  /* USER CODE BEGIN OPAMP2_MspInit 0 */
+
+  /* USER CODE END OPAMP2_MspInit 0 */
+
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**OPAMP2 GPIO Configuration
+    PA7     ------> OPAMP2_VINP
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+  /* USER CODE BEGIN OPAMP2_MspInit 1 */
+
+  /* USER CODE END OPAMP2_MspInit 1 */
+  }
 
 }
 
@@ -447,6 +554,21 @@ void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef* hopamp)
 
   /* USER CODE END OPAMP1_MspDeInit 1 */
   }
+  else if(hopamp->Instance==OPAMP2)
+  {
+  /* USER CODE BEGIN OPAMP2_MspDeInit 0 */
+
+  /* USER CODE END OPAMP2_MspDeInit 0 */
+
+    /**OPAMP2 GPIO Configuration
+    PA7     ------> OPAMP2_VINP
+    */
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_7);
+
+  /* USER CODE BEGIN OPAMP2_MspDeInit 1 */
+
+  /* USER CODE END OPAMP2_MspDeInit 1 */
+  }
 
 }
 
diff --git a/codice/Core/Src/stm32g4xx_it.c b/codice/Core/Src/stm32g4xx_it.c
index b50cc44..33a0c20 100644
--- a/codice/Core/Src/stm32g4xx_it.c
+++ b/codice/Core/Src/stm32g4xx_it.c
@@ -58,6 +58,7 @@
 /* External variables --------------------------------------------------------*/
 extern DMA_HandleTypeDef hdma_adc1;
 extern ADC_HandleTypeDef hadc1;
+extern ADC_HandleTypeDef hadc2;
 extern DMA_HandleTypeDef hdma_dac1_ch1;
 extern DMA_HandleTypeDef hdma_dac1_ch2;
 extern TIM_HandleTypeDef htim7;
@@ -270,6 +271,7 @@ void ADC1_2_IRQHandler(void)
 
   /* USER CODE END ADC1_2_IRQn 0 */
   HAL_ADC_IRQHandler(&hadc1);
+  HAL_ADC_IRQHandler(&hadc2);
   /* USER CODE BEGIN ADC1_2_IRQn 1 */
 
   /* USER CODE END ADC1_2_IRQn 1 */