ARM GAS /tmp/ccDUJO2W.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "StatisticsFunctions.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.arm_entropy_f32,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .global arm_entropy_f32 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv4-sp-d16 24 arm_entropy_f32: 25 .LFB148: 26 .file 1 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Title: arm_logsumexp_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Description: LogSumExp 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Target Processor: Cortex-M and Cortex-A cores 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * -------------------------------------------------------------------- */ 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /* 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * SPDX-License-Identifier: Apache-2.0 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * not use this file except in compliance with the License. 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * You may obtain a copy of the License at 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * www.apache.org/licenses/LICENSE-2.0 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Unless required by applicable law or agreed to in writing, software 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * See the License for the specific language governing permissions and 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * limitations under the License. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** */ 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #include "arm_math.h" 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #include 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #include 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /** ARM GAS /tmp/ccDUJO2W.s page 2 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * @addtogroup groupStats 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * @{ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** */ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * @brief Entropy 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * @param[in] pSrcA Array of input values. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * @param[in] blockSize Number of samples in the input array. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * @return Entropy -Sum(p ln p) 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** */ 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #include "arm_helium_utils.h" 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #include "arm_vec_math.h" 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** uint32_t blkCnt; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32_t accum=0.0f,p; 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt = blockSize; 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** f32x4_t vSum = vdupq_n_f32(0.0f); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /* Compute 4 outputs at a time */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt = blockSize >> 2U; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** while (blkCnt > 0U) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** f32x4_t vecIn = vld1q(pSrcA); 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** vSum = vaddq_f32(vSum, vmulq(vecIn, vlogq_f32(vecIn))); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /* 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Decrement the blockSize loop counter 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** * Advance vector source and destination pointers 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** pSrcA += 4; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt --; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum = vecAddAcrossF32Mve(vSum); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** /* Tail */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt = blockSize & 0x3; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** while(blkCnt > 0) 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** p = *pSrcA++; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum += p * logf(p); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt--; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } ARM GAS /tmp/ccDUJO2W.s page 3 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** return (-accum); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #else 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #include "NEMath.h" 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** const float32_t *pIn; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** uint32_t blkCnt; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32_t accum, p; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32x4_t accumV; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32x2_t accumV2; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32x4_t tmpV, tmpV2; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** pIn = pSrcA; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum = 0.0f; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accumV = vdupq_n_f32(0.0f); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt = blockSize >> 2; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** while(blkCnt > 0) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** tmpV = vld1q_f32(pIn); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** pIn += 4; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** tmpV2 = vlogq_f32(tmpV); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accumV = vmlaq_f32(accumV, tmpV, tmpV2); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt--; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt = blockSize & 3; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** while(blkCnt > 0) 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** p = *pIn++; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum += p * logf(p); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt--; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** return(-accum); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** #else 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize) 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { ARM GAS /tmp/ccDUJO2W.s page 4 27 .loc 1 146 0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 .LVL0: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** const float32_t *pIn; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** uint32_t blkCnt; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** float32_t accum, p; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** pIn = pSrcA; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt = blockSize; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum = 0.0f; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** while(blkCnt > 0) 32 .loc 1 156 0 33 0000 A9B1 cbz r1, .L4 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** const float32_t *pIn; 34 .loc 1 146 0 35 0002 38B5 push {r3, r4, r5, lr} 36 .LCFI0: 37 .cfi_def_cfa_offset 16 38 .cfi_offset 3, -16 39 .cfi_offset 4, -12 40 .cfi_offset 5, -8 41 .cfi_offset 14, -4 42 0004 2DED028B vpush.64 {d8} 43 .LCFI1: 44 .cfi_def_cfa_offset 24 45 .cfi_offset 80, -24 46 .cfi_offset 81, -20 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 47 .loc 1 154 0 48 0008 DFED0A8A vldr.32 s17, .L11 49 000c 0546 mov r5, r0 50 000e 0C46 mov r4, r1 51 .LVL1: 52 .L3: 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** p = *pIn++; 53 .loc 1 158 0 54 0010 B5EC018A vldmia.32 r5!, {s16} 55 .LVL2: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** accum += p * logf(p); 56 .loc 1 159 0 57 0014 B0EE480A vmov.f32 s0, s16 58 0018 FFF7FEFF bl logf 59 .LVL3: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 60 .loc 1 156 0 61 001c 013C subs r4, r4, #1 62 .LVL4: 63 .loc 1 159 0 64 001e E0EE088A vfma.f32 s17, s0, s16 65 .LVL5: 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 66 .loc 1 156 0 ARM GAS /tmp/ccDUJO2W.s page 5 67 0022 F5D1 bne .L3 68 0024 B1EE680A vneg.f32 s0, s17 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** blkCnt--; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** return(-accum); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** } 69 .loc 1 166 0 70 0028 BDEC028B vldm sp!, {d8} 71 .LCFI2: 72 .cfi_restore 80 73 .cfi_restore 81 74 .cfi_def_cfa_offset 16 75 .LVL6: 76 002c 38BD pop {r3, r4, r5, pc} 77 .LVL7: 78 .L4: 79 .LCFI3: 80 .cfi_def_cfa_offset 0 81 .cfi_restore 3 82 .cfi_restore 4 83 .cfi_restore 5 84 .cfi_restore 14 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c **** { 85 .loc 1 156 0 86 002e 9FED010A vldr.32 s0, .L11 87 .loc 1 166 0 88 0032 7047 bx lr 89 .L12: 90 .align 2 91 .L11: 92 0034 00000000 .word 0 93 .cfi_endproc 94 .LFE148: 96 .global __aeabi_dmul 97 .global __aeabi_dadd 98 .section .text.arm_entropy_f64,"ax",%progbits 99 .align 1 100 .p2align 2,,3 101 .global arm_entropy_f64 102 .syntax unified 103 .thumb 104 .thumb_func 105 .fpu fpv4-sp-d16 107 arm_entropy_f64: 108 .LFB149: 109 .file 2 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Title: arm_logsumexp_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Description: LogSumExp 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Target Processor: Cortex-M and Cortex-A cores 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * -------------------------------------------------------------------- */ ARM GAS /tmp/ccDUJO2W.s page 6 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** /* 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved. 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * SPDX-License-Identifier: Apache-2.0 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * not use this file except in compliance with the License. 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * You may obtain a copy of the License at 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * www.apache.org/licenses/LICENSE-2.0 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * Unless required by applicable law or agreed to in writing, software 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * See the License for the specific language governing permissions and 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * limitations under the License. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** */ 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** #include "arm_math.h" 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** #include 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** #include 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * @addtogroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * @{ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * @brief Entropy 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * @param[in] pSrcA Array of input values. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * @param[in] blockSize Number of samples in the input array. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * @return Entropy -Sum(p ln p) 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** * 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** */ 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize) 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** { 110 .loc 2 46 0 111 .cfi_startproc 112 @ args = 0, pretend = 0, frame = 8 113 @ frame_needed = 0, uses_anonymous_args = 0 114 .LVL8: 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** const float64_t *pIn; 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** uint32_t blkCnt; 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** float64_t accum, p; 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** pIn = pSrcA; 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** blkCnt = blockSize; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** accum = 0.0f; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** while(blkCnt > 0) 115 .loc 2 56 0 116 0000 21B3 cbz r1, .L16 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** const float64_t *pIn; 117 .loc 2 46 0 ARM GAS /tmp/ccDUJO2W.s page 7 118 0002 F0B5 push {r4, r5, r6, r7, lr} 119 .LCFI4: 120 .cfi_def_cfa_offset 20 121 .cfi_offset 4, -20 122 .cfi_offset 5, -16 123 .cfi_offset 6, -12 124 .cfi_offset 7, -8 125 .cfi_offset 14, -4 126 0004 0546 mov r5, r0 127 0006 83B0 sub sp, sp, #12 128 .LCFI5: 129 .cfi_def_cfa_offset 32 130 0008 0C46 mov r4, r1 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 131 .loc 2 54 0 132 000a 0026 movs r6, #0 133 000c 0027 movs r7, #0 134 .LVL9: 135 .L15: 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** { 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** p = *pIn++; 136 .loc 2 58 0 137 000e F5E80223 ldrd r2, [r5], #8 138 .LVL10: 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** accum += p * log(p); 139 .loc 2 60 0 140 0012 43EC102B vmov d0, r2, r3 141 0016 CDE90023 strd r2, [sp] 142 001a FFF7FEFF bl log 143 .LVL11: 144 001e DDE90023 ldrd r2, [sp] 145 0022 51EC100B vmov r0, r1, d0 146 0026 FFF7FEFF bl __aeabi_dmul 147 .LVL12: 148 002a 0246 mov r2, r0 149 002c 0B46 mov r3, r1 150 002e 3046 mov r0, r6 151 0030 3946 mov r1, r7 152 0032 FFF7FEFF bl __aeabi_dadd 153 .LVL13: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** { 154 .loc 2 56 0 155 0036 013C subs r4, r4, #1 156 .LVL14: 157 .loc 2 60 0 158 0038 0646 mov r6, r0 159 .LVL15: 160 003a 0F46 mov r7, r1 161 .LVL16: 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** { 162 .loc 2 56 0 163 003c E7D1 bne .L15 164 003e 0246 mov r2, r0 165 0040 01F10043 add r3, r1, #-2147483648 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** blkCnt--; ARM GAS /tmp/ccDUJO2W.s page 8 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** } 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** return(-accum); 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** } 166 .loc 2 67 0 167 0044 43EC102B vmov d0, r2, r3 168 0048 03B0 add sp, sp, #12 169 .LCFI6: 170 .cfi_def_cfa_offset 20 171 @ sp needed 172 004a F0BD pop {r4, r5, r6, r7, pc} 173 .LVL17: 174 .L16: 175 .LCFI7: 176 .cfi_def_cfa_offset 0 177 .cfi_restore 4 178 .cfi_restore 5 179 .cfi_restore 6 180 .cfi_restore 7 181 .cfi_restore 14 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c **** { 182 .loc 2 56 0 183 004c 0022 movs r2, #0 184 004e 0023 movs r3, #0 185 .loc 2 67 0 186 0050 43EC102B vmov d0, r2, r3 187 0054 7047 bx lr 188 .cfi_endproc 189 .LFE149: 191 0056 00BF .section .text.arm_kullback_leibler_f32,"ax",%progbits 192 .align 1 193 .p2align 2,,3 194 .global arm_kullback_leibler_f32 195 .syntax unified 196 .thumb 197 .thumb_func 198 .fpu fpv4-sp-d16 200 arm_kullback_leibler_f32: 201 .LFB150: 202 .file 3 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibl 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Title: arm_logsumexp_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Description: LogSumExp 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Target Processor: Cortex-M and Cortex-A cores 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * -------------------------------------------------------------------- */ 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** /* 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * SPDX-License-Identifier: Apache-2.0 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * not use this file except in compliance with the License. 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * You may obtain a copy of the License at ARM GAS /tmp/ccDUJO2W.s page 9 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * www.apache.org/licenses/LICENSE-2.0 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Unless required by applicable law or agreed to in writing, software 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * See the License for the specific language governing permissions and 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * limitations under the License. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** */ 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #include "arm_math.h" 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #include 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #include 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @addtogroup groupStats 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @{ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** */ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @brief Kullback-Leibler 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Distribution A may contain 0 with Neon version. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Result will be right but some exception flags will be set. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Distribution B must not contain 0 probability. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @param[in] *pSrcA points to an array of input values for probaility distribution A. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @param[in] *pSrcB points to an array of input values for probaility distribution B. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @param[in] blockSize number of samples in the input array. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * @return Kullback-Leibler divergence D(A || B) 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #include "arm_helium_utils.h" 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #include "arm_vec_math.h" 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSi 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** uint32_t blkCnt; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32_t accum, pA,pB; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt = blockSize; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum = 0.0f; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** f32x4_t vSum = vdupq_n_f32(0.0f); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt = blockSize >> 2; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** while(blkCnt > 0) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** f32x4_t vecA = vld1q(pSrcA); 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** f32x4_t vecB = vld1q(pSrcB); ARM GAS /tmp/ccDUJO2W.s page 10 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** f32x4_t vRatio; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** vRatio = vdiv_f32(vecB, vecA); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** vSum = vaddq_f32(vSum, vmulq(vecA, vlogq_f32(vRatio))); 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** /* 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Decrement the blockSize loop counter 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** * Advance vector source and destination pointers 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pSrcA += 4; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pSrcB += 4; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt --; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum = vecAddAcrossF32Mve(vSum); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt = blockSize & 3; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** while(blkCnt > 0) 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pA = *pSrcA++; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pB = *pSrcB++; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum += pA * logf(pB / pA); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt--; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** return(-accum); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #else 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #include "NEMath.h" 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSi 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** const float32_t *pInA, *pInB; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** uint32_t blkCnt; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32_t accum, pA,pB; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32x4_t accumV; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32x2_t accumV2; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32x4_t tmpVA, tmpVB,tmpV; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pInA = pSrcA; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pInB = pSrcB; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum = 0.0f; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accumV = vdupq_n_f32(0.0f); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt = blockSize >> 2; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** while(blkCnt > 0) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** tmpVA = vld1q_f32(pInA); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pInA += 4; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 11 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** tmpVB = vld1q_f32(pInB); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pInB += 4; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** tmpV = vinvq_f32(tmpVA); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** tmpVB = vmulq_f32(tmpVB, tmpV); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** tmpVB = vlogq_f32(tmpVB); 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accumV = vmlaq_f32(accumV, tmpVA, tmpVB); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt--; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt = blockSize & 3; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** while(blkCnt > 0) 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pA = *pInA++; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pB = *pInB++; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum += pA * logf(pB/pA); 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt--; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** return(-accum); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** #else 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSi 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 203 .loc 3 163 0 204 .cfi_startproc 205 @ args = 0, pretend = 0, frame = 0 206 @ frame_needed = 0, uses_anonymous_args = 0 207 .LVL18: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** const float32_t *pInA, *pInB; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** uint32_t blkCnt; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** float32_t accum, pA,pB; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pInA = pSrcA; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pInB = pSrcB; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt = blockSize; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum = 0.0f; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** while(blkCnt > 0) 208 .loc 3 174 0 209 0000 C2B1 cbz r2, .L25 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** const float32_t *pInA, *pInB; 210 .loc 3 163 0 211 0002 70B5 push {r4, r5, r6, lr} 212 .LCFI8: 213 .cfi_def_cfa_offset 16 214 .cfi_offset 4, -16 ARM GAS /tmp/ccDUJO2W.s page 12 215 .cfi_offset 5, -12 216 .cfi_offset 6, -8 217 .cfi_offset 14, -4 218 0004 2DED028B vpush.64 {d8} 219 .LCFI9: 220 .cfi_def_cfa_offset 24 221 .cfi_offset 80, -24 222 .cfi_offset 81, -20 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 223 .loc 3 172 0 224 0008 DFED0C8A vldr.32 s17, .L31 225 000c 0546 mov r5, r0 226 000e 0E46 mov r6, r1 227 0010 1446 mov r4, r2 228 .LVL19: 229 .L24: 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pA = *pInA++; 230 .loc 3 176 0 231 0012 B5EC018A vldmia.32 r5!, {s16} 232 .LVL20: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** pB = *pInB++; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** accum += pA * logf(pB / pA); 233 .loc 3 178 0 234 0016 B6EC010A vldmia.32 r6!, {s0} 235 .LVL21: 236 001a 80EE080A vdiv.f32 s0, s0, s16 237 001e FFF7FEFF bl logf 238 .LVL22: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 239 .loc 3 174 0 240 0022 013C subs r4, r4, #1 241 .LVL23: 242 .loc 3 178 0 243 0024 E0EE088A vfma.f32 s17, s0, s16 244 .LVL24: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 245 .loc 3 174 0 246 0028 F3D1 bne .L24 247 002a B1EE680A vneg.f32 s0, s17 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** blkCnt--; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** return(-accum); 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** } 248 .loc 3 185 0 249 002e BDEC028B vldm sp!, {d8} 250 .LCFI10: 251 .cfi_restore 80 252 .cfi_restore 81 253 .cfi_def_cfa_offset 16 254 .LVL25: 255 0032 70BD pop {r4, r5, r6, pc} 256 .LVL26: 257 .L25: ARM GAS /tmp/ccDUJO2W.s page 13 258 .LCFI11: 259 .cfi_def_cfa_offset 0 260 .cfi_restore 4 261 .cfi_restore 5 262 .cfi_restore 6 263 .cfi_restore 14 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c **** { 264 .loc 3 174 0 265 0034 9FED010A vldr.32 s0, .L31 266 .loc 3 185 0 267 0038 7047 bx lr 268 .L32: 269 003a 00BF .align 2 270 .L31: 271 003c 00000000 .word 0 272 .cfi_endproc 273 .LFE150: 275 .global __aeabi_ddiv 276 .section .text.arm_kullback_leibler_f64,"ax",%progbits 277 .align 1 278 .p2align 2,,3 279 .global arm_kullback_leibler_f64 280 .syntax unified 281 .thumb 282 .thumb_func 283 .fpu fpv4-sp-d16 285 arm_kullback_leibler_f64: 286 .LFB151: 287 .file 4 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibl 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Title: arm_logsumexp_f64.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Description: LogSumExp 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Target Processor: Cortex-M and Cortex-A cores 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * -------------------------------------------------------------------- */ 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** /* 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Copyright (C) 2010-2020 ARM Limited or its affiliates. All rights reserved. 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * SPDX-License-Identifier: Apache-2.0 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * not use this file except in compliance with the License. 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * You may obtain a copy of the License at 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * www.apache.org/licenses/LICENSE-2.0 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * Unless required by applicable law or agreed to in writing, software 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * See the License for the specific language governing permissions and 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * limitations under the License. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** */ 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** #include "arm_math.h" 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** #include ARM GAS /tmp/ccDUJO2W.s page 14 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** #include 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @addtogroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @{ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** */ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @brief Kullback-Leibler 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @param[in] *pSrcA points to an array of input values for probaility distribution A. 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @param[in] *pSrcB points to an array of input values for probaility distribution B. 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @param[in] blockSize number of samples in the input array. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * @return Kullback-Leibler divergence D(A || B) 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** * 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** */ 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, const float64_t * pSrcB, uint32_t block 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** { 288 .loc 4 47 0 289 .cfi_startproc 290 @ args = 0, pretend = 0, frame = 0 291 @ frame_needed = 0, uses_anonymous_args = 0 292 .LVL27: 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** const float64_t *pInA, *pInB; 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** uint32_t blkCnt; 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** float64_t accum, pA,pB; 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** pInA = pSrcA; 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** pInB = pSrcB; 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** blkCnt = blockSize; 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** accum = 0.0f; 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** while(blkCnt > 0) 293 .loc 4 58 0 294 0000 5AB3 cbz r2, .L36 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** const float64_t *pInA, *pInB; 295 .loc 4 47 0 296 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 297 .LCFI12: 298 .cfi_def_cfa_offset 32 299 .cfi_offset 4, -32 300 .cfi_offset 5, -28 301 .cfi_offset 6, -24 302 .cfi_offset 7, -20 303 .cfi_offset 8, -16 304 .cfi_offset 9, -12 305 .cfi_offset 10, -8 306 .cfi_offset 14, -4 307 0006 0546 mov r5, r0 308 0008 8A46 mov r10, r1 309 000a 1446 mov r4, r2 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 310 .loc 4 56 0 311 000c 4FF00008 mov r8, #0 312 0010 4FF00009 mov r9, #0 ARM GAS /tmp/ccDUJO2W.s page 15 313 .LVL28: 314 .L35: 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** { 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** pA = *pInA++; 315 .loc 4 60 0 316 0014 F5E80267 ldrd r6, [r5], #8 317 .LVL29: 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** pB = *pInB++; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** accum += pA * log(pB / pA); 318 .loc 4 63 0 319 0018 FAE80201 ldrd r0, [r10], #8 320 .LVL30: 321 001c 3246 mov r2, r6 322 001e 3B46 mov r3, r7 323 0020 FFF7FEFF bl __aeabi_ddiv 324 .LVL31: 325 0024 41EC100B vmov d0, r0, r1 326 0028 FFF7FEFF bl log 327 .LVL32: 328 002c 3246 mov r2, r6 329 002e 3B46 mov r3, r7 330 0030 51EC100B vmov r0, r1, d0 331 0034 FFF7FEFF bl __aeabi_dmul 332 .LVL33: 333 0038 0246 mov r2, r0 334 003a 0B46 mov r3, r1 335 003c 4046 mov r0, r8 336 003e 4946 mov r1, r9 337 0040 FFF7FEFF bl __aeabi_dadd 338 .LVL34: 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** { 339 .loc 4 58 0 340 0044 013C subs r4, r4, #1 341 .LVL35: 342 .loc 4 63 0 343 0046 8046 mov r8, r0 344 .LVL36: 345 0048 8946 mov r9, r1 346 .LVL37: 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** { 347 .loc 4 58 0 348 004a E3D1 bne .L35 349 004c 0246 mov r2, r0 350 004e 01F10043 add r3, r1, #-2147483648 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** blkCnt--; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** } 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** return(-accum); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** } 351 .loc 4 69 0 352 0052 43EC102B vmov d0, r2, r3 353 0056 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 354 .LVL38: 355 .L36: 356 .LCFI13: ARM GAS /tmp/ccDUJO2W.s page 16 357 .cfi_def_cfa_offset 0 358 .cfi_restore 4 359 .cfi_restore 5 360 .cfi_restore 6 361 .cfi_restore 7 362 .cfi_restore 8 363 .cfi_restore 9 364 .cfi_restore 10 365 .cfi_restore 14 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c **** { 366 .loc 4 58 0 367 005a 0022 movs r2, #0 368 .LVL39: 369 005c 0023 movs r3, #0 370 .loc 4 69 0 371 005e 43EC102B vmov d0, r2, r3 372 0062 7047 bx lr 373 .cfi_endproc 374 .LFE151: 376 .section .text.arm_logsumexp_dot_prod_f32,"ax",%progbits 377 .align 1 378 .p2align 2,,3 379 .global arm_logsumexp_dot_prod_f32 380 .syntax unified 381 .thumb 382 .thumb_func 383 .fpu fpv4-sp-d16 385 arm_logsumexp_dot_prod_f32: 386 .LFB152: 387 .file 5 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_ 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Title: arm_logsumexp_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Description: LogSumExp 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Target Processor: Cortex-M and Cortex-A cores 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * -------------------------------------------------------------------- */ 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** /* 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * SPDX-License-Identifier: Apache-2.0 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * not use this file except in compliance with the License. 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * You may obtain a copy of the License at 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * www.apache.org/licenses/LICENSE-2.0 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Unless required by applicable law or agreed to in writing, software 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * See the License for the specific language governing permissions and 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * limitations under the License. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** */ 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** #include "arm_math.h" ARM GAS /tmp/ccDUJO2W.s page 17 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** #include 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** #include 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @addtogroup groupStats 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @{ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** */ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @brief Dot product with log arithmetic 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * Vectors are containing the log of the samples 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @param[in] *pSrcA points to the first input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @param[in] *pSrcB points to the second input vector 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @param[in] blockSize number of samples in each vector 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @param[in] *pTmpBuffer temporary buffer of length blockSize 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * @return The log of the dot product. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** * 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA, 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** const float32_t * pSrcB, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** uint32_t blockSize, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** float32_t *pTmpBuffer) 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** { 388 .loc 5 56 0 389 .cfi_startproc 390 @ args = 0, pretend = 0, frame = 0 391 @ frame_needed = 0, uses_anonymous_args = 0 392 .LVL40: 393 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 394 .LCFI14: 395 .cfi_def_cfa_offset 24 396 .cfi_offset 3, -24 397 .cfi_offset 4, -20 398 .cfi_offset 5, -16 399 .cfi_offset 6, -12 400 .cfi_offset 7, -8 401 .cfi_offset 14, -4 402 0002 1746 mov r7, r2 403 0004 1E46 mov r6, r3 404 0006 2DED028B vpush.64 {d8} 405 .LCFI15: 406 .cfi_def_cfa_offset 32 407 .cfi_offset 80, -32 408 .cfi_offset 81, -28 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** float32_t result; 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** arm_add_f32((float32_t*)pSrcA, (float32_t*)pSrcB, pTmpBuffer, blockSize); 409 .loc 5 58 0 410 000a 1A46 mov r2, r3 411 .LVL41: 412 .LBB16: 413 .LBB17: ARM GAS /tmp/ccDUJO2W.s page 18 414 .file 6 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32. 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Title: arm_logsumexp_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Description: LogSumExp 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Target Processor: Cortex-M and Cortex-A cores 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * -------------------------------------------------------------------- */ 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** /* 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * SPDX-License-Identifier: Apache-2.0 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * not use this file except in compliance with the License. 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * You may obtain a copy of the License at 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * www.apache.org/licenses/LICENSE-2.0 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Unless required by applicable law or agreed to in writing, software 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * See the License for the specific language governing permissions and 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * limitations under the License. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** */ 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #include "arm_math.h" 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #include 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #include 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** /** 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * @addtogroup groupStats 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * @{ 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** */ 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * @brief Computation of the LogSumExp 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * In probabilistic computations, the dynamic of the probability values can be very 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * wide because they come from gaussian functions. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * To avoid underflow and overflow issues, the values are represented by their log. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * In this representation, multiplying the original exp values is easy : their logs are added. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * But adding the original exp values is requiring some special handling and it is the 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * goal of the LogSumExp function. 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * If the values are x1...xn, the function is computing: 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * rounding issues are minimised. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * The max xm of the values is extracted and the function is computing: 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * xm + ln(exp(x1 - xm) + ... + exp(xn - xm)) 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * @param[in] *in Pointer to an array of input values. ARM GAS /tmp/ccDUJO2W.s page 19 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * @param[in] blockSize Number of samples in the input array. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * @return LogSumExp 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #include "arm_helium_utils.h" 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #include "arm_vec_math.h" 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t maxVal; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** const float32_t *pIn; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** int32_t blkCnt; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t accum=0.0f; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t tmp; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** arm_max_no_idx_f32((float32_t *) in, blockSize, &maxVal); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn = in; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** f32x4_t vSum = vdupq_n_f32(0.0f); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize >> 2; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** f32x4_t vecIn = vld1q(pIn); 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** f32x4_t vecExp; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** vecExp = vexpq_f32(vsubq_n_f32(vecIn, maxVal)); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** vSum = vaddq_f32(vSum, vecExp); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** /* 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Decrement the blockSize loop counter 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** * Advance vector source and destination pointers 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn += 4; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt --; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** /* sum + log */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = vecAddAcrossF32Mve(vSum); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize & 0x3; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmp = *pIn++; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum += expf(tmp - maxVal); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 20 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = maxVal + log(accum); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** return (accum); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #else 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #include "NEMath.h" 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t maxVal; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t tmp; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32x4_t tmpV, tmpVb; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32x4_t maxValV; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** uint32x4_t idxV; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32x4_t accumV; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32x2_t accumV2; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** const float32_t *pIn; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** uint32_t blkCnt; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t accum; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn = in; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** if (blockSize <= 3) 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxVal = *pIn++; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmp = *pIn++; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** if (tmp > maxVal) 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxVal = tmp; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** else 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxValV = vld1q_f32(pIn); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn += 4; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = (blockSize - 4) >> 2; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmpVb = vld1q_f32(pIn); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn += 4; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** idxV = vcgtq_f32(tmpVb, maxValV); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxValV = vbslq_f32(idxV, tmpVb, maxValV ); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 21 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accumV2 = vpmax_f32(vget_low_f32(maxValV),vget_high_f32(maxValV)); 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accumV2 = vpmax_f32(accumV2,accumV2); 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxVal = vget_lane_f32(accumV2, 0) ; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = (blockSize - 4) & 3; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmp = *pIn++; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** if (tmp > maxVal) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxVal = tmp; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxValV = vdupq_n_f32(maxVal); 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn = in; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = 0; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accumV = vdupq_n_f32(0.0f); 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize >> 2; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmpV = vld1q_f32(pIn); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn += 4; 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmpV = vsubq_f32(tmpV, maxValV); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmpV = vexpq_f32(tmpV); 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accumV = vaddq_f32(accumV, tmpV); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV)); 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize & 0x3; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmp = *pIn++; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum += expf(tmp - maxVal); 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = maxVal + logf(accum); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** return(accum); ARM GAS /tmp/ccDUJO2W.s page 22 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** #else 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize) 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t maxVal; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t tmp; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** const float32_t *pIn; 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** uint32_t blkCnt; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t accum; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn = in; 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxVal = *pIn++; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 415 .loc 6 242 0 416 000c 7C1E subs r4, r7, #1 417 .LBE17: 418 .LBE16: 419 .loc 5 58 0 420 000e 3B46 mov r3, r7 421 .LVL42: 422 0010 FFF7FEFF bl arm_add_f32 423 .LVL43: 424 .LBB20: 425 .LBB18: 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 426 .loc 6 241 0 427 0014 351D adds r5, r6, #4 428 .LVL44: 429 0016 96ED008A vldr.32 s16, [r6] 430 .LVL45: 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 431 .loc 6 244 0 432 001a 2CB3 cbz r4, .L43 433 001c 2A46 mov r2, r5 434 001e 2346 mov r3, r4 435 .LVL46: 436 .L44: 437 0020 F2EC017A vldmia.32 r2!, {s15} 438 .LVL47: 439 0024 B4EEE78A vcmpe.f32 s16, s15 440 0028 F1EE10FA vmrs APSR_nzcv, FPSCR 441 002c B8BF it lt 442 002e B0EE678A vmovlt.f32 s16, s15 443 .LVL48: 444 0032 013B subs r3, r3, #1 445 .LVL49: 446 0034 F4D1 bne .L44 447 .LVL50: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmp = *pIn++; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** if (tmp > maxVal) 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** maxVal = tmp; ARM GAS /tmp/ccDUJO2W.s page 23 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt = blockSize; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** pIn = in; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = 0; 448 .loc 6 258 0 449 0036 DFED118A vldr.32 s17, .L54 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 450 .loc 6 259 0 451 003a 17B9 cbnz r7, .L46 452 003c 0BE0 b .L45 453 .LVL51: 454 .L53: 455 003e 0435 adds r5, r5, #4 456 .LVL52: 457 0040 013C subs r4, r4, #1 458 .LVL53: 459 .L46: 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** tmp = *pIn++; 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum += expf(tmp - maxVal); 460 .loc 6 262 0 461 0042 15ED010A vldr.32 s0, [r5, #-4] 462 0046 30EE480A vsub.f32 s0, s0, s16 463 004a FFF7FEFF bl expf 464 .LVL54: 465 004e 78EE808A vadd.f32 s17, s17, s0 466 .LVL55: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 467 .loc 6 259 0 468 0052 002C cmp r4, #0 469 0054 F3D1 bne .L53 470 .LVL56: 471 .L45: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** accum = maxVal + logf(accum); 472 .loc 6 266 0 473 0056 B0EE680A vmov.f32 s0, s17 474 005a FFF7FEFF bl logf 475 .LVL57: 476 005e 38EE000A vadd.f32 s0, s16, s0 477 .LBE18: 478 .LBE20: 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** result = arm_logsumexp_f32(pTmpBuffer, blockSize); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** return(result); 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c **** } 479 .loc 5 62 0 480 0062 BDEC028B vldm sp!, {d8} 481 .LCFI16: 482 .cfi_remember_state 483 .cfi_restore 80 ARM GAS /tmp/ccDUJO2W.s page 24 484 .cfi_restore 81 485 .cfi_def_cfa_offset 24 486 0066 F8BD pop {r3, r4, r5, r6, r7, pc} 487 .LVL58: 488 .L43: 489 .LCFI17: 490 .cfi_restore_state 491 .LBB21: 492 .LBB19: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 493 .loc 6 262 0 494 0068 15ED010A vldr.32 s0, [r5, #-4] 495 006c 30EE480A vsub.f32 s0, s0, s16 496 0070 FFF7FEFF bl expf 497 .LVL59: 498 0074 F0EE408A vmov.f32 s17, s0 499 .LVL60: 500 0078 EDE7 b .L45 501 .L55: 502 007a 00BF .align 2 503 .L54: 504 007c 00000000 .word 0 505 .LBE19: 506 .LBE21: 507 .cfi_endproc 508 .LFE152: 510 .section .text.arm_logsumexp_f32,"ax",%progbits 511 .align 1 512 .p2align 2,,3 513 .global arm_logsumexp_f32 514 .syntax unified 515 .thumb 516 .thumb_func 517 .fpu fpv4-sp-d16 519 arm_logsumexp_f32: 520 .LFB153: 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t maxVal; 521 .loc 6 231 0 522 .cfi_startproc 523 @ args = 0, pretend = 0, frame = 0 524 @ frame_needed = 0, uses_anonymous_args = 0 525 .LVL61: 526 0000 38B5 push {r3, r4, r5, lr} 527 .LCFI18: 528 .cfi_def_cfa_offset 16 529 .cfi_offset 3, -16 530 .cfi_offset 4, -12 531 .cfi_offset 5, -8 532 .cfi_offset 14, -4 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 533 .loc 6 242 0 534 0002 4C1E subs r4, r1, #1 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** float32_t maxVal; 535 .loc 6 231 0 536 0004 2DED028B vpush.64 {d8} 537 .LCFI19: 538 .cfi_def_cfa_offset 24 ARM GAS /tmp/ccDUJO2W.s page 25 539 .cfi_offset 80, -24 540 .cfi_offset 81, -20 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 541 .loc 6 241 0 542 0008 051D adds r5, r0, #4 543 .LVL62: 544 000a 90ED008A vldr.32 s16, [r0] 545 .LVL63: 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 546 .loc 6 244 0 547 000e 2CB3 cbz r4, .L57 548 0010 2A46 mov r2, r5 549 0012 2346 mov r3, r4 550 .LVL64: 551 .L58: 552 0014 F2EC017A vldmia.32 r2!, {s15} 553 .LVL65: 554 0018 B4EEE78A vcmpe.f32 s16, s15 555 001c F1EE10FA vmrs APSR_nzcv, FPSCR 556 0020 B8BF it lt 557 0022 B0EE678A vmovlt.f32 s16, s15 558 .LVL66: 559 0026 013B subs r3, r3, #1 560 .LVL67: 561 0028 F4D1 bne .L58 562 .LVL68: 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** while(blkCnt > 0) 563 .loc 6 258 0 564 002a DFED118A vldr.32 s17, .L68 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 565 .loc 6 259 0 566 002e 11B9 cbnz r1, .L60 567 0030 0BE0 b .L59 568 .LVL69: 569 .L67: 570 0032 0435 adds r5, r5, #4 571 .LVL70: 572 0034 013C subs r4, r4, #1 573 .LVL71: 574 .L60: 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 575 .loc 6 262 0 576 0036 15ED010A vldr.32 s0, [r5, #-4] 577 003a 30EE480A vsub.f32 s0, s0, s16 578 003e FFF7FEFF bl expf 579 .LVL72: 580 0042 78EE808A vadd.f32 s17, s17, s0 581 .LVL73: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** { 582 .loc 6 259 0 583 0046 002C cmp r4, #0 584 0048 F3D1 bne .L67 585 .LVL74: 586 .L59: 587 .loc 6 266 0 588 004a B0EE680A vmov.f32 s0, s17 589 004e FFF7FEFF bl logf ARM GAS /tmp/ccDUJO2W.s page 26 590 .LVL75: 591 0052 30EE080A vadd.f32 s0, s0, s16 592 .LVL76: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** return(accum); 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** } 593 .loc 6 269 0 594 0056 BDEC028B vldm sp!, {d8} 595 .LCFI20: 596 .cfi_remember_state 597 .cfi_restore 80 598 .cfi_restore 81 599 .cfi_def_cfa_offset 16 600 .LVL77: 601 005a 38BD pop {r3, r4, r5, pc} 602 .LVL78: 603 .L57: 604 .LCFI21: 605 .cfi_restore_state 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c **** blkCnt--; 606 .loc 6 262 0 607 005c 15ED010A vldr.32 s0, [r5, #-4] 608 0060 30EE480A vsub.f32 s0, s0, s16 609 0064 FFF7FEFF bl expf 610 .LVL79: 611 0068 F0EE408A vmov.f32 s17, s0 612 .LVL80: 613 006c EDE7 b .L59 614 .L69: 615 006e 00BF .align 2 616 .L68: 617 0070 00000000 .word 0 618 .cfi_endproc 619 .LFE153: 621 .section .text.arm_max_f32,"ax",%progbits 622 .align 1 623 .p2align 2,,3 624 .global arm_max_f32 625 .syntax unified 626 .thumb 627 .thumb_func 628 .fpu fpv4-sp-d16 630 arm_max_f32: 631 .LFB154: 632 .file 7 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Title: arm_max_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Description: Maximum value of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Target Processor: Cortex-M and Cortex-A cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. ARM GAS /tmp/ccDUJO2W.s page 27 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #include 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #endif 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @ingroup groupStats 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @defgroup Max Maximum 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** Computes the maximum value of an array of data. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** The function returns both the maximum value and its position within the array. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** There are separate functions for floating-point, Q31, Q15, and Q7 data types. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @addtogroup Max 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @{ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @brief Maximum value of a floating-point vector. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @param[in] pSrc points to the input vector 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @param[in] blockSize number of samples in input vector 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @param[out] pResult maximum value returned here 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @param[out] pIndex index of maximum value returned here 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** @return none 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** void arm_max_f32( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** const float32_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t blockSize, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t * pResult, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t * pIndex) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t blkCnt; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** f32x4_t vecSrc; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** f32x4_t curExtremValVec = vdupq_n_f32(F32_MIN); ARM GAS /tmp/ccDUJO2W.s page 28 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t maxValue = F32_MIN; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t idx = blockSize; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t indexVec; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t curExtremIdxVec; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t curIdx = 0; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** mve_pred16_t p0; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t tmp; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** indexVec = vidupq_wb_u32(&curIdx, 1); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** curExtremIdxVec = vdupq_n_u32(0); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Compute 4 outputs at a time */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = blockSize >> 2U; 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** vecSrc = vldrwq_f32(pSrc); 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Get current max per lane and current index per lane 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * when a max is selected 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** p0 = vcmpgeq(vecSrc, curExtremValVec); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** indexVec = vidupq_wb_u32(&curIdx, 1); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** pSrc += 4; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement the loop counter */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Get max value across the vector 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxValue = vmaxnmvq(maxValue, curExtremValVec); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * set index for lower values to max possible index 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** p0 = vcmpgeq(curExtremValVec, maxValue); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Get min index which is thus for a max value 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** idx = vminvq(idx, indexVec); 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Tail */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = blockSize & 0x3; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialize tmp to the next consecutive values one by one */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** tmp = *pSrc++; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* compare for the maximum value */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (maxValue < tmp) ARM GAS /tmp/ccDUJO2W.s page 29 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Update the maximum value and it's index */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxValue = tmp; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** idx = blockSize - blkCnt; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement loop counter */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** * Save result 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pIndex = idx; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pResult = maxValue; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #else 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** void arm_max_f32( 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** const float32_t * pSrc, 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t blockSize, 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t * pResult, 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t * pIndex) 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t maxVal1, out; /* Temporary variables to store the output value. */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t blkCnt, outIndex; /* loop counter */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32x4_t outV, srcV; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32x2_t outV2; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t idxV; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t maxIdx; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** static const uint32_t indexInit[4]={4,5,6,7}; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** static const uint32_t countVInit[4]={0,1,2,3}; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t index; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t delta; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x4_t countV; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32x2_t countV2; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxIdx = vdupq_n_u32(ULONG_MAX); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** delta = vdupq_n_u32(4); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** index = vld1q_u32(indexInit); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** countV = vld1q_u32(countVInit); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialise the index value to zero. */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = 0U; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Load first input value that act as reference value for comparison */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (blockSize <= 3) 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = *pSrc++; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = blockSize - 1; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 30 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialize maxVal to the next consecutive values one by one */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal1 = *pSrc++; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* compare for the maximum value */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal1) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Update the maximum value and it's index */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal1; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = blockSize - blkCnt; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement the loop counter */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** else 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outV = vld1q_f32(pSrc); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** pSrc += 4; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Compute 4 outputs at a time */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = (blockSize - 4 ) >> 2U; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** srcV = vld1q_f32(pSrc); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** pSrc += 4; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** idxV = vcgtq_f32(srcV, outV); 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outV = vbslq_f32(idxV, srcV, outV ); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** countV = vbslq_u32(idxV, index,countV ); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** index = vaddq_u32(index,delta); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement the loop counter */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outV2 = vpmax_f32(vget_low_f32(outV),vget_high_f32(outV)); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outV2 = vpmax_f32(outV2,outV2); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = vget_lane_f32(outV2, 0); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** idxV = vceqq_f32(outV, vdupq_n_f32(out)); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** countV = vbslq_u32(idxV, countV,maxIdx); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV)); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** countV2 = vpmin_u32(countV2,countV2); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = vget_lane_u32(countV2,0); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* if (blockSize - 1U) is not multiple of 4 */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = (blockSize - 4 ) % 4U; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialize maxVal to the next consecutive values one by one */ ARM GAS /tmp/ccDUJO2W.s page 31 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal1 = *pSrc++; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* compare for the maximum value */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal1) 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Update the maximum value and it's index */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal1; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = blockSize - blkCnt ; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement the loop counter */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Store the maximum value and it's index into destination pointers */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pResult = out; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pIndex = outIndex; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #else 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** void arm_max_f32( 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** const float32_t * pSrc, 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t blockSize, 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t * pResult, 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t * pIndex) 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 633 .loc 7 268 0 634 .cfi_startproc 635 @ args = 0, pretend = 0, frame = 0 636 @ frame_needed = 0, uses_anonymous_args = 0 637 @ link register save eliminated. 638 .LVL81: 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t maxVal, out; /* Temporary variables to store the output v 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** uint32_t index; /* index of maximum value */ 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #endif 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialise index value to zero. */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = 0U; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Load first input value that act as reference value for comparision */ 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = *pSrc++; 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialise index of maximum value. */ 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** index = 0U; 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = (blockSize - 1U) >> 2U; 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialize maxVal to next consecutive values one by one */ ARM GAS /tmp/ccDUJO2W.s page 32 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal = *pSrc++; 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* compare for the maximum value */ 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal) 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Update the maximum value and it's index */ 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal; 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = index + 1U; 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal = *pSrc++; 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal) 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal; 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = index + 2U; 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal = *pSrc++; 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal) 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal; 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = index + 3U; 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal = *pSrc++; 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal) 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal; 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = index + 4U; 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** index += 4U; 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement loop counter */ 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Loop unrolling: Compute remaining outputs */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = (blockSize - 1U) % 4U; 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #else 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialize blkCnt with number of samples */ 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt = (blockSize - 1U); 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** while (blkCnt > 0U) 639 .loc 7 339 0 640 0000 0129 cmp r1, #1 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** float32_t maxVal, out; /* Temporary variables to store the output v 641 .loc 7 268 0 642 0002 30B4 push {r4, r5} 643 .LCFI22: 644 .cfi_def_cfa_offset 8 645 .cfi_offset 4, -8 646 .cfi_offset 5, -4 ARM GAS /tmp/ccDUJO2W.s page 33 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 647 .loc 7 280 0 648 0004 90ED007A vldr.32 s14, [r0] 649 .LVL82: 650 .loc 7 339 0 651 0008 16D0 beq .L74 652 000a 041D adds r4, r0, #4 653 .LVL83: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 654 .loc 7 277 0 655 000c 0025 movs r5, #0 656 .loc 7 339 0 657 000e 0120 movs r0, #1 658 .LVL84: 659 .L73: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Initialize maxVal to the next consecutive values one by one */ 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** maxVal = *pSrc++; 660 .loc 7 342 0 661 0010 F4EC017A vldmia.32 r4!, {s15} 662 .LVL85: 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* compare for the maximum value */ 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** if (out < maxVal) 663 .loc 7 345 0 664 0014 B4EEE77A vcmpe.f32 s14, s15 665 0018 F1EE10FA vmrs APSR_nzcv, FPSCR 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Update the maximum value and it's index */ 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** out = maxVal; 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** outIndex = blockSize - blkCnt; 666 .loc 7 349 0 667 001c 48BF it mi 668 001e 0546 movmi r5, r0 669 0020 00F10100 add r0, r0, #1 670 .LVL86: 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 671 .loc 7 342 0 672 0024 48BF it mi 673 0026 B0EE677A vmovmi.f32 s14, s15 674 .LVL87: 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** { 675 .loc 7 339 0 676 002a 8142 cmp r1, r0 677 002c F0D1 bne .L73 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Decrement loop counter */ 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** blkCnt--; 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** /* Store the maximum value and it's index into destination pointers */ 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pResult = out; 678 .loc 7 357 0 679 002e 82ED007A vstr.32 s14, [r2] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pIndex = outIndex; 680 .loc 7 358 0 ARM GAS /tmp/ccDUJO2W.s page 34 681 0032 1D60 str r5, [r3] 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 682 .loc 7 359 0 683 0034 30BC pop {r4, r5} 684 .LCFI23: 685 .cfi_remember_state 686 .cfi_restore 5 687 .cfi_restore 4 688 .cfi_def_cfa_offset 0 689 .LVL88: 690 0036 7047 bx lr 691 .LVL89: 692 .L74: 693 .LCFI24: 694 .cfi_restore_state 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** 695 .loc 7 277 0 696 0038 0025 movs r5, #0 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** *pIndex = outIndex; 697 .loc 7 357 0 698 003a 82ED007A vstr.32 s14, [r2] 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c **** } 699 .loc 7 358 0 700 003e 1D60 str r5, [r3] 701 .loc 7 359 0 702 0040 30BC pop {r4, r5} 703 .LCFI25: 704 .cfi_restore 5 705 .cfi_restore 4 706 .cfi_def_cfa_offset 0 707 0042 7047 bx lr 708 .cfi_endproc 709 .LFE154: 711 .section .text.arm_max_q15,"ax",%progbits 712 .align 1 713 .p2align 2,,3 714 .global arm_max_q15 715 .syntax unified 716 .thumb 717 .thumb_func 718 .fpu fpv4-sp-d16 720 arm_max_q15: 721 .LFB155: 722 .file 8 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Title: arm_max_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Description: Maximum value of a Q15 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * ARM GAS /tmp/ccDUJO2W.s page 35 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @addtogroup Max 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @brief Maximum value of a Q15 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @param[out] pResult maximum value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @param[out] pIndex index of maximum value returned here 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #if defined(ARM_MATH_MVEI) 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #include "arm_helium_utils.h" 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** void arm_max_q15( 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** const q15_t * pSrc, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t blockSize, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15_t * pResult, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t * pIndex) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t blkCnt; /* loop counters */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15x8_t vecSrc; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15x8_t curExtremValVec = vdupq_n_s16(Q15_MIN); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15_t maxValue = Q15_MIN, temp; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t idx = blockSize; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint16x8_t indexVec; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint16x8_t curExtremIdxVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** mve_pred16_t p0; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** indexVec = vidupq_u16((uint32_t)0, 1); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** curExtremIdxVec = vdupq_n_u16(0); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** ARM GAS /tmp/ccDUJO2W.s page 36 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt = blockSize >> 3; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** while (blkCnt > 0U) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** vecSrc = vldrhq_s16(pSrc); 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** pSrc += 8; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Get current max per lane and current index per lane 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * when a max is selected 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** p0 = vcmpgeq(vecSrc, curExtremValVec); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** indexVec = indexVec + 8; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Decrement the blockSize loop counter 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt--; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Get max value across the vector 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxValue = vmaxvq(maxValue, curExtremValVec); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * set index for lower values to max possible index 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** p0 = vcmpgeq(curExtremValVec, maxValue); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Get min index which is thus for a max value 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** idx = vminvq(idx, indexVec); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Tail */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt = blockSize & 0x7; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** while (blkCnt > 0U) 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Initialize temp to the next consecutive values one by one */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** temp = *pSrc++; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* compare for the maximum value */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** if (maxValue < temp) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Update the maximum value and it's index */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxValue = temp; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** idx = blockSize - blkCnt; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Decrement loop counter */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt--; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** * Save result 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** *pIndex = idx; ARM GAS /tmp/ccDUJO2W.s page 37 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** *pResult = maxValue; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #else 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** void arm_max_q15( 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** const q15_t * pSrc, 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t blockSize, 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15_t * pResult, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t * pIndex) 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 723 .loc 8 136 0 724 .cfi_startproc 725 @ args = 0, pretend = 0, frame = 0 726 @ frame_needed = 0, uses_anonymous_args = 0 727 @ link register save eliminated. 728 .LVL90: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15_t maxVal, out; /* Temporary variables to store the output v 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** uint32_t index; /* index of maximum value */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #endif 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Initialise index value to zero. */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** outIndex = 0U; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Load first input value that act as reference value for comparision */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** out = *pSrc++; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Initialise index of maximum value. */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** index = 0U; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt = (blockSize - 1U) >> 2U; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** while (blkCnt > 0U) 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Initialize maxVal to next consecutive values one by one */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxVal = *pSrc++; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* compare for the maximum value */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** if (out < maxVal) 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Update the maximum value and it's index */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** out = maxVal; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** outIndex = index + 1U; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxVal = *pSrc++; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** if (out < maxVal) 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** out = maxVal; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** outIndex = index + 2U; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxVal = *pSrc++; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** if (out < maxVal) 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { ARM GAS /tmp/ccDUJO2W.s page 38 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** out = maxVal; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** outIndex = index + 3U; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxVal = *pSrc++; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** if (out < maxVal) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** out = maxVal; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** outIndex = index + 4U; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** index += 4U; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Decrement loop counter */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt--; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Loop unrolling: Compute remaining outputs */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt = (blockSize - 1U) % 4U; 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #else 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Initialize blkCnt with number of samples */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt = (blockSize - 1U); 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** while (blkCnt > 0U) 729 .loc 8 206 0 730 0000 0129 cmp r1, #1 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** q15_t maxVal, out; /* Temporary variables to store the output v 731 .loc 8 136 0 732 0002 F0B4 push {r4, r5, r6, r7} 733 .LCFI26: 734 .cfi_def_cfa_offset 16 735 .cfi_offset 4, -16 736 .cfi_offset 5, -12 737 .cfi_offset 6, -8 738 .cfi_offset 7, -4 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 739 .loc 8 147 0 740 0004 B0F90060 ldrsh r6, [r0] 741 .LVL91: 742 .loc 8 206 0 743 0008 11D0 beq .L82 744 000a 851C adds r5, r0, #2 745 .LVL92: 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Load first input value that act as reference value for comparision */ 746 .loc 8 145 0 747 000c 0027 movs r7, #0 748 .loc 8 206 0 749 000e 0120 movs r0, #1 750 .LVL93: 751 .L81: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Initialize maxVal to the next consecutive values one by one */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** maxVal = *pSrc++; ARM GAS /tmp/ccDUJO2W.s page 39 752 .loc 8 209 0 753 0010 35F9024B ldrsh r4, [r5], #2 754 .LVL94: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* compare for the maximum value */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** if (out < maxVal) 755 .loc 8 212 0 756 0014 A642 cmp r6, r4 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Update the maximum value and it's index */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** out = maxVal; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** outIndex = blockSize - blkCnt; 757 .loc 8 216 0 758 0016 B8BF it lt 759 0018 0746 movlt r7, r0 760 001a 00F10100 add r0, r0, #1 761 .LVL95: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 762 .loc 8 212 0 763 001e B8BF it lt 764 0020 2646 movlt r6, r4 765 .LVL96: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** { 766 .loc 8 206 0 767 0022 8142 cmp r1, r0 768 0024 F4D1 bne .L81 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Decrement loop counter */ 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** blkCnt--; 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Store the maximum value and it's index into destination pointers */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** *pResult = out; 769 .loc 8 224 0 770 0026 1680 strh r6, [r2] @ movhi 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** *pIndex = outIndex; 771 .loc 8 225 0 772 0028 1F60 str r7, [r3] 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 773 .loc 8 226 0 774 002a F0BC pop {r4, r5, r6, r7} 775 .LCFI27: 776 .cfi_remember_state 777 .cfi_restore 7 778 .cfi_restore 6 779 .cfi_restore 5 780 .cfi_restore 4 781 .cfi_def_cfa_offset 0 782 .LVL97: 783 002c 7047 bx lr 784 .LVL98: 785 .L82: 786 .LCFI28: 787 .cfi_restore_state 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** /* Load first input value that act as reference value for comparision */ 788 .loc 8 145 0 ARM GAS /tmp/ccDUJO2W.s page 40 789 002e 0027 movs r7, #0 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** *pIndex = outIndex; 790 .loc 8 224 0 791 0030 1680 strh r6, [r2] @ movhi 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c **** } 792 .loc 8 225 0 793 0032 1F60 str r7, [r3] 794 .loc 8 226 0 795 0034 F0BC pop {r4, r5, r6, r7} 796 .LCFI29: 797 .cfi_restore 7 798 .cfi_restore 6 799 .cfi_restore 5 800 .cfi_restore 4 801 .cfi_def_cfa_offset 0 802 .LVL99: 803 0036 7047 bx lr 804 .cfi_endproc 805 .LFE155: 807 .section .text.arm_max_q31,"ax",%progbits 808 .align 1 809 .p2align 2,,3 810 .global arm_max_q31 811 .syntax unified 812 .thumb 813 .thumb_func 814 .fpu fpv4-sp-d16 816 arm_max_q31: 817 .LFB156: 818 .file 9 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Title: arm_max_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Description: Maximum value of a Q31 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ ARM GAS /tmp/ccDUJO2W.s page 41 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @addtogroup Max 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @brief Maximum value of a Q31 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @param[out] pResult maximum value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @param[out] pIndex index of maximum value returned here 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #if defined(ARM_MATH_MVEI) 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #include "arm_helium_utils.h" 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** void arm_max_q31( 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** const q31_t * pSrc, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t blockSize, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31_t * pResult, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t * pIndex) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t blkCnt; /* loop counters */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31x4_t vecSrc; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31x4_t curExtremValVec = vdupq_n_s32( Q31_MIN); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31_t maxValue = Q31_MIN; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31_t temp; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t idx = blockSize; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32x4_t indexVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32x4_t curExtremIdxVec; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** mve_pred16_t p0; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** indexVec = vidupq_u32((uint32_t)0, 1); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** curExtremIdxVec = vdupq_n_u32(0); 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Compute 4 outputs at a time */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt = blockSize >> 2U; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** while (blkCnt > 0U) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** vecSrc = vldrwq_s32(pSrc); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** pSrc += 4; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Get current max per lane and current index per lane 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * when a max is selected 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** p0 = vcmpgeq(vecSrc, curExtremValVec); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); ARM GAS /tmp/ccDUJO2W.s page 42 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** indexVec = indexVec + 4; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Decrement the blockSize loop counter 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt--; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Get max value across the vector 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxValue = vmaxvq(maxValue, curExtremValVec); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * set index for lower values to max possible index 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** p0 = vcmpgeq(curExtremValVec, maxValue); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Get min index which is thus for a max value 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** idx = vminvq(idx, indexVec); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Tail */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt = blockSize & 0x3; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** while (blkCnt > 0U) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Initialize maxVal to the next consecutive values one by one */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** temp = *pSrc++; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* compare for the maximum value */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** if (maxValue < temp) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Update the maximum value and it's index */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxValue = temp; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** idx = blockSize - blkCnt; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Decrement loop counter */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt--; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** * Save result 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** *pIndex = idx; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** *pResult = maxValue; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #else 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** void arm_max_q31( 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** const q31_t * pSrc, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t blockSize, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31_t * pResult, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t * pIndex) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 819 .loc 9 139 0 820 .cfi_startproc ARM GAS /tmp/ccDUJO2W.s page 43 821 @ args = 0, pretend = 0, frame = 0 822 @ frame_needed = 0, uses_anonymous_args = 0 823 @ link register save eliminated. 824 .LVL100: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31_t maxVal, out; /* Temporary variables to store the output v 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** uint32_t index; /* index of maximum value */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #endif 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Initialise index value to zero. */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** outIndex = 0U; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Load first input value that act as reference value for comparision */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** out = *pSrc++; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Initialise index of maximum value. */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** index = 0U; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt = (blockSize - 1U) >> 2U; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** while (blkCnt > 0U) 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Initialize maxVal to next consecutive values one by one */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxVal = *pSrc++; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* compare for the maximum value */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** if (out < maxVal) 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Update the maximum value and it's index */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** out = maxVal; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** outIndex = index + 1U; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxVal = *pSrc++; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** if (out < maxVal) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** out = maxVal; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** outIndex = index + 2U; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxVal = *pSrc++; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** if (out < maxVal) 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** out = maxVal; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** outIndex = index + 3U; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxVal = *pSrc++; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** if (out < maxVal) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** out = maxVal; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** outIndex = index + 4U; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** ARM GAS /tmp/ccDUJO2W.s page 44 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** index += 4U; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Decrement loop counter */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt--; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Loop unrolling: Compute remaining outputs */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt = (blockSize - 1U) % 4U; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #else 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Initialize blkCnt with number of samples */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt = (blockSize - 1U); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** while (blkCnt > 0U) 825 .loc 9 209 0 826 0000 0129 cmp r1, #1 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** q31_t maxVal, out; /* Temporary variables to store the output v 827 .loc 9 139 0 828 0002 F0B4 push {r4, r5, r6, r7} 829 .LCFI30: 830 .cfi_def_cfa_offset 16 831 .cfi_offset 4, -16 832 .cfi_offset 5, -12 833 .cfi_offset 6, -8 834 .cfi_offset 7, -4 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 835 .loc 9 150 0 836 0004 0668 ldr r6, [r0] 837 .LVL101: 838 .loc 9 209 0 839 0006 11D0 beq .L90 840 0008 051D adds r5, r0, #4 841 .LVL102: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Load first input value that act as reference value for comparision */ 842 .loc 9 148 0 843 000a 0027 movs r7, #0 844 .loc 9 209 0 845 000c 0120 movs r0, #1 846 .LVL103: 847 .L89: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Initialize maxVal to the next consecutive values one by one */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** maxVal = *pSrc++; 848 .loc 9 212 0 849 000e 55F8044B ldr r4, [r5], #4 850 .LVL104: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* compare for the maximum value */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** if (out < maxVal) 851 .loc 9 215 0 852 0012 A642 cmp r6, r4 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Update the maximum value and it's index */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** out = maxVal; ARM GAS /tmp/ccDUJO2W.s page 45 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** outIndex = blockSize - blkCnt; 853 .loc 9 219 0 854 0014 B8BF it lt 855 0016 0746 movlt r7, r0 856 0018 00F10100 add r0, r0, #1 857 .LVL105: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 858 .loc 9 215 0 859 001c B8BF it lt 860 001e 2646 movlt r6, r4 861 .LVL106: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** { 862 .loc 9 209 0 863 0020 8142 cmp r1, r0 864 0022 F4D1 bne .L89 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Decrement loop counter */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** blkCnt--; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Store the maximum value and it's index into destination pointers */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** *pResult = out; 865 .loc 9 227 0 866 0024 1660 str r6, [r2] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** *pIndex = outIndex; 867 .loc 9 228 0 868 0026 1F60 str r7, [r3] 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 869 .loc 9 229 0 870 0028 F0BC pop {r4, r5, r6, r7} 871 .LCFI31: 872 .cfi_remember_state 873 .cfi_restore 7 874 .cfi_restore 6 875 .cfi_restore 5 876 .cfi_restore 4 877 .cfi_def_cfa_offset 0 878 .LVL107: 879 002a 7047 bx lr 880 .LVL108: 881 .L90: 882 .LCFI32: 883 .cfi_restore_state 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** /* Load first input value that act as reference value for comparision */ 884 .loc 9 148 0 885 002c 0027 movs r7, #0 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** *pIndex = outIndex; 886 .loc 9 227 0 887 002e 1660 str r6, [r2] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c **** } 888 .loc 9 228 0 889 0030 1F60 str r7, [r3] 890 .loc 9 229 0 891 0032 F0BC pop {r4, r5, r6, r7} 892 .LCFI33: 893 .cfi_restore 7 ARM GAS /tmp/ccDUJO2W.s page 46 894 .cfi_restore 6 895 .cfi_restore 5 896 .cfi_restore 4 897 .cfi_def_cfa_offset 0 898 .LVL109: 899 0034 7047 bx lr 900 .cfi_endproc 901 .LFE156: 903 0036 00BF .section .text.arm_max_q7,"ax",%progbits 904 .align 1 905 .p2align 2,,3 906 .global arm_max_q7 907 .syntax unified 908 .thumb 909 .thumb_func 910 .fpu fpv4-sp-d16 912 arm_max_q7: 913 .LFB157: 914 .file 10 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Title: arm_max_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Description: Maximum value of a Q7 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @addtogroup Max 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ ARM GAS /tmp/ccDUJO2W.s page 47 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @brief Maximum value of a Q7 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @param[out] pResult maximum value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @param[out] pIndex index of maximum value returned here 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** @return none 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #if defined(ARM_MATH_MVEI) 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #include "arm_helium_utils.h" 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** static void arm_small_blk_max_q7( 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** const q7_t * pSrc, 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint8_t blockSize, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t * pResult, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t * pIndex) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t blkCnt; /* loop counters */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7x16_t vecSrc; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7x16_t curExtremValVec = vdupq_n_s8( Q7_MIN); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t maxValue = Q7_MIN, temp; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t idx = blockSize; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint8x16_t indexVec; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint8x16_t curExtremIdxVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** mve_pred16_t p0; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** indexVec = vidupq_u8((uint32_t)0, 1); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curExtremIdxVec = vdupq_n_u8(0); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt = blockSize >> 4; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** while (blkCnt > 0U) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** vecSrc = vldrbq_s8(pSrc); 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** pSrc += 16; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Get current max per lane and current index per lane 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * when a max is selected 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** p0 = vcmpgeq(vecSrc, curExtremValVec); 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** indexVec = indexVec + 16; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Decrement the blockSize loop counter 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt--; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Get max value across the vector 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxValue = vmaxvq(maxValue, curExtremValVec); ARM GAS /tmp/ccDUJO2W.s page 48 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * set index for lower values to max possible index 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** p0 = vcmpgeq(curExtremValVec, maxValue); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u8(blockSize), p0); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Get min index which is thus for a max value 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** idx = vminvq(idx, indexVec); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * tail 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt = blockSize & 0xF; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** while (blkCnt > 0U) 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Initialize temp to the next consecutive values one by one */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** temp = *pSrc++; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* compare for the maximum value */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (maxValue < temp) 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Update the maximum value and it's index */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxValue = temp; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** idx = blockSize - blkCnt; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Decrement loop counter */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt--; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * Save result 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pIndex = idx; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pResult = maxValue; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** void arm_max_q7( 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** const q7_t * pSrc, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t blockSize, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t * pResult, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t * pIndex) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** int32_t totalSize = blockSize; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (totalSize <= UINT8_MAX) 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** arm_small_blk_max_q7(pSrc, blockSize, pResult, pIndex); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** else 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t curIdx = 0; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t curBlkExtr = Q7_MIN; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t curBlkPos = 0; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t curBlkIdx = 0; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* ARM GAS /tmp/ccDUJO2W.s page 49 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * process blocks of 255 elts 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** while (totalSize >= UINT8_MAX) 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** const q7_t *curSrc = pSrc; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** arm_small_blk_max_q7(curSrc, UINT8_MAX, pResult, pIndex); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (*pResult > curBlkExtr) 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * update partial extrema 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curBlkExtr = *pResult; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curBlkPos = *pIndex; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curBlkIdx = curIdx; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curIdx++; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** pSrc += UINT8_MAX; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** totalSize -= UINT8_MAX; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** * remainder 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** */ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** arm_small_blk_max_q7(pSrc, totalSize, pResult, pIndex); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (*pResult > curBlkExtr) 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curBlkExtr = *pResult; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curBlkPos = *pIndex; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** curBlkIdx = curIdx; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pIndex = curBlkIdx * UINT8_MAX + curBlkPos; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pResult = curBlkExtr; 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #else 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** void arm_max_q7( 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** const q7_t * pSrc, 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t blockSize, 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t * pResult, 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t * pIndex) 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 915 .loc 10 193 0 916 .cfi_startproc 917 @ args = 0, pretend = 0, frame = 0 918 @ frame_needed = 0, uses_anonymous_args = 0 919 @ link register save eliminated. 920 .LVL110: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t maxVal, out; /* Temporary variables to store the output v 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** uint32_t index; /* index of maximum value */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #endif 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Initialise index value to zero. */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** outIndex = 0U; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Load first input value that act as reference value for comparision */ ARM GAS /tmp/ccDUJO2W.s page 50 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** out = *pSrc++; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Initialise index of maximum value. */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** index = 0U; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt = (blockSize - 1U) >> 2U; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** while (blkCnt > 0U) 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Initialize maxVal to next consecutive values one by one */ 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxVal = *pSrc++; 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* compare for the maximum value */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (out < maxVal) 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Update the maximum value and it's index */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** out = maxVal; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** outIndex = index + 1U; 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxVal = *pSrc++; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (out < maxVal) 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** out = maxVal; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** outIndex = index + 2U; 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxVal = *pSrc++; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (out < maxVal) 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** out = maxVal; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** outIndex = index + 3U; 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxVal = *pSrc++; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (out < maxVal) 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** out = maxVal; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** outIndex = index + 4U; 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** index += 4U; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Decrement loop counter */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt--; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Loop unrolling: Compute remaining outputs */ 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt = (blockSize - 1U) % 4U; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #else 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Initialize blkCnt with number of samples */ 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt = (blockSize - 1U); 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** ARM GAS /tmp/ccDUJO2W.s page 51 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** while (blkCnt > 0U) 921 .loc 10 263 0 922 0000 0129 cmp r1, #1 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** q7_t maxVal, out; /* Temporary variables to store the output v 923 .loc 10 193 0 924 0002 F0B4 push {r4, r5, r6, r7} 925 .LCFI34: 926 .cfi_def_cfa_offset 16 927 .cfi_offset 4, -16 928 .cfi_offset 5, -12 929 .cfi_offset 6, -8 930 .cfi_offset 7, -4 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 931 .loc 10 204 0 932 0004 90F90070 ldrsb r7, [r0] 933 .LVL111: 934 .loc 10 263 0 935 0008 0FD0 beq .L98 936 000a 441C adds r4, r0, #1 937 .LVL112: 938 000c 0144 add r1, r1, r0 939 .LVL113: 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Load first input value that act as reference value for comparision */ 940 .loc 10 202 0 941 000e 0025 movs r5, #0 942 .LVL114: 943 .L97: 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Initialize maxVal to the next consecutive values one by one */ 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** maxVal = *pSrc++; 944 .loc 10 266 0 945 0010 14F9016B ldrsb r6, [r4], #1 946 .LVL115: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* compare for the maximum value */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** if (out < maxVal) 947 .loc 10 269 0 948 0014 B742 cmp r7, r6 949 0016 02DA bge .L96 950 0018 651E subs r5, r4, #1 951 001a 3746 mov r7, r6 952 001c 2D1A subs r5, r5, r0 953 .LVL116: 954 .L96: 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 955 .loc 10 263 0 956 001e 8C42 cmp r4, r1 957 0020 F6D1 bne .L97 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** { 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Update the maximum value and it's index */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** out = maxVal; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** outIndex = blockSize - blkCnt; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Decrement loop counter */ ARM GAS /tmp/ccDUJO2W.s page 52 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** blkCnt--; 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Store the maximum value and it's index into destination pointers */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pResult = out; 958 .loc 10 281 0 959 0022 1770 strb r7, [r2] 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pIndex = outIndex; 960 .loc 10 282 0 961 0024 1D60 str r5, [r3] 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 962 .loc 10 283 0 963 0026 F0BC pop {r4, r5, r6, r7} 964 .LCFI35: 965 .cfi_remember_state 966 .cfi_restore 7 967 .cfi_restore 6 968 .cfi_restore 5 969 .cfi_restore 4 970 .cfi_def_cfa_offset 0 971 .LVL117: 972 0028 7047 bx lr 973 .LVL118: 974 .L98: 975 .LCFI36: 976 .cfi_restore_state 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** /* Load first input value that act as reference value for comparision */ 977 .loc 10 202 0 978 002a 0025 movs r5, #0 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** *pIndex = outIndex; 979 .loc 10 281 0 980 002c 1770 strb r7, [r2] 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c **** } 981 .loc 10 282 0 982 002e 1D60 str r5, [r3] 983 .loc 10 283 0 984 0030 F0BC pop {r4, r5, r6, r7} 985 .LCFI37: 986 .cfi_restore 7 987 .cfi_restore 6 988 .cfi_restore 5 989 .cfi_restore 4 990 .cfi_def_cfa_offset 0 991 .LVL119: 992 0032 7047 bx lr 993 .cfi_endproc 994 .LFE157: 996 .section .text.arm_max_no_idx_f32,"ax",%progbits 997 .align 1 998 .p2align 2,,3 999 .global arm_max_no_idx_f32 1000 .syntax unified 1001 .thumb 1002 .thumb_func 1003 .fpu fpv4-sp-d16 1005 arm_max_no_idx_f32: 1006 .LFB158: ARM GAS /tmp/ccDUJO2W.s page 53 1007 .file 11 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f3 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Title: arm_max_no_idx_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Description: Maximum value of a floating-point vector without returning the index 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * $Date: 16. October 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Target Processor: Cortex-M and Cortex-A cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** #if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** #include 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** #endif 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @ingroup groupStats 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @addtogroup Max 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @{ 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @brief Maximum value of a floating-point vector. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @param[in] pSrc points to the input vector 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @param[in] blockSize number of samples in input vector 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @param[out] pResult maximum value returned here 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** @return none 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** void arm_max_no_idx_f32( 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** const float32_t *pSrc, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** uint32_t blockSize, ARM GAS /tmp/ccDUJO2W.s page 54 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** float32_t *pResult) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** f32x4_t vecSrc; 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** f32x4_t curExtremValVec = vdupq_n_f32(F32_MIN); 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** float32_t maxValue = F32_MIN; 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** float32_t newVal; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** uint32_t blkCnt; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** blkCnt = blockSize >> 2U; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** while (blkCnt > 0U) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** vecSrc = vldrwq_f32(pSrc); 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * update per-lane max. 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** curExtremValVec = vmaxnmq(vecSrc, curExtremValVec); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Decrement the blockSize loop counter 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Advance vector source and destination pointers 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** pSrc += 4; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** blkCnt --; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** * Get max value across the vector 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** maxValue = vmaxnmvq(maxValue, curExtremValVec); 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** blkCnt = blockSize & 3; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** while (blkCnt > 0U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** newVal = *pSrc++; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* compare for the maximum value */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** if (maxValue < newVal) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* Update the maximum value and it's index */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** maxValue = newVal; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** blkCnt --; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** *pResult = maxValue; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** #else 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** void arm_max_no_idx_f32( 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** const float32_t *pSrc, 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** uint32_t blockSize, 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** float32_t *pResult) 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { ARM GAS /tmp/ccDUJO2W.s page 55 1008 .loc 11 113 0 1009 .cfi_startproc 1010 @ args = 0, pretend = 0, frame = 0 1011 @ frame_needed = 0, uses_anonymous_args = 0 1012 @ link register save eliminated. 1013 .LVL120: 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** float32_t maxValue = F32_MIN; 1014 .loc 11 114 0 1015 0000 DFED087A vldr.32 s15, .L106 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** float32_t newVal; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** while (blockSize > 0U) 1016 .loc 11 117 0 1017 0004 51B1 cbz r1, .L102 1018 .LVL121: 1019 .L103: 1020 0006 B0EC017A vldmia.32 r0!, {s14} 1021 .LVL122: 1022 000a F4EEC77A vcmpe.f32 s15, s14 1023 000e F1EE10FA vmrs APSR_nzcv, FPSCR 1024 0012 B8BF it lt 1025 0014 F0EE477A vmovlt.f32 s15, s14 1026 .LVL123: 1027 0018 0139 subs r1, r1, #1 1028 .LVL124: 1029 001a F4D1 bne .L103 1030 .LVL125: 1031 .L102: 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** newVal = *pSrc++; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* compare for the maximum value */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** if (maxValue < newVal) 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** { 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** /* Update the maximum value and it's index */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** maxValue = newVal; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** blockSize --; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** *pResult = maxValue; 1032 .loc 11 131 0 1033 001c C2ED007A vstr.32 s15, [r2] 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c **** } 1034 .loc 11 132 0 1035 0020 7047 bx lr 1036 .L107: 1037 0022 00BF .align 2 1038 .L106: 1039 0024 FFFF7FFF .word 4286578687 1040 .cfi_endproc 1041 .LFE158: 1043 .section .text.arm_mean_f32,"ax",%progbits 1044 .align 1 1045 .p2align 2,,3 1046 .global arm_mean_f32 ARM GAS /tmp/ccDUJO2W.s page 56 1047 .syntax unified 1048 .thumb 1049 .thumb_func 1050 .fpu fpv4-sp-d16 1052 arm_mean_f32: 1053 .LFB159: 1054 .file 12 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Title: arm_mean_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Description: Mean value of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @defgroup mean Mean 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** Calculates the mean of the input vector. Mean is defined as the average of the elements in the ve 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** The underlying algorithm is used: 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c ****       Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** There are separate functions for floating-point, Q31, Q15, and Q7 data types. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** */ 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @addtogroup mean 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @{ ARM GAS /tmp/ccDUJO2W.s page 57 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @brief Mean value of a floating-point vector. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @param[in] pSrc points to the input vector. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @param[in] blockSize number of samples in input vector. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @param[out] pResult mean value returned here. 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** @return none 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #include "arm_helium_utils.h" 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** void arm_mean_f32( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** const float32_t * pSrc, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** uint32_t blockSize, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32_t * pResult) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** uint32_t blkCnt; /* loop counters */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** f32x4_t vecSrc; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** f32x4_t sumVec = vdupq_n_f32(0.0f); 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32_t sum = 0.0f; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Compute 4 outputs at a time */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize >> 2U; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** while (blkCnt > 0U) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** vecSrc = vldrwq_f32(pSrc); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sumVec = vaddq_f32(sumVec, vecSrc); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt --; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** pSrc += 4; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum = vecAddAcrossF32Mve(sumVec); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Tail */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize & 0x3; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** while (blkCnt > 0U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Decrement loop counter */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt--; 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** *pResult = sum / (float32_t) blockSize; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #else 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE) 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** void arm_mean_f32( 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** const float32_t * pSrc, 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** uint32_t blockSize, ARM GAS /tmp/ccDUJO2W.s page 58 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32_t * pResult) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32_t sum = 0.0f; /* Temporary result storage */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32x2_t sumV2; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** uint32_t blkCnt; /* Loop counter */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32x4_t inV; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize >> 2U; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Compute 4 outputs at a time. 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** while (blkCnt > 0U) 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** inV = vld1q_f32(pSrc); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sumV = vaddq_f32(sumV, inV); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** pSrc += 4; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Decrement the loop counter */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt--; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** ** No loop unrolling is used. */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize & 3; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** while (blkCnt > 0U) 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Decrement the loop counter */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt--; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Store the result to the destination */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** *pResult = sum / (float32_t) blockSize; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #else 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** void arm_mean_f32( 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** const float32_t * pSrc, 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** uint32_t blockSize, 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32_t * pResult) 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 1055 .loc 12 158 0 1056 .cfi_startproc 1057 @ args = 0, pretend = 0, frame = 8 1058 @ frame_needed = 0, uses_anonymous_args = 0 1059 @ link register save eliminated. 1060 .LVL126: ARM GAS /tmp/ccDUJO2W.s page 59 1061 0000 82B0 sub sp, sp, #8 1062 .LCFI38: 1063 .cfi_def_cfa_offset 8 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** uint32_t blkCnt; /* Loop counter */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** float32_t sum = 0.0f; /* Temporary result storage */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize >> 2U; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** while (blkCnt > 0U) 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Decrement the loop counter */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt--; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Loop unrolling: Compute remaining outputs */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize % 0x4U; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #else 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Initialize blkCnt with number of samples */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt = blockSize; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** while (blkCnt > 0U) 1064 .loc 12 192 0 1065 0002 0191 str r1, [sp, #4] 1066 0004 91B1 cbz r1, .L111 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 1067 .loc 12 160 0 1068 0006 DFED0C7A vldr.32 s15, .L114 1069 000a 0B46 mov r3, r1 1070 .LVL127: 1071 .L110: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** sum += *pSrc++; 1072 .loc 12 195 0 1073 000c B0EC017A vldmia.32 r0!, {s14} 1074 .LVL128: 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 1075 .loc 12 192 0 1076 0010 013B subs r3, r3, #1 1077 .LVL129: 1078 .loc 12 195 0 ARM GAS /tmp/ccDUJO2W.s page 60 1079 0012 77EE877A vadd.f32 s15, s15, s14 1080 .LVL130: 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** { 1081 .loc 12 192 0 1082 0016 F9D1 bne .L110 1083 0018 9DED017A vldr.32 s14, [sp, #4] @ int 1084 .LVL131: 1085 .L109: 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Decrement loop counter */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** blkCnt--; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** /* Store result to destination */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** *pResult = (sum / blockSize); 1086 .loc 12 203 0 1087 001c B8EE477A vcvt.f32.u32 s14, s14 1088 0020 C7EE876A vdiv.f32 s13, s15, s14 1089 0024 C2ED006A vstr.32 s13, [r2] 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** } 1090 .loc 12 204 0 1091 0028 02B0 add sp, sp, #8 1092 .LCFI39: 1093 .cfi_remember_state 1094 .cfi_def_cfa_offset 0 1095 @ sp needed 1096 002a 7047 bx lr 1097 .LVL132: 1098 .L111: 1099 .LCFI40: 1100 .cfi_restore_state 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c **** 1101 .loc 12 160 0 1102 002c DFED027A vldr.32 s15, .L114 1103 0030 07EE101A vmov s14, r1 @ int 1104 0034 F2E7 b .L109 1105 .L115: 1106 0036 00BF .align 2 1107 .L114: 1108 0038 00000000 .word 0 1109 .cfi_endproc 1110 .LFE159: 1112 .section .text.arm_mean_q15,"ax",%progbits 1113 .align 1 1114 .p2align 2,,3 1115 .global arm_mean_q15 1116 .syntax unified 1117 .thumb 1118 .thumb_func 1119 .fpu fpv4-sp-d16 1121 arm_mean_q15: 1122 .LFB160: 1123 .file 13 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Title: arm_mean_q15.c ARM GAS /tmp/ccDUJO2W.s page 61 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Description: Mean value of a Q15 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @addtogroup mean 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @brief Mean value of a Q15 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @param[out] pResult mean value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** The function is implemented using a 32-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** The input is represented in 1.15 format and is accumulated in a 32-bit 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** accumulator in 17.15 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** There is no risk of internal overflow with this approach, and the 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** full precision of intermediate result is preserved. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** Finally, the accumulator is truncated to yield a result of 1.15 format. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #if defined(ARM_MATH_MVEI) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** void arm_mean_q15( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** const q15_t * pSrc, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** uint32_t blockSize, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** q15_t * pResult) ARM GAS /tmp/ccDUJO2W.s page 62 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** uint32_t blkCnt; /* loop counters */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** q15x8_t vecSrc; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** q31_t sum = 0L; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Compute 8 outputs at a time */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt = blockSize >> 3U; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** while (blkCnt > 0U) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** vecSrc = vldrhq_s16(pSrc); 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** * sum lanes 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** */ 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum = vaddvaq(sum, vecSrc); 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt--; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** pSrc += 8; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Tail */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt = blockSize & 0x7; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** while (blkCnt > 0U) 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum += *pSrc++; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Decrement loop counter */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt--; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Store the result to the destination */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** *pResult = (q15_t) (sum / (int32_t) blockSize); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #else 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** void arm_mean_q15( 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** const q15_t * pSrc, 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** uint32_t blockSize, 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** q15_t * pResult) 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 1124 .loc 13 101 0 1125 .cfi_startproc 1126 @ args = 0, pretend = 0, frame = 0 1127 @ frame_needed = 0, uses_anonymous_args = 0 1128 @ link register save eliminated. 1129 .LVL133: 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** uint32_t blkCnt; /* Loop counter */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** q31_t sum = 0; /* Temporary result storage */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** q31_t in; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #endif 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ ARM GAS /tmp/ccDUJO2W.s page 63 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt = blockSize >> 2U; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** while (blkCnt > 0U) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** in = read_q15x2_ia ((q15_t **) &pSrc); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum += ((in << 16U) >> 16U); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum += (in >> 16U); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** in = read_q15x2_ia ((q15_t **) &pSrc); 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum += ((in << 16U) >> 16U); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum += (in >> 16U); 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Decrement the loop counter */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt--; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Loop unrolling: Compute remaining outputs */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt = blockSize % 0x4U; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #else 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Initialize blkCnt with number of samples */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt = blockSize; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** while (blkCnt > 0U) 1130 .loc 13 139 0 1131 0000 69B1 cbz r1, .L122 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** uint32_t blkCnt; /* Loop counter */ 1132 .loc 13 101 0 1133 0002 30B4 push {r4, r5} 1134 .LCFI41: 1135 .cfi_def_cfa_offset 8 1136 .cfi_offset 4, -8 1137 .cfi_offset 5, -4 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 1138 .loc 13 103 0 1139 0004 0023 movs r3, #0 1140 0006 0D46 mov r5, r1 1141 .LVL134: 1142 .L118: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** sum += *pSrc++; 1143 .loc 13 142 0 1144 0008 30F9024B ldrsh r4, [r0], #2 1145 .LVL135: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { 1146 .loc 13 139 0 1147 000c 0139 subs r1, r1, #1 1148 .LVL136: 1149 .loc 13 142 0 1150 000e 2344 add r3, r3, r4 1151 .LVL137: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** { ARM GAS /tmp/ccDUJO2W.s page 64 1152 .loc 13 139 0 1153 0010 FAD1 bne .L118 1154 0012 93FBF5F1 sdiv r1, r3, r5 1155 0016 09B2 sxth r1, r1 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Decrement loop counter */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** blkCnt--; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** /* Store result to destination */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** *pResult = (q15_t) (sum / (int32_t) blockSize); 1156 .loc 13 150 0 1157 0018 1180 strh r1, [r2] @ movhi 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 1158 .loc 13 151 0 1159 001a 30BC pop {r4, r5} 1160 .LCFI42: 1161 .cfi_restore 5 1162 .cfi_restore 4 1163 .cfi_def_cfa_offset 0 1164 .LVL138: 1165 001c 7047 bx lr 1166 .LVL139: 1167 .L122: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c **** } 1168 .loc 13 150 0 1169 001e 1180 strh r1, [r2] @ movhi 1170 0020 7047 bx lr 1171 .cfi_endproc 1172 .LFE160: 1174 .global __aeabi_ldivmod 1175 0022 00BF .section .text.arm_mean_q31,"ax",%progbits 1176 .align 1 1177 .p2align 2,,3 1178 .global arm_mean_q31 1179 .syntax unified 1180 .thumb 1181 .thumb_func 1182 .fpu fpv4-sp-d16 1184 arm_mean_q31: 1185 .LFB161: 1186 .file 14 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Title: arm_mean_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Description: Mean value of a Q31 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * SPDX-License-Identifier: Apache-2.0 ARM GAS /tmp/ccDUJO2W.s page 65 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @addtogroup mean 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @brief Mean value of a Q31 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @param[out] pResult mean value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** The function is implemented using a 64-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** The input is represented in 1.31 format and is accumulated in a 64-bit 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** accumulator in 33.31 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** There is no risk of internal overflow with this approach, and the 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** full precision of intermediate result is preserved. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** Finally, the accumulator is truncated to yield a result of 1.31 format. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** #if defined(ARM_MATH_MVEI) 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** void arm_mean_q31( 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** const q31_t * pSrc, 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** uint32_t blockSize, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** q31_t * pResult) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** uint32_t blkCnt; /* loop counters */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** q31x4_t vecSrc; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** q63_t sum = 0LL; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Compute 4 outputs at a time */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt = blockSize >> 2U; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** while (blkCnt > 0U) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** vecSrc = vldrwq_s32(pSrc); ARM GAS /tmp/ccDUJO2W.s page 66 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** * sum lanes 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum = vaddlvaq(sum, vecSrc); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt --; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** pSrc += 4; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Tail */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt = blockSize & 0x3; 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** while (blkCnt > 0U) 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum += *pSrc++; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt --; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** *pResult = arm_div_q63_to_q31(sum, blockSize); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** #else 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** void arm_mean_q31( 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** const q31_t * pSrc, 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** uint32_t blockSize, 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** q31_t * pResult) 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 1187 .loc 14 98 0 1188 .cfi_startproc 1189 @ args = 0, pretend = 0, frame = 0 1190 @ frame_needed = 0, uses_anonymous_args = 0 1191 .LVL140: 1192 0000 70B5 push {r4, r5, r6, lr} 1193 .LCFI43: 1194 .cfi_def_cfa_offset 16 1195 .cfi_offset 4, -16 1196 .cfi_offset 5, -12 1197 .cfi_offset 6, -8 1198 .cfi_offset 14, -4 1199 .loc 14 98 0 1200 0002 1646 mov r6, r2 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** uint32_t blkCnt; /* Loop counter */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** q63_t sum = 0; /* Temporary result storage */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt = blockSize >> 2U; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** while (blkCnt > 0U) 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum += *pSrc++; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum += *pSrc++; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum += *pSrc++; ARM GAS /tmp/ccDUJO2W.s page 67 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum += *pSrc++; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Decrement the loop counter */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt--; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Loop unrolling: Compute remaining outputs */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt = blockSize % 0x4U; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** #else 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Initialize blkCnt with number of samples */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt = blockSize; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** while (blkCnt > 0U) 1201 .loc 14 132 0 1202 0004 81B1 cbz r1, .L128 1203 0006 0A46 mov r2, r1 1204 .LVL141: 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 1205 .loc 14 100 0 1206 0008 0024 movs r4, #0 1207 000a 0025 movs r5, #0 1208 .LVL142: 1209 .L127: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** sum += *pSrc++; 1210 .loc 14 135 0 1211 000c 50F8043B ldr r3, [r0], #4 1212 .LVL143: 1213 0010 E418 adds r4, r4, r3 1214 .LVL144: 1215 0012 45EBE375 adc r5, r5, r3, asr #31 1216 .LVL145: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 1217 .loc 14 132 0 1218 0016 0139 subs r1, r1, #1 1219 .LVL146: 1220 0018 F8D1 bne .L127 1221 001a 0B46 mov r3, r1 1222 001c 2046 mov r0, r4 1223 .LVL147: 1224 001e 2946 mov r1, r5 1225 .LVL148: 1226 0020 FFF7FEFF bl __aeabi_ldivmod 1227 .LVL149: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Decrement loop counter */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** blkCnt--; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** /* Store result to destination */ ARM GAS /tmp/ccDUJO2W.s page 68 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** *pResult = (q31_t) (sum / blockSize); 1228 .loc 14 143 0 1229 0024 3060 str r0, [r6] 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 1230 .loc 14 144 0 1231 0026 70BD pop {r4, r5, r6, pc} 1232 .LVL150: 1233 .L128: 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** { 1234 .loc 14 132 0 1235 0028 0846 mov r0, r1 1236 .LVL151: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c **** } 1237 .loc 14 143 0 1238 002a 3060 str r0, [r6] 1239 .loc 14 144 0 1240 002c 70BD pop {r4, r5, r6, pc} 1241 .cfi_endproc 1242 .LFE161: 1244 002e 00BF .section .text.arm_mean_q7,"ax",%progbits 1245 .align 1 1246 .p2align 2,,3 1247 .global arm_mean_q7 1248 .syntax unified 1249 .thumb 1250 .thumb_func 1251 .fpu fpv4-sp-d16 1253 arm_mean_q7: 1254 .LFB162: 1255 .file 15 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Title: arm_mean_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Description: Mean value of a Q7 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** */ ARM GAS /tmp/ccDUJO2W.s page 69 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @addtogroup mean 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @brief Mean value of a Q7 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @param[out] pResult mean value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** The function is implemented using a 32-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** The input is represented in 1.7 format and is accumulated in a 32-bit 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** accumulator in 25.7 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** There is no risk of internal overflow with this approach, and the 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** full precision of intermediate result is preserved. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** Finally, the accumulator is truncated to yield a result of 1.7 format. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** */ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #if defined(ARM_MATH_MVEI) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** void arm_mean_q7( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** const q7_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** uint32_t blockSize, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** q7_t * pResult) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** uint32_t blkCnt; /* loop counters */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** q7x16_t vecSrc; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** q31_t sum = 0L; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt = blockSize >> 4; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** while (blkCnt > 0U) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** vecSrc = vldrbq_s8(pSrc); 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** * sum lanes 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum = vaddvaq(sum, vecSrc); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt--; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** pSrc += 16; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt = blockSize & 0xF; 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** while (blkCnt > 0U) 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ ARM GAS /tmp/ccDUJO2W.s page 70 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum += *pSrc++; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Decrement loop counter */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt--; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Store the result to the destination */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** *pResult = (q7_t) (sum / (int32_t) blockSize); 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #else 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** void arm_mean_q7( 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** const q7_t * pSrc, 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** uint32_t blockSize, 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** q7_t * pResult) 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 1256 .loc 15 100 0 1257 .cfi_startproc 1258 @ args = 0, pretend = 0, frame = 0 1259 @ frame_needed = 0, uses_anonymous_args = 0 1260 @ link register save eliminated. 1261 .LVL152: 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** uint32_t blkCnt; /* Loop counter */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** q31_t sum = 0; /* Temporary result storage */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** q31_t in; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #endif 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt = blockSize >> 2U; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** while (blkCnt > 0U) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** in = read_q7x4_ia ((q7_t **) &pSrc); 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum += ((in << 24U) >> 24U); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum += ((in << 16U) >> 24U); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum += ((in << 8U) >> 24U); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum += (in >> 24U); 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Decrement the loop counter */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt--; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Loop unrolling: Compute remaining outputs */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt = blockSize % 0x4U; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #else 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Initialize blkCnt with number of samples */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt = blockSize; 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** ARM GAS /tmp/ccDUJO2W.s page 71 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** while (blkCnt > 0U) 1262 .loc 15 136 0 1263 0000 69B1 cbz r1, .L134 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** uint32_t blkCnt; /* Loop counter */ 1264 .loc 15 100 0 1265 0002 30B4 push {r4, r5} 1266 .LCFI44: 1267 .cfi_def_cfa_offset 8 1268 .cfi_offset 4, -8 1269 .cfi_offset 5, -4 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 1270 .loc 15 102 0 1271 0004 0023 movs r3, #0 1272 0006 4518 adds r5, r0, r1 1273 .LVL153: 1274 .L133: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** sum += *pSrc++; 1275 .loc 15 139 0 1276 0008 10F9014B ldrsb r4, [r0], #1 1277 .LVL154: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 1278 .loc 15 136 0 1279 000c A842 cmp r0, r5 1280 .loc 15 139 0 1281 000e 2344 add r3, r3, r4 1282 .LVL155: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** { 1283 .loc 15 136 0 1284 0010 FAD1 bne .L133 1285 0012 93FBF1F3 sdiv r3, r3, r1 1286 .LVL156: 1287 0016 5BB2 sxtb r3, r3 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Decrement loop counter */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** blkCnt--; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** /* Store result to destination */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** *pResult = (q7_t) (sum / (int32_t) blockSize); 1288 .loc 15 147 0 1289 0018 1370 strb r3, [r2] 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 1290 .loc 15 148 0 1291 001a 30BC pop {r4, r5} 1292 .LCFI45: 1293 .cfi_restore 5 1294 .cfi_restore 4 1295 .cfi_def_cfa_offset 0 1296 001c 7047 bx lr 1297 .LVL157: 1298 .L134: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c **** } 1299 .loc 15 147 0 1300 001e 1170 strb r1, [r2] ARM GAS /tmp/ccDUJO2W.s page 72 1301 0020 7047 bx lr 1302 .cfi_endproc 1303 .LFE162: 1305 0022 00BF .section .text.arm_min_f32,"ax",%progbits 1306 .align 1 1307 .p2align 2,,3 1308 .global arm_min_f32 1309 .syntax unified 1310 .thumb 1311 .thumb_func 1312 .fpu fpv4-sp-d16 1314 arm_min_f32: 1315 .LFB163: 1316 .file 16 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Title: arm_min_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Description: Minimum value of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE) 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #include 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #endif 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @ingroup groupStats 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @defgroup Min Minimum 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** Computes the minimum value of an array of data. ARM GAS /tmp/ccDUJO2W.s page 73 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** The function returns both the minimum value and its position within the array. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** There are separate functions for floating-point, Q31, Q15, and Q7 data types. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @addtogroup Min 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @{ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @brief Minimum value of a floating-point vector. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @param[in] pSrc points to the input vector 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @param[in] blockSize number of samples in input vector 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @param[out] pResult minimum value returned here 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @param[out] pIndex index of minimum value returned here 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** @return none 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** void arm_min_f32( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** const float32_t * pSrc, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t blockSize, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t * pResult, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t * pIndex) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t blkCnt; /* loop counters */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** f32x4_t vecSrc; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t const *pSrcVec; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** f32x4_t curExtremValVec = vdupq_n_f32(F32_MAX); 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t minValue = F32_MAX; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t idx = blockSize; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t indexVec; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t curExtremIdxVec; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t tmp; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** mve_pred16_t p0; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** indexVec = vidupq_u32((uint32_t)0, 1); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** curExtremIdxVec = vdupq_n_u32(0); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** pSrcVec = (float32_t const *) pSrc; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Compute 4 outputs at a time */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = blockSize >> 2U; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** vecSrc = vldrwq_f32(pSrcVec); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** pSrcVec += 4; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Get current max per lane and current index per lane 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * when a max is selected 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** p0 = vcmpleq(vecSrc, curExtremValVec); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** indexVec = indexVec + 4; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* ARM GAS /tmp/ccDUJO2W.s page 74 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Decrement the blockSize loop counter 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Get min value across the vector 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minValue = vminnmvq(minValue, curExtremValVec); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * set index for lower values to max possible index 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** p0 = vcmpleq(curExtremValVec, minValue); 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Get min index which is thus for a max value 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** idx = vminvq(idx, indexVec); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * tail 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = blockSize & 0x3; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialize minVal to the next consecutive values one by one */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** tmp = *pSrc++; 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* compare for the minimum value */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (minValue > tmp) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Update the minimum value and it's index */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minValue = tmp; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** idx = blockSize - blkCnt; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** * Save result 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pIndex = idx; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pResult = minValue; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #else 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** void arm_min_f32( 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** const float32_t * pSrc, 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t blockSize, 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t * pResult, 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t * pIndex) 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t maxVal1, out; /* Temporary variables to store the output value. */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t blkCnt, outIndex; /* loop counter */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32x4_t outV, srcV; ARM GAS /tmp/ccDUJO2W.s page 75 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32x2_t outV2; 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t idxV; 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** static const uint32_t indexInit[4]={4,5,6,7}; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** static const uint32_t countVInit[4]={0,1,2,3}; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t maxIdx; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t index; 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t delta; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x4_t countV; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32x2_t countV2; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** maxIdx = vdupq_n_u32(ULONG_MAX); 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** delta = vdupq_n_u32(4); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** index = vld1q_u32(indexInit); 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** countV = vld1q_u32(countVInit); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialise the index value to zero. */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = 0U; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Load first input value that act as reference value for comparison */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (blockSize <= 3) 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = *pSrc++; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = blockSize - 1; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialize maxVal to the next consecutive values one by one */ 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** maxVal1 = *pSrc++; 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* compare for the maximum value */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > maxVal1) 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Update the maximum value and it's index */ 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = maxVal1; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = blockSize - blkCnt; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Decrement the loop counter */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** else 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outV = vld1q_f32(pSrc); 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** pSrc += 4; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Compute 4 outputs at a time */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = (blockSize - 4 ) >> 2U; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** srcV = vld1q_f32(pSrc); 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** pSrc += 4; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** idxV = vcltq_f32(srcV, outV); ARM GAS /tmp/ccDUJO2W.s page 76 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outV = vbslq_f32(idxV, srcV, outV ); 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** countV = vbslq_u32(idxV, index,countV ); 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** index = vaddq_u32(index,delta); 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Decrement the loop counter */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outV2 = vpmin_f32(vget_low_f32(outV),vget_high_f32(outV)); 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outV2 = vpmin_f32(outV2,outV2); 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = vget_lane_f32(outV2,0); 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** idxV = vceqq_f32(outV, vdupq_n_f32(out)); 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** countV = vbslq_u32(idxV, countV,maxIdx); 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV)); 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** countV2 = vpmin_u32(countV2,countV2); 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = vget_lane_u32(countV2,0); 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* if (blockSize - 1U) is not multiple of 4 */ 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = (blockSize - 4 ) % 4U; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialize maxVal to the next consecutive values one by one */ 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** maxVal1 = *pSrc++; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* compare for the maximum value */ 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > maxVal1) 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Update the maximum value and it's index */ 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = maxVal1; 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = blockSize - blkCnt ; 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Decrement the loop counter */ 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Store the maximum value and it's index into destination pointers */ 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pResult = out; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pIndex = outIndex; 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #else 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** void arm_min_f32( 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** const float32_t * pSrc, 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t blockSize, 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t * pResult, 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t * pIndex) 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 1317 .loc 16 266 0 1318 .cfi_startproc 1319 @ args = 0, pretend = 0, frame = 0 1320 @ frame_needed = 0, uses_anonymous_args = 0 1321 @ link register save eliminated. ARM GAS /tmp/ccDUJO2W.s page 77 1322 .LVL158: 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t minVal, out; /* Temporary variables to store the output v 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** uint32_t index; /* index of maximum value */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #endif 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialise index value to zero. */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = 0U; 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Load first input value that act as reference value for comparision */ 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = *pSrc++; 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialise index of maximum value. */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** index = 0U; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = (blockSize - 1U) >> 2U; 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialize minVal to next consecutive values one by one */ 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minVal = *pSrc++; 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* compare for the minimum value */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > minVal) 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Update the minimum value and it's index */ 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = minVal; 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = index + 1U; 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minVal = *pSrc++; 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > minVal) 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = minVal; 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = index + 2U; 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minVal = *pSrc++; 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > minVal) 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = minVal; 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = index + 3U; 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minVal = *pSrc++; 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > minVal) 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = minVal; 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = index + 4U; 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** index += 4U; 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 78 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Decrement loop counter */ 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Loop unrolling: Compute remaining outputs */ 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = (blockSize - 1U) % 4U; 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #else 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialize blkCnt with number of samples */ 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt = (blockSize - 1U); 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** while (blkCnt > 0U) 1323 .loc 16 337 0 1324 0000 0129 cmp r1, #1 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** float32_t minVal, out; /* Temporary variables to store the output v 1325 .loc 16 266 0 1326 0002 30B4 push {r4, r5} 1327 .LCFI46: 1328 .cfi_def_cfa_offset 8 1329 .cfi_offset 4, -8 1330 .cfi_offset 5, -4 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 1331 .loc 16 278 0 1332 0004 90ED007A vldr.32 s14, [r0] 1333 .LVL159: 1334 .loc 16 337 0 1335 0008 16D0 beq .L144 1336 000a 041D adds r4, r0, #4 1337 .LVL160: 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 1338 .loc 16 275 0 1339 000c 0025 movs r5, #0 1340 .loc 16 337 0 1341 000e 0120 movs r0, #1 1342 .LVL161: 1343 .L143: 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Initialize minVal to the next consecutive values one by one */ 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** minVal = *pSrc++; 1344 .loc 16 340 0 1345 0010 F4EC017A vldmia.32 r4!, {s15} 1346 .LVL162: 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* compare for the minimum value */ 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** if (out > minVal) 1347 .loc 16 343 0 1348 0014 B4EEE77A vcmpe.f32 s14, s15 1349 0018 F1EE10FA vmrs APSR_nzcv, FPSCR 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Update the minimum value and it's index */ 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** out = minVal; 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** outIndex = blockSize - blkCnt; 1350 .loc 16 347 0 1351 001c C8BF it gt ARM GAS /tmp/ccDUJO2W.s page 79 1352 001e 0546 movgt r5, r0 1353 0020 00F10100 add r0, r0, #1 1354 .LVL163: 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 1355 .loc 16 340 0 1356 0024 C8BF it gt 1357 0026 B0EE677A vmovgt.f32 s14, s15 1358 .LVL164: 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** { 1359 .loc 16 337 0 1360 002a 8142 cmp r1, r0 1361 002c F0D1 bne .L143 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Decrement loop counter */ 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** blkCnt--; 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** /* Store the minimum value and it's index into destination pointers */ 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pResult = out; 1362 .loc 16 355 0 1363 002e 82ED007A vstr.32 s14, [r2] 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pIndex = outIndex; 1364 .loc 16 356 0 1365 0032 1D60 str r5, [r3] 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 1366 .loc 16 357 0 1367 0034 30BC pop {r4, r5} 1368 .LCFI47: 1369 .cfi_remember_state 1370 .cfi_restore 5 1371 .cfi_restore 4 1372 .cfi_def_cfa_offset 0 1373 .LVL165: 1374 0036 7047 bx lr 1375 .LVL166: 1376 .L144: 1377 .LCFI48: 1378 .cfi_restore_state 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** 1379 .loc 16 275 0 1380 0038 0025 movs r5, #0 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** *pIndex = outIndex; 1381 .loc 16 355 0 1382 003a 82ED007A vstr.32 s14, [r2] 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c **** } 1383 .loc 16 356 0 1384 003e 1D60 str r5, [r3] 1385 .loc 16 357 0 1386 0040 30BC pop {r4, r5} 1387 .LCFI49: 1388 .cfi_restore 5 1389 .cfi_restore 4 1390 .cfi_def_cfa_offset 0 1391 0042 7047 bx lr 1392 .cfi_endproc 1393 .LFE163: ARM GAS /tmp/ccDUJO2W.s page 80 1395 .section .text.arm_min_q15,"ax",%progbits 1396 .align 1 1397 .p2align 2,,3 1398 .global arm_min_q15 1399 .syntax unified 1400 .thumb 1401 .thumb_func 1402 .fpu fpv4-sp-d16 1404 arm_min_q15: 1405 .LFB164: 1406 .file 17 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Title: arm_min_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Description: Minimum value of a Q15 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @addtogroup Min 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @brief Minimum value of a Q15 vector. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @param[in] pSrc points to the input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @param[in] blockSize number of samples in input vector 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @param[out] pResult minimum value returned here 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @param[out] pIndex index of minimum value returned here ARM GAS /tmp/ccDUJO2W.s page 81 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #if defined(ARM_MATH_MVEI) 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #include "arm_helium_utils.h" 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** void arm_min_q15( 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** const q15_t * pSrc, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t blockSize, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15_t * pResult, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t * pIndex) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t blkCnt; /* loop counters */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15x8_t vecSrc; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15x8_t curExtremValVec = vdupq_n_s16(Q15_MAX); 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15_t minValue = Q15_MAX,temp; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t idx = blockSize; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint16x8_t indexVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint16x8_t curExtremIdxVec; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** mve_pred16_t p0; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** indexVec = vidupq_u16((uint32_t)0, 1); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** curExtremIdxVec = vdupq_n_u16(0); 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt = blockSize >> 3; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** while (blkCnt > 0U) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** vecSrc = vldrhq_s16(pSrc); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** pSrc += 8; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Get current min per lane and current index per lane 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * when a min is selected 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** p0 = vcmpleq(vecSrc, curExtremValVec); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** indexVec = indexVec + 8; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Decrement the blockSize loop counter 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt--; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Get min value across the vector 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minValue = vminvq(minValue, curExtremValVec); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * set index for lower values to min possible index 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** p0 = vcmpleq(curExtremValVec, minValue); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Get min index which is thus for a min value 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ ARM GAS /tmp/ccDUJO2W.s page 82 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** idx = vminvq(idx, indexVec); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * tail 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt = blockSize & 7; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** while (blkCnt > 0U) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Initialize minVal to the next consecutive values one by one */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** temp = *pSrc++; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* compare for the minimum value */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** if (minValue > temp) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Update the minimum value and it's index */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minValue = temp; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** idx = blockSize - blkCnt; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Decrement loop counter */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt--; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** * Save result 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** *pIndex = idx; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** *pResult = minValue; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #else 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** void arm_min_q15( 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** const q15_t * pSrc, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t blockSize, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15_t * pResult, 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t * pIndex) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 1407 .loc 17 139 0 1408 .cfi_startproc 1409 @ args = 0, pretend = 0, frame = 0 1410 @ frame_needed = 0, uses_anonymous_args = 0 1411 @ link register save eliminated. 1412 .LVL167: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15_t minVal, out; /* Temporary variables to store the output v 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** uint32_t index; /* index of maximum value */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #endif 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Initialise index value to zero. */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** outIndex = 0U; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Load first input value that act as reference value for comparision */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** out = *pSrc++; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Initialise index of maximum value. */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** index = 0U; ARM GAS /tmp/ccDUJO2W.s page 83 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt = (blockSize - 1U) >> 2U; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** while (blkCnt > 0U) 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Initialize minVal to next consecutive values one by one */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minVal = *pSrc++; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* compare for the minimum value */ 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** if (out > minVal) 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Update the minimum value and it's index */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** out = minVal; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** outIndex = index + 1U; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minVal = *pSrc++; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** if (out > minVal) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** out = minVal; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** outIndex = index + 2U; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minVal = *pSrc++; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** if (out > minVal) 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** out = minVal; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** outIndex = index + 3U; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minVal = *pSrc++; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** if (out > minVal) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** out = minVal; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** outIndex = index + 4U; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** index += 4U; 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Decrement loop counter */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt--; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Loop unrolling: Compute remaining outputs */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt = (blockSize - 1U) % 4U; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #else 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Initialize blkCnt with number of samples */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt = (blockSize - 1U); 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** while (blkCnt > 0U) 1413 .loc 17 209 0 1414 0000 0129 cmp r1, #1 ARM GAS /tmp/ccDUJO2W.s page 84 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** q15_t minVal, out; /* Temporary variables to store the output v 1415 .loc 17 139 0 1416 0002 F0B4 push {r4, r5, r6, r7} 1417 .LCFI50: 1418 .cfi_def_cfa_offset 16 1419 .cfi_offset 4, -16 1420 .cfi_offset 5, -12 1421 .cfi_offset 6, -8 1422 .cfi_offset 7, -4 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 1423 .loc 17 150 0 1424 0004 B0F90060 ldrsh r6, [r0] 1425 .LVL168: 1426 .loc 17 209 0 1427 0008 11D0 beq .L152 1428 000a 851C adds r5, r0, #2 1429 .LVL169: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Load first input value that act as reference value for comparision */ 1430 .loc 17 148 0 1431 000c 0027 movs r7, #0 1432 .loc 17 209 0 1433 000e 0120 movs r0, #1 1434 .LVL170: 1435 .L151: 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Initialize minVal to the next consecutive values one by one */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** minVal = *pSrc++; 1436 .loc 17 212 0 1437 0010 35F9024B ldrsh r4, [r5], #2 1438 .LVL171: 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* compare for the minimum value */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** if (out > minVal) 1439 .loc 17 215 0 1440 0014 A642 cmp r6, r4 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Update the minimum value and it's index */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** out = minVal; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** outIndex = blockSize - blkCnt; 1441 .loc 17 219 0 1442 0016 C8BF it gt 1443 0018 0746 movgt r7, r0 1444 001a 00F10100 add r0, r0, #1 1445 .LVL172: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 1446 .loc 17 215 0 1447 001e C8BF it gt 1448 0020 2646 movgt r6, r4 1449 .LVL173: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** { 1450 .loc 17 209 0 1451 0022 8142 cmp r1, r0 1452 0024 F4D1 bne .L151 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Decrement loop counter */ 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** blkCnt--; ARM GAS /tmp/ccDUJO2W.s page 85 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Store the minimum value and it's index into destination pointers */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** *pResult = out; 1453 .loc 17 227 0 1454 0026 1680 strh r6, [r2] @ movhi 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** *pIndex = outIndex; 1455 .loc 17 228 0 1456 0028 1F60 str r7, [r3] 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 1457 .loc 17 229 0 1458 002a F0BC pop {r4, r5, r6, r7} 1459 .LCFI51: 1460 .cfi_remember_state 1461 .cfi_restore 7 1462 .cfi_restore 6 1463 .cfi_restore 5 1464 .cfi_restore 4 1465 .cfi_def_cfa_offset 0 1466 .LVL174: 1467 002c 7047 bx lr 1468 .LVL175: 1469 .L152: 1470 .LCFI52: 1471 .cfi_restore_state 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** /* Load first input value that act as reference value for comparision */ 1472 .loc 17 148 0 1473 002e 0027 movs r7, #0 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** *pIndex = outIndex; 1474 .loc 17 227 0 1475 0030 1680 strh r6, [r2] @ movhi 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c **** } 1476 .loc 17 228 0 1477 0032 1F60 str r7, [r3] 1478 .loc 17 229 0 1479 0034 F0BC pop {r4, r5, r6, r7} 1480 .LCFI53: 1481 .cfi_restore 7 1482 .cfi_restore 6 1483 .cfi_restore 5 1484 .cfi_restore 4 1485 .cfi_def_cfa_offset 0 1486 .LVL176: 1487 0036 7047 bx lr 1488 .cfi_endproc 1489 .LFE164: 1491 .section .text.arm_min_q31,"ax",%progbits 1492 .align 1 1493 .p2align 2,,3 1494 .global arm_min_q31 1495 .syntax unified 1496 .thumb 1497 .thumb_func 1498 .fpu fpv4-sp-d16 1500 arm_min_q31: 1501 .LFB165: 1502 .file 18 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c" ARM GAS /tmp/ccDUJO2W.s page 86 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Title: arm_min_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Description: Minimum value of a Q31 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @addtogroup Min 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @brief Minimum value of a Q31 vector. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @param[in] pSrc points to the input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @param[in] blockSize number of samples in input vector 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @param[out] pResult minimum value returned here 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @param[out] pIndex index of minimum value returned here 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #if defined(ARM_MATH_MVEI) 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #include "arm_helium_utils.h" 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** void arm_min_q31( 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** const q31_t * pSrc, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t blockSize, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31_t * pResult, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t * pIndex) ARM GAS /tmp/ccDUJO2W.s page 87 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t blkCnt; /* loop counters */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31x4_t vecSrc; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31x4_t curExtremValVec = vdupq_n_s32(Q31_MAX); 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31_t minValue = Q31_MAX, temp; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t idx = blockSize; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32x4_t indexVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32x4_t curExtremIdxVec; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** mve_pred16_t p0; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** indexVec = vidupq_u32((uint32_t)0, 1); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** curExtremIdxVec = vdupq_n_u32(0); 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Compute 4 outputs at a time */ 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt = blockSize >> 2U; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** while (blkCnt > 0U) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** vecSrc = vldrwq_s32(pSrc); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** pSrc += 4; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Get current min per lane and current index per lane 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * when a min is selected 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** p0 = vcmpleq(vecSrc, curExtremValVec); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** indexVec = indexVec + 4; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Decrement the blockSize loop counter 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt--; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Get min value across the vector 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minValue = vminvq(minValue, curExtremValVec); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * set index for lower values to min possible index 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** p0 = vcmpleq(curExtremValVec, minValue); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Get min index which is thus for a min value 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** idx = vminvq(idx, indexVec); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Tail */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt = blockSize & 0x3; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** while (blkCnt > 0U) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Initialize temp to the next consecutive values one by one */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** temp = *pSrc++; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** ARM GAS /tmp/ccDUJO2W.s page 88 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* compare for the minimum value */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** if (minValue > temp) 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Update the minimum value and it's index */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minValue = temp; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** idx = blockSize - blkCnt; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Decrement loop counter */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt--; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** * Save result 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** *pIndex = idx; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** *pResult = minValue; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #else 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** void arm_min_q31( 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** const q31_t * pSrc, 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t blockSize, 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31_t * pResult, 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t * pIndex) 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 1503 .loc 18 138 0 1504 .cfi_startproc 1505 @ args = 0, pretend = 0, frame = 0 1506 @ frame_needed = 0, uses_anonymous_args = 0 1507 @ link register save eliminated. 1508 .LVL177: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31_t minVal, out; /* Temporary variables to store the output v 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** uint32_t index; /* index of maximum value */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #endif 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Initialise index value to zero. */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** outIndex = 0U; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Load first input value that act as reference value for comparision */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** out = *pSrc++; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Initialise index of maximum value. */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** index = 0U; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt = (blockSize - 1U) >> 2U; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** while (blkCnt > 0U) 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Initialize minVal to next consecutive values one by one */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minVal = *pSrc++; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* compare for the minimum value */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** if (out > minVal) 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { ARM GAS /tmp/ccDUJO2W.s page 89 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Update the minimum value and it's index */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** out = minVal; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** outIndex = index + 1U; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minVal = *pSrc++; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** if (out > minVal) 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** out = minVal; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** outIndex = index + 2U; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minVal = *pSrc++; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** if (out > minVal) 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** out = minVal; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** outIndex = index + 3U; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minVal = *pSrc++; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** if (out > minVal) 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** out = minVal; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** outIndex = index + 4U; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** index += 4U; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Decrement loop counter */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt--; 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Loop unrolling: Compute remaining outputs */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt = (blockSize - 1U) % 4U; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #else 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Initialize blkCnt with number of samples */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt = (blockSize - 1U); 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** while (blkCnt > 0U) 1509 .loc 18 208 0 1510 0000 0129 cmp r1, #1 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** q31_t minVal, out; /* Temporary variables to store the output v 1511 .loc 18 138 0 1512 0002 F0B4 push {r4, r5, r6, r7} 1513 .LCFI54: 1514 .cfi_def_cfa_offset 16 1515 .cfi_offset 4, -16 1516 .cfi_offset 5, -12 1517 .cfi_offset 6, -8 1518 .cfi_offset 7, -4 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 1519 .loc 18 149 0 1520 0004 0668 ldr r6, [r0] ARM GAS /tmp/ccDUJO2W.s page 90 1521 .LVL178: 1522 .loc 18 208 0 1523 0006 11D0 beq .L160 1524 0008 051D adds r5, r0, #4 1525 .LVL179: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Load first input value that act as reference value for comparision */ 1526 .loc 18 147 0 1527 000a 0027 movs r7, #0 1528 .loc 18 208 0 1529 000c 0120 movs r0, #1 1530 .LVL180: 1531 .L159: 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Initialize minVal to the next consecutive values one by one */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** minVal = *pSrc++; 1532 .loc 18 211 0 1533 000e 55F8044B ldr r4, [r5], #4 1534 .LVL181: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* compare for the minimum value */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** if (out > minVal) 1535 .loc 18 214 0 1536 0012 A642 cmp r6, r4 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Update the minimum value and it's index */ 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** out = minVal; 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** outIndex = blockSize - blkCnt; 1537 .loc 18 218 0 1538 0014 C8BF it gt 1539 0016 0746 movgt r7, r0 1540 0018 00F10100 add r0, r0, #1 1541 .LVL182: 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 1542 .loc 18 214 0 1543 001c C8BF it gt 1544 001e 2646 movgt r6, r4 1545 .LVL183: 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** { 1546 .loc 18 208 0 1547 0020 8142 cmp r1, r0 1548 0022 F4D1 bne .L159 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Decrement loop counter */ 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** blkCnt--; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Store the minimum value and it's index into destination pointers */ 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** *pResult = out; 1549 .loc 18 226 0 1550 0024 1660 str r6, [r2] 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** *pIndex = outIndex; 1551 .loc 18 227 0 1552 0026 1F60 str r7, [r3] 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 1553 .loc 18 228 0 1554 0028 F0BC pop {r4, r5, r6, r7} ARM GAS /tmp/ccDUJO2W.s page 91 1555 .LCFI55: 1556 .cfi_remember_state 1557 .cfi_restore 7 1558 .cfi_restore 6 1559 .cfi_restore 5 1560 .cfi_restore 4 1561 .cfi_def_cfa_offset 0 1562 .LVL184: 1563 002a 7047 bx lr 1564 .LVL185: 1565 .L160: 1566 .LCFI56: 1567 .cfi_restore_state 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** /* Load first input value that act as reference value for comparision */ 1568 .loc 18 147 0 1569 002c 0027 movs r7, #0 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** *pIndex = outIndex; 1570 .loc 18 226 0 1571 002e 1660 str r6, [r2] 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c **** } 1572 .loc 18 227 0 1573 0030 1F60 str r7, [r3] 1574 .loc 18 228 0 1575 0032 F0BC pop {r4, r5, r6, r7} 1576 .LCFI57: 1577 .cfi_restore 7 1578 .cfi_restore 6 1579 .cfi_restore 5 1580 .cfi_restore 4 1581 .cfi_def_cfa_offset 0 1582 .LVL186: 1583 0034 7047 bx lr 1584 .cfi_endproc 1585 .LFE165: 1587 0036 00BF .section .text.arm_min_q7,"ax",%progbits 1588 .align 1 1589 .p2align 2,,3 1590 .global arm_min_q7 1591 .syntax unified 1592 .thumb 1593 .thumb_func 1594 .fpu fpv4-sp-d16 1596 arm_min_q7: 1597 .LFB166: 1598 .file 19 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Title: arm_min_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Description: Minimum value of a Q7 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. ARM GAS /tmp/ccDUJO2W.s page 92 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /** 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @addtogroup Min 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @{ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /** 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @brief Minimum value of a Q7 vector. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @param[in] pSrc points to the input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @param[in] blockSize number of samples in input vector 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @param[out] pResult minimum value returned here 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @param[out] pIndex index of minimum value returned here 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** @return none 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #if defined(ARM_MATH_MVEI) 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #include "arm_helium_utils.h" 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** static void arm_small_blk_min_q7( 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** const q7_t * pSrc, 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint8_t blockSize, 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t * pResult, 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t * pIndex) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t blkCnt; /* loop counters */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7x16_t vecSrc; 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7x16_t curExtremValVec = vdupq_n_s8(Q7_MAX); 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t minValue = Q7_MAX,temp; 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t idx = blockSize; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint8x16_t indexVec; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint8x16_t curExtremIdxVec; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** mve_pred16_t p0; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** indexVec = vidupq_u8((uint32_t)0, 1); ARM GAS /tmp/ccDUJO2W.s page 93 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curExtremIdxVec = vdupq_n_u8(0); 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt = blockSize >> 4; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** while (blkCnt > 0U) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** vecSrc = vldrbq_s8(pSrc); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** pSrc += 16; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Get current min per lane and current index per lane 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * when a min is selected 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** p0 = vcmpleq(vecSrc, curExtremValVec); 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curExtremValVec = vpselq(vecSrc, curExtremValVec, p0); 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** indexVec = indexVec + 16; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Decrement the blockSize loop counter 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt--; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Get min value across the vector 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minValue = vminvq(minValue, curExtremValVec); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * set index for lower values to min possible index 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** p0 = vcmpleq(curExtremValVec, minValue); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** indexVec = vpselq(curExtremIdxVec, vdupq_n_u8(blockSize), p0); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Get min index which is thus for a min value 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** idx = vminvq(idx, indexVec); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt = blockSize & 0xF; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** while (blkCnt > 0U) 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Initialize minVal to the next consecutive values one by one */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** temp = *pSrc++; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* compare for the minimum value */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (minValue > temp) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Update the minimum value and it's index */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minValue = temp; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** idx = blockSize - blkCnt; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Decrement loop counter */ 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt--; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * Save result 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pIndex = idx; ARM GAS /tmp/ccDUJO2W.s page 94 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pResult = minValue; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** void arm_min_q7( 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** const q7_t * pSrc, 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t blockSize, 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t * pResult, 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t * pIndex) 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** int32_t totalSize = blockSize; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (totalSize <= UINT8_MAX) 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** arm_small_blk_min_q7(pSrc, blockSize, pResult, pIndex); 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** else 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t curIdx = 0; 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t curBlkExtr = Q7_MAX; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t curBlkPos = 0; 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t curBlkIdx = 0; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * process blocks of 255 elts 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** while (totalSize >= UINT8_MAX) 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** const q7_t *curSrc = pSrc; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** arm_small_blk_min_q7(curSrc, UINT8_MAX, pResult, pIndex); 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (*pResult < curBlkExtr) 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * update partial extrema 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curBlkExtr = *pResult; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curBlkPos = *pIndex; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curBlkIdx = curIdx; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curIdx++; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** pSrc += UINT8_MAX; 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** totalSize -= UINT8_MAX; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** * remainder 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** arm_small_blk_min_q7(pSrc, totalSize, pResult, pIndex); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (*pResult < curBlkExtr) 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curBlkExtr = *pResult; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curBlkPos = *pIndex; 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** curBlkIdx = curIdx; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pIndex = curBlkIdx * UINT8_MAX + curBlkPos; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pResult = curBlkExtr; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #else ARM GAS /tmp/ccDUJO2W.s page 95 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** void arm_min_q7( 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** const q7_t * pSrc, 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t blockSize, 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t * pResult, 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t * pIndex) 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 1599 .loc 19 189 0 1600 .cfi_startproc 1601 @ args = 0, pretend = 0, frame = 0 1602 @ frame_needed = 0, uses_anonymous_args = 0 1603 @ link register save eliminated. 1604 .LVL187: 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t minVal, out; /* Temporary variables to store the output v 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t blkCnt, outIndex; /* Loop counter */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** uint32_t index; /* index of maximum value */ 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #endif 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Initialise index value to zero. */ 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** outIndex = 0U; 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Load first input value that act as reference value for comparision */ 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** out = *pSrc++; 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Initialise index of maximum value. */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** index = 0U; 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt = (blockSize - 1U) >> 2U; 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** while (blkCnt > 0U) 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Initialize minVal to next consecutive values one by one */ 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minVal = *pSrc++; 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* compare for the minimum value */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (out > minVal) 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Update the minimum value and it's index */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** out = minVal; 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** outIndex = index + 1U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minVal = *pSrc++; 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (out > minVal) 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** out = minVal; 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** outIndex = index + 2U; 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minVal = *pSrc++; 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (out > minVal) 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** out = minVal; 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** outIndex = index + 3U; 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } ARM GAS /tmp/ccDUJO2W.s page 96 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minVal = *pSrc++; 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (out > minVal) 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** out = minVal; 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** outIndex = index + 4U; 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** index += 4U; 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Decrement loop counter */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt--; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Loop unrolling: Compute remaining outputs */ 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt = (blockSize - 1U) % 4U; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #else 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Initialize blkCnt with number of samples */ 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt = (blockSize - 1U); 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** while (blkCnt > 0U) 1605 .loc 19 259 0 1606 0000 0129 cmp r1, #1 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** q7_t minVal, out; /* Temporary variables to store the output v 1607 .loc 19 189 0 1608 0002 F0B4 push {r4, r5, r6, r7} 1609 .LCFI58: 1610 .cfi_def_cfa_offset 16 1611 .cfi_offset 4, -16 1612 .cfi_offset 5, -12 1613 .cfi_offset 6, -8 1614 .cfi_offset 7, -4 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 1615 .loc 19 200 0 1616 0004 90F90070 ldrsb r7, [r0] 1617 .LVL188: 1618 .loc 19 259 0 1619 0008 0FD0 beq .L168 1620 000a 441C adds r4, r0, #1 1621 .LVL189: 1622 000c 0144 add r1, r1, r0 1623 .LVL190: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Load first input value that act as reference value for comparision */ 1624 .loc 19 198 0 1625 000e 0025 movs r5, #0 1626 .LVL191: 1627 .L167: 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Initialize minVal to the next consecutive values one by one */ 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** minVal = *pSrc++; 1628 .loc 19 262 0 1629 0010 14F9016B ldrsb r6, [r4], #1 1630 .LVL192: ARM GAS /tmp/ccDUJO2W.s page 97 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* compare for the minimum value */ 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** if (out > minVal) 1631 .loc 19 265 0 1632 0014 B742 cmp r7, r6 1633 0016 02DD ble .L166 1634 0018 651E subs r5, r4, #1 1635 001a 3746 mov r7, r6 1636 001c 2D1A subs r5, r5, r0 1637 .LVL193: 1638 .L166: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 1639 .loc 19 259 0 1640 001e 8C42 cmp r4, r1 1641 0020 F6D1 bne .L167 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** { 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Update the minimum value and it's index */ 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** out = minVal; 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** outIndex = blockSize - blkCnt; 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Decrement loop counter */ 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** blkCnt--; 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Store the minimum value and it's index into destination pointers */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pResult = out; 1642 .loc 19 277 0 1643 0022 1770 strb r7, [r2] 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pIndex = outIndex; 1644 .loc 19 278 0 1645 0024 1D60 str r5, [r3] 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 1646 .loc 19 279 0 1647 0026 F0BC pop {r4, r5, r6, r7} 1648 .LCFI59: 1649 .cfi_remember_state 1650 .cfi_restore 7 1651 .cfi_restore 6 1652 .cfi_restore 5 1653 .cfi_restore 4 1654 .cfi_def_cfa_offset 0 1655 .LVL194: 1656 0028 7047 bx lr 1657 .LVL195: 1658 .L168: 1659 .LCFI60: 1660 .cfi_restore_state 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** /* Load first input value that act as reference value for comparision */ 1661 .loc 19 198 0 1662 002a 0025 movs r5, #0 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** *pIndex = outIndex; 1663 .loc 19 277 0 1664 002c 1770 strb r7, [r2] 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c **** } 1665 .loc 19 278 0 1666 002e 1D60 str r5, [r3] ARM GAS /tmp/ccDUJO2W.s page 98 1667 .loc 19 279 0 1668 0030 F0BC pop {r4, r5, r6, r7} 1669 .LCFI61: 1670 .cfi_restore 7 1671 .cfi_restore 6 1672 .cfi_restore 5 1673 .cfi_restore 4 1674 .cfi_def_cfa_offset 0 1675 .LVL196: 1676 0032 7047 bx lr 1677 .cfi_endproc 1678 .LFE166: 1680 .section .text.arm_power_f32,"ax",%progbits 1681 .align 1 1682 .p2align 2,,3 1683 .global arm_power_f32 1684 .syntax unified 1685 .thumb 1686 .thumb_func 1687 .fpu fpv4-sp-d16 1689 arm_power_f32: 1690 .LFB167: 1691 .file 20 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Title: arm_power_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Description: Sum of the squares of the elements of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 99 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @defgroup power Power 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** Calculates the sum of the squares of the elements in the input vector. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** The underlying algorithm is used: 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c ****       Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] 
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** There are separate functions for floating point, Q31, Q15, and Q7 data types. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @addtogroup power 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @{ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @brief Sum of the squares of the elements of a floating-point vector. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @param[in] pSrc points to the input vector 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @param[in] blockSize number of samples in input vector 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @param[out] pResult sum of the squares value returned here 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** @return none 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #include "arm_helium_utils.h" 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** void arm_power_f32( 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** const float32_t * pSrc, 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** uint32_t blockSize, 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t * pResult) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** uint32_t blkCnt; /* loop counters */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** f32x4_t vecSrc; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** f32x4_t sumVec = vdupq_n_f32(0.0f); 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t sum = 0.0f; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t in; 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Compute 4 outputs at a time */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize >> 2U; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** while (blkCnt > 0U) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** vecSrc = vldrwq_f32(pSrc); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * sum lanes 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sumVec = vfmaq(sumVec, vecSrc, vecSrc); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt --; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** pSrc += 4; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum = vecAddAcrossF32Mve(sumVec); 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** * tail ARM GAS /tmp/ccDUJO2W.s page 100 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize & 0x3; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** while (blkCnt > 0U) 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Compute Power and store result in a temporary variable, sum. */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Decrement loop counter */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt--; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** *pResult = sum; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #else 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** void arm_power_f32( 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** const float32_t * pSrc, 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** uint32_t blockSize, 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t * pResult) 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t sum = 0.0f; /* accumulator */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t in; /* Temporary variable to store input value */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** uint32_t blkCnt; /* loop counter */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32x2_t sumV2; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32x4_t inV; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize >> 2U; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Compute 4 outputs at a time. 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** while (blkCnt > 0U) 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Compute Power and then store the result in a temporary variable, sum. */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** inV = vld1q_f32(pSrc); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sumV = vmlaq_f32(sumV, inV, inV); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** pSrc += 4; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Decrement the loop counter */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt--; 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** ** No loop unrolling is used. */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize % 0x4U; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** while (blkCnt > 0U) 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* compute power and then store the result in a temporary variable, sum. */ ARM GAS /tmp/ccDUJO2W.s page 101 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Decrement the loop counter */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt--; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Store the result to the destination */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** *pResult = sum; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #else 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** void arm_power_f32( 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** const float32_t * pSrc, 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** uint32_t blockSize, 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t * pResult) 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 1692 .loc 20 164 0 1693 .cfi_startproc 1694 @ args = 0, pretend = 0, frame = 0 1695 @ frame_needed = 0, uses_anonymous_args = 0 1696 @ link register save eliminated. 1697 .LVL197: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** uint32_t blkCnt; /* Loop counter */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t sum = 0.0f; /* Temporary result storage */ 1698 .loc 20 166 0 1699 0000 9FED057A vldr.32 s14, .L176 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** float32_t in; /* Temporary variable to store input value * 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize >> 2U; 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** while (blkCnt > 0U) 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Compute Power and store result in a temporary variable, sum. */ 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Decrement loop counter */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt--; 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Loop unrolling: Compute remaining outputs */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize % 0x4U; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 102 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #else 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Initialize blkCnt with number of samples */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt = blockSize; 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** while (blkCnt > 0U) 1700 .loc 20 205 0 1701 0004 29B1 cbz r1, .L172 1702 .LVL198: 1703 .L173: 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Compute Power and store result in a temporary variable, sum. */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** in = *pSrc++; 1704 .loc 20 210 0 1705 0006 F0EC017A vldmia.32 r0!, {s15} 1706 .LVL199: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 1707 .loc 20 205 0 1708 000a 0139 subs r1, r1, #1 1709 .LVL200: 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** sum += in * in; 1710 .loc 20 211 0 1711 000c A7EEA77A vfma.f32 s14, s15, s15 1712 .LVL201: 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** { 1713 .loc 20 205 0 1714 0010 F9D1 bne .L173 1715 .LVL202: 1716 .L172: 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Decrement loop counter */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** blkCnt--; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** /* Store result to destination */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** *pResult = sum; 1717 .loc 20 218 0 1718 0012 82ED007A vstr.32 s14, [r2] 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c **** } 1719 .loc 20 219 0 1720 0016 7047 bx lr 1721 .L177: 1722 .align 2 1723 .L176: 1724 0018 00000000 .word 0 1725 .cfi_endproc 1726 .LFE167: 1728 .section .text.arm_power_q15,"ax",%progbits 1729 .align 1 1730 .p2align 2,,3 1731 .global arm_power_q15 1732 .syntax unified 1733 .thumb ARM GAS /tmp/ccDUJO2W.s page 103 1734 .thumb_func 1735 .fpu fpv4-sp-d16 1737 arm_power_q15: 1738 .LFB168: 1739 .file 21 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Title: arm_power_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Description: Sum of the squares of the elements of a Q15 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @addtogroup power 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @brief Sum of the squares of the elements of a Q15 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @param[out] pResult sum of the squares value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** The function is implemented using a 64-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** The input is represented in 1.15 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** Intermediate multiplication yields a 2.30 format, and this 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** result is added without saturation to a 64-bit accumulator in 34.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** With 33 guard bits in the accumulator, there is no risk of overflow, and the ARM GAS /tmp/ccDUJO2W.s page 104 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** full precision of the intermediate multiplication is preserved. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** Finally, the return result is in 34.30 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #if defined(ARM_MATH_MVEI) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** void arm_power_q15( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** const q15_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** uint32_t blockSize, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q63_t * pResult) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** uint32_t blkCnt; /* loop counters */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q15x8_t vecSrc; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q63_t sum = 0LL; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q15_t in; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Compute 8 outputs at a time */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt = blockSize >> 3U; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** while (blkCnt > 0U) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** vecSrc = vldrhq_s16(pSrc); 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * sum lanes 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum = vmlaldavaq(sum, vecSrc, vecSrc); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt --; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** pSrc += 8; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** } 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** * tail 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt = blockSize & 0x7; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** while (blkCnt > 0U) 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Compute Power and store result in a temporary variable, sum. */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in = *pSrc++; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum += ((q31_t) in * in); 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Decrement loop counter */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt--; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** } 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** *pResult = sum; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #else 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** void arm_power_q15( 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** const q15_t * pSrc, 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** uint32_t blockSize, 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q63_t * pResult) 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 1740 .loc 21 105 0 1741 .cfi_startproc 1742 @ args = 0, pretend = 0, frame = 0 1743 @ frame_needed = 0, uses_anonymous_args = 0 ARM GAS /tmp/ccDUJO2W.s page 105 1744 @ link register save eliminated. 1745 .LVL203: 1746 0000 30B4 push {r4, r5} 1747 .LCFI62: 1748 .cfi_def_cfa_offset 8 1749 .cfi_offset 4, -8 1750 .cfi_offset 5, -4 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** uint32_t blkCnt; /* Loop counter */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q63_t sum = 0; /* Temporary result storage */ 1751 .loc 21 107 0 1752 0002 0024 movs r4, #0 1753 0004 0025 movs r5, #0 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q15_t in; /* Temporary variable to store input value * 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** q31_t in32; /* Temporary variable to store packed input 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #endif 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt = blockSize >> 2U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** while (blkCnt > 0U) 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Compute Power and store result in a temporary variable, sum. */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #if defined (ARM_MATH_DSP) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum = __SMLALD(in32, in32, sum); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum = __SMLALD(in32, in32, sum); 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #else 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in = *pSrc++; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum += ((q31_t) in * in); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in = *pSrc++; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum += ((q31_t) in * in); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in = *pSrc++; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum += ((q31_t) in * in); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in = *pSrc++; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum += ((q31_t) in * in); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Decrement loop counter */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt--; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** } 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Loop unrolling: Compute remaining outputs */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt = blockSize % 0x4U; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #else 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** ARM GAS /tmp/ccDUJO2W.s page 106 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Initialize blkCnt with number of samples */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt = blockSize; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** while (blkCnt > 0U) 1754 .loc 21 158 0 1755 0006 29B1 cbz r1, .L179 1756 .LVL204: 1757 .L180: 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Compute Power and store result in a temporary variable, sum. */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** in = *pSrc++; 1758 .loc 21 163 0 1759 0008 30F9023B ldrsh r3, [r0], #2 1760 .LVL205: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 1761 .loc 21 158 0 1762 000c 0139 subs r1, r1, #1 1763 .LVL206: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** sum += ((q31_t) in * in); 1764 .loc 21 164 0 1765 000e C3FB8345 smlalbb r4, r5, r3, r3 1766 .LVL207: 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** { 1767 .loc 21 158 0 1768 0012 F9D1 bne .L180 1769 .LVL208: 1770 .L179: 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Decrement loop counter */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** blkCnt--; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** } 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** /* Store result in 34.30 format */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** *pResult = sum; 1771 .loc 21 171 0 1772 0014 C2E90045 strd r4, [r2] 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c **** } 1773 .loc 21 172 0 1774 0018 30BC pop {r4, r5} 1775 .LCFI63: 1776 .cfi_restore 5 1777 .cfi_restore 4 1778 .cfi_def_cfa_offset 0 1779 001a 7047 bx lr 1780 .cfi_endproc 1781 .LFE168: 1783 .section .text.arm_power_q31,"ax",%progbits 1784 .align 1 1785 .p2align 2,,3 1786 .global arm_power_q31 1787 .syntax unified 1788 .thumb 1789 .thumb_func ARM GAS /tmp/ccDUJO2W.s page 107 1790 .fpu fpv4-sp-d16 1792 arm_power_q31: 1793 .LFB169: 1794 .file 22 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Title: arm_power_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Description: Sum of the squares of the elements of a Q31 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @addtogroup power 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @brief Sum of the squares of the elements of a Q31 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @param[out] pResult sum of the squares value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** The function is implemented using a 64-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** The input is represented in 1.31 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** Intermediate multiplication yields a 2.62 format, and this 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** result is truncated to 2.48 format by discarding the lower 14 bits. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** The 2.48 result is then added without saturation to a 64-bit accumulator in 16.4 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** With 15 guard bits in the accumulator, there is no risk of overflow, and the ARM GAS /tmp/ccDUJO2W.s page 108 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** full precision of the intermediate multiplication is preserved. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** Finally, the return result is in 16.48 format. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** void arm_power_q31( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** const q31_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** uint32_t blockSize, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q63_t * pResult) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** uint32_t blkCnt; /* loop counters */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q31x4_t vecSrc; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q63_t sum = 0LL; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q31_t in; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Compute 4 outputs at a time */ 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt = blockSize >> 2U; 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** while (blkCnt > 0U) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** vecSrc = vldrwq_s32(pSrc); 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * sum lanes 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum = vrmlaldavhaq(sum, vecSrc, vecSrc); 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt --; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** pSrc += 4; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** } 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** * tail 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt = blockSize & 0x3; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** while (blkCnt > 0U) 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Compute Power and store result in a temporary variable, sum. */ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** in = *pSrc++; 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum += ((q63_t) in * in) >> 8; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Decrement loop counter */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt--; 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** } 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** *pResult = asrl(sum, 6); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** #else 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** void arm_power_q31( 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** const q31_t * pSrc, 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** uint32_t blockSize, 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q63_t * pResult) 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 1795 .loc 22 105 0 1796 .cfi_startproc 1797 @ args = 0, pretend = 0, frame = 0 1798 @ frame_needed = 0, uses_anonymous_args = 0 1799 @ link register save eliminated. ARM GAS /tmp/ccDUJO2W.s page 109 1800 .LVL209: 1801 0000 2DE9F003 push {r4, r5, r6, r7, r8, r9} 1802 .LCFI64: 1803 .cfi_def_cfa_offset 24 1804 .cfi_offset 4, -24 1805 .cfi_offset 5, -20 1806 .cfi_offset 6, -16 1807 .cfi_offset 7, -12 1808 .cfi_offset 8, -8 1809 .cfi_offset 9, -4 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** uint32_t blkCnt; /* Loop counter */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q63_t sum = 0; /* Temporary result storage */ 1810 .loc 22 107 0 1811 0004 4FF00008 mov r8, #0 1812 0008 4FF00009 mov r9, #0 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** q31_t in; /* Temporary variable to store input value * 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt = blockSize >> 2U; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** while (blkCnt > 0U) 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** in = *pSrc++; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum += ((q63_t) in * in) >> 14U; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** in = *pSrc++; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum += ((q63_t) in * in) >> 14U; 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** in = *pSrc++; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum += ((q63_t) in * in) >> 14U; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** in = *pSrc++; 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum += ((q63_t) in * in) >> 14U; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Decrement loop counter */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt--; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** } 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Loop unrolling: Compute remaining outputs */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt = blockSize % 0x4U; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** #else 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Initialize blkCnt with number of samples */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt = blockSize; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** while (blkCnt > 0U) 1813 .loc 22 146 0 1814 000c 71B1 cbz r1, .L185 1815 .LVL210: ARM GAS /tmp/ccDUJO2W.s page 110 1816 .L186: 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Compute Power and store result in a temporary variable, sum. */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** in = *pSrc++; 1817 .loc 22 151 0 1818 000e 50F8044B ldr r4, [r0], #4 1819 .LVL211: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** sum += ((q63_t) in * in) >> 14U; 1820 .loc 22 152 0 1821 0012 84FB0445 smull r4, r5, r4, r4 1822 .LVL212: 1823 0016 A60B lsrs r6, r4, #14 1824 0018 46EA8546 orr r6, r6, r5, lsl #18 1825 001c 18EB0608 adds r8, r8, r6 1826 .LVL213: 1827 0020 4FEAA537 asr r7, r5, #14 1828 0024 49EB0709 adc r9, r9, r7 1829 .LVL214: 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** { 1830 .loc 22 146 0 1831 0028 0139 subs r1, r1, #1 1832 .LVL215: 1833 002a F0D1 bne .L186 1834 .LVL216: 1835 .L185: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Decrement loop counter */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** blkCnt--; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** } 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** /* Store results in 16.48 format */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** *pResult = sum; 1836 .loc 22 159 0 1837 002c C2E90089 strd r8, [r2] 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c **** } 1838 .loc 22 160 0 1839 0030 BDE8F003 pop {r4, r5, r6, r7, r8, r9} 1840 .LCFI65: 1841 .cfi_restore 9 1842 .cfi_restore 8 1843 .cfi_restore 7 1844 .cfi_restore 6 1845 .cfi_restore 5 1846 .cfi_restore 4 1847 .cfi_def_cfa_offset 0 1848 0034 7047 bx lr 1849 .cfi_endproc 1850 .LFE169: 1852 0036 00BF .section .text.arm_power_q7,"ax",%progbits 1853 .align 1 1854 .p2align 2,,3 1855 .global arm_power_q7 1856 .syntax unified 1857 .thumb 1858 .thumb_func ARM GAS /tmp/ccDUJO2W.s page 111 1859 .fpu fpv4-sp-d16 1861 arm_power_q7: 1862 .LFB170: 1863 .file 23 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Title: arm_power_q7.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Description: Sum of the squares of the elements of a Q7 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @addtogroup power 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @brief Sum of the squares of the elements of a Q7 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @param[out] pResult sum of the squares value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** The function is implemented using a 32-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** The input is represented in 1.7 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** Intermediate multiplication yields a 2.14 format, and this 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** result is added without saturation to an accumulator in 18.14 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** With 17 guard bits in the accumulator, there is no risk of overflow, and the 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** full precision of the intermediate multiplication is preserved. ARM GAS /tmp/ccDUJO2W.s page 112 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** Finally, the return result is in 18.14 format. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** */ 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #if defined(ARM_MATH_MVEI) 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** void arm_power_q7( 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** const q7_t * pSrc, 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** uint32_t blockSize, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q31_t * pResult) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** uint32_t blkCnt; /* loop counters */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q7x16_t vecSrc; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q31_t sum = 0LL; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q7_t in; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Compute 16 outputs at a time */ 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt = blockSize >> 4U; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** while (blkCnt > 0U) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** vecSrc = vldrbq_s8(pSrc); 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * sum lanes 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum = vmladavaq(sum, vecSrc, vecSrc); 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt--; 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** pSrc += 16; 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** * tail 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt = blockSize & 0xF; 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** while (blkCnt > 0U) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Compute Power and store result in a temporary variable, sum. */ 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in = *pSrc++; 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum += ((q15_t) in * in); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Decrement loop counter */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt--; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** *pResult = sum; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #else 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** void arm_power_q7( 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** const q7_t * pSrc, 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** uint32_t blockSize, 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q31_t * pResult) 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 1864 .loc 23 104 0 1865 .cfi_startproc 1866 @ args = 0, pretend = 0, frame = 0 1867 @ frame_needed = 0, uses_anonymous_args = 0 1868 @ link register save eliminated. 1869 .LVL217: ARM GAS /tmp/ccDUJO2W.s page 113 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** uint32_t blkCnt; /* Loop counter */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q31_t sum = 0; /* Temporary result storage */ 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q7_t in; /* Temporary variable to store input value * 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q31_t in32; /* Temporary variable to store packed input 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q31_t in1, in2; /* Temporary variables to store input value 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #endif 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #if defined (ARM_MATH_LOOPUNROLL) 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Loop unrolling: Compute 4 outputs at a time */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt = blockSize >> 2U; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** while (blkCnt > 0U) 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Compute Power and store result in a temporary variable, sum. */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #if defined (ARM_MATH_DSP) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in32 = read_q7x4_ia ((q7_t **) &pSrc); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in1 = __SXTB16(__ROR(in32, 8)); 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in2 = __SXTB16(in32); 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* calculate power and accumulate to accumulator */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum = __SMLAD(in1, in1, sum); 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum = __SMLAD(in2, in2, sum); 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #else 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in = *pSrc++; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum += ((q15_t) in * in); 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in = *pSrc++; 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum += ((q15_t) in * in); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in = *pSrc++; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum += ((q15_t) in * in); 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in = *pSrc++; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum += ((q15_t) in * in); 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #endif /* #if defined (ARM_MATH_DSP) */ 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Decrement loop counter */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt--; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Loop unrolling: Compute remaining outputs */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt = blockSize % 0x4U; 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #else 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Initialize blkCnt with number of samples */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt = blockSize; 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** while (blkCnt > 0U) ARM GAS /tmp/ccDUJO2W.s page 114 1870 .loc 23 161 0 1871 0000 61B1 cbz r1, .L196 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** uint32_t blkCnt; /* Loop counter */ 1872 .loc 23 104 0 1873 0002 10B4 push {r4} 1874 .LCFI66: 1875 .cfi_def_cfa_offset 4 1876 .cfi_offset 4, -4 1877 0004 4418 adds r4, r0, r1 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** q7_t in; /* Temporary variable to store input value * 1878 .loc 23 106 0 1879 0006 0021 movs r1, #0 1880 .LVL218: 1881 .L192: 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Compute Power and store result in a temporary variable, sum. */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** in = *pSrc++; 1882 .loc 23 166 0 1883 0008 10F9013B ldrsb r3, [r0], #1 1884 .LVL219: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 1885 .loc 23 161 0 1886 000c A042 cmp r0, r4 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** sum += ((q15_t) in * in); 1887 .loc 23 167 0 1888 000e 13FB0311 smlabb r1, r3, r3, r1 1889 .LVL220: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** { 1890 .loc 23 161 0 1891 0012 F9D1 bne .L192 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Decrement loop counter */ 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** blkCnt--; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** /* Store result in 18.14 format */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** *pResult = sum; 1892 .loc 23 174 0 1893 0014 1160 str r1, [r2] 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 1894 .loc 23 175 0 1895 0016 5DF8044B ldr r4, [sp], #4 1896 .LCFI67: 1897 .cfi_restore 4 1898 .cfi_def_cfa_offset 0 1899 001a 7047 bx lr 1900 .LVL221: 1901 .L196: 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c **** } 1902 .loc 23 174 0 1903 001c 1160 str r1, [r2] 1904 001e 7047 bx lr 1905 .cfi_endproc 1906 .LFE170: 1908 .section .text.arm_rms_f32,"ax",%progbits ARM GAS /tmp/ccDUJO2W.s page 115 1909 .align 1 1910 .p2align 2,,3 1911 .global arm_rms_f32 1912 .syntax unified 1913 .thumb 1914 .thumb_func 1915 .fpu fpv4-sp-d16 1917 arm_rms_f32: 1918 .LFB171: 1919 .file 24 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Title: arm_rms_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Description: Root mean square value of the elements of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @defgroup RMS Root mean square (RMS) 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** Calculates the Root Mean Square of the elements in the input vector. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** The underlying algorithm is used: 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c ****       Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockS
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c ****
44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** There are separate functions for floating point, Q31, and Q15 data types. 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** */ 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 116 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @addtogroup RMS 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @{ 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** */ 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /** 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @brief Root Mean Square of the elements of a floating-point vector. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @param[in] pSrc points to the input vector 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @param[in] blockSize number of samples in input vector 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @param[out] pResult root mean square value returned here 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** @return none 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** void arm_rms_f32( 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** const float32_t * pSrc, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** uint32_t blockSize, 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t * pResult) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t pow = 0.0f; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** arm_power_f32(pSrc, blockSize, &pow); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute Rms and store the result in the destination */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** arm_sqrt_f32(pow / (float32_t) blockSize, pResult); 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #else 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** void arm_rms_f32( 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** const float32_t * pSrc, 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** uint32_t blockSize, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t * pResult) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t sum = 0.0f; /* accumulator */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t in; /* Temporary variable to store input value */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** uint32_t blkCnt; /* loop counter */ 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32x2_t sumV2; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32x4_t inV; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt = blockSize >> 2U; 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute 4 outputs at a time. 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** while (blkCnt > 0U) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute Power and then store the result in a temporary variable, sum. */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** inV = vld1q_f32(pSrc); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sumV = vmlaq_f32(sumV, inV, inV); 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** pSrc += 4; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Decrement the loop counter */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt--; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** ARM GAS /tmp/ccDUJO2W.s page 117 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** ** No loop unrolling is used. */ 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt = blockSize % 0x4U; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** while (blkCnt > 0U) 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* compute power and then store the result in a temporary variable, sum. */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** in = *pSrc++; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum += in * in; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Decrement the loop counter */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt--; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute Rms and store the result in the destination */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** arm_sqrt_f32(sum / (float32_t) blockSize, pResult); 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #else 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** void arm_rms_f32( 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** const float32_t * pSrc, 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** uint32_t blockSize, 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t * pResult) 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 1920 .loc 24 131 0 1921 .cfi_startproc 1922 @ args = 0, pretend = 0, frame = 8 1923 @ frame_needed = 0, uses_anonymous_args = 0 1924 @ link register save eliminated. 1925 .LVL222: 1926 0000 82B0 sub sp, sp, #8 1927 .LCFI68: 1928 .cfi_def_cfa_offset 8 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** uint32_t blkCnt; /* Loop counter */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t sum = 0.0f; /* Temporary result storage */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t in; /* Temporary variable to store input value * 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt = blockSize >> 2U; 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** while (blkCnt > 0U) 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** in = *pSrc++; 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute sum of squares and store result in a temporary variable, sum. */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum += in * in; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** in = *pSrc++; 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum += in * in; 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** in = *pSrc++; ARM GAS /tmp/ccDUJO2W.s page 118 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum += in * in; 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** in = *pSrc++; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum += in * in; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Decrement loop counter */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt--; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Loop unrolling: Compute remaining outputs */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt = blockSize % 0x4U; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #else 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Initialize blkCnt with number of samples */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt = blockSize; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** while (blkCnt > 0U) 1929 .loc 24 172 0 1930 0002 0191 str r1, [sp, #4] 1931 0004 C9B1 cbz r1, .L207 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** float32_t in; /* Temporary variable to store input value * 1932 .loc 24 133 0 1933 0006 9FED107A vldr.32 s14, .L209 1934 000a 0B46 mov r3, r1 1935 .LVL223: 1936 .L201: 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** in = *pSrc++; 1937 .loc 24 176 0 1938 000c F0EC017A vldmia.32 r0!, {s15} 1939 .LVL224: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 1940 .loc 24 172 0 1941 0010 013B subs r3, r3, #1 1942 .LVL225: 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute sum of squares and store result in a temporary variable. */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** sum += ( in * in); 1943 .loc 24 178 0 1944 0012 A7EEA77A vfma.f32 s14, s15, s15 1945 .LVL226: 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** { 1946 .loc 24 172 0 1947 0016 F9D1 bne .L201 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Decrement loop counter */ 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** blkCnt--; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** /* Compute Rms and store result in destination */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** arm_sqrt_f32(sum / (float32_t) blockSize, pResult); 1948 .loc 24 185 0 1949 0018 DDED017A vldr.32 s15, [sp, #4] @ int ARM GAS /tmp/ccDUJO2W.s page 119 1950 .LVL227: 1951 001c F8EE677A vcvt.f32.u32 s15, s15 1952 0020 C7EE276A vdiv.f32 s13, s14, s15 1953 .LVL228: 1954 .LBB22: 1955 .LBB23: 1956 .file 25 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /****************************************************************************** 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @file arm_math.h 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Public header file for CMSIS DSP Library 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @version V1.7.0 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @date 18. March 2019 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ******************************************************************************/ 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved. 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * SPDX-License-Identifier: Apache-2.0 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * not use this file except in compliance with the License. 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * You may obtain a copy of the License at 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * www.apache.org/licenses/LICENSE-2.0 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Unless required by applicable law or agreed to in writing, software 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * See the License for the specific language governing permissions and 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * limitations under the License. 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \mainpage CMSIS DSP Software Library 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Introduction 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This user manual describes the CMSIS DSP software library, 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * based devices. 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is divided into a number of functions each covering a specific category: 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Basic math functions 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Fast math functions 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Complex math functions 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Filtering functions 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Matrix functions 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Transform functions 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Motor control functions 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Statistical functions 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support functions 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Interpolation functions 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Support Vector Machine functions (SVM) 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Bayes classifier functions 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Distance functions 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library has generally separate functions for operating on 8-bit integers, 16-bit integers, ARM GAS /tmp/ccDUJO2W.s page 120 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit integer and 32-bit floating-point values. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Using the Library 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains prebuilt versions of the libraries in the Lib fold 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Here is the list of pre-built libraries : 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7l_math.lib (Cortex-M7, Little endian) 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM7b_math.lib (Cortex-M7, Big endian) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit) 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit) 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4l_math.lib (Cortex-M4, Little endian) 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM4b_math.lib (Cortex-M4, Big endian) 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3l_math.lib (Cortex-M3, Little endian) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM3b_math.lib (Cortex-M3, Big endian) 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian) 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian) 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions) 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precis 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library functions are declared in the public file arm_math.h which is placed 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Simply include this file and link the appropriate library in the application and begin calling 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * public header file arm_math.h for Cortex-M cores with little endian and big endi 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Examples 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * -------- 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library ships with a number of examples which demonstrate how to use the library functions 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Toolchain Support 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library is now tested on Fast Models building with cmake. 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Core M0, M7, A5 are tested. 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Building the Library 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library installer contains a project file to rebuild libraries on MDK toolchain in the 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * CMSIS-DSP in ARM::CMSIS Pack 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ----------------------------- 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directorie 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |File/Folder |Content 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |---------------------------------|----------------------------------------------------------- ARM GAS /tmp/ccDUJO2W.s page 122 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\Documentation\\DSP | This documentation 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Examples | Example projects demonstrating the usage of the library fu 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Include | DSP_Lib include files 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Lib | DSP_Lib binaries 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Projects | Projects to rebuild DSP_Lib binaries 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * |\b CMSIS\\DSP\\Source | DSP_Lib source files 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *
174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Revision History of CMSIS-DSP 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ------------ 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Please refer to \ref ChangeLog_pg. 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMath Basic Math Functions 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFastMath Fast Math Functions 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides a fast approximation to sine, cosine, and square root. 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * As compared to most of the other functions in the CMSIS math library, the fast math functions 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * operate on individual values and not arrays. 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data. 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupCmplxMath Complex Math Functions 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions operates on complex data vectors. 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The data in the complex arrays is stored in an interleaved fashion 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * (real, imag, real, imag, ...). 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In the API functions, the number of samples in a complex array refers 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * to the number of complex values; the array contains twice this number of 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * real values. 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupFilters Filtering Functions 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupMatrix Matrix Functions 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions provides basic matrix math operations. 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The functions operate on matrix data structures. For example, 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the type 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * definition for the floating-point matrix structure is shown 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * below: 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     typedef struct
 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     {
 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numRows;     // number of rows of the matrix.
 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       uint16_t numCols;     // number of columns of the matrix.
 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *       float32_t *pData;     // points to the data of the matrix.
 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     } arm_matrix_instance_f32;
ARM GAS  /tmp/ccDUJO2W.s 			page 123


 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are similar definitions for Q15 and Q31 data types. 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The structure specifies the size of the matrix and then points to 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * an array of data. The array is of size numRows X numCols 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the values are arranged in row order. That is, the 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * matrix element (i, j) is stored at: 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     pData[i*numCols + j]
 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Init Functions 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is an associated initialization function for each type of matrix 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data structure. 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function sets the values of the internal structure fields. 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15() 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for floating-point, Q31 and Q15 types, respectively. 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Use of the initialization function is optional. However, if initialization function is used 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * then the instance structure cannot be placed into a const data section. 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * To place the instance structure in a const data 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * section, manually initialize the data structure. For example: 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where nRows specifies the number of rows, nColumns 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * specifies the number of columns, and pData points to the 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * data array. 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Size Checking 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * By default all of the matrix functions perform size checking on the input and 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * output matrices. For example, the matrix addition function verifies that the 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * two input matrices and the output matrix all have the same number of rows and 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * columns. If the size check fails the functions return: 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SIZE_MISMATCH
 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Otherwise the functions return 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_SUCCESS
 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is some overhead associated with this matrix size checking. 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The matrix size checking is enabled via the \#define 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *     ARM_MATH_MATRIX_CHECK
 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****  *
271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * within the library project settings. By default this macro is defined 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and size checking is enabled. By changing the project settings and 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * undefining this macro size checking is eliminated and the functions 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * run a bit faster. With size checking disabled the functions always 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * return ARM_MATH_SUCCESS. 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 124 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupTransforms Transform Functions 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupController Controller Functions 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupStats Statistics Functions 288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSupport Support Functions 292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupInterpolation Interpolation Functions 296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * These functions perform 1- and 2-dimensional interpolation of data. 297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is used for 1-dimensional data and 298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * bilinear interpolation is used for 2-dimensional data. 299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupExamples Examples 303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupSVM SVM Functions 307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions is implementing SVM classification on 2 classes. 308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. The parameters can be easily 309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/SVM.py 311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If more than 2 classes are needed, the functions in this folder 313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * will have to be used, as building blocks, to do multi-class classification. 314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * No multi-class classification is provided in this SVM folder. 316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupBayes Bayesian estimators 322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Implement the naive gaussian Bayes estimator. 324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The training must be done from scikit-learn. 325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The parameters can be easily 327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * generated from the scikit-learn object. Some examples are given in 328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * DSP/Testing/PatternGeneration/Bayes.py 329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup groupDistance Distance functions 333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Distance functions for use with clustering algorithms. 335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are distance functions for float vectors and boolean vectors. ARM GAS /tmp/ccDUJO2W.s page 125 336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef _ARM_MATH_H 341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _ARM_MATH_H 342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __cplusplus 344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** extern "C" 345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Compiler specific diagnostic adjustment */ 349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic push 355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wconversion" 357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( _MSC_VER ) 368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Included for instrinsics definitions */ 375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (_MSC_VER ) 376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __forceinline 378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __inline 379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __declspec(align(x)) 380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined (__GNUC_PYTHON__) 382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_FORCEINLINE static __attribute__((inline)) 385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __STATIC_INLINE static __attribute__((inline)) 386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wunused-function" 387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #pragma GCC diagnostic ignored "-Wattributes" 388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include "cmsis_compiler.h" 391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 126 393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MAX ((float64_t)DBL_MAX) 402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MAX ((float32_t)FLT_MAX) 403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MAX ((float16_t)FLT_MAX) 406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_MIN (-DBL_MAX) 409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_MIN (-FLT_MAX) 410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_MIN (-(float16_t)FLT_MAX) 413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMAX ((float64_t)DBL_MAX) 416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMAX ((float32_t)FLT_MAX) 417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMAX ((float16_t)FLT_MAX) 420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F64_ABSMIN ((float64_t)0.0) 423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F32_ABSMIN ((float32_t)0.0) 424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define F16_ABSMIN ((float16_t)0.0) 427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MAX ((q31_t)(0x7FFFFFFFL)) 430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MAX ((q15_t)(0x7FFF)) 431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MAX ((q7_t)(0x7F)) 432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_MIN ((q31_t)(0x80000000L)) 433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_MIN ((q15_t)(0x8000)) 434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_MIN ((q7_t)(0x80)) 435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMAX ((q31_t)(0x7FFFFFFFL)) 437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMAX ((q15_t)(0x7FFF)) 438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMAX ((q7_t)(0x7F)) 439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q31_ABSMIN ((q31_t)0) 440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q15_ABSMIN ((q15_t)0) 441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define Q7_ABSMIN ((q7_t)0) 442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* evaluate ARM DSP feature */ 444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_DSP 1 446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include ARM GAS /tmp/ccDUJO2W.s page 127 450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) 453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEF 454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_MVEF) 458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_MVEI 459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define ARM_MATH_FLOAT16 460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) 463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #include 464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for reciprocal calculation in Normalized LMS 469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q31 ((q31_t)(0x100)) 472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define DELTA_Q15 ((q15_t)0x5) 473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INDEX_MASK 0x0000003F 474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef PI 475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define PI 3.14159265358979f 476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Fast math approximations 480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_TABLE_SIZE 512 483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q31_SHIFT (32 - 10) 484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define FAST_MATH_Q15_SHIFT (16 - 10) 485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CONTROLLER_Q31_SHIFT (32 - 9) 486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q31 0x400000 487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define TABLE_SPACING_Q15 0x80 488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros required for SINE and COSINE Controller functions 491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31(q31) Fixed value of 2/360 */ 493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* -1 to +1 is divided into 360 values so total spacing is (2/360) */ 494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define INPUT_SPACING 0xB60B61 495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Macros for complex numbers 498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Dimension C vector space */ 501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define CMPLX_DIM 2 502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Error status returned by some functions in the library. 505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 128 507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SUCCESS = 0, /**< No error */ 510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_ARGUMENT_ERROR = -1, /**< One or more arguments are incorrect */ 511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_LENGTH_ERROR = -2, /**< Length of data buffer is incorrect */ 512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SIZE_MISMATCH = -3, /**< Size of matrices is not compatible with the operation 513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_NANINF = -4, /**< Not-a-number (NaN) or infinity is generated */ 514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_SINGULAR = -5, /**< Input matrix is singular and cannot be inverted */ 515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_MATH_TEST_FAILURE = -6 /**< Test Failed */ 516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_status; 517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional data type in 1.7 format. 520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8_t q7_t; 522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional data type in 1.15 format. 525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16_t q15_t; 527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 1.31 format. 530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q31_t; 532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional data type in 1.63 format. 535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64_t q63_t; 537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point type definition. 540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float float32_t; 542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit floating-point type definition. 545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef double float64_t; 547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief vector types 550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined (ARM_MATH_MVEI) 552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit fractional 128-bit vector data type in 1.63 format 554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t q63x2_t; 556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 1.31 format. 559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q31x4_t; 561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector data type with 16-bit alignement in 1.15 format. ARM GAS /tmp/ccDUJO2W.s page 129 564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x8_t q15x8_t; 566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector data type with 8-bit alignement in 1.7 format. 569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x16_t q7x16_t; 571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format. 574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x2_t q31x4x2_t; 576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format. 579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x4_t q31x4x4_t; 581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format. 584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x2_t q15x8x2_t; 586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format. 589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x4_t q15x8x4_t; 591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format. 594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x2_t q7x16x2_t; 596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format. 599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x4_t q7x16x4_t; 601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional data type in 9.23 format. 604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32_t q23_t; 606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector data type in 9.23 format. 609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t q23x4_t; 611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit status 128-bit vector data type. 614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int64x2_t status64x2_t; 616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 128-bit vector data type. 619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x4_t; ARM GAS /tmp/ccDUJO2W.s page 130 621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 128-bit vector data type. 624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x8_t; 626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 128-bit vector data type. 629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x16_t; 631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF) /* floating point vector*/ 636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector type 638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4_t f32x4_t; 640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector data type 644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x8_t f16x8_t; 646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector pair data type 650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x2_t f32x4x2_t; 652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector quadruplet data type 655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x4_t f32x4x4_t; 657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector pair data type 661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x2_t f16x8x2_t; 663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector quadruplet data type 666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x4_t f16x8x4_t; 668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 128-bit vector data type 672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x4_t 674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x4_t f; 676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x4_t i; 677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x4_t; ARM GAS /tmp/ccDUJO2W.s page 131 678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 128-bit vector data type 682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x8_t 684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x8_t f; 686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x8_t i; 687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x8_t; 688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_NEON) 693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector data type in 1.31 format. 695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2_t q31x2_t; 697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector data type in 1.15 format. 700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) int16x4_t q15x4_t; 702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector data type in 1.7 format. 705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(1) int8x8_t q7x8_t; 707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit float 64-bit vector data type. 710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2_t f32x2_t; 712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit float 64-bit vector data type. 716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef __ALIGNED(2) float16x4_t f16x4_t; 718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 128-bit vector triplet data type 722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x4x3_t f32x4x3_t; 724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 128-bit vector triplet data type 728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x8x3_t f16x8x3_t; 730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format 734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccDUJO2W.s page 132 735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x4x3_t; 736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format 739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8x3_t q15x8x3_t; 741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format 744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16x3_t q7x16x3_t; 746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector pair data type 749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x2_t f32x2x2_t; 751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector triplet data type 754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x3_t f32x2x3_t; 756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit floating-point 64-bit vector quadruplet data type 759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float32x2x4_t f32x2x4_t; 761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector pair data type 765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x2_t f16x4x2_t; 767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector triplet data type 770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x3_t f16x4x3_t; 772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit floating-point 64-bit vector quadruplet data type 775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef float16x4x4_t f16x4x4_t; 777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format 781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x2_t q31x2x2_t; 783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format 786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x2x3_t q31x2x3_t; 788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format 791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccDUJO2W.s page 133 792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4x3_t q31x2x4_t; 793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format 796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x2_t; 798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format 801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x2_t q15x4x3_t; 803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format 806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x4x3_t q15x4x4_t; 808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format 811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x2_t q7x8x2_t; 813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format 816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x3_t q7x8x3_t; 818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format 821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x8x4_t q7x8x4_t; 823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit ubiquitous 64-bit vector data type 826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any32x2_t 828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32x2_t f; 830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32x2_t i; 831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any32x2_t; 832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_FLOAT16) 834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit ubiquitous 64-bit vector data type 836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef union _any16x4_t 838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float16x4_t f; 840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int16x4_t i; 841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } any16x4_t; 842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 32-bit status 64-bit vector data type. 846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int32x4_t status32x2_t; 848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 134 849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 16-bit status 64-bit vector data type. 851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int16x8_t status16x4_t; 853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 8-bit status 64-bit vector data type. 856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef int8x16_t status8x8_t; 858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief definition to read/write two 16 bit values. 865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @deprecated 866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 ) 870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __GNUC__ ) 872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t __packed 875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TI_ARM__ ) 876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __CSMC__ ) 878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __TASKING__ ) 880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE __un(aligned) int32_t 881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined(_MSC_VER ) 882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_TYPE int32_t 883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #error Unknown compiler 885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32(addr) (*(__SIMD32_TYPE **) & (addr)) 888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD32_CONST(addr) ( (__SIMD32_TYPE * ) (addr)) 889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define _SIMD32_OFFSET(addr) (*(__SIMD32_TYPE * ) (addr)) 890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __SIMD64(addr) (*( int64_t **) & (addr)) 891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define STEP(x) (x) <= 0 ? 0 : 1 893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define SQ(x) ((x) * (x)) 894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* SIMD replacement */ 896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer. 900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2 ( 904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15) 905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccDUJO2W.s page 135 906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, pQ15, 4); 910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ; 912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and increment pointer afterwards. 919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_ia ( 923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 2 Q15 from Q15 pointer and decrement pointer afterwards. 939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q15x2_da ( 943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15) 944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ15, 4); 949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF); 951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 -= 2; 954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer and increment pointer afterwards. 959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccDUJO2W.s page 136 963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2_ia ( 964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t ** pQ15, 965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ15, &val, 4); 970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[0] = (val & 0x0FFFF); 972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ15)[1] = (val >> 16) & 0x0FFFF; 973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ15 += 2; 976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 2 Q15 to Q15 pointer. 980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ15 points to input value 981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q15x2 ( 985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pQ15, 986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (pQ15, &val, 4); 992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[0] = val & 0x0FFFF; 994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** pQ15[1] = val >> 16; 995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and increment pointer afterwards. 1001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 1003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_ia ( 1005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7) 1006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 1008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4); 1012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val =(((*pQ7)[3] & 0x0FF) << 24) | (((*pQ7)[2] & 0x0FF) << 16) | (((*pQ7)[1] & 0x0FF) << 8) | 1014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4; 1017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 1019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } ARM GAS /tmp/ccDUJO2W.s page 137 1020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Read 4 Q7 from Q7 pointer and decrement pointer afterwards. 1023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return Q31 value 1025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t read_q7x4_da ( 1027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7) 1028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val; 1030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (&val, *pQ7, 4); 1032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16) | ((((*pQ7)[1]) & 0x0FF) << 1034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 -= 4; 1036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (val); 1038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Write 4 Q7 to Q7 pointer and increment pointer afterwards. 1042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pQ7 points to input value 1043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] value Q31 value 1044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 1045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void write_q7x4_ia ( 1047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t ** pQ7, 1048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value) 1049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t val = value; 1051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifdef __ARM_FEATURE_UNALIGNED 1052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** memcpy (*pQ7, &val, 4); 1053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[0] = val & 0x0FF; 1055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[1] = (val >> 8) & 0x0FF; 1056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[2] = (val >> 16) & 0x0FF; 1057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (*pQ7)[3] = (val >> 24) & 0x0FF; 1058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pQ7 += 4; 1061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Normally those kind of definitions are in a compiler file 1066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in Core or Core_A. 1067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** But for MSVC compiler it is a bit special. The goal is very specific 1069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** to CMSIS-DSP and only to allow the use of this library from other 1070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** systems like Python or Matlab. 1071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** MSVC is not going to be used to cross-compile to ARM. So, having a MSVC 1073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** compiler file in Core or Core_A would not make sense. 1074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) ARM GAS /tmp/ccDUJO2W.s page 138 1077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data) 1078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (data == 0U) { return 32U; } 1080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t count = 0U; 1082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t mask = 0x80000000U; 1083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while ((data & mask) == 0U) 1085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** count += 1U; 1087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** mask = mask >> 1U; 1088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return count; 1090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 1093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if ((sat >= 1U) && (sat <= 32U)) 1095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const int32_t min = -1 - max ; 1098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > max) 1099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max; 1101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < min) 1103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return min; 1105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return val; 1108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (sat <= 31U) 1113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t max = ((1U << sat) - 1U); 1115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (val > (int32_t)max) 1116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return max; 1118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (val < 0) 1120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return 0U; 1122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (uint32_t)val; 1125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_DSP 1129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack two 16 bit values. 1131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0x0000FFFF) | \ 1133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000) ) ARM GAS /tmp/ccDUJO2W.s page 139 1134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) << 0) & (int32_t)0xFFFF0000) | \ 1135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF) ) 1136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief definition to pack four 8 bit values. 1140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #ifndef ARM_MATH_BIG_ENDIAN 1142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) << 0) & (int32_t)0x000000FF) | \ 1143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 8) & (int32_t)0x0000FF00) | \ 1144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \ 1145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v3) << 24) & (int32_t)0xFF000000) ) 1146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 1147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) << 0) & (int32_t)0x000000FF) | \ 1148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v2) << 8) & (int32_t)0x0000FF00) | \ 1149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \ 1150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((int32_t)(v0) << 24) & (int32_t)0xFF000000) ) 1151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q31 values. 1156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t clip_q63_to_q31( 1158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x) 1159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x; 1162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q63 to Q15 values. 1166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t clip_q63_to_q15( 1168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x) 1169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ? 1171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15); 1172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q31 to Q7 values. 1176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q7_t clip_q31_to_q7( 1178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x) 1179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ? 1181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x; 1182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Clips Q31 to Q15 values. 1186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t clip_q31_to_q15( 1188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x) 1189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ? ARM GAS /tmp/ccDUJO2W.s page 140 1191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x; 1192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format. 1196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q63_t mult32x64( 1198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t x, 1199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y) 1200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) + 1202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (((q63_t) (x >> 32) * y) ) ); 1203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type. 1207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t arm_recip_q31( 1209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t in, 1210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * dst, 1211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pRecipTable) 1212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t out; 1214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t tempVal; 1215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index, i; 1216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t signBits; 1217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in > 0) 1219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t) (__CLZ( in) - 1)); 1221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 1223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t) (__CLZ(-in) - 1)); 1225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert input sample to 1.31 format */ 1228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in = (in << signBits); 1229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of index for initial approximated Val */ 1231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (uint32_t)(in >> 24); 1232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (index & INDEX_MASK); 1233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 1235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = pRecipTable[index]; 1236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of reciprocal value */ 1238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* running approximation for two iterations */ 1239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** for (i = 0U; i < 2U; i++) 1240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = (uint32_t) (((q63_t) in * out) >> 31); 1242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFFFFFu - tempVal; 1243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.31 with exp 1 */ 1244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */ 1245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30); 1246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 141 1248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* write output */ 1249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = out; 1250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return num of signbits of out = 1/in value */ 1252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (signBits + 1U); 1253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type. 1258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t arm_recip_q15( 1260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t in, 1261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * dst, 1262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pRecipTable) 1263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t out = 0; 1265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t tempVal = 0; 1266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index = 0, i = 0; 1267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t signBits = 0; 1268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in > 0) 1270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t)(__CLZ( in) - 17)); 1272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 1274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** signBits = ((uint32_t)(__CLZ(-in) - 17)); 1276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert input sample to 1.15 format */ 1279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** in = (in << signBits); 1280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of index for initial approximated Val */ 1282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (uint32_t)(in >> 8); 1283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (index & INDEX_MASK); 1284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 1286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = pRecipTable[index]; 1287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* calculation of reciprocal value */ 1289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* running approximation for two iterations */ 1290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** for (i = 0U; i < 2U; i++) 1291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = (uint32_t) (((q31_t) in * out) >> 15); 1293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** tempVal = 0x7FFFu - tempVal; 1294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1.15 with exp 1 */ 1295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q15_t) (((q31_t) out * tempVal) >> 14); 1296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */ 1297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* write output */ 1300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *dst = out; 1301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return num of signbits of out = 1/in value */ 1303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (signBits + 1); 1304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } ARM GAS /tmp/ccDUJO2W.s page 142 1305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Integer exponentiation 1308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x value 1309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nb integer exponent >= 1 1310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return x^nb 1311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 1312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb) 1314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t r = x; 1316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** nb --; 1317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** while(nb > 0) 1318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = r * x; 1320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** nb--; 1321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return(r); 1323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief 64-bit to 32-bit unsigned normalization 1327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] in is input unsigned long long value 1328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] normalized is the 32-bit normalized value 1329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] norm is norm scale 1330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE void arm_norm_64_to_32u(uint64_t in, int32_t * normalized, int32_t *norm) 1332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t n1; 1334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t hi = (int32_t) (in >> 32); 1335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t lo = (int32_t) ((in << 32) >> 32); 1336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** n1 = __CLZ(hi) - 32; 1338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (!n1) 1339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * input fits in 32-bit 1342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** n1 = __CLZ(lo); 1344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (!n1) 1345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * MSB set, need to scale down by 1 1348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = -1; 1350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = (((uint32_t) lo) >> 1); 1351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } else 1352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (n1 == 32) 1354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * input is zero 1357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = 0; 1359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = 0; 1360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } else 1361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccDUJO2W.s page 143 1362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit normalization 1364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = n1 - 1; 1366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = lo << *norm; 1367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } else 1370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * input fits in 64-bit 1373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** n1 = 1 - n1; 1375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *norm = -n1; 1376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 64 bit normalization 1378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *normalized = (((uint32_t) lo) >> n1) | (hi << (32 - n1)); 1380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den) 1384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t result; 1386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint64_t absNum; 1387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t normalized; 1388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t norm; 1389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * if sum fits in 32bits 1392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * avoid costly 64-bit division 1393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** absNum = num > 0 ? num : -num; 1395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_norm_64_to_32u(absNum, &normalized, &norm); 1396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (norm > 0) 1397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 32-bit division 1399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** result = (q31_t) num / den; 1401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 1402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 64-bit division 1404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** result = (q31_t) (num / den); 1406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return result; 1408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined intrinsic functions 1413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if !defined (ARM_MATH_DSP) 1415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QADD8 1418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccDUJO2W.s page 144 1419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QADD8( 1420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s, t, u; 1424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; 1426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; 1427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** t = __SSAT(((((q31_t)x << 8) >> 24) + (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; 1428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** u = __SSAT(((((q31_t)x ) >> 24) + (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; 1429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); 1431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSUB8 1436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QSUB8( 1438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s, t, u; 1442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF; 1444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF; 1445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** t = __SSAT(((((q31_t)x << 8) >> 24) - (((q31_t)y << 8) >> 24)), 8) & (int32_t)0x000000FF; 1446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** u = __SSAT(((((q31_t)x ) >> 24) - (((q31_t)y ) >> 24)), 8) & (int32_t)0x000000FF; 1447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((u << 24) | (t << 16) | (s << 8) | (r ))); 1449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QADD16 1454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QADD16( 1456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* q31_t r, s; without initialisation 'arm_offset_q15 test' fails but 'intrinsic' tests pass 1460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r = 0, s = 0; 1461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHADD16 1471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHADD16( 1473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccDUJO2W.s page 145 1476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSUB16 1487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QSUB16( 1489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHSUB16 1503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16( 1505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QASX 1519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QASX( 1521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 146 1533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHASX 1535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHASX( 1537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) - (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSAX 1551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __QSAX( 1553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)), 16) & (int32_t)0x0000FFFF; 1559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = __SSAT(((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF; 1560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SHSAX 1567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SHSAX( 1569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t r, s; 1573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** r = (((((q31_t)x << 16) >> 16) + (((q31_t)y ) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** s = (((((q31_t)x ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF; 1576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)((s << 16) | (r ))); 1578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUSDX 1583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUSDX( 1585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - 1589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); ARM GAS /tmp/ccDUJO2W.s page 147 1590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUADX 1594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUADX( 1596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + 1600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) )); 1601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QADD 1606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __QADD( 1608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t x, 1609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t y) 1610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y))); 1612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined QSUB 1617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __QSUB( 1619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t x, 1620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t y) 1621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y))); 1623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLAD 1628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMLAD( 1630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t sum) 1633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + 1635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + 1636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q31_t)sum ) ) )); 1637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLADX 1642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMLADX( 1644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t sum) ARM GAS /tmp/ccDUJO2W.s page 148 1647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + 1649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + 1650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q31_t)sum ) ) )); 1651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLSDX 1656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMLSDX( 1658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t sum) 1661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) - 1663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + 1664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q31_t)sum ) ) )); 1665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLALD 1670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint64_t __SMLALD( 1672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint64_t sum) 1675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */ 1677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + 1678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) + 1679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q63_t)sum ) ) )); 1680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMLALDX 1685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint64_t __SMLALDX( 1687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y, 1689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint64_t sum) 1690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */ 1692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y ) >> 16)) + 1693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y << 16) >> 16)) + 1694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ( ((q63_t)sum ) ) )); 1695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUAD 1700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUAD( 1702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) ARM GAS /tmp/ccDUJO2W.s page 149 1704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) + 1706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); 1707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMUSD 1712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SMUSD( 1714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x, 1715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t y) 1716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) - 1718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x ) >> 16) * (((q31_t)y ) >> 16)) )); 1719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SXTB16 1724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE uint32_t __SXTB16( 1726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t x) 1727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) | 1729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ((((q31_t)x << 8) >> 8) & (q31_t)0xFFFF0000) )); 1730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 1733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief C custom defined SMMLA 1734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE int32_t __SMMLA( 1736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t x, 1737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t y, 1738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t sum) 1739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (sum + (int32_t) (((int64_t) x * y) >> 32)); 1741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 1742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif /* !defined (ARM_MATH_DSP) */ 1744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q7 FIR filter. 1748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t *pState; /**< points to the state variable array. The array is of length 1753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t *pCoeffs; /**< points to the coefficient array. The array is of length num 1754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_q7; 1755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 FIR filter. 1758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccDUJO2W.s page 150 1761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< points to the state variable array. The array is of length 1763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length nu 1764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_q15; 1765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 FIR filter. 1768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< points to the state variable array. The array is of length 1773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length nu 1774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_q31; 1775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point FIR filter. 1778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of filter coefficients in the filter. */ 1782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< points to the state variable array. The array is of length num 1783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length numTap 1784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_instance_f32; 1785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q7 FIR filter. 1788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q7 FIR filter structure. 1789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_q7( 1794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q7 * S, 1795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 1796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 1797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q7 FIR filter. 1801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q7 FIR structure. 1802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. 1803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed. 1806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_init_q7( 1808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_q7 * S, 1809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pCoeffs, 1811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pState, 1812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 FIR filter. 1816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 FIR structure. 1817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. ARM GAS /tmp/ccDUJO2W.s page 151 1818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_q15( 1822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q15 * S, 1823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 1824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 1825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the fast Q15 FIR filter (fast version). 1829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 FIR filter structure. 1830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_fast_q15( 1835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q15 * S, 1836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 1837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 1838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 FIR filter. 1842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 FIR filter structure. 1843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. Must be even and greate 1844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed at a time. 1847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 1848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SUCCESS if initialization was successful or 1849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_ARGUMENT_ERROR if numTaps is not a supported value. 1850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_fir_init_q15( 1852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_q15 * S, 1853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pCoeffs, 1855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 1856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 FIR filter. 1860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR filter structure. 1861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_q31( 1866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q31 * S, 1867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 1868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 1869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the fast Q31 FIR filter (fast version). 1873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR filter structure. 1874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. ARM GAS /tmp/ccDUJO2W.s page 152 1875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_fast_q31( 1879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_q31 * S, 1880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 1881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 1882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 FIR filter. 1886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 FIR structure. 1887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. 1888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed at a time. 1891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_init_q31( 1893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_q31 * S, 1894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pCoeffs, 1896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 1897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point FIR filter. 1901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point FIR structure. 1902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_f32( 1907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_instance_f32 * S, 1908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 1909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 1910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point FIR filter. 1914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point FIR filter structure. 1915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps Number of filter coefficients in the filter. 1916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples that are processed at a time. 1919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_init_f32( 1921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_instance_f32 * S, 1922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 1923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pCoeffs, 1924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState, 1925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 Biquad cascade filter. 1929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccDUJO2W.s page 153 1932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t numStages; /**< number of 2nd order stages in the filter. Overall order is 1933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< Points to the array of state coefficients. The array is of 1934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< Points to the array of coefficients. The array is of lengt 1935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t postShift; /**< Additional shift, in bits, applied to each output sample. * 1936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_casd_df1_inst_q15; 1937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 Biquad cascade filter. 1940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 1944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< Points to the array of state coefficients. The array is of 1945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< Points to the array of coefficients. The array is of lengt 1946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t postShift; /**< Additional shift, in bits, applied to each output sample. * 1947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_casd_df1_inst_q31; 1948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point Biquad cascade filter. 1951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numStages; /**< number of 2nd order stages in the filter. Overall order is 1955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< Points to the array of state coefficients. The array is of 1956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< Points to the array of coefficients. The array is of lengt 1957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_casd_df1_inst_f32; 1958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 1960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the modified Biquad coefs required by vectorized code. 1962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 1964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 1965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t coeffs[8][4]; /**< Points to the array of modified coefficients. The array is of l 1966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_biquad_mod_coef_f32; 1967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 1968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 Biquad cascade filter. 1971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 Biquad cascade structure. 1972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 1973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 1974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 1975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_q15( 1977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q15 * S, 1978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 1979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 1980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 1981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 Biquad cascade filter. 1984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 Biquad cascade structure. 1985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numStages number of 2nd order stages in the filter. 1986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 1987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 1988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] postShift Shift to be applied to the output. Varies according to the coefficie ARM GAS /tmp/ccDUJO2W.s page 154 1989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 1990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_init_q15( 1991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_q15 * S, 1992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 1993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pCoeffs, 1994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 1995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t postShift); 1996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 1997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 1998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex- 1999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 Biquad cascade structure. 2000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_fast_q15( 2005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q15 * S, 2006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 2007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 2008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 Biquad cascade filter 2012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 Biquad cascade structure. 2013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_q31( 2018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q31 * S, 2019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 2020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 2021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex- 2025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 Biquad cascade structure. 2026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_fast_q31( 2031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_q31 * S, 2032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 2033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 2034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 Biquad cascade filter. 2038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 Biquad cascade structure. 2039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numStages number of 2nd order stages in the filter. 2040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 2041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 2042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] postShift Shift to be applied to the output. Varies according to the coefficie 2043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_init_q31( 2045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_q31 * S, ARM GAS /tmp/ccDUJO2W.s page 155 2046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 2047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pCoeffs, 2048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 2049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t postShift); 2050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point Biquad cascade filter. 2053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point Biquad cascade structure. 2054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_f32( 2059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_biquad_casd_df1_inst_f32 * S, 2060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 2061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point Biquad cascade filter. 2066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point Biquad cascade structure 2067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numStages number of 2nd order stages in the filter. 2068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 2069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffsMod points to the modified filter coefficients (only MVE version). 2070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 2071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 2073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_mve_init_f32( 2074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_f32 * S, 2075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 2076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pCoeffs, 2077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_mod_coef_f32 * pCoeffsMod, 2078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState); 2079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 2080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_biquad_cascade_df1_init_f32( 2082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_biquad_casd_df1_inst_f32 * S, 2083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t numStages, 2084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pCoeffs, 2085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState); 2086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise AND of two fixed-point vectors. 2090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_and_u16( 2097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcA, 2098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcB, 2099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 156 2103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise AND of two fixed-point vectors. 2104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_and_u32( 2111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcA, 2112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcB, 2113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise AND of two fixed-point vectors. 2118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_and_u8( 2125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcA, 2126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcB, 2127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise OR of two fixed-point vectors. 2132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_or_u16( 2139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcA, 2140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcB, 2141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise OR of two fixed-point vectors. 2146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_or_u32( 2153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcA, 2154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcB, 2155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise OR of two fixed-point vectors. ARM GAS /tmp/ccDUJO2W.s page 157 2160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_or_u8( 2167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcA, 2168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcB, 2169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise NOT of a fixed-point vector. 2174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input vector 2175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_not_u16( 2180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrc, 2181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise NOT of a fixed-point vector. 2186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input vector 2187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_not_u32( 2192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrc, 2193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise NOT of a fixed-point vector. 2198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input vector 2199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_not_u8( 2204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrc, 2205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise XOR of two fixed-point vectors. 2210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_xor_u16( ARM GAS /tmp/ccDUJO2W.s page 158 2217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcA, 2218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t * pSrcB, 2219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t * pDst, 2220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise XOR of two fixed-point vectors. 2224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_xor_u32( 2231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcA, 2232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t * pSrcB, 2233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t * pDst, 2234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Compute the logical bitwise XOR of two fixed-point vectors. 2238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to input vector A 2239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to input vector B 2240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output vector 2241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 2243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_xor_u8( 2245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcA, 2246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint8_t * pSrcB, 2247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t * pDst, 2248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Struct for specifying sorting algorithm 2252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 2254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_BITONIC = 0, 2256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Bitonic sort */ 2257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_BUBBLE = 1, 2258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Bubble sort */ 2259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_HEAP = 2, 2260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Heap sort */ 2261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_INSERTION = 3, 2262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Insertion sort */ 2263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_QUICK = 4, 2264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Quick sort */ 2265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_SELECTION = 5 2266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Selection sort */ 2267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_sort_alg; 2268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Struct for specifying sorting algorithm 2271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 2273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { ARM GAS /tmp/ccDUJO2W.s page 159 2274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_DESCENDING = 0, 2275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Descending order (9 to 0) */ 2276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SORT_ASCENDING = 1 2277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /**< Ascending order (0 to 9) */ 2278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_sort_dir; 2279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the sorting algorithms. 2282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_alg alg; /**< Sorting algorithm selected */ 2286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir; /**< Sorting order (direction) */ 2287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_sort_instance_f32; 2288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the sorting structure. 2291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 2292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sort_f32( 2296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_sort_instance_f32 * S, 2297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc, 2298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the sorting structure. 2303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] alg Selected algorithm. 2304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] dir Sorting order. 2305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sort_init_f32( 2307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_instance_f32 * S, 2308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_alg alg, 2309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir); 2310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the sorting algorithms. 2313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir; /**< Sorting order (direction) */ 2317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * buffer; /**< Working buffer */ 2318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_merge_sort_instance_f32; 2319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the sorting structure. 2322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pSrc points to the block of input data. 2323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 2324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process. 2325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_merge_sort_f32( 2327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_merge_sort_instance_f32 * S, 2328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pSrc, 2329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pDst, 2330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); ARM GAS /tmp/ccDUJO2W.s page 160 2331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the sorting structure. 2334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] dir Sorting order. 2335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] buffer Working buffer. 2336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_merge_sort_init_f32( 2338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_merge_sort_instance_f32 * S, 2339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_sort_dir dir, 2340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * buffer); 2341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Struct for specifying cubic spline type 2344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef enum 2346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SPLINE_NATURAL = 0, /**< Natural spline */ 2348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM_SPLINE_PARABOLIC_RUNOUT = 1 /**< Parabolic runout spline */ 2349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_spline_type; 2350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point cubic spline interpolation. 2353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_type type; /**< Type (boundary conditions) */ 2357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * x; /**< x values */ 2358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * y; /**< y values */ 2359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t n_x; /**< Number of known data points */ 2360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * coeffs; /**< Coefficients buffer (b,c, and d) */ 2361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_spline_instance_f32; 2362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point cubic spline interpolation. 2365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point spline structure. 2366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] xq points to the x values ot the interpolated data points. 2367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 2368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples of output data. 2369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_spline_f32( 2371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_instance_f32 * S, 2372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * xq, 2373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point cubic spline interpolation. 2378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point spline structure. 2379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] type type of cubic spline interpolation (boundary conditions) 2380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x points to the x values of the known data points. 2381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] y points to the y values of the known data points. 2382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] n number of known data points. 2383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] coeffs coefficients array for b, c, and d 2384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] tempBuffer buffer array for internal computations 2385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_spline_init_f32( 2387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_instance_f32 * S, ARM GAS /tmp/ccDUJO2W.s page 161 2388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_spline_type type, 2389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * x, 2390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * y, 2391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t n, 2392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * coeffs, 2393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * tempBuffer); 2394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point matrix structure. 2397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pData; /**< points to the data of the matrix. */ 2403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_f32; 2404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point matrix structure. 2407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float64_t *pData; /**< points to the data of the matrix. */ 2413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_f64; 2414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 matrix structure. 2417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pData; /**< points to the data of the matrix. */ 2423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_q15; 2424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 matrix structure. 2427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows of the matrix. */ 2431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns of the matrix. */ 2432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pData; /**< points to the data of the matrix. */ 2433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_matrix_instance_q31; 2434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix addition. 2437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_add_f32( 2444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, ARM GAS /tmp/ccDUJO2W.s page 162 2445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix addition. 2450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_add_q15( 2457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix addition. 2463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_add_q31( 2470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point, complex, matrix multiplication. 2476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_cmplx_mult_f32( 2483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15, complex, matrix multiplication. 2489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_cmplx_mult_q15( 2496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst, 2499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch); 2500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 163 2502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31, complex, matrix multiplication. 2503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_cmplx_mult_q31( 2510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix transpose. 2516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either ARM_MATH_SIZE_MISMATCH 2519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * or ARM_MATH_SUCCESS based on the outcome of size checking. 2520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_trans_f32( 2522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrc, 2523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix transpose. 2527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either ARM_MATH_SIZE_MISMATCH 2530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * or ARM_MATH_SUCCESS based on the outcome of size checking. 2531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_trans_q15( 2533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrc, 2534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix transpose. 2538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either ARM_MATH_SIZE_MISMATCH 2541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * or ARM_MATH_SUCCESS based on the outcome of size checking. 2542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_trans_q31( 2544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrc, 2545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix multiplication 2549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_f32( 2556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); ARM GAS /tmp/ccDUJO2W.s page 164 2559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix multiplication 2562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the array for storing intermediate results 2566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_q15( 2570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst, 2573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState); 2574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 2577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the array for storing intermediate results 2581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_fast_q15( 2585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst, 2588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState); 2589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix multiplication 2592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_q31( 2599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4 2605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_mult_fast_q31( 2612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 165 2616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix subtraction 2618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_sub_f32( 2625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcA, 2626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrcB, 2627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix subtraction 2631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_sub_q15( 2638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcA, 2639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrcB, 2640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix subtraction 2644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input matrix structure 2645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input matrix structure 2646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_sub_q31( 2651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcA, 2652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrcB, 2653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix scaling. 2657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input matrix 2658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scale scale factor 2659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output matrix 2660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_scale_f32( 2664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * pSrc, 2665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t scale, 2666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * pDst); 2667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix scaling. 2670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input matrix 2671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale factor 2672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by ARM GAS /tmp/ccDUJO2W.s page 166 2673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix 2674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_scale_q15( 2678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q15 * pSrc, 2679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t scaleFract, 2680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t shift, 2681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * pDst); 2682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix scaling. 2685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to input matrix 2686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale factor 2687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 2688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to output matrix structure 2689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns either 2690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of s 2691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_scale_q31( 2693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_q31 * pSrc, 2694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t scaleFract, 2695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t shift, 2696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * pDst); 2697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 matrix initialization. 2700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point matrix structure. 2701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nRows number of rows in the matrix. 2702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nColumns number of columns in the matrix. 2703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pData points to the matrix data array. 2704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mat_init_q31( 2706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q31 * S, 2707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nRows, 2708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nColumns, 2709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pData); 2710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 matrix initialization. 2713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point matrix structure. 2714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nRows number of rows in the matrix. 2715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nColumns number of columns in the matrix. 2716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pData points to the matrix data array. 2717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mat_init_q15( 2719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_q15 * S, 2720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nRows, 2721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nColumns, 2722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pData); 2723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix initialization. 2726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the floating-point matrix structure. 2727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nRows number of rows in the matrix. 2728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nColumns number of columns in the matrix. 2729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pData points to the matrix data array. ARM GAS /tmp/ccDUJO2W.s page 167 2730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mat_init_f32( 2732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * S, 2733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nRows, 2734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t nColumns, 2735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pData); 2736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 PID Control. 2740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ 2744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if !defined (ARM_MATH_DSP) 2745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t A1; 2746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t A2; 2747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 2748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A1; /**< The derived gain A1 = -Kp - 2Kd | Kd.*/ 2749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 2750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t state[3]; /**< The state array of length 3. */ 2751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t Kp; /**< The proportional gain. */ 2752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t Ki; /**< The integral gain. */ 2753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t Kd; /**< The derivative gain. */ 2754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_pid_instance_q15; 2755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 PID Control. 2758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ 2762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ 2763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t A2; /**< The derived gain, A2 = Kd . */ 2764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t state[3]; /**< The state array of length 3. */ 2765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Kp; /**< The proportional gain. */ 2766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ki; /**< The integral gain. */ 2767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Kd; /**< The derivative gain. */ 2768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_pid_instance_q31; 2769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point PID Control. 2772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t A0; /**< The derived gain, A0 = Kp + Ki + Kd . */ 2776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t A1; /**< The derived gain, A1 = -Kp - 2Kd. */ 2777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t A2; /**< The derived gain, A2 = Kd . */ 2778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t state[3]; /**< The state array of length 3. */ 2779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Kp; /**< The proportional gain. */ 2780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ki; /**< The integral gain. */ 2781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Kd; /**< The derivative gain. */ 2782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_pid_instance_f32; 2783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 168 2787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point PID Control. 2788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the PID structure. 2789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the s 2790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_init_f32( 2792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_f32 * S, 2793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t resetStateFlag); 2794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Reset function for the floating-point PID Control. 2798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S is an instance of the floating-point PID Control structure 2799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_reset_f32( 2801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_f32 * S); 2802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 PID Control. 2806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 PID structure. 2807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the s 2808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_init_q31( 2810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q31 * S, 2811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t resetStateFlag); 2812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Reset function for the Q31 PID Control. 2816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 PID Control structure 2817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_reset_q31( 2820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q31 * S); 2821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 PID Control. 2825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 PID structure. 2826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] resetStateFlag flag to reset the state. 0 = no change in state 1 = reset the s 2827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_init_q15( 2829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q15 * S, 2830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t resetStateFlag); 2831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Reset function for the Q15 PID Control. 2835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the q15 PID Control structure 2836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_pid_reset_q15( 2838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q15 * S); 2839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point Linear Interpolate function. 2843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ ARM GAS /tmp/ccDUJO2W.s page 169 2844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues; /**< nValues */ 2847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x1; /**< x1 */ 2848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t xSpacing; /**< xSpacing */ 2849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pYData; /**< pointer to the table of Y values */ 2850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_linear_interp_instance_f32; 2851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point bilinear interpolation function. 2854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pData; /**< points to the data table. */ 2860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_f32; 2861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 bilinear interpolation function. 2864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pData; /**< points to the data table. */ 2870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_q31; 2871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 bilinear interpolation function. 2874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pData; /**< points to the data table. */ 2880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_q15; 2881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 bilinear interpolation function. 2884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numRows; /**< number of rows in the data table. */ 2888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numCols; /**< number of columns in the data table. */ 2889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t *pData; /**< points to the data table. */ 2890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_bilinear_interp_instance_q7; 2891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector multiplication. 2895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_q7( ARM GAS /tmp/ccDUJO2W.s page 170 2901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 2902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 2903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 2904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector multiplication. 2909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_q15( 2915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 2916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 2917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 2918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector multiplication. 2923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_q31( 2929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 2930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 2931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 2932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector multiplication. 2937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 2938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 2939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 2940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 2941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_mult_f32( 2943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 2944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 2945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 2946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 2947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 CFFT/CIFFT function. 2951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 2955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 2956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 2957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the Sin twiddle factor table. */ ARM GAS /tmp/ccDUJO2W.s page 171 2958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 2959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 2960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 2961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix2_instance_q15; 2962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix2_init_q15( 2965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix2_instance_q15 * S, 2966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 2967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 2968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 2969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix2_q15( 2972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix2_instance_q15 * S, 2973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pSrc); 2974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 2977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 CFFT/CIFFT function. 2978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 2979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 2980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 2982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 2983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 2984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the twiddle factor table. */ 2985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 2986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 2987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 2988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix4_instance_q15; 2989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix4_init_q15( 2992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q15 * S, 2993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 2994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 2995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 2996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 2997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 2998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix4_q15( 2999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix4_instance_q15 * S, 3000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pSrc); 3001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function. 3004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 3009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 3010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ 3011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 3013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 3014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix2_instance_q31; ARM GAS /tmp/ccDUJO2W.s page 172 3015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix2_init_q31( 3018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix2_instance_q31 * S, 3019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix2_q31( 3025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix2_instance_q31 * S, 3026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pSrc); 3027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 CFFT/CIFFT function. 3030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse ( 3035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables (b 3036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the twiddle factor table. */ 3037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differen 3039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different size 3040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix4_instance_q31; 3041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix4_q31( 3044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix4_instance_q31 * S, 3045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pSrc); 3046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix4_init_q31( 3049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q31 * S, 3050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point CFFT/CIFFT function. 3056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse 3061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables 3062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ 3063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differ 3065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different siz 3066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t onebyfftLen; /**< value of 1/fftLen. */ 3067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix2_instance_f32; 3068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix2_init_f32( 3071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix2_instance_f32 * S, ARM GAS /tmp/ccDUJO2W.s page 173 3072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix2_f32( 3078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix2_instance_f32 * S, 3079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc); 3080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point CFFT/CIFFT function. 3083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag; /**< flag that selects forward (ifftFlag=0) or inverse 3088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag; /**< flag that enables (bitReverseFlag=1) or disables 3089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ 3090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t twidCoefModifier; /**< twiddle coefficient modifier that supports differ 3092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevFactor; /**< bit reversal modifier that supports different siz 3093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t onebyfftLen; /**< value of 1/fftLen. */ 3094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_radix4_instance_f32; 3095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_radix4_init_f32( 3098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 * S, 3099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen, 3100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Deprecated */ 3104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_radix4_f32( 3105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_radix4_instance_f32 * S, 3106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc); 3107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the fixed-point CFFT/CIFFT function. 3110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the Twiddle factor table. */ 3115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle poin 3119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle poin 3120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle poin 3121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ 3122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ 3123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *rearranged_twiddle_stride3; 3124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_q15; 3126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_init_q15( 3128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q15 * S, ARM GAS /tmp/ccDUJO2W.s page 174 3129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_q15( 3132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q15 * S, 3133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * p1, 3134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the fixed-point CFFT/CIFFT function. 3139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the Twiddle factor table. */ 3144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle poin 3148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle poin 3149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle poin 3150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ 3151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ 3152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *rearranged_twiddle_stride3; 3153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_q31; 3155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_init_q31( 3157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q31 * S, 3158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_q31( 3161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q31 * S, 3162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * p1, 3163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point CFFT/CIFFT function. 3168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the Twiddle factor table. */ 3173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 3176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride1_arr; /**< Per stage reordered twiddle poin 3177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride2_arr; /**< Per stage reordered twiddle poin 3178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint32_t *rearranged_twiddle_tab_stride3_arr; /**< Per stage reordered twiddle poin 3179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */ 3180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */ 3181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *rearranged_twiddle_stride3; 3182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_f32; 3184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 175 3186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_cfft_init_f32( 3187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_f32 * S, 3188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_f32( 3191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_f32 * S, 3192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * p1, 3193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Double Precision Floating-point CFFT/CIFFT function. 3199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen; /**< length of the FFT. */ 3203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float64_t *pTwiddle; /**< points to the Twiddle factor table. */ 3204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const uint16_t *pBitRevTable; /**< points to the bit reversal table. */ 3205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t bitRevLength; /**< bit reversal table length. */ 3206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_cfft_instance_f64; 3207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_cfft_f64( 3209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_f64 * S, 3210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float64_t * p1, 3211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag, 3212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlag); 3213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 RFFT/RIFFT function. 3216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal; /**< length of the real FFT. */ 3220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) or 3221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or d 3222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that supports 3223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddleAReal; /**< points to the real twiddle factor table. * 3224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddleBReal; /**< points to the imag twiddle factor table. * 3225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q15 cfftInst; 3227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q15 *pCfft; /**< points to the complex FFT instance. */ 3229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_instance_q15; 3231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_init_q15( 3233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q15 * S, 3234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal, 3235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t ifftFlagR, 3236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t bitReverseFlag); 3237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_q15( 3239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_instance_q15 * S, 3240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pSrc, 3241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst); 3242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 176 3243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 RFFT/RIFFT function. 3245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal; /**< length of the real FFT. */ 3249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) 3250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or 3251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that suppor 3252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddleAReal; /**< points to the real twiddle factor table. 3253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddleBReal; /**< points to the imag twiddle factor table. 3254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined(ARM_MATH_MVEI) 3255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_q31 cfftInst; 3256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 3257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_cfft_instance_q31 *pCfft; /**< points to the complex FFT instance. */ 3258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 3259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_instance_q31; 3260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_init_q31( 3262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q31 * S, 3263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal, 3264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t ifftFlagR, 3265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t bitReverseFlag); 3266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_q31( 3268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_instance_q31 * S, 3269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pSrc, 3270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst); 3271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point RFFT/RIFFT function. 3274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal; /**< length of the real FFT. */ 3278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLenBy2; /**< length of the complex FFT. */ 3279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlagR; /**< flag that selects forward (ifftFlagR=0) 3280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t bitReverseFlagR; /**< flag that enables (bitReverseFlagR=1) or 3281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t twidCoefRModifier; /**< twiddle coefficient modifier that su 3282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddleAReal; /**< points to the real twiddle factor table. 3283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddleBReal; /**< points to the imag twiddle factor table. 3284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ 3285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_instance_f32; 3286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_init_f32( 3288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_f32 * S, 3289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 * S_CFFT, 3290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t fftLenReal, 3291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t ifftFlagR, 3292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t bitReverseFlag); 3293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_f32( 3295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_instance_f32 * S, 3296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pSrc, 3297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst); 3298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 177 3300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Double Precision Floating-point RFFT/RIFFT function. 3301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_f64 Sint; /**< Internal CFFT structure. */ 3305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLenRFFT; /**< length of the real sequence */ 3306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float64_t * pTwiddleRFFT; /**< Twiddle factors real stage */ 3307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_fast_instance_f64 ; 3308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_fast_init_f64 ( 3310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_fast_instance_f64 * S, 3311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_fast_f64( 3315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_fast_instance_f64 * S, 3316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float64_t * p, float64_t * pOut, 3317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag); 3318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point RFFT/RIFFT function. 3322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_instance_f32 Sint; /**< Internal CFFT structure. */ 3326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLenRFFT; /**< length of the real sequence */ 3327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pTwiddleRFFT; /**< Twiddle factors real stage */ 3328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_rfft_fast_instance_f32 ; 3329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_rfft_fast_init_f32 ( 3331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_fast_instance_f32 * S, 3332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t fftLen); 3333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_rfft_fast_f32( 3336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_rfft_fast_instance_f32 * S, 3337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * p, float32_t * pOut, 3338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t ifftFlag); 3339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point DCT4/IDCT4 function. 3342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N; /**< length of the DCT4. */ 3346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2; /**< half of the length of the DCT4. */ 3347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t normalize; /**< normalizing factor. */ 3348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pTwiddle; /**< points to the twiddle factor table. */ 3349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCosFactor; /**< points to the cosFactor table. */ 3350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_f32 *pRfft; /**< points to the real FFT instance. */ 3351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */ 3352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_dct4_instance_f32; 3353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the floating-point DCT4/IDCT4. ARM GAS /tmp/ccDUJO2W.s page 178 3357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of floating-point DCT4/IDCT4 structure. 3358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_RFFT points to an instance of floating-point RFFT/RIFFT structure. 3359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_CFFT points to an instance of floating-point CFFT/CIFFT structure. 3360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] N length of the DCT4. 3361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Nby2 half of the length of the DCT4. 3362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] normalize normalizing factor. 3363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or A 3364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_dct4_init_f32( 3366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_dct4_instance_f32 * S, 3367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_f32 * S_RFFT, 3368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_f32 * S_CFFT, 3369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N, 3370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2, 3371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t normalize); 3372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the floating-point DCT4/IDCT4. 3376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the floating-point DCT4/IDCT4 structure 3377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to state buffer. 3378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pInlineBuffer points to the in-place input and output buffer. 3379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dct4_f32( 3381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_dct4_instance_f32 * S, 3382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pState, 3383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pInlineBuffer); 3384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 DCT4/IDCT4 function. 3388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N; /**< length of the DCT4. */ 3392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2; /**< half of the length of the DCT4. */ 3393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t normalize; /**< normalizing factor. */ 3394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pTwiddle; /**< points to the twiddle factor table. */ 3395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCosFactor; /**< points to the cosFactor table. */ 3396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q31 *pRfft; /**< points to the real FFT instance. */ 3397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */ 3398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_dct4_instance_q31; 3399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 DCT4/IDCT4. 3403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of Q31 DCT4/IDCT4 structure. 3404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_RFFT points to an instance of Q31 RFFT/RIFFT structure 3405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_CFFT points to an instance of Q31 CFFT/CIFFT structure 3406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] N length of the DCT4. 3407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Nby2 half of the length of the DCT4. 3408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] normalize normalizing factor. 3409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or A 3410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_dct4_init_q31( 3412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_dct4_instance_q31 * S, 3413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q31 * S_RFFT, ARM GAS /tmp/ccDUJO2W.s page 179 3414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q31 * S_CFFT, 3415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N, 3416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2, 3417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t normalize); 3418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 DCT4/IDCT4. 3422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 DCT4 structure. 3423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to state buffer. 3424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pInlineBuffer points to the in-place input and output buffer. 3425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dct4_q31( 3427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_dct4_instance_q31 * S, 3428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 3429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pInlineBuffer); 3430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 DCT4/IDCT4 function. 3434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 3436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 3437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N; /**< length of the DCT4. */ 3438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2; /**< half of the length of the DCT4. */ 3439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t normalize; /**< normalizing factor. */ 3440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pTwiddle; /**< points to the twiddle factor table. */ 3441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCosFactor; /**< points to the cosFactor table. */ 3442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q15 *pRfft; /**< points to the real FFT instance. */ 3443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */ 3444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_dct4_instance_q15; 3445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 DCT4/IDCT4. 3449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of Q15 DCT4/IDCT4 structure. 3450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_RFFT points to an instance of Q15 RFFT/RIFFT structure. 3451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S_CFFT points to an instance of Q15 CFFT/CIFFT structure. 3452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] N length of the DCT4. 3453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Nby2 half of the length of the DCT4. 3454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] normalize normalizing factor. 3455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return arm_status function returns ARM_MATH_SUCCESS if initialization is successful or A 3456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_dct4_init_q15( 3458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_dct4_instance_q15 * S, 3459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_rfft_instance_q15 * S_RFFT, 3460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_cfft_radix4_instance_q15 * S_CFFT, 3461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t N, 3462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t Nby2, 3463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t normalize); 3464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 DCT4/IDCT4. 3468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 DCT4 structure. 3469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to state buffer. 3470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] pInlineBuffer points to the in-place input and output buffer. ARM GAS /tmp/ccDUJO2W.s page 180 3471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dct4_q15( 3473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_dct4_instance_q15 * S, 3474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 3475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pInlineBuffer); 3476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector addition. 3480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_f32( 3486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 3487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 3488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector addition. 3494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_q7( 3500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 3501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 3502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector addition. 3508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_q15( 3514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 3515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 3516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector addition. 3522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_add_q31( ARM GAS /tmp/ccDUJO2W.s page 181 3528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 3529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 3530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector subtraction. 3536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_f32( 3542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 3543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 3544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector subtraction. 3550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_q7( 3556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 3557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 3558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector subtraction. 3564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_q15( 3570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 3571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 3572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector subtraction. 3578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_sub_q31( 3584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, ARM GAS /tmp/ccDUJO2W.s page 182 3585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 3586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a floating-point vector by a scalar. 3592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scale scale factor to be applied 3594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_f32( 3598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t scale, 3600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a Q7 vector by a scalar. 3606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale value 3608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 3609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_q7( 3613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t scaleFract, 3615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shift, 3616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a Q15 vector by a scalar. 3622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale value 3624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 3625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_q15( 3629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t scaleFract, 3631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shift, 3632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Multiplies a Q31 vector by a scalar. 3638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] scaleFract fractional portion of the scale value 3640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shift number of bits to shift the result by 3641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector ARM GAS /tmp/ccDUJO2W.s page 183 3642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_scale_q31( 3645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t scaleFract, 3647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shift, 3648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q7 vector absolute value. 3654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_q7( 3659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point vector absolute value. 3666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_f32( 3671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q15 vector absolute value. 3678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_q15( 3683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Q31 vector absolute value. 3690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input buffer 3691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output buffer 3692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_abs_q31( 3695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 184 3699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of floating-point vectors. 3702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_f32( 3708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 3709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 3710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * result); 3712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of Q7 vectors. 3716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_q7( 3722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 3723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 3724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * result); 3726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of Q15 vectors. 3730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_q15( 3736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 3737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 3738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t * result); 3740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Dot product of Q31 vectors. 3744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input vector 3745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input vector 3746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in each vector 3747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] result output result returned here 3748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_dot_prod_q31( 3750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 3751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 3752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize, 3753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t * result); 3754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 185 3756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Shifts the elements of a Q7 vector a specified number of bits. 3758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu 3760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_shift_q7( 3764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shiftBits, 3766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Shifts the elements of a Q15 vector a specified number of bits. 3772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu 3774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_shift_q15( 3778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shiftBits, 3780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Shifts the elements of a Q31 vector a specified number of bits. 3786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] shiftBits number of bits to shift. A positive value shifts left; a negative valu 3788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_shift_q31( 3792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int8_t shiftBits, 3794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a floating-point vector. 3800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_f32( 3806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t offset, 3808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 186 3813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a Q7 vector. 3814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_q7( 3820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t offset, 3822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a Q15 vector. 3828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_q15( 3834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t offset, 3836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Adds a constant offset to a Q31 vector. 3842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] offset is the offset to be added 3844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_offset_q31( 3848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t offset, 3850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a floating-point vector. 3856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_f32( 3861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a Q7 vector. 3868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector ARM GAS /tmp/ccDUJO2W.s page 187 3870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_q7( 3873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a Q15 vector. 3880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_q15( 3885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Negates the elements of a Q31 vector. 3892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the input vector 3893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the output vector 3894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples in the vector 3895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_negate_q31( 3897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a floating-point vector. 3904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_f32( 3909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 3910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a Q7 vector. 3916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_q7( 3921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrc, 3922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 188 3927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a Q15 vector. 3928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_q15( 3933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 3934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Copies the elements of a Q31 vector. 3940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc input pointer 3941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_copy_q31( 3945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 3946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a floating-point vector. 3952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_f32( 3957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t value, 3958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 3959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a Q7 vector. 3964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_q7( 3969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t value, 3970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 3971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a Q15 vector. 3976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_q15( 3981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t value, 3982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 3983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); ARM GAS /tmp/ccDUJO2W.s page 189 3984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fills a constant value into a Q31 vector. 3988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] value input value to be filled 3989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst output pointer 3990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of samples to process 3991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 3992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fill_q31( 3993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t value, 3994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 3995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 3996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 3998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 3999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of floating-point sequences. 4000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the location where the output result is written. Length srcALen+ 4005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_f32( 4007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 4008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 4010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst); 4012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences. 4016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 4022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_opt_q15( 4025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences. 4036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the location where the output result is written. Length srcALen+ ARM GAS /tmp/ccDUJO2W.s page 190 4041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_q15( 4043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst); 4048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4051:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_fast_q15( 4059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst); 4064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, 4074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_fast_opt_q15( 4077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q31 sequences. 4088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_q31( 4095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, ARM GAS /tmp/ccDUJO2W.s page 191 4098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst); 4100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 4104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_fast_q31( 4111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst); 4116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q7 sequences. 4120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 4126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). 4127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_opt_q7( 4129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 4132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 4134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Convolution of Q7 sequences. 4140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data Length srcALen+srcBLen-1. 4145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_conv_q7( 4147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 4150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst); 4152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 192 4155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of floating-point sequences. 4156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_f32( 4166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcA, 4167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrcB, 4169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 4171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences. 4177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen 4185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_opt_q15( 4189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints, 4196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences. 4202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_q15( ARM GAS /tmp/ccDUJO2W.s page 193 4212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_fast_q15( 4233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4 4244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen 4252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer of size min(srcALen, srcBLen). 4253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_fast_opt_q15( 4256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcA, 4257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrcB, 4259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints, 4263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q31 sequences. ARM GAS /tmp/ccDUJO2W.s page 194 4269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_q31( 4279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4 4290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_fast_q31( 4300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcA, 4301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrcB, 4303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q7 sequences 4311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) 4319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen) 4320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_opt_q7( 4323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, ARM GAS /tmp/ccDUJO2W.s page 195 4326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 4328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints, 4330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch1, 4331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pScratch2); 4332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Partial convolution of Q7 sequences. 4336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcA points to the first input sequence. 4337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcALen length of the first input sequence. 4338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrcB points to the second input sequence. 4339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] srcBLen length of the second input sequence. 4340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] firstIndex is the first output sample to start with. 4342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numPoints is the number of output points to be computed. 4343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUM 4344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_conv_partial_q7( 4346:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcA, 4347:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcALen, 4348:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q7_t * pSrcB, 4349:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t srcBLen, 4350:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pDst, 4351:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t firstIndex, 4352:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t numPoints); 4353:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4354:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4355:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4356:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 FIR decimator. 4357:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4358:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4359:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4360:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M; /**< decimation factor. */ 4361:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of coefficients in the filter. */ 4362:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< points to the coefficient array. The array is of length 4363:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< points to the state variable array. The array is of leng 4364:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_decimate_instance_q15; 4365:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4366:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4367:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 FIR decimator. 4368:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4369:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4370:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4371:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M; /**< decimation factor. */ 4372:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of coefficients in the filter. */ 4373:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< points to the coefficient array. The array is of length 4374:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< points to the state variable array. The array is of leng 4375:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_decimate_instance_q31; 4376:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4377:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4378:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Instance structure for floating-point FIR decimator. 4379:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4380:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4381:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4382:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M; /**< decimation factor. */ ARM GAS /tmp/ccDUJO2W.s page 196 4383:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps; /**< number of coefficients in the filter. */ 4384:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length 4385:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< points to the state variable array. The array is of leng 4386:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_decimate_instance_f32; 4387:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4388:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4389:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4390:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Processing function for floating-point FIR decimator. 4391:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] S points to an instance of the floating-point FIR decimator structure 4392:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pSrc points to the block of input data 4393:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pDst points to the block of output data 4394:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of samples to process 4395:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4396:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_decimate_f32( 4397:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_decimate_instance_f32 * S, 4398:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 4399:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 4400:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4401:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4402:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4403:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4404:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Initialization function for the floating-point FIR decimator. 4405:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in,out] S points to an instance of the floating-point FIR decimator structure 4406:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] numTaps number of coefficients in the filter 4407:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] M decimation factor 4408:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pCoeffs points to the filter coefficients 4409:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pState points to the state buffer 4410:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of input samples to process per call 4411:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return execution status 4412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_SUCCESS : Operation successful 4413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of blockSize is not a multiple of M. 4462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_fir_decimate_init_q15( 4464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_decimate_instance_q15 * S, 4465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 4466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M, 4467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pCoeffs, 4468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pState, 4469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 FIR decimator. 4474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR decimator structure. 4475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 4476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_decimate_q31( 4480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_decimate_instance_q31 * S, 4481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 4482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M 4487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q31 FIR decimator structure. 4488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 4489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data 4490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_decimate_fast_q31( 4493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_decimate_instance_q31 * S, 4494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pSrc, 4495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pDst, 4496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); ARM GAS /tmp/ccDUJO2W.s page 198 4497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q31 FIR decimator. 4501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q31 FIR decimator structure. 4502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps number of coefficients in the filter. 4503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] M decimation factor. 4504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficients. 4505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 4506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_L 4508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * blockSize is not a multiple of M. 4509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_fir_decimate_init_q31( 4511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_fir_decimate_instance_q31 * S, 4512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t numTaps, 4513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t M, 4514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t * pCoeffs, 4515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pState, 4516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q15 FIR interpolator. 4521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t L; /**< upsample factor. */ 4525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t phaseLength; /**< length of each polyphase filter component. */ 4526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t *pCoeffs; /**< points to the coefficient array. The array is of lengt 4527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t *pState; /**< points to the state variable array. The array is of le 4528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_interpolate_instance_q15; 4529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the Q31 FIR interpolator. 4532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t L; /**< upsample factor. */ 4536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t phaseLength; /**< length of each polyphase filter component. */ 4537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q31_t *pCoeffs; /**< points to the coefficient array. The array is of lengt 4538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t *pState; /**< points to the state variable array. The array is of le 4539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_interpolate_instance_q31; 4540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Instance structure for the floating-point FIR interpolator. 4543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** typedef struct 4545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 4546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint8_t L; /**< upsample factor. */ 4547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint16_t phaseLength; /**< length of each polyphase filter component. */ 4548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t *pCoeffs; /**< points to the coefficient array. The array is of length 4549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pState; /**< points to the state variable array. The array is of len 4550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } arm_fir_interpolate_instance_f32; 4551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** ARM GAS /tmp/ccDUJO2W.s page 199 4554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Processing function for the Q15 FIR interpolator. 4555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] S points to an instance of the Q15 FIR interpolator structure. 4556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pSrc points to the block of input data. 4557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pDst points to the block of output data. 4558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 4560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_fir_interpolate_q15( 4561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_fir_interpolate_instance_q15 * S, 4562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const q15_t * pSrc, 4563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pDst, 4564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 4565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 4567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 4568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Initialization function for the Q15 FIR interpolator. 4569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S points to an instance of the Q15 FIR interpolator structure. 4570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] L upsample factor. 4571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] numTaps number of filter coefficients in the filter. 4572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pCoeffs points to the filter coefficient buffer. 4573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pState points to the state buffer. 4574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] blockSize number of input samples to process per call. 4575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MA 4576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the filter length numTaps is not a multiple of the interpolation factor LnumTaps is not a multiple of the interpolation factor LnumTaps is not a multiple of the interpolation factor LS points to an instance of the PID control data structure. in 5833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * is the input sample value. The functions return the output value. 5834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm: 5836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
5837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
5838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    A0 = Kp + Ki + Kd
5839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    A1 = (-Kp ) - (2 * Kd )
5840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *    A2 = Kd
5841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
5842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative const 5845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html PID.gif "Proportional Integral Derivative Controller" 5848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5849:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5850:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The PID controller calculates an "error" value as the difference between 5851:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the measured output and the reference input. 5852:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The controller attempts to minimize the error by adjusting the process control inputs. 5853:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The proportional value determines the reaction to the current error, 5854:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the integral value determines the reaction based on the sum of recent errors, 5855:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and the derivative value determines the reaction based on the rate at which the error has been 5856:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5857:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Instance Structure 5858:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instan 5859:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * A separate instance structure must be defined for each PID Controller. 5860:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate instance structure declarations for each of the 3 supported data types. 5861:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5862:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Reset Functions 5863:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also an associated reset function for each data type which clears the state array. 5864:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM GAS /tmp/ccDUJO2W.s page 222 5865:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Initialization Functions 5866:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There is also an associated initialization function for each data type. 5867:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The initialization function performs the following operations: 5868:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains. 5869:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * - Zeros out the values in the state buffer. 5870:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5871:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 5872:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Instance structure cannot be placed into a const data section and it is recommended to use the 5873:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 5874:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 5875:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the fixed-point versions of the PID Controller functions. 5876:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used in each function m 5877:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 5878:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5879:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5880:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5881:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup PID 5882:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 5883:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5884:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5885:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5886:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the floating-point PID Control. 5887:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S is an instance of the floating-point PID Control structure 5888:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] in input sample to process 5889:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return processed output sample. 5890:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5891:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE float32_t arm_pid_f32( 5892:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_f32 * S, 5893:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t in) 5894:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 5895:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t out; 5896:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5897:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2] */ 5898:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (S->A0 * in) + 5899:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]); 5900:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5901:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update state */ 5902:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[1] = S->state[0]; 5903:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[0] = in; 5904:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[2] = out; 5905:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5906:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return to application */ 5907:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (out); 5908:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5909:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 5910:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5911:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5912:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Process function for the Q31 PID Control. 5913:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in,out] S points to an instance of the Q31 PID Control structure 5914:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input sample to process 5915:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return processed output sample. 5916:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5917:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 5918:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 64-bit accumulator. 5919:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator has a 2.62 format and maintains full precision of the intermediate multipl 5920:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Thus, if the accumulator result overflows it wraps around rather than clip. 5921:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** In order to avoid overflows completely the input signal must be scaled down by 2 bits as t ARM GAS /tmp/ccDUJO2W.s page 223 5922:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 fo 5923:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5924:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t arm_pid_q31( 5925:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q31 * S, 5926:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t in) 5927:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 5928:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t acc; 5929:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t out; 5930:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5931:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc = A0 * x[n] */ 5932:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = (q63_t) S->A0 * in; 5933:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5934:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A1 * x[n-1] */ 5935:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q63_t) S->A1 * S->state[0]; 5936:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5937:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A2 * x[n-2] */ 5938:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q63_t) S->A2 * S->state[1]; 5939:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5940:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* convert output to 1.31 format to add y[n-1] */ 5941:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q31_t) (acc >> 31U); 5942:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5943:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* out += y[n-1] */ 5944:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out += S->state[2]; 5945:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5946:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update state */ 5947:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[1] = S->state[0]; 5948:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[0] = in; 5949:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[2] = out; 5950:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5951:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return to application */ 5952:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (out); 5953:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 5954:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5955:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5956:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 5957:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Process function for the Q15 PID Control. 5958:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in,out] S points to an instance of the Q15 PID Control structure 5959:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input sample to process 5960:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return processed output sample. 5961:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5962:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 5963:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using a 64-bit internal accumulator. 5964:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Both Gains and state variables are represented in 1.15 format and multiplications yield a 5965:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. 5966:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is no risk of internal overflow with this approach and the full precision of interme 5967:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** After all additions have been performed, the accumulator is truncated to 34.15 format by d 5968:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** Lastly, the accumulator is saturated to yield a result in 1.15 format. 5969:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 5970:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t arm_pid_q15( 5971:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_pid_instance_q15 * S, 5972:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t in) 5973:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 5974:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t acc; 5975:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t out; 5976:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5977:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined (ARM_MATH_DSP) 5978:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Implementation of PID controller */ ARM GAS /tmp/ccDUJO2W.s page 224 5979:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5980:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc = A0 * x[n] */ 5981:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in); 5982:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5983:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A1 * x[n-1] + A2 * x[n-2] */ 5984:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc); 5985:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 5986:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc = A0 * x[n] */ 5987:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc = ((q31_t) S->A0) * in; 5988:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5989:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += A1 * x[n-1] + A2 * x[n-2] */ 5990:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q31_t) S->A1 * S->state[0]; 5991:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q31_t) S->A2 * S->state[1]; 5992:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 5993:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5994:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* acc += y[n-1] */ 5995:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** acc += (q31_t) S->state[2] << 15; 5996:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 5997:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* saturate the output */ 5998:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** out = (q15_t) (__SSAT((q31_t)(acc >> 15), 16)); 5999:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6000:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Update state */ 6001:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[1] = S->state[0]; 6002:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[0] = in; 6003:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** S->state[2] = out; 6004:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6005:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* return to application */ 6006:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (out); 6007:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6008:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6009:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6010:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of PID group 6011:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6012:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6013:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6014:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6015:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix inverse. 6016:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] src points to the instance of the input floating-point matrix structure. 6017:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] dst points to the instance of the output floating-point matrix structure. 6018:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. 6019:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If the input matrix is singular (does not have an inverse), then the algorithm terminates and 6020:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6021:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_inverse_f32( 6022:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f32 * src, 6023:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f32 * dst); 6024:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6025:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6026:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6027:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point matrix inverse. 6028:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] src points to the instance of the input floating-point matrix structure. 6029:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] dst points to the instance of the output floating-point matrix structure. 6030:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match. 6031:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If the input matrix is singular (does not have an inverse), then the algorithm terminates and 6032:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6033:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_status arm_mat_inverse_f64( 6034:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const arm_matrix_instance_f64 * src, 6035:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_matrix_instance_f64 * dst); ARM GAS /tmp/ccDUJO2W.s page 225 6036:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6037:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6038:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6039:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6040:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6041:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6042:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6043:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6044:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup clarke Vector Clarke Transform 6045:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time i 6046:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calcula 6047:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * in the two-phase orthogonal stator axis Ialpha and Ibeta. 6048:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * When Ialpha is superposed with Ia as shown in the figure below 6049:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html clarke.gif Stator current space vector and its components in (a,b). 6050:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * and Ia + Ib + Ic = 0, in this condition Ialpha and IbetaIa and Ib. 6052:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6053:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6054:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6055:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6056:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html clarkeFormula.gif 6057:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where Ia and Ib are the instantaneous stator phases and 6058:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pIalpha and pIbeta are the two coordinates of time invariant vector. 6059:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 6060:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the Q31 version of the Clarke transform. 6061:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used must be considered 6062:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 6063:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6064:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6065:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6066:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup clarke 6067:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6068:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6069:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6070:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6071:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6072:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point Clarke transform 6073:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ia input three-phase coordinate a 6074:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ib input three-phase coordinate b 6075:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIalpha points to output two-phase orthogonal vector axis alpha 6076:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIbeta points to output two-phase orthogonal vector axis beta 6077:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 6078:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6079:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_clarke_f32( 6080:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ia, 6081:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ib, 6082:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIalpha, 6083:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIbeta) 6084:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6085:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIalpha using the equation, pIalpha = Ia */ 6086:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIalpha = Ia; 6087:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6088:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */ 6089:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib); 6090:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6091:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6092:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 226 6093:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6094:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Clarke transform for Q31 version 6095:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ia input three-phase coordinate a 6096:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ib input three-phase coordinate b 6097:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIalpha points to output two-phase orthogonal vector axis alpha 6098:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIbeta points to output two-phase orthogonal vector axis beta 6099:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 6102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 32-bit accumulator. 6103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate mult 6104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is saturation on the addition, hence there is no risk of overflow. 6105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_clarke_q31( 6107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ia, 6108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ib, 6109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIalpha, 6110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIbeta) 6111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product1, product2; /* Temporary variables used to store intermediate 6113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIalpha from Ia by equation pIalpha = Ia */ 6115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIalpha = Ia; 6116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */ 6118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30); 6119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (2/sqrt(3) * Ib) */ 6121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30); 6122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* pIbeta is calculated by adding the intermediate products */ 6124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIbeta = __QADD(product1, product2); 6125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of clarke group 6129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup inv_clarke Vector Inverse Clarke Transform 6138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous 6139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html clarkeInvFormula.gif 6144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where pIa and pIb are the instantaneous stator phases and 6145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Ialpha and Ibeta are the two coordinates of time invariant vector. 6146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 6147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the Q31 version of the Clarke transform. 6148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used must be considered 6149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. ARM GAS /tmp/ccDUJO2W.s page 227 6150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup inv_clarke 6154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point Inverse Clarke transform 6159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ialpha input two-phase orthogonal vector axis alpha 6160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ibeta input two-phase orthogonal vector axis beta 6161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIa points to output three-phase coordinate a 6162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIb points to output three-phase coordinate b 6163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 6164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_inv_clarke_f32( 6166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ialpha, 6167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ibeta, 6168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIa, 6169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIb) 6170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIa from Ialpha by equation pIa = Ialpha */ 6172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIa = Ialpha; 6173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibet 6175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta; 6176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Inverse Clarke transform for Q31 version 6181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ialpha input two-phase orthogonal vector axis alpha 6182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ibeta input two-phase orthogonal vector axis beta 6183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIa points to output three-phase coordinate a 6184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIb points to output three-phase coordinate b 6185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 6188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 32-bit accumulator. 6189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate mult 6190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is saturation on the subtraction, hence there is no risk of overflow. 6191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_inv_clarke_q31( 6193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ialpha, 6194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ibeta, 6195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIa, 6196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIb) 6197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product1, product2; /* Temporary variables used to store intermediate 6199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculating pIa from Ialpha by equation pIa = Ialpha */ 6201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIa = Ialpha; 6202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */ 6204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31); 6205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (1/sqrt(3) * pIb) */ ARM GAS /tmp/ccDUJO2W.s page 228 6207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31); 6208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* pIb is calculated by subtracting the products */ 6210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIb = __QSUB(product2, product1); 6211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of inv_clarke group 6215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup park Vector Park Transform 6225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Forward Park transform converts the input two-coordinate vector to flux and torque components. 6227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The Park transform can be used to realize the transformation of the Ialpha and th 6228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * from the stationary to the moving reference frame and control the spatial relationship between 6229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * the stator vector current and rotor flux vector. 6230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * If we consider the d axis aligned with the rotor flux, the diagram below shows the 6231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * current vector and the relationship from the two reference frames: 6232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q ro 6233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html parkFormula.gif 6238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where Ialpha and Ibeta are the stator vector components, 6239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * pId and pIq are rotor vector components and cosVal and 6240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * cosine and sine values of theta (rotor flux position). 6241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Fixed-Point Behavior 6242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Care must be taken when using the Q31 version of the Park transform. 6243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * In particular, the overflow and saturation behavior of the accumulator used must be considered 6244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Refer to the function specific documentation below for usage guidelines. 6245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup park 6249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Floating-point Park transform 6254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ialpha input two-phase vector coordinate alpha 6255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] Ibeta input two-phase vector coordinate beta 6256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pId points to output rotor reference frame d 6257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[out] pIq points to output rotor reference frame q 6258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] sinVal sine value of rotation angle theta 6259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] cosVal cosine value of rotation angle theta 6260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return none 6261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function implements the forward Park transform. 6263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * ARM GAS /tmp/ccDUJO2W.s page 229 6264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_park_f32( 6266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ialpha, 6267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t Ibeta, 6268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pId, 6269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pIq, 6270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t sinVal, 6271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t cosVal) 6272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */ 6274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pId = Ialpha * cosVal + Ibeta * sinVal; 6275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */ 6277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIq = -Ialpha * sinVal + Ibeta * cosVal; 6278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Park transform for Q31 version 6283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ialpha input two-phase vector coordinate alpha 6284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] Ibeta input two-phase vector coordinate beta 6285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pId points to output rotor reference frame d 6286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pIq points to output rotor reference frame q 6287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] sinVal sine value of rotation angle theta 6288:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] cosVal cosine value of rotation angle theta 6289:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6290:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6291:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** \par Scaling and Overflow Behavior 6292:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The function is implemented using an internal 32-bit accumulator. 6293:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate mult 6294:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** There is saturation on the addition and subtraction, hence there is no risk of overflow. 6295:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6296:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE void arm_park_q31( 6297:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ialpha, 6298:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t Ibeta, 6299:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pId, 6300:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pIq, 6301:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t sinVal, 6302:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t cosVal) 6303:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6304:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product1, product2; /* Temporary variables used to store intermediate 6305:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t product3, product4; /* Temporary variables used to store intermediate 6306:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6307:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ialpha * cosVal) */ 6308:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31); 6309:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6310:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ibeta * sinVal) */ 6311:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31); 6312:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6313:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6314:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ialpha * sinVal) */ 6315:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31); 6316:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6317:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Ibeta * cosVal) */ 6318:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31); 6319:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6320:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pId by adding the two intermediate products 1 and 2 */ ARM GAS /tmp/ccDUJO2W.s page 230 6321:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pId = __QADD(product1, product2); 6322:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6323:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIq by subtracting the two intermediate products 3 from 4 */ 6324:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIq = __QSUB(product4, product3); 6325:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6326:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6327:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6328:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of park group 6329:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6330:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6331:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6332:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6333:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupController 6334:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6335:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6336:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6337:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup inv_park Vector Inverse Park transform 6338:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Inverse Park transform converts the input flux and torque components to two-coordinate vector. 6339:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6340:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The function operates on a single sample of data and each call to the function returns the pro 6341:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The library provides separate functions for Q31 and floating-point data types. 6342:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm 6343:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html parkInvFormula.gif 6344:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where pIalpha and pIbeta are the stator vector components, 6345:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Id and Iq are rotor vector components and cosVal and > 31); 6412:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6413:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Iq * sinVal) */ 6414:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31); 6415:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6416:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6417:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Id * sinVal) */ 6418:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31); 6419:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6420:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Intermediate product is calculated by (Iq * cosVal) */ 6421:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31); 6422:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6423:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIalpha by using the two intermediate products 1 and 2 */ 6424:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIalpha = __QSUB(product1, product2); 6425:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6426:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculate pIbeta by using the two intermediate products 3 and 4 */ 6427:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pIbeta = __QADD(product4, product3); 6428:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6429:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6430:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6431:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of Inverse park group 6432:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6433:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6434:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 232 6435:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6436:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupInterpolation 6437:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6438:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6439:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6440:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup LinearInterpolate Linear Interpolation 6441:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6442:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation is a method of curve fitting using linear polynomials. 6443:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Linear interpolation works by effectively drawing a straight line between two neighboring samp 6444:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6445:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6446:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \image html LinearInterp.gif "Linear interpolation" 6447:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6448:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6449:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * A Linear Interpolate function calculates an output value(y), for the input(x) 6450:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * using linear interpolation of the input values x0, x1( nearest input values) and the output va 6451:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6452:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par Algorithm: 6453:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
6454:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
6455:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *       where x0, x1 are nearest values of input x
6456:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *             y0, y1 are nearest values to output y
6457:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
6458:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6459:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6460:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This set of functions implements Linear interpolation process 6461:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * for Q7, Q15, Q31, and floating-point data types. The functions operate on a single 6462:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * sample of data and each call to the function returns a single processed value. 6463:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * S points to an instance of the Linear Interpolate function data structure. 6464:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * x is the input sample value. The functions returns the output value. 6465:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6466:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6467:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * if x is outside of the table boundary, Linear interpolation returns first value of the table 6468:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * if x is below input range and returns last value of table if x is above range. 6469:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6470:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6471:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6472:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup LinearInterpolate 6473:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6474:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6475:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6476:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6477:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the floating-point Linear Interpolation Function. 6478:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in,out] S is an instance of the floating-point Linear Interpolation structure 6479:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6480:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6481:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6482:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6483:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE float32_t arm_linear_interp_f32( 6484:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** arm_linear_interp_instance_f32 * S, 6485:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x) 6486:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6487:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t y; 6488:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x0, x1; /* Nearest input values */ 6489:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t y0, y1; /* Nearest output values */ 6490:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t xSpacing = S->xSpacing; /* spacing between input values */ 6491:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t i; /* Index variable */ ARM GAS /tmp/ccDUJO2W.s page 233 6492:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t *pYData = S->pYData; /* pointer to output table */ 6493:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6494:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of index */ 6495:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** i = (int32_t) ((x - S->x1) / xSpacing); 6496:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6497:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (i < 0) 6498:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6499:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Iniatilize output for below specified range as least output value of table */ 6500:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = pYData[0]; 6501:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6502:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if ((uint32_t)i >= (S->nValues - 1)) 6503:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6504:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Iniatilize output for above specified range as last output value of table */ 6505:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = pYData[S->nValues - 1]; 6506:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6507:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6508:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6509:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of nearest input values */ 6510:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** x0 = S->x1 + i * xSpacing; 6511:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** x1 = S->x1 + (i + 1) * xSpacing; 6512:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6513:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read of nearest output values */ 6514:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[i]; 6515:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[i + 1]; 6516:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6517:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of output */ 6518:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0)); 6519:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6520:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6521:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6522:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* returns output value */ 6523:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (y); 6524:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6525:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6526:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6527:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6528:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6529:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the Q31 Linear Interpolation Function. 6530:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pYData pointer to Q31 Linear Interpolation table 6531:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6532:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nValues number of table values 6533:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6534:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6535:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6536:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Input sample x is in 12.20 format which contains 12 bits for table index and 20 b 6537:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This function can support maximum of table size 2^12. 6538:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6539:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6540:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q31_t arm_linear_interp_q31( 6541:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t * pYData, 6542:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x, 6543:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues) 6544:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6545:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y; /* output */ 6546:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y0, y1; /* Nearest output values */ 6547:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t fract; /* fractional part */ 6548:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t index; /* Index to read nearest output values */ ARM GAS /tmp/ccDUJO2W.s page 234 6549:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6550:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Input is in 12.20 format */ 6551:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 12 bits for the table index */ 6552:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Index value calculation */ 6553:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = ((x & (q31_t)0xFFF00000) >> 20); 6554:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6555:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (index >= (int32_t)(nValues - 1)) 6556:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6557:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[nValues - 1]); 6558:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6559:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (index < 0) 6560:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6561:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[0]); 6562:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6563:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6564:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6565:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 20 bits for the fractional part */ 6566:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* shift left by 11 to keep fract in 1.31 format */ 6567:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** fract = (x & 0x000FFFFF) << 11; 6568:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6569:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read two nearest output values from the index in 1.31(q31) format */ 6570:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[index]; 6571:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[index + 1]; 6572:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6573:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract) and y is in 2.30 format */ 6574:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32)); 6575:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6576:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */ 6577:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y += ((q31_t) (((q63_t) y1 * fract) >> 32)); 6578:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6579:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Convert y to 1.31 format */ 6580:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (y << 1U); 6581:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6582:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6583:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6584:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6585:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6586:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6587:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the Q15 Linear Interpolation Function. 6588:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pYData pointer to Q15 Linear Interpolation table 6589:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6590:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nValues number of table values 6591:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6592:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6593:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6594:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Input sample x is in 12.20 format which contains 12 bits for table index and 20 b 6595:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This function can support maximum of table size 2^12. 6596:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6597:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6598:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q15_t arm_linear_interp_q15( 6599:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t * pYData, 6600:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x, 6601:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues) 6602:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6603:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q63_t y; /* output */ 6604:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t y0, y1; /* Nearest output values */ 6605:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t fract; /* fractional part */ ARM GAS /tmp/ccDUJO2W.s page 235 6606:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** int32_t index; /* Index to read nearest output values */ 6607:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6608:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Input is in 12.20 format */ 6609:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 12 bits for the table index */ 6610:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Index value calculation */ 6611:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = ((x & (int32_t)0xFFF00000) >> 20); 6612:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6613:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (index >= (int32_t)(nValues - 1)) 6614:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6615:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[nValues - 1]); 6616:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6617:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else if (index < 0) 6618:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6619:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[0]); 6620:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6621:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6622:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6623:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 20 bits for the fractional part */ 6624:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* fract is in 12.20 format */ 6625:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** fract = (x & 0x000FFFFF); 6626:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6627:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read two nearest output values from the index */ 6628:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[index]; 6629:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[index + 1]; 6630:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6631:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract) and y is in 13.35 format */ 6632:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = ((q63_t) y0 * (0xFFFFF - fract)); 6633:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6634:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */ 6635:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y += ((q63_t) y1 * (fract)); 6636:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6637:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* convert y to 1.15 format */ 6638:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (q15_t) (y >> 20); 6639:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6640:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6641:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6642:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6643:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6644:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6645:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Process function for the Q7 Linear Interpolation Function. 6646:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] pYData pointer to Q7 Linear Interpolation table 6647:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input sample to process 6648:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] nValues number of table values 6649:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return y processed output sample. 6650:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6651:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * \par 6652:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Input sample x is in 12.20 format which contains 12 bits for table index and 20 b 6653:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This function can support maximum of table size 2^12. 6654:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6655:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE q7_t arm_linear_interp_q7( 6656:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t * pYData, 6657:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x, 6658:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t nValues) 6659:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6660:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t y; /* output */ 6661:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q7_t y0, y1; /* Nearest output values */ 6662:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t fract; /* fractional part */ ARM GAS /tmp/ccDUJO2W.s page 236 6663:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t index; /* Index to read nearest output values */ 6664:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6665:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Input is in 12.20 format */ 6666:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 12 bits for the table index */ 6667:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Index value calculation */ 6668:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (x < 0) 6669:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6670:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[0]); 6671:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6672:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** index = (x >> 20) & 0xfff; 6673:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6674:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (index >= (nValues - 1)) 6675:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6676:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (pYData[nValues - 1]); 6677:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6678:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6679:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6680:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* 20 bits for the fractional part */ 6681:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* fract is in 12.20 format */ 6682:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** fract = (x & 0x000FFFFF); 6683:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6684:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Read two nearest output values from the index and are in 1.7(q7) format */ 6685:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y0 = pYData[index]; 6686:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y1 = pYData[index + 1]; 6687:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6688:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */ 6689:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y = ((y0 * (0xFFFFF - fract))); 6690:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6691:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */ 6692:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** y += (y1 * fract); 6693:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6694:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /* convert y to 1.7(q7) format */ 6695:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (q7_t) (y >> 20); 6696:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6697:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6698:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6699:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6700:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @} end of LinearInterpolate group 6701:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6702:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6703:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6704:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric sine function for floating-point data. 6705:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input value in radians. 6706:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return sin(x). 6707:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6708:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t arm_sin_f32( 6709:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x); 6710:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6711:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6712:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6713:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric sine function for Q31 data. 6714:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6715:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return sin(x). 6716:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6717:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t arm_sin_q31( 6718:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x); 6719:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** ARM GAS /tmp/ccDUJO2W.s page 237 6720:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6721:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6722:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric sine function for Q15 data. 6723:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6724:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return sin(x). 6725:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6726:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t arm_sin_q15( 6727:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t x); 6728:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6729:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6730:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6731:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric cosine function for floating-point data. 6732:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x input value in radians. 6733:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return cos(x). 6734:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6735:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t arm_cos_f32( 6736:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t x); 6737:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6738:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6739:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6740:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric cosine function for Q31 data. 6741:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6742:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return cos(x). 6743:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6744:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t arm_cos_q31( 6745:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q31_t x); 6746:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6747:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6748:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6749:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @brief Fast approximation to the trigonometric cosine function for Q15 data. 6750:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @param[in] x Scaled input value in radians. 6751:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @return cos(x). 6752:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6753:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t arm_cos_q15( 6754:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** q15_t x); 6755:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6756:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6757:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6758:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Floating-point vector of log values. 6759:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pSrc points to the input vector 6760:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pDst points to the output vector 6761:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of samples in each vector 6762:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6763:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6764:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vlog_f32( 6765:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 6766:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 6767:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 6768:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6769:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6770:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Floating-point vector of exp values. 6771:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] pSrc points to the input vector 6772:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pDst points to the output vector 6773:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] blockSize number of samples in each vector 6774:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return none 6775:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6776:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** void arm_vexp_f32( ARM GAS /tmp/ccDUJO2W.s page 238 6777:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** const float32_t * pSrc, 6778:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pDst, 6779:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** uint32_t blockSize); 6780:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6781:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6782:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @ingroup groupFastMath 6783:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6784:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6785:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6786:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6787:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @defgroup SQRT Square Root 6788:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 6789:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * Computes the square root of a number. 6790:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * There are separate functions for Q15, Q31, and floating-point data types. 6791:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * The square root function is computed using the Newton-Raphson algorithm. 6792:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * This is an iterative algorithm of the form: 6793:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
6794:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *      x1 = x0 - f(x0)/f'(x0)
6795:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
6796:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * where x1 is the current estimate, 6797:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * x0 is the previous estimate, and 6798:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * f'(x0) is the derivative of f() evaluated at x0. 6799:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * For the square root function, the algorithm reduces to: 6800:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * 
6801:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *     x0 = in/2                         [initial guess]
6802:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
6803:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h ****    *
6804:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6805:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6806:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6807:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6808:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @addtogroup SQRT 6809:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** * @{ 6810:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6811:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6812:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** /** 6813:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @brief Floating-point square root function. 6814:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[in] in input value 6815:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @param[out] pOut square root of input value 6816:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** @return execution status 6817:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_SUCCESS : input value is positive 6818:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0 6819:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** */ 6820:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __STATIC_FORCEINLINE arm_status arm_sqrt_f32( 6821:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t in, 6822:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** float32_t * pOut) 6823:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** if (in >= 0.0f) 1957 .loc 25 6824 0 1958 0024 F5EEC06A vcmpe.f32 s13, #0 1959 0028 F1EE10FA vmrs APSR_nzcv, FPSCR 1960 002c 05DB blt .L207 6825:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6826:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined ( __CC_ARM ) 6827:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined __TARGET_FPU_VFP 6828:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = __sqrtf(in); 6829:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else ARM GAS /tmp/ccDUJO2W.s page 239 6830:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = sqrtf(in); 6831:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 6832:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6833:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #elif defined ( __ICCARM__ ) 6834:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #if defined __ARMVFP__ 6835:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in)); 6836:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6837:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = sqrtf(in); 6838:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 6839:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6840:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #else 6841:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = sqrtf(in); 1961 .loc 25 6841 0 1962 002e F1EEE67A vsqrt.f32 s15, s13 1963 0032 C2ED007A vstr.32 s15, [r2] 1964 .LVL229: 1965 .LBE23: 1966 .LBE22: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c **** } 1967 .loc 24 186 0 1968 0036 02B0 add sp, sp, #8 1969 .LCFI69: 1970 .cfi_remember_state 1971 .cfi_def_cfa_offset 0 1972 @ sp needed 1973 0038 7047 bx lr 1974 .LVL230: 1975 .L207: 1976 .LCFI70: 1977 .cfi_restore_state 1978 .LBB25: 1979 .LBB24: 6842:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** #endif 6843:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** 6844:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** return (ARM_MATH_SUCCESS); 6845:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 6846:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** else 6847:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 6848:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** *pOut = 0.0f; 1980 .loc 25 6848 0 1981 003a DFED037A vldr.32 s15, .L209 1982 003e C2ED007A vstr.32 s15, [r2] 1983 .LBE24: 1984 .LBE25: 1985 .loc 24 186 0 1986 0042 02B0 add sp, sp, #8 1987 .LCFI71: 1988 .cfi_def_cfa_offset 0 1989 @ sp needed 1990 0044 7047 bx lr 1991 .L210: 1992 0046 00BF .align 2 1993 .L209: 1994 0048 00000000 .word 0 1995 .cfi_endproc 1996 .LFE171: 1998 .section .text.arm_rms_q15,"ax",%progbits ARM GAS /tmp/ccDUJO2W.s page 240 1999 .align 1 2000 .p2align 2,,3 2001 .global arm_rms_q15 2002 .syntax unified 2003 .thumb 2004 .thumb_func 2005 .fpu fpv4-sp-d16 2007 arm_rms_q15: 2008 .LFB172: 2009 .file 26 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Title: arm_rms_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Description: Root Mean Square of the elements of a Q15 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @addtogroup RMS 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @brief Root Mean Square of the elements of a Q15 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @param[out] pResult root mean square value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** @par Scaling and Overflow Behavior ARM GAS /tmp/ccDUJO2W.s page 241 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** The function is implemented using a 64-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** The input is represented in 1.15 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** Intermediate multiplication yields a 2.30 format, and this 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** result is added without saturation to a 64-bit accumulator in 34.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** With 33 guard bits in the accumulator, there is no risk of overflow, and the 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** full precision of the intermediate multiplication is preserved. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 15 bits, and then saturated to yield a result in 1.15 format. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** void arm_rms_q15( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** const q15_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** uint32_t blockSize, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q15_t * pResult) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q63_t pow = 0.0f; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q15_t normalizedPower; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** arm_power_q15(pSrc, blockSize, &pow); 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** normalizedPower=__SSAT((pow / (q63_t) blockSize) >> 15,16); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** arm_sqrt_q15(normalizedPower, pResult); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** } 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #else 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** void arm_rms_q15( 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** const q15_t * pSrc, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** uint32_t blockSize, 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q15_t * pResult) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** { 2010 .loc 26 76 0 2011 .cfi_startproc 2012 @ args = 0, pretend = 0, frame = 0 2013 @ frame_needed = 0, uses_anonymous_args = 0 2014 .LVL231: 2015 0000 70B5 push {r4, r5, r6, lr} 2016 .LCFI72: 2017 .cfi_def_cfa_offset 16 2018 .cfi_offset 4, -16 2019 .cfi_offset 5, -12 2020 .cfi_offset 6, -8 2021 .cfi_offset 14, -4 2022 .loc 26 76 0 2023 0002 1646 mov r6, r2 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** uint32_t blkCnt; /* Loop counter */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q63_t sum = 0; /* Temporary result storage */ 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q15_t in; /* Temporary variable to store input value * 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q31_t in32; /* Temporary variable to store input value * 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #endif 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** blkCnt = blockSize >> 2U; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** while (blkCnt > 0U) ARM GAS /tmp/ccDUJO2W.s page 242 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Compute sum of squares and store result in a temporary variable. */ 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #if defined (ARM_MATH_DSP) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum = __SMLALD(in32, in32, sum); 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum = __SMLALD(in32, in32, sum); 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #else 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in = *pSrc++; 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum += ((q31_t) in * in); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in = *pSrc++; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum += ((q31_t) in * in); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in = *pSrc++; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum += ((q31_t) in * in); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in = *pSrc++; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum += ((q31_t) in * in); 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Decrement loop counter */ 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** blkCnt--; 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** } 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Loop unrolling: Compute remaining outputs */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** blkCnt = blockSize % 0x4U; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #else 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Initialize blkCnt with number of samples */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** blkCnt = blockSize; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** while (blkCnt > 0U) 2024 .loc 26 129 0 2025 0004 81B1 cbz r1, .L212 2026 0006 0A46 mov r2, r1 2027 .LVL232: 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** q15_t in; /* Temporary variable to store input value * 2028 .loc 26 78 0 2029 0008 0024 movs r4, #0 2030 000a 0025 movs r5, #0 2031 .LVL233: 2032 .L213: 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** { 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** in = *pSrc++; 2033 .loc 26 133 0 2034 000c 30F9023B ldrsh r3, [r0], #2 2035 .LVL234: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** { ARM GAS /tmp/ccDUJO2W.s page 243 2036 .loc 26 129 0 2037 0010 0139 subs r1, r1, #1 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Compute sum of squares and store result in a temporary variable. */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** sum += ((q31_t) in * in); 2038 .loc 26 135 0 2039 0012 C3FB8345 smlalbb r4, r5, r3, r3 2040 .LVL235: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** { 2041 .loc 26 129 0 2042 0016 F9D1 bne .L213 2043 0018 0B46 mov r3, r1 2044 .LVL236: 2045 001a 2046 mov r0, r4 2046 .LVL237: 2047 001c 2946 mov r1, r5 2048 001e FFF7FEFF bl __aeabi_ldivmod 2049 .LVL238: 2050 0022 C00B lsrs r0, r0, #15 2051 0024 40EA4141 orr r1, r0, r1, lsl #17 2052 .LVL239: 2053 .L212: 2054 .LBB26: 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Decrement loop counter */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** blkCnt--; 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** } 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Truncating and saturating the accumulator to 1.15 format */ 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** /* Store result in destination */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult); 2055 .loc 26 143 0 2056 .syntax unified 2057 @ 143 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c" 1 2058 0028 01F30F00 ssat r0, #16, r1 2059 @ 0 "" 2 2060 .LVL240: 2061 .thumb 2062 .syntax unified 2063 .LBE26: 2064 002c 3146 mov r1, r6 2065 002e 00B2 sxth r0, r0 2066 .LVL241: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** } 2067 .loc 26 144 0 2068 0030 BDE87040 pop {r4, r5, r6, lr} 2069 .LCFI73: 2070 .cfi_restore 14 2071 .cfi_restore 6 2072 .cfi_restore 5 2073 .cfi_restore 4 2074 .cfi_def_cfa_offset 0 2075 .LVL242: 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c **** } 2076 .loc 26 143 0 2077 0034 FFF7FEBF b arm_sqrt_q15 2078 .LVL243: 2079 .cfi_endproc ARM GAS /tmp/ccDUJO2W.s page 244 2080 .LFE172: 2082 .global __aeabi_uldivmod 2083 .section .text.arm_rms_q31,"ax",%progbits 2084 .align 1 2085 .p2align 2,,3 2086 .global arm_rms_q31 2087 .syntax unified 2088 .thumb 2089 .thumb_func 2090 .fpu fpv4-sp-d16 2092 arm_rms_q31: 2093 .LFB173: 2094 .file 27 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Title: arm_rms_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Description: Root Mean Square of the elements of a Q31 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @addtogroup RMS 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @brief Root Mean Square of the elements of a Q31 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @param[out] pResult root mean square value returned here ARM GAS /tmp/ccDUJO2W.s page 245 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** The function is implemented using an internal 64-bit accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** The input is represented in 1.31 format, and intermediate multiplication 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** yields a 2.62 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** The accumulator maintains full precision of the intermediate multiplication resu 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** but provides only a single guard bit. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** There is no saturation on intermediate additions. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** If the accumulator overflows, it wraps around and distorts the result. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** In order to avoid overflows completely, the input signal must be scaled down by 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** log2(blockSize) bits, as a total of blockSize additions are performed internally 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** */ 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** #if defined(ARM_MATH_MVEI) 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** void arm_rms_q31( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** const q31_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** uint32_t blockSize, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** q31_t * pResult) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** q63_t pow = 0.0f; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** q31_t normalizedPower; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** arm_power_q31(pSrc, blockSize, &pow); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** normalizedPower=clip_q63_to_q31((pow / (q63_t) blockSize) >> 17); 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** arm_sqrt_q31(normalizedPower, pResult); 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** #else 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** void arm_rms_q31( 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** const q31_t * pSrc, 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** uint32_t blockSize, 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** q31_t * pResult) 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 2095 .loc 27 80 0 2096 .cfi_startproc 2097 @ args = 0, pretend = 0, frame = 0 2098 @ frame_needed = 0, uses_anonymous_args = 0 2099 .LVL244: 2100 0000 70B5 push {r4, r5, r6, lr} 2101 .LCFI74: 2102 .cfi_def_cfa_offset 16 2103 .cfi_offset 4, -16 2104 .cfi_offset 5, -12 2105 .cfi_offset 6, -8 2106 .cfi_offset 14, -4 2107 .loc 27 80 0 2108 0002 1646 mov r6, r2 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** uint32_t blkCnt; /* Loop counter */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** uint64_t sum = 0; /* Temporary result storage (can get never n 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** q31_t in; /* Temporary variable to store input value * 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ ARM GAS /tmp/ccDUJO2W.s page 246 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** blkCnt = blockSize >> 2U; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** while (blkCnt > 0U) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** in = *pSrc++; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Compute sum of squares and store result in a temporary variable, sum. */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** sum += ((q63_t) in * in); 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** in = *pSrc++; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** sum += ((q63_t) in * in); 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** in = *pSrc++; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** sum += ((q63_t) in * in); 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** in = *pSrc++; 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** sum += ((q63_t) in * in); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Decrement loop counter */ 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** blkCnt--; 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Loop unrolling: Compute remaining outputs */ 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** blkCnt = blockSize % 0x4U; 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** #else 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Initialize blkCnt with number of samples */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** blkCnt = blockSize; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** while (blkCnt > 0U) 2109 .loc 27 121 0 2110 0004 D9B1 cbz r1, .L220 2111 0006 0A46 mov r2, r1 2112 .LVL245: 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** q31_t in; /* Temporary variable to store input value * 2113 .loc 27 82 0 2114 0008 0024 movs r4, #0 2115 000a 0025 movs r5, #0 2116 .LVL246: 2117 .L219: 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** in = *pSrc++; 2118 .loc 27 125 0 2119 000c 50F8043B ldr r3, [r0], #4 2120 .LVL247: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 2121 .loc 27 121 0 2122 0010 0139 subs r1, r1, #1 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Compute sum of squares and store result in a temporary variable. */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** sum += ((q63_t) in * in); 2123 .loc 27 127 0 ARM GAS /tmp/ccDUJO2W.s page 247 2124 0012 C3FB0345 smlal r4, r5, r3, r3 2125 .LVL248: 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 2126 .loc 27 121 0 2127 0016 F9D1 bne .L219 2128 0018 0B46 mov r3, r1 2129 .LVL249: 2130 001a 2046 mov r0, r4 2131 .LVL250: 2132 001c 2946 mov r1, r5 2133 001e FFF7FEFF bl __aeabi_uldivmod 2134 .LVL251: 2135 0022 C00F lsrs r0, r0, #31 2136 0024 40EA4100 orr r0, r0, r1, lsl #1 2137 .LBB27: 2138 .LBB28: 1161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** } 2139 .loc 25 1161 0 2140 0028 C317 asrs r3, r0, #31 2141 002a B3EBD17F cmp r3, r1, lsr #31 2142 002e 18BF it ne 2143 0030 6FF00040 mvnne r0, #-2147483648 2144 .LBE28: 2145 .LBE27: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Decrement loop counter */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** blkCnt--; 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** /* Compute Rms and store result in destination vector */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult); 2146 .loc 27 135 0 2147 0034 3146 mov r1, r6 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } 2148 .loc 27 136 0 2149 0036 BDE87040 pop {r4, r5, r6, lr} 2150 .LCFI75: 2151 .cfi_remember_state 2152 .cfi_restore 14 2153 .cfi_restore 6 2154 .cfi_restore 5 2155 .cfi_restore 4 2156 .cfi_def_cfa_offset 0 2157 .LVL252: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } 2158 .loc 27 135 0 2159 003a FFF7FEBF b arm_sqrt_q31 2160 .LVL253: 2161 .L220: 2162 .LCFI76: 2163 .cfi_restore_state 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** { 2164 .loc 27 121 0 2165 003e 0846 mov r0, r1 2166 .LVL254: 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } ARM GAS /tmp/ccDUJO2W.s page 248 2167 .loc 27 135 0 2168 0040 3146 mov r1, r6 2169 .LVL255: 2170 .loc 27 136 0 2171 0042 BDE87040 pop {r4, r5, r6, lr} 2172 .LCFI77: 2173 .cfi_restore 14 2174 .cfi_restore 6 2175 .cfi_restore 5 2176 .cfi_restore 4 2177 .cfi_def_cfa_offset 0 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c **** } 2178 .loc 27 135 0 2179 0046 FFF7FEBF b arm_sqrt_q31 2180 .LVL256: 2181 .cfi_endproc 2182 .LFE173: 2184 004a 00BF .section .text.arm_std_f32,"ax",%progbits 2185 .align 1 2186 .p2align 2,,3 2187 .global arm_std_f32 2188 .syntax unified 2189 .thumb 2190 .thumb_func 2191 .fpu fpv4-sp-d16 2193 arm_std_f32: 2194 .LFB174: 2195 .file 28 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Title: arm_std_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Description: Standard deviation of the elements of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** #include "arm_math.h" ARM GAS /tmp/ccDUJO2W.s page 249 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @defgroup STD Standard deviation 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** Calculates the standard deviation of the elements in the input vector. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** The float implementation is relying on arm_var_f32 which is using a two-pass algorithm 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** to avoid problem of numerical instabilities and cancellation errors. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** Fixed point versions are using the standard textbook algorithm since the fixed point 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** numerical behavior is different from the float one. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** Algorithm for fixed point versions is summarized below: 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 
  50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c ****       Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))
  51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 
  52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c ****       sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSi
  53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c ****       sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
  54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c ****
55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** There are separate functions for floating point, Q31, and Q15 data types. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** */ 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** /** 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @addtogroup STD 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @{ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** */ 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** /** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @brief Standard deviation of the elements of a floating-point vector. 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @param[in] pSrc points to the input vector 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @param[in] blockSize number of samples in input vector 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @param[out] pResult standard deviation value returned here 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** @return none 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** */ 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** void arm_std_f32( 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** const float32_t * pSrc, 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** uint32_t blockSize, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** float32_t * pResult) 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** { 2196 .loc 28 75 0 2197 .cfi_startproc 2198 @ args = 0, pretend = 0, frame = 0 2199 @ frame_needed = 0, uses_anonymous_args = 0 2200 @ link register save eliminated. 2201 .LVL257: 2202 .LBB35: 2203 .LBB36: 2204 .file 29 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Project: CMSIS DSP Library ARM GAS /tmp/ccDUJO2W.s page 250 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Title: arm_var_f32.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Description: Variance of the elements of a floating-point vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @defgroup variance Variance 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** Calculates the variance of the elements in the input vector. 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** The underlying algorithm used is the direct method sometimes referred to as the two-pass method: 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 
  42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c ****       Result = sum(element - meanOfElements)^2) / numElement - 1
  43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 
  44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c ****       meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockS
  45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c ****
46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** There are separate functions for floating point, Q31, and Q15 data types. 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /** 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @addtogroup variance 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @{ 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /** 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @brief Variance of the elements of a floating-point vector. 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @param[in] pSrc points to the input vector 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @param[in] blockSize number of samples in input vector 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @param[out] pResult variance value returned here ARM GAS /tmp/ccDUJO2W.s page 251 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** @return none 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #include "arm_helium_utils.h" 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** void arm_var_f32( 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** const float32_t * pSrc, 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blockSize, 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t * pResult) 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blkCnt; /* loop counters */ 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** f32x4_t vecSrc; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** f32x4_t sumVec = vdupq_n_f32(0.0f); 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fMean; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t sum = 0.0f; /* accumulator */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t in; /* Temporary variable to store input value */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** if (blockSize <= 1U) { 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** *pResult = 0; 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** return; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** arm_mean_f32(pSrc, blockSize, &fMean); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Compute 4 outputs at a time */ 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize >> 2U; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** vecSrc = vldrwq_f32(pSrc); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * sum lanes 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** vecSrc = vsubq(vecSrc, fMean); 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sumVec = vfmaq(sumVec, vecSrc, vecSrc); 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt --; 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** pSrc += 4; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum = vecAddAcrossF32Mve(sumVec); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** * tail 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize & 0x3; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** in = *pSrc++ - fMean; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += in * in; 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement loop counter */ 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Variance */ ARM GAS /tmp/ccDUJO2W.s page 252 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** *pResult = sum / (float32_t) (blockSize - 1); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #else 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE) 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** void arm_var_f32( 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** const float32_t * pSrc, 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blockSize, 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t * pResult) 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t mean; 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t sum = 0.0f; /* accumulator */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t in; /* Temporary variable to store input value */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blkCnt; /* loop counter */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32x4_t sumV = vdupq_n_f32(0.0f); /* Temporary result storage */ 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32x2_t sumV2; 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32x4_t inV; 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32x4_t avg; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** arm_mean_f32(pSrc,blockSize,&mean); 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** avg = vdupq_n_f32(mean); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize >> 2U; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Compute 4 outputs at a time. 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** ** a second loop below computes the remaining 1 to 3 samples. */ 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Compute Power and then store the result in a temporary variable, sum. */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** inV = vld1q_f32(pSrc); 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** inV = vsubq_f32(inV, avg); 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sumV = vmlaq_f32(sumV, inV, inV); 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** pSrc += 4; 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement the loop counter */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV)); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* If the blockSize is not a multiple of 4, compute any remaining output samples here. 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** ** No loop unrolling is used. */ 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize % 0x4U; 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* compute power and then store the result in a temporary variable, sum. */ 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** in = *pSrc++; 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** in = in - mean; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += in * in; 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement the loop counter */ 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; ARM GAS /tmp/ccDUJO2W.s page 253 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Variance */ 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** *pResult = sum / (float32_t)(blockSize - 1.0f); 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #else 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** void arm_var_f32( 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** const float32_t * pSrc, 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blockSize, 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t * pResult) 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blkCnt; /* Loop counter */ 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t sum = 0.0f; /* Temporary result storage */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fSum = 0.0f; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fMean, fValue; 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** const float32_t * pInput = pSrc; 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** if (blockSize <= 1U) 2205 .loc 29 193 0 2206 0000 0129 cmp r1, #1 2207 0002 04D8 bhi .L240 2208 0004 DFED1A7A vldr.32 s15, .L242 2209 .LVL258: 2210 0008 C2ED007A vstr.32 s15, [r2] 2211 .LVL259: 2212 000c 7047 bx lr 2213 .LVL260: 2214 .L240: 2215 .LBB37: 2216 .LBB38: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fSum = 0.0f; 2217 .loc 29 188 0 2218 000e DFED187A vldr.32 s15, .L242 2219 .LBE38: 2220 .LBE37: 2221 .LBE36: 2222 .LBE35: 2223 .loc 28 75 0 2224 0012 10B4 push {r4} 2225 .LCFI78: 2226 .cfi_def_cfa_offset 4 2227 .cfi_offset 4, -4 2228 .LBB42: 2229 .LBB41: 2230 .loc 29 193 0 2231 0014 0B46 mov r3, r1 2232 .LBB40: 2233 .LBB39: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2234 .loc 29 191 0 2235 0016 0446 mov r4, r0 2236 .L226: 2237 .LVL261: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** *pResult = 0; ARM GAS /tmp/ccDUJO2W.s page 254 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** return; 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize >> 2U; 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += *pInput++; 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += *pInput++; 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += *pInput++; 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += *pInput++; 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement loop counter */ 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Loop unrolling: Compute remaining outputs */ 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize % 0x4U; 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #else 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Initialize blkCnt with number of samples */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize; 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 226:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 227:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 229:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 230:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */ 231:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** sum += *pInput++; 2238 .loc 29 232 0 2239 0018 B4EC017A vldmia.32 r4!, {s14} 2240 .LVL262: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2241 .loc 29 228 0 2242 001c 013B subs r3, r3, #1 2243 .LVL263: 2244 .loc 29 232 0 2245 001e 77EE877A vadd.f32 s15, s15, s14 2246 .LVL264: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2247 .loc 29 228 0 2248 0022 F9D1 bne .L226 233:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 234:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement loop counter */ 235:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; 236:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 237:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 238:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize */ 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fMean = sum / (float32_t) blockSize; ARM GAS /tmp/ccDUJO2W.s page 255 2249 .loc 29 239 0 2250 0024 07EE101A vmov s14, r1 @ int 2251 0028 B8EE476A vcvt.f32.u32 s12, s14 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fMean, fValue; 2252 .loc 29 189 0 2253 002c 9FED107A vldr.32 s14, .L242 2254 .loc 29 239 0 2255 0030 C7EE866A vdiv.f32 s13, s15, s12 2256 .LVL265: 2257 .L227: 240:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 241:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** pInput = pSrc; 242:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 243:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE) 244:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 245:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Loop unrolling: Compute 4 outputs at a time */ 246:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize >> 2U; 247:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 248:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 249:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 250:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fValue = *pInput++ - fMean; 251:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fSum += fValue * fValue; 252:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 253:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fValue = *pInput++ - fMean; 254:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fSum += fValue * fValue; 255:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 256:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fValue = *pInput++ - fMean; 257:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fSum += fValue * fValue; 258:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 259:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fValue = *pInput++ - fMean; 260:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fSum += fValue * fValue; 261:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 262:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement loop counter */ 263:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; 264:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 265:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 266:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Loop unrolling: Compute remaining outputs */ 267:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize % 0x4U; 268:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 269:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #else 270:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 271:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Initialize blkCnt with number of samples */ 272:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt = blockSize; 273:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 274:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 275:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** while (blkCnt > 0U) 2258 .loc 29 276 0 2259 0034 0139 subs r1, r1, #1 2260 .LVL266: 277:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fValue = *pInput++ - fMean; 2261 .loc 29 278 0 2262 0036 F0EC017A vldmia.32 r0!, {s15} 2263 .LVL267: 2264 003a 77EEE67A vsub.f32 s15, s15, s13 2265 .LVL268: ARM GAS /tmp/ccDUJO2W.s page 256 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fSum += fValue * fValue; 2266 .loc 29 279 0 2267 003e A7EEA77A vfma.f32 s14, s15, s15 2268 .LVL269: 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2269 .loc 29 276 0 2270 0042 F7D1 bne .L227 280:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 281:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Decrement loop counter */ 282:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** blkCnt--; 283:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 284:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 285:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** /* Variance */ 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** *pResult = fSum / (float32_t)(blockSize - 1.0f); 2271 .loc 29 286 0 2272 0044 F7EE007A vmov.f32 s15, #1.0e+0 2273 .LVL270: 2274 0048 36EE676A vsub.f32 s12, s12, s15 2275 004c C7EE066A vdiv.f32 s13, s14, s12 2276 .LVL271: 2277 .LBE39: 2278 .LBE40: 2279 .LBE41: 2280 .LBE42: 2281 .LBB43: 2282 .LBB44: 6824:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Include/arm_math.h **** { 2283 .loc 25 6824 0 2284 0050 F5EEC06A vcmpe.f32 s13, #0 2285 0054 F1EE10FA vmrs APSR_nzcv, FPSCR 2286 0058 06DA bge .L241 2287 .loc 25 6848 0 2288 005a DFED057A vldr.32 s15, .L242 2289 .L228: 2290 005e C2ED007A vstr.32 s15, [r2] 2291 .LVL272: 2292 .LBE44: 2293 .LBE43: 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** float32_t var; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** arm_var_f32(pSrc,blockSize,&var); 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** arm_sqrt_f32(var, pResult); 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c **** } 2294 .loc 28 79 0 2295 0062 5DF8044B ldr r4, [sp], #4 2296 .LCFI79: 2297 .cfi_remember_state 2298 .cfi_restore 4 2299 .cfi_def_cfa_offset 0 2300 0066 7047 bx lr 2301 .LVL273: 2302 .L241: 2303 .LCFI80: 2304 .cfi_restore_state 2305 0068 F1EEE67A vsqrt.f32 s15, s13 2306 006c F7E7 b .L228 2307 .L243: 2308 006e 00BF .align 2 ARM GAS /tmp/ccDUJO2W.s page 257 2309 .L242: 2310 0070 00000000 .word 0 2311 .cfi_endproc 2312 .LFE174: 2314 .section .text.arm_std_q15,"ax",%progbits 2315 .align 1 2316 .p2align 2,,3 2317 .global arm_std_q15 2318 .syntax unified 2319 .thumb 2320 .thumb_func 2321 .fpu fpv4-sp-d16 2323 arm_std_q15: 2324 .LFB175: 2325 .file 30 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Title: arm_std_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Description: Standard deviation of an array of Q15 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @addtogroup STD 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @brief Standard deviation of the elements of a Q15 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @param[in] pSrc points to the input vector ARM GAS /tmp/ccDUJO2W.s page 258 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @param[out] pResult standard deviation value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** The function is implemented using a 64-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** The input is represented in 1.15 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** Intermediate multiplication yields a 2.30 format, and this 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** result is added without saturation to a 64-bit accumulator in 34.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** With 33 guard bits in the accumulator, there is no risk of overflow, and the 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** full precision of the intermediate multiplication is preserved. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 15 bits, and then saturated to yield a result in 1.15 format. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** void arm_std_q15( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** const q15_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** uint32_t blockSize, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q15_t * pResult) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q15_t var=0; 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** arm_var_q15(pSrc, blockSize, &var); 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** arm_sqrt_q15(var,pResult); 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** } 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #else 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** void arm_std_q15( 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** const q15_t * pSrc, 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** uint32_t blockSize, 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q15_t * pResult) 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 2326 .loc 30 73 0 2327 .cfi_startproc 2328 @ args = 0, pretend = 0, frame = 0 2329 @ frame_needed = 0, uses_anonymous_args = 0 2330 .LVL274: 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** uint32_t blkCnt; /* Loop counter */ 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q31_t sum = 0; /* Accumulator */ 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q63_t sumOfSquares = 0; /* Sum of squares */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q15_t in; /* Temporary variable to store input value * 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q31_t in32; /* Temporary variable to store input value */ 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #endif 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** if (blockSize <= 1U) 2331 .loc 30 84 0 2332 0000 0129 cmp r1, #1 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** uint32_t blkCnt; /* Loop counter */ 2333 .loc 30 73 0 2334 0002 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr} 2335 .LCFI81: 2336 .cfi_def_cfa_offset 32 2337 .cfi_offset 4, -32 2338 .cfi_offset 5, -28 2339 .cfi_offset 6, -24 ARM GAS /tmp/ccDUJO2W.s page 259 2340 .cfi_offset 7, -20 2341 .cfi_offset 8, -16 2342 .cfi_offset 9, -12 2343 .cfi_offset 10, -8 2344 .cfi_offset 14, -4 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** uint32_t blkCnt; /* Loop counter */ 2345 .loc 30 73 0 2346 0006 9146 mov r9, r2 2347 .loc 30 84 0 2348 0008 25D9 bls .L251 2349 000a 8846 mov r8, r1 2350 000c 0C46 mov r4, r1 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q15_t in; /* Temporary variable to store input value * 2351 .loc 30 77 0 2352 000e 0026 movs r6, #0 2353 0010 0027 movs r7, #0 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 2354 .loc 30 75 0 2355 0012 0025 movs r5, #0 2356 .LVL275: 2357 .L245: 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** *pResult = 0; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** return; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** } 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** blkCnt = blockSize >> 2U; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** while (blkCnt > 0U) 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute sum and store result in a temporary variable, sum. */ 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #if defined (ARM_MATH_DSP) 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares = __SMLALD(in32, in32, sumOfSquares); 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += ((in32 << 16U) >> 16U); 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += (in32 >> 16U); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares = __SMLALD(in32, in32, sumOfSquares); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += ((in32 << 16U) >> 16U); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += (in32 >> 16U); 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #else 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in = *pSrc++; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares += (in * in); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += in; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in = *pSrc++; 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares += (in * in); 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += in; 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** ARM GAS /tmp/ccDUJO2W.s page 260 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in = *pSrc++; 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares += (in * in); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += in; 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in = *pSrc++; 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares += (in * in); 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += in; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Decrement loop counter */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** blkCnt--; 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** } 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Loop unrolling: Compute remaining outputs */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** blkCnt = blockSize % 0x4U; 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #else 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Initialize blkCnt with number of samples */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** blkCnt = blockSize; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** while (blkCnt > 0U) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** in = *pSrc++; 2358 .loc 30 149 0 2359 0014 30F9023B ldrsh r3, [r0], #2 2360 .LVL276: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 2361 .loc 30 144 0 2362 0018 013C subs r4, r4, #1 2363 .LVL277: 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sumOfSquares += (in * in); 2364 .loc 30 151 0 2365 001a C3FB8367 smlalbb r6, r7, r3, r3 2366 .LVL278: 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute sum and store result in a temporary variable, sum. */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** sum += in; 2367 .loc 30 153 0 2368 001e 1D44 add r5, r5, r3 2369 .LVL279: 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** { 2370 .loc 30 144 0 2371 0020 F8D1 bne .L245 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Decrement loop counter */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** blkCnt--; 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** } 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U)); 2372 .loc 30 160 0 ARM GAS /tmp/ccDUJO2W.s page 261 2373 0022 08F1FF3A add r10, r8, #-1 2374 .LVL280: 2375 0026 5246 mov r2, r10 2376 .LVL281: 2377 0028 2346 mov r3, r4 2378 .LVL282: 2379 002a 3046 mov r0, r6 2380 .LVL283: 2381 002c 3946 mov r1, r7 2382 .LVL284: 2383 002e FFF7FEFF bl __aeabi_ldivmod 2384 .LVL285: 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute square of mean */ 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U))); 2385 .loc 30 163 0 2386 0032 08FB0AF2 mul r2, r8, r10 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 2387 .loc 30 160 0 2388 0036 0646 mov r6, r0 2389 .LVL286: 2390 .loc 30 163 0 2391 0038 2346 mov r3, r4 2392 003a 85FB0501 smull r0, r1, r5, r5 2393 003e FFF7FEFF bl __aeabi_ldivmod 2394 .LVL287: 2395 .LBB45: 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* mean of squares minus the square of mean. */ 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** /* Compute standard deviation and store result in destination */ 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult); 2396 .loc 30 167 0 2397 0042 301A subs r0, r6, r0 2398 0044 C013 asrs r0, r0, #15 2399 .LBE45: 2400 0046 4946 mov r1, r9 2401 .LBB46: 2402 .syntax unified 2403 @ 167 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c" 1 2404 0048 00F30F00 ssat r0, #16, r0 2405 @ 0 "" 2 2406 .LVL288: 2407 .thumb 2408 .syntax unified 2409 .LBE46: 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** } 2410 .loc 30 168 0 2411 004c BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr} 2412 .LCFI82: 2413 .cfi_remember_state 2414 .cfi_restore 14 2415 .cfi_restore 10 2416 .cfi_restore 9 2417 .cfi_restore 8 2418 .cfi_restore 7 2419 .cfi_restore 6 2420 .cfi_restore 5 ARM GAS /tmp/ccDUJO2W.s page 262 2421 .cfi_restore 4 2422 .cfi_def_cfa_offset 0 2423 .LVL289: 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** } 2424 .loc 30 167 0 2425 0050 00B2 sxth r0, r0 2426 .LVL290: 2427 0052 FFF7FEBF b arm_sqrt_q15 2428 .LVL291: 2429 .L251: 2430 .LCFI83: 2431 .cfi_restore_state 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c **** return; 2432 .loc 30 86 0 2433 0056 0023 movs r3, #0 2434 0058 1380 strh r3, [r2] @ movhi 2435 .loc 30 168 0 2436 005a BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc} 2437 .cfi_endproc 2438 .LFE175: 2440 005e 00BF .section .text.arm_std_q31,"ax",%progbits 2441 .align 1 2442 .p2align 2,,3 2443 .global arm_std_q31 2444 .syntax unified 2445 .thumb 2446 .thumb_func 2447 .fpu fpv4-sp-d16 2449 arm_std_q31: 2450 .LFB176: 2451 .file 31 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Title: arm_std_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Description: Standard deviation of the elements of a Q31 vector 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** * limitations under the License. ARM GAS /tmp/ccDUJO2W.s page 263 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @addtogroup STD 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @brief Standard deviation of the elements of a Q31 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @param[in] pSrc points to the input vector. 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @param[in] blockSize number of samples in input vector. 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @param[out] pResult standard deviation value returned here. 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** The function is implemented using an internal 64-bit accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** The input is represented in 1.31 format, which is then downshifted by 8 bits 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** which yields 1.23, and intermediate multiplication yields a 2.46 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** The accumulator maintains full precision of the intermediate multiplication resu 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** but provides only a 16 guard bits. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** There is no saturation on intermediate additions. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** If the accumulator overflows it wraps around and distorts the result. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** log2(blockSize)-8 bits, as a total of blockSize additions are performed internal 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** After division, internal variables should be Q18.46 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 forma 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** #if defined(ARM_MATH_MVEI) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** void arm_std_q31( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** const q31_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** uint32_t blockSize, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q31_t * pResult) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q31_t var=0; 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** arm_var_q31(pSrc, blockSize, &var); 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** arm_sqrt_q31(var, pResult); 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** } 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** #else 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** void arm_std_q31( 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** const q31_t * pSrc, 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** uint32_t blockSize, 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q31_t * pResult) 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { 2452 .loc 31 76 0 2453 .cfi_startproc 2454 @ args = 0, pretend = 0, frame = 0 2455 @ frame_needed = 0, uses_anonymous_args = 0 2456 .LVL292: 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** uint32_t blkCnt; /* Loop counter */ 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q63_t sum = 0; /* Accumulator */ ARM GAS /tmp/ccDUJO2W.s page 264 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q63_t sumOfSquares = 0; /* Sum of squares */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q31_t in; /* Temporary variable to store input value * 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** if (blockSize <= 1U) 2457 .loc 31 83 0 2458 0000 0129 cmp r1, #1 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** uint32_t blkCnt; /* Loop counter */ 2459 .loc 31 76 0 2460 0002 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 2461 .LCFI84: 2462 .cfi_def_cfa_offset 40 2463 .cfi_offset 3, -40 2464 .cfi_offset 4, -36 2465 .cfi_offset 5, -32 2466 .cfi_offset 6, -28 2467 .cfi_offset 7, -24 2468 .cfi_offset 8, -20 2469 .cfi_offset 9, -16 2470 .cfi_offset 10, -12 2471 .cfi_offset 11, -8 2472 .cfi_offset 14, -4 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** uint32_t blkCnt; /* Loop counter */ 2473 .loc 31 76 0 2474 0006 9246 mov r10, r2 2475 .loc 31 83 0 2476 0008 32D9 bls .L259 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q31_t in; /* Temporary variable to store input value * 2477 .loc 31 80 0 2478 000a 4FF00008 mov r8, #0 2479 000e 4FF00009 mov r9, #0 2480 0012 0F46 mov r7, r1 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 2481 .loc 31 78 0 2482 0014 4446 mov r4, r8 2483 0016 4D46 mov r5, r9 2484 0018 0E46 mov r6, r1 2485 .LVL293: 2486 .L253: 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** *pResult = 0; 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** return; 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** } 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** blkCnt = blockSize >> 2U; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** while (blkCnt > 0U) 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** in = *pSrc++ >> 8U; 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); ARM GAS /tmp/ccDUJO2W.s page 265 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sum += in; 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** in = *pSrc++ >> 8U; 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sum += in; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** in = *pSrc++ >> 8U; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sum += in; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** in = *pSrc++ >> 8U; 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sum += in; 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Decrement loop counter */ 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** blkCnt--; 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** } 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Loop unrolling: Compute remaining outputs */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** blkCnt = blockSize % 0x4U; 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** #else 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Initialize blkCnt with number of samples */ 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** blkCnt = blockSize; 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** while (blkCnt > 0U) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** in = *pSrc++ >> 8U; 2487 .loc 31 136 0 2488 001a 50F8043B ldr r3, [r0], #4 2489 .LVL294: 2490 001e 1B12 asrs r3, r3, #8 2491 .LVL295: 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** sum += in; 2492 .loc 31 140 0 2493 0020 E418 adds r4, r4, r3 2494 .LVL296: 2495 0022 45EBE375 adc r5, r5, r3, asr #31 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { 2496 .loc 31 131 0 2497 0026 013E subs r6, r6, #1 2498 .LVL297: 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 2499 .loc 31 138 0 2500 0028 C3FB0389 smlal r8, r9, r3, r3 2501 .LVL298: 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** { ARM GAS /tmp/ccDUJO2W.s page 266 2502 .loc 31 131 0 2503 002c F5D1 bne .L253 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Decrement loop counter */ 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** blkCnt--; 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** } 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U)); 2504 .loc 31 147 0 2505 002e 07F1FF3B add fp, r7, #-1 2506 .LVL299: 2507 0032 5A46 mov r2, fp 2508 .LVL300: 2509 0034 3346 mov r3, r6 2510 .LVL301: 2511 0036 4046 mov r0, r8 2512 .LVL302: 2513 0038 4946 mov r1, r9 2514 .LVL303: 2515 003a FFF7FEFF bl __aeabi_ldivmod 2516 .LVL304: 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute square of mean */ 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U))); 2517 .loc 31 150 0 2518 003e 04FB05F3 mul r3, r4, r5 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 2519 .loc 31 147 0 2520 0042 8046 mov r8, r0 2521 .LVL305: 2522 0044 8946 mov r9, r1 2523 .loc 31 150 0 2524 0046 A4FB0401 umull r0, r1, r4, r4 2525 004a 01EB4301 add r1, r1, r3, lsl #1 2526 004e 07FB0BF2 mul r2, r7, fp 2527 0052 3346 mov r3, r6 2528 0054 FFF7FEFF bl __aeabi_ldivmod 2529 .LVL306: 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** /* Compute standard deviation and store result in destination */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult); 2530 .loc 31 153 0 2531 0058 B8EB0003 subs r3, r8, r0 2532 005c 69EB0104 sbc r4, r9, r1 2533 .LVL307: 2534 0060 D80B lsrs r0, r3, #15 2535 0062 5146 mov r1, r10 2536 0064 40EA4440 orr r0, r0, r4, lsl #17 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** } 2537 .loc 31 154 0 2538 0068 BDE8F84F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 2539 .LCFI85: 2540 .cfi_remember_state 2541 .cfi_restore 14 2542 .cfi_restore 11 2543 .cfi_restore 10 ARM GAS /tmp/ccDUJO2W.s page 267 2544 .cfi_restore 9 2545 .cfi_restore 8 2546 .cfi_restore 7 2547 .cfi_restore 6 2548 .cfi_restore 5 2549 .cfi_restore 4 2550 .cfi_restore 3 2551 .cfi_def_cfa_offset 0 2552 .LVL308: 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** } 2553 .loc 31 153 0 2554 006c FFF7FEBF b arm_sqrt_q31 2555 .LVL309: 2556 .L259: 2557 .LCFI86: 2558 .cfi_restore_state 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c **** return; 2559 .loc 31 85 0 2560 0070 0023 movs r3, #0 2561 0072 1360 str r3, [r2] 2562 .loc 31 154 0 2563 0074 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 2564 .cfi_endproc 2565 .LFE176: 2567 .section .text.arm_var_f32,"ax",%progbits 2568 .align 1 2569 .p2align 2,,3 2570 .global arm_var_f32 2571 .syntax unified 2572 .thumb 2573 .thumb_func 2574 .fpu fpv4-sp-d16 2576 arm_var_f32: 2577 .LFB177: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blkCnt; /* Loop counter */ 2578 .loc 29 186 0 2579 .cfi_startproc 2580 @ args = 0, pretend = 0, frame = 0 2581 @ frame_needed = 0, uses_anonymous_args = 0 2582 @ link register save eliminated. 2583 .LVL310: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2584 .loc 29 193 0 2585 0000 0129 cmp r1, #1 2586 0002 25D9 bls .L261 2587 .LBB49: 2588 .LBB50: 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fSum = 0.0f; 2589 .loc 29 188 0 2590 0004 DFED147A vldr.32 s15, .L271 2591 .LBE50: 2592 .LBE49: 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** uint32_t blkCnt; /* Loop counter */ 2593 .loc 29 186 0 2594 0008 10B4 push {r4} 2595 .LCFI87: 2596 .cfi_def_cfa_offset 4 ARM GAS /tmp/ccDUJO2W.s page 268 2597 .cfi_offset 4, -4 2598 000a 0B46 mov r3, r1 2599 .LBB53: 2600 .LBB51: 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2601 .loc 29 191 0 2602 000c 0446 mov r4, r0 2603 .L262: 2604 .LVL311: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2605 .loc 29 232 0 2606 000e B4EC017A vldmia.32 r4!, {s14} 2607 .LVL312: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2608 .loc 29 228 0 2609 0012 013B subs r3, r3, #1 2610 .LVL313: 232:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2611 .loc 29 232 0 2612 0014 77EE877A vadd.f32 s15, s15, s14 2613 .LVL314: 228:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2614 .loc 29 228 0 2615 0018 F9D1 bne .L262 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2616 .loc 29 239 0 2617 001a 07EE101A vmov s14, r1 @ int 2618 001e B8EE476A vcvt.f32.u32 s12, s14 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** float32_t fMean, fValue; 2619 .loc 29 189 0 2620 0022 9FED0D7A vldr.32 s14, .L271 239:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2621 .loc 29 239 0 2622 0026 C7EE866A vdiv.f32 s13, s15, s12 2623 .LVL315: 2624 .L263: 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2625 .loc 29 276 0 2626 002a 0139 subs r1, r1, #1 2627 .LVL316: 278:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** fSum += fValue * fValue; 2628 .loc 29 278 0 2629 002c F0EC017A vldmia.32 r0!, {s15} 2630 .LVL317: 2631 0030 77EEE67A vsub.f32 s15, s15, s13 2632 .LVL318: 279:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** 2633 .loc 29 279 0 2634 0034 A7EEA77A vfma.f32 s14, s15, s15 2635 .LVL319: 276:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** { 2636 .loc 29 276 0 2637 0038 F7D1 bne .L263 2638 .loc 29 286 0 2639 003a F7EE007A vmov.f32 s15, #1.0e+0 2640 .LVL320: 2641 003e 36EE676A vsub.f32 s12, s12, s15 ARM GAS /tmp/ccDUJO2W.s page 269 2642 .LBE51: 2643 .LBE53: 287:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 2644 .loc 29 287 0 2645 0042 5DF8044B ldr r4, [sp], #4 2646 .LCFI88: 2647 .cfi_restore 4 2648 .cfi_def_cfa_offset 0 2649 .LBB54: 2650 .LBB52: 286:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** } 2651 .loc 29 286 0 2652 0046 C7EE067A vdiv.f32 s15, s14, s12 2653 004a C2ED007A vstr.32 s15, [r2] 2654 .LVL321: 2655 .LBE52: 2656 .LBE54: 2657 .loc 29 287 0 2658 004e 7047 bx lr 2659 .LVL322: 2660 .L261: 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c **** return; 2661 .loc 29 195 0 2662 0050 0023 movs r3, #0 2663 0052 1360 str r3, [r2] @ float 2664 0054 7047 bx lr 2665 .L272: 2666 0056 00BF .align 2 2667 .L271: 2668 0058 00000000 .word 0 2669 .cfi_endproc 2670 .LFE177: 2672 .section .text.arm_var_q15,"ax",%progbits 2673 .align 1 2674 .p2align 2,,3 2675 .global arm_var_q15 2676 .syntax unified 2677 .thumb 2678 .thumb_func 2679 .fpu fpv4-sp-d16 2681 arm_var_q15: 2682 .LFB178: 2683 .file 32 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* ---------------------------------------------------------------------- 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Title: arm_var_q15.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Description: Variance of an array of Q15 type 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * SPDX-License-Identifier: Apache-2.0 ARM GAS /tmp/ccDUJO2W.s page 270 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @addtogroup variance 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @brief Variance of the elements of a Q15 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @param[out] pResult variance value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** The function is implemented using a 64-bit internal accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** The input is represented in 1.15 format. 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** Intermediate multiplication yields a 2.30 format, and this 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** result is added without saturation to a 64-bit accumulator in 34.30 format. 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** With 33 guard bits in the accumulator, there is no risk of overflow, and the 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** full precision of the intermediate multiplication is preserved. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 15 bits, and then saturated to yield a result in 1.15 format. 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** */ 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #if defined(ARM_MATH_MVEI) 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** void arm_var_q15( 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** const q15_t * pSrc, 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** uint32_t blockSize, 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q15_t * pResult) 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** uint32_t blkCnt; /* loop counters */ 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q15x8_t vecSrc; 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q63_t sumOfSquares = 0LL; 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q63_t sum = 0LL; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q15_t in; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** if (blockSize <= 1U) { 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** *pResult = 0; ARM GAS /tmp/ccDUJO2W.s page 271 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** return; 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt = blockSize >> 3; 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** while (blkCnt > 0U) 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** vecSrc = vldrhq_s16(pSrc); 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute Sum of squares of the input samples 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * and then store the result in a temporary variable, sumOfSquares. */ 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares = vmlaldavaq(sumOfSquares, vecSrc, vecSrc); 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum = vaddvaq(sum, vecSrc); 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt --; 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** pSrc += 8; 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Tail */ 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt = blockSize & 7; 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** while (blkCnt > 0U) 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in = *pSrc++; 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #if defined (ARM_MATH_DSP) 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares = __SMLALD(in, in, sumOfSquares); 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #else 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares += (in * in); 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute sum and store result in a temporary variable, sum. */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += in; 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Decrement loop counter */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt--; 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute Mean of squares of the input samples 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** * and then store the result in a temporary variable, meanOfSquares. */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** meanOfSquares = arm_div_q63_to_q31(sumOfSquares, (blockSize - 1U)); 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute square of mean */ 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** squareOfMean = arm_div_q63_to_q31((q63_t)sum * sum, (q31_t)(blockSize * (blockSize - 1U))); 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* mean of the squares minus the square of the mean. */ 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** *pResult = (meanOfSquares - squareOfMean) >> 15; 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #else 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** void arm_var_q15( 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** const q15_t * pSrc, 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** uint32_t blockSize, 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q15_t * pResult) 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 2684 .loc 32 127 0 ARM GAS /tmp/ccDUJO2W.s page 272 2685 .cfi_startproc 2686 @ args = 0, pretend = 0, frame = 0 2687 @ frame_needed = 0, uses_anonymous_args = 0 2688 .LVL323: 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** uint32_t blkCnt; /* Loop counter */ 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q31_t sum = 0; /* Accumulator */ 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q63_t sumOfSquares = 0; /* Sum of squares */ 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q15_t in; /* Temporary variable to store input value * 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP) 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q31_t in32; /* Temporary variable to store input value * 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #endif 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** if (blockSize <= 1U) 2689 .loc 32 138 0 2690 0000 0129 cmp r1, #1 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** uint32_t blkCnt; /* Loop counter */ 2691 .loc 32 127 0 2692 0002 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} 2693 .LCFI89: 2694 .cfi_def_cfa_offset 32 2695 .cfi_offset 3, -32 2696 .cfi_offset 4, -28 2697 .cfi_offset 5, -24 2698 .cfi_offset 6, -20 2699 .cfi_offset 7, -16 2700 .cfi_offset 8, -12 2701 .cfi_offset 9, -8 2702 .cfi_offset 14, -4 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** uint32_t blkCnt; /* Loop counter */ 2703 .loc 32 127 0 2704 0006 1746 mov r7, r2 2705 .loc 32 138 0 2706 0008 20D9 bls .L279 2707 000a 0E46 mov r6, r1 2708 000c 8446 mov ip, r0 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q15_t in; /* Temporary variable to store input value * 2709 .loc 32 131 0 2710 000e 0020 movs r0, #0 2711 .LVL324: 2712 0010 0146 mov r1, r0 2713 .LVL325: 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** q31_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 2714 .loc 32 129 0 2715 0012 0546 mov r5, r0 2716 0014 3446 mov r4, r6 2717 .LVL326: 2718 .L274: 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** *pResult = 0; 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** return; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #if defined (ARM_MATH_LOOPUNROLL) 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Loop unrolling: Compute 4 outputs at a time */ ARM GAS /tmp/ccDUJO2W.s page 273 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt = blockSize >> 2U; 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** while (blkCnt > 0U) 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute sum and store result in a temporary variable, sum. */ 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #if defined (ARM_MATH_DSP) 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares = __SMLALD(in32, in32, sumOfSquares); 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += ((in32 << 16U) >> 16U); 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += (in32 >> 16U); 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in32 = read_q15x2_ia ((q15_t **) &pSrc); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares = __SMLALD(in32, in32, sumOfSquares); 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += ((in32 << 16U) >> 16U); 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += (in32 >> 16U); 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #else 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in = *pSrc++; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares += (in * in); 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += in; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in = *pSrc++; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares += (in * in); 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += in; 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in = *pSrc++; 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares += (in * in); 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += in; 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in = *pSrc++; 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares += (in * in); 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += in; 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Decrement loop counter */ 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt--; 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Loop unrolling: Compute remaining outputs */ 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt = blockSize % 0x4U; 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #else 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Initialize blkCnt with number of samples */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt = blockSize; 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** while (blkCnt > 0U) 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** in = *pSrc++; ARM GAS /tmp/ccDUJO2W.s page 274 2719 .loc 32 203 0 2720 0016 3CF9023B ldrsh r3, [ip], #2 2721 .LVL327: 2722 .LBB55: 2723 .LBB56: 2724 .file 33 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.2.0 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 08. May 2019 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2019 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccDUJO2W.s page 275 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add ARM GAS /tmp/ccDUJO2W.s page 276 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __COMPILER_BARRIER 117:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __COMPILER_BARRIER() __ASM volatile("":::"memory") 118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 119:Drivers/CMSIS/Include/cmsis_gcc.h **** 120:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ######################### Startup and Lowlevel Init ######################## */ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** 122:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PROGRAM_START 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Initializes data and bss sections 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details This default implementations initialized all data and additional bss 127:Drivers/CMSIS/Include/cmsis_gcc.h **** sections relying on .copy.table and .zero.table specified properly 128:Drivers/CMSIS/Include/cmsis_gcc.h **** in the used linker script. 129:Drivers/CMSIS/Include/cmsis_gcc.h **** 130:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void) 132:Drivers/CMSIS/Include/cmsis_gcc.h **** { 133:Drivers/CMSIS/Include/cmsis_gcc.h **** extern void _start(void) __NO_RETURN; 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 143:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; 144:Drivers/CMSIS/Include/cmsis_gcc.h **** } __zero_table_t; 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_start__; 147:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __copy_table_t __copy_table_end__; 148:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_start__; 149:Drivers/CMSIS/Include/cmsis_gcc.h **** extern const __zero_table_t __zero_table_end__; 150:Drivers/CMSIS/Include/cmsis_gcc.h **** 151:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable 152:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = pTable->src[i]; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** } 155:Drivers/CMSIS/Include/cmsis_gcc.h **** } 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } 162:Drivers/CMSIS/Include/cmsis_gcc.h **** 163:Drivers/CMSIS/Include/cmsis_gcc.h **** _start(); 164:Drivers/CMSIS/Include/cmsis_gcc.h **** } 165:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccDUJO2W.s page 277 166:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PROGRAM_START __cmsis_start 167:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 168:Drivers/CMSIS/Include/cmsis_gcc.h **** 169:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INITIAL_SP 170:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INITIAL_SP __StackTop 171:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 172:Drivers/CMSIS/Include/cmsis_gcc.h **** 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STACK_LIMIT 174:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STACK_LIMIT __StackLimit 175:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 176:Drivers/CMSIS/Include/cmsis_gcc.h **** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE 178:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE __Vectors 179:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 180:Drivers/CMSIS/Include/cmsis_gcc.h **** 181:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __VECTOR_TABLE_ATTRIBUTE 182:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __VECTOR_TABLE_ATTRIBUTE __attribute((used, section(".vectors"))) 183:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 184:Drivers/CMSIS/Include/cmsis_gcc.h **** 185:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 186:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 187:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 188:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 189:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 190:Drivers/CMSIS/Include/cmsis_gcc.h **** 191:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 192:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 193:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 194:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 195:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 196:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 197:Drivers/CMSIS/Include/cmsis_gcc.h **** { 198:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 199:Drivers/CMSIS/Include/cmsis_gcc.h **** } 200:Drivers/CMSIS/Include/cmsis_gcc.h **** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** 202:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 204:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 205:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 206:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 207:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 208:Drivers/CMSIS/Include/cmsis_gcc.h **** { 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** } 211:Drivers/CMSIS/Include/cmsis_gcc.h **** 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 214:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 217:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 218:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 219:Drivers/CMSIS/Include/cmsis_gcc.h **** { 220:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 221:Drivers/CMSIS/Include/cmsis_gcc.h **** 222:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); ARM GAS /tmp/ccDUJO2W.s page 278 223:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** } 225:Drivers/CMSIS/Include/cmsis_gcc.h **** 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 246:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 247:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 248:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 249:Drivers/CMSIS/Include/cmsis_gcc.h **** { 250:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 251:Drivers/CMSIS/Include/cmsis_gcc.h **** } 252:Drivers/CMSIS/Include/cmsis_gcc.h **** 253:Drivers/CMSIS/Include/cmsis_gcc.h **** 254:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 255:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 259:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 260:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 261:Drivers/CMSIS/Include/cmsis_gcc.h **** { 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 263:Drivers/CMSIS/Include/cmsis_gcc.h **** } 264:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** 267:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 268:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 269:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 270:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 271:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 272:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 273:Drivers/CMSIS/Include/cmsis_gcc.h **** { 274:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 275:Drivers/CMSIS/Include/cmsis_gcc.h **** 276:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 277:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 278:Drivers/CMSIS/Include/cmsis_gcc.h **** } 279:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccDUJO2W.s page 279 280:Drivers/CMSIS/Include/cmsis_gcc.h **** 281:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 283:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 284:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 285:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 286:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 287:Drivers/CMSIS/Include/cmsis_gcc.h **** { 288:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 289:Drivers/CMSIS/Include/cmsis_gcc.h **** 290:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 291:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 299:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 300:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 301:Drivers/CMSIS/Include/cmsis_gcc.h **** { 302:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 303:Drivers/CMSIS/Include/cmsis_gcc.h **** 304:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 305:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** } 307:Drivers/CMSIS/Include/cmsis_gcc.h **** 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 311:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 313:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 314:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 315:Drivers/CMSIS/Include/cmsis_gcc.h **** { 316:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 317:Drivers/CMSIS/Include/cmsis_gcc.h **** 318:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 319:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 320:Drivers/CMSIS/Include/cmsis_gcc.h **** } 321:Drivers/CMSIS/Include/cmsis_gcc.h **** 322:Drivers/CMSIS/Include/cmsis_gcc.h **** 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 324:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 326:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 328:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 329:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 330:Drivers/CMSIS/Include/cmsis_gcc.h **** { 331:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 335:Drivers/CMSIS/Include/cmsis_gcc.h **** } 336:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS /tmp/ccDUJO2W.s page 280 337:Drivers/CMSIS/Include/cmsis_gcc.h **** 338:Drivers/CMSIS/Include/cmsis_gcc.h **** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 342:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 343:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 344:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 345:Drivers/CMSIS/Include/cmsis_gcc.h **** { 346:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 347:Drivers/CMSIS/Include/cmsis_gcc.h **** } 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 359:Drivers/CMSIS/Include/cmsis_gcc.h **** } 360:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 361:Drivers/CMSIS/Include/cmsis_gcc.h **** 362:Drivers/CMSIS/Include/cmsis_gcc.h **** 363:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 365:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 367:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 368:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 369:Drivers/CMSIS/Include/cmsis_gcc.h **** { 370:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 371:Drivers/CMSIS/Include/cmsis_gcc.h **** 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 374:Drivers/CMSIS/Include/cmsis_gcc.h **** } 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 378:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 381:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 382:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 383:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 384:Drivers/CMSIS/Include/cmsis_gcc.h **** { 385:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 386:Drivers/CMSIS/Include/cmsis_gcc.h **** 387:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 389:Drivers/CMSIS/Include/cmsis_gcc.h **** } 390:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 391:Drivers/CMSIS/Include/cmsis_gcc.h **** 392:Drivers/CMSIS/Include/cmsis_gcc.h **** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccDUJO2W.s page 281 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 396:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 397:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 398:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 399:Drivers/CMSIS/Include/cmsis_gcc.h **** { 400:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 401:Drivers/CMSIS/Include/cmsis_gcc.h **** } 402:Drivers/CMSIS/Include/cmsis_gcc.h **** 403:Drivers/CMSIS/Include/cmsis_gcc.h **** 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 405:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 407:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 409:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 410:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 411:Drivers/CMSIS/Include/cmsis_gcc.h **** { 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 413:Drivers/CMSIS/Include/cmsis_gcc.h **** } 414:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 415:Drivers/CMSIS/Include/cmsis_gcc.h **** 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 418:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 419:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 422:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 424:Drivers/CMSIS/Include/cmsis_gcc.h **** { 425:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 426:Drivers/CMSIS/Include/cmsis_gcc.h **** 427:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 428:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 429:Drivers/CMSIS/Include/cmsis_gcc.h **** } 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** 432:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 433:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 440:Drivers/CMSIS/Include/cmsis_gcc.h **** } 441:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 442:Drivers/CMSIS/Include/cmsis_gcc.h **** 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 448:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 449:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 450:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccDUJO2W.s page 282 451:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 452:Drivers/CMSIS/Include/cmsis_gcc.h **** 453:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 454:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 455:Drivers/CMSIS/Include/cmsis_gcc.h **** } 456:Drivers/CMSIS/Include/cmsis_gcc.h **** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** 458:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 459:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 460:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 461:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 462:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 463:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 464:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 465:Drivers/CMSIS/Include/cmsis_gcc.h **** { 466:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 467:Drivers/CMSIS/Include/cmsis_gcc.h **** 468:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 469:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 470:Drivers/CMSIS/Include/cmsis_gcc.h **** } 471:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 472:Drivers/CMSIS/Include/cmsis_gcc.h **** 473:Drivers/CMSIS/Include/cmsis_gcc.h **** 474:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 475:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 476:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 477:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 478:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 479:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 480:Drivers/CMSIS/Include/cmsis_gcc.h **** { 481:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** 498:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 499:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 500:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 501:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 504:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 507:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS /tmp/ccDUJO2W.s page 283 508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); 509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 510:Drivers/CMSIS/Include/cmsis_gcc.h **** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** 512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 515:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 516:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 517:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 518:Drivers/CMSIS/Include/cmsis_gcc.h **** { 519:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 520:Drivers/CMSIS/Include/cmsis_gcc.h **** } 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 526:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 527:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 528:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 529:Drivers/CMSIS/Include/cmsis_gcc.h **** { 530:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 531:Drivers/CMSIS/Include/cmsis_gcc.h **** 532:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 534:Drivers/CMSIS/Include/cmsis_gcc.h **** } 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 538:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 541:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 542:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 543:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 544:Drivers/CMSIS/Include/cmsis_gcc.h **** { 545:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 546:Drivers/CMSIS/Include/cmsis_gcc.h **** 547:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 549:Drivers/CMSIS/Include/cmsis_gcc.h **** } 550:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 557:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 558:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** { 560:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 561:Drivers/CMSIS/Include/cmsis_gcc.h **** } 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** 564:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) ARM GAS /tmp/ccDUJO2W.s page 284 565:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 568:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 569:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 570:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 571:Drivers/CMSIS/Include/cmsis_gcc.h **** { 572:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 573:Drivers/CMSIS/Include/cmsis_gcc.h **** } 574:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 575:Drivers/CMSIS/Include/cmsis_gcc.h **** 576:Drivers/CMSIS/Include/cmsis_gcc.h **** 577:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 578:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 579:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 580:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 581:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 582:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 583:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 584:Drivers/CMSIS/Include/cmsis_gcc.h **** { 585:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 586:Drivers/CMSIS/Include/cmsis_gcc.h **** } 587:Drivers/CMSIS/Include/cmsis_gcc.h **** 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 591:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 592:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 593:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 594:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 595:Drivers/CMSIS/Include/cmsis_gcc.h **** { 596:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 597:Drivers/CMSIS/Include/cmsis_gcc.h **** 598:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 599:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 600:Drivers/CMSIS/Include/cmsis_gcc.h **** } 601:Drivers/CMSIS/Include/cmsis_gcc.h **** 602:Drivers/CMSIS/Include/cmsis_gcc.h **** 603:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 604:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 608:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 609:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 610:Drivers/CMSIS/Include/cmsis_gcc.h **** { 611:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 612:Drivers/CMSIS/Include/cmsis_gcc.h **** 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 615:Drivers/CMSIS/Include/cmsis_gcc.h **** } 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 617:Drivers/CMSIS/Include/cmsis_gcc.h **** 618:Drivers/CMSIS/Include/cmsis_gcc.h **** 619:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 620:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 621:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. ARM GAS /tmp/ccDUJO2W.s page 285 622:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 623:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 624:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 625:Drivers/CMSIS/Include/cmsis_gcc.h **** { 626:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 628:Drivers/CMSIS/Include/cmsis_gcc.h **** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** 630:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 631:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 632:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 633:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 635:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 636:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 637:Drivers/CMSIS/Include/cmsis_gcc.h **** { 638:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 639:Drivers/CMSIS/Include/cmsis_gcc.h **** } 640:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 641:Drivers/CMSIS/Include/cmsis_gcc.h **** 642:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 643:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 644:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 645:Drivers/CMSIS/Include/cmsis_gcc.h **** 646:Drivers/CMSIS/Include/cmsis_gcc.h **** 647:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 648:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 649:Drivers/CMSIS/Include/cmsis_gcc.h **** 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 654:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 655:Drivers/CMSIS/Include/cmsis_gcc.h **** 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 657:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 658:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 659:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 660:Drivers/CMSIS/Include/cmsis_gcc.h **** { 661:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 663:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 664:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 666:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 667:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 668:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 669:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** 672:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 675:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 676:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 677:Drivers/CMSIS/Include/cmsis_gcc.h **** 678:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in ARM GAS /tmp/ccDUJO2W.s page 286 679:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 680:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 681:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 682:Drivers/CMSIS/Include/cmsis_gcc.h **** { 683:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 684:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 685:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 686:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 687:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 688:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 689:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 690:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 691:Drivers/CMSIS/Include/cmsis_gcc.h **** } 692:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 693:Drivers/CMSIS/Include/cmsis_gcc.h **** 694:Drivers/CMSIS/Include/cmsis_gcc.h **** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 696:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 698:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 699:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 700:Drivers/CMSIS/Include/cmsis_gcc.h **** 701:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 702:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 703:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 704:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** { 706:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 709:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 710:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 711:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 712:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 713:Drivers/CMSIS/Include/cmsis_gcc.h **** } 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 717:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 718:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 728:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 729:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 730:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 732:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 735:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccDUJO2W.s page 287 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 738:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 739:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 749:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 750:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 751:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 752:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 754:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 755:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 756:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 758:Drivers/CMSIS/Include/cmsis_gcc.h **** 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 763:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 764:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 765:Drivers/CMSIS/Include/cmsis_gcc.h **** 766:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 767:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 768:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** { 771:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 773:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 774:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 775:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 776:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 777:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 778:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 779:Drivers/CMSIS/Include/cmsis_gcc.h **** } 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** 782:Drivers/CMSIS/Include/cmsis_gcc.h **** 783:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 784:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 785:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 786:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 787:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 788:Drivers/CMSIS/Include/cmsis_gcc.h **** 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) ARM GAS /tmp/ccDUJO2W.s page 288 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 797:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 798:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 799:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 800:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 801:Drivers/CMSIS/Include/cmsis_gcc.h **** } 802:Drivers/CMSIS/Include/cmsis_gcc.h **** 803:Drivers/CMSIS/Include/cmsis_gcc.h **** 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 805:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 806:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 807:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 808:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 811:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 812:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 813:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 814:Drivers/CMSIS/Include/cmsis_gcc.h **** { 815:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 816:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 817:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 818:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 820:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 825:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 826:Drivers/CMSIS/Include/cmsis_gcc.h **** 827:Drivers/CMSIS/Include/cmsis_gcc.h **** 828:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 829:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 830:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 831:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 832:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 833:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 834:Drivers/CMSIS/Include/cmsis_gcc.h **** { 835:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 837:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 838:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 839:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 840:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 841:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 843:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 846:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 847:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 848:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 849:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); ARM GAS /tmp/ccDUJO2W.s page 289 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 851:Drivers/CMSIS/Include/cmsis_gcc.h **** } 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 856:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 857:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 858:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 859:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 860:Drivers/CMSIS/Include/cmsis_gcc.h **** { 861:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 862:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 863:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 864:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 865:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 866:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 867:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 868:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 869:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 870:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 871:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 872:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 873:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 874:Drivers/CMSIS/Include/cmsis_gcc.h **** } 875:Drivers/CMSIS/Include/cmsis_gcc.h **** 876:Drivers/CMSIS/Include/cmsis_gcc.h **** 877:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 878:Drivers/CMSIS/Include/cmsis_gcc.h **** 879:Drivers/CMSIS/Include/cmsis_gcc.h **** 880:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 881:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 882:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 883:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 884:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 885:Drivers/CMSIS/Include/cmsis_gcc.h **** 886:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 888:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 889:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 890:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 891:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 892:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 893:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 894:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 895:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 897:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 903:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 904:Drivers/CMSIS/Include/cmsis_gcc.h **** 905:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 906:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt ARM GAS /tmp/ccDUJO2W.s page 290 907:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o 908:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 910:Drivers/CMSIS/Include/cmsis_gcc.h **** 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 915:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 916:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 917:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 918:Drivers/CMSIS/Include/cmsis_gcc.h **** 919:Drivers/CMSIS/Include/cmsis_gcc.h **** 920:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 921:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 922:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 923:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 924:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 925:Drivers/CMSIS/Include/cmsis_gcc.h **** 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 930:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 931:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 932:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 933:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 934:Drivers/CMSIS/Include/cmsis_gcc.h **** { 935:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 936:Drivers/CMSIS/Include/cmsis_gcc.h **** } 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 940:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 941:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 942:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 943:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 944:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 945:Drivers/CMSIS/Include/cmsis_gcc.h **** { 946:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 948:Drivers/CMSIS/Include/cmsis_gcc.h **** 949:Drivers/CMSIS/Include/cmsis_gcc.h **** 950:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 953:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 954:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 955:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 956:Drivers/CMSIS/Include/cmsis_gcc.h **** { 957:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 958:Drivers/CMSIS/Include/cmsis_gcc.h **** } 959:Drivers/CMSIS/Include/cmsis_gcc.h **** 960:Drivers/CMSIS/Include/cmsis_gcc.h **** 961:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 962:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 963:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 ARM GAS /tmp/ccDUJO2W.s page 291 964:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 965:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 966:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 967:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 968:Drivers/CMSIS/Include/cmsis_gcc.h **** { 969:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 970:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 971:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 972:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 975:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 976:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 977:Drivers/CMSIS/Include/cmsis_gcc.h **** } 978:Drivers/CMSIS/Include/cmsis_gcc.h **** 979:Drivers/CMSIS/Include/cmsis_gcc.h **** 980:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 981:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 983:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 984:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 985:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 987:Drivers/CMSIS/Include/cmsis_gcc.h **** { 988:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 989:Drivers/CMSIS/Include/cmsis_gcc.h **** 990:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 991:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 992:Drivers/CMSIS/Include/cmsis_gcc.h **** } 993:Drivers/CMSIS/Include/cmsis_gcc.h **** 994:Drivers/CMSIS/Include/cmsis_gcc.h **** 995:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 996:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 997:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 998:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 999:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccDUJO2W.s page 292 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS /tmp/ccDUJO2W.s page 293 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Even though __builtin_clz produces a CLZ instruction on ARM, formally 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_clz(0) is undefined behaviour, so handle this case specially. 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** This guarantees ARM-compatible results if happening to compile on a non-ARM 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** target, and ensures the compiler doesn't decide to activate any 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** optimisations using the logic "value was passed to __builtin_clz, so it 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** is non-zero". 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** single CLZ instruction. 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** if (value == 0U) 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** return 32U; 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_clz(value); 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) 1103:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1104:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1105:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1106:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1107:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) 1108:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1109:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) 1125:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. 1126:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1127:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1131:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1132:Drivers/CMSIS/Include/cmsis_gcc.h **** 1133:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1134:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); ARM GAS /tmp/ccDUJO2W.s page 294 1135:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1136:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1137:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1138:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1139:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1140:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1141:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1142:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1143:Drivers/CMSIS/Include/cmsis_gcc.h **** 1144:Drivers/CMSIS/Include/cmsis_gcc.h **** 1145:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1146:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1147:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1148:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) 1152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1154:Drivers/CMSIS/Include/cmsis_gcc.h **** 1155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 1156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1158:Drivers/CMSIS/Include/cmsis_gcc.h **** 1159:Drivers/CMSIS/Include/cmsis_gcc.h **** 1160:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1161:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) 1162:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. 1163:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1164:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1165:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1166:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1167:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1168:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) 1169:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1170:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1171:Drivers/CMSIS/Include/cmsis_gcc.h **** 1172:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1173:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1174:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1175:Drivers/CMSIS/Include/cmsis_gcc.h **** 1176:Drivers/CMSIS/Include/cmsis_gcc.h **** 1177:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1178:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1179:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. 1180:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1181:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1182:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1183:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1184:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1185:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) 1186:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1187:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1188:Drivers/CMSIS/Include/cmsis_gcc.h **** 1189:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1190:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1191:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccDUJO2W.s page 295 1192:Drivers/CMSIS/Include/cmsis_gcc.h **** 1193:Drivers/CMSIS/Include/cmsis_gcc.h **** 1194:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1195:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) 1196:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1197:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1198:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1199:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1200:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1201:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1202:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) 1203:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1204:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1205:Drivers/CMSIS/Include/cmsis_gcc.h **** 1206:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 1207:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1208:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1209:Drivers/CMSIS/Include/cmsis_gcc.h **** 1210:Drivers/CMSIS/Include/cmsis_gcc.h **** 1211:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1212:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock 1213:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX. 1214:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1215:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void) 1216:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1217:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("clrex" ::: "memory"); 1218:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1219:Drivers/CMSIS/Include/cmsis_gcc.h **** 1220:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1221:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1222:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1223:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1224:Drivers/CMSIS/Include/cmsis_gcc.h **** 1225:Drivers/CMSIS/Include/cmsis_gcc.h **** 1226:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1227:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1228:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 1229:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1230:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1231:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1232:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated 1233:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32) 1234:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1235:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1236:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT(ARG1,ARG2) \ 1237:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1238:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1239:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1240:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1241:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1242:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1243:Drivers/CMSIS/Include/cmsis_gcc.h **** 1244:Drivers/CMSIS/Include/cmsis_gcc.h **** 1245:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1246:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1247:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1248:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated ARM GAS /tmp/ccDUJO2W.s page 296 1249:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (0..31) 1250:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1251:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1252:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT(ARG1,ARG2) \ 1253:Drivers/CMSIS/Include/cmsis_gcc.h **** __extension__ \ 1254:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1255:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1256:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1257:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1258:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1259:Drivers/CMSIS/Include/cmsis_gcc.h **** 1260:Drivers/CMSIS/Include/cmsis_gcc.h **** 1261:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1262:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right with Extend (32 bit) 1263:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Moves each bit of a bitstring right by one bit. 1264:Drivers/CMSIS/Include/cmsis_gcc.h **** The carry input is shifted in at the left end of the bitstring. 1265:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to rotate 1266:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 1267:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1268:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) 1269:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1270:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1271:Drivers/CMSIS/Include/cmsis_gcc.h **** 1272:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 1273:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1274:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1275:Drivers/CMSIS/Include/cmsis_gcc.h **** 1276:Drivers/CMSIS/Include/cmsis_gcc.h **** 1277:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1278:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (8 bit) 1279:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 8 bit value. 1280:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1281:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1282:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1283:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr) 1284:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1285:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1286:Drivers/CMSIS/Include/cmsis_gcc.h **** 1287:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1288:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1289:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1290:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1291:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1292:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1293:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1294:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1295:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1296:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1297:Drivers/CMSIS/Include/cmsis_gcc.h **** 1298:Drivers/CMSIS/Include/cmsis_gcc.h **** 1299:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1300:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (16 bit) 1301:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 16 bit values. 1302:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1303:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1304:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1305:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr) ARM GAS /tmp/ccDUJO2W.s page 297 1306:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1307:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1308:Drivers/CMSIS/Include/cmsis_gcc.h **** 1309:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1310:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) ); 1311:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1312:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1313:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1314:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1315:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" ); 1316:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1317:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1318:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1319:Drivers/CMSIS/Include/cmsis_gcc.h **** 1320:Drivers/CMSIS/Include/cmsis_gcc.h **** 1321:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1322:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDRT Unprivileged (32 bit) 1323:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged LDRT instruction for 32 bit values. 1324:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1325:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1326:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1327:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) 1328:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1329:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1330:Drivers/CMSIS/Include/cmsis_gcc.h **** 1331:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) ); 1332:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1333:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1334:Drivers/CMSIS/Include/cmsis_gcc.h **** 1335:Drivers/CMSIS/Include/cmsis_gcc.h **** 1336:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1337:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (8 bit) 1338:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 8 bit values. 1339:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1340:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1341:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1342:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr) 1343:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1344:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1345:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1346:Drivers/CMSIS/Include/cmsis_gcc.h **** 1347:Drivers/CMSIS/Include/cmsis_gcc.h **** 1348:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1349:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit) 1350:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 16 bit values. 1351:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1352:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1353:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1354:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr) 1355:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1356:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1357:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1358:Drivers/CMSIS/Include/cmsis_gcc.h **** 1359:Drivers/CMSIS/Include/cmsis_gcc.h **** 1360:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1361:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (32 bit) 1362:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a Unprivileged STRT instruction for 32 bit values. ARM GAS /tmp/ccDUJO2W.s page 298 1363:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1364:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1365:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1366:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr) 1367:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1368:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) ); 1369:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1370:Drivers/CMSIS/Include/cmsis_gcc.h **** 1371:Drivers/CMSIS/Include/cmsis_gcc.h **** #else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1372:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1373:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1374:Drivers/CMSIS/Include/cmsis_gcc.h **** 1375:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1376:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 1377:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 1378:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1379:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (1..32) 1380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 1383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1384:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U)) 1385:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1386:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); 1387:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t min = -1 - max ; 1388:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > max) 1389:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1390:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1391:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1392:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < min) 1393:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1394:Drivers/CMSIS/Include/cmsis_gcc.h **** return min; 1395:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1396:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1397:Drivers/CMSIS/Include/cmsis_gcc.h **** return val; 1398:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1399:Drivers/CMSIS/Include/cmsis_gcc.h **** 1400:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1401:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 1402:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 1403:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated 1404:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31) 1405:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 1406:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1407:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat) 1408:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1409:Drivers/CMSIS/Include/cmsis_gcc.h **** if (sat <= 31U) 1410:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1411:Drivers/CMSIS/Include/cmsis_gcc.h **** const uint32_t max = ((1U << sat) - 1U); 1412:Drivers/CMSIS/Include/cmsis_gcc.h **** if (val > (int32_t)max) 1413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1414:Drivers/CMSIS/Include/cmsis_gcc.h **** return max; 1415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1416:Drivers/CMSIS/Include/cmsis_gcc.h **** else if (val < 0) 1417:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1418:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 1419:Drivers/CMSIS/Include/cmsis_gcc.h **** } ARM GAS /tmp/ccDUJO2W.s page 299 1420:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1421:Drivers/CMSIS/Include/cmsis_gcc.h **** return (uint32_t)val; 1422:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1423:Drivers/CMSIS/Include/cmsis_gcc.h **** 1424:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1426:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 1427:Drivers/CMSIS/Include/cmsis_gcc.h **** 1428:Drivers/CMSIS/Include/cmsis_gcc.h **** 1429:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1430:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1431:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1432:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (8 bit) 1433:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB instruction for 8 bit value. 1434:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1435:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1436:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1437:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr) 1438:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1439:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1440:Drivers/CMSIS/Include/cmsis_gcc.h **** 1441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) ); 1442:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1443:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1444:Drivers/CMSIS/Include/cmsis_gcc.h **** 1445:Drivers/CMSIS/Include/cmsis_gcc.h **** 1446:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1447:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (16 bit) 1448:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH instruction for 16 bit values. 1449:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1450:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1451:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1452:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr) 1453:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1454:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1455:Drivers/CMSIS/Include/cmsis_gcc.h **** 1456:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) ); 1457:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1458:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1459:Drivers/CMSIS/Include/cmsis_gcc.h **** 1460:Drivers/CMSIS/Include/cmsis_gcc.h **** 1461:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1462:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit) 1463:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values. 1464:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1465:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1466:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1467:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr) 1468:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1469:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1470:Drivers/CMSIS/Include/cmsis_gcc.h **** 1471:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) ); 1472:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1473:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1474:Drivers/CMSIS/Include/cmsis_gcc.h **** 1475:Drivers/CMSIS/Include/cmsis_gcc.h **** 1476:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS /tmp/ccDUJO2W.s page 300 1477:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (8 bit) 1478:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB instruction for 8 bit values. 1479:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1480:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1481:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1482:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr) 1483:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1484:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1485:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1486:Drivers/CMSIS/Include/cmsis_gcc.h **** 1487:Drivers/CMSIS/Include/cmsis_gcc.h **** 1488:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1489:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (16 bit) 1490:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH instruction for 16 bit values. 1491:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1492:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1493:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1494:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr) 1495:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1496:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1497:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1498:Drivers/CMSIS/Include/cmsis_gcc.h **** 1499:Drivers/CMSIS/Include/cmsis_gcc.h **** 1500:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1501:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release (32 bit) 1502:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL instruction for 32 bit values. 1503:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1504:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1505:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1506:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr) 1507:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1508:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 1509:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1510:Drivers/CMSIS/Include/cmsis_gcc.h **** 1511:Drivers/CMSIS/Include/cmsis_gcc.h **** 1512:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1513:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (8 bit) 1514:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAB exclusive instruction for 8 bit value. 1515:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1516:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1517:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1518:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) 1519:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1520:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1521:Drivers/CMSIS/Include/cmsis_gcc.h **** 1522:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) ); 1523:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 1524:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1525:Drivers/CMSIS/Include/cmsis_gcc.h **** 1526:Drivers/CMSIS/Include/cmsis_gcc.h **** 1527:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1528:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (16 bit) 1529:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDAH exclusive instruction for 16 bit values. 1530:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1531:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1532:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1533:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr) ARM GAS /tmp/ccDUJO2W.s page 301 1534:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1535:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1536:Drivers/CMSIS/Include/cmsis_gcc.h **** 1537:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) ); 1538:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); 1539:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1540:Drivers/CMSIS/Include/cmsis_gcc.h **** 1541:Drivers/CMSIS/Include/cmsis_gcc.h **** 1542:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1543:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire Exclusive (32 bit) 1544:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA exclusive instruction for 32 bit values. 1545:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1546:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1547:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1548:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr) 1549:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1550:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1551:Drivers/CMSIS/Include/cmsis_gcc.h **** 1552:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) ); 1553:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1554:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1555:Drivers/CMSIS/Include/cmsis_gcc.h **** 1556:Drivers/CMSIS/Include/cmsis_gcc.h **** 1557:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1558:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (8 bit) 1559:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLB exclusive instruction for 8 bit values. 1560:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1561:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1562:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1563:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1564:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1565:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr) 1566:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1567:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1568:Drivers/CMSIS/Include/cmsis_gcc.h **** 1569:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1570:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1571:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1572:Drivers/CMSIS/Include/cmsis_gcc.h **** 1573:Drivers/CMSIS/Include/cmsis_gcc.h **** 1574:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1575:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit) 1576:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values. 1577:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1578:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1579:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1580:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1581:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1582:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr) 1583:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1584:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1585:Drivers/CMSIS/Include/cmsis_gcc.h **** 1586:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1587:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1588:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1589:Drivers/CMSIS/Include/cmsis_gcc.h **** 1590:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccDUJO2W.s page 302 1591:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1592:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (32 bit) 1593:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STL exclusive instruction for 32 bit values. 1594:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1595:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1596:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1597:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1598:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1599:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr) 1600:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1601:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1602:Drivers/CMSIS/Include/cmsis_gcc.h **** 1603:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) ); 1604:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1605:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1606:Drivers/CMSIS/Include/cmsis_gcc.h **** 1607:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1608:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 1609:Drivers/CMSIS/Include/cmsis_gcc.h **** 1610:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 1611:Drivers/CMSIS/Include/cmsis_gcc.h **** 1612:Drivers/CMSIS/Include/cmsis_gcc.h **** 1613:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ################### Compiler specific Intrinsics ########################### */ 1614:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics 1615:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated SIMD instructions 1616:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 1617:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1618:Drivers/CMSIS/Include/cmsis_gcc.h **** 1619:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) 1620:Drivers/CMSIS/Include/cmsis_gcc.h **** 1621:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2) 1622:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1623:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1624:Drivers/CMSIS/Include/cmsis_gcc.h **** 1625:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1626:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1627:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1628:Drivers/CMSIS/Include/cmsis_gcc.h **** 1629:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2) 1630:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1631:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1632:Drivers/CMSIS/Include/cmsis_gcc.h **** 1633:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1634:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1635:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1636:Drivers/CMSIS/Include/cmsis_gcc.h **** 1637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2) 1638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1639:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1640:Drivers/CMSIS/Include/cmsis_gcc.h **** 1641:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1642:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1643:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1644:Drivers/CMSIS/Include/cmsis_gcc.h **** 1645:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2) 1646:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1647:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/ccDUJO2W.s page 303 1648:Drivers/CMSIS/Include/cmsis_gcc.h **** 1649:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1650:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1651:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1652:Drivers/CMSIS/Include/cmsis_gcc.h **** 1653:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2) 1654:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1655:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1656:Drivers/CMSIS/Include/cmsis_gcc.h **** 1657:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1658:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1659:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1660:Drivers/CMSIS/Include/cmsis_gcc.h **** 1661:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2) 1662:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1663:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1664:Drivers/CMSIS/Include/cmsis_gcc.h **** 1665:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1666:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1667:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1668:Drivers/CMSIS/Include/cmsis_gcc.h **** 1669:Drivers/CMSIS/Include/cmsis_gcc.h **** 1670:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2) 1671:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1672:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1673:Drivers/CMSIS/Include/cmsis_gcc.h **** 1674:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1675:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1676:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1677:Drivers/CMSIS/Include/cmsis_gcc.h **** 1678:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2) 1679:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1680:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1681:Drivers/CMSIS/Include/cmsis_gcc.h **** 1682:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1683:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1684:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1685:Drivers/CMSIS/Include/cmsis_gcc.h **** 1686:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2) 1687:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1688:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1689:Drivers/CMSIS/Include/cmsis_gcc.h **** 1690:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1691:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1692:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1693:Drivers/CMSIS/Include/cmsis_gcc.h **** 1694:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2) 1695:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1696:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1697:Drivers/CMSIS/Include/cmsis_gcc.h **** 1698:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1699:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1700:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1701:Drivers/CMSIS/Include/cmsis_gcc.h **** 1702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2) 1703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1704:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/ccDUJO2W.s page 304 1705:Drivers/CMSIS/Include/cmsis_gcc.h **** 1706:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1707:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1708:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1709:Drivers/CMSIS/Include/cmsis_gcc.h **** 1710:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2) 1711:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1712:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1713:Drivers/CMSIS/Include/cmsis_gcc.h **** 1714:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1715:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1716:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1717:Drivers/CMSIS/Include/cmsis_gcc.h **** 1718:Drivers/CMSIS/Include/cmsis_gcc.h **** 1719:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2) 1720:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1721:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1722:Drivers/CMSIS/Include/cmsis_gcc.h **** 1723:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1724:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1725:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1726:Drivers/CMSIS/Include/cmsis_gcc.h **** 1727:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2) 1728:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1729:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1730:Drivers/CMSIS/Include/cmsis_gcc.h **** 1731:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1732:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1733:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1734:Drivers/CMSIS/Include/cmsis_gcc.h **** 1735:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2) 1736:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1737:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1738:Drivers/CMSIS/Include/cmsis_gcc.h **** 1739:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1740:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1741:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1742:Drivers/CMSIS/Include/cmsis_gcc.h **** 1743:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2) 1744:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1745:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1746:Drivers/CMSIS/Include/cmsis_gcc.h **** 1747:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1748:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1749:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1750:Drivers/CMSIS/Include/cmsis_gcc.h **** 1751:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2) 1752:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1753:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1754:Drivers/CMSIS/Include/cmsis_gcc.h **** 1755:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1756:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1757:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1758:Drivers/CMSIS/Include/cmsis_gcc.h **** 1759:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2) 1760:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1761:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS /tmp/ccDUJO2W.s page 305 1762:Drivers/CMSIS/Include/cmsis_gcc.h **** 1763:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1764:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1765:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1766:Drivers/CMSIS/Include/cmsis_gcc.h **** 1767:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2) 1768:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1769:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1770:Drivers/CMSIS/Include/cmsis_gcc.h **** 1771:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1772:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1773:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1774:Drivers/CMSIS/Include/cmsis_gcc.h **** 1775:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2) 1776:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1777:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1778:Drivers/CMSIS/Include/cmsis_gcc.h **** 1779:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1780:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1781:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1782:Drivers/CMSIS/Include/cmsis_gcc.h **** 1783:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2) 1784:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1785:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1786:Drivers/CMSIS/Include/cmsis_gcc.h **** 1787:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1788:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1789:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1790:Drivers/CMSIS/Include/cmsis_gcc.h **** 1791:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2) 1792:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1793:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1794:Drivers/CMSIS/Include/cmsis_gcc.h **** 1795:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1796:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1797:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1798:Drivers/CMSIS/Include/cmsis_gcc.h **** 1799:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2) 1800:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1801:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1802:Drivers/CMSIS/Include/cmsis_gcc.h **** 1803:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1804:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1805:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1806:Drivers/CMSIS/Include/cmsis_gcc.h **** 1807:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2) 1808:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1809:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1810:Drivers/CMSIS/Include/cmsis_gcc.h **** 1811:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1812:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1813:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1814:Drivers/CMSIS/Include/cmsis_gcc.h **** 1815:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2) 1816:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1817:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1818:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS /tmp/ccDUJO2W.s page 306 1819:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1820:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1821:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1822:Drivers/CMSIS/Include/cmsis_gcc.h **** 1823:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2) 1824:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1825:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1826:Drivers/CMSIS/Include/cmsis_gcc.h **** 1827:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1828:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1829:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1830:Drivers/CMSIS/Include/cmsis_gcc.h **** 1831:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2) 1832:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1833:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1834:Drivers/CMSIS/Include/cmsis_gcc.h **** 1835:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1836:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1837:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1838:Drivers/CMSIS/Include/cmsis_gcc.h **** 1839:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2) 1840:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1841:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1842:Drivers/CMSIS/Include/cmsis_gcc.h **** 1843:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1844:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1845:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1846:Drivers/CMSIS/Include/cmsis_gcc.h **** 1847:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2) 1848:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1849:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1850:Drivers/CMSIS/Include/cmsis_gcc.h **** 1851:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1852:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1853:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1854:Drivers/CMSIS/Include/cmsis_gcc.h **** 1855:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2) 1856:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1857:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1858:Drivers/CMSIS/Include/cmsis_gcc.h **** 1859:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1860:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1861:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1862:Drivers/CMSIS/Include/cmsis_gcc.h **** 1863:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2) 1864:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1865:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1866:Drivers/CMSIS/Include/cmsis_gcc.h **** 1867:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1868:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1870:Drivers/CMSIS/Include/cmsis_gcc.h **** 1871:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2) 1872:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1873:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1874:Drivers/CMSIS/Include/cmsis_gcc.h **** 1875:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); ARM GAS /tmp/ccDUJO2W.s page 307 1876:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1877:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1878:Drivers/CMSIS/Include/cmsis_gcc.h **** 1879:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2) 1880:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1881:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1882:Drivers/CMSIS/Include/cmsis_gcc.h **** 1883:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1884:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1885:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1886:Drivers/CMSIS/Include/cmsis_gcc.h **** 1887:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2) 1888:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1889:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1890:Drivers/CMSIS/Include/cmsis_gcc.h **** 1891:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1892:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1893:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1894:Drivers/CMSIS/Include/cmsis_gcc.h **** 1895:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2) 1896:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1897:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1898:Drivers/CMSIS/Include/cmsis_gcc.h **** 1899:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1900:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1901:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1902:Drivers/CMSIS/Include/cmsis_gcc.h **** 1903:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2) 1904:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1906:Drivers/CMSIS/Include/cmsis_gcc.h **** 1907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1908:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1909:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1910:Drivers/CMSIS/Include/cmsis_gcc.h **** 1911:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2) 1912:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1913:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1914:Drivers/CMSIS/Include/cmsis_gcc.h **** 1915:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1916:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1917:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1918:Drivers/CMSIS/Include/cmsis_gcc.h **** 1919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3) 1920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1922:Drivers/CMSIS/Include/cmsis_gcc.h **** 1923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1924:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1926:Drivers/CMSIS/Include/cmsis_gcc.h **** 1927:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SSAT16(ARG1,ARG2) \ 1928:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1929:Drivers/CMSIS/Include/cmsis_gcc.h **** int32_t __RES, __ARG1 = (ARG1); \ 1930:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1931:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1932:Drivers/CMSIS/Include/cmsis_gcc.h **** }) ARM GAS /tmp/ccDUJO2W.s page 308 1933:Drivers/CMSIS/Include/cmsis_gcc.h **** 1934:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USAT16(ARG1,ARG2) \ 1935:Drivers/CMSIS/Include/cmsis_gcc.h **** ({ \ 1936:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t __RES, __ARG1 = (ARG1); \ 1937:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \ 1938:Drivers/CMSIS/Include/cmsis_gcc.h **** __RES; \ 1939:Drivers/CMSIS/Include/cmsis_gcc.h **** }) 1940:Drivers/CMSIS/Include/cmsis_gcc.h **** 1941:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1) 1942:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1943:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1944:Drivers/CMSIS/Include/cmsis_gcc.h **** 1945:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1946:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1947:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1948:Drivers/CMSIS/Include/cmsis_gcc.h **** 1949:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2) 1950:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1951:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1952:Drivers/CMSIS/Include/cmsis_gcc.h **** 1953:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1954:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1955:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1956:Drivers/CMSIS/Include/cmsis_gcc.h **** 1957:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1) 1958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1959:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1960:Drivers/CMSIS/Include/cmsis_gcc.h **** 1961:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1)); 1962:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1963:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1964:Drivers/CMSIS/Include/cmsis_gcc.h **** 1965:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) 1966:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1967:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1968:Drivers/CMSIS/Include/cmsis_gcc.h **** 1969:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1970:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1971:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1972:Drivers/CMSIS/Include/cmsis_gcc.h **** 1973:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2) 1974:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1975:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1976:Drivers/CMSIS/Include/cmsis_gcc.h **** 1977:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1978:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1979:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1980:Drivers/CMSIS/Include/cmsis_gcc.h **** 1981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2) 1982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1984:Drivers/CMSIS/Include/cmsis_gcc.h **** 1985:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) ); 1986:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1987:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1988:Drivers/CMSIS/Include/cmsis_gcc.h **** 1989:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3) ARM GAS /tmp/ccDUJO2W.s page 309 1990:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1991:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1992:Drivers/CMSIS/Include/cmsis_gcc.h **** 1993:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 1994:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1995:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1996:Drivers/CMSIS/Include/cmsis_gcc.h **** 1997:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3) 1998:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1999:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 2000:Drivers/CMSIS/Include/cmsis_gcc.h **** 2001:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) ); 2002:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 2003:Drivers/CMSIS/Include/cmsis_gcc.h **** } 2004:Drivers/CMSIS/Include/cmsis_gcc.h **** 2005:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc) 2006:Drivers/CMSIS/Include/cmsis_gcc.h **** { 2007:Drivers/CMSIS/Include/cmsis_gcc.h **** union llreg_u{ 2008:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t w32[2]; 2009:Drivers/CMSIS/Include/cmsis_gcc.h **** uint64_t w64; 2010:Drivers/CMSIS/Include/cmsis_gcc.h **** } llr; 2011:Drivers/CMSIS/Include/cmsis_gcc.h **** llr.w64 = acc; 2012:Drivers/CMSIS/Include/cmsis_gcc.h **** 2013:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ARMEB__ /* Little endian */ 2014:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (o 2725 .loc 33 2014 0 2726 .syntax unified 2727 @ 2014 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 2728 001a C3FBC301 smlald r0, r1, r3, r3 2729 @ 0 "" 2 2730 .LVL328: 2731 .thumb 2732 .syntax unified 2733 .LBE56: 2734 .LBE55: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 2735 .loc 32 198 0 2736 001e 013C subs r4, r4, #1 2737 .LVL329: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #if defined (ARM_MATH_DSP) 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares = __SMLALD(in, in, sumOfSquares); 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #else 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sumOfSquares += (in * in); 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** #endif /* #if defined (ARM_MATH_DSP) */ 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute sum and store result in a temporary variable, sum. */ 211:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** sum += in; 2738 .loc 32 211 0 2739 0020 1D44 add r5, r5, r3 2740 .LVL330: 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** { 2741 .loc 32 198 0 2742 0022 F8D1 bne .L274 212:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 213:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Decrement loop counter */ 214:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** blkCnt--; 215:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } ARM GAS /tmp/ccDUJO2W.s page 310 216:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 217:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U)); 2743 .loc 32 218 0 2744 0024 06F1FF39 add r9, r6, #-1 2745 .LVL331: 2746 0028 4A46 mov r2, r9 2747 .LVL332: 2748 002a 2346 mov r3, r4 2749 .LVL333: 2750 002c FFF7FEFF bl __aeabi_ldivmod 2751 .LVL334: 219:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 220:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* Compute square of mean */ 221:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U))); 2752 .loc 32 221 0 2753 0030 06FB09F2 mul r2, r6, r9 218:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 2754 .loc 32 218 0 2755 0034 8046 mov r8, r0 2756 .loc 32 221 0 2757 0036 2346 mov r3, r4 2758 0038 85FB0501 smull r0, r1, r5, r5 2759 003c FFF7FEFF bl __aeabi_ldivmod 2760 .LVL335: 222:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** 223:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** /* mean of squares minus the square of mean. */ 224:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** *pResult = (meanOfSquares - squareOfMean) >> 15U; 2761 .loc 32 224 0 2762 0040 A8EB0000 sub r0, r8, r0 2763 0044 C013 asrs r0, r0, #15 2764 0046 3880 strh r0, [r7] @ movhi 225:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** } 2765 .loc 32 225 0 2766 0048 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} 2767 .LVL336: 2768 .L279: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c **** return; 2769 .loc 32 140 0 2770 004c 0023 movs r3, #0 2771 004e 1380 strh r3, [r2] @ movhi 2772 .loc 32 225 0 2773 0050 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} 2774 .cfi_endproc 2775 .LFE178: 2777 .section .text.arm_var_q31,"ax",%progbits 2778 .align 1 2779 .p2align 2,,3 2780 .global arm_var_q31 2781 .syntax unified 2782 .thumb 2783 .thumb_func 2784 .fpu fpv4-sp-d16 2786 arm_var_q31: 2787 .LFB179: 2788 .file 34 "Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c" 1:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* ---------------------------------------------------------------------- ARM GAS /tmp/ccDUJO2W.s page 311 2:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Project: CMSIS DSP Library 3:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Title: arm_var_q31.c 4:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Description: Variance of an array of Q31 type 5:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * 6:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * $Date: 18. March 2019 7:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * $Revision: V1.6.0 8:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * 9:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Target Processor: Cortex-M cores 10:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * -------------------------------------------------------------------- */ 11:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* 12:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. 13:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * 14:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * SPDX-License-Identifier: Apache-2.0 15:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * 16:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Licensed under the Apache License, Version 2.0 (the License); you may 17:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * not use this file except in compliance with the License. 18:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * You may obtain a copy of the License at 19:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * 20:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * www.apache.org/licenses/LICENSE-2.0 21:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * 22:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * Unless required by applicable law or agreed to in writing, software 23:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 24:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 25:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * See the License for the specific language governing permissions and 26:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * limitations under the License. 27:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** */ 28:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 29:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** #include "arm_math.h" 30:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 31:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /** 32:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @ingroup groupStats 33:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** */ 34:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 35:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /** 36:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @addtogroup variance 37:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @{ 38:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** */ 39:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 40:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /** 41:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @brief Variance of the elements of a Q31 vector. 42:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @param[in] pSrc points to the input vector 43:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @param[in] blockSize number of samples in input vector 44:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @param[out] pResult variance value returned here 45:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @return none 46:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 47:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** @par Scaling and Overflow Behavior 48:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** The function is implemented using an internal 64-bit accumulator. 49:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** The input is represented in 1.31 format, which is then downshifted by 8 bits 50:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** which yields 1.23, and intermediate multiplication yields a 2.46 format. 51:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** The accumulator maintains full precision of the intermediate multiplication resu 52:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** and as a consequence has only 16 guard bits. 53:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** There is no saturation on intermediate additions. 54:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** If the accumulator overflows it wraps around and distorts the result. 55:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** In order to avoid overflows completely the input signal must be scaled down by 56:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** log2(blockSize)-8 bits, as a total of blockSize additions are performed internal 57:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** After division, internal variables should be Q18.46 58:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 forma ARM GAS /tmp/ccDUJO2W.s page 312 59:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** */ 60:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** #if defined(ARM_MATH_MVEI) 61:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** void arm_var_q31( 62:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** const q31_t * pSrc, 63:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** uint32_t blockSize, 64:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q31_t * pResult) 65:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 66:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** uint32_t blkCnt; /* loop counters */ 67:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q31x4_t vecSrc; 68:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t sumOfSquares = 0LL; 69:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t meanOfSquares, squareOfMean; /* square of mean and mean of square */ 70:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t sum = 0LL; 71:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q31_t in; 72:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 73:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** if (blockSize <= 1U) { 74:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** *pResult = 0; 75:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** return; 76:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 77:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 78:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 79:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute 4 outputs at a time */ 80:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt = blockSize >> 2U; 81:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** while (blkCnt > 0U) 82:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 83:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** vecSrc = vldrwq_s32(pSrc); 84:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */ 85:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute Sum of squares of the input samples 86:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * and then store the result in a temporary variable, sumOfSquares. */ 87:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 88:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* downscale */ 89:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** vecSrc = vshrq(vecSrc, 8); 90:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares = vmlaldavaq(sumOfSquares, vecSrc, vecSrc); 91:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum = vaddlvaq(sum, vecSrc); 92:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 93:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt --; 94:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** pSrc += 4; 95:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 96:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 97:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 98:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* 99:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * tail 100:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** */ 101:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt = blockSize & 0x3; 102:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** while (blkCnt > 0U) 103:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 104:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 105:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 106:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 107:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** in = *pSrc++ >> 8U; 108:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 109:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 110:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 111:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum += in; 112:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 113:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Decrement loop counter */ 114:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt--; 115:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } ARM GAS /tmp/ccDUJO2W.s page 313 116:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 117:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute Mean of squares of the input samples 118:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** * and then store the result in a temporary variable, meanOfSquares. */ 119:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** meanOfSquares = sumOfSquares / (q63_t) (blockSize - 1U); 120:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 121:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute square of mean */ 122:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** squareOfMean = sum * sum / (q63_t) (blockSize * (blockSize - 1U)); 123:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 124:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute standard deviation and then store the result to the destination */ 125:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** *pResult = asrl(meanOfSquares - squareOfMean, 15U); 126:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 127:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** #else 128:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** void arm_var_q31( 129:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** const q31_t * pSrc, 130:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** uint32_t blockSize, 131:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q31_t * pResult) 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 2789 .loc 34 132 0 2790 .cfi_startproc 2791 @ args = 0, pretend = 0, frame = 0 2792 @ frame_needed = 0, uses_anonymous_args = 0 2793 .LVL337: 133:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** uint32_t blkCnt; /* Loop counter */ 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t sum = 0; /* Temporary result storage */ 135:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t sumOfSquares = 0; /* Sum of squares */ 137:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q31_t in; /* Temporary variable to store input value * 138:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 139:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** if (blockSize <= 1U) 2794 .loc 34 139 0 2795 0000 0129 cmp r1, #1 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** uint32_t blkCnt; /* Loop counter */ 2796 .loc 34 132 0 2797 0002 2DE9F84F push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr} 2798 .LCFI90: 2799 .cfi_def_cfa_offset 40 2800 .cfi_offset 3, -40 2801 .cfi_offset 4, -36 2802 .cfi_offset 5, -32 2803 .cfi_offset 6, -28 2804 .cfi_offset 7, -24 2805 .cfi_offset 8, -20 2806 .cfi_offset 9, -16 2807 .cfi_offset 10, -12 2808 .cfi_offset 11, -8 2809 .cfi_offset 14, -4 132:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** uint32_t blkCnt; /* Loop counter */ 2810 .loc 34 132 0 2811 0006 9246 mov r10, r2 2812 .loc 34 139 0 2813 0008 31D9 bls .L286 136:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q31_t in; /* Temporary variable to store input value * 2814 .loc 34 136 0 2815 000a 4FF00008 mov r8, #0 2816 000e 4FF00009 mov r9, #0 2817 0012 0F46 mov r7, r1 134:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** q63_t meanOfSquares, squareOfMean; /* Square of mean and mean of square */ ARM GAS /tmp/ccDUJO2W.s page 314 2818 .loc 34 134 0 2819 0014 4446 mov r4, r8 2820 0016 4D46 mov r5, r9 2821 0018 0E46 mov r6, r1 2822 .LVL338: 2823 .L281: 140:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** *pResult = 0; 142:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** return; 143:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 144:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 145:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** #if defined (ARM_MATH_LOOPUNROLL) 146:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 147:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Loop unrolling: Compute 4 outputs at a time */ 148:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt = blockSize >> 2U; 149:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 150:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** while (blkCnt > 0U) 151:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 152:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 153:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ 154:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 155:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** in = *pSrc++ >> 8U; 156:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 157:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 158:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 159:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum += in; 160:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 161:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** in = *pSrc++ >> 8U; 162:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 163:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum += in; 164:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 165:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** in = *pSrc++ >> 8U; 166:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 167:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum += in; 168:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 169:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** in = *pSrc++ >> 8U; 170:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 171:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum += in; 172:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 173:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Decrement loop counter */ 174:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt--; 175:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 176:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 177:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Loop unrolling: Compute remaining outputs */ 178:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt = blockSize % 0x4U; 179:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 180:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** #else 181:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 182:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Initialize blkCnt with number of samples */ 183:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt = blockSize; 184:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 185:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** #endif /* #if defined (ARM_MATH_LOOPUNROLL) */ 186:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** while (blkCnt > 0U) 188:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 189:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */ 190:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* C = A[0] + A[1] + ... + A[blockSize-1] */ ARM GAS /tmp/ccDUJO2W.s page 315 191:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 192:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** in = *pSrc++ >> 8U; 2824 .loc 34 192 0 2825 001a 50F8043B ldr r3, [r0], #4 2826 .LVL339: 2827 001e 1B12 asrs r3, r3, #8 2828 .LVL340: 193:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */ 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sumOfSquares += ((q63_t) (in) * (in)); 195:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 196:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** sum += in; 2829 .loc 34 196 0 2830 0020 E418 adds r4, r4, r3 2831 .LVL341: 2832 0022 45EBE375 adc r5, r5, r3, asr #31 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 2833 .loc 34 187 0 2834 0026 013E subs r6, r6, #1 2835 .LVL342: 194:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute sum and store result in a temporary variable, sum. */ 2836 .loc 34 194 0 2837 0028 C3FB0389 smlal r8, r9, r3, r3 2838 .LVL343: 187:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** { 2839 .loc 34 187 0 2840 002c F5D1 bne .L281 197:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 198:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Decrement loop counter */ 199:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** blkCnt--; 200:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 201:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 202:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */ 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U)); 2841 .loc 34 203 0 2842 002e 07F1FF3B add fp, r7, #-1 2843 .LVL344: 2844 0032 4046 mov r0, r8 2845 .LVL345: 2846 0034 4946 mov r1, r9 2847 .LVL346: 2848 0036 5A46 mov r2, fp 2849 .LVL347: 2850 0038 3346 mov r3, r6 2851 .LVL348: 2852 003a FFF7FEFF bl __aeabi_ldivmod 2853 .LVL349: 204:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 205:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute square of mean */ 206:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U))); 2854 .loc 34 206 0 2855 003e 04FB05F3 mul r3, r4, r5 203:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 2856 .loc 34 203 0 2857 0042 8046 mov r8, r0 2858 .LVL350: 2859 0044 8946 mov r9, r1 2860 .loc 34 206 0 ARM GAS /tmp/ccDUJO2W.s page 316 2861 0046 A4FB0401 umull r0, r1, r4, r4 2862 004a 01EB4301 add r1, r1, r3, lsl #1 2863 004e 07FB0BF2 mul r2, r7, fp 2864 0052 3346 mov r3, r6 2865 0054 FFF7FEFF bl __aeabi_ldivmod 2866 .LVL351: 207:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** 208:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** /* Compute variance and store result in destination */ 209:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** *pResult = (meanOfSquares - squareOfMean) >> 15U; 2867 .loc 34 209 0 2868 0058 B8EB0004 subs r4, r8, r0 2869 .LVL352: 2870 005c 69EB0105 sbc r5, r9, r1 2871 0060 E30B lsrs r3, r4, #15 2872 0062 43EA4543 orr r3, r3, r5, lsl #17 2873 0066 CAF80030 str r3, [r10] 210:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** } 2874 .loc 34 210 0 2875 006a BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 2876 .LVL353: 2877 .L286: 141:Middlewares/Third_Party/ARM_CMSIS/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c **** return; 2878 .loc 34 141 0 2879 006e 0023 movs r3, #0 2880 0070 1360 str r3, [r2] 2881 .loc 34 210 0 2882 0072 BDE8F88F pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc} 2883 .cfi_endproc 2884 .LFE179: 2886 0076 00BF .text 2887 .Letext0: 2888 .file 35 "/usr/include/newlib/machine/_default_types.h" 2889 .file 36 "/usr/include/newlib/sys/_stdint.h" 2890 .file 37 "/usr/include/newlib/sys/lock.h" 2891 .file 38 "/usr/include/newlib/sys/_types.h" 2892 .file 39 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" 2893 .file 40 "/usr/include/newlib/sys/reent.h" 2894 .file 41 "/usr/include/newlib/math.h" ARM GAS /tmp/ccDUJO2W.s page 317 DEFINED SYMBOLS *ABS*:0000000000000000 StatisticsFunctions.c /tmp/ccDUJO2W.s:16 .text.arm_entropy_f32:0000000000000000 $t /tmp/ccDUJO2W.s:24 .text.arm_entropy_f32:0000000000000000 arm_entropy_f32 /tmp/ccDUJO2W.s:92 .text.arm_entropy_f32:0000000000000034 $d /tmp/ccDUJO2W.s:99 .text.arm_entropy_f64:0000000000000000 $t /tmp/ccDUJO2W.s:107 .text.arm_entropy_f64:0000000000000000 arm_entropy_f64 /tmp/ccDUJO2W.s:192 .text.arm_kullback_leibler_f32:0000000000000000 $t /tmp/ccDUJO2W.s:200 .text.arm_kullback_leibler_f32:0000000000000000 arm_kullback_leibler_f32 /tmp/ccDUJO2W.s:271 .text.arm_kullback_leibler_f32:000000000000003c $d /tmp/ccDUJO2W.s:277 .text.arm_kullback_leibler_f64:0000000000000000 $t /tmp/ccDUJO2W.s:285 .text.arm_kullback_leibler_f64:0000000000000000 arm_kullback_leibler_f64 /tmp/ccDUJO2W.s:377 .text.arm_logsumexp_dot_prod_f32:0000000000000000 $t /tmp/ccDUJO2W.s:385 .text.arm_logsumexp_dot_prod_f32:0000000000000000 arm_logsumexp_dot_prod_f32 /tmp/ccDUJO2W.s:504 .text.arm_logsumexp_dot_prod_f32:000000000000007c $d /tmp/ccDUJO2W.s:511 .text.arm_logsumexp_f32:0000000000000000 $t /tmp/ccDUJO2W.s:519 .text.arm_logsumexp_f32:0000000000000000 arm_logsumexp_f32 /tmp/ccDUJO2W.s:617 .text.arm_logsumexp_f32:0000000000000070 $d /tmp/ccDUJO2W.s:622 .text.arm_max_f32:0000000000000000 $t /tmp/ccDUJO2W.s:630 .text.arm_max_f32:0000000000000000 arm_max_f32 /tmp/ccDUJO2W.s:712 .text.arm_max_q15:0000000000000000 $t /tmp/ccDUJO2W.s:720 .text.arm_max_q15:0000000000000000 arm_max_q15 /tmp/ccDUJO2W.s:808 .text.arm_max_q31:0000000000000000 $t /tmp/ccDUJO2W.s:816 .text.arm_max_q31:0000000000000000 arm_max_q31 /tmp/ccDUJO2W.s:904 .text.arm_max_q7:0000000000000000 $t /tmp/ccDUJO2W.s:912 .text.arm_max_q7:0000000000000000 arm_max_q7 /tmp/ccDUJO2W.s:997 .text.arm_max_no_idx_f32:0000000000000000 $t /tmp/ccDUJO2W.s:1005 .text.arm_max_no_idx_f32:0000000000000000 arm_max_no_idx_f32 /tmp/ccDUJO2W.s:1039 .text.arm_max_no_idx_f32:0000000000000024 $d /tmp/ccDUJO2W.s:1044 .text.arm_mean_f32:0000000000000000 $t /tmp/ccDUJO2W.s:1052 .text.arm_mean_f32:0000000000000000 arm_mean_f32 /tmp/ccDUJO2W.s:1108 .text.arm_mean_f32:0000000000000038 $d /tmp/ccDUJO2W.s:1113 .text.arm_mean_q15:0000000000000000 $t /tmp/ccDUJO2W.s:1121 .text.arm_mean_q15:0000000000000000 arm_mean_q15 /tmp/ccDUJO2W.s:1176 .text.arm_mean_q31:0000000000000000 $t /tmp/ccDUJO2W.s:1184 .text.arm_mean_q31:0000000000000000 arm_mean_q31 /tmp/ccDUJO2W.s:1245 .text.arm_mean_q7:0000000000000000 $t /tmp/ccDUJO2W.s:1253 .text.arm_mean_q7:0000000000000000 arm_mean_q7 /tmp/ccDUJO2W.s:1306 .text.arm_min_f32:0000000000000000 $t /tmp/ccDUJO2W.s:1314 .text.arm_min_f32:0000000000000000 arm_min_f32 /tmp/ccDUJO2W.s:1396 .text.arm_min_q15:0000000000000000 $t /tmp/ccDUJO2W.s:1404 .text.arm_min_q15:0000000000000000 arm_min_q15 /tmp/ccDUJO2W.s:1492 .text.arm_min_q31:0000000000000000 $t /tmp/ccDUJO2W.s:1500 .text.arm_min_q31:0000000000000000 arm_min_q31 /tmp/ccDUJO2W.s:1588 .text.arm_min_q7:0000000000000000 $t /tmp/ccDUJO2W.s:1596 .text.arm_min_q7:0000000000000000 arm_min_q7 /tmp/ccDUJO2W.s:1681 .text.arm_power_f32:0000000000000000 $t /tmp/ccDUJO2W.s:1689 .text.arm_power_f32:0000000000000000 arm_power_f32 /tmp/ccDUJO2W.s:1724 .text.arm_power_f32:0000000000000018 $d /tmp/ccDUJO2W.s:1729 .text.arm_power_q15:0000000000000000 $t /tmp/ccDUJO2W.s:1737 .text.arm_power_q15:0000000000000000 arm_power_q15 /tmp/ccDUJO2W.s:1784 .text.arm_power_q31:0000000000000000 $t /tmp/ccDUJO2W.s:1792 .text.arm_power_q31:0000000000000000 arm_power_q31 /tmp/ccDUJO2W.s:1853 .text.arm_power_q7:0000000000000000 $t /tmp/ccDUJO2W.s:1861 .text.arm_power_q7:0000000000000000 arm_power_q7 /tmp/ccDUJO2W.s:1909 .text.arm_rms_f32:0000000000000000 $t /tmp/ccDUJO2W.s:1917 .text.arm_rms_f32:0000000000000000 arm_rms_f32 ARM GAS /tmp/ccDUJO2W.s page 318 /tmp/ccDUJO2W.s:1994 .text.arm_rms_f32:0000000000000048 $d /tmp/ccDUJO2W.s:1999 .text.arm_rms_q15:0000000000000000 $t /tmp/ccDUJO2W.s:2007 .text.arm_rms_q15:0000000000000000 arm_rms_q15 /tmp/ccDUJO2W.s:2084 .text.arm_rms_q31:0000000000000000 $t /tmp/ccDUJO2W.s:2092 .text.arm_rms_q31:0000000000000000 arm_rms_q31 /tmp/ccDUJO2W.s:2185 .text.arm_std_f32:0000000000000000 $t /tmp/ccDUJO2W.s:2193 .text.arm_std_f32:0000000000000000 arm_std_f32 /tmp/ccDUJO2W.s:2310 .text.arm_std_f32:0000000000000070 $d /tmp/ccDUJO2W.s:2315 .text.arm_std_q15:0000000000000000 $t /tmp/ccDUJO2W.s:2323 .text.arm_std_q15:0000000000000000 arm_std_q15 /tmp/ccDUJO2W.s:2441 .text.arm_std_q31:0000000000000000 $t /tmp/ccDUJO2W.s:2449 .text.arm_std_q31:0000000000000000 arm_std_q31 /tmp/ccDUJO2W.s:2568 .text.arm_var_f32:0000000000000000 $t /tmp/ccDUJO2W.s:2576 .text.arm_var_f32:0000000000000000 arm_var_f32 /tmp/ccDUJO2W.s:2668 .text.arm_var_f32:0000000000000058 $d /tmp/ccDUJO2W.s:2673 .text.arm_var_q15:0000000000000000 $t /tmp/ccDUJO2W.s:2681 .text.arm_var_q15:0000000000000000 arm_var_q15 /tmp/ccDUJO2W.s:2778 .text.arm_var_q31:0000000000000000 $t /tmp/ccDUJO2W.s:2786 .text.arm_var_q31:0000000000000000 arm_var_q31 UNDEFINED SYMBOLS logf __aeabi_dmul __aeabi_dadd log __aeabi_ddiv arm_add_f32 expf __aeabi_ldivmod arm_sqrt_q15 __aeabi_uldivmod arm_sqrt_q31