ARM GAS /tmp/cc2grSJV.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 23, 1 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 2 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "stm32g4xx_hal_rcc.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.HAL_RCC_DeInit,"ax",%progbits 16 .align 1 17 .p2align 2,,3 18 .global HAL_RCC_DeInit 19 .syntax unified 20 .thumb 21 .thumb_func 22 .fpu fpv4-sp-d16 24 HAL_RCC_DeInit: 25 .LFB329: 26 .file 1 "Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c" 1:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 2:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ****************************************************************************** 3:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @file stm32g4xx_hal_rcc.c 4:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @author MCD Application Team 5:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief RCC HAL module driver. 6:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: 8:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * + Peripheral Control functions 10:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 11:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** @verbatim 12:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ============================================================================== 13:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ##### RCC specific features ##### 14:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ============================================================================== 15:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** [..] 16:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** After reset the device is running from High Speed Internal oscillator 17:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (16 MHz) with Flash 0 wait state. Flash prefetch buffer, D-Cache 18:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** and I-Cache are disabled, and all peripherals are off except internal 19:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SRAM, Flash and JTAG. 20:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 21:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHBs) and Low speed (APBs) buses: 22:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed. 23:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. 24:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) All GPIOs are in analog mode, except the JTAG pins which 25:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** are assigned to be used for debug purpose. 26:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 27:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** [..] 28:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** Once the device started from reset, the user application has to: 29:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock 30:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (if the application needs higher frequency/performance) 31:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings 32:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers ARM GAS /tmp/cc2grSJV.s page 2 33:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used 34:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals which clocks are not 35:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** derived from the System clock (USB, RNG, USART, LPUART, FDCAN, some TIMERs, 36:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** UCPD, I2S, I2C, LPTIM, ADC, QSPI) 37:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 38:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** @endverbatim 39:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ****************************************************************************** 40:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @attention 41:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 42:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** *

© Copyright (c) 2019 STMicroelectronics. 43:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * All rights reserved.

44:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 45:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * This software component is licensed by ST under BSD 3-Clause license, 46:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * the "License"; You may not use this file except in compliance with the 47:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * License. You may obtain a copy of the License at: 48:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * opensource.org/licenses/BSD-3-Clause 49:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 50:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ****************************************************************************** 51:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 52:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 53:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ 54:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #include "stm32g4xx_hal.h" 55:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 56:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @addtogroup STM32G4xx_HAL_Driver 57:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 58:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 59:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 60:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC RCC 61:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief RCC HAL module driver 62:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 63:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 64:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 65:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED 66:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 67:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ 68:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ 69:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants 70:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 71:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 72:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define HSE_TIMEOUT_VALUE HSE_STARTUP_TIMEOUT 73:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define HSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ 74:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define LSI_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ 75:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define HSI48_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ 76:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define PLL_TIMEOUT_VALUE 2U /* 2 ms (minimum Tick + 1) */ 77:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define CLOCKSWITCH_TIMEOUT_VALUE 5000U /* 5 s */ 78:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 79:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @} 80:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 81:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 82:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ 83:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros 84:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 85:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 86:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() 87:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA 88:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 89:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ARM GAS /tmp/cc2grSJV.s page 3 90:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** #define RCC_PLL_OSCSOURCE_CONFIG(__HAL_RCC_PLLSOURCE__) \ 91:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, (__HAL_RCC_PLLSOURCE__))) 92:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 93:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @} 94:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 95:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 96:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ 97:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 98:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 99:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC_Private_Functions RCC Private Functions 100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** static uint32_t RCC_GetSysClockFreqFromPLLSource(void); 103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @} 105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Exported functions --------------------------------------------------------*/ 108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions 110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Initialization and Configuration functions 115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** @verbatim 117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** =============================================================================== 118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### 119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** =============================================================================== 120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** [..] 121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** This section provides functions allowing to configure the internal and external oscillators 122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, AHB, APB1 123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** and APB2). 124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration 126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) HSI (high-speed internal): 16 MHz factory-trimmed RC used directly or through 127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** the PLL as System clock source. 128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) LSI (low-speed internal): 32 KHz low consumption RC used as IWDG and/or RTC 130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** clock source. 131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) HSE (high-speed external): 4 to 48 MHz crystal oscillator used directly or 133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** through the PLL as System clock source. Can be used also optionally as RTC clock sourc 134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) LSE (low-speed external): 32.768 KHz oscillator used optionally as RTC clock source. 136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) PLL (clocked by HSI, HSE) providing up to three independent output clocks: 138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 170 MHz). 139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB (48 MHz), 140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** the QSPI (<= 48 MHz), the FDCAN, the SAI and the I2S. 141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (++) The third output is used to generate a clock for ADC 142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) CSS (Clock security system): once enabled, if a HSE clock failure occurs 144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (HSE used directly or through PLL as System clock source), the System clock 145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** is automatically switched to HSI and an interrupt is generated if enabled. 146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** The interrupt is linked to the Cortex-M4 NMI (Non-Maskable Interrupt) ARM GAS /tmp/cc2grSJV.s page 4 147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** exception vector. 148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) MCO (microcontroller clock output): used to output LSI, HSI, LSE, HSE, 150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** main PLL clock, system clock or RC48 clock (through a configurable prescaler) on PA8 p 151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration 153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Several clock sources can be used to drive the System clock (SYSCLK): HSI, 154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HSE and main PLL. 155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable 156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped 157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived 158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock 159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** the peripherals mapped on these buses. You can use 160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. 161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** -@- All the peripheral clocks are derived from the System clock (SYSCLK) except: 163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+@) RTC: the RTC clock can be derived either from the LSI, LSE or HSE clock 165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** divided by 2 to 31. 166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** You have to use __HAL_RCC_RTC_ENABLE() and HAL_RCCEx_PeriphCLKConfig() function 167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** to configure this clock. 168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+@) USB FS and RNG: USB FS requires a frequency equal to 48 MHz 169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** to work correctly, while the RNG peripheral requires a frequency 170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** equal or lower than to 48 MHz. This clock is derived of the main PLL 171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** through PLLQ divider. You have to enable the peripheral clock and use 172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_RCCEx_PeriphCLKConfig() function to configure this clock. 173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+@) IWDG clock which is always the LSI clock. 174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) The maximum frequency of the SYSCLK, HCLK, PCLK1 and PCLK2 is 170 MHz. 177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** The clock source frequency should be adapted depending on the device voltage range 178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** as listed in the Reference Manual "Clock source frequency versus voltage scaling" chap 179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** @endverbatim 181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** Table 1. HCLK clock frequency for STM32G4xx devices 183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** +----------------------------------------------------------------------------+ 184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** | Latency | HCLK clock frequency (MHz) | 185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** | |----------------------------------------------------------| 186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** | | voltage range 1 | voltage range 1 | voltage range 2 | 187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** | | boost mode 1.28 V | normal mode 1.2 V | 1.0 V | 188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |-----------------|-------------------|-------------------|------------------| 189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |0WS(1 CPU cycles)| HCLK <= 34 | HCLK <= 30 | HCLK <= 13 | 190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |-----------------|-------------------|-------------------|------------------| 191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |1WS(2 CPU cycles)| HCLK <= 68 | HCLK <= 60 | HCLK <= 26 | 192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |-----------------|-------------------|-------------------|------------------| 193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |2WS(3 CPU cycles)| HCLK <= 102 | HCLK <= 90 | - | 194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |-----------------|-------------------|-------------------|------------------| 195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |3WS(4 CPU cycles)| HCLK <= 136 | HCLK <= 120 | - | 196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |-----------------|-------------------|-------------------|------------------| 197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** |4WS(5 CPU cycles)| HCLK <= 170 | HCLK <= 150 | - | 198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** +----------------------------------------------------------------------------+ 199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** ARM GAS /tmp/cc2grSJV.s page 5 204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Reset the RCC clock configuration to the default reset state. 205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: 206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - HSI ON and used as system clock source 207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - HSE, PLL OFF 208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. 209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - CSS, MCO1 OFF 210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - All interrupts disabled 211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - All interrupt and reset flags cleared 212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note This function doesn't modify the configuration of the 213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - Peripheral clocks 214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * - LSI, LSE and RTC clocks 215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval HAL status 216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void) 218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 27 .loc 1 218 0 28 .cfi_startproc 29 @ args = 0, pretend = 0, frame = 0 30 @ frame_needed = 0, uses_anonymous_args = 0 31 0000 70B5 push {r4, r5, r6, lr} 32 .LCFI0: 33 .cfi_def_cfa_offset 16 34 .cfi_offset 4, -16 35 .cfi_offset 5, -12 36 .cfi_offset 6, -8 37 .cfi_offset 14, -4 219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t tickstart; 220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set HSION bit to the reset value */ 225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION); 38 .loc 1 225 0 39 0002 2B4C ldr r4, .L15 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 40 .loc 1 222 0 41 0004 FFF7FEFF bl HAL_GetTick 42 .LVL0: 43 .loc 1 225 0 44 0008 2368 ldr r3, [r4] 45 000a 43F48073 orr r3, r3, #256 222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 46 .loc 1 222 0 47 000e 0546 mov r5, r0 48 .LVL1: 49 .loc 1 225 0 50 0010 2360 str r3, [r4] 226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSI is ready */ 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) 51 .loc 1 228 0 52 0012 04E0 b .L2 53 .LVL2: 54 .L4: 229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) ARM GAS /tmp/cc2grSJV.s page 6 55 .loc 1 230 0 56 0014 FFF7FEFF bl HAL_GetTick 57 .LVL3: 58 0018 401B subs r0, r0, r5 59 001a 0228 cmp r0, #2 60 001c 25D8 bhi .L6 61 .L2: 228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 62 .loc 1 228 0 63 001e 2368 ldr r3, [r4] 64 0020 5B05 lsls r3, r3, #21 65 0022 F7D5 bpl .L4 231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set HSITRIM[6:0] bits to the reset value */ 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->ICSCR, RCC_HSICALIBRATION_DEFAULT << RCC_ICSCR_HSITRIM_Pos); 66 .loc 1 237 0 67 0024 6368 ldr r3, [r4, #4] 238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Reset CFGR register (HSI is selected as system clock source) */ 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC->CFGR = 0x00000001u; 244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSI is ready */ 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI) 68 .loc 1 246 0 69 0026 224D ldr r5, .L15 70 .LVL4: 237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 71 .loc 1 237 0 72 0028 43F08043 orr r3, r3, #1073741824 73 002c 6360 str r3, [r4, #4] 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 74 .loc 1 240 0 75 002e FFF7FEFF bl HAL_GetTick 76 .LVL5: 243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 77 .loc 1 243 0 78 0032 0123 movs r3, #1 79 0034 A360 str r3, [r4, #8] 240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 80 .loc 1 240 0 81 0036 0646 mov r6, r0 82 .LVL6: 247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 83 .loc 1 248 0 84 0038 41F28834 movw r4, #5000 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 85 .loc 1 246 0 86 003c 04E0 b .L5 87 .LVL7: ARM GAS /tmp/cc2grSJV.s page 7 88 .L7: 89 .loc 1 248 0 90 003e FFF7FEFF bl HAL_GetTick 91 .LVL8: 92 0042 801B subs r0, r0, r6 93 0044 A042 cmp r0, r4 94 0046 10D8 bhi .L6 95 .L5: 246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 96 .loc 1 246 0 97 0048 AB68 ldr r3, [r5, #8] 98 004a 03F00C03 and r3, r3, #12 99 004e 042B cmp r3, #4 100 0050 F5D1 bne .L7 249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; 256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Adapt Systick interrupt period */ 258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (HAL_InitTick(uwTickPrio) != HAL_OK) 101 .loc 1 258 0 102 0052 184A ldr r2, .L15+4 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 103 .loc 1 255 0 104 0054 184B ldr r3, .L15+8 105 .loc 1 258 0 106 0056 1068 ldr r0, [r2] 255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 107 .loc 1 255 0 108 0058 184A ldr r2, .L15+12 109 005a 1A60 str r2, [r3] 110 .loc 1 258 0 111 005c FFF7FEFF bl HAL_InitTick 112 .LVL9: 113 0060 0446 mov r4, r0 114 0062 28B1 cbz r0, .L14 259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 115 .loc 1 260 0 116 0064 0124 movs r4, #1 261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Clear CR register in 2 steps: first to clear HSEON in case bypass was enabled */ 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC->CR = RCC_CR_HSION; 265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Then again to HSEBYP in case bypass was enabled */ 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC->CR = RCC_CR_HSION; 268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till PLL is OFF */ 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) ARM GAS /tmp/cc2grSJV.s page 8 274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* once PLL is OFF, reset PLLCFGR register to default value */ 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC->PLLCFGR = RCC_PLLCFGR_PLLN_4; 283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable all interrupts */ 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** CLEAR_REG(RCC->CIER); 286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Clear all interrupt flags */ 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** WRITE_REG(RCC->CICR, 0xFFFFFFFFU); 289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Clear all reset flags */ 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->CSR, RCC_CSR_RMVF); 292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_OK; 294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 117 .loc 1 294 0 118 0066 2046 mov r0, r4 119 0068 70BD pop {r4, r5, r6, pc} 120 .LVL10: 121 .L6: 232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 122 .loc 1 232 0 123 006a 0324 movs r4, #3 124 .L3: 125 .loc 1 294 0 126 006c 2046 mov r0, r4 127 006e 70BD pop {r4, r5, r6, pc} 128 .LVL11: 129 .L14: 264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 130 .loc 1 264 0 131 0070 4FF48073 mov r3, #256 132 0074 2B60 str r3, [r5] 267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 133 .loc 1 267 0 134 0076 2B60 str r3, [r5] 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 135 .loc 1 270 0 136 0078 FFF7FEFF bl HAL_GetTick 137 .LVL12: 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 138 .loc 1 273 0 139 007c 0C4D ldr r5, .L15 270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 140 .loc 1 270 0 141 007e 0646 mov r6, r0 142 .LVL13: 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 143 .loc 1 273 0 144 0080 04E0 b .L8 145 .LVL14: ARM GAS /tmp/cc2grSJV.s page 9 146 .L9: 275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 147 .loc 1 275 0 148 0082 FFF7FEFF bl HAL_GetTick 149 .LVL15: 150 0086 801B subs r0, r0, r6 151 0088 0228 cmp r0, #2 152 008a EED8 bhi .L6 153 .L8: 273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 154 .loc 1 273 0 155 008c 2B68 ldr r3, [r5] 156 008e 13F00073 ands r3, r3, #33554432 157 0092 F6D1 bne .L9 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 158 .loc 1 282 0 159 0094 4FF48051 mov r1, #4096 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 160 .loc 1 288 0 161 0098 4FF0FF32 mov r2, #-1 282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 162 .loc 1 282 0 163 009c E960 str r1, [r5, #12] 285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 164 .loc 1 285 0 165 009e AB61 str r3, [r5, #24] 288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 166 .loc 1 288 0 167 00a0 2A62 str r2, [r5, #32] 291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 168 .loc 1 291 0 169 00a2 D5F89430 ldr r3, [r5, #148] 170 00a6 43F40003 orr r3, r3, #8388608 171 00aa C5F89430 str r3, [r5, #148] 293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 172 .loc 1 293 0 173 00ae DDE7 b .L3 174 .L16: 175 .align 2 176 .L15: 177 00b0 00100240 .word 1073876992 178 00b4 00000000 .word uwTickPrio 179 00b8 00000000 .word SystemCoreClock 180 00bc 0024F400 .word 16000000 181 .cfi_endproc 182 .LFE329: 184 .section .text.HAL_RCC_OscConfig,"ax",%progbits 185 .align 1 186 .p2align 2,,3 187 .global HAL_RCC_OscConfig 188 .syntax unified 189 .thumb 190 .thumb_func 191 .fpu fpv4-sp-d16 193 HAL_RCC_OscConfig: 194 .LFB330: 295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ARM GAS /tmp/cc2grSJV.s page 10 296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Initialize the RCC Oscillators according to the specified parameters in the 298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * RCC_OscInitTypeDef. 299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. 301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. 302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not 303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off 304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. 305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not 306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off 307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. 308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval HAL status 309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 195 .loc 1 311 0 196 .cfi_startproc 197 @ args = 0, pretend = 0, frame = 8 198 @ frame_needed = 0, uses_anonymous_args = 0 199 .LVL16: 312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t tickstart; 313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t temp_sysclksrc; 314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t temp_pllckcfg; 315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check Null pointer */ 317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_OscInitStruct == NULL) 200 .loc 1 317 0 201 0000 0028 cmp r0, #0 202 0002 00F06C81 beq .L135 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t tickstart; 203 .loc 1 311 0 204 0006 2DE9F041 push {r4, r5, r6, r7, r8, lr} 205 .LCFI1: 206 .cfi_def_cfa_offset 24 207 .cfi_offset 4, -24 208 .cfi_offset 5, -20 209 .cfi_offset 6, -16 210 .cfi_offset 7, -12 211 .cfi_offset 8, -8 212 .cfi_offset 14, -4 318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); 324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ 326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 213 .loc 1 326 0 214 000a 0368 ldr r3, [r0] 215 000c D907 lsls r1, r3, #31 311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t tickstart; 216 .loc 1 311 0 217 000e 82B0 sub sp, sp, #8 218 .LCFI2: ARM GAS /tmp/cc2grSJV.s page 11 219 .cfi_def_cfa_offset 32 220 0010 0446 mov r4, r0 221 .loc 1 326 0 222 0012 2DD5 bpl .L20 327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); 330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); 223 .loc 1 331 0 224 0014 B749 ldr r1, .L145 225 0016 8A68 ldr r2, [r1, #8] 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); 226 .loc 1 332 0 227 0018 C968 ldr r1, [r1, #12] 331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); 228 .loc 1 331 0 229 001a 02F00C02 and r2, r2, #12 230 .LVL17: 333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((temp_sysclksrc == RCC_CFGR_SWS_PLL) && (temp_pllckcfg == RCC_PLLSOURCE_HSE)) || (temp_sys 231 .loc 1 335 0 232 001e 0C2A cmp r2, #12 233 0020 00F0F580 beq .L136 234 .loc 1 335 0 is_stmt 0 discriminator 3 235 0024 082A cmp r2, #8 236 0026 00F0F780 beq .L22 237 .LVL18: 238 .L23: 336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 239 .loc 1 345 0 is_stmt 1 240 002a 6368 ldr r3, [r4, #4] 241 002c B3F5803F cmp r3, #65536 242 0030 00F02E81 beq .L137 243 .loc 1 345 0 is_stmt 0 discriminator 2 244 0034 B3F5A02F cmp r3, #327680 245 0038 00F0E081 beq .L138 246 .loc 1 345 0 discriminator 4 247 003c AD4D ldr r5, .L145 248 003e 2A68 ldr r2, [r5] 249 .LVL19: 250 0040 22F48032 bic r2, r2, #65536 251 0044 2A60 str r2, [r5] 252 0046 2A68 ldr r2, [r5] 253 0048 22F48022 bic r2, r2, #262144 254 004c 2A60 str r2, [r5] 346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ARM GAS /tmp/cc2grSJV.s page 12 347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the HSE State */ 348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 255 .loc 1 348 0 is_stmt 1 discriminator 4 256 004e 002B cmp r3, #0 257 0050 40F02381 bne .L26 349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSE is ready */ 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) 355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 258 .loc 1 365 0 259 0054 FFF7FEFF bl HAL_GetTick 260 .LVL20: 261 0058 0646 mov r6, r0 262 .LVL21: 366:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 367:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSE is disabled */ 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSERDY) != 0U) 263 .loc 1 368 0 264 005a 05E0 b .L31 265 .LVL22: 266 .L33: 369:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 370:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 267 .loc 1 370 0 268 005c FFF7FEFF bl HAL_GetTick 269 .LVL23: 270 0060 801B subs r0, r0, r6 271 0062 6428 cmp r0, #100 272 0064 00F23781 bhi .L32 273 .L31: 368:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 274 .loc 1 368 0 275 0068 2B68 ldr r3, [r5] 276 006a 9F03 lsls r7, r3, #14 277 006c F6D4 bmi .L33 278 .L131: 279 006e 2368 ldr r3, [r4] 280 .LVL24: 281 .L20: 371:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 372:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 373:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 374:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 375:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } ARM GAS /tmp/cc2grSJV.s page 13 376:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 377:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 378:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ 379:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 282 .loc 1 379 0 283 0070 9E07 lsls r6, r3, #30 284 0072 00F1A580 bmi .L139 285 .L34: 380:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 381:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 382:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); 383:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_HSI_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 384:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 385:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_sysclksrc = __HAL_RCC_GET_SYSCLK_SOURCE(); 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((temp_sysclksrc == RCC_CFGR_SWS_PLL) && (temp_pllckcfg == RCC_PLLSOURCE_HSI)) || (temp_sys 389:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 390:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* When HSI is used as system clock it will not be disabled */ 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) && (RCC_OscInitStruct->HSIState == RCC_HSI_OFF)) 392:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 393:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 394:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 395:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ 396:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 397:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 398:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 400:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 401:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Adapt Systick interrupt period */ 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (HAL_InitTick(uwTickPrio) != HAL_OK) 403:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 404:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 405:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 406:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 407:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 408:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 409:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 410:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the HSI State */ 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF) 412:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 413:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); 415:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 416:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 418:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 419:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSI is ready */ 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) 421:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 423:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 424:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 425:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 426:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 427:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 428:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ ARM GAS /tmp/cc2grSJV.s page 14 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 430:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 431:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 432:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 433:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); 435:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 436:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 438:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 439:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSI is disabled */ 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) != 0U) 441:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 443:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 444:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 445:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 446:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 447:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 448:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 449:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 450:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ 451:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 286 .loc 1 451 0 287 0076 1A07 lsls r2, r3, #28 288 0078 19D5 bpl .L44 452:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 453:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 454:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); 455:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 456:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the LSI State */ 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) 289 .loc 1 457 0 290 007a 6369 ldr r3, [r4, #20] 458:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 459:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ 460:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); 291 .loc 1 460 0 292 007c 9D4D ldr r5, .L145 457:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 293 .loc 1 457 0 294 007e 002B cmp r3, #0 295 0080 00F0D780 beq .L45 296 .loc 1 460 0 297 0084 D5F89430 ldr r3, [r5, #148] 298 0088 43F00103 orr r3, r3, #1 299 008c C5F89430 str r3, [r5, #148] 461:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 462:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 463:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 300 .loc 1 463 0 301 0090 FFF7FEFF bl HAL_GetTick 302 .LVL25: 303 0094 0646 mov r6, r0 304 .LVL26: 464:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 465:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till LSI is ready */ ARM GAS /tmp/cc2grSJV.s page 15 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) == 0U) 305 .loc 1 466 0 306 0096 05E0 b .L46 307 .LVL27: 308 .L47: 467:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 468:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 309 .loc 1 468 0 310 0098 FFF7FEFF bl HAL_GetTick 311 .LVL28: 312 009c 801B subs r0, r0, r6 313 009e 0228 cmp r0, #2 314 00a0 00F21981 bhi .L32 315 .L46: 466:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 316 .loc 1 466 0 317 00a4 D5F89430 ldr r3, [r5, #148] 318 00a8 9F07 lsls r7, r3, #30 319 00aa F5D5 bpl .L47 320 .L133: 321 00ac 2368 ldr r3, [r4] 322 .LVL29: 323 .L44: 469:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 470:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 471:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 472:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 473:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 474:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 475:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 476:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); 478:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 479:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 481:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 482:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till LSI is disabled */ 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while(READ_BIT(RCC->CSR, RCC_CSR_LSIRDY) != 0U) 484:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 486:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 487:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 488:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 489:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 490:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 491:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 492:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ 493:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 324 .loc 1 493 0 325 00ae 5907 lsls r1, r3, #29 326 00b0 3FD5 bpl .L50 327 .LVL30: 328 .LBB6: 494:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; 496:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 497:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ ARM GAS /tmp/cc2grSJV.s page 16 498:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); 499:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 500:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ 501:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain if necessary */ 502:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (__HAL_RCC_PWR_IS_CLK_DISABLED() != 0U) 329 .loc 1 502 0 330 00b2 904B ldr r3, .L145 331 00b4 9A6D ldr r2, [r3, #88] 332 00b6 D200 lsls r2, r2, #3 333 00b8 00F12B81 bmi .L85 334 .LBB7: 503:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 504:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); 335 .loc 1 504 0 336 00bc 9A6D ldr r2, [r3, #88] 337 00be 42F08052 orr r2, r2, #268435456 338 00c2 9A65 str r2, [r3, #88] 339 00c4 9B6D ldr r3, [r3, #88] 340 00c6 03F08053 and r3, r3, #268435456 341 00ca 0193 str r3, [sp, #4] 342 00cc 019B ldr r3, [sp, #4] 343 .LVL31: 344 .LBE7: 505:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pwrclkchanged = SET; 345 .loc 1 505 0 346 00ce 0126 movs r6, #1 347 .LVL32: 348 .L51: 506:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 507:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 508:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 349 .loc 1 508 0 350 00d0 894D ldr r5, .L145+4 351 00d2 2A68 ldr r2, [r5] 352 00d4 D705 lsls r7, r2, #23 353 00d6 40F1EE80 bpl .L52 354 .L57: 509:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 510:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Enable write access to Backup domain */ 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(PWR->CR1, PWR_CR1_DBP); 512:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 513:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 515:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 517:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 519:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 520:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 521:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 522:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 523:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 524:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 525:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 355 .loc 1 526 0 356 00da A368 ldr r3, [r4, #8] ARM GAS /tmp/cc2grSJV.s page 17 357 00dc 012B cmp r3, #1 358 00de 00F01A81 beq .L140 359 .loc 1 526 0 is_stmt 0 discriminator 2 360 00e2 052B cmp r3, #5 361 00e4 00F0CB81 beq .L141 362 .loc 1 526 0 discriminator 4 363 00e8 824D ldr r5, .L145 364 00ea D5F89020 ldr r2, [r5, #144] 365 00ee 22F00102 bic r2, r2, #1 366 00f2 C5F89020 str r2, [r5, #144] 367 00f6 D5F89020 ldr r2, [r5, #144] 368 00fa 22F00402 bic r2, r2, #4 369 00fe C5F89020 str r2, [r5, #144] 527:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 528:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the LSE State */ 529:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF) 370 .loc 1 529 0 is_stmt 1 discriminator 4 371 0102 002B cmp r3, #0 372 0104 40F00E81 bne .L58 530:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 531:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 533:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 534:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till LSE is ready */ 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == 0U) 536:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 538:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 539:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 540:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 541:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 542:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 543:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 544:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 545:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 373 .loc 1 546 0 374 0108 FFF7FEFF bl HAL_GetTick 375 .LVL33: 547:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 548:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till LSE is disabled */ 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) != 0U) 550:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 551:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 376 .loc 1 551 0 377 010c 41F28837 movw r7, #5000 546:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 378 .loc 1 546 0 379 0110 8046 mov r8, r0 380 .LVL34: 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 381 .loc 1 549 0 382 0112 06E0 b .L64 383 .LVL35: 384 .L65: 385 .loc 1 551 0 386 0114 FFF7FEFF bl HAL_GetTick ARM GAS /tmp/cc2grSJV.s page 18 387 .LVL36: 388 0118 A0EB0800 sub r0, r0, r8 389 011c B842 cmp r0, r7 390 011e 00F2DA80 bhi .L32 391 .L64: 549:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 392 .loc 1 549 0 393 0122 D5F89030 ldr r3, [r5, #144] 394 0126 9A07 lsls r2, r3, #30 395 0128 F4D4 bmi .L65 552:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 553:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 554:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 555:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 556:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 557:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 558:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Restore clock configuration if changed */ 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (pwrclkchanged == SET) 396 .loc 1 559 0 397 012a 002E cmp r6, #0 398 012c 40F02381 bne .L142 399 .L134: 400 0130 2368 ldr r3, [r4] 401 .LVL37: 402 .L50: 403 .LBE6: 560:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); 562:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 563:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 564:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 565:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*------------------------------ HSI48 Configuration -----------------------*/ 566:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) 404 .loc 1 566 0 405 0132 9B06 lsls r3, r3, #26 406 0134 18D5 bpl .L73 567:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 568:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 569:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); 570:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 571:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the HSI48 State */ 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) 407 .loc 1 572 0 408 0136 A369 ldr r3, [r4, #24] 573:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 574:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (HSI48). */ 575:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSI48_ENABLE(); 409 .loc 1 575 0 410 0138 6E4D ldr r5, .L145 572:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 411 .loc 1 572 0 412 013a 002B cmp r3, #0 413 013c 00F00781 beq .L70 414 .loc 1 575 0 415 0140 D5F89830 ldr r3, [r5, #152] 416 0144 43F00103 orr r3, r3, #1 417 0148 C5F89830 str r3, [r5, #152] ARM GAS /tmp/cc2grSJV.s page 19 576:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 577:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 578:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 418 .loc 1 578 0 419 014c FFF7FEFF bl HAL_GetTick 420 .LVL38: 421 0150 0646 mov r6, r0 422 .LVL39: 579:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 580:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSI48 is ready */ 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) == 0U) 423 .loc 1 581 0 424 0152 05E0 b .L71 425 .LVL40: 426 .L72: 582:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 583:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) 427 .loc 1 583 0 428 0154 FFF7FEFF bl HAL_GetTick 429 .LVL41: 430 0158 801B subs r0, r0, r6 431 015a 0228 cmp r0, #2 432 015c 00F2BB80 bhi .L32 433 .L71: 581:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 434 .loc 1 581 0 435 0160 D5F89830 ldr r3, [r5, #152] 436 0164 9F07 lsls r7, r3, #30 437 0166 F5D5 bpl .L72 438 .LVL42: 439 .L73: 584:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 585:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 586:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 587:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 588:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 589:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 590:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 591:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (HSI48). */ 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_HSI48_DISABLE(); 593:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 594:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 596:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 597:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till HSI48 is disabled */ 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48RDY) != 0U) 599:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) 601:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 602:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 603:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 604:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 605:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 606:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 607:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 608:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ 609:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ ARM GAS /tmp/cc2grSJV.s page 20 610:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); 611:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 612:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_OscInitStruct->PLL.PLLState != RCC_PLL_NONE) 440 .loc 1 612 0 441 0168 E069 ldr r0, [r4, #28] 442 016a 28B3 cbz r0, .L69 613:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 614:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ 615:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 443 .loc 1 615 0 444 016c 614D ldr r5, .L145 445 016e AA68 ldr r2, [r5, #8] 446 0170 02F00C02 and r2, r2, #12 447 0174 0C2A cmp r2, #12 448 0176 00F04E81 beq .L76 616:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_OscInitStruct->PLL.PLLState == RCC_PLL_ON) 618:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 619:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 620:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); 621:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); 622:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); 623:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); 624:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); 625:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); 626:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 627:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable the main PLL. */ 628:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 449 .loc 1 628 0 450 017a 2A68 ldr r2, [r5] 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 451 .loc 1 617 0 452 017c 0228 cmp r0, #2 453 .loc 1 628 0 454 017e 22F08072 bic r2, r2, #16777216 455 0182 2A60 str r2, [r5] 617:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 456 .loc 1 617 0 457 0184 00F0FD80 beq .L143 629:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 630:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 632:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 633:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till PLL is ready */ 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 635:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 637:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 638:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 639:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 640:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 641:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 642:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */ 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 644:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM, 645:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN, 646:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP, ARM GAS /tmp/cc2grSJV.s page 21 647:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ, 648:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLR); 649:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 650:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Enable the main PLL. */ 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); 652:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 653:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Enable PLL System Clock output. */ 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SYSCLK); 655:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 656:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 658:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 659:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till PLL is ready */ 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 661:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 663:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 664:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 665:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 666:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 667:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 668:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 669:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 670:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable the main PLL. */ 671:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 672:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 673:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Disable all PLL outputs to save power if no PLLs on */ 674:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, RCC_PLLSOURCE_NONE); 458 .loc 1 674 0 459 0188 EA68 ldr r2, [r5, #12] 460 018a 22F00302 bic r2, r2, #3 461 018e EA60 str r2, [r5, #12] 675:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_PLLCLKOUT_DISABLE(RCC_PLL_SYSCLK | RCC_PLL_48M1CLK | RCC_PLL_ADCCLK); 462 .loc 1 675 0 463 0190 EA68 ldr r2, [r5, #12] 464 0192 22F08872 bic r2, r2, #17825792 465 0196 22F48032 bic r2, r2, #65536 466 019a EA60 str r2, [r5, #12] 676:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 677:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 467 .loc 1 678 0 468 019c FFF7FEFF bl HAL_GetTick 469 .LVL43: 679:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 680:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Wait till PLL is disabled */ 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_PLLRDY) != 0U) 470 .loc 1 681 0 471 01a0 2C46 mov r4, r5 472 .LVL44: 678:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 473 .loc 1 678 0 474 01a2 0546 mov r5, r0 475 .LVL45: 476 .loc 1 681 0 477 01a4 05E0 b .L82 478 .LVL46: ARM GAS /tmp/cc2grSJV.s page 22 479 .L83: 682:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 683:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 480 .loc 1 683 0 481 01a6 FFF7FEFF bl HAL_GetTick 482 .LVL47: 483 01aa 401B subs r0, r0, r5 484 01ac 0228 cmp r0, #2 485 01ae 00F29280 bhi .L32 486 .L82: 681:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 487 .loc 1 681 0 488 01b2 2368 ldr r3, [r4] 489 01b4 9B01 lsls r3, r3, #6 490 01b6 F6D4 bmi .L83 491 .LVL48: 492 .L69: 684:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 685:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 686:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 687:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 688:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 689:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 690:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 691:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 692:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 694:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 696:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 697:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 698:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 699:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_pllckcfg = RCC->PLLCFGR; 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != (((RCC_OscInitStruct->PLL.PLLM) - 1U) << RCC 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != ((RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFG 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLPDIV) != ((RCC_OscInitStruct->PLL.PLLP) << RCC_PLL 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLQ) != ((((RCC_OscInitStruct->PLL.PLLQ) >> 1U) - 1U 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLR) != ((((RCC_OscInitStruct->PLL.PLLR) >> 1U) - 1U 707:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 708:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 709:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 710:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 711:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 712:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 713:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 714:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_OK; 493 .loc 1 714 0 494 01b8 0020 movs r0, #0 715:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 495 .loc 1 715 0 496 01ba 02B0 add sp, sp, #8 497 .LCFI3: 498 .cfi_remember_state 499 .cfi_def_cfa_offset 24 500 @ sp needed ARM GAS /tmp/cc2grSJV.s page 23 501 01bc BDE8F081 pop {r4, r5, r6, r7, r8, pc} 502 .LVL49: 503 .L139: 504 .LCFI4: 505 .cfi_restore_state 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); 506 .loc 1 386 0 507 01c0 4C4A ldr r2, .L145 508 01c2 9368 ldr r3, [r2, #8] 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((temp_sysclksrc == RCC_CFGR_SWS_PLL) && (temp_pllckcfg == RCC_PLLSOURCE_HSI)) || (temp_sys 509 .loc 1 387 0 510 01c4 D268 ldr r2, [r2, #12] 386:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** temp_pllckcfg = __HAL_RCC_GET_PLL_OSCSOURCE(); 511 .loc 1 386 0 512 01c6 03F00C03 and r3, r3, #12 513 .LVL50: 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 514 .loc 1 388 0 515 01ca 0C2B cmp r3, #12 516 01cc 45D0 beq .L144 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 517 .loc 1 388 0 is_stmt 0 discriminator 3 518 01ce 042B cmp r3, #4 519 01d0 47D0 beq .L36 520 .LVL51: 521 .L37: 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 522 .loc 1 411 0 is_stmt 1 523 01d2 E368 ldr r3, [r4, #12] 524 .LVL52: 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 525 .loc 1 414 0 526 01d4 474D ldr r5, .L145 411:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 527 .loc 1 411 0 528 01d6 002B cmp r3, #0 529 01d8 00F08380 beq .L39 414:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 530 .loc 1 414 0 531 01dc 2B68 ldr r3, [r5] 532 01de 43F48073 orr r3, r3, #256 533 01e2 2B60 str r3, [r5] 417:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 534 .loc 1 417 0 535 01e4 FFF7FEFF bl HAL_GetTick 536 .LVL53: 537 01e8 0646 mov r6, r0 538 .LVL54: 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 539 .loc 1 420 0 540 01ea 04E0 b .L40 541 .LVL55: 542 .L41: 422:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 543 .loc 1 422 0 544 01ec FFF7FEFF bl HAL_GetTick 545 .LVL56: ARM GAS /tmp/cc2grSJV.s page 24 546 01f0 801B subs r0, r0, r6 547 01f2 0228 cmp r0, #2 548 01f4 6FD8 bhi .L32 549 .L40: 420:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 550 .loc 1 420 0 551 01f6 2B68 ldr r3, [r5] 552 01f8 5805 lsls r0, r3, #21 553 01fa F7D5 bpl .L41 429:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 554 .loc 1 429 0 555 01fc 6B68 ldr r3, [r5, #4] 556 01fe 2269 ldr r2, [r4, #16] 557 0200 23F0FE43 bic r3, r3, #2130706432 558 0204 43EA0263 orr r3, r3, r2, lsl #24 559 0208 6B60 str r3, [r5, #4] 560 020a 2368 ldr r3, [r4] 561 020c 33E7 b .L34 562 .LVL57: 563 .L136: 332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 564 .loc 1 332 0 discriminator 1 565 020e 01F00301 and r1, r1, #3 566 .LVL58: 335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 567 .loc 1 335 0 discriminator 1 568 0212 0329 cmp r1, #3 569 0214 7FF409AF bne .L23 570 .L22: 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 571 .loc 1 337 0 572 0218 364A ldr r2, .L145 573 .LVL59: 574 021a 1268 ldr r2, [r2] 575 021c 9203 lsls r2, r2, #14 576 021e 7FF527AF bpl .L20 337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 577 .loc 1 337 0 is_stmt 0 discriminator 1 578 0222 6268 ldr r2, [r4, #4] 579 0224 002A cmp r2, #0 580 0226 7FF423AF bne .L20 581 .LVL60: 582 .L91: 695:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 583 .loc 1 695 0 is_stmt 1 584 022a 0120 movs r0, #1 585 .L123: 586 .loc 1 715 0 587 022c 02B0 add sp, sp, #8 588 .LCFI5: 589 .cfi_remember_state 590 .cfi_def_cfa_offset 24 591 @ sp needed 592 022e BDE8F081 pop {r4, r5, r6, r7, r8, pc} 593 .LVL61: 594 .L45: 595 .LCFI6: ARM GAS /tmp/cc2grSJV.s page 25 596 .cfi_restore_state 477:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 597 .loc 1 477 0 598 0232 D5F89430 ldr r3, [r5, #148] 599 0236 23F00103 bic r3, r3, #1 600 023a C5F89430 str r3, [r5, #148] 480:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 601 .loc 1 480 0 602 023e FFF7FEFF bl HAL_GetTick 603 .LVL62: 604 0242 0646 mov r6, r0 605 .LVL63: 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 606 .loc 1 483 0 607 0244 04E0 b .L48 608 .LVL64: 609 .L49: 485:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 610 .loc 1 485 0 611 0246 FFF7FEFF bl HAL_GetTick 612 .LVL65: 613 024a 801B subs r0, r0, r6 614 024c 0228 cmp r0, #2 615 024e 42D8 bhi .L32 616 .L48: 483:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 617 .loc 1 483 0 618 0250 D5F89430 ldr r3, [r5, #148] 619 0254 9807 lsls r0, r3, #30 620 0256 F6D4 bmi .L49 621 0258 28E7 b .L133 622 .LVL66: 623 .L144: 387:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((temp_sysclksrc == RCC_CFGR_SWS_PLL) && (temp_pllckcfg == RCC_PLLSOURCE_HSI)) || (temp_sys 624 .loc 1 387 0 discriminator 1 625 025a 02F00302 and r2, r2, #3 626 .LVL67: 388:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 627 .loc 1 388 0 discriminator 1 628 025e 022A cmp r2, #2 629 0260 B7D1 bne .L37 630 .L36: 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 631 .loc 1 391 0 632 0262 244B ldr r3, .L145 633 .LVL68: 634 0264 1B68 ldr r3, [r3] 635 0266 5D05 lsls r5, r3, #21 636 0268 02D5 bpl .L38 391:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 637 .loc 1 391 0 is_stmt 0 discriminator 1 638 026a E368 ldr r3, [r4, #12] 639 026c 002B cmp r3, #0 640 026e DCD0 beq .L91 641 .L38: 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 642 .loc 1 399 0 is_stmt 1 ARM GAS /tmp/cc2grSJV.s page 26 643 0270 204A ldr r2, .L145 644 0272 2069 ldr r0, [r4, #16] 645 0274 5368 ldr r3, [r2, #4] 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 646 .loc 1 402 0 647 0276 2149 ldr r1, .L145+8 399:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 648 .loc 1 399 0 649 0278 23F0FE43 bic r3, r3, #2130706432 650 027c 43EA0063 orr r3, r3, r0, lsl #24 651 0280 5360 str r3, [r2, #4] 402:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 652 .loc 1 402 0 653 0282 0868 ldr r0, [r1] 654 0284 FFF7FEFF bl HAL_InitTick 655 .LVL69: 656 0288 0028 cmp r0, #0 657 028a CED1 bne .L91 658 .L132: 659 028c 2368 ldr r3, [r4] 660 028e F2E6 b .L34 661 .LVL70: 662 .L137: 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 663 .loc 1 345 0 discriminator 1 664 0290 184A ldr r2, .L145 665 .LVL71: 666 0292 1368 ldr r3, [r2] 667 0294 43F48033 orr r3, r3, #65536 668 0298 1360 str r3, [r2] 669 .L26: 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 670 .loc 1 351 0 671 029a FFF7FEFF bl HAL_GetTick 672 .LVL72: 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 673 .loc 1 354 0 674 029e 154D ldr r5, .L145 351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 675 .loc 1 351 0 676 02a0 0646 mov r6, r0 677 .LVL73: 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 678 .loc 1 354 0 679 02a2 04E0 b .L29 680 .LVL74: 681 .L30: 356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 682 .loc 1 356 0 683 02a4 FFF7FEFF bl HAL_GetTick 684 .LVL75: 685 02a8 801B subs r0, r0, r6 686 02aa 6428 cmp r0, #100 687 02ac 13D8 bhi .L32 688 .L29: 354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 689 .loc 1 354 0 ARM GAS /tmp/cc2grSJV.s page 27 690 02ae 2B68 ldr r3, [r5] 691 02b0 9B03 lsls r3, r3, #14 692 02b2 F7D5 bpl .L30 693 02b4 DBE6 b .L131 694 .LVL76: 695 .L52: 696 .LBB8: 511:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 697 .loc 1 511 0 698 02b6 2A68 ldr r2, [r5] 699 02b8 42F48072 orr r2, r2, #256 700 02bc 2A60 str r2, [r5] 514:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 701 .loc 1 514 0 702 02be FFF7FEFF bl HAL_GetTick 703 .LVL77: 704 02c2 0746 mov r7, r0 705 .LVL78: 706 .L55: 516:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 707 .loc 1 516 0 708 02c4 2B68 ldr r3, [r5] 709 02c6 D805 lsls r0, r3, #23 710 02c8 3FF507AF bmi .L57 518:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 711 .loc 1 518 0 712 02cc FFF7FEFF bl HAL_GetTick 713 .LVL79: 714 02d0 C01B subs r0, r0, r7 715 02d2 0228 cmp r0, #2 716 02d4 F6D9 bls .L55 717 .LVL80: 718 .L32: 719 .LBE8: 358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 720 .loc 1 358 0 721 02d6 0320 movs r0, #3 722 .loc 1 715 0 723 02d8 02B0 add sp, sp, #8 724 .LCFI7: 725 .cfi_def_cfa_offset 24 726 @ sp needed 727 02da BDE8F081 pop {r4, r5, r6, r7, r8, pc} 728 .LVL81: 729 .L135: 730 .LCFI8: 731 .cfi_def_cfa_offset 0 732 .cfi_restore 4 733 .cfi_restore 5 734 .cfi_restore 6 735 .cfi_restore 7 736 .cfi_restore 8 737 .cfi_restore 14 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 738 .loc 1 319 0 739 02de 0120 movs r0, #1 740 .LVL82: ARM GAS /tmp/cc2grSJV.s page 28 741 .loc 1 715 0 742 02e0 7047 bx lr 743 .LVL83: 744 .L39: 745 .LCFI9: 746 .cfi_def_cfa_offset 32 747 .cfi_offset 4, -24 748 .cfi_offset 5, -20 749 .cfi_offset 6, -16 750 .cfi_offset 7, -12 751 .cfi_offset 8, -8 752 .cfi_offset 14, -4 434:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 753 .loc 1 434 0 754 02e2 2B68 ldr r3, [r5] 755 02e4 23F48073 bic r3, r3, #256 756 02e8 2B60 str r3, [r5] 437:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 757 .loc 1 437 0 758 02ea FFF7FEFF bl HAL_GetTick 759 .LVL84: 760 02ee 0646 mov r6, r0 761 .LVL85: 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 762 .loc 1 440 0 763 02f0 0BE0 b .L42 764 .L146: 765 02f2 00BF .align 2 766 .L145: 767 02f4 00100240 .word 1073876992 768 02f8 00700040 .word 1073770496 769 02fc 00000000 .word uwTickPrio 770 .LVL86: 771 .L43: 442:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 772 .loc 1 442 0 773 0300 FFF7FEFF bl HAL_GetTick 774 .LVL87: 775 0304 801B subs r0, r0, r6 776 0306 0228 cmp r0, #2 777 0308 E5D8 bhi .L32 778 .L42: 440:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 779 .loc 1 440 0 780 030a 2B68 ldr r3, [r5] 781 030c 5905 lsls r1, r3, #21 782 030e F7D4 bmi .L43 783 0310 BCE7 b .L132 784 .LVL88: 785 .L85: 786 .LBB9: 495:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 787 .loc 1 495 0 788 0312 0026 movs r6, #0 789 0314 DCE6 b .L51 790 .LVL89: 791 .L140: ARM GAS /tmp/cc2grSJV.s page 29 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 792 .loc 1 526 0 discriminator 1 793 0316 614A ldr r2, .L147 794 0318 D2F89030 ldr r3, [r2, #144] 795 031c 43F00103 orr r3, r3, #1 796 0320 C2F89030 str r3, [r2, #144] 797 .L58: 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 798 .loc 1 532 0 799 0324 FFF7FEFF bl HAL_GetTick 800 .LVL90: 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 801 .loc 1 535 0 802 0328 5C4D ldr r5, .L147 532:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 803 .loc 1 532 0 804 032a 8046 mov r8, r0 805 .LVL91: 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 806 .loc 1 537 0 807 032c 41F28837 movw r7, #5000 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 808 .loc 1 535 0 809 0330 05E0 b .L84 810 .LVL92: 811 .L61: 537:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 812 .loc 1 537 0 813 0332 FFF7FEFF bl HAL_GetTick 814 .LVL93: 815 0336 A0EB0800 sub r0, r0, r8 816 033a B842 cmp r0, r7 817 033c CBD8 bhi .L32 818 .L84: 535:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 819 .loc 1 535 0 820 033e D5F89030 ldr r3, [r5, #144] 821 0342 9907 lsls r1, r3, #30 822 0344 F5D5 bpl .L61 559:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 823 .loc 1 559 0 824 0346 002E cmp r6, #0 825 0348 3FF4F2AE beq .L134 826 034c 13E0 b .L142 827 .LVL94: 828 .L70: 829 .LBE9: 592:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 830 .loc 1 592 0 831 034e D5F89830 ldr r3, [r5, #152] 832 0352 23F00103 bic r3, r3, #1 833 0356 C5F89830 str r3, [r5, #152] 595:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 834 .loc 1 595 0 835 035a FFF7FEFF bl HAL_GetTick 836 .LVL95: 837 035e 0646 mov r6, r0 ARM GAS /tmp/cc2grSJV.s page 30 838 .LVL96: 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 839 .loc 1 598 0 840 0360 04E0 b .L74 841 .LVL97: 842 .L75: 600:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 843 .loc 1 600 0 844 0362 FFF7FEFF bl HAL_GetTick 845 .LVL98: 846 0366 801B subs r0, r0, r6 847 0368 0228 cmp r0, #2 848 036a B4D8 bhi .L32 849 .L74: 598:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 850 .loc 1 598 0 851 036c D5F89830 ldr r3, [r5, #152] 852 0370 9807 lsls r0, r3, #30 853 0372 F6D4 bmi .L75 854 0374 F8E6 b .L73 855 .LVL99: 856 .L142: 857 .LBB10: 561:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 858 .loc 1 561 0 859 0376 494A ldr r2, .L147 860 0378 936D ldr r3, [r2, #88] 861 037a 23F08053 bic r3, r3, #268435456 862 037e 9365 str r3, [r2, #88] 863 0380 D6E6 b .L134 864 .LVL100: 865 .L143: 866 .LBE10: 631:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 867 .loc 1 631 0 868 0382 FFF7FEFF bl HAL_GetTick 869 .LVL101: 870 0386 0646 mov r6, r0 871 .LVL102: 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 872 .loc 1 634 0 873 0388 04E0 b .L78 874 .LVL103: 875 .L79: 636:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 876 .loc 1 636 0 877 038a FFF7FEFF bl HAL_GetTick 878 .LVL104: 879 038e 801B subs r0, r0, r6 880 0390 0228 cmp r0, #2 881 0392 A0D8 bhi .L32 882 .L78: 634:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 883 .loc 1 634 0 884 0394 2B68 ldr r3, [r5] 885 0396 9901 lsls r1, r3, #6 886 0398 F7D4 bmi .L79 ARM GAS /tmp/cc2grSJV.s page 31 643:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM, 887 .loc 1 643 0 888 039a E968 ldr r1, [r5, #12] 889 039c 404B ldr r3, .L147+4 890 039e 226A ldr r2, [r4, #32] 891 03a0 A76A ldr r7, [r4, #40] 892 03a2 E66A ldr r6, [r4, #44] 893 .LVL105: 894 03a4 606A ldr r0, [r4, #36] 895 03a6 0B40 ands r3, r3, r1 896 03a8 1343 orrs r3, r3, r2 897 03aa D4E90C12 ldrd r1, r2, [r4, #48] 898 03ae 43EA0723 orr r3, r3, r7, lsl #8 899 03b2 0138 subs r0, r0, #1 900 03b4 43EAC663 orr r3, r3, r6, lsl #27 901 03b8 4908 lsrs r1, r1, #1 902 03ba 43EA0013 orr r3, r3, r0, lsl #4 903 03be 0139 subs r1, r1, #1 904 03c0 5208 lsrs r2, r2, #1 905 03c2 43EA4153 orr r3, r3, r1, lsl #21 906 03c6 013A subs r2, r2, #1 907 03c8 43EA4263 orr r3, r3, r2, lsl #25 908 03cc EB60 str r3, [r5, #12] 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 909 .loc 1 651 0 910 03ce 2B68 ldr r3, [r5] 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 911 .loc 1 660 0 912 03d0 324C ldr r4, .L147 913 .LVL106: 651:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 914 .loc 1 651 0 915 03d2 43F08073 orr r3, r3, #16777216 916 03d6 2B60 str r3, [r5] 654:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 917 .loc 1 654 0 918 03d8 EB68 ldr r3, [r5, #12] 919 03da 43F08073 orr r3, r3, #16777216 920 03de EB60 str r3, [r5, #12] 657:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 921 .loc 1 657 0 922 03e0 FFF7FEFF bl HAL_GetTick 923 .LVL107: 924 03e4 0546 mov r5, r0 925 .LVL108: 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 926 .loc 1 660 0 927 03e6 05E0 b .L80 928 .LVL109: 929 .L81: 662:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 930 .loc 1 662 0 931 03e8 FFF7FEFF bl HAL_GetTick 932 .LVL110: 933 03ec 401B subs r0, r0, r5 934 03ee 0228 cmp r0, #2 935 03f0 3FF671AF bhi .L32 ARM GAS /tmp/cc2grSJV.s page 32 936 .L80: 660:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 937 .loc 1 660 0 938 03f4 2368 ldr r3, [r4] 939 03f6 9A01 lsls r2, r3, #6 940 03f8 F6D5 bpl .L81 941 03fa DDE6 b .L69 942 .LVL111: 943 .L138: 345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 944 .loc 1 345 0 discriminator 3 945 03fc 03F18043 add r3, r3, #1073741824 946 0400 A3F53C33 sub r3, r3, #192512 947 0404 1A68 ldr r2, [r3] 948 .LVL112: 949 0406 42F48022 orr r2, r2, #262144 950 040a 1A60 str r2, [r3] 951 040c 1A68 ldr r2, [r3] 952 040e 42F48032 orr r2, r2, #65536 953 0412 1A60 str r2, [r3] 954 0414 41E7 b .L26 955 .LVL113: 956 .L76: 693:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 957 .loc 1 693 0 958 0416 0128 cmp r0, #1 959 0418 3FF408AF beq .L123 700:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if((READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 960 .loc 1 700 0 961 041c EB68 ldr r3, [r5, #12] 962 .LVL114: 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != (((RCC_OscInitStruct->PLL.PLLM) - 1U) << RCC 963 .loc 1 701 0 964 041e 226A ldr r2, [r4, #32] 965 0420 03F00301 and r1, r3, #3 966 0424 9142 cmp r1, r2 967 0426 7FF400AF bne .L91 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != ((RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFG 968 .loc 1 702 0 discriminator 1 969 042a 616A ldr r1, [r4, #36] 970 042c 03F0F002 and r2, r3, #240 971 0430 0139 subs r1, r1, #1 701:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLM) != (((RCC_OscInitStruct->PLL.PLLM) - 1U) << RCC 972 .loc 1 701 0 discriminator 1 973 0432 B2EB011F cmp r2, r1, lsl #4 974 0436 7FF4F8AE bne .L91 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLPDIV) != ((RCC_OscInitStruct->PLL.PLLP) << RCC_PLL 975 .loc 1 703 0 976 043a A16A ldr r1, [r4, #40] 977 043c 03F4FE42 and r2, r3, #32512 702:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLN) != ((RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFG 978 .loc 1 702 0 979 0440 B2EB012F cmp r2, r1, lsl #8 980 0444 7FF4F1AE bne .L91 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLQ) != ((((RCC_OscInitStruct->PLL.PLLQ) >> 1U) - 1U 981 .loc 1 704 0 982 0448 E16A ldr r1, [r4, #44] ARM GAS /tmp/cc2grSJV.s page 33 983 044a 03F07842 and r2, r3, #-134217728 703:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLPDIV) != ((RCC_OscInitStruct->PLL.PLLP) << RCC_PLL 984 .loc 1 703 0 985 044e B2EBC16F cmp r2, r1, lsl #27 986 0452 7FF4EAAE bne .L91 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLR) != ((((RCC_OscInitStruct->PLL.PLLR) >> 1U) - 1U 987 .loc 1 705 0 988 0456 226B ldr r2, [r4, #48] 989 0458 5208 lsrs r2, r2, #1 990 045a 013A subs r2, r2, #1 991 045c 03F4C001 and r1, r3, #6291456 704:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLQ) != ((((RCC_OscInitStruct->PLL.PLLQ) >> 1U) - 1U 992 .loc 1 704 0 993 0460 B1EB425F cmp r1, r2, lsl #21 994 0464 7FF4E1AE bne .L91 706:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 995 .loc 1 706 0 996 0468 626B ldr r2, [r4, #52] 997 046a 5208 lsrs r2, r2, #1 998 046c 013A subs r2, r2, #1 999 046e 03F0C063 and r3, r3, #100663296 1000 .LVL115: 705:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (READ_BIT(temp_pllckcfg, RCC_PLLCFGR_PLLR) != ((((RCC_OscInitStruct->PLL.PLLR) >> 1U) - 1U 1001 .loc 1 705 0 1002 0472 B3EB426F cmp r3, r2, lsl #25 319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1003 .loc 1 319 0 1004 0476 14BF ite ne 1005 0478 0120 movne r0, #1 1006 047a 0020 moveq r0, #0 1007 047c D6E6 b .L123 1008 .LVL116: 1009 .L141: 1010 .LBB11: 526:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1011 .loc 1 526 0 discriminator 3 1012 047e 074B ldr r3, .L147 1013 0480 D3F89020 ldr r2, [r3, #144] 1014 0484 42F00402 orr r2, r2, #4 1015 0488 C3F89020 str r2, [r3, #144] 1016 048c D3F89020 ldr r2, [r3, #144] 1017 0490 42F00102 orr r2, r2, #1 1018 0494 C3F89020 str r2, [r3, #144] 1019 0498 44E7 b .L58 1020 .L148: 1021 049a 00BF .align 2 1022 .L147: 1023 049c 00100240 .word 1073876992 1024 04a0 0C809F01 .word 27230220 1025 .LBE11: 1026 .cfi_endproc 1027 .LFE330: 1029 .section .text.HAL_RCC_ClockConfig,"ax",%progbits 1030 .align 1 1031 .p2align 2,,3 1032 .global HAL_RCC_ClockConfig 1033 .syntax unified ARM GAS /tmp/cc2grSJV.s page 34 1034 .thumb 1035 .thumb_func 1036 .fpu fpv4-sp-d16 1038 HAL_RCC_ClockConfig: 1039 .LFB331: 716:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 717:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 718:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Initialize the CPU, AHB and APB buses clocks according to the specified 719:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. 720:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that 721:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. 722:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param FLatency FLASH Latency 723:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * This parameter can be one of the following values: 724:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_0 FLASH 0 Latency cycle 725:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_1 FLASH 1 Latency cycle 726:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_2 FLASH 2 Latency cycles 727:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_3 FLASH 3 Latency cycles 728:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_4 FLASH 4 Latency cycles 729:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_5 FLASH 5 Latency cycles 730:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_6 FLASH 6 Latency cycles 731:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_7 FLASH 7 Latency cycles 732:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_8 FLASH 8 Latency cycles 733:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_9 FLASH 9 Latency cycles 734:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_10 FLASH 10 Latency cycles 735:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_11 FLASH 11 Latency cycles 736:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_12 FLASH 12 Latency cycles 737:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_13 FLASH 13 Latency cycles 738:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_14 FLASH 14 Latency cycles 739:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg FLASH_LATENCY_15 FLASH 15 Latency cycles 740:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 741:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 742:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * and updated by HAL_RCC_GetHCLKFreq() function called within this function 743:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 744:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The HSI is used by default as system clock source after 745:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * startup from Reset, wake-up from STANDBY mode. After restart from Reset, 746:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * the HSI frequency is set to its default value 16 MHz. 747:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 748:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The HSI can be selected as system clock source after 749:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * from STOP modes or in case of failure of the HSE used directly or indirectly 750:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * as system clock (if the Clock Security System CSS is enabled). 751:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 752:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target 753:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * clock source is ready (clock stable after startup delay or PLL locked). 754:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will 755:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * occur when the clock source is ready. 756:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 757:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note You can use HAL_RCC_GetClockConfig() function to know which clock is 758:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * currently used as system clock source. 759:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 760:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Depending on the device voltage range, the software has to set correctly 761:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency 762:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * (for more details refer to section above "Initialization/de-initialization functions") 763:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 764:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 765:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1040 .loc 1 766 0 ARM GAS /tmp/cc2grSJV.s page 35 1041 .cfi_startproc 1042 @ args = 0, pretend = 0, frame = 0 1043 @ frame_needed = 0, uses_anonymous_args = 0 1044 .LVL117: 767:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t tickstart; 768:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t pllfreq; 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t hpre = RCC_SYSCLK_DIV1; 770:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 771:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check Null pointer */ 772:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_ClkInitStruct == NULL) 1045 .loc 1 772 0 1046 0000 0028 cmp r0, #0 1047 0002 00F00581 beq .L227 773:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 775:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 776:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 777:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 778:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); 779:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 780:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 781:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 782:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock 783:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (HCLK) and the supply voltage of the device. */ 784:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 785:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ 786:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (FLatency > __HAL_FLASH_GET_LATENCY()) 1048 .loc 1 786 0 1049 0006 AD4A ldr r2, .L234 766:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t tickstart; 1050 .loc 1 766 0 1051 0008 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} 1052 .LCFI10: 1053 .cfi_def_cfa_offset 32 1054 .cfi_offset 3, -32 1055 .cfi_offset 4, -28 1056 .cfi_offset 5, -24 1057 .cfi_offset 6, -20 1058 .cfi_offset 7, -16 1059 .cfi_offset 8, -12 1060 .cfi_offset 9, -8 1061 .cfi_offset 14, -4 1062 .loc 1 786 0 1063 000c 1368 ldr r3, [r2] 1064 000e 03F00F03 and r3, r3, #15 1065 0012 8B42 cmp r3, r1 1066 0014 0CD2 bcs .L156 787:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 788:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 789:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 1067 .loc 1 789 0 1068 0016 1368 ldr r3, [r2] 1069 0018 23F00F03 bic r3, r3, #15 1070 001c 0B43 orrs r3, r3, r1 1071 001e 1360 str r3, [r2] 790:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 791:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash ARM GAS /tmp/cc2grSJV.s page 36 792:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 793:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (__HAL_FLASH_GET_LATENCY() != FLatency) 1072 .loc 1 793 0 1073 0020 1368 ldr r3, [r2] 1074 0022 03F00F03 and r3, r3, #15 1075 0026 8B42 cmp r3, r1 1076 0028 02D0 beq .L156 1077 .LVL118: 1078 .L155: 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1079 .loc 1 774 0 1080 002a 0120 movs r0, #1 794:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 795:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 796:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 797:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 798:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 799:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 801:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 802:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); 803:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 804:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 806:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 807:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the PLL ready flag */ 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (READ_BIT(RCC->CR, RCC_CR_PLLRDY) == 0U) 809:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 810:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 811:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 812:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Undershoot management when selection PLL as SYSCLK source and frequency above 80Mhz */ 813:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Compute target PLL output frequency */ 814:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllfreq = RCC_GetSysClockFreqFromPLLSource(); 815:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 816:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Intermediate step with HCLK prescaler 2 necessary before to go over 80Mhz */ 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(pllfreq > 80000000U) 818:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) == RCC_SYSCLK_DIV1)) || 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (((((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) && 821:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (RCC_ClkInitStruct->AHBCLKDivider == RCC_SYSCLK_DIV1)))) 822:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** hpre = RCC_SYSCLK_DIV2; 825:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 826:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 827:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 828:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 829:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 830:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 832:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 833:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the HSE ready flag */ 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CR, RCC_CR_HSERDY) == 0U) 835:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 836:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 837:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 838:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } ARM GAS /tmp/cc2grSJV.s page 37 839:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ 840:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 841:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 842:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the HSI ready flag */ 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CR, RCC_CR_HSIRDY) == 0U) 844:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 845:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_ERROR; 846:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 847:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 848:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Overshoot management when going down from PLL as SYSCLK source and frequency above 80Mhz * 849:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllfreq = HAL_RCC_GetSysClockFreq(); 850:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 851:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Intermediate step with HCLK prescaler 2 necessary before to go under 80Mhz */ 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(pllfreq > 80000000U) 853:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV2); 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** hpre = RCC_SYSCLK_DIV2; 856:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 857:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 858:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 859:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource); 861:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 862:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get Start Tick*/ 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 864:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 866:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 868:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 870:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 871:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 872:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 873:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 874:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 876:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 877:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set the highest APB divider in order to ensure that we do not go through 878:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 880:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 882:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 884:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, RCC_HCLK_DIV16); 886:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 887:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 888:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set the new HCLK clock divider */ 889:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 891:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 892:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 893:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 894:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Is intermediate HCLK prescaler 2 applied internally, complete with HCLK prescaler 1 */ 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(hpre == RCC_SYSCLK_DIV2) ARM GAS /tmp/cc2grSJV.s page 38 896:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV1); 898:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 899:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 900:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 901:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (FLatency < __HAL_FLASH_GET_LATENCY()) 903:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 904:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 906:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 907:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 908:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** memory by polling the FLASH_ACR register */ 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 910:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** while (__HAL_FLASH_GET_LATENCY() != FLatency) 912:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 914:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 915:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_TIMEOUT; 916:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 917:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 918:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 919:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 920:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 922:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 923:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 925:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 926:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 927:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 929:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 930:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 932:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 933:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 934:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> (AHBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_HPRE) 936:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 937:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return HAL_InitTick(uwTickPrio); 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1081 .loc 1 939 0 1082 002c BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} 1083 .LVL119: 1084 .L156: 800:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1085 .loc 1 800 0 1086 0030 0368 ldr r3, [r0] 1087 0032 DF07 lsls r7, r3, #31 1088 0034 0446 mov r4, r0 1089 0036 0D46 mov r5, r1 1090 0038 40F18880 bpl .L228 805:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1091 .loc 1 805 0 ARM GAS /tmp/cc2grSJV.s page 39 1092 003c 4268 ldr r2, [r0, #4] 1093 003e 032A cmp r2, #3 1094 0040 00F0AD80 beq .L229 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1095 .loc 1 834 0 1096 0044 9E4B ldr r3, .L234+4 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1097 .loc 1 831 0 1098 0046 022A cmp r2, #2 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1099 .loc 1 834 0 1100 0048 1B68 ldr r3, [r3] 831:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1101 .loc 1 831 0 1102 004a 00F0FF80 beq .L230 843:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1103 .loc 1 843 0 1104 004e 5B05 lsls r3, r3, #21 1105 0050 EBD5 bpl .L155 1106 .LVL120: 1107 .L166: 1108 .LBB22: 1109 .LBB23: 940:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 941:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 942:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @} 943:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 944:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 945:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions 946:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief RCC clocks control functions 947:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 948:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** @verbatim 949:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** =============================================================================== 950:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ##### Peripheral Control functions ##### 951:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** =============================================================================== 952:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** [..] 953:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** This subsection provides a set of functions allowing to: 954:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 955:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Output clock to MCO pin. 956:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Retrieve current clock frequencies. 957:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (+) Enable the Clock Security System. 958:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 959:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** @endverbatim 960:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 961:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 962:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 963:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 964:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Select the clock source to output on MCO pin(PA8). 965:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note PA8 should be configured in alternate function mode. 966:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 967:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * For STM32G4xx family this parameter can have only one value: 968:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). 969:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 970:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * This parameter can be one of the following values: 971:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK MCO output disabled, no clock on MCO 972:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK system clock selected as MCO source 973:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI clock selected as MCO source ARM GAS /tmp/cc2grSJV.s page 40 974:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE clock selected as MCO sourcee 975:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK main PLL clock selected as MCO source 976:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI clock selected as MCO source 977:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE clock selected as MCO source 978:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 clock selected as MCO source for devices with 979:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO prescaler. 980:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * This parameter can be one of the following values: 981:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock 982:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock 983:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock 984:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock 985:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock 986:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 987:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 988:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 990:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 991:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 992:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 993:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); 994:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 995:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 996:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 997:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Prevent unused argument(s) compilation warning if no assert_param check */ 998:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** UNUSED(RCC_MCOx); 999:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1000:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* MCO Clock Enable */ 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MCO1_CLK_ENABLE(); 1002:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1003:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO1_PIN; 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); 1010:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1011:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Mask MCOSEL[] and MCOPRE[] bits then set MCO1 clock source and prescaler */ 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCOSEL | RCC_CFGR_MCOPRE), (RCC_MCOSource | RCC_MCODiv)); 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1014:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1015:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1016:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Return the SYSCLK frequency. 1017:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1018:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real 1019:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined 1020:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * constant and the selected clock source: 1021:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) 1022:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) 1023:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**), 1024:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * HSI_VALUE(*) Value multiplied/divided by the PLL factors. 1025:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32g4xx_hal_conf.h file (default value 1026:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 16 MHz) but the real value may vary depending on the variations 1027:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * in voltage and temperature. 1028:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32g4xx_hal_conf.h file (default value 1029:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real 1030:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may ARM GAS /tmp/cc2grSJV.s page 41 1031:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * have wrong result. 1032:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1033:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional 1034:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * value for HSE crystal. 1035:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1036:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note This function can be used by the user application to compute the 1037:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * baudrate for the communication peripherals or configure other parameters. 1038:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1039:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the 1040:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre 1041:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1042:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1043:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval SYSCLK frequency 1044:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1045:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1047:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t pllvco, pllsource, pllr, pllm; 1048:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t sysclockfreq; 1049:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) 1110 .loc 1 1050 0 1111 0052 9B4B ldr r3, .L234+4 1112 0054 9968 ldr r1, [r3, #8] 1113 0056 01F00C01 and r1, r1, #12 1114 005a 0429 cmp r1, #4 1115 005c 0AD0 beq .L194 1051:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1052:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* HSI used as system clock source */ 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 1054:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) 1116 .loc 1 1055 0 1117 005e 9968 ldr r1, [r3, #8] 1118 0060 01F00C01 and r1, r1, #12 1119 0064 0829 cmp r1, #8 1120 0066 05D0 beq .L194 1056:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1057:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* HSE used as system clock source */ 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; 1059:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else if (__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) 1121 .loc 1 1060 0 1122 0068 9968 ldr r1, [r3, #8] 1123 006a 01F00C01 and r1, r1, #12 1124 006e 0C29 cmp r1, #12 1125 0070 00F0FB80 beq .L231 1126 .LVL121: 1127 .L194: 1128 .LBE23: 1129 .LBE22: 769:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1130 .loc 1 769 0 1131 0074 4FF00008 mov r8, #0 1132 .LVL122: 1133 .L163: 860:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1134 .loc 1 860 0 ARM GAS /tmp/cc2grSJV.s page 42 1135 0078 914E ldr r6, .L234+4 1136 007a B368 ldr r3, [r6, #8] 1137 007c 23F00303 bic r3, r3, #3 1138 0080 1A43 orrs r2, r2, r3 1139 0082 B260 str r2, [r6, #8] 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1140 .loc 1 863 0 1141 0084 FFF7FEFF bl HAL_GetTick 1142 .LVL123: 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1143 .loc 1 867 0 1144 0088 41F28837 movw r7, #5000 863:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1145 .loc 1 863 0 1146 008c 8146 mov r9, r0 1147 .LVL124: 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1148 .loc 1 865 0 1149 008e 05E0 b .L170 1150 .LVL125: 1151 .L171: 867:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1152 .loc 1 867 0 1153 0090 FFF7FEFF bl HAL_GetTick 1154 .LVL126: 1155 0094 A0EB0900 sub r0, r0, r9 1156 0098 B842 cmp r0, r7 1157 009a 74D8 bhi .L180 1158 .L170: 865:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1159 .loc 1 865 0 1160 009c B368 ldr r3, [r6, #8] 1161 009e 6268 ldr r2, [r4, #4] 1162 00a0 03F00C03 and r3, r3, #12 1163 00a4 B3EB820F cmp r3, r2, lsl #2 1164 00a8 F2D1 bne .L171 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1165 .loc 1 875 0 1166 00aa 2368 ldr r3, [r4] 1167 00ac 9F07 lsls r7, r3, #30 1168 00ae 40F1D380 bpl .L172 1169 .LVL127: 1170 .L157: 879:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1171 .loc 1 879 0 1172 00b2 5807 lsls r0, r3, #29 1173 00b4 04D5 bpl .L173 881:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1174 .loc 1 881 0 1175 00b6 8249 ldr r1, .L234+4 1176 00b8 8A68 ldr r2, [r1, #8] 1177 00ba 42F4E062 orr r2, r2, #1792 1178 00be 8A60 str r2, [r1, #8] 1179 .L173: 883:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1180 .loc 1 883 0 1181 00c0 1907 lsls r1, r3, #28 ARM GAS /tmp/cc2grSJV.s page 43 1182 00c2 06D5 bpl .L174 885:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1183 .loc 1 885 0 1184 00c4 7E4A ldr r2, .L234+4 1185 00c6 9368 ldr r3, [r2, #8] 1186 00c8 23F47C53 bic r3, r3, #16128 1187 00cc 43F4E063 orr r3, r3, #1792 1188 00d0 9360 str r3, [r2, #8] 1189 .L174: 890:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1190 .loc 1 890 0 1191 00d2 7B4A ldr r2, .L234+4 1192 00d4 A168 ldr r1, [r4, #8] 1193 00d6 9368 ldr r3, [r2, #8] 1194 00d8 23F0F003 bic r3, r3, #240 1195 00dc 0B43 orrs r3, r3, r1 1196 00de 9360 str r3, [r2, #8] 1197 .L158: 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1198 .loc 1 902 0 1199 00e0 764E ldr r6, .L234 1200 00e2 3268 ldr r2, [r6] 1201 00e4 02F00F02 and r2, r2, #15 1202 00e8 AA42 cmp r2, r5 1203 00ea 37D8 bhi .L176 1204 .L182: 921:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1205 .loc 1 921 0 1206 00ec 2368 ldr r3, [r4] 1207 00ee 5A07 lsls r2, r3, #29 1208 00f0 06D5 bpl .L178 924:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1209 .loc 1 924 0 1210 00f2 7349 ldr r1, .L234+4 1211 00f4 E068 ldr r0, [r4, #12] 1212 00f6 8A68 ldr r2, [r1, #8] 1213 00f8 22F4E062 bic r2, r2, #1792 1214 00fc 0243 orrs r2, r2, r0 1215 00fe 8A60 str r2, [r1, #8] 1216 .L178: 928:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1217 .loc 1 928 0 1218 0100 1B07 lsls r3, r3, #28 1219 0102 43D4 bmi .L232 1220 .L183: 1221 .LBB30: 1222 .LBB31: 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1223 .loc 1 1050 0 1224 0104 6E4A ldr r2, .L234+4 1225 0106 9368 ldr r3, [r2, #8] 1226 0108 03F00C03 and r3, r3, #12 1227 010c 042B cmp r3, #4 1228 010e 00F0D380 beq .L195 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1229 .loc 1 1055 0 1230 0112 9368 ldr r3, [r2, #8] ARM GAS /tmp/cc2grSJV.s page 44 1231 0114 03F00C03 and r3, r3, #12 1232 0118 082B cmp r3, #8 1233 011a 00F09B80 beq .L196 1234 .loc 1 1060 0 1235 011e 9368 ldr r3, [r2, #8] 1236 0120 03F00C03 and r3, r3, #12 1237 0124 0C2B cmp r3, #12 1238 0126 75D0 beq .L233 1061:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1062:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* PLL used as system clock source */ 1063:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1064:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* PLL_VCO = ((HSE_VALUE or HSI_VALUE)/ PLLM) * PLLN 1065:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLR 1066:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1069:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** switch (pllsource) 1071:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1072:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_P 1074:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1075:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1076:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ 1077:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** default: 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_P 1079:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1080:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = pllvco/pllr; 1083:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1084:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1085:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = 0U; 1239 .loc 1 1086 0 1240 0128 0023 movs r3, #0 1241 .L184: 1242 .LBE31: 1243 .LBE30: 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1244 .loc 1 935 0 1245 012a 654A ldr r2, .L234+4 1246 012c 654C ldr r4, .L234+8 1247 .LVL128: 1248 012e 9268 ldr r2, [r2, #8] 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1249 .loc 1 938 0 1250 0130 6548 ldr r0, .L234+12 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1251 .loc 1 935 0 1252 0132 6649 ldr r1, .L234+16 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1253 .loc 1 938 0 1254 0134 0068 ldr r0, [r0] 935:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1255 .loc 1 935 0 1256 0136 C2F30312 ubfx r2, r2, #4, #4 ARM GAS /tmp/cc2grSJV.s page 45 1257 013a A25C ldrb r2, [r4, r2] @ zero_extendqisi2 1258 013c 02F01F02 and r2, r2, #31 1259 0140 D340 lsrs r3, r3, r2 1260 0142 0B60 str r3, [r1] 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1261 .loc 1 939 0 1262 0144 BDE8F843 pop {r3, r4, r5, r6, r7, r8, r9, lr} 1263 .LCFI11: 1264 .cfi_remember_state 1265 .cfi_restore 14 1266 .cfi_restore 9 1267 .cfi_restore 8 1268 .cfi_restore 7 1269 .cfi_restore 6 1270 .cfi_restore 5 1271 .cfi_restore 4 1272 .cfi_restore 3 1273 .cfi_def_cfa_offset 0 1274 .LVL129: 938:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1275 .loc 1 938 0 1276 0148 FFF7FEBF b HAL_InitTick 1277 .LVL130: 1278 .L228: 1279 .LCFI12: 1280 .cfi_restore_state 875:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1281 .loc 1 875 0 1282 014c 9E07 lsls r6, r3, #30 1283 014e B0D4 bmi .L157 902:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1284 .loc 1 902 0 1285 0150 5A4E ldr r6, .L234 1286 0152 3268 ldr r2, [r6] 1287 0154 02F00F02 and r2, r2, #15 1288 0158 AA42 cmp r2, r5 1289 015a C7D9 bls .L182 1290 .LVL131: 1291 .L176: 905:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1292 .loc 1 905 0 1293 015c 3268 ldr r2, [r6] 1294 015e 22F00F02 bic r2, r2, #15 1295 0162 2A43 orrs r2, r2, r5 1296 0164 3260 str r2, [r6] 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1297 .loc 1 909 0 1298 0166 FFF7FEFF bl HAL_GetTick 1299 .LVL132: 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1300 .loc 1 913 0 1301 016a 41F28837 movw r7, #5000 909:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1302 .loc 1 909 0 1303 016e 8046 mov r8, r0 1304 .LVL133: 1305 .L179: ARM GAS /tmp/cc2grSJV.s page 46 911:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1306 .loc 1 911 0 1307 0170 3368 ldr r3, [r6] 1308 0172 03F00F03 and r3, r3, #15 1309 0176 AB42 cmp r3, r5 1310 0178 B8D0 beq .L182 913:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1311 .loc 1 913 0 1312 017a FFF7FEFF bl HAL_GetTick 1313 .LVL134: 1314 017e A0EB0800 sub r0, r0, r8 1315 0182 B842 cmp r0, r7 1316 0184 F4D9 bls .L179 1317 .LVL135: 1318 .L180: 869:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1319 .loc 1 869 0 1320 0186 0320 movs r0, #3 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1321 .loc 1 939 0 1322 0188 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} 1323 .LVL136: 1324 .L232: 931:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1325 .loc 1 931 0 1326 018c 4C4A ldr r2, .L234+4 1327 018e 2169 ldr r1, [r4, #16] 1328 0190 9368 ldr r3, [r2, #8] 1329 0192 23F46053 bic r3, r3, #14336 1330 0196 43EAC103 orr r3, r3, r1, lsl #3 1331 019a 9360 str r3, [r2, #8] 1332 019c B2E7 b .L183 1333 .LVL137: 1334 .L229: 808:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1335 .loc 1 808 0 1336 019e 4849 ldr r1, .L234+4 1337 .LVL138: 1338 01a0 0868 ldr r0, [r1] 1339 .LVL139: 1340 01a2 8001 lsls r0, r0, #6 1341 01a4 7FF541AF bpl .L155 1342 .LBB37: 1343 .LBB38: 1087:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1088:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1089:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return sysclockfreq; 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1091:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1092:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1093:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Return the HCLK frequency. 1094:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the 1095:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect 1096:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * 1097:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. 1098:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval HCLK frequency in Hz 1099:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ ARM GAS /tmp/cc2grSJV.s page 47 1100:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return SystemCoreClock; 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1104:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1105:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1106:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Return the PCLK1 frequency. 1107:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the 1108:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec 1109:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval PCLK1 frequency in Hz 1110:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1111:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1113:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> (APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1) >> RCC_CFGR_P 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1116:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1117:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1118:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Return the PCLK2 frequency. 1119:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the 1120:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec 1121:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval PCLK2 frequency in Hz 1122:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1123:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1125:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq()>> (APBPrescTable[READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> RCC_CFGR_PP 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1128:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1129:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1130:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Configure the RCC_OscInitStruct according to the internal 1131:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * RCC configuration registers. 1132:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 1133:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * will be configured. 1134:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 1135:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1136:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1138:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 1139:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != (void *)NULL); 1140:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1141:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | \ 1143:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLA 1144:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1145:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CR, RCC_CR_HSEBYP) == RCC_CR_HSEBYP) 1147:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; 1149:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else if(READ_BIT(RCC->CR, RCC_CR_HSEON) == RCC_CR_HSEON) 1151:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; 1153:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1154:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1155:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; ARM GAS /tmp/cc2grSJV.s page 48 1157:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1158:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1159:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CR, RCC_CR_HSION) == RCC_CR_HSION) 1161:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1162:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; 1163:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1164:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1165:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; 1167:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1168:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = READ_BIT(RCC->ICSCR, RCC_ICSCR_HSITRIM) >> RCC_ICSCR_HSI 1170:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1171:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ 1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) 1173:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; 1175:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else if(READ_BIT(RCC->BDCR, RCC_BDCR_LSEON) == RCC_BDCR_LSEON) 1177:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; 1179:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1180:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1181:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; 1183:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1184:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1185:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ 1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CSR, RCC_CSR_LSION) == RCC_CSR_LSION) 1187:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1188:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; 1189:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1190:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1191:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1192:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; 1193:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1194:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1195:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the HSI48 configuration ---------------------------------------------*/ 1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CRRCR, RCC_CRRCR_HSI48ON) == RCC_CRRCR_HSI48ON) 1197:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1198:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSI48State = RCC_HSI48_ON; 1199:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1200:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1201:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1202:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->HSI48State = RCC_HSI48_OFF; 1203:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1204:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1205:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ 1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(READ_BIT(RCC->CR, RCC_CR_PLLON) == RCC_CR_PLLON) 1207:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1208:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; 1209:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1210:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** else 1211:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; 1213:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } ARM GAS /tmp/cc2grSJV.s page 49 1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); 1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) 1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; 1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos 1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLR = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos 1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_ 1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1221:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1222:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1223:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Configure the RCC_ClkInitStruct according to the internal 1224:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * RCC configuration registers. 1225:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 1226:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * will be configured. 1227:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. 1228:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 1229:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1230:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1232:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 1233:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != (void *)NULL); 1234:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** assert_param(pFLatency != (void *)NULL); 1235:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1236:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ 1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 1238:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1239:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = READ_BIT(RCC->CFGR, RCC_CFGR_SW); 1241:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1242:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ 1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_HPRE); 1244:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1245:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = READ_BIT(RCC->CFGR, RCC_CFGR_PPRE1); 1247:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1248:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (READ_BIT(RCC->CFGR, RCC_CFGR_PPRE2) >> 3U); 1250:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1251:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** *pFLatency = __HAL_FLASH_GET_LATENCY(); 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1254:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1255:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1256:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Enable the Clock Security System. 1257:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator 1258:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the 1259:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), 1260:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to 1261:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. 1262:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The Clock Security System can only be cleared by reset. 1263:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 1264:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1265:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_CSSON) ; 1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1269:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1270:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** ARM GAS /tmp/cc2grSJV.s page 50 1271:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Enable the LSE Clock Security System. 1272:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note If a failure is detected on the external 32 kHz oscillator, 1273:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * the LSE clock is no longer supplied to the RTC but no hardware action 1274:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * is made to the registers. If enabled, an interrupt will be generated 1275:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * and handle through @ref RCCEx_EXTI_LINE_LSECSS 1276:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The Clock Security System can only be cleared by reset or after a LSE failure detection 1277:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 1278:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1279:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_EnableLSECSS(void) 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; 1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1283:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1284:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1285:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Disable the LSE Clock Security System. 1286:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note After LSE failure detection, the software must disable LSECSSON 1287:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note The Clock Security System can only be cleared by reset otherwise. 1288:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 1289:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1290:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_DisableLSECSS(void) 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; 1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1294:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1295:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1296:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Handle the RCC Clock Security System interrupt request. 1297:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). 1298:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval None 1299:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1300:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1302:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check RCC CSSF interrupt flag */ 1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) 1304:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1305:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ 1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_RCC_CSSCallback(); 1307:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1308:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ 1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); 1310:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1312:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1313:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1314:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback. 1315:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval none 1316:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1317:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) 1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1319:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* NOTE : This function should not be modified, when the callback is needed, 1320:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** the HAL_RCC_CSSCallback should be implemented in the user file 1321:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1323:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1324:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1325:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @} 1326:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1327:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** ARM GAS /tmp/cc2grSJV.s page 51 1328:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1329:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @} 1330:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1331:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1332:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 1333:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Functions 1334:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @{ 1335:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1336:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1337:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /** 1338:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @brief Compute SYSCLK frequency based on PLL SYSCLK source. 1339:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** * @retval SYSCLK frequency 1340:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1341:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** static uint32_t RCC_GetSysClockFreqFromPLLSource(void) 1342:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1343:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t pllvco, pllsource, pllr, pllm; 1344:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t sysclockfreq; 1345:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1346:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE/ PLLM) * PLLN 1347:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLR 1348:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** */ 1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllsource = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC); 1344 .loc 1 1349 0 1345 01a8 CE68 ldr r6, [r1, #12] 1346 .LVL140: 1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1347 .loc 1 1350 0 1348 01aa C868 ldr r0, [r1, #12] 1349 .LBE38: 1350 .LBE37: 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1351 .loc 1 817 0 1352 01ac 484F ldr r7, .L234+20 1353 .LBB40: 1354 .LBB39: 1349:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1355 .loc 1 1349 0 1356 01ae 06F00306 and r6, r6, #3 1357 .LVL141: 1351:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1352:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** switch (pllsource) 1358 .loc 1 1352 0 1359 01b2 032E cmp r6, #3 1353:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1354:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** case RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */ 1355:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllvco = (HSE_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos 1360 .loc 1 1355 0 1361 01b4 CE68 ldr r6, [r1, #12] 1362 .LVL142: 1363 01b6 0CBF ite eq 1364 01b8 4649 ldreq r1, .L234+24 1356:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1357:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1358:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** case RCC_PLLSOURCE_HSI: /* HSI used as PLL clock source */ 1359:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** default: 1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllvco = (HSI_VALUE / pllm) * (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos 1365 .loc 1 1360 0 ARM GAS /tmp/cc2grSJV.s page 52 1366 01ba 4749 ldrne r1, .L234+28 1350:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1367 .loc 1 1350 0 1368 01bc C0F30310 ubfx r0, r0, #4, #4 1369 01c0 0130 adds r0, r0, #1 1370 .LVL143: 1371 .loc 1 1360 0 1372 01c2 B1FBF0F1 udiv r1, r1, r0 1373 01c6 C6F30620 ubfx r0, r6, #8, #7 1374 .LVL144: 1361:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1362:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1363:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1364:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllr = ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos) + 1U ) * 2U; 1375 .loc 1 1364 0 1376 01ca 3D4E ldr r6, .L234+4 1360:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1377 .loc 1 1360 0 1378 01cc 01FB00F1 mul r1, r1, r0 1379 .LVL145: 1380 .loc 1 1364 0 1381 01d0 F068 ldr r0, [r6, #12] 1382 .LVL146: 1383 01d2 C0F34160 ubfx r0, r0, #25, #2 1384 01d6 0130 adds r0, r0, #1 1385 01d8 4000 lsls r0, r0, #1 1365:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = pllvco/pllr; 1386 .loc 1 1365 0 1387 01da B1FBF0F1 udiv r1, r1, r0 1388 .LBE39: 1389 .LBE40: 817:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1390 .loc 1 817 0 1391 01de B942 cmp r1, r7 1392 01e0 7FF648AF bls .L194 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (((((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) && 1393 .loc 1 819 0 1394 01e4 B168 ldr r1, [r6, #8] 1395 01e6 11F0F00F tst r1, #240 1396 01ea 07D0 beq .L164 819:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (((((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) && 1397 .loc 1 819 0 is_stmt 0 discriminator 1 1398 01ec 13F00208 ands r8, r3, #2 1399 01f0 3FF442AF beq .L163 820:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** (RCC_ClkInitStruct->AHBCLKDivider == RCC_SYSCLK_DIV1)))) 1400 .loc 1 820 0 is_stmt 1 1401 01f4 A368 ldr r3, [r4, #8] 1402 01f6 002B cmp r3, #0 1403 01f8 7FF43CAF bne .L194 1404 .L164: 823:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** hpre = RCC_SYSCLK_DIV2; 1405 .loc 1 823 0 1406 01fc 3049 ldr r1, .L234+4 1407 01fe 8B68 ldr r3, [r1, #8] 1408 0200 23F0F003 bic r3, r3, #240 1409 0204 43F08003 orr r3, r3, #128 1410 0208 8B60 str r3, [r1, #8] ARM GAS /tmp/cc2grSJV.s page 53 1411 .LVL147: 824:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1412 .loc 1 824 0 1413 020a 4FF08008 mov r8, #128 1414 020e 33E7 b .L163 1415 .LVL148: 1416 .L227: 1417 .LCFI13: 1418 .cfi_def_cfa_offset 0 1419 .cfi_restore 3 1420 .cfi_restore 4 1421 .cfi_restore 5 1422 .cfi_restore 6 1423 .cfi_restore 7 1424 .cfi_restore 8 1425 .cfi_restore 9 1426 .cfi_restore 14 774:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1427 .loc 1 774 0 1428 0210 0120 movs r0, #1 1429 .LVL149: 939:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1430 .loc 1 939 0 1431 0212 7047 bx lr 1432 .LVL150: 1433 .L233: 1434 .LCFI14: 1435 .cfi_def_cfa_offset 32 1436 .cfi_offset 3, -32 1437 .cfi_offset 4, -28 1438 .cfi_offset 5, -24 1439 .cfi_offset 6, -20 1440 .cfi_offset 7, -16 1441 .cfi_offset 8, -12 1442 .cfi_offset 9, -8 1443 .cfi_offset 14, -4 1444 .LBB41: 1445 .LBB34: 1446 .LBB32: 1447 .LBB33: 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1448 .loc 1 1067 0 1449 0214 D068 ldr r0, [r2, #12] 1450 .LVL151: 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1451 .loc 1 1068 0 1452 0216 D368 ldr r3, [r2, #12] 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1453 .loc 1 1073 0 1454 0218 D268 ldr r2, [r2, #12] 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1455 .loc 1 1067 0 1456 021a 00F00300 and r0, r0, #3 1457 .LVL152: 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1458 .loc 1 1068 0 1459 021e C3F30313 ubfx r3, r3, #4, #4 ARM GAS /tmp/cc2grSJV.s page 54 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1460 .loc 1 1070 0 1461 0222 0328 cmp r0, #3 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1462 .loc 1 1078 0 1463 0224 C2F30622 ubfx r2, r2, #8, #7 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1464 .loc 1 1068 0 1465 0228 03F10101 add r1, r3, #1 1466 .LVL153: 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1467 .loc 1 1073 0 1468 022c 0CBF ite eq 1469 022e 294B ldreq r3, .L234+24 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1470 .loc 1 1078 0 1471 0230 294B ldrne r3, .L234+28 1472 0232 B3FBF1F3 udiv r3, r3, r1 1473 0236 03FB02F3 mul r3, r3, r2 1474 .LVL154: 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = pllvco/pllr; 1475 .loc 1 1081 0 1476 023a 214A ldr r2, .L234+4 1477 023c D268 ldr r2, [r2, #12] 1478 .LVL155: 1479 023e C2F34162 ubfx r2, r2, #25, #2 1480 .LVL156: 1481 0242 0132 adds r2, r2, #1 1482 0244 5200 lsls r2, r2, #1 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1483 .loc 1 1082 0 1484 0246 B3FBF2F3 udiv r3, r3, r2 1485 .LVL157: 1486 024a 6EE7 b .L184 1487 .LVL158: 1488 .L230: 1489 .LBE33: 1490 .LBE32: 1491 .LBE34: 1492 .LBE41: 834:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1493 .loc 1 834 0 1494 024c 9903 lsls r1, r3, #14 1495 .LVL159: 1496 024e 3FF500AF bmi .L166 1497 0252 EAE6 b .L155 1498 .LVL160: 1499 .L196: 1500 .LBB42: 1501 .LBB35: 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1502 .loc 1 1058 0 1503 0254 1F4B ldr r3, .L234+24 1504 0256 68E7 b .L184 1505 .LVL161: 1506 .L172: 1507 .LBE35: ARM GAS /tmp/cc2grSJV.s page 55 1508 .LBE42: 895:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1509 .loc 1 895 0 1510 0258 B8F1000F cmp r8, #0 1511 025c 3FF440AF beq .L158 897:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1512 .loc 1 897 0 1513 0260 B368 ldr r3, [r6, #8] 1514 0262 23F0F003 bic r3, r3, #240 1515 0266 B360 str r3, [r6, #8] 1516 0268 3AE7 b .L158 1517 .LVL162: 1518 .L231: 1519 .LBB43: 1520 .LBB28: 1521 .LBB24: 1522 .LBB25: 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1523 .loc 1 1067 0 1524 026a D868 ldr r0, [r3, #12] 1525 .LVL163: 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1526 .loc 1 1068 0 1527 026c D968 ldr r1, [r3, #12] 1528 .LBE25: 1529 .LBE24: 1530 .LBE28: 1531 .LBE43: 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1532 .loc 1 852 0 1533 026e 184E ldr r6, .L234+20 1534 .LBB44: 1535 .LBB29: 1536 .LBB27: 1537 .LBB26: 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1538 .loc 1 1067 0 1539 0270 00F00300 and r0, r0, #3 1540 .LVL164: 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1541 .loc 1 1070 0 1542 0274 0328 cmp r0, #3 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1543 .loc 1 1073 0 1544 0276 D868 ldr r0, [r3, #12] 1545 .LVL165: 1546 0278 0CBF ite eq 1547 027a 164B ldreq r3, .L234+24 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1548 .loc 1 1078 0 1549 027c 164B ldrne r3, .L234+28 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1550 .loc 1 1068 0 1551 027e C1F30311 ubfx r1, r1, #4, #4 1552 0282 0131 adds r1, r1, #1 1553 .LVL166: 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; ARM GAS /tmp/cc2grSJV.s page 56 1554 .loc 1 1078 0 1555 0284 B3FBF1F3 udiv r3, r3, r1 1556 0288 C0F30621 ubfx r1, r0, #8, #7 1557 .LVL167: 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = pllvco/pllr; 1558 .loc 1 1081 0 1559 028c 0C48 ldr r0, .L234+4 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1560 .loc 1 1078 0 1561 028e 03FB01F3 mul r3, r3, r1 1562 .LVL168: 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = pllvco/pllr; 1563 .loc 1 1081 0 1564 0292 C168 ldr r1, [r0, #12] 1565 .LVL169: 1566 0294 C1F34161 ubfx r1, r1, #25, #2 1567 0298 0131 adds r1, r1, #1 1568 029a 4900 lsls r1, r1, #1 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1569 .loc 1 1082 0 1570 029c B3FBF1F3 udiv r3, r3, r1 1571 .LBE26: 1572 .LBE27: 1573 .LBE29: 1574 .LBE44: 852:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1575 .loc 1 852 0 1576 02a0 B342 cmp r3, r6 1577 02a2 7FF6E7AE bls .L194 854:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** hpre = RCC_SYSCLK_DIV2; 1578 .loc 1 854 0 1579 02a6 8368 ldr r3, [r0, #8] 1580 02a8 23F0F003 bic r3, r3, #240 1581 02ac 43F08003 orr r3, r3, #128 1582 02b0 8360 str r3, [r0, #8] 1583 .LVL170: 855:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1584 .loc 1 855 0 1585 02b2 4FF08008 mov r8, #128 1586 02b6 DFE6 b .L163 1587 .LVL171: 1588 .L195: 1589 .LBB45: 1590 .LBB36: 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1591 .loc 1 1053 0 1592 02b8 074B ldr r3, .L234+28 1593 02ba 36E7 b .L184 1594 .L235: 1595 .align 2 1596 .L234: 1597 02bc 00200240 .word 1073881088 1598 02c0 00100240 .word 1073876992 1599 02c4 00000000 .word AHBPrescTable 1600 02c8 00000000 .word uwTickPrio 1601 02cc 00000000 .word SystemCoreClock 1602 02d0 00B4C404 .word 80000000 ARM GAS /tmp/cc2grSJV.s page 57 1603 02d4 00366E01 .word 24000000 1604 02d8 0024F400 .word 16000000 1605 .LBE36: 1606 .LBE45: 1607 .cfi_endproc 1608 .LFE331: 1610 .section .text.HAL_RCC_MCOConfig,"ax",%progbits 1611 .align 1 1612 .p2align 2,,3 1613 .global HAL_RCC_MCOConfig 1614 .syntax unified 1615 .thumb 1616 .thumb_func 1617 .fpu fpv4-sp-d16 1619 HAL_RCC_MCOConfig: 1620 .LFB332: 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 1621 .loc 1 989 0 1622 .cfi_startproc 1623 @ args = 0, pretend = 0, frame = 24 1624 @ frame_needed = 0, uses_anonymous_args = 0 1625 .LVL172: 1626 0000 70B5 push {r4, r5, r6, lr} 1627 .LCFI15: 1628 .cfi_def_cfa_offset 16 1629 .cfi_offset 4, -16 1630 .cfi_offset 5, -12 1631 .cfi_offset 6, -8 1632 .cfi_offset 14, -4 1633 .LBB46: 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1634 .loc 1 1001 0 1635 0002 124C ldr r4, .L238 1636 0004 E36C ldr r3, [r4, #76] 1637 0006 43F00103 orr r3, r3, #1 1638 000a E364 str r3, [r4, #76] 1639 000c E36C ldr r3, [r4, #76] 1640 .LBE46: 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 1641 .loc 1 989 0 1642 000e 86B0 sub sp, sp, #24 1643 .LCFI16: 1644 .cfi_def_cfa_offset 40 1645 .LBB47: 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1646 .loc 1 1001 0 1647 0010 03F00103 and r3, r3, #1 1648 0014 0093 str r3, [sp] 1649 .LBE47: 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 1650 .loc 1 989 0 1651 0016 0D46 mov r5, r1 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1652 .loc 1 1004 0 1653 0018 4FF48073 mov r3, #256 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 1654 .loc 1 1005 0 ARM GAS /tmp/cc2grSJV.s page 58 1655 001c 0221 movs r1, #2 1656 .LVL173: 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1657 .loc 1 1006 0 1658 001e 0320 movs r0, #3 1659 .LVL174: 1004:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1660 .loc 1 1004 0 1661 0020 0193 str r3, [sp, #4] 1005:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 1662 .loc 1 1005 0 1663 0022 0291 str r1, [sp, #8] 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 1664 .loc 1 1007 0 1665 0024 0023 movs r3, #0 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1666 .loc 1 1009 0 1667 0026 01A9 add r1, sp, #4 1006:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1668 .loc 1 1006 0 1669 0028 0490 str r0, [sp, #16] 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1670 .loc 1 1009 0 1671 002a 4FF09040 mov r0, #1207959552 989:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 1672 .loc 1 989 0 1673 002e 1646 mov r6, r2 1007:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 1674 .loc 1 1007 0 1675 0030 0393 str r3, [sp, #12] 1676 .LBB48: 1001:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1677 .loc 1 1001 0 1678 0032 009A ldr r2, [sp] 1679 .LVL175: 1680 .LBE48: 1008:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); 1681 .loc 1 1008 0 1682 0034 0593 str r3, [sp, #20] 1009:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1683 .loc 1 1009 0 1684 0036 FFF7FEFF bl HAL_GPIO_Init 1685 .LVL176: 1012:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1686 .loc 1 1012 0 1687 003a A168 ldr r1, [r4, #8] 1688 003c 21F0FE41 bic r1, r1, #2130706432 1689 0040 3143 orrs r1, r1, r6 1690 0042 2943 orrs r1, r1, r5 1691 0044 A160 str r1, [r4, #8] 1013:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1692 .loc 1 1013 0 1693 0046 06B0 add sp, sp, #24 1694 .LCFI17: 1695 .cfi_def_cfa_offset 16 1696 @ sp needed 1697 0048 70BD pop {r4, r5, r6, pc} ARM GAS /tmp/cc2grSJV.s page 59 1698 .LVL177: 1699 .L239: 1700 004a 00BF .align 2 1701 .L238: 1702 004c 00100240 .word 1073876992 1703 .cfi_endproc 1704 .LFE332: 1706 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits 1707 .align 1 1708 .p2align 2,,3 1709 .global HAL_RCC_GetSysClockFreq 1710 .syntax unified 1711 .thumb 1712 .thumb_func 1713 .fpu fpv4-sp-d16 1715 HAL_RCC_GetSysClockFreq: 1716 .LFB333: 1046:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** uint32_t pllvco, pllsource, pllr, pllm; 1717 .loc 1 1046 0 1718 .cfi_startproc 1719 @ args = 0, pretend = 0, frame = 0 1720 @ frame_needed = 0, uses_anonymous_args = 0 1721 @ link register save eliminated. 1050:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1722 .loc 1 1050 0 1723 0000 184B ldr r3, .L250 1724 0002 9A68 ldr r2, [r3, #8] 1725 0004 02F00C02 and r2, r2, #12 1726 0008 042A cmp r2, #4 1727 000a 27D0 beq .L245 1055:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1728 .loc 1 1055 0 1729 000c 9A68 ldr r2, [r3, #8] 1730 000e 02F00C02 and r2, r2, #12 1731 0012 082A cmp r2, #8 1732 0014 24D0 beq .L246 1060:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1733 .loc 1 1060 0 1734 0016 9A68 ldr r2, [r3, #8] 1735 0018 02F00C02 and r2, r2, #12 1736 001c 0C2A cmp r2, #12 1737 001e 01D0 beq .L249 1086:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1738 .loc 1 1086 0 1739 0020 0020 movs r0, #0 1740 .LVL178: 1090:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1741 .loc 1 1090 0 1742 0022 7047 bx lr 1743 .LVL179: 1744 .L249: 1745 .LBB51: 1746 .LBB52: 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1747 .loc 1 1067 0 1748 0024 D968 ldr r1, [r3, #12] 1749 .LVL180: ARM GAS /tmp/cc2grSJV.s page 60 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1750 .loc 1 1068 0 1751 0026 D868 ldr r0, [r3, #12] 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1752 .loc 1 1073 0 1753 0028 DB68 ldr r3, [r3, #12] 1067:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** pllm = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) + 1U ; 1754 .loc 1 1067 0 1755 002a 01F00301 and r1, r1, #3 1756 .LVL181: 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1757 .loc 1 1068 0 1758 002e C0F30310 ubfx r0, r0, #4, #4 1070:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1759 .loc 1 1070 0 1760 0032 0329 cmp r1, #3 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1761 .loc 1 1078 0 1762 0034 C3F30623 ubfx r3, r3, #8, #7 1068:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1763 .loc 1 1068 0 1764 0038 00F10102 add r2, r0, #1 1765 .LVL182: 1073:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1766 .loc 1 1073 0 1767 003c 0CBF ite eq 1768 003e 0A48 ldreq r0, .L250+4 1078:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** break; 1769 .loc 1 1078 0 1770 0040 0A48 ldrne r0, .L250+8 1771 0042 B0FBF2F0 udiv r0, r0, r2 1772 0046 00FB03F0 mul r0, r0, r3 1773 .LVL183: 1081:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** sysclockfreq = pllvco/pllr; 1774 .loc 1 1081 0 1775 004a 064B ldr r3, .L250 1776 004c DB68 ldr r3, [r3, #12] 1777 .LVL184: 1778 004e C3F34163 ubfx r3, r3, #25, #2 1779 .LVL185: 1780 0052 0133 adds r3, r3, #1 1781 0054 5B00 lsls r3, r3, #1 1082:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1782 .loc 1 1082 0 1783 0056 B0FBF3F0 udiv r0, r0, r3 1784 .LVL186: 1785 005a 7047 bx lr 1786 .L245: 1787 .LBE52: 1788 .LBE51: 1053:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1789 .loc 1 1053 0 1790 005c 0348 ldr r0, .L250+8 1791 005e 7047 bx lr 1792 .L246: 1058:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1793 .loc 1 1058 0 ARM GAS /tmp/cc2grSJV.s page 61 1794 0060 0148 ldr r0, .L250+4 1795 0062 7047 bx lr 1796 .L251: 1797 .align 2 1798 .L250: 1799 0064 00100240 .word 1073876992 1800 0068 00366E01 .word 24000000 1801 006c 0024F400 .word 16000000 1802 .cfi_endproc 1803 .LFE333: 1805 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits 1806 .align 1 1807 .p2align 2,,3 1808 .global HAL_RCC_GetHCLKFreq 1809 .syntax unified 1810 .thumb 1811 .thumb_func 1812 .fpu fpv4-sp-d16 1814 HAL_RCC_GetHCLKFreq: 1815 .LFB334: 1101:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** return SystemCoreClock; 1816 .loc 1 1101 0 1817 .cfi_startproc 1818 @ args = 0, pretend = 0, frame = 0 1819 @ frame_needed = 0, uses_anonymous_args = 0 1820 @ link register save eliminated. 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1821 .loc 1 1102 0 1822 0000 014B ldr r3, .L253 1103:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1823 .loc 1 1103 0 1824 0002 1868 ldr r0, [r3] 1825 0004 7047 bx lr 1826 .L254: 1827 0006 00BF .align 2 1828 .L253: 1829 0008 00000000 .word SystemCoreClock 1830 .cfi_endproc 1831 .LFE334: 1833 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits 1834 .align 1 1835 .p2align 2,,3 1836 .global HAL_RCC_GetPCLK1Freq 1837 .syntax unified 1838 .thumb 1839 .thumb_func 1840 .fpu fpv4-sp-d16 1842 HAL_RCC_GetPCLK1Freq: 1843 .LFB335: 1112:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 1844 .loc 1 1112 0 1845 .cfi_startproc 1846 @ args = 0, pretend = 0, frame = 0 1847 @ frame_needed = 0, uses_anonymous_args = 0 1848 @ link register save eliminated. 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1849 .loc 1 1114 0 ARM GAS /tmp/cc2grSJV.s page 62 1850 0000 054B ldr r3, .L256 1851 0002 064A ldr r2, .L256+4 1852 0004 9B68 ldr r3, [r3, #8] 1853 .LBB53: 1854 .LBB54: 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1855 .loc 1 1102 0 1856 0006 0649 ldr r1, .L256+8 1857 .LBE54: 1858 .LBE53: 1114:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1859 .loc 1 1114 0 1860 0008 C3F30223 ubfx r3, r3, #8, #3 1861 000c 0868 ldr r0, [r1] 1862 000e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 1863 0010 03F01F03 and r3, r3, #31 1115:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1864 .loc 1 1115 0 1865 0014 D840 lsrs r0, r0, r3 1866 0016 7047 bx lr 1867 .L257: 1868 .align 2 1869 .L256: 1870 0018 00100240 .word 1073876992 1871 001c 00000000 .word APBPrescTable 1872 0020 00000000 .word SystemCoreClock 1873 .cfi_endproc 1874 .LFE335: 1876 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits 1877 .align 1 1878 .p2align 2,,3 1879 .global HAL_RCC_GetPCLK2Freq 1880 .syntax unified 1881 .thumb 1882 .thumb_func 1883 .fpu fpv4-sp-d16 1885 HAL_RCC_GetPCLK2Freq: 1886 .LFB336: 1124:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 1887 .loc 1 1124 0 1888 .cfi_startproc 1889 @ args = 0, pretend = 0, frame = 0 1890 @ frame_needed = 0, uses_anonymous_args = 0 1891 @ link register save eliminated. 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1892 .loc 1 1126 0 1893 0000 054B ldr r3, .L259 1894 0002 064A ldr r2, .L259+4 1895 0004 9B68 ldr r3, [r3, #8] 1896 .LBB55: 1897 .LBB56: 1102:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1898 .loc 1 1102 0 1899 0006 0649 ldr r1, .L259+8 1900 .LBE56: 1901 .LBE55: 1126:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } ARM GAS /tmp/cc2grSJV.s page 63 1902 .loc 1 1126 0 1903 0008 C3F3C223 ubfx r3, r3, #11, #3 1904 000c 0868 ldr r0, [r1] 1905 000e D35C ldrb r3, [r2, r3] @ zero_extendqisi2 1906 0010 03F01F03 and r3, r3, #31 1127:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1907 .loc 1 1127 0 1908 0014 D840 lsrs r0, r0, r3 1909 0016 7047 bx lr 1910 .L260: 1911 .align 2 1912 .L259: 1913 0018 00100240 .word 1073876992 1914 001c 00000000 .word APBPrescTable 1915 0020 00000000 .word SystemCoreClock 1916 .cfi_endproc 1917 .LFE336: 1919 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits 1920 .align 1 1921 .p2align 2,,3 1922 .global HAL_RCC_GetOscConfig 1923 .syntax unified 1924 .thumb 1925 .thumb_func 1926 .fpu fpv4-sp-d16 1928 HAL_RCC_GetOscConfig: 1929 .LFB337: 1137:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 1930 .loc 1 1137 0 1931 .cfi_startproc 1932 @ args = 0, pretend = 0, frame = 0 1933 @ frame_needed = 0, uses_anonymous_args = 0 1934 @ link register save eliminated. 1935 .LVL187: 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLA 1936 .loc 1 1142 0 1937 0000 2F22 movs r2, #47 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1938 .loc 1 1146 0 1939 0002 2B4B ldr r3, .L272 1142:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLA 1940 .loc 1 1142 0 1941 0004 0260 str r2, [r0] 1146:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1942 .loc 1 1146 0 1943 0006 1A68 ldr r2, [r3] 1944 0008 5103 lsls r1, r2, #13 1945 000a 40D5 bpl .L262 1148:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1946 .loc 1 1148 0 1947 000c 4FF4A023 mov r3, #327680 1948 0010 4360 str r3, [r0, #4] 1949 .L263: 1160:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1950 .loc 1 1160 0 1951 0012 274B ldr r3, .L272 1952 0014 1A68 ldr r2, [r3] ARM GAS /tmp/cc2grSJV.s page 64 1166:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1953 .loc 1 1166 0 1954 0016 02F48072 and r2, r2, #256 1955 001a C260 str r2, [r0, #12] 1169:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 1956 .loc 1 1169 0 1957 001c 5A68 ldr r2, [r3, #4] 1958 001e C2F30662 ubfx r2, r2, #24, #7 1959 0022 0261 str r2, [r0, #16] 1172:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1960 .loc 1 1172 0 1961 0024 D3F89020 ldr r2, [r3, #144] 1962 0028 5207 lsls r2, r2, #29 1963 002a 38D5 bpl .L266 1174:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1964 .loc 1 1174 0 1965 002c 0523 movs r3, #5 1966 002e 8360 str r3, [r0, #8] 1967 .L267: 1186:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1968 .loc 1 1186 0 1969 0030 1F4B ldr r3, .L272 1970 0032 D3F89420 ldr r2, [r3, #148] 1971 0036 02F00102 and r2, r2, #1 1972 003a 4261 str r2, [r0, #20] 1196:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1973 .loc 1 1196 0 1974 003c D3F89820 ldr r2, [r3, #152] 1975 0040 02F00102 and r2, r2, #1 1976 0044 8261 str r2, [r0, #24] 1206:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 1977 .loc 1 1206 0 1978 0046 1A68 ldr r2, [r3] 1212:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 1979 .loc 1 1212 0 1980 0048 12F0807F tst r2, #16777216 1981 004c 14BF ite ne 1982 004e 0222 movne r2, #2 1983 0050 0122 moveq r2, #1 1984 0052 C261 str r2, [r0, #28] 1214:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> RCC_PLLCFGR_PLLM_Pos) 1985 .loc 1 1214 0 1986 0054 DA68 ldr r2, [r3, #12] 1987 0056 02F00302 and r2, r2, #3 1988 005a 0262 str r2, [r0, #32] 1215:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos; 1989 .loc 1 1215 0 1990 005c DA68 ldr r2, [r3, #12] 1991 005e C2F30312 ubfx r2, r2, #4, #4 1992 0062 0132 adds r2, r2, #1 1993 0064 4262 str r2, [r0, #36] 1216:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Pos 1994 .loc 1 1216 0 1995 0066 DA68 ldr r2, [r3, #12] 1996 0068 C2F30622 ubfx r2, r2, #8, #7 1997 006c 8262 str r2, [r0, #40] 1217:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLR = (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos ARM GAS /tmp/cc2grSJV.s page 65 1998 .loc 1 1217 0 1999 006e DA68 ldr r2, [r3, #12] 2000 0070 C2F34152 ubfx r2, r2, #21, #2 2001 0074 0132 adds r2, r2, #1 2002 0076 5200 lsls r2, r2, #1 2003 0078 0263 str r2, [r0, #48] 1218:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLPDIV) >> RCC_PLLCFGR_PLLPDIV_ 2004 .loc 1 1218 0 2005 007a DA68 ldr r2, [r3, #12] 2006 007c C2F34162 ubfx r2, r2, #25, #2 2007 0080 0132 adds r2, r2, #1 2008 0082 5200 lsls r2, r2, #1 2009 0084 4263 str r2, [r0, #52] 1219:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2010 .loc 1 1219 0 2011 0086 DB68 ldr r3, [r3, #12] 2012 0088 DB0E lsrs r3, r3, #27 2013 008a C362 str r3, [r0, #44] 1220:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2014 .loc 1 1220 0 2015 008c 7047 bx lr 2016 .L262: 1150:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 2017 .loc 1 1150 0 2018 008e 1B68 ldr r3, [r3] 2019 0090 13F48033 ands r3, r3, #65536 1152:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2020 .loc 1 1152 0 2021 0094 18BF it ne 2022 0096 4FF48033 movne r3, #65536 1156:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2023 .loc 1 1156 0 2024 009a 4360 str r3, [r0, #4] 2025 009c B9E7 b .L263 2026 .L266: 1176:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 2027 .loc 1 1176 0 2028 009e D3F89030 ldr r3, [r3, #144] 2029 00a2 13F00103 ands r3, r3, #1 1178:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2030 .loc 1 1178 0 2031 00a6 18BF it ne 2032 00a8 0123 movne r3, #1 1182:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2033 .loc 1 1182 0 2034 00aa 8360 str r3, [r0, #8] 2035 00ac C0E7 b .L267 2036 .L273: 2037 00ae 00BF .align 2 2038 .L272: 2039 00b0 00100240 .word 1073876992 2040 .cfi_endproc 2041 .LFE337: 2043 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits 2044 .align 1 2045 .p2align 2,,3 2046 .global HAL_RCC_GetClockConfig ARM GAS /tmp/cc2grSJV.s page 66 2047 .syntax unified 2048 .thumb 2049 .thumb_func 2050 .fpu fpv4-sp-d16 2052 HAL_RCC_GetClockConfig: 2053 .LFB338: 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 2054 .loc 1 1231 0 2055 .cfi_startproc 2056 @ args = 0, pretend = 0, frame = 0 2057 @ frame_needed = 0, uses_anonymous_args = 0 2058 @ link register save eliminated. 2059 .LVL188: 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2060 .loc 1 1240 0 2061 0000 0E4B ldr r3, .L276 1237:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2062 .loc 1 1237 0 2063 0002 0F22 movs r2, #15 2064 0004 0260 str r2, [r0] 1240:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2065 .loc 1 1240 0 2066 0006 9A68 ldr r2, [r3, #8] 2067 0008 02F00302 and r2, r2, #3 2068 000c 4260 str r2, [r0, #4] 1243:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2069 .loc 1 1243 0 2070 000e 9A68 ldr r2, [r3, #8] 2071 0010 02F0F002 and r2, r2, #240 2072 0014 8260 str r2, [r0, #8] 1246:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2073 .loc 1 1246 0 2074 0016 9A68 ldr r2, [r3, #8] 2075 0018 02F4E062 and r2, r2, #1792 2076 001c C260 str r2, [r0, #12] 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2077 .loc 1 1249 0 2078 001e 9B68 ldr r3, [r3, #8] 2079 0020 DB08 lsrs r3, r3, #3 1231:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check the parameters */ 2080 .loc 1 1231 0 2081 0022 10B4 push {r4} 2082 .LCFI18: 2083 .cfi_def_cfa_offset 4 2084 .cfi_offset 4, -4 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2085 .loc 1 1249 0 2086 0024 03F4E063 and r3, r3, #1792 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2087 .loc 1 1252 0 2088 0028 054C ldr r4, .L276+4 1249:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2089 .loc 1 1249 0 2090 002a 0361 str r3, [r0, #16] 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2091 .loc 1 1252 0 2092 002c 2368 ldr r3, [r4] ARM GAS /tmp/cc2grSJV.s page 67 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2093 .loc 1 1253 0 2094 002e 5DF8044B ldr r4, [sp], #4 2095 .LCFI19: 2096 .cfi_restore 4 2097 .cfi_def_cfa_offset 0 1252:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2098 .loc 1 1252 0 2099 0032 03F00F03 and r3, r3, #15 2100 0036 0B60 str r3, [r1] 1253:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2101 .loc 1 1253 0 2102 0038 7047 bx lr 2103 .L277: 2104 003a 00BF .align 2 2105 .L276: 2106 003c 00100240 .word 1073876992 2107 0040 00200240 .word 1073881088 2108 .cfi_endproc 2109 .LFE338: 2111 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 2112 .align 1 2113 .p2align 2,,3 2114 .global HAL_RCC_EnableCSS 2115 .syntax unified 2116 .thumb 2117 .thumb_func 2118 .fpu fpv4-sp-d16 2120 HAL_RCC_EnableCSS: 2121 .LFB339: 1266:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_CSSON) ; 2122 .loc 1 1266 0 2123 .cfi_startproc 2124 @ args = 0, pretend = 0, frame = 0 2125 @ frame_needed = 0, uses_anonymous_args = 0 2126 @ link register save eliminated. 1267:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2127 .loc 1 1267 0 2128 0000 024A ldr r2, .L279 2129 0002 1368 ldr r3, [r2] 2130 0004 43F40023 orr r3, r3, #524288 2131 0008 1360 str r3, [r2] 1268:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2132 .loc 1 1268 0 2133 000a 7047 bx lr 2134 .L280: 2135 .align 2 2136 .L279: 2137 000c 00100240 .word 1073876992 2138 .cfi_endproc 2139 .LFE339: 2141 .section .text.HAL_RCC_EnableLSECSS,"ax",%progbits 2142 .align 1 2143 .p2align 2,,3 2144 .global HAL_RCC_EnableLSECSS 2145 .syntax unified 2146 .thumb ARM GAS /tmp/cc2grSJV.s page 68 2147 .thumb_func 2148 .fpu fpv4-sp-d16 2150 HAL_RCC_EnableLSECSS: 2151 .LFB340: 1280:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; 2152 .loc 1 1280 0 2153 .cfi_startproc 2154 @ args = 0, pretend = 0, frame = 0 2155 @ frame_needed = 0, uses_anonymous_args = 0 2156 @ link register save eliminated. 1281:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2157 .loc 1 1281 0 2158 0000 034A ldr r2, .L282 2159 0002 D2F89030 ldr r3, [r2, #144] 2160 0006 43F02003 orr r3, r3, #32 2161 000a C2F89030 str r3, [r2, #144] 1282:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2162 .loc 1 1282 0 2163 000e 7047 bx lr 2164 .L283: 2165 .align 2 2166 .L282: 2167 0010 00100240 .word 1073876992 2168 .cfi_endproc 2169 .LFE340: 2171 .section .text.HAL_RCC_DisableLSECSS,"ax",%progbits 2172 .align 1 2173 .p2align 2,,3 2174 .global HAL_RCC_DisableLSECSS 2175 .syntax unified 2176 .thumb 2177 .thumb_func 2178 .fpu fpv4-sp-d16 2180 HAL_RCC_DisableLSECSS: 2181 .LFB341: 1291:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; 2182 .loc 1 1291 0 2183 .cfi_startproc 2184 @ args = 0, pretend = 0, frame = 0 2185 @ frame_needed = 0, uses_anonymous_args = 0 2186 @ link register save eliminated. 1292:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2187 .loc 1 1292 0 2188 0000 034A ldr r2, .L285 2189 0002 D2F89030 ldr r3, [r2, #144] 2190 0006 23F02003 bic r3, r3, #32 2191 000a C2F89030 str r3, [r2, #144] 1293:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2192 .loc 1 1293 0 2193 000e 7047 bx lr 2194 .L286: 2195 .align 2 2196 .L285: 2197 0010 00100240 .word 1073876992 2198 .cfi_endproc 2199 .LFE341: 2201 .section .text.HAL_RCC_CSSCallback,"ax",%progbits ARM GAS /tmp/cc2grSJV.s page 69 2202 .align 1 2203 .p2align 2,,3 2204 .weak HAL_RCC_CSSCallback 2205 .syntax unified 2206 .thumb 2207 .thumb_func 2208 .fpu fpv4-sp-d16 2210 HAL_RCC_CSSCallback: 2211 .LFB343: 1318:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* NOTE : This function should not be modified, when the callback is needed, 2212 .loc 1 1318 0 2213 .cfi_startproc 2214 @ args = 0, pretend = 0, frame = 0 2215 @ frame_needed = 0, uses_anonymous_args = 0 2216 @ link register save eliminated. 1322:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2217 .loc 1 1322 0 2218 0000 7047 bx lr 2219 .cfi_endproc 2220 .LFE343: 2222 0002 00BF .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits 2223 .align 1 2224 .p2align 2,,3 2225 .global HAL_RCC_NMI_IRQHandler 2226 .syntax unified 2227 .thumb 2228 .thumb_func 2229 .fpu fpv4-sp-d16 2231 HAL_RCC_NMI_IRQHandler: 2232 .LFB342: 1301:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** /* Check RCC CSSF interrupt flag */ 2233 .loc 1 1301 0 2234 .cfi_startproc 2235 @ args = 0, pretend = 0, frame = 0 2236 @ frame_needed = 0, uses_anonymous_args = 0 2237 0000 10B5 push {r4, lr} 2238 .LCFI20: 2239 .cfi_def_cfa_offset 8 2240 .cfi_offset 4, -8 2241 .cfi_offset 14, -4 1303:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** { 2242 .loc 1 1303 0 2243 0002 054C ldr r4, .L295 2244 0004 E369 ldr r3, [r4, #28] 2245 0006 DB05 lsls r3, r3, #23 2246 0008 00D4 bmi .L294 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2247 .loc 1 1311 0 2248 000a 10BD pop {r4, pc} 2249 .L294: 1306:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2250 .loc 1 1306 0 2251 000c FFF7FEFF bl HAL_RCC_CSSCallback 2252 .LVL189: 1309:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** } 2253 .loc 1 1309 0 2254 0010 4FF48073 mov r3, #256 ARM GAS /tmp/cc2grSJV.s page 70 2255 0014 2362 str r3, [r4, #32] 1311:Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_rcc.c **** 2256 .loc 1 1311 0 2257 0016 10BD pop {r4, pc} 2258 .L296: 2259 .align 2 2260 .L295: 2261 0018 00100240 .word 1073876992 2262 .cfi_endproc 2263 .LFE342: 2265 .text 2266 .Letext0: 2267 .file 2 "/usr/include/newlib/machine/_default_types.h" 2268 .file 3 "/usr/include/newlib/sys/_stdint.h" 2269 .file 4 "Drivers/CMSIS/Include/core_cm4.h" 2270 .file 5 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/system_stm32g4xx.h" 2271 .file 6 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g431xx.h" 2272 .file 7 "Drivers/CMSIS/Device/ST/STM32G4xx/Include/stm32g4xx.h" 2273 .file 8 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_def.h" 2274 .file 9 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_rcc.h" 2275 .file 10 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_gpio.h" 2276 .file 11 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_flash.h" 2277 .file 12 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_uart.h" 2278 .file 13 "Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h" ARM GAS /tmp/cc2grSJV.s page 71 DEFINED SYMBOLS *ABS*:0000000000000000 stm32g4xx_hal_rcc.c /tmp/cc2grSJV.s:16 .text.HAL_RCC_DeInit:0000000000000000 $t /tmp/cc2grSJV.s:24 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit /tmp/cc2grSJV.s:177 .text.HAL_RCC_DeInit:00000000000000b0 $d /tmp/cc2grSJV.s:185 .text.HAL_RCC_OscConfig:0000000000000000 $t /tmp/cc2grSJV.s:193 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig /tmp/cc2grSJV.s:767 .text.HAL_RCC_OscConfig:00000000000002f4 $d /tmp/cc2grSJV.s:773 .text.HAL_RCC_OscConfig:0000000000000300 $t /tmp/cc2grSJV.s:1023 .text.HAL_RCC_OscConfig:000000000000049c $d /tmp/cc2grSJV.s:1030 .text.HAL_RCC_ClockConfig:0000000000000000 $t /tmp/cc2grSJV.s:1038 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig /tmp/cc2grSJV.s:1597 .text.HAL_RCC_ClockConfig:00000000000002bc $d /tmp/cc2grSJV.s:1611 .text.HAL_RCC_MCOConfig:0000000000000000 $t /tmp/cc2grSJV.s:1619 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig /tmp/cc2grSJV.s:1702 .text.HAL_RCC_MCOConfig:000000000000004c $d /tmp/cc2grSJV.s:1707 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t /tmp/cc2grSJV.s:1715 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq /tmp/cc2grSJV.s:1799 .text.HAL_RCC_GetSysClockFreq:0000000000000064 $d /tmp/cc2grSJV.s:1806 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t /tmp/cc2grSJV.s:1814 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq /tmp/cc2grSJV.s:1829 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d /tmp/cc2grSJV.s:1834 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t /tmp/cc2grSJV.s:1842 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq /tmp/cc2grSJV.s:1870 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d /tmp/cc2grSJV.s:1877 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 $t /tmp/cc2grSJV.s:1885 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 HAL_RCC_GetPCLK2Freq /tmp/cc2grSJV.s:1913 .text.HAL_RCC_GetPCLK2Freq:0000000000000018 $d /tmp/cc2grSJV.s:1920 .text.HAL_RCC_GetOscConfig:0000000000000000 $t /tmp/cc2grSJV.s:1928 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig /tmp/cc2grSJV.s:2039 .text.HAL_RCC_GetOscConfig:00000000000000b0 $d /tmp/cc2grSJV.s:2044 .text.HAL_RCC_GetClockConfig:0000000000000000 $t /tmp/cc2grSJV.s:2052 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig /tmp/cc2grSJV.s:2106 .text.HAL_RCC_GetClockConfig:000000000000003c $d /tmp/cc2grSJV.s:2112 .text.HAL_RCC_EnableCSS:0000000000000000 $t /tmp/cc2grSJV.s:2120 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS /tmp/cc2grSJV.s:2137 .text.HAL_RCC_EnableCSS:000000000000000c $d /tmp/cc2grSJV.s:2142 .text.HAL_RCC_EnableLSECSS:0000000000000000 $t /tmp/cc2grSJV.s:2150 .text.HAL_RCC_EnableLSECSS:0000000000000000 HAL_RCC_EnableLSECSS /tmp/cc2grSJV.s:2167 .text.HAL_RCC_EnableLSECSS:0000000000000010 $d /tmp/cc2grSJV.s:2172 .text.HAL_RCC_DisableLSECSS:0000000000000000 $t /tmp/cc2grSJV.s:2180 .text.HAL_RCC_DisableLSECSS:0000000000000000 HAL_RCC_DisableLSECSS /tmp/cc2grSJV.s:2197 .text.HAL_RCC_DisableLSECSS:0000000000000010 $d /tmp/cc2grSJV.s:2202 .text.HAL_RCC_CSSCallback:0000000000000000 $t /tmp/cc2grSJV.s:2210 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback /tmp/cc2grSJV.s:2223 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t /tmp/cc2grSJV.s:2231 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler /tmp/cc2grSJV.s:2261 .text.HAL_RCC_NMI_IRQHandler:0000000000000018 $d UNDEFINED SYMBOLS HAL_GetTick HAL_InitTick uwTickPrio SystemCoreClock AHBPrescTable HAL_GPIO_Init APBPrescTable ARM GAS /tmp/cc2grSJV.s page 72